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author Roberto Fresca <robbie@robertofresca.com>2023-07-20 03:13:48 +0200
committer Roberto Fresca <robbie@robertofresca.com>2023-07-20 03:13:48 +0200
commit70a2593553c015372a2fd29571296da67b79764a (patch)
tree8dd3df3e61ac3d2f8a149ddfb9b46b2b8ce44592
parenta381012159b217b4f5bf4979e0638529b434c272 (diff)
Unkgolf.cpp driver: Hooked all the used PPI 8255 devices.
Also documented the PPI's offsets, modes, used ports, and mapped the OKI M6376 sound device.
-rw-r--r--src/mame/misc/unkgolf.cpp201
1 files changed, 162 insertions, 39 deletions
diff --git a/src/mame/misc/unkgolf.cpp b/src/mame/misc/unkgolf.cpp
index 101368d1a4b..1507146b218 100644
--- a/src/mame/misc/unkgolf.cpp
+++ b/src/mame/misc/unkgolf.cpp
@@ -36,16 +36,21 @@ class unkgolf_state : public driver_device
public:
unkgolf_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu"),
+ m_oki(*this, "oki")
{}
void unkgolf(machine_config &config) ATTR_COLD;
private:
required_device<z80_device> m_maincpu;
+ required_device<okim6376_device> m_oki;
void program_map(address_map &map) ATTR_COLD;
void io_map(address_map &map) ATTR_COLD;
+ void ppi1_w(uint8_t data);
+ void ppi4_w(uint8_t data);
+
};
@@ -60,47 +65,148 @@ void unkgolf_state::io_map(address_map &map)
map.global_mask(0xff);
map(0x00, 0x03).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
- /* // TODO: determine which of the six ranges are used by the 4 actually present PPIs
+
map(0x10, 0x13).rw("ppi0", FUNC(i8255_device::read), FUNC(i8255_device::write));
map(0x20, 0x23).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write));
- map(0x30, 0x30).rw("ppi2", FUNC(i8255_device::read), FUNC(i8255_device::write));
- map(0x40, 0x43).rw("ppi3", FUNC(i8255_device::read), FUNC(i8255_device::write));
- map(0x50, 0x53).rw("ppi4", FUNC(i8255_device::read), FUNC(i8255_device::write));
- map(0x60, 0x63).rw("ppi5", FUNC(i8255_device::read), FUNC(i8255_device::write));
- */
+
+ map(0x30, 0x30).w(m_oki, FUNC(okim6376_device::write)); // seems wrong
+
+ map(0x40, 0x43).rw("ppi2", FUNC(i8255_device::read), FUNC(i8255_device::write));
+ map(0x50, 0x53).rw("ppi3", FUNC(i8255_device::read), FUNC(i8255_device::write));
+ map(0x60, 0x63).rw("ppi4", FUNC(i8255_device::read), FUNC(i8255_device::write)); // indirect input/output through 61h. no sense at all since was set to output.
+// map(0x70, 0x73).rw("ppi5", FUNC(i8255_device::read), FUNC(i8255_device::write)); // initialized, but not used.
+
+/*
+ .-----.-----------.---------.---------.---------.-------.-------.-------.------.
+ | PPI | Map Range | control | PA mode | PB mode | PortA | PortB | PortC | Used |
+ '-----+-----------'---------'---------'---------'-------'-------'-------'------'
+ PPI0 10h-13h 0x90 M0 M0 IN* OUT OUT* YES
+ PPI1 20h-23h 0x80 M0 M0 OUT* OUT OUT YES
+ PPI2 40h-43h 0x9B M0 M0 IN* IN* IN* YES
+ PPI3 50h-53h 0x9B M0 M0 IN* IN* IN* YES
+ PPI4 60h-63h 0x80 M0 M0 OUT OUT** OUT NO
+ PPI5 70h-73h 0x80 M0 M0 OUT OUT OUT NO
+
+ * Activity.
+ ** Indirect input/output.
+
+*/
+}
+
+void unkgolf_state::ppi1_w(uint8_t data)
+{
+ logerror("PPI1 OUT: %02X\n", data);
+}
+
+void unkgolf_state::ppi4_w(uint8_t data)
+{
+ logerror("PPI4 OUT: %02X\n", data);
}
static INPUT_PORTS_START( unkgolf )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5")
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8")
PORT_START("IN1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
- PORT_START("DSW1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5")
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8")
+
+ PORT_START("IN2")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("IN2-1")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("IN2-2")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("IN2-3")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("IN2-4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("IN2-5")
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-7")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8")
+
+ PORT_START("IN3")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5")
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8")
+
+ PORT_START("IN4")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5")
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8")
+
+ PORT_START("IN5")
+ PORT_DIPNAME( 0x01, 0x01, "IN5" )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_START("DSW")
+ PORT_DIPNAME( 0x01, 0x01, "DSW" )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
INPUT_PORTS_END
@@ -121,17 +227,34 @@ void unkgolf_state::unkgolf(machine_config &config)
z80ctc_device& ctc(Z80CTC(config, "ctc", 20_MHz_XTAL / 5)); // divisor unknown
ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
- I8255(config, "ppi0");
+ i8255_device &ppi0(I8255(config, "ppi0"));
+ // (10-13) Mode 0 - Ports A set as input, Ports B, high C & low C as output.
+ ppi0.in_pa_callback().set_ioport("DSW");
- I8255(config, "ppi1");
+ i8255_device &ppi1(I8255(config, "ppi1"));
+ // (20-23) Mode 0 - Ports A, B, high C & low C set as output.
+ ppi1.out_pa_callback().set(FUNC(unkgolf_state::ppi1_w));
- I8255(config, "ppi2");
+ i8255_device &ppi2(I8255(config, "ppi2"));
+ // (40-43) Mode 0 - Ports A, B, high C & low C set as input.
+ ppi2.in_pa_callback().set_ioport("IN0");
+ ppi2.in_pb_callback().set_ioport("IN1");
+ ppi2.in_pc_callback().set_ioport("IN2");
- I8255(config, "ppi3");
+ i8255_device &ppi3(I8255(config, "ppi3"));
+ // (50-53) Mode 0 - Ports A, B, high C & low C set as input.
+ ppi3.in_pa_callback().set_ioport("IN3");
+ ppi3.in_pb_callback().set_ioport("IN4");
+ ppi3.in_pc_callback().set_ioport("IN5");
- SPEAKER(config, "mono").front_center();
+ i8255_device &ppi4(I8255(config, "ppi4"));
+ // (60-63) Mode 0 - Ports A, B, high C & low C set as output.
+ ppi4.out_pa_callback().set(FUNC(unkgolf_state::ppi4_w));
- OKIM6376(config, "oki", 4.096_MHz_XTAL / 32).add_route(ALL_OUTPUTS, "mono", 1.0); // divisor unknown
+
+ // sound
+ SPEAKER(config, "mono").front_center();
+ OKIM6376(config, "oki", 4.096_MHz_XTAL / 4).add_route(ALL_OUTPUTS, "mono", 1.0); // divisor unknown
}