diff options
author | 2016-09-10 15:50:56 +1200 | |
---|---|---|
committer | 2016-09-10 15:51:48 +1200 | |
commit | fa0e6b3fbda795ad096839d16c161c1bd520130d (patch) | |
tree | bba6b7d1475436bbb4e2865863a882eca4772160 | |
parent | 52e5c4109aa0e84b19f1200125a0137d2697ac35 (diff) |
octopus: added more components, hooked up DIP switches. All systems tests now pass.
-rw-r--r-- | src/mame/drivers/octopus.cpp | 249 |
1 files changed, 238 insertions, 11 deletions
diff --git a/src/mame/drivers/octopus.cpp b/src/mame/drivers/octopus.cpp index e544a994966..2c66d9fdec4 100644 --- a/src/mame/drivers/octopus.cpp +++ b/src/mame/drivers/octopus.cpp @@ -134,7 +134,8 @@ public: m_rtc(*this, "rtc"), m_fdc(*this, "fdc"), m_floppy0(*this, "fdc:floppy0"), - m_floppy1(*this, "fdc:floppy1") + m_floppy1(*this, "fdc:floppy1"), + m_current_dma(-1) { } virtual void machine_reset() override; @@ -143,6 +144,27 @@ public: DECLARE_READ8_MEMBER(vram_r); DECLARE_WRITE8_MEMBER(vram_w); DECLARE_READ8_MEMBER(get_slave_ack); + DECLARE_WRITE_LINE_MEMBER(fdc_drq); + DECLARE_READ8_MEMBER(bank_sel_r); + DECLARE_WRITE8_MEMBER(bank_sel_w); + DECLARE_READ8_MEMBER(dma_read); + DECLARE_WRITE8_MEMBER(dma_write); + DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed); + DECLARE_READ8_MEMBER(system_r); + DECLARE_WRITE8_MEMBER(system_w); + DECLARE_READ8_MEMBER(cntl_r); + DECLARE_WRITE8_MEMBER(cntl_w); + DECLARE_READ8_MEMBER(gpo_r); + DECLARE_WRITE8_MEMBER(gpo_w); + + DECLARE_WRITE_LINE_MEMBER(dack0_w) { m_dma1->hack_w(state ? 0 : 1); } // for all unused DMA channel? + DECLARE_WRITE_LINE_MEMBER(dack1_w) { if(!state) m_current_dma = 1; else if(m_current_dma == 1) m_current_dma = -1; } // HD + DECLARE_WRITE_LINE_MEMBER(dack2_w) { if(!state) m_current_dma = 2; else if(m_current_dma == 2) m_current_dma = -1; } // RAM refresh + DECLARE_WRITE_LINE_MEMBER(dack3_w) { m_dma1->hack_w(state ? 0 : 1); } + DECLARE_WRITE_LINE_MEMBER(dack4_w) { m_dma1->hack_w(state ? 0 : 1); } + DECLARE_WRITE_LINE_MEMBER(dack5_w) { if(!state) m_current_dma = 5; else if(m_current_dma == 5) m_current_dma = -1; } // Floppy + DECLARE_WRITE_LINE_MEMBER(dack6_w) { m_dma1->hack_w(state ? 0 : 1); } + DECLARE_WRITE_LINE_MEMBER(dack7_w) { m_dma1->hack_w(state ? 0 : 1); } private: required_device<cpu_device> m_maincpu; required_device<cpu_device> m_subcpu; @@ -157,6 +179,14 @@ private: required_device<fd1793_t> m_fdc; required_device<floppy_connector> m_floppy0; required_device<floppy_connector> m_floppy1; + + UINT8 m_hd_bank; // HD bank select + UINT8 m_fd_bank; // Floppy bank select + UINT8 m_z80_bank; // Z80 bank / RAM refresh + INT8 m_current_dma; // current DMA channel (-1 for none) + UINT8 m_current_drive; + UINT8 m_cntl; // RTC / FDC control (PPI port B) + UINT8 m_gpo; // General purpose outputs (PPI port C) }; @@ -165,9 +195,13 @@ static ADDRESS_MAP_START( octopus_mem, AS_PROGRAM, 8, octopus_state ) AM_RANGE(0x00000, 0x1ffff) AM_RAM // second 128kB for 256kB system // expansion RAM, up to 512kB extra + AM_RANGE(0x20000, 0xcffff) AM_NOP AM_RANGE(0xd0000, 0xdffff) AM_RAM AM_SHARE("vram") + AM_RANGE(0xe0000, 0xe3fff) AM_NOP AM_RANGE(0xe4000, 0xe5fff) AM_RAM AM_SHARE("fram") + AM_RANGE(0xe6000, 0xf3fff) AM_NOP AM_RANGE(0xf4000, 0xf5fff) AM_ROM AM_REGION("chargen",0) + AM_RANGE(0xf6000, 0xfbfff) AM_NOP AM_RANGE(0xfc000, 0xfffff) AM_ROM AM_REGION("user1",0) ADDRESS_MAP_END @@ -175,12 +209,12 @@ static ADDRESS_MAP_START( octopus_io, AS_IO, 8, octopus_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x00, 0x0f) AM_DEVREADWRITE("dma1", am9517a_device, read, write) AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma2", am9517a_device, read, write) - // 0x20: System type switch (read), Z80 NMI (write) - // 0x21: Parity fail reset (write), bit5 SLCTOUT from parallel, bit6 option board parity fail bit7 main board parity fail (read) - // 0x28: Z80 enable (write) + AM_RANGE(0x20, 0x20) AM_READ_PORT("DSWA") + AM_RANGE(0x21, 0x2f) AM_READWRITE(system_r, system_w) // 0x31: hard disk bank // 0x32: floppy bank // 0x33: RAM refresh / Z80 bank + AM_RANGE(0x31, 0x33) AM_READWRITE(bank_sel_r, bank_sel_w) // 0x50-51: Keyboard (i8251) // 0x70-73: HD controller // 0x80-83: serial timers (i8253) @@ -192,7 +226,7 @@ static ADDRESS_MAP_START( octopus_io, AS_IO, 8, octopus_state ) AM_RANGE(0xc9, 0xc9) AM_DEVREADWRITE("crtc", scn2674_device, buffer_r, buffer_w) AM_RANGE(0xca, 0xca) AM_RAM // attribute writes go here // 0xcf: mode control - AM_RANGE(0xd0, 0xdf) AM_DEVREADWRITE("fdc", fd1793_t, read, write) + AM_RANGE(0xd0, 0xd3) AM_DEVREADWRITE("fdc", fd1793_t, read, write) // 0xe0: Z80 interrupt vector for RS232 // 0xe4: Z80 interrupt vector for RS422 // 0xf0-f1: Parallel interface data I/O (Centronics), and control/status @@ -214,6 +248,32 @@ ADDRESS_MAP_END /* Input ports */ static INPUT_PORTS_START( octopus ) + + PORT_START("DSWA") + PORT_DIPNAME( 0x03, 0x02, "Number of floppy drives" ) PORT_DIPLOCATION("SWA:1,2") + PORT_DIPSETTING( 0x00, "None" ) + PORT_DIPSETTING( 0x01, "1 Floppy" ) + PORT_DIPSETTING( 0x02, "2 Floppies" ) + PORT_DIPSETTING( 0x03, "Not used" ) + PORT_DIPNAME( 0x04, 0x00, "Quad drives" ) PORT_DIPLOCATION("SWA:3") + PORT_DIPSETTING( 0x00, "Disabled" ) + PORT_DIPSETTING( 0x04, "Enabled" ) + PORT_DIPNAME( 0x38, 0x00, "Winchester drive type" ) PORT_DIPLOCATION("SWA:4,5,6") + PORT_DIPSETTING( 0x00, "None" ) + PORT_DIPSETTING( 0x08, "RO201" ) + PORT_DIPSETTING( 0x10, "RO202" ) + PORT_DIPSETTING( 0x18, "Reserved" ) + PORT_DIPSETTING( 0x20, "RO204" ) + PORT_DIPSETTING( 0x28, "Reserved" ) + PORT_DIPSETTING( 0x30, "RO208" ) + PORT_DIPSETTING( 0x38, "Reserved" ) + PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:7") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Colour monitor connected" ) PORT_DIPLOCATION("SWA:8") + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Yes ) ) + INPUT_PORTS_END @@ -227,10 +287,148 @@ READ8_MEMBER(octopus_state::vram_r) return m_vram[offset]; } +WRITE_LINE_MEMBER(octopus_state::fdc_drq) +{ + // TODO +} + +READ8_MEMBER(octopus_state::bank_sel_r) +{ + switch(offset) + { + case 0: + return m_hd_bank; + case 1: + return m_fd_bank; + case 2: + return m_z80_bank; + } + return 0xff; +} + +WRITE8_MEMBER(octopus_state::bank_sel_w) +{ + switch(offset) + { + case 0: + m_hd_bank = data; + logerror("HD bank = %i\n",data); + break; + case 1: + m_fd_bank = data; + logerror("Floppy bank = %i\n",data); + break; + case 2: + m_z80_bank = data; + logerror("Z80/RAM bank = %i\n",data); + break; + } +} + +// System control +// 0x20: read: System type, write: Z80 NMI +// 0x21: read: bit5=SLCTOUT from parallel interface, bit6=option board parity fail, bit7=main board parity fail +// write: parity fail reset +// ports 0x20 and 0x21 read out the DIP switch configuration (the firmware function to get system config simply does IN AX,20h) +// 0x28: write: Z80 enable +WRITE8_MEMBER(octopus_state::system_w) +{ + logerror("SYS: System control offset %i data %02x\n",offset,data); +} + +READ8_MEMBER(octopus_state::system_r) +{ + switch(offset) + { + case 0: + return 0x1f; // do bits 0-4 mean anything? Language? + } + + return 0xff; +} + +// RTC/FDC control +// bit4-5: write precomp. +// bit6-7: drive select +READ8_MEMBER(octopus_state::cntl_r) +{ + return m_cntl; +} + +WRITE8_MEMBER(octopus_state::cntl_w) +{ + m_cntl = data; + m_current_drive = (data & 0xc0) >> 6; + switch(m_current_drive) + { + case 1: + m_fdc->set_floppy(m_floppy0->get_device()); + break; + case 2: + m_fdc->set_floppy(m_floppy1->get_device()); + break; + } + logerror("Selected floppy drive %i\n",m_current_drive); +} + +// General Purpose Outputs - PPI port C +// bit 2 - floppy side select +// bit 1 - parallel data I/O (0 = output) +// bit 0 - parallel control I/O (0 = output) +READ8_MEMBER(octopus_state::gpo_r) +{ + return m_gpo; +} + +WRITE8_MEMBER(octopus_state::gpo_w) +{ + m_gpo = data; + switch(m_current_drive) + { + case 1: + m_floppy0->get_device()->ss_w(data & 0x04); + break; + case 2: + m_floppy1->get_device()->ss_w(data & 0x04); + break; + default: + logerror("Attempted to set side on unknown drive %i\n",m_current_drive); + } +} + +READ8_MEMBER(octopus_state::dma_read) +{ + UINT8 byte; + address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space + if(m_current_dma == -1) + return 0; + logerror("DMA: MEMR off %06x\n",offset); + byte = prog_space.read_byte(offset); + return byte; +} + +WRITE8_MEMBER(octopus_state::dma_write) +{ + address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space + if(m_current_dma == -1) + return; + logerror("DMA: MEMW off %06x data %02x\n",offset,data); + prog_space.write_byte(offset, data); +} + +WRITE_LINE_MEMBER( octopus_state::dma_hrq_changed ) +{ + m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); + + /* Assert HLDA */ + m_dma2->hack_w(state); +} void octopus_state::machine_reset() { m_subcpu->set_input_line(INPUT_LINE_HALT,ASSERT_LINE); // halt Z80 to start with + m_current_dma = -1; + m_current_drive = 0; } void octopus_state::video_start() @@ -251,7 +449,6 @@ SCN2674_DRAW_CHARACTER_MEMBER(octopus_state::display_pixels) READ8_MEMBER( octopus_state::get_slave_ack ) { - logerror("slave_ack: %i\n",offset); if (offset==7) return m_pic2->acknowledge(); @@ -274,8 +471,36 @@ static MACHINE_CONFIG_START( octopus, octopus_state ) MCFG_CPU_IO_MAP(octopus_sub_io) MCFG_DEVICE_ADD("dma1", AM9517A, XTAL_24MHz / 6) // 4MHz - + MCFG_I8237_OUT_HREQ_CB(DEVWRITELINE("dma2", am9517a_device, dreq0_w)) + MCFG_I8237_IN_MEMR_CB(READ8(octopus_state,dma_read)) + MCFG_I8237_OUT_MEMW_CB(WRITE8(octopus_state,dma_write)) + MCFG_I8237_IN_IOR_0_CB(NOOP) + MCFG_I8237_IN_IOR_1_CB(NOOP) // HDC + MCFG_I8237_IN_IOR_2_CB(NOOP) // RAM Refresh + MCFG_I8237_IN_IOR_3_CB(NOOP) + MCFG_I8237_OUT_IOW_0_CB(NOOP) + MCFG_I8237_OUT_IOW_1_CB(NOOP) // HDC + MCFG_I8237_OUT_IOW_2_CB(NOOP) // RAM Refresh + MCFG_I8237_OUT_IOW_3_CB(NOOP) + MCFG_I8237_OUT_DACK_0_CB(WRITELINE(octopus_state, dack0_w)) + MCFG_I8237_OUT_DACK_1_CB(WRITELINE(octopus_state, dack1_w)) + MCFG_I8237_OUT_DACK_2_CB(WRITELINE(octopus_state, dack2_w)) + MCFG_I8237_OUT_DACK_3_CB(WRITELINE(octopus_state, dack3_w)) MCFG_DEVICE_ADD("dma2", AM9517A, XTAL_24MHz / 6) // 4MHz + MCFG_I8237_IN_MEMR_CB(READ8(octopus_state,dma_read)) + MCFG_I8237_OUT_MEMW_CB(WRITE8(octopus_state,dma_write)) + MCFG_I8237_IN_IOR_0_CB(NOOP) + MCFG_I8237_IN_IOR_1_CB(DEVREAD8("fdc",fd1793_t,data_r)) // FDC + MCFG_I8237_IN_IOR_2_CB(NOOP) + MCFG_I8237_IN_IOR_3_CB(NOOP) + MCFG_I8237_OUT_IOW_0_CB(NOOP) + MCFG_I8237_OUT_IOW_1_CB(DEVWRITE8("fdc",fd1793_t,data_w)) // FDC + MCFG_I8237_OUT_IOW_2_CB(NOOP) + MCFG_I8237_OUT_IOW_3_CB(NOOP) + MCFG_I8237_OUT_DACK_0_CB(WRITELINE(octopus_state, dack4_w)) + MCFG_I8237_OUT_DACK_1_CB(WRITELINE(octopus_state, dack5_w)) + MCFG_I8237_OUT_DACK_2_CB(WRITELINE(octopus_state, dack6_w)) + MCFG_I8237_OUT_DACK_3_CB(WRITELINE(octopus_state, dack7_w)) MCFG_PIC8259_ADD("pic_master", INPUTLINE("maincpu",0), VCC, READ8(octopus_state,get_slave_ack)) MCFG_PIC8259_ADD("pic_slave", DEVWRITELINE("pic_master",pic8259_device, ir7_w), GND, NOOP) @@ -283,15 +508,17 @@ static MACHINE_CONFIG_START( octopus, octopus_state ) // RTC (MC146818 via i8255 PPI) TODO: hook up RTC to PPI MCFG_DEVICE_ADD("ppi", I8255, 0) MCFG_I8255_IN_PORTA_CB(NOOP) - MCFG_I8255_IN_PORTB_CB(NOOP) - MCFG_I8255_IN_PORTC_CB(NOOP) + MCFG_I8255_IN_PORTB_CB(READ8(octopus_state,cntl_r)) + MCFG_I8255_IN_PORTC_CB(READ8(octopus_state,gpo_r)) MCFG_I8255_OUT_PORTA_CB(NOOP) - MCFG_I8255_OUT_PORTB_CB(NOOP) - MCFG_I8255_OUT_PORTC_CB(NOOP) + MCFG_I8255_OUT_PORTB_CB(WRITE8(octopus_state,cntl_w)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(octopus_state,gpo_w)) MCFG_MC146818_ADD("rtc", XTAL_32_768kHz) MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic_slave",pic8259_device, ir4_w)) MCFG_FD1793_ADD("fdc",XTAL_16MHz / 8) + MCFG_WD_FDC_INTRQ_CALLBACK(DEVWRITELINE("pic_master",pic8259_device, ir5_w)) + MCFG_WD_FDC_DRQ_CALLBACK(DEVWRITELINE("dma2",am9517a_device, dreq1_w)) MCFG_FLOPPY_DRIVE_ADD("fdc:floppy0", octopus_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:floppy1", octopus_floppies, "525dd", floppy_image_device::default_floppy_formats) |