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author | 2019-05-01 19:21:18 +0100 | |
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committer | 2019-05-01 19:21:18 +0100 | |
commit | eecad66aa4aeebe3c3dcd328c90b49b2a6a5f204 (patch) | |
tree | 2b35bde45a1cb91bb72378c3c8f48c2a8c4e04ed | |
parent | b33011878b9c3132e0dc809d762ada6901bb9fb0 (diff) |
fix for building with clang (nw)
-rw-r--r-- | src/mame/drivers/8080bw.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mame/drivers/8080bw.cpp b/src/mame/drivers/8080bw.cpp index 0c30ff12def..09c2a0344fa 100644 --- a/src/mame/drivers/8080bw.cpp +++ b/src/mame/drivers/8080bw.cpp @@ -960,7 +960,7 @@ void _8080bw_state::invrvnge(machine_config &config) // CPU E-pin connects to AY clock pin ay8910_device &psg(AY8910(config, "psg", XTAL(4'000'000)/2)); psg.port_a_read_callback().set([this] () { return m_sound_data >> 1; }); - psg.port_b_read_callback().set([this] () { return 0xff; }); + psg.port_b_read_callback().set([] () { return 0xff; }); psg.add_route(ALL_OUTPUTS, "mono", 0.75); // CPU E-pin also connects to a 4040 divider. The Q8 output goes to the CPU's NMI pin. |