diff options
author | 2020-09-26 18:46:48 +0200 | |
---|---|---|
committer | 2020-09-26 19:55:59 +0200 | |
commit | 5f93f1ba04bfa2d0a71b44b02aa6dd45caacba17 (patch) | |
tree | 67bcc288b86d03abc9951d2ae7eae015c08b1f66 | |
parent | ac99753eb62661b4d41e081ff1ef82f8e4050f03 (diff) |
nforcepc/xbox: set values for various configuration space pci registers
-rw-r--r-- | src/mame/drivers/nforcepc.cpp | 26 | ||||
-rw-r--r-- | src/mame/includes/nforcepc.h | 5 | ||||
-rw-r--r-- | src/mame/includes/xbox_pci.h | 29 | ||||
-rw-r--r-- | src/mame/machine/xbox.cpp | 12 | ||||
-rw-r--r-- | src/mame/machine/xbox_pci.cpp | 71 |
5 files changed, 115 insertions, 28 deletions
diff --git a/src/mame/drivers/nforcepc.cpp b/src/mame/drivers/nforcepc.cpp index 06d2db89863..c6a73538d71 100644 --- a/src/mame/drivers/nforcepc.cpp +++ b/src/mame/drivers/nforcepc.cpp @@ -103,6 +103,9 @@ void crush11_host_device::device_start() io_window_end = 0xffff; io_offset = 0; status = 0x00b0; + command = 0x0000; + + add_map(64 * 1024 * 1024, M_MEM | M_PREF, FUNC(crush11_host_device::aperture_map)); } void crush11_host_device::reset_all_mappings() @@ -169,16 +172,16 @@ void crush11_memory_device::config_map(address_map &map) map(0xc8, 0xcb).nopr(); } -crush11_memory_device::crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, int ram_size) +crush11_memory_device::crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id, int ram_size) : crush11_memory_device(mconfig, tag, owner, clock) { + set_ids(0x10de01ac, 0xb2, 0x050000, subsystem_id); set_ram_size(ram_size); } crush11_memory_device::crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, CRUSH11_MEMORY, tag, owner, clock) { - set_ids(0x10de01ac, 0, 0, 0); } void crush11_memory_device::device_start() @@ -191,6 +194,7 @@ void crush11_memory_device::device_start() host = dynamic_cast<crush11_host_device *>(r); ram_space = host->get_cpu_space(AS_PROGRAM); status = 0x0020; + command = 0x0000; } void crush11_memory_device::device_reset() @@ -1159,7 +1163,7 @@ void nforcepc_state::nforcepc(machine_config &config) PCI_ROOT(config, ":pci", 0); CRUSH11(config, ":pci:00.0", 0, "maincpu", "bios"); // 10de:01a4 NVIDIA Corporation nForce CPU bridge - CRUSH11_MEMORY(config, ":pci:00.1", 0, 2); // 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller + CRUSH11_MEMORY(config, ":pci:00.1", 0, 0x10430c11, 2); // 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller // 10de:01ad NVIDIA Corporation nForce 220/420 Memory Controller // 10de:01ab NVIDIA Corporation nForce 420 Memory Controller (DDR) mcpx_isalpc_device &isa(MCPX_ISALPC(config, ":pci:01.0", 0, 0x10430c11)); // 10de:01b2 NVIDIA Corporation nForce ISA Bridge (LPC bus) @@ -1175,7 +1179,7 @@ void nforcepc_state::nforcepc(machine_config &config) ite.txd2().set("serport1", FUNC(rs232_port_device::write_txd)); ite.ndtr2().set("serport1", FUNC(rs232_port_device::write_dtr)); ite.nrts2().set("serport1", FUNC(rs232_port_device::write_rts)); - MCPX_SMBUS(config, ":pci:01.1", 0); // 10de:01b4 NVIDIA Corporation nForce PCI System Management (SMBus) + MCPX_SMBUS(config, ":pci:01.1", 0, 0x10430c11); // 10de:01b4 NVIDIA Corporation nForce PCI System Management (SMBus) SMBUS_ROM(config, ":pci:01.1:050", 0, test_spd_data, sizeof(test_spd_data)); // these 3 are on smbus number 0 SMBUS_LOGGER(config, ":pci:01.1:051", 0); SMBUS_LOGGER(config, ":pci:01.1:052", 0); @@ -1183,20 +1187,20 @@ void nforcepc_state::nforcepc(machine_config &config) AS99127F(config, ":pci:01.1:12d", 0); AS99127F_SENSOR2(config, ":pci:01.1:148", 0); AS99127F_SENSOR3(config, ":pci:01.1:149", 0); - mcpx_ohci_device &ohci(MCPX_OHCI(config, ":pci:02.0", 0)); // 10de:01c2 NVIDIA Corporation nForce USB Controller + mcpx_ohci_device &ohci(MCPX_OHCI(config, ":pci:02.0", 0, 0x10430c11)); // 10de:01c2 NVIDIA Corporation nForce USB Controller ohci.interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq1)); - MCPX_OHCI(config, ":pci:03.0", 0); // 10de:01c2 NVIDIA Corporation nForce USB Controller + MCPX_OHCI(config, ":pci:03.0", 0, 0x10430c11); // 10de:01c2 NVIDIA Corporation nForce USB Controller MCPX_ETH(config, ":pci:04.0", 0); // 10de:01c3 NVIDIA Corporation nForce Ethernet Controller - MCPX_APU(config, ":pci:05.0", 0, m_maincpu); // 10de:01b0 NVIDIA Corporation nForce Audio Processing Unit - MCPX_AC97_AUDIO(config, ":pci:06.0", 0); // 10de:01b1 NVIDIA Corporation nForce AC'97 Audio Controller - PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge + MCPX_APU(config, ":pci:05.0", 0, 0x10430c11, m_maincpu); // 10de:01b0 NVIDIA Corporation nForce Audio Processing Unit + MCPX_AC97_AUDIO(config, ":pci:06.0", 0, 0x10438384); // 10de:01b1 NVIDIA Corporation nForce AC'97 Audio Controller + PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0xc2); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge // 10ec:8139 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (behind bridge) - mcpx_ide_device &ide(MCPX_IDE(config, ":pci:09.0", 0)); // 10de:01bc NVIDIA Corporation nForce IDE + mcpx_ide_device &ide(MCPX_IDE(config, ":pci:09.0", 0, 0x10430c11)); // 10de:01bc NVIDIA Corporation nForce IDE ide.pri_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq14)); ide.sec_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq15)); ide.subdevice<ide_controller_32_device>("ide1")->options(ata_devices, "hdd", nullptr, true); ide.subdevice<ide_controller_32_device>("ide2")->options(ata_devices, "cdrom", nullptr, true); - NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge + NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0xb2); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge VIRGEDX_PCI(config, ":pci:0a.0", 0); SST_49LF020(config, "bios", 0); diff --git a/src/mame/includes/nforcepc.h b/src/mame/includes/nforcepc.h index 000f5ebb1da..acc61f21c74 100644 --- a/src/mame/includes/nforcepc.h +++ b/src/mame/includes/nforcepc.h @@ -24,7 +24,7 @@ public: crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, const char *bios_device_tag) : crush11_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x10de01a4, 0x01, 0x10430c11); + set_ids_host(0x10de01a4, 0xb2, 0); set_cpu_tag(std::forward<T>(cpu_tag)); biosrom.set_tag(bios_device_tag); } @@ -36,6 +36,7 @@ public: address_space *get_cpu_space(int spacenum) { return &cpu->space(spacenum); } void bios_map(address_map &map); + void aperture_map(address_map &map) {} protected: virtual void device_start() override; @@ -66,7 +67,7 @@ DECLARE_DEVICE_TYPE(CRUSH11, crush11_host_device) class crush11_memory_device : public pci_device { public: - crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, int ram_size); + crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id, int ram_size); crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); void set_ram_size(int ram_size); diff --git a/src/mame/includes/xbox_pci.h b/src/mame/includes/xbox_pci.h index 05829c6028e..b0fc2aae613 100644 --- a/src/mame/includes/xbox_pci.h +++ b/src/mame/includes/xbox_pci.h @@ -169,6 +169,7 @@ public: class mcpx_smbus_device : public pci_device { public: + mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id); mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); auto interrupt_handler() { return m_interrupt_handler.bind(); } @@ -182,6 +183,8 @@ protected: virtual void device_start() override; virtual void device_reset() override; + virtual void config_map(address_map &map) override; + private: devcb_write_line m_interrupt_handler; struct smbus_state { @@ -199,6 +202,8 @@ private: void smbus_io2(address_map &map); uint32_t smbus_read(int bus, offs_t offset, uint32_t mem_mask); void smbus_write(int bus, offs_t offset, uint32_t data, uint32_t mem_mask); + uint8_t minimum_grant_r() { return 3; } + uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device) @@ -209,6 +214,7 @@ DECLARE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device) class usb_function_device; class mcpx_ohci_device : public pci_device { public: + mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id); mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); void set_hack_callback(std::function<void(void)> hack) { hack_callback = hack; } void plug_usb_device(int port, device_usb_ohci_function_interface *function); @@ -224,6 +230,8 @@ protected: virtual void device_config_complete() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void config_map(address_map &map) override; + private: ohci_usb_controller *ohci_usb; devcb_write_line m_interrupt_handler; @@ -236,6 +244,8 @@ private: int port; } connecteds[4]; int connecteds_count; + uint8_t minimum_grant_r() { return 3; } + uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_OHCI, mcpx_ohci_device) @@ -271,9 +281,10 @@ DECLARE_DEVICE_TYPE(MCPX_ETH, mcpx_eth_device) class mcpx_apu_device : public pci_device { public: template <typename T> - mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag) + mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id, T &&cpu_tag) : mcpx_apu_device(mconfig, tag, owner, clock) { + set_ids(0x10de01b0, 0xc2, 0x040100, subsystem_id); set_cpu_tag(std::forward<T>(cpu_tag)); } mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -287,6 +298,8 @@ protected: virtual void device_reset() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void config_map(address_map &map) override; + private: required_device<device_memory_interface> cpu; // APU contains 3 dsps: voice processor (VP) global processor (GP) encode processor (EP) @@ -312,6 +325,8 @@ private: address_space *space; } apust; void apu_mmio(address_map &map); + uint8_t minimum_grant_r() { return 1; } + uint8_t maximum_latency_r() { return 0xc; } }; DECLARE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device) @@ -322,6 +337,7 @@ DECLARE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device) class mcpx_ac97_audio_device : public pci_device { public: + mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id); mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); uint32_t ac97_audio_r(offs_t offset, uint32_t mem_mask = ~0); @@ -335,6 +351,8 @@ protected: virtual void device_start() override; virtual void device_reset() override; + virtual void config_map(address_map &map) override; + private: struct ac97_state { uint32_t mixer_regs[0x84 / 4]; @@ -343,6 +361,8 @@ private: void ac97_mmio(address_map &map); void ac97_io0(address_map &map); void ac97_io1(address_map &map); + uint8_t minimum_grant_r() { return 2; } + uint8_t maximum_latency_r() { return 5; } }; DECLARE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device) @@ -364,13 +384,12 @@ DECLARE_DEVICE_TYPE(MCPX_AC97_MODEM, mcpx_ac97_modem_device) class mcpx_ide_device : public pci_device { public: + mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id); mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); auto pri_interrupt_handler() { return m_pri_interrupt_handler.bind(); } auto sec_interrupt_handler() { return m_sec_interrupt_handler.bind(); } - virtual void config_map(address_map &map) override; - void class_rev_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint8_t pri_read_cs1_r(); void pri_write_cs1_w(uint8_t data); @@ -384,6 +403,8 @@ protected: virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + virtual void config_map(address_map &map) override; + private: required_device<bus_master_ide_controller_device> m_pri; required_device<bus_master_ide_controller_device> m_sec; @@ -396,6 +417,8 @@ private: void ide_io(address_map &map); DECLARE_WRITE_LINE_MEMBER(ide_pri_interrupt); DECLARE_WRITE_LINE_MEMBER(ide_sec_interrupt); + uint8_t minimum_grant_r() { return 3; } + uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_IDE, mcpx_ide_device) diff --git a/src/mame/machine/xbox.cpp b/src/mame/machine/xbox.cpp index 99270ddf038..74af8e4eb71 100644 --- a/src/mame/machine/xbox.cpp +++ b/src/mame/machine/xbox.cpp @@ -964,18 +964,18 @@ void xbox_base_state::xbox_base(machine_config &config) NV2A_RAM(config, ":pci:00.3", 0, 128); // 128 megabytes MCPX_ISALPC(config, ":pci:01.0", 0, 0).interrupt_output().set(FUNC(xbox_base_state::maincpu_interrupt)); XBOX_SUPERIO(config, ":pci:01.0:0", 0); - MCPX_SMBUS(config, ":pci:01.1", 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq11)); //.set(FUNC(xbox_base_state::smbus_interrupt_changed)); + MCPX_SMBUS(config, ":pci:01.1", 0, 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq11)); //.set(FUNC(xbox_base_state::smbus_interrupt_changed)); XBOX_PIC16LC(config, ":pci:01.1:110", 0); // these 3 are on smbus number 1 XBOX_CX25871(config, ":pci:01.1:145", 0); XBOX_EEPROM(config, ":pci:01.1:154", 0); - MCPX_OHCI(config, ":pci:02.0", 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq1)); //.set(FUNC(xbox_base_state::ohci_usb_interrupt_changed)); - MCPX_OHCI(config, ":pci:03.0", 0); + MCPX_OHCI(config, ":pci:02.0", 0, 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq1)); //.set(FUNC(xbox_base_state::ohci_usb_interrupt_changed)); + MCPX_OHCI(config, ":pci:03.0", 0, 0); MCPX_ETH(config, ":pci:04.0", 0); - MCPX_APU(config, ":pci:05.0", 0, m_maincpu); - MCPX_AC97_AUDIO(config, ":pci:06.0", 0); + MCPX_APU(config, ":pci:05.0", 0, 0, m_maincpu); + MCPX_AC97_AUDIO(config, ":pci:06.0", 0, 0); MCPX_AC97_MODEM(config, ":pci:06.1", 0); PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0); - MCPX_IDE(config, ":pci:09.0", 0).pri_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq14)); //.set(FUNC(xbox_base_state::ide_interrupt_changed)); + MCPX_IDE(config, ":pci:09.0", 0, 0).pri_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq14)); //.set(FUNC(xbox_base_state::ide_interrupt_changed)); NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0); NV2A_GPU(config, ":pci:1e.0:00.0", 0, m_maincpu).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq3)); //.set(FUNC(xbox_base_state::nv2a_interrupt_changed)); diff --git a/src/mame/machine/xbox_pci.cpp b/src/mame/machine/xbox_pci.cpp index 3093bc72d2f..cebd51f9dd7 100644 --- a/src/mame/machine/xbox_pci.cpp +++ b/src/mame/machine/xbox_pci.cpp @@ -125,7 +125,9 @@ void mcpx_isalpc_device::map_extra(uint64_t memory_window_start, uint64_t memory mcpx_isalpc_device::mcpx_isalpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) : mcpx_isalpc_device(mconfig, tag, owner, clock) { - set_ids(0x10de01b2, 0xb4, 0, subsystem_id); // revision id must be at least 0xb4, otherwise usb will require a hub + // revision id must be at least 0xb4 in the xbox, otherwise usb will require a hub + // in the a7n266-c motherboard it has revision 0xc3 + set_ids(0x10de01b2, 0xb4, 0x060100, subsystem_id); } mcpx_isalpc_device::mcpx_isalpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -162,7 +164,7 @@ void mcpx_isalpc_device::device_start() add_map(0x00000100, M_IO, FUNC(mcpx_isalpc_device::lpc_io)); bank_infos[0].adr = 0x8000; status = 0x00b0; - command = 0x0081; + command = 0x0001; command_mask = 0x01be; for (int a = 0; a < 16; a++) lpcdevices[a] = nullptr; @@ -491,6 +493,13 @@ void mcpx_isalpc_device::remap() DEFINE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device, "mcpx_smbus", "MCPX SMBus Controller") +void mcpx_smbus_device::config_map(address_map &map) +{ + pci_device::config_map(map); + map(0x3e, 0x3e).r(FUNC(mcpx_smbus_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(mcpx_smbus_device::maximum_latency_r)); +} + void mcpx_smbus_device::smbus_io0(address_map &map) { map(0x00000000, 0x0000000f).rw(FUNC(mcpx_smbus_device::smbus0_r), FUNC(mcpx_smbus_device::smbus0_w)); @@ -506,11 +515,16 @@ void mcpx_smbus_device::smbus_io2(address_map &map) map(0x00000000, 0x0000001f).noprw(); } +mcpx_smbus_device::mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) + : mcpx_smbus_device(mconfig, tag, owner, clock) +{ + set_ids(0x10de01b4, 0xc1, 0x0c0500, subsystem_id); +} + mcpx_smbus_device::mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_SMBUS, tag, owner, clock), m_interrupt_handler(*this) { - set_ids(0x10de01b4, 0, 0, 0); } void mcpx_smbus_device::device_start() @@ -525,6 +539,9 @@ void mcpx_smbus_device::device_start() add_map(0x00000020, M_IO, FUNC(mcpx_smbus_device::smbus_io2)); bank_infos[2].adr = 0xc200; status = 0x00b0; + command = 0x0001; + // Min Grant 3 + // Max Latency 1 intr_pin = 1; memset(&smbusst, 0, sizeof(smbusst)); for (int b = 0; b < 2; b++) @@ -654,11 +671,24 @@ void mcpx_smbus_device::smbus1_w(offs_t offset, uint32_t data, uint32_t mem_mask DEFINE_DEVICE_TYPE(MCPX_OHCI, mcpx_ohci_device, "mcpx_ohci", "MCPX OHCI USB Controller") +void mcpx_ohci_device::config_map(address_map &map) +{ + pci_device::config_map(map); + map(0x3e, 0x3e).r(FUNC(mcpx_ohci_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(mcpx_ohci_device::maximum_latency_r)); +} + void mcpx_ohci_device::ohci_mmio(address_map &map) { map(0x00000000, 0x00000fff).rw(FUNC(mcpx_ohci_device::ohci_r), FUNC(mcpx_ohci_device::ohci_w)); } +mcpx_ohci_device::mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) + : mcpx_ohci_device(mconfig, tag, owner, clock) +{ + set_ids(0x10de01c2, 0xc3, 0x0c0310, subsystem_id); +} + mcpx_ohci_device::mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_OHCI, tag, owner, clock), ohci_usb(nullptr), @@ -667,7 +697,6 @@ mcpx_ohci_device::mcpx_ohci_device(const machine_config &mconfig, const char *ta maincpu(*this, ":maincpu"), connecteds_count(0) { - set_ids(0x10de01c2, 0, 0, 0); } void mcpx_ohci_device::plug_usb_device(int port, device_usb_ohci_function_interface *function) @@ -683,6 +712,7 @@ void mcpx_ohci_device::device_start() add_map(0x00001000, M_MEM, FUNC(mcpx_ohci_device::ohci_mmio)); bank_infos[0].adr = 0xfed00000; status = 0x00b0; + command = 0x0002; intr_pin = 1; ohci_usb = new ohci_usb_controller(); ohci_usb->set_cpu(maincpu.target()); @@ -810,6 +840,13 @@ void mcpx_eth_device::eth_io_w(uint32_t data) DEFINE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device, "mcpx_apu", "MCP APU") +void mcpx_apu_device::config_map(address_map &map) +{ + pci_device::config_map(map); + map(0x3e, 0x3e).r(FUNC(mcpx_apu_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(mcpx_apu_device::maximum_latency_r)); +} + void mcpx_apu_device::apu_mmio(address_map &map) { map(0x00000000, 0x00007ffff).rw(FUNC(mcpx_apu_device::apu_r), FUNC(mcpx_apu_device::apu_w)); @@ -827,6 +864,7 @@ void mcpx_apu_device::device_start() add_map(0x00080000, M_MEM, FUNC(mcpx_apu_device::apu_mmio)); bank_infos[0].adr = 0xfe800000; status = 0x00b0; + command = 0x0002; intr_pin = 1; memset(apust.memory, 0, sizeof(apust.memory)); memset(apust.voices_heap_blockaddr, 0, sizeof(apust.voices_heap_blockaddr)); @@ -999,6 +1037,13 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) DEFINE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device, "mcpx_ac97_audio", "MCPX AC'97 Audio Codec Interface") +void mcpx_ac97_audio_device::config_map(address_map &map) +{ + pci_device::config_map(map); + map(0x3e, 0x3e).r(FUNC(mcpx_ac97_audio_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(mcpx_ac97_audio_device::maximum_latency_r)); +} + void mcpx_ac97_audio_device::ac97_mmio(address_map &map) { map(0x00000000, 0x000000fff).rw(FUNC(mcpx_ac97_audio_device::ac97_audio_r), FUNC(mcpx_ac97_audio_device::ac97_audio_w)); @@ -1014,10 +1059,15 @@ void mcpx_ac97_audio_device::ac97_io1(address_map &map) map(0x00000000, 0x00000007f).rw(FUNC(mcpx_ac97_audio_device::ac97_audio_io1_r), FUNC(mcpx_ac97_audio_device::ac97_audio_io1_w)); } +mcpx_ac97_audio_device::mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) + : mcpx_ac97_audio_device(mconfig, tag, owner, clock) +{ + set_ids(0x10de01b1, 0xc2, 0x040100, subsystem_id); +} + mcpx_ac97_audio_device::mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_AC97_AUDIO, tag, owner, clock) { - set_ids(0x10de01b1, 0, 0, 0); } void mcpx_ac97_audio_device::device_start() @@ -1031,6 +1081,7 @@ void mcpx_ac97_audio_device::device_start() add_map(0x00001000, M_MEM, FUNC(mcpx_ac97_audio_device::ac97_mmio)); bank_infos[2].adr = 0xfec00000; status = 0x00b0; + command = 0x0003; intr_pin = 1; memset(&ac97st, 0, sizeof(ac97st)); } @@ -1127,6 +1178,8 @@ void mcpx_ide_device::config_map(address_map &map) { pci_device::config_map(map); map(0x08, 0x0b).rw(FUNC(pci_device::class_rev_r), FUNC(mcpx_ide_device::class_rev_w)); + map(0x3e, 0x3e).r(FUNC(mcpx_ide_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(mcpx_ide_device::maximum_latency_r)); } void mcpx_ide_device::ide_pri_command(address_map &map) @@ -1157,6 +1210,12 @@ void mcpx_ide_device::ide_io(address_map &map) map(0x0008, 0x000f).rw("ide2", FUNC(bus_master_ide_controller_device::bmdma_r), FUNC(bus_master_ide_controller_device::bmdma_w)); } +mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) + : mcpx_ide_device(mconfig, tag, owner, clock) +{ + set_ids(0x10de01bc, 0xc3, 0x01018a, subsystem_id); +} + mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_IDE, tag, owner, clock), m_pri(*this, "ide1"), @@ -1164,7 +1223,6 @@ mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, m_pri_interrupt_handler(*this), m_sec_interrupt_handler(*this) { - set_ids(0x10de01bc, 0, 0x01018a, 0); } void mcpx_ide_device::device_start() @@ -1177,6 +1235,7 @@ void mcpx_ide_device::device_start() add_map(0x00000010, M_IO, FUNC(mcpx_ide_device::ide_io)); bank_infos[4].adr = 0xff60; status = 0x00b0; + command = 0x0001; m_pri_interrupt_handler.resolve_safe(); m_sec_interrupt_handler.resolve_safe(); } |