diff options
author | 2020-10-12 22:29:46 -0400 | |
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committer | 2020-10-12 22:29:46 -0400 | |
commit | 257199cbe136f02680cc1887b6db43f31eb8b1d1 (patch) | |
tree | 28285efc67f2963ad74bcb67b96a3eac0750ab08 | |
parent | 853fdf754203698a38082fd7aa334191bb45971f (diff) |
a2hsscsi: some additional reverse-engineering. firmware now issues 3 SCSI commands before giving up. [R. Belmont]
-rw-r--r-- | src/devices/bus/a2bus/a2hsscsi.cpp | 95 | ||||
-rw-r--r-- | src/devices/bus/a2bus/a2hsscsi.h | 5 |
2 files changed, 68 insertions, 32 deletions
diff --git a/src/devices/bus/a2bus/a2hsscsi.cpp b/src/devices/bus/a2bus/a2hsscsi.cpp index 98c612dae78..20342e6fd14 100644 --- a/src/devices/bus/a2bus/a2hsscsi.cpp +++ b/src/devices/bus/a2bus/a2hsscsi.cpp @@ -2,7 +2,7 @@ // copyright-holders:R. Belmont /********************************************************************* - a2hsscsi.c + a2hsscsi.cpp Implementation of the Apple II High Speed SCSI Card @@ -101,7 +101,8 @@ a2bus_hsscsi_device::a2bus_hsscsi_device(const machine_config &mconfig, device_t device_t(mconfig, type, tag, owner, clock), device_a2bus_card_interface(mconfig, *this), m_ncr5380(*this, SCSI_5380_TAG), - m_scsibus(*this, SCSI_BUS_TAG), m_rom(nullptr), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_816block(false), m_c0ne(0), m_c0nf(0) + m_scsibus(*this, SCSI_BUS_TAG), m_rom(*this, SCSI_ROM_REGION), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_c0ne(0), m_c0nf(0), + m_dma_addr(0), m_dma_size(0) { } @@ -116,8 +117,6 @@ a2bus_hsscsi_device::a2bus_hsscsi_device(const machine_config &mconfig, const ch void a2bus_hsscsi_device::device_start() { - m_rom = machine().root_device().memregion(this->subtag(SCSI_ROM_REGION).c_str())->base(); - memset(m_ram, 0, 8192); save_item(NAME(m_ram)); @@ -125,15 +124,16 @@ void a2bus_hsscsi_device::device_start() save_item(NAME(m_rombank)); save_item(NAME(m_bank)); save_item(NAME(m_drq)); - save_item(NAME(m_816block)); + save_item(NAME(m_dma_addr)); + save_item(NAME(m_dma_size)); } void a2bus_hsscsi_device::device_reset() { m_rambank = 0; m_rombank = 0; + m_dma_addr = m_dma_size = 0; m_c0ne = m_c0nf = 0; - m_816block = false; } @@ -151,13 +151,35 @@ uint8_t a2bus_hsscsi_device::read_c0nx(uint8_t offset) case 3: case 4: case 5: - case 6: case 7: // logerror("Read 5380 @ %x\n", offset); return m_ncr5380->read(offset); - case 0xc: - return 0x00; // indicate watchdog? + case 6: + if (m_dma_control & 1) // pseudo-DMA? + { + return m_ncr5380->dma_r(); + } + else + { + //printf("Read 5380 PIO data (%s)\n", machine().describe_context().c_str()); + return m_ncr5380->read(offset); + } + + case 8: // DMA address low + return m_dma_addr & 0xff; + + case 9: // DMA address high + return (m_dma_addr >> 8) & 0xff; + + case 0xa: // DMA size low + return m_dma_size & 0xff; + + case 0xb: // DMA size high + return (m_dma_size >> 8) & 0xff; + + case 0xc: // DMA control + return m_dma_control; case 0xe: // code at cf32 wants to RMW this without killing the ROM bank return m_c0ne; @@ -166,7 +188,7 @@ uint8_t a2bus_hsscsi_device::read_c0nx(uint8_t offset) return m_c0nf; default: - logerror("Read c0n%x (%s)\n", offset, machine().describe_context()); + logerror("Read c0n%x (%s)\n", offset, machine().describe_context().c_str()); break; } @@ -182,7 +204,17 @@ void a2bus_hsscsi_device::write_c0nx(uint8_t offset, uint8_t data) { switch (offset) { - case 0: + case 0: // data out register; in PDMA mode, it's assumed this goes to DMA as reads do + if (m_dma_control & 1) + { + m_ncr5380->dma_w(data); + } + else + { + m_ncr5380->write(offset, data); + } + break; + case 1: case 2: case 3: @@ -193,25 +225,39 @@ void a2bus_hsscsi_device::write_c0nx(uint8_t offset, uint8_t data) // logerror("%02x to 5380 reg %x\n", data, offset); m_ncr5380->write(offset, data); break; -#if 0 + case 8: // DMA address low + //printf("%02x to DMA adr low\n", data); + m_dma_addr &= 0xff00; + m_dma_addr |= data; break; case 9: // DMA address high + //printf("%02x to DMA adr high\n", data); + m_dma_addr &= 0x00ff; + m_dma_addr |= (data << 8); break; case 0xa: // DMA count low + //printf("%02x to DMA count low\n", data); + m_dma_size &= 0xff00; + m_dma_size |= data; break; case 0xb: // DMA count high + //printf("%02x to DMA count high\n", data); + m_dma_size &= 0x00ff; + m_dma_size |= (data << 8); break; case 0xc: // DMA control + //printf("%02x to DMA control\n", data); + m_dma_control &= ~0x2b; // clear the read/write bits + m_dma_control |= (data & 0x2b); break; -#endif case 0xd: // DMA enable / reset - logerror("%02x to DMA enable/reset\n", data); + //printf("%02x to DMA enable/reset\n", data); if (data & 0x2) { // logerror("Resetting SCSI: %02x at %s\n", data, machine().describe_context()); @@ -222,17 +268,17 @@ void a2bus_hsscsi_device::write_c0nx(uint8_t offset, uint8_t data) case 0xe: m_c0ne = data; m_rombank = (data & 0x1f) * 0x400; - logerror("c0ne to %x (ROM bank %x)\n", data & 0x1f, m_rombank); + //logerror("c0ne to %x (ROM bank %x)\n", data & 0x1f, m_rombank); break; case 0xf: m_c0nf = data; m_rambank = (data & 0x7) * 0x400; - logerror("c0nf to %x (RAM bank %x)\n", data & 0x7, m_rambank); + //logerror("c0nf to %x (RAM bank %x)\n", data & 0x7, m_rambank); break; default: - logerror("Write %02x to c0n%x (%s)\n", data, offset, machine().describe_context()); + logerror("Write %02x to c0n%x (%s)\n", data, offset, machine().describe_context().c_str()); break; } } @@ -263,11 +309,6 @@ uint8_t a2bus_hsscsi_device::read_c800(uint16_t offset) if (offset < 0x400) { // logerror("Read RAM at %x = %02x\n", offset+m_rambank, m_ram[offset + m_rambank]); - if (m_816block) - { - return m_ncr5380->dma_r(); - } - return m_ram[offset + m_rambank]; } else @@ -284,18 +325,12 @@ void a2bus_hsscsi_device::write_c800(uint16_t offset, uint8_t data) if (offset < 0x400) { // logerror("%02x to RAM at %x\n", data, offset+m_rambank); - if (m_816block) - { - m_ncr5380->dma_w(data); - } - else - { - m_ram[offset + m_rambank] = data; - } + m_ram[offset + m_rambank] = data; } } WRITE_LINE_MEMBER( a2bus_hsscsi_device::drq_w ) { m_drq = (state ? 0x80 : 0x00); +// printf("DRQ to %d\n", state); } diff --git a/src/devices/bus/a2bus/a2hsscsi.h b/src/devices/bus/a2bus/a2hsscsi.h index 905de8b620d..36a5a9df15b 100644 --- a/src/devices/bus/a2bus/a2hsscsi.h +++ b/src/devices/bus/a2bus/a2hsscsi.h @@ -50,15 +50,16 @@ protected: required_device<ncr53c80_device> m_ncr5380; required_device<nscsi_bus_device> m_scsibus; + required_region_ptr<u8> m_rom; private: - uint8_t *m_rom; uint8_t m_ram[8192]; // 8 banks of 1024 bytes int m_rambank, m_rombank; uint8_t m_drq; uint8_t m_bank; - bool m_816block; + uint8_t m_dma_control; uint8_t m_c0ne, m_c0nf; + uint16_t m_dma_addr, m_dma_size; }; // device type definition |