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author Westley M. Martinez <anikom15@gmail.com>2016-12-29 14:34:59 -0800
committer Westley M. Martinez <anikom15@gmail.com>2016-12-29 14:34:59 -0800
commit1fafe7706cbfcfc6e39c23c3c713fbb102557cbe (patch)
treee717407aa8f98f192a2095f28909c89f3af3a8e5
parentf7a98c4a969478fca51faf30f588d59631394bd9 (diff)
parent2b74e4c0be91b86b408fca518af7518c1ea994c9 (diff)
Merge https://github.com/mamedev/mame
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-rw-r--r--src/frontend/mame/luaengine.cpp2
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-rw-r--r--src/mame/audio/csd.cpp180
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-rw-r--r--src/mame/machine/nl_hazelvid.h4
-rw-r--r--src/mame/machine/nl_stuntcyc.cpp659
-rw-r--r--src/mame/machine/nl_stuntcyc.h4
-rw-r--r--src/mame/machine/pc9801_86.cpp4
-rw-r--r--src/mame/machine/slapfght.cpp141
-rw-r--r--src/mame/machine/theglobp.cpp258
-rw-r--r--src/mame/machine/toaplan1.cpp139
-rw-r--r--src/mame/machine/xbox.cpp6
-rw-r--r--src/mame/mame.lst53
-rw-r--r--src/mame/nl.lst4
-rw-r--r--src/mame/video/combatsc.cpp14
-rw-r--r--src/mame/video/deco16ic.cpp39
-rw-r--r--src/mame/video/deco16ic.h4
-rw-r--r--src/mame/video/fromance.cpp12
-rw-r--r--src/mame/video/k053246_k053247_k055673.cpp8
-rw-r--r--src/mame/video/k054156_k054157_k056832.cpp32
-rw-r--r--src/mame/video/konamigx.cpp15
-rw-r--r--src/mame/video/leland.cpp4
-rw-r--r--src/mame/video/midzeus.cpp2
-rw-r--r--src/mame/video/namcos21.cpp221
-rw-r--r--src/mame/video/xbox_nv2a.cpp248
-rw-r--r--src/osd/modules/debugger/win/debugwin.h1
-rw-r--r--src/osd/modules/diagnostics/diagnostics_win32.cpp3
-rw-r--r--src/osd/modules/file/windir.cpp1
-rw-r--r--src/osd/modules/file/winfile.cpp1
-rw-r--r--src/osd/modules/file/winptty.cpp1
-rw-r--r--src/osd/modules/file/winrtdir.cpp1
-rw-r--r--src/osd/modules/file/winrtfile.cpp1
-rw-r--r--src/osd/modules/file/winrtptty.cpp1
-rw-r--r--src/osd/modules/file/winrtsocket.cpp1
-rw-r--r--src/osd/modules/file/winsocket.cpp1
-rw-r--r--src/osd/modules/font/font_dwrite.cpp3
-rw-r--r--src/osd/modules/font/font_windows.cpp1
-rw-r--r--src/osd/modules/input/input_common.h2
-rw-r--r--src/osd/modules/input/input_dinput.cpp3
-rw-r--r--src/osd/modules/input/input_rawinput.cpp3
-rw-r--r--src/osd/modules/input/input_uwp.cpp2
-rw-r--r--src/osd/modules/input/input_win32.cpp3
-rw-r--r--src/osd/modules/input/input_windows.h1
-rw-r--r--src/osd/modules/input/input_winhybrid.cpp5
-rw-r--r--src/osd/modules/input/input_xinput.cpp3
-rw-r--r--src/osd/modules/lib/osdlib_uwp.cpp1
-rw-r--r--src/osd/modules/lib/osdlib_win32.cpp1
-rw-r--r--src/osd/modules/monitor/monitor_dxgi.cpp3
-rw-r--r--src/osd/modules/monitor/monitor_win32.cpp3
-rw-r--r--src/osd/modules/netdev/pcap.cpp1
-rw-r--r--src/osd/modules/osdwindow.h3
-rw-r--r--src/osd/modules/output/win32_output.cpp1
-rw-r--r--src/osd/modules/render/bgfx/chainmanager.cpp2
-rw-r--r--src/osd/modules/render/bgfx/shaders/makefile2
-rw-r--r--src/osd/modules/render/drawbgfx.cpp1
-rw-r--r--src/osd/modules/render/drawd3d.h1
-rw-r--r--src/osd/modules/render/drawgdi.h1
-rw-r--r--src/osd/modules/render/drawnone.cpp1
-rw-r--r--src/osd/modules/sound/direct_sound.cpp3
-rw-r--r--src/osd/modules/sound/xaudio2_sound.cpp3
-rw-r--r--src/osd/osdsync.cpp3
-rw-r--r--src/osd/sdl/sdlmain.cpp1
-rw-r--r--src/osd/sdl/window.cpp1
-rw-r--r--src/osd/strconv.cpp3
-rw-r--r--src/osd/strconv.h4
-rw-r--r--src/osd/uwp/uwpcompat.cpp4
-rw-r--r--src/osd/uwp/uwpcompat.h48
-rw-r--r--src/osd/uwp/video.cpp4
-rw-r--r--src/osd/uwp/window.cpp3
-rw-r--r--src/osd/uwp/window.h3
-rw-r--r--src/osd/windows/ledutil.cpp1
-rw-r--r--src/osd/windows/main.cpp1
-rw-r--r--src/osd/windows/video.cpp1
-rw-r--r--src/osd/windows/window.h1
-rw-r--r--src/osd/windows/winmain.cpp1
-rw-r--r--src/osd/windows/winmenu.cpp1
-rw-r--r--src/osd/windows/winutf8.cpp1
-rw-r--r--src/osd/windows/winutil.cpp1
415 files changed, 17584 insertions, 7989 deletions
diff --git a/android-project/app/src/main/AndroidManifest.xml b/android-project/app/src/main/AndroidManifest.xml
index e2aa57f29fb..e438149550c 100644
--- a/android-project/app/src/main/AndroidManifest.xml
+++ b/android-project/app/src/main/AndroidManifest.xml
@@ -4,8 +4,8 @@
-->
<manifest xmlns:android="http://schemas.android.com/apk/res/android"
package="org.mamedev.mame"
- android:versionCode="180"
- android:versionName="0.180"
+ android:versionCode="181"
+ android:versionName="0.181"
android:installLocation="auto">
<!-- Android 5.0 -->
diff --git a/hash/apple1.xml b/hash/apple1.xml
index 8991c79d6a6..ce222b982e1 100644
--- a/hash/apple1.xml
+++ b/hash/apple1.xml
@@ -94,10 +94,10 @@
<year>1976</year>
<publisher>apple computer inc</publisher>
<!-- P/N A1T008X-->
- <info name="usage" value="Load at 800.09FFR, enter at 0800R" />
+ <info name="usage" value="Load at 800.09FFR, enter at 09F0R" />
<part name="cass" interface="apple1_cass">
- <dataarea name="cass" size="1393604">
- <rom name="dis-assembler.wav" size="1393604" crc="a49c7474" sha1="1722bada9de231b90233c8aafe474e9c738366e8" offset="0" />
+ <dataarea name="cass" size="1905164">
+ <rom name="dis-assembler.wav" size="1905164" crc="3fb58ea4" sha1="194829241eec0e418469e1fc8e92d5a2721dcb6d" offset="0" />
</dataarea>
</part>
</software>
diff --git a/hash/apricot_flop.xml b/hash/apricot_flop.xml
new file mode 100644
index 00000000000..41ecc4c81df
--- /dev/null
+++ b/hash/apricot_flop.xml
@@ -0,0 +1,98 @@
+<?xml version="1.0"?>
+<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
+
+<softwarelist name="apricot_flop" description="ACT Apricot PC/Xi floppy disks">
+
+ <!-- MS-DOS 2.00 BIOS VR1.4 -->
+ <software name="demopics">
+ <description>Demonstration Pictures</description>
+ <year>1984</year>
+ <publisher>ACT</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="307631">
+ <rom name="demopics.dsk" size="307631" crc="7db75019" sha1="2b8f002588304c5ef23c13c9be9c167a7ceed0c9" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- 20 Feb 85 -->
+ <software name="dos211_27">
+ <description>MS-DOS 2.11 BIOS VR2.7</description>
+ <year>1985</year>
+ <publisher>ACT</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 1 (Manager &amp; Tools)" />
+ <dataarea name="flop" size="322937">
+ <rom name="1pcxu04p.dsk" size="322937" crc="cfe455a9" sha1="4f8ccfbe1161404a47d309bd139d321fb0013a1a" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 2 (Disk &amp; Editors)" />
+ <dataarea name="flop" size="321919">
+ <rom name="2pcxu04p.dsk" size="321919" crc="22a234ca" sha1="85a3a8d19f2d5357ac71ce8bbacf9512e93bed62" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 3 (SuperWriter)" />
+ <dataarea name="flop" size="277127">
+ <rom name="3pcxu04p.dsk" size="277127" crc="75f9f57d" sha1="40f083ab4a68d213635cc5c2ebb6cb8b202c6514" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 4 (Async &amp; MS-Basic)" />
+ <dataarea name="flop" size="279672">
+ <rom name="4pcxu04p.dsk" size="279672" crc="e1c34b89" sha1="84765d86784742ff1efc8f8fe4101d08703ea291" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 5 (SuperCalc &amp; SuperPlanner)" />
+ <dataarea name="flop" size="223173">
+ <rom name="5pcxu04p.dsk" size="223173" crc="ffc21ff2" sha1="0e332002f5be5e38b83f36789baac03b24289121" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- 17 Oct 85 -->
+ <software name="dos211_31">
+ <description>MS-DOS 2.11 BIOS VR3.1</description>
+ <year>1985</year>
+ <publisher>ACT</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 1 (Activity &amp; Tutor)" />
+ <dataarea name="flop" size="326512">
+ <rom name="1pcxeu03p.dsk" size="326512" crc="a54c009f" sha1="85c6426042c5ac37a60e05eddcf499e71d051db6" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 2 (Activity &amp; Editors)" />
+ <dataarea name="flop" size="326513">
+ <rom name="2pcxeu03p.dsk" size="326513" crc="339a564a" sha1="e86466629af63f102568e80ddc924ba291e0ca5d" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 3 (Async &amp; Diary)" />
+ <dataarea name="flop" size="295460">
+ <rom name="3pcxeu03p.dsk" size="295460" crc="623b99e9" sha1="8c443772dcbbebb322abc5574605bdedac755266" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_3_5">
+ <feature name="part_id" value="Disk 4 (GW-Basic &amp; Sketch)" />
+ <dataarea name="flop" size="267468">
+ <rom name="4pcxeu03p.dsk" size="267468" crc="010b8617" sha1="b17692f58ed9060e5af25268e84d39695b3bbd1e" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- MS-DOS 2.11 BIOS VR2.4 -->
+ <software name="quest">
+ <description>QUEST - The Adventure</description>
+ <year>1984</year>
+ <publisher>Quest Automation Ltd</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="324909">
+ <rom name="quest.dsk" size="324909" crc="df11c592" sha1="989dc29d1dead78452b5b0afb9591356484c643d" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+</softwarelist>
diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml
index 0b4f6e1edff..b63298b93b8 100644
--- a/hash/ibm5150.xml
+++ b/hash/ibm5150.xml
@@ -64,29 +64,6 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
-->
<softwarelist name="ibm5150" description="IBM PC disk images">
- <!-- Operating Systems -->
- <software name="pcdos10">
- <description>PC DOS 1.0</description>
- <year>1981</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="163840">
- <rom name="pcdos100.img" size="163840" crc="2df1c1c8" sha1="7d3e3a807ad2144315b3c3b90751ff691d3895db" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos110">
- <description>PC DOS 1.10</description>
- <year>1982</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="163840">
- <rom name="ibmdos11.img" size="163840" crc="ddfe9550" sha1="437bec5be7d28cc2248d5477f38a07545816e49a" offset="0" />
- </dataarea>
- </part>
- </software>
-
<!-- Booter Games -->
<software name="3ktrivia">
<description>3-K Trivia</description>
@@ -2626,6 +2603,17 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
+ <software name="jingdisk">
+ <description>Jingle Disk</description>
+ <year>1986</year>
+ <publisher>ThoughtWare</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size = "184320">
+ <rom name="Disk01.img" size="184320" crc="55dd837c" sha1="fab48e2f3153d8529406e1c0e0428dd32e069618" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="visicalc">
<description>VisiCalc</description>
<year>1982</year>
@@ -3006,6 +2994,90 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
+ <software name="msword5">
+ <description>Word 5.0</description>
+ <year>1989</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <feature name="part_id" value="Program 1" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk01 - Program 1.img" size="368640" crc="5634fb79" sha1="4c6c734710940c08a6464bb82afb067a9d632ae7" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <feature name="part_id" value="Program 2" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk02 - Program 2.img" size="368640" crc="721e91c5" sha1="c940aa0c841f5569ca9947ced77bd3149eea2533" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <feature name="part_id" value="Utilities-Printer" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk03 - Utilities-Printer.img" size="368640" crc="869653fe" sha1="6a6470ca0e55c2983e9ef7f5fd815f00a2fd7ca7" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <feature name="part_id" value="Utilities 1" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk04 - Utilities 1.img" size="368640" crc="64b00c49" sha1="d95a01cbd4c699a832d4e444ce5fd79c32ea680c" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <feature name="part_id" value="Utilities 2" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk05 - Utilities 2.img" size="368640" crc="187d951f" sha1="dfc03a031cd177d1d9cdb74f0431367f85eabfd2" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_5_25">
+ <feature name="part_id" value="Utilities 3" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk06 - Utilities 3.img" size="368640" crc="3f1fae7b" sha1="6a07b95892008edcef67f879c8defd0f8979b8c1" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop7" interface="floppy_5_25">
+ <feature name="part_id" value="Spell" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk07 - Spell.img" size="368640" crc="53d0d240" sha1="e9a0d259e8326f8d17700c9e9067d8e9e6f16b09" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop8" interface="floppy_5_25">
+ <feature name="part_id" value="Thesaurus" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk08 - Thesaurus.img" size="368640" crc="44c0450b" sha1="1981e687df571c8fa9ddbd9951325fa54c0cecf7" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop9" interface="floppy_5_25">
+ <feature name="part_id" value="Printers 1" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk09 - Printers 1.img" size="368640" crc="1a035e60" sha1="0613f2ebaf5cfa77400ddd90e8cc1b0c3aa0c6a8" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop10" interface="floppy_5_25">
+ <feature name="part_id" value="Printers 2" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk10 - Printers 2.img" size="368640" crc="65b305c4" sha1="261df5f3d5ec7c471e8c4a88d2d6c9574811d4cc" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop11" interface="floppy_5_25">
+ <feature name="part_id" value="Learning Word 1" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk11 - Learning Word 1.img" size="368640" crc="8dcda759" sha1="5e65899af8c481481b46b8505c2a0b96464ca9fb" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop12" interface="floppy_5_25">
+ <feature name="part_id" value="Learning Word 2" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk12 - Learning Word 2.img" size="368640" crc="1df31b12" sha1="a1a3bb8bfeff3d0fde2724c6610c88f27f7056f9" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop13" interface="floppy_5_25">
+ <feature name="part_id" value="Learning Word 3" />
+ <dataarea name="flop" size = "368640">
+ <rom name="disk13 - Learning Word 3.img" size="368640" crc="6a4c88ed" sha1="84a03417c60d56c665abbd96847f23eef1933b44" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<!-- SDK -->
<software name="win13sdk">
@@ -3050,7 +3122,7 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
- <!-- OS -->
+ <!-- Operating Systems -->
<software name="cpm8610">
<description>CP/M-86 for the IBM Personal Computer (Version 1.0)</description>
@@ -3093,35 +3165,387 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
- <software name="ibmdos10">
+ <software name="msdos211">
+ <description>AT&amp;T Personal Computer 6300 DOS Release 2.0 (MS-DOS 2.11)</description>
+ <year>1984</year>
+ <publisher>AT&amp;T</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk01.img" size="368640" crc="71cb84ef" sha1="278d3f796e84b851b5b1abd09b610c6a663aef1a" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk02.img" size="368640" crc="08cd78c2" sha1="5d7364d31350854e45b5346c3670c9c19e8cb7ee" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos32" supported="no">
+ <description>MS-DOS (Version 3.2)</description>
+ <year>1985</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk1.img" size="368640" crc="136579c0" sha1="dc50472d5355b7c29fab0361c262ef83dde6a2ea" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk2.img" size="368640" crc="c5e7e32f" sha1="c03f03494271bbdfb8865efa79bf8f5b5061b233" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk3.img" size="368640" crc="9a7366fe" sha1="e56a8fb2732a258bd50465c596ff5e16b53afae3" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- Fatal error: Device 5.25" double density floppy drive load failed: Unable to identify the image format -->
+ <software name="msdos33" supported="no">
+ <description>MS-DOS (Version 3.30)</description>
+ <year>1987</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="disk1.img" size="369152" crc="812d0573" sha1="1fe01c291fbacc5d97c86ea8aef21289669bab9c" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="disk2.img" size="369152" crc="489b485b" sha1="cc97e6f33df9df2b7a459dbcf0bba86778667534" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos33a">
+ <description>MS-DOS (Version 3.30A)</description>
+ <year>1987</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="3.30A" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk1.img" size="368640" crc="b34d23a3" sha1="25488e58b6a462e7681940b589bd33c3ddcf2ae7" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk2.img" size="368640" crc="376ac8a2" sha1="ab165a11bc79d4cb6819e7901fea3cbcfa2de1a8" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos33k" cloneof="msdos33">
+ <description>MS-DOS (Version 3.30) (Knowledge Dynamics Corp)</description>
+ <year>1993</year>
+ <publisher>Knowledge Dynamics Corp</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <feature name="disk_serial" value="02042 036214.330A" />
+ <feature name="disk_label" value="Programs" />
+ <dataarea name="flop" size="368640">
+ <rom name="disk 1.img" size="368640" crc="db07d99a" sha1="121ad3c636a69dae3a8eee96ef2ebf1152e9d00f" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <feature name="disk_serial" value="02043 036214.330A" />
+ <feature name="disk_label" value="Additional Programs and Microsoft GW-Basic Interpreter" />
+ <dataarea name="flop" size="368640">
+ <rom name="disk 2.img" size="368640" crc="bef8e643" sha1="97df57499e009101d04bd696d23024b4d220e297" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- not original, from jsmachines -->
+ <software name="msdos4">
+ <description>MS-DOS (Version 4.00)</description>
+ <year>1985</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="4.00" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="msdos400m-disk1.img" size="368640" crc="67848d5c" sha1="9e44fc3ed1f689c4136a08d48f9efa156cbaf250" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="msdos400m-disk2-unpatched.img" size="368640" crc="85a8cb6c" sha1="88d8ec84a6e24f2c918508dc65de0cdee182a48e" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos401">
+ <description>MS-DOS (Version 4.01)</description>
+ <year>1988</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="4.01" />
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="setup.img" size="737280" crc="ff363533" sha1="6cbf2bcf051d168d542c289aeb630f98fc2a56a7" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="operating.img" size="737280" crc="f0e2b019" sha1="e4f0dc4df9df1581a2acb109b5159ca142005707" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="dos shell.img" size="737280" crc="7be56e89" sha1="2f45b4a5140c04d572a8be6e3ef4011edb741b5b" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- Fatal error: Device 5.25" double density floppy drive load failed: Unable to identify the image format -->
+ <software name="msdos401m" cloneof="msdos401" supported="no">
+ <description>MS-DOS (Version 4.01, 5.25")</description>
+ <year>1988</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="install.img" size="369152" crc="ceeb1691" sha1="9d69d99a7c7a9b903e3f8c1e3f02b68270feff9c" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="operating 1.img" size="369152" crc="1b37564d" sha1="bce6027533ff4252229fe017f676de0cff653b3a" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="operating 2.img" size="369152" crc="d33a9768" sha1="0dba1f9ce818dae3ced74e04dab9a07976a3d720" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="operating 3.img" size="369152" crc="6776d4f9" sha1="6d2a569c2d1cd3237bc1964c14b10396dd9c461e" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="select.img" size="369152" crc="7979de98" sha1="23fc5ce0ac5dee1a89fbe8ba6f96e5f1a5f7800b" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_5_25">
+ <dataarea name="flop" size="369152">
+ <rom name="shell.img" size="369152" crc="c40b54a2" sha1="181b6668eb5f3f11f817ccc5d576389911254261" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5">
+ <description>MS-DOS (Version 5.00, 5.25")</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk01.img" size="368640" crc="54f94294" sha1="6a66bdcdc141eaa8dbcbea8d344b7012add15672" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk02.img" size="368640" crc="224bde66" sha1="7fcc9e283d5245c4eb3e2d0a5e4f7abd2cb2cc7b" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk03.img" size="368640" crc="ad5aff11" sha1="447d6e95ae2e19bc783c5ca3934cbe796e6023de" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk04.img" size="368640" crc="6853a453" sha1="fcf640843977bfd5c40fd059a3d2203aab337977" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk05.img" size="368640" crc="6592c217" sha1="35ed264ef14719a7bc6373d2e7d0688170d53442" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5a" cloneof="msdos5">
+ <description>MS-DOS (Version 5.00, 5.25", RTM)</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <info name="OEM" value="Mecer" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 1.img" size="368640" crc="de9e3bf6" sha1="b78aaced6bf262a5aa7af6d328caaf8370539c7c" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 2.img" size="368640" crc="b56623db" sha1="0424273d8b63a1d89a880c6737278bcf6003e5d5" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 3.img" size="368640" crc="273b0fb7" sha1="79595c7831ffa5599f3682e7a9bf43c7b7620387" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 4.img" size="368640" crc="69e4c763" sha1="af69f1c0e897a5f19c52941bc6e4fdbe4d17db6e" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 5.img" size="368640" crc="3de11d76" sha1="b808a9b294b660454ddd84c014525052e6f9223e" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5_35" cloneof="msdos5">
+ <description>MS-DOS (Version 5.00, 3.5")</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="5.00" />
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk01_35.img" size="737280" crc="a34dc98f" sha1="791e291a16a7ce3b3ffb536b1c27dfe8e620338e" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk02_35.img" size="737280" crc="332cb5b4" sha1="0e1f4f63d68d02b5224a69e73ee9b7a3e630a1bb" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk03_35.img" size="737280" crc="758c9037" sha1="53ba701accbf58db3b43188f4b4769a6a8008e05" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5u" cloneof="msdos5">
+ <description>MS-DOS (Version 5.00, 5.25", Upgrade)</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="5.00" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk01u.img" size="368640" crc="0dd44931" sha1="47b077300d22f2a86de31855ee8e1ff215aa592f" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk02u.img" size="368640" crc="b7fcb627" sha1="bd0655ed4999bc792a699f89588e4773ee33335b" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk03u.img" size="368640" crc="614b279e" sha1="c5e02fae37b5ed7a2f761a21973b14c2ce56294c" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk04u.img" size="368640" crc="90fc6384" sha1="73ea8e782238d786d108be9bcb40fcab7e11269a" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk05u.img" size="368640" crc="5b436ce1" sha1="b8b4b3c4b905a90ca13910d0230deeb7fe04273f" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk06u.img" size="368640" crc="fc26ce05" sha1="a4471bc3d43dec17b116f0b673ab10103ca14a25" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5ua" cloneof="msdos5">
+ <description>MS-DOS (Version 5.00, 5.25", Upgrade, RTM)</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <info name="OEM" value="Mecer" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 1 (upgrade).img" size="368640" crc="01a3d9a2" sha1="083400723e475ed497b276c9d4f2799eff3b88b8" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 2 (upgrade).img" size="368640" crc="a8709827" sha1="9dbbbd267eb9b63447ee04641892ff0bea08cd25" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 3 (upgrade).img" size="368640" crc="bb5bb90b" sha1="5fd3b4fe686d7459b7048ec8f1a38860755a887a" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 4 (upgrade).img" size="368640" crc="b411a21d" sha1="7623d0fa4b178415c1b85e8d14e452c5fa0a5bf0" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 5 (upgrade).img" size="368640" crc="26edd0f6" sha1="87b38570250dd12b6b4e4f232d6d3f3ab7960d6c" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk 6 (upgrade).img" size="368640" crc="782c0c4a" sha1="aaff65c8263ed44f7af69892a4b9c926ba0ccf75" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msdos5m" cloneof="msdos5">
+ <description>MS-DOS (Version 5.00, Mecer OEM)</description>
+ <year>1991</year>
+ <publisher>Microsoft</publisher>
+ <info name="OEM" value="Mecer" />
+ <part name="flop1" interface="floppy_3_5">
+ <feature name="disk_serial" value="0044238" />
+ <dataarea name="flop" size="737280">
+ <rom name="operating 1.img" size="737280" crc="c54fe610" sha1="27756a10edbe33f76ff2239062af05dbfdc93979" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <feature name="disk_serial" value="0045925" />
+ <dataarea name="flop" size="737280">
+ <rom name="operating 2.img" size="737280" crc="9aa5c1a4" sha1="15cc58e267601b30a594372aea1ff3dbb73ea335" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <feature name="disk_serial" value="0044171" />
+ <dataarea name="flop" size="737280">
+ <rom name="operating 3.img" size="737280" crc="6248317a" sha1="c7ff3a04eb01cab3efb05b6b52ec8b8a36b9b269" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos1">
<description>IBM Personal Computer DOS (Version 1.00)</description>
<year>1981</year>
<publisher>IBM</publisher>
<info name="version" value="1.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="163840">
- <rom name="ibmdos 1.00.img" size="163840" crc="2df1c1c8" sha1="7d3e3a807ad2144315b3c3b90751ff691d3895db" offset="0" />
+ <rom name="pcdos100.img" size="163840" crc="2df1c1c8" sha1="7d3e3a807ad2144315b3c3b90751ff691d3895db" offset="0" />
</dataarea>
</part>
</software>
- <software name="ibmdos11">
+ <software name="pcdos11">
<description>IBM Personal Computer DOS (Version 1.10)</description>
<year>1982</year>
<publisher>IBM</publisher>
<info name="version" value="1.10" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="163840">
- <rom name="ibmdos 1.10.img" size="163840" crc="ddfe9550" sha1="437bec5be7d28cc2248d5477f38a07545816e49a" offset="0" />
+ <rom name="ibmdos11.img" size="163840" crc="ddfe9550" sha1="437bec5be7d28cc2248d5477f38a07545816e49a" offset="0" />
</dataarea>
</part>
</software>
- <software name="ibmdos2">
- <description>IBM Personal Computer DOS (Version 2.0)</description>
+ <software name="pcdos2">
+ <description>IBM Personal Computer DOS (Version 2.00)</description>
<year>1983</year>
<publisher>IBM</publisher>
- <info name="version" value="2.0" />
+ <info name="version" value="2.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<rom name="ibmdos 2.img" size="368640" crc="d0fb7d31" sha1="cbee7f6109fb0ed8a94de1893fc47ab066de36d3" offset="0" />
@@ -3129,11 +3553,11 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
- <software name="ibmdos2a">
- <description>IBM Personal Computer DOS (Version 2.0, Alt)</description>
+ <software name="pcdos2a" cloneof="pcdos2">
+ <description>IBM Personal Computer DOS (Version 2.00, Alt)</description>
<year>1983</year>
<publisher>IBM</publisher>
- <info name="version" value="2.0" />
+ <info name="version" value="2.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="184320">
<rom name="ibmdos 2 (disk 1).img" size="184320" crc="b8f8ce15" sha1="e4478aeece1aa1627ac595e5fca96fbd8ad562c7" offset="0" />
@@ -3146,11 +3570,11 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
- <software name="ibmdos3">
- <description>IBM Personal Computer DOS (Version 3.0)</description>
+ <software name="pcdos3">
+ <description>IBM Personal Computer DOS (Version 3.00)</description>
<year>1984</year>
<publisher>IBM</publisher>
- <info name="version" value="2.0" />
+ <info name="version" value="3.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop1" size="368640">
<rom name="6322635.img" size="368640" crc="20a3dc1c" sha1="1e7430c57109960fd89d281d24e85a086a8284e4" offset="0" />
@@ -3161,6 +3585,114 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
+ <!-- doesn't boot, bad dump? -->
+ <software name="pcdos3a" cloneof="pcdos3" supported="no">
+ <description>IBM Personal Computer DOS (Version 3.00, Alternate)</description>
+ <year>1984</year>
+ <publisher>IBM</publisher>
+ <info name="version" value="3.00" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk1.img" size="368640" crc="7a24e3bf" sha1="8cfebd5548b918c8d03f501ef02e66aca4ce3231" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk2.img" size="368640" crc="33184477" sha1="a7c150881903359859e46f9fe2de21d5c3afba99" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos31">
+ <description>IBM Personal Computer DOS (Version 3.10)</description>
+ <year>1985</year>
+ <publisher>IBM</publisher>
+ <info name="version" value="3.10" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk1.img" size="368640" crc="4b7ac87b" sha1="6f6ff69c4e2c14e2d64af06f1af9b60655d705a0" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="disk2.img" size="368640" crc="73eda674" sha1="1e6bb4a676137acbf6ff0cf59f94e206056c5821" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- Fatal error: Device 5.25" double density floppy drive load failed: Unable to identify the image format -->
+ <software name="pcdos32" supported="no">
+ <description>IBM Personal Computer DOS (Version 3.20)</description>
+ <year>1986</year>
+ <publisher>IBM</publisher>
+ <info name="version" value="3.20" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="405504">
+ <rom name="disk1.img" size="405504" crc="d4f4bfad" sha1="dab0710c79625a3e104b8945d7d179009376773a" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos33">
+ <description>IBM Personal Computer DOS (Version 3.30)</description>
+ <year>1987</year>
+ <publisher>IBM</publisher>
+ <info name="version" value="3.30" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="startup.img" size="368640" crc="402f4949" sha1="c6dc54ae6cbf810a0f54403c68acc1a10caedc21" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="368640">
+ <rom name="operating.img" size="368640" crc="b0e167b0" sha1="4f582d07b1c4c18c6582ff8e53311a37c109aced" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos5">
+ <description>IBM DOS (Version 5.00)</description>
+ <year>1991</year>
+ <publisher>IBM</publisher>
+ <info name="version" value="5.00" />
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk1.img" size="737280" crc="49ee0681" sha1="30fedf09e8b55eadc35c387968bcd02620630a27" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk2.img" size="737280" crc="9cfecb72" sha1="ffef155e6c746602e9ea28aef091119055f4cdb4" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk3.img" size="737280" crc="8414bc1f" sha1="d6ebe11bba3d995f574e0385358edbdd52a6b219" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos502">
+ <description>IBM DOS (Version 5.02)</description>
+ <year>1992</year>
+ <publisher>IBM</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk1.img" size="737280" crc="c3d4b69e" sha1="8e8fdbf1a39cbf541c5e8e3afa9351d3afef41bd" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk2.img" size="737280" crc="05c5345e" sha1="6d1fc805f9602836a379042d36edad56d692e922" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size="737280">
+ <rom name="disk3.img" size="737280" crc="d63b96f5" sha1="ae0ed2b14cd5477b2239a40a9987b23db8a1e28c" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
<!-- Dos based Games -->
<software name="2400ad" supported="no"> <!-- unemulated protection, game needs cracked exe to play ATM -->
@@ -3175,6 +3707,17 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
+ <software name="688atsub">
+ <description>688 Attack Sub</description>
+ <year>1989</year>
+ <publisher>Electronic Arts</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size = "737280">
+ <rom name="688 Attack Sub [1989] [Electronic Arts] [3.5] [1 of 1].img" size="737280" crc="a6ab2fdd" sha1="b36511db1302202ee1056bbabafe78cfdbfb7c29" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="academy" supported="no">
<description>Academy - Tau Ceti 2</description>
<year>1987</year>
@@ -3366,6 +3909,50 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
+ <software name="caveugh">
+ <description>Caveman Ugh-Lympics</description>
+ <year>1988</year>
+ <publisher>Electronic Arts, Inc.</publisher>
+ <info name="developer" value="Dynamix, Inc." />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Caveman Ugh-Lympics [1988] [5.25] [1 of 4].img" size="368640" crc="e2b6a566" sha1="92be8b5883718a2df46eee48f30b8db1088ab39c" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Caveman Ugh-Lympics [1988] [5.25] [2 of 4].img" size="368640" crc="d83db289" sha1="fb7e5838b8fbbc504e79093c57b4fb9533dc0baf" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Caveman Ugh-Lympics [1988] [5.25] [3 of 4].img" size="368640" crc="e5164e7f" sha1="b42ddf8089fa2a2eb1f0a2a7103a54a7c528a790" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Caveman Ugh-Lympics [1988] [5.25] [4 of 4].img" size="368640" crc="0091cb19" sha1="aeaf3725bbdf49a4ace38c7430183492a5da4384" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="dmnstomb">
+ <description>Demon's Tomb - The Awakening</description>
+ <year>1989</year>
+ <publisher>Virgin Mastertronic</publisher>
+ <info name="developer" value="Silhouette Software" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Demon's Tomb - The Awakening [1989] [Virgin Mastertronic] [5.25] [1 of 2].img" size="368640" crc="c63d8ff1" sha1="8282a157ec5a5c6020d5e5a9912dd2fd06212a85" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size = "368640">
+ <rom name="Demon's Tomb - The Awakening [1989] [Virgin Mastertronic] [5.25] [2 of 2].img" size="368640" crc="5bce4b3f" sha1="c4b3c19fc60e4cf99bbf1a0ec2f52830f55d1536" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="goldrush">
<description>Gold Rush (Version 2.01, 5.25")</description>
<year>1988</year>
@@ -3373,27 +3960,27 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<info name="version" value="2.01" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
- <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [1 of 5].ima" size="368640" crc="1120e384" sha1="8b80213593f8d76f7903380e5003904a0232beea" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [1 of 5].img" size="368640" crc="1120e384" sha1="8b80213593f8d76f7903380e5003904a0232beea" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
- <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [2 of 5].ima" size="368640" crc="ae812659" sha1="af0a62d6ab8882bf1c517756394395c8304653f3" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [2 of 5].img" size="368640" crc="ae812659" sha1="af0a62d6ab8882bf1c517756394395c8304653f3" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
- <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [3 of 5].ima" size="368640" crc="6c6d7d41" sha1="e379988de70cf4d6be9d151b70927ff21e560189" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [3 of 5].img" size="368640" crc="6c6d7d41" sha1="e379988de70cf4d6be9d151b70927ff21e560189" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
- <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [4 of 5].ima" size="368640" crc="eb1ca8f0" sha1="d6b916f003e01af904c57ddd9ee0f76cd00200b7" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [4 of 5].img" size="368640" crc="eb1ca8f0" sha1="d6b916f003e01af904c57ddd9ee0f76cd00200b7" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
- <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [5 of 5].ima" size="368640" crc="ad940acf" sha1="592edc5c1da10fcfb689bc89660cf120a7e15102" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [5.25] [5 of 5].img" size="368640" crc="ad940acf" sha1="592edc5c1da10fcfb689bc89660cf120a7e15102" offset="0"/>
</dataarea>
</part>
</software>
@@ -3405,12 +3992,12 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<info name="version" value="2.01" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
- <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [1 of 2].ima" size="737280" crc="5d6de39c" sha1="3b230cc9456ff93cd08123606a2e05630ff73556" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [1 of 2].img" size="737280" crc="5d6de39c" sha1="3b230cc9456ff93cd08123606a2e05630ff73556" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
- <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [2 of 2].ima" size="737280" crc="db6bcf7e" sha1="bafeaca31872785f4b7b22496beac2dc12816c72" offset="0"/>
+ <rom name="Gold Rush [1988] [Sierra On-Line] [3.5] [2 of 2].img" size="737280" crc="db6bcf7e" sha1="bafeaca31872785f4b7b22496beac2dc12816c72" offset="0"/>
</dataarea>
</part>
</software>
@@ -3756,7 +4343,7 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<!-- Demoscene -->
- <software name="8088mph">
+ <software name="8088mph" supported="partial">
<description>8088 MPH (Final Version)</description>
<year>2015</year>
<publisher>Hornet + CRTC + DESiRE</publisher>
@@ -3767,7 +4354,7 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
- <software name="8088mphp" cloneof="8088mph">
+ <software name="8088mphp" cloneof="8088mph" supported="partial">
<description>8088 MPH (Revision 2015 Party version)</description>
<year>2015</year>
<publisher>Hornet + CRTC + DESiRE</publisher>
diff --git a/hash/ibm5160_flop.xml b/hash/ibm5160_flop.xml
deleted file mode 100644
index 9ed0767562b..00000000000
--- a/hash/ibm5160_flop.xml
+++ /dev/null
@@ -1,17 +0,0 @@
-<?xml version="1.0"?>
-<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
-<softwarelist name="ibm5160_flop" description="IBM PC/XT disk images">
-
- <!-- Operating Systems -->
- <software name="pcdos20">
- <description>PC DOS 2.0</description>
- <year>1983</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk1.img" size="368640" crc="d0fb7d31" sha1="cbee7f6109fb0ed8a94de1893fc47ab066de36d3" offset="0" />
- </dataarea>
- </part>
- </software>
-
-</softwarelist>
diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml
index c7a000868c4..927fa5b6e36 100644
--- a/hash/ibm5170.xml
+++ b/hash/ibm5170.xml
@@ -1153,69 +1153,11 @@ Missing files come here
</part>
</software>
- <software name="pcdos30">
- <description>PC DOS 3.0</description>
- <year>1984</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk1.img" size="368640" crc="7a24e3bf" sha1="8cfebd5548b918c8d03f501ef02e66aca4ce3231" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk2.img" size="368640" crc="33184477" sha1="a7c150881903359859e46f9fe2de21d5c3afba99" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos31">
- <description>PC DOS 3.1</description>
- <year>1985</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk1.img" size="368640" crc="4b7ac87b" sha1="6f6ff69c4e2c14e2d64af06f1af9b60655d705a0" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk2.img" size="368640" crc="73eda674" sha1="1e6bb4a676137acbf6ff0cf59f94e206056c5821" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos32">
- <description>PC DOS 3.2</description>
- <year>1986</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="405504">
- <rom name="disk1.img" size="405504" crc="d4f4bfad" sha1="dab0710c79625a3e104b8945d7d179009376773a" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos330">
- <description>PC DOS 3.30</description>
- <year>1987</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="startup.img" size="368640" crc="402f4949" sha1="c6dc54ae6cbf810a0f54403c68acc1a10caedc21" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="operating.img" size="368640" crc="b0e167b0" sha1="4f582d07b1c4c18c6582ff8e53311a37c109aced" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos400">
- <description>PC DOS 4.00</description>
+ <software name="pcdos4">
+ <description>IBM Personal Computer DOS (Version 4.00)</description>
<year>1988</year>
<publisher>IBM</publisher>
+ <info name="version" value="4.00" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="737280">
<rom name="install.img" size="737280" crc="edcb2ea3" sha1="352dffca01bd72349503024d0b9d16c4b684f791" offset="0" />
@@ -1228,52 +1170,11 @@ Missing files come here
</part>
</software>
- <software name="pcdos500">
- <description>PC DOS 5.00</description>
- <year>1991</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk1.img" size="737280" crc="49ee0681" sha1="30fedf09e8b55eadc35c387968bcd02620630a27" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk2.img" size="737280" crc="9cfecb72" sha1="ffef155e6c746602e9ea28aef091119055f4cdb4" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk3.img" size="737280" crc="8414bc1f" sha1="d6ebe11bba3d995f574e0385358edbdd52a6b219" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="pcdos502">
- <description>PC DOS 5.02</description>
- <year>1992</year>
- <publisher>IBM</publisher>
- <part name="flop1" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk1.img" size="737280" crc="c3d4b69e" sha1="8e8fdbf1a39cbf541c5e8e3afa9351d3afef41bd" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk2.img" size="737280" crc="05c5345e" sha1="6d1fc805f9602836a379042d36edad56d692e922" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk3.img" size="737280" crc="d63b96f5" sha1="ae0ed2b14cd5477b2239a40a9987b23db8a1e28c" offset="0" />
- </dataarea>
- </part>
- </software>
-
<software name="pcdos61">
- <description>PC DOS 6.1</description>
+ <description>IBM DOS (Version 6.1)</description>
<year>1993</year>
<publisher>IBM</publisher>
+ <info name="version" value="6.1" />
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="Diskette 1 of 4"/>
<dataarea name="flop" size="1474560">
@@ -1300,10 +1201,11 @@ Missing files come here
</part>
</software>
- <software name="pcdos630">
- <description>PC DOS 6.30</description>
+ <software name="pcdos63">
+ <description>PC DOS (Version 6.3)</description>
<year>1993</year>
<publisher>IBM</publisher>
+ <info name="version" value="6.3" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk1.img" size="1474560" crc="0fc87254" sha1="2b4166557ea8eba7d6b0f3a4d9376896bf5a217c" offset="0" />
@@ -1331,7 +1233,7 @@ Missing files come here
</part>
</software>
- <software name="pcdos70">
+ <software name="pcdos7" supported="no">
<description>PC DOS 7.0</description>
<year>1995</year>
<publisher>IBM</publisher>
@@ -1367,79 +1269,11 @@ Missing files come here
</part>
</software>
- <software name="msdos211">
- <description>MS-DOS 2.11</description>
- <year>1983</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk01.img" size="368640" crc="71cb84ef" sha1="278d3f796e84b851b5b1abd09b610c6a663aef1a" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk02.img" size="368640" crc="08cd78c2" sha1="5d7364d31350854e45b5346c3670c9c19e8cb7ee" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos32">
- <description>MS-DOS 3.2</description>
- <year>1985</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk1.img" size="368640" crc="136579c0" sha1="dc50472d5355b7c29fab0361c262ef83dde6a2ea" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk2.img" size="368640" crc="c5e7e32f" sha1="c03f03494271bbdfb8865efa79bf8f5b5061b233" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk3.img" size="368640" crc="9a7366fe" sha1="e56a8fb2732a258bd50465c596ff5e16b53afae3" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos330">
- <description>MS-DOS 3.30</description>
- <year>1987</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="disk1.img" size="369152" crc="812d0573" sha1="1fe01c291fbacc5d97c86ea8aef21289669bab9c" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="disk2.img" size="369152" crc="489b485b" sha1="cc97e6f33df9df2b7a459dbcf0bba86778667534" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos33a">
- <description>MS-DOS 3.30a</description>
- <year>19??</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk1.img" size="368640" crc="b34d23a3" sha1="25488e58b6a462e7681940b589bd33c3ddcf2ae7" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk2.img" size="368640" crc="376ac8a2" sha1="ab165a11bc79d4cb6819e7901fea3cbcfa2de1a8" offset="0" />
- </dataarea>
- </part>
- </software>
-
<software name="msdos331">
- <description>MS-DOS 3.31</description>
- <year>19??</year>
+ <description>MS-DOS (Version 3.31, 3.5" HD)</description>
+ <year>1987</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="3.31" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk1.img" size="1474560" crc="a864516e" sha1="35a275626d7973b856aeb163ee216157078b175a" offset="0" />
@@ -1447,192 +1281,54 @@ Missing files come here
</part>
</software>
- <software name="msdos4m">
- <description>MS-DOS 4.0M</description>
- <year>1985</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="msdos400m-disk1.img" size="368640" crc="67848d5c" sha1="9e44fc3ed1f689c4136a08d48f9efa156cbaf250" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="msdos400m-disk2-unpatched.img" size="368640" crc="85a8cb6c" sha1="88d8ec84a6e24f2c918508dc65de0cdee182a48e" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos401">
- <description>MS-DOS 4.01</description>
- <year>1988</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="setup.img" size="737280" crc="ff363533" sha1="6cbf2bcf051d168d542c289aeb630f98fc2a56a7" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="operating.img" size="737280" crc="f0e2b019" sha1="e4f0dc4df9df1581a2acb109b5159ca142005707" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="dos shell.img" size="737280" crc="7be56e89" sha1="2f45b4a5140c04d572a8be6e3ef4011edb741b5b" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msds401m">
- <description>MS-DOS 4.01 (5.25")</description>
- <year>1988</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="install.img" size="369152" crc="ceeb1691" sha1="9d69d99a7c7a9b903e3f8c1e3f02b68270feff9c" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="operating 1.img" size="369152" crc="1b37564d" sha1="bce6027533ff4252229fe017f676de0cff653b3a" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="operating 2.img" size="369152" crc="d33a9768" sha1="0dba1f9ce818dae3ced74e04dab9a07976a3d720" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="operating 3.img" size="369152" crc="6776d4f9" sha1="6d2a569c2d1cd3237bc1964c14b10396dd9c461e" offset="0" />
- </dataarea>
- </part>
- <part name="flop5" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="select.img" size="369152" crc="7979de98" sha1="23fc5ce0ac5dee1a89fbe8ba6f96e5f1a5f7800b" offset="0" />
- </dataarea>
- </part>
- <part name="flop6" interface="floppy_5_25">
- <dataarea name="flop" size="369152">
- <rom name="shell.img" size="369152" crc="c40b54a2" sha1="181b6668eb5f3f11f817ccc5d576389911254261" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos50">
- <description>MS-DOS 5.0</description>
- <year>1991</year>
+ <software name="msdos6">
+ <description>MS-DOS (Version 6.00)</description>
+ <year>1992</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.00" />
<part name="flop1" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk01.img" size="737280" crc="a34dc98f" sha1="791e291a16a7ce3b3ffb536b1c27dfe8e620338e" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk1.img" size="1474560" crc="662b4a3d" sha1="114d4075729fc338839637f8f57f184ea59a769e" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk02.img" size="737280" crc="332cb5b4" sha1="0e1f4f63d68d02b5224a69e73ee9b7a3e630a1bb" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk2.img" size="1474560" crc="24b611f7" sha1="4fc338c763890fa17a456427d42d06beca667d41" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
- <dataarea name="flop" size="737280">
- <rom name="disk03.img" size="737280" crc="758c9037" sha1="53ba701accbf58db3b43188f4b4769a6a8008e05" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos50m">
- <description>MS-DOS 5.0 (5.25")</description>
- <year>1991</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk01.img" size="368640" crc="54f94294" sha1="6a66bdcdc141eaa8dbcbea8d344b7012add15672" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk02.img" size="368640" crc="224bde66" sha1="7fcc9e283d5245c4eb3e2d0a5e4f7abd2cb2cc7b" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk03.img" size="368640" crc="ad5aff11" sha1="447d6e95ae2e19bc783c5ca3934cbe796e6023de" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk04.img" size="368640" crc="6853a453" sha1="fcf640843977bfd5c40fd059a3d2203aab337977" offset="0" />
- </dataarea>
- </part>
- <part name="flop5" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk05.img" size="368640" crc="6592c217" sha1="35ed264ef14719a7bc6373d2e7d0688170d53442" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msdos50u">
- <description>MS-DOS 5.0 (Upgrade)</description>
- <year>1991</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk01.img" size="368640" crc="0dd44931" sha1="47b077300d22f2a86de31855ee8e1ff215aa592f" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk02.img" size="368640" crc="b7fcb627" sha1="bd0655ed4999bc792a699f89588e4773ee33335b" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk03.img" size="368640" crc="614b279e" sha1="c5e02fae37b5ed7a2f761a21973b14c2ce56294c" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk04.img" size="368640" crc="90fc6384" sha1="73ea8e782238d786d108be9bcb40fcab7e11269a" offset="0" />
- </dataarea>
- </part>
- <part name="flop5" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk05.img" size="368640" crc="5b436ce1" sha1="b8b4b3c4b905a90ca13910d0230deeb7fe04273f" offset="0" />
- </dataarea>
- </part>
- <part name="flop6" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk06.img" size="368640" crc="fc26ce05" sha1="a4471bc3d43dec17b116f0b673ab10103ca14a25" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk3.img" size="1474560" crc="97cc651d" sha1="efd6c30929b30eebca052c55ac613ecab11b82d9" offset="0" />
</dataarea>
</part>
</software>
- <software name="msdos60">
- <description>MS-DOS 6.0</description>
+ <software name="msdos6u" cloneof="msdos6">
+ <description>MS-DOS (Version 6.00, Upgrade)</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk1.img" size="1474560" crc="662b4a3d" sha1="114d4075729fc338839637f8f57f184ea59a769e" offset="0" />
+ <dataarea name="flop" size = "1474560">
+ <rom name="disk1u.img" size="1474560" crc="1b8997a9" sha1="ef275b681314d99e4dccda51b75a60bd1b3f5de2" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk2.img" size="1474560" crc="24b611f7" sha1="4fc338c763890fa17a456427d42d06beca667d41" offset="0" />
+ <dataarea name="flop" size = "1474560">
+ <rom name="disk2u.img" size="1474560" crc="879aa93e" sha1="89d9365b0cbfd3490178c22ad0088aed410716b9" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk3.img" size="1474560" crc="97cc651d" sha1="efd6c30929b30eebca052c55ac613ecab11b82d9" offset="0" />
+ <dataarea name="flop" size = "1474560">
+ <rom name="disk3u.img" size="1474560" crc="edb823d0" sha1="127d28b3d016b771c190f875876c6f1ab67fb4cf" offset="0"/>
</dataarea>
</part>
</software>
- <software name="msdos620">
- <description>MS-DOS 6.20</description>
+ <software name="msdos62">
+ <description>MS-DOS (Version 6.20)</description>
<year>1993</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.20" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk1.img" size="1474560" crc="23a8a1f2" sha1="cb4f53c46e39b60fa11543f356bc04080c2b7b8c" offset="0" />
@@ -1650,36 +1346,40 @@ Missing files come here
</part>
</software>
- <software name="msds620u">
- <description>MS-DOS 6.20 (Upgrade)</description>
+ <!-- not original, has WinImage header -->
+ <software name="msdos62u" cloneof="msdos62">
+ <description>MS-DOS (Version 6.20, Upgrade)</description>
<year>1993</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.20" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk1.img" size="1474560" crc="e2852c46" sha1="10048dd8d24b2e65cb4dca7568d544b9ee99a084" offset="0" />
+ <rom name="disk1u.img" size="1474560" crc="e2852c46" sha1="10048dd8d24b2e65cb4dca7568d544b9ee99a084" offset="0" status="baddump" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk2.img" size="1474560" crc="f083b635" sha1="165644b7c1ed791e2e993f27fd89dbf2af77eb30" offset="0" />
+ <rom name="disk2u.img" size="1474560" crc="f083b635" sha1="165644b7c1ed791e2e993f27fd89dbf2af77eb30" offset="0" status="baddump" />
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk3.img" size="1474560" crc="0b62c415" sha1="b972d42b998b846b2802f848774a1408ae173f10" offset="0" />
+ <rom name="disk3u.img" size="1474560" crc="0b62c415" sha1="b972d42b998b846b2802f848774a1408ae173f10" offset="0" status="baddump" />
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
+ <feature name="part_id" value="Supplemental" />
<dataarea name="flop" size="1474560">
- <rom name="supplemental.img" size="1474560" crc="23e03482" sha1="3fac12de77cafdea28a68793b597410a594506f8" offset="0" />
+ <rom name="supplemental.img" size="1474560" crc="23e03482" sha1="3fac12de77cafdea28a68793b597410a594506f8" offset="0" status="baddump" />
</dataarea>
</part>
</software>
<software name="msdos621">
- <description>MS-DOS 6.21</description>
+ <description>MS-DOS (Version 6.21)</description>
<year>1994</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.21" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="1228800">
<rom name="disk1.img" size="1228800" crc="f600eec8" sha1="7ce713f473beb93d85059933d3b44044daedd834" offset="0" />
@@ -1708,9 +1408,10 @@ Missing files come here
</software>
<software name="msdos622">
- <description>MS-DOS 6.22</description>
+ <description>MS-DOS (Version 6.22)</description>
<year>1994</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.22" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk1.img" size="1474560" crc="adbd36fe" sha1="3fb0df208670ea5fafae451661017391a381bc9d" offset="0" />
@@ -1733,171 +1434,61 @@ Missing files come here
</part>
</software>
- <software name="msds622u">
- <description>MS-DOS 6.22 (Upgrade)</description>
+ <software name="msdos622a" cloneof="msdos622">
+ <!-- from Acer CPR 1.2 recovery CD-ROM -->
+ <description>MS-DOS (Version 6.22, Alt)</description>
<year>1994</year>
<publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_3_5">
+ <info name="version" value="6.22" />
+ <part name="disk1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk1.img" size="1474560" crc="4b7d4093" sha1="3f18e0f833ab3c0a6e231f0dffd2cfd849b40c26" offset="0" />
+ <rom name="disk1a.img" size="1474560" crc="69d8cfdd" sha1="30b4b2e99b26b0e5e7dbe61b9892e45fe751a3e8" offset="0" />
</dataarea>
</part>
- <part name="flop2" interface="floppy_3_5">
+ <part name="disk2" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk2.img" size="1474560" crc="8bd7688d" sha1="dfb44325e69e58393adfe8c911f709c63db0399c" offset="0" />
+ <rom name="disk2a.img" size="1474560" crc="76258952" sha1="1f268c5487f31982848461b9d628ef10b552c849" offset="0" />
</dataarea>
</part>
- <part name="flop3" interface="floppy_3_5">
+ <part name="disk3" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
- <rom name="disk3.img" size="1474560" crc="930f809d" sha1="cffa2e29b24d033218f73d1a4ba0b19f0a179316" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msd622mu">
- <description>MS-DOS 6.22 (5.25" Upgrade)</description>
- <year>1994</year>
- <publisher>Microsoft</publisher>
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="1228800">
- <rom name="disk1.img" size="1228800" crc="9519c473" sha1="1a2ca99b7ae94f21555326695cbb14a9a1898eee" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="1228800">
- <rom name="disk2.img" size="1228800" crc="f70f29ab" sha1="f0a37131ba662ca3b8d0d0a291279497b533c156" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="1228800">
- <rom name="disk3.img" size="1228800" crc="8980019f" sha1="ed14124c32e5075bad74729b2237bf9ef3e53e24" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="1228800">
- <rom name="disk4.img" size="1228800" crc="4d7453ab" sha1="f7063a4f9e129ac25013b6b3223e028d758f71aa" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="msds330k">
- <description>MS-Dos 3.30 (Knowledge Dynamics Corp)</description>
- <year>1993</year>
- <publisher>Knowledge Dynamics Corp,</publisher>
- <part name="flop1" interface="floppy_5_25">
- <feature name="disk_serial" value="02042 036214.330A" />
- <feature name="disk_label" value="Programs" />
- <dataarea name="flop" size="368640">
- <rom name="disk 1.img" size="368640" crc="db07d99a" sha1="121ad3c636a69dae3a8eee96ef2ebf1152e9d00f" offset="0" />
+ <rom name="disk3a.img" size="1474560" crc="808b208d" sha1="06de13364e906c4ed69f19627ae0e682eb419078" offset="0" />
</dataarea>
</part>
- <part name="flop2" interface="floppy_3_5">
- <feature name="disk_serial" value="02043 036214.330A" />
- <feature name="disk_label" value="Additional Pragrams and Microsoft GW-Basic Interpreter" />
- <dataarea name="flop" size="368640">
- <rom name="disk 2.img" size="368640" crc="bef8e643" sha1="97df57499e009101d04bd696d23024b4d220e297" offset="0" />
+ <part name="disk4" interface="floppy_3_5">
+ <dataarea name="flop" size="1474560">
+ <rom name="disk4a.img" size="1474560" crc="21b6d623" sha1="2f096a5d9cd00677de3aca30b01b52b24776c59a" offset="0" />
</dataarea>
</part>
</software>
- <software name="msdos5m">
- <description>MS-Dos 5.0 (Mecer OEM)</description>
- <year>1991</year>
+ <software name="msdos622u" cloneof="msdos622">
+ <description>MS-DOS (Version 6.22, Upgrade, 3.5")</description>
+ <year>1994</year>
<publisher>Microsoft</publisher>
- <info name="OEM" value="Mecer" />
+ <info name="version" value="6.22" />
<part name="flop1" interface="floppy_3_5">
- <feature name="disk_serial" value="0044238" />
- <dataarea name="flop" size="737280">
- <rom name="operating 1.img" size="737280" crc="c54fe610" sha1="27756a10edbe33f76ff2239062af05dbfdc93979" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk1u.img" size="1474560" crc="4b7d4093" sha1="3f18e0f833ab3c0a6e231f0dffd2cfd849b40c26" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
- <feature name="disk_serial" value="0045925" />
- <dataarea name="flop" size="737280">
- <rom name="operating 2.img" size="737280" crc="9aa5c1a4" sha1="15cc58e267601b30a594372aea1ff3dbb73ea335" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk2u.img" size="1474560" crc="8bd7688d" sha1="dfb44325e69e58393adfe8c911f709c63db0399c" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
- <feature name="disk_serial" value="0044171" />
- <dataarea name="flop" size="737280">
- <rom name="operating 3.img" size="737280" crc="6248317a" sha1="c7ff3a04eb01cab3efb05b6b52ec8b8a36b9b269" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="dos5">
- <description>MS-Dos 5.0 (5.25 Disks, RTM)</description>
- <year>1991</year>
- <publisher>Microsoft</publisher>
- <info name="OEM" value="Mecer" />
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 1.img" size="368640" crc="de9e3bf6" sha1="b78aaced6bf262a5aa7af6d328caaf8370539c7c" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 2.img" size="368640" crc="b56623db" sha1="0424273d8b63a1d89a880c6737278bcf6003e5d5" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 3.img" size="368640" crc="273b0fb7" sha1="79595c7831ffa5599f3682e7a9bf43c7b7620387" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 4.img" size="368640" crc="69e4c763" sha1="af69f1c0e897a5f19c52941bc6e4fdbe4d17db6e" offset="0" />
- </dataarea>
- </part>
- <part name="flop5" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 5.img" size="368640" crc="3de11d76" sha1="b808a9b294b660454ddd84c014525052e6f9223e" offset="0" />
- </dataarea>
- </part>
- </software>
-
- <software name="dos5upg">
- <description>MS-Dos 5.0 Upgrade (5.25 Disks, RTM)</description>
- <year>1991</year>
- <publisher>Microsoft</publisher>
- <info name="OEM" value="Mecer" />
- <part name="flop1" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 1 (upgrade).img" size="368640" crc="01a3d9a2" sha1="083400723e475ed497b276c9d4f2799eff3b88b8" offset="0" />
- </dataarea>
- </part>
- <part name="flop2" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 2 (upgrade).img" size="368640" crc="a8709827" sha1="9dbbbd267eb9b63447ee04641892ff0bea08cd25" offset="0" />
- </dataarea>
- </part>
- <part name="flop3" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 3 (upgrade).img" size="368640" crc="bb5bb90b" sha1="5fd3b4fe686d7459b7048ec8f1a38860755a887a" offset="0" />
- </dataarea>
- </part>
- <part name="flop4" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 4 (upgrade).img" size="368640" crc="b411a21d" sha1="7623d0fa4b178415c1b85e8d14e452c5fa0a5bf0" offset="0" />
- </dataarea>
- </part>
- <part name="flop5" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 5 (upgrade).img" size="368640" crc="26edd0f6" sha1="87b38570250dd12b6b4e4f232d6d3f3ab7960d6c" offset="0" />
- </dataarea>
- </part>
- <part name="flop6" interface="floppy_5_25">
- <dataarea name="flop" size="368640">
- <rom name="disk 6 (upgrade).img" size="368640" crc="782c0c4a" sha1="aaff65c8263ed44f7af69892a4b9c926ba0ccf75" offset="0" />
+ <dataarea name="flop" size="1474560">
+ <rom name="disk3u.img" size="1474560" crc="930f809d" sha1="cffa2e29b24d033218f73d1a4ba0b19f0a179316" offset="0" />
</dataarea>
</part>
</software>
- <software name="msdos622up" cloneof="msdos622">
- <description>MS-DOS 6.22 (Upgrade, Alt)</description>
+ <software name="msdos622ua" cloneof="msdos622">
+ <description>MS-DOS (Version 6.22, Upgrade, 3.5", Alt)</description>
<year>1994</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.22" />
<part name="disk1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk1up.img" size="1474560" crc="b4df72ec" sha1="b34723a322c380121101cbdace5f5ae66a71e97c" offset="0" />
@@ -1915,29 +1506,29 @@ Missing files come here
</part>
</software>
- <software name="dos622" cloneof="msdos622">
- <!-- from Acer CPR 1.2 recovery CD-ROM -->
- <description>MS-DOS 6.22 (Alt)</description>
+ <software name="msdos622mu" cloneof="msdos622">
+ <description>MS-DOS (Version 6.22, Upgrade, 5.25")</description>
<year>1994</year>
<publisher>Microsoft</publisher>
- <part name="disk1" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk1a.img" size="1474560" crc="69d8cfdd" sha1="30b4b2e99b26b0e5e7dbe61b9892e45fe751a3e8" offset="0" />
+ <info name="version" value="6.22" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="1228800">
+ <rom name="disk1mu.img" size="1228800" crc="9519c473" sha1="1a2ca99b7ae94f21555326695cbb14a9a1898eee" offset="0" />
</dataarea>
</part>
- <part name="disk2" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk2a.img" size="1474560" crc="76258952" sha1="1f268c5487f31982848461b9d628ef10b552c849" offset="0" />
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="1228800">
+ <rom name="disk2mu.img" size="1228800" crc="f70f29ab" sha1="f0a37131ba662ca3b8d0d0a291279497b533c156" offset="0" />
</dataarea>
</part>
- <part name="disk3" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk3a.img" size="1474560" crc="808b208d" sha1="06de13364e906c4ed69f19627ae0e682eb419078" offset="0" />
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="1228800">
+ <rom name="disk3mu.img" size="1228800" crc="8980019f" sha1="ed14124c32e5075bad74729b2237bf9ef3e53e24" offset="0" />
</dataarea>
</part>
- <part name="disk4" interface="floppy_3_5">
- <dataarea name="flop" size="1474560">
- <rom name="disk4.img" size="1474560" crc="21b6d623" sha1="2f096a5d9cd00677de3aca30b01b52b24776c59a" offset="0" />
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="1228800">
+ <rom name="disk4mu.img" size="1228800" crc="4d7453ab" sha1="f7063a4f9e129ac25013b6b3223e028d758f71aa" offset="0" />
</dataarea>
</part>
</software>
@@ -1945,9 +1536,10 @@ Missing files come here
<software name="msdos622sup" cloneof="msdos622">
<!-- Added Bad_Dump status, as questions remains on how they were dumped -->
<!-- Missing from this group: the 360kb Disk set-->
- <description>MS-DOS 6.22 (Supplemental Disk)</description>
+ <description>MS-DOS (Version 6.22, Supplemental Disk)</description>
<year>1994</year>
<publisher>Microsoft</publisher>
+ <info name="version" value="6.22" />
<part name="disk1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="disk 1 (1.4mb).img" size="1474560" crc="ac432292" sha1="a60876af212ffc9dd38529ee327adea4b10448f5" offset="0" status="baddump" />
@@ -3532,6 +3124,94 @@ Missing files come here
</part>
</software>
+ <software name="msbob">
+ <description>Bob (1.00a)</description>
+ <year>1995</year>
+ <publisher>Microsoft</publisher>
+ <info name="version" value="1.00a" />
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size = "1474560">
+ <rom name="disk01.img" size="1474560" crc="da78fa7d" sha1="6b45dc9310d534b9fb10fb5efcfaa5b5793a13e1" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk02.img" size="1720320" crc="833277a5" sha1="6966562977957fd28acdb98a53a4c6236be9aa20" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk03.img" size="1720320" crc="60a7dda2" sha1="4b9e33275c6da0ee9b8a923e55a05d9281d335bf" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk04.img" size="1720320" crc="b9c1ddc7" sha1="41a84750793826bc7033dc77ade621872f9101e0" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk05.img" size="1720320" crc="ad765681" sha1="58df2e2602ff60d0da196d425c4e93bce4e6814f" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk06.img" size="1720320" crc="e8be449d" sha1="f62f03bf86ee51937eaa05b528fdc96f71871c73" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop7" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk07.img" size="1720320" crc="724f9922" sha1="89023ef479d843908ecd2d111ecd213b2d7bf420" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop8" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk08.img" size="1720320" crc="25a88b00" sha1="f457a5ec85704a2d396e2d079a8f83977cf8bb04" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="msboba" cloneof="msbob">
+ <description>Bob (1.00)</description>
+ <year>1995</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size = "1474560">
+ <rom name="disk1.img" size="1474560" crc="98474db4" sha1="a16cd99600589a926ff62ea29bd8b4def25db439" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk2.img" size="1720320" crc="3b0b1462" sha1="e77be0b10daafa67bc48a3801b418e438794b158" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk3.img" size="1720320" crc="c802bb17" sha1="a1356fc392d33e8f59c7ac8242801a6392fe2e75" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk4.img" size="1720320" crc="2d735e4a" sha1="1726e95359440b00658ce9e2ab975da225127035" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk5.img" size="1720320" crc="cb1a20ac" sha1="1581a17050c22a5267a007af6321b3e17b95302f" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk6.img" size="1720320" crc="94bf0f1d" sha1="e49a8a155c51354675cdc0272a409657fed3e251" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop7" interface="floppy_3_5">
+ <dataarea name="flop" size = "1720320">
+ <rom name="disk7.img" size="1720320" crc="afb0e89c" sha1="cd456a4304f4dafa27d869350d3f713cc934beb4" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="buttons" supported="no">
<!-- from Acer CPR 1.2 recovery CD-ROM -->
<description>Buttons for DOS (Shareware)</description>
@@ -3545,6 +3225,19 @@ Missing files come here
</part>
</software>
+ <software name="xmas4win">
+ <description>Christmas For Windows</description>
+ <year>1995</year>
+ <publisher>TDA Help!</publisher>
+ <info name="developer" value="Sygenex" />
+ <info name="version" value="3.0" />
+ <part name="flop1" interface="floppy_3_5">
+ <dataarea name="flop" size = "1474560">
+ <rom name="Xmas4Windows.img" size="1474560" crc="617a3326" sha1="72c78772e988f2c4cc9d0a0498ecfa847594c3b9" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="comit" supported="no">
<!-- from Acer CPR 1.2 recovery CD-ROM -->
<description>COMit-LITE</description>
@@ -3558,8 +3251,8 @@ Missing files come here
</part>
</software>
- <software name="dos7demo">
- <description>IBM PC-Dos 7 (Demonstration)</description>
+ <software name="pcdos7d">
+ <description>PC DOS 7 (Demonstration)</description>
<year>1994</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_3_5">
@@ -3598,6 +3291,19 @@ Missing files come here
</part>
</software>
+ <software name="vrplyhse">
+ <!-- Dumped via Kryoflux, shows as good and unmodified -->
+ <description>Virtual Reality Playhouse (Cover disk)</description>
+ <year>1992</year>
+ <publisher>The Waite Group</publisher>
+ <info name="isbn" value="1878739190" />
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size = "1228800">
+ <rom name="virtual reality playhouse.img" size="1228800" crc="f72fbdf9" sha1="bdf98003350b40f887f594de653a18fb391b6e98" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="wdel3">
<description>WinDelete 3.0</description>
<year>1996</year>
@@ -3611,6 +3317,72 @@ Missing files come here
</part>
</software>
+ <software name="winword1">
+ <description>Word for Windows 1.0</description>
+ <year>1989</year>
+ <publisher>Microsoft</publisher>
+ <part name="flop1" interface="floppy_3_5">
+ <feature name="part_id" value="Setup" />
+ <dataarea name="flop" size = "737280">
+ <rom name="setup.img" size="737280" crc="553cb9fa" sha1="c618d0a7714007b9b971bc63c4d2deaea56fdb07" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_3_5">
+ <feature name="part_id" value="Program" />
+ <dataarea name="flop" size = "737280">
+ <rom name="progrm.img" size="737280" crc="daa346c4" sha1="8fe7bced3d817788614d55747d7452154d3b37e0" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_3_5">
+ <feature name="part_id" value="Conversions 1" />
+ <dataarea name="flop" size = "737280">
+ <rom name="conver.img" size="737280" crc="85875a14" sha1="45f5f33caa485c76b671ba72a34a49fa9c52ee2e" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_3_5">
+ <feature name="part_id" value="Conversions 2" />
+ <dataarea name="flop" size = "737280">
+ <rom name="convr2.img" size="737280" crc="416fc793" sha1="30d46e6a6568c6aefca33d5223a1afd2b4055932" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_3_5">
+ <feature name="part_id" value="Utilities 1" />
+ <dataarea name="flop" size = "737280">
+ <rom name="util1.img" size="737280" crc="64e30b02" sha1="06c0886543e4289474fc5549ecd0d8d986c08339" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop6" interface="floppy_3_5">
+ <feature name="part_id" value="Utilities 2" />
+ <dataarea name="flop" size = "737280">
+ <rom name="util2.img" size="737280" crc="27e4a32f" sha1="c2fb011041e7c1f06ea2be3746593413c44bbbdf" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop7" interface="floppy_3_5">
+ <feature name="part_id" value="Tutorial 1" />
+ <dataarea name="flop" size = "737280">
+ <rom name="tutrl1.img" size="737280" crc="808ccc36" sha1="87b8261827cfc0950f2d60a353ba73162cf5fd31" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop8" interface="floppy_3_5">
+ <feature name="part_id" value="Tutorial 2" />
+ <dataarea name="flop" size = "737280">
+ <rom name="tutrl2.img" size="737280" crc="426fc4b7" sha1="8e5295bcc11f63c0186ca7a0012550aaa751f632" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop9" interface="floppy_3_5">
+ <feature name="part_id" value="Help" />
+ <dataarea name="flop" size = "737280">
+ <rom name="help.img" size="737280" crc="d50900f3" sha1="9cd98aa432e38a6028fc1105e6ba5f24fe118d52" offset="0"/>
+ </dataarea>
+ </part>
+ <part name="flop10" interface="floppy_3_5">
+ <feature name="part_id" value="Proofing Tools" />
+ <dataarea name="flop" size = "737280">
+ <rom name="prftls.img" size="737280" crc="4610c528" sha1="2b64e4906e7ff2b7b8268c8f97e91ddd580f15c4" offset="0"/>
+ </dataarea>
+ </part>
+ </software>
+
<software name="wp60">
<description>WordPerfect 6.0 for DOS</description>
<year>1993</year>
diff --git a/hash/neogeo.xml b/hash/neogeo.xml
index 85efc934b2e..c120e19a027 100644
--- a/hash/neogeo.xml
+++ b/hash/neogeo.xml
@@ -2020,6 +2020,39 @@
</part>
</software>
+ <software name="kotm2a" cloneof="kotm2">
+ <description>King of the Monsters 2 - The Next Thing (older)</description>
+ <year>1992</year>
+ <publisher>SNK</publisher>
+ <info name="alt_title" value="キング・オブ・ザ・モンスターズ2 ―ãƒã‚¯ã‚¹ãƒˆã‚·ãƒ³ã‚°â€•"/>
+ <sharedfeat name="release" value="MVS" />
+ <sharedfeat name="compatibility" value="MVS,AES" />
+ <part name="cart" interface="neo_cart">
+ <dataarea name="maincpu" width="16" endianness="big" size="0x100000">
+ <rom loadflag="load16_word_swap" name="039_p1.p1" offset="0x000000" size="0x080000" crc="8d186638" sha1="c3874bbb1bfcb220173afb2e0a2123ffaeb7bd2b" /> <!-- TC534200 -->
+ <rom loadflag="load16_word_swap" name="039-p2.p2" offset="0x080000" size="0x080000" crc="28661afe" sha1="6c85ff6ab334b1ca744f726f42dac211537e7315" /> <!-- TC534200 -->
+ </dataarea>
+ <dataarea name="fixed" size="0x040000">
+ <rom offset="0x000000" size="0x020000" name="039-s1.s1" crc="63ee053a" sha1="7d4b92bd022708975b1470e8f24d1f5a712e1b94" /> <!-- TC531000 -->
+ </dataarea>
+ <dataarea name="audiocpu" size="0x020000">
+ <rom offset="0x000000" size="0x020000" name="039-m1.m1" crc="0c5b2ad5" sha1="15eb5ea10fecdbdbcfd06225ae6d88bb239592e7" /> <!-- TC531001 -->
+ </dataarea>
+ <dataarea name="ymsnd" size="0x300000">
+ <rom name="039-v2.v2" offset="0x000000" size="0x200000" crc="86d34b25" sha1="89bdb614b0c63d678962da52e2f596750d20828c" /> <!-- TC5316200 -->
+ <rom name="039-v4.v4" offset="0x200000" size="0x100000" crc="8fa62a0b" sha1="58ac2fdd73c542eb8178cfc4adfa0e5940183283" /> <!-- TC538200 -->
+ </dataarea>
+ <dataarea name="sprites" size="0x600000">
+ <rom loadflag="load16_byte" name="039-c1.c1" offset="0x000000" size="0x100000" crc="6d1c4aa9" sha1="4fbc9d7cb37522ec298eefbe38c75a2d050fbb4a" /> <!-- TC5316200 -->
+ <rom size="0x100000" offset="0x400000" loadflag="continue" />
+ <rom loadflag="load16_byte" name="039-c2.c2" offset="0x000001" size="0x100000" crc="f7b75337" sha1="4d85f85948c3e6ed38b0b0ccda79de3ce026e2d9" /> <!-- TC5316200 -->
+ <rom size="0x100000" offset="0x400001" loadflag="continue" />
+ <rom loadflag="load16_byte" name="039-c3.c3" offset="0x200000" size="0x080000" crc="bfc4f0b2" sha1="f4abe2b52882b966412f3b503b8f2c8f49b57968" /> <!-- TC534200 -->
+ <rom loadflag="load16_byte" name="039-c4.c4" offset="0x200001" size="0x080000" crc="81c9c250" sha1="e3a34ff69081a8681b5ca895915892dcdccfa7aa" /> <!-- TC534200 -->
+ </dataarea>
+ </part>
+ </software>
+
<software name="kotm2p" cloneof="kotm2">
<!-- fairly late prototype release, only the code differs from the main set -->
<description>King of the Monsters 2 - The Next Thing (prototype)</description>
@@ -4829,7 +4862,7 @@
</dataarea>
</part>
</software>
-
+
<!--
ID-0096
. NGM-096
diff --git a/hash/pcw.xml b/hash/pcw.xml
index a2ac89f093d..654f4466fdb 100644
--- a/hash/pcw.xml
+++ b/hash/pcw.xml
@@ -1512,16 +1512,18 @@
</part>
</software>
- <software name="sirlance">
- <description>Sir Lancelot (Spa)</description>
- <year>1985</year>
- <publisher>OMK</publisher>
- <part name="flop1" interface="floppy_3">
- <dataarea name="flop" size="194816">
- <rom name="sirlancelot_pcw.dsk" size="194816" crc="c47fb488" sha1="18d09cab70d50e0e9b2682ea751258fa47841120" offset="0" />
- </dataarea>
- </part>
- </software>
+<!--
+ <software name="sirlance">
+ <description>Sir Lancelot (Spa)</description>
+ <year>1985</year>
+ <publisher>OMK</publisher>
+ <part name="flop1" interface="floppy_3">
+ <dataarea name="flop" size="194816">
+ <rom name="sirlancelot_pcw.dsk" size="194816" crc="c47fb488" sha1="18d09cab70d50e0e9b2682ea751258fa47841120" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+-->
<software name="sirperce">
<description>Sir Perceval (Spa)</description>
diff --git a/makefile b/makefile
index 1b3e5851e5b..3d55d51d506 100644
--- a/makefile
+++ b/makefile
@@ -804,7 +804,7 @@ SCRIPTS += scripts/target/$(TARGET)/mess.lua
endif
ifndef SOURCES
-ifdef PROJECT
+ifdef PROJECT
SCRIPTS += projects/$(PROJECT)/scripts/target/$(TARGET)/$(SUBTARGET_FULL).lua
else
SCRIPTS += scripts/target/$(TARGET)/$(SUBTARGET_FULL).lua
@@ -1535,14 +1535,14 @@ endif
ifeq (posix,$(SHELLTYPE))
$(GENDIR)/version.cpp: $(GENDIR)/git_desc | $(GEN_FOLDERS)
- @echo '#define BARE_BUILD_VERSION "0.180"' > $@
+ @echo '#define BARE_BUILD_VERSION "0.181"' > $@
@echo 'extern const char bare_build_version[];' >> $@
@echo 'extern const char build_version[];' >> $@
@echo 'const char bare_build_version[] = BARE_BUILD_VERSION;' >> $@
@echo 'const char build_version[] = BARE_BUILD_VERSION " ($(NEW_GIT_VERSION))";' >> $@
else
$(GENDIR)/version.cpp: $(GENDIR)/git_desc
- @echo #define BARE_BUILD_VERSION "0.180" > $@
+ @echo #define BARE_BUILD_VERSION "0.181" > $@
@echo extern const char bare_build_version[]; >> $@
@echo extern const char build_version[]; >> $@
@echo const char bare_build_version[] = BARE_BUILD_VERSION; >> $@
diff --git a/nl_examples/74123_mstable.c b/nl_examples/74123_mstable.c
index fd2bfd85871..aa21f4fe215 100644
--- a/nl_examples/74123_mstable.c
+++ b/nl_examples/74123_mstable.c
@@ -40,8 +40,8 @@ NETLIST_START(74123_mstable)
NET_C(mf.B, V5)
NET_C(mf.A, clk.Q)
- LOG(logC, C.2)
- LOG(logQ, mf.Q)
- LOG(logX, clk.Q)
+ LOG(log_C, C.2)
+ LOG(log_Q, mf.Q)
+ LOG(log_X, clk.Q)
NETLIST_END()
diff --git a/nl_examples/diode.c b/nl_examples/diode.c
new file mode 100644
index 00000000000..9a2196c6f24
--- /dev/null
+++ b/nl_examples/diode.c
@@ -0,0 +1,31 @@
+/*
+ * diode.c
+ *
+ */
+
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(diode)
+ /* Standard stuff */
+
+ CLOCK(clk, 1000) // 1000 Hz
+ SOLVER(Solver, 48)
+ ANALOG_INPUT(V5, 5)
+
+ //DIODE(D, "1N914")
+ DIODE(D, "D(IS=1e-15)")
+
+ RES(R, RES_K(10))
+ RES(R1, RES_K(10))
+
+ NET_C(clk, D.K)
+ NET_C(D.A, R.1)
+ NET_C(R.2, V5)
+ NET_C(R1.2, GND)
+ NET_C(R.1, R1.1)
+
+ LOG(logB, clk)
+ LOG(logC, D.A)
+
+NETLIST_END()
diff --git a/nl_examples/norton_opamp.c b/nl_examples/norton_opamp.c
new file mode 100644
index 00000000000..b5d8665fcc7
--- /dev/null
+++ b/nl_examples/norton_opamp.c
@@ -0,0 +1,127 @@
+/*
+ * opamp.c
+ *
+ */
+
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(main)
+
+ /* Standard stuff */
+
+ CLOCK(clk, 10000) // 1000 Hz
+ SOLVER(Solver, 48000)
+ ANALOG_INPUT(V5, 5)
+ PARAM(Solver.ACCURACY, 1e-6)
+ PARAM(Solver.DYNAMIC_TS, 0)
+ PARAM(Solver.SOR_FACTOR, 1.0)
+ //PARAM(Solver.CONVERG, 1.0)
+ PARAM(Solver.GS_LOOPS, 5)
+ PARAM(Solver.GS_THRESHOLD, 5)
+
+ SUBMODEL(op1, opamp_fast)
+ /* Wired as non - inverting amplifier like in LM3900 datasheet */
+
+ RES(R1, 25000)
+ RES(R2, 100000)
+ RES(R3, 200000)
+ CAP(C1, CAP_U(0.05))
+
+ NET_C(clk, C1.1)
+ NET_C(C1.2, R1.1)
+
+ NET_C(op1.VM, GND)
+ NET_C(op1.VP, V5 )
+ NET_C(op1.PLUS, R1.2, R3.1)
+ NET_C(R3.2, V5)
+ //NET_C(R3.2, GND)
+ NET_C(op1.MINUS, R2.2)
+ NET_C(op1.OUT, R2.1)
+
+ RES(RL, 10000)
+ NET_C(RL.2, GND)
+ NET_C(RL.1, op1.OUT)
+
+ LOG(logX, op1.OUT)
+ LOG(logY, clk)
+NETLIST_END()
+
+NETLIST_START(opamp)
+
+ /* Opamp model from
+ *
+ * http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm
+ *
+ * Bandwidth 10Mhz
+ *
+ */
+
+ /* Terminal definitions for calling netlists */
+
+ ALIAS(PLUS, G1.IP) // Positive input
+ ALIAS(MINUS, G2.IN) // Negative input
+ ALIAS(OUT, EBUF.OP) // Opamp output ...
+ ALIAS(VM, EBUF.ON) // V- terminal
+ ALIAS(VP, DUMMY.I) // V+ terminal
+
+ DUMMY_INPUT(DUMMY)
+
+ /* The opamp model */
+
+ CCCS(G1)
+ CCCS(G2)
+ //PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
+ PARAM(G1.G, 1000000) // typical OP-AMP amplification 100 * 1000 = 100000
+ PARAM(G2.G, 1000000) // typical OP-AMP amplification 100 * 1000 = 100000
+ RES(RP1, 1000)
+ CAP(CP1, 1.59e-6) // <== change to 1.59e-3 for 10Khz bandwidth
+ VCVS(EBUF)
+ PARAM(EBUF.RO, 50)
+ PARAM(EBUF.G, 1)
+
+// NET_C(EBUF.ON, GND)
+
+ NET_C(G1.ON, GND)
+ NET_C(G2.ON, GND)
+ NET_C(RP1.2, GND)
+ NET_C(CP1.2, GND)
+ NET_C(EBUF.IN, GND)
+
+ NET_C(G1.IN, G2.IP, GND)
+
+ NET_C(RP1.1, G1.OP)
+ NET_C(RP1.1, G2.OP)
+ NET_C(CP1.1, RP1.1)
+ NET_C(EBUF.IP, RP1.1)
+
+NETLIST_END()
+
+NETLIST_START(opamp_fast)
+
+ /*
+ * Fast norton opamp model without bandwidth
+ */
+
+ /* Terminal definitions for calling netlists */
+
+ ALIAS(PLUS, R1.1) // Positive input
+ ALIAS(MINUS, R2.1) // Negative input
+ ALIAS(OUT, G1.OP) // Opamp output ...
+ ALIAS(VM, G1.ON) // V- terminal
+ ALIAS(VP, DUMMY.I) // V+ terminal
+
+ DUMMY_INPUT(DUMMY)
+
+ /* The opamp model */
+
+ RES(R1, 1)
+ RES(R2, 1)
+ NET_C(R1.1, G1.IP)
+ NET_C(R2.1, G1.IN)
+ NET_C(R1.2, R2.2, G1.ON)
+ VCVS(G1)
+ PARAM(G1.G, 1000000)
+ PARAM(G1.RO, RES_K(8))
+
+NETLIST_END()
diff --git a/nl_examples/rc.c b/nl_examples/rc.c
new file mode 100644
index 00000000000..1850da313da
--- /dev/null
+++ b/nl_examples/rc.c
@@ -0,0 +1,31 @@
+/*
+ * cdelay.c
+ *
+ */
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(rc)
+
+ /*
+ * delay circuit
+ *
+ */
+
+ /* Standard stuff */
+
+ SOLVER(Solver, 48000)
+ PARAM(Solver.ACCURACY, 1e-6)
+ CLOCK(clk, 20000)
+
+ CAP(C1, 0.022e-6)
+ RES(R1, 10000)
+ RES(R2, 20000)
+
+ NET_C(clk, R2.1)
+ NET_C(R2.2, R1.1, C1.1)
+ NET_C(C1.2, R1.2, GND)
+
+ LOG(tt, C1.1)
+
+NETLIST_END()
diff --git a/nl_examples/rl.c b/nl_examples/rl.c
new file mode 100644
index 00000000000..3b5056b259c
--- /dev/null
+++ b/nl_examples/rl.c
@@ -0,0 +1,32 @@
+/*
+ * lr.c
+ *
+ */
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(lr)
+
+ /*
+ * delay circuit
+ *
+ */
+
+ /* Standard stuff */
+
+ SOLVER(Solver, 48000)
+ PARAM(Solver.ACCURACY, 1e-6)
+ CLOCK(clk, 50)
+ PARAM(Solver.ITERATIVE, "MAT_CR")
+
+ IND(L1, 10)
+ RES(R1, 10000)
+
+ NET_C(clk, L1.1)
+ NET_C(L1.2, R1.1)
+ NET_C(R1.2, GND)
+
+ //LOG(log_1, R1.1)
+ //LOG(log_2, clk)
+
+NETLIST_END()
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua
index 4af0e78d6ab..3833c9fc695 100644
--- a/scripts/src/bus.lua
+++ b/scripts/src/bus.lua
@@ -1486,6 +1486,27 @@ end
---------------------------------------------------
--
+--@src/devices/bus/vme/vme.h,BUSES["VME"] = true
+---------------------------------------------------
+
+if (BUSES["VME"]~=null) then
+ files {
+ MAME_DIR .. "src/devices/bus/vme/vme.cpp",
+ MAME_DIR .. "src/devices/bus/vme/vme.h",
+ MAME_DIR .. "src/mame/bus/vme/mzr8105.cpp",
+ MAME_DIR .. "src/mame/bus/vme/mzr8105.h",
+ MAME_DIR .. "src/mame/bus/vme/mzr8300.cpp",
+ MAME_DIR .. "src/mame/bus/vme/mzr8300.h",
+ MAME_DIR .. "src/mame/includes/mzr8105.h",
+ MAME_DIR .. "src/mame/machine/mzr8105.cpp",
+ MAME_DIR .. "src/mame/includes/mzr8300.h",
+ MAME_DIR .. "src/mame/machine/mzr8300.cpp",
+ }
+end
+
+
+---------------------------------------------------
+--
--@src/devices/bus/wangpc/wangpc.h,BUSES["WANGPC"] = true
---------------------------------------------------
diff --git a/scripts/src/emu.lua b/scripts/src/emu.lua
index b67226e1576..76cdb16427c 100644
--- a/scripts/src/emu.lua
+++ b/scripts/src/emu.lua
@@ -93,8 +93,6 @@ files {
MAME_DIR .. "src/emu/dislot.h",
MAME_DIR .. "src/emu/disound.cpp",
MAME_DIR .. "src/emu/disound.h",
- MAME_DIR .. "src/emu/dispatch.cpp",
- MAME_DIR .. "src/emu/dispatch.h",
MAME_DIR .. "src/emu/distate.cpp",
MAME_DIR .. "src/emu/distate.h",
MAME_DIR .. "src/emu/divideo.cpp",
diff --git a/scripts/src/netlist.lua b/scripts/src/netlist.lua
index 70feb291aa5..b1344e9d924 100644
--- a/scripts/src/netlist.lua
+++ b/scripts/src/netlist.lua
@@ -91,18 +91,30 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/solver/nld_ms_w.h",
MAME_DIR .. "src/lib/netlist/solver/nld_ms_direct_lu.h",
MAME_DIR .. "src/lib/netlist/solver/vector_base.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_2102A.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_2102A.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_2716.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_2716.h",
MAME_DIR .. "src/lib/netlist/devices/nld_4020.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_4020.h",
MAME_DIR .. "src/lib/netlist/devices/nld_4066.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_4066.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_4316.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_4316.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7448.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7448.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7450.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7450.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7473.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7473.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7474.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7474.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7475.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7475.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7483.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7483.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7485.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_7485.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7490.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7490.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7493.cpp",
@@ -113,30 +125,56 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nld_74123.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74153.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74153.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74161.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74161.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74165.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74165.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74166.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74166.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74174.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74174.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74175.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74175.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74192.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74192.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74193.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74193.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74194.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74194.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74279.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74279.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74365.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_74365.h",
MAME_DIR .. "src/lib/netlist/devices/nld_74ls629.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_74ls629.h",
MAME_DIR .. "src/lib/netlist/devices/nld_82S16.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_82S16.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S115.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S115.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S123.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S123.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S126.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_82S126.h",
MAME_DIR .. "src/lib/netlist/devices/nld_9310.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_9310.h",
MAME_DIR .. "src/lib/netlist/devices/nld_9312.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_9312.h",
MAME_DIR .. "src/lib/netlist/devices/nld_9316.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_9316.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_9322.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_9322.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_am2847.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_am2847.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_dm9334.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_dm9334.h",
MAME_DIR .. "src/lib/netlist/devices/nld_ne555.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_ne555.h",
MAME_DIR .. "src/lib/netlist/devices/nld_mm5837.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_mm5837.h",
MAME_DIR .. "src/lib/netlist/devices/nld_r2r_dac.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_r2r_dac.h",
+ MAME_DIR .. "src/lib/netlist/devices/nld_tristate.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nld_tristate.h",
MAME_DIR .. "src/lib/netlist/devices/nld_legacy.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_legacy.h",
MAME_DIR .. "src/lib/netlist/devices/net_lib.cpp",
@@ -149,6 +187,8 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nld_truthtable.h",
MAME_DIR .. "src/lib/netlist/devices/nlid_cmos.h",
MAME_DIR .. "src/lib/netlist/devices/nlid_system.h",
+ MAME_DIR .. "src/lib/netlist/devices/nlid_proxy.cpp",
+ MAME_DIR .. "src/lib/netlist/devices/nlid_proxy.h",
MAME_DIR .. "src/lib/netlist/macro/nlm_ttl74xx.cpp",
MAME_DIR .. "src/lib/netlist/macro/nlm_ttl74xx.h",
MAME_DIR .. "src/lib/netlist/macro/nlm_cd4xxx.cpp",
diff --git a/scripts/src/osd/sdl_cfg.lua b/scripts/src/osd/sdl_cfg.lua
index b8f24d27d3b..3f8e3e10bbc 100644
--- a/scripts/src/osd/sdl_cfg.lua
+++ b/scripts/src/osd/sdl_cfg.lua
@@ -109,6 +109,8 @@ if _OPTIONS["targetos"]=="windows" then
"_UNICODE",
"main=utf8_main",
"_WIN32_WINNT=0x0501",
+ "WIN32_LEAN_AND_MEAN",
+ "NOMINMAX",
}
configuration { }
diff --git a/scripts/src/osd/uwp_cfg.lua b/scripts/src/osd/uwp_cfg.lua
index 234327aada0..28892656728 100644
--- a/scripts/src/osd/uwp_cfg.lua
+++ b/scripts/src/osd/uwp_cfg.lua
@@ -11,6 +11,8 @@ defines {
"_WIN32_WINNT=0x0603",
"NTDDI_VERSION=0x06030000",
"MODERN_WIN_API",
+ "WIN32_LEAN_AND_MEAN",
+ "NOMINMAX",
}
flags {
diff --git a/scripts/src/osd/windows_cfg.lua b/scripts/src/osd/windows_cfg.lua
index 1ba0efe6151..1baa45f4255 100644
--- a/scripts/src/osd/windows_cfg.lua
+++ b/scripts/src/osd/windows_cfg.lua
@@ -3,6 +3,8 @@
defines {
"OSD_WINDOWS",
+ "WIN32_LEAN_AND_MEAN",
+ "NOMINMAX",
}
configuration { "mingw* or vs*" }
diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua
index 8a05a5c7825..7ab6bc16515 100644
--- a/scripts/target/mame/arcade.lua
+++ b/scripts/target/mame/arcade.lua
@@ -389,7 +389,7 @@ MACHINES["AY31015"] = true
MACHINES["BANKDEV"] = true
MACHINES["CDP1852"] = true
MACHINES["CDP1871"] = true
---MACHINES["CMOS40105"] = true
+MACHINES["CMOS40105"] = true
MACHINES["CDU76S"] = true
MACHINES["COM8116"] = true
MACHINES["CR589"] = true
@@ -567,6 +567,8 @@ MACHINES["X76F041"] = true
MACHINES["X76F100"] = true
MACHINES["Z80CTC"] = true
MACHINES["Z80DART"] = true
+--MACHINES["Z80SIO"] = true
+MACHINES["Z80SCC"] = true
MACHINES["Z80DMA"] = true
MACHINES["Z80PIO"] = true
MACHINES["Z80STI"] = true
@@ -674,6 +676,7 @@ BUSES["VECTREX"] = true
--BUSES["VIC20"] = true
--BUSES["VIDBRAIN"] = true
--BUSES["VIP"] = true
+--BUSES["VME"] = true
--BUSES["VTECH_IOEXP"] = true
--BUSES["VTECH_MEMEXP"] = true
--BUSES["WANGPC"] = true
@@ -963,6 +966,8 @@ files {
MAME_DIR .. "src/mame/video/atarisy2.cpp",
MAME_DIR .. "src/mame/drivers/atarisy4.cpp",
MAME_DIR .. "src/mame/drivers/atarittl.cpp",
+ MAME_DIR .. "src/mame/machine/nl_stuntcyc.cpp",
+ MAME_DIR .. "src/mame/machine/nl_stuntcyc.h",
MAME_DIR .. "src/mame/drivers/atetris.cpp",
MAME_DIR .. "src/mame/includes/atetris.h",
MAME_DIR .. "src/mame/video/atetris.cpp",
@@ -2488,10 +2493,6 @@ files {
MAME_DIR .. "src/mame/drivers/astrocde.cpp",
MAME_DIR .. "src/mame/includes/astrocde.h",
MAME_DIR .. "src/mame/video/astrocde.cpp",
- MAME_DIR .. "src/mame/audio/gorf.cpp",
- MAME_DIR .. "src/mame/audio/gorf.h",
- MAME_DIR .. "src/mame/audio/wow.cpp",
- MAME_DIR .. "src/mame/audio/wow.h",
MAME_DIR .. "src/mame/drivers/atlantis.cpp",
MAME_DIR .. "src/mame/drivers/balsente.cpp",
MAME_DIR .. "src/mame/includes/balsente.h",
@@ -2556,6 +2557,8 @@ files {
MAME_DIR .. "src/mame/machine/midwayic.h",
MAME_DIR .. "src/mame/audio/midway.cpp",
MAME_DIR .. "src/mame/audio/midway.h",
+ MAME_DIR .. "src/mame/audio/csd.cpp",
+ MAME_DIR .. "src/mame/audio/csd.h",
}
createMAMEProjects(_target, _subtarget, "namco")
@@ -2689,6 +2692,8 @@ files {
MAME_DIR .. "src/mame/machine/namco62.h",
MAME_DIR .. "src/mame/machine/namcomcu.cpp",
MAME_DIR .. "src/mame/machine/namcomcu.h",
+ MAME_DIR .. "src/mame/machine/namcoio_gearbox.cpp",
+ MAME_DIR .. "src/mame/machine/namcoio_gearbox.h",
MAME_DIR .. "src/mame/audio/namco52.cpp",
MAME_DIR .. "src/mame/audio/namco52.h",
MAME_DIR .. "src/mame/audio/namco54.cpp",
@@ -2933,14 +2938,12 @@ files {
MAME_DIR .. "src/mame/drivers/pacman.cpp",
MAME_DIR .. "src/mame/includes/pacman.h",
MAME_DIR .. "src/mame/video/pacman.cpp",
- MAME_DIR .. "src/mame/machine/acitya.cpp",
- MAME_DIR .. "src/mame/machine/acitya.h",
+ MAME_DIR .. "src/mame/machine/epos.cpp",
+ MAME_DIR .. "src/mame/machine/epos.h",
MAME_DIR .. "src/mame/machine/jumpshot.cpp",
MAME_DIR .. "src/mame/machine/jumpshot.h",
MAME_DIR .. "src/mame/machine/pacplus.cpp",
MAME_DIR .. "src/mame/machine/pacplus.h",
- MAME_DIR .. "src/mame/machine/theglobp.cpp",
- MAME_DIR .. "src/mame/machine/theglobp.h",
MAME_DIR .. "src/mame/drivers/pengo.cpp",
}
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index 63f393a2914..de0066198c9 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -702,6 +702,7 @@ BUSES["VIC10"] = true
BUSES["VIC20"] = true
BUSES["VIDBRAIN"] = true
BUSES["VIP"] = true
+BUSES["VME"] = true
BUSES["VTECH_IOEXP"] = true
BUSES["VTECH_MEMEXP"] = true
BUSES["WANGPC"] = true
@@ -1141,8 +1142,6 @@ files {
MAME_DIR .. "src/mame/video/jagblit.h",
MAME_DIR .. "src/mame/video/jagblit.hxx",
MAME_DIR .. "src/mame/video/jagobj.hxx",
- MAME_DIR .. "src/mame/audio/gorf.cpp",
- MAME_DIR .. "src/mame/audio/wow.cpp",
MAME_DIR .. "src/mame/drivers/astrocde.cpp",
MAME_DIR .. "src/mame/includes/astrocde.h",
MAME_DIR .. "src/mame/video/astrocde.cpp",
@@ -1895,6 +1894,7 @@ files {
createMESSProjects(_target, _subtarget, "force")
files {
+ MAME_DIR .. "src/mame/drivers/fccpu20.cpp",
MAME_DIR .. "src/mame/drivers/fccpu30.cpp",
MAME_DIR .. "src/mame/drivers/force68k.cpp",
}
@@ -3342,6 +3342,8 @@ files {
MAME_DIR .. "src/mame/drivers/mx2178.cpp",
MAME_DIR .. "src/mame/drivers/mycom.cpp",
MAME_DIR .. "src/mame/drivers/myvision.cpp",
+ MAME_DIR .. "src/mame/machine/nl_hazelvid.cpp",
+ MAME_DIR .. "src/mame/machine/nl_hazelvid.h",
MAME_DIR .. "src/mame/drivers/notetaker.cpp",
MAME_DIR .. "src/mame/drivers/ngen.cpp",
MAME_DIR .. "src/mame/machine/ngen_kb.cpp",
diff --git a/scripts/target/mame/nl.lua b/scripts/target/mame/nl.lua
index 8242f67c38e..0ad6c16419c 100644
--- a/scripts/target/mame/nl.lua
+++ b/scripts/target/mame/nl.lua
@@ -21,6 +21,7 @@ CPUS["M6800"] = true
CPUS["M6803"] = true
CPUS["M6809"] = true
CPUS["MCS48"] = true
+CPUS["I8085"] = true
--CPUS["MCS51"] = true
--CPUS["M6800"] = true
--CPUS["M6809"] = true
@@ -60,6 +61,10 @@ VIDEOS["FIXFREQ"] = true
MACHINES["NETLIST"] = true
MACHINES["Z80DMA"] = true
MACHINES["GEN_LATCH"] = true
+MACHINES["AY31015"] = true
+MACHINES["KB3600"] = true
+MACHINES["COM8116"] = true
+
--MACHINES["6821PIA"] = true
--MACHINES["TTL74148"] = true
--MACHINES["TTL74153"] = true
@@ -112,6 +117,14 @@ files{
MAME_DIR .. "src/mame/machine/nl_pongd.h",
MAME_DIR .. "src/mame/machine/nl_breakout.cpp",
MAME_DIR .. "src/mame/machine/nl_breakout.h",
+ MAME_DIR .. "src/mame/machine/nl_hazelvid.cpp",
+ MAME_DIR .. "src/mame/machine/nl_hazelvid.h",
+
+ MAME_DIR .. "src/mame/drivers/atarittl.cpp",
+ MAME_DIR .. "src/mame/machine/nl_stuntcyc.cpp",
+ MAME_DIR .. "src/mame/machine/nl_stuntcyc.h",
+
+ MAME_DIR .. "src/mame/drivers/hazeltin.cpp",
MAME_DIR .. "src/mame/drivers/1942.cpp",
MAME_DIR .. "src/mame/includes/1942.h",
@@ -121,10 +134,10 @@ files{
MAME_DIR .. "src/mame/includes/popeye.h",
MAME_DIR .. "src/mame/video/popeye.cpp",
- MAME_DIR .. "src/mame/drivers/mario.cpp",
- MAME_DIR .. "src/mame/includes/mario.h",
- MAME_DIR .. "src/mame/video/mario.cpp",
- MAME_DIR .. "src/mame/audio/mario.cpp",
+ MAME_DIR .. "src/mame/drivers/mario.cpp",
+ MAME_DIR .. "src/mame/includes/mario.h",
+ MAME_DIR .. "src/mame/video/mario.cpp",
+ MAME_DIR .. "src/mame/audio/mario.cpp",
MAME_DIR .. "src/mame/drivers/m62.cpp",
MAME_DIR .. "src/mame/includes/m62.h",
@@ -133,6 +146,7 @@ files{
MAME_DIR .. "src/mame/audio/irem.h",
MAME_DIR .. "src/mame/audio/nl_kidniki.cpp",
MAME_DIR .. "src/mame/audio/nl_kidniki.h",
+
}
end
diff --git a/scripts/target/mame/tiny.lua b/scripts/target/mame/tiny.lua
index 0e770933bef..129e276e208 100644
--- a/scripts/target/mame/tiny.lua
+++ b/scripts/target/mame/tiny.lua
@@ -139,8 +139,6 @@ files{
MAME_DIR .. "src/mame/audio/williams.cpp",
MAME_DIR .. "src/mame/audio/williams.h",
MAME_DIR .. "src/mame/video/williams.cpp",
- MAME_DIR .. "src/mame/audio/gorf.cpp",
- MAME_DIR .. "src/mame/audio/wow.cpp",
MAME_DIR .. "src/mame/drivers/gaelco.cpp",
MAME_DIR .. "src/mame/includes/gaelco.h",
MAME_DIR .. "src/mame/video/gaelco.cpp",
diff --git a/src/devices/bus/a7800/a78_slot.cpp b/src/devices/bus/a7800/a78_slot.cpp
index 4bf77f178ae..a9208c91764 100644
--- a/src/devices/bus/a7800/a78_slot.cpp
+++ b/src/devices/bus/a7800/a78_slot.cpp
@@ -432,7 +432,7 @@ image_init_result a78_cart_slot_device::call_load()
m_type = A78_ABSOLUTE;
// (for now) mirror ram implies no bankswitch format is used
else if ((mapper & 0x0080) == 0x0080)
- m_type = A78_TYPE8;
+ m_type = A78_TYPE8;
logerror("Cart type: 0x%x\n", m_type);
diff --git a/src/devices/bus/amiga/zorro/buddha.cpp b/src/devices/bus/amiga/zorro/buddha.cpp
index 87a1f0e9a90..bbfe7adf82b 100644
--- a/src/devices/bus/amiga/zorro/buddha.cpp
+++ b/src/devices/bus/amiga/zorro/buddha.cpp
@@ -6,19 +6,19 @@
Zorro-II IDE controller
- The 'speed' register is used to select the IDE timing according to
- the following table (bits 7-5 are used):
-
- 0 497ns 7c to select, IOR/IOW after 172ns 2c
- 1 639ns 9c to select, IOR/IOW after 243ns 3c
- 2 781ns 11c to select, IOR/IOW after 314ns 4c
- 3 355ns 5c to select, IOR/IOW after 101ns 1c
- 4 355ns 5c to select, IOR/IOW after 172ns 2c
- 5 355ns 5c to select, IOR/IOW after 243ns 3c
- 6 1065ns 15c to select, IOR/IOW after 314ns 4c
- 7 355ns 5c to select, IOR/IOW after 101ns 1c
-
- c = clock cycles. This isn't emulated.
+ The 'speed' register is used to select the IDE timing according to
+ the following table (bits 7-5 are used):
+
+ 0 497ns 7c to select, IOR/IOW after 172ns 2c
+ 1 639ns 9c to select, IOR/IOW after 243ns 3c
+ 2 781ns 11c to select, IOR/IOW after 314ns 4c
+ 3 355ns 5c to select, IOR/IOW after 101ns 1c
+ 4 355ns 5c to select, IOR/IOW after 172ns 2c
+ 5 355ns 5c to select, IOR/IOW after 243ns 3c
+ 6 1065ns 15c to select, IOR/IOW after 314ns 4c
+ 7 355ns 5c to select, IOR/IOW after 101ns 1c
+
+ c = clock cycles. This isn't emulated.
***************************************************************************/
diff --git a/src/devices/bus/apricot/keyboard/hle.cpp b/src/devices/bus/apricot/keyboard/hle.cpp
index d0f4eaa41a4..ff2f9ffe28e 100644
--- a/src/devices/bus/apricot/keyboard/hle.cpp
+++ b/src/devices/bus/apricot/keyboard/hle.cpp
@@ -4,6 +4,11 @@
ACT Apricot Keyboard (HLE)
+ TODO:
+ - MicroScreen emulation
+ - Mouse emulation
+ - LEDs
+
Keyboard to System:
- 01-60: Key make codes
- 70-7f: Mouse codes
@@ -308,6 +313,11 @@ void apricot_keyboard_hle_device::received_byte(uint8_t byte)
break;
+ case CMD_KEYBOARD_RESET:
+ logerror("System requests keyboard reset\n");
+ transmit_byte(ACK_DIAGNOSTICS);
+ break;
+
default:
logerror("Unhandled command: %02x\n", byte);
}
diff --git a/src/devices/bus/apricot/keyboard/hle.h b/src/devices/bus/apricot/keyboard/hle.h
index e1cef569472..cc8369d19d0 100644
--- a/src/devices/bus/apricot/keyboard/hle.h
+++ b/src/devices/bus/apricot/keyboard/hle.h
@@ -57,7 +57,12 @@ private:
enum {
CMD_REQ_TIME_AND_DATE = 0xe1,
- CMD_SET_TIME_AND_DATE = 0xe4
+ CMD_SET_TIME_AND_DATE = 0xe4,
+ CMD_KEYBOARD_RESET = 0xe8
+ };
+
+ enum {
+ ACK_DIAGNOSTICS = 0xfb
};
int m_rtc_index;
diff --git a/src/devices/bus/c64/magic_voice.cpp b/src/devices/bus/c64/magic_voice.cpp
index 078ca95e804..a3a8353494e 100644
--- a/src/devices/bus/c64/magic_voice.cpp
+++ b/src/devices/bus/c64/magic_voice.cpp
@@ -49,7 +49,7 @@ http://www.stefan-uhlmann.de/cbm/MVM/index.html
#define T6721A_TAG "u5"
#define MOS6525_TAG "u2"
-#define CMOS40105_TAG "u1"
+#define CD40105_TAG "u1"
#define A12 BIT(offset, 12)
#define A13 BIT(offset, 13)
@@ -226,7 +226,9 @@ static MACHINE_CONFIG_FRAGMENT( c64_magic_voice )
MCFG_TPI6525_OUT_PB_CB(WRITE8(c64_magic_voice_cartridge_device, tpi_pb_w))
MCFG_TPI6525_OUT_CA_CB(WRITELINE(c64_magic_voice_cartridge_device, tpi_ca_w))
MCFG_TPI6525_OUT_CA_CB(WRITELINE(c64_magic_voice_cartridge_device, tpi_cb_w))
- MCFG_40105_ADD(CMOS40105_TAG, DEVWRITELINE(MOS6525_TAG, tpi6525_device, i3_w), NOOP)
+
+ MCFG_DEVICE_ADD(CD40105_TAG, CD40105, 0)
+ MCFG_40105_DATA_IN_READY_CB(DEVWRITELINE(MOS6525_TAG, tpi6525_device, i3_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD(T6721A_TAG, T6721A, XTAL_640kHz)
@@ -265,7 +267,7 @@ c64_magic_voice_cartridge_device::c64_magic_voice_cartridge_device(const machine
device_c64_expansion_card_interface(mconfig, *this),
m_vslsi(*this, T6721A_TAG),
m_tpi(*this, MOS6525_TAG),
- m_fifo(*this, CMOS40105_TAG),
+ m_fifo(*this, CD40105_TAG),
m_exp(*this, C64_EXPANSION_SLOT_TAG), m_ca(0),
m_tpi_pb(0x60),
m_tpi_pc6(1),
diff --git a/src/devices/bus/coco/coco_t4426.cpp b/src/devices/bus/coco/coco_t4426.cpp
index 4a1185e1d0c..601e6887413 100644
--- a/src/devices/bus/coco/coco_t4426.cpp
+++ b/src/devices/bus/coco/coco_t4426.cpp
@@ -71,7 +71,7 @@
#define UART_TAG "acia"
#define PIA_TAG "pia"
-#define CARTSLOT_TAG "t4426"
+#define CARTSLOT_TAG "t4426"
/***************************************************************************
IMPLEMENTATION
@@ -85,8 +85,8 @@ MACHINE_CONFIG_END
ROM_START( coco_t4426 )
ROM_REGION(0x8000, CARTSLOT_TAG, ROMREGION_ERASE00)
- // First of 8 banked ROM:s TODO: Add the banking and the other ROM:s
- ROM_LOAD("tercoED4426-0-8549-5.3.bin", 0x0000, 0x2000, CRC(45665428) SHA1(ff49a79275772c4c4ab1ae29db662c9b10a744a7))
+ // First of 8 banked ROM:s TODO: Add the banking and the other ROM:s
+ ROM_LOAD("tercoED4426-0-8549-5.3.bin", 0x0000, 0x2000, CRC(45665428) SHA1(ff49a79275772c4c4ab1ae29db662c9b10a744a7))
// Main cartridge ROM
ROM_LOAD("tercoPMOS4426-8549-4.31.bin", 0x2000, 0x1000, CRC(bc65c45c) SHA1(e50cfd1d61e29fe05eb795d8bf6303e7b91ed8e5))
diff --git a/src/devices/bus/vme/vme.cpp b/src/devices/bus/vme/vme.cpp
new file mode 100644
index 00000000000..381b7e3075e
--- /dev/null
+++ b/src/devices/bus/vme/vme.cpp
@@ -0,0 +1,411 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/*
+ * vme.cpp
+ *
+ * The Versabus-E was standardized as the VME bus by VITA 1981 for Europe
+ * in the single or double Euroboard form factor. Several standard revs has
+ * been approved since then up until recently and the VME64 revision.
+ *
+ * This bus driver starts with Versabus and VME rev C.
+ * http://bitsavers.informatik.uni-stuttgart.de/pdf/motorola/versabus/M68KVBS_VERSAbus_Specification_Manual_Jul81.pdf
+ *
+ * Acronymes from the specification
+ * ---------------------------------
+ * BACKPLANE - A printed circuit board which provides the interconnection path
+ between other printed circuit cards.
+ SLOT - A single position at which a card may be inserted into the backplane.
+ One slot may consist of more than one edge connector.
+ BOARD/CARD - Interchangeable terms representing one printed circuit board capable
+ of being inserted into the backplane and containing a collection of
+ electronic components.
+ MODULE - A collection of electronic components with a single functional
+ purpose. More than one module may exist on the same card, but one
+ module should never be spread over multiple cards.
+ MASTER - A functional module capable of initiating data bus transfers.
+ REQUESTER - A functional module capable of requesting control of the data
+ transfer bus.
+ INTERRUPT - A functional module capable of detecting interrupt requests
+ HANDLER and initiating appropriate responses.
+ MASTER - The combination of a MASTER, REQUESTER, INTERRUPT HANDLER, and
+ SUB-SYSTEM (optionally) an INTERRUPTER, which function together and which
+ must be on the same card.
+
+ NOTE! All MASTERS, REQUESTERS, and INTERRUPT HANDLERS must be pieces of a
+ MASTER SUB-SYSTEM.
+
+ SLAVE - A functional module capable of responding to data transfer
+ operations generated by a MASTER.
+ INTERRUPTER - A functional module capable of requesting service from a MASTER
+ SUB-SYSTEM by generating an interrupt request.
+ SLAVE - The combination of a SLAVE and INTERRUPTER which function together
+ SUB-SYSTEM and which must be on the same card.
+
+ NOTE! All INTERRUPTERS must be part of either SLAVE SUB-SYSTEMS or MASTER
+ SUB-SYSTEMS. However, SLAVES may exist as stand-alone elements.
+ Such SLAVES will never be called SLAVE SUB-SYSTEMS.
+
+ CONTROLLER - The combination of modules used to provide utility and emergency
+ SUB-SYSTEM signals for the VERSAbus. There will always be one and only one
+ CONTROLLER SUB-SYSTEM. It can contain the following functional
+ modules:
+
+ a. Data Transfer Bus ARBITER
+ b. Emergency Data Transfer Bus REQUESTER
+ c. Power up/power down MASTER
+ d. System clock driver
+ e. System reset driver
+ f. System test controller
+ g. Power monitor (for AC clock and AC fail driver)
+
+ In any VERSAbus system, only one each of the above functional modules will exist.
+ The slot numbered Al is designated as the controller sub-system slot because the
+ user will typically provide modules a through d on the board residing in this
+ slot. System reset and the system test controller are typically connected to
+ an operator control panel and may be located elsewhere. The power monitor is
+ interfaced to the incoming AC power source and may also be located remotely.
+*/
+
+#include "emu.h"
+#include "vme.h"
+#include "bus/vme/mzr8105.h"
+#include "bus/vme/mzr8300.h"
+
+#define LOG_GENERAL 0x01
+#define LOG_SETUP 0x02
+#define LOG_PRINTF 0x04
+
+#define VERBOSE 0 //(LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+
+#define logerror printf // logerror is not available here
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type VME_P1_SLOT = &device_creator<vme_p1_slot_device>;
+
+//-------------------------------------------------
+// vme_p1_slot_device - constructor
+//-------------------------------------------------
+vme_p1_slot_device::vme_p1_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_P1_SLOT, "VME_P1_SLOT", tag, owner, clock, "vme_p1_slot", __FILE__)
+ ,device_slot_interface(mconfig, *this)
+ ,m_vme_p1_tag(nullptr)
+ ,m_vme_p1_slottag(nullptr)
+ ,m_vme_j1_callback(*this)
+{
+ LOG("%s %s\n", tag, FUNCNAME);
+}
+
+vme_p1_slot_device::vme_p1_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source),
+ device_slot_interface(mconfig, *this)
+ ,m_vme_p1_tag(nullptr)
+ ,m_vme_p1_slottag(nullptr)
+ ,m_vme_j1_callback(*this)
+{
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+void vme_p1_slot_device::static_set_vme_p1_slot(device_t &device, const char *tag, const char *slottag)
+{
+ LOG("%s %s - %s\n", FUNCNAME, tag, slottag);
+ vme_p1_slot_device &vme_card = dynamic_cast<vme_p1_slot_device&>(device);
+ vme_card.m_vme_p1_tag = tag;
+ vme_card.m_vme_p1_slottag = slottag;
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+void vme_p1_slot_device::device_start()
+{
+ device_vme_p1_card_interface *dev = dynamic_cast<device_vme_p1_card_interface *>(get_card_device());
+ LOG("%s %s - %s:%s\n", tag(), FUNCNAME, m_vme_p1_tag, m_vme_p1_slottag);
+ if (dev) device_vme_p1_card_interface::static_set_vme_p1_tag(*dev, m_vme_p1_tag, m_vme_p1_slottag);
+
+ // m_card = dynamic_cast<device_vme_p1_card_interface *>(get_card_device());
+}
+
+//-------------------------------------------------
+// device_config_complete - perform any
+// operations now that the configuration is
+// complete
+//-------------------------------------------------
+void vme_p1_slot_device::device_config_complete()
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+}
+
+//-------------------------------------------------
+// P1 D8 read
+//-------------------------------------------------
+READ8_MEMBER(vme_p1_slot_device::read8)
+{
+ uint16_t result = 0x00;
+ LOG("%s %s\n", tag(), FUNCNAME);
+ // printf("%s %s\n", tag(), FUNCNAME);
+ // if (m_card) result = m_card->read8(space, offset);
+ return result;
+}
+
+//-------------------------------------------------
+// P1 D8 write
+//-------------------------------------------------
+WRITE8_MEMBER(vme_p1_slot_device::write8)
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+ // printf("%s %s\n", tag(), FUNCNAME);
+ // if (m_card) m_card->write8(space, offset, data);
+}
+
+SLOT_INTERFACE_START( vme_p1_slot1 )
+ SLOT_INTERFACE("mzr8105", VME_MZR8105)
+SLOT_INTERFACE_END
+
+SLOT_INTERFACE_START( vme_p1_slots )
+ SLOT_INTERFACE("mzr8105", VME_MZR8105)
+ SLOT_INTERFACE("mzr8300", VME_MZR8300)
+SLOT_INTERFACE_END
+
+//
+// VME device P1
+//
+
+const device_type VME_P1 = &device_creator<vme_p1_device>;
+
+vme_p1_device::vme_p1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_P1, "VME_P1", tag, owner, clock, "vme_p1", __FILE__)
+{
+}
+
+vme_p1_device::vme_p1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source)
+{
+}
+
+vme_p1_device::~vme_p1_device()
+{
+ m_device_list.detach_all();
+}
+
+void vme_p1_device::device_start()
+{
+}
+
+void vme_p1_device::device_reset()
+{
+}
+
+void vme_p1_device::add_vme_p1_card(device_vme_p1_card_interface *card)
+{
+ m_device_list.append(*card);
+}
+
+void vme_p1_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask)
+{
+ cpu_device *m_maincpu = machine().device<cpu_device>("maincpu");
+
+ int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width;
+ LOG("%s width:%d\n", FUNCNAME, buswidth);
+ switch(buswidth)
+ {
+ case 32:
+ logerror("A32:D8 handler requires a P2 connector - not implemented yet\n");
+ break;
+ case 24:
+ m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask);
+ break;
+ case 16:
+ m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0xffff));
+ break;
+ default:
+ fatalerror("VME_P1 D8: Bus width %d not supported\n", buswidth);
+ }
+}
+
+void vme_p1_device::install_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask)
+{
+ cpu_device *m_maincpu = machine().device<cpu_device>("maincpu");
+ int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width;
+ LOG("%s width:%d\n", FUNCNAME, buswidth);
+ switch(buswidth)
+ {
+ case 32:
+ logerror("A32:D16 handler requires a P2 connector - not implemented yet\n");
+ break;
+ case 24:
+ m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask);
+ break;
+ case 16:
+ m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0xffff));
+ break;
+ default:
+ fatalerror("VME_P1 D16: Bus width %d not supported\n", buswidth);
+ }
+}
+
+void vme_p1_device::install_device(offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask)
+{
+ cpu_device *m_maincpu = machine().device<cpu_device>("maincpu");
+ int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width;
+ LOG("%s width:%d\n", FUNCNAME, buswidth);
+ switch(buswidth)
+ {
+ case 32:
+ logerror("A32:D32 handler requires a P2 connector - not implemented yet\n");
+ break;
+ case 24:
+ logerror("A24:D32 handler requires a P2 connector - not implemented yet\n");
+ // m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask);
+ break;
+ case 16:
+ logerror("A16:D32 handler requires a P2 connector - not implemented yet\n");
+ // m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, (uint16_t)(mask & 0xffff));
+ break;
+ default:
+ fatalerror("VME_P1 D32: Bus width %d not supported\n", buswidth);
+ }
+}
+
+//
+// Card interface
+//
+device_vme_p1_card_interface::device_vme_p1_card_interface(const machine_config &mconfig, device_t &device)
+ : device_slot_card_interface(mconfig, device)
+ ,m_vme_p1(nullptr)
+ ,m_vme_p1_tag(nullptr)
+ ,m_vme_p1_slottag(nullptr)
+ ,m_slot(0)
+ ,m_next(nullptr)
+{
+ m_device = &device;
+ LOG("%s %s\n", m_device->tag(), FUNCNAME);
+}
+
+device_vme_p1_card_interface::~device_vme_p1_card_interface()
+{
+ LOG("%s %s\n", m_device->tag(), FUNCNAME);
+}
+
+void device_vme_p1_card_interface::static_set_vme_p1_tag(device_t &device, const char *tag, const char *slottag)
+{
+ device_vme_p1_card_interface &vme_p1_card = dynamic_cast<device_vme_p1_card_interface &>(device);
+ vme_p1_card.m_vme_p1_tag = tag;
+ vme_p1_card.m_vme_p1_slottag = slottag;
+}
+
+void device_vme_p1_card_interface::set_vme_p1_device()
+{
+ LOG("%s %s\n", m_device->tag(), FUNCNAME);
+ m_vme_p1 = dynamic_cast<vme_p1_device *>(device().machine().device(m_vme_p1_tag));
+ // printf("*** %s %sfound\n", m_vme_p1_tag, m_vme_p1 ? "" : "not ");
+ if (m_vme_p1) m_vme_p1->add_vme_p1_card(this);
+}
+
+/* VME D8 accesses */
+READ8_MEMBER(device_vme_p1_card_interface::read8)
+{
+ uint8_t result = 0x00;
+ LOG("%s %s Offset:%08x\n", m_device->tag(), FUNCNAME, offset);
+ return result;
+}
+
+WRITE8_MEMBER(device_vme_p1_card_interface::write8)
+{
+ LOG("%s %s Offset:%08x\n", m_device->tag(), FUNCNAME, offset);
+}
+
+//--------------- P2 connector below--------------------------
+#if 0
+/*
+The VME P2 connector only specifies the mid row B of the connector
+and leaves row A and C to be system specific. This has resulted in
+a number of variants that has been more or less standardized:
+
+- VMXbus was available on the first VME boards but not standardized hence
+an almost compatible variant was developed by Motorola called MVMX32bus.
+- VSBbus replaced VMX and MVMX32and was approved by IEEE in 1988
+- SCSA is a P2 standardization for telephony voice and facsimile applications
+- SkyChannel is packet switched P2 architecture from Sky Computers and standardized
+through VITA/VSO.
+- RACEway is a 40Mhz P2 bus allowing 480MBps throughput from Mercusry Computers and
+standardized through VITA/VSO.
+- VME64 adds two more rows, called 'z' and 'd', of user defined pins to the P2 connector
+- P2CI adds a PCI bus onto a VME64 P2 connector
+
+URL:s
+http://rab.ict.pwr.wroc.pl/dydaktyka/supwa/vme/secbuses.html
+http://www.interfacebus.com/Design_Connector_VME_P2_Buses.html
+
+TODO: Figure out a good way to let all these variants coexist and interconnect in a VME system
+
+*/
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type VME_P2_SLOT = &device_creator<vme_p2_slot_device>;
+
+//-------------------------------------------------
+// vme_p2_slot_device - constructor
+//-------------------------------------------------
+vme_p2_slot_device::vme_p2_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_P2_SLOT, "VME P2 connector", tag, owner, clock, "vme_p2_connector", __FILE__),
+ device_slot_interface(mconfig, *this),
+ m_vme_j2_callback(*this)
+{
+}
+
+void vme_p2_slot_device::device_start()
+{
+ m_vme_p2 = dynamic_cast<device_vme_p2_interface *>(get_card_device());
+}
+
+//-------------------------------------------------
+// device_config_complete - perform any
+// operations now that the configuration is
+// complete
+//-------------------------------------------------
+
+void vme_p2_slot_device::device_config_complete()
+{
+ // set brief and instance name
+ update_names();
+}
+
+//-------------------------------------------------
+// P2 read
+//-------------------------------------------------
+READ32_MEMBER(vme_p2_slot_device::write32)
+{
+ uint8_t result = 0x00;
+ if (m_vme_p2)
+ result = m_vme_p2->read32(space, offset);
+ return result;
+}
+
+//-------------------------------------------------
+// P2 write
+//-------------------------------------------------
+WRITE32_MEMBER(vme_p2_slot_device::read32)
+{
+ if (m_vme_p2)
+ m_vme_p2->write32(space, offset, data);
+}
+#endif
diff --git a/src/devices/bus/vme/vme.h b/src/devices/bus/vme/vme.h
new file mode 100644
index 00000000000..8c22c828ae5
--- /dev/null
+++ b/src/devices/bus/vme/vme.h
@@ -0,0 +1,426 @@
+// license:BSD-3-Clause
+// copyright-holders: Joakim Larsson Edstrom
+
+/*
+ * vme.h
+ *
+ * VME bus system
+ *
+ * Pinout: (from http://pinouts.ru/Slots/vmebus_pinout.shtml)
+
+ P1/J1 P2/J2 (optional for 32 bit)
+ +-A-B-C--+ A B C +-A-B-C--+ A B C
+ 01 | [][][] | D00 BBSY* D08 | [][][] | n/a +5v n/a
+ 02 | [][][] | D01 BCLR* D09 | [][][] | n/a GROUND n/a
+ 03 | [][][] | D02 ACFAIL* D10 | [][][] | n/a RESERVED n/a
+ 04 | [][][] | D03 BG0IN* D11 | [][][] | n/a A24 n/a
+ 05 | [][][] | D04 BG0OUT* D12 | [][][] | n/a A25 n/a
+ 06 | [][][] | D05 BG1IN* D13 | [][][] | n/a A26 n/a
+ 07 | [][][] | D06 BG1OUT* D14 | [][][] | n/a A27 n/a
+ 08 | [][][] | D07 BG2IN* D15 | [][][] | n/a A28 n/a
+ 09 | [][][] | GROUND BG2OUT* GROUND | [][][] | n/a A29 n/a
+ 10 | [][][] | SYSCLK BG3IN* SYSFAIL* | [][][] | n/a A30 n/a
+ 11 | [][][] | GROUND BG3OUT* BERR* | [][][] | n/a A31 n/a
+ 12 | [][][] | DS1* BR0* SYSRESET* | [][][] | n/a GROUND n/a
+ 13 | [][][] | DS0* BR1* LWORD* | [][][] | n/a +5v n/a
+ 14 | [][][] | WRITE* BR2* AM5 | [][][] | n/a D16 n/a
+ 15 | [][][] | GROUND BR3* A23 | [][][] | n/a D17 n/a
+ 16 | [][][] | DTACK* AM0 A22 | [][][] | n/a D18 n/a
+ 17 | [][][] | GROUND AM1 A21 | [][][] | n/a D19 n/a
+ 18 | [][][] | AS* AM2 A20 | [][][] | n/a D20 n/a
+ 19 | [][][] | GROUND AM3 A19 | [][][] | n/a D21 n/a
+ 20 | [][][] | IACK* GROUND A18 | [][][] | n/a D22 n/a
+ 21 | [][][] | IACKIN* SERCLK* A17 | [][][] | n/a D23 n/a
+ 22 | [][][] | IACKOUT* SERDAT* A16 | [][][] | n/a GROUND n/a
+ 23 | [][][] | AM4 GROUND A15 | [][][] | n/a D24 n/a
+ 24 | [][][] | A07 IRQ7* A14 | [][][] | n/a D25 n/a
+ 25 | [][][] | A06 IRQ6* A13 | [][][] | n/a D26 n/a
+ 26 | [][][] | A05 IRQ5* A12 | [][][] | n/a D27 n/a
+ 27 | [][][] | A04 IRQ4* A11 | [][][] | n/a D28 n/a
+ 28 | [][][] | A03 IRQ3* A10 | [][][] | n/a D29 n/a
+ 29 | [][][] | A02 IRQ2* A09 | [][][] | n/a D30 n/a
+ 30 | [][][] | A01 IRQ1* A08 | [][][] | n/a D31 n/a
+ 31 | [][][] | -12v +5v STDBY +12v | [][][] | n/a GROUND n/a
+ 32 | [][][] | +5v +5v +5v | [][][] | n/a +5v n/a
+
+ */
+
+#ifndef VME_H_
+#define VME_H_
+
+#pragma once
+
+#include "emu.h"
+
+//**************************************************************************
+// CONSTANTS
+//**************************************************************************
+
+#define VME_BUS_TAG "vme"
+
+// Callbacks to the board from the VME bus comes through here
+#define MCFG_VME_J1_CB(_devcb) \
+ devcb = &vme_p1_slot_device::static_set_vme_j1_callback(*device, DEVCB_##_devcb);
+
+SLOT_INTERFACE_EXTERN(vme_p1_slot1);
+SLOT_INTERFACE_EXTERN(vme_p1_slots);
+
+class device_vme_p1_card_interface; // This interface is standardized
+
+class vme_p1_slot_device : public device_t,
+ public device_slot_interface
+{
+public:
+ // VME BUS signals driven to or drived by the VME bus
+ enum class control
+ {
+ AS,
+ DS0,
+ DS1,
+ BERR,
+ DTACK,
+ WRITE
+ };
+
+ enum class address
+ {
+ DS0,
+ DS1,
+ LWORD
+ };
+
+ // construction/destruction
+ vme_p1_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ vme_p1_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ template<class _Object> static devcb_base &static_set_vme_j1_callback(device_t &device, _Object object) { return downcast<vme_p1_slot_device &>(device).m_vme_j1_callback.set_callback(object); }
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_config_complete() override;
+
+ static void static_set_vme_p1_slot(device_t &device, const char *tag, const char *slottag);
+ // configuration
+ const char *m_vme_p1_tag, *m_vme_p1_slottag;
+
+ virtual DECLARE_READ8_MEMBER(read8);
+ virtual DECLARE_WRITE8_MEMBER(write8);
+
+ // callbacks
+ devcb_write_line m_vme_j1_callback;
+ device_vme_p1_card_interface *m_card;
+private:
+};
+
+extern const device_type VME_P1;
+
+#define MCFG_VME_P1_DEVICE_ADD(_tag) \
+ MCFG_DEVICE_ADD(_tag, VME_P1, 0)
+
+class vme_p1_card_interface;
+
+class vme_p1_device : public device_t
+{
+public:
+ vme_p1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme_p1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ ~vme_p1_device();
+
+ void add_vme_p1_card(device_vme_p1_card_interface *card);
+ void install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask);
+ void install_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask);
+ void install_device(offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask);
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+ simple_list<device_vme_p1_card_interface> m_device_list;
+};
+
+
+
+// device type definition
+extern const device_type VME_P1_SLOT;
+
+class device_vme_p1_card_interface : public device_slot_card_interface
+{
+public:
+ // construction/destruction
+ device_vme_p1_card_interface(const machine_config &mconfig, device_t &device);
+ virtual ~device_vme_p1_card_interface();
+ void set_vme_p1_device();
+
+ virtual DECLARE_READ8_MEMBER(read8);
+ virtual DECLARE_WRITE8_MEMBER(write8);
+ device_t *m_device;
+
+ // inline configuration
+ static void static_set_vme_p1_tag(device_t &device, const char *tag, const char *slottag);
+ vme_p1_device *m_vme_p1;
+ const char *m_vme_p1_tag, *m_vme_p1_slottag;
+ int m_slot;
+ device_vme_p1_card_interface *m_next;
+
+ //
+ // Address Modifiers
+ //
+ /* There are 6 address modifier lines. They allow the MASTER to pass additional binary
+ information to the SLAVE during data transfers. Table 2-3 lists all of the 64 possible
+ address modifier (AM) codes and classifies each into one of three categories:
+ - Defined
+ - Reserved
+ - User defined
+ The defined address modifier codes can be further classified into three categories:
+ Short addressing AM codes indicate that address lines A02-A15 are being used to select a BYTE(0-3) group.
+ Standard addressing AM codes ,indicate that address lines A02-A23 are being used to select a BYTE(0-3) group.
+ Extended addressing AM codes indicate that address lines A02-A31 are being used to select a BYTE(0-3) group.*/
+ enum
+ { // Defined and User Defined Address Modifier Values, The rest us Reserved between 0x00 and 0x3F
+ AMOD_EXTENDED_NON_PRIV_DATA = 0x09,
+ AMOD_EXTENDED_NON_PRIV_PRG = 0x0A,
+ AMOD_EXTENDED_NON_PRIV_BLK = 0x0B,
+ AMOD_EXTENDED_SUPERVIS_DATA = 0x0D,
+ AMOD_EXTENDED_SUPERVIS_PRG = 0x0E,
+ AMOD_EXTENDED_SUPERVIS_BLK = 0x0F,
+ AMOD_USER_DEFINED_FIRST = 0x10,
+ AMOD_USER_DEFINED_LAST = 0x1F,
+ AMOD_SHORT_NON_PRIV_ACCESS = 0x29,
+ AMOD_SHORT_SUPERVIS_ACCESS = 0x2D,
+ AMOD_STANDARD_NON_PRIV_DATA = 0x39,
+ AMOD_STANDARD_NON_PRIV_PRG = 0x3A,
+ AMOD_STANDARD_NON_PRIV_BLK = 0x3B,
+ AMOD_STANDARD_SUPERVIS_DATA = 0x3D,
+ AMOD_STANDARD_SUPERVIS_PRG = 0x3E,
+ AMOD_STANDARD_SUPERVIS_BLK = 0x3F
+ };
+};
+
+SLOT_INTERFACE_EXTERN(vme_p1_slot1);
+
+#define MCFG_VME_P1_SLOT_ADD(_tag, _slot_tag, _slot_intf,_def_slot) \
+ MCFG_DEVICE_ADD(_slot_tag, VME_P1_SLOT, 0) \
+ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
+ vme_p1_slot_device::static_set_vme_p1_slot(*device, _tag, _slot_tag);
+
+#define MCFG_VME_P1_SLOT_REMOVE(_tag) \
+ MCFG_DEVICE_REMOVE(_tag)
+
+
+#if 0
+// Callbacks to the board from the VME bus comes through here
+#define MCFG_VME_J2_CB(_devcb) \
+ devcb = &vme_p2_slot_device::static_set_j2_callback(*device, DEVCB_##_devcb);
+
+class device_vme_p2_interface; // This interface often has custom/propritary A and C rows
+
+class vme_p2_slot_device : public device_t,
+ public device_slot_interface
+{
+public:
+
+ // construction/destruction
+ vme_p2_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ template<class _Object> static devcb_base &static_set_vme_j2_callback(device_t &device, _Object object) { return downcast<vme_p2_slot_device &>(device).m_vme_j2_callback.set_callback(object); }
+
+ // device-level overrides
+ virtual void device_start() override;
+
+ // callbacks
+ devcb_write_line m_vme_j2_callback;
+private:
+ device_vme_p2_interface *m_vme_p2;
+};
+
+// device type definition
+extern const device_type VME_P2_SLOT;
+
+class device_vme_p2_interface : public device_slot_card_interface
+{
+public:
+ // construction/destruction
+ device_vme_p2_interface(const machine_config &mconfig, device_t &device);
+ virtual ~device_vme_p2_interface();
+
+ virtual DECLARE_READ32_MEMBER(read32);
+ virtual DECLARE_WRITE32_MEMBER(write32);
+};
+
+#define MCFG_VME_P2_ADD(_tag,_slot_intf,_def_slot) \
+ MCFG_DEVICE_ADD(_tag, VME_P2_SLOT, 0) \
+ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
+
+#define MCFG_VME_P2_REMOVE(_tag) \
+ MCFG_DEVICE_REMOVE(_tag)
+#endif
+#if 0
+//**************************************************************************
+// INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+
+#define MCFG_VME16_SLOT_ADD(_vmetag, _tag, _slot_intf, _def_slot, _fixed) \
+ MCFG_DEVICE_ADD(_tag, VME16_SLOT, 0) \
+ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) \
+ vme16_slot_device::static_set_vme16_slot(*device, _vmetag, _tag);
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class device_vme16_card_interface;
+
+//
+// The VME device
+//
+class vme_device : public device_t
+,public device_memory_interface
+{
+public:
+ // construction/destruction
+ vme_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ // inline configuration
+ static void static_set_cputag(device_t &device, const char *tag);
+
+ void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler);
+ void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read16_delegate rhandler, write16_delegate whandler);
+ void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read32_delegate rhandler, write32_delegate whandler);
+ void install_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, uint8_t *data);
+ void unmap_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror);
+ void install_rom(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, const char *region);
+ void install_memory(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler);
+ void set_irq_line(int slot, int state);
+protected:
+ void install_space(address_spacenum spacenum, offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler);
+
+ // address spaces
+ address_space *m_prgspace;
+ int m_prgwidth;
+ bool m_allocspaces;
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // internal state
+ cpu_device *m_maincpu;
+ const address_space_config m_program16_config;
+ const address_space_config m_program24_config;
+ const address_space_config m_program32_config;
+};
+
+class vme16_device : public vme_device
+{
+ public:
+ vme16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme16_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override;
+
+ DECLARE_READ16_MEMBER ( vme_r );
+ DECLARE_WRITE16_MEMBER( vme_w );
+
+ void add_vme16_card(device_vme16_card_interface *card);
+};
+
+class vme24_device : public vme_device
+{
+ public:
+ vme24_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme24_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override;
+
+ DECLARE_READ16_MEMBER ( vme_r );
+ DECLARE_WRITE16_MEMBER( vme_w );
+
+ void add_vme24_card(device_vme16_card_interface *card);
+};
+
+class vme32_device : public vme_device
+{
+ public:
+ vme32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme32_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override;
+
+ DECLARE_READ32_MEMBER ( vme_r );
+ DECLARE_WRITE32_MEMBER( vme_w );
+
+ // void add_vme32_card(device_vme16_card_interface *card);
+};
+
+//
+// The SLOT device
+//
+class vme16_slot_device : public device_t,
+ public device_slot_interface
+{
+public:
+ // construction/destruction
+ vme16_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme16_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ virtual ~vme16_slot_device();
+
+ //template<class _Object> static devcb_base &set_out_irq2_callback(device_t &device, _Object object) { return downcast<vme16_slot_device &>(device).m_out_irq2_cb.set_callback(object); }
+
+ //DECLARE_WRITE_LINE_MEMBER( irq2_w );
+
+ // inline configuration
+ static void static_set_vme16_slot(device_t &device, const char *tag, const char *slottag);
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+protected:
+
+ // configuration
+ const char *m_vme16_tag, *m_vme16_slottag;
+
+ device_vme16_card_interface *m_slot;
+};
+
+
+// device type definition
+extern const device_type VME16_SLOT;
+extern const device_type VME16;
+extern const device_type VME24;
+extern const device_type VME32;
+
+//
+// The CARD device
+//
+class device_vme16_card_interface : public device_slot_card_interface
+{
+ friend class vme16_device;
+public:
+ // construction/destruction
+ device_vme16_card_interface(const machine_config &mconfig, device_t &device);
+ virtual ~device_vme16_card_interface();
+
+ device_vme16_card_interface *next() const { return m_next; }
+
+ void set_vme_device();
+
+ // inline configuration
+ static void static_set_vmebus(device_t &device, device_t *vme_device);
+public:
+ vme16_device *m_vme;
+ device_t *m_vme_dev;
+ device_vme16_card_interface *m_next;
+};
+
+#if 0
+ // reset
+ virtual void vme16_reset_w() { };
+
+};
+#endif
+#endif
+
+
+#endif /* VME_H_ */
diff --git a/src/devices/bus/vme/vme_mvme350.c b/src/devices/bus/vme/vme_mvme350.c
new file mode 100644
index 00000000000..69bbbe618d7
--- /dev/null
+++ b/src/devices/bus/vme/vme_mvme350.c
@@ -0,0 +1,257 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/***************************************************************************
+ *
+ * Motorola MVME-350 6U Intelligent Tape Controller driver, initially derived
+ * from hk68v10.c
+ *
+ * 31/08/2015
+ *
+ * I baught this board from http://www.retrotechnology.com without documentation.
+ * It has a Motorola 68010 CPU @ 10MHz, 128 Mb RAM and two 2764 EPROMS with
+ * QIC-02 tape controller firmware. The board also populates a 68230 PIT and loads
+ * of descrete TTL components.
+ *
+ *
+ * ||
+ * || ||
+ * ||||--||
+ * ||||--||
+ * || ||__________________________________________________________ ___
+ * ||_______________________________________________________ |_| |
+ * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | |
+ * || |______|________|_________|___________| ________| | | |
+ * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | |
+ * || |______|________|_________|___________| ________| | | |
+ * || |74LS02| 74LS08||Am25LS251| 74S38 |74LS20|Jumpers | | |
+ * || |______|_______||_________|_______|______|______| | |VME|
+ * || |74F04 | 74LS32||74LS374 | 74LS374 |74S244 | | | |
+ * ||+---+ |______|_______||_________|___________|_________| | |P1 |
+ * |||CON| |74F04 | 74LS85||74S244 | 74S240 |PAL | | | |
+ * ||| | |______|_______||_________|___________|_________| | | |
+ * ||| | |74LS04| | |74S244 | | | |
+ * ||| | |______| | PIT |_________| | | |
+ * ||| | |74LS125 | MC68230L10 |74LS145 | | | |
+ * ||| | |______| __|_______________________|---------| | | |
+ * ||| | |74LS74| |25LS251 | | RAM |74S244 | |_| |
+ * ||+---+ ---------- |---------- | HM6264P-12 |---------| |___|
+ * || | PAL | | 74245 | |______________|74S244 | |
+ * || +--------- |_________| | U40 27128 |---------| |
+ * || | 74F32 | | || System ROM |74LS682 | |
+ * Red || +-------- | CPU || |-+-------| |
+ * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| |
+ * Red || +-------- | || RAM | |74S38 | |
+ * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | |
+ * Green || +-------+ |74245 |+--------------+ |74F08 | |
+ * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___
+ * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| |
+ * |||CON|--------+___|__________|+--------------+_|_______| | | |
+ * ||| |74LS08 |74F74 |74LS148| |PAL | | PAL | | | |
+ * ||| |________|________|_______| |________|_|_________| | | |
+ * ||| | 74LS138|74F32 | PAL | |74F74 |Am29823 | | | |
+ * ||| |________|________|_______| |________|-+---------| | |VME|
+ * ||| | 74LS11 |74F04 |74LS374| |74LS374 | |74S240 | | | |
+ * ||| |________|________|_______| |________|_|---------| | |P2 |
+ * ||| | 74F138 |BLANK |74LS374| |74LS374 |74S240 | | | |
+ * ||| |________|________|_______| +----------+---------| | | |
+ * ||| | 74LS08 |74F32 |74LS11|74LS393|74LS393|resistors | | |
+ * ||| |________|________|______|______ |_______|________| | | |
+ * ||| |DM2585 |74F74 |DM2230| 74LS00| 74F02 |74F32 | | | |
+ * ||+---+--------+--------+------+-------+---------+------| | | |
+ * || |74LS74 |74F20 |74S260| 74S74 | 74F08 |74LS02| | | |
+ * || +------------------------------------------+------| | | |
+ * || |DM2353 |74F10 |74F32 | 74LS32| 74F08 |DM2353| |_| |
+ * || +------------------------------------------+------+-+ |___|
+ * || ||------------------------------------------------------------+-+
+ * ||||--||
+ * ||||--||
+ * ||
+ *
+ * History of Motorola VME division (https://en.wikipedia.org/wiki/VMEbus)
+ *---------------------------------
+ * When Motorola released the 68000 processor 1979 the ambition of the deisgners
+ * was also to standardize a versatile CPU bus to be able to build computer
+ * systems without constructing PCB:s from scratch. This become VersaBus but the
+ * boards was really too big and the computer world already saw the systems shrink
+ * in size. Motorola's design center in Munich proposed to use the smaller and
+ * already used Euroboard form factor and call it Versabus-E. This later became
+ * VME which was standardized in the VITA organization 1981
+ *
+ * Misc links about Motorola VME division and this board:
+ * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf
+ *
+ * Description
+ * ------------
+ * Streaming Tape Controller released 1984 with the following feature set
+ *
+ * - Double High (6U) VMEmodule
+ * - QIC-02 Streaming Tape Interface
+ * - Supports One 01C-02 compatible 1/4-inch Streaming Tape Drive
+ * - Standard VMEbus Interface
+ * - Supports 24- or 32-bit DMA Addressing/16-bit Data
+ * - Generates Seven Levels of VMEbus Interrupts with Programmable Interrupt Vector
+ * - 10 MHz MC68010 Microprocessor
+ * - 90Kb/s Continuous Transfer Rate for QIC-02 Interface, 200Kb/s Burst rate
+ * - Controls Tape Cartridges Offering 20Mb, 45Mb and 60Mb of Formatted Data Storage
+ * - MC68230 PIT-based Timer
+ * - 16Kb of Static RAM Provides Buffer Storage and CPU Workspace
+ * - Multitasking Kernel-based Firmware Package
+ * - Buffered Pipe Communication Protocol Allows Multiple Hosts to Oueue Commands Without Interlock
+ * - High Level Command/Status Packets offer efficient Operating System Support
+ * - Permits Chaining of Host Command
+ *
+ * Address Map
+ * --------------------------------------------------------------------------
+ * Local to VME Decscription
+ * --------------------------------------------------------------------------
+ * 0x000000 Up to 128Kb System ROM with RESET vector
+ * 0x020000 RAM with vectors
+ * 0x020500 RAM Top of stack
+ * 0x040000 PIT device?
+ * 0x060000 RAM?
+ * 0x080000 PIT device?
+ * --------------------------------------------------------------------------
+ *
+ * Interrupt sources MVME
+ * ----------------------------------------------------------
+ * Description Device Lvl IRQ VME board
+ * /Board Vector Address
+ * ----------------------------------------------------------
+ * On board Sources
+ *
+ * Off board Sources (other VME boards)
+ *
+ * ----------------------------------------------------------
+ *
+ * DMAC Channel Assignments
+ * ----------------------------------------------------------
+ * Channel M10 V10
+ * ----------------------------------------------------------
+ *
+ *
+ * TODO:
+ * - Dump the ROMs (DONE)
+ * - Setup a working address map (STARTED)
+ * - Get documentation for VME interface
+ * - Add VME bus driver
+ * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147)
+ * - Get a tape file with a bootable data on it.
+ *
+ ****************************************************************************/
+
+#include "emu.h"
+#include "cpu/m68000/m68000.h"
+#include "machine/68230pit.h"
+
+#define LOG(x) x
+
+class mvme350_state : public driver_device
+{
+public:
+mvme350_state(const machine_config &mconfig, device_type type, const char *tag) :
+ driver_device (mconfig, type, tag),
+ m_maincpu (*this, "maincpu"),
+ m_pit(*this, "pit")
+{
+}
+
+DECLARE_READ16_MEMBER (vme_a24_r);
+DECLARE_WRITE16_MEMBER (vme_a24_w);
+DECLARE_READ16_MEMBER (vme_a16_r);
+DECLARE_WRITE16_MEMBER (vme_a16_w);
+virtual void machine_start ();
+virtual void machine_reset ();
+protected:
+
+private:
+ required_device<cpu_device> m_maincpu;
+ required_device<pit68230_device> m_pit;
+
+};
+
+static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state)
+ADDRESS_MAP_UNMAP_HIGH
+ AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */
+ AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */
+#if 1
+ AM_RANGE(0x040000, 0x040035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/
+ AM_RANGE(0x060000, 0x06001f) AM_RAM /* Area is cleared on start */
+ AM_RANGE(0x080000, 0x080035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/
+#endif
+//AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
+//AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
+ADDRESS_MAP_END
+
+/* Input ports */
+static INPUT_PORTS_START (mvme350)
+INPUT_PORTS_END
+
+/* Start it up */
+void mvme350_state::machine_start ()
+{
+ LOG (logerror ("machine_start\n"));
+}
+
+void mvme350_state::machine_reset ()
+{
+ LOG (logerror ("machine_reset\n"));
+}
+
+#if 0
+/* Dummy VME access methods until the VME bus device is ready for use */
+READ16_MEMBER (mvme350_state::vme_a24_r){
+ LOG (logerror ("vme_a24_r\n"));
+ return (uint16_t) 0;
+}
+
+WRITE16_MEMBER (mvme350_state::vme_a24_w){
+ LOG (logerror ("vme_a24_w\n"));
+}
+
+READ16_MEMBER (mvme350_state::vme_a16_r){
+ LOG (logerror ("vme_16_r\n"));
+ return (uint16_t) 0;
+}
+
+WRITE16_MEMBER (mvme350_state::vme_a16_w){
+ LOG (logerror ("vme_a16_w\n"));
+}
+#endif
+
+/*
+ * Machine configuration
+ */
+static MACHINE_CONFIG_START (mvme350, mvme350_state)
+ /* basic machine hardware */
+ MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz)
+ MCFG_CPU_PROGRAM_MAP (mvme350_mem)
+ /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */
+ MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2)
+
+MACHINE_CONFIG_END
+
+/* ROM definitions */
+ROM_START (mvme350)
+ROM_REGION (0x1000000, "maincpu", 0)
+
+ROM_LOAD16_BYTE ("mvme350U40v2.3.bin", 0x0000, 0x4000, CRC (bcef82ef) SHA1 (e6fdf26e4714cbaeb3e97d7b5acf02d64d8ad744))
+ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d0929dbfeb0cfda63df6b5bc29ee27fbf665def7))
+
+/*
+ * System ROM information
+ *
+ * The ROMs known commands from different sources:
+ *
+ * It communicates with the master through data buffers in shared memory and VME bus interrupts
+ * as desribed in
+ * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf
+ *
+ * The board is pretty boring as stand alone, it initializes everything and then executes a STOP instruction
+ * awaiting a CPU on the VME bus to request its services. However, it enables boot from tape devices, we just
+ * need a MVME-131 and a dump of a VersaDOS or Motorola UNIX System V system tape and some work.
+ */
+ROM_END
+
+/* Driver */
+/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
+COMP (1984, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index eb4de54e86d..884b22896cd 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -635,13 +635,7 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
rnv = (R15 & ADDRESS_MASK) - off;
}
- if (insn & INSN_SDT_W)
- {
- SetRegister(rn,rnv);
- if (ARM_DEBUG_CORE && rn == eR15)
- logerror("writeback R15 %08x\n", R15);
- }
- else if (rn == eR15)
+ if (rn == eR15)
{
rnv = rnv + 8;
}
@@ -685,7 +679,7 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
In other cases, 4 is subracted from R15 here to account for pipelining.
*/
- if ((cpu_read32(rnv)&3)==0)
+ if (m_copro_type == ARM_COPRO_TYPE_VL86C020 || (cpu_read32(rnv)&3)==0)
R15 -= 4;
m_icount -= S_CYCLE + N_CYCLE;
@@ -716,6 +710,18 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
}
}
+ /* Do pre-indexing writeback */
+ if ((insn & INSN_SDT_P) && (insn & INSN_SDT_W))
+ {
+ if ((insn & INSN_SDT_L) && rd == rn)
+ SetRegister(rn, GetRegister(rd));
+ else
+ SetRegister(rn, rnv);
+
+ if (ARM_DEBUG_CORE && rn == eR15)
+ logerror("writeback R15 %08x\n", R15);
+ }
+
/* Do post-indexing writeback */
if (!(insn & INSN_SDT_P)/* && (insn&INSN_SDT_W)*/)
{
diff --git a/src/devices/cpu/cop400/cop400.cpp b/src/devices/cpu/cop400/cop400.cpp
index fd0164f83a1..51af8f2cdff 100644
--- a/src/devices/cpu/cop400/cop400.cpp
+++ b/src/devices/cpu/cop400/cop400.cpp
@@ -150,7 +150,10 @@ static ADDRESS_MAP_START( program_2kb, AS_PROGRAM, 8, cop400_cpu_device )
ADDRESS_MAP_END
static ADDRESS_MAP_START( data_32b, AS_DATA, 8, cop400_cpu_device )
- AM_RANGE(0x00, 0x1f) AM_RAM
+ AM_RANGE(0x00, 0x07) AM_MIRROR(0x08) AM_RAM
+ AM_RANGE(0x10, 0x17) AM_MIRROR(0x08) AM_RAM
+ AM_RANGE(0x20, 0x27) AM_MIRROR(0x08) AM_RAM
+ AM_RANGE(0x30, 0x37) AM_MIRROR(0x08) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( data_64b, AS_DATA, 8, cop400_cpu_device )
@@ -173,6 +176,7 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
, m_program_config("program", ENDIANNESS_LITTLE, 8, program_addr_bits, 0, internal_map_program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, data_addr_bits, 0, internal_map_data) // data width is really 4
, m_read_l(*this)
+ , m_read_l_tristate(*this)
, m_write_l(*this)
, m_read_g(*this)
, m_write_g(*this)
@@ -231,17 +235,17 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
}
cop401_cpu_device::cop401_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : cop400_cpu_device(mconfig, COP401, "COP401", tag, owner, clock, "cop401", __FILE__, 9, 5, COP410_FEATURE, 0xf, 0xf, 0, false, false, nullptr, ADDRESS_MAP_NAME(data_32b))
+ : cop400_cpu_device(mconfig, COP401, "COP401", tag, owner, clock, "cop401", __FILE__, 9, 6, COP410_FEATURE, 0xf, 0xf, 0, false, false, nullptr, ADDRESS_MAP_NAME(data_32b))
{
}
cop410_cpu_device::cop410_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : cop400_cpu_device(mconfig, COP410, "COP410", tag, owner, clock, "cop410", __FILE__, 9, 5, COP410_FEATURE, 0xf, 0xf, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
+ : cop400_cpu_device(mconfig, COP410, "COP410", tag, owner, clock, "cop410", __FILE__, 9, 6, COP410_FEATURE, 0xf, 0xf, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
{
}
cop411_cpu_device::cop411_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : cop400_cpu_device(mconfig, COP411, "COP411", tag, owner, clock, "cop411", __FILE__, 9, 5, COP410_FEATURE, 0x7, 0x3, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
+ : cop400_cpu_device(mconfig, COP411, "COP411", tag, owner, clock, "cop411", __FILE__, 9, 6, COP410_FEATURE, 0x7, 0x3, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
{
}
@@ -901,6 +905,7 @@ void cop400_cpu_device::device_start()
/* find i/o handlers */
m_read_l.resolve_safe(0);
+ m_read_l_tristate.resolve_safe(0);
m_write_l.resolve_safe();
m_read_g.resolve_safe(0);
m_write_g.resolve_safe();
diff --git a/src/devices/cpu/cop400/cop400.h b/src/devices/cpu/cop400/cop400.h
index bace4710008..2f907afc933 100644
--- a/src/devices/cpu/cop400/cop400.h
+++ b/src/devices/cpu/cop400/cop400.h
@@ -20,6 +20,9 @@
cop400_cpu_device::set_read_l_callback(*device, DEVCB_##_devcb);
#define MCFG_COP400_WRITE_L_CB(_devcb) \
cop400_cpu_device::set_write_l_callback(*device, DEVCB_##_devcb);
+// output state when pins are in tri-state, default 0
+#define MCFG_COP400_READ_L_TRISTATE_CB(_devcb) \
+ cop400_cpu_device::set_read_l_tristate_callback(*device, DEVCB_##_devcb);
// G pins: 4-bit bi-directional
#define MCFG_COP400_READ_G_CB(_devcb) \
@@ -125,6 +128,7 @@ public:
// static configuration helpers
template<class _Object> static devcb_base &set_read_l_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_l.set_callback(object); }
+ template<class _Object> static devcb_base &set_read_l_tristate_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_l_tristate.set_callback(object); }
template<class _Object> static devcb_base &set_write_l_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_l.set_callback(object); }
template<class _Object> static devcb_base &set_read_g_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_g.set_callback(object); }
template<class _Object> static devcb_base &set_write_g_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_g.set_callback(object); }
@@ -176,6 +180,7 @@ protected:
// i/o handlers
devcb_read8 m_read_l;
+ devcb_read8 m_read_l_tristate;
devcb_write8 m_write_l;
devcb_read8 m_read_g;
devcb_write8 m_write_g;
diff --git a/src/devices/cpu/cop400/cop400op.hxx b/src/devices/cpu/cop400/cop400op.hxx
index 1c1d5f6f86d..a99a0271471 100644
--- a/src/devices/cpu/cop400/cop400op.hxx
+++ b/src/devices/cpu/cop400/cop400op.hxx
@@ -948,6 +948,11 @@ INSTRUCTION( lei )
{
OUT_L(Q);
}
+ else
+ {
+ // tri-state(floating) pins
+ OUT_L(m_read_l_tristate(0, 0xff));
+ }
}
/*
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 27404d0f066..2cc08888eb2 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -287,7 +287,13 @@ static const uint8_t int_register_map[REG_I_COUNT] =
static uint8_t float_register_map[REG_F_COUNT] =
{
+#ifdef X64_WINDOWS_ABI
REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9, REG_XMM10, REG_XMM11, REG_XMM12, REG_XMM13, REG_XMM14, REG_XMM15
+#else
+ // on AMD x64 ABI, XMM0-7 are FP function args. since this code has no args, and we
+ // save/restore them around CALLC, they should be safe for our use.
+ REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7
+#endif
};
// condition mapping table
diff --git a/src/devices/cpu/i8089/i8089_channel.cpp b/src/devices/cpu/i8089/i8089_channel.cpp
index 1b8d86d2b53..cbfd60b2280 100644
--- a/src/devices/cpu/i8089/i8089_channel.cpp
+++ b/src/devices/cpu/i8089/i8089_channel.cpp
@@ -18,7 +18,7 @@
//**************************************************************************
#define VERBOSE 1
-#define VERBOSE_DMA 1
+#define VERBOSE_DMA 0
// channel control register fields
#define CC_TMC ((m_r[CC].w >> 0) & 0x07) // terminate on masked compare
@@ -835,13 +835,14 @@ WRITE_LINE_MEMBER( i8089_channel::ext_w )
{
if (VERBOSE)
logerror("%s('%s'): ext_w: %d\n", shortname(), tag(), state);
- if(transferring() && state)
+
+ if (transferring() && state)
terminate_dma((CC_TX - 1) * 4);
}
WRITE_LINE_MEMBER( i8089_channel::drq_w )
{
- if (VERBOSE)
+ if (VERBOSE_DMA)
logerror("%s('%s'): drq_w: %d\n", shortname(), tag(), state);
m_drq = state;
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 07e908ceb2b..9bc4386d182 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -105,8 +105,8 @@ uint32_t i960_cpu_device::get_ea(uint32_t opcode)
switch(mode) {
case 0x4:
return m_r[abase];
-
- case 0x5: // address of this instruction + the offset dword + 8
+
+ case 0x5: // address of this instruction + the offset dword + 8
// which in reality is "address of next instruction + the offset dword"
ret = m_direct->read_dword(m_IP);
m_IP += 4;
@@ -368,6 +368,13 @@ void i960_cpu_device::bxx(uint32_t opcode, int mask)
}
}
+void i960_cpu_device::fxx(uint32_t opcode, int mask)
+{
+ if(m_AC & mask) {
+ fatalerror("Taking the fault on a FAULT insn not yet supported\n");
+ }
+}
+
void i960_cpu_device::bxx_s(uint32_t opcode, int mask)
{
if(m_AC & mask) {
@@ -651,6 +658,48 @@ void i960_cpu_device::execute_op(uint32_t opcode)
bxx(opcode, 7);
break;
+ case 0x18: // faultno
+ m_icount--;
+ if(!(m_AC & 7)) {
+ m_IP += get_disp(opcode);
+ }
+ break;
+
+ case 0x19: // faultg
+ m_icount--;
+ fxx(opcode, 1);
+ break;
+
+ case 0x1a: // faulte
+ m_icount--;
+ fxx(opcode, 2);
+ break;
+
+ case 0x1b: // faultge
+ m_icount--;
+ fxx(opcode, 3);
+ break;
+
+ case 0x1c: // faultl
+ m_icount--;
+ fxx(opcode, 4);
+ break;
+
+ case 0x1d: // faultne
+ m_icount--;
+ fxx(opcode, 5);
+ break;
+
+ case 0x1e: // faultle
+ m_icount--;
+ fxx(opcode, 6);
+ break;
+
+ case 0x1f: // faulto
+ m_icount--;
+ fxx(opcode, 7);
+ break;
+
case 0x20: // testno
m_icount--;
if(!(m_AC & 7))
@@ -1077,10 +1126,10 @@ void i960_cpu_device::execute_op(uint32_t opcode)
cmp_s(t1, t2);
set_ri(opcode, t2-1);
break;
-
+
case 0xc: // scanbyte
m_icount -= 2;
- m_AC &= ~7; // clear CC
+ m_AC &= ~7; // clear CC
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
if ((t1 & 0xff000000) == (t2 & 0xff000000) ||
@@ -1328,6 +1377,17 @@ void i960_cpu_device::execute_op(uint32_t opcode)
case 0x66:
switch((opcode >> 7) & 0xf) {
+ case 0x0: // calls
+ t1 = get_1_ri(opcode);
+ t2 = m_program->read_dword(m_SAT + 152); // get pointer to system procedure table
+ t2 = m_program->read_dword(t2 + 48 + (t1 * 4));
+ if ((t2 & 3) != 0)
+ {
+ fatalerror("I960: system calls that jump into supervisor mode aren't yet supported\n");
+ }
+ do_call(t2, 0, m_r[I960_SP]);
+ break;
+
case 0xd: // flushreg
if (m_rcache_pos > 4)
{
diff --git a/src/devices/cpu/i960/i960.h b/src/devices/cpu/i960/i960.h
index 12de144357c..64c1eb4cb98 100644
--- a/src/devices/cpu/i960/i960.h
+++ b/src/devices/cpu/i960/i960.h
@@ -161,6 +161,7 @@ private:
void cmp_d(double v1, double v2);
void bxx(uint32_t opcode, int mask);
void bxx_s(uint32_t opcode, int mask);
+ void fxx(uint32_t opcode, int mask);
void test(uint32_t opcode, int mask);
void execute_op(uint32_t opcode);
void take_interrupt(int vector, int lvl);
diff --git a/src/devices/cpu/i960/i960dis.cpp b/src/devices/cpu/i960/i960dis.cpp
index 4def96dad4d..43f81015240 100644
--- a/src/devices/cpu/i960/i960dis.cpp
+++ b/src/devices/cpu/i960/i960dis.cpp
@@ -22,7 +22,7 @@ static const mnemonic_t mnemonic[256] = {
{ "b", 8 }, { "call", 8 }, { "ret", 9 }, { "bal", 8 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 },
{ "bno", 8 }, { "bg", 8 }, { "be", 8 }, { "bge", 8 }, { "bl", 8 }, { "bne", 8 }, { "ble", 8 }, { "bo", 8 }, // 10
- { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 },
+ { "faultno", 0 }, { "faultg", 0 }, { "faulte", 0 }, { "faultge", 0 }, { "faultl", 0 }, { "faultne", 0 }, { "faultle", 0 }, { "faulto", 0 },
{ "testno", 10 }, { "testg", 10 }, { "teste", 10 }, { "testge", 10 }, { "testl", 10 }, { "testne", 10 }, { "testle", 10 }, { "testo", 10 }, // 20
{ "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 }, { "?", 0 },
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h
index d8c977cca7b..4326735cd1b 100644
--- a/src/devices/cpu/m68000/m68kcpu.h
+++ b/src/devices/cpu/m68000/m68kcpu.h
@@ -697,7 +697,7 @@ static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t add
uint32_t data = m68k->read32(address & ~3);
- //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
+ //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
// if no buserror occurred, validate the tag
if (!m68k->mmu_tmp_buserror_occurred)
diff --git a/src/devices/cpu/m68000/makefile b/src/devices/cpu/m68000/makefile
index be25a067a78..e98bbe8778e 100644
--- a/src/devices/cpu/m68000/makefile
+++ b/src/devices/cpu/m68000/makefile
@@ -23,7 +23,7 @@ clean:
-@rm -f m68kmake$(EXE)
-@rm -f m68kmake.o
-@rm -f m68kops.*
-
+
m68kmake.o: m68kmake.cpp
$(SILENT) $(CC) -x c++ -std=c++11 -o "$@" -c "$<"
@@ -31,7 +31,7 @@ m68kmake$(EXE) : m68kmake.o
@echo Linking $@...
$(SILENT) $(CXX) -lstdc++ $^ -o $@
-m68kops.cpp: m68kmake$(EXE) m68k_in.cpp
+m68kops.cpp: m68kmake$(EXE) m68k_in.cpp
@echo Generating M68K source files...
$(SILENT) ./m68kmake$(EXE) . m68k_in.cpp
diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp
index b8b9a8c7d48..278505b8c1e 100644
--- a/src/devices/cpu/m6805/m6805.cpp
+++ b/src/devices/cpu/m6805/m6805.cpp
@@ -415,6 +415,14 @@ m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *
{
}
+m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_constructor internal_map, const char *shortname, const char *source)
+ : cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
+ m_program_config("program", ENDIANNESS_BIG, 8, addr_width, 0, internal_map)
+{
+}
+
+
+
void m6805_base_device::device_start()
{
m_program = &space(AS_PROGRAM);
@@ -448,6 +456,7 @@ void m6805_base_device::device_start()
}
+
void m6805_base_device::device_reset()
{
m_ea.w.l = 0;
@@ -954,6 +963,159 @@ void m68705_device::execute_set_input(int inputnum, int state)
}
}
+/* ddr - direction registers */
+
+WRITE8_MEMBER(m68705_new_device::mc68705_ddrA_w)
+{
+ m_ddrA = data;
+}
+
+WRITE8_MEMBER(m68705_new_device::mc68705_ddrB_w)
+{
+ m_ddrB = data;
+}
+
+WRITE8_MEMBER(m68705_new_device::mc68705_ddrC_w)
+{
+ m_ddrC = data;
+}
+
+/* read ports */
+
+READ8_MEMBER(m68705_new_device::mc68705_portA_r)
+{
+ m_portA_in = m_portA_cb_r(0, ~m_ddrA); // pass the direction register as mem_mask so that externally we know which lines were actually pulled
+ uint8_t res = (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
+ return res;
+
+}
+
+READ8_MEMBER(m68705_new_device::mc68705_portB_r)
+{
+ m_portB_in = m_portB_cb_r(0, ~m_ddrB);
+ uint8_t res = (m_portB_out & m_ddrB) | (m_portB_in & ~m_ddrB);
+ return res;
+}
+
+READ8_MEMBER(m68705_new_device::mc68705_portC_r)
+{
+ m_portC_in = m_portC_cb_r(0, ~m_ddrC);
+ uint8_t res = (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
+ return res;
+}
+
+/* write ports */
+
+WRITE8_MEMBER(m68705_new_device::mc68705_portA_w)
+{
+ m_portA_cb_w(0, data, m_ddrA); // pass the direction register as mem_mask so that externally we know which lines were actually pushed
+ m_portA_out = data;
+}
+
+WRITE8_MEMBER(m68705_new_device::mc68705_portB_w)
+{
+ m_portB_cb_w(0, data, m_ddrB);
+ m_portB_out = data;
+}
+
+WRITE8_MEMBER(m68705_new_device::mc68705_portC_w)
+{
+ m_portC_cb_w(0, data, m_ddrC);
+ m_portC_out = data;
+}
+
+/*
+
+The 68(7)05 peripheral memory map:
+Common for Px, Rx, Ux parts:
+0x00: Port A data (RW)
+0x01: Port B data (RW)
+0x02: Port C data (RW) [top 4 bits do nothing (read as 1s) on Px parts, work as expected on Rx, Ux parts]
+0x03: [Port D data (RW), only on Rx, Ux parts]
+0x04: Port A DDR (Write only, reads as 0xFF)
+0x05: Port B DDR (Write only, reads as 0xFF)
+0x06: Port C DDR (Write only, reads as 0xFF) [top 4 bits do nothing on Px parts, work as expected on Rx, Ux parts]
+0x07: Unused (reads as 0xFF?)
+0x08: Timer Data Register (RW; acts as ram when timer isn't counting, otherwise decrements once per prescaler expiry)
+0x09: Timer Control Register (RW; on certain mask part and when MOR bit 6 is not set, all bits are RW except bit 3 which
+always reads as zero. when MOR bit 6 is set and on all mask parts except one listed in errata in the 6805 daatsheet,
+the top two bits are RW, bottom 6 always read as 1 and writes do nothing; on the errata chip, bit 3 is writable and
+clears the prescaler, reads as zero)
+0x0A: [Miscellaneous Register, only on Rx, Sx, Ux parts]
+0x0B: [Eprom parts: Programming Control Register (write only?, low 3 bits; reads as 0xFF?); Unused (reads as 0xFF?) on
+Mask parts]
+0x0C: Unused (reads as 0xFF?)
+0x0D: Unused (reads as 0xFF?)
+0x0E: [A/D control register, only on Rx, Ux, Sx parts]
+0x0F: [A/D result register, only on Rx, Ux, Sx parts]
+0x10-0x7f: internal ram; SP can only point to 0x60-0x7F. Rx parts have an unused hole from 0x10-0x3F (reads as 0xFF?)
+0x80-0xFF: Page 0 user rom
+The remainder of the memory map differs here between parts, see appropriate datasheet for each part.
+The four vectors are always stored in big endian form as the last 8 bytes of the address space.
+
+Sx specific differences:
+0x02: Port C data (RW) [top 6 bits do nothing (read as 1s) on Sx parts]
+0x06: Port C DDR (Write only, reads as 0xFF) [top 6 bits do nothing on Sx parts]
+0x0B: Timer 2 Data Register MSB
+0x0C: Timer 2 Data Register LSB
+0x0D: Timer 2 Control Register
+0x10: SPI Data Register
+0x11: SPI Control Register
+0x12-0x3F: Unused (reads as 0xFF?)
+
+MOR ADDRESS: Mask Option Register; does not exist on R2 and several other but not all mask parts, located at 0x784 on Px parts
+
+Rx Parts: 40 pins; address space is 0x000-0xfff with an unused hole at 0x10-0x3f and and 0x100-0x7BF; has A/D converter, Ports A-D;
+eprom parts have MOR at 0xF38; mask parts have selftest rom at similar area; selftest roms differ between the U2 and U3 versions
+
+Px Parts: 28 pins; address space is 0x000-0x7ff; eprom parts have MOR at 0x784 and bootstrap rom at 0x785-0x7f7; mask parts have a
+selftest rom at similar area; port c is just 4 bits.
+
+Sx Parts: 40 pins; address space is 0x000-0xfff with an unused hole at 0x12-0x3f and and 0x100-0x9BF; has A/D converter; has SPI
+serial; port C is just two bits; has an extra 16-bit timer compared to Ux/Rx; selftest rom at 0xF00-0xFF7
+
+Ux Parts: 40 pins; address space is 0x000-0xfff; has A/D converter, Ports A-D; eprom parts have MOR at 0xF38; mask parts have
+selftest rom at similar area; selftest roms differ between the U2 and U3 versions
+
+*/
+
+ADDRESS_MAP_START( m68705_internal_map, AS_PROGRAM, 8, m68705_new_device )
+ AM_RANGE(0x000, 0x000) AM_READWRITE(mc68705_portA_r, mc68705_portA_w)
+ AM_RANGE(0x001, 0x001) AM_READWRITE(mc68705_portB_r, mc68705_portB_w)
+ AM_RANGE(0x002, 0x002) AM_READWRITE(mc68705_portC_r, mc68705_portC_w)
+ AM_RANGE(0x004, 0x004) AM_WRITE(mc68705_ddrA_w)
+ AM_RANGE(0x005, 0x005) AM_WRITE(mc68705_ddrB_w)
+ AM_RANGE(0x006, 0x006) AM_WRITE(mc68705_ddrC_w)
+
+ AM_RANGE(0x010, 0x07f) AM_RAM
+ AM_RANGE(0x080, 0x7ff) AM_ROM
+ADDRESS_MAP_END
+
+void m68705_new_device::device_start()
+{
+ m68705_device::device_start();
+
+ save_item(NAME(m_portA_in));
+ save_item(NAME(m_portB_in));
+ save_item(NAME(m_portC_in));
+
+ save_item(NAME(m_portA_out));
+ save_item(NAME(m_portB_out));
+ save_item(NAME(m_portC_out));
+
+ save_item(NAME(m_ddrA));
+ save_item(NAME(m_ddrB));
+ save_item(NAME(m_ddrC));
+
+ m_portA_cb_w.resolve_safe();
+ m_portB_cb_w.resolve_safe();
+ m_portC_cb_w.resolve_safe();
+
+ m_portA_cb_r.resolve_safe(0xff);
+ m_portB_cb_r.resolve_safe(0xff);
+ m_portC_cb_r.resolve_safe(0xff);
+
+}
/****************************************************************************
* HD63705 section
@@ -1000,4 +1162,5 @@ void hd63705_device::execute_set_input(int inputnum, int state)
const device_type M6805 = &device_creator<m6805_device>;
const device_type M68HC05EG = &device_creator<m68hc05eg_device>;
const device_type M68705 = &device_creator<m68705_device>;
+const device_type M68705_NEW = &device_creator<m68705_new_device>;
const device_type HD63705 = &device_creator<hd63705_device>;
diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h
index 29493af20c9..24b75f57158 100644
--- a/src/devices/cpu/m6805/m6805.h
+++ b/src/devices/cpu/m6805/m6805.h
@@ -17,6 +17,7 @@ class m6805_device;
extern const device_type M6805;
extern const device_type M68HC05EG;
extern const device_type M68705;
+extern const device_type M68705_NEW;
extern const device_type HD63705;
// ======================> m6805_base_device
@@ -27,6 +28,7 @@ class m6805_base_device : public cpu_device
public:
// construction/destruction
m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source);
+ m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_constructor internal_map, const char *shortname, const char *source);
protected:
// device-level overrides
@@ -328,6 +330,10 @@ public:
m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12, "m68705", __FILE__) { }
+ m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_constructor internal_map, const char *shortname, const char *source)
+ : m6805_base_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source) { }
+
+
protected:
// device-level overrides
virtual void device_reset() override;
@@ -337,6 +343,106 @@ protected:
virtual void interrupt() override;
};
+// ======================> m68705_new_device
+
+ADDRESS_MAP_EXTERN(m68705_internal_map, 8);
+
+
+#define MCFG_M68705_PORTA_W_CB(_devcb) \
+ m68705_new_device::set_portA_cb_w(*device, DEVCB_##_devcb);
+
+#define MCFG_M68705_PORTB_W_CB(_devcb) \
+ m68705_new_device::set_portB_cb_w(*device, DEVCB_##_devcb);
+
+#define MCFG_M68705_PORTC_W_CB(_devcb) \
+ m68705_new_device::set_portC_cb_w(*device, DEVCB_##_devcb);
+
+#define MCFG_M68705_PORTA_R_CB(_devcb) \
+ m68705_new_device::set_portA_cb_r(*device, DEVCB_##_devcb);
+
+#define MCFG_M68705_PORTB_R_CB(_devcb) \
+ m68705_new_device::set_portB_cb_r(*device, DEVCB_##_devcb);
+
+#define MCFG_M68705_PORTC_R_CB(_devcb) \
+ m68705_new_device::set_portC_cb_r(*device, DEVCB_##_devcb);
+
+
+class m68705_new_device : public m68705_device
+{
+public:
+ // construction/destruction
+ m68705_new_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : m68705_device(mconfig, tag, owner, clock, M68705_NEW, "M68705 (NEW)", 11, ADDRESS_MAP_NAME( m68705_internal_map ), "m68705_new", __FILE__),
+ m_portA_in(0),
+ m_portB_in(0),
+ m_portC_in(0),
+ m_portA_out(0),
+ m_portB_out(0),
+ m_portC_out(0),
+ m_ddrA(0),
+ m_ddrB(0),
+ m_ddrC(0),
+ m_portA_cb_w(*this),
+ m_portB_cb_w(*this),
+ m_portC_cb_w(*this),
+ m_portA_cb_r(*this),
+ m_portB_cb_r(*this),
+ m_portC_cb_r(*this)
+ { }
+
+ // static configuration helpers
+ template<class _Object> static devcb_base &set_portA_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portA_cb_w.set_callback(object); }
+ template<class _Object> static devcb_base &set_portB_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portB_cb_w.set_callback(object); }
+ template<class _Object> static devcb_base &set_portC_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portC_cb_w.set_callback(object); }
+
+ template<class _Object> static devcb_base &set_portA_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portA_cb_r.set_callback(object); }
+ template<class _Object> static devcb_base &set_portB_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portB_cb_r.set_callback(object); }
+ template<class _Object> static devcb_base &set_portC_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portC_cb_r.set_callback(object); }
+
+ DECLARE_READ8_MEMBER(mc68705_portA_r);
+ DECLARE_READ8_MEMBER(mc68705_portB_r);
+ DECLARE_READ8_MEMBER(mc68705_portC_r);
+
+ DECLARE_WRITE8_MEMBER(mc68705_portA_w);
+ DECLARE_WRITE8_MEMBER(mc68705_portB_w);
+ DECLARE_WRITE8_MEMBER(mc68705_portC_w);
+
+ DECLARE_WRITE8_MEMBER(mc68705_ddrA_w);
+ DECLARE_WRITE8_MEMBER(mc68705_ddrB_w);
+ DECLARE_WRITE8_MEMBER(mc68705_ddrC_w);
+
+protected:
+
+ uint8_t m_portA_in;
+ uint8_t m_portB_in;
+ uint8_t m_portC_in;
+
+ uint8_t m_portA_out;
+ uint8_t m_portB_out;
+ uint8_t m_portC_out;
+
+ uint8_t m_ddrA;
+ uint8_t m_ddrB;
+ uint8_t m_ddrC;
+
+ /* Callbacks */
+ devcb_write8 m_portA_cb_w;
+ devcb_write8 m_portB_cb_w;
+ devcb_write8 m_portC_cb_w;
+
+ devcb_read8 m_portA_cb_r;
+ devcb_read8 m_portB_cb_r;
+ devcb_read8 m_portC_cb_r;
+
+
+ // device-level overrides
+ virtual void device_start() override;
+
+// virtual void execute_set_input(int inputnum, int state) override;
+
+// virtual void interrupt() override;
+};
+
// ======================> hd63705_device
class hd63705_device : public m6805_base_device
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index 8dd67ab83c5..44a1d596310 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -17,7 +17,7 @@
#include "mb86235fe.h"
-#define ENABLE_DRC 0
+#define ENABLE_DRC 0
#define CACHE_SIZE (1 * 1024 * 1024)
@@ -166,6 +166,7 @@ void mb86235_device::device_start()
state_add(MB86235_MB6, "MB6", m_core->mb[6]).formatstr("%08X");
state_add(MB86235_MB7, "MB7", m_core->mb[7]).formatstr("%08X");
state_add(STATE_GENPC, "GENPC", m_core->pc ).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_core->pc).noshow();
m_icountptr = &m_core->icount;
@@ -242,7 +243,7 @@ void mb86235_device::fifoin_w(uint64_t data)
printf("FIFOIN push %08X%08X\n", (uint32_t)(data >> 32), (uint32_t)(data));
m_core->fifoin.data[m_core->fifoin.wpos] = data;
-
+
m_core->fifoin.wpos++;
m_core->fifoin.wpos &= FIFOIN_SIZE-1;
m_core->fifoin.num++;
@@ -261,7 +262,17 @@ bool mb86235_device::is_fifoin_full()
uint64_t mb86235_device::fifoout0_r()
{
#if ENABLE_DRC
- fatalerror("fifoout0_r");
+ if (m_core->fifoout0.num == 0)
+ {
+ fatalerror("fifoout0_r: reading from empty fifo");
+ }
+
+ uint64_t data = m_core->fifoout0.data[m_core->fifoout0.rpos];
+
+ m_core->fifoout0.rpos++;
+ m_core->fifoout0.rpos &= FIFOOUT0_SIZE - 1;
+ m_core->fifoout0.num--;
+ return data;
#else
return 0;
#endif
@@ -274,4 +285,4 @@ bool mb86235_device::is_fifoout0_empty()
#else
return false;
#endif
-} \ No newline at end of file
+}
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index 783ddfab0c0..99c008ae88e 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -19,19 +19,19 @@ class mb86235_frontend;
-#define OP_USERFLAG_FIFOIN 0x1
-#define OP_USERFLAG_FIFOOUT0 0x2
-#define OP_USERFLAG_FIFOOUT1 0x4
-#define OP_USERFLAG_REPEAT 0x8
-#define OP_USERFLAG_REPEATED_OP 0x10
-#define OP_USERFLAG_PR_MASK 0x300
-#define OP_USERFLAG_PR_INC 0x100
-#define OP_USERFLAG_PR_DEC 0x200
-#define OP_USERFLAG_PR_ZERO 0x300
-#define OP_USERFLAG_PW_MASK 0xc00
-#define OP_USERFLAG_PW_INC 0x400
-#define OP_USERFLAG_PW_DEC 0x800
-#define OP_USERFLAG_PW_ZERO 0xc00
+#define OP_USERFLAG_FIFOIN 0x1
+#define OP_USERFLAG_FIFOOUT0 0x2
+#define OP_USERFLAG_FIFOOUT1 0x4
+#define OP_USERFLAG_REPEAT 0x8
+#define OP_USERFLAG_REPEATED_OP 0x10
+#define OP_USERFLAG_PR_MASK 0x300
+#define OP_USERFLAG_PR_INC 0x100
+#define OP_USERFLAG_PR_DEC 0x200
+#define OP_USERFLAG_PR_ZERO 0x300
+#define OP_USERFLAG_PW_MASK 0xc00
+#define OP_USERFLAG_PW_INC 0x400
+#define OP_USERFLAG_PW_DEC 0x800
+#define OP_USERFLAG_PW_ZERO 0xc00
class mb86235_device : public cpu_device
@@ -45,7 +45,6 @@ public:
void unimplemented_op();
void unimplemented_alu();
void unimplemented_control();
- void unimplemented_xfer1();
void unimplemented_double_xfer1();
void unimplemented_double_xfer2();
void pcs_overflow();
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index 2b1815a50d4..0a27c23eafc 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -16,8 +16,8 @@
#include "cpu/drcumlsh.h"
/*
- TODO:
- - check jump condition before parallel ALU/MUL (flags!)
+ TODO:
+ - check jump condition before parallel ALU/MUL (flags!)
*/
@@ -38,55 +38,55 @@ using namespace uml;
#define EXECUTE_RESET_CACHE 3
-#define AR(reg) mem(&m_core->ar[(reg)])
-#define AA(reg) m_regmap[(reg)]
-#define AB(reg) m_regmap[(reg)+8]
-#define MA(reg) m_regmap[(reg)+16]
-#define MB(reg) m_regmap[(reg)+24]
-#define FLAGS_AZ mem(&m_core->flags.az)
-#define FLAGS_AN mem(&m_core->flags.an)
-#define FLAGS_AV mem(&m_core->flags.av)
-#define FLAGS_AU mem(&m_core->flags.au)
-#define FLAGS_AD mem(&m_core->flags.ad)
-#define FLAGS_ZC mem(&m_core->flags.zc)
-#define FLAGS_IL mem(&m_core->flags.il)
-#define FLAGS_NR mem(&m_core->flags.nr)
-#define FLAGS_ZD mem(&m_core->flags.zd)
-#define FLAGS_MN mem(&m_core->flags.mn)
-#define FLAGS_MZ mem(&m_core->flags.mz)
-#define FLAGS_MV mem(&m_core->flags.mv)
-#define FLAGS_MU mem(&m_core->flags.mu)
-#define FLAGS_MD mem(&m_core->flags.md)
-
-#define PRP mem(&m_core->prp)
-#define PWP mem(&m_core->pwp)
-#define RPC mem(&m_core->rpc)
-#define LPC mem(&m_core->lpc)
-
-#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-
-#define FIFOIN_RPOS mem(&m_core->fifoin.rpos)
-#define FIFOIN_WPOS mem(&m_core->fifoin.wpos)
-#define FIFOIN_NUM mem(&m_core->fifoin.num)
-#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos)
-#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos)
-#define FIFOOUT0_NUM mem(&m_core->fifoout0.num)
-#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos)
-#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos)
-#define FIFOOUT1_NUM mem(&m_core->fifoout1.num)
+#define AR(reg) mem(&m_core->ar[(reg)])
+#define AA(reg) m_regmap[(reg)]
+#define AB(reg) m_regmap[(reg)+8]
+#define MA(reg) m_regmap[(reg)+16]
+#define MB(reg) m_regmap[(reg)+24]
+#define FLAGS_AZ mem(&m_core->flags.az)
+#define FLAGS_AN mem(&m_core->flags.an)
+#define FLAGS_AV mem(&m_core->flags.av)
+#define FLAGS_AU mem(&m_core->flags.au)
+#define FLAGS_AD mem(&m_core->flags.ad)
+#define FLAGS_ZC mem(&m_core->flags.zc)
+#define FLAGS_IL mem(&m_core->flags.il)
+#define FLAGS_NR mem(&m_core->flags.nr)
+#define FLAGS_ZD mem(&m_core->flags.zd)
+#define FLAGS_MN mem(&m_core->flags.mn)
+#define FLAGS_MZ mem(&m_core->flags.mz)
+#define FLAGS_MV mem(&m_core->flags.mv)
+#define FLAGS_MU mem(&m_core->flags.mu)
+#define FLAGS_MD mem(&m_core->flags.md)
+
+#define PRP mem(&m_core->prp)
+#define PWP mem(&m_core->pwp)
+#define RPC mem(&m_core->rpc)
+#define LPC mem(&m_core->lpc)
+
+#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+
+#define FIFOIN_RPOS mem(&m_core->fifoin.rpos)
+#define FIFOIN_WPOS mem(&m_core->fifoin.wpos)
+#define FIFOIN_NUM mem(&m_core->fifoin.num)
+#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos)
+#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos)
+#define FIFOOUT0_NUM mem(&m_core->fifoout0.num)
+#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos)
+#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos)
+#define FIFOOUT1_NUM mem(&m_core->fifoout1.num)
inline void mb86235_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
@@ -115,12 +115,6 @@ static void cfunc_unimplemented_control(void *param)
cpu->unimplemented_control();
}
-static void cfunc_unimplemented_xfer1(void *param)
-{
- mb86235_device *cpu = (mb86235_device *)param;
- cpu->unimplemented_xfer1();
-}
-
static void cfunc_unimplemented_double_xfer1(void *param)
{
mb86235_device *cpu = (mb86235_device *)param;
@@ -168,13 +162,6 @@ void mb86235_device::unimplemented_control()
fatalerror("MB86235: PC=%08X: Unimplemented control %02X\n", m_core->pc, cop);
}
-void mb86235_device::unimplemented_xfer1()
-{
- uint64_t op = m_core->arg64;
- printf("MB86235: PC=%08X: Unimplemented xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op));
- fatalerror("MB86235: PC=%08X: Unimplemented xfer1 %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op));
-}
-
void mb86235_device::unimplemented_double_xfer1()
{
uint64_t op = m_core->arg64;
@@ -452,6 +439,7 @@ void mb86235_device::static_generate_fifo()
block->end();
// read fifo in
+ // I0 = return value
block = m_drcuml->begin_block(32);
alloc_handle(m_drcuml.get(), &m_read_fifo_in, "read_fifo_in");
UML_HANDLE(block, *m_read_fifo_in);
@@ -466,10 +454,16 @@ void mb86235_device::static_generate_fifo()
block->end();
// write fifo out0
+ // I0 = input value
block = m_drcuml->begin_block(32);
alloc_handle(m_drcuml.get(), &m_write_fifo_out0, "write_fifo_out0");
UML_HANDLE(block, *m_write_fifo_out0);
- // TODO
+ UML_MOV(block, I1, FIFOOUT0_WPOS);
+ UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8);
+ UML_ADD(block, I1, I1, 1);
+ UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1);
+ UML_MOV(block, FIFOOUT0_WPOS, I1);
+ UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1);
UML_RET(block);
block->end();
@@ -637,14 +631,17 @@ void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler,
switch (md)
{
- case 0x1: // @ARx++
+ case 0x0: // @ARx
+ UML_MOV(block, I0, AR(arx));
+ break;
+ case 0x1: // @ARx++
UML_MOV(block, I0, AR(arx));
UML_ADD(block, AR(arx), AR(arx), 1);
break;
- case 0x4: // @ARx+ARy
+ case 0x4: // @ARx+ARy
UML_ADD(block, I0, AR(arx), AR(ary));
break;
- case 0xa: // @ARx+disp12
+ case 0xa: // @ARx+disp12
UML_ADD(block, I0, AR(arx), disp);
break;
@@ -670,11 +667,16 @@ void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *comp
UML_MOV(block, dst, AR(reg & 7));
break;
- case 0x30: // PR
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ // AB0-7
+ UML_MOV(block, dst, AB(reg & 7));
+ break;
+
+ case 0x30: // PR
UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4);
break;
- case 0x31: // FI
+ case 0x31: // FI
UML_CALLH(block, *m_read_fifo_in);
UML_MOV(block, dst, I0);
break;
@@ -700,15 +702,15 @@ void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *com
UML_MOV(block, AA(reg & 7), src);
break;
- case 0x10: // EB
+ case 0x10: // EB
UML_MOV(block, mem(&m_core->eb), src);
break;
- case 0x13: // EO
+ case 0x13: // EO
UML_MOV(block, mem(&m_core->eo), src);
break;
- case 0x14: // SP
+ case 0x14: // SP
UML_MOV(block, mem(&m_core->sp), src);
break;
@@ -727,23 +729,28 @@ void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *com
UML_MOV(block, AB(reg & 7), src);
break;
- case 0x30: // PR
+ case 0x30: // PR
UML_STORE(block, m_core->pr, PWP, src, SIZE_DWORD, SCALE_x4);
break;
- case 0x34: // PDR
+ case 0x32: // FO0
+ UML_MOV(block, I0, src);
+ UML_CALLH(block, *m_write_fifo_out0);
+ break;
+
+ case 0x34: // PDR
UML_MOV(block, mem(&m_core->pdr), src);
break;
- case 0x35: // DDR
+ case 0x35: // DDR
UML_MOV(block, mem(&m_core->ddr), src);
break;
- case 0x36: // PRP
+ case 0x36: // PRP
UML_MOV(block, PRP, src);
break;
- case 0x37: // PWP
+ case 0x37: // PWP
UML_MOV(block, PWP, src);
break;
@@ -781,9 +788,9 @@ bool mb86235_device::aluop_has_result(int aluop)
{
switch (aluop)
{
- case 0x04: // FCMP
- case 0x07: // NOP
- case 0x14: // CMP
+ case 0x04: // FCMP
+ case 0x07: // NOP
+ case 0x14: // CMP
return false;
default:
@@ -845,15 +852,29 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
// insert FIFO OUT0 check if needed
if (fifoout0_check)
{
- fatalerror("generate_opcode: fifoout0_check");
+ code_label not_full = compiler->labelnum++;
+ UML_CMP(block, FIFOOUT0_NUM, FIFOOUT0_SIZE - 1);
+ UML_JMPc(block, COND_L, not_full);
+
+ UML_MOV(block, mem(&m_core->icount), 0);
+ UML_EXH(block, *m_out_of_cycles, desc->pc);
+
+ UML_LABEL(block, not_full);
}
// insert FIFO OUT1 check if needed
if (fifoout1_check)
{
- fatalerror("generate_opcode: fifoout1_check");
+ code_label not_full = compiler->labelnum++;
+ UML_CMP(block, FIFOOUT1_NUM, FIFOOUT1_SIZE - 1);
+ UML_JMPc(block, COND_L, not_full);
+
+ UML_MOV(block, mem(&m_core->icount), 0);
+ UML_EXH(block, *m_out_of_cycles, desc->pc);
+
+ UML_LABEL(block, not_full);
}
-
+
switch ((opcode >> 61) & 7)
{
@@ -879,7 +900,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
if (mul_temp) UML_MOV(block, get_alu_output((opcode >> 27) & 0x1f), mem(&m_core->multemp));
break;
}
- case 2: // ALU / MUL / control
+ case 2: // ALU / MUL / control
{
generate_pre_control(block, compiler, desc);
generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, false);
@@ -958,17 +979,17 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
{
switch ((desc->userflags & OP_USERFLAG_PR_MASK) >> 8)
{
- case 1: // PR++
+ case 1: // PR++
UML_ADD(block, PRP, PRP, 1);
UML_CMP(block, PRP, 24);
UML_MOVc(block, COND_GE, PRP, 0);
break;
- case 2: // PR--
+ case 2: // PR--
UML_SUB(block, PRP, PRP, 1);
UML_CMP(block, PRP, 0);
UML_MOVc(block, COND_L, PRP, 23);
break;
- case 3: // PR#0
+ case 3: // PR#0
UML_MOV(block, PRP, 0);
break;
}
@@ -978,17 +999,17 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
{
switch ((desc->userflags & OP_USERFLAG_PW_MASK) >> 10)
{
- case 1: // PW++
+ case 1: // PW++
UML_ADD(block, PWP, PWP, 1);
UML_CMP(block, PWP, 24);
UML_MOVc(block, COND_GE, PWP, 0);
break;
- case 2: // PW--
+ case 2: // PW--
UML_SUB(block, PWP, PWP, 1);
UML_CMP(block, PWP, 0);
UML_MOVc(block, COND_L, PWP, 23);
break;
- case 3: // PW#0
+ case 3: // PW#0
UML_MOV(block, PWP, 0);
break;
}
@@ -1026,7 +1047,7 @@ void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *
else
UML_MOV(block, dst, AA(reg & 7));
break;
-
+
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
if (mul)
UML_MOV(block, dst, MB(reg & 7));
@@ -1034,51 +1055,51 @@ void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *
UML_MOV(block, dst, AB(reg & 7));
break;
- case 0x10: // PR
- case 0x11: // PR++
- case 0x12: // PR--
- case 0x13: // PR#0
+ case 0x10: // PR
+ case 0x11: // PR++
+ case 0x12: // PR--
+ case 0x13: // PR#0
UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4);
break;
- case 0x18: // 0 / -1.0E+0
+ case 0x18: // 0 / -1.0E+0
if (fp)
UML_MOV(block, dst, 0xbf800000);
else
UML_MOV(block, dst, 0);
break;
- case 0x19: // 1 / 0.0E+0
+ case 0x19: // 1 / 0.0E+0
if (fp)
UML_MOV(block, dst, 0);
else
UML_MOV(block, dst, 1);
break;
- case 0x1a: // -1 / 0.5+0
+ case 0x1a: // -1 / 0.5+0
if (fp)
UML_MOV(block, dst, 0x3f000000);
else
UML_MOV(block, dst, -1);
break;
- case 0x1b: // 1.0E+0
+ case 0x1b: // 1.0E+0
UML_MOV(block, dst, 0x3f800000);
break;
- case 0x1c: // 1.5E+0
+ case 0x1c: // 1.5E+0
UML_MOV(block, dst, 0x3fc00000);
break;
- case 0x1d: // 2.0E+0
+ case 0x1d: // 2.0E+0
UML_MOV(block, dst, 0x40000000);
break;
- case 0x1e: // 3.0E+0
+ case 0x1e: // 3.0E+0
UML_MOV(block, dst, 0x40400000);
break;
- case 0x1f: // 5.0E+0
+ case 0x1f: // 5.0E+0
UML_MOV(block, dst, 0x40a00000);
break;
@@ -1138,9 +1159,9 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
int io = aluop & 0x1f;
int op = (aluop >> 14) & 0x1f;
- switch (op)
+ switch (op)
{
- case 0x00: // FADD
+ case 0x00: // FADD
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1155,7 +1176,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x02: // FSUB
+ case 0x02: // FSUB
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1170,7 +1191,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x04: // FCMP
+ case 0x04: // FCMP
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1182,14 +1203,14 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x05: // FABS
+ case 0x05: // FABS
UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1), 0x7fffffff);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
if (AN_CALC_REQUIRED) UML_MOV(block, FLAGS_AN, 0);
// TODO: AD flag
break;
- case 0x06: // FABC
+ case 0x06: // FABC
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_AND(block, I0, I0, 0x7fffffff);
UML_AND(block, I1, get_alu1_input(i1), 0x7fffffff);
@@ -1202,10 +1223,10 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x07: // NOP
+ case 0x07: // NOP
break;
- case 0x0d: // CIF
+ case 0x0d: // CIF
generate_alumul_input(block, compiler, desc, i1, I1, true, false);
UML_FSFRINT(block, F0, I1, SIZE_DWORD);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1215,7 +1236,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_ICOPYFS(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), F0);
break;
- case 0x0e: // CFI
+ case 0x0e: // CFI
{
code_label truncate = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -1227,7 +1248,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_LABEL(block, truncate);
UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_TRUNC);
UML_LABEL(block, end);
-
+
UML_CMP(block, I0, 0xff800000);
UML_MOVc(block, COND_L, I0, 0xff800000);
if (AV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_AV, 1);
@@ -1242,7 +1263,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
}
- case 0x10: // ADD
+ case 0x10: // ADD
generate_alumul_input(block, compiler, desc, i2, I1, false, false);
UML_ADD(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1256,7 +1277,21 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
break;
- case 0x14: // CMP
+ case 0x12: // SUB
+ generate_alumul_input(block, compiler, desc, i2, I1, false, false);
+ UML_SUB(block, I0, I1, get_alu1_input(i1));
+ if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
+ if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
+ UML_CMP(block, I0, 0xff800000);
+ UML_MOVc(block, COND_L, I0, 0xff800000);
+ if (AV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_AV, 1);
+ UML_CMP(block, I0, 0x007fffff);
+ UML_MOVc(block, COND_G, I0, 0x007fffff);
+ if (AV_CALC_REQUIRED) UML_MOVc(block, COND_G, FLAGS_AV, 1);
+ UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
+ break;
+
+ case 0x14: // CMP
generate_alumul_input(block, compiler, desc, i2, I1, false, false);
UML_SUB(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1270,11 +1305,11 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
}
break;
- case 0x16: // ATR
+ case 0x16: // ATR
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1));
break;
- case 0x18: // AND
+ case 0x18: // AND
generate_alumul_input(block, compiler, desc, i2, I0, false, false);
UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1283,7 +1318,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0);
break;
- case 0x1c: // LSR
+ case 0x1c: // LSR
generate_alumul_input(block, compiler, desc, i1, I0, false, false);
UML_SHR(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1295,7 +1330,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
break;
- case 0x1d: // LSL
+ case 0x1d: // LSL
generate_alumul_input(block, compiler, desc, i1, I0, false, false);
UML_SHL(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1403,12 +1438,21 @@ void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state
{
case 0x0: break;
case 0x1: break;
- case 0x2: // ARx
+ case 0x2: // ARx
{
int reg = (ef2 >> 6) & 7;
UML_MOV(block, I0, AR(reg));
break;
}
+ case 0x4: // Axx
+ {
+ int reg = (ef2 >> 6) & 7;
+ if (ef2 & 0x400)
+ UML_MOV(block, I0, AB(reg));
+ else
+ UML_MOV(block, I0, AA(reg));
+ break;
+ }
default:
fatalerror("generate_branch_target: type %02X at %08X", type, desc->pc);
break;
@@ -1420,59 +1464,59 @@ void mb86235_device::generate_condition(drcuml_block *block, compiler_state *com
{
switch (cc)
{
- case 0x00: // MN
+ case 0x00: // MN
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MN, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x01: // MZ
+ case 0x01: // MZ
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MZ, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x02: // MV
+ case 0x02: // MV
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MV, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x03: // MU
+ case 0x03: // MU
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MU, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x04: // ZD
+ case 0x04: // ZD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x05: // NR
+ case 0x05: // NR
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_NR, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x06: // IL
+ case 0x06: // IL
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_IL, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x07: // ZC
+ case 0x07: // ZC
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZC, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x08: // AN
+ case 0x08: // AN
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AN, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x09: // AZ
+ case 0x09: // AZ
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AZ, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0a: // AV
+ case 0x0a: // AV
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AV, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0b: // AU
+ case 0x0b: // AU
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AU, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0c: // MD
+ case 0x0c: // MD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0d: // AD
+ case 0x0d: // AD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
@@ -1489,22 +1533,22 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
int ef1 = (op >> 16) & 0x3f;
int ef2 = op & 0xffff;
int cop = (op >> 22) & 0x1f;
-// int rel12 = (op & 0x800) ? (0xfffff000 | (op & 0xfff)) : (op & 0xfff);
+// int rel12 = (op & 0x800) ? (0xfffff000 | (op & 0xfff)) : (op & 0xfff);
switch (cop)
{
- case 0x00: // NOP
+ case 0x00: // NOP
break;
- case 0x03: //
- if (ef1 == 1) // CLRFI
+ case 0x03: //
+ if (ef1 == 1) // CLRFI
UML_CALLH(block, *m_clear_fifo_in);
- else if (ef1 == 2) // CLRFO
+ else if (ef1 == 2) // CLRFO
{
UML_CALLH(block, *m_clear_fifo_out0);
UML_CALLH(block, *m_clear_fifo_out1);
}
- else if (ef1 == 3) // CLRF
+ else if (ef1 == 3) // CLRF
{
UML_CALLH(block, *m_clear_fifo_in);
UML_CALLH(block, *m_clear_fifo_out0);
@@ -1512,11 +1556,11 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
}
break;
- case 0x08: // SETM #imm16
+ case 0x08: // SETM #imm16
UML_MOV(block, mem(&m_core->mod), ef2);
break;
- case 0x10: // DBcc
+ case 0x10: // DBcc
{
code_label skip_label = compiler->labelnum++;
@@ -1527,7 +1571,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
break;
}
- case 0x11: // DBNcc
+ case 0x11: // DBNcc
{
code_label skip_label = compiler->labelnum++;
@@ -1538,14 +1582,14 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
break;
}
- case 0x12: // DJMP
+ case 0x12: // DJMP
{
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_branch(block, compiler, desc);
break;
}
- case 0x1a: // DCALL
+ case 0x1a: // DCALL
{
// push PC
code_label no_overflow = compiler->labelnum++;
@@ -1557,13 +1601,13 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
UML_LABEL(block, no_overflow);
UML_STORE(block, m_core->pcs, mem(&m_core->pcs_ptr), desc->pc + 2, SIZE_DWORD, SCALE_x4);
UML_ADD(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1);
-
+
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_branch(block, compiler, desc);
break;
}
- case 0x1b: // DRET
+ case 0x1b: // DRET
{
// pop PC
code_label no_underflow = compiler->labelnum++;
@@ -1575,7 +1619,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
UML_LABEL(block, no_underflow);
UML_SUB(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1);
UML_LOAD(block, I0, m_core->pcs, mem(&m_core->pcs_ptr), SIZE_DWORD, SCALE_x4);
-
+
generate_branch(block, compiler, desc);
break;
}
@@ -1590,9 +1634,67 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UML_MOV(block, mem(&m_core->pc), desc->pc);
- UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]);
- UML_CALLC(block, cfunc_unimplemented_xfer1, this);
+ uint64_t opcode = desc->opptr.q[0];
+
+ int dr = (opcode >> 12) & 0x7f;
+ int sr = (opcode >> 19) & 0x7f;
+ int md = opcode & 0xf;
+ int ary = (opcode >> 4) & 7;
+ int disp5 = (opcode >> 7) & 0x1f;
+ int trm = (opcode >> 26) & 1;
+// int dir = (opcode >> 25) & 1;
+
+ if (trm == 0)
+ {
+ if (sr == 0x58)
+ {
+ // MOV1 #imm12, DR
+ generate_reg_write(block, compiler, desc, dr & 0x3f, uml::parameter(opcode & 0xfff));
+ }
+ else
+ {
+ if ((sr & 0x40) == 0)
+ {
+ generate_reg_read(block, compiler, desc, sr & 0x3f, I1);
+ }
+ else
+ {
+ generate_ea(block, compiler, desc, md, sr & 7, ary, disp5);
+ if (sr & 0x20) // RAM-B
+ {
+ UML_SHL(block, I0, I0, 2);
+ UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
+ }
+ else // RAM-A
+ {
+ UML_CALLH(block, *m_read_abus);
+ }
+ }
+
+ if ((dr & 0x40) == 0)
+ {
+ generate_reg_write(block, compiler, desc, dr & 0x3f, I1);
+ }
+ else
+ {
+ generate_ea(block, compiler, desc, md, dr & 7, ary, disp5);
+ if (dr & 0x20) // RAM-B
+ {
+ UML_SHL(block, I0, I0, 2);
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
+ }
+ else // RAM-A
+ {
+ UML_CALLH(block, *m_write_abus);
+ }
+ }
+ }
+ }
+ else
+ {
+ // external transfer
+ fatalerror("generate_xfer1 MOV1 at %08X (%08X%08X)", desc->pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
+ }
}
void mb86235_device::generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
@@ -1617,7 +1719,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
int disp14 = (opcode >> 7) & 0x3fff;
if (disp14 & 0x2000) disp14 |= 0xffffc000;
- if (op == 0) // MOV2
+ if (op == 0) // MOV2
{
if (trm == 0)
{
@@ -1635,7 +1737,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, sr & 7, ary, disp14);
- if (sr & 0x20) // RAM-B
+ if (sr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
@@ -1643,7 +1745,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else // RAM-A
{
UML_CALLH(block, *m_read_abus);
- }
+ }
}
if ((dr & 0x40) == 0)
@@ -1653,7 +1755,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, dr & 7, ary, disp14);
- if (dr & 0x20) // RAM-B
+ if (dr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
@@ -1689,7 +1791,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
UML_ADD(block, mem(&m_core->eo), mem(&m_core->eo), disp14);
}
}
- else if (op == 2) // MOV4
+ else if (op == 2) // MOV4
{
fatalerror("generate_xfer2 MOV4 at %08X (%08X%08X)", desc->pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
}
@@ -1707,7 +1809,7 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
uint64_t opcode = desc->opptr.q[0];
uint32_t imm = (uint32_t)(opcode >> 27);
- int dr = (opcode >> 19) & 0x7f;
+ int dr = (opcode >> 19) & 0x7f;
int ary = (opcode >> 4) & 7;
int md = opcode & 0xf;
@@ -1717,17 +1819,17 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
switch (dr >> 5)
{
case 0:
- case 1: // reg
+ case 1: // reg
generate_reg_write(block, compiler, desc, dr & 0x3f, uml::parameter(imm));
break;
- case 2: // RAM-A
+ case 2: // RAM-A
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
UML_MOV(block, I1, imm);
UML_CALLH(block, *m_write_abus);
break;
- case 3: // RAM-B
+ case 3: // RAM-B
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
UML_SHL(block, I0, I0, 2);
UML_WRITE(block, I0, imm, SIZE_DWORD, SPACE_IO);
@@ -1745,38 +1847,38 @@ void mb86235_device::generate_pre_control(drcuml_block *block, compiler_state *c
switch (cop)
{
- case 0x10: // DBcc
- case 0x11: // DBNcc
- case 0x18: // DCcc
- case 0x19: // DCNcc
+ case 0x10: // DBcc
+ case 0x11: // DBNcc
+ case 0x18: // DCcc
+ case 0x19: // DCNcc
switch (ef1)
{
- case 0x00: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MN); break; // MN
- case 0x01: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MZ); break; // MZ
- case 0x02: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MV); break; // MV
- case 0x03: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MU); break; // MU
- case 0x04: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZD); break; // ZD
- case 0x05: UML_MOV(block, mem(&m_core->condtemp), FLAGS_NR); break; // NR
- case 0x06: UML_MOV(block, mem(&m_core->condtemp), FLAGS_IL); break; // IL
- case 0x07: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZC); break; // ZC
- case 0x08: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AN); break; // AN
- case 0x09: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AZ); break; // AZ
- case 0x0a: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AV); break; // AV
- case 0x0b: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AU); break; // AU
- case 0x0c: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MD); break; // MD
- case 0x0d: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AD); break; // AD
+ case 0x00: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MN); break; // MN
+ case 0x01: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MZ); break; // MZ
+ case 0x02: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MV); break; // MV
+ case 0x03: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MU); break; // MU
+ case 0x04: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZD); break; // ZD
+ case 0x05: UML_MOV(block, mem(&m_core->condtemp), FLAGS_NR); break; // NR
+ case 0x06: UML_MOV(block, mem(&m_core->condtemp), FLAGS_IL); break; // IL
+ case 0x07: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZC); break; // ZC
+ case 0x08: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AN); break; // AN
+ case 0x09: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AZ); break; // AZ
+ case 0x0a: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AV); break; // AV
+ case 0x0b: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AU); break; // AU
+ case 0x0c: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MD); break; // MD
+ case 0x0d: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AD); break; // AD
default:
fatalerror("generate_pre_control: unimplemented cc %02X at %08X", ef1, desc->pc);
break;
}
break;
- case 0x14: // DBBC ARx:y, rel12
+ case 0x14: // DBBC ARx:y, rel12
// TODO: copy ARx
UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7));
break;
- case 0x15: // DBBS ARx:y, rel12
+ case 0x15: // DBBS ARx:y, rel12
// TODO: copy ARx
UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7));
break;
diff --git a/src/devices/cpu/mb86235/mb86235fe.cpp b/src/devices/cpu/mb86235/mb86235fe.cpp
index 4c4e0717034..f55fb0934bf 100644
--- a/src/devices/cpu/mb86235/mb86235fe.cpp
+++ b/src/devices/cpu/mb86235/mb86235fe.cpp
@@ -11,45 +11,45 @@
#include "mb86235fe.h"
-#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
-#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
-#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0)
-#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0)
-#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0)
-#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0)
-#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0)
-#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0)
-#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0)
-#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0)
-
-#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0)
-#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0)
-#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0)
-#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0)
-#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0)
-#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0)
-#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0)
-#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0)
-#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0)
-#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0)
-#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0)
-#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0)
-#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0)
-#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0)
-#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0)
-#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0)
-#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0)
-#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0)
-#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0)
-#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0)
-#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0)
-#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0)
-#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0)
-#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0)
-#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0)
-#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0)
-#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0)
-#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0)
+#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
+#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
+#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0)
+#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0)
+#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0)
+#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0)
+#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0)
+#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0)
+#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0)
+#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0)
+
+#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0)
+#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0)
+#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0)
+#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0)
+#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0)
+#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0)
+#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0)
+#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0)
+#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0)
+#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0)
+#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0)
+#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0)
+#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0)
+#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0)
+#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0)
+#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0)
+#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0)
+#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0)
+#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0)
+#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0)
+#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0)
+#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0)
+#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0)
+#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0)
+#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0)
+#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0)
+#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0)
+#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0)
mb86235_frontend::mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
@@ -137,18 +137,18 @@ void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg)
AB_USED(desc, reg & 7);
break;
- case 0x10: // PR
+ case 0x10: // PR
break;
- case 0x11: // PR++
+ case 0x11: // PR++
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_INC;
break;
- case 0x12: // PR--
+ case 0x12: // PR--
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_DEC;
break;
- case 0x13: // PR#0
+ case 0x13: // PR#0
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_ZERO;
break;
@@ -171,23 +171,23 @@ void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg)
MB_USED(desc, reg & 7);
break;
- case 0x10: // PR
+ case 0x10: // PR
break;
- case 0x11: // PR++
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x11: // PR++
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_INC;
}
break;
- case 0x12: // PR--
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x12: // PR--
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_DEC;
}
break;
- case 0x13: // PR#0
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x13: // PR#0
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_ZERO;
}
@@ -248,31 +248,31 @@ void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg)
AB_USED(desc, reg & 7);
break;
- case 0x31: // FI
+ case 0x31: // FI
desc.userflags |= OP_USERFLAG_FIFOIN;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x32: // FO0
+ case 0x32: // FO0
break;
- case 0x33: // FO1
+ case 0x33: // FO1
break;
- case 0x10: // EB
- case 0x11: // EBU
- case 0x12: // EBL
- case 0x13: // EO
- case 0x15: // ST
- case 0x16: // MOD
- case 0x17: // LRPC
- case 0x34: // PDR
- case 0x35: // DDR
- case 0x36: // PRP
- case 0x37: // PWP
+ case 0x10: // EB
+ case 0x11: // EBU
+ case 0x12: // EBL
+ case 0x13: // EO
+ case 0x15: // ST
+ case 0x16: // MOD
+ case 0x17: // LRPC
+ case 0x34: // PDR
+ case 0x35: // DDR
+ case 0x36: // PRP
+ case 0x37: // PWP
break;
- case 0x30: // PR
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority
+ case 0x30: // PR
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority
{
desc.userflags |= OP_USERFLAG_PR_INC;
}
@@ -305,32 +305,32 @@ void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg)
AB_MODIFIED(desc, reg & 7);
break;
- case 0x31: // FI
+ case 0x31: // FI
break;
- case 0x32: // FO0
+ case 0x32: // FO0
desc.userflags |= OP_USERFLAG_FIFOOUT0;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x33: // FO1
+ case 0x33: // FO1
desc.userflags |= OP_USERFLAG_FIFOOUT1;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x10: // EB
- case 0x11: // EBU
- case 0x12: // EBL
- case 0x13: // EO
- case 0x15: // ST
- case 0x16: // MOD
- case 0x17: // LRPC
- case 0x34: // PDR
- case 0x35: // DDR
- case 0x36: // PRP
- case 0x37: // PWP
+ case 0x10: // EB
+ case 0x11: // EBU
+ case 0x12: // EBL
+ case 0x13: // EO
+ case 0x15: // ST
+ case 0x16: // MOD
+ case 0x17: // LRPC
+ case 0x34: // PDR
+ case 0x35: // DDR
+ case 0x36: // PRP
+ case 0x37: // PWP
break;
- case 0x30: // PR
+ case 0x30: // PR
desc.userflags &= ~OP_USERFLAG_PW_MASK;
desc.userflags |= OP_USERFLAG_PW_INC;
break;
@@ -347,14 +347,14 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
switch (op)
{
- case 0x00: // FADD
+ case 0x00: // FADD
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x01: // FADDZ
+ case 0x01: // FADDZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -363,7 +363,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x02: // FSUB
+ case 0x02: // FSUB
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -371,7 +371,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x03: // FSUBZ
+ case 0x03: // FSUBZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -380,7 +380,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x04: // FCMP
+ case 0x04: // FCMP
describe_alu_input(desc, i1); describe_alu_input(desc, i2);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -388,36 +388,36 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x05: // FABS
+ case 0x05: // FABS
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x06: // FABC
+ case 0x06: // FABC
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x07: // NOP
+ case 0x07: // NOP
break;
- case 0x08: // FEA
+ case 0x08: // FEA
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x09: // FES
+ case 0x09: // FES
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0a: // FRCP
+ case 0x0a: // FRCP
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
ZD_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -425,7 +425,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0b: // FRSQ
+ case 0x0b: // FRSQ
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
NR_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -433,26 +433,26 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0c: // FLOG
+ case 0x0c: // FLOG
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
IL_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0d: // CIF
+ case 0x0d: // CIF
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
break;
- case 0x0e: // CFI
+ case 0x0e: // CFI
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0f: // CFIB
+ case 0x0f: // CFIB
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -460,99 +460,99 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AD_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x10: // ADD
+ case 0x10: // ADD
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x11: // ADDZ
+ case 0x11: // ADDZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x12: // SUB
+ case 0x12: // SUB
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x13: // SUBZ
+ case 0x13: // SUBZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x14: // CMP
+ case 0x14: // CMP
describe_alu_input(desc, i1); describe_alu_input(desc, i2);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x15: // ABS
+ case 0x15: // ABS
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x16: // ATR
+ case 0x16: // ATR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
break;
- case 0x17: // ATRZ
+ case 0x17: // ATRZ
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
break;
- case 0x18: // AND
+ case 0x18: // AND
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x19: // OR
+ case 0x19: // OR
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1a: // XOR
+ case 0x1a: // XOR
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1b: // NOT
+ case 0x1b: // NOT
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1c: // LSR
+ case 0x1c: // LSR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1d: // LSL
+ case 0x1d: // LSL
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1e: // ASR
+ case 0x1e: // ASR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
break;
- case 0x1f: // ASL
+ case 0x1f: // ASL
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -593,51 +593,51 @@ void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary,
{
switch (md)
{
- case 0x0: // @ARx
+ case 0x0: // @ARx
AR_USED(desc, arx);
break;
- case 0x1: // @ARx++
+ case 0x1: // @ARx++
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x2: // @ARx--
+ case 0x2: // @ARx--
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x3: // @ARx++disp
+ case 0x3: // @ARx++disp
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x4: // @ARx+ARy
+ case 0x4: // @ARx+ARy
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0x5: // @ARx+ARy++
+ case 0x5: // @ARx+ARy++
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x6: // @ARx+ARy--
+ case 0x6: // @ARx+ARy--
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x7: // @ARx+ARy++disp
+ case 0x7: // @ARx+ARy++disp
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x8: // @ARx+ARyU
+ case 0x8: // @ARx+ARyU
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0x9: // @ARx+ARyL
+ case 0x9: // @ARx+ARyL
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0xa: // @ARx+disp
+ case 0xa: // @ARx+disp
AR_USED(desc, arx);
break;
- case 0xb: // @ARx+ARy+disp
+ case 0xb: // @ARx+ARy+disp
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0xc: // @disp
+ case 0xc: // @disp
break;
- case 0xd: // @ARx+[ARy++]
+ case 0xd: // @ARx+[ARy++]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0xe: // @ARx+[ARy--]
+ case 0xe: // @ARx+[ARy--]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0xf: // @ARx+[ARy++disp]
+ case 0xf: // @ARx+[ARy++disp]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
}
@@ -646,12 +646,61 @@ void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary,
void mb86235_frontend::describe_xfer1(opcode_desc &desc)
{
uint64_t opcode = desc.opptr.q[0];
- fatalerror("mb86235_frontend: describe_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
+
+ int dr = (opcode >> 12) & 0x7f;
+ int sr = (opcode >> 19) & 0x7f;
+ int md = opcode & 0xf;
+ int ary = (opcode >> 4) & 7;
+ int disp5 = (opcode >> 7) & 0x1f;
+ int trm = (opcode >> 26) & 1;
+ int dir = (opcode >> 25) & 1;
+
+ if (trm == 0)
+ {
+ if ((sr & 0x40) == 0)
+ {
+ describe_reg_read(desc, sr & 0x3f);
+ }
+ else if (sr == 0x58)
+ {
+ // MOV1 #imm12, DR
+ }
+ else
+ {
+ describe_ea(desc, md, sr & 7, ary, disp5);
+ desc.flags |= OPFLAG_READS_MEMORY;
+ }
+
+ if ((dr & 0x40) == 0)
+ {
+ describe_reg_write(desc, dr & 0x3f);
+ }
+ else
+ {
+ describe_ea(desc, md, dr & 7, ary, disp5);
+ desc.flags |= OPFLAG_WRITES_MEMORY;
+ }
+ }
+ else
+ {
+ // external transfer
+ if (dir == 0)
+ {
+ describe_reg_read(desc, dr & 0x3f);
+ desc.flags |= OPFLAG_WRITES_MEMORY;
+ }
+ else
+ {
+ describe_reg_write(desc, dr & 0x3f);
+ desc.flags |= OPFLAG_READS_MEMORY;
+ }
+ }
}
void mb86235_frontend::describe_double_xfer1(opcode_desc &desc)
{
uint64_t opcode = desc.opptr.q[0];
+
fatalerror("mb86235_frontend: describe_double_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
}
@@ -668,7 +717,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc)
int md = opcode & 0xf;
int disp14 = (opcode >> 7) & 0x3fff;
- if (op == 0) // MOV2
+ if (op == 0) // MOV2
{
if (trm == 0)
{
@@ -711,7 +760,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc)
}
}
}
- else if (op == 2) // MOV4
+ else if (op == 2) // MOV4
{
fatalerror("mb86235_frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
}
@@ -733,15 +782,15 @@ void mb86235_frontend::describe_xfer3(opcode_desc &desc)
int ary = (opcode >> 4) & 7;
int md = opcode & 0xf;
- switch (dr >> 4)
+ switch (dr >> 5)
{
case 0:
- case 1: // reg
+ case 1: // reg
describe_reg_write(desc, dr & 0x3f);
break;
- case 2: // RAM-A
- case 3: // RAM-B
+ case 2: // RAM-A
+ case 3: // RAM-B
desc.flags |= OPFLAG_WRITES_MEMORY;
describe_ea(desc, md, dr & 7, ary, disp);
break;
@@ -757,56 +806,56 @@ void mb86235_frontend::describe_control(opcode_desc &desc)
switch (cop)
{
- case 0x00: // NOP
+ case 0x00: // NOP
break;
- case 0x01: // REP
- if (ef1 != 0) // ARx
+ case 0x01: // REP
+ if (ef1 != 0) // ARx
AR_USED(desc, (ef2 >> 12) & 7);
desc.userflags |= OP_USERFLAG_REPEAT;
break;
- case 0x02: // SETL
- if (ef1 != 0) // ARx
+ case 0x02: // SETL
+ if (ef1 != 0) // ARx
AR_USED(desc, (ef2 >> 12) & 7);
break;
- case 0x03: // CLRFI/CLRFO/CLRF
+ case 0x03: // CLRFI/CLRFO/CLRF
break;
- case 0x04: // PUSH
+ case 0x04: // PUSH
describe_reg_read(desc, (ef2 >> 6) & 0x3f);
break;
- case 0x05: // POP
+ case 0x05: // POP
describe_reg_write(desc, (ef2 >> 6) & 0x3f);
break;
- case 0x08: // SETM #imm16
+ case 0x08: // SETM #imm16
break;
- case 0x09: // SETM #imm3, CBSA
+ case 0x09: // SETM #imm3, CBSA
break;
- case 0x0a: // SETM #imm3, CBSB
+ case 0x0a: // SETM #imm3, CBSB
break;
- case 0x0b: // SETM #imm1, RF
+ case 0x0b: // SETM #imm1, RF
break;
- case 0x0c: // SETM #imm1, RDY
+ case 0x0c: // SETM #imm1, RDY
break;
- case 0x0d: // SETM #imm1, WAIT
+ case 0x0d: // SETM #imm1, WAIT
break;
- case 0x13: // DBLP rel12
+ case 0x13: // DBLP rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
break;
- case 0x14: // DBBC ARx:y, rel12
+ case 0x14: // DBBC ARx:y, rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7));
break;
- case 0x15: // DBBS ARx:y, rel12
+ case 0x15: // DBBS ARx:y, rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7));
break;
- case 0x1b: // DRET
+ case 0x1b: // DRET
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.delayslots = 1;
@@ -870,4 +919,4 @@ void mb86235_frontend::describe_control(opcode_desc &desc)
break;
}
}
-} \ No newline at end of file
+}
diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h
index c51823fb208..b5db869b111 100644
--- a/src/devices/cpu/powerpc/ppc.h
+++ b/src/devices/cpu/powerpc/ppc.h
@@ -243,6 +243,7 @@ public:
void ppccom_tlb_flush();
void ppccom_execute_mfdcr();
void ppccom_execute_mtdcr();
+ void ppccom_get_dsisr();
protected:
// device-level overrides
diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp
index 2030489da00..bcdc17ae9a1 100644
--- a/src/devices/cpu/powerpc/ppccom.cpp
+++ b/src/devices/cpu/powerpc/ppccom.cpp
@@ -1498,6 +1498,27 @@ void ppc_device::ppccom_tlb_flush()
***************************************************************************/
/*-------------------------------------------------
+ ppccom_get_dsisr - gets the DSISR value for a
+ failing TLB lookup's data access exception.
+-------------------------------------------------*/
+
+void ppc_device::ppccom_get_dsisr()
+{
+ int intent = 0;
+
+ if (m_core->param1 & 1)
+ {
+ intent = TRANSLATE_WRITE;
+ }
+ else
+ {
+ intent = TRANSLATE_READ;
+ }
+
+ m_core->param1 = ppccom_translate_address_internal(intent, m_core->param0);
+}
+
+/*-------------------------------------------------
ppccom_execute_tlbie - execute a TLBIE
instruction
-------------------------------------------------*/
diff --git a/src/devices/cpu/powerpc/ppccom.h b/src/devices/cpu/powerpc/ppccom.h
index 3ec511eaac6..ecd8e87000c 100644
--- a/src/devices/cpu/powerpc/ppccom.h
+++ b/src/devices/cpu/powerpc/ppccom.h
@@ -307,15 +307,15 @@ enum
/* DSISR bits for DSI/alignment exceptions */
-#define DSISR_DIRECT 0x00000001 /* DSI: direct-store exception? */
-#define DSISR_NOT_FOUND 0x00000002 /* DSI: not found in HTEG or DBAT */
-#define DSISR_PROTECTED 0x00000010 /* DSI: exception due to protection */
-#define DSISR_CACHE_ERROR 0x00000020 /* DSI: operation on incorrect cache type */
-#define DSISR_STORE 0x00000040 /* DSI: store (1) or load (0) */
-#define DSISR_DABR 0x00000200 /* DSI: DABR match occurred */
-#define DSISR_NO_SEGMENT 0x00000400 /* DSI: no segment match found (64-bit only) */
-#define DSISR_INVALID_ECWX 0x00000800 /* DSI: ECIWX or ECOWX used with EAR[E] = 0 */
-#define DSISR_INSTRUCTION 0xfffff000 /* align: instruction decoding bits */
+#define DSISR_DIRECT 0x80000000 /* DSI: direct-store error interrupt */
+#define DSISR_NOT_FOUND 0x40000000 /* DSI: not found in HTEG or DBAT */
+#define DSISR_PROTECTED 0x08000000 /* DSI: exception due to protection */
+#define DSISR_CACHE_ERROR 0x04000000 /* DSI: operation on incorrect cache type */
+#define DSISR_STORE 0x02000000 /* DSI: store (1) or load (0) */
+#define DSISR_DABR 0x00400000 /* DSI: DABR match occurred */
+#define DSISR_NO_SEGMENT 0x00200000 /* DSI: no segment match found (64-bit only) */
+#define DSISR_INVALID_ECWX 0x00100000 /* DSI: ECIWX or ECOWX used with EAR[E] = 0 */
+#define DSISR_INSTRUCTION 0x000fffff /* align: instruction decoding bits FIXME: mask/shift depends on addressing mode */
/* PowerPC 4XX IRQ bits */
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp
index 6c98830bb96..741e75f9cc2 100644
--- a/src/devices/cpu/powerpc/ppcdrc.cpp
+++ b/src/devices/cpu/powerpc/ppcdrc.cpp
@@ -642,6 +642,11 @@ static void cfunc_ppccom_execute_mtdcr(void *param)
ppc->ppccom_execute_mtdcr();
}
+static void cfunc_ppccom_get_dsisr(void *param)
+{
+ ppc_device *ppc = (ppc_device *)param;
+ ppc->ppccom_get_dsisr();
+}
/***************************************************************************
STATIC CODEGEN
@@ -784,7 +789,11 @@ void ppc_device::static_generate_tlb_mismatch()
UML_LABEL(block, isi); // isi:
if (!(m_cap & PPCCAP_603_MMU))
{
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param0)); // mov [dsisr],[param0]
+ // DAR gets the address, DSISR gets the 'reason' flags
+ UML_MOV(block, SPR32(SPROEA_DAR), mem(&m_core->param0)); // mov [dar],[param0]
+ m_core->param1 = 0; // always a read here
+ UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
UML_EXH(block, *m_exception[EXCEPTION_ISI], I0); // exh isi,i0
}
else
@@ -1389,8 +1398,19 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
/* general case: DSI exception */
else
{
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param0)); // mov [dsisr],[param0]
- UML_EXH(block, *m_exception[EXCEPTION_DSI], I0); // exh dsi,i0
+ UML_MOV(block, SPR32(SPROEA_DAR), mem(&m_core->param0)); // mov [dar],[param0]
+ // signal read or write to cfunc to get proper reason back
+ if (iswrite)
+ {
+ m_core->param1 = 1;
+ }
+ else
+ {
+ m_core->param1 = 0;
+ }
+ UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
+ UML_EXH(block, *m_exception[EXCEPTION_DSI], I0); // exh dsi,i0
}
}
@@ -1922,8 +1942,11 @@ void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler,
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(srcptr), true); // <subtract cycles>
- UML_HASHJMP(block, m_core->mode, mem(srcptr), *m_nocode); // hashjmp <mode>,<rsreg>,nocode
+ generate_update_cycles(block, &compiler_temp, mem(srcptr), true); // <subtract cycles>
+
+ /* clear two LSBs of the target address to prevent branching to an invalid address */
+ UML_AND(block, I0, mem(srcptr), 0xFFFFFFFC); // and i0, 0xFFFFFFFC
+ UML_HASHJMP(block, m_core->mode, I0, *m_nocode); // hashjmp <mode>,i0,nocode
}
/* update the label */
diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp
index 7b8e2352d33..5abbd29aa96 100644
--- a/src/devices/cpu/tms32025/tms32025.cpp
+++ b/src/devices/cpu/tms32025/tms32025.cpp
@@ -186,7 +186,7 @@ Table 3-2. TMS32025/26 Memory Blocks
const device_type TMS32025 = &device_creator<tms32025_device>;
const device_type TMS32026 = &device_creator<tms32026_device>;
-static ADDRESS_MAP_START( tms32025_data, AS_PROGRAM, 16, tms32025_device )
+static ADDRESS_MAP_START( tms32025_data, AS_DATA, 16, tms32025_device )
AM_RANGE(0x0000, 0x0000) AM_READWRITE(drr_r, drr_w)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(dxr_r, dxr_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(tim_r, tim_w)
@@ -198,7 +198,7 @@ static ADDRESS_MAP_START( tms32025_data, AS_PROGRAM, 16, tms32025_device )
AM_RANGE(0x0300, 0x03ff) AM_RAM AM_SHARE("b1")
ADDRESS_MAP_END
-static ADDRESS_MAP_START( tms32026_data, AS_PROGRAM, 16, tms32025_device )
+static ADDRESS_MAP_START( tms32026_data, AS_DATA, 16, tms32025_device )
AM_RANGE(0x0000, 0x0000) AM_READWRITE(drr_r, drr_w)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(dxr_r, dxr_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(tim_r, tim_w)
@@ -1798,7 +1798,7 @@ void tms32025_device::device_reset()
m_data->install_ram(0x0200, 0x02ff, m_b0);
}
common_reset();
-
+
}
void tms32026_device::device_reset()
diff --git a/src/devices/cpu/z180/z180op.hxx b/src/devices/cpu/z180/z180op.hxx
index 2479479344a..fce6718f40d 100644
--- a/src/devices/cpu/z180/z180op.hxx
+++ b/src/devices/cpu/z180/z180op.hxx
@@ -306,13 +306,9 @@ int z180_device::take_interrupt(int irq)
if( irq == Z180_INT_IRQ0 )
{
- /* Daisy chain mode? If so, call the requesting device */
- if (daisy_chain_present())
- irq_vector = daisy_call_ack_device();
-
- /* else call back the cpu interface to retrieve the vector */
- else
- irq_vector = standard_irq_callback(0);
+ // retrieve the IRQ vector from the daisy chain or CPU interface
+ device_z80daisy_interface *intf = daisy_get_irq_device();
+ irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback_member(*this, 0);
LOG(("Z180 '%s' single int. irq_vector $%02x\n", tag(), irq_vector));
diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp
index 7799dff84d5..cb8c0ecc8ed 100644
--- a/src/devices/cpu/z80/z80.cpp
+++ b/src/devices/cpu/z80/z80.cpp
@@ -3146,32 +3146,28 @@ void z80_device::take_nmi()
void z80_device::take_interrupt()
{
- int irq_vector;
-
PRVPC = 0xffff; // HACK: segag80r protection kludge
- /* Check if processor was halted */
+ // check if processor was halted
leave_halt();
- /* Clear both interrupt flip flops */
+ // clear both interrupt flip flops
m_iff1 = m_iff2 = 0;
- /* Daisy chain mode? If so, call the requesting device */
- if (daisy_chain_present())
- irq_vector = daisy_call_ack_device();
-
- /* else call back the cpu interface to retrieve the vector */
- else
- irq_vector = m_irq_callback(*this, 0);
-
- /* Say hi */
+ // say hi
m_irqack_cb(true);
+ // fetch the IRQ vector
+ device_z80daisy_interface *intf = daisy_get_irq_device();
+ int irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback_member(*this, 0);
LOG(("Z80 '%s' single int. irq_vector $%02x\n", tag(), irq_vector));
/* Interrupt mode 2. Call [i:databyte] */
if( m_im == 2 )
{
+ // Zilog's datasheet claims that "the least-significant bit must be a zero."
+ // However, experiments have confirmed that IM 2 vectors do not have to be
+ // even, and all 8 bits will be used; even $FF is handled normally.
irq_vector = (irq_vector & 0xff) | (m_i << 8);
push(m_pc);
rm16(irq_vector, m_pc);
@@ -3415,8 +3411,6 @@ void z80_device::device_start()
m_decrypted_opcodes_direct = &m_decrypted_opcodes->direct();
m_io = &space(AS_IO);
- m_irq_callback = device_irq_acknowledge_delegate(FUNC(z80_device::standard_irq_callback_member), this);
-
IX = IY = 0xffff; /* IX and IY are FFFF after a reset! */
F = ZF; /* Zero flag is set */
diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h
index ecfd106e1c1..664e484c565 100644
--- a/src/devices/cpu/z80/z80.h
+++ b/src/devices/cpu/z80/z80.h
@@ -276,7 +276,6 @@ protected:
uint8_t m_after_ei; /* are we in the EI shadow? */
uint8_t m_after_ldair; /* same, but for LD A,I or LD A,R */
uint32_t m_ea;
- device_irq_acknowledge_delegate m_irq_callback;
int m_icount;
uint8_t m_rtemp;
diff --git a/src/devices/cpu/z80/z80daisy.cpp b/src/devices/cpu/z80/z80daisy.cpp
index 82e41c42e1a..23169dd3600 100644
--- a/src/devices/cpu/z80/z80daisy.cpp
+++ b/src/devices/cpu/z80/z80daisy.cpp
@@ -11,6 +11,8 @@
#include "emu.h"
#include "z80daisy.h"
+#define VERBOSE 0
+
//**************************************************************************
// DEVICE Z80 DAISY INTERFACE
@@ -164,25 +166,24 @@ int z80_daisy_chain_interface::daisy_update_irq_state()
//-------------------------------------------------
-// call_ack_device - acknowledge an interrupt
-// from a chained device and return the vector
+// daisy_get_irq_device - return the device
+// in the chain that requested the interrupt
//-------------------------------------------------
-int z80_daisy_chain_interface::daisy_call_ack_device()
+device_z80daisy_interface *z80_daisy_chain_interface::daisy_get_irq_device()
{
- int vector = 0;
-
// loop over all devices; dev[0] is the highest priority
for (device_z80daisy_interface *intf = m_chain; intf != nullptr; intf = intf->m_daisy_next)
{
// if this device is asserting the INT line, that's the one we want
int state = intf->z80daisy_irq_state();
- vector = intf->z80daisy_irq_ack();
if (state & Z80_DAISY_INT)
- return vector;
+ return intf;
}
- //logerror("z80daisy_call_ack_device: failed to find an device to ack!\n");
- return vector;
+
+ if (VERBOSE && daisy_chain_present())
+ device().logerror("Interrupt from outside Z80 daisy chain\n");
+ return nullptr;
}
@@ -204,7 +205,6 @@ void z80_daisy_chain_interface::daisy_call_reti_device()
return;
}
}
- //logerror("z80daisy_call_reti_device: failed to find an device to reti!\n");
}
diff --git a/src/devices/cpu/z80/z80daisy.h b/src/devices/cpu/z80/z80daisy.h
index 57d852261bc..896285516ee 100644
--- a/src/devices/cpu/z80/z80daisy.h
+++ b/src/devices/cpu/z80/z80daisy.h
@@ -97,7 +97,7 @@ protected:
// callbacks
int daisy_update_irq_state();
- int daisy_call_ack_device();
+ device_z80daisy_interface *daisy_get_irq_device();
void daisy_call_reti_device();
private:
diff --git a/src/devices/machine/40105.cpp b/src/devices/machine/40105.cpp
index 8dec8b78cec..63db529d3bd 100644
--- a/src/devices/machine/40105.cpp
+++ b/src/devices/machine/40105.cpp
@@ -2,7 +2,16 @@
// copyright-holders:Curt Coder
/**********************************************************************
- CMOS 40105 FIFO Register emulation
+ CD40105/HC40105 4-bit x 16-word FIFO Register
+
+ Part of the 4000B series of CMOS TTL devices, the 40105 includes
+ an asynchronous master reset pin intended to be connected to the
+ system bus.
+
+ Word size can be expanded from 4 bits to 8 bits by connecting two
+ 40105s in parallel, with external AND gates to combine the DIR and
+ DOR outputs. They can also be connected in series to extend the
+ FIFO capacity, with DOR -> SI and /SO <- DIR.
**********************************************************************/
@@ -22,8 +31,8 @@
// DEVICE DEFINITIONS
//**************************************************************************
-const device_type CMOS_40105 = &device_creator<cmos_40105_device>;
-
+const device_type CD40105 = &device_creator<cmos_40105_device>;
+const device_type HC40105 = &device_creator<cmos_40105_device>;
//**************************************************************************
@@ -34,10 +43,17 @@ const device_type CMOS_40105 = &device_creator<cmos_40105_device>;
// cmos_40105_device - constructor
//-------------------------------------------------
-cmos_40105_device::cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, CMOS_40105, "40105", tag, owner, clock, "40105", __FILE__),
+cmos_40105_device::cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : device_t(mconfig, CD40105, "40105 FIFO", tag, owner, clock, "cd40105", __FILE__),
m_write_dir(*this),
- m_write_dor(*this), m_d(0), m_q(0), m_dir(0), m_dor(0), m_si(0), m_so(0)
+ m_write_dor(*this),
+ m_write_q(*this),
+ m_d(0),
+ m_q(0),
+ m_dir(false),
+ m_dor(false),
+ m_si(false),
+ m_so(false)
{
}
@@ -51,6 +67,7 @@ void cmos_40105_device::device_start()
// resolve callbacks
m_write_dir.resolve_safe();
m_write_dor.resolve_safe();
+ m_write_q.resolve_safe();
// state saving
save_item(NAME(m_d));
@@ -68,36 +85,84 @@ void cmos_40105_device::device_start()
void cmos_40105_device::device_reset()
{
- m_fifo = std::queue<uint8_t>();
-
- m_dir = 1;
- m_dor = 0;
- m_si = 0;
-
- m_write_dir(m_dir);
- m_write_dor(m_dor);
+ // invalidate data in queue
+ m_fifo = std::queue<u8>();
+
+ // reset control flip-flops
+ m_dir = true;
+ m_dor = false;
+ m_write_dir(1);
+ m_write_dor(0);
}
//-------------------------------------------------
-// read - read Q
+// read - read output buffer (Q0 to Q3)
//-------------------------------------------------
-uint8_t cmos_40105_device::read()
+u8 cmos_40105_device::read()
{
return m_q;
}
//-------------------------------------------------
-// write - write D
+// write - write input buffer (D0 to D3)
//-------------------------------------------------
-void cmos_40105_device::write(uint8_t data)
+void cmos_40105_device::write(u8 data)
{
m_d = data & 0x0f;
}
+WRITE8_MEMBER(cmos_40105_device::write)
+{
+ write(data);
+}
+
+
+//-------------------------------------------------
+// load_input - load new data into FIFO
+//-------------------------------------------------
+
+void cmos_40105_device::load_input()
+{
+ if (m_fifo.size() == 16)
+ {
+ logerror("Attempt to load data into full FIFO\n");
+ return;
+ }
+
+ m_fifo.push(m_d);
+
+ // DIR remains low if FIFO is full, or else briefly pulses low
+ m_write_dir(0);
+ if (m_fifo.size() == 16)
+ m_dir = false;
+ else
+ m_write_dir(1);
+}
+
+
+//-------------------------------------------------
+// output_ready - place new data at output
+//-------------------------------------------------
+
+void cmos_40105_device::output_ready()
+{
+ if (m_fifo.size() == 0)
+ {
+ logerror("Attempt to output data from empty FIFO\n");
+ return;
+ }
+
+ m_q = m_fifo.front();
+ m_write_q(m_q);
+
+ m_dor = true;
+ m_write_dor(1);
+}
+
//-------------------------------------------------
// si_w - shift in write
@@ -105,22 +170,16 @@ void cmos_40105_device::write(uint8_t data)
WRITE_LINE_MEMBER( cmos_40105_device::si_w )
{
+ // load input on rising edge when ready
if (m_dir && !m_si && state)
{
- m_fifo.push(m_d);
-
- if (m_fifo.size() == 16)
- {
- m_dir = 0;
- m_write_dir(m_dir);
- }
-
+ load_input();
+ }
+ else if (m_si && !state && m_fifo.size() > 0)
+ {
+ // data propagates through FIFO when SI goes low
if (!m_dor)
- {
- m_dor = 1;
- m_write_dor(m_dor);
- }
-
+ output_ready();
}
m_si = state;
@@ -133,18 +192,26 @@ WRITE_LINE_MEMBER( cmos_40105_device::si_w )
WRITE_LINE_MEMBER( cmos_40105_device::so_w )
{
- if (m_dor && m_so && !m_so)
+ // shift out on falling edge when ready
+ if (m_dor && m_so && !state)
{
- m_dor = 0;
- m_write_dor(m_dor);
-
- m_q = m_fifo.front();
m_fifo.pop();
+ m_dor = false;
+ m_write_dor(0);
+ // DOR remains low if FIFO is now empty, or else briefly pulses low
if (m_fifo.size() > 0)
+ output_ready();
+
+ if (!m_dir)
{
- m_dor = 1;
- m_write_dor(m_dor);
+ // raise DIR since FIFO is no longer full
+ m_dir = true;
+ m_write_dir(1);
+
+ // load new input immediately if SI is held high
+ if (m_si)
+ load_input();
}
}
diff --git a/src/devices/machine/40105.h b/src/devices/machine/40105.h
index 67d3a58274e..47a8ce0b1ab 100644
--- a/src/devices/machine/40105.h
+++ b/src/devices/machine/40105.h
@@ -2,7 +2,18 @@
// copyright-holders:Curt Coder
/**********************************************************************
- CMOS 40105 FIFO Register emulation
+ CD40105/HC40105 4-bit x 16-word FIFO Register
+
+***********************************************************************
+ ____ ____
+ /OE 1 |* \_/ | 16 Vcc
+ DIR 2 | | 15 /SO
+ SI 3 | | 14 DOR
+ D0 4 | | 13 Q0
+ D1 5 | 40105 | 12 Q1
+ D2 6 | | 11 Q2
+ D3 7 | | 10 Q3
+ GND 8 |___________| 9 MR
**********************************************************************/
@@ -20,11 +31,15 @@
// INTERFACE CONFIGURATION MACROS
///*************************************************************************
-#define MCFG_40105_ADD(_tag, _dir, _dor) \
- MCFG_DEVICE_ADD(_tag, CMOS_40105, 0) \
- downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir); \
+#define MCFG_40105_DATA_IN_READY_CB(_dir) \
+ downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir);
+
+#define MCFG_40105_DATA_OUT_READY_CB(_dor) \
downcast<cmos_40105_device *>(device)->set_dor_callback(DEVCB_##_dor);
+#define MCFG_40105_DATA_OUT_CB(_out) \
+ downcast<cmos_40105_device *>(device)->set_data_out_callback(DEVCB_##_out);
+
///*************************************************************************
@@ -37,13 +52,15 @@ class cmos_40105_device : public device_t
{
public:
// construction/destruction
- cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<class _dir> void set_dir_callback(_dir dir) { m_write_dir.set_callback(dir); }
template<class _dor> void set_dor_callback(_dor dor) { m_write_dor.set_callback(dor); }
+ template<class _out> void set_data_out_callback(_out out) { m_write_q.set_callback(out); }
- uint8_t read();
- void write(uint8_t data);
+ u8 read();
+ void write(u8 data);
+ DECLARE_WRITE8_MEMBER(write);
DECLARE_WRITE_LINE_MEMBER( si_w );
DECLARE_WRITE_LINE_MEMBER( so_w );
@@ -57,24 +74,30 @@ protected:
virtual void device_reset() override;
private:
+ // private helpers
+ void load_input();
+ void output_ready();
+
+ // callbacks
devcb_write_line m_write_dir;
devcb_write_line m_write_dor;
+ devcb_write8 m_write_q;
- std::queue<uint8_t> m_fifo;
+ std::queue<u8> m_fifo;
- uint8_t m_d;
- uint8_t m_q;
+ u8 m_d;
+ u8 m_q;
- int m_dir;
- int m_dor;
- int m_si;
- int m_so;
+ bool m_dir;
+ bool m_dor;
+ bool m_si;
+ bool m_so;
};
// device type definition
-extern const device_type CMOS_40105;
-
+extern const device_type CD40105;
+extern const device_type HC40105;
#endif
diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp
index 0b3888ca47d..ab6cbd09a1d 100644
--- a/src/devices/machine/68230pit.cpp
+++ b/src/devices/machine/68230pit.cpp
@@ -215,7 +215,7 @@ uint8_t pit68230_device::irq_tiack()
}
/*
- * trigger_interrupt - called when a potential interrupt condition occurs
+ * trigger_interrupt - called when a potential interrupt condition occurs
* but will only generate an interrupt when the PIT is programmed to do so.
*/
void pit68230_device::trigger_interrupt(int source)
@@ -241,7 +241,7 @@ void pit68230_device::trigger_interrupt(int source)
void pit68230_device::tick_clock()
{
if (m_tcr & REG_TCR_TIMER_ENABLE)
- {
+ {
if (m_cntr-- == 0) // Zero detect
{
LOGINT(("Timer reached zero!\n"));
@@ -612,8 +612,8 @@ void pit68230_device::wr_pitreg_tcr(uint8_t data)
{
m_cntr = 0;
if (pen == 1)
- {
- LOG(("PC2 enable/disable TBD\n"));
+ {
+ LOG(("PC2 enable/disable TBD\n"));
}
if (clk == 1)
{
@@ -659,7 +659,7 @@ void pit68230_device::wr_pitreg_cprl(uint8_t data)
void pit68230_device::wr_pitreg_tsr(uint8_t data)
{
LOG(("%s(%02x) \"%s\": \n", FUNCNAME, data, tag()));
- if (data & 1)
+ if (data & 1)
{
m_tsr = 0; // A write resets the TSR;
m_tirq_out_cb(CLEAR_LINE);
diff --git a/src/devices/machine/68230pit.h b/src/devices/machine/68230pit.h
index 92bfe062b43..30850abb39b 100644
--- a/src/devices/machine/68230pit.h
+++ b/src/devices/machine/68230pit.h
@@ -216,61 +216,61 @@ class pit68230_device : public device_t//, public device_execute_interface
protected:
enum { // PGCR - Port Global Control register
- REG_PGCR_MODE_MASK = 0xc0,
- REG_PGCR_MODE_0 = 0x00, // 0 0 Unidirectional 8 bit mode
- REG_PGCR_MODE_1 = 0x40, // 0 1 Unidirectional 16 bit mode
- REG_PGCR_MODE_2 = 0x80, // 1 0 Bidirectional 8 bit mode
- REG_PGCR_MODE_3 = 0xc0, // 1 1 Bidirectional 16 bit mode
- REG_PGCR_H34_ENABLE = 0x20,
- REG_PGCR_H12_ENABLE = 0x10,
- REG_PGCR_H4_SENSE = 0x80,
- REG_PGCR_H3_SENSE = 0x40,
- REG_PGCR_H2_SENSE = 0x20,
- REG_PGCR_H1_SENSE = 0x10,
+ REG_PGCR_MODE_MASK = 0xc0,
+ REG_PGCR_MODE_0 = 0x00, // 0 0 Unidirectional 8 bit mode
+ REG_PGCR_MODE_1 = 0x40, // 0 1 Unidirectional 16 bit mode
+ REG_PGCR_MODE_2 = 0x80, // 1 0 Bidirectional 8 bit mode
+ REG_PGCR_MODE_3 = 0xc0, // 1 1 Bidirectional 16 bit mode
+ REG_PGCR_H34_ENABLE = 0x20,
+ REG_PGCR_H12_ENABLE = 0x10,
+ REG_PGCR_H4_SENSE = 0x80,
+ REG_PGCR_H3_SENSE = 0x40,
+ REG_PGCR_H2_SENSE = 0x20,
+ REG_PGCR_H1_SENSE = 0x10,
};
enum {
- REG_PACR_SUBMODE_MASK = 0xc0,
- REG_PACR_SUBMODE_0 = 0x00, // 0 0
- REG_PACR_SUBMODE_1 = 0x40, // 0 1
- REG_PACR_SUBMODE_2 = 0x80, // 1 0
- REG_PACR_SUBMODE_3 = 0xc0, // 1 1
- REG_PACR_H2_CTRL_MASK = 0x38,
- REG_PACR_H2_CTRL_IN_OUT = 0x20, // H2 sense always cleared if set
- REG_PACR_H2_CTRL_OUT_00 = 0x20, // H2 output negated
- REG_PACR_H2_CTRL_OUT_01 = 0x28, // H2 output asserted
- REG_PACR_H2_CTRL_OUT_10 = 0x30, // H2 output in interlocked input handshake protocol
- REG_PACR_H2_CTRL_OUT_11 = 0x38, // H2 output in pulsed input handshake protocol
- REG_PACR_H2_INT_ENABLE = 0x04,
- REG_PACR_H1_SVCR_ENABLE = 0x02,
- REG_PACR_H1_STATUS_CTRL = 0x01,
+ REG_PACR_SUBMODE_MASK = 0xc0,
+ REG_PACR_SUBMODE_0 = 0x00, // 0 0
+ REG_PACR_SUBMODE_1 = 0x40, // 0 1
+ REG_PACR_SUBMODE_2 = 0x80, // 1 0
+ REG_PACR_SUBMODE_3 = 0xc0, // 1 1
+ REG_PACR_H2_CTRL_MASK = 0x38,
+ REG_PACR_H2_CTRL_IN_OUT = 0x20, // H2 sense always cleared if set
+ REG_PACR_H2_CTRL_OUT_00 = 0x20, // H2 output negated
+ REG_PACR_H2_CTRL_OUT_01 = 0x28, // H2 output asserted
+ REG_PACR_H2_CTRL_OUT_10 = 0x30, // H2 output in interlocked input handshake protocol
+ REG_PACR_H2_CTRL_OUT_11 = 0x38, // H2 output in pulsed input handshake protocol
+ REG_PACR_H2_INT_ENABLE = 0x04,
+ REG_PACR_H1_SVCR_ENABLE = 0x02,
+ REG_PACR_H1_STATUS_CTRL = 0x01,
};
enum {
- REG_PBCR_SUBMODE_MASK = 0xc0,
- REG_PBCR_SUBMODE_00 = 0x00, // 0 0
- REG_PBCR_SUBMODE_01 = 0x40, // 0 1
- REG_PBCR_SUBMODE_10 = 0x80, // 1 0
- REG_PBCR_SUBMODE_11 = 0xc0, // 1 1
- REG_PBCR_SUBMODE_1X = 0x80, // submode 2 or 3
- REG_PBCR_H4_CTRL_MASK = 0x38,
- REG_PBCR_H4_CTRL_IN_OUT = 0x20, // H4 sense always cleared if set
- REG_PBCR_H4_CTRL_OUT_00 = 0x20, // H4 output negated
- REG_PBCR_H4_CTRL_OUT_01 = 0x28, // H4 output asserted
- REG_PBCR_H4_CTRL_OUT_10 = 0x30, // H4 output in interlocked input handshake protocol
- REG_PBCR_H4_CTRL_OUT_11 = 0x38, // H4 output in pulsed input handshake protocol
- REG_PBCR_H4_INT_ENABLE = 0x04,
+ REG_PBCR_SUBMODE_MASK = 0xc0,
+ REG_PBCR_SUBMODE_00 = 0x00, // 0 0
+ REG_PBCR_SUBMODE_01 = 0x40, // 0 1
+ REG_PBCR_SUBMODE_10 = 0x80, // 1 0
+ REG_PBCR_SUBMODE_11 = 0xc0, // 1 1
+ REG_PBCR_SUBMODE_1X = 0x80, // submode 2 or 3
+ REG_PBCR_H4_CTRL_MASK = 0x38,
+ REG_PBCR_H4_CTRL_IN_OUT = 0x20, // H4 sense always cleared if set
+ REG_PBCR_H4_CTRL_OUT_00 = 0x20, // H4 output negated
+ REG_PBCR_H4_CTRL_OUT_01 = 0x28, // H4 output asserted
+ REG_PBCR_H4_CTRL_OUT_10 = 0x30, // H4 output in interlocked input handshake protocol
+ REG_PBCR_H4_CTRL_OUT_11 = 0x38, // H4 output in pulsed input handshake protocol
+ REG_PBCR_H4_INT_ENABLE = 0x04,
REG_PBCR_H3_SVCRQ_ENABLE= 0x02,
- REG_PBCR_H3_STATUS_CTRL = 0x01,
+ REG_PBCR_H3_STATUS_CTRL = 0x01,
};
enum {
- REG_PCDR_TIN_BIT = 2, // BIT number
- REG_PCDR_TIN = 0x04 // bit position
+ REG_PCDR_TIN_BIT = 2, // BIT number
+ REG_PCDR_TIN = 0x04 // bit position
};
enum {
- REG_TCR_TIMER_ENABLE = 0x01
+ REG_TCR_TIMER_ENABLE = 0x01
};
enum { // TCR - Timer Control register
@@ -333,10 +333,10 @@ protected:
uint8_t m_pbdr; // Port B Data register
uint8_t m_pcdr; // Port C Data register
uint8_t m_psr; // Port Status Register
- uint8_t m_tcr; // Timer Control Register
+ uint8_t m_tcr; // Timer Control Register
uint8_t m_tivr; // Timer Interrupt Vector register
- int m_cpr; // Counter Preload Registers (3 x 8 = 24 bits)
- int m_cntr; // - The 24 bit Counter
+ int m_cpr; // Counter Preload Registers (3 x 8 = 24 bits)
+ int m_cntr; // - The 24 bit Counter
uint8_t m_tsr; // Timer Status Register
diff --git a/src/devices/machine/74153.cpp b/src/devices/machine/74153.cpp
index 591fcdedbd1..b6ec97da524 100644
--- a/src/devices/machine/74153.cpp
+++ b/src/devices/machine/74153.cpp
@@ -1,172 +1,173 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/*****************************************************************************
+// license: BSD-3-Clause
+// copyright-holders: Dirk Best
+/***************************************************************************
- 74153 Dual 4-line to 1-line data selectors/multiplexers
+ SN54/74153
+***************************************************************************/
- Pin layout and functions to access pins:
+#include <algorithm>
+#include "74153.h"
- enable_w(0) [1] /1G VCC [16]
- b_w [2] B /2G [15] enable_w(1)
- input_line_w(0,3) [3] 1C3 A [14] a_w
- input_line_w(0,2) [4] 1C2 2C3 [13] input_line_w(1,3)
- input_line_w(0,1) [5] 1C1 2C2 [12] input_line_w(1,2)
- input_line_w(0,0) [6] 1C0 2C1 [11] input_line_w(1,1)
- output_r(0) [7] 1Y 2C0 [10] input_line_w(1,0)
- [8] GND 2Y [9] output_r(1)
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
- Truth table (all logic levels indicate the actual voltage on the line):
+const device_type TTL153 = &device_creator<ttl153_device>;
- INPUTS | OUTPUT
- |
- G | B A | C0 C1 C2 C3 | Y
- --+------+-------------+---
-1 H | X X | X X X X | L
-2 L | L L | X X X X | C0
-3 L | L H | X X X X | C1
-4 L | H L | X X X X | C2
-5 L | H H | X X X X | C3
- --+------+-------------+---
- L = lo (0)
- H = hi (1)
- X = any state
-*****************************************************************************/
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
-#include "emu.h"
-#include "machine/74153.h"
-
-
-const device_type TTL74153 = &device_creator<ttl74153_device>;
+//-------------------------------------------------
+// ttl153_device - constructor
+//-------------------------------------------------
-ttl74153_device::ttl74153_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, TTL74153, "74153 TTL", tag, owner, clock, "74153", __FILE__),
- m_a(0),
- m_b(0)
+ttl153_device::ttl153_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, TTL153, "SN54/74153", tag, owner, clock, "ttl153", __FILE__),
+ m_za_cb(*this),
+ m_zb_cb(*this),
+ m_s{ false, false },
+ m_ia{ false, false, false, false },
+ m_ib{ false, false, false, false },
+ m_z{ false, false }
{
- m_input_lines[0][0] = 0;
- m_input_lines[0][1] = 0;
- m_input_lines[0][2] = 0;
- m_input_lines[0][3] = 0;
- m_input_lines[1][0] = 0;
- m_input_lines[1][1] = 0;
- m_input_lines[1][2] = 0;
- m_input_lines[1][3] = 0;
-
- for (auto & elem : m_enable)
- elem = 0;
-
- for (auto & elem : m_output)
- elem = 0;
-
- for (auto & elem : m_last_output)
- elem = 0;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
-void ttl74153_device::device_start()
+void ttl153_device::device_start()
{
- m_output_cb.bind_relative_to(*owner());
-
- save_item(NAME(m_enable));
- save_item(NAME(m_last_output));
- save_item(NAME(m_input_lines[0][0]));
- save_item(NAME(m_input_lines[0][1]));
- save_item(NAME(m_input_lines[0][2]));
- save_item(NAME(m_input_lines[0][3]));
- save_item(NAME(m_input_lines[1][0]));
- save_item(NAME(m_input_lines[1][1]));
- save_item(NAME(m_input_lines[1][2]));
- save_item(NAME(m_input_lines[1][3]));
- save_item(NAME(m_a));
- save_item(NAME(m_b));
+ // resolve callbacks
+ m_za_cb.resolve_safe();
+ m_zb_cb.resolve_safe();
+
+ // register for save states
+ save_pointer(NAME(m_s), 2);
+ save_pointer(NAME(m_ia), 4);
+ save_pointer(NAME(m_ib), 4);
+ save_pointer(NAME(m_z), 2);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
-void ttl74153_device::device_reset()
+void ttl153_device::device_reset()
{
- m_a = 1;
- m_b = 1;
- m_enable[0] = 1;
- m_enable[1] = 1;
- m_input_lines[0][0] = 1;
- m_input_lines[0][1] = 1;
- m_input_lines[0][2] = 1;
- m_input_lines[0][3] = 1;
- m_input_lines[1][0] = 1;
- m_input_lines[1][1] = 1;
- m_input_lines[1][2] = 1;
- m_input_lines[1][3] = 1;
-
- m_last_output[0] = -1;
- m_last_output[1] = -1;
+ std::fill(std::begin(m_s), std::end(m_s), false);
+ std::fill(std::begin(m_ia), std::end(m_ia), false);
+ std::fill(std::begin(m_ib), std::end(m_ib), false);
+ std::fill(std::begin(m_z), std::end(m_z), false);
}
+//-------------------------------------------------
+// update_a - update output a state
+//-------------------------------------------------
-void ttl74153_device::update()
+void ttl153_device::update_a()
{
- int sel;
- int section;
-
-
- sel = (m_b << 1) | m_a;
+ // calculate state
+ bool za = 0;
+ za |= m_ia[0] && !m_s[1] && !m_s[0];
+ za |= m_ia[1] && !m_s[1] && m_s[0];
+ za |= m_ia[2] && m_s[1] && !m_s[0];
+ za |= m_ia[3] && m_s[1] && m_s[0];
+
+ // output
+ if (za != m_z[0])
+ m_za_cb(za ? 1 : 0);
+
+ m_z[0] = za;
+}
+//-------------------------------------------------
+// update_b - update output b state
+//-------------------------------------------------
- /* process both sections */
- for (section = 0; section < 2; section++)
- {
- if (m_enable[section])
- m_output[section] = 0; // row 1 in truth table
- else
- m_output[section] = m_input_lines[section][sel];
- }
+void ttl153_device::update_b()
+{
+ // calculate state
+ bool zb = 0;
+ zb |= m_ib[0] && !m_s[1] && !m_s[0];
+ zb |= m_ib[1] && !m_s[1] && m_s[0];
+ zb |= m_ib[2] && m_s[1] && !m_s[0];
+ zb |= m_ib[3] && m_s[1] && m_s[0];
+
+ // output
+ if (zb != m_z[1])
+ m_zb_cb(zb ? 1 : 0);
+
+ m_z[1] = zb;
+}
- /* call callback if either of the outputs changed */
- if (!m_output_cb.isnull() &&
- ((m_output[0] != m_last_output[0]) || (m_output[1] != m_last_output[1])))
- {
- m_last_output[0] = m_output[0];
- m_last_output[1] = m_output[1];
+//**************************************************************************
+// INTERFACE
+//**************************************************************************
- m_output_cb();
- }
+WRITE_LINE_MEMBER( ttl153_device::s0_w )
+{
+ m_s[0] = bool(state);
+ update_a();
+ update_b();
}
-
-void ttl74153_device::a_w(int data)
+WRITE_LINE_MEMBER( ttl153_device::s1_w )
{
- m_a = data ? 1 : 0;
+ m_s[1] = bool(state);
+ update_a();
+ update_b();
}
+WRITE_LINE_MEMBER( ttl153_device::i0a_w )
+{
+ m_ia[0] = bool(state);
+ update_a();
+}
-void ttl74153_device::b_w(int data)
+WRITE_LINE_MEMBER( ttl153_device::i1a_w )
{
- m_b = data ? 1 : 0;
+ m_ia[1] = bool(state);
+ update_a();
}
+WRITE_LINE_MEMBER( ttl153_device::i2a_w )
+{
+ m_ia[2] = bool(state);
+ update_a();
+}
-void ttl74153_device::input_line_w(int section, int input_line, int data)
+WRITE_LINE_MEMBER( ttl153_device::i3a_w )
{
- m_input_lines[section][input_line] = data ? 1 : 0;
+ m_ia[3] = bool(state);
+ update_a();
}
+WRITE_LINE_MEMBER( ttl153_device::i0b_w )
+{
+ m_ib[0] = bool(state);
+ update_b();
+}
-void ttl74153_device::enable_w(int section, int data)
+WRITE_LINE_MEMBER( ttl153_device::i1b_w )
{
- m_enable[section] = data ? 1 : 0;
+ m_ib[1] = bool(state);
+ update_b();
}
+WRITE_LINE_MEMBER( ttl153_device::i2b_w )
+{
+ m_ib[2] = bool(state);
+ update_b();
+}
-int ttl74153_device::output_r(int section)
+WRITE_LINE_MEMBER( ttl153_device::i3b_w )
{
- return m_output[section];
+ m_ib[3] = bool(state);
+ update_b();
}
diff --git a/src/devices/machine/74153.h b/src/devices/machine/74153.h
index 77194610742..464e030ba64 100644
--- a/src/devices/machine/74153.h
+++ b/src/devices/machine/74153.h
@@ -1,65 +1,77 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/*****************************************************************************
+// license: BSD-3-Clause
+// copyright-holders: Dirk Best
+/***************************************************************************
- 74153 Dual 4-line to 1-line data selectors/multiplexers
+ SN54/74153
+ Dual 4-Input Multiplexer
- Pin layout and functions to access pins:
+ ___ ___
+ EA/1G 1 |* u | 16 VCC
+ S1/B 2 | | 15 EB/2G
+ I3A/1C3 3 | | 14 S0/A
+ I2A/1C2 4 | | 13 I3B/2C3
+ I1A/1C1 5 | | 12 I2B/2C2
+ I0A/1C0 6 | | 11 I1B/2C1
+ ZA/1Y 7 | | 10 I0B/2C0
+ GND 8 |_______| 9 ZB/2Y
- enable_w(0) [1] /1G VCC [16]
- b_w [2] B /2G [15] enable_w(1)
- input_line_w(0,3) [3] 1C3 A [14] a_w
- input_line_w(0,2) [4] 1C2 2C3 [13] input_line_w(1,3)
- input_line_w(0,1) [5] 1C1 2C2 [12] input_line_w(1,2)
- input_line_w(0,0) [6] 1C0 2C1 [11] input_line_w(1,1)
- output_r(0) [7] 1Y 2C0 [10] input_line_w(1,0)
- [8] GND 2Y [9] output_r(1)
+***************************************************************************/
+#pragma once
- Truth table (all logic levels indicate the actual voltage on the line):
+#ifndef MAME_DEVICES_MACHINE_74153_H
+#define MAME_DEVICES_MACHINE_74153_H
- INPUTS | OUTPUT
- |
- G | B A | C0 C1 C2 C3 | Y
- --+------+-------------+---
- H | X X | X X X X | L
- L | L L | X X X X | C0
- L | L H | X X X X | C1
- L | H L | X X X X | C2
- L | H H | X X X X | C3
- --+------+-------------+---
- L = lo (0)
- H = hi (1)
- X = any state
+#include "emu.h"
-*****************************************************************************/
-#ifndef TTL74153_H
-#define TTL74153_H
+//**************************************************************************
+// INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+#define MCFG_TTL153_ADD(_tag) \
+ MCFG_DEVICE_ADD(_tag, TTL153, 0)
-typedef device_delegate<void (void)> ttl74153_output_delegate;
+#define MCFG_TTL153_ZA_CB(_devcb) \
+ devcb = &ttl153_device::set_za_callback(*device, DEVCB_##_devcb);
-#define TTL74153_OUTPUT_CB(_name) void _name(void)
+#define MCFG_TTL153_ZB_CB(_devcb) \
+ devcb = &ttl153_device::set_zb_callback(*device, DEVCB_##_devcb);
-class ttl74153_device : public device_t
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class ttl153_device : public device_t
{
public:
- ttl74153_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- ~ttl74153_device() {}
+ // construction/destruction
+ ttl153_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // configuration
+ template<class _Object> static devcb_base &set_za_callback(device_t &device, _Object object)
+ { return downcast<ttl153_device &>(device).m_za_cb.set_callback(object); }
- static void set_output_callback(device_t &device, ttl74153_output_delegate callback) { downcast<ttl74153_device &>(device).m_output_cb = callback; }
+ template<class _Object> static devcb_base &set_zb_callback(device_t &device, _Object object)
+ { return downcast<ttl153_device &>(device).m_zb_cb.set_callback(object); }
- /* must call update() after setting the inputs */
- void update();
+ // select
+ DECLARE_WRITE_LINE_MEMBER(s0_w);
+ DECLARE_WRITE_LINE_MEMBER(s1_w);
- void a_w(int data);
- void b_w(int data);
- void input_line_w(int section, int input_line, int data);
- void enable_w(int section, int data);
- int output_r(int section);
+ // input a
+ DECLARE_WRITE_LINE_MEMBER(i0a_w);
+ DECLARE_WRITE_LINE_MEMBER(i1a_w);
+ DECLARE_WRITE_LINE_MEMBER(i2a_w);
+ DECLARE_WRITE_LINE_MEMBER(i3a_w);
+
+ // input b
+ DECLARE_WRITE_LINE_MEMBER(i0b_w);
+ DECLARE_WRITE_LINE_MEMBER(i1b_w);
+ DECLARE_WRITE_LINE_MEMBER(i2b_w);
+ DECLARE_WRITE_LINE_MEMBER(i3b_w);
protected:
// device-level overrides
@@ -67,26 +79,21 @@ protected:
virtual void device_reset() override;
private:
- // internal state
- ttl74153_output_delegate m_output_cb;
-
- /* inputs */
- int m_a; /* pin 14 */
- int m_b; /* pin 2 */
- int m_input_lines[2][4]; /* pins 3-6,10-13 */
- int m_enable[2]; /* pins 1,15 */
-
- /* output */
- int m_output[2]; /* pins 7,9 */
-
- /* internals */
- int m_last_output[2];
+ void update_a();
+ void update_b();
+
+ // callbacks
+ devcb_write_line m_za_cb;
+ devcb_write_line m_zb_cb;
+
+ // state
+ bool m_s[2];
+ bool m_ia[4];
+ bool m_ib[4];
+ bool m_z[2];
};
-extern const device_type TTL74153;
-
-
-#define MCFG_74153_OUTPUT_CB(_class, _method) \
- ttl74153_device::set_output_callback(*device, ttl74153_output_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
+// device type definition
+extern const device_type TTL153;
-#endif
+#endif // MAME_DEVICES_MACHINE_74153_H
diff --git a/src/devices/machine/82s129.cpp b/src/devices/machine/82s129.cpp
index afc368acf9f..f8f8b754ee4 100644
--- a/src/devices/machine/82s129.cpp
+++ b/src/devices/machine/82s129.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Ryan Holtz
/*****************************************************************************
- (DM)9334 8-Bit Addressable Latch
+ 82S129/6 1K-bit TTL bipolar PROM
*****************************************************************************/
diff --git a/src/devices/machine/genpc.cpp b/src/devices/machine/genpc.cpp
index 9a44c04e1d0..af575f674ab 100644
--- a/src/devices/machine/genpc.cpp
+++ b/src/devices/machine/genpc.cpp
@@ -281,7 +281,7 @@ WRITE_LINE_MEMBER( ibm5160_mb_device::keyboard_clock_w )
m_ppi_shift_register |= m_ppi_data_signal << 7;
m_pic8259->ir1_w(m_ppi_shift_enable);
- m_pc_kbdc->data_write_from_mb(!BIT(m_ppi_portb, 2) && !m_ppi_shift_enable);
+ m_pc_kbdc->data_write_from_mb(!m_ppi_shift_enable);
}
}
@@ -365,7 +365,7 @@ WRITE8_MEMBER( ibm5160_mb_device::pc_ppi_portb_w )
m_pic8259->ir1_w(m_ppi_shift_enable);
}
- m_pc_kbdc->data_write_from_mb(!BIT(m_ppi_portb, 2) && !m_ppi_shift_enable);
+ m_pc_kbdc->data_write_from_mb(!m_ppi_shift_enable);
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
}
diff --git a/src/devices/machine/netlist.cpp b/src/devices/machine/netlist.cpp
index 3183f8746fb..7ba29e26fb7 100644
--- a/src/devices/machine/netlist.cpp
+++ b/src/devices/machine/netlist.cpp
@@ -15,6 +15,7 @@
#include "netlist/nl_factory.h"
#include "netlist/nl_parser.h"
#include "netlist/devices/net_lib.h"
+#include "plib/palloc.h"
#include "debugger.h"
//#define LOG_DEV_CALLS(x) printf x
@@ -28,9 +29,12 @@ const device_type NETLIST_SOUND = &device_creator<netlist_mame_sound_device_t>;
const device_type NETLIST_ANALOG_INPUT = &device_creator<netlist_mame_analog_input_t>;
const device_type NETLIST_INT_INPUT = &device_creator<netlist_mame_int_input_t>;
+const device_type NETLIST_ROM_REGION = &device_creator<netlist_mame_rom_t>;
+const device_type NETLIST_RAM_POINTER = &device_creator<netlist_ram_pointer_t>;
const device_type NETLIST_LOGIC_INPUT = &device_creator<netlist_mame_logic_input_t>;
const device_type NETLIST_STREAM_INPUT = &device_creator<netlist_mame_stream_input_t>;
+const device_type NETLIST_LOGIC_OUTPUT = &device_creator<netlist_mame_logic_output_t>;
const device_type NETLIST_ANALOG_OUTPUT = &device_creator<netlist_mame_analog_output_t>;
const device_type NETLIST_STREAM_OUTPUT = &device_creator<netlist_mame_stream_output_t>;
@@ -78,12 +82,13 @@ void netlist_mame_analog_input_t::device_start()
}
+
// ----------------------------------------------------------------------------------------
// netlist_mame_analog_output_t
// ----------------------------------------------------------------------------------------
netlist_mame_analog_output_t::netlist_mame_analog_output_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, NETLIST_ANALOG_INPUT, "Netlist Analog Output", tag, owner, clock, "netlist_analog_output", __FILE__),
+ : device_t(mconfig, NETLIST_ANALOG_OUTPUT, "Netlist Analog Output", tag, owner, clock, "netlist_analog_output", __FILE__),
netlist_mame_sub_interface(*owner),
m_in("")
{
@@ -114,11 +119,46 @@ void netlist_mame_analog_output_t::device_start()
// ----------------------------------------------------------------------------------------
+// netlist_mame_logic_output_t
+// ----------------------------------------------------------------------------------------
+
+netlist_mame_logic_output_t::netlist_mame_logic_output_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, NETLIST_LOGIC_OUTPUT, "Netlist Logic Output", tag, owner, clock, "netlist_logic_output", __FILE__),
+ netlist_mame_sub_interface(*owner),
+ m_in("")
+{
+}
+
+void netlist_mame_logic_output_t::static_set_params(device_t &device, const char *in_name, netlist_logic_output_delegate adelegate)
+{
+ netlist_mame_logic_output_t &mame_output = downcast<netlist_mame_logic_output_t &>(device);
+ mame_output.m_in = in_name;
+ mame_output.m_delegate = adelegate;
+}
+
+void netlist_mame_logic_output_t::custom_netlist_additions(netlist::setup_t &setup)
+{
+ pstring dname = "OUT_" + m_in;
+ m_delegate.bind_relative_to(owner()->machine().root_device());
+
+ plib::owned_ptr<netlist::device_t> dev = plib::owned_ptr<netlist::device_t>::Create<NETLIB_NAME(logic_callback)>(setup.netlist(), setup.build_fqn(dname));
+ static_cast<NETLIB_NAME(logic_callback) *>(dev.get())->register_callback(m_delegate);
+ setup.netlist().register_dev(std::move(dev));
+ setup.register_link(dname + ".IN", m_in);
+}
+
+void netlist_mame_logic_output_t::device_start()
+{
+ LOG_DEV_CALLS(("start %s\n", tag()));
+}
+
+
+// ----------------------------------------------------------------------------------------
// netlist_mame_int_input_t
// ----------------------------------------------------------------------------------------
netlist_mame_int_input_t::netlist_mame_int_input_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, NETLIST_INT_INPUT, "Netlist Logic Input", tag, owner, clock, "netlist_logic_input", __FILE__),
+ : device_t(mconfig, NETLIST_INT_INPUT, "Netlist Integer Input", tag, owner, clock, "netlist_logic_input", __FILE__),
netlist_mame_sub_interface(*owner),
m_param(nullptr),
m_mask(0xffffffff),
@@ -180,6 +220,75 @@ void netlist_mame_logic_input_t::device_start()
}
// ----------------------------------------------------------------------------------------
+// netlist_mame_rom_t
+// ----------------------------------------------------------------------------------------
+
+netlist_mame_rom_t::netlist_mame_rom_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, NETLIST_ROM_REGION, "Netlist ROM Region", tag, owner, clock, "netlist_rom_region", __FILE__)
+ , netlist_mame_sub_interface(*owner)
+ , m_name("")
+ , m_region_tag(nullptr)
+ , m_offset(0)
+ , m_size(0)
+{
+}
+
+void netlist_mame_rom_t::static_set_params(device_t &device, const char *name, const char* region_tag, std::size_t offset, std::size_t size)
+{
+ netlist_mame_rom_t &r = downcast<netlist_mame_rom_t&>(device);
+ LOG_DEV_CALLS(("static_set_params %s\n", device.tag()));
+ r.m_name = name;
+ r.m_region_tag = region_tag;
+ r.m_offset = offset;
+ r.m_size = size;
+}
+
+void netlist_mame_rom_t::custom_netlist_additions(netlist::setup_t &setup)
+{
+ if (memregion(m_region_tag) == nullptr)
+ fatalerror("device %s region %s not found\n", basetag(), m_region_tag);
+ setup.register_source(plib::make_unique_base<netlist::source_t, netlist_data_memregion_t>(setup,
+ m_name, memregion(m_region_tag)->base() + m_offset, m_size));
+}
+
+void netlist_mame_rom_t::device_start()
+{
+}
+
+// ----------------------------------------------------------------------------------------
+// netlist_ram_pointer_t
+// ----------------------------------------------------------------------------------------
+
+netlist_ram_pointer_t::netlist_ram_pointer_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, NETLIST_RAM_POINTER, "Netlist RAM Pointer", tag, owner, clock, "netlist_ram_pointer", __FILE__)
+ , netlist_mame_sub_interface(*owner)
+ , m_param(nullptr)
+ , m_param_name("")
+ , m_data(nullptr)
+{
+}
+
+void netlist_ram_pointer_t::static_set_params(device_t &device, const char *param_name)
+{
+ netlist_ram_pointer_t &netlist = downcast<netlist_ram_pointer_t&>(device);
+ LOG_DEV_CALLS(("static_set_params %s\n", device.tag()));
+ netlist.m_param_name = param_name;
+}
+
+void netlist_ram_pointer_t::device_start()
+{
+ LOG_DEV_CALLS(("start %s\n", tag()));
+ netlist::param_t *p = downcast<netlist_mame_device_t *>(this->owner())->setup().find_param(m_param_name);
+ m_param = dynamic_cast<netlist::param_ptr_t *>(p);
+ if (m_param == nullptr)
+ {
+ fatalerror("device %s wrong parameter type for %s\n", basetag(), m_param_name.cstr());
+ }
+
+ m_data = (*m_param)();
+}
+
+// ----------------------------------------------------------------------------------------
// netlist_mame_stream_input_t
// ----------------------------------------------------------------------------------------
@@ -339,6 +448,17 @@ void netlist_mame_device_t::device_start()
nl_register_devices();
+ /* let sub-devices add sources and do stuff prior to parsing */
+ for (device_t &d : subdevices())
+ {
+ netlist_mame_sub_interface *sdev = dynamic_cast<netlist_mame_sub_interface *>(&d);
+ if( sdev != nullptr )
+ {
+ LOG_DEV_CALLS(("Preparse subdevice %s/%s\n", d.name(), d.shortname()));
+ sdev->pre_parse_action(*m_setup);
+ }
+ }
+
m_setup_func(*m_setup);
/* let sub-devices tweak the netlist */
@@ -673,9 +793,17 @@ void netlist_mame_sound_device_t::sound_stream_update(sound_stream &stream, stre
// memregion source support
// ----------------------------------------------------------------------------------------
-bool netlist_source_memregion_t::parse(netlist::setup_t &setup, const pstring &name)
+std::unique_ptr<plib::pistream> netlist_source_memregion_t::stream(const pstring &name)
{
- memory_region *mem = downcast<netlist_mame_t &>(setup.netlist()).machine().root_device().memregion(m_name.cstr());
- plib::pimemstream istrm(mem->base(),mem->bytes() );
- return setup.parse_stream(istrm, name);
+ memory_region *mem = downcast<netlist_mame_t &>(setup().netlist()).machine().root_device().memregion(m_name.cstr());
+ return plib::make_unique_base<plib::pistream, plib::pimemstream>(mem->base(), mem->bytes());
}
+
+std::unique_ptr<plib::pistream> netlist_data_memregion_t::stream(const pstring &name)
+{
+ if (name == m_name)
+ return plib::make_unique_base<plib::pistream, plib::pimemstream>(m_ptr, m_size);
+ else
+ return std::unique_ptr<plib::pistream>(nullptr);
+}
+
diff --git a/src/devices/machine/netlist.h b/src/devices/machine/netlist.h
index 7d5d8848df6..9428da5d348 100644
--- a/src/devices/machine/netlist.h
+++ b/src/devices/machine/netlist.h
@@ -35,14 +35,28 @@
netlist_analog_output_delegate(& _class :: _member, \
# _class "::" # _member, _class_tag, (_class *)nullptr) );
-#define MCFG_NETLIST_LOGIC_INPUT(_basetag, _tag, _name, _shift) \
- MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_LOGIC_INPUT, 0) \
+#define MCFG_NETLIST_LOGIC_OUTPUT(_basetag, _tag, _IN, _class, _member, _class_tag) \
+ MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_LOGIC_OUTPUT, 0) \
+ netlist_mame_logic_output_t::static_set_params(*device, _IN, \
+ netlist_logic_output_delegate(& _class :: _member, \
+ # _class "::" # _member, _class_tag, (_class *)nullptr) );
+
+#define MCFG_NETLIST_LOGIC_INPUT(_basetag, _tag, _name, _shift) \
+ MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_LOGIC_INPUT, 0) \
netlist_mame_logic_input_t::static_set_params(*device, _name, _shift);
-#define MCFG_NETLIST_INT_INPUT(_basetag, _tag, _name, _shift, _mask) \
- MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_INT_INPUT, 0) \
+#define MCFG_NETLIST_INT_INPUT(_basetag, _tag, _name, _shift, _mask) \
+ MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_INT_INPUT, 0) \
netlist_mame_int_input_t::static_set_params(*device, _name, _mask, _shift);
+#define MCFG_NETLIST_ROM_REGION(_basetag, _tag, _region, _name, _offset, _size) \
+ MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_ROM_REGION, 0) \
+ netlist_mame_rom_t::static_set_params(*device, _name, ":" _region, _offset, _size);
+
+#define MCFG_NETLIST_RAM_POINTER(_basetag, _tag, _name) \
+ MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_RAM_POINTER, 0) \
+ netlist_ram_pointer_t::static_set_params(*device, _name ".m_RAM");
+
#define MCFG_NETLIST_STREAM_INPUT(_basetag, _chan, _name) \
MCFG_DEVICE_ADD(_basetag ":cin" # _chan, NETLIST_STREAM_INPUT, 0) \
netlist_mame_stream_input_t::static_set_params(*device, _chan, _name);
@@ -51,7 +65,6 @@
MCFG_DEVICE_ADD(_basetag ":cout" # _chan, NETLIST_STREAM_OUTPUT, 0) \
netlist_mame_stream_output_t::static_set_params(*device, _chan, _name);
-
#define NETLIST_LOGIC_PORT_CHANGED(_base, _tag) \
PORT_CHANGED_MEMBER(_base ":" _tag, netlist_mame_logic_input_t, input_changed, 0)
@@ -63,11 +76,13 @@
#define MEMREGION_SOURCE(_name) \
- setup.register_source(plib::make_unique_base<netlist::source_t, netlist_source_memregion_t>(_name));
+ setup.register_source(plib::make_unique_base<netlist::source_t, netlist_source_memregion_t>(setup, _name));
#define NETDEV_ANALOG_CALLBACK_MEMBER(_name) \
void _name(const double data, const attotime &time)
+#define NETDEV_LOGIC_CALLBACK_MEMBER(_name) \
+ void _name(const int data, const attotime &time)
// ----------------------------------------------------------------------------------------
@@ -77,14 +92,33 @@
class netlist_source_memregion_t : public netlist::source_t
{
public:
- netlist_source_memregion_t(pstring name)
- : netlist::source_t(), m_name(name)
+ netlist_source_memregion_t(netlist::setup_t &setup, pstring name)
+ : netlist::source_t(setup), m_name(name)
+ {
+ }
+
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
+private:
+ pstring m_name;
+};
+
+class netlist_data_memregion_t : public netlist::source_t
+{
+public:
+ netlist_data_memregion_t(netlist::setup_t &setup,
+ pstring name, uint8_t *ptr, std::size_t size)
+ : netlist::source_t(setup, netlist::source_t::DATA)
+ , m_name(name)
+ , m_ptr(ptr)
+ , m_size(size)
{
}
- bool parse(netlist::setup_t &setup, const pstring &name) override;
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
private:
pstring m_name;
+ uint8_t *m_ptr;
+ std::size_t m_size;
};
class netlist_mame_device_t;
@@ -310,6 +344,7 @@ public:
virtual ~netlist_mame_sub_interface() { }
virtual void custom_netlist_additions(netlist::setup_t &setup) { }
+ virtual void pre_parse_action(netlist::setup_t &setup) { }
inline netlist_mame_device_t &nl_owner() const { return *m_owner; }
@@ -410,13 +445,39 @@ private:
netlist_analog_output_delegate m_delegate;
};
+// ----------------------------------------------------------------------------------------
+// netlist_mame_logic_output_t
+// ----------------------------------------------------------------------------------------
+
+typedef device_delegate<void(const int, const attotime &)> netlist_logic_output_delegate;
+
+class netlist_mame_logic_output_t : public device_t,
+ public netlist_mame_sub_interface
+{
+public:
+
+ // construction/destruction
+ netlist_mame_logic_output_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~netlist_mame_logic_output_t() { }
+
+ static void static_set_params(device_t &device, const char *in_name, netlist_logic_output_delegate adelegate);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+
+private:
+ pstring m_in;
+ netlist_logic_output_delegate m_delegate;
+};
// ----------------------------------------------------------------------------------------
// netlist_mame_int_input_t
// ----------------------------------------------------------------------------------------
class netlist_mame_int_input_t : public device_t,
- public netlist_mame_sub_interface
+ public netlist_mame_sub_interface
{
public:
@@ -457,6 +518,7 @@ private:
pstring m_param_name;
};
+
// ----------------------------------------------------------------------------------------
// netlist_mame_logic_input_t
// ----------------------------------------------------------------------------------------
@@ -503,6 +565,64 @@ private:
};
// ----------------------------------------------------------------------------------------
+// netlist_mame_rom_t
+// ----------------------------------------------------------------------------------------
+
+class netlist_mame_rom_t : public device_t,
+ public netlist_mame_sub_interface
+{
+public:
+
+ // construction/destruction
+ netlist_mame_rom_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~netlist_mame_rom_t() { }
+
+ static void static_set_params(device_t &device, const char *name, const char* region_tag, std::size_t offset, std::size_t size);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+
+private:
+ pstring m_name;
+ const char* m_region_tag;
+ std::size_t m_offset;
+ std::size_t m_size;
+};
+
+// ----------------------------------------------------------------------------------------
+// netlist_ram_pointer_t
+// ----------------------------------------------------------------------------------------
+
+class netlist_ram_pointer_t: public device_t,
+ public netlist_mame_sub_interface
+{
+public:
+
+ // construction/destruction
+ netlist_ram_pointer_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~netlist_ram_pointer_t() { }
+
+ uint8_t* ptr() const { return m_data; }
+
+ static void static_set_params(device_t &device, const char *param_name);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override
+ {
+ m_data = (*m_param)();
+ }
+
+private:
+ netlist::param_ptr_t *m_param;
+ pstring m_param_name;
+ uint8_t* m_data;
+};
+
+// ----------------------------------------------------------------------------------------
// netlist_mame_stream_input_t
// ----------------------------------------------------------------------------------------
@@ -549,8 +669,9 @@ private:
uint32_t m_channel;
pstring m_out_name;
};
+
// ----------------------------------------------------------------------------------------
-// netdev_callback
+// analog_callback
// ----------------------------------------------------------------------------------------
class NETLIB_NAME(analog_callback) : public netlist::device_t
@@ -598,6 +719,54 @@ private:
};
// ----------------------------------------------------------------------------------------
+// logic_callback
+// ----------------------------------------------------------------------------------------
+
+class NETLIB_NAME(logic_callback) : public netlist::device_t
+{
+public:
+ NETLIB_NAME(logic_callback)(netlist::netlist_t &anetlist, const pstring &name)
+ : device_t(anetlist, name)
+ , m_in(*this, "IN")
+ , m_cpu_device(nullptr)
+ , m_last(*this, "m_last", 0)
+ {
+ m_cpu_device = downcast<netlist_mame_cpu_device_t *>(&downcast<netlist_mame_t &>(netlist()).parent());
+ }
+
+ ATTR_COLD void reset() override
+ {
+ m_last = 0;
+ }
+
+ ATTR_COLD void register_callback(netlist_logic_output_delegate callback)
+ {
+ m_callback = callback;
+ }
+
+ NETLIB_UPDATEI()
+ {
+ netlist_sig_t cur = m_in();
+
+ // FIXME: make this a parameter
+ // avoid calls due to noise
+ if (cur != m_last)
+ {
+ m_cpu_device->update_time_x();
+ m_callback(cur, m_cpu_device->local_time());
+ m_cpu_device->check_mame_abort_slice();
+ m_last = cur;
+ }
+ }
+
+private:
+ netlist::logic_input_t m_in;
+ netlist_logic_output_delegate m_callback;
+ netlist_mame_cpu_device_t *m_cpu_device;
+ netlist::state_var<netlist_sig_t> m_last;
+};
+
+// ----------------------------------------------------------------------------------------
// sound_out
// ----------------------------------------------------------------------------------------
@@ -761,7 +930,10 @@ extern const device_type NETLIST_SOUND;
extern const device_type NETLIST_ANALOG_INPUT;
extern const device_type NETLIST_LOGIC_INPUT;
extern const device_type NETLIST_INT_INPUT;
+extern const device_type NETLIST_ROM_REGION;
+extern const device_type NETLIST_RAM_POINTER;
+extern const device_type NETLIST_LOGIC_OUTPUT;
extern const device_type NETLIST_ANALOG_OUTPUT;
extern const device_type NETLIST_STREAM_INPUT;
extern const device_type NETLIST_STREAM_OUTPUT;
diff --git a/src/devices/machine/pci-ide.cpp b/src/devices/machine/pci-ide.cpp
index ab49e816c2c..398831e6cae 100644
--- a/src/devices/machine/pci-ide.cpp
+++ b/src/devices/machine/pci-ide.cpp
@@ -41,11 +41,11 @@ DEVICE_ADDRESS_MAP_START(bus_master_map, 32, ide_pci_device)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT(pci_ide)
- MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", nullptr, true)
+ MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", "cdrom", true)
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(ide_pci_device, ide_interrupt))
//MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE(":maincpu", AS_PROGRAM)
MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE(":pci:00.0", AS_DATA)
- MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide2", ata_devices, nullptr, "cdrom", true)
+ MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide2", ata_devices, "hdd", "cdrom", true)
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(ide_pci_device, ide_interrupt))
//MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE(":maincpu", AS_PROGRAM)
MCFG_BUS_MASTER_IDE_CONTROLLER_SPACE(":pci:00.0", AS_DATA)
diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp
index 1cfb5d45c3e..87f669b2b3e 100644
--- a/src/devices/machine/pit8253.cpp
+++ b/src/devices/machine/pit8253.cpp
@@ -724,7 +724,7 @@ void pit8253_device::update(pit8253_timer *timer)
attotime elapsed_time = now - timer->last_updated;
int64_t elapsed_cycles = elapsed_time.as_double() * timer->clockin;
- LOG1(("update(): timer %d, %d elapsed_cycles\n", timer->index, elapsed_cycles));
+ LOG2(("update(): timer %d, %d elapsed_cycles\n", timer->index, elapsed_cycles));
if (timer->clockin)
timer->last_updated += elapsed_cycles * attotime::from_hz(timer->clockin);
@@ -809,7 +809,15 @@ READ8_MEMBER( pit8253_device::read )
case 3:
/* read bits 0-7 first, then 8-15 */
- data = (value >> (timer->rmsb ? 8 : 0)) & 0xff;
+
+ // reading back the current count while in the middle of a
+ // 16-bit write returns a xor'ed version of the value written
+ // (apricot diagnostic timer test tests this)
+ if (timer->wmsb)
+ data = ~timer->lowcount;
+ else
+ data = value >> (timer->rmsb ? 8 : 0);
+
timer->rmsb = 1 - timer->rmsb;
break;
}
diff --git a/src/devices/machine/wd_fdc.cpp b/src/devices/machine/wd_fdc.cpp
index 5ae55544f36..a8e49bde845 100644
--- a/src/devices/machine/wd_fdc.cpp
+++ b/src/devices/machine/wd_fdc.cpp
@@ -74,6 +74,7 @@ wd_fdc_t::wd_fdc_t(const machine_config &mconfig, device_type type, const char *
enmf_cb(*this)
{
force_ready = false;
+ disable_motor_control = false;
}
void wd_fdc_t::set_force_ready(bool _force_ready)
@@ -81,6 +82,11 @@ void wd_fdc_t::set_force_ready(bool _force_ready)
force_ready = _force_ready;
}
+void wd_fdc_t::set_disable_motor_control(bool _disable_motor_control)
+{
+ disable_motor_control = _disable_motor_control;
+}
+
void wd_fdc_t::device_start()
{
intrq_cb.resolve();
@@ -177,7 +183,7 @@ void wd_fdc_t::set_floppy(floppy_image_device *_floppy)
int next_ready = floppy ? floppy->ready_r() : 1;
if(floppy) {
- if(motor_control)
+ if(motor_control && !disable_motor_control)
floppy->mon_w(status & S_MON ? 0 : 1);
floppy->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(&wd_fdc_t::index_callback, this));
floppy->setup_ready_cb(floppy_image_device::ready_cb(&wd_fdc_t::ready_callback, this));
@@ -1243,7 +1249,7 @@ void wd_fdc_t::spinup()
}
status |= S_MON|S_SPIN;
- if(floppy)
+ if(floppy && !disable_motor_control)
floppy->mon_w(0);
}
@@ -1279,7 +1285,7 @@ void wd_fdc_t::index_callback(floppy_image_device *floppy, int state)
motor_timeout ++;
if(motor_control && motor_timeout >= 5) {
status &= ~S_MON;
- if(floppy)
+ if(floppy && !disable_motor_control)
floppy->mon_w(1);
}
diff --git a/src/devices/machine/wd_fdc.h b/src/devices/machine/wd_fdc.h
index 9d792f33a4f..ed8225535ab 100644
--- a/src/devices/machine/wd_fdc.h
+++ b/src/devices/machine/wd_fdc.h
@@ -116,6 +116,9 @@
#define MCFG_WD_FDC_FORCE_READY \
downcast<wd_fdc_t *>(device)->set_force_ready(true);
+#define MCFG_WD_FDC_DISABLE_MOTOR_CONTROL \
+ downcast<wd_fdc_t *>(device)->set_disable_motor_control(true);
+
#define MCFG_WD_FDC_INTRQ_CALLBACK(_write) \
devcb = &wd_fdc_t::set_intrq_wr_callback(*device, DEVCB_##_write);
@@ -146,6 +149,7 @@ public:
void dden_w(bool dden);
void set_floppy(floppy_image_device *floppy);
void set_force_ready(bool force_ready);
+ void set_disable_motor_control(bool _disable_motor_control);
void cmd_w(uint8_t val);
uint8_t status_r();
@@ -369,7 +373,7 @@ private:
emu_timer *t_gen, *t_cmd, *t_track, *t_sector;
- bool dden, status_type_1, intrq, drq, hld, hlt, enp, force_ready;
+ bool dden, status_type_1, intrq, drq, hld, hlt, enp, force_ready, disable_motor_control;
int main_state, sub_state;
uint8_t command, track, sector, data, status, intrq_cond;
int last_dir;
diff --git a/src/devices/machine/z80dart.cpp b/src/devices/machine/z80dart.cpp
index a2604e38fd6..a5ff95a4793 100644
--- a/src/devices/machine/z80dart.cpp
+++ b/src/devices/machine/z80dart.cpp
@@ -814,6 +814,7 @@ uint8_t z80dart_channel::control_read()
void z80dart_channel::control_write(uint8_t data)
{
int reg = m_wr[0] & WR0_REGISTER_MASK;
+ uint8_t prev = m_wr[reg];
LOG(("Z80DART \"%s\" Channel %c : Control Register Write '%02x'\n", m_owner->tag(), 'A' + m_index, data));
@@ -944,7 +945,8 @@ void z80dart_channel::control_write(uint8_t data)
LOG(("Z80DART \"%s\" Channel %c : Auto Enables %u\n", m_owner->tag(), 'A' + m_index, (data & WR3_AUTO_ENABLES) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Receiver Bits/Character %u\n", m_owner->tag(), 'A' + m_index, get_rx_word_length()));
- update_serial();
+ if (data != prev)
+ update_serial();
break;
case 4:
@@ -953,7 +955,8 @@ void z80dart_channel::control_write(uint8_t data)
LOG(("Z80DART \"%s\" Channel %c : Stop Bits %s\n", m_owner->tag(), 'A' + m_index, stop_bits_tostring(get_stop_bits())));
LOG(("Z80DART \"%s\" Channel %c : Clock Mode %uX\n", m_owner->tag(), 'A' + m_index, get_clock_mode()));
- update_serial();
+ if (data != prev)
+ update_serial();
break;
case 5:
@@ -963,7 +966,8 @@ void z80dart_channel::control_write(uint8_t data)
LOG(("Z80DART \"%s\" Channel %c : Request to Send %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_RTS) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Data Terminal Ready %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_DTR) ? 1 : 0));
- update_serial();
+ if (data != prev)
+ update_serial();
if (data & WR5_RTS)
{
diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h
index 496c82f4d45..ce9fa3074f3 100644
--- a/src/devices/machine/z80scc.h
+++ b/src/devices/machine/z80scc.h
@@ -409,7 +409,7 @@ protected:
WR1_RX_INT_MODE_MASK = 0x18,
WR1_RX_INT_DISABLE = 0x00,
WR1_RX_INT_FIRST = 0x08,
- WR1_RX_INT_ALL = 0x10,
+ WR1_RX_INT_ALL = 0x10,
WR1_RX_INT_PARITY = 0x18,
WR1_WRDY_ON_RX_TX = 0x20,
WR1_WRDY_FUNCTION = 0x40,
diff --git a/src/devices/machine/z80sio.cpp b/src/devices/machine/z80sio.cpp
index bfdf250c263..097891e5991 100644
--- a/src/devices/machine/z80sio.cpp
+++ b/src/devices/machine/z80sio.cpp
@@ -53,26 +53,37 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define VERBOSE 0
-
-#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); }
-#define LOG(x) {}
-#define LOGR(x) {}
-#define LOGSETUP(x) {} LOGPRINT(x)
-#define LOGINT(x) {}
-#define LOGTX(x) {}
-#define LOGRCV(x) {}
-#define LOGCTS(x) {} LOGPRINT(x)
-#define LOGDCD(x) {} LOGPRINT(x)
-#if VERBOSE == 2
+#define LOG_GENERAL 0x001
+#define LOG_SETUP 0x002
+#define LOG_PRINTF 0x004
+#define LOG_READ 0x008
+#define LOG_INT 0x010
+#define LOG_TX 0x020
+#define LOG_RCV 0x040
+#define LOG_CTS 0x080
+#define LOG_DCD 0x100
+
+#define VERBOSE 0 //(LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGR(...) LOGMASK(LOG_READ, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+#define LOGINT(...) LOGMASK(LOG_INT, __VA_ARGS__)
+#define LOGTX(...) LOGMASK(LOG_TX, __VA_ARGS__)
+#define LOGRCV(...) LOGMASK(LOG_RCV, __VA_ARGS__)
+#define LOGCTS(...) LOGMASK(LOG_CTS, __VA_ARGS__)
+#define LOGDCD(...) LOGMASK(LOG_DCD, __VA_ARGS__)
+
+#if VERBOSE & LOG_PRINTF
#define logerror printf
#endif
#ifdef _MSC_VER
-#define LLFORMAT "%I64%"
#define FUNCNAME __func__
#else
-#define LLFORMAT "%lld"
#define FUNCNAME __PRETTY_FUNCTION__
#endif
@@ -178,7 +189,7 @@ upd7201N_device::upd7201N_device(const machine_config &mconfig, const char *tag,
//-------------------------------------------------
void z80sio_device::device_start()
{
- LOG(("%s\n", FUNCNAME));
+ LOG("%s\n", FUNCNAME);
// resolve callbacks
m_out_txda_cb.resolve_safe();
m_out_dtra_cb.resolve_safe();
@@ -214,7 +225,7 @@ void z80sio_device::device_start()
//-------------------------------------------------
void z80sio_device::device_reset()
{
- LOG(("%s \"%s\" \n", FUNCNAME, tag()));
+ LOG("%s \"%s\" \n", FUNCNAME, tag());
m_chanA->reset();
m_chanB->reset();
@@ -229,9 +240,9 @@ int z80sio_device::z80daisy_irq_state()
int i;
- LOGINT(("%s %s A:%d%d%d%d B:%d%d%d%d ",FUNCNAME, tag(),
+ LOGINT("%s %s A:%d%d%d%d B:%d%d%d%d ",FUNCNAME, tag(),
m_int_state[0], m_int_state[1], m_int_state[2], m_int_state[3],
- m_int_state[4], m_int_state[5], m_int_state[6], m_int_state[7]));
+ m_int_state[4], m_int_state[5], m_int_state[6], m_int_state[7]);
// loop over all interrupt sources
for (i = 0; i < 8; i++)
@@ -245,7 +256,7 @@ int z80sio_device::z80daisy_irq_state()
state |= m_int_state[i];
}
- LOGINT(("Interrupt State %u\n", state));
+ LOGINT("Interrupt State %u\n", state);
return state;
}
@@ -258,7 +269,7 @@ int z80sio_device::z80daisy_irq_ack()
{
int i;
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
// loop over all interrupt sources
for (i = 0; i < 8; i++)
@@ -271,7 +282,7 @@ int z80sio_device::z80daisy_irq_ack()
m_chanA->m_rr0 &= ~z80sio_channel::RR0_INTERRUPT_PENDING;
check_interrupts();
- //LOG(("%s %s \n",FUNCNAME, tag(), m_chanB->m_rr2));
+ //LOG("%s %s \n",FUNCNAME, tag(), m_chanB->m_rr2);
return m_chanB->m_rr2;
}
@@ -290,7 +301,7 @@ void z80sio_device::z80daisy_irq_reti()
{
int i;
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
// loop over all interrupt sources
for (i = 0; i < 8; i++)
@@ -314,7 +325,7 @@ void z80sio_device::z80daisy_irq_reti()
//-------------------------------------------------
void z80sio_device::check_interrupts()
{
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
int state = (z80daisy_irq_state() & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE;
m_out_int_cb(state);
}
@@ -325,7 +336,7 @@ void z80sio_device::check_interrupts()
//-------------------------------------------------
void z80sio_device::reset_interrupts()
{
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
// reset internal interrupt sources
for (auto & elem : m_int_state)
{
@@ -344,7 +355,7 @@ void z80sio_device::trigger_interrupt(int index, int state)
uint8_t vector = m_chanB->m_wr2;
int priority;
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
#if 0
if((m_variant == TYPE_I8274) || (m_variant == TYPE_UPD7201))
@@ -412,7 +423,7 @@ void z80sio_device::trigger_interrupt(int index, int state)
//-------------------------------------------------
int z80sio_device::m1_r()
{
- LOGINT(("%s %s \n",FUNCNAME, tag()));
+ LOGINT("%s %s \n",FUNCNAME, tag());
return z80daisy_irq_ack();
}
@@ -426,7 +437,7 @@ READ8_MEMBER( z80sio_device::cd_ba_r )
int cd = BIT(offset, 1);
z80sio_channel *channel = ba ? m_chanB : m_chanA;
- //LOG(("%s %s %c %s read\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" ));
+ //LOG("%s %s %c %s read\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" );
return cd ? channel->control_read() : channel->data_read();
}
@@ -441,7 +452,7 @@ WRITE8_MEMBER( z80sio_device::cd_ba_w )
int cd = BIT(offset, 1);
z80sio_channel *channel = ba ? m_chanB : m_chanA;
- LOG(("%s %s %c %s write\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" ));
+ LOG("%s %s %c %s write\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" );
if (cd)
channel->control_write(data);
@@ -459,7 +470,7 @@ READ8_MEMBER( z80sio_device::ba_cd_r )
int cd = BIT(offset, 0);
z80sio_channel *channel = ba ? m_chanB : m_chanA;
- //LOG(("%s %s %c %s read\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" ));
+ //LOG("%s %s %c %s read\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" );
return cd ? channel->control_read() : channel->data_read();
}
@@ -474,7 +485,7 @@ WRITE8_MEMBER( z80sio_device::ba_cd_w )
int cd = BIT(offset, 0);
z80sio_channel *channel = ba ? m_chanB : m_chanA;
- LOG(("%s %s %c %s write\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" ));
+ LOG("%s %s %c %s write\n",FUNCNAME, tag(), 'A' + ba ? 1 : 0 , cd ? "control" : "data" );
if (cd)
channel->control_write(data);
@@ -508,7 +519,7 @@ z80sio_channel::z80sio_channel(const machine_config &mconfig, const char *tag, d
m_rts(0),
m_sync(0)
{
- LOG(("%s\n",FUNCNAME));
+ LOG("%s\n",FUNCNAME);
// Reset all registers
m_rr0 = m_rr1 = m_rr2 = 0;
m_wr0 = m_wr1 = m_wr2 = m_wr3 = m_wr4 = m_wr5 = m_wr6 = m_wr7 = 0;
@@ -526,7 +537,7 @@ z80sio_channel::z80sio_channel(const machine_config &mconfig, const char *tag, d
//-------------------------------------------------
void z80sio_channel::device_start()
{
- LOG(("%s\n",FUNCNAME));
+ LOG("%s\n",FUNCNAME);
m_uart = downcast<z80sio_device *>(owner());
m_index = m_uart->get_channel_index(this);
m_variant = ((z80sio_device *)m_owner)->m_variant;
@@ -569,7 +580,7 @@ void z80sio_channel::device_start()
//-------------------------------------------------
void z80sio_channel::device_reset()
{
- LOG(("%s\n", FUNCNAME));
+ LOG("%s\n", FUNCNAME);
// Reset RS232 emulation
receive_register_reset();
@@ -606,7 +617,7 @@ void z80sio_channel::tra_callback()
{
if (!(m_wr5 & WR5_TX_ENABLE))
{
- LOG(("%s() \"%s \"Channel %c transmit mark 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c transmit mark 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
// transmit mark
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_txda_cb(1);
@@ -615,7 +626,7 @@ void z80sio_channel::tra_callback()
}
else if (m_wr5 & WR5_SEND_BREAK)
{
- LOG(("%s() \"%s \"Channel %c send break 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c send break 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
// transmit break
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_txda_cb(0);
@@ -626,7 +637,7 @@ void z80sio_channel::tra_callback()
{
int db = transmit_register_get_data_bit();
- LOG(("%s() \"%s \"Channel %c transmit data bit %d m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, db, m_wr5));
+ LOG("%s() \"%s \"Channel %c transmit data bit %d m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, db, m_wr5);
// transmit data
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_txda_cb(db);
@@ -635,7 +646,7 @@ void z80sio_channel::tra_callback()
}
else
{
- LOG(("%s() \"%s \"Channel %c Failed to transmit m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c Failed to transmit m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
logerror("%s \"%s \"Channel %c Failed to transmit\n", FUNCNAME, m_owner->tag(), 'A' + m_index);
}
}
@@ -646,10 +657,10 @@ void z80sio_channel::tra_callback()
//-------------------------------------------------
void z80sio_channel::tra_complete()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
if ((m_wr5 & WR5_TX_ENABLE) && !(m_wr5 & WR5_SEND_BREAK) && !(m_rr0 & RR0_TX_BUFFER_EMPTY))
{
- LOG(("%s() \"%s \"Channel %c Transmit Data Byte '%02x' m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_tx_data, m_wr5));
+ LOG("%s() \"%s \"Channel %c Transmit Data Byte '%02x' m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_tx_data, m_wr5);
transmit_register_setup(m_tx_data);
@@ -661,7 +672,7 @@ void z80sio_channel::tra_complete()
}
else if (m_wr5 & WR5_SEND_BREAK)
{
- LOG(("%s() \"%s \"Channel %c Transmit Break 0 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c Transmit Break 0 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
// transmit break
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_txda_cb(0);
@@ -670,7 +681,7 @@ void z80sio_channel::tra_complete()
}
else
{
- LOG(("%s() \"%s \"Channel %c Transmit Mark 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c Transmit Mark 1 m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
// transmit mark
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_txda_cb(1);
@@ -681,7 +692,7 @@ void z80sio_channel::tra_complete()
// if transmit buffer is empty
if (m_rr0 & RR0_TX_BUFFER_EMPTY)
{
- LOG(("%s() \"%s \"Channel %c Transmit buffer empty m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5));
+ LOG("%s() \"%s \"Channel %c Transmit buffer empty m_wr5:%02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_wr5);
// then all characters have been sent
m_rr1 |= RR1_ALL_SENT;
@@ -699,13 +710,13 @@ void z80sio_channel::rcv_callback()
{
if (m_wr3 & WR3_RX_ENABLE)
{
- LOG(("%s() \"%s \"Channel %c Received Data Bit %d\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_rxd));
+ LOG("%s() \"%s \"Channel %c Received Data Bit %d\n", FUNCNAME, m_owner->tag(), 'A' + m_index, m_rxd);
receive_register_update_bit(m_rxd);
}
#if 0
else
{
- LOG(("%s() \"%s \"Channel %c Received Data Bit but receiver is disabled\n", FUNCNAME, m_owner->tag(), 'A' + m_index));
+ LOG("%s() \"%s \"Channel %c Received Data Bit but receiver is disabled\n", FUNCNAME, m_owner->tag(), 'A' + m_index);
logerror("Z80SIO %s() \"%s \"Channel %c Received data dit but receiver is disabled\n", __func__, m_owner->tag(), 'A' + m_index);
}
#endif
@@ -721,7 +732,7 @@ void z80sio_channel::rcv_complete()
receive_register_extract();
data = get_received_char();
- LOG(("%s() \"%s \"Channel %c Received Data %02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, data));
+ LOG("%s() \"%s \"Channel %c Received Data %02x\n", FUNCNAME, m_owner->tag(), 'A' + m_index, data);
receive_data(data);
}
@@ -732,7 +743,7 @@ void z80sio_channel::rcv_complete()
int z80sio_channel::get_clock_mode()
{
- //LOG(("%s %s\n",FUNCNAME, tag()));
+ //LOG("%s %s\n",FUNCNAME, tag());
int clocks = 1;
switch (m_wr4 & WR4_CLOCK_RATE_MASK)
@@ -759,7 +770,7 @@ CR5 = m_wr5 and SR1 = m_rr1
void z80sio_channel::set_rts(int state)
{
- LOG(("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index));
+ LOG("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index);
if (m_index == z80sio_device::CHANNEL_A)
m_uart->m_out_rtsa_cb(state);
else
@@ -768,8 +779,8 @@ void z80sio_channel::set_rts(int state)
void z80sio_channel::update_rts()
{
- // LOG(("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index));
- LOG(("%s() \"%s\" Channel %c \n", FUNCNAME, m_owner->tag(), 'A' + m_index));
+ // LOG("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index);
+ LOG("%s() \"%s\" Channel %c \n", FUNCNAME, m_owner->tag(), 'A' + m_index);
if (m_wr5 & WR5_RTS)
{
// when the RTS bit is set, the _RTS output goes low
@@ -792,7 +803,7 @@ void z80sio_channel::update_rts()
device_serial_interface::stop_bits_t z80sio_channel::get_stop_bits()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
switch (m_wr4 & WR4_STOP_BITS_MASK)
{
case WR4_STOP_BITS_1: return STOP_BITS_1;
@@ -810,7 +821,7 @@ device_serial_interface::stop_bits_t z80sio_channel::get_stop_bits()
int z80sio_channel::get_rx_word_length()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
int bits = 5;
switch (m_wr3 & WR3_RX_WORD_LENGTH_MASK)
@@ -831,7 +842,7 @@ int z80sio_channel::get_rx_word_length()
int z80sio_channel::get_tx_word_length()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
int bits = 5;
switch (m_wr5 & WR5_TX_WORD_LENGTH_MASK)
@@ -851,7 +862,7 @@ int z80sio_channel::get_tx_word_length()
* Break/Abort latch. */
uint8_t z80sio_channel::do_sioreg_rr0()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
return m_rr0;
}
/*
@@ -859,7 +870,7 @@ uint8_t z80sio_channel::do_sioreg_rr0()
* codes for the I-Field in the SDLC Receive Mode. */
uint8_t z80sio_channel::do_sioreg_rr1()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
return m_rr1;
}
/*
@@ -872,7 +883,7 @@ no interrupts are pending, the vector is modified with V3 = 0, V2 = 1, and
V1 = 1. This register is read only through Channel B. */
uint8_t z80sio_channel::do_sioreg_rr2()
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
// channel B only
return m_index == z80sio_device::CHANNEL_B ? m_rr2 : 0;
}
@@ -887,7 +898,7 @@ uint8_t z80sio_channel::control_read()
uint8_t data = 0;
uint8_t reg = m_wr0 & WR0_REGISTER_MASK;
- //LOG(("%s %s\n",FUNCNAME, tag()));
+ //LOG("%s %s\n",FUNCNAME, tag());
if (reg != 0)
{
// mask out register index
@@ -901,7 +912,7 @@ uint8_t z80sio_channel::control_read()
case REG_RR2_INTERRUPT_VECT: data = do_sioreg_rr2(); break;
default:
logerror("Z80SIO \"%s\" Channel %c : Unsupported RRx register:%02x\n", m_owner->tag(), 'A' + m_index, reg);
- LOG(("%s %s unsupported register:%02x\n",FUNCNAME, tag(), reg));
+ LOG("%s %s unsupported register:%02x\n",FUNCNAME, tag(), reg);
}
return data;
@@ -911,20 +922,20 @@ uint8_t z80sio_channel::control_read()
Handle the WR0 CRC Reset/Init bits separatelly, needed by derived devices separatelly from the commands */
void z80sio_channel::do_sioreg_wr0_resets(uint8_t data)
{
- LOG(("%s %s\n",FUNCNAME, tag()));
+ LOG("%s %s\n",FUNCNAME, tag());
switch (data & WR0_CRC_RESET_CODE_MASK)
{
case WR0_CRC_RESET_NULL:
- LOG(("Z80SIO \"%s\" Channel %c : CRC_RESET_NULL\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : CRC_RESET_NULL\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_CRC_RESET_RX: /* In Synchronous mode: all Os (zeros) (CCITT-O CRC-16) */
- LOG(("Z80SIO \"%s\" Channel %c : CRC_RESET_RX - not implemented\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : CRC_RESET_RX - not implemented\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_CRC_RESET_TX: /* In HDLC mode: all 1s (ones) (CCITT-1) */
- LOG(("Z80SIO \"%s\" Channel %c : CRC_RESET_TX - not implemented\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : CRC_RESET_TX - not implemented\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_CRC_RESET_TX_UNDERRUN: /* Resets Tx underrun/EOM bit (D6 of the SRO register) */
- LOG(("Z80SIO \"%s\" Channel %c : CRC_RESET_TX_UNDERRUN - not implemented\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : CRC_RESET_TX_UNDERRUN - not implemented\n", m_owner->tag(), 'A' + m_index);
break;
default: /* Will not happen unless someone messes with the mask */
logerror("Z80SIO \"%s\" Channel %c : %s Wrong CRC reset/init command:%02x\n", m_owner->tag(), 'A' + m_index, FUNCNAME, data & WR0_CRC_RESET_CODE_MASK);
@@ -937,7 +948,7 @@ void z80sio_channel::do_sioreg_wr0(uint8_t data)
switch (data & WR0_COMMAND_MASK)
{
case WR0_NULL:
- LOG(("Z80SIO \"%s\" Channel %c : Null\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Null\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_RESET_EXT_STATUS:
// reset external/status interrupt
@@ -949,35 +960,35 @@ void z80sio_channel::do_sioreg_wr0(uint8_t data)
if (m_sync) m_rr0 |= RR0_SYNC_HUNT;
if (m_cts) m_rr0 |= RR0_CTS;
- LOG(("Z80SIO \"%s\" Channel %c : Reset External/Status Interrupt\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Reset External/Status Interrupt\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_CHANNEL_RESET:
// channel reset
- LOG(("Z80SIO \"%s\" Channel %c : Channel Reset\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Channel Reset\n", m_owner->tag(), 'A' + m_index);
device_reset();
break;
case WR0_ENABLE_INT_NEXT_RX:
// enable interrupt on next receive character
- LOG(("Z80SIO \"%s\" Channel %c : Enable Interrupt on Next Received Character\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Enable Interrupt on Next Received Character\n", m_owner->tag(), 'A' + m_index);
m_rx_first = 1;
break;
case WR0_RESET_TX_INT:
// reset transmitter interrupt pending
- LOG(("Z80SIO \"%s\" Channel %c : Reset Transmitter Interrupt Pending\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Reset Transmitter Interrupt Pending\n", m_owner->tag(), 'A' + m_index);
logerror("Z80SIO \"%s\" Channel %c : unsupported command: Reset Transmitter Interrupt Pending\n", m_owner->tag(), 'A' + m_index);
break;
case WR0_ERROR_RESET:
// error reset
- LOG(("Z80SIO \"%s\" Channel %c : Error Reset\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Error Reset\n", m_owner->tag(), 'A' + m_index);
m_rr1 &= ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR);
break;
case WR0_RETURN_FROM_INT:
// return from interrupt
- LOG(("Z80SIO \"%s\" Channel %c : Return from Interrupt\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Return from Interrupt\n", m_owner->tag(), 'A' + m_index);
m_uart->z80daisy_irq_reti();
break;
default:
- LOG(("Z80SIO \"%s\" Channel %c : Unsupported WR0 command %02x mask %02x\n", m_owner->tag(), 'A' + m_index, data, WR0_REGISTER_MASK));
+ LOG("Z80SIO \"%s\" Channel %c : Unsupported WR0 command %02x mask %02x\n", m_owner->tag(), 'A' + m_index, data, WR0_REGISTER_MASK);
}
do_sioreg_wr0_resets(data);
@@ -987,29 +998,29 @@ void z80sio_channel::do_sioreg_wr1(uint8_t data)
{
/* TODO: implement vector modifications when WR1 bit D2 is changed */
m_wr1 = data;
- LOG(("Z80SIO \"%s\" Channel %c : External Interrupt Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_EXT_INT_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Transmit Interrupt Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_TX_INT_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Status Affects Vector %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_STATUS_VECTOR) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready Function %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait"));
- LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready on %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ON_RX_TX) ? "Receive" : "Transmit"));
+ LOG("Z80SIO \"%s\" Channel %c : External Interrupt Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_EXT_INT_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Transmit Interrupt Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_TX_INT_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Status Affects Vector %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_STATUS_VECTOR) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Wait/Ready Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Wait/Ready Function %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait");
+ LOG("Z80SIO \"%s\" Channel %c : Wait/Ready on %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ON_RX_TX) ? "Receive" : "Transmit");
switch (data & WR1_RX_INT_MODE_MASK)
{
case WR1_RX_INT_DISABLE:
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt Disabled\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt Disabled\n", m_owner->tag(), 'A' + m_index);
break;
case WR1_RX_INT_FIRST:
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on First Character\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on First Character\n", m_owner->tag(), 'A' + m_index);
break;
case WR1_RX_INT_ALL_PARITY:
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", m_owner->tag(), 'A' + m_index);
break;
case WR1_RX_INT_ALL:
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters\n", m_owner->tag(), 'A' + m_index));
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters\n", m_owner->tag(), 'A' + m_index);
break;
}
}
@@ -1025,45 +1036,45 @@ void z80sio_channel::do_sioreg_wr2(uint8_t data)
m_rr2 = m_wr2;
}
m_uart->check_interrupts();
- LOG(("Z80SIO \"%s\" Channel %c : Interrupt Vector %02x\n", m_owner->tag(), 'A' + m_index, data));
+ LOG("Z80SIO \"%s\" Channel %c : Interrupt Vector %02x\n", m_owner->tag(), 'A' + m_index, data);
}
void z80sio_channel::do_sioreg_wr3(uint8_t data)
{
m_wr3 = data;
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR3_RX_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Auto Enables %u\n", m_owner->tag(), 'A' + m_index, (data & WR3_AUTO_ENABLES) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Receiver Bits/Character %u\n", m_owner->tag(), 'A' + m_index, get_rx_word_length()));
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR3_RX_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Auto Enables %u\n", m_owner->tag(), 'A' + m_index, (data & WR3_AUTO_ENABLES) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Receiver Bits/Character %u\n", m_owner->tag(), 'A' + m_index, get_rx_word_length());
}
void z80sio_channel::do_sioreg_wr4(uint8_t data)
{
m_wr4 = data;
- LOG(("Z80SIO \"%s\" Channel %c : Parity Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR4_PARITY_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Parity %s\n", m_owner->tag(), 'A' + m_index, (data & WR4_PARITY_EVEN) ? "Even" : "Odd"));
- LOG(("Z80SIO \"%s\" Channel %c : Stop Bits %s\n", m_owner->tag(), 'A' + m_index, stop_bits_tostring(get_stop_bits())));
- LOG(("Z80SIO \"%s\" Channel %c : Clock Mode %uX\n", m_owner->tag(), 'A' + m_index, get_clock_mode()));
+ LOG("Z80SIO \"%s\" Channel %c : Parity Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR4_PARITY_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Parity %s\n", m_owner->tag(), 'A' + m_index, (data & WR4_PARITY_EVEN) ? "Even" : "Odd");
+ LOG("Z80SIO \"%s\" Channel %c : Stop Bits %s\n", m_owner->tag(), 'A' + m_index, stop_bits_tostring(get_stop_bits()));
+ LOG("Z80SIO \"%s\" Channel %c : Clock Mode %uX\n", m_owner->tag(), 'A' + m_index, get_clock_mode());
}
void z80sio_channel::do_sioreg_wr5(uint8_t data)
{
m_wr5 = data;
- LOG(("Z80SIO \"%s\" Channel %c : Transmitter Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_TX_ENABLE) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Transmitter Bits/Character %u\n", m_owner->tag(), 'A' + m_index, get_tx_word_length()));
- LOG(("Z80SIO \"%s\" Channel %c : Send Break %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_SEND_BREAK) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Request to Send %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_RTS) ? 1 : 0));
- LOG(("Z80SIO \"%s\" Channel %c : Data Terminal Ready %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_DTR) ? 1 : 0));
+ LOG("Z80SIO \"%s\" Channel %c : Transmitter Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_TX_ENABLE) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Transmitter Bits/Character %u\n", m_owner->tag(), 'A' + m_index, get_tx_word_length());
+ LOG("Z80SIO \"%s\" Channel %c : Send Break %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_SEND_BREAK) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Request to Send %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_RTS) ? 1 : 0);
+ LOG("Z80SIO \"%s\" Channel %c : Data Terminal Ready %u\n", m_owner->tag(), 'A' + m_index, (data & WR5_DTR) ? 1 : 0);
}
void z80sio_channel::do_sioreg_wr6(uint8_t data)
{
- LOG(("Z80SIO \"%s\" Channel %c : Transmit Sync %02x\n", m_owner->tag(), 'A' + m_index, data));
+ LOG("Z80SIO \"%s\" Channel %c : Transmit Sync %02x\n", m_owner->tag(), 'A' + m_index, data);
m_sync = (m_sync & 0xff00) | data;
}
void z80sio_channel::do_sioreg_wr7(uint8_t data)
{
- LOG(("Z80SIO \"%s\" Channel %c : Receive Sync %02x\n", m_owner->tag(), 'A' + m_index, data));
+ LOG("Z80SIO \"%s\" Channel %c : Receive Sync %02x\n", m_owner->tag(), 'A' + m_index, data);
m_sync = (data << 8) | (m_sync & 0xff);
}
@@ -1076,12 +1087,12 @@ void z80sio_channel::control_write(uint8_t data)
if (reg != 0)
{
- LOGSETUP((" * %s %c Reg %02x <- %02x \n", m_owner->tag(), 'A' + m_index, reg, data));
+ LOGSETUP(" * %s %c Reg %02x <- %02x \n", m_owner->tag(), 'A' + m_index, reg, data);
// mask out register index
m_wr0 &= ~WR0_REGISTER_MASK;
}
- LOG(("\n%s(%02x) reg %02x\n", FUNCNAME, data, reg));
+ LOG("\n%s(%02x) reg %02x\n", FUNCNAME, data, reg);
switch (reg)
{
@@ -1124,7 +1135,7 @@ uint8_t z80sio_channel::data_read()
}
}
- LOG(("Z80SIO \"%s\" Channel %c : Data Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data));
+ LOG("Z80SIO \"%s\" Channel %c : Data Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data);
return data;
}
@@ -1139,7 +1150,7 @@ void z80sio_channel::data_write(uint8_t data)
if ((m_wr5 & WR5_TX_ENABLE) && is_transmit_register_empty())
{
- LOG(("Z80SIO \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data));
+ LOG("Z80SIO \"%s\" Channel %c : Transmit Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, m_tx_data);
transmit_register_setup(m_tx_data);
@@ -1151,7 +1162,7 @@ void z80sio_channel::data_write(uint8_t data)
}
else
{
- LOG((" Transmitter %s, data byte dropped\n", m_wr5 & WR5_TX_ENABLE ? "not enabled" : "not emptied"));
+ LOG(" Transmitter %s, data byte dropped\n", m_wr5 & WR5_TX_ENABLE ? "not enabled" : "not emptied");
m_rr0 &= ~RR0_TX_BUFFER_EMPTY;
}
@@ -1164,11 +1175,11 @@ void z80sio_channel::data_write(uint8_t data)
//-------------------------------------------------
void z80sio_channel::receive_data(uint8_t data)
{
- LOG(("%s(%02x) %s:%c\n",FUNCNAME, data, tag(), 'A' + m_index));
+ LOG("%s(%02x) %s:%c\n",FUNCNAME, data, tag(), 'A' + m_index);
if (m_rx_fifo == 2)
{
- LOG((" Overrun detected\n"));
+ LOG(" Overrun detected\n");
// receive overrun error detected
m_rx_error |= RR1_RX_OVERRUN_ERROR;
@@ -1214,7 +1225,7 @@ void z80sio_channel::receive_data(uint8_t data)
m_uart->trigger_interrupt(m_index, INT_RECEIVE);
break;
default:
- LOG(("No interrupt triggered\n"));
+ LOG("No interrupt triggered\n");
}
}
@@ -1226,7 +1237,7 @@ void z80sio_channel::receive_data(uint8_t data)
WRITE_LINE_MEMBER( z80sio_channel::cts_w )
{
- LOG(("%s(%02x) %s:%c\n",FUNCNAME, state, tag(), 'A' + m_index));
+ LOG("%s(%02x) %s:%c\n",FUNCNAME, state, tag(), 'A' + m_index);
if (m_cts != state)
{
@@ -1265,7 +1276,7 @@ WRITE_LINE_MEMBER( z80sio_channel::cts_w )
WRITE_LINE_MEMBER( z80sio_channel::dcd_w )
{
- LOG(("Z80SIO \"%s\" Channel %c : DCD %u\n", m_owner->tag(), 'A' + m_index, state));
+ LOG("Z80SIO \"%s\" Channel %c : DCD %u\n", m_owner->tag(), 'A' + m_index, state);
if (m_dcd != state)
{
@@ -1303,7 +1314,7 @@ WRITE_LINE_MEMBER( z80sio_channel::dcd_w )
WRITE_LINE_MEMBER( z80sio_channel::sync_w )
{
- LOG(("Z80SIO \"%s\" Channel %c : Sync %u\n", m_owner->tag(), 'A' + m_index, state));
+ LOG("Z80SIO \"%s\" Channel %c : Sync %u\n", m_owner->tag(), 'A' + m_index, state);
if (m_sh != state)
{
@@ -1336,7 +1347,7 @@ WRITE_LINE_MEMBER( z80sio_channel::sync_w )
WRITE_LINE_MEMBER( z80sio_channel::rxc_w )
{
- //LOG(("Z80SIO \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A'));
+ //LOG("Z80SIO \"%s\" Channel %c : Receiver Clock Pulse\n", m_owner->tag(), m_index + 'A');
int clocks = get_clock_mode();
if (clocks == 1)
rx_clock_w(state);
@@ -1358,7 +1369,7 @@ WRITE_LINE_MEMBER( z80sio_channel::rxc_w )
WRITE_LINE_MEMBER( z80sio_channel::txc_w )
{
- //LOG(("Z80SIO \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A'));
+ //LOG("Z80SIO \"%s\" Channel %c : Transmitter Clock Pulse\n", m_owner->tag(), m_index + 'A');
int clocks = get_clock_mode();
if (clocks == 1)
tx_clock_w(state);
@@ -1383,10 +1394,11 @@ void z80sio_channel::update_serial()
stop_bits_t stop_bits = get_stop_bits();
parity_t parity;
- LOG(("Z80SIO update_serial\n"));
+ LOG("%s\n", FUNCNAME);
if (m_wr4 & WR4_PARITY_ENABLE)
{
+ LOG("- Parity enabled\n");
if (m_wr4 & WR4_PARITY_EVEN)
parity = PARITY_EVEN;
else
@@ -1401,11 +1413,13 @@ void z80sio_channel::update_serial()
if (m_rxc > 0)
{
+ LOG("- RxC:%d/%d = %d\n", m_rxc, clocks, m_rxc / clocks);
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
+ LOG("- TxC:%d/%d = %d\n", m_txc, clocks, m_txc / clocks);
set_tra_rate(m_txc / clocks);
}
receive_register_reset(); // if stop bits is changed from 0, receive register has to be reset
@@ -1418,7 +1432,7 @@ void z80sio_channel::update_serial()
void z80sio_channel::set_dtr(int state)
{
- LOG(("%s(%d)\n", FUNCNAME, state));
+ LOG("%s(%d)\n", FUNCNAME, state);
m_dtr = state;
if (m_index == z80sio_device::CHANNEL_A)
diff --git a/src/devices/machine/z80sio.h b/src/devices/machine/z80sio.h
index 69c7094fd36..e9dcd4bcb4f 100644
--- a/src/devices/machine/z80sio.h
+++ b/src/devices/machine/z80sio.h
@@ -62,6 +62,9 @@
// DEVICE CONFIGURATION MACROS
//**************************************************************************
+#define SIO_CHANA_TAG "cha"
+#define SIO_CHANB_TAG "chb"
+
#define MCFG_Z80SIO_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, Z80SIO, _clock) \
MCFG_Z80SIO_OFFSETS(_rxa, _txa, _rxb, _txb)
diff --git a/src/devices/sound/dac76.cpp b/src/devices/sound/dac76.cpp
index 965b74473e6..67fc452b260 100644
--- a/src/devices/sound/dac76.cpp
+++ b/src/devices/sound/dac76.cpp
@@ -33,7 +33,7 @@ const device_type DAC76 = &device_creator<dac76_device>;
// dac76_device - constructor
//-------------------------------------------------
-dac76_device::dac76_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+dac76_device::dac76_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, DAC76, "DAC-76 COMDAC", tag, owner, clock, "dac76", __FILE__),
device_sound_interface(mconfig, *this),
m_stream(nullptr),
diff --git a/src/devices/sound/k054539.cpp b/src/devices/sound/k054539.cpp
index c275494557a..78b6d08b291 100644
--- a/src/devices/sound/k054539.cpp
+++ b/src/devices/sound/k054539.cpp
@@ -329,9 +329,19 @@ void k054539_device::init_chip()
stream = stream_alloc(0, 2, clock() / 384);
+ save_item(NAME(voltab));
+ save_item(NAME(pantab));
+ save_item(NAME(gain));
+ save_item(NAME(posreg_latch));
+ save_item(NAME(flags));
+
save_item(NAME(regs));
save_pointer(NAME(ram.get()), 0x4000);
+ save_item(NAME(reverb_pos));
save_item(NAME(cur_ptr));
+ save_item(NAME(cur_limit));
+
+ save_item(NAME(m_timer_state));
}
WRITE8_MEMBER(k054539_device::write)
diff --git a/src/devices/sound/k056800.cpp b/src/devices/sound/k056800.cpp
index 19e572d2c72..fe42ed0b1bb 100644
--- a/src/devices/sound/k056800.cpp
+++ b/src/devices/sound/k056800.cpp
@@ -36,6 +36,7 @@ void k056800_device::device_start()
m_int_handler.resolve_safe();
save_item(NAME(m_int_pending));
+ save_item(NAME(m_int_enabled));
save_item(NAME(m_host_to_snd_regs));
save_item(NAME(m_snd_to_host_regs));
}
diff --git a/src/devices/sound/votrax.cpp b/src/devices/sound/votrax.cpp
index 505ccd3d0a6..bde5fbd6086 100644
--- a/src/devices/sound/votrax.cpp
+++ b/src/devices/sound/votrax.cpp
@@ -1,56 +1,41 @@
// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
+// copyright-holders:Olivier Galibert
/***************************************************************************
votrax.c
- Simple VOTRAX SC-01 simulator based on sample fragments.
+ Votrax SC01A simulation
***************************************************************************/
-#include "emu.h"
-#include "votrax.h"
-
-
-//**************************************************************************
-// DEBUGGING
-//**************************************************************************
-
-#define TEMP_HACKS (1)
-
-#define LOG_TIMING (0)
-#define LOG_LOWPARAM (0)
-#define LOG_GLOTTAL (0)
-#define LOG_TRANSITION (0)
-
-
-
-//**************************************************************************
-// CONSTANTS
-//**************************************************************************
+/*
+ tp3 stb i1 i2 tp2
+ 1 1 o o white noise
+ 1 0 - 1 phone timing clock
+ 1 0 1 0 closure tick
+ 1 0 0 0 sram write pulse
+ 0 - - - sram write pulse
-// note that according to the patent timing circuit, p1/p2 and phi1/phi2
-// run 4x faster than all references in the patent text
-const uint32_t P_CLOCK_BIT = 5; // 5 according to timing diagram
-const uint32_t PHI_CLOCK_BIT = 3; // 3 according to timing diagram
+i1.o = glottal impulse
+i2.o = white noise
+tp1 = phi clock (tied to f2q rom access)
+*/
+#include "emu.h"
+#include "votrax.h"
-//**************************************************************************
-// GLOBAL VARIABLES
-//**************************************************************************
-// device type definition
const device_type VOTRAX_SC01 = &device_creator<votrax_sc01_device>;
-// ROM definition for the Votrax phoneme ROM
+// ROM definition for the Votrax phone ROM
ROM_START( votrax_sc01 )
- ROM_REGION( 0x200, "phoneme", 0 )
- ROM_LOAD( "sc01.bin", 0x0000, 0x200, CRC(0353dd6c) SHA1(00e8e497b96a10bd9f4d7e559433c3c209b0d3a8) )
+ ROM_REGION64_LE( 0x200, "internal", 0 )
+ ROM_LOAD( "sc01a.bin", 0x000, 0x200, CRC(fc416227) SHA1(1d6da90b1807a01b5e186ef08476119a862b5e6d) )
ROM_END
-// textual phoneme names for debugging
-const char *const votrax_sc01_device::s_phoneme_table[64] =
+// textual phone names for debugging
+const char *const votrax_sc01_device::s_phone_table[64] =
{
"EH3", "EH2", "EH1", "PA0", "DT", "A1", "A2", "ZH",
"AH2", "I3", "I2", "I1", "M", "N", "B", "V",
@@ -62,82 +47,65 @@ const char *const votrax_sc01_device::s_phoneme_table[64] =
"THV", "TH", "ER", "EH", "E1", "AW", "PA1", "STOP"
};
-// this waveform is derived from measuring fig. 10 in the patent
-// it is only an approximation
-const double votrax_sc01_device::s_glottal_wave[16] =
+// This waveform is built using a series of transistors as a resistor
+// ladder. There is first a transistor to ground, then a series of
+// seven transistors one quarter the size of the first one, then it
+// finishes by an active resistor to +9V.
+//
+// The terminal of the transistor to ground is used as a middle value.
+// Index 0 is at that value. Index 1 is at 0V. Index 2 to 8 start at
+// just after the resistor down the latter. Indices 9+ are the middle
+// value again.
+//
+// For simplicity, we rescale the values to get the middle at 0 and
+// the top at 1. The final wave is very similar to the patent
+// drawing.
+
+const double votrax_sc01_device::s_glottal_wave[9] =
{
0,
- 16.0/22.0,
- -22.0/22.0,
- -17.0/22.0,
- -15.0/22.0,
- -10.0/22.0,
- -7.0/22.0,
- -4.0/22.0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0
+ -4/7.0,
+ 7/7.0,
+ 6/7.0,
+ 5/7.0,
+ 4/7.0,
+ 3/7.0,
+ 2/7.0,
+ 1/7.0
};
-
-//**************************************************************************
-// LIVE DEVICE
-//**************************************************************************
-
-//-------------------------------------------------
-// votrax_sc01_device - constructor
-//-------------------------------------------------
-
votrax_sc01_device::votrax_sc01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, VOTRAX_SC01, "Votrax SC-01", tag, owner, clock, "votrax", __FILE__),
- device_sound_interface(mconfig, *this),
- m_stream(nullptr),
- m_phoneme_timer(nullptr), m_rom(nullptr), m_inflection(0), m_phoneme(0),
- m_request_cb(*this), m_request_state(0), m_internal_request(0), m_master_clock_freq(0), m_master_clock(0), m_counter_34(0),
- m_latch_70(0), m_latch_72(0), m_beta1(0), m_p2(0), m_p1(0), m_phi2(0), m_phi1(0), m_phi2_20(0), m_phi1_20(0), m_subphoneme_period(0),
- m_subphoneme_count(0), m_clock_88(0), m_latch_42(0), m_counter_84(0), m_latch_92(0), m_srff_132(false), m_srff_114(false), m_srff_112(false),
- m_srff_142(false), m_latch_80(0), m_counter_220(0), m_counter_222(0), m_counter_224(0), m_counter_234(0), m_counter_236(0), m_fgate(0),
- m_glottal_sync(0), m_0625_clock(0), m_counter_46(0), m_latch_46(0), m_latch_168(0), m_latch_170(0), m_f1(0), m_f2(0), m_fc(0), m_f3(0),
- m_f2q(0), m_va(0), m_fa(0), m_noise_clock(0), m_shift_252(0), m_counter_250(0)
+ device_sound_interface(mconfig, *this),
+ m_stream(nullptr),
+ m_rom(*this, "internal"),
+ m_ar_cb(*this)
{
}
-//**************************************************************************
-// READ/WRITE HANDLERS
-//**************************************************************************
-
-//-------------------------------------------------
-// write - handle a write to the control register
-//-------------------------------------------------
-
WRITE8_MEMBER( votrax_sc01_device::write )
{
// flush out anything currently processing
m_stream->update();
+ u8 prev = m_phone;
+
// only 6 bits matter
- m_phoneme = data & 0x3f;
-const uint8_t *rom = m_rom + (m_phoneme << 3);
-osd_printf_debug("%s: STROBE %s (F1=%X F2=%X FC=%X F3=%X F2Q=%X VA=%X FA=%X CL=%X CLD=%X VD=%X PAC=%X PH=%02X)\n",
- machine().time().as_string(3), s_phoneme_table[m_phoneme],
- rom[0] >> 4, rom[1] >> 4, rom[2] >> 4, rom[3] >> 4, rom[4] >> 4, rom[5] >> 4, rom[6] >> 4,
- rom[3] & 0xf, rom[4] & 0xf, rom[5] & 0xf, rom[6] & 0xf, rom[7]);
-
- // the STROBE signal resets the phoneme counter
- m_counter_84 = 0xf;
-
- // not in the schematics, but necessary to fully reset the request latch
- m_latch_92 = 0;
-
- // clear the request signal
- m_request_cb(m_request_state = m_internal_request = CLEAR_LINE);
- m_phoneme_timer->adjust(attotime::zero);
+ m_phone = data & 0x3f;
+
+ if(m_phone != prev || m_phone != 0x3f)
+ logerror("phone %02x.%d %s\n", m_phone, m_inflection, s_phone_table[m_phone]);
+
+ m_ar_state = CLEAR_LINE;
+
+ // Schedule a commit/ar reset at roughly 0.1ms in the future (one
+ // phi1 transition followed by the rom extra state in practice),
+ // but only if there isn't already one on the fly. It will
+ // override an end-of-phone timeout if there's one pending, but
+ // that's not a problem since stb does that anyway.
+ if(m_timer->expire().is_never() || m_timer->param() != T_COMMIT_PHONE)
+ m_timer->adjust(attotime::from_ticks(72, m_mainclock), T_COMMIT_PHONE);
}
@@ -150,134 +118,518 @@ WRITE8_MEMBER( votrax_sc01_device::inflection_w )
{
// only 2 bits matter
data &= 3;
- if (m_inflection == data)
+ if(m_inflection == data)
return;
- // append an inflection marker
m_stream->update();
m_inflection = data;
}
+//-------------------------------------------------
+// sound_stream_update - handle update requests
+// for our sound stream
+//-------------------------------------------------
+
+void votrax_sc01_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
+{
+ for(int i=0; i<samples; i++) {
+ m_sample_count++;
+ if(m_sample_count & 1)
+ chip_update();
+ outputs[0][i] = analog_calc();
+ }
+}
+
+
//**************************************************************************
-// CORE LOGIC
+// DEVICE INTERFACE
//**************************************************************************
//-------------------------------------------------
-// update_subphoneme_clock_period - re-compute the
-// period of the sub-phoneme clock, as a multiple
-// of the master clock
+// rom_region - return a pointer to the device's
+// internal ROM region
//-------------------------------------------------
-void votrax_sc01_device::update_subphoneme_clock_period()
+const tiny_rom_entry *votrax_sc01_device::device_rom_region() const
{
- assert(m_latch_80 < 128);
+ return ROM_NAME( votrax_sc01 );
+}
-/*
- The sub-phoneme timing circuit is based off the switching capacitor
- technique described in the Votrax patent. Replacing the capacitor
- ladder with [Rx] representing the effective resistance, the circuit
- becomes essentially a pair of op-amps:
-
- VM
- | i1
- [R1]
- | Vc
- +----------------------+
- | +---|C1|---+ |
- [R2] | | | |\
- |Vb i2 | |\ | +--++\
- +--[Rx]--+----+-\ | | >
- | | >--+-----+-/
- [R3] +----++/ Vc |/
- |i3 | |/
- +--------+ Va
- |
- [R4]
- |
- 0
-
- We have two op-amps, the left used as a standard amplifier, the right
- one as a comparator. The circuit triggers when the two inputs of the
- right op-amp are equal.
-
- The left part of the circuit (before C1) is simply a current injector.
- It's all made of resistors, there's no modulated input, so everything
- is going to be constant. If you don't know about op-amps used as
- amplifiers, you just need to know that it forces its two inputs to
- have the same voltage while not sending or providing any current
- through there (only though its output in fact).
-
- In the schema, the injected current is i2. Basic equations apply:
- Va = R4.i3
- Vb = Va + R3.i3
- Vb = Va + Rx.i2
- Vc = Vb + R2.i1
- VM = Vc + R1.i1
- i1 = i2 + i3
-
- And the tipping happens when the voltage on the right of C1 reaches
- Vc, so:
- Vc = Va + i2.T/C1
-
- (i2 being a constant, the integration is kinda easy)
-
- Some maths later:
- R3.i3 = Rx.i2 -> i3 = Rx/R3.i2
- i1 = (1+Rx/R3).i2
- Va + (Rx + R2 + R2.Rx/R3).i2 = Va + T/C1.i2
- T = C1*(Rx*(1+R2/R3) + R2)
-
- Which isn't, interestingly though not surprisingly, dependant on Vm,
- R1 or R4. And you have to round it to the next multiple of
- 0.2ms+0.1ms due to the clocking on p2 and its offset to p1 (charging
- only happens on p1 active), and add one p1/p2 cycle (0.2ms) for the
- discharge.
-
- So now you have your base clock, which you have to multiply by 16 to
- get the phoneme length.
-
- r2 = 9e3
- r3 = 1e3
- c1 = 1000e-12
- rx = 1/(5KHz * cx)
-*/
- // determine total capacitance
- double cx = 0;
- if ((m_latch_80 & 0x01) != 0) cx += 5e-12;
- if ((m_latch_80 & 0x02) != 0) cx += 11e-12;
- if ((m_latch_80 & 0x04) != 0) cx += 21e-12;
- if ((m_latch_80 & 0x08) != 0) cx += 43e-12;
- if ((m_latch_80 & 0x10) != 0) cx += 86e-12;
- if ((m_latch_80 & 0x20) != 0) cx += 173e-12;
- if ((m_latch_80 & 0x40) != 0) cx += 345e-12;
-
- // apply the equation above to determine charging time
- // note that the 5kHz listed above for P1 is for a nominal master
- // clock frequency of 1.28MHz, meaning it is master clock / 128
- // which should be the P1 clock but appears to be a bit different
- double p1_frequency = double(m_master_clock_freq) / double(1 << (P_CLOCK_BIT + 2));
- double rx = 1.0 / (p1_frequency * cx);
- double period = 1000e-12 * (rx * (1.0 + 9e3 / 1e3) + 9e3);
-
- // convert to master clock cycles and round up
- m_subphoneme_period = uint32_t(ceil(period * double(m_master_clock_freq)));
+//-------------------------------------------------
+// device_start - handle device startup
+//-------------------------------------------------
+
+void votrax_sc01_device::device_start()
+{
+ // initialize internal state
+ m_mainclock = clock();
+ m_sclock = m_mainclock / 18.0;
+ m_cclock = m_mainclock / 36.0;
+ m_stream = stream_alloc(0, 1, m_sclock);
+ m_timer = timer_alloc();
+
+ // reset outputs
+ m_ar_cb.resolve_safe();
+ m_ar_state = ASSERT_LINE;
+
+ // save inputs
+ save_item(NAME(m_inflection));
+ save_item(NAME(m_phone));
+
+ // save outputs
+ save_item(NAME(m_ar_state));
+
+ // save internal state
+ save_item(NAME(m_rom_duration));
+ save_item(NAME(m_rom_vd));
+ save_item(NAME(m_rom_cld));
+ save_item(NAME(m_rom_fa));
+ save_item(NAME(m_rom_fc));
+ save_item(NAME(m_rom_va));
+ save_item(NAME(m_rom_f1));
+ save_item(NAME(m_rom_f2));
+ save_item(NAME(m_rom_f2q));
+ save_item(NAME(m_rom_f3));
+ save_item(NAME(m_rom_closure));
+ save_item(NAME(m_rom_pause));
+ save_item(NAME(m_cur_fa));
+ save_item(NAME(m_cur_fc));
+ save_item(NAME(m_cur_va));
+ save_item(NAME(m_cur_f1));
+ save_item(NAME(m_cur_f2));
+ save_item(NAME(m_cur_f2q));
+ save_item(NAME(m_cur_f3));
+ save_item(NAME(m_filt_fa));
+ save_item(NAME(m_filt_fc));
+ save_item(NAME(m_filt_va));
+ save_item(NAME(m_filt_f1));
+ save_item(NAME(m_filt_f2));
+ save_item(NAME(m_filt_f2q));
+ save_item(NAME(m_filt_f3));
+ save_item(NAME(m_phonetick));
+ save_item(NAME(m_ticks));
+ save_item(NAME(m_pitch));
+ save_item(NAME(m_closure));
+ save_item(NAME(m_update_counter));
+ save_item(NAME(m_cur_closure));
+ save_item(NAME(m_noise));
+ save_item(NAME(m_cur_noise));
+ save_item(NAME(m_voice_1));
+ save_item(NAME(m_voice_2));
+ save_item(NAME(m_voice_3));
+ save_item(NAME(m_noise_1));
+ save_item(NAME(m_noise_2));
+ save_item(NAME(m_noise_3));
+ save_item(NAME(m_noise_4));
+ save_item(NAME(m_vn_1));
+ save_item(NAME(m_vn_2));
+ save_item(NAME(m_vn_3));
+ save_item(NAME(m_vn_4));
+ save_item(NAME(m_vn_5));
+ save_item(NAME(m_vn_6));
+ save_item(NAME(m_f1_a));
+ save_item(NAME(m_f1_b));
+ save_item(NAME(m_f2v_a));
+ save_item(NAME(m_f2v_b));
+ save_item(NAME(m_f2n_a));
+ save_item(NAME(m_f2n_b));
+ save_item(NAME(m_f3_a));
+ save_item(NAME(m_f3_b));
+ save_item(NAME(m_f4_a));
+ save_item(NAME(m_f4_b));
+ save_item(NAME(m_fx_a));
+ save_item(NAME(m_fx_b));
+ save_item(NAME(m_fn_a));
+ save_item(NAME(m_fn_b));
+}
+
+
+//-------------------------------------------------
+// device_reset - handle device reset
+//-------------------------------------------------
+
+void votrax_sc01_device::device_reset()
+{
+ // Technically, there's no reset in this chip, and initial state
+ // is random. Still, it's a good idea to start it with something
+ // sane.
+
+ m_phone = 0x3f;
+ m_inflection = 0;
+ m_ar_state = ASSERT_LINE;
+ m_ar_cb(m_ar_state);
+
+ m_sample_count = 0;
+
+ // Initialize the m_rom* values
+ phone_commit();
+
+ // Clear the interpolation sram
+ m_cur_fa = m_cur_fc = m_cur_va = 0;
+ m_cur_f1 = m_cur_f2 = m_cur_f2q = m_cur_f3 = 0;
+
+ // Initialize the m_filt* values and the filter coefficients
+ filters_commit(true);
+
+ // Clear the rest of the internal digital state
+ m_pitch = 0;
+ m_closure = 0;
+ m_update_counter = 0;
+ m_cur_closure = true;
+ m_noise = 0;
+ m_cur_noise = false;
+
+ // Clear the analog level histories
+ memset(m_voice_1, 0, sizeof(m_voice_1));
+ memset(m_voice_2, 0, sizeof(m_voice_2));
+ memset(m_voice_3, 0, sizeof(m_voice_3));
+
+ memset(m_noise_1, 0, sizeof(m_noise_1));
+ memset(m_noise_2, 0, sizeof(m_noise_2));
+ memset(m_noise_3, 0, sizeof(m_noise_3));
+ memset(m_noise_4, 0, sizeof(m_noise_4));
+
+ memset(m_vn_1, 0, sizeof(m_vn_1));
+ memset(m_vn_2, 0, sizeof(m_vn_2));
+ memset(m_vn_3, 0, sizeof(m_vn_3));
+ memset(m_vn_4, 0, sizeof(m_vn_4));
+ memset(m_vn_5, 0, sizeof(m_vn_5));
+ memset(m_vn_6, 0, sizeof(m_vn_6));
+}
+
+
+//-------------------------------------------------
+// device_clock_changed - handle dynamic clock
+// changes by altering our output frequency
+//-------------------------------------------------
+
+void votrax_sc01_device::device_clock_changed()
+{
+ // lookup the new frequency of the master clock, and update if changed
+ u32 newfreq = clock();
+ if(newfreq != m_mainclock) {
+ m_stream->update();
+
+ if(!m_timer->expire().is_never()) {
+ // determine how many clock ticks remained on the timer
+ u64 remaining = m_timer->remaining().as_ticks(m_mainclock);
+
+ // adjust the timer to the same number of ticks based on the new frequency
+ m_timer->adjust(attotime::from_ticks(remaining, newfreq));
+ }
+ m_mainclock = newfreq;
+ m_sclock = m_mainclock / 18.0;
+ m_cclock = m_mainclock / 36.0;
+ m_stream->set_sample_rate(m_sclock);
+ filters_commit(true);
+ }
}
+
//-------------------------------------------------
-// bits_to_caps - compute the final capacity from
-// a grid of bit-selected caps
+// device_timer - handle device timer
//-------------------------------------------------
-double votrax_sc01_device::bits_to_caps(uint32_t value, int caps_count, const double *caps_values)
+void votrax_sc01_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- double sum = 0;
- for(int i=0; i<caps_count; i++)
- if(value & (1<<i))
- sum += caps_values[i];
- return sum;
+ m_stream->update();
+
+ switch(param) {
+ case T_COMMIT_PHONE:
+ // strobe -> commit transition,
+ phone_commit();
+ m_timer->adjust(attotime::from_ticks(16*(m_rom_duration*4+1)*4*9+2, m_mainclock), T_END_OF_PHONE);
+ break;
+
+ case T_END_OF_PHONE:
+ // end of phone
+ m_ar_state = ASSERT_LINE;
+ break;
+ }
+
+ m_ar_cb(m_ar_state);
+}
+
+void votrax_sc01_device::phone_commit()
+{
+ // Only these two counters are reset on phone change, the rest is
+ // free-running.
+ m_phonetick = 0;
+ m_ticks = 0;
+
+ // In the real chip, the rom is re-read all the time. Since it's
+ // internal and immutable, no point in not caching it though.
+ for(int i=0; i<64; i++) {
+ u64 val = reinterpret_cast<const u64 *>(m_rom->base())[i];
+ if(m_phone == ((val >> 56) & 0x3f)) {
+ m_rom_f1 = bitswap(val, 0, 7, 14, 21);
+ m_rom_va = bitswap(val, 1, 8, 15, 22);
+ m_rom_f2 = bitswap(val, 2, 9, 16, 23);
+ m_rom_fc = bitswap(val, 3, 10, 17, 24);
+ m_rom_f2q = bitswap(val, 4, 11, 18, 25);
+ m_rom_f3 = bitswap(val, 5, 12, 19, 26);
+ m_rom_fa = bitswap(val, 6, 13, 20, 27);
+
+ // These two values have their bit orders inverted
+ // compared to everything else due to a bug in the
+ // prototype (miswiring of the comparator with the ticks
+ // count) they compensated in the rom.
+
+ m_rom_cld = bitswap(val, 34, 32, 30, 28);
+ m_rom_vd = bitswap(val, 35, 33, 31, 29);
+
+ m_rom_closure = bitswap(val, 36);
+ m_rom_duration = bitswap(~val, 37, 38, 39, 40, 41, 42, 43);
+
+ // Hard-wired on the die, not an actual part of the rom.
+ m_rom_pause = (m_phone == 0x03) || (m_phone == 0x3e);
+
+ if(0)
+ logerror("commit fa=%x va=%x fc=%x f1=%x f2=%x f2q=%x f3=%x dur=%02x cld=%x vd=%d cl=%d pause=%d\n", m_rom_fa, m_rom_va, m_rom_fc, m_rom_f1, m_rom_f2, m_rom_f2q, m_rom_f3, m_rom_duration, m_rom_cld, m_rom_vd, m_rom_closure, m_rom_pause);
+
+ // That does not happen in the sc01(a) rom, but let's
+ // cover our behind.
+ if(m_rom_cld == 0)
+ m_cur_closure = m_rom_closure;
+
+ return;
+ }
+ }
+}
+
+void votrax_sc01_device::interpolate(u8 &reg, u8 target)
+{
+ // One step of interpolation, adds one eight of the distance
+ // between the current value and the target.
+ reg = reg - (reg >> 3) + (target << 1);
+}
+
+void votrax_sc01_device::chip_update()
+{
+ // Phone tick counter update. Stopped when ticks reach 16.
+ // Technically the counter keeps updating, but the comparator is
+ // disabled.
+ if(m_ticks != 0x10) {
+ m_phonetick++;
+ // Comparator is with duration << 2, but there's a one-tick
+ // delay in the path.
+ if(m_phonetick == ((m_rom_duration << 2) | 1)) {
+ m_phonetick = 0;
+ m_ticks++;
+ if(m_ticks == m_rom_cld)
+ m_cur_closure = m_rom_closure;
+ }
+ }
+
+ // The two update timing counters. One divides by 16, the other
+ // by 48, and they're phased so that the 208Hz counter ticks
+ // exactly between two 625Hz ticks.
+ m_update_counter++;
+ if(m_update_counter == 0x30)
+ m_update_counter = 0;
+
+ bool tick_625 = !(m_update_counter & 0xf);
+ bool tick_208 = m_update_counter == 0x28;
+
+ // Formant update. Die bug there: fc should be updated, not va.
+ // The formants are frozen on a pause phone unless both voice and
+ // noise volumes are zero.
+ if(tick_208 && (!m_rom_pause || !(m_filt_fa || m_filt_va))) {
+ // interpolate(m_cur_va, m_rom_va);
+ interpolate(m_cur_fc, m_rom_fc);
+ interpolate(m_cur_f1, m_rom_f1);
+ interpolate(m_cur_f2, m_rom_f2);
+ interpolate(m_cur_f2q, m_rom_f2q);
+ interpolate(m_cur_f3, m_rom_f3);
+ // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
+ }
+
+ // Non-formant update. Same bug there, va should be updated, not fc.
+ if(tick_625) {
+ if(m_ticks >= m_rom_vd)
+ interpolate(m_cur_fa, m_rom_fa);
+ if(m_ticks >= m_rom_cld)
+ // interpolate(m_cur_fc, m_rom_fc);
+ interpolate(m_cur_va, m_rom_va);
+ // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
+ }
+
+ // Closure counter, reset every other tick in theory when not
+ // active (on the extra rom cycle).
+ //
+ // The closure level is immediatly used in the analog path,
+ // there's no pitch synchronization.
+
+ if(!m_cur_closure && (m_filt_fa || m_filt_va))
+ m_closure = 0;
+ else if(m_closure != 7 << 2)
+ m_closure ++;
+
+ // Pitch counter. Equality comparison, so it's possible to make
+ // it miss by manipulating the inflection inputs, but it'll wrap.
+ // There's a delay, hence the +1.
+ m_pitch = (m_pitch + 1) & 0x7f;
+ if(m_pitch == (0x7f ^ (m_inflection << 4) ^ m_filt_f1) + 1)
+ m_pitch = 0;
+
+ // Filters are updated in index 1 of the pitch wave, which does
+ // indeed mean four times in a row.
+ if((m_pitch >> 2) == 1)
+ filters_commit(false);
+
+ // Noise shift register. 15 bits, with a nxor on the last two
+ // bits for the loop.
+ bool inp = (1||m_filt_fa) && m_cur_noise && (m_noise != 0x7fff);
+ m_noise = ((m_noise << 1) & 0x7ffe) | inp;
+ m_cur_noise = !(((m_noise >> 14) ^ (m_noise >> 13)) & 1);
+
+ // logerror("tick %02x.%03x 625=%d 208=%d pitch=%02x.%x ns=%04x ni=%d noise=%d cl=%x.%x clf=%d/%d\n", m_ticks, m_phonetick, tick_625, tick_208, m_pitch >> 2, m_pitch & 3, m_noise, inp, m_cur_noise, m_closure >> 2, m_closure & 3, m_rom_closure, m_cur_closure);
+}
+
+void votrax_sc01_device::filters_commit(bool force)
+{
+ m_filt_fa = m_cur_fa >> 4;
+ m_filt_fc = m_cur_fc >> 4;
+ m_filt_va = m_cur_va >> 4;
+
+ if(force || m_filt_f1 != m_cur_f1 >> 4) {
+ m_filt_f1 = m_cur_f1 >> 4;
+
+ build_standard_filter(m_f1_a, m_f1_b,
+ 11247,
+ 11797,
+ 949,
+ 52067,
+ 2280 + bits_to_caps(m_filt_f1, { 2546, 4973, 9861, 19724 }),
+ 166272);
+ }
+
+ if(force || m_filt_f2 != m_cur_f2 >> 3 || m_filt_f2q != m_cur_f2q >> 4) {
+ m_filt_f2 = m_cur_f2 >> 3;
+ m_filt_f2q = m_cur_f2q >> 4;
+
+ build_standard_filter(m_f2v_a, m_f2v_b,
+ 24840,
+ 29154,
+ 829 + bits_to_caps(m_filt_f2q, { 1390, 2965, 5875, 11297 }),
+ 38180,
+ 2352 + bits_to_caps(m_filt_f2, { 833, 1663, 3164, 6327, 12654 }),
+ 34270);
+
+ build_injection_filter(m_f2n_a, m_f2n_b,
+ 29154,
+ 829 + bits_to_caps(m_filt_f2q, { 1390, 2965, 5875, 11297 }),
+ 38180,
+ 2352 + bits_to_caps(m_filt_f2, { 833, 1663, 3164, 6327, 12654 }),
+ 34270);
+ }
+
+ if(force || m_filt_f3 != m_cur_f3 >> 4) {
+ m_filt_f3 = m_cur_f3 >> 4;
+ build_standard_filter(m_f3_a, m_f3_b,
+ 0,
+ 17594,
+ 868,
+ 18828,
+ 8480 + bits_to_caps(m_filt_f3, { 2226, 4485, 9056, 18111 }),
+ 50019);
+ }
+
+ if(force) {
+ build_standard_filter(m_f4_a, m_f4_b,
+ 0,
+ 28810,
+ 1165,
+ 21457,
+ 8558,
+ 7289);
+
+ build_lowpass_filter(m_fx_a, m_fx_b,
+ 1122,
+ 23131);
+
+ build_noise_shaper_filter(m_fn_a, m_fn_b,
+ 15500,
+ 14854,
+ 8450,
+ 9523,
+ 14083);
+ }
+
+ if(0)
+ if(m_filt_fa || m_filt_va || m_filt_fc || m_filt_f1 || m_filt_f2 || m_filt_f2q || m_filt_f3)
+ logerror("filter fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%x f3=%x\n",
+ m_filt_fa, m_filt_va, m_filt_fc, m_filt_f1, m_filt_f2, m_filt_f2q, m_filt_f3);
+}
+
+stream_sample_t votrax_sc01_device::analog_calc()
+{
+ // Voice-only path.
+ // 1. Pick up the pitch wave
+
+ double v = m_pitch >= (9 << 2) ? 0 : s_glottal_wave[m_pitch >> 2];
+
+ // 2. Multiply by the initial amplifier. It's linear on the die,
+ // even if it's not in the patent.
+ v = v * m_filt_va / 15.0;
+ shift_hist(v, m_voice_1);
+
+ // 3. Apply the f1 filter
+ v = apply_filter(m_voice_1, m_voice_2, m_f1_a, m_f1_b);
+ shift_hist(v, m_voice_2);
+
+ // 4. Apply the f2 filter, voice half
+ v = apply_filter(m_voice_2, m_voice_3, m_f2v_a, m_f2v_b);
+ shift_hist(v, m_voice_3);
+
+ // Noise-only path
+ // 5. Pick up the noise pitch. Amplitude is linear. Base
+ // intensity should be checked w.r.t the voice.
+ double n = 1e4 * ((m_pitch & 0x40 ? m_cur_noise : false) ? 1 : -1);
+ n = n * m_filt_fa / 15.0;
+ shift_hist(n, m_noise_1);
+
+ // 6. Apply the noise shaper
+ n = apply_filter(m_noise_1, m_noise_2, m_fn_a, m_fn_b);
+ shift_hist(n, m_noise_2);
+
+ // 7. Scale with the f2 noise input
+ double n2 = n * m_filt_fc / 15.0;
+ shift_hist(n2, m_noise_3);
+
+ // 8. Apply the f2 filter, noise half,
+ n2 = apply_filter(m_noise_3, m_noise_4, m_f2n_a, m_f2n_b);
+ shift_hist(n2, m_noise_4);
+
+ // Mixed path
+ // 9. Add the f2 voice and f2 noise outputs
+ double vn = v + n2;
+ shift_hist(vn, m_vn_1);
+
+ // 10. Apply the f3 filter
+ vn = apply_filter(m_vn_1, m_vn_2, m_f3_a, m_f3_b);
+ shift_hist(vn, m_vn_2);
+
+ // 11. Second noise insertion
+ vn += n * (5 + (15^m_filt_fc))/20.0;
+ shift_hist(vn, m_vn_3);
+
+ // 12. Apply the f4 filter
+ vn = apply_filter(m_vn_3, m_vn_4, m_f4_a, m_f4_b);
+ shift_hist(vn, m_vn_4);
+
+ // 13. Apply the glottal closure amplitude, also linear
+ vn = vn * (7 ^ (m_cur_closure >> 2)) / 7.0;
+ shift_hist(vn, m_vn_5);
+
+ // 13. Apply the final fixed filter
+ vn = apply_filter(m_vn_5, m_vn_6, m_fx_a, m_fx_b);
+ shift_hist(vn, m_vn_6);
+
+ return int(vn*50000);
}
/*
@@ -301,6 +653,8 @@ double votrax_sc01_device::bits_to_caps(uint32_t value, int caps_count, const do
| V2^ \++-0
| \|
+ It happens to be what most of the filters in the sc01a look like.
+
You need to determine the transfer function H(s) of the circuit, which is
defined as the ratio Vo/Vi. To do that, you use some properties:
@@ -437,24 +791,56 @@ double votrax_sc01_device::bits_to_caps(uint32_t value, int caps_count, const do
- apply the now non-amplifying filter to the historized amplified
input
- That way reduces the probability of the output boucing all over the
+ That way reduces the probability of the output bouncing all over the
place.
+ Except, we're not done yet. Doing resistors precisely in an IC is
+ very hard and/or expensive (you may have heard of "laser cut
+ resistors" in DACs of the time). Doing capacitors is easier, and
+ their value is proportional to their surface. So there are no
+ resistors on the sc01 die (which is a lie, there are three, but not
+ in the filter path. They are used to scale the voltage in the pitch
+ wave and to generate +5V from the +9V), but a magic thing called a
+ switched capacitor. Lookup patent 4,433,210 for details. Using
+ high frequency switching a capacitor can be turned into a resistor
+ of value 1/(C*f) where f is the switching frequency (20Khz,
+ main/36). And the circuit is such that the absolute value of the
+ capacitors is irrelevant, only their ratio is useful, which factors
+ out the intrinsic capacity-per-surface-area of the IC which may be
+ hard to keep stable from one die to another. As a result all the
+ capacitor values we use are actually surfaces in square micrometers.
+
+ For the curious, it looks like the actual capacitance was around 25
+ femtofarad per square micrometer.
+
*/
+void votrax_sc01_device::build_standard_filter(double *a, double *b,
+ double c1t, // Unswitched cap, input, top
+ double c1b, // Switched cap, input, bottom
+ double c2t, // Unswitched cap, over first amp-op, top
+ double c2b, // Switched cap, over first amp-op, bottom
+ double c3, // Cap between the two op-amps
+ double c4) // Cap over second op-amp
+{
+ // First compute the three coefficients of H(s). One can note
+ // that there is as many capacitor values on both sides of the
+ // division, which confirms that the capacity-per-surface-area
+ // is not needed.
+ double k0 = c1t / (m_cclock * c1b);
+ double k1 = c4 * c2t / (m_cclock * c1b * c3);
+ double k2 = c4 * c2b / (m_cclock * m_cclock * c1b * c3);
-//-------------------------------------------------------------
-// filter_s_to_z - analog to digital filter transformation
-//-------------------------------------------------------------
+ // Estimate the filter cutoff frequency
+ double fpeak = sqrt(fabs(k0*k1 - k2))/(2*M_PI*k2);
-void votrax_sc01_device::filter_s_to_z(const double *k, double fs, double *a, double *b)
-{
- double fpeak = sqrt(fabs(k[0]*k[1]-k[2]))/(2*M_PI*k[2]);
- double zc = 2*M_PI*fpeak/tan(M_PI*fpeak/fs);
+ // Turn that into a warp multiplier
+ double zc = 2*M_PI*fpeak/tan(M_PI*fpeak / m_sclock);
- double m0 = zc*k[0];
- double m1 = zc*k[1];
- double m2 = zc*zc*k[2];
+ // Finally compute the result of the z-transform
+ double m0 = zc*k0;
+ double m1 = zc*k1;
+ double m2 = zc*zc*k2;
a[0] = 1+m0;
a[1] = 3+m0;
@@ -466,912 +852,154 @@ void votrax_sc01_device::filter_s_to_z(const double *k, double fs, double *a, do
b[3] = 1-m1+m2;
}
+/*
+ Second filter type used once at the end, much simpler:
-//-------------------------------------------------------------
-// apply_filter - apply the digital filter (before output
-// shifting, so y[0] is one step in the past)
-//-------------------------------------------------------------
-double votrax_sc01_device::apply_filter(const double *x, const double *y, const double *a, const double *b)
-{
- return (x[0]*a[0] + x[1]*a[1] + x[2]*a[2] + x[3]*a[3] - y[0]*b[1] - y[1]*b[2] - y[2]*b[3]) / b[0];
-}
-
+ | +--[R1]--+
+ | | |
+ | +--|C1|--+
+ | | |
+ | Vi | |\ |
+ | ---[R0]--+--+-\ |
+ | | >--+------ Vo
+ | 0-++/
+ | |/
-//-------------------------------------------------------------
-// shift_hist - shift a value in an output history
-//-------------------------------------------------------------
-void votrax_sc01_device::shift_hist(double val, double *hist_array, int hist_size)
-{
- for(int i = 0; i < hist_size-1; i++)
- hist_array[hist_size-1-i] = hist_array[hist_size-2-i];
- hist_array[0] = val;
-}
-
-
-//-------------------------------------------------
-// sound_stream_update - handle update requests
-// for our sound stream
-//-------------------------------------------------
+ Vi/R0 = Vo / (1/(1/R1 + s.C1)) = Vo (1/R1 + s.C1)
+ H(s) = Vo/Vi = (R1/R0) * (1 / (1 + s.R1.C1))
+*/
-void votrax_sc01_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
-{
- // determine how many master half-clocks per sample
- int half_clocks_per_sample = (m_master_clock_freq * 2) / stream.sample_rate();
-
- // iterate over clocks (samples)
- stream_sample_t *dest = outputs[0];
- while (samples--)
- {
- // run the digital logic at the master clock rate
- double glottal_out = 0;
- uint8_t noise_out_digital = 0;
- for (int curclock = 0; curclock < half_clocks_per_sample; curclock++)
- {
-if (LOG_TIMING | LOG_LOWPARAM | LOG_GLOTTAL | LOG_TRANSITION)
+void votrax_sc01_device::build_lowpass_filter(double *a, double *b,
+ double c1t, // Unswitched cap, over amp-op, top
+ double c1b) // Switched cap, over amp-op, bottom
{
- if (m_counter_34 % 32 == 0 && m_master_clock == 0)
- {
- if (LOG_TIMING)
- osd_printf_debug("MCLK C034 L070 L072 BET1 P1 P2 PHI1 PHI2 PH1' PH2' SUBC C088 C084 L092 IIRQ ");
- if (LOG_LOWPARAM)
- osd_printf_debug("F132 F114 F112 F142 L080 ");
- if (LOG_GLOTTAL)
- osd_printf_debug("C220 C222 C224 C234 C236 FGAT GLSY ");
- if (LOG_TRANSITION)
- osd_printf_debug("0625 C046 L046 A0-2 L168 L170 FC VA FA F1 F2 F3 F2Q ");
- osd_printf_debug("\n");
- }
- if (LOG_TIMING)
- osd_printf_debug("%4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X ", m_master_clock, m_counter_34, m_latch_70, m_latch_72, m_beta1, m_p1, m_p2, m_phi1, m_phi2, m_phi1_20, m_phi2_20, m_subphoneme_count, m_clock_88, m_counter_84, m_latch_92, m_internal_request);
- if (LOG_LOWPARAM)
- osd_printf_debug("%d %d %d %d %d ", m_srff_132, m_srff_114, m_srff_112, m_srff_142, m_latch_80);
- if (LOG_GLOTTAL)
- osd_printf_debug("%4X %4X %4X %4X %4X %4X %4X ", m_counter_220, m_counter_222, m_counter_224, m_counter_234, m_counter_236, m_fgate, m_glottal_sync);
- if (LOG_TRANSITION)
- osd_printf_debug("%4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X %4X ", m_0625_clock, m_counter_46, m_latch_46, m_latch_72 & 7, m_latch_168, m_latch_170, m_fc, m_va, m_fa, m_f1, m_f2, m_f3, m_f2q);
- osd_printf_debug("\n");
-}
-
- //==============================================
- //
- // Timing circuit (patent figure 2a)
- //
- //==============================================
-
- // update master clock
- m_master_clock ^= 1;
-
- // on the falling edge of the master clock, advance the 10-bit counter at 34
- uint8_t old_latch_72 = m_latch_72;
- if (m_master_clock == 0)
- m_counter_34 = (m_counter_34 + 1) & 0x3ff;
- else
- {
- m_latch_70 = m_counter_34 & 0xf;
- m_latch_72 = ((m_counter_34 >> 4) & 7) | ((m_counter_34 >> 6) & 8);
- }
-
- // derive beta 1 clock:
- // set if m_latch_70.0 == 1
- // reset if m_latch_70.0 == 0
-// uint8_t old_beta1 = m_beta1;
- m_beta1 = BIT(m_latch_70, 0);
-
- // derive p2 clock:
- // set if (m_counter_34.P_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.P_CLOCK_BIT == 0)
- uint8_t old_p2 = m_p2;
- if (BIT(m_counter_34, P_CLOCK_BIT) & m_master_clock)
- m_p2 = 1;
- else if (!BIT(m_counter_34, P_CLOCK_BIT))
- m_p2 = 0;
-
- // derive p1 clock:
- // set if (!m_counter_34.P_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.P_CLOCK_BIT == 1)
-// uint8_t old_p1 = m_p1;
- if (BIT(~m_counter_34, P_CLOCK_BIT) & m_master_clock)
- m_p1 = 1;
- else if (BIT(m_counter_34, P_CLOCK_BIT))
- m_p1 = 0;
-
- // derive phi2 clock:
- // set if (m_counter_34.PHI_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.PHI_CLOCK_BIT == 0)
- uint8_t old_phi2 = m_phi2;
- if (BIT(m_counter_34, PHI_CLOCK_BIT) & m_master_clock)
- m_phi2 = 1;
- else if (!BIT(m_counter_34, PHI_CLOCK_BIT))
- m_phi2 = 0;
-
- // derive phi1 clock:
- // set if (!m_counter_34.PHI_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.PHI_CLOCK_BIT == 1)
- uint8_t old_phi1 = m_phi1;
- if (BIT(~m_counter_34, PHI_CLOCK_BIT) & m_master_clock)
- m_phi1 = 1;
- else if (BIT(m_counter_34, PHI_CLOCK_BIT))
- m_phi1 = 0;
-
- // derive alternate phi2 clock:
- // set if (m_counter_34.PHI_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.PHI_CLOCK_BIT == 0)
- uint8_t old_phi2_20 = m_phi2_20;
- if (BIT(m_counter_34, PHI_CLOCK_BIT + 2) & m_master_clock)
- m_phi2_20 = 1;
- else if (!BIT(m_counter_34, PHI_CLOCK_BIT + 2))
- m_phi2_20 = 0;
-
- // derive alternate phi1 clock:
- // set if (!m_counter_34.PHI_CLOCK_BIT & clock) == 1
- // reset if (m_counter_34.PHI_CLOCK_BIT == 1)
-// uint8_t old_phi1_20 = m_phi1_20;
- if (BIT(~m_counter_34, PHI_CLOCK_BIT + 2) & m_master_clock)
- m_phi1_20 = 1;
- else if (BIT(m_counter_34, PHI_CLOCK_BIT + 2))
- m_phi1_20 = 0;
-
- // determine rising edges of each clock of interest
-// uint8_t beta1_rising = (old_beta1 ^ m_beta1) & m_beta1;
- uint8_t p2_rising = (old_p2 ^ m_p2) & m_p2;
-// uint8_t p1_rising = (old_p1 ^ m_p1) & m_p1;
- uint8_t phi2_rising = (old_phi2 ^ m_phi2) & m_phi2;
- uint8_t phi1_rising = (old_phi1 ^ m_phi1) & m_phi1;
- uint8_t phi2_20_rising = (old_phi2_20 ^ m_phi2_20) & m_phi2_20;
-// uint8_t phi1_20_rising = (old_phi1_20 ^ m_phi1_20) & m_phi1_20;
- uint8_t a0_rising = BIT((old_latch_72 ^ m_latch_72) & m_latch_72, 0);
- uint8_t a2_rising = BIT((old_latch_72 ^ m_latch_72) & m_latch_72, 2);
- uint8_t _125k_rising = BIT((old_latch_72 ^ m_latch_72) & m_latch_72, 3);
-
- // track subphoneme counter state
- if (!(m_latch_42 | m_phi1))
- m_subphoneme_count = 0;
- else
- m_subphoneme_count++;
- if (p2_rising)
- m_latch_42 = (m_subphoneme_count < m_subphoneme_period);
-
- // update the state of the subphoneme clock line
- uint8_t old_clock_88 = m_clock_88;
- m_clock_88 = !m_latch_42; //!(m_latch_42 | m_phi1); -- figure 7 seems to be wrong here
- uint8_t clock_88_rising = (old_clock_88 ^ m_clock_88) & m_clock_88;
-
- // the A/R line holds the counter in reset except during phoneme processing,
- // when it is clocked on the rising edge of the subphoneme timer clock
- if (m_internal_request != CLEAR_LINE)
- m_counter_84 = 0xf;
- else if (clock_88_rising)
- {
- m_counter_84 = (m_counter_84 - 1) & 0x0f;
-osd_printf_debug("counter=%d\n", m_counter_84);
- }
-
- // clock the zero count latch
- if (p2_rising)
- m_latch_92 = ((m_counter_84 == 0) | (m_latch_92 << 1)) & 3;
-
- // once both bits are set, the request line goes high
- if (m_latch_92 == 3)
- {
- // if the request line was previously low, reset the VD/CLD flip-flops
- if (m_internal_request == CLEAR_LINE)
- {
- m_srff_112 = m_srff_114 = false;
- }
- m_internal_request = ASSERT_LINE;
- }
-
- //==============================================
- //
- // Low parameter clocking (patent figure 2b)
- //
- //==============================================
-
- // fetch ROM data; note that the address lines come directly from
- // counter_34 and not from the latches, which are 1 cycle delayed
- uint8_t romdata = m_rom[(m_phoneme << 3) | ((m_counter_34 >> 4) & 7)];
-
- // update the ROM data; ROM format is (upper nibble/lower nibble)
- // +00 = F1 parameter / 0
- // +01 = F2 parameter / 0
- // +02 = FC parameter / 0
- // +03 = F3 parameter / CL
- // +04 = F2Q Parameter / CLD
- // +05 = VA Parameter / VD
- // +06 = FA Parameter / PAC
- // +07 = Phoneme timing (full 7 bits)
-
- // latch a new value from ROM on phi2
- uint8_t a = m_latch_72 & 7;
- uint8_t romdata_swapped;
- if (phi2_rising)
- {
- switch (a)
- {
- // update CL
- case 3:
- m_srff_132 = m_srff_114 && BIT(~romdata, 3);
- break;
-
- // update CLD
- case 4:
- romdata_swapped = (BIT(romdata, 0) << 3) | (BIT(romdata, 1) << 2) | (BIT(romdata, 2) << 1) | (BIT(romdata, 3) << 0);
- if (m_counter_84 != 0 && romdata_swapped == (m_counter_84 ^ 0xf))
- {
- m_srff_114 = true;
- }
- break;
-
- // update VD
- case 5:
- romdata_swapped = (BIT(romdata, 0) << 3) | (BIT(romdata, 1) << 2) | (BIT(romdata, 2) << 1) | (BIT(romdata, 3) << 0);
- if (m_counter_84 != 0 && romdata_swapped == (m_counter_84 ^ 0xf))
- {
- m_srff_112 = true;
- }
- break;
-
- // update FF == PAC & (VA | FA)
- case 6:
- m_srff_142 = BIT(romdata, 3);
- break;
-
- // update PH
- case 7:
- if (m_latch_80 != (romdata & 0x7f))
- {
- m_latch_80 = romdata & 0x7f;
-osd_printf_debug("[PH=%02X]\n", m_latch_80);
- uint32_t old_period = m_subphoneme_period;
- update_subphoneme_clock_period();
- m_subphoneme_count = (m_subphoneme_count * m_subphoneme_period) / old_period;
- m_phoneme_timer->adjust(attotime::zero);
- }
- break;
- }
- }
-
- //==============================================
- //
- // Glottal circuit (patent figure 6)
- //
- //==============================================
-
- // determine the TC output from the counters (note that TC requires ET)
- uint8_t counter_222_tc = (m_counter_222 == 0xf);
- uint8_t counter_220_tc = (m_counter_220 == 0xf && counter_222_tc);
- uint8_t counter_224_tc = (m_counter_224 == 0xf && counter_222_tc);
-
- // clock glottal counter 224 on rising edge of a0
- if (a0_rising)
- {
- // counter 224 is only enabled if TC of counter 222 is 1
- if (counter_222_tc)
- {
- // if counter 220's TC is 1, do a load instead of a count
- if (counter_220_tc)
- m_counter_224 = (m_inflection << 1) | ((~m_f1 & 0x8) >> 3);
- else
- m_counter_224 = (m_counter_224 + 1) & 0xf;
- }
- }
-
- // clock remaining glottal counters (220, 222, 236) on rising edge of phi2
- if (phi2_20_rising)
- {
- // counter 220 is only enabled if TC of counter 222 is 1
- if (counter_222_tc)
- {
- // if counter 220's TC is 1, do a load instead of a count
- if (counter_220_tc)
- m_counter_220 = (m_inflection << 1) | ((~m_f1 & 0x8) >> 3);
- else
- m_counter_220 = (m_counter_220 + 1) & 0xf;
- }
-
- // counter 222 is always enabled
- if (1)
- {
- // if counter 220's TC is 1, do a load instead of a count
- if (counter_220_tc)
- m_counter_222 = (~m_f1 & 0x7) << 1;
- else
- m_counter_222 = (m_counter_222 + 1) & 0xf;
- }
-
- // counter 236 is always enabled
- if (1)
- {
- m_counter_236 = (m_counter_236 + 1) & 0xf;
-
- // rising edge of Q1 from counter 236 clocks counter 234
- if ((m_counter_236 & 0x3) == 0x2)
- {
- // counter 234 is only enabled if it has not reached terminal
- if (m_counter_234 != 0xf)
- m_counter_234 = (m_counter_234 + 1) & 0xf;
- }
- }
- }
-
- // update FGATE state
- if (counter_220_tc)
- m_fgate = 0;
- if (counter_224_tc)
- m_fgate = 1;
-
- // apply asynchronous clear to counters 234/236
- if (counter_220_tc && m_phi1_20)
- m_counter_236 = m_counter_234 = 0;
-
- // derive glottal circuit output signals
-#if !TEMP_HACKS
- uint8_t old_glottal_sync = m_glottal_sync;
-#endif
- m_glottal_sync = (m_counter_234 == 0);
- glottal_out = s_glottal_wave[m_counter_234];
-
- //==============================================
- //
- // Transition circuit (patent figure 3a/3b)
- //
- //==============================================
-
- // divide 1.25k clock by 2 (lower-left of 46)
- uint8_t old_0625_clock = m_0625_clock;
- if (_125k_rising)
- m_0625_clock = !m_0625_clock;
- uint8_t _0625_rising = (old_0625_clock ^ m_0625_clock) & m_0625_clock;
-
- // update counter above
- if (_0625_rising)
- {
- if (m_counter_46 == 0xf)
- m_counter_46 = 0xd;
- else
- m_counter_46 = (m_counter_46 + 1) & 0xf;
- }
-
- // and then the latch to the right
- if (a2_rising)
- m_latch_46 = (BIT(m_counter_46, 1) << 0) |
- (BIT(m_latch_46, 0) << 1) |
- (m_0625_clock << 2) |
- (BIT(m_latch_46, 2) << 3);
-
-#if TEMP_HACKS
- m_latch_46 = 0xf;
-#endif
-
- // determine the read/write signal
- uint8_t ram_write = 0;
- switch (a)
- {
- // write if not FF and low 2 bits of latch
- // FF is the S/R flip-flop at 142 ANDed with !(/FA & /VA)
- case 0: case 1: case 2: case 3: case 4:
- if ((m_srff_142 && !((m_fa == 0) && (m_va == 0))) == 0 && (m_latch_46 & 0x3) == 0x3)
- ram_write = 1;
- break;
-
- case 5:
- if ((m_latch_46 & 0xc) == 0xc && m_srff_112)
- {
- ram_write = 1;
- }
- break;
-
- case 6:
- if ((m_latch_46 & 0xc) == 0xc && m_srff_114)
- {
- ram_write = 1;
- }
- break;
- }
-
- // gate on the phi2 clock (OR gate @ 172)
- ram_write &= m_phi2;
-
- // write the transitioned values to RAM if requested
- // (note we consolidate the serial addition and clocking steps here)
- if (ram_write)
- {
- uint8_t old = (m_latch_168 << 4) | m_latch_170;
- m_ram[a] = old - (old >> 3) + ((romdata & 0xf0) >> 3);
- }
-
- // latch some parameter values on rising edge of phi2
- if (phi2_rising)
- {
- switch (a)
- {
- case 2:
- m_fc = m_latch_168;
- break;
-
- case 5:
- m_va = m_latch_168;
- break;
-
- case 6:
- m_fa = m_latch_168;
- break;
- }
- }
-
- // latch remaining parameter values on rising edge of (phi2 & glottal sync)
-#if TEMP_HACKS
- if (phi2_rising)
-#else
- uint8_t old_phi2_glottal = (old_phi2 & old_glottal_sync);
- uint8_t new_phi2_glottal = m_phi2 & m_glottal_sync;
- if ((old_phi2_glottal ^ new_phi2_glottal) & new_phi2_glottal)
-#endif
- switch (a)
- {
- case 0:
- m_f1 = m_latch_168;
- break;
-
- case 1:
- m_f2 = (m_latch_168 << 1) | (m_latch_170 >> 3);
- break;
-
- case 3:
- m_f3 = m_latch_168;
- break;
-
- case 4:
- m_f2q = m_latch_168;
- break;
- }
-
- // latch value from RAM on rising edge of phi1
- if (phi1_rising)
- {
- m_latch_168 = m_ram[a] >> 4;
- m_latch_170 = m_ram[a] & 0xf;
- }
-
- //==============================================
- //
- // Noise generator circuit (patent figure 8)
- //
- //==============================================
-
- // nose is clocked by the NOR of /FA and P1
- uint8_t old_noise_clock = m_noise_clock;
- m_noise_clock = !((m_fa == 0) | m_p1);
- uint8_t noise_clock_rising = (old_noise_clock ^ m_noise_clock) & m_noise_clock;
- uint8_t noise_clock_falling = (old_noise_clock ^ m_noise_clock) & old_noise_clock;
-
- // falling edge clocks the shift register
- if (noise_clock_falling)
- {
- // shift register 252 is actually 4 shift registers (2 4-bit, 2 5-bit)
- // d1 and d3 are the 4-bit registers, d2 and d4 are the 5-bit registers
- // XOR'ed input goes into d4, which shifts in to d2, then d3, then d1
- // thus the full 18-bit value is effectively
- //
- // d4 = (m_shift_252 >> 0) & 0x1f;
- // d2 = (m_shift_252 >> 5) & 0x1f;
- // d3 = (m_shift_252 >> 10) & 0xf;
- // d1 = (m_shift_252 >> 14) & 0xf;
- //
- // input at the low end is ((d1+4 ^ d2+5) ^ (d4+4 ^ d4+5)) ^ !(counter2 | counter3)
- // output is tapped at d3+4
-
- uint32_t old_shift = m_shift_252;
- m_shift_252 <<= 1;
- m_shift_252 |= ((BIT(old_shift, 17) ^ BIT(old_shift, 9)) ^ (BIT(old_shift, 3) ^ BIT(old_shift, 4))) ^
- ((m_counter_250 & 0xc) == 0);
- }
-
- // rising edge clocks the counter
- if (noise_clock_rising)
- {
- // counter is reset to 1 if terminal, otherwise it increments
- if (m_counter_250 == 0xf)
- m_counter_250 = 0x1;
- else
- m_counter_250 = (m_counter_250 + 1) & 0xf;
- }
-
- // compute final noise out signal
- noise_out_digital = !(BIT(m_shift_252, 13) & (m_fgate | (m_va == 0)));
- }
-
- // TODO: cache the filters
- // filter coefs
- double k[3], a[4], b[4];
-
- // base frequencies
- double fc = m_master_clock_freq / 30.0; // Nominal is 20KHz
- double fs = stream.sample_rate();
-
- // useful temporaries
- double rcp, rcq, rca;
-
- // amplification stage
- static const double va_caps[4] = { 27, 53, 107, 213 };
- double va_out = glottal_out * bits_to_caps(m_va, 4, va_caps) / 400;
-
- shift_hist(va_out, m_va_hist, 4);
-
-
- // noise shaping
- static const double fa_caps[4] = { 27, 53, 107, 213 };
- rcp = bits_to_caps(m_fa, 4, fa_caps);
-
- shift_hist(-noise_out_digital * 400*rcp/(358.0*100000*566*(fc*rcp*1e-12 + 1.0/100000 + 1.0/2000)), m_ni_hist, 4);
-
- k[0] = 400/(fc*358);
- k[1] = 400*400/(fc*358*566);
- k[2] = 400*400/(fc*fc*358*358);
-
- filter_s_to_z(k, fs, a, b);
- double no_out = apply_filter(m_ni_hist, m_no_hist, a, b);
- shift_hist(no_out, m_no_hist, 4);
-
-
- // stage 1 filter
-
- static const double s1_p_caps[4] = { 16.4, 33, 66, 130 };
- rcp = 24 + bits_to_caps(m_f1, 4, s1_p_caps);
- rcq = 20;
-
- k[0] = 253/(fc*270);
- k[1] = 1080*rcq/(fc*270*rcp);
- k[2] = 1080*1080/(fc*fc*270*rcp);
-
- filter_s_to_z(k, fs, a, b);
- double s1_out = apply_filter(m_va_hist, m_s1_hist, a, b);
- shift_hist(s1_out, m_s1_hist, 4);
-
-
- // stage 2 filter, glottal half
-
- static const double s2_p_caps[5] = { 14, 28, 56, 113, 226 };
- static const double s2_q_caps[4] = { 23, 46, 93, 186 };
- rcp = 46 + bits_to_caps(m_f2, 5, s2_p_caps);
- rcq = 20 + bits_to_caps(m_f2q, 4, s2_q_caps);;
-
- k[0] = 400/(fc*470);
- k[1] = 620*rcq/(fc*470*rcp);
- k[2] = 620*620/(fc*fc*470*rcp);
-
- filter_s_to_z(k, fs, a, b);
- double s2g_out = apply_filter(m_s1_hist, m_s2g_hist, a, b);
- shift_hist(s2g_out, m_s2g_hist, 4);
-
-
- // stage 2 filter, noise half (rcp and rcq kept from stage 2 glottal)
-
- static const double s2_n_caps[5] = { 19, 38, 76, 152 };
- rca = bits_to_caps(m_fc, 4, s2_n_caps);
-
- shift_hist(-no_out*rcq*rca/(470*rcp), m_s2ni_hist, 4);
-
- k[0] = 400/(fc*470);
- k[1] = 620*rcq/(fc*470*rcp);
- k[2] = 620*620/(fc*fc*470*rcp);
-
- filter_s_to_z(k, fs, a, b);
- double s2n_out = apply_filter(m_s2ni_hist, m_s2n_hist, a, b);
- shift_hist(s2n_out, m_s2n_hist, 4);
-
- // sum the stage 2 outputs
- double s2_out = s2g_out + s2n_out;
- shift_hist(s2_out, m_s2_hist, 4);
-
-
- // stage 3 filter
-
- static const double s3_p_caps[4] = { 21, 42, 84, 168 };
- rcp = 76 + bits_to_caps(m_f3, 4, s3_p_caps);
- rcq = 20;
-
- k[0] = 0;
- k[1] = 420*rcq/(fc*390*rcp);
- k[2] = 420*420/(fc*fc*390*rcp);
-
- filter_s_to_z(k, fs, a, b);
- double s3_out = apply_filter(m_s2_hist, m_s3_hist, a, b);
- shift_hist(s3_out, m_s3_hist, 4);
-
-
- // stage 4 filter, noise injection
-
- // The resulting non-amplifying filter is identical, so we
- // inject instead of splitting
-
- static const double s4_n_caps[4] = { 24, 48, 96, 192 };
- rca = 115 + bits_to_caps(~m_fc, 4, s4_n_caps);
-
- shift_hist(s3_out + no_out*470/rca, m_s4i_hist, 4);
-
-
- // stage 4 filter
-
- rcp = 30;
- rcq = 20;
-
- k[0] = 0;
- k[1] = 338*rcq/(fc*470*rcp);
- k[2] = 338*338/(fc*fc*470*rcp);
-
- filter_s_to_z(k, fs, a, b);
- double s4_out = apply_filter(m_s4i_hist, m_s4_hist, a, b);
- shift_hist(s4_out, m_s4_hist, 4);
-
-
- // TODO: apply closure circuit (undocumented)
-
- // output the current result
- *dest++ = int16_t(s4_out * 4000);
- }
-}
+ // Compute the only coefficient we care about
+ double k = c1b / (m_cclock * c1t);
+ // Compute the filter cutoff frequency
+ double fpeak = 1/(2*M_PI*k);
+ // Turn that into a warp multiplier
+ double zc = 2*M_PI*fpeak/tan(M_PI*fpeak / m_sclock);
-//**************************************************************************
-// DEVICE INTERFACE
-//**************************************************************************
-
-//-------------------------------------------------
-// rom_region - return a pointer to the device's
-// internal ROM region
-//-------------------------------------------------
+ // Finally compute the result of the z-transform
+ double m = zc*k;
-const tiny_rom_entry *votrax_sc01_device::device_rom_region() const
-{
- return ROM_NAME( votrax_sc01 );
+ a[0] = 1;
+ b[0] = 1+m;
+ b[1] = 1-m;
}
+/*
+ Used to shape the white noise
+
+ +-------------------------------------------------------------------+
+ | |
+ +--|C1|--+---------|C3|----------+--|C4|--+ |
+ | | + + | | |
+ Vi | |\ | (1) (1) | | + + |
+ -|R0|-+--+-\ | | | | |\ | (1) (1) |
+ | >--+--(2)-+--|C2|--+---(2)-+--+-\ | | | |
+ 0-++/ | | >--+--(2)--+--|C5|--+---(2)--+
+ |/ Vo 0-++/
+ |/
+ Equivalent:
+
+ +------------------|R5|-------------------+
+ | |
+ +--|C1|--+---------|C3|----------+--|C4|--+
+ | | | |
+ Vi | |\ | | |
+ -|R0|-+--+-\ | | |\ |
+ | >--+---------|R2|----------+--+-\ |
+ 0-++/ | | >--+
+ |/ Vo 0-++/
+ |/
+
+ We assume r0 = r2
+*/
-//-------------------------------------------------
-// device_start - handle device startup
-//-------------------------------------------------
-
-void votrax_sc01_device::device_start()
+void votrax_sc01_device::build_noise_shaper_filter(double *a, double *b,
+ double c1, // Cap over first amp-op
+ double c2t, // Unswitched cap between amp-ops, input, top
+ double c2b, // Switched cap between amp-ops, input, bottom
+ double c3, // Cap over second amp-op
+ double c4) // Switched cap after second amp-op
{
- // initialize internal state
- m_master_clock_freq = clock();
- m_stream = stream_alloc(0, 1, m_master_clock_freq / 16);
- m_phoneme_timer = timer_alloc();
- m_rom = memregion("phoneme")->base();
+ // Coefficients of H(s) = k1*s / (1 + k2*s + k3*s^2)
+ double k0 = c2t*c3*c2b/c4;
+ double k1 = c2t*(m_cclock * c2b);
+ double k2 = c1*c2t*c3/(m_cclock * c4);
- // reset inputs
- m_inflection = 0;
- m_phoneme = 0x3f;
-
- // reset outputs
- m_request_cb.resolve_safe();
- m_request_state = ASSERT_LINE;
- m_internal_request = ASSERT_LINE;
-
- // save inputs
- save_item(NAME(m_inflection));
- save_item(NAME(m_phoneme));
+ // Estimate the filter cutoff frequency
+ double fpeak = sqrt(1/k2)/(2*M_PI);
- // save outputs
- save_item(NAME(m_request_state));
- save_item(NAME(m_internal_request));
-
- // save timing circuit
- save_item(NAME(m_master_clock_freq));
- save_item(NAME(m_master_clock));
- save_item(NAME(m_counter_34));
- save_item(NAME(m_latch_70));
- save_item(NAME(m_latch_72));
- save_item(NAME(m_beta1));
- save_item(NAME(m_p2));
- save_item(NAME(m_p1));
- save_item(NAME(m_phi2));
- save_item(NAME(m_phi1));
- save_item(NAME(m_subphoneme_period));
- save_item(NAME(m_subphoneme_count));
- save_item(NAME(m_clock_88));
- save_item(NAME(m_latch_42));
- save_item(NAME(m_counter_84));
- save_item(NAME(m_latch_92));
-
- // save low parameter clocking
- save_item(NAME(m_srff_132));
- save_item(NAME(m_srff_114));
- save_item(NAME(m_srff_112));
- save_item(NAME(m_srff_142));
- save_item(NAME(m_latch_80));
-
- // save glottal circuit
- save_item(NAME(m_counter_220));
- save_item(NAME(m_counter_222));
- save_item(NAME(m_counter_224));
- save_item(NAME(m_counter_234));
- save_item(NAME(m_counter_236));
- save_item(NAME(m_fgate));
- save_item(NAME(m_glottal_sync));
-
- // save transition circuit
- save_item(NAME(m_0625_clock));
- save_item(NAME(m_counter_46));
- save_item(NAME(m_latch_46));
- save_item(NAME(m_ram));
- save_item(NAME(m_latch_168));
- save_item(NAME(m_latch_170));
- save_item(NAME(m_f1));
- save_item(NAME(m_f2));
- save_item(NAME(m_fc));
- save_item(NAME(m_f3));
- save_item(NAME(m_f2q));
- save_item(NAME(m_va));
- save_item(NAME(m_fa));
-
- // save noise generator circuit
- save_item(NAME(m_noise_clock));
- save_item(NAME(m_shift_252));
- save_item(NAME(m_counter_250));
-
- // save filter histories
- save_item(NAME(m_ni_hist));
- save_item(NAME(m_no_hist));
- save_item(NAME(m_va_hist));
- save_item(NAME(m_s1_hist));
- save_item(NAME(m_s2g_hist));
- save_item(NAME(m_s2n_hist));
- save_item(NAME(m_s2ni_hist));
- save_item(NAME(m_s2_hist));
- save_item(NAME(m_s3_hist));
- save_item(NAME(m_s4i_hist));
- save_item(NAME(m_s4_hist));
-}
+ // Turn that into a warp multiplier
+ double zc = 2*M_PI*fpeak/tan(M_PI*fpeak / m_sclock);
+ // Finally compute the result of the z-transform
+ double m0 = zc*k0;
+ double m1 = zc*k1;
+ double m2 = zc*zc*k2;
-//-------------------------------------------------
-// device_reset - handle device reset
-//-------------------------------------------------
-
-void votrax_sc01_device::device_reset()
-{
- // set the initial state
- m_stream->update();
-
- // reset inputs
- m_phoneme = 0x3f;
- m_request_cb(m_internal_request = m_request_state = ASSERT_LINE);
-
- // reset timing circuit
- m_master_clock = 0;
- m_counter_34 = 0;
- m_latch_70 = 0;
- m_latch_72 = 0;
- m_beta1 = 0;
- m_p2 = 0;
- m_p1 = 0;
- m_phi2 = 0;
- m_phi1 = 0;
- m_subphoneme_period = 1000;
- m_subphoneme_count = 0;
- m_clock_88 = 0;
- m_latch_42 = 0;
- m_counter_84 = 0;
- m_latch_92 = 0;
-
- // reset low parameter clocking
- m_srff_132 = false;
- m_srff_114 = false;
- m_srff_112 = false;
- m_srff_142 = false;
- m_latch_80 = 50;
- update_subphoneme_clock_period();
-
- // reset glottal circuit
- m_counter_220 = 0;
- m_counter_222 = 0;
- m_counter_224 = 0;
- m_counter_234 = 0;
- m_counter_236 = 0;
- m_fgate = 0;
- m_glottal_sync = 0;
-
- // reset transition circuit
- m_0625_clock = 0;
- m_counter_46 = 0;
- m_latch_46 = 0;
- memset(m_ram, 0, sizeof(m_ram));
- m_latch_168 = 0;
- m_latch_170 = 0;
- m_f1 = 0;
- m_f2 = 0;
- m_fc = 0;
- m_f3 = 0;
- m_f2q = 0;
- m_va = 0;
- m_fa = 0;
-
- // reset noise circuit
- m_noise_clock = 0;
- m_shift_252 = 0;
- m_counter_250 = 0;
-
- // reset filter histories
- memset(m_ni_hist, 0, sizeof(m_ni_hist));
- memset(m_no_hist, 0, sizeof(m_no_hist));
- memset(m_va_hist, 0, sizeof(m_va_hist));
- memset(m_s1_hist, 0, sizeof(m_s1_hist));
- memset(m_s2g_hist, 0, sizeof(m_s2g_hist));
- memset(m_s2n_hist, 0, sizeof(m_s2n_hist));
- memset(m_s2ni_hist, 0, sizeof(m_s2ni_hist));
- memset(m_s2_hist, 0, sizeof(m_s2_hist));
- memset(m_s3_hist, 0, sizeof(m_s3_hist));
- memset(m_s4i_hist, 0, sizeof(m_s4i_hist));
- memset(m_s4_hist, 0, sizeof(m_s4_hist));
+ a[0] = m0;
+ a[1] = 0;
+ a[2] = -m0;
+ b[0] = 1+m1+m2;
+ b[1] = 2-2*m2;
+ b[2] = 1-m1+m2;
}
+/*
+ Noise injection in f2
-//-------------------------------------------------
-// device_clock_changed - handle dynamic clock
-// changes by altering our output frequency
-//-------------------------------------------------
-
-void votrax_sc01_device::device_clock_changed()
-{
- // compute new frequency of the master clock, and update if changed
- uint32_t newfreq = clock();
- if (newfreq != m_master_clock_freq)
- {
- // if we have a stream
- if (m_stream != nullptr)
- {
- m_stream->update();
- m_stream->set_sample_rate(newfreq / 16);
- }
-
- // determine how many clock ticks remained on the phoneme timer
- uint64_t remaining = m_phoneme_timer->remaining().as_ticks(m_master_clock_freq);
-
- // recompute the master clock
- m_master_clock_freq = newfreq;
-
- // adjust the phoneme timer to the same number of ticks based on the new frequency
- if (remaining > 0)
- m_phoneme_timer->adjust(attotime::from_ticks(remaining, newfreq));
- }
-}
-
+ | +--[R2]--+ +--[R1]-------- Vi
+ | | | |
+ | +--|C2|--+<V1 +--|C3|--+
+ | | | | |
+ | | |\ | | |\ |
+ | +----+--+-\ | +--+-\ |
+ | | | >--+--[Rx]--+ | >--+----- Vo
+ | | 0-++/ 0-++/ |
+ | | |/ +--[R0]--+ |/ |
+ | | | | |
+ | | | /| | |
+ | | | /-+--+--[R0]--+
+ | +--[R4]-------+--< |
+ | V2^ \++-0
+ | \|
-//-------------------------------------------------
-// device_timer - handle device timer
-//-------------------------------------------------
+ We drop r0/r1 out of the equation (it factorizes), and we rescale so
+ that H(infinity)=1.
+*/
-void votrax_sc01_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+void votrax_sc01_device::build_injection_filter(double *a, double *b,
+ double c1b, // Switched cap, input, bottom
+ double c2t, // Unswitched cap, over first amp-op, top
+ double c2b, // Switched cap, over first amp-op, bottom
+ double c3, // Cap between the two op-amps
+ double c4) // Cap over second op-amp
{
- // force a stream update
- m_stream->update();
-
- // if we're requesting more data, no need for timing
- if (m_request_state == ASSERT_LINE)
- return;
-
- // if we're supposed to have fired, do it now
- if (m_internal_request == ASSERT_LINE)
- {
-osd_printf_debug("%s: REQUEST\n", timer.machine().time().as_string(3));
- m_request_cb(m_request_state = ASSERT_LINE);
- return;
- }
-
- // account for the rest of this subphoneme clock
- uint32_t clocks_until_request = 0;
- if (m_counter_84 != 0)
- {
- if (m_subphoneme_count < m_subphoneme_period)
- clocks_until_request += m_subphoneme_period - m_subphoneme_count;
- clocks_until_request += m_subphoneme_period * (m_counter_84 - 1);
- }
-
- // plus 1/2
- clocks_until_request = std::max(clocks_until_request, uint32_t(1 << P_CLOCK_BIT) / 2);
- timer.adjust(attotime::from_ticks(clocks_until_request, m_master_clock_freq));
+ // First compute the three coefficients of H(s) = (k0 + k2*s)/(k1 - k2*s)
+ double k0 = m_cclock * c2t;
+ double k1 = m_cclock * (c1b * c3 / c2t - c2t);
+ double k2 = c2b;
+
+ // Don't pre-warp
+ double zc = 2*m_sclock;
+
+ // Finally compute the result of the z-transform
+ double m = zc*k2;
+
+ a[0] = k0 + m;
+ a[1] = k0 - m;
+ b[0] = k1 - m;
+ b[1] = k1 + m;
+
+ // That ends up in a numerically unstable filter. Neutralize it for now.
+ a[0] = 1;
+ a[1] = 0;
+ b[0] = 1;
+ b[1] = 0;
}
diff --git a/src/devices/sound/votrax.h b/src/devices/sound/votrax.h
index adf6b429dad..dd39efc9eb4 100644
--- a/src/devices/sound/votrax.h
+++ b/src/devices/sound/votrax.h
@@ -1,34 +1,20 @@
// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
+// copyright-holders:Olivier Galibert
/***************************************************************************
votrax.h
- Simple VOTRAX SC-01 simulator based on sample fragments.
+ Votrax SC01A simulation
***************************************************************************/
#pragma once
-#ifndef __VOTRAX_H__
-#define __VOTRAX_H__
-
-#include "sound/samples.h"
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
+#ifndef VOTRAX_H
+#define VOTRAX_H
#define MCFG_VOTRAX_SC01_REQUEST_CB(_devcb) \
- devcb = &votrax_sc01_device::set_request_callback(*device, DEVCB_##_devcb);
-
-
-//**************************************************************************
-// TYPE DEFINITIONS
-//**************************************************************************
-
-// ======================> votrax_sc01_device
+ devcb = &downcast<votrax_sc01_device *>(device)->set_ar_callback(DEVCB_##_devcb);
class votrax_sc01_device : public device_t,
public device_sound_interface
@@ -37,12 +23,11 @@ public:
// construction/destruction
votrax_sc01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template<class _Object> static devcb_base &set_request_callback(device_t &device, _Object object) { return downcast<votrax_sc01_device &>(device).m_request_cb.set_callback(object); }
+ template<class _Object> devcb_base &set_ar_callback(_Object object) { return m_ar_cb.set_callback(object); }
- // writers
- DECLARE_WRITE8_MEMBER( write );
- DECLARE_WRITE8_MEMBER( inflection_w );
- DECLARE_READ_LINE_MEMBER( request ) { m_stream->update(); return m_request_state; }
+ DECLARE_WRITE8_MEMBER(write);
+ DECLARE_WRITE8_MEMBER(inflection_w);
+ DECLARE_READ_LINE_MEMBER(request) { m_stream->update(); return m_ar_state; }
protected:
// device-level overrides
@@ -56,99 +41,144 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
private:
- // internal helpers
- void update_subphoneme_clock_period();
- static double bits_to_caps(uint32_t value, int caps_count, const double *caps_values);
- static void shift_hist(double val, double *hist_array, int hist_size);
- static void filter_s_to_z(const double *k, double fs, double *a, double *b);
- static double apply_filter(const double *x, const double *y, const double *a, const double *b);
-
- // internal state
- sound_stream * m_stream; // output stream
- emu_timer * m_phoneme_timer; // phoneme timer
- const uint8_t * m_rom; // pointer to our ROM
-
- // inputs
- uint8_t m_inflection; // 2-bit inflection value
- uint8_t m_phoneme; // 6-bit phoneme value
-
- // outputs
- devcb_write_line m_request_cb; // callback for request
- uint8_t m_request_state; // request as seen to the outside world
- uint8_t m_internal_request; // request managed by stream timing
-
- // timing circuit
- uint32_t m_master_clock_freq; // frequency of the master clock
- uint8_t m_master_clock; // master clock
- uint16_t m_counter_34; // ripple counter @ 34
- uint8_t m_latch_70; // 4-bit latch @ 70
- uint8_t m_latch_72; // 4-bit latch @ 72
- uint8_t m_beta1; // beta1 clock state
- uint8_t m_p2; // P2 clock state
- uint8_t m_p1; // P1 clock state
- uint8_t m_phi2; // phi2 clock state
- uint8_t m_phi1; // phi1 clock state
- uint8_t m_phi2_20; // alternate phi2 clock state (20kHz)
- uint8_t m_phi1_20; // alternate phi1 clock state (20kHz)
- uint32_t m_subphoneme_period; // period of the subphoneme timer
- uint32_t m_subphoneme_count; // number of ticks executed already
- uint8_t m_clock_88; // subphoneme clock output @ 88
- uint8_t m_latch_42; // D flip-flop @ 42
- uint8_t m_counter_84; // 4-bit phoneme counter @ 84
- uint8_t m_latch_92; // 2-bit latch @ 92
-
- // low parameter clocking
- bool m_srff_132; // S/R flip-flop @ 132
- bool m_srff_114; // S/R flip-flop @ 114
- bool m_srff_112; // S/R flip-flop @ 112
- bool m_srff_142; // S/R flip-flop @ 142
- uint8_t m_latch_80; // phoneme timing latch @ 80
-
- // glottal circuit
- uint8_t m_counter_220; // 4-bit counter @ 220
- uint8_t m_counter_222; // 4-bit counter @ 222
- uint8_t m_counter_224; // 4-bit counter @ 224
- uint8_t m_counter_234; // 4-bit counter @ 234
- uint8_t m_counter_236; // 4-bit counter @ 236
- uint8_t m_fgate; // FGATE signal
- uint8_t m_glottal_sync; // Glottal Sync signal
-
- // transition circuit
- uint8_t m_0625_clock; // state of 0.625kHz clock
- uint8_t m_counter_46; // 4-bit counter in block @ 46
- uint8_t m_latch_46; // 4-bit latch in block @ 46
- uint8_t m_ram[8]; // RAM to hold parameters
- uint8_t m_latch_168; // 4-bit latch @ 168
- uint8_t m_latch_170; // 4-bit latch @ 170
- uint8_t m_f1; // latched 4-bit F1 value
- uint8_t m_f2; // latched 5-bit F2 value
- uint8_t m_fc; // latched 4-bit FC value
- uint8_t m_f3; // latched 4-bit F3 value
- uint8_t m_f2q; // latched 4-bit F2Q value
- uint8_t m_va; // latched 4-bit VA value
- uint8_t m_fa; // latched 4-bit FA value
-
- // noise generator circuit
- uint8_t m_noise_clock; // clock input to noise generator
- uint32_t m_shift_252; // shift register @ 252
- uint8_t m_counter_250; // 4-bit counter @ 250
-
- // stages outputs history
- double m_ni_hist[4];
- double m_no_hist[4];
- double m_va_hist[4];
- double m_s1_hist[4];
- double m_s2g_hist[4];
- double m_s2ni_hist[4];
- double m_s2n_hist[4];
- double m_s2_hist[4];
- double m_s3_hist[4];
- double m_s4i_hist[4];
- double m_s4_hist[4];
-
- // static tables
- static const char *const s_phoneme_table[64];
- static const double s_glottal_wave[16];
+ // Possible timer parameters
+ enum {
+ T_COMMIT_PHONE,
+ T_END_OF_PHONE
+ };
+
+ static const char *const s_phone_table[64];
+ static const double s_glottal_wave[9];
+
+ sound_stream *m_stream; // Output stream
+ emu_timer *m_timer; // General timer
+ required_memory_region m_rom; // Internal ROM
+ u32 m_mainclock; // Current main clock
+ double m_sclock; // Stream sample clock (40KHz, main/18)
+ double m_cclock; // 20KHz capacitor switching clock (main/36)
+ u32 m_sample_count; // Sample counter, to cadence chip updates
+
+ // Inputs
+ u8 m_inflection; // 2-bit inflection value
+ u8 m_phone; // 6-bit phone value
+
+ // Outputs
+ devcb_write_line m_ar_cb; // Callback for ar
+ bool m_ar_state; // Current ar state
+
+ // "Unpacked" current rom values
+ u8 m_rom_duration; // Duration in 5KHz units (main/144) of one tick, 16 ticks per phone, 7 bits
+ u8 m_rom_vd, m_rom_cld; // Duration in ticks of the "voice" and "closure" delays, 4 bits
+ u8 m_rom_fa, m_rom_fc, m_rom_va; // Analog parameters, noise volume, noise freq cutoff and voice volume, 4 bits each
+ u8 m_rom_f1, m_rom_f2, m_rom_f2q, m_rom_f3; // Analog parameters, formant frequencies and Q, 4 bits each
+ bool m_rom_closure; // Closure bit, true = silence at cld
+ bool m_rom_pause; // Pause bit
+
+ // Current interpolated values (8 bits each)
+ u8 m_cur_fa, m_cur_fc, m_cur_va;
+ u8 m_cur_f1, m_cur_f2, m_cur_f2q, m_cur_f3;
+
+ // Current committed values
+ u8 m_filt_fa, m_filt_fc, m_filt_va; // Analog parameters, noise volume, noise freq cutoff and voice volume, 4 bits each
+ u8 m_filt_f1, m_filt_f2, m_filt_f2q, m_filt_f3; // Analog parameters, formant frequencies/Q on 4 bits except f2 on 5 bits
+
+ // Internal counters
+ u16 m_phonetick; // 9-bits phone tick duration counter
+ u8 m_ticks; // 5-bits tick counter
+ u8 m_pitch; // 7-bits pitch counter
+ u8 m_closure; // 5-bits glottal closure counter
+ u8 m_update_counter; // 6-bits counter for the 625Hz (main/1152) and 208Hz (main/3456) update timing generators
+
+ // Internal state
+ bool m_cur_closure; // Current internal closure state
+ u16 m_noise; // 15-bit noise shift register
+ bool m_cur_noise; // Current noise output
+
+ // Filter coefficients and level histories
+ double m_voice_1[4];
+ double m_voice_2[4];
+ double m_voice_3[4];
+
+ double m_noise_1[3];
+ double m_noise_2[3];
+ double m_noise_3[2];
+ double m_noise_4[2];
+
+ double m_vn_1[4];
+ double m_vn_2[4];
+ double m_vn_3[4];
+ double m_vn_4[4];
+ double m_vn_5[2];
+ double m_vn_6[2];
+
+ double m_f1_a[4], m_f1_b[4]; // F1 filtering
+ double m_f2v_a[4], m_f2v_b[4]; // F2 voice filtering
+ double m_f2n_a[2], m_f2n_b[2]; // F2 noise filtering
+ double m_f3_a[4], m_f3_b[4]; // F3 filtering
+ double m_f4_a[4], m_f4_b[4]; // F4 filtering
+ double m_fx_a[1], m_fx_b[2]; // Final filtering
+ double m_fn_a[3], m_fn_b[3]; // Noise shaping
+
+ // Compute a total capacitor value based on which bits are currently active
+ static double bits_to_caps(u32 value, std::initializer_list<double> caps_values) {
+ double total = 0;
+ for(double d : caps_values) {
+ if(value & 1)
+ total += d;
+ value >>= 1;
+ }
+ return total;
+ }
+
+ // Shift a history of values by one and insert the new value at the front
+ template<u32 N> static void shift_hist(double val, double (&hist_array)[N]) {
+ for(u32 i=N-1; i>0; i--)
+ hist_array[i] = hist_array[i-1];
+ hist_array[0] = val;
+ }
+
+ // Apply a filter and compute the result. 'a' is applied to x (inputs) and 'b' to y (outputs)
+ template<u32 Nx, u32 Ny, u32 Na, u32 Nb> static double apply_filter(const double (&x)[Nx], const double (&y)[Ny], const double (&a)[Na], const double (&b)[Nb]) {
+ double total = 0;
+ for(u32 i=0; i<Na; i++)
+ total += x[i] * a[i];
+ for(u32 i=1; i<Nb; i++)
+ total -= y[i-1] * b[i];
+ return total / b[0];
+ }
+
+ void build_standard_filter(double *a, double *b,
+ double c1t, // Unswitched cap, input, top
+ double c1b, // Switched cap, input, bottom
+ double c2t, // Unswitched cap, over first amp-op, top
+ double c2b, // Switched cap, over first amp-op, bottom
+ double c3, // Cap between the two op-amps
+ double c4); // Cap over second op-amp
+
+ void build_noise_shaper_filter(double *a, double *b,
+ double c1, // Cap over first amp-op
+ double c2t, // Unswitched cap between amp-ops, input, top
+ double c2b, // Switched cap between amp-ops, input, bottom
+ double c3, // Cap over second amp-op
+ double c4); // Switched cap after second amp-op
+
+ void build_lowpass_filter(double *a, double *b,
+ double c1t, // Unswitched cap, over amp-op, top
+ double c1b); // Switched cap, over amp-op, bottom
+
+ void build_injection_filter(double *a, double *b,
+ double c1b, // Switched cap, input, bottom
+ double c2t, // Unswitched cap, over first amp-op, top
+ double c2b, // Switched cap, over first amp-op, bottom
+ double c3, // Cap between the two op-amps
+ double c4); // Cap over second op-amp
+
+
+ static void interpolate(u8 &reg, u8 target); // Do one interpolation step
+ void chip_update(); // Global update called at 20KHz (main/36)
+ void filters_commit(bool force); // Commit the currently computed interpolation values to the filters
+ void phone_commit(); // Commit the current phone id
+ stream_sample_t analog_calc(); // Compute one more sample
};
@@ -160,5 +190,4 @@ private:
// device type definition
extern const device_type VOTRAX_SC01;
-
-#endif /* __VOTRAX_H__ */
+#endif /* VOTRAX_H */
diff --git a/src/devices/video/ef9369.cpp b/src/devices/video/ef9369.cpp
index d373fea132f..7d97888b845 100644
--- a/src/devices/video/ef9369.cpp
+++ b/src/devices/video/ef9369.cpp
@@ -100,5 +100,5 @@ WRITE8_MEMBER( ef9369_device::data_w )
WRITE8_MEMBER( ef9369_device::address_w )
{
- m_address = data & 0x1f; // 5-bit
+ m_address = data & 0x1f; // 5-bit
}
diff --git a/src/devices/video/ef9369.h b/src/devices/video/ef9369.h
index d31c447dba4..3689e8c6f00 100644
--- a/src/devices/video/ef9369.h
+++ b/src/devices/video/ef9369.h
@@ -48,7 +48,7 @@
//**************************************************************************
typedef device_delegate<void (int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)> ef9369_color_update_delegate;
-#define EF9369_COLOR_UPDATE(name) void name(int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)
+#define EF9369_COLOR_UPDATE(name) void name(int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)
// ======================> ef9369_device
@@ -76,7 +76,7 @@ private:
ef9369_color_update_delegate m_color_update_cb;
// state
- uint8_t m_ca[NUMCOLORS], m_cb[NUMCOLORS], m_cc[NUMCOLORS]; // actually 4-bit
+ uint8_t m_ca[NUMCOLORS], m_cb[NUMCOLORS], m_cc[NUMCOLORS]; // actually 4-bit
bool m_m[NUMCOLORS];
int m_address;
};
diff --git a/src/devices/video/poly.h b/src/devices/video/poly.h
index d67e570826f..72706e037e3 100644
--- a/src/devices/video/poly.h
+++ b/src/devices/video/poly.h
@@ -130,6 +130,7 @@ public:
// getters
running_machine &machine() const { return m_machine; }
screen_device &screen() const { assert(m_screen != nullptr); return *m_screen; }
+ uint32_t triangles_drawn() const { return m_triangles; }
// synchronization
void wait(const char *debug_reason = "general");
diff --git a/src/devices/video/zeus2.cpp b/src/devices/video/zeus2.cpp
index 01806e7be3c..c606405c643 100644
--- a/src/devices/video/zeus2.cpp
+++ b/src/devices/video/zeus2.cpp
@@ -8,6 +8,8 @@
#include "zeus2.h"
#define LOG_REGS 1
+// Setting ALWAYS_LOG_FIFO will always log the fifo versus having to hold 'L'
+#define ALWAYS_LOG_FIFO 0
/*************************************
* Constructor
@@ -86,7 +88,16 @@ void zeus2_device::device_start()
vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(zeus2_device::display_irq), this));
//printf("%s\n", machine().system().name);
- m_thegrid = strcmp(machine().system().name, "thegrid")==0;
+ // Set system type
+ if (strcmp(machine().system().name, "thegrid") == 0) {
+ m_system = THEGRID;
+ }
+ else if (strcmp(machine().system().name, "crusnexo") == 0) {
+ m_system = CRUSNEXO;
+ }
+ else {
+ m_system = MWSKINS;
+ }
/* save states */
save_pointer(NAME(waveram), WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 2);
@@ -108,8 +119,8 @@ void zeus2_device::device_start()
save_item(NAME(zeus_quad_size));
save_item(NAME(m_fill_color));
save_item(NAME(m_fill_depth));
- save_item(NAME(m_renderAddr));
save_item(NAME(m_yScale));
+ save_item(NAME(m_system));
}
void zeus2_device::device_reset()
@@ -128,7 +139,6 @@ void zeus2_device::device_reset()
zeus_fifo_words = 0;
m_fill_color = 0;
m_fill_depth = 0;
- m_renderAddr = 0;
}
#if DUMP_WAVE_RAM
#include <iostream>
@@ -502,8 +512,7 @@ void zeus2_device::zeus2_register_update(offs_t offset, uint32_t oldval, int log
uint32_t temp = m_zeusbase[0x38];
m_zeusbase[0x38] = oldval;
m_screen->update_partial(m_screen->vpos());
- log_fifo = machine().input().code_pressed(KEYCODE_L);
- //log_fifo = 1;
+ log_fifo = machine().input().code_pressed(KEYCODE_L) | ALWAYS_LOG_FIFO;
m_zeusbase[0x38] = temp;
}
break;
@@ -716,13 +725,12 @@ void zeus2_device::zeus2_register_update(offs_t offset, uint32_t oldval, int log
}
/* make sure we log anything else */
//else if (logit || m_zeusbase[0x50] != 0x0)
- // logerror("\tw[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
+ // logerror("\tw[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
}
}
break;
case 0x51:
- // Set direct rendering location
- m_renderAddr = frame_addr_from_phys_addr(m_zeusbase[0x51]);
+ // Set rendering location
/* in this mode, crusnexo expects the reads to immediately latch */
//if ((m_zeusbase[0x50] == 0x00a20000) || (m_zeusbase[0x50] == 0x00720000))
if (m_zeusbase[0x50] == 0x00a20000)
@@ -1174,7 +1182,7 @@ bool zeus2_device::zeus2_fifo_process(const uint32_t *data, int numwords)
// 0x14: atlantis
case 0x14:
case 0x1c:
- if (m_thegrid) {
+ if (m_system == THEGRID) {
if (numwords < 3)
return false;
if (log_fifo)
@@ -1232,7 +1240,9 @@ bool zeus2_device::zeus2_fifo_process(const uint32_t *data, int numwords)
return false;
if (log_fifo)
log_fifo_command(data, numwords, "\n");
- m_renderAddr = frame_addr_from_phys_addr(data[1]);
+ // Need to figure how the 0x40 gets there
+ m_zeusbase[0x5e] = (data[0] << 16) | 0x40;
+ m_zeusbase[0x51] = data[1];
//zeus2_draw_model(data[1], data[0] & 0xff, log_fifo);
break;
@@ -1252,16 +1262,22 @@ bool zeus2_device::zeus2_fifo_process(const uint32_t *data, int numwords)
if (data[0] == 0x38000000) {
if (numwords < 3)
return false;
- // Direct write to frame buffer
- m_frameColor[m_renderAddr++] = conv_rgb555_to_rgb32((uint16_t)data[1]);
- m_frameColor[m_renderAddr++] = conv_rgb555_to_rgb32((uint16_t)(data[1] >> 16));
- m_frameColor[m_renderAddr++] = conv_rgb555_to_rgb32((uint16_t)data[2]);
- m_frameColor[m_renderAddr++] = conv_rgb555_to_rgb32((uint16_t)(data[2] >> 16));
- } else if (numwords < 12)
+ // mwskins direct write to frame buffer
+ m_zeusbase[0x58] = conv_rgb555_to_rgb32((uint16_t)data[1]);
+ m_zeusbase[0x59] = conv_rgb555_to_rgb32((uint16_t)(data[1] >> 16));
+ frame_write();
+ m_zeusbase[0x58] = conv_rgb555_to_rgb32((uint16_t)data[2]);
+ m_zeusbase[0x59] = conv_rgb555_to_rgb32((uint16_t)(data[2] >> 16));
+ frame_write();
+ if (((m_zeusbase[0x51] & 0xff) == 2) && log_fifo)
+ log_fifo_command(data, numwords, "\n");
+ }
+ else if (numwords < 12) {
return false;
- //print_fifo_command(data, numwords, "\n");
- if (log_fifo)
- log_fifo_command(data, numwords, "\n");
+ //print_fifo_command(data, numwords, "\n");
+ if (log_fifo)
+ log_fifo_command(data, numwords, "\n");
+ }
break;
default:
@@ -1634,14 +1650,14 @@ void zeus2_renderer::zeus2_draw_quad(const uint32_t *databuffer, uint32_t texdat
vert[i].p[0] += m_state->zeus_point[2];
}
//if (0)
- // //vert[i].p[0] += m_state->zbase;
- // vert[i].p[0] += reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
+ // //vert[i].p[0] += m_state->zbase;
+ // vert[i].p[0] += reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
//else {
int shift;
shift = 1024 >> m_state->m_zeusbase[0x6c];
vert[i].p[0] += shift;
- // //float zScale = reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
- // //vert[i].p[0] += zScale;
+ // //float zScale = reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
+ // //vert[i].p[0] += zScale;
//}
vert[i].p[2] += (texdata >> 16) << 2;
@@ -1691,7 +1707,7 @@ void zeus2_renderer::zeus2_draw_quad(const uint32_t *databuffer, uint32_t texdat
float xOrigin = reinterpret_cast<float&>(m_state->m_zeusbase[0x6a]);
float yOrigin = reinterpret_cast<float&>(m_state->m_zeusbase[0x6b]);
- float oozBase = (m_state->m_atlantis) ? 1024.0f : (m_state->m_thegrid) ? 512.0f : 512.0f;
+ float oozBase = (m_state->m_atlantis) ? 1024.0f : (m_state->m_system == m_state->THEGRID) ? 512.0f : 512.0f;
//oozBase = 1 << m_state->m_zeusbase[0x6c];
maxx = maxy = -1000.0f;
for (i = 0; i < numverts; i++)
diff --git a/src/devices/video/zeus2.h b/src/devices/video/zeus2.h
index 5d6cfe4fafc..960eefbd8c6 100644
--- a/src/devices/video/zeus2.h
+++ b/src/devices/video/zeus2.h
@@ -137,8 +137,6 @@ public:
float zeus_point2[3];
uint32_t zeus_texbase;
int zeus_quad_size;
- uint32_t m_renderAddr;
- bool m_thegrid;
uint32_t *waveram;
std::unique_ptr<uint32_t[]> m_frameColor;
@@ -154,6 +152,9 @@ public:
int texel_width;
float zbase;
+ enum { THEGRID, CRUSNEXO, MWSKINS };
+ int m_system;
+
protected:
// device-level overrides
virtual void device_start() override;
@@ -185,7 +186,6 @@ private:
int m_yScale;
-
#if TRACK_REG_USAGE
struct reg_info
{
@@ -298,6 +298,11 @@ public:
return ((color & 0x7c00) << 9) | ((color & 0x3e0) << 6) | ((color & 0x1f) << 3);
}
+ inline uint32_t conv_rgb565_to_rgb32(uint16_t color)
+ {
+ return ((color & 0x7c00) << 9) | ((color & 0x3e0) << 6) | ((color & 0x8000) >> 5) | ((color & 0x1f) << 3);
+ }
+
#ifdef UNUSED_FUNCTION
inline void WAVERAM_plot(int y, int x, uint32_t color)
{
diff --git a/src/emu/addrmap.cpp b/src/emu/addrmap.cpp
index 24af3a1baac..31fabbea1a5 100644
--- a/src/emu/addrmap.cpp
+++ b/src/emu/addrmap.cpp
@@ -401,11 +401,13 @@ address_map::~address_map()
void address_map::configure(address_spacenum spacenum, u8 databits)
{
- assert(m_spacenum == spacenum);
+ if (spacenum != m_spacenum)
+ osd_printf_error("Space %d configured as address space %d\n", m_spacenum, spacenum);
+
if (m_databits == 0xff)
m_databits = databits;
- else
- assert(m_databits == databits);
+ else if (databits != m_databits)
+ osd_printf_error("Space %d configured with %d data bits when %d expected\n", m_spacenum, databits, m_databits);
}
diff --git a/src/emu/devcb.cpp b/src/emu/devcb.cpp
index 3d851ee8e2a..12f84a01f5f 100644
--- a/src/emu/devcb.cpp
+++ b/src/emu/devcb.cpp
@@ -22,11 +22,27 @@
devcb_base::devcb_base(device_t &device, u64 defmask)
: m_device(device),
+ m_type(CALLBACK_NONE),
+ m_target_tag(nullptr),
+ m_target_int(0),
+ m_space_tag(nullptr),
+ m_space_num(AS_0),
+ m_space(nullptr),
m_rshift(0),
m_mask(defmask),
+ m_defmask(defmask),
m_xor(0)
{
- reset();
+ m_target.ptr = nullptr;
+}
+
+
+//-------------------------------------------------
+// devcb_base - destructor
+//-------------------------------------------------
+
+devcb_base::~devcb_base()
+{
}
@@ -45,6 +61,8 @@ void devcb_base::reset(callback_type type)
m_target.ptr = nullptr;
m_rshift = 0;
m_mask = ~u64(0);
+ m_xor = 0;
+ devcb_reset();
}
@@ -59,6 +77,26 @@ void devcb_base::resolve_ioport()
m_target.ioport = (m_target_tag != nullptr) ? m_device.owner()->ioport(m_target_tag) : nullptr;
if (m_target.ioport == nullptr)
throw emu_fatalerror("Unable to resolve I/O port callback reference to '%s' in device '%s'\n", m_target_tag, m_device.tag());
+
+ // adjust the mask to match the port bits
+ u64 port_mask = 0;
+ for (const ioport_field &field : m_target.ioport->fields())
+ port_mask |= field.mask();
+ m_mask = shift_mask(port_mask);
+}
+
+
+//-------------------------------------------------
+// resolve_membank - resolve a memory bank or
+// fatal error if we can't find it
+//-------------------------------------------------
+
+void devcb_base::resolve_membank()
+{
+ // attempt to resolve, fatal error if fail
+ m_target.membank = (m_target_tag != nullptr) ? m_device.owner()->membank(m_target_tag) : nullptr;
+ if (m_target.membank == nullptr)
+ throw emu_fatalerror("Unable to resolve memory bank callback reference to '%s' in device '%s'\n", m_target_tag, m_device.tag());
}
@@ -109,27 +147,37 @@ void devcb_base::resolve_space()
devcb_read_base::devcb_read_base(device_t &device, u64 defmask)
: devcb_base(device, defmask),
- m_adapter(nullptr)
+ m_adapter(&devcb_read_base::read_unresolved_adapter)
{
}
//-------------------------------------------------
-// reset - reset/initialize state
+// devcb_reset - reset/initialize local state
//-------------------------------------------------
-void devcb_read_base::reset(callback_type type)
+void devcb_read_base::devcb_reset()
{
- // parent first
- devcb_base::reset(type);
-
- // local stuff
m_readline = read_line_delegate();
m_read8 = read8_delegate();
m_read16 = read16_delegate();
m_read32 = read32_delegate();
m_read64 = read64_delegate();
m_adapter = &devcb_read_base::read_unresolved_adapter;
+ m_chain = nullptr;
+}
+
+
+//-------------------------------------------------
+// chain_alloc - add another callback to the
+// input chain
+//-------------------------------------------------
+
+devcb_read_base &devcb_read_base::chain_alloc()
+{
+ // set up the chained callback pointer
+ m_chain.reset(new devcb_read_base(m_device, m_defmask));
+ return *m_chain;
}
@@ -160,6 +208,7 @@ void devcb_read_base::resolve()
m_readline.bind_relative_to(*m_device.owner());
m_target_int = 0;
m_adapter = m_readline.isnull() ? &devcb_read_base::read_constant_adapter : &devcb_read_base::read_line_adapter;
+ m_mask = shift_mask(1);
break;
case CALLBACK_8:
@@ -167,6 +216,7 @@ void devcb_read_base::resolve()
m_read8.bind_relative_to(*m_device.owner());
m_target_int = 0;
m_adapter = m_read8.isnull() ? &devcb_read_base::read_constant_adapter : &devcb_read_base::read8_adapter;
+ m_mask = shift_mask(0xff);
break;
case CALLBACK_16:
@@ -174,6 +224,7 @@ void devcb_read_base::resolve()
m_read16.bind_relative_to(*m_device.owner());
m_target_int = 0;
m_adapter = m_read16.isnull() ? &devcb_read_base::read_constant_adapter : &devcb_read_base::read16_adapter;
+ m_mask = shift_mask(0xffff);
break;
case CALLBACK_32:
@@ -181,6 +232,7 @@ void devcb_read_base::resolve()
m_read32.bind_relative_to(*m_device.owner());
m_target_int = 0;
m_adapter = m_read32.isnull() ? &devcb_read_base::read_constant_adapter : &devcb_read_base::read32_adapter;
+ m_mask = shift_mask(0xffffffff);
break;
case CALLBACK_64:
@@ -191,20 +243,30 @@ void devcb_read_base::resolve()
break;
case CALLBACK_IOPORT:
+ name = m_target_tag;
resolve_ioport();
m_target_int = 0;
- m_adapter = (m_target.ioport == nullptr) ? &devcb_read_base::read_constant_adapter : &devcb_read_base::read_ioport_adapter;
+ m_adapter = &devcb_read_base::read_ioport_adapter;
break;
+ case CALLBACK_MEMBANK:
+ throw emu_fatalerror("Device read callbacks can't be connected to bank switches\n");
+
case CALLBACK_LOG:
m_adapter = &devcb_read_base::read_logged_adapter;
+ m_mask = 0;
break;
case CALLBACK_CONSTANT:
+ if (m_xor != 0)
+ throw emu_fatalerror("devcb_read: Attempt to invert constant value (%lX ^ %lX)\n", (unsigned long)shift_mask(m_target_int), (unsigned long)m_xor);
m_adapter = &devcb_read_base::read_constant_adapter;
+ m_mask = shift_mask(m_target_int);
break;
case CALLBACK_INPUTLINE:
+ case CALLBACK_ASSERTLINE:
+ case CALLBACK_CLEARLINE:
throw emu_fatalerror("Device read callbacks can't be connected to input lines\n");
}
}
@@ -212,6 +274,15 @@ void devcb_read_base::resolve()
{
throw emu_fatalerror("devcb_read: Error performing a late bind of type %s to %s (name=%s)\n", binderr.m_actual_type.name(), binderr.m_target_type.name(), name);
}
+
+ // resolve callback chain recursively
+ if (m_chain != nullptr)
+ m_chain->resolve();
+
+ // protect against bus contention (the masks must not overlap)
+ for (const devcb_read_base *chained_cb = m_chain.get(); chained_cb != nullptr; chained_cb = chained_cb->m_chain.get())
+ if ((m_mask & chained_cb->m_mask) != 0)
+ throw emu_fatalerror("Device %s read callback (name=%s) overlaps with chained callback (%lX & %lX)", m_device.tag(), name, (unsigned long)m_mask, (unsigned long)chained_cb->m_mask);
}
@@ -305,14 +376,14 @@ u64 devcb_read_base::read_ioport_adapter(address_space &space, offs_t offset, u6
//-------------------------------------------------
-// read_logged_adapter - log a read and return a
-// constant
+// read_logged_adapter - log a read and return
+// zero
//-------------------------------------------------
u64 devcb_read_base::read_logged_adapter(address_space &space, offs_t offset, u64 mask)
{
- m_device.logerror("%s: read %s\n", m_device.machine().describe_context(), m_target_tag);
- return shift_mask_xor(m_target_int);
+ m_device.logerror("%s: %s\n", m_device.machine().describe_context(), m_target_tag);
+ return 0;
}
@@ -322,7 +393,7 @@ u64 devcb_read_base::read_logged_adapter(address_space &space, offs_t offset, u6
u64 devcb_read_base::read_constant_adapter(address_space &space, offs_t offset, u64 mask)
{
- return shift_mask_xor(m_target_int);
+ return shift_mask(m_target_int);
}
@@ -337,27 +408,37 @@ u64 devcb_read_base::read_constant_adapter(address_space &space, offs_t offset,
devcb_write_base::devcb_write_base(device_t &device, u64 defmask)
: devcb_base(device, defmask),
- m_adapter(nullptr)
+ m_adapter(&devcb_write_base::write_unresolved_adapter)
{
}
//-------------------------------------------------
-// reset - reset/initialize state
+// devcb_reset - reset/initialize local state
//-------------------------------------------------
-void devcb_write_base::reset(callback_type type)
+void devcb_write_base::devcb_reset()
{
- // parent first
- devcb_base::reset(type);
-
- // local stuff
m_writeline = write_line_delegate();
m_write8 = write8_delegate();
m_write16 = write16_delegate();
m_write32 = write32_delegate();
m_write64 = write64_delegate();
m_adapter = &devcb_write_base::write_unresolved_adapter;
+ m_chain = nullptr;
+}
+
+
+//-------------------------------------------------
+// chain_alloc - add another callback to the
+// output chain
+//-------------------------------------------------
+
+devcb_write_base &devcb_write_base::chain_alloc()
+{
+ // set up the chained callback pointer
+ m_chain.reset(new devcb_write_base(m_device, m_defmask));
+ return *m_chain;
}
@@ -418,6 +499,11 @@ void devcb_write_base::resolve()
m_adapter = (m_target.ioport == nullptr) ? &devcb_write_base::write_noop_adapter : &devcb_write_base::write_ioport_adapter;
break;
+ case CALLBACK_MEMBANK:
+ resolve_membank();
+ m_adapter = (m_target.membank == nullptr) ? &devcb_write_base::write_noop_adapter : &devcb_write_base::write_membank_adapter;
+ break;
+
case CALLBACK_LOG:
m_adapter = &devcb_write_base::write_logged_adapter;
break;
@@ -430,12 +516,26 @@ void devcb_write_base::resolve()
resolve_inputline();
m_adapter = &devcb_write_base::write_inputline_adapter;
break;
+
+ case CALLBACK_ASSERTLINE:
+ resolve_inputline();
+ m_adapter = &devcb_write_base::write_assertline_adapter;
+ break;
+
+ case CALLBACK_CLEARLINE:
+ resolve_inputline();
+ m_adapter = &devcb_write_base::write_clearline_adapter;
+ break;
}
}
catch (binding_type_exception &binderr)
{
throw emu_fatalerror("devcb_write: Error performing a late bind of type %s to %s (name=%s)\n", binderr.m_actual_type.name(), binderr.m_target_type.name(), name);
}
+
+ // resolve callback chain recursively
+ if (m_chain != nullptr)
+ m_chain->resolve();
}
@@ -515,7 +615,7 @@ void devcb_write_base::write64_adapter(address_space &space, offs_t offset, u64
//-------------------------------------------------
-// write_ioport - write from an I/O port
+// write_ioport_adapter - write to an I/O port
//-------------------------------------------------
void devcb_write_base::write_ioport_adapter(address_space &space, offs_t offset, u64 data, u64 mask)
@@ -526,13 +626,25 @@ void devcb_write_base::write_ioport_adapter(address_space &space, offs_t offset,
//-------------------------------------------------
-// write_logged_adapter - logging unresolved
-// adapter
+// write_membank_adapter - switch a memory bank
+//-------------------------------------------------
+
+void devcb_write_base::write_membank_adapter(address_space &space, offs_t offset, u64 data, u64 mask)
+{
+ if (m_target.membank)
+ m_target.membank->set_entry(unshift_mask_xor(data));
+}
+
+
+//-------------------------------------------------
+// write_logged_adapter - log write if masked
+// value is nonzero
//-------------------------------------------------
void devcb_write_base::write_logged_adapter(address_space &space, offs_t offset, u64 data, u64 mask)
{
- m_device.logerror("%s: unresolved devcb write\n", m_device.machine().describe_context());
+ if (unshift_mask_xor(data) != 0)
+ m_device.logerror("%s: %s\n", m_device.machine().describe_context(), m_target_tag);
}
@@ -547,7 +659,7 @@ void devcb_write_base::write_noop_adapter(address_space &space, offs_t offset, u
//-------------------------------------------------
-// write_inputline_adapter - write to an device's
+// write_inputline_adapter - write to a device's
// input line
//-------------------------------------------------
@@ -555,3 +667,27 @@ void devcb_write_base::write_inputline_adapter(address_space &space, offs_t offs
{
m_target.device->execute().set_input_line(m_target_int, unshift_mask_xor(data) & 1);
}
+
+
+//-------------------------------------------------
+// write_assertline_adapter - write to a device's
+// input line
+//-------------------------------------------------
+
+void devcb_write_base::write_assertline_adapter(address_space &space, offs_t offset, u64 data, u64 mask)
+{
+ if (unshift_mask_xor(data) & 1)
+ m_target.device->execute().set_input_line(m_target_int, ASSERT_LINE);
+}
+
+
+//-------------------------------------------------
+// write_clearline_adapter - write to a device's
+// input line
+//-------------------------------------------------
+
+void devcb_write_base::write_clearline_adapter(address_space &space, offs_t offset, u64 data, u64 mask)
+{
+ if (unshift_mask_xor(data) & 1)
+ m_target.device->execute().set_input_line(m_target_int, CLEAR_LINE);
+}
diff --git a/src/emu/devcb.h b/src/emu/devcb.h
index c30f9db431b..58319bd34fa 100644
--- a/src/emu/devcb.h
+++ b/src/emu/devcb.h
@@ -25,9 +25,12 @@
// wrappers for ioports, constants, and loggers
#define DEVCB_NOOP devcb_base::null_desc()
#define DEVCB_IOPORT(_tag) devcb_base::ioport_desc(_tag)
+#define DEVCB_MEMBANK(_tag) devcb_base::membank_desc(_tag)
#define DEVCB_CONSTANT(_value) devcb_base::constant_desc(_value)
-#define DEVCB_LOGGER(_string, _value) devcb_base::logger_desc(_string, _value)
+#define DEVCB_LOGGER(_string) devcb_base::logger_desc(_string)
#define DEVCB_INPUTLINE(_tag, _line) devcb_base::inputline_desc(_tag, _line)
+#define DEVCB_ASSERTLINE(_tag, _line) devcb_base::assertline_desc(_tag, _line)
+#define DEVCB_CLEARLINE(_tag, _line) devcb_base::clearline_desc(_tag, _line)
#define DEVCB_VCC DEVCB_CONSTANT(1)
#define DEVCB_GND DEVCB_CONSTANT(0)
@@ -62,10 +65,14 @@
// machine config helpers to add shift, mask, or address space configuration
#define MCFG_DEVCB_RSHIFT(_shift) devcb->set_rshift(_shift);
#define MCFG_DEVCB_MASK(_mask) devcb->set_mask(_mask);
+#define MCFG_DEVCB_BIT(_bit) devcb->set_rshift(-(_bit)).set_mask(1ULL << (_bit));
#define MCFG_DEVCB_XOR(_xor) devcb->set_xor(_xor);
#define MCFG_DEVCB_INVERT devcb->set_xor(~u64(0));
#define MCFG_DEVCB_ADDRESS_SPACE(_device, _spacenum) devcb->set_space(_device, _spacenum);
+// machine config helpers for chaining callbacks
+#define MCFG_DEVCB_CHAIN_INPUT(_desc) devcb = &downcast<devcb_read_base &>(*devcb).chain_alloc().set_callback(DEVCB_##_desc);
+#define MCFG_DEVCB_CHAIN_OUTPUT(_desc) devcb = &downcast<devcb_write_base &>(*devcb).chain_alloc().set_callback(DEVCB_##_desc);
//**************************************************************************
@@ -92,13 +99,17 @@ protected:
CALLBACK_32,
CALLBACK_64,
CALLBACK_IOPORT,
+ CALLBACK_MEMBANK,
CALLBACK_LOG,
CALLBACK_CONSTANT,
- CALLBACK_INPUTLINE
+ CALLBACK_INPUTLINE,
+ CALLBACK_ASSERTLINE,
+ CALLBACK_CLEARLINE
};
// construction/destruction
devcb_base(device_t &device, u64 defmask);
+ virtual ~devcb_base();
public:
// getters
@@ -124,6 +135,13 @@ public:
const char *m_tag;
};
+ class membank_desc
+ {
+ public:
+ membank_desc(const char *tag) { m_tag = tag; }
+ const char *m_tag;
+ };
+
class constant_desc
{
public:
@@ -134,9 +152,8 @@ public:
class logger_desc
{
public:
- logger_desc(const char *string, u64 value = 0) { m_string = string; m_value = value; }
+ logger_desc(const char *string) { m_string = string; }
const char *m_string;
- u64 m_value;
};
class inputline_desc
@@ -147,20 +164,40 @@ public:
int m_inputnum;
};
+ class assertline_desc
+ {
+ public:
+ assertline_desc(const char *tag, int inputnum) { m_tag = tag; m_inputnum = inputnum; }
+ const char *m_tag;
+ int m_inputnum;
+ };
+
+ class clearline_desc
+ {
+ public:
+ clearline_desc(const char *tag, int inputnum) { m_tag = tag; m_inputnum = inputnum; }
+ const char *m_tag;
+ int m_inputnum;
+ };
+
// shared callback setters
devcb_base &set_callback(null_desc null) { reset(CALLBACK_NONE); return *this; }
devcb_base &set_callback(ioport_desc ioport) { reset(CALLBACK_IOPORT); m_target_tag = ioport.m_tag; return *this; }
+ devcb_base &set_callback(membank_desc membank) { reset(CALLBACK_MEMBANK); m_target_tag = membank.m_tag; return *this; }
devcb_base &set_callback(constant_desc constant) { reset(CALLBACK_CONSTANT); m_target_int = constant.m_value; return *this; }
- devcb_base &set_callback(logger_desc logger) { reset(CALLBACK_LOG); m_target_int = logger.m_value; m_target_tag = logger.m_string; return *this; }
- devcb_base &set_callback(inputline_desc inputline) { reset(CALLBACK_INPUTLINE); m_target_tag = inputline.m_tag; m_target_int = inputline.m_inputnum; return *this; }
+ devcb_base &set_callback(logger_desc logger) { reset(CALLBACK_LOG); m_target_tag = logger.m_string; return *this; }
+ void reset() { reset(CALLBACK_NONE); }
protected:
// internal helpers
+ inline u64 shift_mask(u64 value) const { return ((m_rshift < 0) ? (value << -m_rshift) : (value >> m_rshift)) & m_mask; }
inline u64 shift_mask_xor(u64 value) const { return (((m_rshift < 0) ? (value << -m_rshift) : (value >> m_rshift)) ^ m_xor) & m_mask; }
inline u64 unshift_mask(u64 value) const { return (m_rshift < 0) ? ((value & m_mask) >> -m_rshift) : ((value & m_mask) << m_rshift); }
inline u64 unshift_mask_xor(u64 value) const { return (m_rshift < 0) ? (((value ^ m_xor) & m_mask) >> -m_rshift) : (((value ^ m_xor) & m_mask) << m_rshift); }
- void reset(callback_type type = CALLBACK_NONE);
+ void reset(callback_type type);
+ virtual void devcb_reset() = 0;
void resolve_ioport();
+ void resolve_membank();
void resolve_inputline();
void resolve_space();
@@ -170,6 +207,7 @@ protected:
void * ptr;
device_t * device;
ioport_port * ioport;
+ memory_bank * membank;
};
// configuration
@@ -185,6 +223,7 @@ protected:
callback_target m_target; // resolved pointer to target object
int m_rshift; // right shift to apply to data read
u64 m_mask; // mask to apply to data read
+ const u64 m_defmask; // default mask
u64 m_xor; // XOR to apply to data read
};
@@ -205,6 +244,7 @@ public:
devcb_base &set_callback(read16_delegate func) { reset(CALLBACK_16); m_read16 = func; return *this; }
devcb_base &set_callback(read32_delegate func) { reset(CALLBACK_32); m_read32 = func; return *this; }
devcb_base &set_callback(read64_delegate func) { reset(CALLBACK_64); m_read64 = func; return *this; }
+ devcb_read_base &chain_alloc();
// resolution
void resolve();
@@ -212,8 +252,10 @@ public:
protected:
// internal helpers
- void reset(callback_type type = CALLBACK_NONE);
+ virtual void devcb_reset() override;
+ inline u64 read(address_space &space, offs_t offset, u64 mask);
+private:
// adapters
u64 read_unresolved_adapter(address_space &space, offs_t offset, u64 mask);
u64 read_line_adapter(address_space &space, offs_t offset, u64 mask);
@@ -235,6 +277,7 @@ protected:
// derived state
typedef u64 (devcb_read_base::*adapter_func)(address_space &, offs_t, u64);
adapter_func m_adapter; // actual callback to invoke
+ std::unique_ptr<devcb_read_base> m_chain; // next callback for chained input
};
@@ -254,6 +297,10 @@ public:
devcb_base &set_callback(write16_delegate func) { reset(CALLBACK_16); m_write16 = func; return *this; }
devcb_base &set_callback(write32_delegate func) { reset(CALLBACK_32); m_write32 = func; return *this; }
devcb_base &set_callback(write64_delegate func) { reset(CALLBACK_64); m_write64 = func; return *this; }
+ devcb_base &set_callback(inputline_desc inputline) { reset(CALLBACK_INPUTLINE); m_target_tag = inputline.m_tag; m_target_int = inputline.m_inputnum; return *this; }
+ devcb_base &set_callback(assertline_desc inputline) { reset(CALLBACK_ASSERTLINE); m_target_tag = inputline.m_tag; m_target_int = inputline.m_inputnum; return *this; }
+ devcb_base &set_callback(clearline_desc inputline) { reset(CALLBACK_CLEARLINE); m_target_tag = inputline.m_tag; m_target_int = inputline.m_inputnum; return *this; }
+ devcb_write_base &chain_alloc();
// resolution
void resolve();
@@ -261,8 +308,10 @@ public:
protected:
// internal helpers
- void reset(callback_type type = CALLBACK_NONE);
+ virtual void devcb_reset() override;
+ inline void write(address_space &space, offs_t offset, u64 data, u64 mask);
+private:
// adapters
void write_unresolved_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write_line_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
@@ -271,9 +320,12 @@ protected:
void write32_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write64_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write_ioport_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
+ void write_membank_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write_logged_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write_noop_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
void write_inputline_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
+ void write_assertline_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
+ void write_clearline_adapter(address_space &space, offs_t offset, u64 data, u64 mask);
// configuration
write_line_delegate m_writeline; // copy of registered line writer
@@ -285,6 +337,7 @@ protected:
// derived state
typedef void (devcb_write_base::*adapter_func)(address_space &, offs_t, u64, u64);
adapter_func m_adapter; // actual callback to invoke
+ std::unique_ptr<devcb_write_base> m_chain; // next callback for chained output
};
@@ -294,8 +347,8 @@ class devcb_read_line : public devcb_read_base
{
public:
devcb_read_line(device_t &device) : devcb_read_base(device, 0xff) { }
- int operator()() { return (this->*m_adapter)(*m_space, 0, 0xffU) & 1; }
- int operator()(address_space &space) { return (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, 0, 0xffU) & 1; }
+ int operator()() { return read(*m_space, 0, 0xffU) & 1; }
+ int operator()(address_space &space) { return read((m_space_tag != nullptr) ? *m_space : space, 0, 0xffU) & 1; }
};
@@ -305,8 +358,8 @@ class devcb_read8 : public devcb_read_base
{
public:
devcb_read8(device_t &device) : devcb_read_base(device, 0xff) { }
- u8 operator()(offs_t offset = 0, u8 mask = 0xff) { return (this->*m_adapter)(*m_space, offset, mask) & mask; }
- u8 operator()(address_space &space, offs_t offset = 0, u8 mask = 0xff) { return (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
+ u8 operator()(offs_t offset = 0, u8 mask = 0xff) { return read(*m_space, offset, mask) & mask; }
+ u8 operator()(address_space &space, offs_t offset = 0, u8 mask = 0xff) { return read((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
};
@@ -316,8 +369,8 @@ class devcb_read16 : public devcb_read_base
{
public:
devcb_read16(device_t &device) : devcb_read_base(device, 0xffff) { }
- u16 operator()(offs_t offset = 0, u16 mask = 0xffff) { return (this->*m_adapter)(*m_space, offset, mask) & mask; }
- u16 operator()(address_space &space, offs_t offset = 0, u16 mask = 0xffff) { return (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
+ u16 operator()(offs_t offset = 0, u16 mask = 0xffff) { return read(*m_space, offset, mask) & mask; }
+ u16 operator()(address_space &space, offs_t offset = 0, u16 mask = 0xffff) { return read((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
};
@@ -327,8 +380,8 @@ class devcb_read32 : public devcb_read_base
{
public:
devcb_read32(device_t &device) : devcb_read_base(device, 0xffffffff) { }
- u32 operator()(offs_t offset = 0, u32 mask = 0xffffffff) { return (this->*m_adapter)(*m_space, offset, mask) & mask; }
- u32 operator()(address_space &space, offs_t offset = 0, u32 mask = 0xffffffff) { return (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
+ u32 operator()(offs_t offset = 0, u32 mask = 0xffffffff) { return read(*m_space, offset, mask) & mask; }
+ u32 operator()(address_space &space, offs_t offset = 0, u32 mask = 0xffffffff) { return read((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
};
@@ -338,8 +391,8 @@ class devcb_read64 : public devcb_read_base
{
public:
devcb_read64(device_t &device) : devcb_read_base(device, 0xffffffffffffffffU) { }
- u64 operator()(offs_t offset = 0, u64 mask = 0xffffffffffffffffU) { return (this->*m_adapter)(*m_space, offset, mask) & mask; }
- u64 operator()(address_space &space, offs_t offset = 0, u64 mask = 0xffffffffffffffffU) { return (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
+ u64 operator()(offs_t offset = 0, u64 mask = 0xffffffffffffffffU) { return read(*m_space, offset, mask) & mask; }
+ u64 operator()(address_space &space, offs_t offset = 0, u64 mask = 0xffffffffffffffffU) { return read((m_space_tag != nullptr) ? *m_space : space, offset, mask) & mask; }
};
@@ -349,8 +402,8 @@ class devcb_write_line : public devcb_write_base
{
public:
devcb_write_line(device_t &device) : devcb_write_base(device, 0xff) { }
- void operator()(int state) { (this->*m_adapter)(*m_space, 0, state & 1, 0xffU); }
- void operator()(address_space &space, int state) { (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, 0, state & 1, 0xffU); }
+ void operator()(int state) { write(*m_space, 0, state & 1, 0xffU); }
+ void operator()(address_space &space, int state) { write((m_space_tag != nullptr) ? *m_space : space, 0, state & 1, 0xffU); }
};
@@ -360,9 +413,9 @@ class devcb_write8 : public devcb_write_base
{
public:
devcb_write8(device_t &device) : devcb_write_base(device, 0xff) { }
- void operator()(u8 data, u8 mask = 0xff) { (this->*m_adapter)(*m_space, 0, data, mask); }
- void operator()(offs_t offset, u8 data, u8 mask = 0xff) { (this->*m_adapter)(*m_space, offset, data, mask); }
- void operator()(address_space &space, offs_t offset, u8 data, u8 mask = 0xff) { (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
+ void operator()(u8 data, u8 mask = 0xff) { write(*m_space, 0, data, mask); }
+ void operator()(offs_t offset, u8 data, u8 mask = 0xff) { write(*m_space, offset, data, mask); }
+ void operator()(address_space &space, offs_t offset, u8 data, u8 mask = 0xff) { write((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
};
@@ -372,9 +425,9 @@ class devcb_write16 : public devcb_write_base
{
public:
devcb_write16(device_t &device) : devcb_write_base(device, 0xffff) { }
- void operator()(u16 data, u16 mask = 0xffff) { (this->*m_adapter)(*m_space, 0, data, mask); }
- void operator()(offs_t offset, u16 data, u16 mask = 0xffff) { (this->*m_adapter)(*m_space, offset, data, mask); }
- void operator()(address_space &space, offs_t offset, u16 data, u16 mask = 0xffff) { (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
+ void operator()(u16 data, u16 mask = 0xffff) { write(*m_space, 0, data, mask); }
+ void operator()(offs_t offset, u16 data, u16 mask = 0xffff) { write(*m_space, offset, data, mask); }
+ void operator()(address_space &space, offs_t offset, u16 data, u16 mask = 0xffff) { write((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
};
@@ -384,9 +437,9 @@ class devcb_write32 : public devcb_write_base
{
public:
devcb_write32(device_t &device) : devcb_write_base(device, 0xffffffff) { }
- void operator()(u32 data, u32 mask = 0xffffffff) { (this->*m_adapter)(*m_space, 0, data, mask); }
- void operator()(offs_t offset, u32 data, u32 mask = 0xffffffff) { (this->*m_adapter)(*m_space, offset, data, mask); }
- void operator()(address_space &space, offs_t offset, u32 data, u32 mask = 0xffffffff) { (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
+ void operator()(u32 data, u32 mask = 0xffffffff) { write(*m_space, 0, data, mask); }
+ void operator()(offs_t offset, u32 data, u32 mask = 0xffffffff) { write(*m_space, offset, data, mask); }
+ void operator()(address_space &space, offs_t offset, u32 data, u32 mask = 0xffffffff) { write((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
};
@@ -396,10 +449,40 @@ class devcb_write64 : public devcb_write_base
{
public:
devcb_write64(device_t &device) : devcb_write_base(device, 0xffffffffffffffffU) { }
- void operator()(u64 data, u64 mask = 0xffffffffffffffffU) { (this->*m_adapter)(*m_space, 0, data, mask); }
- void operator()(offs_t offset, u64 data, u64 mask = 0xffffffffffffffffU) { (this->*m_adapter)(*m_space, offset, data, mask); }
- void operator()(address_space &space, offs_t offset, u64 data, u64 mask = 0xffffffffffffffffU) { (this->*m_adapter)((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
+ void operator()(u64 data, u64 mask = 0xffffffffffffffffU) { write(*m_space, 0, data, mask); }
+ void operator()(offs_t offset, u64 data, u64 mask = 0xffffffffffffffffU) { write(*m_space, offset, data, mask); }
+ void operator()(address_space &space, offs_t offset, u64 data, u64 mask = 0xffffffffffffffffU) { write((m_space_tag != nullptr) ? *m_space : space, offset, data, mask); }
};
+
+//**************************************************************************
+// INLINE FUNCTIONS
+//**************************************************************************
+
+//-------------------------------------------------
+// read - generic read callback dispatch
+//-------------------------------------------------
+
+inline u64 devcb_read_base::read(address_space &space, offs_t offset, u64 mask)
+{
+ u64 result = (this->*m_adapter)(space, offset, mask);
+ if (m_chain != nullptr)
+ result |= m_chain->read(space, offset, mask);
+ return result;
+}
+
+
+//-------------------------------------------------
+// write - generic write callback dispatch
+//-------------------------------------------------
+
+inline void devcb_write_base::write(address_space &space, offs_t offset, u64 data, u64 mask)
+{
+ (this->*m_adapter)(space, offset, data, mask);
+ if (m_chain != nullptr)
+ m_chain->write(space, offset, data, mask);
+}
+
+
#endif /* MAME_EMU_DEVCB_H */
diff --git a/src/emu/dispatch.cpp b/src/emu/dispatch.cpp
deleted file mode 100644
index b82fb85daf8..00000000000
--- a/src/emu/dispatch.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-
-#include "emu.h"
-
-const device_type DEVCB_LINE_DISPATCH_2 = &device_creator<devcb_line_dispatch_device<2> >;
-const device_type DEVCB_LINE_DISPATCH_3 = &device_creator<devcb_line_dispatch_device<3> >;
-const device_type DEVCB_LINE_DISPATCH_4 = &device_creator<devcb_line_dispatch_device<4> >;
-const device_type DEVCB_LINE_DISPATCH_5 = &device_creator<devcb_line_dispatch_device<5> >;
-const device_type DEVCB_LINE_DISPATCH_6 = &device_creator<devcb_line_dispatch_device<6> >;
-
-template<> devcb_line_dispatch_device<2>::devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_2, "Line dispatcher (2 slots)", tag, owner, clock, "devcb_line_dispatch", __FILE__)
-{
- init_fwd();
-}
-
-template<> devcb_line_dispatch_device<3>::devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_3, "Line dispatcher (3 slots)", tag, owner, clock, "devcb_line_dispatch", __FILE__)
-{
- init_fwd();
-}
-
-template<> devcb_line_dispatch_device<4>::devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_4, "Line dispatcher (4 slots)", tag, owner, clock, "devcb_line_dispatch", __FILE__)
-{
- init_fwd();
-}
-
-template<> devcb_line_dispatch_device<5>::devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_5, "Line dispatcher (5 slots)", tag, owner, clock, "devcb_line_dispatch", __FILE__)
-{
- init_fwd();
-}
-
-template<> devcb_line_dispatch_device<6>::devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_6, "Line dispatcher (6 slots)", tag, owner, clock, "devcb_line_dispatch", __FILE__)
-{
- init_fwd();
-}
diff --git a/src/emu/dispatch.h b/src/emu/dispatch.h
deleted file mode 100644
index 26be42e345e..00000000000
--- a/src/emu/dispatch.h
+++ /dev/null
@@ -1,64 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-/***************************************************************************
-
- dispatch.h
-
- Signal dispatching devices.
-
-***************************************************************************/
-
-#pragma once
-
-#ifndef __EMU_H__
-#error Dont include this file directly; include emu.h instead.
-#endif
-
-#ifndef MAME_EMU_DISPATCH_H
-#define MAME_EMU_DISPATCH_H
-
-#define MCFG_LINE_DISPATCH_ADD(_tag, _count) \
- MCFG_DEVICE_ADD(_tag, DEVCB_LINE_DISPATCH_ ## _count, 0)
-
-#define MCFG_LINE_DISPATCH_FWD_CB(_entry, _count, _devcb) \
- devcb = &devcb_line_dispatch_device<_count>::set_fwd_cb(*device, _entry, DEVCB_##_devcb);
-
-extern const device_type DEVCB_LINE_DISPATCH_2;
-extern const device_type DEVCB_LINE_DISPATCH_3;
-extern const device_type DEVCB_LINE_DISPATCH_4;
-extern const device_type DEVCB_LINE_DISPATCH_5;
-extern const device_type DEVCB_LINE_DISPATCH_6;
-
-template<int N> class devcb_line_dispatch_device : public device_t {
-public:
- devcb_line_dispatch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- device_t(mconfig, DEVCB_LINE_DISPATCH_2, "DEVCB_LINE_DISPATCH_2", tag, owner, clock, "devcb_line_dispatch_2", __FILE__) { }
-
- void init_fwd() {
- for(auto & elem : fwd_cb)
- elem = new devcb_write_line(*this);
- }
-
- virtual ~devcb_line_dispatch_device() {
- for(auto & elem : fwd_cb)
- delete elem;
- }
-
- template<class _Object> static devcb_base &set_fwd_cb(device_t &device, int entry, _Object object) { return downcast<devcb_line_dispatch_device<N> &>(device).fwd_cb[entry]->set_callback(object); }
-
- WRITE_LINE_MEMBER( in_w ) {
- for(auto & elem : fwd_cb)
- (*(elem))(state);
- }
-
-protected:
- virtual void device_start() override {
- for(auto & elem : fwd_cb)
- elem->resolve_safe();
- }
-
-private:
- devcb_write_line *fwd_cb[N];
-};
-
-#endif // MAME_EMU_DISPATCH_H
diff --git a/src/emu/emu.h b/src/emu/emu.h
index de2105fc68c..65a45a4824d 100644
--- a/src/emu/emu.h
+++ b/src/emu/emu.h
@@ -110,7 +110,6 @@ typedef device_t * (*machine_config_constructor)(machine_config &config, device_
// generic helpers
#include "devcb.h"
-#include "dispatch.h"
#include "drivers/xtal.h"
#include "bookkeeping.h"
#include "video/generic.h"
diff --git a/src/frontend/mame/luaengine.cpp b/src/frontend/mame/luaengine.cpp
index 1bdc3582fef..34d9c769338 100644
--- a/src/frontend/mame/luaengine.cpp
+++ b/src/frontend/mame/luaengine.cpp
@@ -1219,7 +1219,7 @@ void lua_engine::initialize()
* port:active() - get port status
* port:live() - get port ioport_port_live (TODO: not usable from lua as of now)
* port:read() - get port value
- * port:write(val, mask) - set port to value & mask
+ * port:write(val, mask) - set port to value & mask (output fields only, for other fields use field:set_value(val))
* port:field(mask) - get ioport_field for port and mask
* port.field[] - get ioport_field table
*/
diff --git a/src/frontend/mame/mame.cpp b/src/frontend/mame/mame.cpp
index 31d8fb447e0..c8e73eba670 100644
--- a/src/frontend/mame/mame.cpp
+++ b/src/frontend/mame/mame.cpp
@@ -155,7 +155,7 @@ void mame_machine_manager::start_luaengine()
std::string error_string;
m_plugins->set_value("console", "1", OPTION_PRIORITY_CMDLINE, error_string);
}
-
+
m_lua->initialize();
{
diff --git a/src/frontend/mame/media_ident.cpp b/src/frontend/mame/media_ident.cpp
index 1360a88c66c..3c1fdf19c47 100644
--- a/src/frontend/mame/media_ident.cpp
+++ b/src/frontend/mame/media_ident.cpp
@@ -235,7 +235,9 @@ int media_identifier::find_by_hash(const util::hash_collection &hashes, int leng
// output information about the match
if (found)
osd_printf_info(" ");
- osd_printf_info("= %s%-20s %-10s %s\n", baddump ? "(BAD) " : "", ROM_GETNAME(rom), m_drivlist.driver().name, m_drivlist.driver().description);
+ osd_printf_info("= %s%-20s %-10s %s%s\n", baddump ? "(BAD) " : "",
+ ROM_GETNAME(rom), device.shortname(), device.name(),
+ device.owner() != nullptr ? " (device)" : "");
found++;
}
}
diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp
index 114fa317c74..6bd84863db7 100644
--- a/src/frontend/mame/ui/filesel.cpp
+++ b/src/frontend/mame/ui/filesel.cpp
@@ -22,7 +22,8 @@
#include "zippath.h"
#include <cstring>
-
+#include <locale>
+#include <codecvt>
namespace ui {
/***************************************************************************
@@ -297,6 +298,7 @@ void menu_file_selector::populate(float &customtop, float &custombottom)
const file_selector_entry *selected_entry = nullptr;
int i;
const char *volume_name;
+ uint8_t first;
// open the directory
err = util::zippath_opendir(m_current_directory, &directory);
@@ -332,6 +334,9 @@ void menu_file_selector::populate(float &customtop, float &custombottom)
i++;
}
+ // mark first filename entry
+ first = m_entrylist.size() + 1;
+
// build the menu for each item
if (err == osd_file::error::NONE)
{
@@ -353,6 +358,16 @@ void menu_file_selector::populate(float &customtop, float &custombottom)
}
}
+ // sort the menu entries
+ std::wstring_convert<std::codecvt_utf8<wchar_t>> conv;
+ const std::collate<wchar_t>& coll = std::use_facet<std::collate<wchar_t>>(std::locale());
+ std::sort(m_entrylist.begin()+first, m_entrylist.end(), [&coll, &conv](file_selector_entry const &x, file_selector_entry const &y)
+ {
+ std::wstring xstr = conv.from_bytes(x.basename);
+ std::wstring ystr = conv.from_bytes(y.basename);
+ return coll.compare(xstr.data(), xstr.data()+xstr.size(), ystr.data(), ystr.data()+ystr.size()) < 0;
+ } );
+
// append all of the menu entries
for (auto &entry : m_entrylist)
append_entry_menu_item(&entry);
diff --git a/src/frontend/mame/ui/filesel.h b/src/frontend/mame/ui/filesel.h
index a987e9f424b..6e1759588dd 100644
--- a/src/frontend/mame/ui/filesel.h
+++ b/src/frontend/mame/ui/filesel.h
@@ -50,6 +50,9 @@ private:
struct file_selector_entry
{
+ file_selector_entry() {}
+ file_selector_entry(file_selector_entry &&) = default;
+ file_selector_entry &operator=(file_selector_entry &&) = default;
file_selector_entry_type type;
std::string basename;
std::string fullpath;
diff --git a/src/lib/formats/acorn_dsk.cpp b/src/lib/formats/acorn_dsk.cpp
index b880b28018f..0c62a907864 100644
--- a/src/lib/formats/acorn_dsk.cpp
+++ b/src/lib/formats/acorn_dsk.cpp
@@ -412,8 +412,8 @@ int acorn_adfs_new_format::find_size(io_generic *io, uint32_t form_factor)
if (form_factor != floppy_image::FF_UNKNOWN && form_factor != f.form_factor)
continue;
- // valid images will have map identifier Nick
- if ((size == (uint64_t)compute_track_size(f) * f.track_count * f.head_count) && (memcmp(dform, "Nick", 4) == 0 || memcmp(eform, "Nick", 4) == 0)) {
+ // valid images will have map identifier Nick, Arthur D format still use Hugo
+ if ((size <= (uint64_t)compute_track_size(f) * f.track_count * f.head_count) && (memcmp(dform, "Nick", 4) == 0 || memcmp(eform, "Nick", 4) == 0 || memcmp(dform, "Hugo", 4) == 0)) {
return i;
}
}
diff --git a/src/lib/netlist/analog/nld_opamps.cpp b/src/lib/netlist/analog/nld_opamps.cpp
index 57d6f6a76f3..d587f691e56 100644
--- a/src/lib/netlist/analog/nld_opamps.cpp
+++ b/src/lib/netlist/analog/nld_opamps.cpp
@@ -48,6 +48,22 @@ namespace netlist
* 2; opamp with first pole
* 3: opamp with first pole + output limit
* 4: opamp with input stage, first pole + output limit
+ *
+ * Type 1 parameters:
+ * FPF = frequency of first pole in Hz (ony used for open-loop gain)
+ * UGF = unity gain frequency in Hz (only used for open-loop gain)
+ * RI = input resistance in Ohms
+ * RO = output resistance in Ohms
+ *
+ * Type 3 parameters:
+ * VLH = high supply rail minus high output swing in V
+ * VLL = low output swing minus low supply rail in V
+ * FPF = frequency of first pole in Hz
+ * UGF = unity gain frequency (transition frequency) in Hz
+ * SLEW = unity gain slew rate in V/s
+ * RI = input resistance in Ohms
+ * RO = output resistance in Ohms
+ * DAB = quiescent supply current in A
*/
/* .model abc OPAMP(VLH=2.0 VLL=0.2 FPF=5 UGF=10k SLEW=0.6u RI=1000k RO=50 DAB=0.002)
diff --git a/src/lib/netlist/analog/nld_twoterm.cpp b/src/lib/netlist/analog/nld_twoterm.cpp
index 3ddff27557d..089b11f8607 100644
--- a/src/lib/netlist/analog/nld_twoterm.cpp
+++ b/src/lib/netlist/analog/nld_twoterm.cpp
@@ -117,6 +117,27 @@ NETLIB_UPDATE(C)
}
// ----------------------------------------------------------------------------------------
+// nld_L
+// ----------------------------------------------------------------------------------------
+
+NETLIB_RESET(L)
+{
+ set(netlist().gmin(), 0.0, 5.0 / netlist().gmin());
+ //set(1.0/NETLIST_GMIN, 0.0, -5.0 * NETLIST_GMIN);
+}
+
+NETLIB_UPDATE_PARAM(L)
+{
+ //step_time(1.0/48000.0);
+ //m_GParallel = netlist().gmin() / m_L();
+}
+
+NETLIB_UPDATE(L)
+{
+ NETLIB_NAME(twoterm)::update();
+}
+
+// ----------------------------------------------------------------------------------------
// nld_D
// ----------------------------------------------------------------------------------------
diff --git a/src/lib/netlist/analog/nld_twoterm.h b/src/lib/netlist/analog/nld_twoterm.h
index b5de48ae1d8..f59b9e62594 100644
--- a/src/lib/netlist/analog/nld_twoterm.h
+++ b/src/lib/netlist/analog/nld_twoterm.h
@@ -40,34 +40,38 @@
// -----------------------------------------------------------------------------
#define RES(name, p_R) \
- NET_REGISTER_DEV(RES, name) \
+ NET_REGISTER_DEV(RES, name) \
NETDEV_PARAMI(name, R, p_R)
#define POT(name, p_R) \
- NET_REGISTER_DEV(POT, name) \
+ NET_REGISTER_DEV(POT, name) \
NETDEV_PARAMI(name, R, p_R)
/* Does not have pin 3 connected */
#define POT2(name, p_R) \
- NET_REGISTER_DEV(POT2, name) \
+ NET_REGISTER_DEV(POT2, name) \
NETDEV_PARAMI(name, R, p_R)
#define CAP(name, p_C) \
- NET_REGISTER_DEV(CAP, name) \
+ NET_REGISTER_DEV(CAP, name) \
NETDEV_PARAMI(name, C, p_C)
+#define IND(name, p_L) \
+ NET_REGISTER_DEV(IND, name) \
+ NETDEV_PARAMI(name, L, p_L)
+
/* Generic Diode */
-#define DIODE(name, model) \
- NET_REGISTER_DEV(DIODE, name) \
+#define DIODE(name, model) \
+ NET_REGISTER_DEV(DIODE, name) \
NETDEV_PARAMI(name, MODEL, model)
-#define VS(name, pV) \
- NET_REGISTER_DEV(VS, name) \
+#define VS(name, pV) \
+ NET_REGISTER_DEV(VS, name) \
NETDEV_PARAMI(name, V, pV)
-#define CS(name, pI) \
- NET_REGISTER_DEV(CS, name) \
+#define CS(name, pI) \
+ NET_REGISTER_DEV(CS, name) \
NETDEV_PARAMI(name, I, pI)
// -----------------------------------------------------------------------------
@@ -303,6 +307,43 @@ private:
};
+// -----------------------------------------------------------------------------
+// nld_L
+// -----------------------------------------------------------------------------
+
+NETLIB_OBJECT_DERIVED(L, twoterm)
+{
+public:
+ NETLIB_CONSTRUCTOR_DERIVED(L, twoterm)
+ , m_L(*this, "L", 1e-6)
+ , m_GParallel(0.0)
+ , m_G(0.0)
+ , m_I(0.0)
+ {
+ //register_term("1", m_P);
+ //register_term("2", m_N);
+ }
+
+ NETLIB_TIMESTEP()
+ {
+ /* Gpar should support convergence */
+ m_I = m_I + m_G * deltaV();
+ m_G = step / m_L() + m_GParallel;
+ set(m_G, 0.0, m_I);
+ }
+
+ param_double_t m_L;
+
+protected:
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+ NETLIB_UPDATE_PARAMI();
+
+private:
+ nl_double m_GParallel;
+ nl_double m_G;
+ nl_double m_I;
+};
// -----------------------------------------------------------------------------
// A generic diode model to be used in other devices (Diode, BJT ...)
diff --git a/src/lib/netlist/build/makefile b/src/lib/netlist/build/makefile
index 36bce299de5..171ba4cf5bb 100644
--- a/src/lib/netlist/build/makefile
+++ b/src/lib/netlist/build/makefile
@@ -66,32 +66,52 @@ NLOBJS := \
$(NLOBJ)/analog/nld_switches.o \
$(NLOBJ)/analog/nld_twoterm.o \
$(NLOBJ)/analog/nld_opamps.o \
+ $(NLOBJ)/devices/nld_2102A.o \
+ $(NLOBJ)/devices/nld_2716.o \
$(NLOBJ)/devices/nld_4020.o \
$(NLOBJ)/devices/nld_4066.o \
+ $(NLOBJ)/devices/nld_4316.o \
$(NLOBJ)/devices/nld_7448.o \
$(NLOBJ)/devices/nld_7450.o \
+ $(NLOBJ)/devices/nld_7473.o \
$(NLOBJ)/devices/nld_7474.o \
+ $(NLOBJ)/devices/nld_7475.o \
$(NLOBJ)/devices/nld_7483.o \
+ $(NLOBJ)/devices/nld_7485.o \
$(NLOBJ)/devices/nld_7490.o \
$(NLOBJ)/devices/nld_7493.o \
$(NLOBJ)/devices/nld_74107.o \
$(NLOBJ)/devices/nld_74123.o \
$(NLOBJ)/devices/nld_74153.o \
+ $(NLOBJ)/devices/nld_74161.o \
+ $(NLOBJ)/devices/nld_74165.o \
+ $(NLOBJ)/devices/nld_74166.o \
+ $(NLOBJ)/devices/nld_74174.o \
$(NLOBJ)/devices/nld_74175.o \
$(NLOBJ)/devices/nld_74192.o \
$(NLOBJ)/devices/nld_74193.o \
+ $(NLOBJ)/devices/nld_74194.o \
$(NLOBJ)/devices/nld_74279.o \
+ $(NLOBJ)/devices/nld_74365.o \
$(NLOBJ)/devices/nld_74ls629.o \
$(NLOBJ)/devices/nld_82S16.o \
+ $(NLOBJ)/devices/nld_82S115.o \
+ $(NLOBJ)/devices/nld_82S123.o \
+ $(NLOBJ)/devices/nld_82S126.o \
$(NLOBJ)/devices/nld_9310.o \
$(NLOBJ)/devices/nld_9312.o \
$(NLOBJ)/devices/nld_9316.o \
+ $(NLOBJ)/devices/nld_9322.o \
+ $(NLOBJ)/devices/nld_am2847.o \
+ $(NLOBJ)/devices/nld_dm9334.o \
$(NLOBJ)/devices/nld_mm5837.o \
$(NLOBJ)/devices/nld_ne555.o \
$(NLOBJ)/devices/nld_r2r_dac.o \
+ $(NLOBJ)/devices/nld_tristate.o \
$(NLOBJ)/devices/nld_legacy.o \
$(NLOBJ)/devices/net_lib.o \
$(NLOBJ)/devices/nld_log.o \
+ $(NLOBJ)/devices/nlid_proxy.o \
$(NLOBJ)/devices/nld_system.o \
$(NLOBJ)/devices/nld_truthtable.o \
$(NLOBJ)/macro/nlm_cd4xxx.o \
@@ -124,7 +144,7 @@ clean:
nltool: $(OBJ)/prg/nltool.o $(OBJS)
@echo Linking $@...
- $(LD) -o $@ $(LDFLAGS) $^ $(LIBS)
+ $(LD) -o $@ $(LDFLAGS) $^ $(LIBS)
nlwav: $(OBJ)/prg/nlwav.o $(OBJS)
@echo Linking $@...
@@ -145,14 +165,14 @@ maketree: $(sort $(OBJDIRS))
.PHONY: clang mingw doc
-clang:
+clang:
$(MAKE) CC=clang++ LD=clang++ CEXTRAFLAGS="-Weverything -Werror -Wno-padded -Wno-weak-vtables -Wno-missing-variable-declarations -Wconversion -Wno-c++98-compat -Wno-float-equal -Wno-cast-align -Wno-global-constructors -Wno-c++98-compat-pedantic -Wno-exit-time-destructors -Wno-format-nonliteral -Wno-weak-template-vtables"
-#
-# FIXME: -Wno-weak-vtables -Wno-missing-variable-declarations -Wno-conversion -Wno-exit-time-destructors
-#
+#
+# FIXME: -Wno-weak-vtables -Wno-missing-variable-declarations -Wno-conversion -Wno-exit-time-destructors
+#
-mingw:
+mingw:
$(MAKE) LDEXTRAFLAGS="-Wl,--subsystem,console" LIBS= MD=@mkdir.exe SHELL=sh.exe
#
@@ -191,7 +211,7 @@ $(OBJ)/%.o: $(SRC)/%.cpp
@echo Compiling $<...
@$(CC) $(CDEFS) $(CFLAGS) -c $< -o $@
-$(OBJ)/%.pp: $(SRC)/%.cpp
+$(OBJ)/%.pp: $(SRC)/%.cpp
@echo Compiling $<...
@$(CC) $(CDEFS) $(CFLAGS) -E $< -o $@
diff --git a/src/lib/netlist/devices/net_lib.cpp b/src/lib/netlist/devices/net_lib.cpp
index f70e229ddff..5250135feb8 100644
--- a/src/lib/netlist/devices/net_lib.cpp
+++ b/src/lib/netlist/devices/net_lib.cpp
@@ -34,6 +34,7 @@ NETLIST_START(bjt_models)
NET_MODEL("2SA1015 PNP(Is=295.1E-18 Xti=3 Eg=1.11 Vaf=100 Bf=110 Xtb=1.5 Br=10.45 Rc=15 Cjc=66.2p Mjc=1.054 Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1.661n VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL("2SC1815 NPN(Is=2.04f Xti=3 Eg=1.11 Vaf=6 Bf=400 Ikf=20m Xtb=1.5 Br=3.377 Rc=1 Cjc=1p Mjc=.3333 Vjc=.75 Fc=.5 Cje=25p Mje=.3333 Vje=.75 Tr=450n Tf=20n Itf=0 Vtf=0 Xtf=0 VCEO=45V ICrating=150M MFG=Toshiba)")
+ NET_MODEL("2N3565 NPN(IS=5.911E-15 ISE=5.911E-15 ISC=0 XTI=3 BF=697.1 BR=1.297 IKF=0.01393 IKR=0 XTB=1.5 VAF=62.37 VAR=21.5 VJE=0.65 VJC=0.65 RE=0.15 RC=1.61 RB=10 CJE=4.973E-12 CJC=4.017E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.342 NC=2 MJE=0.4146 MJC=0.3174 TF=820.4E-12 TR=4.687E-9 ITF=0.35 VTF=4 XTF=7 EG=1.11 KF=1E-9 AF=1 VCEO=25 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3643 NPN(IS=14.34E-15 ISE=14.34E-15 ISC=0 XTI=3 BF=255.9 BR=6.092 IKF=0.2847 IKR=0 XTB=1.5 VAF=74.03 VAR=28 VJE=0.65 VJC=0.65 RE=0.1 RC=1 RB=10 CJE=22.01E-12 CJC=7.306E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.307 NC=2 MJE=0.377 MJC=0.3416 TF=411.1E-12 TR=46.91E-9 ITF=0.6 VTF=1.7 XTF=3 EG=1.11 KF=0 AF=1 VCEO=30 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3645 PNP(IS=650.6E-18 ISE=54.81E-15 ISC=0 XTI=3 BF=231.7 BR=3.563 IKF=1.079 IKR=0 XTB=1.5 VAF=115.7 VAR=35 VJE=0.65 VJC=0.65 RE=0.15 RC=0.715 RB=10 CJE=19.82E-12 CJC=14.76E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.829 NC=2 MJE=0.3357 MJC=0.5383 TF=603.7E-12 TR=111.3E-9 ITF=0.65 VTF=5 XTF=1.7 EG=1.11 KF=0 AF=1 VCEO=60 ICRATING=500m MFG=NSC)")
// 3644 = 3645 Difference between 3644 and 3645 is voltage rating. 3644: VCBO=45, 3645: VCBO=60
@@ -49,10 +50,10 @@ NETLIST_START(bjt_models)
NETLIST_END()
NETLIST_START(family_models)
- NET_MODEL("FAMILY _(TYPE=CUSTOM IVL=0.8 IVH=2.0 OVL=0.1 OVH=4.0 ORL=1.0 ORH=130.0)")
+ NET_MODEL("FAMILY _(TYPE=CUSTOM FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=1.0 ORL=1.0 ORH=130.0)")
NET_MODEL("OPAMP _()")
- NET_MODEL("74XXOC FAMILY(IVL=0.8 IVH=2.0 OVL=0.1 OVH=4.95 ORL=10.0 ORH=1.0e8)")
+ NET_MODEL("74XXOC FAMILY(FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)")
NET_MODEL("74XX FAMILY(TYPE=TTL)")
NET_MODEL("CD4XXX FAMILY(TYPE=CD4XXX)")
NETLIST_END()
@@ -77,6 +78,7 @@ static void initialize_factory(factory_list_t &factory)
ENTRY(POT, POT, "R")
ENTRY(POT2, POT2, "R")
ENTRY(C, CAP, "C")
+ ENTRY(L, IND, "L")
ENTRY(D, DIODE, "MODEL")
ENTRY(VCVS, VCVS, "-")
ENTRY(VCCS, VCCS, "-")
@@ -105,26 +107,45 @@ static void initialize_factory(factory_list_t &factory)
ENTRY(switch1, SWITCH, "-")
ENTRY(switch2, SWITCH2, "-")
ENTRYX(nicRSFF, NETDEV_RSFF, "+S,R")
- ENTRYX(nicDelay, NETDEV_DELAY, "-")
+ ENTRYX(nicDelay, NETDEV_DELAY, "-")
+ ENTRYX(2716, EPROM_2716, "+GQ,EPQ,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10")
+ ENTRYX(2102A, RAM_2102A, "+CEQ,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,RWQ,DI")
ENTRYX(7450, TTL_7450_ANDORINVERT, "+A,B,C,D")
ENTRYX(7448, TTL_7448, "+A,B,C,D,LTQ,BIQ,RBIQ")
+ ENTRYX(7473, TTL_7473, "+CLK,J,K,CLRQ")
+ ENTRYX(7473A, TTL_7473A, "+CLK,J,K,CLRQ")
ENTRYX(7474, TTL_7474, "+CLK,D,CLRQ,PREQ")
+ ENTRYX(7475, TTL_7475, "-")
+ ENTRYX(7477, TTL_7477, "-")
ENTRYX(7483, TTL_7483, "+A1,A2,A3,A4,B1,B2,B3,B4,C0")
+ ENTRYX(7485, TTL_7485, "+A0,A1,A2,A3,B0,B1,B2,B3,LTIN,EQIN,GTIN")
ENTRYX(7490, TTL_7490, "+A,B,R1,R2,R91,R92")
ENTRYX(7493, TTL_7493, "+CLKA,CLKB,R1,R2")
ENTRYX(74107, TTL_74107, "+CLK,J,K,CLRQ")
ENTRYX(74107A, TTL_74107A, "+CLK,J,K,CLRQ")
ENTRYX(74123, TTL_74123, "-")
ENTRYX(74153, TTL_74153, "+C0,C1,C2,C3,A,B,G")
- ENTRYX(74175, TTL_74175, "-")
- ENTRYX(74192, TTL_74192, "-")
- ENTRYX(74193, TTL_74193, "-")
+ ENTRYX(74161, TTL_74161, "+A,B,C,D,CLRQ,LOADQ,CLK,ENABLEP,ENABLET")
+ ENTRYX(74165, TTL_74165, "+CLK,CLKINH,SH_LDQ,SER,A,B,C,D,E,F,G,H")
+ ENTRYX(74166, TTL_74166, "+CLK,CLKINH,SH_LDQ,SER,A,B,C,D,E,F,G,H,CLRQ")
+ ENTRYX(74174, TTL_74174, "+CLK,D1,D2,D3,D4,D5,D6,CLRQ")
+ ENTRYX(74175, TTL_74175, "+CLK,D1,D2,D3,D4,CLRQ")
+ ENTRYX(74192, TTL_74192, "+A,B,C,D,CLEAR,LOADQ,CU,CD")
+ ENTRYX(74193, TTL_74193, "+A,B,C,D,CLEAR,LOADQ,CU,CD")
+ ENTRYX(74194, TTL_74194, "+CLK,S0,S1,SRIN,A,B,C,D,SLIN,CLRQ")
+ ENTRYX(74365, TTL_74365, "+G1Q,G2Q,A1,A2,A3,A4,A5,A6")
//ENTRY(74279, TTL_74279, "-") // only dip available
ENTRYX(SN74LS629, SN74LS629, "CAP")
ENTRYX(82S16, TTL_82S16, "-")
+ ENTRYX(82S115, PROM_82S115, "+CE1Q,CE2,A0,A1,A2,A3,A4,A5,A6,A7,A8,STROBE")
+ ENTRYX(82S123, PROM_82S123, "+CEQ,A0,A1,A2,A3,A4")
+ ENTRYX(82S126, PROM_82S126, "+CE1Q,CE2Q,A0,A1,A2,A3,A4,A5,A6,A7")
ENTRYX(9310, TTL_9310, "-")
- ENTRYX(9312, TTL_9312, "-")
+ ENTRYX(9312, TTL_9312, "+A,B,C,D0,D1,D2,D3,D4,D5,D6,D7,G")
ENTRYX(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D")
+ ENTRYX(9322, TTL_9322, "+SELECT,A1,B1,A2,B2,A3,B3,A4,B4,STROBE")
+ ENTRYX(9334, TTL_9334, "+CQ,EQ,D,A0,A1,A2")
+ ENTRYX(AM2847, TTL_AM2847, "+CP,INA,INB,INC,IND,RCA,RCB,RCC,RCD")
ENTRYX(CD4020, CD4020, "")
ENTRYX(CD4066_GATE, CD4066_GATE, "")
/* entries with suffix WI are legacy only */
@@ -132,25 +153,46 @@ static void initialize_factory(factory_list_t &factory)
//ENTRY(4066, CD_4066, "+A,B")
ENTRYX(NE555, NE555, "-")
ENTRYX(r2r_dac, R2R_DAC, "+VIN,R,N")
+ ENTRYX(tristate, TTL_TRISTATE, "+CEQ1,D1,CEQ2,D2")
+ ENTRYX(tristate3, TTL_TRISTATE3, "-")
+ ENTRYX(2102A_dip, RAM_2102A_DIP, "-")
+ ENTRYX(2716_dip, EPROM_2716_DIP, "-")
ENTRYX(4538_dip, CD4538_DIP, "-")
ENTRYX(7448_dip, TTL_7448_DIP, "-")
ENTRYX(7450_dip, TTL_7450_DIP, "-")
+ ENTRYX(7473_dip, TTL_7473_DIP, "-")
+ ENTRYX(7473A_dip, TTL_7473A_DIP, "-")
ENTRYX(7474_dip, TTL_7474_DIP, "-")
+ ENTRYX(7475_dip, TTL_7475_DIP, "-")
+ ENTRYX(7477_dip, TTL_7477_DIP, "-")
ENTRYX(7483_dip, TTL_7483_DIP, "-")
+ ENTRYX(7485_dip, TTL_7485_DIP, "-")
ENTRYX(7490_dip, TTL_7490_DIP, "-")
ENTRYX(7493_dip, TTL_7493_DIP, "-")
ENTRYX(74107_dip, TTL_74107_DIP, "-")
ENTRYX(74123_dip, TTL_74123_DIP, "-")
ENTRYX(74153_dip, TTL_74153_DIP, "-")
+ ENTRYX(74161_dip, TTL_74161_DIP, "-")
+ ENTRYX(74165_dip, TTL_74165_DIP, "-")
+ ENTRYX(74166_dip, TTL_74166_DIP, "-")
+ ENTRYX(74174_dip, TTL_74174_DIP, "-")
ENTRYX(74175_dip, TTL_74175_DIP, "-")
ENTRYX(74192_dip, TTL_74192_DIP, "-")
ENTRYX(74193_dip, TTL_74193_DIP, "-")
+ ENTRYX(74194_dip, TTL_74194_DIP, "-")
ENTRYX(74279_dip, TTL_74279_DIP, "-")
+ ENTRYX(74365_dip, TTL_74365_DIP, "-")
ENTRYX(82S16_dip, TTL_82S16_DIP, "-")
+ ENTRYX(82S115_dip, PROM_82S115_DIP, "-")
+ ENTRYX(82S123_dip, PROM_82S123_DIP, "-")
+ ENTRYX(82S126_dip, PROM_82S126_DIP, "-")
ENTRYX(9602_dip, TTL_9602_DIP, "-")
ENTRYX(9310_dip, TTL_9310_DIP, "-")
ENTRYX(9312_dip, TTL_9312_DIP, "-")
ENTRYX(9316_dip, TTL_9316_DIP, "-")
+ ENTRYX(9322_dip, TTL_9322_DIP, "-")
+ ENTRYX(9334_dip, TTL_9334_DIP, "-")
+ ENTRYX(AM2847_dip, TTL_AM2847_DIP, "-")
ENTRYX(SN74LS629_dip, SN74LS629_DIP, "1.CAP1,2.CAP2")
ENTRYX(NE555_dip, NE555_DIP, "-")
ENTRYX(MM5837_dip, MM5837_DIP, "-")
diff --git a/src/lib/netlist/devices/net_lib.h b/src/lib/netlist/devices/net_lib.h
index b87526bf391..c9c0b6b3917 100644
--- a/src/lib/netlist/devices/net_lib.h
+++ b/src/lib/netlist/devices/net_lib.h
@@ -14,32 +14,52 @@
#include "nl_base.h"
#include "nld_system.h"
+#include "nld_2102A.h"
+#include "nld_2716.h"
#include "nld_4020.h"
#include "nld_4066.h"
#include "nld_7448.h"
#include "nld_7450.h"
+#include "nld_7473.h"
#include "nld_7474.h"
+#include "nld_7475.h"
#include "nld_7483.h"
+#include "nld_7485.h"
#include "nld_7490.h"
#include "nld_7493.h"
#include "nld_74107.h"
#include "nld_74123.h"
#include "nld_74153.h"
+#include "nld_74161.h"
+#include "nld_74165.h"
+#include "nld_74166.h"
+#include "nld_74174.h"
#include "nld_74175.h"
#include "nld_74192.h"
#include "nld_74193.h"
+#include "nld_74194.h"
#include "nld_74279.h"
+#include "nld_74365.h"
#include "nld_74ls629.h"
#include "nld_82S16.h"
+#include "nld_82S115.h"
+#include "nld_82S123.h"
+#include "nld_82S126.h"
#include "nld_9310.h"
#include "nld_9312.h"
#include "nld_9316.h"
+#include "nld_9322.h"
+
+#include "nld_am2847.h"
+#include "nld_dm9334.h"
#include "nld_ne555.h"
#include "nld_mm5837.h"
#include "nld_r2r_dac.h"
+#include "nld_tristate.h"
+
#include "nld_log.h"
#include "macro/nlm_cd4xxx.h"
diff --git a/src/lib/netlist/devices/nld_2102A.cpp b/src/lib/netlist/devices/nld_2102A.cpp
new file mode 100644
index 00000000000..da8ffc3cc1d
--- /dev/null
+++ b/src/lib/netlist/devices/nld_2102A.cpp
@@ -0,0 +1,103 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_2102A.cpp
+ *
+ */
+
+#include "nld_2102A.h"
+
+#define ADDR2BYTE(a) ((a) >> 3)
+#define ADDR2BIT(a) ((a) & 0x7)
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(2102A)
+ {
+ NETLIB_CONSTRUCTOR(2102A)
+ , m_A(*this, {{"A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "A8", "A9" }})
+ , m_CEQ(*this, "CEQ")
+ , m_RWQ(*this, "RWQ")
+ , m_DI(*this, "DI")
+ , m_DO(*this, "DO")
+ , m_ram(*this, "m_ram", 0)
+ , m_RAM(*this, "m_RAM", &m_ram[0])
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 10> m_A;
+ logic_input_t m_CEQ;
+ logic_input_t m_RWQ;
+ logic_input_t m_DI;
+
+ logic_output_t m_DO;
+
+ state_var<uint_fast8_t[128]> m_ram; // 1024x1 bits
+ param_ptr_t m_RAM;
+ };
+
+ NETLIB_OBJECT_DERIVED(2102A_dip, 2102A)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(2102A_dip, 2102A)
+ {
+ register_subalias("8", m_A[0]);
+ register_subalias("4", m_A[1]);
+ register_subalias("5", m_A[2]);
+ register_subalias("6", m_A[3]);
+ register_subalias("7", m_A[4]);
+ register_subalias("2", m_A[5]);
+ register_subalias("1", m_A[6]);
+ register_subalias("16", m_A[7]);
+ register_subalias("15", m_A[8]);
+ register_subalias("14", m_A[9]);
+
+ register_subalias("13", m_CEQ);
+ register_subalias("3", m_RWQ);
+
+ register_subalias("11", m_DI);
+ register_subalias("12", m_DO);
+ }
+ };
+
+ NETLIB_UPDATE(2102A)
+ {
+ netlist_time max_delay = NLTIME_FROM_NS(350);
+
+ if (!m_CEQ())
+ {
+ unsigned a = 0;
+ for (std::size_t i=0; i<10; i++)
+ {
+ a |= m_A[i]() << i;
+ }
+ const unsigned byte = ADDR2BYTE(a);
+ const unsigned bit = ADDR2BIT(a);
+
+ if (!m_RWQ())
+ {
+ m_ram[byte] &= ~(static_cast<uint_fast8_t>(1) << bit);
+ m_ram[byte] |= (static_cast<uint_fast8_t>(m_DI()) << bit);
+ }
+
+ m_DO.push((m_ram[byte] >> bit) & 1, max_delay);
+ }
+ }
+
+ NETLIB_RESET(2102A)
+ {
+ m_RAM.setTo(&m_ram[0]);
+ for (std::size_t i=0; i<128; i++)
+ m_ram[i] = 0;
+ }
+
+ NETLIB_DEVICE_IMPL(2102A)
+ NETLIB_DEVICE_IMPL(2102A_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_2102A.h b/src/lib/netlist/devices/nld_2102A.h
new file mode 100644
index 00000000000..bec20f9bd8c
--- /dev/null
+++ b/src/lib/netlist/devices/nld_2102A.h
@@ -0,0 +1,48 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_2102A.h
+ *
+ * 2102: 1024 x 1-bit Static RAM
+ *
+ * +--------------+
+ * A6 |1 ++ 16| A7
+ * A5 |2 15| A8
+ * RWQ |3 14| A9
+ * A1 |4 82S16 13| CEQ
+ * A2 |5 12| DO
+ * A3 |6 11| DI
+ * A4 |7 10| VCC
+ * A0 |8 9| GND
+ * +--------------+
+ *
+ *
+ * Naming conventions follow Intel datasheet
+ *
+ */
+
+#ifndef NLD_2102A_H_
+#define NLD_2102A_H_
+
+#include "nl_setup.h"
+
+#define RAM_2102A(name, cCEQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cRWQ, cDI) \
+ NET_REGISTER_DEV(RAM_2102A, name) \
+ NET_CONNECT(name, CEQ, cCEQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
+ NET_CONNECT(name, A9, cA9) \
+ NET_CONNECT(name, RWQ, cRWQ) \
+ NET_CONNECT(name, DI, cDI)
+
+#define RAM_2102A_DIP(name) \
+ NET_REGISTER_DEV(RAM_2102A_DIP, name)
+
+#endif /* NLD_2102A_H_ */
diff --git a/src/lib/netlist/devices/nld_2716.cpp b/src/lib/netlist/devices/nld_2716.cpp
new file mode 100644
index 00000000000..7ba974b92da
--- /dev/null
+++ b/src/lib/netlist/devices/nld_2716.cpp
@@ -0,0 +1,98 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_2716.cpp
+ *
+ */
+
+#include "nld_2716.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(2716)
+ {
+ NETLIB_CONSTRUCTOR(2716)
+ , m_A(*this, {{ "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "A8", "A9", "A10" }})
+ , m_GQ(*this, "GQ")
+ , m_EPQ(*this, "EPQ")
+ , m_D(*this, {{ "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7" }})
+ , m_last_EPQ(*this, "m_last_EPQ", 1)
+ , m_ROM(*this, "ROM")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 11> m_A;
+ logic_input_t m_GQ;
+ logic_input_t m_EPQ;
+ object_array_t<logic_output_t, 8> m_D;
+
+ state_var<unsigned> m_last_EPQ;
+
+ param_rom_t<uint8_t, 11, 8> m_ROM; // 16 Kbits, used as 2 Kbit x 8
+ };
+
+ NETLIB_OBJECT_DERIVED(2716_dip, 2716)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(2716_dip, 2716)
+ {
+ register_subalias("8", m_A[0]);
+ register_subalias("7", m_A[1]);
+ register_subalias("6", m_A[2]);
+ register_subalias("5", m_A[3]);
+ register_subalias("4", m_A[4]);
+ register_subalias("3", m_A[5]);
+ register_subalias("2", m_A[6]);
+ register_subalias("1", m_A[7]);
+ register_subalias("23", m_A[8]);
+ register_subalias("22", m_A[9]);
+ register_subalias("19", m_A[10]);
+
+ register_subalias("20", m_GQ);
+ register_subalias("18", m_EPQ);
+
+ register_subalias("9", m_D[0]);
+ register_subalias("10", m_D[1]);
+ register_subalias("11", m_D[2]);
+ register_subalias("13", m_D[3]);
+ register_subalias("14", m_D[4]);
+ register_subalias("15", m_D[5]);
+ register_subalias("16", m_D[6]);
+ register_subalias("17", m_D[7]);
+ }
+ };
+
+ // FIXME: timing!
+ NETLIB_UPDATE(2716)
+ {
+ unsigned d = 0xff;
+
+ netlist_time delay = NLTIME_FROM_NS(450);
+ if (!m_GQ() && !m_EPQ())
+ {
+ unsigned a = 0;
+ for (std::size_t i=0; i<11; i++)
+ a |= (m_A[i]() << i);
+
+ d = m_ROM[a];
+
+ if (m_last_EPQ)
+ delay = NLTIME_FROM_NS(120);
+ }
+
+ m_last_EPQ = m_EPQ();
+
+ // FIXME: Outputs are tristate. This needs to be properly implemented
+ for (std::size_t i=0; i<8; i++)
+ m_D[i].push((d >> i) & 1, delay);
+ }
+
+ NETLIB_DEVICE_IMPL(2716)
+ NETLIB_DEVICE_IMPL(2716_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_2716.h b/src/lib/netlist/devices/nld_2716.h
new file mode 100644
index 00000000000..c96c726c11d
--- /dev/null
+++ b/src/lib/netlist/devices/nld_2716.h
@@ -0,0 +1,52 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S126.h
+ *
+ * 2716: 16 Kbit (2Kb x 8) UV EPROM
+ *
+ * +----------------+
+ * A7 |1 ++ 24| VCC
+ * A6 |2 23| A8
+ * A5 |3 22| A9
+ * A4 |4 2716 21| VPP
+ * A3 |5 20| GQ
+ * A2 |6 19| A10
+ * A1 |7 18| EPQ
+ * A0 |8 17| D7
+ * D0 |9 16| D6
+ * D1 |10 15| D5
+ * D2 |11 14| D4
+ * VSS |12 13| D3
+ * +----------------+
+ *
+ *
+ * Naming conventions follow STMicro datasheet
+ *
+ */
+
+#ifndef NLD_2716_H_
+#define NLD_2716_H_
+
+#include "nl_setup.h"
+
+#define EPROM_2716(name, cGQ, cEPQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cA10) \
+ NET_REGISTER_DEV(EPROM_2716, name) \
+ NET_CONNECT(name, GQ, cGQ) \
+ NET_CONNECT(name, EPQ, cEPQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
+ NET_CONNECT(name, A9, cA9) \
+ NET_CONNECT(name, A10, cA10)
+
+#define EPROM_2716_DIP(name) \
+ NET_REGISTER_DEV(EPROM_2716_DIP, name)
+
+#endif /* NLD_2716_H_ */
diff --git a/src/lib/netlist/devices/nld_4066.h b/src/lib/netlist/devices/nld_4066.h
index 570f9ecf16d..fdaa76d65f3 100644
--- a/src/lib/netlist/devices/nld_4066.h
+++ b/src/lib/netlist/devices/nld_4066.h
@@ -15,7 +15,7 @@
* VSS |7 8| INOUTC
* +--------------+
*
- * FIXME: These devices are slow (~125 ns). THis is currently not reflected
+ * FIXME: These devices are slow (~125 ns). This is currently not reflected
*
* Naming conventions follow National semiconductor datasheet
*
diff --git a/src/lib/netlist/devices/nld_4316.cpp b/src/lib/netlist/devices/nld_4316.cpp
new file mode 100644
index 00000000000..257ee0aac83
--- /dev/null
+++ b/src/lib/netlist/devices/nld_4316.cpp
@@ -0,0 +1,49 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ * nld_4316.c
+ *
+ */
+
+#include <devices/nlid_cmos.h>
+#include "analog/nld_twoterm.h"
+#include "nld_4316.h"
+
+namespace netlist { namespace devices {
+
+ NETLIB_OBJECT(CD4316_GATE)
+ {
+ NETLIB_CONSTRUCTOR(CD4316_GATE)
+ NETLIB_FAMILY("CD4XXX")
+ , m_supply(*this, "PS")
+ , m_R(*this, "R")
+ , m_S(*this, "S")
+ , m_E(*this, "E")
+ , m_base_r(*this, "BASER", 45.0)
+ {
+ }
+
+ NETLIB_RESETI() { }
+ NETLIB_UPDATEI();
+
+ public:
+ NETLIB_SUB(vdd_vss) m_supply;
+ NETLIB_SUB(R) m_R;
+
+ logic_input_t m_S, m_E;
+ param_double_t m_base_r;
+ };
+
+ NETLIB_UPDATE(CD4316_GATE)
+ {
+ m_R.update_dev();
+ if (m_S() && !m_E())
+ m_R.set_R(m_base_r());
+ else
+ m_R.set_R(NL_FCONST(1.0) / netlist().gmin());
+ m_R.m_P.schedule_after(NLTIME_FROM_NS(1));
+ }
+
+ NETLIB_DEVICE_IMPL(CD4316_GATE)
+
+} } // namesapce netlist::devices
diff --git a/src/lib/netlist/devices/nld_4316.h b/src/lib/netlist/devices/nld_4316.h
new file mode 100644
index 00000000000..8d8ec4f0ae0
--- /dev/null
+++ b/src/lib/netlist/devices/nld_4316.h
@@ -0,0 +1,33 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ * nld_4136.h
+ *
+ * CD4066: Quad Analog Switch with Level Translation
+ *
+ * +--------------+
+ * 1Z |1 ++ 16| VCC
+ * 1Y |2 15| 1S
+ * 2Y |3 14| 4S
+ * 2Z |4 4066 13| 4Z
+ * 2S |5 12| 4Y
+ * 3S |6 11| 3Y
+ * /E |7 10| 3Z
+ * GND |8 9| VEE
+ * +--------------+
+ *
+ * FIXME: These devices are slow (can be over 200 ns in HC types). This is currently not reflected
+ *
+ * Naming conventions follow Texas Instruments datasheet
+ *
+ */
+
+#ifndef NLD_4316_H_
+#define NLD_4316_H_
+
+#include "nl_setup.h"
+
+#define CD4316_GATE(name) \
+ NET_REGISTER_DEV(CD4316_GATE, name)
+
+#endif /* NLD_4316_H_ */
diff --git a/src/lib/netlist/devices/nld_74107.cpp b/src/lib/netlist/devices/nld_74107.cpp
index a0ffcfc3fdd..a9006d55a75 100644
--- a/src/lib/netlist/devices/nld_74107.cpp
+++ b/src/lib/netlist/devices/nld_74107.cpp
@@ -11,6 +11,10 @@ namespace netlist
{
namespace devices
{
+
+ static const netlist_time delay_107[2] = { NLTIME_FROM_NS(16), NLTIME_FROM_NS(25) };
+ static const netlist_time delay_107A[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(15) };
+
NETLIB_OBJECT(74107Asub)
{
NETLIB_CONSTRUCTOR(74107Asub)
@@ -20,6 +24,7 @@ namespace netlist
, m_Q1(*this, "m_Q1", 0)
, m_Q2(*this, "m_Q2", 0)
, m_F(*this, "m_F", 0)
+ , m_delay(delay_107A)
{
}
@@ -38,6 +43,8 @@ namespace netlist
void newstate(const netlist_sig_t state);
+ const netlist_time *m_delay;
+
};
NETLIB_OBJECT(74107A)
@@ -67,8 +74,10 @@ namespace netlist
NETLIB_OBJECT_DERIVED(74107, 74107A)
{
public:
- NETLIB_CONSTRUCTOR_DERIVED(74107, 74107A) { }
-
+ NETLIB_CONSTRUCTOR_DERIVED(74107, 74107A)
+ {
+ m_sub.m_delay = delay_107;
+ }
};
NETLIB_OBJECT(74107_dip)
@@ -119,10 +128,8 @@ namespace netlist
inline void NETLIB_NAME(74107Asub)::newstate(const netlist_sig_t state)
{
- const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(40) };
-
- m_Q.push(state, delay[state]);
- m_QQ.push(state ^ 1, delay[state ^ 1]);
+ m_Q.push(state, m_delay[state]);
+ m_QQ.push(state ^ 1, m_delay[state ^ 1]);
}
NETLIB_UPDATE(74107Asub)
diff --git a/src/lib/netlist/devices/nld_74107.h b/src/lib/netlist/devices/nld_74107.h
index ea73256e818..ed940f8170f 100644
--- a/src/lib/netlist/devices/nld_74107.h
+++ b/src/lib/netlist/devices/nld_74107.h
@@ -32,7 +32,9 @@
*
* This is positive triggered, J and K
* are latched during clock high and
- * transferred when CLK falls.
+ * transferred when CLK falls. The
+ * datasheet requires J and K to be
+ * stable during clock high.
*
* Function table 107A
*
@@ -51,8 +53,11 @@
*
* Naming conventions follow Texas instruments datasheet
*
- * FIXME: Currently, only the 107A is implemented.
- * The 107 uses the same model.
+ * TODO: Currently, only the 107A is implemented.
+ * The 107 uses the same model, but different timings.
+ * The requirement that J and K must be stable during
+ * clock high indicates that the chip may exhibit undefined
+ * behaviour.
*
*/
@@ -71,7 +76,7 @@
#define TTL_74107(name, cCLK, cJ, cK, cCLRQ) \
TTL_74107A(name, cCLK, cJ, cK, cCLRQ)
-#define TTL_74107_DIP(name) \
+#define TTL_74107_DIP(name) \
NET_REGISTER_DEV(TTL_74107_DIP, name)
#endif /* NLD_74107_H_ */
diff --git a/src/lib/netlist/devices/nld_74123.cpp b/src/lib/netlist/devices/nld_74123.cpp
index 0e36e2ed487..0bc1a60acb0 100644
--- a/src/lib/netlist/devices/nld_74123.cpp
+++ b/src/lib/netlist/devices/nld_74123.cpp
@@ -42,12 +42,14 @@ namespace netlist
register_subalias("C", m_RN.m_R.m_N);
register_subalias("RC", m_RN.m_R.m_P);
-
connect_late(m_RP_Q, m_RP.m_I);
connect_late(m_RN_Q, m_RN.m_I);
connect_late(m_RN.m_R.m_P, m_RP.m_R.m_N);
connect_late(m_CV, m_RN.m_R.m_P);
+
+ m_RP.m_RON.setTo(m_RI());
+ m_RN.m_RON.setTo(m_RI());
}
NETLIB_RESETI();
diff --git a/src/lib/netlist/devices/nld_74161.cpp b/src/lib/netlist/devices/nld_74161.cpp
new file mode 100644
index 00000000000..d6e31f36417
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74161.cpp
@@ -0,0 +1,133 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74161.cpp
+ *
+ */
+
+#define MAXCNT 15
+
+#include "nld_74161.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74161)
+ {
+ NETLIB_CONSTRUCTOR(74161)
+ , m_A(*this, "A")
+ , m_B(*this, "B")
+ , m_C(*this, "C")
+ , m_D(*this, "D")
+ , m_CLRQ(*this, "CLRQ")
+ , m_LOADQ(*this, "LOADQ")
+ , m_CLK(*this, "CLK")
+ , m_ENABLEP(*this, "ENABLEP")
+ , m_ENABLET(*this, "ENABLET")
+ , m_cnt(*this, "m_cnt", 0)
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ , m_Q(*this, {{"QA", "QB", "QC", "QD"}})
+ , m_RCO(*this, "RCO")
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ logic_input_t m_A;
+ logic_input_t m_B;
+ logic_input_t m_C;
+ logic_input_t m_D;
+ logic_input_t m_CLRQ;
+ logic_input_t m_LOADQ;
+ logic_input_t m_CLK;
+ logic_input_t m_ENABLEP;
+ logic_input_t m_ENABLET;
+
+ state_var<unsigned> m_cnt;
+ state_var<unsigned> m_last_CLK;
+
+ object_array_t<logic_output_t, 4> m_Q;
+ logic_output_t m_RCO;
+ };
+
+ NETLIB_OBJECT_DERIVED(74161_dip, 74161)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74161_dip, 74161)
+ {
+ register_subalias("1", m_CLRQ);
+ register_subalias("2", m_CLK);
+ register_subalias("3", m_A);
+ register_subalias("4", m_B);
+ register_subalias("5", m_C);
+ register_subalias("6", m_D);
+ register_subalias("7", m_ENABLEP);
+
+ register_subalias("9", m_LOADQ);
+ register_subalias("10", m_ENABLET);
+ register_subalias("11", m_Q[3]);
+ register_subalias("12", m_Q[2]);
+ register_subalias("13", m_Q[1]);
+ register_subalias("14", m_Q[0]);
+ register_subalias("15", m_RCO);
+
+ }
+ };
+
+ NETLIB_RESET(74161)
+ {
+ m_cnt = 0;
+ m_last_CLK = 0;
+ }
+
+ // FIXME: Timing
+ static const netlist_time delay[4] =
+ {
+ NLTIME_FROM_NS(40),
+ NLTIME_FROM_NS(40),
+ NLTIME_FROM_NS(40),
+ NLTIME_FROM_NS(40)
+ };
+
+ NETLIB_UPDATE(74161)
+ {
+ netlist_sig_t tRippleCarryOut = 0;
+ if (!m_CLRQ())
+ {
+ m_cnt = 0;
+ }
+ else if (m_CLK() && !m_last_CLK)
+ {
+ if (!m_LOADQ())
+ {
+ m_cnt = (m_D() << 3) | (m_C() << 2)
+ | (m_B() << 1) | (m_A() << 0);
+ }
+ else if (m_ENABLET() && m_ENABLEP())
+ {
+ m_cnt++;
+ if (m_cnt > MAXCNT)
+ m_cnt = 0;
+ }
+ }
+
+ if (m_ENABLET() && (m_cnt == MAXCNT))
+ {
+ tRippleCarryOut = 1;
+ }
+
+ m_last_CLK = m_CLK();
+
+ for (std::size_t i=0; i<4; i++)
+ m_Q[i].push((m_cnt >> i) & 1, delay[i]);
+
+ m_RCO.push(tRippleCarryOut, NLTIME_FROM_NS(20)); //FIXME
+ }
+
+ NETLIB_DEVICE_IMPL(74161)
+ NETLIB_DEVICE_IMPL(74161_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74161.h b/src/lib/netlist/devices/nld_74161.h
new file mode 100644
index 00000000000..1a6b6b2ca87
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74161.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74161.h
+ *
+ * DM74161: Synchronous 4-Bit Binary Counter with Clock
+ *
+ * +--------------+
+ * CLEAR |1 ++ 16| VCC
+ * CLK |2 15| RCO
+ * A |3 14| QA
+ * B |4 74161 13| QB
+ * C |5 12| QC
+ * D |6 11| QD
+ * ENABLEP |7 10| ENABLET
+ * GND |8 9| LOAD
+ * +--------------+
+ *
+ * RCO: Ripple carry output
+ *
+ * Naming convention attempts to follow National Semiconductor datasheet
+ *
+ */
+
+#ifndef NLD_74161_H_
+#define NLD_74161_H_
+
+#include "nl_setup.h"
+
+#define TTL_74161(name, cA, cB, cC, cD, cCLRQ, cLOADQ, cCLK, cENABLEP, cENABLET) \
+ NET_REGISTER_DEV(TTL_74161, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, CLRQ, cCLRQ) \
+ NET_CONNECT(name, LOADQ, cLOADQ) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, ENABLEP, cENABLEP) \
+ NET_CONNECT(name, ENABLET, cENABLET)
+
+#define TTL_74161_DIP(name) \
+ NET_REGISTER_DEV(TTL_74161_DIP, name)
+
+#endif /* NLD_74161_H_ */
diff --git a/src/lib/netlist/devices/nld_74165.cpp b/src/lib/netlist/devices/nld_74165.cpp
new file mode 100644
index 00000000000..bb263409bf9
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74165.cpp
@@ -0,0 +1,107 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74165.cpp
+ *
+ */
+
+#include "nld_74165.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74165)
+ {
+ NETLIB_CONSTRUCTOR(74165)
+ , m_DATA(*this, {{ "H", "G", "F", "E", "D", "C", "B", "A" }})
+ , m_SER(*this, "SER")
+ , m_SH_LDQ(*this, "SH_LDQ")
+ , m_CLK(*this, "CLK")
+ , m_CLKINH(*this, "CLKINH")
+ , m_QH(*this, "QH")
+ , m_QHQ(*this, "QHQ")
+ , m_shifter(*this, "m_shifter", 0)
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 8> m_DATA;
+ logic_input_t m_SER;
+ logic_input_t m_SH_LDQ;
+ logic_input_t m_CLK;
+ logic_input_t m_CLKINH;
+ logic_output_t m_QH;
+ logic_output_t m_QHQ;
+
+ state_var<unsigned> m_shifter;
+ state_var<unsigned> m_last_CLK;
+ };
+
+ NETLIB_OBJECT_DERIVED(74165_dip, 74165)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74165_dip, 74165)
+ {
+ register_subalias("1", m_SH_LDQ);
+ register_subalias("2", m_CLK);
+ register_subalias("3", m_DATA[4]);
+ register_subalias("4", m_DATA[5]);
+ register_subalias("5", m_DATA[6]);
+ register_subalias("6", m_DATA[7]);
+ register_subalias("7", m_QHQ);
+
+ register_subalias("9", m_QH);
+ register_subalias("10", m_SER);
+ register_subalias("11", m_DATA[0]);
+ register_subalias("12", m_DATA[1]);
+ register_subalias("13", m_DATA[2]);
+ register_subalias("14", m_DATA[3]);
+ register_subalias("15", m_CLKINH);
+
+ }
+ };
+
+ NETLIB_RESET(74165)
+ {
+ m_shifter = 0;
+ m_last_CLK = 0;
+ }
+
+ // FIXME: Timing
+ NETLIB_UPDATE(74165)
+ {
+ netlist_sig_t old_qh = m_QH.net().Q();
+ netlist_sig_t qh = 0;
+
+ if (!m_SH_LDQ())
+ {
+ m_shifter = 0;
+ for (std::size_t i=0; i<8; i++)
+ m_shifter |= (m_DATA[i]() << i);
+ }
+ else if (!m_CLK() || m_CLKINH())
+ {
+ qh = old_qh;
+ }
+ else if (!m_last_CLK)
+ {
+ unsigned high_bit = m_SER() ? 0x80 : 0;
+ m_shifter = high_bit | (m_shifter >> 1);
+ }
+
+ qh = m_shifter & 1;
+
+ m_last_CLK = m_CLK();
+
+ m_QH.push(qh, NLTIME_FROM_NS(20)); // FIXME: Timing
+ }
+
+ NETLIB_DEVICE_IMPL(74165)
+ NETLIB_DEVICE_IMPL(74165_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74165.h b/src/lib/netlist/devices/nld_74165.h
new file mode 100644
index 00000000000..30970f5a20e
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74165.h
@@ -0,0 +1,50 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74165.h
+ *
+ * 74165: Parallel-Load 8-Bit Shift Register
+ *
+ * +--------------+
+ * SH/LDQ |1 ++ 16| VCC
+ * CLK |2 15| CLKINH
+ * E |3 14| D
+ * F |4 74165 13| C
+ * G |5 12| B
+ * H |6 11| A
+ * QHQ |7 10| SER
+ * GND |8 9| QH
+ * +--------------+
+ *
+ * SH/LDQ: Shift / !Load
+ * CLKINH: Clock Inhibit
+ * SER: Serial In
+ *
+ * Naming convention attempts to follow NTE Electronics datasheet
+ *
+ */
+
+#ifndef NLD_74165_H_
+#define NLD_74165_H_
+
+#include "nl_setup.h"
+
+#define TTL_74165(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH) \
+ NET_REGISTER_DEV(TTL_74165, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, CLKINH, cCLKINH) \
+ NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
+ NET_CONNECT(name, SER, cSER) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, E, cE) \
+ NET_CONNECT(name, F, cF) \
+ NET_CONNECT(name, G, cG) \
+ NET_CONNECT(name, H, cH)
+
+#define TTL_74165_DIP(name) \
+ NET_REGISTER_DEV(TTL_74165_DIP, name)
+
+#endif /* NLD_74165_H_ */
diff --git a/src/lib/netlist/devices/nld_74166.cpp b/src/lib/netlist/devices/nld_74166.cpp
new file mode 100644
index 00000000000..5cb7114ee0f
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74166.cpp
@@ -0,0 +1,127 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74166.cpp
+ *
+ */
+
+#include "nld_74166.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74166)
+ {
+ NETLIB_CONSTRUCTOR(74166)
+ , m_DATA(*this, {{ "H", "G", "F", "E", "D", "C", "B", "A" }})
+ , m_SER(*this, "SER")
+ , m_CLRQ(*this, "CLRQ")
+ , m_SH_LDQ(*this, "SH_LDQ")
+ , m_CLK(*this, "CLK")
+ , m_CLKINH(*this, "CLKINH")
+ , m_QH(*this, "QH")
+ , m_shifter(*this, "m_shifter", 0)
+ , m_last_CLRQ(*this, "m_last_CLRQ", 0)
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 8> m_DATA;
+ logic_input_t m_SER;
+ logic_input_t m_CLRQ;
+ logic_input_t m_SH_LDQ;
+ logic_input_t m_CLK;
+ logic_input_t m_CLKINH;
+ logic_output_t m_QH;
+
+ state_var<unsigned> m_shifter;
+ state_var<unsigned> m_last_CLRQ;
+ state_var<unsigned> m_last_CLK;
+ };
+
+ NETLIB_OBJECT_DERIVED(74166_dip, 74166)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74166_dip, 74166)
+ {
+ register_subalias("1", m_SER);
+ register_subalias("2", m_DATA[7]);
+ register_subalias("3", m_DATA[6]);
+ register_subalias("4", m_DATA[5]);
+ register_subalias("5", m_DATA[4]);
+ register_subalias("6", m_CLKINH);
+ register_subalias("7", m_CLK);
+
+ register_subalias("9", m_CLRQ);
+ register_subalias("10", m_DATA[3]);
+ register_subalias("11", m_DATA[2]);
+ register_subalias("12", m_DATA[1]);
+ register_subalias("13", m_QH);
+ register_subalias("14", m_DATA[0]);
+ register_subalias("15", m_SH_LDQ);
+
+ }
+ };
+
+ NETLIB_RESET(74166)
+ {
+ m_shifter = 0;
+ m_last_CLRQ = 0;
+ m_last_CLK = 0;
+ }
+
+ NETLIB_UPDATE(74166)
+ {
+ netlist_sig_t old_qh = m_QH.net().Q();
+ netlist_sig_t qh = 0;
+
+ netlist_time delay = NLTIME_FROM_NS(26);
+ if (m_CLRQ())
+ {
+ bool clear_unset = !m_last_CLRQ();
+ if (clear_unset)
+ {
+ delay = NLTIME_FROM_NS(35);
+ }
+
+ if (!m_CLK() || m_CLKINH())
+ {
+ qh = old_qh;
+ }
+ else if (!m_last_CLK)
+ {
+ if (!m_SH_LDQ())
+ {
+ m_shifter = 0;
+ for (std::size_t i=0; i<8; i++)
+ m_shifter |= (m_DATA[i]() << i);
+ }
+ else
+ {
+ unsigned high_bit = m_SER() ? 0x80 : 0;
+ m_shifter = high_bit | (m_shifter >> 1);
+ }
+
+ qh = m_shifter & 1;
+ if (!qh && !clear_unset)
+ {
+ delay = NLTIME_FROM_NS(30);
+ }
+ }
+ }
+
+ m_last_CLRQ = m_CLRQ();
+ m_last_CLK = m_CLK();
+
+ m_QH.push(qh, delay); //FIXME
+ }
+
+ NETLIB_DEVICE_IMPL(74166)
+ NETLIB_DEVICE_IMPL(74166_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74166.h b/src/lib/netlist/devices/nld_74166.h
new file mode 100644
index 00000000000..bf5bbc8d0d8
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74166.h
@@ -0,0 +1,51 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74166.h
+ *
+ * 74166: Parallel-Load 8-Bit Shift Register
+ *
+ * +--------------+
+ * SER |1 ++ 16| VCC
+ * A |2 15| SH/LDQ
+ * B |3 14| H
+ * C |4 74166 13| QH
+ * D |5 12| G
+ * CLKINH |6 11| F
+ * CLK |7 10| E
+ * GND |8 9| CLRQ
+ * +--------------+
+ *
+ * SH/LDQ: Shift / !Load
+ * CLKINH: Clock Inhibit
+ * SER: Serial In
+ *
+ * Naming convention attempts to follow Texas Instruments datasheet
+ *
+ */
+
+#ifndef NLD_74166_H_
+#define NLD_74166_H_
+
+#include "nl_setup.h"
+
+#define TTL_74166(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74166, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, CLKINH, cCLKINH) \
+ NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
+ NET_CONNECT(name, SER, cSER) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, E, cE) \
+ NET_CONNECT(name, F, cF) \
+ NET_CONNECT(name, G, cG) \
+ NET_CONNECT(name, H, cH) \
+ NET_CONNECT(name, CLRQ, cCLRQ)
+
+#define TTL_74166_DIP(name) \
+ NET_REGISTER_DEV(TTL_74166_DIP, name)
+
+#endif /* NLD_74166_H_ */
diff --git a/src/lib/netlist/devices/nld_74174.cpp b/src/lib/netlist/devices/nld_74174.cpp
new file mode 100644
index 00000000000..64698423435
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74174.cpp
@@ -0,0 +1,140 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nld_74174.cpp
+ *
+ */
+
+#include "nld_74174.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74174_sub)
+ {
+ NETLIB_CONSTRUCTOR(74174_sub)
+ , m_CLK(*this, "CLK")
+ , m_Q(*this, {{"Q1", "Q2", "Q3", "Q4", "Q5", "Q6"}})
+ , m_clrq(*this, "m_clr", 0)
+ , m_data(*this, "m_data", 0)
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ public:
+ logic_input_t m_CLK;
+ object_array_t<logic_output_t, 6> m_Q;
+
+ state_var<netlist_sig_t> m_clrq;
+ state_var<unsigned> m_data;
+ };
+
+ NETLIB_OBJECT(74174)
+ {
+ NETLIB_CONSTRUCTOR(74174)
+ , m_sub(*this, "sub")
+ , m_D(*this, {{"D1", "D2", "D3", "D4", "D5", "D6"}})
+ , m_CLRQ(*this, "CLRQ")
+ {
+ register_subalias("CLK", m_sub.m_CLK);
+
+ register_subalias("Q1", m_sub.m_Q[0]);
+ register_subalias("Q2", m_sub.m_Q[1]);
+ register_subalias("Q3", m_sub.m_Q[2]);
+ register_subalias("Q4", m_sub.m_Q[3]);
+ register_subalias("Q5", m_sub.m_Q[4]);
+ register_subalias("Q6", m_sub.m_Q[5]);
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ NETLIB_SUB(74174_sub) m_sub;
+ object_array_t<logic_input_t, 6> m_D;
+ logic_input_t m_CLRQ;
+ };
+
+ NETLIB_OBJECT_DERIVED(74174_dip, 74174)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74174_dip, 74174)
+ {
+ register_subalias("1", m_CLRQ);
+ register_subalias("9", m_sub.m_CLK);
+
+ register_subalias("3", m_D[0]);
+ register_subalias("2", m_sub.m_Q[0]);
+
+ register_subalias("4", m_D[1]);
+ register_subalias("5", m_sub.m_Q[1]);
+
+ register_subalias("6", m_D[2]);
+ register_subalias("7", m_sub.m_Q[2]);
+
+ register_subalias("11", m_D[3]);
+ register_subalias("10", m_sub.m_Q[3]);
+
+ register_subalias("13", m_D[4]);
+ register_subalias("12", m_sub.m_Q[4]);
+
+ register_subalias("14", m_D[5]);
+ register_subalias("15", m_sub.m_Q[5]);
+ }
+ };
+
+ NETLIB_RESET(74174_sub)
+ {
+ m_CLK.set_state(logic_t::STATE_INP_LH);
+ m_clrq = 0;
+ m_data = 0xFF;
+ }
+
+ NETLIB_UPDATE(74174_sub)
+ {
+ if (m_clrq)
+ {
+ for (std::size_t i=0; i<6; i++)
+ {
+ netlist_sig_t d = (m_data >> i) & 1;
+ m_Q[i].push(d, NLTIME_FROM_NS(25));
+ }
+ m_CLK.inactivate();
+ }
+ }
+
+ NETLIB_UPDATE(74174)
+ {
+ uint_fast8_t d = 0;
+ for (std::size_t i=0; i<6; i++)
+ {
+ d |= (m_D[i]() << i);
+ }
+ m_sub.m_clrq = m_CLRQ();
+ if (!m_sub.m_clrq)
+ {
+ for (std::size_t i=0; i<6; i++)
+ {
+ m_sub.m_Q[i].push(0, NLTIME_FROM_NS(40));
+ }
+ m_sub.m_data = 0;
+ } else if (d != m_sub.m_data)
+ {
+ m_sub.m_data = d;
+ m_sub.m_CLK.activate_lh();
+ }
+ }
+
+
+ NETLIB_RESET(74174)
+ {
+ //m_sub.do_reset();
+ }
+
+ NETLIB_DEVICE_IMPL(74174)
+ NETLIB_DEVICE_IMPL(74174_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74174.h b/src/lib/netlist/devices/nld_74174.h
new file mode 100644
index 00000000000..43125b6af96
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74174.h
@@ -0,0 +1,56 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nld_74174.h
+ *
+ * DM74174: Hex D Flip-Flops with Clear
+ *
+ * +--------------+
+ * CLR |1 ++ 16| VCC
+ * Q1 |2 15| Q6
+ * D1 |3 14| D6
+ * D2 |4 74174 13| D5
+ * Q2 |5 12| Q5
+ * D3 |6 11| D4
+ * Q3 |7 10| Q4
+ * GND |8 9| CLK
+ * +--------------+
+ *
+ * +-----+-----+---++---+-----+
+ * | CLR | CLK | D || Q | QQ |
+ * +=====+=====+===++===+=====+
+ * | 0 | X | X || 0 | 1 |
+ * | 1 | R | 1 || 1 | 0 |
+ * | 1 | R | 0 || 0 | 1 |
+ * | 1 | 0 | X || Q0| Q0Q |
+ * +-----+-----+---++---+-----+
+ *
+ * Q0 The output logic level of Q before the indicated input conditions were established
+ *
+ * R: 0 -> 1
+ *
+ * Naming conventions follow National Semiconductor datasheet
+ *
+ */
+
+#ifndef NLD_74174_H_
+#define NLD_74174_H_
+
+#include "nl_setup.h"
+
+#define TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74174, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
+ NET_CONNECT(name, D5, cD5) \
+ NET_CONNECT(name, D6, cD6) \
+ NET_CONNECT(name, CLRQ, cCLRQ)
+
+#define TTL_74174_DIP(name) \
+ NET_REGISTER_DEV(TTL_74174_DIP, name)
+
+
+#endif /* NLD_74174_H_ */
diff --git a/src/lib/netlist/devices/nld_74175.h b/src/lib/netlist/devices/nld_74175.h
index 8b08060e520..27dd01a2360 100644
--- a/src/lib/netlist/devices/nld_74175.h
+++ b/src/lib/netlist/devices/nld_74175.h
@@ -38,8 +38,15 @@
#include "nl_setup.h"
-#define TTL_74175(name) \
- NET_REGISTER_DEV(TTL_74175, name)
+#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74175, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
+ NET_CONNECT(name, CLRQ, cCLRQ)
+
#define TTL_74175_DIP(name) \
NET_REGISTER_DEV(TTL_74175_DIP, name)
diff --git a/src/lib/netlist/devices/nld_74192.h b/src/lib/netlist/devices/nld_74192.h
index fc5778044eb..8c82006fe6c 100644
--- a/src/lib/netlist/devices/nld_74192.h
+++ b/src/lib/netlist/devices/nld_74192.h
@@ -31,8 +31,16 @@
#include "nl_setup.h"
-#define TTL_74192(name) \
- NET_REGISTER_DEV(TTL_74192, name)
+#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
+ NET_REGISTER_DEV(TTL_74192, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, CLEAR, cCLEAR) \
+ NET_CONNECT(name, LOADQ, cLOADQ) \
+ NET_CONNECT(name, CU, cCU) \
+ NET_CONNECT(name, CD, cCD)
#define TTL_74192_DIP(name) \
NET_REGISTER_DEV(TTL_74192_DIP, name)
diff --git a/src/lib/netlist/devices/nld_74193.h b/src/lib/netlist/devices/nld_74193.h
index fa2b8125092..53b6165e9f9 100644
--- a/src/lib/netlist/devices/nld_74193.h
+++ b/src/lib/netlist/devices/nld_74193.h
@@ -28,8 +28,16 @@
#include "nl_setup.h"
-#define TTL_74193(name) \
- NET_REGISTER_DEV(TTL_74193, name)
+#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
+ NET_REGISTER_DEV(TTL_74193, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, CLEAR, cCLEAR) \
+ NET_CONNECT(name, LOADQ, cLOADQ) \
+ NET_CONNECT(name, CU, cCU) \
+ NET_CONNECT(name, CD, cCD)
#define TTL_74193_DIP(name) \
NET_REGISTER_DEV(TTL_74193_DIP, name)
diff --git a/src/lib/netlist/devices/nld_74194.cpp b/src/lib/netlist/devices/nld_74194.cpp
new file mode 100644
index 00000000000..e951e351e93
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74194.cpp
@@ -0,0 +1,122 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74194.cpp
+ *
+ */
+
+#include "nld_74194.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74194)
+ {
+ NETLIB_CONSTRUCTOR(74194)
+ , m_DATA(*this, {{"D", "C", "B", "A"}})
+ , m_SLIN(*this, "SLIN")
+ , m_SRIN(*this, "SRIN")
+ , m_CLK(*this, "CLK")
+ , m_S0(*this, "S0")
+ , m_S1(*this, "S1")
+ , m_CLRQ(*this, "CLRQ")
+ , m_Q(*this, {{"QD", "QC", "QB", "QA"}})
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ , m_last_Q(*this, "m_last_Q", 0)
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 4> m_DATA;
+ logic_input_t m_SLIN;
+ logic_input_t m_SRIN;
+ logic_input_t m_CLK;
+ logic_input_t m_S0;
+ logic_input_t m_S1;
+ logic_input_t m_CLRQ;
+ object_array_t<logic_output_t, 4> m_Q;
+
+ state_var<unsigned> m_last_CLK;
+ state_var<unsigned> m_last_Q;
+ };
+
+ NETLIB_OBJECT_DERIVED(74194_dip, 74194)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74194_dip, 74194)
+ {
+ register_subalias("1", m_CLRQ);
+ register_subalias("2", m_SRIN);
+ register_subalias("3", m_DATA[3]);
+ register_subalias("4", m_DATA[2]);
+ register_subalias("5", m_DATA[1]);
+ register_subalias("6", m_DATA[0]);
+ register_subalias("7", m_SLIN);
+
+ register_subalias("9", m_S0);
+ register_subalias("10", m_S1);
+ register_subalias("11", m_CLK);
+ register_subalias("12", m_Q[0]);
+ register_subalias("13", m_Q[1]);
+ register_subalias("14", m_Q[2]);
+ register_subalias("15", m_Q[3]);
+
+ }
+ };
+
+ NETLIB_RESET(74194)
+ {
+ m_last_CLK = 0;
+ m_last_Q = 0;
+ }
+
+ // FIXME: Timing
+ NETLIB_UPDATE(74194)
+ {
+ unsigned q = m_last_Q;
+
+ if (!m_CLRQ())
+ {
+ q = 0;
+ }
+ else
+ {
+ if (!m_last_CLK && m_CLK())
+ {
+ unsigned s = (m_S1() << 1) | m_S0();
+ switch (s)
+ {
+ case 0: // LL: Keep old value
+ break;
+ case 1: // LH: Shift right
+ q >>= 1;
+ q |= m_SRIN() ? 8 : 0;
+ break;
+ case 2:
+ q <<= 1;
+ q |= m_SLIN() ? 1 : 0;
+ break;
+ case 3:
+ q = 0;
+ for (std::size_t i=0; i<4; i++)
+ q |= m_DATA[i]() << i;
+ break;
+ }
+ }
+ }
+
+ m_last_Q = q;
+ m_last_CLK = m_CLK();
+
+ for (std::size_t i=0; i<4; i++)
+ m_Q[i].push((q >> i) & 1, NLTIME_FROM_NS(26)); // FIXME: Timing
+ }
+
+ NETLIB_DEVICE_IMPL(74194)
+ NETLIB_DEVICE_IMPL(74194_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74194.h b/src/lib/netlist/devices/nld_74194.h
new file mode 100644
index 00000000000..944d9537754
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74194.h
@@ -0,0 +1,47 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74194.h
+ *
+ * 74194: Parallel-Load 8-Bit Shift Register
+ *
+ * +--------------+
+ * CLRQ |1 ++ 16| VCC
+ * SRIN |2 15| QA
+ * A |3 14| QB
+ * B |4 74194 13| QC
+ * C |5 12| QD
+ * D |6 11| CLK
+ * SLIN |7 10| S1
+ * GND |8 9| S0
+ * +--------------+
+ *
+ * CLR: Clear
+ * SRIN: Shift Right Serial Input
+ * SLIN: Shift Left Serial Input
+ * CLK: Clock
+ *
+ */
+
+#ifndef NLD_74194_H_
+#define NLD_74194_H_
+
+#include "nl_setup.h"
+
+#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74194, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, S0, cS0) \
+ NET_CONNECT(name, S1, cS1) \
+ NET_CONNECT(name, SRIN, cSRIN) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, SLIN, cSLIN) \
+ NET_CONNECT(name, CLRQ, cCLRQ)
+
+#define TTL_74194_DIP(name) \
+ NET_REGISTER_DEV(TTL_74194_DIP, name)
+
+#endif /* NLD_74194_H_ */
diff --git a/src/lib/netlist/devices/nld_74365.cpp b/src/lib/netlist/devices/nld_74365.cpp
new file mode 100644
index 00000000000..34eafb0856e
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74365.cpp
@@ -0,0 +1,74 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74365.cpp
+ *
+ */
+
+#include "nld_74365.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(74365)
+ {
+ NETLIB_CONSTRUCTOR(74365)
+ , m_G1Q(*this, "G1Q")
+ , m_G2Q(*this, "G2Q")
+ , m_A(*this, {{ "A1", "A2", "A3", "A4", "A5", "A6" }})
+ , m_Y(*this, {{ "Y1", "Y2", "Y3", "Y4", "Y5", "Y6" }})
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ logic_input_t m_G1Q;
+ logic_input_t m_G2Q;
+ object_array_t<logic_input_t, 6> m_A;
+ object_array_t<logic_output_t, 6> m_Y;
+ };
+
+ NETLIB_OBJECT_DERIVED(74365_dip, 74365)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(74365_dip, 74365)
+ {
+ register_subalias("1", m_G1Q);
+ register_subalias("2", m_A[0]);
+ register_subalias("3", m_Y[0]);
+ register_subalias("4", m_A[1]);
+ register_subalias("5", m_Y[1]);
+ register_subalias("6", m_A[2]);
+ register_subalias("7", m_Y[2]);
+
+ register_subalias("9", m_A[3]);
+ register_subalias("10", m_Y[3]);
+ register_subalias("11", m_A[4]);
+ register_subalias("12", m_Y[4]);
+ register_subalias("13", m_A[5]);
+ register_subalias("14", m_Y[5]);
+ register_subalias("15", m_G2Q);
+
+ }
+ };
+
+ NETLIB_UPDATE(74365)
+ {
+ if (!m_G1Q() && !m_G2Q())
+ {
+ for (std::size_t i=0; i<6; i++)
+ m_Y[i].push(m_A[i](), NLTIME_FROM_NS(20)); // FIXME: Correct timing
+ }
+ else
+ {
+ for (std::size_t i=0; i<6; i++)
+ m_Y[i].push(0, NLTIME_FROM_NS(20)); // FIXME: Correct timing
+ }
+ }
+
+ NETLIB_DEVICE_IMPL(74365)
+ NETLIB_DEVICE_IMPL(74365_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_74365.h b/src/lib/netlist/devices/nld_74365.h
new file mode 100644
index 00000000000..2a7fb230e5e
--- /dev/null
+++ b/src/lib/netlist/devices/nld_74365.h
@@ -0,0 +1,44 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_74365.h
+ *
+ * SN74365: Hex Bus Driver with 3-State Outputs
+ *
+ * +--------------+
+ * G1Q |1 ++ 16| VCC
+ * A1 |2 15| G2Q
+ * Y1 |3 14| A6
+ * A2 |4 74365 13| Y6
+ * Y2 |5 12| A5
+ * A3 |6 11| Y5
+ * Y3 |7 10| A4
+ * GND |8 9| Y4
+ * +--------------+
+ *
+ * Naming conventions follow Texas Instruments datasheet
+ *
+ * Note: Currently the netlist system does not support proper tristate output, so this
+ * is not a "real" bus driver, it simply outputs 0 if the chip is not enabled.
+ */
+
+#ifndef NLD_74365_H_
+#define NLD_74365_H_
+
+#include "nl_setup.h"
+
+#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \
+ NET_REGISTER_DEV(TTL_74365, name) \
+ NET_CONNECT(name, G1Q, cG1Q) \
+ NET_CONNECT(name, G2Q, cG2Q) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6)
+
+#define TTL_74365_DIP(name) \
+ NET_REGISTER_DEV(TTL_74365_DIP, name)
+
+#endif /* NLD_74365_H_ */
diff --git a/src/lib/netlist/devices/nld_7473.cpp b/src/lib/netlist/devices/nld_7473.cpp
new file mode 100644
index 00000000000..fc73b97c201
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7473.cpp
@@ -0,0 +1,150 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nld_7473.c
+ *
+ */
+
+#include "nld_7473.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(7473)
+ {
+ NETLIB_CONSTRUCTOR(7473)
+ , m_CLK(*this, "CLK")
+ , m_J(*this, "J")
+ , m_K(*this, "K")
+ , m_CLRQ(*this, "CLRQ")
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ , m_q(*this, "m_q", 0)
+ , m_Q(*this, "Q")
+ , m_QQ(*this, "QQ")
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ public:
+ logic_input_t m_CLK;
+ logic_input_t m_J;
+ logic_input_t m_K;
+ logic_input_t m_CLRQ;
+
+ state_var<unsigned> m_last_CLK;
+ state_var<unsigned> m_q;
+
+ logic_output_t m_Q;
+ logic_output_t m_QQ;
+ };
+
+ NETLIB_OBJECT_DERIVED(7473A, 7473)
+ {
+ public:
+ NETLIB_CONSTRUCTOR_DERIVED(7473A, 7473) { }
+
+ };
+
+ NETLIB_OBJECT(7473_dip)
+ {
+ NETLIB_CONSTRUCTOR(7473_dip)
+ , m_1(*this, "1")
+ , m_2(*this, "2")
+ {
+ register_subalias("1", m_1.m_CLK);
+ register_subalias("2", m_1.m_CLRQ);
+ register_subalias("3", m_1.m_K);
+ //register_subalias("4", ); ==> VCC
+ register_subalias("5", m_2.m_CLK);
+ register_subalias("6", m_2.m_CLRQ);
+ register_subalias("7", m_2.m_J);
+
+ register_subalias("8", m_2.m_QQ);
+ register_subalias("9", m_2.m_Q);
+ register_subalias("10", m_2.m_K);
+ //register_subalias("11", ); ==> VCC
+ register_subalias("12", m_2.m_Q);
+ register_subalias("13", m_1.m_QQ);
+ register_subalias("14", m_1.m_J);
+ }
+
+ private:
+ NETLIB_SUB(7473) m_1;
+ NETLIB_SUB(7473) m_2;
+ };
+
+ NETLIB_OBJECT(7473A_dip)
+ {
+ NETLIB_CONSTRUCTOR(7473A_dip)
+ , m_1(*this, "1")
+ , m_2(*this, "2")
+ {
+ register_subalias("1", m_1.m_CLK);
+ register_subalias("2", m_1.m_CLRQ);
+ register_subalias("3", m_1.m_K);
+ //register_subalias("4", ); ==> VCC
+ register_subalias("5", m_2.m_CLK);
+ register_subalias("6", m_2.m_CLRQ);
+ register_subalias("7", m_2.m_J);
+
+ register_subalias("8", m_2.m_QQ);
+ register_subalias("9", m_2.m_Q);
+ register_subalias("10", m_2.m_K);
+ //register_subalias("11", ); ==> VCC
+ register_subalias("12", m_2.m_Q);
+ register_subalias("13", m_1.m_QQ);
+ register_subalias("14", m_1.m_J);
+ }
+
+ private:
+ NETLIB_SUB(7473A) m_1;
+ NETLIB_SUB(7473A) m_2;
+ };
+
+ NETLIB_RESET(7473)
+ {
+ m_last_CLK = 0;
+ }
+
+ NETLIB_UPDATE(7473)
+ {
+ const auto JK = (m_J() << 1) | m_K();
+
+ if (m_CLRQ())
+ {
+ if (!m_CLK() && m_last_CLK)
+ {
+ switch (JK)
+ {
+ case 1: // (!m_J) & m_K))
+ m_q = 0;
+ break;
+ case 2: // (m_J) & !m_K))
+ m_q = 1;
+ break;
+ case 3: // (m_J) & m_K))
+ m_q ^= 1;
+ break;
+ default:
+ case 0:
+ break;
+ }
+ }
+ }
+
+ m_last_CLK = m_CLK();
+
+ m_Q.push(m_q, NLTIME_FROM_NS(20)); // FIXME: timing
+ m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
+ }
+
+ NETLIB_DEVICE_IMPL(7473)
+ NETLIB_DEVICE_IMPL(7473A)
+ NETLIB_DEVICE_IMPL(7473_dip)
+ NETLIB_DEVICE_IMPL(7473A_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_7473.h b/src/lib/netlist/devices/nld_7473.h
new file mode 100644
index 00000000000..344e768cc44
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7473.h
@@ -0,0 +1,82 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nld_7473.h
+ *
+ * 7473: Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
+ * 7473A: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
+ *
+ * +----------+
+ * 1CLK |1 ++ 14| 1J
+ * 1CLRQ |2 13| 1QQ
+ * 1K |3 12| 1Q
+ * VCC |4 7473 11| GND
+ * 2CLK |5 10| 2K
+ * 2CLRQ |6 9| 2Q
+ * 2J |7 8| 2QQ
+ * +----------+
+ *
+ *
+ * Function table 73
+ *
+ * +-----+-----+-----+---++---+-----+
+ * | CLRQ| CLK | J | K || Q | QQ |
+ * +=====+=====+=====+===++===+=====+
+ * | 0 | X | X | X || 0 | 1 |
+ * | 1 | * | 0 | 0 || Q0| Q0Q |
+ * | 1 | * | 1 | 0 || 1 | 0 |
+ * | 1 | * | 0 | 1 || 0 | 1 |
+ * | 1 | * | 1 | 1 || TOGGLE |
+ * +-----+-----+-----+---++---+-----+
+ * _
+ * * = _| |_
+ *
+ * This is positive triggered, J and K
+ * are latched during clock high and
+ * transferred when CLK falls.
+ *
+ * Function table 73A
+ *
+ * +-----+-----+-----+---++---+-----+
+ * | CLRQ| CLK | J | K || Q | QQ |
+ * +=====+=====+=====+===++===+=====+
+ * | 0 | X | X | X || 0 | 1 |
+ * | 1 | F | 0 | 0 || Q0| Q0Q |
+ * | 1 | F | 1 | 0 || 1 | 0 |
+ * | 1 | F | 0 | 1 || 0 | 1 |
+ * | 1 | F | 1 | 1 || TOGGLE |
+ * | 1 | 1 | X | X || Q0| Q0Q |
+ * +-----+-----+-----+---++---+-----+
+ *
+ * THe 73A is negative triggered.
+ *
+ * Naming conventions follow Texas instruments datasheet
+ *
+ * FIXME: Currently, only the 73 is implemented.
+ * The 73A uses the same model.
+ *
+ */
+
+#ifndef NLD_7473_H_
+#define NLD_7473_H_
+
+#include "nl_setup.h"
+
+#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
+ NET_REGISTER_DEV(TTL_7473, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, J, cJ) \
+ NET_CONNECT(name, K, cK) \
+ NET_CONNECT(name, CLRQ, cCLRQ)
+
+#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
+ TTL_7473(name, cCLK, cJ, cK, cCLRQ)
+
+#define TTL_7473_DIP(name) \
+ NET_REGISTER_DEV(TTL_7473_DIP, name)
+
+
+#define TTL_7473A_DIP(name) \
+ NET_REGISTER_DEV(TTL_7473A_DIP, name)
+
+#endif /* NLD_7473_H_ */
diff --git a/src/lib/netlist/devices/nld_7475.cpp b/src/lib/netlist/devices/nld_7475.cpp
new file mode 100644
index 00000000000..3c26c1ce439
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7475.cpp
@@ -0,0 +1,156 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_7475.cpp
+ *
+ * TODO: Correct timing for clock-induced state changes, rather than assuming timing is always due to data-induced state changes
+ */
+
+#include "nld_7475.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(7477)
+ {
+ NETLIB_CONSTRUCTOR(7477)
+ , m_C1C2(*this, "C1C2")
+ , m_C3C4(*this, "C3C4")
+ , m_last_Q(*this, "m_last_Q", 0)
+ , m_D(*this, {{"D1", "D2", "D3", "D4"}})
+ , m_Q(*this, {{"Q1", "Q2", "Q3", "Q4"}})
+ {
+ register_subalias("Q1", m_Q[0]);
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ void update_outputs(std::size_t start, std::size_t end);
+
+ public:
+ logic_input_t m_C1C2;
+ logic_input_t m_C3C4;
+ state_var<unsigned> m_last_Q;
+ object_array_t<logic_input_t, 4> m_D;
+ object_array_t<logic_output_t, 4> m_Q;
+ };
+
+ NETLIB_OBJECT_DERIVED(7475, 7477)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(7475, 7477)
+ , m_QQ(*this, {{"QQ1", "QQ2", "QQ3", "QQ4"}})
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ public:
+ object_array_t<logic_output_t, 4> m_QQ;
+ };
+
+ NETLIB_OBJECT_DERIVED(7475_dip, 7475)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(7475_dip, 7475)
+ {
+ register_subalias("1", m_QQ[0]);
+ register_subalias("2", m_D[0]);
+ register_subalias("3", m_D[1]);
+ register_subalias("4", m_C3C4);
+ //register_subalias("5", ); ==> VCC
+ register_subalias("6", m_D[2]);
+ register_subalias("7", m_D[3]);
+ register_subalias("8", m_QQ[3]);
+
+ register_subalias("9", m_Q[3]);
+ register_subalias("10", m_Q[2]);
+ register_subalias("11", m_QQ[2]);
+ //register_subalias("12", ); ==> GND
+ register_subalias("13", m_C1C2);
+ register_subalias("14", m_QQ[1]);
+ register_subalias("15", m_Q[1]);
+ register_subalias("16", m_Q[0]);
+ }
+ };
+
+ NETLIB_OBJECT_DERIVED(7477_dip, 7477)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(7477_dip, 7477)
+ {
+ register_subalias("1", m_D[0]);
+ register_subalias("2", m_D[1]);
+ register_subalias("3", m_C3C4);
+ //register_subalias("4", ); ==> VCC
+ register_subalias("5", m_D[2]);
+ register_subalias("6", m_D[3]);
+ //register_subalias("7", ); ==> NC
+
+ register_subalias("8", m_Q[3]);
+ register_subalias("9", m_Q[2]);
+ //register_subalias("10", ); ==> NC
+ //register_subalias("11", ); ==> GND
+ register_subalias("12", m_C1C2);
+ register_subalias("13", m_Q[1]);
+ register_subalias("14", m_Q[0]);
+ }
+ };
+
+ NETLIB_UPDATE(7475)
+ {
+ unsigned start_q = m_last_Q;
+
+ NETLIB_PARENT_UPDATE(7477);
+
+ for (std::size_t i=0; i<4; i++)
+ {
+ unsigned last_bit = (m_last_Q >> i) & 1;
+ unsigned start_bit = (start_q >> i) & 1;
+ if (last_bit != start_bit)
+ m_QQ[i].push(last_bit ^ 1, last_bit != 0 ? NLTIME_FROM_NS(15) : NLTIME_FROM_NS(40));
+ }
+ }
+
+ void NETLIB_NAME(7477)::update_outputs(std::size_t start, std::size_t end)
+ {
+ for (std::size_t i=start; i<end; i++)
+ {
+ netlist_sig_t d = m_D[i]();
+ if (d != ((m_last_Q >> i) & 1))
+ m_Q[i].push(d, d != 0 ? NLTIME_FROM_NS(30) : NLTIME_FROM_NS(25));
+ m_last_Q &= ~(1 << i);
+ m_last_Q |= d << i;
+ }
+ }
+
+ NETLIB_RESET(7477)
+ {
+ m_last_Q = 0;
+ }
+
+ NETLIB_UPDATE(7477)
+ {
+ netlist_sig_t c1c2 = m_C1C2();
+ netlist_sig_t c3c4 = m_C3C4();
+ if (c1c2 && c3c4)
+ {
+ update_outputs(0, 4);
+ }
+ else if (c1c2)
+ {
+ update_outputs(0, 2);
+ }
+ else if (c3c4)
+ {
+ update_outputs(2, 4);
+ }
+
+ }
+
+ NETLIB_DEVICE_IMPL(7475)
+ NETLIB_DEVICE_IMPL(7475_dip)
+ NETLIB_DEVICE_IMPL(7477)
+ NETLIB_DEVICE_IMPL(7477_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_7475.h b/src/lib/netlist/devices/nld_7475.h
new file mode 100644
index 00000000000..5689d6aa1e8
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7475.h
@@ -0,0 +1,62 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_7475.h
+ *
+ * 7475: 4-Bit Bistable Latches with Complementary Outputs
+ * 7477: 4-Bit Bistable Latches
+ *
+ * +----------+ +----------+
+ * 1QQ |1 ++ 16| 1Q 1D |1 ++ 14| 1Q
+ * 1D |2 15| 2Q 2D |2 13| 2Q
+ * 2D |3 14| 2QQ 3C4C |3 12| 1C2C
+ * 3C4C |4 7475 13| 1C2C VCC |4 7477 11| GND
+ * VCC |5 12| GND 3D |5 10| NC
+ * 3D |6 11| 3QQ 4D |6 9| 3Q
+ * 4D |7 10| 3Q NC |7 8| 4Q
+ * 4QQ |8 9| 4Q +----------+
+ * +----------+
+ *
+ *
+ * Function table
+ *
+ * +---+---++---+-----+
+ * | D | C || Q | QQ |
+ * +===+===++===+=====+
+ * | 0 | 1 || 0 | 1 |
+ * | 1 | 1 || 1 | 0 |
+ * | X | 0 || Q0| Q0Q |
+ * +---+---++---+-----+
+ *
+ * Naming conventions follow Texas instruments datasheet
+ *
+ */
+
+#ifndef NLD_7475_H_
+#define NLD_7475_H_
+
+#include "nl_setup.h"
+
+#define PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_CONNECT(name, C1C2, cC1C2) \
+ NET_CONNECT(name, C3C4, cC3C4) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4)
+
+#define TTL_7475(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_REGISTER_DEV(TTL_7475, name) \
+ PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
+
+#define TTL_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_REGISTER_DEV(TTL_7477, name) \
+ PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
+
+#define TTL_7475_DIP(name) \
+ NET_REGISTER_DEV(TTL_7475_DIP, name)
+
+#define TTL_7477_DIP(name) \
+ NET_REGISTER_DEV(TTL_7477_DIP, name)
+
+#endif /* NLD_7475_H_ */
diff --git a/src/lib/netlist/devices/nld_7485.cpp b/src/lib/netlist/devices/nld_7485.cpp
new file mode 100644
index 00000000000..ba51756cac1
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7485.cpp
@@ -0,0 +1,107 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_7485.cpp
+ *
+ */
+
+#include "nld_7485.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(7485)
+ {
+ NETLIB_CONSTRUCTOR(7485)
+ , m_A(*this, {{"A0", "A1", "A2", "A3"}})
+ , m_B(*this, {{"B0", "B1", "B2", "B3"}})
+ , m_LTIN(*this, "LTIN")
+ , m_EQIN(*this, "EQIN")
+ , m_GTIN(*this, "GTIN")
+ , m_LTOUT(*this, "LTOUT")
+ , m_EQOUT(*this, "EQOUT")
+ , m_GTOUT(*this, "GTOUT")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ void update_outputs(unsigned gt, unsigned lt, unsigned eq);
+
+ protected:
+ object_array_t<logic_input_t, 4> m_A;
+ object_array_t<logic_input_t, 4> m_B;
+ logic_input_t m_LTIN;
+ logic_input_t m_EQIN;
+ logic_input_t m_GTIN;
+ logic_output_t m_LTOUT;
+ logic_output_t m_EQOUT;
+ logic_output_t m_GTOUT;
+ };
+
+ NETLIB_OBJECT_DERIVED(7485_dip, 7485)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(7485_dip, 7485)
+ {
+ register_subalias("1", m_B[3]);
+ register_subalias("2", m_LTIN);
+ register_subalias("3", m_EQIN);
+ register_subalias("4", m_GTIN);
+ register_subalias("5", m_GTOUT);
+ register_subalias("6", m_EQOUT);
+ register_subalias("7", m_LTOUT);
+
+ register_subalias("9", m_B[0]);
+ register_subalias("10", m_A[0]);
+ register_subalias("11", m_B[1]);
+ register_subalias("12", m_A[1]);
+ register_subalias("13", m_A[2]);
+ register_subalias("14", m_B[2]);
+ register_subalias("15", m_A[3]);
+
+ }
+ };
+
+ void NETLIB_NAME(7485)::update_outputs(unsigned gt, unsigned lt, unsigned eq)
+ {
+ m_GTOUT.push(gt, NLTIME_FROM_NS(23));
+ m_LTOUT.push(lt, NLTIME_FROM_NS(23));
+ m_EQOUT.push(eq, NLTIME_FROM_NS(23));
+ }
+
+ // FIXME: Timing
+ NETLIB_UPDATE(7485)
+ {
+ for (std::int_fast32_t i = 3; i >= 0; i--)
+ {
+ if (m_A[i]() > m_B[i]())
+ {
+ update_outputs(1, 0, 0);
+ return;
+ }
+ else if (m_A[i]() < m_B[i]())
+ {
+ update_outputs(0, 1, 0);
+ return;
+ }
+ }
+
+ // must be == if we got here
+ if (m_EQIN())
+ update_outputs(0, 0, 1);
+ else if (m_GTIN() && m_LTIN())
+ update_outputs(0, 0, 0);
+ else if (m_GTIN())
+ update_outputs(1, 0, 0);
+ else if (m_LTIN())
+ update_outputs(0, 1, 0);
+ else
+ update_outputs(1, 1, 0);
+ }
+
+ NETLIB_DEVICE_IMPL(7485)
+ NETLIB_DEVICE_IMPL(7485_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_7485.h b/src/lib/netlist/devices/nld_7485.h
new file mode 100644
index 00000000000..77ff6b0d530
--- /dev/null
+++ b/src/lib/netlist/devices/nld_7485.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_7485.h
+ *
+ * DM7485: 4-bit Magnitude Comparators
+ *
+ * +------------+
+ * B3 |1 ++ 16| VCC
+ * LTIN |2 15| A3
+ * EQIN |3 14| B2
+ * GTIN |4 7485 13| A2
+ * GTOUT |5 12| A1
+ * EQOUT |6 11| B1
+ * LTOUT |7 10| A0
+ * GND |8 9| B0
+ * +------------+
+ *
+ * Naming convention attempts to follow Texas Instruments datasheet
+ *
+ */
+
+#ifndef NLD_7485_H_
+#define NLD_7485_H_
+
+#include "nl_setup.h"
+
+#define TTL_7485(name, cA0, cA1, cA2, cA3, cB0, cB1, cB2, cB3, cLTIN, cEQIN, cGTIN) \
+ NET_REGISTER_DEV(TTL_7485, name) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, B0, cB0) \
+ NET_CONNECT(name, B1, cB1) \
+ NET_CONNECT(name, B2, cB2) \
+ NET_CONNECT(name, B3, cB3) \
+ NET_CONNECT(name, LTIN, cLTIN) \
+ NET_CONNECT(name, EQIN, cEQIN) \
+ NET_CONNECT(name, GTIN, cGTIN)
+
+#define TTL_7485_DIP(name) \
+ NET_REGISTER_DEV(TTL_7485_DIP, name)
+
+#endif /* NLD_7485_H_ */
diff --git a/src/lib/netlist/devices/nld_74ls629.cpp b/src/lib/netlist/devices/nld_74ls629.cpp
index 3d35f90eba6..9a34b9c5ca9 100644
--- a/src/lib/netlist/devices/nld_74ls629.cpp
+++ b/src/lib/netlist/devices/nld_74ls629.cpp
@@ -60,7 +60,7 @@ namespace netlist
NETLIB_RESETI()
{
- m_enableq = 1;
+ m_enableq = 0;
m_out = 0;
m_inc = netlist_time::zero();
}
diff --git a/src/lib/netlist/devices/nld_82S115.cpp b/src/lib/netlist/devices/nld_82S115.cpp
new file mode 100644
index 00000000000..c01d013aec5
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S115.cpp
@@ -0,0 +1,112 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S115.cpp
+ *
+ */
+
+#include "nld_82S115.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(82S115)
+ {
+ NETLIB_CONSTRUCTOR(82S115)
+ , m_A(*this, {{"A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "A8"}})
+ , m_CE1Q(*this, "CE1Q")
+ , m_CE2(*this, "CE2")
+ , m_STROBE(*this, "STROBE")
+ , m_O(*this, {{"O1", "O2", "O3", "O4", "O5", "O6", "O7", "O8"}})
+ , m_last_O(*this, "m_last_O", 0)
+ , m_ROM(*this, "ROM")
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 9> m_A;
+ logic_input_t m_CE1Q;
+ logic_input_t m_CE2;
+ logic_input_t m_STROBE;
+ object_array_t<logic_output_t, 8> m_O;
+
+ state_var<unsigned> m_last_O;
+
+ param_rom_t<uint8_t, 9, 8> m_ROM; // 4096 bits, 512x8
+ };
+
+ NETLIB_OBJECT_DERIVED(82S115_dip, 82S115)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(82S115_dip, 82S115)
+ {
+ register_subalias("21", m_A[0]);
+ register_subalias("22", m_A[1]);
+ register_subalias("23", m_A[2]);
+ register_subalias("1", m_A[3]);
+ register_subalias("2", m_A[4]);
+ register_subalias("3", m_A[5]);
+ register_subalias("4", m_A[6]);
+ register_subalias("5", m_A[7]);
+ register_subalias("6", m_A[8]);
+
+ register_subalias("20", m_CE1Q);
+ register_subalias("19", m_CE2);
+
+ // register_subalias("13", m_FE1);
+ // register_subalias("11", m_FE2);
+
+ register_subalias("18", m_STROBE);
+
+ register_subalias("7", m_O[0]);
+ register_subalias("8", m_O[1]);
+ register_subalias("9", m_O[2]);
+ register_subalias("10", m_O[3]);
+ register_subalias("14", m_O[4]);
+ register_subalias("15", m_O[5]);
+ register_subalias("16", m_O[6]);
+ register_subalias("17", m_O[7]);
+ }
+ };
+
+ NETLIB_RESET(82S115)
+ {
+ m_last_O = 0;
+ }
+
+ // FIXME: timing!
+ NETLIB_UPDATE(82S115)
+ {
+ unsigned o = 0;
+
+ if (!m_CE1Q() && m_CE2())
+ {
+ if (m_STROBE())
+ {
+ unsigned a = 0;
+ for (std::size_t i=0; i<9; i++)
+ a |= (m_A[i]() << i);
+
+ o = m_ROM[a];
+ }
+ else
+ {
+ o = m_last_O;
+ }
+ }
+
+ m_last_O = o;
+
+ // FIXME: Outputs are tristate. This needs to be properly implemented
+ for (std::size_t i=0; i<8; i++)
+ m_O[i].push((o >> i) & 1, NLTIME_FROM_NS(40)); // FIXME: Timing
+ }
+
+ NETLIB_DEVICE_IMPL(82S115)
+ NETLIB_DEVICE_IMPL(82S115_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_82S115.h b/src/lib/netlist/devices/nld_82S115.h
new file mode 100644
index 00000000000..0c900e4dad7
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S115.h
@@ -0,0 +1,51 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S115.h
+ *
+ * 82S115: 4K-bit TTL bipolar PROM (512 x 8)
+ *
+ * +--------------+
+ * A3 |1 ++ 24| VCC
+ * A4 |2 23| A2
+ * A5 |3 22| A1
+ * A6 |4 82S115 21| A0
+ * A7 |5 20| CE1Q
+ * A8 |6 19| CE2
+ * O1 |7 18| STROBE
+ * O2 |8 17| O8
+ * O3 |9 16| O7
+ * O4 |10 15| O6
+ * FE2 |11 14| O5
+ * GND |12 13| FE1
+ * +--------------+
+ *
+ *
+ * Naming conventions follow Signetics datasheet
+ *
+ */
+
+#ifndef NLD_82S115_H_
+#define NLD_82S115_H_
+
+#include "nl_setup.h"
+
+#define PROM_82S115(name, cCE1Q, cCE2, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cSTROBE) \
+ NET_REGISTER_DEV(PROM_82S115, name) \
+ NET_CONNECT(name, CE1Q, cCE1Q) \
+ NET_CONNECT(name, CE2, cCE2) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
+ NET_CONNECT(name, STROBE, cSTROBE)
+
+#define PROM_82S115_DIP(name) \
+ NET_REGISTER_DEV(PROM_82S115_DIP, name)
+
+#endif /* NLD_82S115_H_ */
diff --git a/src/lib/netlist/devices/nld_82S123.cpp b/src/lib/netlist/devices/nld_82S123.cpp
new file mode 100644
index 00000000000..f9e97174d4a
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S123.cpp
@@ -0,0 +1,83 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S123.cpp
+ *
+ */
+
+#include "nld_82S123.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(82S123)
+ {
+ NETLIB_CONSTRUCTOR(82S123)
+ , m_A(*this, {{"A0", "A1", "A2", "A3", "A4"}})
+ , m_CEQ(*this, "CEQ")
+ , m_O(*this, {{"O1", "O2", "O3", "O4", "O5", "O6", "O7", "O8"}})
+ , m_ROM(*this, "ROM")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 5> m_A;
+ logic_input_t m_CEQ;
+ object_array_t<logic_output_t, 8> m_O;
+
+ param_rom_t<uint8_t, 5, 8> m_ROM; // 256 bits, 32x8
+ };
+
+ NETLIB_OBJECT_DERIVED(82S123_dip, 82S123)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(82S123_dip, 82S123)
+ {
+ register_subalias("1", m_O[0]);
+ register_subalias("2", m_O[1]);
+ register_subalias("3", m_O[2]);
+ register_subalias("4", m_O[3]);
+ register_subalias("5", m_O[4]);
+ register_subalias("6", m_O[5]);
+ register_subalias("7", m_O[6]);
+ register_subalias("8", m_O[7]);
+
+ register_subalias("15", m_CEQ);
+
+ register_subalias("10", m_A[0]);
+ register_subalias("11", m_A[1]);
+ register_subalias("12", m_A[2]);
+ register_subalias("13", m_A[3]);
+ register_subalias("14", m_A[4]);
+ }
+ };
+
+ // FIXME: timing!
+ NETLIB_UPDATE(82S123)
+ {
+ unsigned o = 0xff;
+
+ netlist_time delay = NLTIME_FROM_NS(35);
+ if (!m_CEQ())
+ {
+ unsigned a = 0;
+ for (std::size_t i=0; i<5; i++)
+ a |= (m_A[i]() << i);
+
+ o = m_ROM[a];
+
+ delay = NLTIME_FROM_NS(50);
+ }
+
+ // FIXME: Outputs are tristate. This needs to be properly implemented
+ for (std::size_t i=0; i<8; i++)
+ m_O[i].push((o >> i) & 1, delay);
+ }
+
+ NETLIB_DEVICE_IMPL(82S123)
+ NETLIB_DEVICE_IMPL(82S123_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_82S123.h b/src/lib/netlist/devices/nld_82S123.h
new file mode 100644
index 00000000000..a04e169ae93
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S123.h
@@ -0,0 +1,42 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S123.h
+ *
+ * 82S23: 256-bit (32x8) TTL bipolar PROM with open-collector outputs
+ * 82S123: 256-bit (32x8) TTL bipolar PROM with tri-state outputs
+ *
+ * +--------------+
+ * O1 |1 ++ 16| VCC
+ * O2 |2 15| CEQ
+ * O3 |3 14| A4
+ * O4 |4 82S123 13| A3
+ * O5 |5 12| A2
+ * O6 |6 11| A1
+ * O7 |7 10| A0
+ * GND |8 9| O8
+ * +--------------+
+ *
+ *
+ * Naming conventions follow Philips datasheet
+ *
+ */
+
+#ifndef NLD_82S123_H_
+#define NLD_82S123_H_
+
+#include "nl_setup.h"
+
+#define PROM_82S123(name, cCEQ, cA0, cA1, cA2, cA3, cA4) \
+ NET_REGISTER_DEV(PROM_82S123, name) \
+ NET_CONNECT(name, CEQ, cCEQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4)
+
+#define PROM_82S123_DIP(name) \
+ NET_REGISTER_DEV(PROM_82S123_DIP, name)
+
+#endif /* NLD_82S123_H_ */
diff --git a/src/lib/netlist/devices/nld_82S126.cpp b/src/lib/netlist/devices/nld_82S126.cpp
new file mode 100644
index 00000000000..d3a86ce84ee
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S126.cpp
@@ -0,0 +1,85 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S126.cpp
+ *
+ */
+
+#include "nld_82S126.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(82S126)
+ {
+ NETLIB_CONSTRUCTOR(82S126)
+ , m_A(*this, {{"A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7" }})
+ , m_CE1Q(*this, "CE1Q")
+ , m_CE2Q(*this, "CE2Q")
+ , m_O(*this, {{"O1", "O2", "O3", "O4" }})
+ , m_ROM(*this, "ROM")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 8> m_A;
+ logic_input_t m_CE1Q;
+ logic_input_t m_CE2Q;
+ object_array_t<logic_output_t, 4> m_O;
+
+ param_rom_t<uint8_t, 8, 4> m_ROM; // 1024 bits, 32x32, used as 256x4
+ };
+
+ NETLIB_OBJECT_DERIVED(82S126_dip, 82S126)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(82S126_dip, 82S126)
+ {
+ register_subalias("5", m_A[0]);
+ register_subalias("6", m_A[1]);
+ register_subalias("7", m_A[2]);
+ register_subalias("4", m_A[3]);
+ register_subalias("3", m_A[4]);
+ register_subalias("2", m_A[5]);
+ register_subalias("1", m_A[6]);
+ register_subalias("15", m_A[7]);
+
+ register_subalias("13", m_CE1Q);
+ register_subalias("14", m_CE2Q);
+
+ register_subalias("12", m_O[0]);
+ register_subalias("11", m_O[1]);
+ register_subalias("10", m_O[2]);
+ register_subalias("9", m_O[3]);
+ }
+ };
+
+ // FIXME: timing!
+ NETLIB_UPDATE(82S126)
+ {
+ unsigned o = 0xf;
+
+ netlist_time delay = NLTIME_FROM_NS(25);
+ if (!m_CE1Q() && !m_CE2Q())
+ {
+ unsigned a = 0;
+ for (std::size_t i=0; i<8; i++)
+ a |= (m_A[i]() << i);
+
+ o = m_ROM[a];
+
+ delay = NLTIME_FROM_NS(50);
+ }
+
+ // FIXME: Outputs are tristate. This needs to be properly implemented
+ for (std::size_t i=0; i<4; i++)
+ m_O[i].push((o >> i) & 1, delay);
+ }
+
+ NETLIB_DEVICE_IMPL(82S126)
+ NETLIB_DEVICE_IMPL(82S126_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_82S126.h b/src/lib/netlist/devices/nld_82S126.h
new file mode 100644
index 00000000000..27dd2217497
--- /dev/null
+++ b/src/lib/netlist/devices/nld_82S126.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_82S126.h
+ *
+ * 82S126: 1K-bit TTL bipolar PROM
+ *
+ * +--------------+
+ * A6 |1 ++ 16| VCC
+ * A5 |2 15| Q7
+ * A4 |3 14| CE2Q
+ * A3 |4 82S126 13| CE1Q
+ * A0 |5 12| O1
+ * A1 |6 11| O2
+ * A2 |7 10| O3
+ * GND |8 9| O4
+ * +--------------+
+ *
+ *
+ * Naming conventions follow Signetics datasheet
+ *
+ */
+
+#ifndef NLD_82S126_H_
+#define NLD_82S126_H_
+
+#include "nl_setup.h"
+
+#define PROM_82S126(name, cCE1Q, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7) \
+ NET_REGISTER_DEV(PROM_82S126, name) \
+ NET_CONNECT(name, CE1Q, cCE1Q) \
+ NET_CONNECT(name, CE2Q, cCE2Q) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7)
+
+#define PROM_82S126_DIP(name) \
+ NET_REGISTER_DEV(PROM_82S126_DIP, name)
+
+#endif /* NLD_82S126_H_ */
diff --git a/src/lib/netlist/devices/nld_9312.cpp b/src/lib/netlist/devices/nld_9312.cpp
index af5f35d965c..2ad298f368a 100644
--- a/src/lib/netlist/devices/nld_9312.cpp
+++ b/src/lib/netlist/devices/nld_9312.cpp
@@ -28,8 +28,9 @@ namespace netlist
namespace devices
{
#if (USE_TRUTHTABLE)
- /* The truthtable implementation is a lot faster than
+ /* FIXME: The truthtable implementation is a lot faster than
* the carefully crafted code :-(
+ * Convert this into a macro module.
*/
NETLIB_TRUTHTABLE(9312, 12, 2);
#else
diff --git a/src/lib/netlist/devices/nld_9312.h b/src/lib/netlist/devices/nld_9312.h
index a787b38e604..98cc0d115c8 100644
--- a/src/lib/netlist/devices/nld_9312.h
+++ b/src/lib/netlist/devices/nld_9312.h
@@ -39,8 +39,20 @@
#include "nl_setup.h"
-#define TTL_9312(name) \
- NET_REGISTER_DEV(TTL_9312, name)
+#define TTL_9312(name, cA, cB, cC, cD0, cD1, cD2, cD3, cD4, cD5, cD6, cD7, cSTROBE) \
+ NET_REGISTER_DEV(TTL_9312, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D0, cD0) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
+ NET_CONNECT(name, D5, cD5) \
+ NET_CONNECT(name, D6, cD6) \
+ NET_CONNECT(name, D7, cD7) \
+ NET_CONNECT(name, G, cSTROBE)
#define TTL_9312_DIP(name) \
NET_REGISTER_DEV(TTL_9312_DIP, name)
diff --git a/src/lib/netlist/devices/nld_9316.h b/src/lib/netlist/devices/nld_9316.h
index ab3fb46a2f5..b0be896a6bd 100644
--- a/src/lib/netlist/devices/nld_9316.h
+++ b/src/lib/netlist/devices/nld_9316.h
@@ -44,6 +44,8 @@
*
* Naming conventions follow National Semiconductor datasheet
*
+ * TODO: DM74161 is compatible to DM9316 (both asynchronous clear)
+ * DM74163 has asynchronous clear (on L to H transition of clock)
*/
#ifndef NLD_9316_H_
diff --git a/src/lib/netlist/devices/nld_9322.cpp b/src/lib/netlist/devices/nld_9322.cpp
new file mode 100644
index 00000000000..881ec9e5355
--- /dev/null
+++ b/src/lib/netlist/devices/nld_9322.cpp
@@ -0,0 +1,114 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_9322.cpp
+ *
+ */
+
+#include "nld_9322.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(9322_selector)
+ {
+ NETLIB_CONSTRUCTOR(9322_selector)
+ , m_A(*this, "A")
+ , m_B(*this, "B")
+ , m_Y(*this, "Y")
+ {
+ }
+
+ void update_outputs(const netlist_sig_t strobe, const netlist_sig_t select);
+
+ public:
+ logic_input_t m_A;
+ logic_input_t m_B;
+ logic_output_t m_Y;
+ };
+
+ // FIXME: Timing
+ void NETLIB_NAME(9322_selector)::update_outputs(const netlist_sig_t strobe, const netlist_sig_t select)
+ {
+ if (strobe)
+ m_Y.push(0, NLTIME_FROM_NS(21));
+ else if (select)
+ m_Y.push(m_B(), NLTIME_FROM_NS(14));
+ else
+ m_Y.push(m_A(), NLTIME_FROM_NS(14));
+ }
+
+ NETLIB_OBJECT(9322)
+ {
+ NETLIB_CONSTRUCTOR(9322)
+ , m_1(*this, "1")
+ , m_2(*this, "2")
+ , m_3(*this, "3")
+ , m_4(*this, "4")
+ , m_SELECT(*this, "SELECT")
+ , m_STROBE(*this, "STROBE")
+ {
+ register_subalias("A1", m_1.m_A);
+ register_subalias("B1", m_1.m_B);
+ register_subalias("Y1", m_1.m_Y);
+ register_subalias("A2", m_2.m_A);
+ register_subalias("B2", m_2.m_B);
+ register_subalias("Y2", m_2.m_Y);
+ register_subalias("A3", m_3.m_A);
+ register_subalias("B3", m_3.m_B);
+ register_subalias("Y3", m_3.m_Y);
+ register_subalias("A4", m_4.m_A);
+ register_subalias("B4", m_4.m_B);
+ register_subalias("Y4", m_4.m_Y);
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ NETLIB_SUB(9322_selector) m_1;
+ NETLIB_SUB(9322_selector) m_2;
+ NETLIB_SUB(9322_selector) m_3;
+ NETLIB_SUB(9322_selector) m_4;
+
+ logic_input_t m_SELECT;
+ logic_input_t m_STROBE;
+ };
+
+ NETLIB_OBJECT_DERIVED(9322_dip, 9322)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(9322_dip, 9322)
+ {
+ register_subalias("1", m_SELECT);
+ register_subalias("2", m_1.m_A);
+ register_subalias("3", m_1.m_B);
+ register_subalias("4", m_1.m_Y);
+ register_subalias("5", m_2.m_A);
+ register_subalias("6", m_2.m_B);
+ register_subalias("7", m_2.m_Y);
+
+ register_subalias("9", m_3.m_Y);
+ register_subalias("10", m_3.m_B);
+ register_subalias("11", m_3.m_A);
+ register_subalias("12", m_4.m_Y);
+ register_subalias("13", m_4.m_B);
+ register_subalias("14", m_4.m_A);
+ register_subalias("15", m_STROBE);
+ }
+ };
+
+ NETLIB_UPDATE(9322)
+ {
+ const netlist_sig_t strobe = m_STROBE();
+ const netlist_sig_t select = m_SELECT();
+ m_1.update_outputs(strobe, select);
+ m_2.update_outputs(strobe, select);
+ m_3.update_outputs(strobe, select);
+ m_4.update_outputs(strobe, select);
+ }
+
+ NETLIB_DEVICE_IMPL(9322)
+ NETLIB_DEVICE_IMPL(9322_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_9322.h b/src/lib/netlist/devices/nld_9322.h
new file mode 100644
index 00000000000..08ec6efcd93
--- /dev/null
+++ b/src/lib/netlist/devices/nld_9322.h
@@ -0,0 +1,42 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_9322.h
+ *
+ * 9322: Quad 2-Line to 1-Line Data Selectors/Multiplexers
+ *
+ * +------------+
+ * SELECT |1 ++ 16| VCC
+ * A1 |2 15| STROBE
+ * B1 |3 14| A4
+ * Y1 |4 9322 13| B4
+ * A2 |5 12| Y4
+ * B2 |6 11| A3
+ * Y2 |7 10| B3
+ * GND |8 9| Y3
+ * +------------+
+ *
+ */
+
+#ifndef NLD_9322_H_
+#define NLD_9322_H_
+
+#include "nl_setup.h"
+
+#define TTL_9322(name, cSELECT, cA1, cB1, cA2, cB2, cA3, cB3, cA4, cB4, cSTROBE) \
+ NET_REGISTER_DEV(TTL_9322, name) \
+ NET_CONNECT(name, SELECT, cSELECT) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, B1, cB1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, B2, cB2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, B3, cB3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, B4, cB4) \
+ NET_CONNECT(name, STROBE, cSTROBE)
+
+#define TTL_9322_DIP(name) \
+ NET_REGISTER_DEV(TTL_9322_DIP, name)
+
+#endif /* NLD_9322_H_ */
diff --git a/src/lib/netlist/devices/nld_am2847.cpp b/src/lib/netlist/devices/nld_am2847.cpp
new file mode 100644
index 00000000000..ec4eafc8dd6
--- /dev/null
+++ b/src/lib/netlist/devices/nld_am2847.cpp
@@ -0,0 +1,129 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_am2847.cpp
+ *
+ */
+
+#include "nld_am2847.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(Am2847_shifter)
+ {
+ NETLIB_CONSTRUCTOR(Am2847_shifter)
+ , m_RC(*this, "RC")
+ , m_IN(*this, "IN")
+ , m_buffer(*this, "m_buffer", 0)
+ , m_OUT(*this, "OUT")
+ {
+ }
+
+ public:
+ void shift();
+
+ logic_input_t m_RC;
+ logic_input_t m_IN;
+
+ state_var<uint_fast16_t[5]> m_buffer;
+
+ logic_output_t m_OUT;
+ };
+
+ NETLIB_OBJECT(AM2847)
+ {
+ NETLIB_CONSTRUCTOR(AM2847)
+ , m_A(*this, "A")
+ , m_B(*this, "B")
+ , m_C(*this, "C")
+ , m_D(*this, "D")
+ , m_CP(*this, "CP")
+ , m_last_CP(*this, "m_last_CP", 0)
+ {
+ register_subalias("OUTA", m_A.m_OUT);
+ register_subalias("OUTB", m_B.m_OUT);
+ register_subalias("OUTC", m_C.m_OUT);
+ register_subalias("OUTD", m_D.m_OUT);
+ register_subalias("INA", m_A.m_IN);
+ register_subalias("INB", m_B.m_IN);
+ register_subalias("INC", m_C.m_IN);
+ register_subalias("IND", m_D.m_IN);
+ register_subalias("RCA", m_A.m_RC);
+ register_subalias("RCB", m_B.m_RC);
+ register_subalias("RCC", m_C.m_RC);
+ register_subalias("RCD", m_D.m_RC);
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ NETLIB_SUB(Am2847_shifter) m_A;
+ NETLIB_SUB(Am2847_shifter) m_B;
+ NETLIB_SUB(Am2847_shifter) m_C;
+ NETLIB_SUB(Am2847_shifter) m_D;
+ logic_input_t m_CP;
+
+ state_var<uint_fast32_t> m_last_CP;
+ };
+
+ NETLIB_OBJECT_DERIVED(AM2847_dip, AM2847)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(AM2847_dip, AM2847)
+ {
+ register_subalias("1", m_A.m_OUT);
+ register_subalias("2", m_A.m_RC);
+ register_subalias("3", m_A.m_IN);
+ register_subalias("4", m_B.m_OUT);
+ register_subalias("5", m_B.m_RC);
+ register_subalias("6", m_B.m_IN);
+ register_subalias("7", m_C.m_OUT);
+
+ register_subalias("9", m_C.m_RC);
+ register_subalias("10", m_C.m_IN);
+ register_subalias("11", m_CP);
+ register_subalias("13", m_D.m_OUT);
+ register_subalias("14", m_D.m_RC);
+ register_subalias("15", m_D.m_IN);
+
+ }
+ };
+
+ NETLIB_RESET(AM2847)
+ {
+ m_last_CP = 0;
+ }
+
+ NETLIB_UPDATE(AM2847)
+ {
+ if (m_last_CP && !m_CP())
+ {
+ m_A.shift();
+ m_B.shift();
+ m_C.shift();
+ m_D.shift();
+ }
+ m_last_CP = m_CP();
+ }
+
+ inline NETLIB_FUNC_VOID(Am2847_shifter, shift, (void))
+ {
+ unsigned out = m_buffer[0] & 1;
+ uint_fast32_t in = (m_RC() ? out : m_IN());
+ for (std::size_t i=0; i < 5; i++)
+ {
+ uint_fast16_t shift_in = (i == 4) ? in : m_buffer[i + 1];
+ m_buffer[i] >>= 1;
+ m_buffer[i] |= shift_in << 15;
+ }
+
+ m_OUT.push(out, NLTIME_FROM_NS(200));
+ }
+
+ NETLIB_DEVICE_IMPL(AM2847)
+ NETLIB_DEVICE_IMPL(AM2847_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_am2847.h b/src/lib/netlist/devices/nld_am2847.h
new file mode 100644
index 00000000000..a820961ea2c
--- /dev/null
+++ b/src/lib/netlist/devices/nld_am2847.h
@@ -0,0 +1,41 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_am2847.h
+ *
+ * Am2847: Quad 80-Bit Static Shift Register
+ *
+ * +--------------+
+ * OUTA |1 ++ 16| VSS
+ * RCA |2 15| IND
+ * INA |3 14| RCD
+ * OUTB |4 Am2847 13| OUTD
+ * RCB |5 12| VGG
+ * INB |6 11| CP
+ * OUTC |7 10| INC
+ * VDD |8 9| RCC
+ * +--------------+
+ *
+ */
+
+#ifndef NLD_AM2847_H_
+#define NLD_AM2847_H_
+
+#include "nl_setup.h"
+
+#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \
+ NET_REGISTER_DEV(TTL_AM2847, name) \
+ NET_CONNECT(name, CP, cCP) \
+ NET_CONNECT(name, INA, cINA) \
+ NET_CONNECT(name, INB, cINB) \
+ NET_CONNECT(name, INC, cINC) \
+ NET_CONNECT(name, IND, cIND) \
+ NET_CONNECT(name, RCA, cRCA) \
+ NET_CONNECT(name, RCB, cRCB) \
+ NET_CONNECT(name, RCC, cRCC) \
+ NET_CONNECT(name, RCD, cRCD)
+
+#define TTL_AM2847_DIP(name) \
+ NET_REGISTER_DEV(TTL_AM2847_DIP, name)
+
+#endif /* NLD_AM2847_H_ */
diff --git a/src/lib/netlist/devices/nld_dm9334.cpp b/src/lib/netlist/devices/nld_dm9334.cpp
new file mode 100644
index 00000000000..c65a05d2014
--- /dev/null
+++ b/src/lib/netlist/devices/nld_dm9334.cpp
@@ -0,0 +1,149 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_dm9334.cpp
+ *
+ */
+
+#include "nld_dm9334.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(9334)
+ {
+ NETLIB_CONSTRUCTOR(9334)
+ , m_CQ(*this, "CQ")
+ , m_EQ(*this, "EQ")
+ , m_D(*this, "D")
+ , m_A(*this, {{"A0", "A1", "A2"}})
+ , m_Q(*this, {{"Q0", "Q1", "Q2", "Q3", "Q4", "Q5", "Q6", "Q7"}})
+ , m_last_CQ(*this, "m_last_CQ", 0)
+ , m_last_EQ(*this, "m_last_EQ", 0)
+ , m_last_D(*this, "m_last_D", 0)
+ , m_last_A(*this, "m_last_A", 0)
+ , m_last_Q(*this, "m_last_Q", 0)
+ {
+ }
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ protected:
+ logic_input_t m_CQ;
+ logic_input_t m_EQ;
+ logic_input_t m_D;
+ object_array_t<logic_input_t, 3> m_A;
+ object_array_t<logic_output_t, 8> m_Q;
+
+ state_var<unsigned> m_last_CQ;
+ state_var<unsigned> m_last_EQ;
+ state_var<unsigned> m_last_D;
+ state_var<unsigned> m_last_A;
+ state_var<unsigned> m_last_Q;
+ };
+
+ NETLIB_OBJECT_DERIVED(9334_dip, 9334)
+ {
+ NETLIB_CONSTRUCTOR_DERIVED(9334_dip, 9334)
+ {
+ register_subalias("1", m_A[0]);
+ register_subalias("2", m_A[1]);
+ register_subalias("3", m_A[2]);
+ register_subalias("4", m_Q[0]);
+ register_subalias("5", m_Q[1]);
+ register_subalias("6", m_Q[2]);
+ register_subalias("7", m_Q[3]);
+
+ register_subalias("9", m_Q[4]);
+ register_subalias("10", m_Q[5]);
+ register_subalias("11", m_Q[6]);
+ register_subalias("12", m_Q[7]);
+ register_subalias("13", m_D);
+ register_subalias("14", m_EQ);
+ register_subalias("15", m_CQ);
+
+ }
+ };
+
+ NETLIB_RESET(9334)
+ {
+ m_last_CQ = 0;
+ m_last_EQ = 0;
+ m_last_D = 0;
+ m_last_A = 0;
+ m_last_Q = 0;
+ }
+
+ NETLIB_UPDATE(9334)
+ {
+ uint_fast8_t a = 0;
+ for (std::size_t i=0; i<3; i++)
+ {
+ a |= (m_A[i]() << i);
+ }
+
+ netlist_time delay = NLTIME_FROM_NS(27); // Clear Low to High Level Output (not documented, making reasonable guess)
+
+ if (a != m_last_A)
+ {
+ delay = NLTIME_FROM_NS(35);
+ }
+ else if (m_D() != m_last_D)
+ {
+ if (m_last_D)
+ {
+ delay = NLTIME_FROM_NS(28);
+ }
+ else
+ {
+ delay = NLTIME_FROM_NS(35);
+ }
+ }
+ else if (m_EQ() != m_last_EQ)
+ {
+ if (m_last_EQ)
+ {
+ delay = NLTIME_FROM_NS(27);
+ }
+ else
+ {
+ delay = NLTIME_FROM_NS(28);
+ }
+ }
+
+ uint_fast8_t q = m_last_Q;
+
+ if (!m_CQ())
+ {
+ if (m_EQ())
+ {
+ q = 0;
+ }
+ else
+ {
+ q = m_D() << a;
+ }
+ }
+ else if(!m_EQ())
+ {
+ q &= ~(1 << a);
+ q |= (m_D() << a);
+ }
+
+ m_last_CQ = m_CQ();
+ m_last_EQ = m_EQ();
+ m_last_D = m_D();
+ m_last_A = a;
+ m_last_Q = q;
+
+ for (std::size_t i=0; i<8; i++)
+ m_Q[i].push((q >> i) & 1, delay);
+ }
+
+ NETLIB_DEVICE_IMPL(9334)
+ NETLIB_DEVICE_IMPL(9334_dip)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_dm9334.h b/src/lib/netlist/devices/nld_dm9334.h
new file mode 100644
index 00000000000..813ea225add
--- /dev/null
+++ b/src/lib/netlist/devices/nld_dm9334.h
@@ -0,0 +1,82 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_DM9334.h
+ *
+ * DM9334: 8-Bit Addressable Latch
+ *
+ * +--------------+
+ * A0 |1 ++ 16| VCC
+ * A1 |2 15| /C
+ * A2 |3 14| /E
+ * Q0 |4 DM9334 13| D
+ * Q1 |5 12| Q7
+ * Q2 |6 11| Q6
+ * Q3 |7 10| Q5
+ * GND |8 9| Q4
+ * +--------------+
+ *
+ * +---+---++---++---+---+---++---+---+---+---+---+---+---+---+
+ * | C | E || D || A0| A1| A2|| Q0| Q1| Q2| Q3| Q4| Q5| Q6| Q7|
+ * +===+===++===++===+===+===++===+===+===+===+===+===+===+===+
+ * | 1 | 0 || X || X | X | X || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * +---+---++---++---+---+---++---+---+---+---+---+---+---+---+
+ * | 1 | 1 || 0 || 0 | 0 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 0 | 0 | 0 || 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 0 || 0 | 0 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 0 | 0 | 1 || 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 0 || 0 | 1 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 0 | 1 | 0 || 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 0 || 0 | 1 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 0 | 1 | 1 || 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 0 || 1 | 0 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 1 | 0 | 0 || 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
+ * | 1 | 1 || 0 || 1 | 0 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 1 | 0 | 1 || 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
+ * | 1 | 1 || 0 || 1 | 1 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 1 | 1 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
+ * | 1 | 1 || 0 || 1 | 1 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+ * | 1 | 1 || 1 || 1 | 1 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+ * +---+---++---++---+---+---++---+---+---+---+---+---+---+---+
+ * | 0 | 0 || X || X | X | X || P | P | P | P | P | P | P | P |
+ * +---+---++---++---+---+---++---+---+---+---+---+---+---+---+
+ * | 0 | 1 || 0 || 0 | 0 | 0 || 0 | P | P | P | P | P | P | P |
+ * | 0 | 1 || 1 || 0 | 0 | 0 || 1 | P | P | P | P | P | P | P |
+ * | 0 | 1 || 0 || 0 | 0 | 1 || P | 0 | P | P | P | P | P | P |
+ * | 0 | 1 || 1 || 0 | 0 | 1 || P | 1 | P | P | P | P | P | P |
+ * | 0 | 1 || 0 || 0 | 1 | 0 || P | P | 0 | P | P | P | P | P |
+ * | 0 | 1 || 1 || 0 | 1 | 0 || P | P | 1 | P | P | P | P | P |
+ * | 0 | 1 || 0 || 0 | 1 | 1 || P | P | P | 0 | P | P | P | P |
+ * | 0 | 1 || 1 || 0 | 1 | 1 || P | P | P | 1 | P | P | P | P |
+ * | 0 | 1 || 0 || 1 | 0 | 0 || P | P | P | P | 0 | P | P | P |
+ * | 0 | 1 || 1 || 1 | 0 | 0 || P | P | P | P | 1 | P | P | P |
+ * | 0 | 1 || 0 || 1 | 0 | 1 || P | P | P | P | P | 0 | P | P |
+ * | 0 | 1 || 1 || 1 | 0 | 1 || P | P | P | P | P | 1 | P | P |
+ * | 0 | 1 || 0 || 1 | 1 | 0 || P | P | P | P | P | P | 0 | P |
+ * | 0 | 1 || 1 || 1 | 1 | 0 || P | P | P | P | P | P | 1 | P |
+ * | 0 | 1 || 0 || 1 | 1 | 1 || P | P | P | P | P | P | P | 0 |
+ * | 0 | 1 || 1 || 1 | 1 | 1 || P | P | P | P | P | P | P | 1 |
+ * +---+---++---++---+---+---++---+---+---+---+---+---+---+---+
+ *
+ * Naming convention attempts to follow Texas Instruments / National Semiconductor datasheet Literature Number SNOS382A
+ *
+ */
+
+#ifndef NLD_DM9334_H_
+#define NLD_DM9334_H_
+
+#include "nl_setup.h"
+
+#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \
+ NET_REGISTER_DEV(TTL_9334, name) \
+ NET_CONNECT(name, CQ, cCQ) \
+ NET_CONNECT(name, EQ, cEQ) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2)
+
+#define TTL_9334_DIP(name) \
+ NET_REGISTER_DEV(TTL_9334_DIP, name)
+
+#endif /* NLD_DM9334_H_ */
diff --git a/src/lib/netlist/devices/nld_system.cpp b/src/lib/netlist/devices/nld_system.cpp
index e3369e514e5..836e744fc6a 100644
--- a/src/lib/netlist/devices/nld_system.cpp
+++ b/src/lib/netlist/devices/nld_system.cpp
@@ -86,38 +86,6 @@ namespace netlist
{
}
- // ----------------------------------------------------------------------------------------
- // nld_d_to_a_proxy
- // ----------------------------------------------------------------------------------------
-
- void nld_d_to_a_proxy::reset()
- {
- //m_Q.initial(0.0);
- m_last_state = -1;
- m_RV.do_reset();
- m_is_timestep = m_RV.m_P.net().solver()->has_timestep_devices();
- m_RV.set(NL_FCONST(1.0) / logic_family().m_R_low, logic_family().m_low_V, 0.0);
- }
-
- NETLIB_UPDATE(d_to_a_proxy)
- {
- const int state = static_cast<int>(m_I());
- if (state != m_last_state)
- {
- m_last_state = state;
- const nl_double R = state ? logic_family().m_R_high : logic_family().m_R_low;
- const nl_double V = state ? logic_family().m_high_V : logic_family().m_low_V;
-
- // We only need to update the net first if this is a time stepping net
- if (m_is_timestep)
- {
- m_RV.update_dev();
- }
- m_RV.set(NL_FCONST(1.0) / R, V, 0.0);
- m_RV.m_P.schedule_after(NLTIME_FROM_NS(1));
- }
- }
-
// -----------------------------------------------------------------------------
// nld_res_sw
diff --git a/src/lib/netlist/devices/nld_tristate.cpp b/src/lib/netlist/devices/nld_tristate.cpp
new file mode 100644
index 00000000000..db21468685e
--- /dev/null
+++ b/src/lib/netlist/devices/nld_tristate.cpp
@@ -0,0 +1,76 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_tristate.cpp
+ *
+ */
+
+#include "nld_tristate.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+ NETLIB_OBJECT(tristate)
+ {
+ NETLIB_CONSTRUCTOR(tristate)
+ , m_CEQ(*this, {{ "CEQ1", "CEQ2" }})
+ , m_D(*this, {{ "D1", "D2" }})
+ , m_Q(*this, "Q")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 2> m_CEQ;
+ object_array_t<logic_input_t, 2> m_D;
+ logic_output_t m_Q;
+ };
+
+ NETLIB_OBJECT(tristate3)
+ {
+ NETLIB_CONSTRUCTOR(tristate3)
+ , m_CEQ(*this, {{ "CEQ1", "CEQ2", "CEQ3" }} )
+ , m_D(*this, {{ "D1", "D2", "D3" }} )
+ , m_Q(*this, "Q")
+ {
+ }
+
+ NETLIB_UPDATEI();
+
+ protected:
+ object_array_t<logic_input_t, 3> m_CEQ;
+ object_array_t<logic_input_t, 3> m_D;
+ logic_output_t m_Q;
+ };
+
+ NETLIB_UPDATE(tristate)
+ {
+ unsigned q = 0;
+ if (!m_CEQ[0]())
+ q |= m_D[0]();
+ if (!m_CEQ[1]())
+ q |= m_D[1]();
+
+ m_Q.push(q, NLTIME_FROM_NS(1));
+ }
+
+ NETLIB_UPDATE(tristate3)
+ {
+ unsigned q = 0;
+ if (!m_CEQ[0]())
+ q |= m_D[0]();
+ if (!m_CEQ[1]())
+ q |= m_D[1]();
+ if (!m_CEQ[2]())
+ q |= m_D[2]();
+
+ m_Q.push(q, NLTIME_FROM_NS(1));
+ }
+
+ NETLIB_DEVICE_IMPL(tristate)
+ NETLIB_DEVICE_IMPL(tristate3)
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_tristate.h b/src/lib/netlist/devices/nld_tristate.h
new file mode 100644
index 00000000000..604ae7f03fd
--- /dev/null
+++ b/src/lib/netlist/devices/nld_tristate.h
@@ -0,0 +1,31 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+/*
+ * nld_tristate.h
+ *
+ * tristate: Hack to merge two tri-stated outputs together
+ *
+ */
+
+#ifndef NLD_TRISTATE_H_
+#define NLD_TRISTATE_H_
+
+#include "nl_setup.h"
+
+#define TTL_TRISTATE(name, cCEQ1, cD1, cCEQ2, cD2) \
+ NET_REGISTER_DEV(TTL_TRISTATE, name) \
+ NET_CONNECT(name, CEQ1, cCEQ1) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, CEQ2, cCEQ2) \
+ NET_CONNECT(name, D2, cD2)
+
+#define TTL_TRISTATE3(name, cCEQ1, cD1, cCEQ2, cD2, cCEQ3, cD3) \
+ NET_REGISTER_DEV(TTL_TRISTATE3, name) \
+ NET_CONNECT(name, CEQ1, cCEQ1) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, CEQ2, cCEQ2) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, CEQ3, cCEQ3) \
+ NET_CONNECT(name, D3, cD3)
+
+#endif /* NLD_TRISTATE_H_ */
diff --git a/src/lib/netlist/devices/nld_truthtable.h b/src/lib/netlist/devices/nld_truthtable.h
index 759d19cf0c9..6fcd746578f 100644
--- a/src/lib/netlist/devices/nld_truthtable.h
+++ b/src/lib/netlist/devices/nld_truthtable.h
@@ -23,7 +23,7 @@
public: \
template <class C> \
NETLIB_NAME(cname)(C &owner, const pstring &name) \
- : nld_truthtable_t<nIN, nOUT>(owner, name, nullptr, &m_ttbl, m_desc) { } \
+ : nld_truthtable_t<nIN, nOUT>(owner, name, family_TTL(), &m_ttbl, m_desc) { } \
private: \
static truthtable_t m_ttbl; \
static const char *m_desc[]; \
diff --git a/src/lib/netlist/devices/nlid_proxy.cpp b/src/lib/netlist/devices/nlid_proxy.cpp
new file mode 100644
index 00000000000..6ecad8656a2
--- /dev/null
+++ b/src/lib/netlist/devices/nlid_proxy.cpp
@@ -0,0 +1,101 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nlid_proxy.cpp
+ *
+ */
+
+//#include <memory>
+#include "nlid_proxy.h"
+#include "solver/nld_solver.h"
+//#include "plib/pstream.h"
+//#include "plib/pfmtlog.h"
+//#include "nld_log.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+
+ // ----------------------------------------------------------------------------------------
+ // nld_d_to_a_proxy
+ // ----------------------------------------------------------------------------------------
+
+ nld_d_to_a_proxy::nld_d_to_a_proxy(netlist_t &anetlist, const pstring &name, logic_output_t *out_proxied)
+ : nld_base_d_to_a_proxy(anetlist, name, out_proxied, m_RV.m_P)
+ , m_GNDHack(*this, "_Q")
+ , m_RV(*this, "RV")
+ , m_last_state(*this, "m_last_var", -1)
+ , m_is_timestep(false)
+ {
+ const char *power_syms[3][2] ={ {"VCC", "VEE"}, {"VCC", "GND"}, {"VDD", "VSS"}};
+ //register_sub(m_RV);
+ //register_term("1", m_RV.m_P);
+ //register_term("2", m_RV.m_N);
+
+ register_subalias("Q", m_RV.m_P);
+
+ connect_late(m_RV.m_N, m_GNDHack);
+ bool f = false;
+ for (int i = 0; i < 3; i++)
+ {
+ pstring devname = out_proxied->device().name();
+ auto tp = netlist().setup().find_terminal(devname + "." + power_syms[i][0], detail::device_object_t::type_t::INPUT, false);
+ auto tn = netlist().setup().find_terminal(devname + "." + power_syms[i][1], detail::device_object_t::type_t::INPUT, false);
+ if (tp != nullptr && tn != nullptr)
+ {
+ /* alternative logic */
+ f = true;
+ }
+ }
+ if (!f)
+ netlist().log().warning("D/A Proxy: Found no valid combination of power terminals on device {1}", out_proxied->device().name());
+ else
+ netlist().log().warning("D/A Proxy: Found power terminals on device {1}", out_proxied->device().name());
+#if (0)
+ printf("%s %s\n", out_proxied->name().cstr(), out_proxied->device().name().cstr());
+ auto x = netlist().setup().find_terminal(out_proxied->name(), detail::device_object_t::type_t::OUTPUT, false);
+ if (x) printf("==> %s\n", x->name().cstr());
+#endif
+ }
+
+
+ void nld_d_to_a_proxy::reset()
+ {
+ // FIXME: Variable voltage
+ double supply_V = logic_family().fixed_V();
+ if (supply_V == 0.0) supply_V = 5.0;
+
+ //m_Q.initial(0.0);
+ m_last_state = -1;
+ m_RV.do_reset();
+ m_is_timestep = m_RV.m_P.net().solver()->has_timestep_devices();
+ m_RV.set(NL_FCONST(1.0) / logic_family().R_low(),
+ logic_family().low_V(0.0, supply_V), 0.0);
+ }
+
+ NETLIB_UPDATE(d_to_a_proxy)
+ {
+ const int state = static_cast<int>(m_I());
+ if (state != m_last_state)
+ {
+ // FIXME: Variable voltage
+ double supply_V = logic_family().fixed_V();
+ if (supply_V == 0.0) supply_V = 5.0;
+ m_last_state = state;
+ const nl_double R = state ? logic_family().R_high() : logic_family().R_low();
+ const nl_double V = state ? logic_family().high_V(0.0, supply_V) : logic_family().low_V(0.0, supply_V);
+
+ // We only need to update the net first if this is a time stepping net
+ if (m_is_timestep)
+ {
+ m_RV.update_dev();
+ }
+ m_RV.set(NL_FCONST(1.0) / R, V, 0.0);
+ m_RV.m_P.schedule_after(NLTIME_FROM_NS(1));
+ }
+ }
+
+
+ } //namespace devices
+} // namespace netlist
diff --git a/src/lib/netlist/devices/nlid_proxy.h b/src/lib/netlist/devices/nlid_proxy.h
new file mode 100644
index 00000000000..bcda8fa4e2a
--- /dev/null
+++ b/src/lib/netlist/devices/nlid_proxy.h
@@ -0,0 +1,184 @@
+// license:GPL-2.0+
+// copyright-holders:Couriersud
+/*
+ * nlid_proxy.h
+ *
+ * netlist proxy devices
+ *
+ * This file contains internal headers
+ */
+
+#ifndef NLID_PROXY_H_
+#define NLID_PROXY_H_
+
+#include <vector>
+
+#include "nl_setup.h"
+#include "nl_base.h"
+#include "nl_factory.h"
+#include "analog/nld_twoterm.h"
+
+namespace netlist
+{
+ namespace devices
+ {
+
+ // -----------------------------------------------------------------------------
+ // nld_base_proxy
+ // -----------------------------------------------------------------------------
+
+ NETLIB_OBJECT(base_proxy)
+ {
+ public:
+ nld_base_proxy(netlist_t &anetlist, const pstring &name,
+ logic_t *inout_proxied, detail::core_terminal_t *proxy_inout)
+ : device_t(anetlist, name)
+ {
+ m_logic_family = inout_proxied->logic_family();
+ m_term_proxied = inout_proxied;
+ m_proxy_term = proxy_inout;
+ }
+
+ virtual ~nld_base_proxy() {}
+
+ logic_t &term_proxied() const { return *m_term_proxied; }
+ detail::core_terminal_t &proxy_term() const { return *m_proxy_term; }
+
+ protected:
+ const logic_family_desc_t *m_logic_family;
+
+ virtual const logic_family_desc_t &logic_family() const
+ {
+ return *m_logic_family;
+ }
+
+ private:
+ logic_t *m_term_proxied;
+ detail::core_terminal_t *m_proxy_term;
+ };
+
+ // -----------------------------------------------------------------------------
+ // nld_a_to_d_proxy
+ // -----------------------------------------------------------------------------
+
+ NETLIB_OBJECT_DERIVED(a_to_d_proxy, base_proxy)
+ {
+ public:
+ nld_a_to_d_proxy(netlist_t &anetlist, const pstring &name, logic_input_t *in_proxied)
+ : nld_base_proxy(anetlist, name, in_proxied, &m_I)
+ , m_I(*this, "I")
+ , m_Q(*this, "Q")
+ {
+ }
+
+ virtual ~nld_a_to_d_proxy() {}
+
+ analog_input_t m_I;
+ logic_output_t m_Q;
+
+ protected:
+
+ NETLIB_RESETI() { }
+
+ NETLIB_UPDATEI()
+ {
+ nl_assert(m_logic_family != nullptr);
+ // FIXME: Variable supply voltage!
+ double supply_V = logic_family().fixed_V();
+ if (supply_V == 0.0) supply_V = 5.0;
+
+ if (m_I.Q_Analog() > logic_family().high_thresh_V(0.0, supply_V))
+ m_Q.push(1, NLTIME_FROM_NS(1));
+ else if (m_I.Q_Analog() < logic_family().low_thresh_V(0.0, supply_V))
+ m_Q.push(0, NLTIME_FROM_NS(1));
+ else
+ {
+ // do nothing
+ }
+ }
+ private:
+ };
+
+ // -----------------------------------------------------------------------------
+ // nld_base_d_to_a_proxy
+ // -----------------------------------------------------------------------------
+
+ NETLIB_OBJECT_DERIVED(base_d_to_a_proxy, base_proxy)
+ {
+ public:
+ virtual ~nld_base_d_to_a_proxy() {}
+
+ virtual logic_input_t &in() { return m_I; }
+
+ protected:
+ nld_base_d_to_a_proxy(netlist_t &anetlist, const pstring &name,
+ logic_output_t *out_proxied, detail::core_terminal_t &proxy_out)
+ : nld_base_proxy(anetlist, name, out_proxied, &proxy_out)
+ , m_I(*this, "I")
+ {
+ }
+
+ logic_input_t m_I;
+
+ private:
+ };
+
+ NETLIB_OBJECT_DERIVED(d_to_a_proxy, base_d_to_a_proxy)
+ {
+ public:
+ nld_d_to_a_proxy(netlist_t &anetlist, const pstring &name, logic_output_t *out_proxied);
+ virtual ~nld_d_to_a_proxy() {}
+
+ protected:
+
+ NETLIB_RESETI();
+ NETLIB_UPDATEI();
+
+ private:
+ analog_output_t m_GNDHack; // FIXME: Long term, we need to connect proxy gnd to device gnd
+ NETLIB_SUB(twoterm) m_RV;
+ state_var<int> m_last_state;
+ bool m_is_timestep;
+ };
+
+
+ class factory_lib_entry_t : public base_factory_t
+ {
+ P_PREVENT_COPYING(factory_lib_entry_t)
+ public:
+
+ factory_lib_entry_t(setup_t &setup, const pstring &name, const pstring &classname,
+ const pstring &def_param)
+ : base_factory_t(name, classname, def_param), m_setup(setup) { }
+
+ class wrapper : public device_t
+ {
+ public:
+ wrapper(const pstring &devname, netlist_t &anetlist, const pstring &name)
+ : device_t(anetlist, name), m_devname(devname)
+ {
+ anetlist.setup().namespace_push(name);
+ anetlist.setup().include(m_devname);
+ anetlist.setup().namespace_pop();
+ }
+ protected:
+ NETLIB_RESETI() { }
+ NETLIB_UPDATEI() { }
+
+ pstring m_devname;
+ };
+
+ plib::owned_ptr<device_t> Create(netlist_t &anetlist, const pstring &name) override
+ {
+ return plib::owned_ptr<device_t>::Create<wrapper>(this->name(), anetlist, name);
+ }
+
+ private:
+ setup_t &m_setup;
+ };
+
+
+ } //namespace devices
+} // namespace netlist
+
+#endif /* NLD_PROXY_H_ */
diff --git a/src/lib/netlist/devices/nlid_system.h b/src/lib/netlist/devices/nlid_system.h
index f16dc42b298..89251264fa7 100644
--- a/src/lib/netlist/devices/nlid_system.h
+++ b/src/lib/netlist/devices/nlid_system.h
@@ -413,171 +413,6 @@ namespace netlist
state_var<netlist_sig_t> m_last_state;
};
- // -----------------------------------------------------------------------------
- // nld_base_proxy
- // -----------------------------------------------------------------------------
-
- NETLIB_OBJECT(base_proxy)
- {
- public:
- nld_base_proxy(netlist_t &anetlist, const pstring &name,
- logic_t *inout_proxied, detail::core_terminal_t *proxy_inout)
- : device_t(anetlist, name)
- {
- m_logic_family = inout_proxied->logic_family();
- m_term_proxied = inout_proxied;
- m_proxy_term = proxy_inout;
- }
-
- virtual ~nld_base_proxy() {}
-
- logic_t &term_proxied() const { return *m_term_proxied; }
- detail::core_terminal_t &proxy_term() const { return *m_proxy_term; }
-
- protected:
-
- virtual const logic_family_desc_t &logic_family() const
- {
- return *m_logic_family;
- }
-
- private:
- const logic_family_desc_t *m_logic_family;
- logic_t *m_term_proxied;
- detail::core_terminal_t *m_proxy_term;
- };
-
- // -----------------------------------------------------------------------------
- // nld_a_to_d_proxy
- // -----------------------------------------------------------------------------
-
- NETLIB_OBJECT_DERIVED(a_to_d_proxy, base_proxy)
- {
- public:
- nld_a_to_d_proxy(netlist_t &anetlist, const pstring &name, logic_input_t *in_proxied)
- : nld_base_proxy(anetlist, name, in_proxied, &m_I)
- , m_I(*this, "I")
- , m_Q(*this, "Q")
- {
- }
-
- virtual ~nld_a_to_d_proxy() {}
-
- analog_input_t m_I;
- logic_output_t m_Q;
-
- protected:
-
- NETLIB_RESETI() { }
-
- NETLIB_UPDATEI()
- {
- if (m_I.Q_Analog() > logic_family().m_high_thresh_V)
- m_Q.push(1, NLTIME_FROM_NS(1));
- else if (m_I.Q_Analog() < logic_family().m_low_thresh_V)
- m_Q.push(0, NLTIME_FROM_NS(1));
- else
- {
- // do nothing
- }
- }
- private:
- };
-
- // -----------------------------------------------------------------------------
- // nld_base_d_to_a_proxy
- // -----------------------------------------------------------------------------
-
- NETLIB_OBJECT_DERIVED(base_d_to_a_proxy, base_proxy)
- {
- public:
- virtual ~nld_base_d_to_a_proxy() {}
-
- virtual logic_input_t &in() { return m_I; }
-
- protected:
- nld_base_d_to_a_proxy(netlist_t &anetlist, const pstring &name,
- logic_output_t *out_proxied, detail::core_terminal_t &proxy_out)
- : nld_base_proxy(anetlist, name, out_proxied, &proxy_out)
- , m_I(*this, "I")
- {
- }
-
- logic_input_t m_I;
-
- private:
- };
-
- NETLIB_OBJECT_DERIVED(d_to_a_proxy, base_d_to_a_proxy)
- {
- public:
- nld_d_to_a_proxy(netlist_t &anetlist, const pstring &name, logic_output_t *out_proxied)
- : nld_base_d_to_a_proxy(anetlist, name, out_proxied, m_RV.m_P)
- , m_GNDHack(*this, "_Q")
- , m_RV(*this, "RV")
- , m_last_state(*this, "m_last_var", -1)
- , m_is_timestep(false)
- {
- //register_sub(m_RV);
- //register_term("1", m_RV.m_P);
- //register_term("2", m_RV.m_N);
-
- register_subalias("Q", m_RV.m_P);
-
- connect_late(m_RV.m_N, m_GNDHack);
- }
-
- virtual ~nld_d_to_a_proxy() {}
-
- protected:
-
- NETLIB_RESETI();
- NETLIB_UPDATEI();
-
- private:
- analog_output_t m_GNDHack; // FIXME: Long term, we need to connect proxy gnd to device gnd
- NETLIB_SUB(twoterm) m_RV;
- state_var<int> m_last_state;
- bool m_is_timestep;
- };
-
-
- class factory_lib_entry_t : public base_factory_t
- {
- P_PREVENT_COPYING(factory_lib_entry_t)
- public:
-
- factory_lib_entry_t(setup_t &setup, const pstring &name, const pstring &classname,
- const pstring &def_param)
- : base_factory_t(name, classname, def_param), m_setup(setup) { }
-
- class wrapper : public device_t
- {
- public:
- wrapper(const pstring &devname, netlist_t &anetlist, const pstring &name)
- : device_t(anetlist, name), m_devname(devname)
- {
- anetlist.setup().namespace_push(name);
- anetlist.setup().include(m_devname);
- anetlist.setup().namespace_pop();
- }
- protected:
- NETLIB_RESETI() { }
- NETLIB_UPDATEI() { }
-
- pstring m_devname;
- };
-
- plib::owned_ptr<device_t> Create(netlist_t &anetlist, const pstring &name) override
- {
- return plib::owned_ptr<device_t>::Create<wrapper>(this->name(), anetlist, name);
- }
-
- private:
- setup_t &m_setup;
- };
-
-
} //namespace devices
} // namespace netlist
diff --git a/src/lib/netlist/macro/nlm_cd4xxx.cpp b/src/lib/netlist/macro/nlm_cd4xxx.cpp
index 95fff085b9e..d169e2790f5 100644
--- a/src/lib/netlist/macro/nlm_cd4xxx.cpp
+++ b/src/lib/netlist/macro/nlm_cd4xxx.cpp
@@ -6,6 +6,7 @@
#include "devices/nld_system.h"
#include "devices/nld_4020.h"
#include "devices/nld_4066.h"
+#include "devices/nld_4316.h"
/*
* CD4001BC: Quad 2-Input NOR Buffered B Series Gate
@@ -31,14 +32,14 @@ static NETLIST_START(CD4001_DIP)
DUMMY_INPUT(VSS)
DUMMY_INPUT(VDD)
- DIPPINS( /* +--------------+ */
- s1.A, /* A1 |1 ++ 14| VCC */ VSS.I,
- s1.B, /* B1 |2 13| A6 */ s4.B,
- s1.Q, /* A2 |3 12| Y6 */ s4.A,
- s2.Q, /* Y2 |4 4001 11| A5 */ s4.Q,
- s2.A, /* A3 |5 10| Y5 */ s3.Q,
- s2.B, /* Y3 |6 9| A4 */ s3.B,
- VDD.I, /* GND |7 8| Y4 */ s3.A
+ DIPPINS( /* +--------------+ */
+ s1.A, /* A1 |1 ++ 14| VCC */ VSS.I,
+ s1.B, /* B1 |2 13| A6 */ s4.B,
+ s1.Q, /* A2 |3 12| Y6 */ s4.A,
+ s2.Q, /* Y2 |4 4001 11| A5 */ s4.Q,
+ s2.A, /* A3 |5 10| Y5 */ s3.Q,
+ s2.B, /* Y3 |6 9| A4 */ s3.B,
+ VDD.I, /* GND |7 8| Y4 */ s3.A
/* +--------------+ */
)
@@ -115,14 +116,14 @@ static NETLIST_START(CD4066_DIP)
PARAM(C.BASER, 270.0)
PARAM(D.BASER, 270.0)
- DIPPINS( /* +--------------+ */
- A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
- A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
- B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
- B.R.2, /* INOUTB |4 4066 11| INOUTD */ D.R.1,
- B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
- C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
- A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
+ DIPPINS( /* +--------------+ */
+ A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
+ A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
+ B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
+ B.R.2, /* INOUTB |4 4066 11| INOUTD */ D.R.1,
+ B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
+ C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
+ A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
/* +--------------+ */
)
NETLIST_END()
@@ -141,18 +142,47 @@ static NETLIST_START(CD4016_DIP)
PARAM(C.BASER, 1000.0)
PARAM(D.BASER, 1000.0)
- DIPPINS( /* +--------------+ */
- A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
- A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
- B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
- B.R.2, /* INOUTB |4 4016 11| INOUTD */ D.R.1,
- B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
- C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
- A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
+ DIPPINS( /* +--------------+ */
+ A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
+ A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
+ B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
+ B.R.2, /* INOUTB |4 4016 11| INOUTD */ D.R.1,
+ B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
+ C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
+ A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
/* +--------------+ */
)
NETLIST_END()
+static NETLIST_START(CD4316_DIP)
+ CD4316_GATE(A)
+ CD4316_GATE(B)
+ CD4316_GATE(C)
+ CD4316_GATE(D)
+
+ NET_C(A.E, B.E, C.E, D.E)
+ NET_C(A.PS.VDD, B.PS.VDD, C.PS.VDD, D.PS.VDD)
+ NET_C(A.PS.VSS, B.PS.VSS, C.PS.VSS, D.PS.VSS)
+
+ PARAM(A.BASER, 45.0)
+ PARAM(B.BASER, 45.0)
+ PARAM(C.BASER, 45.0)
+ PARAM(D.BASER, 45.0)
+
+ DIPPINS( /* +--------------+ */
+ A.R.2, /* 1Z |1 ++ 16| VCC */ A.PS.VDD,
+ A.R.1, /* 1Y |2 15| 1S */ A.S,
+ B.R.1, /* 2Y |3 14| 4S */ D.S,
+ B.R.2, /* 2Z |4 4316 13| 4Z */ D.R.2,
+ B.S, /* 2S |5 12| 4Y */ D.R.1,
+ C.S, /* 3S |6 11| 3Y */ C.R.1,
+ A.E, /* /E |7 10| 3Z */ C.R.2,
+ A.PS.VSS, /* GND |8 9| VEE */ VEE
+ /* +--------------+ */
+ )
+
+NETLIST_END()
+
NETLIST_START(CD4XXX_lib)
TRUTHTABLE_START(CD4001_NOR, 2, 1, "")
@@ -169,5 +199,6 @@ NETLIST_START(CD4XXX_lib)
LOCAL_LIB_ENTRY(CD4020_DIP)
LOCAL_LIB_ENTRY(CD4016_DIP)
LOCAL_LIB_ENTRY(CD4066_DIP)
+ LOCAL_LIB_ENTRY(CD4316_DIP)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_cd4xxx.h b/src/lib/netlist/macro/nlm_cd4xxx.h
index acc47f45d21..de10ff7a64d 100644
--- a/src/lib/netlist/macro/nlm_cd4xxx.h
+++ b/src/lib/netlist/macro/nlm_cd4xxx.h
@@ -41,6 +41,9 @@
#define CD4016_DIP(name) \
NET_REGISTER_DEV(CD4016_DIP, name)
+#define CD4316_DIP(name) \
+ NET_REGISTER_DEV(CD4016_DIP, name)
+
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/
diff --git a/src/lib/netlist/macro/nlm_opamp.cpp b/src/lib/netlist/macro/nlm_opamp.cpp
index e7571dfd910..08dc5f60b27 100644
--- a/src/lib/netlist/macro/nlm_opamp.cpp
+++ b/src/lib/netlist/macro/nlm_opamp.cpp
@@ -6,18 +6,18 @@
#include "devices/nld_system.h"
/*
- * Generic layout with 4 opamps, VCC on pint 4 and GND on pin 11
+ * Generic layout with 4 opamps, VCC on pin 4 and GND on pin 11
*/
static NETLIST_START(opamp_layout_4_4_11)
- DIPPINS( /* +--------------+ */
- A.OUT, /* |1 ++ 14| */ D.OUT,
- A.MINUS, /* |2 13| */ D.MINUS,
- A.PLUS, /* |3 12| */ D.PLUS,
- A.VCC, /* |4 11| */ A.GND,
- B.PLUS, /* |5 10| */ C.PLUS,
- B.MINUS, /* |6 9| */ C.MINUS,
- B.OUT, /* |7 8| */ C.OUT
+ DIPPINS( /* +--------------+ */
+ A.OUT, /* |1 ++ 14| */ D.OUT,
+ A.MINUS, /* |2 13| */ D.MINUS,
+ A.PLUS, /* |3 12| */ D.PLUS,
+ A.VCC, /* |4 11| */ A.GND,
+ B.PLUS, /* |5 10| */ C.PLUS,
+ B.MINUS, /* |6 9| */ C.MINUS,
+ B.OUT, /* |7 8| */ C.OUT
/* +--------------+ */
)
NET_C(A.GND, B.GND, C.GND, D.GND)
@@ -25,21 +25,100 @@ static NETLIST_START(opamp_layout_4_4_11)
NETLIST_END()
/*
- * Generic layout with 2 opamps, VCC on pint 8 and GND on pin 4
+ * Generic layout with 2 opamps, VCC on pin 8 and GND on pin 4
*/
static NETLIST_START(opamp_layout_2_8_4)
- DIPPINS( /* +--------------+ */
- A.OUT, /* |1 ++ 8| */ A.VCC,
- A.MINUS, /* |2 7| */ B.OUT,
- A.PLUS, /* |3 6| */ B.MINUS,
- A.GND, /* |4 5| */ B.PLUS
+ DIPPINS( /* +--------------+ */
+ A.OUT, /* |1 ++ 8| */ A.VCC,
+ A.MINUS, /* |2 7| */ B.OUT,
+ A.PLUS, /* |3 6| */ B.MINUS,
+ A.GND, /* |4 5| */ B.PLUS
/* +--------------+ */
)
NET_C(A.GND, B.GND)
NET_C(A.VCC, B.VCC)
NETLIST_END()
+/*
+ * Generic layout with 2 opamps, VCC+ on pins 9/13, VCC- on pin 4 and compensation
+ */
+
+static NETLIST_START(opamp_layout_2_13_9_4)
+ DIPPINS( /* +--------------+ */
+ A.MINUS, /* |1 ++ 14| */ A.N2,
+ A.PLUS, /* |2 13| */ A.VCC,
+ A.N1, /* |3 12| */ A.OUT,
+ A.GND, /* |4 11| */ NC,
+ B.N1, /* |5 10| */ B.OUT,
+ B.PLUS, /* |6 9| */ B.VCC,
+ B.MINUS /* |7 8| */ B.N2
+ /* +--------------+ */
+ )
+ NET_C(A.GND, B.GND)
+NETLIST_END()
+
+/*
+ * Generic layout with 1 opamp, VCC+ on pin 7, VCC- on pin 4 and compensation
+ */
+
+static NETLIST_START(opamp_layout_1_7_4)
+ DIPPINS( /* +--------------+ */
+ OFFSET.N1, /* |1 ++ 8| */ NC,
+ MINUS, /* |2 7| */ VCC.PLUS,
+ PLUS, /* |3 6| */ OUT,
+ VCC.MINUS, /* |4 5| */ OFFSET.N2
+ /* +--------------+ */
+ )
+ NET_C(A.GND, VCC.MINUS)
+ NET_C(A.VCC, VCC.PLUS)
+ NET_C(A.MINUS, MINUS)
+ NET_C(A.PLUS, PLUS)
+ NET_C(A.OUT, OUT)
+NETLIST_END()
+
+/*
+ * Generic layout with 1 opamp, VCC+ on pin 8, VCC- on pin 5 and compensation
+ */
+
+static NETLIST_START(opamp_layout_1_8_5)
+ DIPPINS( /* +--------------+ */
+ NC.1, /* |1 10| */ NC.3,
+ OFFSET.N1, /* |2 9| */ NC.2,
+ MINUS, /* |3 8| */ VCC.PLUS,
+ PLUS, /* |4 7| */ OUT,
+ VCC.MINUS, /* |5 6| */ OFFSET.N2
+ /* +--------------+ */
+ )
+ NET_C(A.GND, VCC.MINUS)
+ NET_C(A.VCC, VCC.PLUS)
+ NET_C(A.MINUS, MINUS)
+ NET_C(A.PLUS, PLUS)
+ NET_C(A.OUT, OUT)
+NETLIST_END()
+
+/*
+ * Generic layout with 1 opamp, VCC+ on pin 11, VCC- on pin 6 and compensation
+ */
+
+static NETLIST_START(opamp_layout_1_11_6)
+ DIPPINS( /* +--------------+ */
+ NC.1, /* |1 ++ 14| */ NC.7,
+ NC.2, /* |2 13| */ NC.6,
+ OFFSET.N1, /* |3 12| */ NC.5,
+ MINUS, /* |4 11| */ VCC.PLUS,
+ PLUS, /* |5 10| */ OUT,
+ VCC.MINUS, /* |6 9| */ OFFSET.N2,
+ NC.3, /* |7 8| */ NC.4
+ /* +--------------+ */
+ )
+ NET_C(A.GND, VCC.MINUS)
+ NET_C(A.VCC, VCC.PLUS)
+ NET_C(A.MINUS, MINUS)
+ NET_C(A.PLUS, PLUS)
+ NET_C(A.OUT, OUT)
+NETLIST_END()
+
static NETLIST_START(MB3614_DIP)
OPAMP(A, "MB3614")
OPAMP(B, "MB3614")
@@ -68,17 +147,67 @@ static NETLIST_START(LM358_DIP)
NETLIST_END()
+static NETLIST_START(UA741_DIP8)
+ OPAMP(A, "UA741")
+
+ INCLUDE(opamp_layout_1_7_4)
+
+NETLIST_END()
+
+static NETLIST_START(UA741_DIP10)
+ OPAMP(A, "UA741")
+
+ INCLUDE(opamp_layout_1_8_5)
+
+NETLIST_END()
+
+static NETLIST_START(UA741_DIP14)
+ OPAMP(A, "UA741")
+
+ INCLUDE(opamp_layout_1_11_6)
+
+NETLIST_END()
+
+static NETLIST_START(LM747_DIP)
+ OPAMP(A, "LM747")
+ OPAMP(B, "LM747")
+
+ INCLUDE(opamp_layout_2_13_9_4)
+ NET_C(A.VCC, B.VCC)
+
+NETLIST_END()
+
+static NETLIST_START(LM747A_DIP)
+ OPAMP(A, "LM747A")
+ OPAMP(B, "LM747A")
+
+ INCLUDE(opamp_layout_2_13_9_4)
+ NET_C(A.VCC, B.VCC)
+
+NETLIST_END()
+
NETLIST_START(OPAMP_lib)
LOCAL_LIB_ENTRY(opamp_layout_4_4_11)
LOCAL_LIB_ENTRY(opamp_layout_2_8_4)
+ LOCAL_LIB_ENTRY(opamp_layout_2_13_9_4)
+ LOCAL_LIB_ENTRY(opamp_layout_1_7_4)
+ LOCAL_LIB_ENTRY(opamp_layout_1_8_5)
+ LOCAL_LIB_ENTRY(opamp_layout_1_11_6)
NET_MODEL("LM324 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=500k SLEW=0.3M RI=1000k RO=50 DAB=0.00075)")
NET_MODEL("LM358 OPAMP(TYPE=3 VLH=2.0 VLL=0.2 FPF=5 UGF=500k SLEW=0.3M RI=1000k RO=50 DAB=0.001)")
NET_MODEL("MB3614 OPAMP(TYPE=3 VLH=1.4 VLL=0.02 FPF=2 UGF=500k SLEW=0.6M RI=1000k RO=50 DAB=0.0002)")
+ NET_MODEL("UA741 OPAMP(TYPE=3 VLH=1.0 VLL=1.0 FPF=5 UGF=1000k SLEW=0.5M RI=2000k RO=75 DAB=0.0017)")
+ NET_MODEL("LM747 OPAMP(TYPE=3 VLH=1.0 VLL=1.0 FPF=5 UGF=1000k SLEW=0.5M RI=2000k RO=50 DAB=0.0017)")
+ NET_MODEL("LM747A OPAMP(TYPE=3 VLH=2.0 VLL=2.0 FPF=5 UGF=1000k SLEW=0.7M RI=6000k RO=50 DAB=0.0015)")
LOCAL_LIB_ENTRY(MB3614_DIP)
LOCAL_LIB_ENTRY(LM324_DIP)
LOCAL_LIB_ENTRY(LM358_DIP)
-
+ LOCAL_LIB_ENTRY(UA741_DIP8)
+ LOCAL_LIB_ENTRY(UA741_DIP10)
+ LOCAL_LIB_ENTRY(UA741_DIP14)
+ LOCAL_LIB_ENTRY(LM747_DIP)
+ LOCAL_LIB_ENTRY(LM747A_DIP)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_other.cpp b/src/lib/netlist/macro/nlm_other.cpp
index 68c0ea57d36..84a3af4dc04 100644
--- a/src/lib/netlist/macro/nlm_other.cpp
+++ b/src/lib/netlist/macro/nlm_other.cpp
@@ -36,7 +36,7 @@ static NETLIST_START(MC14584B_DIP)
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.Q, /* Y1 |2 13| A6 */ s6.A,
s2.A, /* A2 |3 12| Y6 */ s6.Q,
- s2.Q, /* Y2 |4 7416 11| A5 */ s5.A,
+ s2.Q, /* Y2 |4 MC14584B 11| A5 */ s5.A,
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
@@ -49,7 +49,8 @@ NETLIST_START(otheric_lib)
TT_HEAD(" A | Q ")
TT_LINE(" 0 | 1 |100")
TT_LINE(" 1 | 0 |100")
- TT_FAMILY("FAMILY(IVL=2.1 IVH=2.7 OVL=0.05 OVH=4.95 ORL=10.0 ORH=10.0)")
+ // 2.1V negative going and 2.7V positive going at 5V
+ TT_FAMILY("FAMILY(FV=0 IVL=0.42 IVH=0.54 OVL=0.05 OVH=0.05 ORL=10.0 ORH=10.0)")
TRUTHTABLE_END()
LOCAL_LIB_ENTRY(MC14584B_DIP)
diff --git a/src/lib/netlist/macro/nlm_ttl74xx.cpp b/src/lib/netlist/macro/nlm_ttl74xx.cpp
index 646ae44a86b..2120d88eb3f 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx.cpp
+++ b/src/lib/netlist/macro/nlm_ttl74xx.cpp
@@ -540,6 +540,44 @@ static NETLIST_START(TTL_7486_DIP)
)
NETLIST_END()
+/*
+ * DM74260: Dual 5-Input NOR Gates
+ * _________
+ * Y = A+B+C+D+E
+ * +---+---+---+---+---++---+
+ * | A | B | B | B | B || Y |
+ * +===+===+===+===+===++===+
+ * | 0 | 0 | 0 | 0 | 0 || 1 |
+ * | 0 | 0 | 0 | 0 | 1 || 0 |
+ * | 0 | 0 | 0 | 1 | 0 || 0 |
+ * | 0 | 0 | 1 | 0 | 0 || 0 |
+ * | 0 | 1 | 0 | 0 | 0 || 0 |
+ * | 1 | 0 | 0 | 0 | 0 || 0 |
+ * +---+---+---+---+---++---+
+ *
+ * Naming conventions follow Texas Instruments datasheet
+ *
+ */
+
+static NETLIST_START(TTL_74260_DIP)
+ TTL_74260_GATE(s1)
+ TTL_74260_GATE(s2)
+
+ DUMMY_INPUT(GND)
+ DUMMY_INPUT(VCC)
+
+ DIPPINS( /* +--------------+ */
+ s1.C, /* C1 |1 ++ 14| VCC */ VCC.I,
+ s1.D, /* D1 |2 13| B1 */ s1.B,
+ s1.E, /* E1 |3 12| A1 */ s1.A,
+ s2.E, /* E2 |4 74260 11| D2 */ s2.D,
+ s1.Q, /* Y1 |5 10| C2 */ s2.C,
+ s2.Q, /* Y2 |6 9| B2 */ s2.B,
+ GND.I, /* GND |7 8| A2 */ s2.A
+ /* +--------------+ */
+ )
+NETLIST_END()
+
NETLIST_START(TTL74XX_lib)
TRUTHTABLE_START(TTL_7400_GATE, 2, 1, "")
@@ -788,6 +826,28 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
+ TRUTHTABLE_START(TTL_74260_GATE, 5, 1, "")
+ TT_HEAD("A,B,C,D,E|Q ")
+ TT_LINE("0,0,0,0,0|1|10")
+ TT_LINE("X,X,X,X,1|0|12")
+ TT_LINE("X,X,X,1,X|0|12")
+ TT_LINE("X,X,1,X,X|0|12")
+ TT_LINE("X,1,X,X,X|0|12")
+ TT_LINE("1,X,X,X,X|0|12")
+ TT_FAMILY("74XX")
+ TRUTHTABLE_END()
+
+ TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "A,B,C,D,E")
+ TT_HEAD("A,B,C,D,E|Q ")
+ TT_LINE("0,0,0,0,0|1|10")
+ TT_LINE("X,X,X,X,1|0|12")
+ TT_LINE("X,X,X,1,X|0|12")
+ TT_LINE("X,X,1,X,X|0|12")
+ TT_LINE("X,1,X,X,X|0|12")
+ TT_LINE("1,X,X,X,X|0|12")
+ TT_FAMILY("74XX")
+ TRUTHTABLE_END()
+
LOCAL_LIB_ENTRY(TTL_7400_DIP)
LOCAL_LIB_ENTRY(TTL_7402_DIP)
LOCAL_LIB_ENTRY(TTL_7404_DIP)
@@ -802,4 +862,5 @@ NETLIST_START(TTL74XX_lib)
LOCAL_LIB_ENTRY(TTL_7432_DIP)
LOCAL_LIB_ENTRY(TTL_7437_DIP)
LOCAL_LIB_ENTRY(TTL_7486_DIP)
+ LOCAL_LIB_ENTRY(TTL_74260_DIP)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h
index 54b9dfa6e44..44b3db63bd3 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx.h
+++ b/src/lib/netlist/macro/nlm_ttl74xx.h
@@ -185,6 +185,21 @@
#define TTL_7486_DIP(name) \
NET_REGISTER_DEV(TTL_7486_DIP, name)
+
+#define TTL_74260_GATE(name) \
+ NET_REGISTER_DEV(TTL_74260_GATE, name)
+
+#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \
+ NET_REGISTER_DEV(TTL_74260_NOR, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, E, cE)
+
+#define TTL_74260_DIP(name) \
+ NET_REGISTER_DEV(TTL_74260_DIP, name)
+
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/
diff --git a/src/lib/netlist/nl_base.cpp b/src/lib/netlist/nl_base.cpp
index d8a01612e25..76ce59db5ac 100644
--- a/src/lib/netlist/nl_base.cpp
+++ b/src/lib/netlist/nl_base.cpp
@@ -15,6 +15,7 @@
#include "nl_base.h"
#include "devices/nlid_system.h"
+#include "devices/nlid_proxy.h"
namespace netlist
{
@@ -57,11 +58,12 @@ class logic_family_ttl_t : public logic_family_desc_t
public:
logic_family_ttl_t() : logic_family_desc_t()
{
- m_low_thresh_V = 0.8;
- m_high_thresh_V = 2.0;
+ m_fixed_V = 5.0;
+ m_low_thresh_PCNT = 0.8 / 5.0;
+ m_high_thresh_PCNT = 2.0 / 5.0;
// m_low_V - these depend on sinked/sourced current. Values should be suitable for typical applications.
- m_low_V = 0.1;
- m_high_V = 4.0;
+ m_low_VO = 0.1;
+ m_high_VO = 1.0; // 4.0
m_R_low = 1.0;
m_R_high = 130.0;
}
@@ -76,11 +78,12 @@ class logic_family_cd4xxx_t : public logic_family_desc_t
public:
logic_family_cd4xxx_t() : logic_family_desc_t()
{
- m_low_thresh_V = 0.8;
- m_high_thresh_V = 2.0;
+ m_fixed_V = 0.0;
+ m_low_thresh_PCNT = 1.5 / 5.0;
+ m_high_thresh_PCNT = 3.5 / 5.0;
// m_low_V - these depend on sinked/sourced current. Values should be suitable for typical applications.
- m_low_V = 0.05;
- m_high_V = 4.95;
+ m_low_VO = 0.05;
+ m_high_VO = 0.05; // 4.95
m_R_low = 10.0;
m_R_high = 10.0;
}
@@ -464,26 +467,7 @@ void netlist_t::print_stats() const
}
}
-// ----------------------------------------------------------------------------------------
-// Parameters ...
-// ----------------------------------------------------------------------------------------
-template <typename C, param_t::param_type_t T>
-param_template_t<C, T>::param_template_t(device_t &device, const pstring name, const C val)
-: param_t(T, device, device.name() + "." + name)
-, m_param(val)
-{
- /* pstrings not yet supported, these need special logic */
- if (T != param_t::STRING && T != param_t::MODEL)
- netlist().save(*this, m_param, "m_param");
- device.setup().register_and_set_param(device.name() + "." + name, *this);
-}
-
-template class param_template_t<double, param_t::DOUBLE>;
-template class param_template_t<int, param_t::INTEGER>;
-template class param_template_t<bool, param_t::LOGIC>;
-template class param_template_t<pstring, param_t::STRING>;
-template class param_template_t<pstring, param_t::MODEL>;
// ----------------------------------------------------------------------------------------
// core_device_t
@@ -904,13 +888,21 @@ logic_input_t::logic_input_t(core_device_t &dev, const pstring &aname)
}
// ----------------------------------------------------------------------------------------
-// param_t & friends
+// Parameters ...
// ----------------------------------------------------------------------------------------
param_t::param_t(const param_type_t atype, device_t &device, const pstring &name)
- : device_object_t(device, name, PARAM)
+ : device_object_t(device, device.name() + "." + name, PARAM)
, m_param_type(atype)
{
+ device.setup().register_param(this->name(), *this);
+}
+
+void param_t::update_param()
+{
+ device().update_param();
+ if (device().needs_update_after_param_change())
+ device().update_dev();
}
const pstring param_model_t::model_type()
@@ -920,6 +912,39 @@ const pstring param_model_t::model_type()
return m_map["COREMODEL"];
}
+param_str_t::param_str_t(device_t &device, const pstring name, const pstring val)
+: param_t(param_t::STRING, device, name)
+{
+ m_param = device.setup().get_initial_param_val(this->name(),val);
+}
+
+param_double_t::param_double_t(device_t &device, const pstring name, const double val)
+: param_t(param_t::DOUBLE, device, name)
+{
+ m_param = device.setup().get_initial_param_val(this->name(),val);
+ netlist().save(*this, m_param, "m_param");
+}
+
+param_int_t::param_int_t(device_t &device, const pstring name, const int val)
+: param_t(param_t::INTEGER, device, name)
+{
+ m_param = device.setup().get_initial_param_val(this->name(),val);
+ netlist().save(*this, m_param, "m_param");
+}
+
+param_logic_t::param_logic_t(device_t &device, const pstring name, const bool val)
+: param_t(param_t::LOGIC, device, name)
+{
+ m_param = device.setup().get_initial_param_val(this->name(),val);
+ netlist().save(*this, m_param, "m_param");
+}
+
+param_ptr_t::param_ptr_t(device_t &device, const pstring name, uint8_t * val)
+: param_t(param_t::POINTER, device, name)
+{
+ m_param = val; //device.setup().get_initial_param_val(this->name(),val);
+ //netlist().save(*this, m_param, "m_param");
+}
const pstring param_model_t::model_value_str(const pstring &entity)
{
@@ -935,6 +960,12 @@ nl_double param_model_t::model_value(const pstring &entity)
return netlist().setup().model_value(m_map, entity);
}
+std::unique_ptr<plib::pistream> param_data_t::stream()
+{
+ return device().netlist().setup().get_data_stream(Value());
+}
+
+
namespace devices
{
diff --git a/src/lib/netlist/nl_base.h b/src/lib/netlist/nl_base.h
index 55b1ef009b6..f72665c62bc 100644
--- a/src/lib/netlist/nl_base.h
+++ b/src/lib/netlist/nl_base.h
@@ -21,6 +21,7 @@
#include "plib/pdynlib.h"
#include "plib/pstate.h"
#include "plib/pfmtlog.h"
+#include "plib/pstream.h"
// ----------------------------------------------------------------------------------------
// Type definitions
@@ -125,6 +126,7 @@ class NETLIB_NAME(name) : public device_t
#define NETLIB_SUBXX(chip) std::unique_ptr< nld_ ## chip >
#define NETLIB_UPDATE(chip) void NETLIB_NAME(chip) :: update(void) NL_NOEXCEPT
+#define NETLIB_PARENT_UPDATE(chip) NETLIB_NAME(chip) :: update();
#define NETLIB_RESET(chip) void NETLIB_NAME(chip) :: reset(void)
@@ -226,12 +228,21 @@ namespace netlist
virtual plib::owned_ptr<devices::nld_base_d_to_a_proxy> create_d_a_proxy(netlist_t &anetlist, const pstring &name,
logic_output_t *proxied) const = 0;
- nl_double m_low_thresh_V; //!< low input threshhold. If the input voltage is below this value, a "0" input is signalled
- nl_double m_high_thresh_V; //!< high input threshhold. If the input voltage is above this value, a "0" input is signalled
- nl_double m_low_V; //!< low output voltage. This voltage is output if the ouput is "0"
- nl_double m_high_V; //!< high output voltage. This voltage is output if the ouput is "1"
- nl_double m_R_low; //!< low output resistance. Value of series resistor used for low output
- nl_double m_R_high; //!< high output resistance. Value of series resistor used for high output
+ double fixed_V() const { return m_fixed_V; }
+ double low_thresh_V(const double VN, const double VP) const { return VN + (VP - VN) * m_low_thresh_PCNT; }
+ double high_thresh_V(const double VN, const double VP) const { return VN + (VP - VN) * m_high_thresh_PCNT; }
+ double low_V(const double VN, const double VP) const { return VN + m_low_VO; }
+ double high_V(const double VN, const double VP) const { return VP - m_high_VO; }
+ double R_low() const { return m_R_low; }
+ double R_high() const { return m_R_high; }
+
+ double m_fixed_V; //!< For variable voltage families, specify 0. For TTL this would be 5. */
+ double m_low_thresh_PCNT; //!< low input threshhold offset. If the input voltage is below this value times supply voltage, a "0" input is signalled
+ double m_high_thresh_PCNT; //!< high input threshhold offset. If the input voltage is above the value times supply voltage, a "0" input is signalled
+ double m_low_VO; //!< low output voltage offset. This voltage is output if the ouput is "0"
+ double m_high_VO; //!< high output voltage offset. The supply voltage minus this offset is output if the ouput is "1"
+ double m_R_low; //!< low output resistance. Value of series resistor used for low output
+ double m_R_high; //!< high output resistance. Value of series resistor used for high output
};
/*! Base class for devices, terminals, outputs and inputs which support
@@ -828,11 +839,11 @@ namespace netlist
public:
enum param_type_t {
- MODEL,
STRING,
DOUBLE,
INTEGER,
- LOGIC
+ LOGIC,
+ POINTER // Special-case which is always initialized at MAME startup time
};
param_t(const param_type_t atype, device_t &device, const pstring &name);
@@ -840,36 +851,85 @@ namespace netlist
param_type_t param_type() const { return m_param_type; }
+ protected:
+ void update_param();
+
+ template<typename C>
+ void set(C &p, const C v)
+ {
+ if (p != v)
+ {
+ p = v;
+ update_param();
+ }
+ }
+
private:
const param_type_t m_param_type;
};
- template <typename C, param_t::param_type_t T>
- class param_template_t : public param_t
+ class param_ptr_t final: public param_t
{
- P_PREVENT_COPYING(param_template_t)
public:
- param_template_t(device_t &device, const pstring name, const C val);
+ param_ptr_t(device_t &device, const pstring name, std::uint8_t* val);
+ std::uint8_t * operator()() const { return m_param; }
+ void setTo(std::uint8_t *param) { set(m_param, param); }
+ private:
+ std::uint8_t* m_param;
+ };
- const C operator()() const { return Value(); }
+ class param_logic_t final: public param_t
+ {
+ public:
+ param_logic_t(device_t &device, const pstring name, const bool val);
+ bool operator()() const { return m_param; }
+ void setTo(const bool &param) { set(m_param, param); }
+ private:
+ bool m_param;
+ };
- void setTo(const C &param);
- void initial(const C &val) { m_param = val; }
+ class param_int_t final: public param_t
+ {
+ public:
+ param_int_t(device_t &device, const pstring name, const int val);
+ int operator()() const { return m_param; }
+ void setTo(const int &param) { set(m_param, param); }
+ private:
+ int m_param;
+ };
+ class param_double_t final: public param_t
+ {
+ public:
+ param_double_t(device_t &device, const pstring name, const double val);
+ double operator()() const { return m_param; }
+ void setTo(const double &param) { set(m_param, param); }
+ private:
+ double m_param;
+ };
+
+ class param_str_t : public param_t
+ {
+ public:
+ param_str_t(device_t &device, const pstring name, const pstring val);
+ const pstring operator()() const { return Value(); }
+ void setTo(const pstring &param)
+ {
+ if (m_param != param)
+ {
+ m_param = param;
+ changed();
+ update_param();
+ }
+ }
protected:
- C Value() const { return m_param; }
virtual void changed() { }
- C m_param;
+ pstring Value() const { return m_param; }
private:
+ pstring m_param;
};
- using param_double_t = param_template_t<nl_double, param_t::DOUBLE>;
- using param_int_t = param_template_t<int, param_t::INTEGER>;
- using param_str_t = param_template_t<pstring, param_t::STRING>;
-
- using param_logic_t = param_template_t<bool, param_t::LOGIC>;
-
- class param_model_t : public param_str_t
+ class param_model_t final : public param_str_t
{
public:
param_model_t(device_t &device, const pstring name, const pstring val)
@@ -880,12 +940,41 @@ namespace netlist
const pstring model_value_str(const pstring &entity);
const pstring model_type();
protected:
- void changed() override
+ virtual void changed() override { m_map.clear(); }
+ private:
+ model_map_t m_map;
+ };
+
+ class param_data_t : public param_str_t
+ {
+ public:
+ param_data_t(device_t &device, const pstring name)
+ : param_str_t(device, name, "") { }
+ std::unique_ptr<plib::pistream> stream();
+ protected:
+ virtual void changed() override { }
+ };
+
+ template <typename ST, std::size_t AW, std::size_t DW>
+ class param_rom_t final: public param_data_t
+ {
+ public:
+
+ param_rom_t(device_t &device, const pstring name)
+ : param_data_t(device, name)
+ {
+ stream()->read(&m_data[0],1<<AW);
+ }
+
+ const ST & operator[] (std::size_t n) { return m_data[n]; }
+
+ protected:
+ virtual void changed() override
{
- m_map.clear();
+ stream()->read(&m_data[0],1<<AW);
}
private:
- model_map_t m_map;
+ ST m_data[1 << AW];
};
// -----------------------------------------------------------------------------
@@ -1208,19 +1297,6 @@ namespace netlist
// inline implementations
// -----------------------------------------------------------------------------
- template <class C, param_t::param_type_t T>
- inline void param_template_t<C, T>::setTo(const C &param)
- {
- if (m_param != param)
- {
- m_param = param;
- changed();
- device().update_param();
- if (device().needs_update_after_param_change())
- device().update_dev();
- }
- }
-
inline bool detail::core_terminal_t::is_logic() const noexcept
{
return dynamic_cast<const logic_t *>(this) != nullptr;
diff --git a/src/lib/netlist/nl_config.h b/src/lib/netlist/nl_config.h
index 4965e7b9746..14598d2dccf 100644
--- a/src/lib/netlist/nl_config.h
+++ b/src/lib/netlist/nl_config.h
@@ -124,8 +124,8 @@
namespace netlist
{
#if NL_KEEP_STATISTICS
-using nperftime_t = plib::timer<plib::exact_ticks, true>;
-using nperfcount_t = plib::counter<true>;
+using nperftime_t = plib::chrono::timer<plib::chrono::exact_ticks, true>;
+using nperfcount_t = plib::chrono::counter<true>;
#else
using nperftime_t = plib::chrono::timer<plib::chrono::exact_ticks, false>;
using nperfcount_t = plib::chrono::counter<false>;
diff --git a/src/lib/netlist/nl_setup.cpp b/src/lib/netlist/nl_setup.cpp
index 274daba019c..06cef2a0947 100644
--- a/src/lib/netlist/nl_setup.cpp
+++ b/src/lib/netlist/nl_setup.cpp
@@ -18,6 +18,7 @@
#include "devices/net_lib.h"
#include "devices/nld_truthtable.h"
#include "devices/nlid_system.h"
+#include "devices/nlid_proxy.h"
#include "analog/nld_twoterm.h"
#include "solver/nld_solver.h"
@@ -191,42 +192,45 @@ pstring setup_t::objtype_as_str(detail::device_object_t &in) const
return "Error";
}
-void setup_t::register_and_set_param(pstring name, param_t &param)
+pstring setup_t::get_initial_param_val(const pstring name, const pstring def)
+{
+ auto i = m_param_values.find(name);
+ if (i != m_param_values.end())
+ return i->second;
+ else
+ return def;
+}
+
+double setup_t::get_initial_param_val(const pstring name, const double def)
{
auto i = m_param_values.find(name);
if (i != m_param_values.end())
{
- const pstring val = i->second;
- log().debug("Found parameter ... {1} : {1}\n", name, val);
- switch (param.param_type())
- {
- case param_t::DOUBLE:
- {
- double vald = 0;
- if (sscanf(val.cstr(), "%lf", &vald) != 1)
- log().fatal("Invalid number conversion {1} : {2}\n", name, val);
- static_cast<param_double_t &>(param).initial(vald);
- }
- break;
- case param_t::INTEGER:
- case param_t::LOGIC:
- {
- double vald = 0;
- if (sscanf(val.cstr(), "%lf", &vald) != 1)
- log().fatal("Invalid number conversion {1} : {2}\n", name, val);
- static_cast<param_int_t &>(param).initial(static_cast<int>(vald));
- }
- break;
- case param_t::STRING:
- case param_t::MODEL:
- {
- static_cast<param_str_t &>(param).initial(val);
- }
- break;
- //default:
- // log().fatal("Parameter is not supported {1} : {2}\n", name, val);
- }
+ double vald = 0;
+ if (sscanf(i->second.cstr(), "%lf", &vald) != 1)
+ log().fatal("Invalid number conversion {1} : {2}\n", name, i->second);
+ return vald;
}
+ else
+ return def;
+}
+
+int setup_t::get_initial_param_val(const pstring name, const int def)
+{
+ auto i = m_param_values.find(name);
+ if (i != m_param_values.end())
+ {
+ double vald = 0;
+ if (sscanf(i->second.cstr(), "%lf", &vald) != 1)
+ log().fatal("Invalid number conversion {1} : {2}\n", name, i->second);
+ return static_cast<int>(vald);
+ }
+ else
+ return def;
+}
+
+void setup_t::register_param(pstring name, param_t &param)
+{
if (!m_params.insert({param.name(), param_ref_t(param.name(), param.device(), param)}).second)
log().fatal("Error adding parameter {1} to parameter list\n", name);
}
@@ -517,6 +521,7 @@ void setup_t::connect_terminal_input(terminal_t &term, detail::core_terminal_t &
}
else if (inp.is_logic())
{
+ netlist().log().verbose("connect terminal {1} (in, {2}) to {3}\n", inp.name(), pstring(inp.is_analog() ? "analog" : inp.is_logic() ? "logic" : "?"), term.name());
logic_input_t &incast = dynamic_cast<logic_input_t &>(inp);
log().debug("connect_terminal_input: connecting proxy\n");
pstring x = plib::pfmt("proxy_ad_{1}_{2}")(inp.name())(m_proxy_cnt);
@@ -849,10 +854,11 @@ const logic_family_desc_t *setup_t::family_from_model(const pstring &model)
auto ret = plib::make_unique_base<logic_family_desc_t, logic_family_std_proxy_t>();
- ret->m_low_thresh_V = setup_t::model_value(map, "IVL");
- ret->m_high_thresh_V = setup_t::model_value(map, "IVH");
- ret->m_low_V = setup_t::model_value(map, "OVL");
- ret->m_high_V = setup_t::model_value(map, "OVH");
+ ret->m_fixed_V = setup_t::model_value(map, "FV");
+ ret->m_low_thresh_PCNT = setup_t::model_value(map, "IVL");
+ ret->m_high_thresh_PCNT = setup_t::model_value(map, "IVH");
+ ret->m_low_VO = setup_t::model_value(map, "OVL");
+ ret->m_high_VO = setup_t::model_value(map, "OVH");
ret->m_R_low = setup_t::model_value(map, "ORL");
ret->m_R_high = setup_t::model_value(map, "ORH");
@@ -971,12 +977,28 @@ void setup_t::include(const pstring &netlist_name)
{
for (auto &source : m_sources)
{
- if (source->parse(*this, netlist_name))
+ if (source->parse(netlist_name))
return;
}
log().fatal("unable to find {1} in source collection", netlist_name);
}
+std::unique_ptr<plib::pistream> setup_t::get_data_stream(const pstring name)
+{
+ for (auto &source : m_sources)
+ {
+ if (source->type() == source_t::DATA)
+ {
+ auto strm = source->stream(name);
+ if (strm)
+ return strm;
+ }
+ }
+ log().fatal("unable to find data named {1} in source collection", name);
+ return std::unique_ptr<plib::pistream>(nullptr);
+}
+
+
bool setup_t::parse_stream(plib::pistream &istrm, const pstring &name)
{
plib::pomemstream ostrm;
@@ -998,22 +1020,27 @@ void setup_t::register_define(pstring defstr)
// base sources
// ----------------------------------------------------------------------------------------
-bool source_string_t::parse(setup_t &setup, const pstring &name)
+bool source_t::parse(const pstring &name)
+{
+ if (m_type != SOURCE)
+ return false;
+ else
+ return m_setup.parse_stream(*stream(name), name);
+}
+
+std::unique_ptr<plib::pistream> source_string_t::stream(const pstring &name)
{
- plib::pimemstream istrm(m_str.cstr(), m_str.len());
- return setup.parse_stream(istrm, name);
+ return plib::make_unique_base<plib::pistream, plib::pimemstream>(m_str.cstr(), m_str.len());
}
-bool source_mem_t::parse(setup_t &setup, const pstring &name)
+std::unique_ptr<plib::pistream> source_mem_t::stream(const pstring &name)
{
- plib::pimemstream istrm(m_str.cstr(), m_str.len());
- return setup.parse_stream(istrm, name);
+ return plib::make_unique_base<plib::pistream, plib::pimemstream>(m_str.cstr(), m_str.len());
}
-bool source_file_t::parse(setup_t &setup, const pstring &name)
+std::unique_ptr<plib::pistream> source_file_t::stream(const pstring &name)
{
- plib::pifilestream istrm(m_filename);
- return setup.parse_stream(istrm, name);
+ return plib::make_unique_base<plib::pistream, plib::pifilestream>(m_filename);
}
}
diff --git a/src/lib/netlist/nl_setup.h b/src/lib/netlist/nl_setup.h
index aec2da2dcd8..e560a3b9f79 100644
--- a/src/lib/netlist/nl_setup.h
+++ b/src/lib/netlist/nl_setup.h
@@ -67,7 +67,7 @@ void NETLIST_NAME(name)(netlist::setup_t &setup) \
#define NETLIST_END() }
#define LOCAL_SOURCE(name) \
- setup.register_source(plib::make_unique_base<netlist::source_t, netlist::source_proc_t>(# name, &NETLIST_NAME(name)));
+ setup.register_source(plib::make_unique_base<netlist::source_t, netlist::source_proc_t>(setup, # name, &NETLIST_NAME(name)));
#define LOCAL_LIB_ENTRY(name) \
LOCAL_SOURCE(name) \
@@ -149,16 +149,28 @@ namespace netlist
class source_t
{
public:
+ enum type_t
+ {
+ SOURCE,
+ DATA
+ };
+
using list_t = std::vector<std::unique_ptr<source_t>>;
- source_t()
+ source_t(setup_t &setup, const type_t type = SOURCE)
+ : m_setup(setup), m_type(type)
{}
virtual ~source_t() { }
- virtual bool parse(setup_t &setup, const pstring &name) = 0;
+ virtual bool parse(const pstring &name);
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) = 0;
+ setup_t &setup() { return m_setup; }
+ type_t type() const { return m_type; }
private:
+ setup_t &m_setup;
+ const type_t m_type;
};
// ----------------------------------------------------------------------------------------
@@ -181,7 +193,10 @@ namespace netlist
pstring build_fqn(const pstring &obj_name) const;
- void register_and_set_param(pstring name, param_t &param);
+ void register_param(pstring name, param_t &param);
+ pstring get_initial_param_val(const pstring name, const pstring def);
+ double get_initial_param_val(const pstring name, const double def);
+ int get_initial_param_val(const pstring name, const int def);
void register_term(detail::core_terminal_t &obj);
@@ -223,6 +238,7 @@ namespace netlist
/* parse a source */
void include(const pstring &netlist_name);
+ std::unique_ptr<plib::pistream> get_data_stream(const pstring name);
bool parse_stream(plib::pistream &istrm, const pstring &name);
@@ -265,10 +281,12 @@ namespace netlist
std::unordered_map<pstring, pstring> m_param_values;
std::unordered_map<pstring, detail::core_terminal_t *> m_terminals;
+ /* needed by proxy */
+ detail::core_terminal_t *find_terminal(const pstring &outname_in, detail::device_object_t::type_t atype, bool required = true);
+
private:
detail::core_terminal_t *find_terminal(const pstring &outname_in, bool required = true);
- detail::core_terminal_t *find_terminal(const pstring &outname_in, detail::device_object_t::type_t atype, bool required = true);
void merge_nets(detail::net_t &thisnet, detail::net_t &othernet);
@@ -307,12 +325,12 @@ namespace netlist
{
public:
- source_string_t(const pstring &source)
- : source_t(), m_str(source)
+ source_string_t(setup_t &setup, const pstring &source)
+ : source_t(setup), m_str(source)
{
}
- bool parse(setup_t &setup, const pstring &name) override;
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
private:
pstring m_str;
@@ -322,12 +340,12 @@ namespace netlist
{
public:
- source_file_t(const pstring &filename)
- : source_t(), m_filename(filename)
+ source_file_t(setup_t &setup, const pstring &filename)
+ : source_t(setup), m_filename(filename)
{
}
- bool parse(setup_t &setup, const pstring &name) override;
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
private:
pstring m_filename;
@@ -336,12 +354,12 @@ namespace netlist
class source_mem_t : public source_t
{
public:
- source_mem_t(const char *mem)
- : source_t(), m_str(mem)
+ source_mem_t(setup_t &setup, const char *mem)
+ : source_t(setup), m_str(mem)
{
}
- bool parse(setup_t &setup, const pstring &name) override;
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
private:
pstring m_str;
@@ -350,23 +368,29 @@ namespace netlist
class source_proc_t : public source_t
{
public:
- source_proc_t(pstring name, void (*setup_func)(setup_t &))
- : source_t(),
+ source_proc_t(setup_t &setup, pstring name, void (*setup_func)(setup_t &))
+ : source_t(setup),
m_setup_func(setup_func),
m_setup_func_name(name)
{
}
- bool parse(setup_t &setup, const pstring &name) override
+ virtual bool parse(const pstring &name) override
{
if (name == m_setup_func_name)
{
- m_setup_func(setup);
+ m_setup_func(setup());
return true;
}
else
return false;
}
+
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override
+ {
+ std::unique_ptr<plib::pistream> p(nullptr);
+ return p;
+ }
private:
void (*m_setup_func)(setup_t &);
pstring m_setup_func_name;
diff --git a/src/lib/netlist/prg/nltool.cpp b/src/lib/netlist/prg/nltool.cpp
index b095a081f81..fbfa3a50c5c 100644
--- a/src/lib/netlist/prg/nltool.cpp
+++ b/src/lib/netlist/prg/nltool.cpp
@@ -30,6 +30,7 @@ public:
opt_cmd (*this, "c", "cmd", "run", "run:convert:listdevices:static", "run|convert|listdevices|static"),
opt_file(*this, "f", "file", "-", "file to process (default is stdin)"),
opt_defines(*this, "D", "define", "predefine value as macro, e.g. -Dname=value. If '=value' is omitted predefine it as 1. This option may be specified repeatedly."),
+ opt_rfolders(*this, "r", "rom", "where to look for files"),
opt_verb(*this, "v", "verbose", "be verbose - this produces lots of output"),
opt_quiet(*this, "q", "quiet", "be quiet - no warnings"),
opt_version(*this, "", "version", "display version and exit"),
@@ -53,6 +54,7 @@ public:
plib::option_str_limit opt_cmd;
plib::option_str opt_file;
plib::option_vec opt_defines;
+ plib::option_vec opt_rfolders;
plib::option_bool opt_verb;
plib::option_bool opt_quiet;
plib::option_bool opt_version;
@@ -87,6 +89,36 @@ NETLIST_END()
CORE IMPLEMENTATION
***************************************************************************/
+class netlist_data_folder_t : public netlist::source_t
+{
+public:
+ netlist_data_folder_t(netlist::setup_t &setup,
+ pstring folder)
+ : netlist::source_t(setup, netlist::source_t::DATA)
+ , m_folder(folder)
+ {
+ }
+
+ virtual std::unique_ptr<plib::pistream> stream(const pstring &file) override
+ {
+ pstring name = m_folder + "/" + file;
+ try
+ {
+ auto strm = plib::make_unique_base<plib::pistream, plib::pifilestream>(name);
+ return strm;
+ }
+ catch (plib::pexception e)
+ {
+
+ }
+ return std::unique_ptr<plib::pistream>(nullptr);
+ }
+
+private:
+ pstring m_folder;
+};
+
+
class netlist_tool_t : public netlist::netlist_t
{
public:
@@ -109,15 +141,19 @@ public:
void read_netlist(const pstring &filename, const pstring &name,
const std::vector<pstring> &logs,
- const std::vector<pstring> &defines)
+ const std::vector<pstring> &defines,
+ const std::vector<pstring> &roms)
{
// read the netlist ...
for (auto & d : defines)
m_setup->register_define(d);
+ for (auto & r : roms)
+ m_setup->register_source(plib::make_unique_base<netlist::source_t, netlist_data_folder_t>(*m_setup, r));
+
m_setup->register_source(plib::make_unique_base<netlist::source_t,
- netlist::source_file_t>(filename));
+ netlist::source_file_t>(*m_setup, filename));
m_setup->include(name);
log_setup(logs);
@@ -189,8 +225,8 @@ struct input_t
{
switch (m_param->param_type())
{
- case netlist::param_t::MODEL:
case netlist::param_t::STRING:
+ case netlist::param_t::POINTER:
throw netlist::nl_exception(plib::pfmt("param {1} is not numeric\n")(m_param->name()));
case netlist::param_t::DOUBLE:
static_cast<netlist::param_double_t*>(m_param)->setTo(m_value);
@@ -246,7 +282,7 @@ static void run(tool_options_t &opts)
nt.read_netlist(opts.opt_file(), opts.opt_name(),
opts.opt_logs(),
- opts.opt_defines());
+ opts.opt_defines(), opts.opt_rfolders());
std::vector<input_t> inps = read_input(nt.setup(), opts.opt_inp());
@@ -289,7 +325,7 @@ static void static_compile(tool_options_t &opts)
nt.read_netlist(opts.opt_file(), opts.opt_name(),
opts.opt_logs(),
- opts.opt_defines());
+ opts.opt_defines(), opts.opt_rfolders());
nt.solver()->create_solver_code(pout_strm);
@@ -313,7 +349,7 @@ static void listdevices(tool_options_t &opts)
netlist::factory_list_t &list = nt.setup().factory();
nt.setup().register_source(plib::make_unique_base<netlist::source_t,
- netlist::source_proc_t>("dummy", &netlist_dummy));
+ netlist::source_proc_t>(nt.setup(), "dummy", &netlist_dummy));
nt.setup().include("dummy");
diff --git a/src/mame/audio/csd.cpp b/src/mame/audio/csd.cpp
new file mode 100644
index 00000000000..47cc6c8589f
--- /dev/null
+++ b/src/mame/audio/csd.cpp
@@ -0,0 +1,180 @@
+// license: BSD-3-Clause
+// copyright-holders: Aaron Giles
+/***************************************************************************
+
+ Cheap Squeak Deluxe / Artificial Artist Sound Board
+
+***************************************************************************/
+
+#include "csd.h"
+#include "sound/volt_reg.h"
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+extern const device_type MIDWAY_CHEAP_SQUEAK_DELUXE = &device_creator<midway_cheap_squeak_deluxe_device>;
+
+//-------------------------------------------------
+// audio cpu map
+//-------------------------------------------------
+
+// address map determined by PAL; verified
+static ADDRESS_MAP_START( csdeluxe_map, AS_PROGRAM, 16, midway_cheap_squeak_deluxe_device )
+ ADDRESS_MAP_UNMAP_HIGH
+ ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
+ AM_RANGE(0x00000, 0x07fff) AM_ROM
+ AM_RANGE(0x18000, 0x18007) AM_MIRROR(0x3ff8) AM_DEVREADWRITE8("pia", pia6821_device, read_alt, write_alt, 0xff00) // Spy Hunter accesses the MSB
+ AM_RANGE(0x18000, 0x18007) AM_MIRROR(0x3ff8) AM_DEVREADWRITE8("pia", pia6821_device, read_alt, write_alt, 0x00ff) // Turbo Tag access via the LSB
+ AM_RANGE(0x1c000, 0x1cfff) AM_RAM
+ADDRESS_MAP_END
+
+//-------------------------------------------------
+// machine configuration
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT(midway_cheap_squeak_deluxe)
+ MCFG_CPU_ADD("cpu", M68000, XTAL_16MHz/2)
+ MCFG_CPU_PROGRAM_MAP(csdeluxe_map)
+
+ MCFG_DEVICE_ADD("pia", PIA6821, 0)
+ MCFG_PIA_WRITEPA_HANDLER(WRITE8(midway_cheap_squeak_deluxe_device, porta_w))
+ MCFG_PIA_WRITEPB_HANDLER(WRITE8(midway_cheap_squeak_deluxe_device, portb_w))
+ MCFG_PIA_IRQA_HANDLER(WRITELINE(midway_cheap_squeak_deluxe_device, irq_w))
+ MCFG_PIA_IRQB_HANDLER(WRITELINE(midway_cheap_squeak_deluxe_device, irq_w))
+
+ MCFG_SOUND_ADD("dac", AD7533, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0)
+ MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
+ MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
+MACHINE_CONFIG_END
+
+machine_config_constructor midway_cheap_squeak_deluxe_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( midway_cheap_squeak_deluxe );
+}
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+ROM_START( csd )
+ ROM_REGION(0x4a, "pal", 0)
+ ROM_LOAD("0304-00803-0052.u15", 0x00, 0x4a, CRC(8b401aee) SHA1(360f3f59877f0bc25b4154782a2011963dd80a52)) // address decoding pal CSD002R0 (PAL14L8)
+ROM_END
+
+const tiny_rom_entry *midway_cheap_squeak_deluxe_device::device_rom_region() const
+{
+ return ROM_NAME( csd );
+}
+
+//-------------------------------------------------
+// midway_cheap_squeak_deluxe_device - constructor
+//-------------------------------------------------
+
+midway_cheap_squeak_deluxe_device::midway_cheap_squeak_deluxe_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, MIDWAY_CHEAP_SQUEAK_DELUXE, "Cheap Squeak Deluxe Sound Board", tag, owner, clock, "midcsd", __FILE__),
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia(*this, "pia"),
+ m_dac(*this, "dac"),
+ m_status(0),
+ m_dacval(0)
+{
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void midway_cheap_squeak_deluxe_device::device_start()
+{
+ save_item(NAME(m_status));
+ save_item(NAME(m_dacval));
+}
+
+//-------------------------------------------------
+// device_timer - timer callbacks
+//-------------------------------------------------
+
+void midway_cheap_squeak_deluxe_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ m_pia->ca1_w(param);
+
+ // oftentimes games will write one nibble at a time; the sync on this is very
+ // important, so we boost the interleave briefly while this happens
+ machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
+}
+
+//-------------------------------------------------
+// stat_r - return the status value
+//-------------------------------------------------
+
+READ8_MEMBER( midway_cheap_squeak_deluxe_device::stat_r )
+{
+ return m_status;
+}
+
+//-------------------------------------------------
+// sr_w - external 4-bit write to the input latch
+//-------------------------------------------------
+
+WRITE8_MEMBER( midway_cheap_squeak_deluxe_device::sr_w )
+{
+ m_pia->portb_w(data & 0x0f);
+}
+
+//-------------------------------------------------
+// sirq_w - external irq write
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER( midway_cheap_squeak_deluxe_device::sirq_w )
+{
+ synchronize(0, !state);
+}
+
+//-------------------------------------------------
+// reset_write - write to the reset line
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER( midway_cheap_squeak_deluxe_device::reset_w )
+{
+ m_cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
+ m_cpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
+}
+
+//-------------------------------------------------
+// porta_w - PIA port A writes
+//-------------------------------------------------
+
+WRITE8_MEMBER( midway_cheap_squeak_deluxe_device::porta_w )
+{
+ m_dacval = (data << 2) | (m_dacval & 3);
+ m_dac->write(m_dacval);
+}
+
+//-------------------------------------------------
+// portb_w - PIA port B writes
+//-------------------------------------------------
+
+WRITE8_MEMBER( midway_cheap_squeak_deluxe_device::portb_w )
+{
+ // bit 4-5, status
+ uint8_t z_mask = m_pia->port_b_z_mask();
+ if (~z_mask & 0x10) m_status = (m_status & ~1) | ((data >> 4) & 1);
+ if (~z_mask & 0x20) m_status = (m_status & ~2) | ((data >> 4) & 2);
+
+ // bit 6-7, dac data
+ m_dacval = (m_dacval & ~3) | (data >> 6);
+ m_dac->write(m_dacval);
+}
+
+//-------------------------------------------------
+// irq_w - IRQ line state changes
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER( midway_cheap_squeak_deluxe_device::irq_w )
+{
+ int combined_state = m_pia->irq_a_state() | m_pia->irq_b_state();
+ m_cpu->set_input_line(4, combined_state ? ASSERT_LINE : CLEAR_LINE);
+}
diff --git a/src/mame/audio/csd.h b/src/mame/audio/csd.h
new file mode 100644
index 00000000000..a8febae22c2
--- /dev/null
+++ b/src/mame/audio/csd.h
@@ -0,0 +1,64 @@
+// license: BSD-3-Clause
+// copyright-holders: Aaron Giles
+/***************************************************************************
+
+ Cheap Squeak Deluxe / Artificial Artist Sound Board
+
+***************************************************************************/
+
+#pragma once
+
+#ifndef MAME_AUDIO_CSD_H
+#define MAME_AUDIO_CSD_H
+
+#include "emu.h"
+#include "cpu/m68000/m68000.h"
+#include "machine/6821pia.h"
+#include "sound/dac.h"
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> midway_cheap_squeak_deluxe_device
+
+class midway_cheap_squeak_deluxe_device : public device_t, public device_mixer_interface
+{
+public:
+ // construction/destruction
+ midway_cheap_squeak_deluxe_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // read/write
+ DECLARE_READ8_MEMBER(stat_r);
+ DECLARE_WRITE8_MEMBER(sr_w);
+ DECLARE_WRITE_LINE_MEMBER(sirq_w);
+ DECLARE_WRITE_LINE_MEMBER(reset_w);
+
+ // internal communications
+ DECLARE_WRITE8_MEMBER(porta_w);
+ DECLARE_WRITE8_MEMBER(portb_w);
+ DECLARE_WRITE_LINE_MEMBER(irq_w);
+
+protected:
+ // device-level overrides
+ virtual machine_config_constructor device_mconfig_additions() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual void device_start() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+private:
+ // devices
+ required_device<m68000_device> m_cpu;
+ required_device<pia6821_device> m_pia;
+ required_device<dac_word_interface> m_dac;
+
+ // internal state
+ uint8_t m_status;
+ uint16_t m_dacval;
+};
+
+// device type definition
+extern const device_type MIDWAY_CHEAP_SQUEAK_DELUXE;
+
+#endif // MAME_AUDIO_CSD_H
diff --git a/src/mame/audio/dcs.cpp b/src/mame/audio/dcs.cpp
index 876393c13f8..4e084d83280 100644
--- a/src/mame/audio/dcs.cpp
+++ b/src/mame/audio/dcs.cpp
@@ -246,6 +246,7 @@ enum
#define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff)
+#define DSIO_BANK_END 0x7ff
/* these macros are used to reference the DENVER ASIC */
#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
@@ -256,6 +257,7 @@ enum
#define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff)
+#define DENV_BANK_END 0xfff
/*************************************
*
@@ -384,11 +386,15 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_data_map, AS_DATA, 16, dcs_audio_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("databank")
- AM_RANGE(0x0400, 0x3fdf) AM_RAM
+ AM_RANGE(0x0000, 0x1fff) AM_DEVICE("data_map_bank", address_map_bank_device, amap16)
+ AM_RANGE(0x2000, 0x3fdf) AM_RAM AM_SHARE("dcsint_data")
AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( dsio_rambank_map, AS_PROGRAM, 16, dcs_audio_device )
+ AM_RANGE(0x0000, 0x1fff) AM_RAM
+ AM_RANGE(0x2000, 0x2000 + DSIO_BANK_END) AM_RAMBANK("databank")
+ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, dcs_audio_device )
ADDRESS_MAP_UNMAP_HIGH
@@ -416,11 +422,16 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( denver_data_map, AS_DATA, 16, dcs_audio_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("databank")
- AM_RANGE(0x0800, 0x3fdf) AM_RAM
+ AM_RANGE(0x0000, 0x1fff) AM_DEVICE("data_map_bank", address_map_bank_device, amap16)
+ AM_RANGE(0x2000, 0x3fdf) AM_RAM AM_SHARE("dcsint_data")
AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START(denver_rambank_map, AS_PROGRAM, 16, dcs_audio_device)
+ AM_RANGE(0x0000, 0x1fff) AM_RAM
+ AM_RANGE(0x2000, 0x2000 + DENV_BANK_END) AM_RAMBANK("databank")
+ADDRESS_MAP_END
+
static ADDRESS_MAP_START( denver_io_map, AS_IO, 16, dcs_audio_device )
ADDRESS_MAP_UNMAP_HIGH
@@ -528,10 +539,18 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_dsio )
MCFG_CPU_ADD("dsio", ADSP2181, XTAL_32MHz)
MCFG_ADSP21XX_SPORT_TX_CB(WRITE32(dcs_audio_device, sound_tx_callback)) /* callback for serial transmit */
MCFG_ADSP21XX_TIMER_FIRED_CB(WRITELINE(dcs_audio_device,timer_enable_callback)) /* callback for timer fired */
+ MCFG_ADSP21XX_DMOVLAY_CB(WRITE32(dcs_audio_device, dmovlay_callback)) // callback for adsp 2181 dmovlay instruction
MCFG_CPU_PROGRAM_MAP(dsio_program_map)
MCFG_CPU_DATA_MAP(dsio_data_map)
MCFG_CPU_IO_MAP(dsio_io_map)
+ MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0)
+ MCFG_DEVICE_PROGRAM_MAP(dsio_rambank_map)
+ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+ MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
+ MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14)
+ MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
+
MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq)
MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback)
MCFG_TIMER_DEVICE_ADD("dcs_sport_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) // roadburn needs this to pass harware test
@@ -562,6 +581,13 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_denver )
MCFG_CPU_DATA_MAP(denver_data_map)
MCFG_CPU_IO_MAP(denver_io_map)
+ MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0)
+ MCFG_DEVICE_PROGRAM_MAP(denver_rambank_map)
+ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+ MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
+ MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14)
+ MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
+
MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq)
MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback)
MCFG_TIMER_DEVICE_ADD("dcs_sport_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) // Atlantis driver waits for sport0 rx interrupts
@@ -689,8 +715,6 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
/* rev 4: reset the Denver ASIC */
case 4:
- m_dmovlay_val = 0;
- dmovlay_remap_memory();
denver_reset();
break;
}
@@ -822,6 +846,7 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty
m_sounddata_words(0),
m_sounddata_banks(0),
m_sounddata_bank(0),
+ m_ram_map(*this, "data_map_bank"),
m_data_bank(*this, "databank"),
m_rom_page(nullptr),
m_dram_page(nullptr),
@@ -845,6 +870,7 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty
m_polling_base(nullptr),
m_internal_program_ram(nullptr),
m_external_program_ram(nullptr),
+ m_internal_data_ram(nullptr),
m_dram_in_mb(0),
m_iram(*this, "iram")
{
@@ -928,6 +954,11 @@ void dcs2_audio_device::device_start()
{
m_external_program_ram = (uint32_t *)external_ram->ptr();
}
+ memory_share *internal_data_ram = memshare("dcsint_data");
+ if (internal_data_ram != nullptr)
+ {
+ m_internal_data_ram = (uint32_t *)internal_ram->ptr();
+ }
/* find the DCS CPU and the sound ROMs */
m_cpu = subdevice<adsp21xx_device>("dcs2");
@@ -937,13 +968,13 @@ void dcs2_audio_device::device_start()
{
m_cpu = subdevice<adsp21xx_device>("dsio");
m_rev = 3;
- soundbank_words = 0x400;
+ soundbank_words = DSIO_BANK_END + 1;
}
if (m_cpu == nullptr)
{
m_cpu = subdevice<adsp21xx_device>("denver");
m_rev = 4;
- soundbank_words = 0x800;
+ soundbank_words = DENV_BANK_END + 1;
}
if (m_cpu != nullptr && !m_cpu->started())
throw device_missing_dependencies();
@@ -965,13 +996,9 @@ void dcs2_audio_device::device_start()
/* supports both RAM and ROM variants */
if (m_dram_in_mb != 0)
{
- uint32_t ramSize = m_dram_in_mb << (20 - 1);
- // Add one extra bank for internal ram in ADSP 2181
- if (m_rev == 4)
- ramSize += soundbank_words;
- m_sounddata = auto_alloc_array(machine(), uint16_t, ramSize);
- save_pointer(NAME(m_sounddata), ramSize);
m_sounddata_words = (m_dram_in_mb << 20) / 2;
+ m_sounddata = auto_alloc_array(machine(), uint16_t, m_sounddata_words);
+ save_pointer(NAME(m_sounddata), m_sounddata_words);
}
else
{
@@ -981,7 +1008,9 @@ void dcs2_audio_device::device_start()
m_sounddata_banks = m_sounddata_words / soundbank_words;
if (m_rev != 2)
{
- m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words*2);
+ if (m_ram_map)
+ m_ram_map->set_bank(0);
+ m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words * 2);
}
@@ -1303,6 +1332,8 @@ WRITE16_MEMBER( dcs_audio_device::sdrc_w )
void dcs_audio_device::dsio_reset()
{
memset(&m_dsio, 0, sizeof(m_dsio));
+ m_dmovlay_val = 0;
+ dmovlay_remap_memory();
}
@@ -1342,7 +1373,7 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
/* offset 2 controls RAM pages */
case 2:
dsio.reg[2] = data;
- dmovlay_remap_memory();
+ m_data_bank->set_entry(DSIO_DM_PG % m_sounddata_banks);
break;
}
}
@@ -1358,6 +1389,8 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
void dcs_audio_device::denver_reset()
{
memset(&m_dsio, 0, sizeof(m_dsio));
+ m_dmovlay_val = 0;
+ dmovlay_remap_memory();
}
@@ -1370,6 +1403,7 @@ READ16_MEMBER( dcs_audio_device::denver_r )
/* returns 1 for DRAM, 2 for EPROM-based */
result = 0x0001;
}
+ if (LOG_DCS_IO) logerror("denver: denver_r 0x%x = %04x\n", offset, result);
return result;
}
@@ -1417,6 +1451,7 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
m_fifo_reset_w(1);
break;
}
+ if (LOG_DCS_IO) logerror("denver: denver_w 0x%x = %04x\n", offset, data);
}
@@ -1477,11 +1512,9 @@ void dcs_audio_device::dmovlay_remap_memory()
// Internal ram is bank 0
int bankSel;
if (m_dmovlay_val == 0) {
- bankSel = 0;
- m_data_bank->set_entry(bankSel);
+ m_ram_map->set_bank(0);
} else {
- bankSel = 1 + (DSIO_DM_PG % m_sounddata_banks);
- m_data_bank->set_entry(bankSel);
+ m_ram_map->set_bank(1);
}
if (LOG_DCS_IO)
logerror("%s dmovlay_remap_memory: Switching data ram location bankSel = %i\n", machine().describe_context(), bankSel);
diff --git a/src/mame/audio/dcs.h b/src/mame/audio/dcs.h
index 11645eca2a2..e041512dbd1 100644
--- a/src/mame/audio/dcs.h
+++ b/src/mame/audio/dcs.h
@@ -11,6 +11,7 @@
#include "cpu/adsp2100/adsp2100.h"
#include "sound/dmadac.h"
+#include "machine/bankdev.h"
#define MCFG_DCS2_AUDIO_DRAM_IN_MB(_dram_in_mb) \
dcs_audio_device::static_set_dram_in_mb(*device, _dram_in_mb);
@@ -167,6 +168,7 @@ protected:
uint32_t m_sounddata_banks;
uint16_t m_sounddata_bank;
+ optional_device<address_map_bank_device> m_ram_map;
optional_memory_bank m_data_bank;
memory_bank * m_rom_page;
memory_bank * m_dram_page;
@@ -203,6 +205,7 @@ protected:
uint16_t *m_polling_base;
uint32_t *m_internal_program_ram;
uint32_t *m_external_program_ram;
+ uint32_t *m_internal_data_ram;
int m_dmovlay_val;
diff --git a/src/mame/audio/gorf.cpp b/src/mame/audio/gorf.cpp
deleted file mode 100644
index 21f7272925c..00000000000
--- a/src/mame/audio/gorf.cpp
+++ /dev/null
@@ -1,190 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Mike Coates
-/**************************************************************************
-
- Gorf/Votrax SC-01 Emulator
-
- Mike@Dissfulfils.co.uk
-
- Modified to match phonemes to words
-
- Ajudd@quantime.co.uk
-
-**************************************************************************
-
-gorf_sh_w - Write data to votrax port
-gorf_sh_status - Return busy status (-1 = busy)
-gorf_port_2_r - Returns status of voice port
-gorf_sh_ update- Null
-
-**************************************************************************/
-
-#include "emu.h"
-#include "cpu/z80/z80.h"
-#include "includes/astrocde.h"
-#include "audio/gorf.h"
-
-
-/****************************************************************************
- * 64 Phonemes - currently 1 sample per phoneme, will be combined sometime!
- ****************************************************************************/
-
-static const char *const PhonemeTable[65] =
-{
- "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
- "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
- "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
- "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
- "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
- "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
- "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
- "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
- nullptr
-};
-
-static const char *const GorfWordTable[] =
-{
- "A2AYY1","A2E1","UH1GEH1I3N","AE1EH2M","AEM",
- "AE1EH3ND","UH1NAH2I1YLA2SHUH2N","AH2NUHTHER","AH1NUHTHVRR",
- "AH1R","UHR","UH1VEH1EH3NNDJER","BAEEH3D","BAEEH1D","BE",
- "BEH3EH1N","buht","BUH1DTTEH2NN","KUHDEH2T",
- "KAE1NUH1T","KAE1EH3PTI3N",
- "KRAH2UH3NI3KUH3O2LZ","KO1UH3I3E1N","KO1UH3I3E1NS",
- "KERNAH2L","KAH1NCHEHSNEHS","DE1FEH1NDER",
- "DE1STRO1I1Y","DE1STRO1I1Y1D",
- "DU1UM","DRAW1S","EHMPAH2I3YR","EHND",
- "EH1NEH1MY","EH1SKA1E1P","FLEHGSHIP",
- "FOR","GUH1LAEKTI1K",
- "DJEH2NERUH3L","GDTO1O1RRFF","GDTO1RFYA2N","GDTO1RFE1EH2N","GDTO1RFYA2NS",
- "HAH1HAH1HAH1HAH1","hahaher.wav","HUHRDER",
- "HAE1EH3V","HI1TI1NG","AH1I1Y", "AH1I1Y1","I1MPAH1SI1BL",
- "IN*","INSERT","I1S","LI1V","LAWNG","MEE1T","MUU1V",
- "MAH2I1Y","MAH2I3Y","NIR","NEHKST","NUH3AH2YS","NO",
- "NAH1O1U1W","PA1","PLA1AYER","PRE1PAE1ER","PRI1SI3NEH3RS",
- "PRUH2MOTEH3D","POO1IUSH","RO1U1BAH1T","RO1U1BAH1TS",
- "RO1U1BAH1UH3TS","SEK", "SHIP","SHAH1UH3T","SUHM","SPA2I3YS","PA0",
- "SERVAH2I1Y1VUH3L","TAK","THVUH","THVUH1",
- "THUH","TAH1EH3YM","TU","TIUU1",
- "UH2NBE1AYTUH3BUH3L",
- "WORAYY1EH3R","WORAYY1EH3RS","WI1L",
- "Y1I3U1","YIUU1U1","YI1U1U1","Y1IUU1U1","Y1I1U1U1","YOR","YU1O1RSEH1LF","s.wav",
- "FO1R","FO2R","WIL","GDTO1RVYA2N",
-
- "KO1UH3I3AYNN",
- "UH1TAEEH3K","BAH2I3Y1T","KAH1NKER","DYVAH1U1ER","DUHST","GAE1LUH1KSY","GAH1EH3T",
- "PAH1I1R","TRAH2I1Y","SU1PRE1N","AWL","HA2AYL",
- "EH1MPAH1I1R",
-nullptr
-};
-
-#define num_samples (sizeof(GorfWordTable)/sizeof(char *))
-
-const char *const gorf_sample_names[] =
-{
- "*gorf","a","a","again","am","am","and","anhilatn",
- "another","another","are","are",
- "avenger","bad","bad","be",
- "been","but","button","cadet",
- "cannot","captain","chronicl","coin","coins","colonel",
- "consciou","defender","destroy","destroyd",
- "doom","draws","empire","end",
- "enemy","escape","flagship","for","galactic",
- "general","gorf","gorphian","gorphian","gorphins",
- "hahahahu","hahaher","harder","have",
- "hitting","i","i","impossib","in","insert",
- "is","live","long","meet","move",
- "my","my",
- "near","next","nice","no",
- "now","pause","player","prepare","prisonrs",
- "promoted","push","robot","robots","robots",
- "seek","ship","shot","some","space","spause",
- "survival","take","the","the","the","time",
- "to","to","unbeatab",
- "warrior","warriors","will",
- "you","you","you","you","your","your","yourself",
- "s","for","for","will","gorph",
-// Missing Samples
- "coin", "attack","bite","conquer","devour","dust",
- "galaxy","got","power","try","supreme","all",
- "hail","emperor",
- nullptr
-};
-
-
-READ8_MEMBER( astrocde_state::gorf_speech_r )
-{
- uint8_t data = offset >> 8;
-#if USE_FAKE_VOTRAX
- int Phoneme, Intonation;
- int i = 0;
- offset &= 0xff;
-
- m_totalword_ptr = m_totalword;
-
- Phoneme = data & 0x3F;
- Intonation = data >> 6;
-
- logerror("Date : %d Speech : %s at intonation %d\n",Phoneme, PhonemeTable[Phoneme],Intonation);
-
- if(Phoneme==63) {
- m_samples->stop(0);
- if (strlen(m_totalword)>2) logerror("Clearing sample %s\n",m_totalword);
- m_totalword[0] = 0; /* Clear the total word stack */
- return data;
- }
-
- /* Phoneme to word translation */
-
- if (*(m_totalword) == 0) {
- strcpy(m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
- if (m_plural != 0) {
- logerror("found a possible plural at %d\n",m_plural-1);
- if (!strcmp("S",m_totalword)) { /* Plural check */
- m_samples->start(0, num_samples-2); /* play the sample at position of word */
- m_samples->set_frequency(0, 11025); /* play at correct rate */
- m_totalword[0] = 0; /* Clear the total word stack */
- m_oldword[0] = 0; /* Clear the total word stack */
- return data;
- } else {
- m_plural=0;
- }
- }
- } else
- strcat(m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
-
- logerror("Total word = %s\n",m_totalword);
-
- for (i=0; GorfWordTable[i]; i++) {
- if (!strcmp(GorfWordTable[i],m_totalword)) { /* Scan the word (sample) table for the complete word */
- if ((!strcmp("GDTO1RFYA2N",m_totalword)) || (!strcmp("RO1U1BAH1T",m_totalword)) || (!strcmp("KO1UH3I3E1N",m_totalword)) || (!strcmp("WORAYY1EH3R",m_totalword)) || (!strcmp("IN",m_totalword)) ) { /* May be m_plural */
- m_plural=i+1;
- strcpy(m_oldword,m_totalword);
- logerror("Storing sample position %d and copying string %s\n",m_plural,m_oldword);
- } else {
- m_plural=0;
- }
- m_samples->start(0, i); /* play the sample at position of word */
- m_samples->set_frequency(0, 11025); /* play at correct rate */
- logerror("Playing sample %d",i);
- m_totalword[0] = 0; /* Clear the total word stack */
- return data;
- }
- }
-#else
- m_votrax->inflection_w(space, 0, data >> 6);
- m_votrax->write(space, 0, data);
-#endif
-
- /* Note : We should really also use volume in this as well as frequency */
- return data; /* Return nicely */
-}
-
-
-CUSTOM_INPUT_MEMBER( astrocde_state::gorf_speech_status_r )
-{
-#if USE_FAKE_VOTRAX
- return !m_samples->playing(0);
-#else
- return m_votrax->request();
-#endif
-}
diff --git a/src/mame/audio/gorf.h b/src/mame/audio/gorf.h
deleted file mode 100644
index 0d14337f9cf..00000000000
--- a/src/mame/audio/gorf.h
+++ /dev/null
@@ -1,4 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Mike Coates
-
-extern const char *const gorf_sample_names[];
diff --git a/src/mame/audio/gottlieb.cpp b/src/mame/audio/gottlieb.cpp
index 5a7924a491b..75308e7902b 100644
--- a/src/mame/audio/gottlieb.cpp
+++ b/src/mame/audio/gottlieb.cpp
@@ -30,225 +30,6 @@ extern const device_type GOTTLIEB_SOUND_REV1_WITH_VOTRAX = &device_creator<gottl
extern const device_type GOTTLIEB_SOUND_REV2 = &device_creator<gottlieb_sound_r2_device>;
-
-//**************************************************************************
-// OLD CRAPPY SAMPLE PLAYER
-//**************************************************************************
-
-#if USE_FAKE_VOTRAX
-
-void gottlieb_sound_r1_device::trigger_sample(uint8_t data)
-{
- /* Reactor samples */
- if (strcmp(machine().system().name, "reactor") == 0)
- {
- switch (data)
- {
- case 55:
- case 56:
- case 57:
- case 59:
- m_samples->start(0, data - 53);
- break;
-
- case 31:
- m_score_sample = 7;
- break;
-
- case 39:
- m_score_sample++;
- if (m_score_sample < 20)
- m_samples->start(0, m_score_sample);
- break;
- }
- }
-
- /* Q*Bert samples */
- else
- {
- switch (data)
- {
- case 17:
- case 18:
- case 19:
- case 20:
- case 21:
- m_samples->start(0, (data - 17) * 8 + m_random_offset);
- m_random_offset = (m_random_offset + 1) & 7;
- break;
-
- case 22:
- m_samples->start(0,40);
- break;
-
- case 23:
- m_samples->start(0,41);
- break;
- }
- }
-}
-
-void gottlieb_sound_r1_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
-{
- m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
-}
-
-void gottlieb_sound_r1_device::fake_votrax_data_w(uint8_t data)
-{
- static const char *const PhonemeTable[0x40] =
- {
- "EH3", "EH2", "EH1", "PA0", "DT" , "A1" , "A2" , "ZH",
- "AH2", "I3" , "I2" , "I1" , "M" , "N" , "B" , "V",
- "CH" , "SH" , "Z" , "AW1", "NG" , "AH1", "OO1", "OO",
- "L" , "K" , "J" , "H" , "G" , "F" , "D" , "S",
- "A" , "AY" , "Y1" , "UH3", "AH" , "P" , "O" , "I",
- "U" , "Y" , "T" , "R" , "E" , "W" , "AE" , "AE1",
- "AW2", "UH2", "UH1", "UH" , "O2" , "O1" , "IU" , "U1",
- "THV", "TH" , "ER" , "EH" , "E1" , "AW" , "PA1", "STOP"
- };
-
- data ^= 0xff;
-
-logerror("Votrax: intonation %d, phoneme %02x %s\n",data >> 6,data & 0x3f,PhonemeTable[data & 0x3f]);
-
- m_votrax_queue[m_votrax_queuepos++] = data;
-
- if ((data & 0x3f) == 0x3f)
- {
- if (m_votrax_queuepos > 1)
- {
- int last = -1;
- int i;
- char phonemes[200];
-
- phonemes[0] = 0;
- for (i = 0;i < m_votrax_queuepos-1;i++)
- {
- static const char *const inf[4] = { "[0]", "[1]", "[2]", "[3]" };
- int phoneme = m_votrax_queue[i] & 0x3f;
- int inflection = m_votrax_queue[i] >> 6;
- if (inflection != last) strcat(phonemes, inf[inflection]);
- last = inflection;
- if (phoneme == 0x03 || phoneme == 0x3e) strcat(phonemes," ");
- else strcat(phonemes,PhonemeTable[phoneme]);
- }
-
- osd_printf_debug("Votrax played '%s'\n", phonemes);
-
- if (strcmp(phonemes, "[0] HEH3LOOW AH1EH3I3YMTERI2NDAHN") == 0) /* Q-Bert & Tylz - Hello, I am turned on */
- m_samples->start(0, 42);
- else if (strcmp(phonemes, "[0]BAH1EH1Y") == 0) /* Q-Bert - Bye, bye */
- m_samples->start(0, 43);
- else if (strcmp(phonemes, "[0]A2YHT LEH2FTTH") == 0) /* Reactor - Eight left */
- m_samples->start(0, 0);
- else if (strcmp(phonemes, "[0]SI3KS DTYN LEH2FTTH") == 0) /* Reactor - Sixteen left */
- m_samples->start(0, 1);
- else if (strcmp(phonemes, "[0]WO2RNYNG KO2R UH1NSDTABUH1L") == 0) /* Reactor - Warning core unstable */
- m_samples->start(0, 5);
- else if (strcmp(phonemes, "[0]CHAMBERR AE1EH2KTI1VA1I3DTEH1DT ") == 0) /* Reactor - Chamber activated */
- m_samples->start(0, 7);
- }
-
- m_votrax_queuepos = 0;
- }
-
- /* generate a NMI after a while to make the CPU continue to send data */
- timer_set(attotime::from_usec(50));
-}
-
-static const char *const reactor_sample_names[] =
-{
- "*reactor",
- "fx_53", /* "8 left" */
- "fx_54", /* "16 left" */
- "fx_55", /* "24 left" */
- "fx_56", /* "32 left" */
- "fx_57", /* "40 left" */
- "fx_58", /* "warning, core unstable" */
- "fx_59", /* "bonus" */
- "fx_31", /* "chamber activated" */
- "fx_39a", /* "2000" */
- "fx_39b", /* "5000" */
- "fx_39c", /* "10000" */
- "fx_39d", /* "15000" */
- "fx_39e", /* "20000" */
- "fx_39f", /* "25000" */
- "fx_39g", /* "30000" */
- "fx_39h", /* "35000" */
- "fx_39i", /* "40000" */
- "fx_39j", /* "45000" */
- "fx_39k", /* "50000" */
- "fx_39l", /* "55000" */
- nullptr /* end of array */
-};
-
-static const char *const qbert_sample_names[] =
-{
- "*qbert",
- "fx_17a", /* random speech, voice clock 255 */
- "fx_17b", /* random speech, voice clock 255 */
- "fx_17c", /* random speech, voice clock 255 */
- "fx_17d", /* random speech, voice clock 255 */
- "fx_17e", /* random speech, voice clock 255 */
- "fx_17f", /* random speech, voice clock 255 */
- "fx_17g", /* random speech, voice clock 255 */
- "fx_17h", /* random speech, voice clock 255 */
- "fx_18a", /* random speech, voice clock 176 */
- "fx_18b", /* random speech, voice clock 176 */
- "fx_18c", /* random speech, voice clock 176 */
- "fx_18d", /* random speech, voice clock 176 */
- "fx_18e", /* random speech, voice clock 176 */
- "fx_18f", /* random speech, voice clock 176 */
- "fx_18g", /* random speech, voice clock 176 */
- "fx_18h", /* random speech, voice clock 176 */
- "fx_19a", /* random speech, voice clock 128 */
- "fx_19b", /* random speech, voice clock 128 */
- "fx_19c", /* random speech, voice clock 128 */
- "fx_19d", /* random speech, voice clock 128 */
- "fx_19e", /* random speech, voice clock 128 */
- "fx_19f", /* random speech, voice clock 128 */
- "fx_19g", /* random speech, voice clock 128 */
- "fx_19h", /* random speech, voice clock 128 */
- "fx_20a", /* random speech, voice clock 96 */
- "fx_20b", /* random speech, voice clock 96 */
- "fx_20c", /* random speech, voice clock 96 */
- "fx_20d", /* random speech, voice clock 96 */
- "fx_20e", /* random speech, voice clock 96 */
- "fx_20f", /* random speech, voice clock 96 */
- "fx_20g", /* random speech, voice clock 96 */
- "fx_20h", /* random speech, voice clock 96 */
- "fx_21a", /* random speech, voice clock 62 */
- "fx_21b", /* random speech, voice clock 62 */
- "fx_21c", /* random speech, voice clock 62 */
- "fx_21d", /* random speech, voice clock 62 */
- "fx_21e", /* random speech, voice clock 62 */
- "fx_21f", /* random speech, voice clock 62 */
- "fx_21g", /* random speech, voice clock 62 */
- "fx_21h", /* random speech, voice clock 62 */
- "fx_22", /* EH2 with decreasing voice clock */
- "fx_23", /* O1 with varying voice clock */
- "fx_28",
- "fx_36",
- nullptr /* end of array */
-};
-
-MACHINE_CONFIG_FRAGMENT( reactor_samples )
- MCFG_SOUND_ADD("samples", SAMPLES, 0)
- MCFG_SAMPLES_CHANNELS(1)
- MCFG_SAMPLES_NAMES(reactor_sample_names)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_FRAGMENT( qbert_samples )
- MCFG_SOUND_ADD("samples", SAMPLES, 0)
- MCFG_SAMPLES_CHANNELS(1)
- MCFG_SAMPLES_NAMES(qbert_sample_names)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0)
-MACHINE_CONFIG_END
-
-#endif
-
-
//**************************************************************************
// REV 0 SOUND BOARD: 6502 + 6530 + DAC
//**************************************************************************
@@ -390,12 +171,6 @@ gottlieb_sound_r1_device::gottlieb_sound_r1_device(const machine_config &mconfig
m_votrax(*this, "votrax"),
//m_populate_votrax(false),
m_last_speech_clock(0)
-#if USE_FAKE_VOTRAX
- , m_samples(*this, ":samples"),
- m_score_sample(0),
- m_random_offset(0),
- m_votrax_queuepos(0)
-#endif
{
}
@@ -407,12 +182,6 @@ gottlieb_sound_r1_device::gottlieb_sound_r1_device(const machine_config &mconfig
m_votrax(*this, "votrax"),
//m_populate_votrax(populate_votrax),
m_last_speech_clock(0)
-#if USE_FAKE_VOTRAX
- , m_samples(*this, ":samples"),
- m_score_sample(0),
- m_random_offset(0),
- m_votrax_queuepos(0)
-#endif
{
}
@@ -427,11 +196,6 @@ WRITE8_MEMBER( gottlieb_sound_r1_device::write )
uint8_t pa7 = (data & 0x0f) != 0xf;
uint8_t pa0_5 = ~data & 0x3f;
m_riot->porta_in_set(pa0_5 | (pa7 << 7), 0xbf);
-
-#if USE_FAKE_VOTRAX
- if (pa7 && m_samples != nullptr)
- trigger_sample(pa0_5);
-#endif
}
@@ -469,10 +233,6 @@ WRITE8_MEMBER( gottlieb_sound_r1_device::votrax_data_w )
m_votrax->inflection_w(space, offset, data >> 6);
m_votrax->write(space, offset, ~data & 0x3f);
}
-
-#if USE_FAKE_VOTRAX
- fake_votrax_data_w(data);
-#endif
}
diff --git a/src/mame/audio/gottlieb.h b/src/mame/audio/gottlieb.h
index 77753f57e8d..b32b70c4c69 100644
--- a/src/mame/audio/gottlieb.h
+++ b/src/mame/audio/gottlieb.h
@@ -15,11 +15,6 @@
#include "sound/votrax.h"
-// set to 0 to enable Votrax device and disable samples
-#define USE_FAKE_VOTRAX (1)
-
-
-
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
@@ -108,19 +103,6 @@ private:
// internal state
//bool m_populate_votrax;
uint8_t m_last_speech_clock;
-
-#if USE_FAKE_VOTRAX
-protected:
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
-private:
- void fake_votrax_data_w(uint8_t data);
- void trigger_sample(uint8_t data);
- optional_device<samples_device> m_samples;
- uint8_t m_score_sample;
- uint8_t m_random_offset;
- uint8_t m_votrax_queue[100];
- uint8_t m_votrax_queuepos;
-#endif
};
// fully populated rev 1 sound board
@@ -203,10 +185,3 @@ private:
uint8_t m_sp0250_latch;
};
-
-/*----------- defined in audio/gottlieb.c -----------*/
-
-#if USE_FAKE_VOTRAX
-MACHINE_CONFIG_EXTERN( reactor_samples );
-MACHINE_CONFIG_EXTERN( qbert_samples );
-#endif
diff --git a/src/mame/audio/mario.cpp b/src/mame/audio/mario.cpp
index 3e7e0d367a9..7ef691acc68 100644
--- a/src/mame/audio/mario.cpp
+++ b/src/mame/audio/mario.cpp
@@ -198,11 +198,11 @@ static NETLIST_START(nl_mario)
LOCAL_SOURCE(nl_mario_dac)
SOLVER(Solver, 48000)
- PARAM(Solver.ACCURACY, 1e-8)
+ PARAM(Solver.ACCURACY, 1e-6)
PARAM(Solver.SOR_FACTOR, 1.0)
PARAM(Solver.GS_THRESHOLD, 5)
PARAM(Solver.GS_LOOPS, 1)
- //PARAM(Solver.LTE, 5e-2) // Default is not enough for paddle control
+ //PARAM(Solver.LTE, 5e-2)
PARAM(Solver.DYNAMIC_TS, 0)
ANALOG_INPUT(V5, 5)
@@ -898,9 +898,9 @@ MACHINE_CONFIG_FRAGMENT( mario_audio )
MCFG_NETLIST_SETUP(nl_mario)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
- MCFG_NETLIST_LOGIC_INPUT("snd_nl", "snd0", "SOUND0.IN", 0, 1)
- MCFG_NETLIST_LOGIC_INPUT("snd_nl", "snd7", "SOUND7.IN", 0, 1)
- MCFG_NETLIST_LOGIC_INPUT("snd_nl", "dac", "DAC.VAL", 0, 255)
+ MCFG_NETLIST_LOGIC_INPUT("snd_nl", "snd0", "SOUND0.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT("snd_nl", "snd7", "SOUND7.IN", 0)
+ MCFG_NETLIST_INT_INPUT("snd_nl", "dac", "DAC.VAL", 0, 255)
MCFG_NETLIST_STREAM_OUTPUT("snd_nl", 0, "ROUT.1")
MCFG_NETLIST_ANALOG_MULT_OFFSET(150000.0, 0.0)
diff --git a/src/mame/audio/midway.cpp b/src/mame/audio/midway.cpp
index f7393ffb247..27dc8fe24db 100644
--- a/src/mame/audio/midway.cpp
+++ b/src/mame/audio/midway.cpp
@@ -21,7 +21,6 @@
//**************************************************************************
#define SSIO_CLOCK XTAL_16MHz
-#define CSDELUXE_CLOCK XTAL_16MHz
#define SOUNDSGOOD_CLOCK XTAL_16MHz
#define TURBOCS_CLOCK XTAL_8MHz
#define SQUAWKTALK_CLOCK XTAL_3_579545MHz
@@ -33,7 +32,6 @@
//**************************************************************************
extern const device_type MIDWAY_SSIO = &device_creator<midway_ssio_device>;
-extern const device_type MIDWAY_CHIP_SQUEAK_DELUXE = &device_creator<midway_chip_squeak_deluxe_device>;
extern const device_type MIDWAY_SOUNDS_GOOD = &device_creator<midway_sounds_good_device>;
extern const device_type MIDWAY_TURBO_CHIP_SQUEAK = &device_creator<midway_turbo_chip_squeak_device>;
extern const device_type MIDWAY_SQUAWK_N_TALK = &device_creator<midway_squawk_n_talk_device>;
@@ -484,205 +482,6 @@ void midway_ssio_device::device_timer(emu_timer &timer, device_timer_id id, int
//**************************************************************************
-// CHIP SQUEAK DELUXE BOARD
-//**************************************************************************
-
-//-------------------------------------------------
-// midway_chip_squeak_deluxe_device - constructor
-//-------------------------------------------------
-
-midway_chip_squeak_deluxe_device::midway_chip_squeak_deluxe_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, MIDWAY_CHIP_SQUEAK_DELUXE, "Midway Chip Squeak Deluxe Sound Board", tag, owner, clock, "midcsd", __FILE__),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia(*this, "pia"),
- m_dac(*this, "dac"),
- m_status(0),
- m_dacval(0)
-{
-}
-
-
-//-------------------------------------------------
-// read - return the status value
-//-------------------------------------------------
-
-READ8_MEMBER(midway_chip_squeak_deluxe_device::read)
-{
- return m_status;
-}
-
-
-//-------------------------------------------------
-// write - handle an external write to the input
-// latch
-//-------------------------------------------------
-
-WRITE8_MEMBER(midway_chip_squeak_deluxe_device::write)
-{
- synchronize(0, data);
-}
-
-
-//-------------------------------------------------
-// reset_write - write to the reset line
-//-------------------------------------------------
-
-WRITE_LINE_MEMBER(midway_chip_squeak_deluxe_device::reset_write)
-{
- m_cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
-}
-
-
-//-------------------------------------------------
-// porta_w - PIA port A writes
-//-------------------------------------------------
-
-WRITE8_MEMBER(midway_chip_squeak_deluxe_device::porta_w)
-{
- m_dacval = (data << 2) | (m_dacval & 3);
- m_dac->write(m_dacval);
-}
-
-
-//-------------------------------------------------
-// portb_w - PIA port B writes
-//-------------------------------------------------
-
-WRITE8_MEMBER(midway_chip_squeak_deluxe_device::portb_w)
-{
- m_dacval = (m_dacval & ~3) | (data >> 6);
- m_dac->write(m_dacval);
-
- uint8_t z_mask = m_pia->port_b_z_mask();
- if (~z_mask & 0x10) m_status = (m_status & ~1) | ((data >> 4) & 1);
- if (~z_mask & 0x20) m_status = (m_status & ~2) | ((data >> 4) & 2);
-}
-
-
-//-------------------------------------------------
-// irq_w - IRQ line state changes
-//-------------------------------------------------
-
-WRITE_LINE_MEMBER(midway_chip_squeak_deluxe_device::irq_w)
-{
- int combined_state = m_pia->irq_a_state() | m_pia->irq_b_state();
- m_cpu->set_input_line(4, combined_state ? ASSERT_LINE : CLEAR_LINE);
-}
-
-
-//-------------------------------------------------
-// pia_r - PIA read access
-//-------------------------------------------------
-
-READ16_MEMBER(midway_chip_squeak_deluxe_device::pia_r)
-{
- // Spy Hunter accesses the MSB; Turbo Tag access via the LSB
- // My guess is that Turbo Tag works through a fluke, whereby the 68000
- // using the MOVEP instruction outputs the same value on the high and
- // low bytes.
- if (ACCESSING_BITS_8_15)
- return m_pia->read_alt(space, offset) << 8;
- else
- return m_pia->read_alt(space, offset);
-}
-
-
-//-------------------------------------------------
-// pia_w - PIA write access
-//-------------------------------------------------
-
-WRITE16_MEMBER(midway_chip_squeak_deluxe_device::pia_w)
-{
- if (ACCESSING_BITS_8_15)
- m_pia->write_alt(space, offset, data >> 8);
- else
- m_pia->write_alt(space, offset, data);
-}
-
-
-//-------------------------------------------------
-// audio CPU map
-//-------------------------------------------------
-
-// address map determined by PAL; not verified
-static ADDRESS_MAP_START( csdeluxe_map, AS_PROGRAM, 16, midway_chip_squeak_deluxe_device )
- ADDRESS_MAP_UNMAP_HIGH
- ADDRESS_MAP_GLOBAL_MASK(0x1ffff)
- AM_RANGE(0x000000, 0x007fff) AM_ROM
- AM_RANGE(0x018000, 0x018007) AM_READWRITE(pia_r, pia_w)
- AM_RANGE(0x01c000, 0x01cfff) AM_RAM
-ADDRESS_MAP_END
-
-
-//-------------------------------------------------
-// machine configuration
-//-------------------------------------------------
-
-static MACHINE_CONFIG_FRAGMENT(midway_chip_squeak_deluxe)
- MCFG_CPU_ADD("cpu", M68000, CSDELUXE_CLOCK/2)
- MCFG_CPU_PROGRAM_MAP(csdeluxe_map)
-
- MCFG_DEVICE_ADD("pia", PIA6821, 0)
- MCFG_PIA_WRITEPA_HANDLER(WRITE8(midway_chip_squeak_deluxe_device, porta_w))
- MCFG_PIA_WRITEPB_HANDLER(WRITE8(midway_chip_squeak_deluxe_device, portb_w))
- MCFG_PIA_IRQA_HANDLER(WRITELINE(midway_chip_squeak_deluxe_device, irq_w))
- MCFG_PIA_IRQB_HANDLER(WRITELINE(midway_chip_squeak_deluxe_device, irq_w))
-
- MCFG_SOUND_ADD("dac", AD7533, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0)
- MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
- MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
-MACHINE_CONFIG_END
-
-
-//-------------------------------------------------
-// device_mconfig_additions - return a pointer to
-// the device's machine fragment
-//-------------------------------------------------
-
-machine_config_constructor midway_chip_squeak_deluxe_device::device_mconfig_additions() const
-{
- return MACHINE_CONFIG_NAME( midway_chip_squeak_deluxe );
-}
-
-
-//-------------------------------------------------
-// device_start - device-specific startup
-//-------------------------------------------------
-
-void midway_chip_squeak_deluxe_device::device_start()
-{
- save_item(NAME(m_status));
- save_item(NAME(m_dacval));
-}
-
-
-//-------------------------------------------------
-// device_reset - device-specific reset
-//-------------------------------------------------
-
-void midway_chip_squeak_deluxe_device::device_reset()
-{
-}
-
-
-//-------------------------------------------------
-// device_timer - timer callbacks
-//-------------------------------------------------
-
-void midway_chip_squeak_deluxe_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
-{
- m_pia->portb_w(param & 0x0f);
- m_pia->ca1_w(~param & 0x10);
-
- // oftentimes games will write one nibble at a time; the sync on this is very
- // important, so we boost the interleave briefly while this happens
- machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
-}
-
-
-
-//**************************************************************************
// SOUNDS GOOD BOARD
//**************************************************************************
diff --git a/src/mame/audio/midway.h b/src/mame/audio/midway.h
index e248a75bb4b..3539441519c 100644
--- a/src/mame/audio/midway.h
+++ b/src/mame/audio/midway.h
@@ -28,7 +28,6 @@
//**************************************************************************
extern const device_type MIDWAY_SSIO;
-extern const device_type MIDWAY_CHIP_SQUEAK_DELUXE;
extern const device_type MIDWAY_SOUNDS_GOOD;
extern const device_type MIDWAY_TURBO_CHIP_SQUEAK;
extern const device_type MIDWAY_SQUAWK_N_TALK;
@@ -108,46 +107,6 @@ private:
};
-// ======================> midway_chip_squeak_deluxe_device
-
-class midway_chip_squeak_deluxe_device : public device_t,
- public device_mixer_interface
-{
-public:
- // construction/destruction
- midway_chip_squeak_deluxe_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- // read/write
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
- DECLARE_WRITE_LINE_MEMBER(reset_write);
-
- // internal communications
- DECLARE_WRITE8_MEMBER(porta_w);
- DECLARE_WRITE8_MEMBER(portb_w);
- DECLARE_WRITE_LINE_MEMBER(irq_w);
- DECLARE_READ16_MEMBER(pia_r);
- DECLARE_WRITE16_MEMBER(pia_w);
-
-protected:
- // device-level overrides
- virtual machine_config_constructor device_mconfig_additions() const override;
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
-
-private:
- // devices
- required_device<m68000_device> m_cpu;
- required_device<pia6821_device> m_pia;
- required_device<dac_word_interface> m_dac;
-
- // internal state
- uint8_t m_status;
- uint16_t m_dacval;
-};
-
-
// ======================> midway_sounds_good_device
class midway_sounds_good_device : public device_t,
diff --git a/src/mame/audio/wow.cpp b/src/mame/audio/wow.cpp
deleted file mode 100644
index e09cd7b57de..00000000000
--- a/src/mame/audio/wow.cpp
+++ /dev/null
@@ -1,183 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Mike Coates
-/**************************************************************************
-
- WOW/Votrax SC-01 Emulator
-
- Mike@Dissfulfils.co.uk
-
- Modified to match phonemes to words
-
- Ajudd@quantime.co.uk
-
-**************************************************************************
-
-wow_sh_start - Start emulation, load samples from Votrax subdirectory
-wow_sh_w - Write data to votrax port
-wow_sh_status - Return busy status (-1 = busy)
-wow_port_2_r - Returns status of voice port
-wow_sh_ update- Null
-
-**************************************************************************/
-
-#include "emu.h"
-#include "cpu/z80/z80.h"
-#include "includes/astrocde.h"
-#include "audio/wow.h"
-
-/****************************************************************************
- * 64 Phonemes - currently 1 sample per phoneme, will be combined sometime!
- ****************************************************************************/
-
-static const char *const PhonemeTable[65] =
-{
- "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
- "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
- "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
- "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
- "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
- "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
- "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
- "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
- nullptr
-};
-
-/* Missing samples : ready, from, one, bite, youl, explode, if, myself, back,
- cant, do, wait, worlings, very, babies, breath, fire, beat, rest,
- then, never, worlock, escape, door, try, any, harder, only, meet, with,
- doom, pop,
- Problems with YOU and YOU'LL and YOU'DD */
-
-static const char *const wowWordTable[] =
-{
-"AH1I3Y1", "UH1GA1EH1N", "AHAH2", "AE1EH3M", "AE1EH3ND",
-"anew.wav", "AH1NUHTHER", "AE1NY", "anyone.wav", "appear.wav", "AH1UH3R", "UHR", "BABYY1S", "BAE1EH3K",
-"BE1T", "become.wav", "BEHST", "BEH1TER", "BUH3AH2YT", "bones.wav", "BRE1YTH", "but.wav", "can.wav", "KAE1EH3NT",
-"chance.wav", "CHEHST", "KO1O2I3Y1N", "dance.wav", "DE1STRO1UH3I3AY",
-"DE1VEH1LUH3PT", "DIUU", "DONT", "DUUM", "DOO1R", "draw.wav", "DUHNJEH1N", "DUHNJEH1NZ",
-"each.wav", "eaten.wav", "EHSPA0KA2I3Y1P", "EHKPA0SPLOU1D", "fear.wav", "FAH1I3YND", "FAH1I3Y1ND", "FAH1EH3AYR", "FOR", "FRUHMM",
-"garwor.wav", "GEHT", "GEH1T", "GEHEH3T", "GEHTING", "good.wav", "HAH1HAH1HAH1HAH1", "HAH1RDER",
-"hasnt.wav", "have.wav", "HEH1I3VE1WA1I3Y1TS", "HAI1Y1", "HOP",
-"HUHNGRY", "HUHNGGRY", "HERRY", "AH1EH3I3Y", "AH1UH3I3Y", "IF", "I1F", "AH1I3YM", "AH1EH3I3YL", "AH1I3Y1L", "IN1",
-"INSERT", "invisibl.wav", "IT", "lie.wav", "MAE1EH3DJI1KUH1L",
-"MAE1EH3DJI1KUH1L", "MEE1", "MEE1T", "months.wav",
-"MAH1EH3I3Y", "MAH2AH2EH3I3Y", "MAH1I1Y", "MAH1I3Y1", "MAH1I3Y", "MAH1I3YSEHLF", "near.wav", "NEH1VER",
-"NAH1UH3U1", "UHV", "AWF", "WUHN", "O1NLY", "UHVEHN", "PA1", "PEHTS", "PAH1WERFUH1L", "PAH1P",
-"radar.wav", "REHDY",
-"REHST", "say.wav", "SAH1I3AYEHNS", "SE1Y", "PA0", "start.wav", "THVAYAY", "THVUH", "THVUH1", "THUH1", "THVEH1N",
-"THVRU", "thurwor.wav", "time.wav", "TU1", "TUU1", "TIUU1", "TREH1ZHERT", "TRAH1EH3I3Y", "VEHEH3RY", "WA2AYYT",
-"WOO1R", "WORYER", "watch.wav", "WE1Y", "WEHLKUHM",
-"WERR", "WAH1EH3I3L", "WIL", "WITH", "WIZERD", "wont.wav",
-"WO1O2R", "WO1ERLD", "WORLINGS", "WORLUHK",
-"YI3U", "Y1IUU", "YIUUI", "Y1IUU1U1", "YI3U1", "Y1IUUL", "YIUU1L", "Y1IUUD", "YO2O2R",nullptr
-};
-
-#define num_samples (sizeof(wowWordTable)/sizeof(char *))
-
-
-const char *const wow_sample_names[] =
-{
- "*wow",
- "a", "again", "ahh", "am", "and",
- "anew", "another", "any", "anyone", "appear", "are", "are", "babies", "back",
- "beat", "become", "best", "better", "bite", "bones", "breath", "but", "can", "cant",
- "chance", "chest", "coin", "dance", "destroy",
- "develop", "do", "dont", "doom", "door", "draw", "dungeon", "dungeons",
- "each", "eaten", "escape", "explode", "fear", "find", "find", "fire", "for", "from",
- "garwor", "get", "get", "get", "getting", "good", "hahahaha", "harder",
- "hasnt", "have", "heavyw", "hey", "hope",
- "hungry", "hungry", "hurry", "i", "i", "if", "if", "im", "i1", "ill", "in",
- "insert", "invisibl", "it", "lie", "magic",
- "magical", "me", "meet", "months",
- "my", "my", "my", "my", "my", "myself", "near", "never",
- "now", "of", "off", "one", "only", "oven", "pause", "pets", "powerful", "pop",
- "radar", "ready",
- "rest", "say", "science", "see", "spause", "start", "the", "the", "the", "the", "then",
- "through", "thurwor", "time", "to", "to", "to", "treasure", "try", "very", "wait",
- "war", "warrior", "watch", "we", "welcome",
- "were", "while", "will", "with", "wizard", "wont",
- "wor", "world", "worlings", "worlock",
- "you", "you", "you", "you", "you", "youl", "youl", "youd", "your",nullptr
-};
-
-
-READ8_MEMBER( astrocde_state::wow_speech_r )
-{
- uint8_t data = offset >> 8;
-#if USE_FAKE_VOTRAX
- int Phoneme/*, Intonation*/;
- int i = 0;
- offset &= 0xff;
-
- m_totalword_ptr = m_totalword;
-
- Phoneme = data & 0x3F;
- //Intonation = data >> 6;
-
- //logerror("Data : %d Speech : %s at intonation %d\n",Phoneme, PhonemeTable[Phoneme],Intonation);
-
- if(Phoneme==63) {
- m_samples->stop(0);
- //logerror("Clearing sample %s\n",m_totalword);
- m_totalword[0] = 0; /* Clear the total word stack */
- return data;
- }
- if (Phoneme==3) /* We know PA0 is never part of a word */
- m_totalword[0] = 0; /* Clear the total word stack */
-
- /* Phoneme to word translation */
-
- if (*(m_totalword) == 0) {
- strcpy(m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
- if (m_plural != 0) {
- //logerror("found a possible plural at %d\n",m_plural-1);
- if (!strcmp("S",m_totalword)) { /* Plural check */
- m_samples->start(0, num_samples-2); /* play the sample at position of word */
- m_samples->set_frequency(0, 11025); /* play at correct rate */
- m_totalword[0] = 0; /* Clear the total word stack */
- m_oldword[0] = 0; /* Clear the total word stack */
- return data;
- } else {
- m_plural=0;
- }
- }
- } else
- strcat(m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
-
- //logerror("Total word = %s\n",m_totalword);
-
- for (i=0; wowWordTable[i]; i++) {
- if (!strcmp(wowWordTable[i],m_totalword)) { /* Scan the word (sample) table for the complete word */
- /* WOW has Dungeon */
- if ((!strcmp("GDTO1RFYA2N",m_totalword)) || (!strcmp("RO1U1BAH1T",m_totalword)) || (!strcmp("KO1UH3I3E1N",m_totalword))) { /* May be plural */
- m_plural=i+1;
- strcpy(m_oldword,m_totalword);
- //logerror("Storing sample position %d and copying string %s\n",m_plural,m_oldword);
- } else {
- m_plural=0;
- }
- m_samples->start(0, i); /* play the sample at position of word */
- m_samples->set_frequency(0, 11025); /* play at correct rate */
- //logerror("Playing sample %d\n",i);
- m_totalword[0] = 0; /* Clear the total word stack */
- return data;
- }
- }
-#else
- m_votrax->inflection_w(space, 0, data >> 6);
- m_votrax->write(space, 0, data);
-#endif
-
- /* Note : We should really also use volume in this as well as frequency */
- return data; /* Return nicely */
-}
-
-
-CUSTOM_INPUT_MEMBER( astrocde_state::wow_speech_status_r )
-{
-#if USE_FAKE_VOTRAX
- return !m_samples->playing(0);
-#else
- return m_votrax->request();
-#endif
-}
diff --git a/src/mame/audio/wow.h b/src/mame/audio/wow.h
deleted file mode 100644
index a523dbb41e2..00000000000
--- a/src/mame/audio/wow.h
+++ /dev/null
@@ -1,4 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Mike Coates
-
-extern const char *const wow_sample_names[];
diff --git a/src/mame/bus/vme/mzr8105.cpp b/src/mame/bus/vme/mzr8105.cpp
new file mode 100644
index 00000000000..e0a722ab0eb
--- /dev/null
+++ b/src/mame/bus/vme/mzr8105.cpp
@@ -0,0 +1,71 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+
+#include "emu.h"
+#include "mzr8105.h"
+
+#define LOG_GENERAL 0x01
+#define LOG_SETUP 0x02
+#define LOG_PRINTF 0x04
+
+#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+
+#if VERBOSE & LOG_PRINTF
+#define logerror printf
+#endif
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type VME_MZR8105 = &device_creator<vme_mzr8105_card_device>;
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+MACHINE_CONFIG_EXTERN( mzr8105 );
+
+machine_config_constructor vme_mzr8105_card_device::device_mconfig_additions() const
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+ return MACHINE_CONFIG_NAME( mzr8105 );
+}
+
+vme_mzr8105_card_device::vme_mzr8105_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_MZR8105, "Mizar 8105 68K CPU board", tag, owner, clock, "mzr8105", __FILE__),
+ device_vme_p1_card_interface(mconfig, *this)
+{
+ m_slot = 1;
+ LOG("%s %s\n", tag, FUNCNAME);
+}
+
+vme_mzr8105_card_device::vme_mzr8105_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source),
+ device_vme_p1_card_interface(mconfig, *this)
+{
+ LOG("%s %s\n", tag, FUNCNAME);
+}
+
+void vme_mzr8105_card_device::device_start()
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+}
+
+void vme_mzr8105_card_device::device_reset()
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+}
diff --git a/src/mame/bus/vme/mzr8105.h b/src/mame/bus/vme/mzr8105.h
new file mode 100644
index 00000000000..50041eac7fe
--- /dev/null
+++ b/src/mame/bus/vme/mzr8105.h
@@ -0,0 +1,26 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+#ifndef VME_MZR8105_H
+#define VME_MZR8105_H
+#pragma once
+
+#include "bus/vme/vme.h"
+//#include "includes/mzr8105.h"
+#include "bus/vme/mzr8105.h"
+
+extern const device_type VME_MZR8105;
+
+class vme_mzr8105_card_device : public device_t
+ ,public device_vme_p1_card_interface
+{
+public:
+ vme_mzr8105_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme_mzr8105_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const override;
+private:
+ virtual void device_start() override;
+ virtual void device_reset() override;
+};
+
+#endif // VME_MZR8105_H
diff --git a/src/mame/bus/vme/mzr8300.cpp b/src/mame/bus/vme/mzr8300.cpp
new file mode 100644
index 00000000000..669f1579b28
--- /dev/null
+++ b/src/mame/bus/vme/mzr8300.cpp
@@ -0,0 +1,92 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+
+#include "emu.h"
+#include "mzr8300.h"
+#include "machine/z80sio.h"
+
+#define LOG_GENERAL 0x01
+#define LOG_SETUP 0x02
+#define LOG_PRINTF 0x04
+
+#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+
+#if VERBOSE & LOG_PRINTF
+#define logerror printf
+#endif
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type VME_MZR8300 = &device_creator<vme_mzr8300_card_device>;
+
+vme_mzr8300_card_device::vme_mzr8300_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_MZR8300, "Mizar 8300 SIO serial board", tag, owner, clock, "mzr8300", __FILE__),
+ device_vme_p1_card_interface(mconfig, *this)
+{
+ LOG("%s %s\n", tag, FUNCNAME);
+}
+
+vme_mzr8300_card_device::vme_mzr8300_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source),
+ device_vme_p1_card_interface(mconfig, *this)
+{
+ LOG("%s %s\n", tag, FUNCNAME);
+}
+
+void vme_mzr8300_card_device::device_start()
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+ set_vme_p1_device();
+
+ /* Setup r/w handlers for first SIO in A16 */
+ uint32_t base = 0xFF0000;
+ m_vme_p1->install_device(base + 0, base + 1, // Channel B - Data
+ read8_delegate(FUNC(z80sio_device::db_r), subdevice<z80sio_device>("sio0")), write8_delegate(FUNC(z80sio_device::db_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+ m_vme_p1->install_device(base + 2, base + 3, // Channel B - Control
+ read8_delegate(FUNC(z80sio_device::cb_r), subdevice<z80sio_device>("sio0")), write8_delegate(FUNC(z80sio_device::cb_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+ m_vme_p1->install_device(base + 4, base + 5, // Channel A - Data
+ read8_delegate(FUNC(z80sio_device::da_r), subdevice<z80sio_device>("sio0")), write8_delegate(FUNC(z80sio_device::da_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+ m_vme_p1->install_device(base + 6, base + 7, // Channel A - Control
+ read8_delegate(FUNC(z80sio_device::ca_r), subdevice<z80sio_device>("sio0")), write8_delegate(FUNC(z80sio_device::ca_w), subdevice<z80sio_device>("sio0")), 0x00ff);
+}
+
+void vme_mzr8300_card_device::device_reset()
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+}
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+MACHINE_CONFIG_EXTERN( mzr8300 );
+
+machine_config_constructor vme_mzr8300_card_device::device_mconfig_additions() const
+{
+ LOG("%s %s\n", tag(), FUNCNAME);
+ return MACHINE_CONFIG_NAME( mzr8300 );
+}
+
+READ8_MEMBER (vme_mzr8300_card_device::read8){
+ LOG("%s()\n", FUNCNAME);
+ return (uint8_t) 0;
+}
+
+WRITE8_MEMBER (vme_mzr8300_card_device::write8){
+ LOG("%s()\n", FUNCNAME);
+}
diff --git a/src/mame/bus/vme/mzr8300.h b/src/mame/bus/vme/mzr8300.h
new file mode 100644
index 00000000000..009e47c8dd6
--- /dev/null
+++ b/src/mame/bus/vme/mzr8300.h
@@ -0,0 +1,31 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+#ifndef VME_MZR8300_H
+#define VME_MZR8300_H
+#pragma once
+
+#include "bus/vme/vme.h"
+//#include "includes/mzr8300.h"
+#include "bus/vme/mzr8300.h"
+
+extern const device_type VME_MZR8300;
+
+class vme_mzr8300_card_device :
+ public device_t
+ ,public device_vme_p1_card_interface
+{
+public:
+ vme_mzr8300_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme_mzr8300_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ // optional information overrides
+
+ virtual machine_config_constructor device_mconfig_additions() const override;
+ virtual DECLARE_READ8_MEMBER (read8) override;
+ virtual DECLARE_WRITE8_MEMBER (write8) override;
+protected:
+ virtual void device_start() override;
+ virtual void device_reset() override;
+private:
+};
+
+#endif // VME_MZR8300_H
diff --git a/src/mame/drivers/24cdjuke.cpp b/src/mame/drivers/24cdjuke.cpp
index eb0a0de1e11..9d84a16ac8a 100644
--- a/src/mame/drivers/24cdjuke.cpp
+++ b/src/mame/drivers/24cdjuke.cpp
@@ -293,7 +293,7 @@ static MACHINE_CONFIG_START( midcoin24cdjuke, midcoin24cdjuke_state )
MCFG_I8255_OUT_PORTC_CB(WRITE8(midcoin24cdjuke_state, kb_col_w))
MCFG_DEVICE_ADD("ic31", I8255A, 0)
- MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B", 0))
+ MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B"))
MCFG_I8255_IN_PORTC_CB(IOPORT("MD4"))
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/aa310.cpp b/src/mame/drivers/aa310.cpp
index 1a332d05c20..6a3aa2f042f 100644
--- a/src/mame/drivers/aa310.cpp
+++ b/src/mame/drivers/aa310.cpp
@@ -124,7 +124,6 @@ protected:
WRITE_LINE_MEMBER(aa310_state::aa310_wd177x_intrq_w)
{
- printf("%d IRQ\n",state);
if (state)
{
archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY);
@@ -135,7 +134,6 @@ WRITE_LINE_MEMBER(aa310_state::aa310_wd177x_intrq_w)
WRITE_LINE_MEMBER(aa310_state::aa310_wd177x_drq_w)
{
- printf("%d DRQ\n",state);
if (state)
{
archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY_DRQ);
@@ -403,10 +401,7 @@ static MACHINE_CONFIG_START( aa310, aa310_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
- MCFG_SCREEN_SIZE(1280, 1024) //TODO: default screen size
- MCFG_SCREEN_VISIBLE_AREA(0*8, 1280 - 1, 0*16, 1024 - 1)
+ MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz,1024,0,735,624/2,0,292) // RiscOS 3 default screen settings
MCFG_SCREEN_UPDATE_DRIVER(archimedes_state, screen_update)
MCFG_PALETTE_ADD("palette", 32768)
@@ -415,6 +410,7 @@ static MACHINE_CONFIG_START( aa310, aa310_state )
MCFG_RAM_DEFAULT_SIZE("1M")
MCFG_WD1772_ADD("fdc", 8000000 / 1) // TODO: frequency
+ MCFG_WD_FDC_DISABLE_MOTOR_CONTROL
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(aa310_state, aa310_wd177x_intrq_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(aa310_state, aa310_wd177x_drq_w))
MCFG_FLOPPY_DRIVE_ADD("fdc:0", aa310_floppies, "35dd", aa310_state::floppy_formats)
diff --git a/src/mame/drivers/aerofgt.cpp b/src/mame/drivers/aerofgt.cpp
index bc3e201f97e..9846b97e08a 100644
--- a/src/mame/drivers/aerofgt.cpp
+++ b/src/mame/drivers/aerofgt.cpp
@@ -2570,40 +2570,74 @@ ROM_START( karatblzbl )
ROM_LOAD16_BYTE( "8.u65", 0x080001, 0x040000, CRC(b491201a) SHA1(c18cb1cc8a8bf031e00d8d89de62f7ed5548e767) )
ROM_END
+ROM_START( turbofrc ) // World version with no copyright notice
+ ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
+ ROM_LOAD16_WORD_SWAP( "4v2.subpcb.u2", 0x00000, 0x40000, CRC(721300ee) SHA1(79ab32fdfd377592a0bdbd1c4794cfd529a3eb7b) ) // 27c2048 - located on a OR-10 SUB BOARD - 4 stamped on chip with VideoSystem logo V
+ ROM_LOAD16_WORD_SWAP( "4v1.subpcb.u1", 0x40000, 0x40000, CRC(6cd5312b) SHA1(57b109fe268fb963e981c91b6d288667a3c9a665) ) // 27c2048 - located on a OR-10 SUB BOARD - 4 stamped on chip with VideoSystem logo V
+ ROM_LOAD16_WORD_SWAP( "4v3.u14", 0x80000, 0x40000, CRC(63f50557) SHA1(f8dba8c9ba412c9a67457ec31a804c57593ab20b) ) // 27c2048 - 4 stamped on chip with VideoSystem logo V
+
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_LOAD( "6.u166", 0x00000, 0x20000, CRC(2ca14a65) SHA1(95f6e7b4fa7ca26872ff472d7e6fb75fd4f281d5) ) // 27c1001
+ ROM_RELOAD( 0x10000, 0x20000 )
+
+ ROM_REGION( 0x0a0000, "gfx1", 0 )
+ ROM_LOAD( "lh534ggs.u94", 0x000000, 0x80000, CRC(baa53978) SHA1(7f103122dd0bf675226ccf309fba73f645e0c79b) ) // mask rom
+ ROM_LOAD( "7.u95", 0x080000, 0x20000, CRC(71a6c573) SHA1(f14ebca676d85fabcde27631145933abc376dd12) ) // 27c1001a
+
+ ROM_REGION( 0x0a0000, "gfx2", 0 )
+ ROM_LOAD( "lh534ggy.u105", 0x000000, 0x80000, CRC(4de4e59e) SHA1(571396dadb8aac043319cabe24e629210e442d57) ) // mask rom
+ ROM_LOAD( "8.u106", 0x080000, 0x20000, CRC(c6479eb5) SHA1(47a58f082c73bc9dae3970e760ba46478ce6a190) ) // 27c1001a
+
+ ROM_REGION( 0x200000, "spritegfx", 0 )
+ ROM_LOAD( "lh534gh2.u116", 0x000000, 0x80000, CRC(df210f3b) SHA1(990ac43e4a46fee6b929c5b27d317cdadf179b8b) ) // mask rom
+ ROM_LOAD( "5.u118", 0x080000, 0x40000, CRC(f61d1d79) SHA1(2b8e33912c05c26170afd2fced0ff06cb7a097fa) ) // 27c2048
+ ROM_LOAD( "lh534gh1.u117", 0x100000, 0x80000, CRC(f70812fd) SHA1(1964e1134940825211cd4825fdd3f13b8242192d) ) // mask rom
+ ROM_LOAD( "4.u119", 0x180000, 0x40000, CRC(474ea716) SHA1(67753e96fa4fc8cd689a8bddeb60dbde259cacaa) ) // 27c2048
+
+ ROM_REGION( 0x080000, "gfx4", 0 )
+ ROM_LOAD( "lh532a52.u134", 0x000000, 0x40000, CRC(3c725a48) SHA1(120e62b2ef911bfa0f8a1468966ff70fab2d7582) ) // mask rom
+ ROM_LOAD( "lh532a51.u135", 0x040000, 0x40000, CRC(95c63559) SHA1(5f77bd22dce1ac4aa7291e5c3c3c358e2f066e8c) ) // mask rom
+
+ ROM_REGION( 0x40000, "ymsnd.deltat", 0 ) /* sound samples */
+ ROM_LOAD( "lh532h74.u180", 0x00000, 0x40000, CRC(a3d43254) SHA1(d0225d6cf9299ecc39d8e3f64f48cf80d554a67f) ) // mask rom
+
+ ROM_REGION( 0x100000, "ymsnd", 0 ) /* sound samples */
+ ROM_LOAD( "lh538o7j.u179", 0x000000, 0x100000, CRC(60ca0333) SHA1(28b94edc98d360386759780ccd1122d43ffa5279) ) // mask rom
+ROM_END
-ROM_START( turbofrc )
+ROM_START( turbofrcu ) // US version: most notable thing in there is the points value of the rocks in level 6 (5,000 versus 500).
ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
- ROM_LOAD16_WORD_SWAP( "tfrc2.bin", 0x00000, 0x40000, CRC(721300ee) SHA1(79ab32fdfd377592a0bdbd1c4794cfd529a3eb7b) )
- ROM_LOAD16_WORD_SWAP( "tfrc1.bin", 0x40000, 0x40000, CRC(6cd5312b) SHA1(57b109fe268fb963e981c91b6d288667a3c9a665) )
- ROM_LOAD16_WORD_SWAP( "tfrc3.bin", 0x80000, 0x40000, CRC(63f50557) SHA1(f8dba8c9ba412c9a67457ec31a804c57593ab20b) )
+ ROM_LOAD16_WORD_SWAP( "8v2.subpcb.u2", 0x00000, 0x40000, CRC(721300ee) SHA1(79ab32fdfd377592a0bdbd1c4794cfd529a3eb7b) ) // 27c2048 - located on a OR-10 SUB BOARD - 8 stamped on chip with VideoSystem logo V
+ ROM_LOAD16_WORD_SWAP( "8v1.subpcb.u1", 0x40000, 0x40000, CRC(cc324da6) SHA1(ed2eaff7351914e3ebaf925ddc01be9d44d89fa6) ) // 27c2048 - located on a OR-10 SUB BOARD - 8 stamped on chip with VideoSystem logo V
+ ROM_LOAD16_WORD_SWAP( "8v3.u14", 0x80000, 0x40000, CRC(c0a15480) SHA1(1ec99382e0a00a8167773b1d454a63cc5cd6199c) ) // 27c2048 - 8 stamped on chip with VideoSystem logo V
ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
- ROM_LOAD( "tfrcu166.bin", 0x00000, 0x20000, CRC(2ca14a65) SHA1(95f6e7b4fa7ca26872ff472d7e6fb75fd4f281d5) )
- ROM_RELOAD( 0x10000, 0x20000 )
+ ROM_LOAD( "6.u166", 0x00000, 0x20000, CRC(2ca14a65) SHA1(95f6e7b4fa7ca26872ff472d7e6fb75fd4f281d5) ) // 27c1001
+ ROM_RELOAD( 0x10000, 0x20000 )
ROM_REGION( 0x0a0000, "gfx1", 0 )
- ROM_LOAD( "tfrcu94.bin", 0x000000, 0x80000, CRC(baa53978) SHA1(7f103122dd0bf675226ccf309fba73f645e0c79b) )
- ROM_LOAD( "tfrcu95.bin", 0x080000, 0x20000, CRC(71a6c573) SHA1(f14ebca676d85fabcde27631145933abc376dd12) )
+ ROM_LOAD( "lh534ggs.u94", 0x000000, 0x80000, CRC(baa53978) SHA1(7f103122dd0bf675226ccf309fba73f645e0c79b) ) // mask rom
+ ROM_LOAD( "7.u95", 0x080000, 0x20000, CRC(71a6c573) SHA1(f14ebca676d85fabcde27631145933abc376dd12) ) // 27c1001a
ROM_REGION( 0x0a0000, "gfx2", 0 )
- ROM_LOAD( "tfrcu105.bin", 0x000000, 0x80000, CRC(4de4e59e) SHA1(571396dadb8aac043319cabe24e629210e442d57) )
- ROM_LOAD( "tfrcu106.bin", 0x080000, 0x20000, CRC(c6479eb5) SHA1(47a58f082c73bc9dae3970e760ba46478ce6a190) )
+ ROM_LOAD( "lh534ggy.u105", 0x000000, 0x80000, CRC(4de4e59e) SHA1(571396dadb8aac043319cabe24e629210e442d57) ) // mask rom
+ ROM_LOAD( "8.u106", 0x080000, 0x20000, CRC(c6479eb5) SHA1(47a58f082c73bc9dae3970e760ba46478ce6a190) ) // 27c1001a
ROM_REGION( 0x200000, "spritegfx", 0 )
- ROM_LOAD( "tfrcu116.bin", 0x000000, 0x80000, CRC(df210f3b) SHA1(990ac43e4a46fee6b929c5b27d317cdadf179b8b) )
- ROM_LOAD( "tfrcu118.bin", 0x080000, 0x40000, CRC(f61d1d79) SHA1(2b8e33912c05c26170afd2fced0ff06cb7a097fa) )
- ROM_LOAD( "tfrcu117.bin", 0x100000, 0x80000, CRC(f70812fd) SHA1(1964e1134940825211cd4825fdd3f13b8242192d) )
- ROM_LOAD( "tfrcu119.bin", 0x180000, 0x40000, CRC(474ea716) SHA1(67753e96fa4fc8cd689a8bddeb60dbde259cacaa) )
+ ROM_LOAD( "lh534gh2.u116", 0x000000, 0x80000, CRC(df210f3b) SHA1(990ac43e4a46fee6b929c5b27d317cdadf179b8b) ) // mask rom
+ ROM_LOAD( "5.u118", 0x080000, 0x40000, CRC(f61d1d79) SHA1(2b8e33912c05c26170afd2fced0ff06cb7a097fa) ) // 27c2048
+ ROM_LOAD( "lh534gh1.u117", 0x100000, 0x80000, CRC(f70812fd) SHA1(1964e1134940825211cd4825fdd3f13b8242192d) ) // mask rom
+ ROM_LOAD( "4.u119", 0x180000, 0x40000, CRC(474ea716) SHA1(67753e96fa4fc8cd689a8bddeb60dbde259cacaa) ) // 27c2048
- ROM_REGION( 0x100000, "gfx4", 0 )
- ROM_LOAD( "tfrcu134.bin", 0x000000, 0x80000, CRC(487330a2) SHA1(0bd36c1f5776ba2773f621e9bcb22f56ed1d84ec) )
- ROM_LOAD( "tfrcu135.bin", 0x080000, 0x80000, CRC(3a7e5b6d) SHA1(0079ffaa1bf93a5087c75615c78ec596b28c9a32) )
+ ROM_REGION( 0x080000, "gfx4", 0 )
+ ROM_LOAD( "lh532a52.u134", 0x000000, 0x40000, CRC(3c725a48) SHA1(120e62b2ef911bfa0f8a1468966ff70fab2d7582) ) // mask rom
+ ROM_LOAD( "lh532a51.u135", 0x040000, 0x40000, CRC(95c63559) SHA1(5f77bd22dce1ac4aa7291e5c3c3c358e2f066e8c) ) // mask rom
- ROM_REGION( 0x20000, "ymsnd.deltat", 0 ) /* sound samples */
- ROM_LOAD( "tfrcu180.bin", 0x00000, 0x20000, CRC(39c7c7d5) SHA1(66ee9f7cbc18ffab2c70f77ab0edead6bb018ca9) )
+ ROM_REGION( 0x40000, "ymsnd.deltat", 0 ) /* sound samples */
+ ROM_LOAD( "lh532h74.u180", 0x00000, 0x40000, CRC(a3d43254) SHA1(d0225d6cf9299ecc39d8e3f64f48cf80d554a67f) ) // mask rom
ROM_REGION( 0x100000, "ymsnd", 0 ) /* sound samples */
- ROM_LOAD( "tfrcu179.bin", 0x000000, 0x100000, CRC(60ca0333) SHA1(28b94edc98d360386759780ccd1122d43ffa5279) )
+ ROM_LOAD( "lh538o7j.u179", 0x000000, 0x100000, CRC(60ca0333) SHA1(28b94edc98d360386759780ccd1122d43ffa5279) ) // mask rom
ROM_END
ROM_START( aerofgt )
@@ -2830,8 +2864,8 @@ GAME( 1991, karatblzu,karatblz, karatblz, karatblz, driver_device, 0, ROT0, "V
GAME( 1991, karatblzj,karatblz, karatblz, karatblz, driver_device, 0, ROT0, "Video System Co.", "Toushin Blazers (Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
GAME( 1991, karatblzbl,karatblz,karatblzbl,karatblz,driver_device, 0, ROT0, "bootleg", "Karate Blazers (bootleg with Street Smart sound hardware)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_SOUND )
-GAME( 1991, turbofrc, 0, turbofrc, turbofrc, driver_device, 0, ROT270, "Video System Co.", "Turbo Force (old revision)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
-// there's also an undumped Turbo Force (new revision). Most notable thing in there is the points value of the rocks in level 6 (5.000 versus 500).
+GAME( 1991, turbofrc, 0, turbofrc, turbofrc, driver_device, 0, ROT270, "Video System Co.", "Turbo Force (World)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
+GAME( 1991, turbofrcu,turbofrc, turbofrc, turbofrc, driver_device, 0, ROT270, "Video System Co.", "Turbo Force (US)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
// the tiles on these also contain an alt title 'The Final War' for both the title screen and attract logo was it ever used?
GAME( 1992, aerofgt, 0, aerofgt, aerofgt, driver_device, 0, ROT270, "Video System Co.", "Aero Fighters (World / USA + Canada / Korea / Hong Kong / Taiwan) (newer hardware)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL ) // this has the newer sprite chip etc. unlike all other games in this driver..
diff --git a/src/mame/drivers/apricot.cpp b/src/mame/drivers/apricot.cpp
index eb7d91650a4..bf693bdcc69 100644
--- a/src/mame/drivers/apricot.cpp
+++ b/src/mame/drivers/apricot.cpp
@@ -4,7 +4,9 @@
ACT Apricot PC/Xi
- - Error 29 (timer failed)
+ TODO:
+ - External RS232 data transfers to the Apricot are usually garbage (but
+ sending to an external target works fine)
- Dump of the keyboard MCU ROM needed (can be dumped using test mode)
***************************************************************************/
@@ -16,6 +18,7 @@
#include "machine/i8255.h"
#include "machine/pic8259.h"
#include "machine/z80dart.h"
+#include "machine/74153.h"
#include "machine/wd_fdc.h"
#include "video/mc6845.h"
#include "sound/sn76496.h"
@@ -25,6 +28,7 @@
#include "bus/rs232/rs232.h"
#include "bus/apricot/expansion/expansion.h"
#include "bus/apricot/keyboard/keyboard.h"
+#include "softlist.h"
//**************************************************************************
@@ -51,8 +55,6 @@ public:
m_floppy1(*this, "ic68:1"),
m_palette(*this, "palette"),
m_screen_buffer(*this, "screen_buffer"),
- m_data_selector_dtr(1),
- m_data_selector_rts(1),
m_video_mode(0),
m_display_on(1),
m_display_enabled(0),
@@ -69,8 +71,6 @@ public:
DECLARE_WRITE8_MEMBER(i8255_portb_w);
DECLARE_READ8_MEMBER(i8255_portc_r);
DECLARE_WRITE8_MEMBER(i8255_portc_w);
- DECLARE_WRITE_LINE_MEMBER(timer_out1);
- DECLARE_WRITE_LINE_MEMBER(timer_out2);
DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w);
DECLARE_READ8_MEMBER(sio_da_r);
DECLARE_READ8_MEMBER(sio_ca_r);
@@ -82,9 +82,6 @@ public:
DECLARE_WRITE_LINE_MEMBER(apricot_hd6845_de) { m_display_enabled = state; };
- DECLARE_WRITE_LINE_MEMBER(data_selector_dtr_w) { m_data_selector_dtr = state; };
- DECLARE_WRITE_LINE_MEMBER(data_selector_rts_w) { m_data_selector_rts = state; };
-
MC6845_UPDATE_ROW(crtc_update_row);
uint32_t screen_update_apricot(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -108,9 +105,6 @@ private:
required_device<palette_device> m_palette;
required_shared_ptr<uint16_t> m_screen_buffer;
- int m_data_selector_dtr;
- int m_data_selector_rts;
-
bool m_video_mode;
bool m_display_on;
@@ -201,27 +195,6 @@ WRITE8_MEMBER( apricot_state::i8255_portc_w )
// schematic page 294 says pc6 outputs to centronics pin 15, which is unused
}
-WRITE_LINE_MEMBER( apricot_state::timer_out1 )
-{
- // receive clock via timer 1
- if (m_data_selector_rts == 0 && m_data_selector_dtr == 0)
- m_sio->rxca_w(state);
-}
-
-WRITE_LINE_MEMBER( apricot_state::timer_out2 )
-{
- // transmit clock via timer 2
- if (m_data_selector_rts == 0 && m_data_selector_dtr == 0)
- m_sio->txca_w(state);
-
- // transmit and receive clock via timer 2
- if (m_data_selector_rts == 1 && m_data_selector_dtr == 0)
- {
- m_sio->txca_w(state);
- m_sio->rxca_w(state);
- }
-}
-
READ8_MEMBER( apricot_state::sio_da_r )
{
if (m_bus_locked)
@@ -311,7 +284,7 @@ MC6845_UPDATE_ROW( apricot_state::crtc_update_row )
for (int x = 0; x <= 10; x++)
{
int color = fill ? 1 : BIT(data, x);
- if (BIT(code, 15)) color = !color; // reverse?
+ color ^= BIT(code, 15); // reverse?
bitmap.pix32(y, x + i*10) = pen[color ? 1 + BIT(code, 14) : 0];
}
}
@@ -425,9 +398,15 @@ static MACHINE_CONFIG_START( apricot, apricot_state )
MCFG_PIT8253_CLK0(XTAL_4MHz / 16)
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("ic31", pic8259_device, ir6_w))
MCFG_PIT8253_CLK1(XTAL_4MHz / 2)
- MCFG_PIT8253_OUT1_HANDLER(WRITELINE(apricot_state, timer_out1))
+ MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("ic14", ttl153_device, i0a_w))
MCFG_PIT8253_CLK2(XTAL_4MHz / 2)
- MCFG_PIT8253_OUT2_HANDLER(WRITELINE(apricot_state, timer_out2))
+ MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("ic14", ttl153_device, i0b_w))
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ic14", ttl153_device, i2a_w))
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ic14", ttl153_device, i2b_w))
+
+ MCFG_TTL153_ADD("ic14")
+ MCFG_TTL153_ZA_CB(DEVWRITELINE("ic15", z80sio0_device, rxca_w))
+ MCFG_TTL153_ZB_CB(DEVWRITELINE("ic15", z80sio0_device, txca_w))
MCFG_Z80SIO0_ADD("ic15", XTAL_15MHz / 6, 0, 0, XTAL_4MHz / 16, XTAL_4MHz / 16)
MCFG_Z80DART_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
@@ -435,18 +414,17 @@ static MACHINE_CONFIG_START( apricot, apricot_state )
MCFG_Z80DART_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
MCFG_Z80DART_OUT_WRDYA_CB(DEVWRITELINE("ic71", i8089_device, drq2_w))
MCFG_Z80DART_OUT_TXDB_CB(DEVWRITELINE("kbd", apricot_keyboard_bus_device, out_w))
- MCFG_Z80DART_OUT_DTRB_CB(WRITELINE(apricot_state, data_selector_dtr_w))
- MCFG_Z80DART_OUT_RTSB_CB(WRITELINE(apricot_state, data_selector_rts_w))
+ MCFG_Z80DART_OUT_DTRB_CB(DEVWRITELINE("ic14", ttl153_device, s0_w))
+ MCFG_Z80DART_OUT_RTSB_CB(DEVWRITELINE("ic14", ttl153_device, s1_w))
MCFG_Z80DART_OUT_INT_CB(DEVWRITELINE("ic31", pic8259_device, ir5_w))
// rs232 port
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr)
-// note: missing a receive clock callback to support external clock mode
-// (m_data_selector_rts == 1 and m_data_selector_dtr == 0)
+ // note: missing a receive clock callback to support external clock mode (i1 to 153)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("ic15", z80sio0_device, rxa_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("ic15", z80sio0_device, dcda_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("ic15", z80sio0_device, synca_w))
- MCFG_RS232_CTS_HANDLER(DEVWRITELINE("ic15", z80sio0_device, ctsa_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE("ic15", z80sio0_device, ctsa_w)) MCFG_DEVCB_XOR(1)
// keyboard
MCFG_APRICOT_KEYBOARD_INTERFACE_ADD("kbd", "hle")
@@ -471,6 +449,8 @@ static MACHINE_CONFIG_START( apricot, apricot_state )
MCFG_FLOPPY_DRIVE_ADD("ic68:0", apricot_floppies, "d32w", apricot_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("ic68:1", apricot_floppies, "d32w", apricot_state::floppy_formats)
+ MCFG_SOFTWARE_LIST_ADD("flop_list", "apricot_flop")
+
// expansion bus
MCFG_EXPANSION_ADD("exp", "ic91")
MCFG_EXPANSION_IOP_ADD("ic71")
@@ -504,5 +484,5 @@ ROM_END
//**************************************************************************
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
-COMP( 1983, apricot, 0, 0, apricot, 0, driver_device, 0, "ACT", "Apricot PC", MACHINE_NOT_WORKING )
-COMP( 1984, apricotxi, apricot, 0, apricotxi, 0, driver_device, 0, "ACT", "Apricot Xi", MACHINE_NOT_WORKING )
+COMP( 1983, apricot, 0, 0, apricot, 0, driver_device, 0, "ACT", "Apricot PC", 0 )
+COMP( 1984, apricotxi, apricot, 0, apricotxi, 0, driver_device, 0, "ACT", "Apricot Xi", 0 )
diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp
index dc519cf1897..4b385c086a2 100644
--- a/src/mame/drivers/aristmk5.cpp
+++ b/src/mame/drivers/aristmk5.cpp
@@ -1007,7 +1007,7 @@ MACHINE_CONFIG_END
ROM_LOAD( "a562838.u65", 0x000200, 0x000157, CRC(f2f3c40a) SHA1(b795dfa5cc4e8127c3f3a0906664910d1325ec92) ) \
ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) ) \
-
+
ROM_START( aristmk5 )
ARISTOCRAT_MK5_BIOS
@@ -1563,14 +1563,14 @@ ROM_START( chickna5u )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
- ROM_LOAD32_WORD( "rhg073003.u7", 0x000000, 0x080000, CRC(06558129) SHA1(be726c0d35776faf1ecd20eb0a193e68a1fb1a84) )
- ROM_LOAD32_WORD( "rhg073003.u11", 0x000002, 0x080000, CRC(0eadf5d4) SHA1(b783f6e1911fc098d1b4d1d8c75862e031078e5b) )
- ROM_LOAD32_WORD( "rhg073003.u8", 0x100000, 0x080000, CRC(683e96bc) SHA1(bca8e87bea9f7044fa29dc4518e2ac5b429e3313) )
- ROM_LOAD32_WORD( "rhg073003.u12", 0x100002, 0x080000, CRC(8313b03b) SHA1(d2a91bae8063d89ec9a1edab6df3e6711719d2c2) )
- ROM_LOAD32_WORD( "rhg073003.u9", 0x200000, 0x080000, CRC(9c08aefa) SHA1(fe3ffa8eb308ab216cc08dd2ce51113b4ef74c4a) )
- ROM_LOAD32_WORD( "rhg073003.u13", 0x200002, 0x080000, CRC(69fd4f89) SHA1(4e0469caecf9293197a4a5de960eb9dcfee39ca3) )
- ROM_LOAD32_WORD( "rhg073003.u10", 0x300000, 0x080000, CRC(9aae49d7) SHA1(5cf87b747ea7561766fe0ffc15967fea657b252b) )
- ROM_LOAD32_WORD( "rhg073003.u14", 0x300002, 0x080000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
+ ROM_LOAD32_WORD( "rhg073003.u7", 0x000000, 0x080000, CRC(06558129) SHA1(be726c0d35776faf1ecd20eb0a193e68a1fb1a84) )
+ ROM_LOAD32_WORD( "rhg073003.u11", 0x000002, 0x080000, CRC(0eadf5d4) SHA1(b783f6e1911fc098d1b4d1d8c75862e031078e5b) )
+ ROM_LOAD32_WORD( "rhg073003.u8", 0x100000, 0x080000, CRC(683e96bc) SHA1(bca8e87bea9f7044fa29dc4518e2ac5b429e3313) )
+ ROM_LOAD32_WORD( "rhg073003.u12", 0x100002, 0x080000, CRC(8313b03b) SHA1(d2a91bae8063d89ec9a1edab6df3e6711719d2c2) )
+ ROM_LOAD32_WORD( "rhg073003.u9", 0x200000, 0x080000, CRC(9c08aefa) SHA1(fe3ffa8eb308ab216cc08dd2ce51113b4ef74c4a) )
+ ROM_LOAD32_WORD( "rhg073003.u13", 0x200002, 0x080000, CRC(69fd4f89) SHA1(4e0469caecf9293197a4a5de960eb9dcfee39ca3) )
+ ROM_LOAD32_WORD( "rhg073003.u10", 0x300000, 0x080000, CRC(9aae49d7) SHA1(5cf87b747ea7561766fe0ffc15967fea657b252b) )
+ ROM_LOAD32_WORD( "rhg073003.u14", 0x300002, 0x080000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
@@ -1669,18 +1669,18 @@ ROM_START( cuckoou )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(415b9c77) SHA1(86a3b3aabd81f5fcf767dd53f7034f7d58f2020e) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(415b9c77) SHA1(86a3b3aabd81f5fcf767dd53f7034f7d58f2020e) )
+
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(64c895fe) SHA1(12c75338dd1b2260d0581744cef1b705c718727f) )
-
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(64c895fe) SHA1(12c75338dd1b2260d0581744cef1b705c718727f) )
+
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -1848,18 +1848,18 @@ ROM_START( dolphntru )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(0063e5ca) SHA1(a3d7b636bc9d792e93d11cb2babf24fbdd6d7776) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(0063e5ca) SHA1(a3d7b636bc9d792e93d11cb2babf24fbdd6d7776) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2174,18 +2174,18 @@ ROM_START( incasunu )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(b3efdb60) SHA1(f219175019b7237f1e2d132f36803097f2a1d174) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(b3efdb60) SHA1(f219175019b7237f1e2d132f36803097f2a1d174) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(a68e890e) SHA1(8ab087a09cfee8d3e2d84b1003b6798c7223be03) )
-
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(a68e890e) SHA1(8ab087a09cfee8d3e2d84b1003b6798c7223be03) )
+
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
ROM_START( incasunsp )
@@ -2449,18 +2449,18 @@ ROM_START( magimask )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(6e485bbc) SHA1(3d6c8d120c69ed2804f267c50681974f73e1ee51) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(6e485bbc) SHA1(3d6c8d120c69ed2804f267c50681974f73e1ee51) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(538c7523) SHA1(1e6516b77daf855e397c1ec590e73637ce3b8406) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(538c7523) SHA1(1e6516b77daf855e397c1ec590e73637ce3b8406) )
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2494,18 +2494,18 @@ ROM_START( magimaska )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5365446b) SHA1(9ae7a72d0ed3e7f7523a2e0a8f0dc014c6490438) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5365446b) SHA1(9ae7a72d0ed3e7f7523a2e0a8f0dc014c6490438) )
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2602,15 +2602,15 @@ ROM_START( minemine )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(883f5023) SHA1(e526e337b5b0fc77091b4946b503b56307c390e9) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(883f5023) SHA1(e526e337b5b0fc77091b4946b503b56307c390e9) )
ROM_REGION( 0x20, "rtc", 0 )
ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
@@ -2804,18 +2804,18 @@ ROM_START( partygrs )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(fec1b1df) SHA1(5981e2961692d4c8633afea4ecb4828eabba65bd) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(fec1b1df) SHA1(5981e2961692d4c8633afea4ecb4828eabba65bd) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2955,15 +2955,15 @@ ROM_START( pengpayu )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(4e5b9702) SHA1(b2b645db80c4ece24fae8ce6fb660e77ac8e5810) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(4e5b9702) SHA1(b2b645db80c4ece24fae8ce6fb660e77ac8e5810) )
ROM_REGION( 0x20, "rtc", 0 )
ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
@@ -3146,16 +3146,16 @@ ROM_START( qnileu )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5a7bb53a) SHA1(cdac900925d0ee8f98209a377b9f8760de0c2883) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5a7bb53a) SHA1(cdac900925d0ee8f98209a377b9f8760de0c2883) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -3428,8 +3428,8 @@ ROM_END
ROM_START( topbana )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
- ROM_LOAD32_WORD( "0100550v.u11", 0x000002, 0x080000, CRC(1c64b3b6) SHA1(80bbc6e3f47ab932e9c07e0c6063197a2d8e81f7) )
- ROM_LOAD32_WORD( "0100550v.u7", 0x000000, 0x080000, CRC(9c5e2d66) SHA1(658143706c0e1f3b43b3ec301da1052363fe5244) )
+ ROM_LOAD32_WORD( "0100550v.u11", 0x000002, 0x080000, CRC(1c64b3b6) SHA1(80bbc6e3f47ab932e9c07e0c6063197a2d8e81f7) )
+ ROM_LOAD32_WORD( "0100550v.u7", 0x000000, 0x080000, CRC(9c5e2d66) SHA1(658143706c0e1f3b43b3ec301da1052363fe5244) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
@@ -3696,18 +3696,18 @@ ROM_START( wcougaru )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(dfe52286) SHA1(db31fb64e2fff8aa5ba0cc6d3d73860e8019406c) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(dfe52286) SHA1(db31fb64e2fff8aa5ba0cc6d3d73860e8019406c) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
diff --git a/src/mame/drivers/arkanoid.cpp b/src/mame/drivers/arkanoid.cpp
index ad20ea5a7d1..7612ece6051 100644
--- a/src/mame/drivers/arkanoid.cpp
+++ b/src/mame/drivers/arkanoid.cpp
@@ -911,6 +911,7 @@ static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, arkanoid_state )
ADDRESS_MAP_END
/* MCU Hookup based on 'Arkanoid_TAITO_(Japan 1986) PCB.rar' from Taro and others at http://zx-pk.ru forums
+NOTE and TODO: these comments have not been significantly updated since the real taito arkanoid schematics were found. beware of mistakes!
ic5 = 74ls669
ic6 = 74ls669
ic9 = 74ls257
@@ -961,7 +962,7 @@ Clock : from z80, somehow; also is /oe of ic27
Q : N/C
/Q : -> 68705 PC1 and z80, somehow
-Note: despite having a signal on it (possibly vblank or one of the V counter bits), the TIMER/BOOT pin is seemingly never used by the MCU in input mode, so the signal is ignored.
+Note: despite having a signal on it (/VBLK according to the schematics), the TIMER/BOOT pin is seemingly never used by the MCU in input mode, so the signal is ignored.
Note2: PA0 is connected to bit 0 of both the z80->68705 latch and the 68705->z80 latch. The board trace from http://zx-pk.ru is known to be incomplete, so its likely all of the PAx bits go both ways.
*/
diff --git a/src/mame/drivers/armedf.cpp b/src/mame/drivers/armedf.cpp
index 3eb8fa870b4..bcde88bf37b 100644
--- a/src/mame/drivers/armedf.cpp
+++ b/src/mame/drivers/armedf.cpp
@@ -53,6 +53,8 @@ Notes:
010178: bra $f9f0 ;timer over event occurs
btanb perhaps? Currently patched to work, might also be that DSW2 bit 7 is actually a MCU bit ready flag, so it
definitely needs PCB tests.
+- Takatae! Big Fighter third attract mode "NIHON BUSSAN" text has wrong colors, happens the same on real HW reference
+ (palette not updated properly, BTANB)
Stephh's notes (based on the games M68000 code and some tests) :
@@ -292,6 +294,7 @@ Notes:
#include "includes/armedf.h"
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
+#include "cpu/mcs51/mcs51.h"
#include "sound/3812intf.h"
#include "sound/dac.h"
#include "sound/volt_reg.h"
@@ -312,6 +315,7 @@ Notes:
---- -x-- ---- ---- disable fg layer
---- --x- ---- ---- disable sprite
---- ---x ---- ---- disable tx layer
+ ---- ---- 1--1 ---- unknown
---- ---- ---- --x- coin counter 1
---- ---- ---- ---x coin counter 0
*/
@@ -521,12 +525,15 @@ ADDRESS_MAP_END
READ16_MEMBER(bigfghtr_state::latch_r)
{
- m_read_latch = 1;
+ m_mcu->set_input_line(MCS51_INT0_LINE, HOLD_LINE);
return 0;
}
+#if 0
+// reference code, in case anything goes bad
WRITE16_MEMBER(bigfghtr_state::sharedram_w)
{
+ data &= mem_mask;
COMBINE_DATA(&m_sharedram[offset]);
switch(offset)
@@ -666,11 +673,28 @@ READ16_MEMBER(bigfghtr_state::sharedram_r)
return m_sharedram[offset];
}
+#endif
+
+READ8_MEMBER(bigfghtr_state::main_sharedram_r)
+{
+ return m_sharedram[offset];
+}
+
+WRITE8_MEMBER(bigfghtr_state::main_sharedram_w)
+{
+ m_sharedram[offset] = data;
+}
+
+WRITE8_MEMBER(bigfghtr_state::mcu_spritelist_w)
+{
+ // add a warning in case it happens for now.
+ popmessage("MCU access spritelist %04x = %02x, contact MAMEdev",offset,data);
+}
static ADDRESS_MAP_START( bigfghtr_map, AS_PROGRAM, 16, bigfghtr_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x080000, 0x0805ff) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0x080600, 0x083fff) AM_READWRITE(sharedram_r, sharedram_w) AM_SHARE("sharedram")
+ AM_RANGE(0x080600, 0x083fff) AM_READWRITE8(main_sharedram_r,main_sharedram_w,0xffff)
AM_RANGE(0x084000, 0x085fff) AM_RAM //work ram
AM_RANGE(0x086000, 0x086fff) AM_RAM_WRITE(armedf_bg_videoram_w) AM_SHARE("bg_videoram")
AM_RANGE(0x087000, 0x087fff) AM_RAM_WRITE(armedf_fg_videoram_w) AM_SHARE("fg_videoram")
@@ -693,6 +717,17 @@ static ADDRESS_MAP_START( bigfghtr_map, AS_PROGRAM, 16, bigfghtr_state )
AM_RANGE(0x400000, 0x400001) AM_READ(latch_r)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( bigfghtr_mcu_map, AS_PROGRAM, 8, bigfghtr_state )
+ AM_RANGE(0x0000, 0x0fff) AM_ROM
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( bigfghtr_mcu_io_map, AS_IO, 8, bigfghtr_state )
+ AM_RANGE(0x00000, 0x005ff) AM_WRITE(mcu_spritelist_w) //Sprite RAM, guess shared as well
+ AM_RANGE(0x00600, 0x03fff) AM_RAM AM_SHARE("sharedram")
+ AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P1) AM_READNOP // bit 5: bus contention related?
+ AM_RANGE(MCS51_PORT_P3,MCS51_PORT_P3) AM_WRITENOP
+ADDRESS_MAP_END
+
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, armedf_state )
AM_RANGE(0x0000, 0xf7ff) AM_ROM
AM_RANGE(0xf800, 0xffff) AM_RAM
@@ -1031,53 +1066,54 @@ static INPUT_PORTS_START( bigfghtr )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_LOW )
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_TILT )
+ PORT_SERVICE( 0x0200, IP_ACTIVE_LOW )
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0xf800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW0")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("DSW0:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "6" )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
- PORT_DIPSETTING( 0x0c, "20k then every 60k" )
- PORT_DIPSETTING( 0x04, "20k then every 80k" )
- PORT_DIPSETTING( 0x08, "40k then every 60k" )
- PORT_DIPSETTING( 0x00, "40k then every 80k" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("DSW0:3,4")
+ PORT_DIPSETTING( 0x0c, "80k then every 80k" )
+ PORT_DIPSETTING( 0x04, "80k then every 100k" )
+ PORT_DIPSETTING( 0x08, "100k then every 80k" )
+ PORT_DIPSETTING( 0x00, "100k then every 100k" )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW0:5")
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DSW0:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) )
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSW0:7,8")
PORT_DIPSETTING( 0xc0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DSW1:1,2")
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DSW1:3,4")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Allow_Continue ) )
- PORT_DIPSETTING( 0x30, DEF_STR( No ) )
- PORT_DIPSETTING( 0x20, "3 Times" )
- PORT_DIPSETTING( 0x10, "5 Times" )
- PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:6")
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1173,7 +1209,7 @@ static MACHINE_CONFIG_START( terraf, armedf_state )
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1224,7 +1260,7 @@ static MACHINE_CONFIG_START( terrafjb, armedf_state )
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1280,7 +1316,7 @@ static MACHINE_CONFIG_START( kozure, armedf_state )
MCFG_CPU_PROGRAM_MAP(kozure_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1330,7 +1366,7 @@ static MACHINE_CONFIG_START( armedf, armedf_state )
MCFG_CPU_PROGRAM_MAP(armedf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1378,7 +1414,7 @@ static MACHINE_CONFIG_START( cclimbr2, armedf_state )
MCFG_CPU_PROGRAM_MAP(cclimbr2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1428,7 +1464,7 @@ static MACHINE_CONFIG_START( legion, armedf_state )
MCFG_CPU_PROGRAM_MAP(legion_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1478,7 +1514,7 @@ static MACHINE_CONFIG_START( legionjb, armedf_state )
MCFG_CPU_PROGRAM_MAP(legionjb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@@ -1520,17 +1556,6 @@ static MACHINE_CONFIG_START( legionjb, armedf_state )
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MACHINE_CONFIG_END
-MACHINE_START_MEMBER(bigfghtr_state,bigfghtr)
-{
- MACHINE_START_CALL_MEMBER(armedf);
- save_item(NAME(m_read_latch));
-}
-
-MACHINE_RESET_MEMBER(bigfghtr_state,bigfghtr)
-{
- MACHINE_RESET_CALL_MEMBER(armedf);
- m_read_latch = 0;
-}
static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
@@ -1538,20 +1563,21 @@ static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
MCFG_CPU_PROGRAM_MAP(bigfghtr_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
- MCFG_MACHINE_START_OVERRIDE(bigfghtr_state,bigfghtr)
- MCFG_MACHINE_RESET_OVERRIDE(bigfghtr_state,bigfghtr)
+ MCFG_CPU_ADD("mcu", I8751, XTAL_16MHz/4) // i8741 disguised as i8751h? Former doesn't match address map, clock unknown.
+ MCFG_CPU_PROGRAM_MAP(bigfghtr_mcu_map)
+ MCFG_CPU_IO_MAP(bigfghtr_mcu_io_map)
+
+ MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
+ MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(57)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
- MCFG_SCREEN_SIZE(64*8, 32*8)
- MCFG_SCREEN_VISIBLE_AREA(12*8, (64-12)*8-1, 1*8, 31*8-1 )
+ MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz/2,531,12*8,(64-12)*8, 254, 1*8, 31*8) // guess, matches 59.3 Hz from reference
MCFG_SCREEN_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(armedf_state,armedf)
@@ -2047,7 +2073,8 @@ ROM_START( skyrobo )
ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
- ROM_LOAD( "i8751.mcu", 0x00000, 0x1000, NO_DUMP )
+ // coming from Takatae Big Fighter, might or might not be correct for this version
+ ROM_LOAD( "i8751.bin", 0x00000, 0x1000, BAD_DUMP CRC(64a0d225) SHA1(ccc5c33c0c412bf9e3a4f7de5e39b042e00c41dd) )
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "7", 0x00000, 0x08000, CRC(f556ef28) SHA1(2acb83cdf23356091056f2cfbbc2b9828ee25b6f) ) /* Rom location 11C */
@@ -2079,7 +2106,7 @@ ROM_START( bigfghtr )
ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
- ROM_LOAD( "i8751.mcu", 0x00000, 0x1000, NO_DUMP )
+ ROM_LOAD( "i8751.bin", 0x00000, 0x1000, CRC(64a0d225) SHA1(ccc5c33c0c412bf9e3a4f7de5e39b042e00c41dd) )
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "7.11c", 0x00000, 0x08000, CRC(1809e79f) SHA1(730547771f803857acb552a84a8bc21bd3bda33f) )
@@ -2190,11 +2217,6 @@ DRIVER_INIT_MEMBER(armedf_state,cclimbr2)
m_scroll_type = 3;
}
-DRIVER_INIT_MEMBER(bigfghtr_state,bigfghtr)
-{
- m_scroll_type = 1;
-}
-
/*************************************
*
* Game driver(s)
@@ -2220,5 +2242,5 @@ GAME( 1988, cclimbr2a,cclimbr2, cclimbr2, cclimbr2, armedf_state, cclimbr2, RO
GAME( 1988, armedf, 0, armedf, armedf, armedf_state, armedf, ROT270, "Nichibutsu", "Armed Formation", MACHINE_SUPPORTS_SAVE )
GAME( 1988, armedff, armedf, armedf, armedf, armedf_state, armedf, ROT270, "Nichibutsu (Fillmore license)", "Armed Formation (Fillmore license)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, bigfghtr_state, bigfghtr, ROT0, "Nichibutsu", "Sky Robo", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
-GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, bigfghtr_state, bigfghtr, ROT0, "Nichibutsu", "Tatakae! Big Fighter (Japan)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
+GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Sky Robo", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Tatakae! Big Fighter (Japan)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/astrocde.cpp b/src/mame/drivers/astrocde.cpp
index 82d31451c07..864c8bd14ad 100644
--- a/src/mame/drivers/astrocde.cpp
+++ b/src/mame/drivers/astrocde.cpp
@@ -120,9 +120,7 @@
#include "machine/z80ctc.h"
#include "machine/nvram.h"
#include "sound/ay8910.h"
-
-#include "audio/wow.h"
-#include "audio/gorf.h"
+#include "sound/votrax.h"
#include "gorf.lh"
#include "seawolf2.lh"
@@ -292,7 +290,6 @@ READ8_MEMBER(astrocde_state::wow_io_r)
}
-
/*************************************
*
* Gorf specific input/output
@@ -313,11 +310,7 @@ READ8_MEMBER(astrocde_state::gorf_io_1_r)
case 5: m_sparkle[3] = data; break;
case 6:
m_astrocade_sound1->set_output_gain(0, data ? 0.0 : 1.0);
-#if USE_FAKE_VOTRAX
- m_samples->set_output_gain(0, data ? 1.0 : 0.0);
-#else
m_votrax->set_output_gain(0, data ? 1.0 : 0.0);
-#endif
break;
case 7: osd_printf_debug("io_1:%d\n", data); break;
}
@@ -512,6 +505,28 @@ WRITE8_MEMBER(astrocde_state::tenpindx_lights_w)
}
+/*************************************
+ *
+ * Votrax SC01 specific input/output
+ *
+ *************************************/
+
+READ8_MEMBER( astrocde_state::votrax_speech_r )
+{
+ uint8_t data = offset >> 8;
+ m_votrax->inflection_w(space, 0, data >> 6);
+ m_votrax->write(space, 0, data);
+
+ /* Note : We should really also use volume in this as well as frequency */
+ return data; /* Return nicely */
+}
+
+
+CUSTOM_INPUT_MEMBER( astrocde_state::votrax_speech_status_r )
+{
+ return m_votrax->request();
+}
+
/*************************************
*
@@ -879,7 +894,7 @@ static INPUT_PORTS_START( wow )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, astrocde_state, wow_speech_status_r, nullptr)
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, astrocde_state, votrax_speech_status_r, nullptr)
PORT_START("P4HANDLE")
/* "If S1:1,2,3 are all ON or all OFF, only coin meter number 1 will count." */
@@ -949,7 +964,7 @@ static INPUT_PORTS_START( gorf )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x60, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, astrocde_state, gorf_speech_status_r, nullptr)
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, astrocde_state, votrax_speech_status_r, nullptr)
PORT_START("P4HANDLE")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("S1:1")
@@ -1354,13 +1369,7 @@ static MACHINE_CONFIG_DERIVED( wow, astrocade_base )
/* sound hardware */
MCFG_SPEAKER_ADD("center", 0.0, 0.0, 1.0)
-#if USE_FAKE_VOTRAX
- MCFG_SOUND_ADD("samples", SAMPLES, 0)
- MCFG_SAMPLES_CHANNELS(1)
- MCFG_SAMPLES_NAMES(wow_sample_names)
-#else
- MCFG_VOTRAX_SC01_ADD("votrax", VOTRAX_SC01, 720000)
-#endif
+ MCFG_SOUND_ADD("votrax", VOTRAX_SC01, 720000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "center", 0.85)
MACHINE_CONFIG_END
@@ -1386,13 +1395,7 @@ static MACHINE_CONFIG_DERIVED( gorf, astrocade_base )
MCFG_ASTROCADE_ADD("astrocade2", ASTROCADE_CLOCK/4)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lower", 1.0)
-#if USE_FAKE_VOTRAX
- MCFG_SOUND_ADD("samples", SAMPLES, 0)
- MCFG_SAMPLES_CHANNELS(1)
- MCFG_SAMPLES_NAMES(gorf_sample_names)
-#else
- MCFG_VOTRAX_SC01_ADD("votrax", VOTRAX_SC01, 720000)
-#endif
+ MCFG_SOUND_ADD("votrax", VOTRAX_SC01, 720000)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "upper", 0.85)
MACHINE_CONFIG_END
@@ -1709,7 +1712,7 @@ DRIVER_INIT_MEMBER(astrocde_state,wow)
{
m_video_config = AC_SOUND_PRESENT | AC_LIGHTPEN_INTS | AC_STARS;
m_maincpu->space(AS_IO).install_read_handler(0x15, 0x15, 0, 0xf000, 0x0f00, read8_delegate(FUNC(astrocde_state::wow_io_r), this));
- m_maincpu->space(AS_IO).install_read_handler(0x17, 0x17, 0, 0x0000, 0xff00, read8_delegate(FUNC(astrocde_state::wow_speech_r), this));
+ m_maincpu->space(AS_IO).install_read_handler(0x17, 0x17, 0, 0x0000, 0xff00, read8_delegate(FUNC(astrocde_state::votrax_speech_r), this));
}
@@ -1718,7 +1721,7 @@ DRIVER_INIT_MEMBER(astrocde_state,gorf)
m_video_config = AC_SOUND_PRESENT | AC_LIGHTPEN_INTS | AC_STARS;
m_maincpu->space(AS_IO).install_read_handler(0x15, 0x15, 0, 0xf000, 0x0f00, read8_delegate(FUNC(astrocde_state::gorf_io_1_r), this));
m_maincpu->space(AS_IO).install_read_handler(0x16, 0x16, 0, 0xf000, 0x0f00, read8_delegate(FUNC(astrocde_state::gorf_io_2_r), this));
- m_maincpu->space(AS_IO).install_read_handler(0x17, 0x17, 0, 0x0000, 0xff00, read8_delegate(FUNC(astrocde_state::gorf_speech_r), this));
+ m_maincpu->space(AS_IO).install_read_handler(0x17, 0x17, 0, 0x0000, 0xff00, read8_delegate(FUNC(astrocde_state::votrax_speech_r), this));
}
diff --git a/src/mame/drivers/atarittl.cpp b/src/mame/drivers/atarittl.cpp
index 8945f979bb3..c414f7471b3 100644
--- a/src/mame/drivers/atarittl.cpp
+++ b/src/mame/drivers/atarittl.cpp
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Fabio Priuli, Scott Stone
+// copyright-holders:Fabio Priuli, Scott Stone, Couriersud
/***************************************************************************
Atari / Kee Games Driver - Discrete Games made in the 1970's
@@ -53,6 +53,21 @@
TM-018 Dodgeball/Dodgem (Not Produced/Released) (1975)
TM-024 Qwakers (Not Produced/Released) (1974?) (Kee Games clone of Qwak!?)
+ - Information (current as of 21 Dec. 2016) on what logic chips (and some analog parts) are still needed to be emulated in the
+ netlist system per-game:
+
+ TM-057 (Stunt Cycle)
+ 566 Voltage-Controlled Oscillator
+ 1N751A Zener Diode
+ 1N752A Zener Diode
+
+ TM-055 (Indy 4)
+ 7406 Hex Inverter Buffers/Drivers with O.C. H.V. Outputs (note: Might not be needed, could just clone from 7404)
+ 7414 Hex Schmitt-Trigger Inverters
+ 7417 Hex Buffers/Drivers
+ 74164 8-bit Serial-In, Parallel-Out Shift Register
+ 9301 1-of-10 Decoder
+ LM339 Quad Comparator
***************************************************************************/
@@ -60,6 +75,7 @@
#include "emu.h"
#include "machine/netlist.h"
+#include "machine/nl_stuntcyc.h"
#include "netlist/devices/net_lib.h"
#include "video/fixfreq.h"
@@ -71,22 +87,28 @@
#define H_TOTAL (0x1C6+1) // 454
#define HBSTART (H_TOTAL)
-#define HBEND (80)
+#define HBEND (32)
#define VBSTART (V_TOTAL)
#define VBEND (16)
#define HRES_MULT (1)
// end
-
+#define SC_VIDCLOCK (14318181/2)
+#define SC_HTOTAL (0x1C8+1) // 456
+#define SC_VTOTAL (0x103+1) // 259
+#define SC_HBSTART (SC_HTOTAL)
+#define SC_HBEND (32)
+#define SC_VBSTART (SC_VTOTAL)
+#define SC_VBEND (8)
class atarikee_state : public driver_device
{
public:
atarikee_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_video(*this, "fixfreq")
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_video(*this, "fixfreq")
{
}
@@ -106,7 +128,70 @@ private:
};
+class stuntcyc_state : public driver_device
+{
+public:
+ stuntcyc_state(const machine_config &mconfig, device_type type, const char *tag)
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ //, m_video(*this, "fixfreq")
+ , m_probe_screen(*this, "screen")
+ , m_hf1(*this, "maincpu:hf1")
+ , m_d7(*this, "maincpu:d7")
+ , m_probe_bit0(0.0)
+ , m_probe_bit1(0.0)
+ , m_probe_bit2(0.0)
+ , m_probe_bit3(0.0)
+ , m_probe_bit4(0.0)
+ , m_probe_bit5(0.0)
+ , m_probe_bit6(0.0)
+ , m_probe_data(nullptr)
+ , m_last_beam(0.0)
+ , m_last_hpos(0)
+ , m_last_vpos(0)
+ , m_last_fraction(0.0)
+ {
+ }
+
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit0_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit1_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit2_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit3_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit4_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit5_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_bit6_cb);
+ NETDEV_LOGIC_CALLBACK_MEMBER(probe_clock_cb);
+ uint32_t screen_update_stuntcyc(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+
+protected:
+
+ // driver_device overrides
+ virtual void machine_start() override;
+ virtual void machine_reset() override;
+
+private:
+ required_device<netlist_mame_device_t> m_maincpu;
+ //required_device<fixedfreq_device> m_video;
+ required_device<screen_device> m_probe_screen;
+ required_device<netlist_mame_rom_t> m_hf1;
+ required_device<netlist_mame_rom_t> m_d7;
+
+ int m_probe_bit0;
+ int m_probe_bit1;
+ int m_probe_bit2;
+ int m_probe_bit3;
+ int m_probe_bit4;
+ int m_probe_bit5;
+ int m_probe_bit6;
+
+ std::unique_ptr<int[]> m_probe_data;
+
+ int m_last_beam;
+ int m_last_hpos;
+ int m_last_vpos;
+ double m_last_fraction;
+};
static NETLIST_START(atarikee)
SOLVER(Solver, 48000)
@@ -133,10 +218,98 @@ void atarikee_state::video_start()
{
}
+void stuntcyc_state::machine_start()
+{
+ save_item(NAME(m_probe_bit0));
+ save_item(NAME(m_probe_bit1));
+ save_item(NAME(m_probe_bit2));
+ save_item(NAME(m_probe_bit3));
+ save_item(NAME(m_probe_bit4));
+ save_item(NAME(m_probe_bit5));
+ save_item(NAME(m_probe_bit6));
+ save_item(NAME(m_last_beam));
+ save_item(NAME(m_last_hpos));
+ save_item(NAME(m_last_vpos));
+ save_item(NAME(m_last_fraction));
+
+ m_probe_bit0 = 0;
+ m_probe_bit1 = 0;
+ m_probe_bit2 = 0;
+ m_probe_bit3 = 0;
+ m_probe_bit4 = 0;
+ m_probe_bit5 = 0;
+ m_probe_bit6 = 0;
+
+ m_probe_data = std::make_unique<int[]>(SC_HTOTAL * SC_VTOTAL);
+}
+void stuntcyc_state::machine_reset()
+{
+ m_probe_bit0 = 0;
+ m_probe_bit1 = 0;
+ m_probe_bit2 = 0;
+ m_probe_bit3 = 0;
+ m_probe_bit4 = 0;
+ m_probe_bit5 = 0;
+ m_probe_bit6 = 0;
+}
-static MACHINE_CONFIG_START( atarikee, atarikee_state )
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit0_cb) { m_probe_bit0 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit1_cb) { m_probe_bit1 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit2_cb) { m_probe_bit2 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit3_cb) { m_probe_bit3 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit4_cb) { m_probe_bit4 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit5_cb) { m_probe_bit5 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_bit6_cb) { m_probe_bit6 = data; }
+NETDEV_LOGIC_CALLBACK_MEMBER(stuntcyc_state::probe_clock_cb)
+{
+ synchronize();
+ attotime second_fraction(0, time.attoseconds());
+ attotime frame_fraction(0, (second_fraction * 60).attoseconds());
+ attotime pixel_time = frame_fraction * (SC_HTOTAL * SC_VTOTAL);
+ int32_t pixel_index = (frame_fraction * (SC_HTOTAL * SC_VTOTAL)).seconds();
+ double pixel_fraction = ATTOSECONDS_TO_DOUBLE(pixel_time.attoseconds());
+
+ const int hpos = pixel_index % SC_HTOTAL;//m_screen->hpos();
+ const int vpos = pixel_index / SC_HTOTAL;//m_screen->vpos();
+ const int curr_index = vpos * SC_HTOTAL + hpos;
+
+ int last_index = m_last_vpos * SC_HTOTAL + m_last_hpos;
+ if (last_index != curr_index)
+ {
+ m_probe_data[last_index] = int(double(m_probe_data[last_index]) * m_last_fraction);
+ m_probe_data[last_index] += int(double(m_last_beam) * (1.0 - m_last_fraction));
+ last_index++;
+ while (last_index <= curr_index)
+ m_probe_data[last_index++] = m_last_beam;
+ }
+
+ //m_last_beam = float(data);
+ m_last_beam = m_probe_bit0 + m_probe_bit1 * 2 + m_probe_bit2 * 4 + m_probe_bit3 * 8 + m_probe_bit4 * 16 + m_probe_bit5 * 32 + m_probe_bit6 * 64;
+ m_last_hpos = hpos;
+ m_last_vpos = vpos;
+ m_last_fraction = pixel_fraction;
+}
+
+uint32_t stuntcyc_state::screen_update_stuntcyc(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+{
+ m_last_hpos = 0;
+ m_last_vpos = 0;
+
+ uint32_t pixindex = 0;
+ for (int y = 0; y < SC_VTOTAL; y++)
+ {
+ uint32_t *scanline = &bitmap.pix32(y);
+ pixindex = y * SC_HTOTAL;
+ for (int x = 0; x < SC_HTOTAL; x++)
+ *scanline++ = 0xff000000 | (m_probe_data[pixindex++] * 0x010101);
+ //*scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 63.0) * 0x010101);
+ }
+ return 0;
+}
+
+static MACHINE_CONFIG_START( atarikee, atarikee_state )
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", NETLIST_CPU, NETLIST_CLOCK)
MCFG_NETLIST_SETUP(atarikee)
@@ -150,6 +323,39 @@ static MACHINE_CONFIG_START( atarikee, atarikee_state )
MCFG_FIXFREQ_SYNC_THRESHOLD(0.30)
MACHINE_CONFIG_END
+//#define STUNTCYC_NL_CLOCK (14318181*69)
+#define STUNTCYC_NL_CLOCK (SC_HTOTAL*SC_VTOTAL*60*140)
+
+static MACHINE_CONFIG_START( stuntcyc, stuntcyc_state )
+ /* basic machine hardware */
+ MCFG_DEVICE_ADD("maincpu", NETLIST_CPU, STUNTCYC_NL_CLOCK)
+ MCFG_NETLIST_SETUP(stuntcyc)
+
+ MCFG_NETLIST_ROM_REGION("maincpu", "hf1", "hf1", "004275.f1", 0x0000, 0x0200)
+ MCFG_NETLIST_ROM_REGION("maincpu", "d7", "d7", "004811.d7", 0x0000, 0x0020)
+
+ //MCFG_NETLIST_ANALOG_OUTPUT("maincpu", "vid0", "VIDEO_OUT", fixedfreq_device, update_vid, "fixfreq")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit0", "probe_bit0", stuntcyc_state, probe_bit0_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit1", "probe_bit1", stuntcyc_state, probe_bit1_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit2", "probe_bit2", stuntcyc_state, probe_bit2_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit3", "probe_bit3", stuntcyc_state, probe_bit3_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit4", "probe_bit4", stuntcyc_state, probe_bit4_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit5", "probe_bit5", stuntcyc_state, probe_bit5_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_bit6", "probe_bit6", stuntcyc_state, probe_bit6_cb, "")
+ MCFG_NETLIST_LOGIC_OUTPUT("maincpu", "probe_clock", "probe_clock", stuntcyc_state, probe_clock_cb, "")
+
+/* video hardware */
+ MCFG_SCREEN_ADD("screen", RASTER)
+ MCFG_SCREEN_UPDATE_DRIVER(stuntcyc_state, screen_update_stuntcyc)
+ MCFG_SCREEN_RAW_PARAMS(SC_HTOTAL*SC_VTOTAL*60, SC_HTOTAL, 0, SC_HTOTAL, SC_VTOTAL, 0, SC_VTOTAL)
+ //MCFG_FIXFREQ_ADD("fixfreq", "screen")
+ //MCFG_FIXFREQ_MONITOR_CLOCK(SC_VIDCLOCK)
+ //MCFG_FIXFREQ_HORZ_PARAMS(SC_HTOTAL-67,SC_HTOTAL-40,SC_HTOTAL-8, SC_HTOTAL)
+ //MCFG_FIXFREQ_VERT_PARAMS(SC_VTOTAL-22,SC_VTOTAL-19,SC_VTOTAL-12,SC_VTOTAL)
+ //MCFG_FIXFREQ_FIELDCOUNT(1)
+ //MCFG_FIXFREQ_SYNC_THRESHOLD(0.30)
+MACHINE_CONFIG_END
+
/***************************************************************************
@@ -289,10 +495,10 @@ ROM_END
ROM_START( stuntcyc )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x0200, "gfx", ROMREGION_ERASE00 )
+ ROM_REGION( 0x0200, "hf1", ROMREGION_ERASE00 )
ROM_LOAD( "004275.f1", 0x0000, 0x0200, CRC(4ed5a99d) SHA1(1e5f439bce72e78dfff76fd8f61187c6ef484a64) ) // Motorcycle & Bus
- ROM_REGION( 0x0020, "score", ROMREGION_ERASE00 )
+ ROM_REGION( 0x0020, "d7", ROMREGION_ERASE00 )
ROM_LOAD( "004811.d7", 0x0000, 0x0020, CRC(31a09efb) SHA1(fd5d538c9ec1234acf7c74ca0704113d220abbf6) ) // Score Translator
ROM_END
@@ -439,7 +645,7 @@ GAME(1975, jetfighta, jetfight, atarikee, 0, driver_device, 0, ROT0, "Ata
GAME(1976, outlaw, 0, atarikee, 0, driver_device, 0, ROT0, "Atari", "Outlaw [TTL]", MACHINE_IS_SKELETON)
GAME(1975, sharkjaw, 0, atarikee, 0, driver_device, 0, ROT0, "Atari/Horror Games", "Shark JAWS [TTL]", MACHINE_IS_SKELETON)
GAME(1975, steeplec, 0, atarikee, 0, driver_device, 0, ROT0, "Atari", "Steeplechase [TTL]", MACHINE_IS_SKELETON)
-GAME(1976, stuntcyc, 0, atarikee, 0, driver_device, 0, ROT0, "Atari", "Stunt Cycle [TTL]", MACHINE_IS_SKELETON)
+GAME(1976, stuntcyc, 0, stuntcyc, 0, driver_device, 0, ROT0, "Atari", "Stunt Cycle [TTL]", MACHINE_IS_SKELETON)
GAME(1974, tank, 0, atarikee, 0, driver_device, 0, ROT0, "Atari/Kee", "Tank/Tank Cocktail [TTL]", MACHINE_IS_SKELETON)
GAME(1975, tankii, 0, atarikee, 0, driver_device, 0, ROT0, "Atari/Kee", "Tank II [TTL]", MACHINE_IS_SKELETON)
diff --git a/src/mame/drivers/atlantis.cpp b/src/mame/drivers/atlantis.cpp
index df6715e208c..1a4f43e33f1 100644
--- a/src/mame/drivers/atlantis.cpp
+++ b/src/mame/drivers/atlantis.cpp
@@ -38,6 +38,8 @@
#include "machine/idectrl.h"
#include "machine/midwayic.h"
#include "machine/ins8250.h"
+#include "bus/rs232/rs232.h"
+#include "machine/terminal.h"
#include "audio/dcs.h"
#include "machine/pci.h"
#include "machine/vrc4373.h"
@@ -64,8 +66,8 @@
#define GALILEO_IRQ_SHIFT 1
#define ZEUS_IRQ_SHIFT 2
#define PARALLEL_IRQ_SHIFT 3
-#define UART0_SHIFT 4
-#define UART1_SHIFT 5
+#define UART1_SHIFT 4
+#define UART2_SHIFT 5
#define VBLANK_IRQ_SHIFT 7
/* static interrupts */
@@ -73,6 +75,7 @@
#define VBLANK_IRQ_NUM MIPS3_IRQ3
#define IDE_IRQ_NUM MIPS3_IRQ4
+#define DEBUG_CONSOLE (0)
#define LOG_RTC (0)
#define LOG_PORT (0)
#define LOG_IRQ (0)
@@ -90,6 +93,7 @@ public:
m_ioasic(*this, "ioasic"),
m_uart0(*this, "uart0"),
m_uart1(*this, "uart1"),
+ m_uart2(*this, "uart2"),
m_rtc(*this, "rtc")
{ }
DECLARE_DRIVER_INIT(mwskins);
@@ -102,8 +106,9 @@ public:
required_device<zeus2_device> m_zeus;
required_device<dcs_audio_device> m_dcs;
required_device<midway_ioasic_device> m_ioasic;
- required_device<ns16550_device> m_uart0;
+ optional_device<generic_terminal_device> m_uart0;
required_device<ns16550_device> m_uart1;
+ required_device<ns16550_device> m_uart2;
required_device<nvram_device> m_rtc;
uint8_t m_rtc_data[0x8000];
@@ -142,8 +147,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(ide_irq);
DECLARE_WRITE_LINE_MEMBER(ioasic_irq);
- DECLARE_WRITE_LINE_MEMBER(uart0_irq_callback);
DECLARE_WRITE_LINE_MEMBER(uart1_irq_callback);
+ DECLARE_WRITE_LINE_MEMBER(uart2_irq_callback);
DECLARE_CUSTOM_INPUT_MEMBER(port_mod_r);
DECLARE_READ32_MEMBER(port_ctrl_r);
@@ -186,7 +191,7 @@ READ32_MEMBER(atlantis_state::board_ctrl_r)
switch (newOffset) {
case CTRL_STATUS:
if (1 && m_screen->vblank())
- data |= 0x80;
+ data |= 1 << VBLANK_IRQ_SHIFT;
if (m_last_offset != (newOffset | 0x40000))
if (LOG_IRQ)
logerror("%s:board_ctrl_r read from CTRL_STATUS offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
@@ -414,11 +419,11 @@ READ32_MEMBER(atlantis_state::user_io_input)
}
/*************************************
-* UART0 interrupt handler
+* UART1 interrupt handler
*************************************/
-WRITE_LINE_MEMBER(atlantis_state::uart0_irq_callback)
+WRITE_LINE_MEMBER(atlantis_state::uart1_irq_callback)
{
- uint32_t status_bit = (1 << UART0_SHIFT);
+ uint32_t status_bit = (1 << UART1_SHIFT);
if (state && !(board_ctrl[CTRL_STATUS] & status_bit)) {
board_ctrl[CTRL_STATUS] |= status_bit;
update_asic_irq();
@@ -428,15 +433,15 @@ WRITE_LINE_MEMBER(atlantis_state::uart0_irq_callback)
board_ctrl[CTRL_CAUSE] &= ~status_bit;
update_asic_irq();
}
- logerror("atlantis_state::uart0_irq_callback state = %1x\n", state);
+ logerror("atlantis_state::uart1_irq_callback state = %1x\n", state);
}
/*************************************
-* UART1 interrupt handler
+* UART2 interrupt handler
*************************************/
-WRITE_LINE_MEMBER(atlantis_state::uart1_irq_callback)
+WRITE_LINE_MEMBER(atlantis_state::uart2_irq_callback)
{
- uint32_t status_bit = (1 << UART1_SHIFT);
+ uint32_t status_bit = (1 << UART2_SHIFT);
if (state && !(board_ctrl[CTRL_STATUS] & status_bit)) {
board_ctrl[CTRL_STATUS] |= status_bit;
update_asic_irq();
@@ -446,7 +451,7 @@ WRITE_LINE_MEMBER(atlantis_state::uart1_irq_callback)
board_ctrl[CTRL_CAUSE] &= ~status_bit;
update_asic_irq();
}
- logerror("atlantis_state::uart1_irq_callback state = %1x\n", state);
+ logerror("atlantis_state::uart2_irq_callback state = %1x\n", state);
}
/*************************************
@@ -639,8 +644,8 @@ void atlantis_state::machine_reset()
*************************************/
static ADDRESS_MAP_START( map0, AS_PROGRAM, 32, atlantis_state )
AM_RANGE(0x00000000, 0x0001ffff) AM_READWRITE8(cmos_r, cmos_w, 0xff)
- AM_RANGE(0x00100000, 0x0010001f) AM_DEVREADWRITE8("uart0", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART0 (TL16C552 CS0)
- AM_RANGE(0x00180000, 0x0018001f) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART1 (TL16C552 CS1)
+ AM_RANGE(0x00100000, 0x0010001f) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART1 (TL16C552 CS0)
+ AM_RANGE(0x00180000, 0x0018001f) AM_DEVREADWRITE8("uart2", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART2 (TL16C552 CS1)
//AM_RANGE(0x00200000, 0x0020001f) // Parallel UART (TL16C552 CS2)
AM_RANGE(0x00400000, 0x004000bf) AM_READWRITE8(blue_r, blue_w, 0xff)
AM_RANGE(0x00880000, 0x00c80003) AM_READWRITE(board_ctrl_r, board_ctrl_w)
@@ -799,6 +804,17 @@ static INPUT_PORTS_START( mwskins )
INPUT_PORTS_END
+#if 0
+static DEVICE_INPUT_DEFAULTS_START(mwskins_comm)
+ DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_14400)
+ DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_14400)
+ DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1)
+ DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8)
+ DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE)
+ DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1)
+DEVICE_INPUT_DEFAULTS_END
+#endif
+
/*************************************
*
* Machine driver
@@ -843,8 +859,8 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
/* sound hardware */
//MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DSIO, 0)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
- MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
- MCFG_DCS2_AUDIO_POLLING_OFFSET(0) /* no place to hook :-( */
+ MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
+ //MCFG_DCS2_AUDIO_POLLING_OFFSET(0) /* no place to hook :-( */
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
@@ -852,17 +868,42 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
MCFG_MIDWAY_IOASIC_UPPER(325)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(atlantis_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
+ if DEBUG_CONSOLE {
+ MCFG_MIDWAY_IOASIC_OUT_TX_CB(DEVWRITE8("uart0", generic_terminal_device, write))
+ MCFG_DEVICE_ADD("uart0", GENERIC_TERMINAL, 0)
+ MCFG_GENERIC_TERMINAL_KEYBOARD_CB(DEVWRITE8("ioasic", midway_ioasic_device, serial_rx_w))
+ }
// TL16C552 UART
- MCFG_DEVICE_ADD("uart0", NS16550, XTAL_24MHz)
- MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart0_irq_callback))
MCFG_DEVICE_ADD("uart1", NS16550, XTAL_24MHz)
- MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart1_irq_callback))
-
+ //MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com1", rs232_port_device, write_txd))
+ //MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com1", rs232_port_device, write_dtr))
+ //MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com1", rs232_port_device, write_rts))
+ //MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart1_irq_callback))
+
+ MCFG_DEVICE_ADD("uart2", NS16550, XTAL_24MHz)
+ //MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com2", rs232_port_device, write_txd))
+ //MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com2", rs232_port_device, write_dtr))
+ //MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com2", rs232_port_device, write_rts))
+ //MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart2_irq_callback))
+
+ //MCFG_RS232_PORT_ADD("com1", default_rs232_devices, nullptr)
+ //MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, rx_w))
+ //MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dcd_w))
+ //MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dsr_w))
+ //MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, ri_w))
+ //MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, cts_w))
+ //MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("com1", mwskins_comm)
+
+ //MCFG_RS232_PORT_ADD("com2", default_rs232_devices, nullptr)
+ //MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, rx_w))
+ //MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dcd_w))
+ //MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dsr_w))
+ //MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, ri_w))
+ //MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, cts_w))
MACHINE_CONFIG_END
-
/*************************************
*
* ROM definition(s)
diff --git a/src/mame/drivers/beezer.cpp b/src/mame/drivers/beezer.cpp
index e4a8ff812b7..cc6e0a58bd8 100644
--- a/src/mame/drivers/beezer.cpp
+++ b/src/mame/drivers/beezer.cpp
@@ -3,23 +3,23 @@
// thanks-to: Jonathan Gevaryahu
/***************************************************************************
- Beezer
+ Beezer
- (c) 1982 Tong Electronic
+ (c) 1982 Tong Electronic
- Notes:
- - To enter test mode, hold down 1P Start and 2P Start, then reset
- - One of the ROMs contains a message that this game was created
- by "Pacific Polytechnical Corporation, Santa Cruz"
+ Notes:
+ - To enter test mode, hold down 1P Start and 2P Start, then reset
+ - One of the ROMs contains a message that this game was created
+ by "Pacific Polytechnical Corporation, Santa Cruz"
- TODO:
- - Improve sound (filters? A reference recording would be nice)
- - Schematics in the sound area seem incomplete, there are
- several unknown connections
- - Watchdog timing (controlled by a 555)
- - Figure out differences between the two sets (test mode isn't
- working in beezer1, instruction screen is different)
- - Verify accuracy of colors
+ TODO:
+ - Improve sound (filters? A reference recording would be nice)
+ - Schematics in the sound area seem incomplete, there are
+ several unknown connections
+ - Watchdog timing (controlled by a 555)
+ - Figure out differences between the two sets (test mode isn't
+ working in beezer1, instruction screen is different)
+ - Verify accuracy of colors
***************************************************************************/
@@ -154,8 +154,8 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, beezer_state )
AM_RANGE(0x1000, 0x1007) AM_MIRROR(0x07f8) AM_DEVREADWRITE("ptm", ptm6840_device, read, write)
AM_RANGE(0x1800, 0x180f) AM_MIRROR(0x07f0) AM_DEVREADWRITE("via_u18", via6522_device, read, write)
AM_RANGE(0x8000, 0x8003) AM_MIRROR(0x1ffc) AM_WRITE(dac_w)
-// AM_RANGE(0xa000, 0xbfff) AM_ROM // 2d (can be ram, unpopulated)
-// AM_RANGE(0xc000, 0xdfff) AM_ROM // 4d (unpopulated)
+// AM_RANGE(0xa000, 0xbfff) AM_ROM // 2d (can be ram, unpopulated)
+// AM_RANGE(0xc000, 0xdfff) AM_ROM // 4d (unpopulated)
AM_RANGE(0xe000, 0xffff) AM_ROM AM_REGION("audiocpu", 0) // 6d
ADDRESS_MAP_END
diff --git a/src/mame/drivers/bublbobl.cpp b/src/mame/drivers/bublbobl.cpp
index 22581d739ab..434cc015df9 100644
--- a/src/mame/drivers/bublbobl.cpp
+++ b/src/mame/drivers/bublbobl.cpp
@@ -192,7 +192,7 @@ MC68705P5 - Motorola MC68705P5 Microcontroller with 2K Internal EPROM,
A71_01.IC1 Sub CPU Program
- A71_24.IC57 68705 Microcontroller Program (Protected, Not Dumped)
+ A71_24.IC57 68705 Microcontroller Program
@@ -389,7 +389,7 @@ static ADDRESS_MAP_START( tokio_map, AS_PROGRAM, 8, bublbobl_state )
AM_RANGE(0xfb00, 0xfb00) AM_WRITE(tokio_videoctrl_w)
AM_RANGE(0xfb80, 0xfb80) AM_WRITE(bublbobl_nmitrigger_w)
AM_RANGE(0xfc00, 0xfc00) AM_READWRITE(bublbobl_sound_status_r, bublbobl_sound_command_w)
- AM_RANGE(0xfe00, 0xfe00) AM_READ(tokio_mcu_r) AM_WRITENOP // ???
+ AM_RANGE(0xfe00, 0xfe00) AM_READWRITE(tokio_mcu_r, tokio_mcu_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( tokio_slave_map, AS_PROGRAM, 8, bublbobl_state )
@@ -669,8 +669,8 @@ static INPUT_PORTS_START( tokio )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) // data ready from MCU
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, bublbobl_state,tokio_main_sent_r, nullptr)
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, bublbobl_state,tokio_mcu_sent_r, nullptr)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -745,16 +745,24 @@ MACHINE_START_MEMBER(bublbobl_state,tokio)
{
MACHINE_START_CALL_MEMBER(common);
- save_item(NAME(m_tokio_prot_count));
+
+ save_item(NAME(m_mcu_sent));
+ save_item(NAME(m_main_sent));
+ save_item(NAME(m_from_main));
+ save_item(NAME(m_from_mcu));
+ save_item(NAME(m_from_mcu_latch));
+ save_item(NAME(m_to_mcu_latch));
+ save_item(NAME(m_old_portB));
}
+
MACHINE_RESET_MEMBER(bublbobl_state,tokio)
{
MACHINE_RESET_CALL_MEMBER(common);
-
- m_tokio_prot_count = 0;
}
+
+
static MACHINE_CONFIG_START( tokio, bublbobl_state )
/* basic machine hardware */
@@ -769,7 +777,14 @@ static MACHINE_CONFIG_START( tokio, bublbobl_state )
MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz
MCFG_CPU_PROGRAM_MAP(tokio_sound_map) // NMIs are triggered by the main CPU, IRQs are triggered by the YM2203
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per frame - a high value to ensure proper synchronization of the CPUs
+ MCFG_CPU_ADD("mcu", M68705_NEW, MAIN_XTAL/8) // 3 Mhz
+ MCFG_M68705_PORTA_R_CB(READ8(bublbobl_state, tokio_mcu_porta_r))
+ MCFG_M68705_PORTA_W_CB(WRITE8(bublbobl_state, tokio_mcu_porta_w))
+ MCFG_M68705_PORTB_W_CB(WRITE8(bublbobl_state, tokio_mcu_portb_w))
+ MCFG_M68705_PORTC_R_CB(READ8(bublbobl_state, tokio_mcu_portc_r))
+
+
+ MCFG_QUANTUM_PERFECT_CPU("maincpu")
MCFG_WATCHDOG_ADD("watchdog")
@@ -800,6 +815,9 @@ static MACHINE_CONFIG_START( tokio, bublbobl_state )
MCFG_SOUND_ROUTE(3, "mono", 1.0)
MACHINE_CONFIG_END
+static MACHINE_CONFIG_DERIVED( tokiob, tokio )
+ MCFG_DEVICE_REMOVE("mcu")
+MACHINE_CONFIG_END
MACHINE_START_MEMBER(bublbobl_state,bublbobl)
{
@@ -819,6 +837,7 @@ MACHINE_START_MEMBER(bublbobl_state,bublbobl)
save_item(NAME(m_port4_out));
}
+
MACHINE_RESET_MEMBER(bublbobl_state,bublbobl)
{
MACHINE_RESET_CALL_MEMBER(common);
@@ -980,8 +999,8 @@ ROM_START( tokio ) // newer japan set, has -1 revision of roms 02, 03 and 06
ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
- ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_LOAD( "a71__24.ic57", 0x0000, 0x0800, CRC(0f4b25de) SHA1(e2d82aa8d8cc6a86aaf5715ef9cb62f526fd5b11) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
ROM_LOAD( "a71-08.ic12", 0x00000, 0x8000, CRC(0439ab13) SHA1(84142220a6a29f0e34f7c7c751b583bf394df8ce) ) /* 1st plane */
@@ -1023,8 +1042,8 @@ ROM_START( tokioo ) // older japan set, has older roms 02, 03, 06
ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
- ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_LOAD( "a71__24.ic57", 0x0000, 0x0800, CRC(0f4b25de) SHA1(e2d82aa8d8cc6a86aaf5715ef9cb62f526fd5b11) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
ROM_LOAD( "a71-08.ic12", 0x00000, 0x8000, CRC(0439ab13) SHA1(84142220a6a29f0e34f7c7c751b583bf394df8ce) ) /* 1st plane */
@@ -1066,8 +1085,8 @@ ROM_START( tokiou )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
- ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_LOAD( "a71__24.ic57", 0x0000, 0x0800, CRC(0f4b25de) SHA1(e2d82aa8d8cc6a86aaf5715ef9cb62f526fd5b11) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
ROM_LOAD( "a71-08.ic12", 0x00000, 0x8000, CRC(0439ab13) SHA1(84142220a6a29f0e34f7c7c751b583bf394df8ce) ) /* 1st plane */
@@ -1880,10 +1899,10 @@ DRIVER_INIT_MEMBER(bublbobl_state,dland)
*
*************************************/
-GAME( 1986, tokio, 0, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito Corporation", "Tokio / Scramble Formation (newer)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
-GAME( 1986, tokioo, tokio, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito Corporation", "Tokio / Scramble Formation (older)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
-GAME( 1986, tokiou, tokio, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito America Corporation (Romstar license)", "Tokio / Scramble Formation (US)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
-GAME( 1986, tokiob, tokio, tokio, tokio, bublbobl_state, tokiob, ROT90, "bootleg", "Tokio / Scramble Formation (bootleg)", MACHINE_SUPPORTS_SAVE )
+GAME( 1986, tokio, 0, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito Corporation", "Tokio / Scramble Formation (newer)", MACHINE_SUPPORTS_SAVE )
+GAME( 1986, tokioo, tokio, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito Corporation", "Tokio / Scramble Formation (older)", MACHINE_SUPPORTS_SAVE )
+GAME( 1986, tokiou, tokio, tokio, tokio, bublbobl_state, tokio, ROT90, "Taito America Corporation (Romstar license)", "Tokio / Scramble Formation (US)", MACHINE_SUPPORTS_SAVE )
+GAME( 1986, tokiob, tokio, tokiob, tokio, bublbobl_state, tokiob, ROT90, "bootleg", "Tokio / Scramble Formation (bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1986, bublbobl, 0, bublbobl, bublbobl, bublbobl_state, bublbobl, ROT0, "Taito Corporation", "Bubble Bobble (Japan, Ver 0.1)", MACHINE_SUPPORTS_SAVE )
GAME( 1986, bublbobl1, bublbobl, bublbobl, bublbobl, bublbobl_state, bublbobl, ROT0, "Taito Corporation", "Bubble Bobble (Japan, Ver 0.0)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/by35.cpp b/src/mame/drivers/by35.cpp
index 58755594b42..b5fbb39cbd8 100644
--- a/src/mame/drivers/by35.cpp
+++ b/src/mame/drivers/by35.cpp
@@ -2306,7 +2306,7 @@ ROM_START(uboat65)
ROM_RELOAD(0x28000, 0x8000)
ROM_RELOAD(0x38000, 0x8000)
ROM_REGION(0x10000, "cpu2", 0)
- ROM_LOAD("snd_u8.bin", 0x8000, 0x8000, CRC(d00fd4fd) SHA1(23f6b7c5d60821eb7fa2fdcfc85caeb536eef99a))
+ ROM_LOAD("snd_u8.bin", 0x8000, 0x8000, CRC(d00fd4fd) SHA1(23f6b7c5d60821eb7fa2fdcfc85caeb536eef99a))
ROM_END
/*--------------------------------
/ Big Ball Bowling (Bowler)
diff --git a/src/mame/drivers/carpolo.cpp b/src/mame/drivers/carpolo.cpp
index b111489223e..a01cc10da50 100644
--- a/src/mame/drivers/carpolo.cpp
+++ b/src/mame/drivers/carpolo.cpp
@@ -275,7 +275,9 @@ static MACHINE_CONFIG_START( carpolo, carpolo_state )
MCFG_DEVICE_ADD("74148_3s", TTL74148, 0)
MCFG_74148_OUTPUT_CB(carpolo_state, ttl74148_3s_cb)
- MCFG_DEVICE_ADD("74153_1k", TTL74153, 0)
+ MCFG_TTL153_ADD("74153_1k")
+ MCFG_TTL153_ZA_CB(WRITELINE(carpolo_state, ls153_za_w)) // pia1 pb5
+ MCFG_TTL153_ZB_CB(WRITELINE(carpolo_state, ls153_zb_w)) // pia1 pb4
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/ccastles.cpp b/src/mame/drivers/ccastles.cpp
index 0a3da1df0f5..ef9c31078fc 100644
--- a/src/mame/drivers/ccastles.cpp
+++ b/src/mame/drivers/ccastles.cpp
@@ -361,10 +361,10 @@ static INPUT_PORTS_START( ccastles )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ccastles_state,get_vblank, nullptr)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Jump/1P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* left Jump, non-cocktail start1 */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 1p Jump, cocktail */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Jump/2P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* right Jump, non-cocktail start2 */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_NAME("2P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 2p Jump, cocktail */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Jump/1P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* left Jump, non-cocktail start1 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 1p Jump, cocktail */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Jump/2P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* right Jump, non-cocktail start2 */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_NAME("2P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 2p Jump, cocktail */
PORT_START("IN1") /* IN1 */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
@@ -376,8 +376,8 @@ static INPUT_PORTS_START( ccastles )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("1P Start Cocktail") /* cocktail only */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("2P Start Cocktail") /* cocktail only */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("1P Start Cocktail") /* cocktail only */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("2P Start Cocktail") /* cocktail only */
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
@@ -390,10 +390,10 @@ static INPUT_PORTS_START( ccastles )
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(10) PORT_KEYDELTA(30)
PORT_START("LETA2")
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) PORT_REVERSE /* cocktail only */
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) PORT_REVERSE /* cocktail only */
PORT_START("LETA3")
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) /* cocktail only */
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) /* cocktail only */
INPUT_PORTS_END
diff --git a/src/mame/drivers/cedar_magnet.cpp b/src/mame/drivers/cedar_magnet.cpp
index 8f667be2e49..1b972602df0 100644
--- a/src/mame/drivers/cedar_magnet.cpp
+++ b/src/mame/drivers/cedar_magnet.cpp
@@ -15,8 +15,6 @@
- verify the disk images, convert to a better format that can natively store protection
* RAW data also available if required
* as mentioned, the disks are copy protected, see notes below
- * are the bad tiles shortly into the first level of mag_exzi caused by a bad dump or
- bad comms?
- Use proper floppy drive emulation code that originally came from MESS (tied with above)
- verify all clocks and screen params (50hz seems to match original videos)
- work out why we need a protection hack and replace it with proper emulation
@@ -845,8 +843,8 @@ ROM_END
ROM_START( mag_exzi )
BIOS_ROM
- ROM_REGION( 0x100000, "flop:disk", ROMREGION_ERASE00 ) // I don't 100% trust this one
- ROM_LOAD( "exzisus.img", 0x00000, 0xf0000, BAD_DUMP CRC(1ac7409e) SHA1(b894bd65b0b9699e18a1ab49f309c460488f0ef8) )
+ ROM_REGION( 0x100000, "flop:disk", ROMREGION_ERASE00 )
+ ROM_LOAD( "exzisus.img", 0x00000, 0xf0000, CRC(3705e9dc) SHA1(78c8010d224f5deb202a29bd273ea7dc85ddcdb4) )
ROM_END
ROM_START( mag_xain )
@@ -909,8 +907,8 @@ DRIVER_INIT_MEMBER(cedar_magnet_state, mag_exzi)
m_prothack = mag_exzi_protection_hack;
}
-GAME( 1987, cedmag, 0, cedar_magnet, cedar_magnet, driver_device, 0, ROT0, "EFO SA / Cedar", "Magnet System (prototype)", MACHINE_IS_BIOS_ROOT )
+GAME( 1987, cedmag, 0, cedar_magnet, cedar_magnet, driver_device, 0, ROT0, "EFO SA / Cedar", "Magnet System", MACHINE_IS_BIOS_ROOT )
-GAME( 1987, mag_time, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_time, ROT90, "EFO SA / Cedar", "Time Scanner (TS 2.0, Magnet System, prototype)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Sega
-GAME( 1987, mag_exzi, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_exzi, ROT0, "EFO SA / Cedar", "Exzisus (EX 1.0, Magnet System, prototype)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Taito
-GAME( 1987, mag_xain, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_xain, ROT0, "EFO SA / Cedar", "Xain'd Sleena (SC 3.0, Magnet System, prototype)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Technos
+GAME( 1987, mag_time, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_time, ROT90, "EFO SA / Cedar", "Time Scanner (TS 2.0, Magnet System)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Sega
+GAME( 1987, mag_exzi, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_exzi, ROT0, "EFO SA / Cedar", "Exzisus (EX 1.0, Magnet System)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Taito
+GAME( 1987, mag_xain, cedmag, cedar_magnet, cedar_magnet, cedar_magnet_state, mag_xain, ROT0, "EFO SA / Cedar", "Xain'd Sleena (SC 3.0, Magnet System)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // original game was by Technos
diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp
index af52bc2da74..5c3239b1030 100644
--- a/src/mame/drivers/coco12.cpp
+++ b/src/mame/drivers/coco12.cpp
@@ -470,4 +470,4 @@ COMP( 1985?, coco2b, coco, 0, coco2b, coco, driver_device,
COMP( 1984, cp400, coco, 0, cp400, coco, driver_device, 0, "Prologica", "CP400", 0)
COMP( 1984, lzcolor64, coco, 0, coco, coco, driver_device, 0, "Digiponto", "LZ Color64", 0)
COMP( 1984, mx1600, coco, 0, coco, coco, driver_device, 0, "Dynacom", "MX-1600", 0)
-COMP( 1986, t4426, coco, 0, t4426, coco, driver_device, 0, "Terco AB", "Terco 4426 CNC Programming station", MACHINE_NOT_WORKING)
+COMP( 1986, t4426, coco, 0, t4426, coco, driver_device, 0, "Terco AB", "Terco 4426 CNC Programming station", MACHINE_NOT_WORKING)
diff --git a/src/mame/drivers/cps1.cpp b/src/mame/drivers/cps1.cpp
index ca475e80838..d863be1d49b 100644
--- a/src/mame/drivers/cps1.cpp
+++ b/src/mame/drivers/cps1.cpp
@@ -4026,7 +4026,7 @@ ROM_START( daimakai )
ROM_LOAD( "sou1", 0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) )
ROM_REGION( 0x0200, "bboardplds", 0 )
- ROM_LOAD( "dm22a.1a", 0x0000, 0x0117, NO_DUMP )
+ ROM_LOAD( "dm22a.1a", 0x0000, 0x0117, CRC(d4776116) SHA1(802d8bc18ad2b8c998e5338a0aa4e74895de2c81) )
ROM_LOAD( "lwio.12c", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) )
ROM_END
diff --git a/src/mame/drivers/ct486.cpp b/src/mame/drivers/ct486.cpp
index 1af48cb802d..781f1ded72e 100644
--- a/src/mame/drivers/ct486.cpp
+++ b/src/mame/drivers/ct486.cpp
@@ -174,7 +174,6 @@ static MACHINE_CONFIG_START( ct486, ct486_state )
/* software lists */
MCFG_SOFTWARE_LIST_ADD("pc_disk_list","ibm5150")
- MCFG_SOFTWARE_LIST_ADD("xt_disk_list","ibm5160_flop")
MCFG_SOFTWARE_LIST_ADD("at_disk_list","ibm5170")
MCFG_SOFTWARE_LIST_ADD("at_cdrom_list","ibm5170_cdrom")
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/ddealer.cpp b/src/mame/drivers/ddealer.cpp
index 284146145e4..6ecf09b766a 100644
--- a/src/mame/drivers/ddealer.cpp
+++ b/src/mame/drivers/ddealer.cpp
@@ -288,7 +288,7 @@ uint32_t ddealer_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
combined, the flipscreen case makes things more
difficult to understand */
bool const flip = flip_screen();
-
+
if (!flip)
{
if (m_vregs[0xcc / 2] & 0x80)
diff --git a/src/mame/drivers/de_2.cpp b/src/mame/drivers/de_2.cpp
index 37f8b1cf0bc..628e46554de 100644
--- a/src/mame/drivers/de_2.cpp
+++ b/src/mame/drivers/de_2.cpp
@@ -630,6 +630,17 @@ MACHINE_CONFIG_END
/*--------------------------------------------------------------------------------
/ Back To the Future - CPU Rev 3 /Alpha Type 3 - 32K Roms - 32/64K Sound Roms
/--------------------------------------------------------------------------------*/
+ROM_START(bttf_a28)
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("bttfb5.2-8", 0x4000, 0x4000, CRC(a7dafa3c) SHA1(a29b8986d1886aa7bb7dea2521c3d7143ab75320))
+ ROM_LOAD("bttfc5.2-8", 0x8000, 0x8000, CRC(5dc9928f) SHA1(03de05ed7b04ba86d695f03b1a3d65788faf2d4f))
+ ROM_REGION(0x10000, "audiocpu", 0)
+ ROM_LOAD("bttfsf7.rom", 0x8000, 0x8000, CRC(7673146e) SHA1(d6bd7cf39c78c8aff0b1a0b6cfd46a2a8ce9e086))
+ ROM_REGION(0x1000000, "sound1", 0)
+ ROM_LOAD("bttfsf6.rom", 0x00000, 0x10000, CRC(468a8d9c) SHA1(713cf84cc5f0531e2e9f7aaa58ebeb53c28ba395))
+ ROM_LOAD("bttfsf5.rom", 0x10000, 0x10000, CRC(37a6f6b8) SHA1(ebd603d36527a2af25dcda1fde5cdf9a34d1f9cd))
+ROM_END
+
ROM_START(bttf_a27)
ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD("bttfb5.2-7", 0x4000, 0x4000, CRC(24b53174) SHA1(00a5e47e70ce4244873980c946479f0bbc414f2e))
@@ -935,10 +946,11 @@ ROM_START(torp_a16)
ROM_END
-GAME(1990, bttf_a27, 0, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.7)", MACHINE_IS_SKELETON_MECHANICAL)
-GAME(1990, bttf_a20, bttf_a27, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.0)", MACHINE_IS_SKELETON_MECHANICAL)
-GAME(1990, bttf_a21, bttf_a27, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To The Future (2.1)", MACHINE_IS_SKELETON_MECHANICAL)
-GAME(199?, bttf_g27, bttf_a27, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.7 Germany)", MACHINE_IS_SKELETON_MECHANICAL)
+GAME(1990, bttf_a28, 0, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.8)", MACHINE_IS_SKELETON_MECHANICAL)
+GAME(1990, bttf_a27, bttf_a28, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.7)", MACHINE_IS_SKELETON_MECHANICAL)
+GAME(1990, bttf_a20, bttf_a28, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.0)", MACHINE_IS_SKELETON_MECHANICAL)
+GAME(1990, bttf_a21, bttf_a28, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To The Future (2.1)", MACHINE_IS_SKELETON_MECHANICAL)
+GAME(199?, bttf_g27, bttf_a28, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "Back To the Future (2.7 Germany)", MACHINE_IS_SKELETON_MECHANICAL)
GAME(1990, kiko_a10, 0, de_type3, de_2, de_2_state, de_2, ROT0, "Data East", "King Kong (1.0)", MACHINE_IS_SKELETON_MECHANICAL)
GAME(1987, lwar_a83, 0, de_type1, de_2, de_2_state, de_2, ROT0, "Data East", "Laser War (8.3)", MACHINE_IS_SKELETON_MECHANICAL)
GAME(1987, lwar_a81, lwar_a83, de_type1, de_2, de_2_state, de_2, ROT0, "Data East", "Laser War (8.1)", MACHINE_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp
index d350869cec1..cc797e27313 100644
--- a/src/mame/drivers/dec0.cpp
+++ b/src/mame/drivers/dec0.cpp
@@ -2647,6 +2647,49 @@ ROM_START( ffantasya )
ROM_LOAD( "ew03", 0x0000, 0x10000, CRC(b606924d) SHA1(b759fcec10b333465cf5cd1b30987bf2d62186b2) )
ROM_END
+ROM_START( ffantasyb ) // DE-0297-3 PCB. All EX labels.
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_LOAD16_BYTE( "ex02-2", 0x00000, 0x10000, CRC(4c26cda6) SHA1(475eb30da7020bf2b1546e3878973231aa52d522) )
+ ROM_LOAD16_BYTE( "ex01", 0x00001, 0x10000, CRC(d2c4ab91) SHA1(3134e5aa9815e9ca46601c46268a91414f907fce) )
+ ROM_LOAD16_BYTE( "ex05", 0x20000, 0x10000, CRC(c76d65ec) SHA1(620990acaf2fd7f3fbfe7135a17ac0195feb8330) )
+ ROM_LOAD16_BYTE( "ex00", 0x20001, 0x10000, CRC(e9b427a6) SHA1(b334992846771739d31756724138b82f897dfad5) )
+
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 6502 sound */
+ ROM_LOAD( "ex04", 0x8000, 0x8000, CRC(9871b98d) SHA1(2b6c46bc2b10a28946d6ad8251e1a156a0b99947) )
+
+ ROM_REGION( 0x10000, "sub", 0 ) /* HuC6280 CPU */
+ ROM_LOAD( "ex08", 0x00000, 0x10000, CRC(53010534) SHA1(8b996e48414bacd009e05ff49848884ecf15d967) )
+
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* chars */
+ ROM_LOAD( "ex14", 0x00000, 0x10000, CRC(686f72c1) SHA1(41d4fc1208d779f3428990a96586f6a555c28562) )
+ ROM_LOAD( "ex13", 0x10000, 0x10000, CRC(b787dcc9) SHA1(7fce9d2040bcb2483419ea1cafed538bb8aba4f9) )
+
+ ROM_REGION( 0x20000, "gfx2", 0 ) /* tiles */
+ ROM_LOAD( "ex19", 0x00000, 0x08000, CRC(6b80d7a3) SHA1(323162e7e0ce16f6244d8d98fdb2396ffef87e82) )
+ ROM_LOAD( "ex18", 0x08000, 0x08000, CRC(78d3d764) SHA1(e8f77a23bd4f4d268bec7c0153fb957acd07cdee) )
+ ROM_LOAD( "ex20", 0x10000, 0x08000, CRC(ce9f5de3) SHA1(b8af33f52ca3579a45b41395751697a58931f9d6) )
+ ROM_LOAD( "ex21", 0x18000, 0x08000, CRC(487a7ba2) SHA1(7d52cc1517def8426355e8281440ec5e617d1121) )
+
+ ROM_REGION( 0x20000, "gfx3", 0 ) /* tiles */
+ ROM_LOAD( "ex24", 0x00000, 0x08000, CRC(4e1bc2a4) SHA1(d7d4c42fd932722436f1847929088e46d03184bd) )
+ ROM_LOAD( "ex25", 0x08000, 0x08000, CRC(9eb47dfb) SHA1(bb1e8a3a47f447f3a983ea51943d3081d56ad9a4) )
+ ROM_LOAD( "ex23", 0x10000, 0x08000, CRC(9ecf479e) SHA1(a8d4c1490f12e1b15d53a2a97147920dcb638378) )
+ ROM_LOAD( "ex22", 0x18000, 0x08000, CRC(e55669aa) SHA1(2a9b0e85bb81ff87a108e08b28e19b7b469463e4) )
+
+ ROM_REGION( 0x80000, "gfx4", 0 ) /* sprites */
+ ROM_LOAD( "ex15", 0x00000, 0x10000, CRC(95423914) SHA1(e9e7a6bdf5aa717dc04a751709632f31762886fb) )
+ ROM_LOAD( "ex16", 0x10000, 0x10000, CRC(96233177) SHA1(929a1b7fb65ab33277719b84517ff57da563f875) )
+ ROM_LOAD( "ex10", 0x20000, 0x10000, CRC(4c25dfe8) SHA1(e4334de96698cd0112a8926dea131e748b6a84fc) )
+ ROM_LOAD( "ex11", 0x30000, 0x10000, CRC(f2e007fc) SHA1(da30ad3725b9bc4a07dbb1afa05f145c3574c84c) )
+ ROM_LOAD( "ex06", 0x40000, 0x10000, CRC(e4bb8199) SHA1(49b5b45c7cd9c44f53d83ee2a156d9e9f8a53960) )
+ ROM_LOAD( "ex07", 0x50000, 0x10000, CRC(470b6989) SHA1(16b292d8a3a54048bf29f0b4f41bb6ca049b347c) )
+ ROM_LOAD( "ex17", 0x60000, 0x10000, CRC(8c97c757) SHA1(36fd807da9e144dfb29c8252e9450cc37ca2604f) )
+ ROM_LOAD( "ex12", 0x70000, 0x10000, CRC(a2d244bc) SHA1(ff2391efc480f36a302650691f8a7a620b86d99a) )
+
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_LOAD( "ex03", 0x0000, 0x10000, CRC(b606924d) SHA1(b759fcec10b333465cf5cd1b30987bf2d62186b2) )
+ROM_END
+
/* this is probably a bootleg of an undumped original revision */
ROM_START( ffantasybl )
ROM_REGION( 0x80000, "maincpu", 0 ) /* 4*64k for 68000 code */
@@ -3366,6 +3409,7 @@ GAME( 1989, hippodrm, 0, hippodrm, hippodrm, dec0_state, hippodrm, ROT0
GAME( 1989, ffantasy, hippodrm, hippodrm, ffantasy, dec0_state, hippodrm, ROT0, "Data East Corporation", "Fighting Fantasy (Japan revision 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, ffantasyj, hippodrm, hippodrm, ffantasy, dec0_state, hippodrm, ROT0, "Data East Corporation", "Fighting Fantasy (Japan revision 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, ffantasya, hippodrm, hippodrm, ffantasy, dec0_state, hippodrm, ROT0, "Data East Corporation", "Fighting Fantasy (Japan)", MACHINE_SUPPORTS_SAVE ) // presumably rev 1
+GAME( 1989, ffantasyb, hippodrm, hippodrm, ffantasy, dec0_state, hippodrm, ROT0, "Data East Corporation", "Fighting Fantasy (Japan revision ?)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, secretag, 0, slyspy, slyspy, dec0_state, slyspy, ROT0, "Data East Corporation", "Secret Agent (World revision 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, secretagj, secretag, slyspy, slyspy, dec0_state, slyspy, ROT0, "Data East Corporation", "Secret Agent (Japan revision 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, slyspy, secretag, slyspy, slyspy, dec0_state, slyspy, ROT0, "Data East USA", "Sly Spy (US revision 4)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/deco32.cpp b/src/mame/drivers/deco32.cpp
index 47845ed8c35..09d80fa33b4 100644
--- a/src/mame/drivers/deco32.cpp
+++ b/src/mame/drivers/deco32.cpp
@@ -371,7 +371,6 @@ NOTE: There are several unpopulated locations (denoted by *) for additional rom
#include "machine/decocrpt.h"
#include "machine/deco156.h"
#include "includes/deco32.h"
-#include "sound/ym2151.h"
/**********************************************************************************/
@@ -453,6 +452,19 @@ void deco32_state::deco32_sound_cb( address_space &space, uint16_t data, uint16_
m_audiocpu->set_input_line(0, HOLD_LINE);
}
+void deco32_state::deco32_set_audio_output(uint8_t raw_data)
+{
+ // TODO: assume linear with a 0.0-1.0 dB scale for now
+ uint8_t raw_vol = 0xff - raw_data;
+ float vol_output = ((float)raw_vol) / 255.0f;
+
+ m_ym2151->set_output_gain(ALL_OUTPUTS, vol_output);
+ m_oki1->set_output_gain(ALL_OUTPUTS, vol_output);
+ m_oki2->set_output_gain(ALL_OUTPUTS, vol_output);
+
+ popmessage("%02x %02x %f",raw_data,raw_vol,vol_output);
+}
+
READ32_MEMBER(deco32_state::_71_r)
{
/* Bit 0x80 goes high when sprite DMA is complete, and low
@@ -478,6 +490,7 @@ READ32_MEMBER(deco32_state::fghthist_control_r)
return 0xffffffff;
}
+
WRITE32_MEMBER(deco32_state::fghthist_eeprom_w)
{
if (ACCESSING_BITS_0_7) {
@@ -487,9 +500,11 @@ WRITE32_MEMBER(deco32_state::fghthist_eeprom_w)
pri_w(space,0,data&0x1,0xffffffff); /* Bit 0 - layer priority toggle */
}
- else if (!ACCESSING_BITS_8_15)
+
+ if (ACCESSING_BITS_8_15)
{
// Volume port
+ deco32_set_audio_output((data >> 8) & 0xff);
}
}
@@ -555,7 +570,7 @@ WRITE32_MEMBER(dragngun_state::eeprom_w)
WRITE32_MEMBER(deco32_state::tattass_control_w)
{
/* Eprom in low byte */
- if (mem_mask==0x000000ff) { /* Byte write to low byte only (different from word writing including low byte) */
+ if (ACCESSING_BITS_0_7) { /* Byte write to low byte only (different from word writing including low byte) */
/*
The Tattoo Assassins eprom seems strange... It's 1024 bytes in size, and 8 bit
in width, but offers a 'multiple read' mode where a bit stream can be read
@@ -656,13 +671,12 @@ WRITE32_MEMBER(deco32_state::tattass_control_w)
}
m_lastClock=data&0x20;
- return;
}
/* Volume in high byte */
- if (mem_mask==0x0000ff00) {
+ if (ACCESSING_BITS_8_15) {
//TODO: volume attenuation == ((data>>8)&0xff);
- return;
+ // TODO: is it really there?
}
/* Playfield control - Only written in full word memory accesses */
@@ -720,6 +734,10 @@ WRITE32_MEMBER(deco32_state::nslasher_eeprom_w)
pri_w(space,0,data&0x3,0xffffffff); /* Bit 0 - layer priority toggle, Bit 1 - BG2/3 Joint mode (8bpp) */
}
+
+// popmessage("%08x",data);
+ if (ACCESSING_BITS_8_15)
+ deco32_set_audio_output((data >> 8) & 0xff);
}
@@ -1031,6 +1049,7 @@ static ADDRESS_MAP_START( lockload_map, AS_PROGRAM, 32, dragngun_state )
AM_RANGE(0x300000, 0x3fffff) AM_ROM
// AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("oki3", okim6295_device, read, write, 0x000000ff)
+ AM_RANGE(0x410000, 0x410003) AM_WRITENOP /* Some kind of serial bit-stream - digital volume control? */
AM_RANGE(0x420000, 0x420003) AM_READWRITE(eeprom_r, eeprom_w)
// AM_RANGE(0x430000, 0x43001f) AM_WRITE(lightgun_w)
// AM_RANGE(0x438000, 0x438003) AM_READ(lightgun_r)
diff --git a/src/mame/drivers/deco_mlc.cpp b/src/mame/drivers/deco_mlc.cpp
index 5f90e12b1da..174e93c8474 100644
--- a/src/mame/drivers/deco_mlc.cpp
+++ b/src/mame/drivers/deco_mlc.cpp
@@ -841,6 +841,30 @@ ROM_START( skullfngj )
ROM_LOAD( "skullfng.eeprom", 0x00, 0x80, CRC(240d882e) SHA1(3c1a15ccac91d95b02a8c54b051aa64ff28ce2ab) )
ROM_END
+ROM_START( skullfnga )
+ ROM_REGION( 0x100000, "maincpu", 0 )
+ ROM_LOAD32_WORD( "sx00-0.2a", 0x000000, 0x80000, CRC(749c0972) SHA1(8a5f170f2f8d800ad2d47ecf2e5b8978a1f14f50) )
+ ROM_LOAD32_WORD( "sx01-0.2b", 0x000002, 0x80000, CRC(61ae7dc3) SHA1(185448fb3d9fe887db0202b195c97674e3dd5f65) )
+
+ ROM_REGION( 0xc00000, "gfx1", 0 )
+ ROM_LOAD16_BYTE( "mch-00.2e", 0x000001, 0x200000, CRC(d5cc4238) SHA1(f1bd86386e44a3f600475aeab310f7ea632998df) )
+ ROM_LOAD16_BYTE( "mch-01.8m", 0x000000, 0x200000, CRC(d37cf0cd) SHA1(c2fe7062a123ca2df65217c6dced857b803d8a8d) )
+ ROM_LOAD16_BYTE( "mch-02.4e", 0x400001, 0x200000, CRC(4046314d) SHA1(32e3b7ddbe20ffa6ba6ebe9bd55a32e3b3a120f6) )
+ ROM_LOAD16_BYTE( "mch-03.10m",0x400000, 0x200000, CRC(1dea8f6c) SHA1(c2ad59592385a00e323aac9057906c9384b67078) )
+ ROM_LOAD16_BYTE( "mch-04.6e", 0x800001, 0x200000, CRC(4869dfe8) SHA1(296df6274ecb3eed485de24258cf462e3942f1fa) )
+ ROM_LOAD16_BYTE( "mch-05.11m",0x800000, 0x200000, CRC(ef0b54ba) SHA1(3be56c064ac81686096be5f31ad2aad948ba6701) )
+
+ ROM_REGION( 0x80000, "gfx2", 0 )
+ ROM_LOAD( "sx02-0.6h", 0x000000, 0x80000, CRC(0d3ae757) SHA1(480fc3855d330380b75a47a271f3571a59aee10c) )
+
+ ROM_REGION( 0x800000, "ymz", ROMREGION_ERASE00 )
+ ROM_LOAD( "mch-06.6a", 0x200000, 0x200000, CRC(b2efe4ae) SHA1(5a9dab74c2ba73a65e8f1419b897467804734fa2) )
+ ROM_LOAD( "mch-07.11j", 0x400000, 0x200000, CRC(bc1a50a1) SHA1(3de191fbc92d2ae84e54263f1c70afec6ff7cc3c) )
+
+ ROM_REGION16_BE( 0x80, "eeprom", ROMREGION_ERASE00 )
+ ROM_LOAD( "skullfng.eeprom", 0x00, 0x80, CRC(240d882e) SHA1(3c1a15ccac91d95b02a8c54b051aa64ff28ce2ab) )
+ROM_END
+
/***************************************************************************/
void deco_mlc_state::descramble_sound( )
@@ -918,6 +942,7 @@ GAME( 1996, stadhr96u,stadhr96, mlc_6bpp, mlc, deco_mlc_state, mlc, ROT0,
GAME( 1996, stadhr96j,stadhr96, mlc_6bpp, mlc, deco_mlc_state, mlc, ROT0, "Data East Corporation", "Stadium Hero '96 (Japan, EAD)", MACHINE_IMPERFECT_GRAPHICS ) // Rom labels are EAD (this isn't a Konami region code!)
GAME( 1996, skullfng, 0, mlc_6bpp, mlc, deco_mlc_state, mlc, ROT270, "Data East Corporation", "Skull Fang (World)", 0 ) /* Version 1.13, Europe, Master 96.02.19 */
GAME( 1996, skullfngj,skullfng, mlc_6bpp, mlc, deco_mlc_state, mlc, ROT270, "Data East Corporation", "Skull Fang (Japan)", 0 ) /* Version 1.09, Japan, Master 96.02.08 */
+GAME( 1996, skullfnga,skullfng, mlc_6bpp, mlc, deco_mlc_state, mlc, ROT270, "Data East Corporation", "Skull Fang (Asia)", 0 ) /* Version 1.13, Asia, Master 96.02.19 */
GAME( 1996, hoops96, 0, mlc_5bpp, mlc, deco_mlc_state, mlc, ROT0, "Data East Corporation", "Hoops '96 (Europe/Asia 2.0)", 0 )
GAME( 1995, ddream95, hoops96, mlc_5bpp, mlc, deco_mlc_state, mlc, ROT0, "Data East Corporation", "Dunk Dream '95 (Japan 1.4, EAM)", 0 )
GAME( 1995, hoops95, hoops96, mlc_5bpp, mlc, deco_mlc_state, mlc, ROT0, "Data East Corporation", "Hoops (Europe/Asia 1.7)", 0 )
diff --git a/src/mame/drivers/dmv.cpp b/src/mame/drivers/dmv.cpp
index 1a1a2d49da0..16dcaaab62e 100644
--- a/src/mame/drivers/dmv.cpp
+++ b/src/mame/drivers/dmv.cpp
@@ -748,10 +748,10 @@ static MACHINE_CONFIG_START( dmv, dmv_state )
MCFG_I8237_OUT_EOP_CB(WRITELINE(dmv_state, dmac_eop))
MCFG_I8237_IN_MEMR_CB(READ8(dmv_state, program_r))
MCFG_I8237_OUT_MEMW_CB(WRITE8(dmv_state, program_w))
- MCFG_I8237_IN_IOR_0_CB(LOGGER("DMA CH1", 0))
- MCFG_I8237_OUT_IOW_0_CB(LOGGER("DMA CH1", 0))
- MCFG_I8237_IN_IOR_1_CB(LOGGER("DMA CH2", 0))
- MCFG_I8237_OUT_IOW_1_CB(LOGGER("DMA CH2", 0))
+ MCFG_I8237_IN_IOR_0_CB(LOGGER("Read DMA CH1"))
+ MCFG_I8237_OUT_IOW_0_CB(LOGGER("Write DMA CH1"))
+ MCFG_I8237_IN_IOR_1_CB(LOGGER("Read DMA CH2"))
+ MCFG_I8237_OUT_IOW_1_CB(LOGGER("Write DMA CH2"))
MCFG_I8237_IN_IOR_2_CB(DEVREAD8("upd7220", upd7220_device, dack_r))
MCFG_I8237_OUT_IOW_2_CB(DEVWRITE8("upd7220", upd7220_device, dack_w))
MCFG_I8237_IN_IOR_3_CB(DEVREAD8("i8272", i8272a_device, mdma_r))
diff --git a/src/mame/drivers/dynduke.cpp b/src/mame/drivers/dynduke.cpp
index 8f5daf72b5c..1c61c6a743a 100644
--- a/src/mame/drivers/dynduke.cpp
+++ b/src/mame/drivers/dynduke.cpp
@@ -197,7 +197,7 @@ static INPUT_PORTS_START( dynduke )
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_BIT( 0x0300, 0x0300, IPT_UNUSED ) /* "SW2:1,2" - Always OFF according to the manual */
- PORT_DIPNAME( 0x0c00, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c00, 0x0400, "Bonus D.Punch" ) PORT_DIPLOCATION("SW2:3,4") // smart bomb extends
PORT_DIPSETTING( 0x0c00, "80K 100K+" )
PORT_DIPSETTING( 0x0800, "100K 100K+" )
PORT_DIPSETTING( 0x0400, "120K 100K+" )
@@ -366,16 +366,16 @@ ROM_START( dynduke )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "dde3.e8", 0x0c0000, 0x20000, CRC(95336279) SHA1(0218640e57d0a6df03ce51f2afad9862d4b13a50) )
- ROM_LOAD16_BYTE( "dde4.e7", 0x0c0001, 0x20000, CRC(eb2d8fea) SHA1(d6bb718ece9011f7e24ca1c2f70a513e1c13a7a8) )
+ ROM_LOAD16_BYTE( "dde3.e8", 0x0c0000, 0x20000, CRC(95336279) SHA1(0218640e57d0a6df03ce51f2afad9862d4b13a50) ) // Euro 03SEP89
+ ROM_LOAD16_BYTE( "dde4.e7", 0x0c0001, 0x20000, CRC(eb2d8fea) SHA1(d6bb718ece9011f7e24ca1c2f70a513e1c13a7a8) ) // Euro 03SEP89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5.p8", 0x0e0000, 0x10000, CRC(883d319c) SHA1(b0df05bfe342a5289a6368be26317fa879975463) )
ROM_LOAD16_BYTE( "6.p7", 0x0e0001, 0x10000, CRC(d94cb4ff) SHA1(653247c420a2af037106470556e6801b29bc58e8) )
ROM_REGION( 0x20000*2, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -414,16 +414,16 @@ ROM_START( dyndukea )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "3.e8", 0x0c0000, 0x20000, CRC(a56f8692) SHA1(00d86c660efae30c008f8220fdfd397b7d69b2cd) )
- ROM_LOAD16_BYTE( "4e.e7", 0x0c0001, 0x20000, CRC(384c0635) SHA1(4b9332d8b91426c17a2b2a58633dc6dde526284d) )
+ ROM_LOAD16_BYTE( "3.e8", 0x0c0000, 0x20000, CRC(a56f8692) SHA1(00d86c660efae30c008f8220fdfd397b7d69b2cd) ) // Euro 25JUL89
+ ROM_LOAD16_BYTE( "4e.e7", 0x0c0001, 0x20000, CRC(384c0635) SHA1(4b9332d8b91426c17a2b2a58633dc6dde526284d) ) // Euro 25JUL89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5.p8", 0x0e0000, 0x10000, CRC(883d319c) SHA1(b0df05bfe342a5289a6368be26317fa879975463) )
ROM_LOAD16_BYTE( "6.p7", 0x0e0001, 0x10000, CRC(d94cb4ff) SHA1(653247c420a2af037106470556e6801b29bc58e8) )
ROM_REGION( 0x20000*2, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -462,16 +462,64 @@ ROM_START( dyndukej )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "3.e8", 0x0c0000, 0x20000, CRC(98b9d243) SHA1(db00ffafa1353425adb79f5bf6a0cf9223a0d031) ) // sldh
- ROM_LOAD16_BYTE( "4.e7", 0x0c0001, 0x20000, CRC(4f575177) SHA1(837e6bab531f16efb0d21ab5b88c529ee16b40d0) )
+ ROM_LOAD16_BYTE( "3.e8", 0x0c0000, 0x20000, CRC(98b9d243) SHA1(db00ffafa1353425adb79f5bf6a0cf9223a0d031) ) // Japan 03SEP89
+ ROM_LOAD16_BYTE( "4.e7", 0x0c0001, 0x20000, CRC(4f575177) SHA1(837e6bab531f16efb0d21ab5b88c529ee16b40d0) ) // Japan 03SEP89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5.p8", 0x0e0000, 0x10000, CRC(883d319c) SHA1(b0df05bfe342a5289a6368be26317fa879975463) )
ROM_LOAD16_BYTE( "6.p7", 0x0e0001, 0x10000, CRC(d94cb4ff) SHA1(653247c420a2af037106470556e6801b29bc58e8) )
ROM_REGION( 0x20000*2, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "9.5k", 0x000000, 0x04000, CRC(f2bc9af4) SHA1(9092ebe9dced243c3a7f63198a1180143dd42cea) ) /* chars */
+ ROM_LOAD( "10.34k", 0x010000, 0x04000, CRC(c2a9f19b) SHA1(0bcea042386109c277c6c5dbe52a020f9ea5972b) )
+
+ ROM_REGION( 0x180000, "gfx2", 0 )
+ ROM_LOAD( "dd.a2", 0x000000, 0x40000, CRC(598f343f) SHA1(eee794d9d0a92e066f00818bfb63e8ca46bda764) ) /* background */
+ ROM_LOAD( "dd.b2", 0x040000, 0x40000, CRC(41a9088d) SHA1(eb0b7370dc773cb6f5066b044934ffb42bb06587) )
+ ROM_LOAD( "dd.c2", 0x080000, 0x40000, CRC(cc341b42) SHA1(8c3cf09a3a0080a1cd7c1049cb8d11f03de50919) )
+ ROM_LOAD( "dd.d2", 0x0c0000, 0x40000, CRC(4752b4d7) SHA1(4625b7885ff9d302e78d7324b3592ac5a3cead86) )
+ ROM_LOAD( "dd.de3", 0x100000, 0x40000, CRC(44a4cb62) SHA1(70b2043d0428c90ee22ccd479d9710af24d359f6) )
+ ROM_LOAD( "dd.ef3", 0x140000, 0x40000, CRC(aa8aee1a) SHA1(8b2b8dcb2287318e314b256f84c23424cfe29462) )
+
+ ROM_REGION( 0x100000, "gfx3", 0 )
+ ROM_LOAD( "dd.mn3", 0x000000, 0x40000, CRC(2ee0ca98) SHA1(2ef2c4fd337e0ee4685e4863909985ee0a4c4b91) ) /* foreground */
+ ROM_LOAD( "dd.mn4", 0x040000, 0x40000, CRC(6c71e2df) SHA1(fe87277a625010c214e05b43572fadb493b3d05d) )
+ ROM_LOAD( "dd.n45", 0x080000, 0x40000, CRC(85d918e1) SHA1(882cdf633288c95f2349d7c86799875b707ca347) )
+ ROM_LOAD( "dd.mn5", 0x0c0000, 0x40000, CRC(e71e34df) SHA1(dce8e3de61f3869da57d476bf861856154365058) )
+
+ ROM_REGION( 0x200000, "gfx4", 0 )
+ ROM_LOAD16_BYTE( "dd.n1", 0x000000, 0x40000, CRC(cf1db927) SHA1(3fde2ca7e7e302773ae01ed89edf0bcf69fc7aa1) ) /* sprites */
+ ROM_LOAD16_BYTE( "dd.n2", 0x000001, 0x40000, CRC(5328150f) SHA1(bb847a2ff7e5ac668e974d2853519d86feb81e03) )
+ ROM_LOAD16_BYTE( "dd.m1", 0x080000, 0x40000, CRC(80776452) SHA1(319bfc90ccf04b9e5aaac5701767d3f7bbb71626) )
+ ROM_LOAD16_BYTE( "dd.m2", 0x080001, 0x40000, CRC(ff61a573) SHA1(cfbe6c017c276d2fc1f083013b5df3686381753b) )
+ ROM_LOAD16_BYTE( "dd.e1", 0x100000, 0x40000, CRC(84a0b87c) SHA1(62075128093f21ee6ea09cc2d4bc8e630b275fce) )
+ ROM_LOAD16_BYTE( "dd.e2", 0x100001, 0x40000, CRC(a9585df2) SHA1(2eeac27dd018dd334447d539fdae2989c731e764) )
+ ROM_LOAD16_BYTE( "dd.f1", 0x180000, 0x40000, CRC(9aed24ba) SHA1(0068b5bc0d7c817eee3bfbf7de6d19652ba78d41) )
+ ROM_LOAD16_BYTE( "dd.f2", 0x180001, 0x40000, CRC(3eb5783f) SHA1(5487ceb4f3241241af1a81b1bb686bd3af10b0d1) )
+
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_LOAD( "7.x10", 0x000000, 0x10000, CRC(9cbc7b41) SHA1(107c19d3d71ee6af63d03f7278310c5e3786f91d) )
+ROM_END
+
+ROM_START( dyndukeja )
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
+ ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
+ ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
+ ROM_LOAD16_BYTE( "3.e8", 0x0c0000, 0x20000, CRC(2f06ddce) SHA1(b1f8dfb0af6749cdcbca450463c8e70f14278691) ) // Japan 25JUL89
+ ROM_LOAD16_BYTE( "4j.e7", 0x0c0001, 0x20000, CRC(63092078) SHA1(2810d41868340ca0f10ac64499545652841a7c1e) ) // Japan 25JUL89
+
+ ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
+ ROM_LOAD16_BYTE( "5.p8", 0x0e0000, 0x10000, CRC(883d319c) SHA1(b0df05bfe342a5289a6368be26317fa879975463) )
+ ROM_LOAD16_BYTE( "6.p7", 0x0e0001, 0x10000, CRC(d94cb4ff) SHA1(653247c420a2af037106470556e6801b29bc58e8) )
+
+ ROM_REGION( 0x20000*2, "audiocpu", 0 ) /* sound Z80 */
+ ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -510,16 +558,16 @@ ROM_START( dyndukeu )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "dd3.ef8", 0x0c0000, 0x20000, CRC(a56f8692) SHA1(00d86c660efae30c008f8220fdfd397b7d69b2cd) )
- ROM_LOAD16_BYTE( "dd4.ef7", 0x0c0001, 0x20000, CRC(ee4b87b3) SHA1(8e470543bce07cd8682f3745e15c4f1141d9549b) )
+ ROM_LOAD16_BYTE( "dd3.ef8", 0x0c0000, 0x20000, CRC(a56f8692) SHA1(00d86c660efae30c008f8220fdfd397b7d69b2cd) ) // US 25JUL89
+ ROM_LOAD16_BYTE( "dd4.ef7", 0x0c0001, 0x20000, CRC(ee4b87b3) SHA1(8e470543bce07cd8682f3745e15c4f1141d9549b) ) // US 25JUL89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5.p8", 0x0e0000, 0x10000, CRC(883d319c) SHA1(b0df05bfe342a5289a6368be26317fa879975463) )
ROM_LOAD16_BYTE( "6.p7", 0x0e0001, 0x10000, CRC(d94cb4ff) SHA1(653247c420a2af037106470556e6801b29bc58e8) )
ROM_REGION( 0x20000*2, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8.w8", 0x000000, 0x08000, CRC(3c29480b) SHA1(031a0b808df32b5ae4f722c9e9f69554d30505c1) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -558,16 +606,16 @@ ROM_START( dbldynj )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "3x.e8", 0x0c0000, 0x20000, CRC(633db1fe) SHA1(b8d67c3eedaf72a0d85eff878595af212f1246eb) )
- ROM_LOAD16_BYTE( "4x.e7", 0x0c0001, 0x20000, CRC(dc9ee263) SHA1(786bf36e21d9328662916181ec4b13cce8e14f24) )
+ ROM_LOAD16_BYTE( "3x.e8", 0x0c0000, 0x20000, CRC(633db1fe) SHA1(b8d67c3eedaf72a0d85eff878595af212f1246eb) ) // Japan 13NOV89
+ ROM_LOAD16_BYTE( "4x.e7", 0x0c0001, 0x20000, CRC(dc9ee263) SHA1(786bf36e21d9328662916181ec4b13cce8e14f24) ) // Japan 13NOV89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5x.p8", 0x0e0000, 0x10000, CRC(ea56d719) SHA1(6cade731316c280ef4e809aa700fdbaaabff41d0) )
ROM_LOAD16_BYTE( "6x.p7", 0x0e0001, 0x10000, CRC(9ffa0ecd) SHA1(a22c46312ab247cd824dadf840cf1f2b0305bb29) )
ROM_REGION( 0x20000, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8x.w8", 0x000000, 0x08000, CRC(f4066081) SHA1(0e5246f4f5513be11e6ed3ea26aada7e0a17a448) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8x.w8", 0x000000, 0x08000, CRC(f4066081) SHA1(0e5246f4f5513be11e6ed3ea26aada7e0a17a448) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -606,16 +654,16 @@ ROM_START( dbldynu )
ROM_REGION( 0x100000, "maincpu", 0 ) /* v30 main cpu */
ROM_LOAD16_BYTE( "1.cd8", 0x0a0000, 0x10000, CRC(a5e2a95a) SHA1(135d57073d826b9cf46fb43dc49439e1400fb021) )
ROM_LOAD16_BYTE( "2.cd7", 0x0a0001, 0x10000, CRC(7e51af22) SHA1(b26103c0d41c469d1e2d1e4e89f591c0d9cdb67c) )
- ROM_LOAD16_BYTE( "dd3x.8e", 0x0c0000, 0x20000, CRC(9b785028) SHA1(d94c41f9f8969c0effc05d5d6c44474a396a8177) )
- ROM_LOAD16_BYTE( "dd4x.7e", 0x0c0001, 0x20000, CRC(0d0f6350) SHA1(d289bd9ac308ba1079d5b8931cc913fd326129d3) )
+ ROM_LOAD16_BYTE( "dd3x.8e", 0x0c0000, 0x20000, CRC(9b785028) SHA1(d94c41f9f8969c0effc05d5d6c44474a396a8177) ) // US 13NOV89
+ ROM_LOAD16_BYTE( "dd4x.7e", 0x0c0001, 0x20000, CRC(0d0f6350) SHA1(d289bd9ac308ba1079d5b8931cc913fd326129d3) ) // US 13NOV89
ROM_REGION( 0x100000, "slave", 0 ) /* v30 sub cpu */
ROM_LOAD16_BYTE( "5x.p8", 0x0e0000, 0x10000, CRC(ea56d719) SHA1(6cade731316c280ef4e809aa700fdbaaabff41d0) )
ROM_LOAD16_BYTE( "6x.p7", 0x0e0001, 0x10000, CRC(9ffa0ecd) SHA1(a22c46312ab247cd824dadf840cf1f2b0305bb29) )
ROM_REGION( 0x20000, "audiocpu", 0 ) /* sound Z80 */
- ROM_LOAD( "8x.w8", 0x000000, 0x08000, CRC(f4066081) SHA1(0e5246f4f5513be11e6ed3ea26aada7e0a17a448) )
- ROM_CONTINUE( 0x010000, 0x08000 )
+ ROM_LOAD( "8x.w8", 0x000000, 0x08000, CRC(f4066081) SHA1(0e5246f4f5513be11e6ed3ea26aada7e0a17a448) )
+ ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0x000000, 0x018000, 0x08000 )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -653,9 +701,10 @@ ROM_END
/* Game Drivers */
-GAME( 1989, dynduke, 0, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Europe set 1 03SEP89)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, dyndukea, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Europe set 2 25JUL89)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, dyndukej, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Japan 03SEP89)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, dyndukeu, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu (Fabtek license)", "Dynamite Duke (US 25JUL89)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, dbldynj, 0, dbldyn, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "The Double Dynamites (Japan 13NOV89)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, dbldynu, dbldynj, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu (Fabtek license)", "The Double Dynamites (US 13NOV89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dynduke, 0, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Europe, 03SEP89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dyndukea, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Europe, 25JUL89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dyndukej, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Japan, 03SEP89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dyndukeja, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "Dynamite Duke (Japan, 25JUL89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dyndukeu, dynduke, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu (Fabtek license)", "Dynamite Duke (US, 25JUL89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dbldynj, 0, dbldyn, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu", "The Double Dynamites (Japan, 13NOV89)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, dbldynu, dbldynj, dynduke, dynduke, driver_device, 0, ROT0, "Seibu Kaihatsu (Fabtek license)", "The Double Dynamites (US, 13NOV89)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/epos.cpp b/src/mame/drivers/epos.cpp
index 2ed9fe277e0..70844a39775 100644
--- a/src/mame/drivers/epos.cpp
+++ b/src/mame/drivers/epos.cpp
@@ -28,8 +28,6 @@
halfs of the palette are identical, this is not an issue. See $039c.
The other games have a different color test, not using the busy loop.
- - Find out how Beastie Feastie's 2nd player inputs work.
-
- Fix flip screen support for The Dealer and Beastie Feastie.
***************************************************************************/
@@ -101,6 +99,18 @@ static ADDRESS_MAP_START( dealer_io_map, AS_IO, 8, epos_state )
AM_RANGE(0x40, 0x40) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
ADDRESS_MAP_END
+READ8_MEMBER(epos_state::read_prta)
+{
+ uint8_t data = 0xff;
+
+ if (!BIT(m_input_multiplex, 0))
+ data &= m_inputs[0]->read();
+
+ if (!BIT(m_input_multiplex, 1))
+ data &= m_inputs[1]->read();
+
+ return data;
+}
/*
ROMs U01-U03 are checked with the same code in a loop.
@@ -110,6 +120,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(epos_state::write_prtc)
{
membank("bank2")->set_entry(data & 0x01);
+ m_input_multiplex = (data >> 5) & 3;
}
/*************************************
@@ -343,13 +354,23 @@ static INPUT_PORTS_START( dealer )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("INPUTS")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) //cancel
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) //draw
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) //stand
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) //play
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) //coin in
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
+
+ PORT_START("INPUTS2")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_CANCEL )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME( "Draw" )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME( "Play" )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE )
INPUT_PORTS_END
@@ -363,7 +384,16 @@ static INPUT_PORTS_START( beastf )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
+
+ PORT_MODIFY("INPUTS2")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
INPUT_PORTS_END
/*************************************
@@ -376,12 +406,14 @@ MACHINE_START_MEMBER(epos_state,epos)
{
save_item(NAME(m_palette));
save_item(NAME(m_counter));
+ save_item(NAME(m_input_multiplex));
}
void epos_state::machine_reset()
{
m_palette = 0;
m_counter = 0;
+ m_input_multiplex = 3;
}
@@ -431,7 +463,7 @@ static MACHINE_CONFIG_START( dealer, epos_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", epos_state, irq0_line_hold)
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)
- MCFG_I8255_IN_PORTA_CB(IOPORT("INPUTS"))
+ MCFG_I8255_IN_PORTA_CB(READ8(epos_state, read_prta))
MCFG_I8255_OUT_PORTC_CB(WRITE8(epos_state, write_prtc))
MCFG_MACHINE_START_OVERRIDE(epos_state,dealer)
diff --git a/src/mame/drivers/ertictac.cpp b/src/mame/drivers/ertictac.cpp
index f0c0c2c0d68..2d71557c854 100644
--- a/src/mame/drivers/ertictac.cpp
+++ b/src/mame/drivers/ertictac.cpp
@@ -105,7 +105,7 @@ static INPUT_PORTS_START( ertictac )
PORT_DIPNAME( 0x04, 0x04, "Test Mode" ) PORT_DIPLOCATION("DSW1:1")
PORT_DIPSETTING( 0x04, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x08, 0x00, "Music" ) PORT_DIPLOCATION("DSW1:4")
+ PORT_DIPNAME( 0x08, 0x08, "Music" ) PORT_DIPLOCATION("DSW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x08, DEF_STR( Yes ) )
PORT_DIPNAME( 0x30, 0x30, "Game Timing" ) PORT_DIPLOCATION("DSW1:5,6")
@@ -228,10 +228,7 @@ static MACHINE_CONFIG_START( ertictac, ertictac_state )
// MCFG_AAKART_ADD("kart", XTAL_24MHz/3) // TODO: frequency
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
- MCFG_SCREEN_SIZE(1280, 1024)
- MCFG_SCREEN_VISIBLE_AREA(0, 1280-1, 0, 1024-1)
+ MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz,1024,0,735,624/2,0,292) // RiscOS 3 default screen settings
MCFG_SCREEN_UPDATE_DRIVER(archimedes_state, screen_update)
MCFG_PALETTE_ADD("palette", 0x200)
diff --git a/src/mame/drivers/esq5505.cpp b/src/mame/drivers/esq5505.cpp
index 0dcd32508cd..a1703e291f3 100644
--- a/src/mame/drivers/esq5505.cpp
+++ b/src/mame/drivers/esq5505.cpp
@@ -925,16 +925,16 @@ ROM_END
ROM_START( sq2 )
ROM_REGION(0x40000, "osrom", 0)
- ROM_LOAD16_BYTE( "sq232_2.03_9193_lower.u27", 0x000000, 0x010000, CRC(e37fbc2c) SHA1(4a74f3540756745073c8768b384905db03da47c0) )
- ROM_LOAD16_BYTE( "sq232_2.03_cbcd_upper.u32", 0x000001, 0x020000, CRC(5a7dc228) SHA1(d25adecc0dbba93a094c49fae105dcc7aad317f1) )
+ ROM_LOAD16_BYTE( "sq232_2.03_9193_lower.u27", 0x000000, 0x010000, CRC(e37fbc2c) SHA1(4a74f3540756745073c8768b384905db03da47c0) )
+ ROM_LOAD16_BYTE( "sq232_2.03_cbcd_upper.u32", 0x000001, 0x020000, CRC(5a7dc228) SHA1(d25adecc0dbba93a094c49fae105dcc7aad317f1) )
ROM_REGION(0x200000, "waverom", 0)
ROM_LOAD16_BYTE( "sq1-u25.bin", 0x000001, 0x080000, CRC(26312451) SHA1(9f947a11592fd8420fc581914bf16e7ade75390c) )
ROM_LOAD16_BYTE( "sq1-u26.bin", 0x100001, 0x080000, CRC(2edaa9dc) SHA1(72fead505c4f44e5736ff7d545d72dfa37d613e2) )
ROM_REGION(0x200000, "waverom2", ROMREGION_ERASE00) // BS=1 region (16-bit)
- ROM_LOAD( "rom2.u39", 0x000000, 0x100000, CRC(8d1b5e91) SHA1(12991083a6c574133a1a799813fa4573a33d2297) )
- ROM_LOAD( "rom3.u38", 0x100000, 0x100000, CRC(cb9875ce) SHA1(82021bdc34953e9be97d45746a813d7882250ae0) )
+ ROM_LOAD( "rom2.u39", 0x000000, 0x100000, CRC(8d1b5e91) SHA1(12991083a6c574133a1a799813fa4573a33d2297) )
+ ROM_LOAD( "rom3.u38", 0x100000, 0x100000, CRC(cb9875ce) SHA1(82021bdc34953e9be97d45746a813d7882250ae0) )
ROM_REGION(0x80000, "nibbles", ROMREGION_ERASE00)
ROM_END
diff --git a/src/mame/drivers/fccpu20.cpp b/src/mame/drivers/fccpu20.cpp
new file mode 100644
index 00000000000..07496323f33
--- /dev/null
+++ b/src/mame/drivers/fccpu20.cpp
@@ -0,0 +1,287 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/***************************************************************************
+ *
+ * Force SYS68K CPU-20 VME SBC drivers
+ *
+ * 24/12/2016
+ *
+ * Thanks to Al Kossow and his site http://www.bitsavers.org/ I got the information
+ * required to start the work with this driver.
+ *
+ *
+ * ||
+ * || || CPU-20
+ * ||||--||_____________________________________________________________
+ * ||||--|| |
+ * || || _ |__
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | |VME|
+ * || | | |
+ * || | |P1 |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || |_| |
+ * || |___|
+ * || |
+ * || |
+ * || |
+ * || |
+ * || |
+ * || |
+ * || |
+ * || |
+ * || |___
+ * || _| |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | |VME|
+ * || | | |
+ * || | |P2 |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || | | |
+ * || |_| |
+ * || |___|
+ * || || +
+ * ||||--|| |
+ * ||||--||--------------------------------------------------------------+
+ * ||
+ *
+ * History of Force Computers
+ *---------------------------
+ *
+ * Misc links about Force Computes and this board:
+ *------------------------------------------------
+ * http://bitsavers.trailing-edge.com/pdf/forceComputers/
+ *
+ * Description(s)
+ * -------------
+ * CPU-20 has the following feature set
+ *
+ * Address Map
+ * --------------------------------------------------------------------------
+ * Range Decscription
+ * --------------------------------------------------------------------------
+ * 00000000-0xxFFFFF Shared DRAM D8-D32
+ * 0yy00000-FAFFFFFF VME A32 D8-D32 yy=xx+1
+ * FB000000-FBFEFFFF VME A24 D8-D32
+ * FBFF0000-FBFFFFFF VME A16 D8-D32
+ * FC000000-FCFEFFFF VME A24 D8-D16
+ * FCFF0000-FCFFFFFF VME A16 D8-D16
+ * .... TBC
+ * --------------------------------------------------------------------------
+ *
+ * PIT #1 hardware wiring
+ * ----------------------------------------------------------
+ * PA0-PA3 TBC
+ * PA4-PA7
+ * H1-H4
+ * PB0-PB2
+ * PB3-PB4
+ * PB5
+ * PB6-PB7
+ * PC0,PC1
+ * PC4,PC7
+ * PC2
+ * PC3
+ * PC5
+ * PC6
+ *
+ * PIT #2 hardware setup wiring
+ * ----------------------------------------------------------
+ * PA0-PA7 TBC
+ * H1-H4
+ * PB0-PB2
+ * PB3-PB7
+ * PC0-PC1
+ * PC2
+ * PC3
+ * PC4
+ * PC5
+ * PC6
+ * PC7
+ *
+ *---------------------------------------------------------------------------
+ * TODO:
+ * - Find accurate documentation and adjust memory map
+ * - Add layouts and system description(s)
+ * - Write & add 68561 UART
+ * - Write & add VME device
+ * - Write & add 68153 BIM
+ * - Add 68230 PIT
+ * - Add variants of boards in the CPU-20 and CPU-21 family
+ * - Add FGA, DUSCC devices and CPU-22 variants
+ *
+ ****************************************************************************/
+
+#include "emu.h"
+#include "cpu/m68000/m68000.h"
+#include "bus/rs232/rs232.h"
+#include "machine/clock.h"
+
+#define LOG_GENERAL 0x01
+#define LOG_SETUP 0x02
+#define LOG_PRINTF 0x04
+
+#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+
+#if VERBOSE & LOG_PRINTF
+#define logerror printf
+#endif
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+class cpu20_state : public driver_device
+{
+public:
+cpu20_state(const machine_config &mconfig, device_type type, const char *tag)
+ : driver_device (mconfig, type, tag)
+ , m_maincpu (*this, "maincpu")
+ {
+ }
+ DECLARE_READ32_MEMBER (bootvect_r);
+ DECLARE_WRITE32_MEMBER (bootvect_w);
+ virtual void machine_start () override;
+ virtual void machine_reset () override;
+
+private:
+ required_device<m68000_base_device> m_maincpu;
+ // Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
+ uint32_t *m_sysrom;
+ uint32_t m_sysram[2];
+};
+
+static ADDRESS_MAP_START (cpu20_mem, AS_PROGRAM, 32, cpu20_state)
+ ADDRESS_MAP_UNMAP_HIGH
+ AM_RANGE (0x00000000, 0x00000007) AM_ROM AM_READ (bootvect_r) /* ROM mirror just during reset */
+ AM_RANGE (0x00000000, 0x00000007) AM_RAM AM_WRITE (bootvect_w) /* After first write we act as RAM */
+ AM_RANGE (0x00000008, 0x003fffff) AM_RAM /* RAM installed in machine start */
+ AM_RANGE (0xff040000, 0xff04ffff) AM_RAM /* RAM installed in machine start */
+ AM_RANGE (0xff000000, 0xff00ffff) AM_ROM AM_REGION("roms", 0x0000)
+ADDRESS_MAP_END
+
+/* Input ports */
+static INPUT_PORTS_START (cpu20)
+INPUT_PORTS_END
+
+/* Start it up */
+void cpu20_state::machine_start ()
+{
+ LOGSETUP("%s\n", FUNCNAME);
+
+ save_pointer (NAME (m_sysrom), sizeof(m_sysrom));
+ save_pointer (NAME (m_sysram), sizeof(m_sysram));
+
+ /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
+ m_sysrom = (uint32_t*)(memregion ("roms")->base());
+}
+
+void cpu20_state::machine_reset ()
+{
+ LOGSETUP("%s\n", FUNCNAME);
+
+ /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */
+ if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */
+ m_sysrom = (uint32_t*)(memregion ("roms")->base());
+}
+
+#if 0
+/* setup board ID */
+DRIVER_INIT_MEMBER( cpu20_state, cpu20x ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20xa ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20za ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20zbe ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20be8 ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20be16 ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20lite4 ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu20lite8 ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x50; }
+DRIVER_INIT_MEMBER( cpu20_state, cpu33 ) { LOGSETUP("%s\n", FUNCNAME); m_board_id = 0x68; } // 0x60 skips FGA prompt
+#endif
+
+/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset*/
+READ32_MEMBER (cpu20_state::bootvect_r){
+ LOG("%s\n", FUNCNAME);
+ return m_sysrom[offset];
+}
+
+WRITE32_MEMBER (cpu20_state::bootvect_w){
+ LOG("%s\n", FUNCNAME);
+ m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
+ m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
+ m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
+}
+
+#if 0
+void cpu20_state::update_irq_to_maincpu()
+{
+ LOGINT(("%s()\n", FUNCNAME);
+ LOGINT((" - fga_irq_level: %02x\n", fga_irq_level));
+ LOGINT((" - fga_irq_state: %02x\n", fga_irq_state));
+ switch (fga_irq_level & 0x07)
+ {
+ case 1: m_maincpu->set_input_line(M68K_IRQ_1, fga_irq_state); break;
+ case 2: m_maincpu->set_input_line(M68K_IRQ_2, fga_irq_state); break;
+ case 3: m_maincpu->set_input_line(M68K_IRQ_3, fga_irq_state); break;
+ case 4: m_maincpu->set_input_line(M68K_IRQ_4, fga_irq_state); break;
+ case 5: m_maincpu->set_input_line(M68K_IRQ_5, fga_irq_state); break;
+ case 6: m_maincpu->set_input_line(M68K_IRQ_6, fga_irq_state); break;
+ case 7: m_maincpu->set_input_line(M68K_IRQ_7, fga_irq_state); break;
+ default: logerror("Programmatic error in %s, please report\n", FUNCNAME);
+ }
+}
+#endif
+
+/*
+ * Machine configuration
+ */
+static MACHINE_CONFIG_START (cpu20, cpu20_state)
+ /* basic machine hardware */
+ MCFG_CPU_ADD ("maincpu", M68020, XTAL_16MHz) /* Crytstal not verified */
+ MCFG_CPU_PROGRAM_MAP (cpu20_mem)
+MACHINE_CONFIG_END
+
+/* ROM definitions */
+ROM_START (fccpu20) /* This is an original rom dump */
+ ROM_REGION32_BE(0x10000, "roms", 0)
+// Boots with Board ID set to: 0x36 (FGA002 BOOT on terminal P4, "Wait until harddisk is up to speed " on terminal P1)
+ ROM_LOAD32_BYTE("L.BIN", 0x000002, 0x4000, CRC (174ab801) SHA1 (0d7b8ed29d5fdd4bd2073005008120c5f20128dd))
+ ROM_LOAD32_BYTE("LL.BIN", 0x000003, 0x4000, CRC (9fd9e3e4) SHA1 (e5a7c87021e6be412dd5a8166d9f62b681169eda))
+ ROM_LOAD32_BYTE("U.BIN", 0x000001, 0x4000, CRC (d1afe4c0) SHA1 (b5baf9798d73632f7bb843cbc4b306c8c03f4296))
+ ROM_LOAD32_BYTE("UU.BIN", 0x000000, 0x4000, CRC (b54d623b) SHA1 (49b272184a04570b09004de71fae0ed0d1bf5929))
+ROM_END
+
+/*
+ * System ROM information
+ *
+ * xxxxxxx bootprom version xxx is released mmm dd, yyyy, coprighted by FORCE Computers Gmbh
+ */
+/* Driver */
+/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
+COMP (1986, fccpu20, 0, 0, cpu20, cpu20, driver_device, 0, "Force Computers Gmbh", "SYS68K/CPU-20", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER )
diff --git a/src/mame/drivers/fccpu30.cpp b/src/mame/drivers/fccpu30.cpp
index 1812a500fdb..f07e9e0a5b9 100644
--- a/src/mame/drivers/fccpu30.cpp
+++ b/src/mame/drivers/fccpu30.cpp
@@ -699,7 +699,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(cpu30_state, flop_dmac_w))
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit1c_r))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit1c_w))
-// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
+// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
MCFG_DEVICE_ADD ("pit2", PIT68230, XTAL_16MHz / 2) // Th PIT clock is not verified on schema but reversed from behaviour
MCFG_PIT68230_PB_INPUT_CB(READ8(cpu30_state, board_mem_id_rd))
@@ -707,7 +707,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
MCFG_PIT68230_PA_OUTPUT_CB(WRITE8(cpu30_state, pit2a_w))
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit2c_r))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit2c_w))
-// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
+// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
/* FGA-002, Force Gate Array */
MCFG_FGA002_ADD("fga002", 0)
diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp
index 9fae822558c..46f28ec73e8 100644
--- a/src/mame/drivers/fidel68k.cpp
+++ b/src/mame/drivers/fidel68k.cpp
@@ -12,7 +12,6 @@
TODO:
- how does dual-CPU work?
- - EAG IRQ level/timing is unknown
- USART is not emulated
- V9(68030 @ 32MHz) is faster than V10(68040 @ 25MHz) but it should be the other
way around, culprit is unemulated cache?
@@ -51,15 +50,15 @@ V6-V11 are on model 6117. Older 1986 model 6081/6088/6089 uses a 6502 CPU.
Hardware info:
--------------
- MC68HC000P12F 16MHz CPU, 16MHz XTAL
-- MB1422A DRAM Controller, 25MHz XTAL near, 4 DRAM slots(V2: slot 1 and 2 64KB)
+- MB1422A DRAM Controller, 25MHz XTAL near, 4 DRAM slots
+ (V2: slot 2 & 3 64KB, V3: slot 2 & 3 256KB)
- 2*27C512 64KB EPROM, 2*KM6264AL-10 8KB SRAM, 2*AT28C64X 8KB EEPROM
- OKI M82C51A-2 USART, 4.9152MHz XTAL
- other special: magnet sensors, external module slot, serial port
-IRQ source is unknown. Several possibilities:
-- NE555 timer IC
-- MM/SN74HC4060 binary counter IC (near the M82C51A)
-- one of the XTALs, plus divider of course
+IRQ source is a 4,9152MHz quartz crystal (Y3) connected to a 74HC4060 (U8,
+ripple counter/divider). From Q12 output (counter=8192) we obtain the IRQ signal
+applied to IPL1 of 68000 (pin 24) 4,9152 MHz / 8192 = 600 Hz.
The module slot pinout is different from SCC series. The data on those appears
to be compatible with EAG though and will load fine with an adapter.
@@ -157,6 +156,7 @@ B0000x-xxxxxx: see V7, -800000
#include "emu.h"
#include "includes/fidelz80.h"
#include "cpu/m68000/m68000.h"
+#include "machine/ram.h"
#include "machine/nvram.h"
#include "sound/volt_reg.h"
@@ -169,9 +169,12 @@ class fidel68k_state : public fidelz80base_state
{
public:
fidel68k_state(const machine_config &mconfig, device_type type, const char *tag)
- : fidelz80base_state(mconfig, type, tag)
+ : fidelz80base_state(mconfig, type, tag),
+ m_ram(*this, "ram")
{ }
+ optional_device<ram_device> m_ram;
+
TIMER_DEVICE_CALLBACK_MEMBER(irq_on) { m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE); }
TIMER_DEVICE_CALLBACK_MEMBER(irq_off) { m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE); }
@@ -179,6 +182,7 @@ public:
DECLARE_WRITE8_MEMBER(fexcel68k_mux_w);
// EAG(6114/6117)
+ DECLARE_DRIVER_INIT(eag);
void eag_prepare_display();
DECLARE_READ8_MEMBER(eag_input1_r);
DECLARE_WRITE8_MEMBER(eag_leds_w);
@@ -288,10 +292,15 @@ ADDRESS_MAP_END
// EAG
+DRIVER_INIT_MEMBER(fidel68k_state, eag)
+{
+ // eag_map: DRAM slots at $200000-$2fffff - V1/V2: 128K, V3: 512K, V4: 1M
+ m_maincpu->space(AS_PROGRAM).install_ram(0x200000, 0x200000 + m_ram->size() - 1, m_ram->pointer());
+}
+
static ADDRESS_MAP_START( eag_map, AS_PROGRAM, 16, fidel68k_state )
AM_RANGE(0x000000, 0x01ffff) AM_ROM
AM_RANGE(0x104000, 0x107fff) AM_RAM
- AM_RANGE(0x200000, 0x2fffff) AM_RAM // DRAM slots
AM_RANGE(0x300000, 0x30000f) AM_MIRROR(0x000010) AM_READWRITE8(eag_input1_r, eag_leds_w, 0x00ff)
AM_RANGE(0x300000, 0x30000f) AM_MIRROR(0x000010) AM_WRITE8(eag_7seg_w, 0xff00) AM_READNOP
AM_RANGE(0x400000, 0x407fff) AM_READ8(eag_cart_r, 0xff00)
@@ -567,13 +576,17 @@ static MACHINE_CONFIG_START( eag, fidel68k_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz)
MCFG_CPU_PROGRAM_MAP(eag_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600) // complete guess
+ MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, XTAL_4_9152MHz/0x2000) // 600hz
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelz80base_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_fidel_eag_68k)
+ MCFG_RAM_ADD("ram")
+ MCFG_RAM_DEFAULT_SIZE("1M")
+ MCFG_RAM_EXTRA_OPTIONS("128K, 512K, 1M")
+
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_SOUND_ADD("dac", DAC_1BIT, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25)
@@ -592,31 +605,33 @@ static MACHINE_CONFIG_DERIVED( eagv7, eag )
/* basic machine hardware */
MCFG_CPU_REPLACE("maincpu", M68020, XTAL_20MHz)
MCFG_CPU_PROGRAM_MAP(eagv7_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600) // complete guess
+ MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, XTAL_4_9152MHz/0x2000) // 600hz
+
+ MCFG_RAM_REMOVE("ram")
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( eagv9, eag )
+static MACHINE_CONFIG_DERIVED( eagv9, eagv7 )
/* basic machine hardware */
MCFG_CPU_REPLACE("maincpu", M68030, XTAL_32MHz)
MCFG_CPU_PROGRAM_MAP(eagv7_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600) // complete guess
+ MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, XTAL_4_9152MHz/0x2000) // 600hz
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( eagv10, eag )
+static MACHINE_CONFIG_DERIVED( eagv10, eagv7 )
/* basic machine hardware */
MCFG_CPU_REPLACE("maincpu", M68040, XTAL_25MHz)
MCFG_CPU_PROGRAM_MAP(eagv11_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600) // complete guess
+ MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, XTAL_4_9152MHz/0x2000) // 600hz
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( eagv11, eag )
+static MACHINE_CONFIG_DERIVED( eagv11, eagv7 )
/* basic machine hardware */
MCFG_CPU_REPLACE("maincpu", M68EC040, XTAL_36MHz*2*2) // wrong! should be M68EC060 @ 72MHz
MCFG_CPU_PROGRAM_MAP(eagv11_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600) // complete guess
+ MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, XTAL_4_9152MHz/0x2000) // 600hz
MACHINE_CONFIG_END
@@ -632,10 +647,16 @@ ROM_START( fexcel68k ) // model 6094, PCB label 510.1120B01
ROM_END
-ROM_START( feagv2 )
+ROM_START( feagv2 ) // from a V2 board
+ ROM_REGION16_BE( 0x20000, "maincpu", 0 )
+ ROM_LOAD16_BYTE("6114_e5_yellow.u22", 0x00000, 0x10000, CRC(f9c7bada) SHA1(60e545f829121b9a4f1100d9e85ac83797715e80) ) // 27c512
+ ROM_LOAD16_BYTE("6114_o5_green.u19", 0x00001, 0x10000, CRC(04f97b22) SHA1(8b2845dd115498f7b385e8948eca6a5893c223d1) ) // "
+ROM_END
+
+ROM_START( feagv2a ) // from a V3 board
ROM_REGION16_BE( 0x20000, "maincpu", 0 )
- ROM_LOAD16_BYTE("6114_e5.u18", 0x00000, 0x10000, CRC(f9c7bada) SHA1(60e545f829121b9a4f1100d9e85ac83797715e80) ) // 27c512
- ROM_LOAD16_BYTE("6114_o5.u19", 0x00001, 0x10000, CRC(04f97b22) SHA1(8b2845dd115498f7b385e8948eca6a5893c223d1) ) // "
+ ROM_LOAD16_BYTE("elite_1.6_e.u22", 0x00000, 0x10000, CRC(c8b89ccc) SHA1(d62e0a72f54b793ab8853468a81255b62f874658) )
+ ROM_LOAD16_BYTE("elite_1.6_o.u19", 0x00001, 0x10000, CRC(904c7061) SHA1(742110576cf673321440bc81a4dae4c949b49e38) )
ROM_END
ROM_START( feagv7 )
@@ -666,11 +687,12 @@ ROM_END
Drivers
******************************************************************************/
-/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */
-CONS( 1987, fexcel68k, 0, 0, fexcel68k, fexcel68k, driver_device, 0, "Fidelity Electronics", "Excel 68000", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */
+CONS( 1987, fexcel68k, 0, 0, fexcel68k, fexcel68k, driver_device, 0, "Fidelity Electronics", "Excel 68000", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1989, feagv2, 0, 0, eag, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1990, feagv7, feagv2, 0, eagv7, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1990, feagv9, feagv2, 0, eagv9, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-9)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1990, feagv10, feagv2, 0, eagv10, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-10)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 2002, feagv11, feagv2, 0, eagv11, eag, driver_device, 0, "hack (Wilfried Bucke)", "Elite Avant Garde (model 6117-11)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1989, feagv2, 0, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1989, feagv2a, feagv2, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1990, feagv7, feagv2, 0, eagv7, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1990, feagv9, feagv2, 0, eagv9, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-9)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1990, feagv10, feagv2, 0, eagv10, eag, driver_device, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-10)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 2002, feagv11, feagv2, 0, eagv11, eag, driver_device, 0, "hack (Wilfried Bucke)", "Elite Avant Garde (model 6117-11)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/drivers/fromance.cpp b/src/mame/drivers/fromance.cpp
index d36ea891740..758d9b36602 100644
--- a/src/mame/drivers/fromance.cpp
+++ b/src/mame/drivers/fromance.cpp
@@ -37,7 +37,9 @@ Memo:
- 2player's input is not supported.
-- Identify CRT Controller and fix layer misalignment in nekkyoku.
+- Identify CRT Controller and fix layer misalignment in nekkyoku due of dynamic
+ changes. Actually same custom component as other V-System games of the era,
+ @seealso aerofgt.cpp
- nekkyoku: soft reset enables flip screen without any real reason.
@@ -734,7 +736,7 @@ static INPUT_PORTS_START( daiyogen )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW1:!2,!3")
PORT_DIPSETTING( 0x00, "1,000" )
- PORT_DIPSETTING( 0x04, "1,500" )
+ PORT_DIPSETTING( 0x04, "1,500" )
PORT_DIPSETTING( 0x02, "2,000" )
PORT_DIPSETTING( 0x06, "3,000" )
PORT_DIPNAME( 0x18, 0x00, "Computer Difficulty" ) PORT_DIPLOCATION("SW1:!4,!5")
@@ -890,7 +892,7 @@ MACHINE_START_MEMBER(fromance_state,fromance)
save_item(NAME(m_directionflag));
save_item(NAME(m_commanddata));
save_item(NAME(m_portselect));
-
+
save_item(NAME(m_adpcm_reset));
save_item(NAME(m_adpcm_data));
save_item(NAME(m_vclk_left));
@@ -1266,7 +1268,7 @@ ROM_END
*
*************************************/
-GAME( 1988, nekkyoku, 0, nekkyoku, nekkyoku, driver_device, 0, ROT0, "Video System Co.", "Rettou Juudan Nekkyoku Janshi - Higashi Nippon Hen (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, nekkyoku, 0, nekkyoku, nekkyoku, driver_device, 0, ROT0, "Video System Co.", "Rettou Juudan Nekkyoku Janshi - Higashi Nippon Hen (Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1988, idolmj, 0, idolmj, idolmj, driver_device, 0, ROT0, "System Service", "Idol-Mahjong Housoukyoku (Japan)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, mjnatsu, 0, fromance, mjnatsu, driver_device, 0, ROT0, "Video System Co.", "Mahjong Natsu Monogatari (Japan)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, natsuiro, mjnatsu, fromance, mjnatsu, driver_device, 0, ROT0, "Video System Co.", "Natsuiro Mahjong (Japan)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/gaelco.cpp b/src/mame/drivers/gaelco.cpp
index f054f669d4d..05e49b3370a 100644
--- a/src/mame/drivers/gaelco.cpp
+++ b/src/mame/drivers/gaelco.cpp
@@ -748,11 +748,10 @@ ROM_START( biomtoya ) /* PCB - REF 922804/2 */
ROM_LOAD( "j10", 0x300000, 0x040000, CRC(8e3e96cc) SHA1(761009f3f32b18139e98f20a22c433b6a49d9168) )
ROM_CONTINUE( 0x380000, 0x040000 )
- // using the same samples as the parent set causes bad sounds for most of the game
ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples - sound chip is OKIM6295 */
- ROM_LOAD( "c1", 0x000000, 0x080000, BAD_DUMP CRC(0f02de7e) SHA1(a8779370cc36290616794ff11eb3eebfdea5b1a9) )
+ ROM_LOAD( "c1", 0x000000, 0x080000, CRC(edf77532) SHA1(cf198b14c25e1b242a65af8ce23538404cd2b12d) )
/* 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs */
- ROM_LOAD( "c3", 0x080000, 0x080000, BAD_DUMP CRC(914e4bbc) SHA1(ca82b7481621a119f05992ed093b963da70d748a) )
+ ROM_LOAD( "c3", 0x080000, 0x080000, CRC(c3aea660) SHA1(639d4195391e2608e94759e8a4385b518872263a) )
ROM_END
diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp
index d71a07bc9b0..742be3ee011 100644
--- a/src/mame/drivers/galaxian.cpp
+++ b/src/mame/drivers/galaxian.cpp
@@ -8142,6 +8142,25 @@ ROM_START( uniwarsa )
ROM_LOAD( "kareteco.clr", 0x0000, 0x0020, CRC(6a0c7d87) SHA1(140335d85c67c75b65689d4e76d29863c209cf32) )
ROM_END
+ROM_START( mltiwars )
+ ROM_REGION( 0x4000, "maincpu", 0 )
+ ROM_LOAD( "g1.bin", 0x0000, 0x0800, CRC(d975af10) SHA1(a2e2a36a75db8fd09441308b08b6ae073c68b8cf) )
+ ROM_LOAD( "g2.bin", 0x0800, 0x0800, CRC(b2ed14c3) SHA1(7668df11f64b8e296eedfee53437777dc53a56d5) )
+ ROM_LOAD( "g3.bin", 0x1000, 0x0800, CRC(945f4160) SHA1(5fbe879f51e14c4c7ae551e5b3089f8e148770a4) )
+ ROM_LOAD( "g4.bin", 0x1800, 0x0800, CRC(ef28ec00) SHA1(f57fc2fd38b0ef7ee206f70f161a5f6963de1e94) )
+ ROM_LOAD( "g5.bin", 0x2000, 0x0800, CRC(855ab0dd) SHA1(50aae48726f092d1815f5534e041673bad2b50ac) )
+ ROM_LOAD( "g6.bin", 0x2800, 0x0800, CRC(d915a389) SHA1(0e2ff6eec9453856a1276889946b463cfae58eba) )
+ ROM_LOAD( "g7.bin", 0x3000, 0x0800, CRC(c9245346) SHA1(239bad3fe64eaab2dfc3febd06d1124103a10504) )
+ ROM_LOAD( "g8.bin", 0x3800, 0x0800, CRC(797d45c7) SHA1(76fb8b45fcce3622c59c04af32cfa001ef7bf71d) )
+
+ ROM_REGION( 0x2000, "gfx1", 0 )
+ ROM_LOAD( "g14.bin", 0x0000, 0x1000, CRC(227f9e8e) SHA1(6316ad92053b22df0d9621738507883c55003d3b) )
+ ROM_LOAD( "g15.bin", 0x1000, 0x1000, CRC(3f8b6a24) SHA1(00b8434c0de32af301137f9370f991e5e7192980) )
+
+ ROM_REGION( 0x0020, "proms", 0 )
+ ROM_LOAD( "prom.bin", 0x0000, 0x0020, CRC(6a0c7d87) SHA1(140335d85c67c75b65689d4e76d29863c209cf32) )
+ROM_END
+
ROM_START( spacempr )
ROM_REGION( 0x4000, "maincpu", 0 )
ROM_LOAD( "uw01", 0x0000, 0x0800, CRC(7c64fb92) SHA1(69f0923870cb8cbb7ae7a2a056c67a1da9b5588d) )
@@ -11621,6 +11640,7 @@ GAME( 19??, piscesb, pisces, galaxian, piscesb, galaxian_state, pisce
GAME( 19??, omni, pisces, galaxian, piscesb, galaxian_state, pisces, ROT90, "bootleg", "Omni", MACHINE_SUPPORTS_SAVE )
GAME( 1980, uniwars, 0, galaxian, superg, galaxian_state, pisces, ROT90, "Irem", "UniWar S", MACHINE_SUPPORTS_SAVE )
GAME( 1980, uniwarsa, uniwars, galaxian, superg, galaxian_state, pisces, ROT90, "bootleg (Karateco)", "UniWar S (bootleg)", MACHINE_SUPPORTS_SAVE )
+GAME( 1980, mltiwars, uniwars, galaxian, superg, galaxian_state, pisces, ROT90, "bootleg (Gayton Games)", "Multi Wars (bootleg of UniWar S)", MACHINE_SUPPORTS_SAVE )
GAME( 1980, gteikoku, uniwars, galaxian, superg, galaxian_state, pisces, ROT90, "Irem", "Gingateikoku No Gyakushu", MACHINE_SUPPORTS_SAVE )
GAME( 1980, gteikokb, uniwars, galaxian, gteikokb, galaxian_state, pisces, ROT270, "bootleg", "Gingateikoku No Gyakushu (bootleg set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1980, gteikob2, uniwars, galaxian, gteikob2, galaxian_state, pisces, ROT90, "bootleg", "Gingateikoku No Gyakushu (bootleg set 2)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/genpc.cpp b/src/mame/drivers/genpc.cpp
index 2b8bf334f84..af1adf7be39 100644
--- a/src/mame/drivers/genpc.cpp
+++ b/src/mame/drivers/genpc.cpp
@@ -8,9 +8,6 @@
***************************************************************************/
-
-
-
#include "emu.h"
#include "machine/genpc.h"
#include "cpu/nec/nec.h"
@@ -30,12 +27,7 @@ public:
static ADDRESS_MAP_START( pc8_map, AS_PROGRAM, 8, genpc_state )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0xf0000, 0xfffff) AM_ROM AM_REGION("bios", 0)
-ADDRESS_MAP_END
-
-static ADDRESS_MAP_START( pc16_map, AS_PROGRAM, 16, genpc_state )
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0xf0000, 0xfffff) AM_ROM AM_REGION("bios", 0)
+ AM_RANGE(0xfe000, 0xfffff) AM_ROM AM_REGION("bios", 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START(pc8_io, AS_IO, 8, genpc_state )
@@ -43,12 +35,6 @@ static ADDRESS_MAP_START(pc8_io, AS_IO, 8, genpc_state )
AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", ibm5160_mb_device, map)
ADDRESS_MAP_END
-static ADDRESS_MAP_START(pc16_io, AS_IO, 16, genpc_state )
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x00ff) AM_DEVICE8("mb", ibm5160_mb_device, map, 0xffff)
-ADDRESS_MAP_END
-
-
static DEVICE_INPUT_DEFAULTS_START(cga)
DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x20)
DEVICE_INPUT_DEFAULTS_END
@@ -59,7 +45,7 @@ DEVICE_INPUT_DEFAULTS_END
static MACHINE_CONFIG_START( pcmda, genpc_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", V20, 4772720)
+ MCFG_CPU_ADD("maincpu", I8088, 4772720)
MCFG_CPU_PROGRAM_MAP(pc8_map)
MCFG_CPU_IO_MAP(pc8_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mb:pic8259", pic8259_device, inta_cb)
@@ -74,7 +60,7 @@ static MACHINE_CONFIG_START( pcmda, genpc_state )
MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, nullptr, false)
/* keyboard */
- MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
+ MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_IBM_PC_XT_83)
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
@@ -93,10 +79,6 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( pccga, pcmda )
- MCFG_CPU_REPLACE("maincpu", I8086, 4772720)
- MCFG_CPU_PROGRAM_MAP(pc16_map)
- MCFG_CPU_IO_MAP(pc16_io)
- MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mb:pic8259", pic8259_device, inta_cb)
MCFG_DEVICE_MODIFY("mb")
MCFG_DEVICE_INPUT_DEFAULTS(cga)
MCFG_DEVICE_MODIFY("isa1")
@@ -112,64 +94,56 @@ static MACHINE_CONFIG_DERIVED( pcega, pccga )
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( xtvga, pcega )
+static MACHINE_CONFIG_DERIVED( pcvga, pcega )
MCFG_DEVICE_MODIFY("isa1")
- MCFG_DEVICE_SLOT_INTERFACE(pc_isa8_cards, "svga_et4k", false)
+ MCFG_DEVICE_SLOT_INTERFACE(pc_isa8_cards, "vga", false)
MACHINE_CONFIG_END
-
-ROM_START( pcmda )
- ROM_REGION(0x10000,"bios", 0)
- ROM_SYSTEM_BIOS(0, "anon", "XT Anonymous Generic Turbo BIOS")
- ROMX_LOAD("pcxt.rom", 0xe000, 0x02000, CRC(031aafad) SHA1(a641b505bbac97b8775f91fe9b83d9afdf4d038f),ROM_BIOS(1))
- ROM_SYSTEM_BIOS(1, "anon2007", "XT Anonymous Generic Turbo BIOS 2007")
- ROMX_LOAD( "pcxt2007.bin", 0xe000, 0x2000, CRC(1d7bd86c) SHA1(33a500f599b4dad2fe6d7a5c3e89b13bd5dd2987),ROM_BIOS(2))
- ROM_SYSTEM_BIOS(2, "ami", "XT AMI")
- ROMX_LOAD( "ami.bin", 0xe000, 0x2000, CRC(b381eb22) SHA1(9735193de119270c946a17ed58c3ab9554e0852e),ROM_BIOS(3))
- ROM_SYSTEM_BIOS(3, "award", "XT Award 2.05")
- ROMX_LOAD( "award2.05.bin", 0xe000, 0x2000, CRC(5b3953e5) SHA1(4a36171aa8d993008187f39f732b9296401b7b6c),ROM_BIOS(4))
- ROM_SYSTEM_BIOS(4, "dtk", "XT DTK Erso bios 2.42")
- ROMX_LOAD( "dtk2.42.bin", 0xe000, 0x2000, CRC(3f2d2a76) SHA1(02fa057f2c22ab199a8d9795ab1ae570f2b13a36),ROM_BIOS(5))
- ROM_SYSTEM_BIOS(5, "peter", "XT Peter Kohlman 3.75") // V20 Rom only
- ROMX_LOAD( "peterv203.75.bin", 0xe000, 0x2000, CRC(b053a6a4) SHA1(f53218ad3d725f12d9149b22d8afcf6a8869a3bd),ROM_BIOS(6))
- ROM_SYSTEM_BIOS(6, "pho227", "XT Phoenix Bios 2.27")
- ROMX_LOAD( "phoenix2.27.bin", 0xe000, 0x2000, CRC(168ffef0) SHA1(69465db2f9246a614044d1f433d374506a13a07f),ROM_BIOS(7))
- ROM_SYSTEM_BIOS(7, "pho251", "XT Phoenix Bios 2.51")
- ROMX_LOAD( "phoenix2.51.bin", 0xe000, 0x2000, CRC(9b7e9c40) SHA1(c948a8d3d715e469105c6e2acd8b46ec274b25a8),ROM_BIOS(8))
- ROM_SYSTEM_BIOS(8, "turbo", "XT Turbo Bios 3.10")
- ROMX_LOAD( "turbo3.10.bin", 0xe000, 0x2000, CRC(8aaca1e3) SHA1(9c03da16713e08c0112a04c8bdfa394e7341c1fc),ROM_BIOS(9))
+ROM_START(pc)
+ ROM_REGION(0x02000, "bios", 0)
+ ROM_SYSTEM_BIOS(0, "v30", "Turbo XT BIOS 3.0")
+ ROMX_LOAD("pcxtbios30.rom", 0x00000, 0x02000, CRC(4e1fd77a) SHA1(36873971c47b242db7edad7a0c1ea2f7f8d43b87),ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(1, "v26", "Turbo XT BIOS 2.6")
+ ROMX_LOAD("pcxtbios26.rom", 0x00000, 0x02000, CRC(a7505acd) SHA1(1fdd80b09feed0ac59401fd6d8dae6250cb56054),ROM_BIOS(2))
+ ROM_SYSTEM_BIOS(2, "v25", "Turbo XT BIOS 2.5")
+ ROMX_LOAD("pcxtbios25.rom", 0x00000, 0x02000, CRC(1ab22db6) SHA1(e681acec93c79b08ec06fd26d3be4cccd28f7a45),ROM_BIOS(3))
+ ROM_SYSTEM_BIOS(3, "v24", "Turbo XT BIOS 2.4")
+ ROMX_LOAD("pcxtbios24.rom", 0x00000, 0x02000, CRC(80e3c43f) SHA1(3f623cf12f3375aa0fa59da84b5137b9fc86c0ce),ROM_BIOS(4))
+ ROM_SYSTEM_BIOS(4, "v23", "Turbo XT BIOS 2.3")
+ ROMX_LOAD("pcxtbios23.rom", 0x00000, 0x02000, CRC(f397485a) SHA1(777826be2feadb3a8cf7a28ed2245dddef8e1d23),ROM_BIOS(5))
+ ROM_SYSTEM_BIOS(5, "v22", "Turbo XT BIOS 2.2")
+ ROMX_LOAD("pcxtbios22.rom", 0x00000, 0x02000, CRC(00967678) SHA1(2dd7f6c8236673e471dd456be009dcc43e28a09f),ROM_BIOS(6))
+ ROM_SYSTEM_BIOS(6, "v21", "Turbo XT BIOS 2.1")
+ ROMX_LOAD("pcxtbios21.rom", 0x00000, 0x02000, CRC(017f8f61) SHA1(d9696ba16b56685eb51612eddf1a75364acae7af),ROM_BIOS(7))
+ ROM_SYSTEM_BIOS(7, "v20", "Turbo XT BIOS 2.0")
+ ROMX_LOAD("xtbios2.rom", 0x00000, 0x02000, CRC(1d7bd86c) SHA1(33a500f599b4dad2fe6d7a5c3e89b13bd5dd2987),ROM_BIOS(8))
+ ROM_SYSTEM_BIOS(8, "v10", "XT Anonymous Generic Turbo BIOS")
+ ROMX_LOAD("pcxt.rom", 0x00000, 0x02000, CRC(031aafad) SHA1(a641b505bbac97b8775f91fe9b83d9afdf4d038f),ROM_BIOS(9))
+
+ // List of bioses to go to separate drivers
+ ROM_SYSTEM_BIOS(9, "ami", "XT AMI")
+ ROMX_LOAD( "ami.bin", 0x00000, 0x2000, CRC(b381eb22) SHA1(9735193de119270c946a17ed58c3ab9554e0852e),ROM_BIOS(10))
+ ROM_SYSTEM_BIOS(10, "award", "XT Award 2.05")
+ ROMX_LOAD( "award2.05.bin", 0x00000, 0x2000, CRC(5b3953e5) SHA1(4a36171aa8d993008187f39f732b9296401b7b6c),ROM_BIOS(11))
+ ROM_SYSTEM_BIOS(11, "dtk", "XT DTK Erso bios 2.42")
+ ROMX_LOAD( "dtk2.42.bin", 0x00000, 0x2000, CRC(3f2d2a76) SHA1(02fa057f2c22ab199a8d9795ab1ae570f2b13a36),ROM_BIOS(12))
+ ROM_SYSTEM_BIOS(12, "peter", "XT Peter Kohlman 3.75") // V20 Rom only
+ ROMX_LOAD( "peterv203.75.bin", 0x00000, 0x2000, CRC(b053a6a4) SHA1(f53218ad3d725f12d9149b22d8afcf6a8869a3bd),ROM_BIOS(13))
+ ROM_SYSTEM_BIOS(13, "pho227", "XT Phoenix Bios 2.27")
+ ROMX_LOAD( "phoenix2.27.bin", 0x00000, 0x2000, CRC(168ffef0) SHA1(69465db2f9246a614044d1f433d374506a13a07f),ROM_BIOS(14))
+ ROM_SYSTEM_BIOS(14, "pho251", "XT Phoenix Bios 2.51")
+ ROMX_LOAD( "phoenix2.51.bin", 0x00000, 0x2000, CRC(9b7e9c40) SHA1(c948a8d3d715e469105c6e2acd8b46ec274b25a8),ROM_BIOS(15))
+ ROM_SYSTEM_BIOS(15, "turbo", "XT Turbo Bios 3.10")
+ ROMX_LOAD( "turbo3.10.bin", 0x00000, 0x2000, CRC(8aaca1e3) SHA1(9c03da16713e08c0112a04c8bdfa394e7341c1fc),ROM_BIOS(16))
ROM_END
-#define rom_pcherc rom_pcmda
-
-#define rom_pcega rom_pcmda
-
-ROM_START( pc )
- ROM_REGION(0x10000,"bios", 0)
- ROM_SYSTEM_BIOS(0, "anon", "XT Anonymous Generic Turbo BIOS")
- ROMX_LOAD("pcxt.rom", 0xe000, 0x02000, CRC(031aafad) SHA1(a641b505bbac97b8775f91fe9b83d9afdf4d038f),ROM_BIOS(1))
- ROM_SYSTEM_BIOS(1, "anon2007", "XT Anonymous Generic Turbo BIOS 2007")
- ROMX_LOAD( "pcxt2007.bin", 0xe000, 0x2000, CRC(1d7bd86c) SHA1(33a500f599b4dad2fe6d7a5c3e89b13bd5dd2987),ROM_BIOS(2))
- ROM_SYSTEM_BIOS(2, "ami", "XT AMI")
- ROMX_LOAD( "ami.bin", 0xe000, 0x2000, CRC(b381eb22) SHA1(9735193de119270c946a17ed58c3ab9554e0852e),ROM_BIOS(3))
- ROM_SYSTEM_BIOS(3, "award", "XT Award 2.05")
- ROMX_LOAD( "award2.05.bin", 0xe000, 0x2000, CRC(5b3953e5) SHA1(4a36171aa8d993008187f39f732b9296401b7b6c),ROM_BIOS(4))
- ROM_SYSTEM_BIOS(4, "dtk", "XT DTK Erso bios 2.42")
- ROMX_LOAD( "dtk2.42.bin", 0xe000, 0x2000, CRC(3f2d2a76) SHA1(02fa057f2c22ab199a8d9795ab1ae570f2b13a36),ROM_BIOS(5))
- ROM_SYSTEM_BIOS(5, "peter", "XT Peter Kohlman 3.75")
- ROMX_LOAD( "peterv203.75.bin", 0xe000, 0x2000, CRC(b053a6a4) SHA1(f53218ad3d725f12d9149b22d8afcf6a8869a3bd),ROM_BIOS(6))
- ROM_SYSTEM_BIOS(6, "pho227", "XT Phoenix Bios 2.27")
- ROMX_LOAD( "phoenix2.27.bin", 0xe000, 0x2000, CRC(168ffef0) SHA1(69465db2f9246a614044d1f433d374506a13a07f),ROM_BIOS(7))
- ROM_SYSTEM_BIOS(7, "pho251", "XT Phoenix Bios 2.51")
- ROMX_LOAD( "phoenix2.51.bin", 0xe000, 0x2000, CRC(9b7e9c40) SHA1(c948a8d3d715e469105c6e2acd8b46ec274b25a8),ROM_BIOS(8))
- ROM_SYSTEM_BIOS(8, "turbo", "XT Turbo Bios 3.10")
- ROMX_LOAD( "turbo3.10.bin", 0xe000, 0x2000, CRC(8aaca1e3) SHA1(9c03da16713e08c0112a04c8bdfa394e7341c1fc),ROM_BIOS(9))
- /* IBM 1501981(CGA) and 1501985(MDA) Character rom */
- ROM_REGION(0x2000,"gfx1", 0)
- ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) /* "AMI 8412PI // 5788005 // (C) IBM CORP. 1981 // KOREA" */
-ROM_END
+#define rom_pcmda rom_pc
+
+#define rom_pcherc rom_pc
+
+#define rom_pcega rom_pc
-#define rom_xtvga rom_pcmda
+#define rom_pcvga rom_pc
/***************************************************************************
@@ -182,4 +156,4 @@ COMP( 1987, pc, ibm5150, 0, pccga, 0, driver_device
COMP( 1987, pcega, ibm5150, 0, pcega, 0, driver_device, 0, "<generic>", "PC (EGA)" , 0)
COMP ( 1987, pcmda, ibm5150, 0, pcmda, 0, driver_device, 0, "<generic>", "PC (MDA)" , 0)
COMP ( 1987, pcherc, ibm5150, 0, pcherc, 0, driver_device, 0, "<generic>", "PC (Hercules)" , 0)
-COMP ( 1987, xtvga, ibm5150, 0, xtvga, 0, driver_device, 0, "<generic>", "PC (VGA)" , MACHINE_NOT_WORKING)
+COMP ( 1987, pcvga, ibm5150, 0, pcvga, 0, driver_device, 0, "<generic>", "PC (VGA)" , 0)
diff --git a/src/mame/drivers/gkigt.cpp b/src/mame/drivers/gkigt.cpp
index 33662299a10..9ea66279d0c 100644
--- a/src/mame/drivers/gkigt.cpp
+++ b/src/mame/drivers/gkigt.cpp
@@ -79,8 +79,8 @@ PCB board that connects to 044 boards via J6 & J7
or 039 EPROM + SIMM software
More chips (from eBay auction):
- 2x Phillips / NXT 28C94 quad UART (8 serial channels total)
- ADV476 256 color RAMDAC
+ 2x Phillips / NXT 28C94 quad UART (8 serial channels total)
+ ADV476 256 color RAMDAC
*/
#include "emu.h"
@@ -105,7 +105,7 @@ public:
DECLARE_READ32_MEMBER(igt_gk_28010008_r)
{
- return rand(); // don't quite understand this one
+ return rand(); // don't quite understand this one
};
DECLARE_READ32_MEMBER(igt_gk_28030000_r)
@@ -140,11 +140,11 @@ WRITE32_MEMBER(igt_gameking_state::clut_w)
{
case 0: m_r = (data>>16) & 0xff; m_state++; break;
case 1: m_g = (data>>16) & 0xff; m_state++; break;
- case 2:
- m_b = (data>>16) & 0xff;
+ case 2:
+ m_b = (data>>16) & 0xff;
//printf("CLUT: color %d = R %d G %d B %d\n", m_offset, m_r, m_g, m_b);
m_palette->set_pen_color(m_offset, m_r<<18 | m_g<<10 | m_b<<2);
- m_state = 0;
+ m_state = 0;
break;
}
}
@@ -192,13 +192,13 @@ static ADDRESS_MAP_START( igt_gameking_mem, AS_PROGRAM, 32, igt_gameking_state )
AM_RANGE(0x08000000, 0x081fffff) AM_ROM AM_REGION("game", 0)
AM_RANGE(0x10000000, 0x10ffffff) AM_RAM
-
- AM_RANGE(0x18000000, 0x181fffff) AM_RAM // igtsc writes from 18000000 to 1817ffff, ms3 all the way to 181fffff.
+
+ AM_RANGE(0x18000000, 0x181fffff) AM_RAM // igtsc writes from 18000000 to 1817ffff, ms3 all the way to 181fffff.
// 28010000-2801007f: first 28C94 QUART
AM_RANGE(0x28010008, 0x2801000b) AM_READ(igt_gk_28010008_r)
- AM_RANGE(0x28010030, 0x28010033) AM_READ(uart_status_r) // channel D
- AM_RANGE(0x28010034, 0x28010037) AM_WRITE(uart_w) // channel D
+ AM_RANGE(0x28010030, 0x28010033) AM_READ(uart_status_r) // channel D
+ AM_RANGE(0x28010034, 0x28010037) AM_WRITE(uart_w) // channel D
// 28020000-2802007f: second 28C94 QUART
AM_RANGE(0x28030000, 0x28030003) AM_READ(igt_gk_28030000_r)
AM_RANGE(0x28040000, 0x2804ffff) AM_RAM
@@ -206,7 +206,7 @@ static ADDRESS_MAP_START( igt_gameking_mem, AS_PROGRAM, 32, igt_gameking_state )
AM_RANGE(0x28060000, 0x28060003) AM_WRITE(clut_w)
AM_RANGE(0x28060004, 0x28060007) AM_WRITE(clut_mask_w)
- AM_RANGE(0xa1000000, 0xa1011fff) AM_RAM // used by gkkey for restart IAC
+ AM_RANGE(0xa1000000, 0xa1011fff) AM_RAM // used by gkkey for restart IAC
ADDRESS_MAP_END
@@ -259,22 +259,22 @@ MACHINE_CONFIG_END
ROM_START( ms3 )
ROM_REGION( 0x80000, "maincpu", 0 )
- ROM_LOAD( "3b5060ax.u8", 0x000000, 0x080000, CRC(aff8d874) SHA1(1cb972759ee12c944a1cfdbe68848c9b2e64a4d3) )
+ ROM_LOAD( "3b5060ax.u8", 0x000000, 0x080000, CRC(aff8d874) SHA1(1cb972759ee12c944a1cfdbe68848c9b2e64a4d3) )
ROM_REGION32_LE( 0x200000, "game", 0 )
- ROM_LOAD16_BYTE( "ea5006ax.u21", 0x000000, 0x080000, CRC(9109b2e2) SHA1(daa1f01315caf6e08c3cf8b0e4925c86d2cd8dc3) )
- ROM_LOAD16_BYTE( "ea5006ax.u5", 0x000001, 0x080000, CRC(66c33cf6) SHA1(600f75ab112348f43b38cafd6f871559372f2807) )
+ ROM_LOAD16_BYTE( "ea5006ax.u21", 0x000000, 0x080000, CRC(9109b2e2) SHA1(daa1f01315caf6e08c3cf8b0e4925c86d2cd8dc3) )
+ ROM_LOAD16_BYTE( "ea5006ax.u5", 0x000001, 0x080000, CRC(66c33cf6) SHA1(600f75ab112348f43b38cafd6f871559372f2807) )
ROM_REGION( 0x100000, "cg", 0 )
- ROM_LOAD16_BYTE( "1g5032ax.u48", 0x000000, 0x040000, CRC(aba6002f) SHA1(2ed51aa8bbc1e703cd63f633d745dfa4fa7f3dd0) )
- ROM_LOAD16_BYTE( "1g5032ax.u47", 0x000001, 0x040000, CRC(605a71ec) SHA1(13fe64c611c0903a7b79d8680de3ac81f3226a67) )
+ ROM_LOAD16_BYTE( "1g5032ax.u48", 0x000000, 0x040000, CRC(aba6002f) SHA1(2ed51aa8bbc1e703cd63f633d745dfa4fa7f3dd0) )
+ ROM_LOAD16_BYTE( "1g5032ax.u47", 0x000001, 0x040000, CRC(605a71ec) SHA1(13fe64c611c0903a7b79d8680de3ac81f3226a67) )
ROM_REGION( 0x200000, "plx", 0 )
- ROM_LOAD16_BYTE( "1g5032ax.u20", 0x000000, 0x100000, CRC(517e7478) SHA1(316a8e48ad6502f9508b06f900555d53ef40b464) )
- ROM_LOAD16_BYTE( "1g5032ax.u4", 0x000001, 0x100000, CRC(e67c878f) SHA1(b03f8d28924351e96bb9f24d32f0e4a40a51910c) )
-
+ ROM_LOAD16_BYTE( "1g5032ax.u20", 0x000000, 0x100000, CRC(517e7478) SHA1(316a8e48ad6502f9508b06f900555d53ef40b464) )
+ ROM_LOAD16_BYTE( "1g5032ax.u4", 0x000001, 0x100000, CRC(e67c878f) SHA1(b03f8d28924351e96bb9f24d32f0e4a40a51910c) )
+
ROM_REGION( 0x200000, "snd", 0 )
- ROM_LOAD( "1h5053xx.u6", 0x000000, 0x080000, CRC(6735c65a) SHA1(198cacec5441aa615c0de63a0b4e47265636bcee) )
+ ROM_LOAD( "1h5053xx.u6", 0x000000, 0x080000, CRC(6735c65a) SHA1(198cacec5441aa615c0de63a0b4e47265636bcee) )
ROM_END
ROM_START( ms72c )
diff --git a/src/mame/drivers/gottlieb.cpp b/src/mame/drivers/gottlieb.cpp
index 032cdc9f4ed..ece752481fd 100644
--- a/src/mame/drivers/gottlieb.cpp
+++ b/src/mame/drivers/gottlieb.cpp
@@ -1822,38 +1822,6 @@ MACHINE_CONFIG_END
*
*************************************/
-#if USE_FAKE_VOTRAX
-
-static MACHINE_CONFIG_DERIVED( reactor, gottlieb1 )
-
- /* basic machine hardware */
- MCFG_CPU_MODIFY("maincpu")
- MCFG_CPU_PROGRAM_MAP(reactor_map)
-
- MCFG_DEVICE_REMOVE("nvram")
-
- /* sound hardware */
- MCFG_FRAGMENT_ADD(reactor_samples)
-MACHINE_CONFIG_END
-
-
-static MACHINE_CONFIG_DERIVED( qbert, gottlieb1 )
-
- /* sound hardware */
- MCFG_FRAGMENT_ADD(qbert_knocker)
- MCFG_FRAGMENT_ADD(qbert_samples)
-MACHINE_CONFIG_END
-
-
-static MACHINE_CONFIG_DERIVED( tylz, gottlieb1 )
-
- /* sound hardware */
- MCFG_FRAGMENT_ADD(qbert_samples)
-MACHINE_CONFIG_END
-
-
-#else
-
static MACHINE_CONFIG_DERIVED( gottlieb1_votrax, gottlieb_core )
MCFG_SOUND_ADD("r1sound", GOTTLIEB_SOUND_REV1_WITH_VOTRAX, 0)
@@ -1882,9 +1850,6 @@ static MACHINE_CONFIG_DERIVED( tylz, gottlieb1_votrax )
MACHINE_CONFIG_END
-#endif
-
-
static MACHINE_CONFIG_DERIVED( screwloo, gottlieb2 )
MCFG_VIDEO_START_OVERRIDE(gottlieb_state,screwloo)
diff --git a/src/mame/drivers/guab.cpp b/src/mame/drivers/guab.cpp
index 957b3f629eb..3fae6e696cc 100644
--- a/src/mame/drivers/guab.cpp
+++ b/src/mame/drivers/guab.cpp
@@ -355,36 +355,36 @@ WRITE8_MEMBER( guab_state::output2_w )
{
output().set_value("led_8", BIT(data, 0));
output().set_value("led_9", BIT(data, 1));
- output().set_value("led_10", BIT(data, 2)); // start (ten up: start)
+ output().set_value("led_10", BIT(data, 2)); // start (ten up: start)
output().set_value("led_11", BIT(data, 3)); // (ten up: feature 6)
output().set_value("led_12", BIT(data, 4)); // (ten up: feature 11)
output().set_value("led_13", BIT(data, 5)); // (ten up: feature 13)
- output().set_value("led_14", BIT(data, 6)); // lamp a (ten up: feature 12)
- output().set_value("led_15", BIT(data, 7)); // lamp b (ten up: pass)
+ output().set_value("led_14", BIT(data, 6)); // lamp a (ten up: feature 12)
+ output().set_value("led_15", BIT(data, 7)); // lamp b (ten up: pass)
}
WRITE8_MEMBER( guab_state::output3_w )
{
- output().set_value("led_16", BIT(data, 0)); // select (ten up: collect)
+ output().set_value("led_16", BIT(data, 0)); // select (ten up: collect)
output().set_value("led_17", BIT(data, 1)); // (ten up: feature 14)
output().set_value("led_18", BIT(data, 2)); // (ten up: feature 9)
output().set_value("led_19", BIT(data, 3)); // (ten up: lamp a)
- output().set_value("led_20", BIT(data, 4)); // lamp c (ten up: lamp b)
- output().set_value("led_21", BIT(data, 5)); // lamp d (ten up: lamp c)
+ output().set_value("led_20", BIT(data, 4)); // lamp c (ten up: lamp b)
+ output().set_value("led_21", BIT(data, 5)); // lamp d (ten up: lamp c)
output().set_value("led_22", BIT(data, 6));
output().set_value("led_23", BIT(data, 7));
}
WRITE8_MEMBER( guab_state::output4_w )
{
- output().set_value("led_24", BIT(data, 0)); // feature 1 (ten up: feature 1)
- output().set_value("led_25", BIT(data, 1)); // feature 2 (ten up: feature 10)
- output().set_value("led_26", BIT(data, 2)); // feature 3 (ten up: feature 7)
- output().set_value("led_27", BIT(data, 3)); // feature 4 (ten up: feature 2)
- output().set_value("led_28", BIT(data, 4)); // feature 5 (ten up: feature 8)
- output().set_value("led_29", BIT(data, 5)); // feature 6 (ten up: feature 3)
- output().set_value("led_30", BIT(data, 6)); // feature 7 (ten up: feature 4)
- output().set_value("led_31", BIT(data, 7)); // feature 8 (ten up: feature 5)
+ output().set_value("led_24", BIT(data, 0)); // feature 1 (ten up: feature 1)
+ output().set_value("led_25", BIT(data, 1)); // feature 2 (ten up: feature 10)
+ output().set_value("led_26", BIT(data, 2)); // feature 3 (ten up: feature 7)
+ output().set_value("led_27", BIT(data, 3)); // feature 4 (ten up: feature 2)
+ output().set_value("led_28", BIT(data, 4)); // feature 5 (ten up: feature 8)
+ output().set_value("led_29", BIT(data, 5)); // feature 6 (ten up: feature 3)
+ output().set_value("led_30", BIT(data, 6)); // feature 7 (ten up: feature 4)
+ output().set_value("led_31", BIT(data, 7)); // feature 8 (ten up: feature 5)
}
WRITE8_MEMBER( guab_state::output5_w )
diff --git a/src/mame/drivers/hanaawas.cpp b/src/mame/drivers/hanaawas.cpp
index b28780746b3..b45ef16435b 100644
--- a/src/mame/drivers/hanaawas.cpp
+++ b/src/mame/drivers/hanaawas.cpp
@@ -37,17 +37,31 @@ READ8_MEMBER(hanaawas_state::hanaawas_input_port_0_r)
int i, ordinal = 0;
uint16_t buttons = 0;
+ // TODO: key matrix seems identical to speedatk.cpp, needs merging
+ if(m_coin_impulse > 0)
+ {
+ m_coin_impulse--;
+ return 0x80;
+ }
+
+ if((ioport("COINS")->read() & 1) || (ioport("COINS")->read() & 2))
+ {
+ m_coin_impulse = m_coin_settings*2;
+ m_coin_impulse--;
+ return 0x80;
+ }
+
switch (m_mux)
{
- case 1: /* start buttons */
- buttons = ioport("START")->read();
- break;
- case 2: /* player 1 buttons */
- buttons = ioport("P1")->read();
- break;
- case 4: /* player 2 buttons */
- buttons = ioport("P2")->read();
- break;
+ case 1: /* start buttons */
+ buttons = ioport("START")->read();
+ break;
+ case 2: /* player 1 buttons */
+ buttons = ioport("P1")->read();
+ break;
+ case 4: /* player 2 buttons */
+ buttons = ioport("P2")->read();
+ break;
}
@@ -62,7 +76,7 @@ READ8_MEMBER(hanaawas_state::hanaawas_input_port_0_r)
}
}
- return (ioport("IN0")->read() & 0xf0) | ordinal;
+ return ordinal;
}
WRITE8_MEMBER(hanaawas_state::hanaawas_inputs_mux_w)
@@ -75,6 +89,11 @@ WRITE8_MEMBER(hanaawas_state::irq_ack_w)
m_maincpu->set_input_line(0,CLEAR_LINE);
}
+WRITE8_MEMBER(hanaawas_state::key_matrix_status_w)
+{
+ if((data & 0xf0) == 0x40) //coinage setting command
+ m_coin_settings = data & 0xf;
+}
static ADDRESS_MAP_START( hanaawas_map, AS_PROGRAM, 8, hanaawas_state )
AM_RANGE(0x0000, 0x2fff) AM_ROM
@@ -90,19 +109,16 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, hanaawas_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(hanaawas_input_port_0_r, hanaawas_inputs_mux_w)
- AM_RANGE(0x01, 0x01) AM_READNOP /* r bit 1: status ready, presumably of the input mux device / w = configure device? */
+ AM_RANGE(0x01, 0x01) AM_READNOP AM_WRITE(key_matrix_status_w) /* r bit 1: status ready, presumably of the input mux device / w = configure device? */
AM_RANGE(0x10, 0x10) AM_DEVREAD("aysnd", ay8910_device, data_r)
AM_RANGE(0x10, 0x11) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
AM_RANGE(0xc0, 0xc0) AM_WRITENOP // watchdog
ADDRESS_MAP_END
static INPUT_PORTS_START( hanaawas )
- PORT_START("IN0")
- PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
+ PORT_START("COINS")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
PORT_START("DSW")
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
@@ -184,6 +200,8 @@ GFXDECODE_END
void hanaawas_state::machine_start()
{
save_item(NAME(m_mux));
+ save_item(NAME(m_coin_settings));
+ save_item(NAME(m_coin_impulse));
}
void hanaawas_state::machine_reset()
diff --git a/src/mame/drivers/hazeltin.cpp b/src/mame/drivers/hazeltin.cpp
index b820ca20a3c..c39d5f5a104 100644
--- a/src/mame/drivers/hazeltin.cpp
+++ b/src/mame/drivers/hazeltin.cpp
@@ -7,8 +7,16 @@
perliminary driver by Ryan Holtz
-TODO:
- - pretty much everything
+TODO (roughly in order of importance):
+ - Figure out the correct keyboard decoding.
+ - Proper RS232 hookup.
+ - Iron out proper horizontal and vertical start/end values.
+ - Hook up /FGBIT, REV FLD FRAME, and REV VIDEO SELECT lines on video
+ board.
+ - Reimplement logic probe (since removed) as a netlist device so other
+ devs can use it.
+ - Implement /BRESET line in netlist to possibly smooth out some sync
+ issues.
References:
[1]: Hazeltine_1500_Series_Maintenance_Manual_Dec77.pdf, on Bitsavers
@@ -17,64 +25,35 @@ References:
#include "emu.h"
#include "cpu/i8085/i8085.h"
-#include "machine/7400.h"
-#include "machine/7404.h"
-#include "machine/7474.h"
-#include "machine/74161.h"
-#include "machine/74175.h"
-#include "machine/82s129.h"
-#include "machine/am2847.h"
#include "machine/ay31015.h"
#include "machine/clock.h"
#include "machine/com8116.h"
-#include "machine/dm9334.h"
#include "machine/kb3600.h"
+#include "machine/netlist.h"
+#include "machine/nl_hazelvid.h"
+#include "netlist/devices/net_lib.h"
#define CPU_TAG "maincpu"
+#define NETLIST_TAG "videobrd"
#define UART_TAG "uart"
#define BAUDGEN_TAG "baudgen"
#define KBDC_TAG "ay53600"
-#define CHARRAM_TAG "chrram"
#define CHARROM_TAG "chargen"
#define BAUDPORT_TAG "baud"
#define MISCPORT_TAG "misc"
#define MISCKEYS_TAG "misc_keys"
#define SCREEN_TAG "screen"
-#define TMS3409A_TAG "u67"
-#define TMS3409B_TAG "u57"
-#define DOTCLK_TAG "dotclk"
-#define DOTCLK_DISP_TAG "dotclk_dispatch"
-#define CHAR_CTR_CLK_TAG "ch_bucket_ctr_clk"
-#define U58_TAG "u58"
-#define U59_TAG "u59"
-#define VID_PROM_ADDR_RESET_TAG "u59_y5"
-#define U61_TAG "u61"
-#define U68_TAG "u68"
-#define U69_PROMMSB_TAG "u69"
-#define U70_PROMLSB_TAG "u70"
-#define U70_TC_LINE_TAG "u70_tc"
-#define U71_PROM_TAG "u71"
-#define U72_PROMDEC_TAG "u72"
-#define U81_TAG "u81"
-#define U83_TAG "u83"
-#define U84_DIV11_TAG "u84"
-#define U85_VERT_DR_UB_TAG "u85"
-#define U87_TAG "u87"
-#define U88_DIV9_TAG "u88"
-#define U90_DIV14_TAG "u90"
#define BAUD_PROM_TAG "u39"
+#define NL_PROM_TAG "videobrd:u71"
+#define NL_EPROM_TAG "videobrd:u78"
+#define VIDEO_PROM_TAG "u71"
+#define CHAR_EPROM_TAG "u78"
+#define VIDEO_OUT_TAG "videobrd:video_out"
+#define VBLANK_OUT_TAG "videobrd:vblank"
+#define TVINTERQ_OUT_TAG "videobrd:tvinterq"
-// Number of cycles to burn when fetching the next row of characters into the line buffer:
-// CPU clock is 18MHz / 9
-// Dot clock is 33.264MHz / 2
-// 9 dots per character
-// 80 visible characters per line
-// Total duration of fetch: 1440 33.264MHz clock cycles
-//
-// 2*9*80 1 1440 * XTAL_2MHz
-// -------------- divided by --------- = ---------------- = 86.5 main CPU cycles per line fetch
-// XTAL_33_264MHz XTAL_2MHz XTAL_33_264MHz
-#define LINE_FETCH_CYCLES (87)
+#define VIDEO_CLOCK (XTAL_33_264MHz/2)
+#define VIDEOBRD_CLOCK (XTAL_33_264MHz*30)
#define SR2_FULL_DUPLEX (0x01)
#define SR2_UPPER_ONLY (0x08)
@@ -91,9 +70,7 @@ References:
#define SCREEN_VTOTAL (28*11)
#define SCREEN_VDISP (24*11)
-#define SCREEN_VSTART (0)
-
-#define VERT_UB_LINE (24*11+8)
+#define SCREEN_VSTART (3*11)
class hazl1500_state : public driver_device
{
@@ -101,53 +78,70 @@ public:
hazl1500_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, CPU_TAG)
+ , m_video_board(*this, NETLIST_TAG)
+ , m_u71(*this, NL_PROM_TAG)
+ , m_u78(*this, NL_EPROM_TAG)
+ , m_u9(*this, "videobrd:u9")
+ , m_u10(*this, "videobrd:u10")
+ , m_u11(*this, "videobrd:u11")
+ , m_u12(*this, "videobrd:u12")
+ , m_u13(*this, "videobrd:u13")
+ , m_u14(*this, "videobrd:u14")
+ , m_u15(*this, "videobrd:u15")
+ , m_u16(*this, "videobrd:u16")
+ , m_u22(*this, "videobrd:u22")
+ , m_u23(*this, "videobrd:u23")
+ , m_u24(*this, "videobrd:u24")
+ , m_u25(*this, "videobrd:u25")
+ , m_u26(*this, "videobrd:u26")
+ , m_u27(*this, "videobrd:u27")
+ , m_u28(*this, "videobrd:u28")
+ , m_u29(*this, "videobrd:u29")
+ , m_cpu_db0(*this, "videobrd:cpu_db0")
+ , m_cpu_db1(*this, "videobrd:cpu_db1")
+ , m_cpu_db2(*this, "videobrd:cpu_db2")
+ , m_cpu_db3(*this, "videobrd:cpu_db3")
+ , m_cpu_db4(*this, "videobrd:cpu_db4")
+ , m_cpu_db5(*this, "videobrd:cpu_db5")
+ , m_cpu_db6(*this, "videobrd:cpu_db6")
+ , m_cpu_db7(*this, "videobrd:cpu_db7")
+ , m_cpu_ba4(*this, "videobrd:cpu_ba4")
+ , m_cpu_iowq(*this, "videobrd:cpu_iowq")
+ , m_video_out(*this, VIDEO_OUT_TAG)
+ , m_vblank_out(*this, VBLANK_OUT_TAG)
+ , m_tvinterq_out(*this, TVINTERQ_OUT_TAG)
, m_uart(*this, UART_TAG)
, m_kbdc(*this, KBDC_TAG)
, m_baud_dips(*this, BAUDPORT_TAG)
, m_baud_prom(*this, BAUD_PROM_TAG)
, m_misc_dips(*this, MISCPORT_TAG)
, m_kbd_misc_keys(*this, MISCKEYS_TAG)
- , m_char_ram(*this, CHARRAM_TAG)
- , m_char_rom(*this, CHARROM_TAG)
- , m_line_buffer_lsb(*this, TMS3409A_TAG)
- , m_line_buffer_msb(*this, TMS3409B_TAG)
- , m_dotclk(*this, DOTCLK_TAG)
- , m_vid_prom_msb(*this, U69_PROMMSB_TAG)
- , m_vid_prom_lsb(*this, U70_PROMLSB_TAG)
- , m_vid_prom(*this, U71_PROM_TAG)
- , m_u59(*this, U59_TAG)
- , m_u83(*this, U83_TAG)
- , m_char_y(*this, U84_DIV11_TAG)
- , m_char_x(*this, U88_DIV9_TAG)
- , m_vid_div14(*this, U90_DIV14_TAG)
- , m_vid_decode(*this, U72_PROMDEC_TAG)
- , m_u58(*this, U58_TAG)
- , m_u68(*this, U68_TAG)
- , m_u81(*this, U81_TAG)
- , m_u87(*this, U87_TAG)
- , m_u61(*this, U61_TAG)
, m_screen(*this, SCREEN_TAG)
- , m_hblank_timer(nullptr)
- , m_scanline_timer(nullptr)
+ , m_iowq_timer(nullptr)
, m_status_reg_3(0)
, m_kbd_status_latch(0)
, m_refresh_address(0)
- , m_vpos(0)
- , m_hblank(false)
- , m_vblank(false)
- , m_delayed_vblank(false)
+ , m_screen_buf(nullptr)
+ , m_last_beam(0.0)
+ , m_last_hpos(0)
+ , m_last_vpos(0)
+ , m_last_fraction(0.0)
{
}
- //m_maincpu->adjust_icount(-14);
-
virtual void machine_start() override;
virtual void machine_reset() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+ static const device_timer_id TIMER_IOWQ = 0;
uint32_t screen_update_hazl1500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(com5016_fr_w);
+ DECLARE_READ8_MEMBER(ram_r);
+ DECLARE_WRITE8_MEMBER(ram_w);
+
DECLARE_READ8_MEMBER(system_test_r); // noted as "for use with auto test equip" in flowchart on pg. 30, ref[1], jumps to 0x8000 if bit 0 is unset
DECLARE_READ8_MEMBER(status_reg_2_r);
DECLARE_WRITE8_MEMBER(status_reg_3_w);
@@ -162,18 +156,45 @@ public:
DECLARE_WRITE_LINE_MEMBER(ay3600_data_ready_w);
DECLARE_WRITE8_MEMBER(refresh_address_w);
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
- static const device_timer_id TIMER_HBLANK = 0;
- static const device_timer_id TIMER_SCANLINE = 1;
+ NETDEV_ANALOG_CALLBACK_MEMBER(video_out_cb);
+ NETDEV_ANALOG_CALLBACK_MEMBER(vblank_cb);
+ NETDEV_ANALOG_CALLBACK_MEMBER(tvinterq_cb);
private:
- void check_tv_interrupt();
- void update_tv_unblank();
- void scanline_tick();
- void draw_scanline(uint32_t *pix);
-
required_device<cpu_device> m_maincpu;
+ required_device<netlist_mame_device_t> m_video_board;
+ required_device<netlist_mame_rom_t> m_u71;
+ required_device<netlist_mame_rom_t> m_u78;
+ required_device<netlist_ram_pointer_t> m_u9;
+ required_device<netlist_ram_pointer_t> m_u10;
+ required_device<netlist_ram_pointer_t> m_u11;
+ required_device<netlist_ram_pointer_t> m_u12;
+ required_device<netlist_ram_pointer_t> m_u13;
+ required_device<netlist_ram_pointer_t> m_u14;
+ required_device<netlist_ram_pointer_t> m_u15;
+ required_device<netlist_ram_pointer_t> m_u16;
+ required_device<netlist_ram_pointer_t> m_u22;
+ required_device<netlist_ram_pointer_t> m_u23;
+ required_device<netlist_ram_pointer_t> m_u24;
+ required_device<netlist_ram_pointer_t> m_u25;
+ required_device<netlist_ram_pointer_t> m_u26;
+ required_device<netlist_ram_pointer_t> m_u27;
+ required_device<netlist_ram_pointer_t> m_u28;
+ required_device<netlist_ram_pointer_t> m_u29;
+ required_device<netlist_mame_logic_input_t> m_cpu_db0;
+ required_device<netlist_mame_logic_input_t> m_cpu_db1;
+ required_device<netlist_mame_logic_input_t> m_cpu_db2;
+ required_device<netlist_mame_logic_input_t> m_cpu_db3;
+ required_device<netlist_mame_logic_input_t> m_cpu_db4;
+ required_device<netlist_mame_logic_input_t> m_cpu_db5;
+ required_device<netlist_mame_logic_input_t> m_cpu_db6;
+ required_device<netlist_mame_logic_input_t> m_cpu_db7;
+ required_device<netlist_mame_logic_input_t> m_cpu_ba4;
+ required_device<netlist_mame_logic_input_t> m_cpu_iowq;
+ required_device<netlist_mame_analog_output_t> m_video_out;
+ required_device<netlist_mame_analog_output_t> m_vblank_out;
+ required_device<netlist_mame_analog_output_t> m_tvinterq_out;
required_device<ay31015_device> m_uart;
required_device<ay3600_device> m_kbdc;
required_ioport m_baud_dips;
@@ -181,82 +202,50 @@ private:
required_ioport m_misc_dips;
required_ioport m_kbd_misc_keys;
- required_shared_ptr<uint8_t> m_char_ram;
- required_region_ptr<uint8_t> m_char_rom;
- required_device<tms3409_device> m_line_buffer_lsb;
- required_device<tms3409_device> m_line_buffer_msb;
- required_device<clock_device> m_dotclk;
- required_device<ttl74161_device> m_vid_prom_msb;
- required_device<ttl74161_device> m_vid_prom_lsb;
- required_device<prom82s129_device> m_vid_prom;
- required_device<ttl7404_device> m_u59;
- required_device<ttl7400_device> m_u83;
- required_device<ttl74161_device> m_char_y;
- required_device<ttl74161_device> m_char_x;
- required_device<ttl74161_device> m_vid_div14;
- required_device<dm9334_device> m_vid_decode;
- required_device<ttl74175_device> m_u58;
- required_device<ttl74175_device> m_u68;
- required_device<ttl74175_device> m_u81;
- required_device<ttl7404_device> m_u87;
- required_device<ttl7404_device> m_u61;
-
required_device<screen_device> m_screen;
- std::unique_ptr<uint32_t[]> m_screen_pixbuf;
-
- emu_timer *m_hblank_timer;
- emu_timer *m_scanline_timer;
+ emu_timer* m_iowq_timer;
uint8_t m_status_reg_3;
uint8_t m_kbd_status_latch;
uint8_t m_refresh_address;
- uint16_t m_vpos;
- bool m_hblank;
- bool m_vblank;
- bool m_delayed_vblank;
+
+ std::unique_ptr<float[]> m_screen_buf;
+
+ double m_last_beam;
+ int m_last_hpos;
+ int m_last_vpos;
+ double m_last_fraction;
};
void hazl1500_state::machine_start()
{
- m_hblank_timer = timer_alloc(TIMER_HBLANK);
- m_hblank_timer->adjust(attotime::never);
+ m_screen_buf = std::make_unique<float[]>(SCREEN_HTOTAL * SCREEN_VTOTAL);
- m_scanline_timer = timer_alloc(TIMER_SCANLINE);
- m_scanline_timer->adjust(attotime::never);
-
- m_screen_pixbuf = std::make_unique<uint32_t[]>(SCREEN_HTOTAL * SCREEN_VTOTAL);
+ m_iowq_timer = timer_alloc(TIMER_IOWQ);
+ m_iowq_timer->adjust(attotime::never);
save_item(NAME(m_status_reg_3));
save_item(NAME(m_kbd_status_latch));
save_item(NAME(m_refresh_address));
- save_item(NAME(m_vpos));
- save_item(NAME(m_hblank));
- save_item(NAME(m_vblank));
- save_item(NAME(m_delayed_vblank));
+ save_item(NAME(m_last_beam));
+ save_item(NAME(m_last_hpos));
+ save_item(NAME(m_last_vpos));
+ save_item(NAME(m_last_fraction));
}
void hazl1500_state::machine_reset()
{
m_status_reg_3 = 0;
m_kbd_status_latch = 0;
-
- m_refresh_address = 0;
- m_screen->reset_origin(0, 0);
- m_vpos = m_screen->vpos();
- m_vblank = (m_vpos >= SCREEN_VDISP);
- m_delayed_vblank = m_vpos < VERT_UB_LINE;
- if (!m_vblank)
- m_kbd_status_latch |= KBD_STATUS_TV_UB;
- m_hblank = true;
- m_hblank_timer->adjust(m_screen->time_until_pos(m_vpos, SCREEN_HSTART));
- m_scanline_timer->adjust(m_screen->time_until_pos(m_vpos + 1, 0));
-
- m_vid_prom_lsb->p_w(generic_space(), 0, 0);
- m_vid_prom_msb->p_w(generic_space(), 0, 0);
}
+void hazl1500_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ m_cpu_iowq->write(1);
+ m_cpu_ba4->write(1);
+}
WRITE_LINE_MEMBER( hazl1500_state::com5016_fr_w )
{
@@ -266,10 +255,65 @@ WRITE_LINE_MEMBER( hazl1500_state::com5016_fr_w )
uint32_t hazl1500_state::screen_update_hazl1500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- memcpy(&bitmap.pix32(0), &m_screen_pixbuf[0], sizeof(uint32_t) * SCREEN_HTOTAL * SCREEN_VTOTAL);
+ int last_index = m_last_vpos * SCREEN_HTOTAL + m_last_hpos;
+ while (last_index < SCREEN_HTOTAL * SCREEN_VTOTAL)
+ {
+ m_screen_buf[last_index++] = m_last_beam;
+ }
+ m_last_hpos = 0;
+ m_last_vpos = 0;
+
+ uint32_t pixindex = 0;
+ for (int y = 0; y < SCREEN_VTOTAL; y++)
+ {
+ uint32_t *scanline = &bitmap.pix32(y);
+ pixindex = y * SCREEN_HTOTAL;
+ for (int x = 0; x < SCREEN_HTOTAL; x++)
+ //*scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 0.5) * 0x010101);
+ *scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 63.0) * 0x010101);
+ }
+
return 0;
}
+READ8_MEMBER( hazl1500_state::ram_r )
+{
+ const uint8_t* chips[2][8] =
+ {
+ { m_u29->ptr(), m_u28->ptr(), m_u27->ptr(), m_u26->ptr(), m_u25->ptr(), m_u24->ptr(), m_u23->ptr(), m_u22->ptr() },
+ { m_u16->ptr(), m_u15->ptr(), m_u14->ptr(), m_u13->ptr(), m_u12->ptr(), m_u11->ptr(), m_u10->ptr(), m_u9->ptr() }
+ };
+
+ int bank = ((offset & 0x400) != 0 ? 1 : 0);
+ const int byte_pos = (offset >> 3) & 0x7f;
+ const int bit_pos = offset & 7;
+
+ uint8_t ret = 0;
+ for (std::size_t bit = 0; bit < 8; bit++)
+ ret |= ((chips[bank][bit][byte_pos] >> bit_pos) & 1) << bit;
+
+ return ret;
+}
+
+WRITE8_MEMBER( hazl1500_state::ram_w )
+{
+ uint8_t* chips[2][8] =
+ {
+ { m_u29->ptr(), m_u28->ptr(), m_u27->ptr(), m_u26->ptr(), m_u25->ptr(), m_u24->ptr(), m_u23->ptr(), m_u22->ptr() },
+ { m_u16->ptr(), m_u15->ptr(), m_u14->ptr(), m_u13->ptr(), m_u12->ptr(), m_u11->ptr(), m_u10->ptr(), m_u9->ptr() }
+ };
+
+ int bank = ((offset & 0x400) != 0 ? 1 : 0);
+ const int byte_pos = (offset >> 3) & 0x7f;
+ const int bit_pos = offset & 7;
+
+ for (std::size_t bit = 0; bit < 8; bit++)
+ {
+ chips[bank][bit][byte_pos] &= ~(1 << bit_pos);
+ chips[bank][bit][byte_pos] |= ((data >> bit) & 1) << bit_pos;
+ }
+}
+
READ8_MEMBER( hazl1500_state::system_test_r )
{
return 0xff;
@@ -305,7 +349,6 @@ WRITE8_MEMBER( hazl1500_state::uart_w )
READ8_MEMBER( hazl1500_state::kbd_status_latch_r )
{
- //printf("m_kbd_status_latch r: %02x\n", m_kbd_status_latch);
return m_kbd_status_latch;
}
@@ -343,124 +386,94 @@ WRITE_LINE_MEMBER(hazl1500_state::ay3600_data_ready_w)
m_kbd_status_latch &= ~KBD_STATUS_KBDR;
}
-void hazl1500_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::vblank_cb)
{
- switch(id)
+ synchronize();
+ if (int(data) > 1)
+ {
+ m_kbd_status_latch &= ~KBD_STATUS_TV_UB;
+ }
+ else
{
- case TIMER_HBLANK:
- if (m_hblank)
- {
- m_hblank_timer->adjust(m_screen->time_until_pos(m_vpos, SCREEN_HSTART + SCREEN_HDISP));
- }
- else
- {
- m_hblank_timer->adjust(m_screen->time_until_pos((m_vpos + 1) % SCREEN_VTOTAL, SCREEN_HSTART));
- }
- m_hblank ^= 1;
- break;
-
- case TIMER_SCANLINE:
- {
- scanline_tick();
- break;
- }
+ m_kbd_status_latch |= KBD_STATUS_TV_UB;
}
}
-WRITE8_MEMBER(hazl1500_state::refresh_address_w)
+NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::tvinterq_cb)
{
- m_refresh_address = data;
- //printf("m_refresh_address %x, vpos %d, screen vpos %d\n", m_refresh_address, m_vpos, m_screen->vpos());
-}
-
-void hazl1500_state::check_tv_interrupt()
-{
- uint8_t char_row = m_vpos % 11;
- bool bit_match = char_row == 2 || char_row == 3;
- bool tv_interrupt = bit_match && !m_delayed_vblank;
- //printf("interrupt for line %d (%d): %s\n", m_vpos, char_row, tv_interrupt ? "yes" : "no");
-
- m_kbd_status_latch &= ~KBD_STATUS_TV_INT;
- m_kbd_status_latch |= tv_interrupt ? KBD_STATUS_TV_INT : 0;
-
- m_maincpu->set_input_line(INPUT_LINE_IRQ0, tv_interrupt ? ASSERT_LINE : CLEAR_LINE);
-}
-
-void hazl1500_state::update_tv_unblank()
-{
- if (!m_vblank)
+ synchronize();
+ if (int(data) > 1)
{
- m_kbd_status_latch |= KBD_STATUS_TV_UB;
+ m_kbd_status_latch &= ~KBD_STATUS_TV_INT;
+ m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
}
else
{
- m_kbd_status_latch &= ~KBD_STATUS_TV_UB;
+ m_kbd_status_latch |= KBD_STATUS_TV_INT;
+ m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
}
}
-void hazl1500_state::scanline_tick()
+NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::video_out_cb)
{
- uint16_t old_vpos = m_vpos;
- m_vpos = (m_vpos + 1) % SCREEN_VTOTAL;
- m_vblank = (m_vpos >= SCREEN_VDISP);
- m_delayed_vblank = m_vpos >= VERT_UB_LINE;
+ synchronize();
+ attotime second_fraction(0, time.attoseconds());
+ attotime frame_fraction(0, (second_fraction * 60).attoseconds());
+ attotime pixel_time = frame_fraction * (SCREEN_HTOTAL * SCREEN_VTOTAL);
+ int32_t pixel_index = (frame_fraction * (SCREEN_HTOTAL * SCREEN_VTOTAL)).seconds();
+ double pixel_fraction = ATTOSECONDS_TO_DOUBLE(pixel_time.attoseconds());
+
+ pixel_index -= 16; // take back 16 clock cycles to honor the circuitry god whose ark this is
+ if (pixel_index < 0)
+ {
+ m_last_beam = float(data);
+ m_last_hpos = 0;
+ m_last_vpos = 0;
+ m_last_fraction = 0.0;
+ return;
+ }
- check_tv_interrupt();
- update_tv_unblank();
+ const int hpos = pixel_index % SCREEN_HTOTAL;//m_screen->hpos();
+ const int vpos = pixel_index / SCREEN_HTOTAL;//m_screen->vpos();
+ const int curr_index = vpos * SCREEN_HTOTAL + hpos;
- draw_scanline(&m_screen_pixbuf[old_vpos * SCREEN_HTOTAL + SCREEN_HSTART]);
+ int last_index = m_last_vpos * SCREEN_HTOTAL + m_last_hpos;
+ if (last_index != curr_index)
+ {
+ m_screen_buf[last_index] *= m_last_fraction;
+ m_screen_buf[last_index] += float(m_last_beam * (1.0 - m_last_fraction));
+ last_index++;
+ while (last_index <= curr_index)
+ m_screen_buf[last_index++] = float(m_last_beam);
+ }
- m_scanline_timer->adjust(m_screen->time_until_pos((m_vpos + 1) % SCREEN_VTOTAL, 0));
+ m_last_beam = float(data);
+ m_last_hpos = hpos;
+ m_last_vpos = vpos;
+ m_last_fraction = pixel_fraction;
}
-void hazl1500_state::draw_scanline(uint32_t *pix)
+WRITE8_MEMBER(hazl1500_state::refresh_address_w)
{
- static const uint32_t palette[4] = { 0xff000000, 0xff006000, 0xff000000, 0xff00c000 };
-
- uint16_t ram_offset = m_refresh_address << 4;
- uint8_t char_row = m_vpos % 11;
- uint8_t recycle = (char_row != 10 ? 0xff : 0x00);
- m_line_buffer_lsb->rc_w(recycle & 0xf);
- m_line_buffer_msb->rc_w(recycle >> 4);
-
- if (recycle == 0)
- m_maincpu->adjust_icount(-LINE_FETCH_CYCLES);
-
- for (uint16_t x = 0; x < 80; x++)
- {
- uint8_t in = 0;
- if (!m_vblank)
- in = m_char_ram[ram_offset + x];
-
- m_line_buffer_lsb->in_w(in & 0xf);
- m_line_buffer_lsb->cp_w(1);
- m_line_buffer_lsb->cp_w(0);
-
- m_line_buffer_msb->in_w(in >> 4);
- m_line_buffer_msb->cp_w(1);
- m_line_buffer_msb->cp_w(0);
-
- const uint8_t chr = (m_line_buffer_msb->out_r() << 4) | m_line_buffer_lsb->out_r();
- const uint16_t chr_addr = (chr & 0x7f) << 4;
- const uint8_t gfx = m_char_rom[chr_addr | char_row];
- const uint8_t bright = (chr & 0x80) >> 6;
-
- *pix++ = palette[0];
- *pix++ = palette[BIT(gfx, 6) | bright];
- *pix++ = palette[BIT(gfx, 5) | bright];
- *pix++ = palette[BIT(gfx, 4) | bright];
- *pix++ = palette[BIT(gfx, 3) | bright];
- *pix++ = palette[BIT(gfx, 2) | bright];
- *pix++ = palette[BIT(gfx, 1) | bright];
- *pix++ = palette[BIT(gfx, 0) | bright];
- *pix++ = palette[0];
- }
+ synchronize();
+ //printf("refresh: %02x, %d, %d\n", data, m_screen->hpos(), m_screen->vpos());
+ m_iowq_timer->adjust(attotime::from_hz(XTAL_18MHz/9));
+ m_cpu_iowq->write(0);
+ m_cpu_ba4->write(0);
+ m_cpu_db0->write((data >> 0) & 1);
+ m_cpu_db1->write((data >> 1) & 1);
+ m_cpu_db2->write((data >> 2) & 1);
+ m_cpu_db3->write((data >> 3) & 1);
+ m_cpu_db4->write((data >> 4) & 1);
+ m_cpu_db5->write((data >> 5) & 1);
+ m_cpu_db6->write((data >> 6) & 1);
+ m_cpu_db7->write((data >> 7) & 1);
}
static ADDRESS_MAP_START(hazl1500_mem, AS_PROGRAM, 8, hazl1500_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x07ff) AM_ROM
- AM_RANGE(0x3000, 0x377f) AM_RAM AM_SHARE(CHARRAM_TAG)
+ AM_RANGE(0x3000, 0x377f) AM_READWRITE(ram_r, ram_w)
AM_RANGE(0x3780, 0x37ff) AM_RAM
ADDRESS_MAP_END
@@ -668,7 +681,7 @@ static const gfx_layout hazl1500_charlayout =
};
static GFXDECODE_START( hazl1500 )
- GFXDECODE_ENTRY( "chargen", 0x0000, hazl1500_charlayout, 0, 1 )
+ GFXDECODE_ENTRY( CHAR_EPROM_TAG, 0x0000, hazl1500_charlayout, 0, 1 )
GFXDECODE_END
static MACHINE_CONFIG_START( hazl1500, hazl1500_state )
@@ -679,11 +692,14 @@ static MACHINE_CONFIG_START( hazl1500, hazl1500_state )
MCFG_QUANTUM_PERFECT_CPU(CPU_TAG)
/* video hardware */
- MCFG_SCREEN_ADD_MONOCHROME(SCREEN_TAG, RASTER, rgb_t::green())
+ MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
MCFG_SCREEN_UPDATE_DRIVER(hazl1500_state, screen_update_hazl1500)
- MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz/2,
- SCREEN_HTOTAL, SCREEN_HSTART, SCREEN_HSTART + SCREEN_HDISP,
- SCREEN_VTOTAL, SCREEN_VSTART, SCREEN_VSTART + SCREEN_VDISP);
+ //MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
+ // SCREEN_HTOTAL, SCREEN_HSTART, SCREEN_HSTART + SCREEN_HDISP,
+ // SCREEN_VTOTAL, SCREEN_VSTART, SCREEN_VSTART + SCREEN_VDISP); // TODO: Figure out exact visibility
+ MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
+ SCREEN_HTOTAL, 0, SCREEN_HTOTAL,
+ SCREEN_VTOTAL, 0, SCREEN_VTOTAL);
MCFG_PALETTE_ADD_MONOCHROME("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", hazl1500)
@@ -693,74 +709,46 @@ static MACHINE_CONFIG_START( hazl1500, hazl1500_state )
MCFG_DEVICE_ADD(UART_TAG, AY51013, 0)
- MCFG_TMS3409_ADD(TMS3409A_TAG)
- MCFG_TMS3409_ADD(TMS3409B_TAG)
-
- MCFG_CLOCK_ADD(DOTCLK_TAG, XTAL_33_264MHz/2)
- MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE(DOTCLK_DISP_TAG, devcb_line_dispatch_device<2>, in_w))
-
- MCFG_LINE_DISPATCH_ADD(DOTCLK_DISP_TAG, 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(U81_TAG, ttl74175_device, clock_w))
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(U88_DIV9_TAG, ttl74161_device, clock_w))
-
- MCFG_74161_ADD(U70_PROMLSB_TAG)
- MCFG_7416x_QA_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a0_w))
- MCFG_7416x_QB_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a1_w))
- MCFG_7416x_QC_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a2_w))
- MCFG_7416x_QD_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a3_w))
- MCFG_7416x_TC_CB(DEVWRITELINE(U70_TC_LINE_TAG, devcb_line_dispatch_device<2>, in_w))
-
- MCFG_LINE_DISPATCH_ADD(U70_TC_LINE_TAG, 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(U69_PROMMSB_TAG, ttl74161_device, cet_w))
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(U69_PROMMSB_TAG, ttl74161_device, cep_w))
-
- MCFG_74161_ADD(U69_PROMMSB_TAG)
- MCFG_7416x_QA_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a4_w))
- MCFG_7416x_QB_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a5_w))
- MCFG_7416x_QC_CB(DEVWRITELINE(U71_PROM_TAG, prom82s129_device, a6_w))
-
- //MCFG_LINE_DISPATCH_ADD(CHAR_LINE_CNT_CLK_TAG, 3)
- //MCFG_LINE_DISPATCH_FWD_CB(0, 3, DEVWRITELINE(U85_VERT_DR_UB_TAG, ttl7473_device, clk1_w))
- //MCFG_LINE_DISPATCH_FWD_CB(1, 3, DEVWRITELINE(U85_VERT_DR_UB_TAG, ttl7473_device, clk2_w))
- //MCFG_LINE_DISPATCH_FWD_CB(2, 3, DEVWRITELINE(U84_DIV11_TAG, ttl74161_device, clock_w))
-
- MCFG_7400_ADD(U83_TAG)
- //MCFG_7400_Y1_CB(DEVWRITELINE(CHAR_LINE_CNT_CLK_TAG, devcb_line_dispatch_device<4>, in_w))
-
- MCFG_74161_ADD(U84_DIV11_TAG)
- MCFG_74161_ADD(U90_DIV14_TAG)
-
- MCFG_74161_ADD(U88_DIV9_TAG)
- MCFG_7416x_QC_CB(DEVWRITELINE(U81_TAG, ttl74175_device, d4_w))
- MCFG_7416x_TC_CB(DEVWRITELINE(U81_TAG, ttl74175_device, d1_w))
-
- MCFG_LINE_DISPATCH_ADD(CHAR_CTR_CLK_TAG, 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(U70_PROMLSB_TAG, ttl74161_device, clock_w))
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(U69_PROMMSB_TAG, ttl74161_device, clock_w))
-
- MCFG_74175_ADD(U58_TAG)
- MCFG_74175_ADD(U68_TAG)
- MCFG_74175_ADD(U81_TAG)
- MCFG_74175_Q1_CB(DEVWRITELINE(U81_TAG, ttl74175_device, d2_w))
- MCFG_74175_NOT_Q2_CB(DEVWRITELINE(CHAR_CTR_CLK_TAG, devcb_line_dispatch_device<2>, in_w))
-
- MCFG_DM9334_ADD(U72_PROMDEC_TAG)
- MCFG_DM9334_Q4_CB(DEVWRITELINE(U83_TAG, ttl7400_device, b1_w))
-
- MCFG_82S129_ADD(U71_PROM_TAG)
- MCFG_82S129_O1_CB(DEVWRITELINE(U72_PROMDEC_TAG, dm9334_device, a0_w))
- MCFG_82S129_O2_CB(DEVWRITELINE(U72_PROMDEC_TAG, dm9334_device, a1_w))
- MCFG_82S129_O3_CB(DEVWRITELINE(U72_PROMDEC_TAG, dm9334_device, a2_w))
- MCFG_82S129_O4_CB(DEVWRITELINE(U72_PROMDEC_TAG, dm9334_device, d_w))
-
- MCFG_7404_ADD(U61_TAG)
- MCFG_7404_ADD(U87_TAG)
- MCFG_7404_ADD(U59_TAG)
- MCFG_7404_Y5_CB(DEVWRITELINE(VID_PROM_ADDR_RESET_TAG, devcb_line_dispatch_device<2>, in_w))
-
- MCFG_LINE_DISPATCH_ADD(VID_PROM_ADDR_RESET_TAG, 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(U70_PROMLSB_TAG, ttl74161_device, pe_w))
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(U69_PROMMSB_TAG, ttl74161_device, pe_w))
+ MCFG_DEVICE_ADD(NETLIST_TAG, NETLIST_CPU, VIDEOBRD_CLOCK)
+ MCFG_NETLIST_SETUP(hazelvid)
+
+ MCFG_NETLIST_ROM_REGION(NETLIST_TAG, VIDEO_PROM_TAG, VIDEO_PROM_TAG, "u90_702128_82s129.bin", 0x0000, 0x0100)
+ MCFG_NETLIST_ROM_REGION(NETLIST_TAG, CHAR_EPROM_TAG, CHAR_EPROM_TAG, "u83_chr.bin", 0x0000, 0x0800)
+
+ // First 1K
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u22", "u22")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u23", "u23")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u24", "u24")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u25", "u25")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u26", "u26")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u27", "u27")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u28", "u28")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u29", "u29")
+
+ // Second 1K
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u9", "u9")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u10", "u10")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u11", "u11")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u12", "u12")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u13", "u13")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u14", "u14")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u15", "u15")
+ MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u16", "u16")
+
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_iowq", "cpu_iowq.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_ba4", "cpu_ba4.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db0", "cpu_db0.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db1", "cpu_db1.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db2", "cpu_db2.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db3", "cpu_db3.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db4", "cpu_db4.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db5", "cpu_db5.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db6", "cpu_db6.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db7", "cpu_db7.IN", 0)
+
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "video_out", "video_out", hazl1500_state, video_out_cb, "")
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "vblank", "vblank", hazl1500_state, vblank_cb, "")
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "tvinterq", "tvinterq", hazl1500_state, tvinterq_cb, "")
/* keyboard controller */
MCFG_DEVICE_ADD(KBDC_TAG, AY3600, 0)
@@ -780,16 +768,18 @@ MACHINE_CONFIG_END
ROM_START( hazl1500 )
+ ROM_REGION( 0x10000, NETLIST_TAG, ROMREGION_ERASE00 )
+
ROM_REGION( 0x10000, CPU_TAG, ROMREGION_ERASEFF )
ROM_LOAD( "h15s-00I-10-3.bin", 0x0000, 0x0800, CRC(a2015f72) SHA1(357cde517c3dcf693de580881add058c7b26dfaa))
- ROM_REGION( 0x800, CHARROM_TAG, ROMREGION_ERASEFF )
+ ROM_REGION( 0x800, CHAR_EPROM_TAG, ROMREGION_ERASEFF )
ROM_LOAD( "u83_chr.bin", 0x0000, 0x0800, CRC(e0c6b734) SHA1(7c42947235c66c41059fd4384e09f4f3a17c9857))
ROM_REGION( 0x100, BAUD_PROM_TAG, ROMREGION_ERASEFF )
ROM_LOAD( "u43_702129_82s129.bin", 0x0000, 0x0100, CRC(b35aea2b) SHA1(4702620cdef72b32a397580c22b75df36e24ac74))
- ROM_REGION( 0x100, U71_PROM_TAG, ROMREGION_ERASEFF )
+ ROM_REGION( 0x100, VIDEO_PROM_TAG, ROMREGION_ERASEFF )
ROM_LOAD( "u90_702128_82s129.bin", 0x0000, 0x0100, CRC(277bc424) SHA1(528a0de3b54d159bc14411961961706bf9ec41bf))
ROM_END
diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp
index 29286a18b69..28be622fcbf 100644
--- a/src/mame/drivers/hh_cop400.cpp
+++ b/src/mame/drivers/hh_cop400.cpp
@@ -6,9 +6,7 @@
mostly LED electronic games/toys.
TODO:
- - non-working games are due to MCU emulation bugs?
- - better not start on visually dumped games before other games are working
- (due to possible dump errors, hard to distinguish between that or MCU bug)
+ - why does h2hbaskb need a workaround on writing L pins?
***************************************************************************/
@@ -281,7 +279,6 @@ WRITE8_MEMBER(ctstein_state::write_l)
{
// L0-L3: button lamps (strobed)
display_matrix(4, 1, data & 0xf, 1);
- display_matrix(4, 1, 0, 0);
}
READ8_MEMBER(ctstein_state::read_l)
@@ -612,7 +609,7 @@ WRITE8_MEMBER(funjacks_state::write_d)
{
// D: led grid + input mux
m_inp_mux = data;
- m_d = data ^ 0xf;
+ m_d = ~data & 0xf;
display_matrix(2, 4, m_l, m_d);
}
@@ -633,7 +630,7 @@ WRITE8_MEMBER(funjacks_state::write_g)
READ8_MEMBER(funjacks_state::read_l)
{
// L4,L5: multiplexed inputs
- return read_inputs(3) & 0x30;
+ return (read_inputs(3) & 0x30) | m_l;
}
READ8_MEMBER(funjacks_state::read_g)
@@ -648,16 +645,16 @@ READ8_MEMBER(funjacks_state::read_g)
static INPUT_PORTS_START( funjacks )
PORT_START("IN.0") // D0 port G
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_START("IN.1") // D1 port G
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON4 )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON5 )
PORT_START("IN.2") // D2 port G
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) // positioned at 1 o'clock on panel, increment clockwise
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON6 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) // positioned at 1 o'clock on panel, increment clockwise
PORT_START("IN.3") // port G
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
@@ -671,8 +668,8 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( funjacks, funjacks_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=47K, C=56pf
- MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
+ MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=47K, C=56pf
+ MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_8, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
MCFG_COP400_WRITE_D_CB(WRITE8(funjacks_state, write_d))
MCFG_COP400_WRITE_L_CB(WRITE8(funjacks_state, write_l))
MCFG_COP400_WRITE_G_CB(WRITE8(funjacks_state, write_g))
@@ -718,6 +715,7 @@ public:
DECLARE_WRITE8_MEMBER(write_d);
DECLARE_WRITE8_MEMBER(write_l);
DECLARE_WRITE8_MEMBER(write_g);
+ DECLARE_READ8_MEMBER(read_l_tristate) { return 0xff; }
DECLARE_INPUT_CHANGED_MEMBER(reset_button);
};
@@ -727,7 +725,7 @@ public:
WRITE8_MEMBER(funrlgl_state::write_d)
{
// D: led grid
- m_d = data ^ 0xf;
+ m_d = ~data & 0xf;
display_matrix(4, 4, m_l, m_d);
}
@@ -735,7 +733,7 @@ WRITE8_MEMBER(funrlgl_state::write_l)
{
// L0-L3: led state
// L4-L7: N/C
- m_l = data & 0xf;
+ m_l = ~data & 0xf;
display_matrix(4, 4, m_l, m_d);
}
@@ -771,10 +769,11 @@ INPUT_CHANGED_MEMBER(funrlgl_state::reset_button)
static MACHINE_CONFIG_START( funrlgl, funrlgl_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=51K, C=91pf
- MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
+ MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K, C=91pf
+ MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_8, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
MCFG_COP400_WRITE_D_CB(WRITE8(funrlgl_state, write_d))
MCFG_COP400_WRITE_L_CB(WRITE8(funrlgl_state, write_l))
+ MCFG_COP400_READ_L_TRISTATE_CB(READ8(funrlgl_state, read_l_tristate))
MCFG_COP400_WRITE_G_CB(WRITE8(funrlgl_state, write_g))
MCFG_COP400_READ_G_CB(IOPORT("IN.0"))
@@ -843,7 +842,7 @@ static MACHINE_CONFIG_START( plus1, plus1_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K, C=100pf
- MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
+ MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
MCFG_COP400_WRITE_D_CB(WRITE8(plus1_state, write_d))
MCFG_COP400_READ_G_CB(IOPORT("IN.0"))
MCFG_COP400_READ_L_CB(IOPORT("IN.1"))
@@ -1152,7 +1151,8 @@ MACHINE_CONFIG_END
National Semiconductor QuizKid Racer (COP420 version)
* COP420 MCU label COP420-NPG/N
-
+ * 8-digit 7seg led display(1 custom digit), 1 green led, no sound
+
This is the COP420 version, the first release was on a MM5799 MCU.
***************************************************************************/
@@ -1186,23 +1186,22 @@ WRITE8_MEMBER(qkracer_state::write_d)
{
// D: select digit, D3: input mux high bit
m_inp_mux = (m_inp_mux & 0xf) | (data << 1 & 0x10);
- m_d = data;
+ m_d = data & 0xf;
+ prepare_display();
}
WRITE8_MEMBER(qkracer_state::write_g)
{
// G: select digit, input mux
m_inp_mux = (m_inp_mux & 0x10) | (data & 0xf);
- m_g = data;
+ m_g = data & 0xf;
+ prepare_display();
}
WRITE8_MEMBER(qkracer_state::write_l)
{
// L0-L6: digit segment data
- // strobe display
- m_l = data;
- prepare_display();
- m_l = 0;
+ m_l = data & 0x7f;
prepare_display();
}
@@ -1341,10 +1340,10 @@ CONS( 1979, ctstein, 0, 0, ctstein, ctstein, driver_device, 0, "Cas
CONS( 1980, h2hbaskb, 0, 0, h2hbaskb, h2hbaskb, driver_device, 0, "Coleco", "Head to Head Basketball/Hockey/Soccer (COP420L version)", MACHINE_SUPPORTS_SAVE )
-CONS( 1981, einvaderc, einvader, 0, einvaderc, einvaderc, driver_device, 0, "Entex", "Space Invader (Entex, COP444L version)", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK | MACHINE_NOT_WORKING )
+CONS( 1981, einvaderc, einvader, 0, einvaderc, einvaderc, driver_device, 0, "Entex", "Space Invader (Entex, COP444L version)", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK )
-CONS( 1979, funjacks, 0, 0, funjacks, funjacks, driver_device, 0, "Mattel", "Funtronics Jacks", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
-CONS( 1979, funrlgl, 0, 0, funrlgl, funrlgl, driver_device, 0, "Mattel", "Funtronics Red Light Green Light", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
+CONS( 1979, funjacks, 0, 0, funjacks, funjacks, driver_device, 0, "Mattel", "Funtronics Jacks", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1979, funrlgl, 0, 0, funrlgl, funrlgl, driver_device, 0, "Mattel", "Funtronics Red Light Green Light", MACHINE_SUPPORTS_SAVE )
CONS( 1980, plus1, 0, 0, plus1, plus1, driver_device, 0, "Milton Bradley", "Plus One", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // ***
CONS( 1981, lightfgt, 0, 0, lightfgt, lightfgt, driver_device, 0, "Milton Bradley", "Lightfight", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/drivers/homedata.cpp b/src/mame/drivers/homedata.cpp
index 2ba700e76ae..7e1d20f465b 100644
--- a/src/mame/drivers/homedata.cpp
+++ b/src/mame/drivers/homedata.cpp
@@ -1625,6 +1625,31 @@ ROM_START( mjclinic )
ROM_LOAD( "x80_a08.13a", 0x0000, 0x20000, CRC(174e8ec0) SHA1(a5075fe4bba9403ef9e0636d5f3f66aad8b2bc54) )
ROM_END
+ROM_START( mjclinica )
+ ROM_REGION( 0x010000, "maincpu", 0 ) /* 6809 Code */
+ ROM_LOAD( "x80_f01.6g", 0x08000, 0x8000, CRC(cd814ec0) SHA1(55b2c9519fc98f71a2731c3851ce56ee8e57bd66) ) // labeled f01 instead of g01. Earlier version?
+
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 code */
+ ROM_LOAD( "x80_a10.11k", 0x00000, 0x20000, CRC(afedbadf) SHA1(e2f101b59c0d23f9dc9b057c41d496fc3223cbb8) )
+ ROM_RELOAD( 0x10000, 0x20000 )
+
+ ROM_REGION( 0x20000, "gfx1", 0 )
+ ROM_LOAD( "x80_a03.1g", 0, 0x20000, CRC(34b63c89) SHA1(98383ce8e464ecc53677c060338cc03aa6238a0e) )
+
+ ROM_REGION( 0x80000, "gfx2", 0 )
+ ROM_LOAD( "x80_a040.bin", 0x00000, 0x20000, CRC(6f18a8cf) SHA1(af8de2bd8b2157ceaa8192ead51ac4489c464ab2) )
+ ROM_LOAD( "x80_a050.bin", 0x20000, 0x20000, CRC(6b1ec3a9) SHA1(dc7a857bb102325ebf2522369a231260c2e02c89) )
+ ROM_LOAD( "x80_a041.bin", 0x40000, 0x20000, CRC(f70bb001) SHA1(3b29bb0bd155e97d3ccc72a8a07046c676c8452d) )
+ ROM_LOAD( "x80_a051.bin", 0x60000, 0x20000, CRC(c7469cb8) SHA1(bcf7021667e943991865fdbc9620f00b09e1db3e) )
+
+ ROM_REGION( 0x010000, "proms", 0 ) /* static palette */
+ ROM_LOAD16_BYTE( "x80_a06.1l", 0x00000, 0x8000, CRC(c1f9b2fb) SHA1(abe17e2b3b880f91564e32c246116c33e2884889) )
+ ROM_LOAD16_BYTE( "x80_a07.1m", 0x00001, 0x8000, CRC(e3120152) SHA1(b4a778a9b91e204e2c068dff9a40bd29eccf04a5) )
+
+ ROM_REGION( 0x20000, "user1", 0 ) /* blitter data */
+ ROM_LOAD( "x80_a08.13a", 0x0000, 0x20000, CRC(174e8ec0) SHA1(a5075fe4bba9403ef9e0636d5f3f66aad8b2bc54) )
+ROM_END
+
ROM_START( mrokumei )
ROM_REGION( 0x010000, "maincpu", 0 ) /* 6809 Code */
ROM_LOAD( "m81d01.bin", 0x08000, 0x8000, CRC(6f81a78a) SHA1(5e16327b04b065ed4e39a147b18711902dba6384) )
@@ -2038,24 +2063,25 @@ DRIVER_INIT_MEMBER(homedata_state,mirderby)
}
-GAME( 1987, hourouki, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Part 1 - Seisyun Hen (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
-GAME( 1987, mhgaiden, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Gaiden (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1988, mjhokite, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Okite (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1988, mjclinic, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Clinic (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1988, mrokumei, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Rokumeikan (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
+GAME( 1987, hourouki, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Part 1 - Seisyun Hen (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
+GAME( 1987, mhgaiden, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Gaiden (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, mjhokite, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Hourouki Okite (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, mjclinic, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Clinic (Japan, set 1)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, mjclinica, mjclinic, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Clinic (Japan, set 2)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, mrokumei, 0, mrokumei, mjhokite, driver_device, 0, ROT0, "Home Data", "Mahjong Rokumeikan (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
-GAME( 1988, reikaids, 0, reikaids, reikaids, homedata_state, reikaids, ROT0, "Home Data", "Reikai Doushi (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1991, battlcry, 0, reikaids, battlcry, homedata_state, battlcry, ROT0, "Home Data", "Battlecry", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
-GAME( 1989, mjkojink, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Kojinkyouju (Private Teacher) (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1988, mjjoship, 0, pteacher, mjjoship, driver_device, 0, ROT0, "Home Data", "Mahjong Joshi Pro-wres -Give up 5 byou mae- (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, vitaminc, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Vitamin C (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, mjyougo, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong-yougo no Kisotairyoku (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1991, mjkinjas, 0, mjkinjas, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Kinjirareta Asobi (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1992?,jogakuen, 0, pteacher, jogakuen, homedata_state, jogakuen, ROT0, "Windom", "Mahjong Jogakuen (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, reikaids, 0, reikaids, reikaids, homedata_state, reikaids, ROT0, "Home Data", "Reikai Doushi (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1991, battlcry, 0, reikaids, battlcry, homedata_state, battlcry, ROT0, "Home Data", "Battlecry", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
+GAME( 1989, mjkojink, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Kojinkyouju (Private Teacher) (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, mjjoship, 0, pteacher, mjjoship, driver_device, 0, ROT0, "Home Data", "Mahjong Joshi Pro-wres -Give up 5 byou mae- (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, vitaminc, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Vitamin C (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, mjyougo, 0, pteacher, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong-yougo no Kisotairyoku (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1991, mjkinjas, 0, mjkinjas, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Kinjirareta Asobi (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1992?,jogakuen, 0, pteacher, jogakuen, homedata_state, jogakuen, ROT0, "Windom", "Mahjong Jogakuen (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1990, lemnangl, 0, lemnangl, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Lemon Angel (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1991, mjprivat, 0, lemnangl, pteacher, driver_device, 0, ROT0, "Matoba", "Mahjong Private (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1990, lemnangl, 0, lemnangl, pteacher, driver_device, 0, ROT0, "Home Data", "Mahjong Lemon Angel (Japan)", MACHINE_SUPPORTS_SAVE )
+GAME( 1991, mjprivat, 0, lemnangl, pteacher, driver_device, 0, ROT0, "Matoba", "Mahjong Private (Japan)", MACHINE_SUPPORTS_SAVE )
-GAME( 1991?,mjikaga, 0, lemnangl, mjikaga, homedata_state, mjikaga, ROT0, "Mitchell", "Mahjong Ikaga Desu ka (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
+GAME( 1991?,mjikaga, 0, lemnangl, mjikaga, homedata_state, mjikaga, ROT0, "Mitchell", "Mahjong Ikaga Desu ka (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
-GAME( 1988, mirderby, 0, mirderby, mirderby, homedata_state, mirderby, ROT0, "Home Data?", "Miracle Derby - Ascot", MACHINE_NO_SOUND|MACHINE_NOT_WORKING )
+GAME( 1988, mirderby, 0, mirderby, mirderby, homedata_state, mirderby, ROT0, "Home Data?", "Miracle Derby - Ascot", MACHINE_NO_SOUND|MACHINE_NOT_WORKING )
diff --git a/src/mame/drivers/ibmpc.cpp b/src/mame/drivers/ibmpc.cpp
index a5b26b88854..0e3db41f1eb 100644
--- a/src/mame/drivers/ibmpc.cpp
+++ b/src/mame/drivers/ibmpc.cpp
@@ -352,7 +352,6 @@ static MACHINE_CONFIG_START( ibm5160, ibmpc_state )
/* software lists */
MCFG_SOFTWARE_LIST_ADD("pc_disk_list","ibm5150")
- MCFG_SOFTWARE_LIST_ADD("xt_disk_list","ibm5160_flop")
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/imolagp.cpp b/src/mame/drivers/imolagp.cpp
index 5d490f09009..d1ec0167b0b 100644
--- a/src/mame/drivers/imolagp.cpp
+++ b/src/mame/drivers/imolagp.cpp
@@ -501,8 +501,8 @@ static MACHINE_CONFIG_START( imolagp, imolagp_state )
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)
// mode $91 - ports A & C-lower as input, ports B & C-upper as output
MCFG_I8255_IN_PORTA_CB(IOPORT("IN0"))
- MCFG_I8255_IN_PORTB_CB(LOGGER("PPI8255 - unmapped read port B", 0))
- MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B", 0))
+ MCFG_I8255_IN_PORTB_CB(LOGGER("PPI8255 - unmapped read port B"))
+ MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B"))
MCFG_I8255_IN_PORTC_CB(IOPORT("IN1"))
/* video hardware */
diff --git a/src/mame/drivers/iteagle.cpp b/src/mame/drivers/iteagle.cpp
index 79c605cc60a..6d67650daae 100644
--- a/src/mame/drivers/iteagle.cpp
+++ b/src/mame/drivers/iteagle.cpp
@@ -183,7 +183,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gtfore01, iteagle )
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
- MCFG_ITEAGLE_FPGA_INIT(0x00000401, 0x0b0b0b)
+ MCFG_ITEAGLE_FPGA_INIT(0x01000401, 0x0b0b0b)
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
MCFG_ITEAGLE_EEPROM_INIT(0x0401, 0x7)
MACHINE_CONFIG_END
@@ -290,8 +290,8 @@ static INPUT_PORTS_START( iteagle )
PORT_BIT( 0xfe00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("SYSTEM")
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_TILT ) PORT_NAME( "Test" )
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE )
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME( "Service" )
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x000c, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_DIPNAME( 0x0010, 0x00, "SW51-1" )
PORT_DIPSETTING(0x00, "Normal" )
diff --git a/src/mame/drivers/joctronic.cpp b/src/mame/drivers/joctronic.cpp
index 368dafccd58..9cb6902cb3e 100644
--- a/src/mame/drivers/joctronic.cpp
+++ b/src/mame/drivers/joctronic.cpp
@@ -2,67 +2,392 @@
// copyright-holders:Ivan Vangelista
// PINBALL
// Skeleton driver for Joctronic pinballs.
-// Known pinballs to be dumped: Rider's Surf (1986), Pin Ball (1987)
-// ROM definitions from PinMAME.
-#include "machine/genpin.h"
+#include "emu.h"
#include "cpu/z80/z80.h"
+#include "machine/74157.h"
+#include "machine/nvram.h"
#include "machine/z80ctc.h"
#include "sound/ay8910.h"
+#include "sound/dac.h"
+#include "sound/msm5205.h"
-class joctronic_state : public genpin_class
+class joctronic_state : public driver_device
{
public:
joctronic_state(const machine_config &mconfig, device_type type, const char *tag)
- : genpin_class(mconfig, type, tag)
- , m_maincpu(*this, "maincpu") { }
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_soundcpu(*this, "soundcpu")
+ , m_oki(*this, "oki")
+ , m_adpcm_select(*this, "adpcm_select")
+ , m_soundbank(*this, "soundbank")
+ { }
+
+ DECLARE_READ8_MEMBER(csin_r);
+ DECLARE_WRITE8_MEMBER(control_port_w);
+ DECLARE_WRITE8_MEMBER(display_1_w);
+ DECLARE_WRITE8_MEMBER(display_2_w);
+ DECLARE_WRITE8_MEMBER(display_3_w);
+ DECLARE_WRITE8_MEMBER(display_4_w);
+ DECLARE_WRITE8_MEMBER(display_a_w);
+ DECLARE_WRITE8_MEMBER(drivers_l_w);
+ DECLARE_WRITE8_MEMBER(drivers_b_w);
+ DECLARE_WRITE8_MEMBER(drivers_a_w);
+
+ DECLARE_READ8_MEMBER(inputs_r);
+ DECLARE_READ8_MEMBER(ports_r);
+ DECLARE_READ8_MEMBER(csint_r);
+ DECLARE_WRITE8_MEMBER(display_strobe_w);
+ DECLARE_WRITE8_MEMBER(drivers_w);
+ DECLARE_WRITE8_MEMBER(display_ck_w);
+
+ DECLARE_READ8_MEMBER(bldyrolr_unknown_r);
+ DECLARE_WRITE8_MEMBER(bldyrolr_unknown_w);
+
+ DECLARE_WRITE8_MEMBER(soundlatch_nmi_w);
+ DECLARE_WRITE8_MEMBER(soundlatch_nmi_pulse_w);
+ DECLARE_READ8_MEMBER(soundlatch_r);
+ DECLARE_READ8_MEMBER(soundlatch_nmi_r);
+ DECLARE_WRITE8_MEMBER(resint_w);
+ DECLARE_WRITE8_MEMBER(slalom03_oki_bank_w);
+ DECLARE_WRITE_LINE_MEMBER(vclk_w);
+
+ virtual void machine_start() override;
+ virtual void machine_reset() override;
private:
required_device<cpu_device> m_maincpu;
+ required_device<cpu_device> m_soundcpu;
+ optional_device<msm5205_device> m_oki;
+ optional_device<ls157_device> m_adpcm_select;
+ optional_memory_bank m_soundbank;
+ u8 m_soundlatch;
+ bool m_adpcm_toggle;
};
+READ8_MEMBER(joctronic_state::csin_r)
+{
+ logerror("csin_r[%d] read\n", offset);
+ return 0xff;
+}
+
+WRITE8_MEMBER(joctronic_state::control_port_w)
+{
+ logerror("control_port[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_1_w)
+{
+ logerror("display_1[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_2_w)
+{
+ logerror("display_2[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_3_w)
+{
+ logerror("display_3[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_4_w)
+{
+ logerror("display_4[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_a_w)
+{
+ logerror("display_a[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::drivers_l_w)
+{
+ logerror("drivers_l[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::drivers_b_w)
+{
+ logerror("drivers_b[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::drivers_a_w)
+{
+ logerror("drivers_a[%d] = $%02X\n", offset, data);
+}
+
static ADDRESS_MAP_START( maincpu_map, AS_PROGRAM, 8, joctronic_state )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x3fff) AM_ROM
- AM_RANGE(0x8000, 0x87ff) AM_RAM
+ AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x4000) AM_ROM
+ AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0800) AM_RAM AM_SHARE("nvram")
+ AM_RANGE(0x9000, 0x9007) AM_MIRROR(0x0ff8) AM_READ(csin_r) // CSIN
+ AM_RANGE(0xa000, 0xa007) AM_MIRROR(0x0ff8) AM_WRITE(control_port_w) // PORTDS
+ AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x0fc7) AM_WRITE(display_1_w) // CSD1
+ AM_RANGE(0xc008, 0xc008) AM_MIRROR(0x0fc7) AM_WRITE(display_2_w) // CSD2
+ AM_RANGE(0xc010, 0xc010) AM_MIRROR(0x0fc7) AM_WRITE(display_3_w) // CSD3
+ AM_RANGE(0xc018, 0xc018) AM_MIRROR(0x0fc7) AM_WRITE(display_4_w) // CSD4
+ AM_RANGE(0xc020, 0xc020) AM_MIRROR(0x0fc7) AM_WRITE(display_a_w) // CSDA
+ AM_RANGE(0xc028, 0xc02f) AM_MIRROR(0x0fc0) AM_WRITE(drivers_l_w) // OL
+ AM_RANGE(0xc030, 0xc037) AM_MIRROR(0x0fc0) AM_WRITE(drivers_b_w) // OB
+ AM_RANGE(0xc038, 0xc03f) AM_MIRROR(0x0fc0) AM_WRITE(drivers_a_w) // OA
+ AM_RANGE(0xe000, 0xe000) AM_MIRROR(0x0fff) AM_WRITE(soundlatch_nmi_w) // PSON
ADDRESS_MAP_END
-static ADDRESS_MAP_START( maincpu_io_map, AS_IO, 8, joctronic_state )
+READ8_MEMBER(joctronic_state::inputs_r)
+{
+ return 0xff;
+}
+
+READ8_MEMBER(joctronic_state::ports_r)
+{
+ return 0xff;
+}
+
+READ8_MEMBER(joctronic_state::csint_r)
+{
+ logerror("csint_r[%d] read\n", offset);
+ return 0xff;
+}
+
+WRITE8_MEMBER(joctronic_state::display_strobe_w)
+{
+ logerror("display_strobe[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::drivers_w)
+{
+ logerror("drivers[%d] = $%02X\n", offset, data);
+}
+
+WRITE8_MEMBER(joctronic_state::display_ck_w)
+{
+ logerror("display_ck[%d] = $%02X\n", offset, data);
+}
+
+static ADDRESS_MAP_START( slalom03_maincpu_map, AS_PROGRAM, 8, joctronic_state )
ADDRESS_MAP_UNMAP_HIGH
+ AM_RANGE(0x0000, 0x7fff) AM_ROM
+ AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0800) AM_RAM AM_SHARE("nvram")
+ AM_RANGE(0x9000, 0x9007) AM_MIRROR(0x0ff8) AM_WRITE(control_port_w) // CSPORT
+ AM_RANGE(0xa008, 0xa008) AM_MIRROR(0x0fc7) AM_WRITE(display_strobe_w) // STROBE
+ AM_RANGE(0xa010, 0xa017) AM_MIRROR(0x0fc0) AM_WRITE(drivers_w)
+ AM_RANGE(0xa018, 0xa018) AM_MIRROR(0x0fc7) AM_WRITE(display_ck_w) // CKD
+ AM_RANGE(0xa020, 0xa020) AM_MIRROR(0x0fc7) AM_READ(inputs_r) // CSS
+ AM_RANGE(0xa028, 0xa028) AM_MIRROR(0x0fc7) AM_READNOP // N.C.
+ AM_RANGE(0xa030, 0xa030) AM_MIRROR(0x0fc7) AM_READNOP // N.C.
+ AM_RANGE(0xa038, 0xa038) AM_MIRROR(0x0fc7) AM_READ(ports_r) // CSP
+ AM_RANGE(0xe000, 0xe000) AM_MIRROR(0x0fff) AM_READ(csint_r) // CSINT
+ AM_RANGE(0xf000, 0xf000) AM_MIRROR(0x0fff) AM_WRITE(soundlatch_nmi_pulse_w) // CSSON
ADDRESS_MAP_END
-static ADDRESS_MAP_START( audiocpu_map, AS_PROGRAM, 8, joctronic_state )
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x3fff) AM_ROM
- AM_RANGE(0x8000, 0x87ff) AM_RAM
+READ8_MEMBER(joctronic_state::bldyrolr_unknown_r)
+{
+ logerror("bldyrolr_unknown read\n");
+ return 0xff;
+}
+
+WRITE8_MEMBER(joctronic_state::bldyrolr_unknown_w)
+{
+ logerror("bldyrolr_unknown = $%02X\n", data);
+}
+
+static ADDRESS_MAP_START( bldyrolr_maincpu_map, AS_PROGRAM, 8, joctronic_state )
+ AM_RANGE(0xc000, 0xc000) AM_READWRITE(bldyrolr_unknown_r, bldyrolr_unknown_w)
+ AM_IMPORT_FROM(slalom03_maincpu_map)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( audiocpu_io_map, AS_IO, 8, joctronic_state )
- ADDRESS_MAP_UNMAP_HIGH
+static ADDRESS_MAP_START( maincpu_io_map, AS_IO, 8, joctronic_state )
+ ADDRESS_MAP_GLOBAL_MASK(0x03)
+ AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
+ADDRESS_MAP_END
+
+WRITE8_MEMBER(joctronic_state::soundlatch_nmi_w)
+{
+ m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+ m_soundlatch = data;
+}
+
+WRITE8_MEMBER(joctronic_state::soundlatch_nmi_pulse_w)
+{
+ m_soundcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
+ m_soundlatch = data;
+}
+
+READ8_MEMBER(joctronic_state::soundlatch_r)
+{
+ return m_soundlatch;
+}
+
+READ8_MEMBER(joctronic_state::soundlatch_nmi_r)
+{
+ m_soundcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
+ return m_soundlatch;
+}
+
+WRITE8_MEMBER(joctronic_state::resint_w)
+{
+ // acknowledge INTR by clearing flip-flop
+ m_soundcpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
+}
+
+WRITE8_MEMBER(joctronic_state::slalom03_oki_bank_w)
+{
+ m_soundbank->set_entry((data & 0xc0) >> 6);
+ m_oki->playmode_w(BIT(data, 1) ? MSM5205_S48_4B : MSM5205_S96_4B); // to S1 on MSM5205
+ m_oki->reset_w(BIT(data, 0));
+}
+
+WRITE_LINE_MEMBER(joctronic_state::vclk_w)
+{
+ m_adpcm_toggle = !m_adpcm_toggle;
+ m_adpcm_select->select_w(m_adpcm_toggle);
+ if (m_adpcm_toggle)
+ m_soundcpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
+}
+
+static ADDRESS_MAP_START( joctronic_sound_map, AS_PROGRAM, 8, joctronic_state )
+ AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x4000) AM_ROM
+ AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x1800) AM_RAM // only lower half of 2016 used?
+ AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x1fff) AM_READ(soundlatch_nmi_r) // SCSP
+ AM_RANGE(0xe000, 0xe000) AM_MIRROR(0x1fff) AM_WRITE(resint_w)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( joctronic_sound_io_map, AS_IO, 8, joctronic_state )
+ ADDRESS_MAP_GLOBAL_MASK(0x03)
+ AM_RANGE(0x00, 0x00) AM_DEVWRITE("aysnd1", ay8910_device, address_w)
+ AM_RANGE(0x01, 0x01) AM_DEVWRITE("aysnd1", ay8910_device, data_w)
+ AM_RANGE(0x02, 0x02) AM_DEVWRITE("aysnd2", ay8910_device, address_w)
+ AM_RANGE(0x03, 0x03) AM_DEVWRITE("aysnd2", ay8910_device, data_w)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( slalom03_sound_map, AS_PROGRAM, 8, joctronic_state )
+ AM_RANGE(0x0000, 0x7fff) AM_ROM
+ AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank")
+ AM_RANGE(0xc000, 0xc7ff) AM_MIRROR(0x3800) AM_RAM // only lower half of 2016 used?
ADDRESS_MAP_END
+static ADDRESS_MAP_START( slalom03_sound_io_map, AS_IO, 8, joctronic_state )
+ ADDRESS_MAP_GLOBAL_MASK(0x07)
+ AM_RANGE(0x00, 0x00) AM_DEVWRITE("aysnd1", ay8910_device, address_w)
+ AM_RANGE(0x01, 0x01) AM_DEVWRITE("aysnd1", ay8910_device, data_w)
+ AM_RANGE(0x02, 0x02) AM_DEVWRITE("aysnd2", ay8910_device, address_w)
+ AM_RANGE(0x03, 0x03) AM_DEVWRITE("aysnd2", ay8910_device, data_w)
+ AM_RANGE(0x04, 0x04) AM_MIRROR(0x01) AM_READ(soundlatch_r) // CSPORT
+ AM_RANGE(0x06, 0x06) AM_MIRROR(0x01) AM_WRITE(resint_w) // RESINT
+ADDRESS_MAP_END
+
+static const z80_daisy_config daisy_chain[] =
+{
+ { "ctc" },
+ { nullptr }
+};
+
+void joctronic_state::machine_start()
+{
+ m_soundlatch = 0;
+ save_item(NAME(m_soundlatch));
+
+ if (m_soundbank.found())
+ {
+ m_soundbank->configure_entries(0, 4, &(static_cast<u8 *>(memregion("soundcpu")->base()))[0x8000], 0x4000);
+
+ save_item(NAME(m_adpcm_toggle));
+ }
+}
+
+void joctronic_state::machine_reset()
+{
+ if (m_adpcm_select.found())
+ {
+ m_adpcm_toggle = false;
+ m_adpcm_select->select_w(0);
+ }
+}
+
static INPUT_PORTS_START( joctronic )
INPUT_PORTS_END
static MACHINE_CONFIG_START( joctronic, joctronic_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 3000000)
- MCFG_CPU_PROGRAM_MAP(maincpu_map)
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/4) // 3 MHz - uses WAIT
+ MCFG_CPU_PROGRAM_MAP(maincpu_map) // 139
+ MCFG_CPU_IO_MAP(maincpu_io_map)
+ MCFG_Z80_DAISY_CHAIN(daisy_chain)
+
+ MCFG_CPU_ADD("soundcpu", Z80, XTAL_12MHz/2) // 6 MHz - uses WAIT
+ MCFG_CPU_PROGRAM_MAP(joctronic_sound_map)
+ MCFG_CPU_IO_MAP(joctronic_sound_io_map)
+
+ MCFG_NVRAM_ADD_0FILL("nvram") // 5516
+
+ MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_12MHz/4) // 3 MHz
+ MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
+ MCFG_Z80CTC_ZC0_CB(ASSERTLINE("soundcpu", INPUT_LINE_IRQ0)) // SINT
+
+ /* sound hardware */
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ // Datasheet suggests YM2203 as a possible replacement for this AY8910
+ MCFG_SOUND_ADD("aysnd1", AY8910, XTAL_12MHz/8) // 1.5 MHz
+ MCFG_AY8910_PORT_A_WRITE_CB(DEVWRITE8("r2r1", dac_8bit_r2r_device, write))
+ MCFG_AY8910_PORT_B_WRITE_CB(DEVWRITE8("r2r2", dac_8bit_r2r_device, write))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_SOUND_ADD("aysnd2", AY8910, XTAL_12MHz/8) // 1.5 MHz
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_SOUND_ADD("r2r1", DAC_8BIT_R2R, 0)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+
+ MCFG_SOUND_ADD("r2r2", DAC_8BIT_R2R, 0)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_START( slalom03, joctronic_state )
+ /* basic machine hardware */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) // 6 MHz - uses WAIT
+ MCFG_CPU_PROGRAM_MAP(slalom03_maincpu_map) // 138, 368, 32
MCFG_CPU_IO_MAP(maincpu_io_map)
+ MCFG_Z80_DAISY_CHAIN(daisy_chain)
- MCFG_CPU_ADD("audiocpu", Z80, 3000000)
- MCFG_CPU_PROGRAM_MAP(audiocpu_map)
- MCFG_CPU_IO_MAP(audiocpu_io_map)
+ MCFG_CPU_ADD("soundcpu", Z80, XTAL_12MHz/2) // 6 MHz - uses WAIT
+ MCFG_CPU_PROGRAM_MAP(slalom03_sound_map)
+ MCFG_CPU_IO_MAP(slalom03_sound_io_map)
- //z80ctc
+ MCFG_NVRAM_ADD_0FILL("nvram") // 5516
- /* video hardware */
- //MCFG_DEFAULT_LAYOUT()
+ MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_12MHz/2) // 6 MHz
+ MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
+ //MCFG_Z80CTC_ZC0_CB(ASSERTLINE("soundcpu", INPUT_LINE_IRQ0)) // SINT
/* sound hardware */
- //ay8910
- //dac
- MCFG_FRAGMENT_ADD( genpin_audio )
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("aysnd1", AY8910, XTAL_12MHz/8) // 1.5 MHz
+ MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(joctronic_state, slalom03_oki_bank_w))
+ MCFG_AY8910_PORT_B_WRITE_CB(DEVWRITE8("adpcm_select", ls157_device, ba_w))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_SOUND_ADD("aysnd2", AY8910, XTAL_12MHz/8) // 1.5 MHz
+ MCFG_AY8910_PORT_A_WRITE_CB(DEVWRITE8("r2r", dac_8bit_r2r_device, write))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_SOUND_ADD("r2r", DAC_8BIT_R2R, 0)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+
+ MCFG_DEVICE_ADD("adpcm_select", LS157, 0)
+ MCFG_74157_OUT_CB(DEVWRITE8("oki", msm5205_device, data_w))
+
+ MCFG_SOUND_ADD("oki", MSM5205, XTAL_12MHz/2/16) // 375 kHz
+ MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S96_4B) // frequency modifiable during operation
+ MCFG_MSM5205_VCLK_CB(WRITELINE(joctronic_state, vclk_w))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_DERIVED( bldyrolr, slalom03 )
+ MCFG_CPU_MODIFY("maincpu")
+ MCFG_CPU_PROGRAM_MAP(bldyrolr_maincpu_map)
MACHINE_CONFIG_END
@@ -71,24 +396,48 @@ MACHINE_CONFIG_END
/-------------------------------------------------------------------*/
ROM_START(punkywil)
ROM_REGION(0x4000, "maincpu", 0)
- ROM_LOAD("pw_game.bin", 0x0000, 0x4000, NO_DUMP)
+ ROM_LOAD("PUNKIY C.P.U", 0x0000, 0x1200, BAD_DUMP CRC(c46ba6e7) SHA1(d2dd1139bc1f59937b40662f8563c68c87d8e2af)) // underdumped 2764, 27128 or 27256
- ROM_REGION(0x4000, "audiocpu", 0)
+ ROM_REGION(0x4000, "soundcpu", 0)
ROM_LOAD("pw_sound.bin", 0x0000, 0x4000, CRC(b2e3a201) SHA1(e3b0a5b22827683382b61c21607201cd470062ee))
ROM_END
/*-------------------------------------------------------------------
-/ Walkyria (198?)
+/ Walkyria (1986)
/-------------------------------------------------------------------*/
ROM_START(walkyria)
ROM_REGION(0x4000, "maincpu", 0)
ROM_LOAD("wk_game.bin", 0x0000, 0x4000, CRC(709722bc) SHA1(4d7b68e9d4a50846cf8eb308ba92f5e2115395d5))
- ROM_REGION(0x4000, "audiocpu", 0)
+ ROM_REGION(0x4000, "soundcpu", 0)
ROM_LOAD("wk_sound.bin", 0x0000, 0x4000, CRC(81f74b0a) SHA1(1ef73bf42f5b1f54526202d3ff89698a04c7b41a))
ROM_END
+// Bloody Roller (Playbar, 1987)
+ROM_START(bldyrolr)
+ ROM_REGION(0x8000, "maincpu", 0)
+ ROM_LOAD("ROM_1.BIN", 0x0000, 0x8000, CRC(7fc31e24) SHA1(0ee26745cdc5be26f332f6a15b51dc209b7eb333))
+
+ ROM_REGION(0x18000, "soundcpu", 0)
+ ROM_LOAD("SOUNDROM_1.BIN", 0x0000, 0x8000, CRC(d1543527) SHA1(ae9959529052bae78f99a1ca413276bf08ab945c))
+ ROM_LOAD("SOUNDROM_2.BIN", 0x8000, 0x8000, CRC(ff9c6d23) SHA1(f31fd6fdc2cdb280845a3d0a6d00038504035723))
+ROM_END
+
+
+// Slalom Code 0.3 (Stargame, 1988)
+ROM_START(slalom03)
+ ROM_REGION(0x8000, "maincpu", 0)
+ ROM_LOAD("1.BIN", 0x0000, 0x8000, CRC(a0263129) SHA1(2f3fe3e91c351cb67fe156d19703eb654388d920))
+
+ ROM_REGION(0x18000, "soundcpu", 0)
+ ROM_LOAD("2.BIN", 0x0000, 0x8000, CRC(ac2d66ab) SHA1(6bdab76373c58ae176b0615c9e44f28d624fc43f))
+ ROM_LOAD("3.BIN", 0x8000, 0x8000, CRC(79054b5f) SHA1(f0d704545735cdf7fd0431679c0809cdb1bbfa35))
+ROM_END
+
+
GAME( 1986, punkywil, 0, joctronic, joctronic, driver_device, 0, ROT0, "Joctronic", "Punky Willy", MACHINE_IS_SKELETON_MECHANICAL )
-GAME( 198?, walkyria, 0, joctronic, joctronic, driver_device, 0, ROT0, "Joctronic", "Walkyria", MACHINE_IS_SKELETON_MECHANICAL )
+GAME( 1986, walkyria, 0, joctronic, joctronic, driver_device, 0, ROT0, "Joctronic", "Walkyria", MACHINE_IS_SKELETON_MECHANICAL )
+GAME( 1987, bldyrolr, 0, bldyrolr, joctronic, driver_device, 0, ROT0, "Playbar", "Bloody Roller", MACHINE_IS_SKELETON_MECHANICAL )
+GAME( 1988, slalom03, 0, slalom03, joctronic, driver_device, 0, ROT0, "Stargame", "Slalom Code 0.3", MACHINE_IS_SKELETON_MECHANICAL )
diff --git a/src/mame/drivers/k28.cpp b/src/mame/drivers/k28.cpp
index 701ac2d08c7..c68620e1d1c 100644
--- a/src/mame/drivers/k28.cpp
+++ b/src/mame/drivers/k28.cpp
@@ -16,7 +16,6 @@
TODO:
- external module support (no dumps yet)
- - SC-01 frog speech is why this driver is marked NOT_WORKING
***************************************************************************/
@@ -277,7 +276,7 @@ WRITE8_MEMBER(k28_state::mcu_p0_w)
// d3: SC-01 strobe, latch phoneme on rising edge
int strobe = data >> 3 & 1;
- if (!strobe && m_speech_strobe)
+ if (strobe && !m_speech_strobe)
m_speech->write(space, 0, m_phoneme);
m_speech_strobe = strobe;
@@ -377,7 +376,7 @@ WRITE8_MEMBER(k28_state::mcu_prog_w)
READ8_MEMBER(k28_state::mcu_t1_r)
{
// 8021 T1: SC-01 A/R pin
- return m_speech->request();
+ return m_speech->request() ? 1 : 0;
}
@@ -516,4 +515,4 @@ ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY, FULLNAME, FLAGS */
-COMP( 1981, k28, 0, 0, k28, k28, driver_device, 0, "Tiger Electronics", "K28: Talking Learning Computer (model 7-230)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
+COMP( 1981, k28, 0, 0, k28, k28, driver_device, 0, "Tiger Electronics", "K28: Talking Learning Computer (model 7-230)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND )
diff --git a/src/mame/drivers/kaneko16.cpp b/src/mame/drivers/kaneko16.cpp
index 6785cf16771..45355963f6d 100644
--- a/src/mame/drivers/kaneko16.cpp
+++ b/src/mame/drivers/kaneko16.cpp
@@ -2518,11 +2518,83 @@ DRIVER_INIT_MEMBER( kaneko16_state, kaneko16 )
kaneko16_unscramble_tiles("gfx3");
}
-DRIVER_INIT_MEMBER( kaneko16_berlwall_state, berlwall )
+/*
+
+berlwallt original bug ?
+
+info from SebV:
+
+After about level 5 or so, if you insert a coin when the continue screen
+pops up, an error message "Copy Board" pops up.
+----------------------------------------
+Happened to me when player dies, at level 4.
+The message is not written in ROM, its sprite ram address is (always?)
+$30fd40
+Routine $337d2 writes it (and routine $5c8c erases it)
+The 'COPY BOARD!' message in stored in ROM directly as sprite number
+($1cfa8)
+
+$20288a : seems to contain the level number (initialized to 2 (?) when a
+game is started, and is incremented by 1 once a level is finished)
+
+01CF3E: move.b $20288a.l, D0
+01CF44: cmpi.b #$d, D0
+01CF48: bcs 1cf76 ; branch not taken -=> 'COPY BOARD!'
+01CF4A: movem.l D0/A0-A2, -(A7)
+01CF4E: movea.l A0, A1
+01CF50: lea ($4c,PC), A0; ($1cf9e)
+01CF54: nop
+01CF56: lea ($a,A0), A0 ; A0 = $1cfa8 = 'COPY BOARD!'
+01CF5A: lea $30e064.l, A1
+01CF60: lea (-$64,A1), A1
+01CF64: lea ($1d40,A1), A1
+01CF68: move.b #$80, D1
+01CF6C: jsr $33776.l ; display routine
+01CF72: movem.l (A7)+, D0/A0-A2
+01CF76:
+
+berlwall levels: 1-1,2,3(anim),...
+berlwallt levels: 1-1(anim)2-1/2/3/4/5(anim)3-1/2/3/4/5(anim)4-1(*)
+
+note: berlwall may be genuine while berlwallt may be bootleg! because
+stage 1-1 of berlwallt is stage 1-3 of berlwall, and berlwall has
+explanation ingame.
+(TAFA flyers exist for both berlwall and berlwallt player graphics)
+--------------------------------------------------------------------------------
+*/
+// TODO: this is certainly a protection issue, the level number variable can go up to 0x2f, which is way bigger than 0xd.
+// Sprite DMA decryption? @see berlwall_spriteram_r
+void kaneko16_berlwall_state::patch_protection(uint32_t bra_offset,uint16_t bra_value,uint16_t checksum)
+{
+ uint16_t *ROM = (uint16_t *)memregion("maincpu")->base();
+
+ ROM[bra_offset/2] = bra_value;
+ ROM[0x3fffe/2] = checksum;
+}
+
+DRIVER_INIT_MEMBER(kaneko16_berlwall_state, berlwall_common)
{
kaneko16_unscramble_tiles("gfx2");
}
+DRIVER_INIT_MEMBER( kaneko16_berlwall_state, berlwall )
+{
+ DRIVER_INIT_CALL(berlwall_common);
+ patch_protection(0x1a3ea,0x602c,0xc40d);
+}
+
+DRIVER_INIT_MEMBER( kaneko16_berlwall_state, berlwallt )
+{
+ DRIVER_INIT_CALL(berlwall_common);
+ patch_protection(0x1cf48,0x602c,0xaed4);
+}
+
+DRIVER_INIT_MEMBER( kaneko16_berlwall_state, berlwallk )
+{
+ DRIVER_INIT_CALL(berlwall_common);
+ patch_protection(0x1ceb0,0x602c,0x8364);
+}
+
DRIVER_INIT_MEMBER( kaneko16_state, samplebank )
{
kaneko16_unscramble_tiles("gfx2");
@@ -2738,51 +2810,6 @@ ROM_START( berlwall )
ROM_LOAD( "bw_u54.u54", 0x400, 0x0117, NO_DUMP)
ROM_END
-
-/*
-berlwallt original bug ?
-
-info from SebV:
-
-After about level 5 or so, if you insert a coin when the continue screen
-pops up, an error message "Copy Board" pops up.
-----------------------------------------
-Happened to me when player dies, at level 4.
-The message is not written in ROM, its sprite ram address is (always?)
-$30fd40
-Routine $337d2 writes it (and routine $5c8c erases it)
-The 'COPY BOARD!' message in stored in ROM directly as sprite number
-($1cfa8)
-
-$20288a : seems to contain the level number (initialized to 2 (?) when a
-game is started, and is incremented by 1 once a level is finished)
-
-01CF3E: move.b $20288a.l, D0
-01CF44: cmpi.b #$d, D0
-01CF48: bcs 1cf76 ; branch not taken -=> 'COPY BOARD!'
-01CF4A: movem.l D0/A0-A2, -(A7)
-01CF4E: movea.l A0, A1
-01CF50: lea ($4c,PC), A0; ($1cf9e)
-01CF54: nop
-01CF56: lea ($a,A0), A0 ; A0 = $1cfa8 = 'COPY BOARD!'
-01CF5A: lea $30e064.l, A1
-01CF60: lea (-$64,A1), A1
-01CF64: lea ($1d40,A1), A1
-01CF68: move.b #$80, D1
-01CF6C: jsr $33776.l ; display routine
-01CF72: movem.l (A7)+, D0/A0-A2
-01CF76:
-
-berlwall levels: 1-1,2,3(anim),...
-berlwallt levels: 1-1(anim)2-1/2/3/4/5(anim)3-1/2/3/4/5(anim)4-1(*)
-
-note: berlwall may be genuine while berlwallt may be bootleg! because
-stage 1-1 of berlwallt is stage 1-3 of berlwall, and berlwall has
-explanation ingame.
-(TAFA flyers exist for both berlwall and berlwallt player graphics)
---------------------------------------------------------------------------------
-*/
-
ROM_START( berlwallt )
ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "bw100a.u23", 0x000000, 0x020000, CRC(e6bcb4eb) SHA1(220b8fddc79230b4f6a8cf33e1035355c485e8d1) )
@@ -4441,9 +4468,9 @@ DRIVER_INIT_MEMBER( kaneko16_shogwarr_state, brapboys )
***************************************************************************/
GAME( 1991, berlwall, 0, berlwall, berlwall, kaneko16_berlwall_state, berlwall, ROT0, "Kaneko", "The Berlin Wall", MACHINE_SUPPORTS_SAVE )
-GAME( 1991, berlwallt,berlwall, berlwall, berlwallt,kaneko16_berlwall_state, berlwall, ROT0, "Kaneko", "The Berlin Wall (bootleg?)", MACHINE_SUPPORTS_SAVE )
-GAME( 1991, berlwallk,berlwall, berlwall, berlwallk,kaneko16_berlwall_state, berlwall, ROT0, "Kaneko (Inter license)", "The Berlin Wall (Korea)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, packbang, 0, berlwall, packbang, kaneko16_berlwall_state, berlwall, ROT90, "Kaneko", "Pack'n Bang Bang (prototype)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // priorities between stages?
+GAME( 1991, berlwallt,berlwall, berlwall, berlwallt,kaneko16_berlwall_state, berlwallt, ROT0, "Kaneko", "The Berlin Wall (bootleg?)", MACHINE_SUPPORTS_SAVE )
+GAME( 1991, berlwallk,berlwall, berlwall, berlwallk,kaneko16_berlwall_state, berlwallk, ROT0, "Kaneko (Inter license)", "The Berlin Wall (Korea)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, packbang, 0, berlwall, packbang, kaneko16_berlwall_state, berlwall_common, ROT90, "Kaneko", "Pack'n Bang Bang (prototype)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // priorities between stages?
GAME( 1991, mgcrystl, 0, mgcrystl, mgcrystl, kaneko16_state, kaneko16, ROT0, "Kaneko", "Magical Crystals (World, 92/01/10)", MACHINE_SUPPORTS_SAVE )
GAME( 1991, mgcrystlo,mgcrystl, mgcrystl, mgcrystl, kaneko16_state, kaneko16, ROT0, "Kaneko", "Magical Crystals (World, 91/12/10)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/konamigx.cpp b/src/mame/drivers/konamigx.cpp
index 9f240ac9ac8..e58a55202cc 100644
--- a/src/mame/drivers/konamigx.cpp
+++ b/src/mame/drivers/konamigx.cpp
@@ -3707,7 +3707,17 @@ ROM_END
MACHINE_START_MEMBER(konamigx_state,konamigx)
{
+ save_item(NAME(m_sound_ctrl));
+ save_item(NAME(m_sound_intck));
+
+ save_item(NAME(m_gx_wrport1_0));
save_item(NAME(m_gx_wrport1_1));
+ save_item(NAME(m_gx_wrport2));
+
+ save_item(NAME(m_gx_rdport1_3));
+ save_item(NAME(m_gx_syncen));
+ save_item(NAME(m_suspension_active));
+ save_item(NAME(m_prev_pixel_clock));
}
MACHINE_RESET_MEMBER(konamigx_state,konamigx)
diff --git a/src/mame/drivers/kopunch.cpp b/src/mame/drivers/kopunch.cpp
index cde3048d39a..37ef8db4194 100644
--- a/src/mame/drivers/kopunch.cpp
+++ b/src/mame/drivers/kopunch.cpp
@@ -244,13 +244,13 @@ static MACHINE_CONFIG_START( kopunch, kopunch_state )
MCFG_DEVICE_ADD("ppi8255_1", I8255A, 0)
// $34 - always $80 (PPI mode 0, ports A & B & C as output)
MCFG_I8255_OUT_PORTA_CB(WRITE8(kopunch_state, coin_w))
- MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B", 0))
- MCFG_I8255_OUT_PORTC_CB(LOGGER("PPI8255 - unmapped write port C", 0))
+ MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B"))
+ MCFG_I8255_OUT_PORTC_CB(LOGGER("PPI8255 - unmapped write port C"))
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
// $38 - always $89 (PPI mode 0, ports A & B as output, port C as input)
MCFG_I8255_OUT_PORTA_CB(WRITE8(kopunch_state, lamp_w))
- MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B", 0))
+ MCFG_I8255_OUT_PORTB_CB(LOGGER("PPI8255 - unmapped write port B"))
MCFG_I8255_IN_PORTC_CB(IOPORT("DSW"))
MCFG_DEVICE_ADD("ppi8255_3", I8255A, 0)
diff --git a/src/mame/drivers/ksys573.cpp b/src/mame/drivers/ksys573.cpp
index cfd6a8f73bf..3db748fa0bb 100644
--- a/src/mame/drivers/ksys573.cpp
+++ b/src/mame/drivers/ksys573.cpp
@@ -3967,24 +3967,24 @@ ROM_START( hndlchmp )
SYS573_BIOS_A
ROM_REGION( 0x200000, "29f016a.31m", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.31m", 0x000000, 0x200000, CRC(f5f71b1d) SHA1(7d518e5333f44e6ec921a1e882df970953814b6e) )
+ ROM_LOAD( "710jab.31m", 0x000000, 0x200000, CRC(f5f71b1d) SHA1(7d518e5333f44e6ec921a1e882df970953814b6e) )
ROM_REGION( 0x200000, "29f016a.27m", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.27m", 0x000000, 0x200000, CRC(b3d8c037) SHA1(678b88c37111d1fde8996c7d71b66ec1c4f161fe) )
+ ROM_LOAD( "710jab.27m", 0x000000, 0x200000, CRC(b3d8c037) SHA1(678b88c37111d1fde8996c7d71b66ec1c4f161fe) )
ROM_REGION( 0x200000, "29f016a.31l", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.31l", 0x000000, 0x200000, CRC(78e8556c) SHA1(9f6bb651ddeb042ebf1ba057d4932494149f47d6) )
+ ROM_LOAD( "710jab.31l", 0x000000, 0x200000, CRC(78e8556c) SHA1(9f6bb651ddeb042ebf1ba057d4932494149f47d6) )
ROM_REGION( 0x200000, "29f016a.27l", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.27l", 0x000000, 0x200000, CRC(f6a87155) SHA1(269bfdf05ee4ab2e4b87b6e92045e56d0557a576) )
+ ROM_LOAD( "710jab.27l", 0x000000, 0x200000, CRC(f6a87155) SHA1(269bfdf05ee4ab2e4b87b6e92045e56d0557a576) )
ROM_REGION( 0x200000, "29f016a.31j", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.31j", 0x000000, 0x200000, CRC(bdc05d16) SHA1(ee397950f7e7e910fdc05737f99604e43d288719) )
+ ROM_LOAD( "710jab.31j", 0x000000, 0x200000, CRC(bdc05d16) SHA1(ee397950f7e7e910fdc05737f99604e43d288719) )
ROM_REGION( 0x200000, "29f016a.27j", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.27j", 0x000000, 0x200000, CRC(ad925ed3) SHA1(e3222308961851cccee2de9da804f74854907451) )
+ ROM_LOAD( "710jab.27j", 0x000000, 0x200000, CRC(ad925ed3) SHA1(e3222308961851cccee2de9da804f74854907451) )
ROM_REGION( 0x200000, "29f016a.31h", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.31h", 0x000000, 0x200000, CRC(a0293108) SHA1(2e5651a4c1b8e021cc3060db138c9fe7c28caa3b) )
+ ROM_LOAD( "710jab.31h", 0x000000, 0x200000, CRC(a0293108) SHA1(2e5651a4c1b8e021cc3060db138c9fe7c28caa3b) )
ROM_REGION( 0x200000, "29f016a.27h", 0 ) /* onboard flash */
- ROM_LOAD( "710ja.27h", 0x000000, 0x200000, CRC(aed26efe) SHA1(20b6fccd0bc5495d8258b976f72d330d6315c6f6) )
+ ROM_LOAD( "710jab.27h", 0x000000, 0x200000, CRC(aed26efe) SHA1(20b6fccd0bc5495d8258b976f72d330d6315c6f6) )
ROM_REGION( 0x002000, "m48t58", 0 )
- ROM_LOAD( "710ja.22h", 0x000000, 0x002000, CRC(b784de91) SHA1(048157e9ad6df46656dbac6349b0c821254e1c37) )
+ ROM_LOAD( "710jab.22h", 0x000000, 0x002000, CRC(b784de91) SHA1(048157e9ad6df46656dbac6349b0c821254e1c37) )
ROM_END
ROM_START( gchgchmp )
@@ -4714,9 +4714,34 @@ ROM_START( stepchmp )
ROM_LOAD( "gq930ja.27h", 0x000000, 0x200000, CRC(256f0794) SHA1(f95d5a8a53dea4d1f4d766124e94ee103cc1e3b2) )
ROM_END
+ROM_START( strgchmp )
+ SYS573_BIOS_A
+
+ ROM_REGION( 0x200000, "29f016a.31m", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.31m", 0x000000, 0x200000, CRC(389f8acb) SHA1(db80af29d53f737a6affd1afd18cce050c294fa6) )
+ ROM_REGION( 0x200000, "29f016a.27m", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.27m", 0x000000, 0x200000, CRC(5b5c6e4d) SHA1(a5ad9a459504dfb7ada0148f590f777a604549e9) )
+ ROM_REGION( 0x200000, "29f016a.31l", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.31l", 0x000000, 0x200000, CRC(fd9fd9b1) SHA1(f1536f62f68d80cabd5d58e8dfa14a8b3e9a6ae3) )
+ ROM_REGION( 0x200000, "29f016a.27l", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.27l", 0x000000, 0x200000, CRC(a0e9b72b) SHA1(7272c54c5dc1d1df2427e301e5a10083c9db1967) )
+ ROM_REGION( 0x200000, "29f016a.31j", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.31j", 0x000000, 0x200000, CRC(bf6ebc47) SHA1(59a4812e79c9695a0d161fd62534bbb4ae84a4bc) )
+ ROM_REGION( 0x200000, "29f016a.27j", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.27j", 0x000000, 0x200000, CRC(79669ebd) SHA1(45828fd6c0b63666963c8f3b7cc5d508bc06b845) )
+ ROM_REGION( 0x200000, "29f016a.31h", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.31h", 0x000000, 0x200000, CRC(2a41c844) SHA1(ffa36fef3abc90f2e25e79ccbda199d614edf034) )
+ ROM_REGION( 0x200000, "29f016a.27h", 0 ) /* onboard flash */
+ ROM_LOAD( "710uaa.27h", 0x000000, 0x200000, CRC(b30556bb) SHA1(b771114c6520fe17e4256b9217c72243ac97f4b5) )
+
+ ROM_REGION( 0x002000, "m48t58", 0 )
+ ROM_LOAD( "710uaa.22h", 0x000000, 0x002000, CRC(a3e93d49) SHA1(630daa1a02320433a068eb5214f6b30acc06df76) )
+ROM_END
+
GAME( 1997, sys573, 0, konami573, konami573, driver_device, 0, ROT0, "Konami", "System 573 BIOS", MACHINE_IS_BIOS_ROOT )
-GAME( 1997, hndlchmp, sys573, konami573, hndlchmp, driver_device, 0, ROT0, "Konami", "Handle Champ (GQ710 VER. JAB)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
+GAME( 1997, strgchmp, sys573, konami573, hndlchmp, driver_device, 0, ROT0, "Konami", "Steering Champ (GQ710 VER. UAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
+GAME( 1997, hndlchmp, strgchmp, konami573, hndlchmp, driver_device, 0, ROT0, "Konami", "Handle Champ (GQ710 VER. JAB)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1998, darkhleg, sys573, konami573x, konami573, driver_device, 0, ROT0, "Konami", "Dark Horse Legend (GX706 VER. JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1998, fbaitbc, sys573, fbaitbc, fbaitbc, driver_device, 0, ROT0, "Konami", "Fisherman's Bait - A Bass Challenge (GE765 VER. UAB)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1998, bassangl, fbaitbc, fbaitbc, fbaitbc, driver_device, 0, ROT0, "Konami", "Bass Angler (GE765 VER. JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
diff --git a/src/mame/drivers/ladybug.cpp b/src/mame/drivers/ladybug.cpp
index e32a7c6b9f7..b8d00dbd78e 100644
--- a/src/mame/drivers/ladybug.cpp
+++ b/src/mame/drivers/ladybug.cpp
@@ -615,7 +615,7 @@ ROM_START( ladybugb2 ) // bootleg by Model Racing, PCB marked CS299, manual name
ROM_LOAD( "l9.f7", 0x0000, 0x1000, CRC(77b1da1e) SHA1(58cb82417396a3d96acfc864f091b1a5988f228d) )
ROM_LOAD( "l0.h7", 0x1000, 0x1000, CRC(aa82e00b) SHA1(83a5b745e58844b6dd7d05dfe9dbb5959aaf5c40) )
- ROM_REGION( 0x2000, "gfx2", 0 )
+ ROM_REGION( 0x2000, "gfx2", 0 )
ROM_LOAD( "l8.l7", 0x0000, 0x1000, CRC(8b99910b) SHA1(0bc812cf872f04eacedb50feed53f1aa8a1f24b9) )
ROM_LOAD( "l7.m7", 0x1000, 0x1000, CRC(86a5b448) SHA1(f8585a6fcf921e3e21f112dd2de474cb53cef290) )
diff --git a/src/mame/drivers/lwriter.cpp b/src/mame/drivers/lwriter.cpp
index a981cae8826..7cf46040af8 100644
--- a/src/mame/drivers/lwriter.cpp
+++ b/src/mame/drivers/lwriter.cpp
@@ -4,8 +4,8 @@
Apple LaserWriter II NT driver
- TODO:
- - Figure out what VIA pins is connected to switch on front that selects LocalTalk
+ TODO:
+ - Figure out what VIA pins is connected to switch on front that selects LocalTalk
- Let the board identify itself to a emulated mac driver so it displays the printer icon on the desktop
- Everything else
@@ -13,11 +13,11 @@
/*
* Hardware: 68000@11.16 MHz
8530 SCC
- 6523 TPI or 6522 VIA on newer pcb:s
- 2MB DRAM
- 2KB SRAM
- custom 335-0022 EEPROM
- 1MB ROM
+ 6523 TPI or 6522 VIA on newer pcb:s
+ 2MB DRAM
+ 2KB SRAM
+ custom 335-0022 EEPROM
+ 1MB ROM
+------------------------------------------------------------------------------------------------------------------------+=====+
| 1 2 3 4 5 6 7 8 9 10 11 | #
@@ -58,7 +58,7 @@
+------------------------------------------------------------------------------------------------------------------------+=====+
*/
-#define TPI 0 //The TPI is used on the original M6009 board but the first dump is from a newer that uses a VIA
+#define TPI 0 //The TPI is used on the original M6009 board but the first dump is from a newer that uses a VIA
#include "emu.h"
#include "cpu/m68000/m68000.h"
@@ -69,7 +69,7 @@
#include "machine/6525tpi.h"
#else
#include "machine/6522via.h"
-#endif
+#endif
class lwriter_state : public driver_device
{
@@ -105,7 +105,7 @@ static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
AM_RANGE(0x00000000, 0x00000007) AM_ROM AM_READ(bootvect_r) /* ROM mirror just during reset */
AM_RANGE(0x00000000, 0x00000007) AM_RAM AM_WRITE(bootvect_w) /* After first write we act as RAM */
AM_RANGE(0x00000008, 0x001fffff) AM_RAM /* 2 Mb DRAM */
- AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_REGION("roms", 0)
+ AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_REGION("roms", 0)
AM_RANGE(0x00c00000, 0x00c00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff)
AM_RANGE(0x00c00004, 0x00c00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff)
@@ -186,14 +186,14 @@ MACHINE_CONFIG_END
/* SCC init sequence
* :scc B Reg 09 <- c0 - Master Interrupt Control - Device reset
* -
- * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
- * :scc B Reg 05 <- 02 - Tx setup: 5 bits, Tx disable, RTS:1 DTR:0
- * :scc B Reg 05 <- 00 - Tx setup: 5 bits, Tx disable, RTS:0 DTR:0
+ * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
+ * :scc B Reg 05 <- 02 - Tx setup: 5 bits, Tx disable, RTS:1 DTR:0
+ * :scc B Reg 05 <- 00 - Tx setup: 5 bits, Tx disable, RTS:0 DTR:0
* -
* :scc A Reg 09 <- c0 - Master Interrupt Control - Device reset
*
* -
- * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
+ * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
* :scc A Reg 04 <- 4c - Setting up Asynchrounous mode: 2 Stop bits, No parity, 16x clock
* :scc A Reg 0b <- 50 - Clock Mode Control - TTL clk on RTxC, Rx and Tx clks from BRG, TRxC is input
* :scc A Reg 0e <- 00 - Misc Control Bits - BRG clk is RTxC, BRG is disabled
@@ -202,7 +202,7 @@ MACHINE_CONFIG_END
* :scc A Reg 0e <- 01 - BRG enabled with external clk from RTxC
* :scc A Reg 0a <- 00 - Synchronous parameters, all turned off
* :scc A Reg 03 <- c1 - Rx setup: 8 bits, Rx enabled
- * :scc A Reg 05 <- 6a - Tx setup: 8 bits, Tx enable, RTS:1 DTR:0
+ * :scc A Reg 05 <- 6a - Tx setup: 8 bits, Tx enable, RTS:1 DTR:0
* -
* :scc A Reg 01 <- 00 - Rx interrupt disabled
* :scc A Reg 01 <- 30 - Wait/Ready on receive, Rx int an all characters, parity affect vector
@@ -212,7 +212,7 @@ MACHINE_CONFIG_END
* :scc A Reg 00 <- 30 - Error Reset command
* :scc A Reg 00 <- 30 - Error Reset command
* - last three loops
-*/
+*/
ROM_START(lwriter)
ROM_REGION16_BE (0x1000000, "roms", 0)
diff --git a/src/mame/drivers/mac128.cpp b/src/mame/drivers/mac128.cpp
index 1089e3cf9bb..44aa12ddd3b 100755..100644
--- a/src/mame/drivers/mac128.cpp
+++ b/src/mame/drivers/mac128.cpp
@@ -1517,7 +1517,7 @@ ROM_START( mac128k )
ROM_REGION16_BE(0x100000, "bootrom", 0)
// Apple used at least 3 manufacturers for these ROMs, but they're always Apple part numbers 342-0220-A and 342-0221-A
ROMX_LOAD("342-0220-a.u6d", 0x00000, 0x08000, CRC(198210ad) SHA1(2590ff4af5ac0361babdf0dc5da18e2eecad454a), ROM_SKIP(1) )
- ROMX_LOAD("342-0221-a.u8d", 0x00001, 0x08000, CRC(fd2665c2) SHA1(8507932a854bd28196a17785c8b1851cb53eaf64), ROM_SKIP(1) )
+ ROMX_LOAD("342-0221-a.u8d", 0x00001, 0x08000, CRC(fd2665c2) SHA1(8507932a854bd28196a17785c8b1851cb53eaf64), ROM_SKIP(1) )
/* Labels seen in the wild:
VTi:
"<VTi logo along side> // 416 VH 2605 // 23256-1020 // 342-0220-A // (C)APPLE 83 // KOREA-AE"
@@ -1528,7 +1528,7 @@ ROM_START( mac128k )
Hitachi:
[can't find reference for rom-hi]
"<Hitachi 'target' logo> 8413 // 3256 016 JAPAN // (C)APPLE 83 // 342-0221-A"
-
+
References:
http://www.vintagecomputer.net/apple/Macintosh/Macintosh_motherboard.jpg
https://upload.wikimedia.org/wikipedia/commons/3/34/Macintosh-motherboard.jpg
@@ -1613,32 +1613,32 @@ ROM_START( mac512ke ) // 512ke has been observed with any of the v3, v2 or v1 ma
1st version (Lonely Hearts, checksum 4D 1E EE E1)
Bug in the SCSI driver; won't boot if external drive is turned off. We only produced about
one and a half months worth of these.
-
+
2nd version (Lonely Heifers, checksum 4D 1E EA E1):
Fixed boot bug. This version is the vast majority of beige Macintosh Pluses.
-
+
3rd version (Loud Harmonicas, checksum 4D 1F 81 72):
Fixed bug for drives that return Unit Attention on power up or reset. Basically took the
SCSI bus Reset command out of the boot sequence loop, so it will only reset once
- during boot sequence.
+ during boot sequence.
*/
/* Labels seen in the wild:
v3/4d1f8172:
- 'ROM-HI' @ U6D:
- "VLSI // 740 SA 1262 // 23512-1054 // 342-0341-C // (C)APPLE '83-'86 // KOREA A"
- "342-0341-C // (C)APPLE 85,86 // (M)AMI 8849MBL // PHILLIPINES"
- 'ROM-LO' @ U8D:
- "VLSI // 740 SA 1342 // 23512-1055 // 342-0342-B // (C)APPLE '83-'86 // KOREA A"
- "<VLSI logo>VLSI // 8905AV 0 AS759 // 23512-1055 // 342-0342-B // (C)APPLE '85-'86"
+ 'ROM-HI' @ U6D:
+ "VLSI // 740 SA 1262 // 23512-1054 // 342-0341-C // (C)APPLE '83-'86 // KOREA A"
+ "342-0341-C // (C)APPLE 85,86 // (M)AMI 8849MBL // PHILLIPINES"
+ 'ROM-LO' @ U8D:
+ "VLSI // 740 SA 1342 // 23512-1055 // 342-0342-B // (C)APPLE '83-'86 // KOREA A"
+ "<VLSI logo>VLSI // 8905AV 0 AS759 // 23512-1055 // 342-0342-B // (C)APPLE '85-'86"
v2/4d1eeae1:
- 'ROM-HI' @ U6D:
- "VTI // 624 V0 8636 // 23512-1010 // 342-0341-B // (C)APPLE '85 // MEXICO R"
- 'ROM-LO' @ U8D:
- "VTI // 622 V0 B637 // 23512-1007 // 342-0342-A // (C)APPLE '83-'85 // KOREA A"
+ 'ROM-HI' @ U6D:
+ "VTI // 624 V0 8636 // 23512-1010 // 342-0341-B // (C)APPLE '85 // MEXICO R"
+ 'ROM-LO' @ U8D:
+ "VTI // 622 V0 B637 // 23512-1007 // 342-0342-A // (C)APPLE '83-'85 // KOREA A"
v1/4d1eeee1:
- 'ROM-HI' @ U6D:
- GUESSED, since this ROM is very rare: "VTI // 62? V0 86?? // 23512-1008 // 342-0341-A // (C)APPLE '83-'85 // KOREA A"
- 'ROM-LO' @ U8D is same as v2/4d1eeae1 'ROM-LO' @ U8D
+ 'ROM-HI' @ U6D:
+ GUESSED, since this ROM is very rare: "VTI // 62? V0 86?? // 23512-1008 // 342-0341-A // (C)APPLE '83-'85 // KOREA A"
+ 'ROM-LO' @ U8D is same as v2/4d1eeae1 'ROM-LO' @ U8D
*/
ROM_END
diff --git a/src/mame/drivers/mc1000.cpp b/src/mame/drivers/mc1000.cpp
index 7735c3124bb..85a7d67abd0 100644
--- a/src/mame/drivers/mc1000.cpp
+++ b/src/mame/drivers/mc1000.cpp
@@ -77,6 +77,8 @@ public:
required_ioport m_modifiers;
required_ioport_array<2> m_joykeymap;
+ std::unique_ptr<uint8_t[]> m_banked_ram;
+
virtual void machine_start() override;
virtual void machine_reset() override;
@@ -89,7 +91,7 @@ public:
DECLARE_READ8_MEMBER( videoram_r );
DECLARE_WRITE8_MEMBER( keylatch_w );
DECLARE_READ8_MEMBER( keydata_r );
- DIRECT_UPDATE_MEMBER(mc1000_direct_update_handler);
+ DECLARE_READ8_MEMBER( rom_banking_r );
void bankswitch();
@@ -223,11 +225,21 @@ WRITE8_MEMBER( mc1000_state::mc6847_attr_w )
static ADDRESS_MAP_START( mc1000_mem, AS_PROGRAM, 8, mc1000_state )
AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("bank1")
AM_RANGE(0x2000, 0x27ff) AM_RAMBANK("bank2") AM_SHARE("mc6845_vram")
- AM_RANGE(0x2800, 0x3fff) AM_RAM
+ AM_RANGE(0x2800, 0x3fff) AM_RAM AM_SHARE("ram2800")
AM_RANGE(0x4000, 0x7fff) AM_RAMBANK("bank3")
AM_RANGE(0x8000, 0x97ff) AM_RAMBANK("bank4") AM_SHARE("mc6847_vram")
AM_RANGE(0x9800, 0xbfff) AM_RAMBANK("bank5")
- AM_RANGE(0xc000, 0xffff) AM_ROM
+ AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(Z80_TAG, 0)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( mc1000_banking_mem, AS_DECRYPTED_OPCODES, 8, mc1000_state )
+ AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("bank1")
+ AM_RANGE(0x2000, 0x27ff) AM_RAMBANK("bank2") AM_SHARE("mc6845_vram")
+ AM_RANGE(0x2800, 0x3fff) AM_RAM AM_SHARE("ram2800")
+ AM_RANGE(0x4000, 0x7fff) AM_RAMBANK("bank3")
+ AM_RANGE(0x8000, 0x97ff) AM_RAMBANK("bank4") AM_SHARE("mc6847_vram")
+ AM_RANGE(0x9800, 0xbfff) AM_RAMBANK("bank5")
+ AM_RANGE(0xc000, 0xffff) AM_READ(rom_banking_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mc1000_io, AS_IO, 8, mc1000_state )
@@ -411,40 +423,45 @@ READ8_MEMBER( mc1000_state::keydata_r )
return data;
}
+
+READ8_MEMBER( mc1000_state::rom_banking_r )
+{
+ membank("bank1")->set_entry(0);
+ m_rom0000 = 0;
+ return m_rom->base()[offset];
+}
+
/* Machine Initialization */
void mc1000_state::machine_start()
{
- address_space &program = m_maincpu->space(AS_PROGRAM);
-
/* setup memory banking */
- uint8_t *rom = m_rom->base();
+ m_banked_ram = make_unique_clear<uint8_t[]>(0xc000);
- program.install_readwrite_bank(0x0000, 0x1fff, "bank1");
- membank("bank1")->configure_entry(0, rom);
- membank("bank1")->configure_entry(1, rom + 0xc000);
+ membank("bank1")->configure_entry(0, m_banked_ram.get());
+ membank("bank1")->configure_entry(1, m_rom->base());
membank("bank1")->set_entry(1);
m_rom0000 = 1;
- program.install_readwrite_bank(0x2000, 0x27ff, "bank2");
- membank("bank2")->configure_entry(0, rom + 0x2000);
+ membank("bank2")->configure_entry(0, m_banked_ram.get() + 0x2000);
membank("bank2")->configure_entry(1, m_mc6845_video_ram);
membank("bank2")->set_entry(0);
- membank("bank3")->configure_entry(0, rom + 0x4000);
+ membank("bank3")->configure_entry(0, m_banked_ram.get() + 0x4000);
membank("bank3")->set_entry(0);
membank("bank4")->configure_entry(0, m_mc6847_video_ram);
- membank("bank4")->configure_entry(1, rom + 0x8000);
+ membank("bank4")->configure_entry(1, m_banked_ram.get() + 0x8000);
membank("bank4")->set_entry(0);
- membank("bank5")->configure_entry(0, rom + 0x9800);
+ membank("bank5")->configure_entry(0, m_banked_ram.get() + 0x9800);
membank("bank5")->set_entry(0);
bankswitch();
/* register for state saving */
+ save_pointer(NAME(m_banked_ram.get()), 0xc000);
save_item(NAME(m_rom0000));
save_item(NAME(m_mc6845_bank));
save_item(NAME(m_mc6847_bank));
@@ -514,6 +531,7 @@ static MACHINE_CONFIG_START( mc1000, mc1000_state )
/* basic machine hardware */
MCFG_CPU_ADD(Z80_TAG, Z80, 3579545)
MCFG_CPU_PROGRAM_MAP(mc1000_mem)
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(mc1000_banking_mem)
MCFG_CPU_IO_MAP(mc1000_io)
/* timers */
@@ -562,34 +580,13 @@ MACHINE_CONFIG_END
/* ROMs */
ROM_START( mc1000 )
- ROM_REGION( 0x10000, Z80_TAG, 0 )
- ROM_LOAD( "mc1000.ic17", 0xc000, 0x2000, CRC(8e78d80d) SHA1(9480270e67a5db2e7de8bc5c8b9e0bb210d4142b) )
- ROM_LOAD( "mc1000.ic12", 0xe000, 0x2000, CRC(750c95f0) SHA1(fd766f5ea4481ef7fd4df92cf7d8397cc2b5a6c4) )
+ ROM_REGION( 0x4000, Z80_TAG, 0 )
+ ROM_LOAD( "mc1000.ic17", 0x0000, 0x2000, CRC(8e78d80d) SHA1(9480270e67a5db2e7de8bc5c8b9e0bb210d4142b) )
+ ROM_LOAD( "mc1000.ic12", 0x2000, 0x2000, CRC(750c95f0) SHA1(fd766f5ea4481ef7fd4df92cf7d8397cc2b5a6c4) )
ROM_END
-/* Driver Initialization */
-
-DIRECT_UPDATE_MEMBER(mc1000_state::mc1000_direct_update_handler)
-{
- if (m_rom0000)
- {
- if (address >= 0xc000)
- {
- membank("bank1")->set_entry(0);
- m_rom0000 = 0;
- }
- }
-
- return address;
-}
-
-DRIVER_INIT_MEMBER(mc1000_state,mc1000)
-{
- m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&mc1000_state::mc1000_direct_update_handler, this));
-}
-
/* System Drivers */
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
-COMP( 1985, mc1000, 0, 0, mc1000, mc1000, mc1000_state, mc1000, "CCE", "MC-1000", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
+COMP( 1985, mc1000, 0, 0, mc1000, mc1000, driver_device, 0, "CCE", "MC-1000", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/mcr.cpp b/src/mame/drivers/mcr.cpp
index 08979187d02..902e20e6d4f 100644
--- a/src/mame/drivers/mcr.cpp
+++ b/src/mame/drivers/mcr.cpp
@@ -207,7 +207,7 @@
91658 = Lamp Sequencer (DOTron)
91659 = Flashing Fluorescent Assembly (DOTron)
91660 = Squawk & Talk (DOTron, NFLFoot)
- 91671 = Chip Squeak Deluxe (SpyHunt)
+ 91671 = Cheap Squeak Deluxe (SpyHunt)
91673 = Lamp Driver (SpyHunt)
91695 = IPU laserdisk controller (NFLFoot)
91794 = Optical Encoder Deluxe (DemoDerb)
diff --git a/src/mame/drivers/mcr3.cpp b/src/mame/drivers/mcr3.cpp
index 4f4efe6ef98..9cb022d13ad 100644
--- a/src/mame/drivers/mcr3.cpp
+++ b/src/mame/drivers/mcr3.cpp
@@ -13,9 +13,9 @@
* Rampage (Sounds Good)
* Power Drive (Sounds Good)
* Star Guards (Sounds Good)
- * Spy Hunter (Chip Squeak Deluxe)
+ * Spy Hunter (Cheap Squeak Deluxe)
* Crater Raider
- * Turbo Tag (prototype) (Chip Squeak Deluxe)
+ * Turbo Tag (prototype) (Cheap Squeak Deluxe)
Known bugs:
* Spy Hunter crashes at the end of the boat level
@@ -107,6 +107,7 @@
#include "cpu/z80/z80.h"
#include "machine/z80ctc.h"
#include "audio/midway.h"
+#include "audio/csd.h"
#include "machine/nvram.h"
#include "includes/mcr.h"
#include "includes/mcr3.h"
@@ -392,7 +393,7 @@ WRITE8_MEMBER(mcr3_state::stargrds_op6_w)
READ8_MEMBER(mcr3_state::spyhunt_ip1_r)
{
- return ioport("ssio:IP1")->read() | (m_chip_squeak_deluxe->read(space, 0) << 5);
+ return ioport("ssio:IP1")->read() | (m_cheap_squeak_deluxe->stat_r(space, 0) << 5);
}
@@ -436,7 +437,8 @@ WRITE8_MEMBER(mcr3_state::spyhunt_op4_w)
m_last_op4 = data;
/* low 5 bits go to control the Chip Squeak Deluxe */
- m_chip_squeak_deluxe->write(space, offset, data);
+ m_cheap_squeak_deluxe->sr_w(space, offset, data & 0x0f);
+ m_cheap_squeak_deluxe->sirq_w(BIT(data, 4));
}
@@ -1171,11 +1173,11 @@ static MACHINE_CONFIG_DERIVED( mcrscroll, mcrmono )
MACHINE_CONFIG_END
-/* Spy Hunter = scrolling system with an SSIO and a chip squeak deluxe */
+/* Spy Hunter = scrolling system with an SSIO and a cheap squeak deluxe */
static MACHINE_CONFIG_DERIVED( mcrsc_csd, mcrscroll )
/* basic machine hardware */
- MCFG_SOUND_ADD("csd", MIDWAY_CHIP_SQUEAK_DELUXE, 0)
+ MCFG_SOUND_ADD("csd", MIDWAY_CHEAP_SQUEAK_DELUXE, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
MACHINE_CONFIG_END
@@ -1392,7 +1394,7 @@ ROM_START( spyhunt )
ROM_LOAD( "spy-hunter_snd_0_sd_11-18-83.a7", 0x0000, 0x1000, CRC(c95cf31e) SHA1(d1b0e299a27e306ddbc0654fd3a9d981c92afe8c) )
ROM_LOAD( "spy-hunter_snd_1_sd_11-18-83.a8", 0x1000, 0x1000, CRC(12aaa48e) SHA1(c6b835fc45e4484a4d52b682ce015caa242c8b4f) )
- ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Chip Squeak Deluxe */ // all dated 11-18-83
+ ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Cheap Squeak Deluxe */ // all dated 11-18-83
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u7_a_11-18-83.u7", 0x00000, 0x2000, CRC(6e689fe7) SHA1(38ad2e9f12b9d389fb2568ebcb32c8bd1ac6879e) )
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u17_b_11-18-83.u17", 0x00001, 0x2000, CRC(0d9ddce6) SHA1(d955c0e67fc78b517cc229601ab4023cc5a644c2) )
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u8_c_11-18-83.u8", 0x04000, 0x2000, CRC(35563cd0) SHA1(5708d374dd56758194c95118f096ea51bf12bf64) )
@@ -1433,7 +1435,7 @@ ROM_START( spyhuntp )
ROM_LOAD( "spy-hunter_snd_0_sd_11-18-83.a7", 0x0000, 0x1000, CRC(c95cf31e) SHA1(d1b0e299a27e306ddbc0654fd3a9d981c92afe8c) )
ROM_LOAD( "spy-hunter_snd_1_sd_11-18-83.a8", 0x1000, 0x1000, CRC(12aaa48e) SHA1(c6b835fc45e4484a4d52b682ce015caa242c8b4f) )
- ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Chip Squeak Deluxe */
+ ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Cheap Squeak Deluxe */
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u7_a_11-18-83.u7", 0x00000, 0x2000, CRC(6e689fe7) SHA1(38ad2e9f12b9d389fb2568ebcb32c8bd1ac6879e) )
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u17_b_11-18-83.u17", 0x00001, 0x2000, CRC(0d9ddce6) SHA1(d955c0e67fc78b517cc229601ab4023cc5a644c2) )
ROM_LOAD16_BYTE( "spy-hunter_cs_deluxe_u8_c_11-18-83.u8", 0x04000, 0x2000, CRC(35563cd0) SHA1(5708d374dd56758194c95118f096ea51bf12bf64) )
@@ -1509,7 +1511,7 @@ ROM_START( turbotag )
ROM_REGION( 0x10000, "ssio:cpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Chip Squeak Deluxe */
+ ROM_REGION( 0x8000, "csd:cpu", 0 ) /* 32k for the Cheap Squeak Deluxe */
ROM_LOAD16_BYTE( "ttu7.bin", 0x00000, 0x2000, CRC(8ebb3302) SHA1(c516abdae6eea524a6d2a039ed9bd7dff72ab986) )
ROM_LOAD16_BYTE( "ttu17.bin", 0x00001, 0x2000, CRC(605d6c74) SHA1(a6c2bc95cca372fa823ab256c9dd1f92b6ba45fd) )
ROM_LOAD16_BYTE( "ttu8.bin", 0x04000, 0x2000, CRC(6bfcb22a) SHA1(7b895e3ae1e99f195bb32b052f801b58c63a401c) )
diff --git a/src/mame/drivers/micro20.cpp b/src/mame/drivers/micro20.cpp
index 3a642f66a2c..7b4c03c27e7 100755..100644
--- a/src/mame/drivers/micro20.cpp
+++ b/src/mame/drivers/micro20.cpp
@@ -4,9 +4,9 @@
micro20.cpp
GMX Micro 20 single-board computer
-
+
68020 + 68881 FPU
-
+
800a5e = end of initial 68020 torture test
****************************************************************************/
@@ -22,9 +22,9 @@
#define MAINCPU_TAG "maincpu"
#define DUART_A_TAG "duarta"
#define DUART_B_TAG "duartb"
-#define RTC_TAG "rtc"
-#define FDC_TAG "fdc"
-#define PIT_TAG "pit"
+#define RTC_TAG "rtc"
+#define FDC_TAG "fdc"
+#define PIT_TAG "pit"
class micro20_state : public driver_device
{
@@ -44,13 +44,13 @@ public:
required_shared_ptr<uint32_t> m_mainram;
required_device<pit68230_device> m_pit;
required_device<msm58321_device> m_rtc;
-
+
virtual void machine_start() override;
virtual void machine_reset() override;
-
+
DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
DECLARE_READ32_MEMBER(buserror_r);
-
+
TIMER_DEVICE_CALLBACK_MEMBER(micro20_timer);
DECLARE_WRITE_LINE_MEMBER(h4_w);
DECLARE_WRITE8_MEMBER(portb_w);
@@ -68,13 +68,13 @@ void micro20_state::machine_reset()
{
u32 *pROM = (uint32_t *)m_rom->base();
u32 *pRAM = (uint32_t *)m_mainram.target();
-
+
pRAM[0] = pROM[2];
pRAM[1] = pROM[3];
m_maincpu->reset();
-
+
m_maincpu->set_reset_callback(write_line_delegate(FUNC(micro20_state::m68k_reset_callback),this));
-
+
m_tin = 0;
}
@@ -100,12 +100,12 @@ WRITE8_MEMBER(micro20_state::portb_w)
m_rtc->d0_w((data & 1) ? ASSERT_LINE : CLEAR_LINE);
m_rtc->d1_w((data & 2) ? ASSERT_LINE : CLEAR_LINE);
m_rtc->d2_w((data & 4) ? ASSERT_LINE : CLEAR_LINE);
- m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE);
+ m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE);
}
WRITE8_MEMBER(micro20_state::portc_w)
{
- // MSM58321 CS1 and CS2 are tied to /RST, inverted RESET.
+ // MSM58321 CS1 and CS2 are tied to /RST, inverted RESET.
// So they're always high when the system is not reset.
m_rtc->cs1_w(ASSERT_LINE);
m_rtc->cs2_w(ASSERT_LINE);
@@ -130,12 +130,12 @@ static ADDRESS_MAP_START(micro20_map, AS_PROGRAM, 32, micro20_state )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("mainram")
AM_RANGE(0x00200000, 0x002fffff) AM_READ(buserror_r)
AM_RANGE(0x00800000, 0x0083ffff) AM_ROM AM_REGION("bootrom", 0)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, status_r, cmd_w, 0xff000000)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, track_r, track_w, 0x00ff0000)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, sector_r, sector_w, 0x0000ff00)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, data_r, data_w, 0x000000ff)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, status_r, cmd_w, 0xff000000)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, track_r, track_w, 0x00ff0000)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, sector_r, sector_w, 0x0000ff00)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, data_r, data_w, 0x000000ff)
AM_RANGE(0xffff8080, 0xffff808f) AM_DEVREADWRITE8(DUART_A_TAG, mc68681_device, read, write, 0xffffffff)
- AM_RANGE(0xffff80a0, 0xffff80af) AM_DEVREADWRITE8(DUART_B_TAG, mc68681_device, read, write, 0xffffffff)
+ AM_RANGE(0xffff80a0, 0xffff80af) AM_DEVREADWRITE8(DUART_B_TAG, mc68681_device, read, write, 0xffffffff)
AM_RANGE(0xffff80c0, 0xffff80df) AM_DEVREADWRITE8(PIT_TAG, pit68230_device, read, write, 0xffffffff)
ADDRESS_MAP_END
@@ -143,7 +143,7 @@ static MACHINE_CONFIG_START( micro20, micro20_state )
/* basic machine hardware */
MCFG_CPU_ADD(MAINCPU_TAG, M68020, XTAL_16_67MHz)
MCFG_CPU_PROGRAM_MAP(micro20_map)
-
+
MCFG_MC68681_ADD(DUART_A_TAG, XTAL_3_6864MHz)
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
@@ -151,14 +151,14 @@ static MACHINE_CONFIG_START( micro20, micro20_state )
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(DUART_A_TAG, mc68681_device, rx_a_w))
MCFG_MC68681_ADD(DUART_B_TAG, XTAL_3_6864MHz)
-
+
MCFG_WD1772_ADD(FDC_TAG, XTAL_16_67MHz / 2)
-
+
MCFG_DEVICE_ADD(PIT_TAG, PIT68230, XTAL_16_67MHz / 2)
MCFG_PIT68230_H4_CB(WRITELINE(micro20_state, h4_w))
MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(micro20_state, portb_w))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(micro20_state, portc_w))
-
+
MCFG_DEVICE_ADD(RTC_TAG, MSM58321, XTAL_32_768kHz)
MCFG_MSM58321_DEFAULT_24H(false)
MCFG_MSM58321_D0_HANDLER(DEVWRITELINE(PIT_TAG, pit68230_device, pb0_w))
@@ -182,10 +182,10 @@ INPUT_PORTS_END
ROM_START( micro20 )
ROM_REGION32_BE(0x40000, "bootrom", 0)
- ROM_LOAD32_BYTE( "d00-07_u6_6791.bin", 0x000003, 0x010000, CRC(63d66ea1) SHA1(c5dfbc4d81920e1d2e981c52c1af3d486d382a35) )
- ROM_LOAD32_BYTE( "d08-15_u8_0dc6.bin", 0x000002, 0x010000, CRC(d62ef21f) SHA1(2779d430b1a0b835807627e707d46547b29ef579) )
- ROM_LOAD32_BYTE( "d16-23_u10_e5b0.bin", 0x000001, 0x010000, CRC(cd7acf86) SHA1(db994ed714a1079fbb66616355e8f18d2d1a2005) )
- ROM_LOAD32_BYTE( "d24-31_u13_d115.bin", 0x000000, 0x010000, CRC(3646d943) SHA1(97ee54063e2fe49fef2ff68d0f2e39345a75eac5) )
+ ROM_LOAD32_BYTE( "d00-07_u6_6791.bin", 0x000003, 0x010000, CRC(63d66ea1) SHA1(c5dfbc4d81920e1d2e981c52c1af3d486d382a35) )
+ ROM_LOAD32_BYTE( "d08-15_u8_0dc6.bin", 0x000002, 0x010000, CRC(d62ef21f) SHA1(2779d430b1a0b835807627e707d46547b29ef579) )
+ ROM_LOAD32_BYTE( "d16-23_u10_e5b0.bin", 0x000001, 0x010000, CRC(cd7acf86) SHA1(db994ed714a1079fbb66616355e8f18d2d1a2005) )
+ ROM_LOAD32_BYTE( "d24-31_u13_d115.bin", 0x000000, 0x010000, CRC(3646d943) SHA1(97ee54063e2fe49fef2ff68d0f2e39345a75eac5) )
ROM_END
COMP( 1984, micro20, 0, 0, micro20, micro20, driver_device, 0, "GMX", "Micro 20", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
diff --git a/src/mame/drivers/midwunit.cpp b/src/mame/drivers/midwunit.cpp
index b391b9d6f85..d2c225c8481 100644
--- a/src/mame/drivers/midwunit.cpp
+++ b/src/mame/drivers/midwunit.cpp
@@ -125,7 +125,6 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, midwunit_state )
ADDRESS_MAP_END
-
/*************************************
*
* Input ports
@@ -645,13 +644,26 @@ static MACHINE_CONFIG_START( wunit, midwunit_state )
MCFG_VIDEO_START_OVERRIDE(midwunit_state,midwunit)
- MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0)
- MCFG_MIDWAY_SERIAL_PIC_UPPER(528);
-
/* sound hardware */
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_8K, 0)
MACHINE_CONFIG_END
+static MACHINE_CONFIG_DERIVED( wunit_picsim, wunit )
+ MCFG_DEVICE_ADD("serial_security_sim", MIDWAY_SERIAL_PIC, 0)
+ MCFG_MIDWAY_SERIAL_PIC_UPPER(528); // this is actually a generic code all games check for in addition to their own game specific code!
+MACHINE_CONFIG_END
+
+
+static MACHINE_CONFIG_DERIVED( wunit_picemu, wunit )
+ MCFG_DEVICE_ADD("serial_security", MIDWAY_SERIAL_PIC_EMU, 0)
+
+ // todo, REMOVE once the emulated PIC above works!
+ // this just allows it to fall through to the simulation for now
+ MCFG_DEVICE_ADD("serial_security_sim", MIDWAY_SERIAL_PIC, 0)
+ MCFG_MIDWAY_SERIAL_PIC_UPPER(528);
+
+MACHINE_CONFIG_END
+
/*************************************
@@ -827,6 +839,9 @@ ROM_START( umk3 )
ROM_LOAD16_BYTE( "um312u54.bin", 0x00000, 0x80000, CRC(712b4db6) SHA1(7015a55f3d745c6aeb8630903e2d5cd9554b2766) )
ROM_LOAD16_BYTE( "um312u63.bin", 0x00001, 0x80000, CRC(6d301faf) SHA1(18a8e29cc3e8ce5cc0e10f8386d43e7f44fd7b75) )
+ ROM_REGION( 0x1009, "serial_security:pic", 0 ) /* security PIC (provides game ID code and serial number) */
+ ROM_LOAD( "463 MK3 Ultimate.u64", 0x0000, 0x1009, CRC(4f425218) SHA1(7f26045ed2c9ca94fadcb673ce10f28208aa720e) )
+
ROM_REGION( 0x2000000, "gfxrom", 0 )
ROM_LOAD32_BYTE( "mk3-u133.bin", 0x0000000, 0x100000, CRC(79b94667) SHA1(31bba640c351fdccc6685cadb74dd79a3f910ce8) )
ROM_LOAD32_BYTE( "mk3-u132.bin", 0x0000001, 0x100000, CRC(13e95228) SHA1(405b05f5a5a55667c2be17d4b399129bdacefd90) )
@@ -866,6 +881,9 @@ ROM_START( umk3r11 )
ROM_LOAD16_BYTE( "um311u54.bin", 0x00000, 0x80000, CRC(8bb27659) SHA1(a3ffe3d8f21c261b36c7510d620d691a8bbf665b) )
ROM_LOAD16_BYTE( "um311u63.bin", 0x00001, 0x80000, CRC(ea731783) SHA1(2915626090650c4b5adf5b26e736c3ec91ce81a6) )
+ ROM_REGION( 0x1009, "serial_security:pic", 0 ) /* security PIC (provides game ID code and serial number) */
+ ROM_LOAD( "463 MK3 Ultimate.u64", 0x0000, 0x1009, CRC(4f425218) SHA1(7f26045ed2c9ca94fadcb673ce10f28208aa720e) )
+
ROM_REGION( 0x2000000, "gfxrom", 0 )
ROM_LOAD32_BYTE( "mk3-u133.bin", 0x0000000, 0x100000, CRC(79b94667) SHA1(31bba640c351fdccc6685cadb74dd79a3f910ce8) )
ROM_LOAD32_BYTE( "mk3-u132.bin", 0x0000001, 0x100000, CRC(13e95228) SHA1(405b05f5a5a55667c2be17d4b399129bdacefd90) )
@@ -905,6 +923,9 @@ ROM_START( umk3r10 )
ROM_LOAD16_BYTE( "um310u54.bin", 0x00000, 0x80000, CRC(dfd735da) SHA1(bcb6d80dbde407d0042ec2f225b2f98740a79203) )
ROM_LOAD16_BYTE( "um310u63.bin", 0x00001, 0x80000, CRC(2dff0c83) SHA1(8942ffa3addf134085ea8d77d56e82593312e7a5) )
+ ROM_REGION( 0x1009, "serial_security:pic", 0 ) /* security PIC (provides game ID code and serial number) */
+ ROM_LOAD( "463 MK3 Ultimate.u64", 0x0000, 0x1009, CRC(4f425218) SHA1(7f26045ed2c9ca94fadcb673ce10f28208aa720e) )
+
ROM_REGION( 0x2000000, "gfxrom", 0 )
ROM_LOAD32_BYTE( "mk3-u133.bin", 0x0000000, 0x100000, CRC(79b94667) SHA1(31bba640c351fdccc6685cadb74dd79a3f910ce8) )
ROM_LOAD32_BYTE( "mk3-u132.bin", 0x0000001, 0x100000, CRC(13e95228) SHA1(405b05f5a5a55667c2be17d4b399129bdacefd90) )
@@ -1094,6 +1115,9 @@ ROM_START( rmpgwt )
ROM_LOAD16_BYTE( "1.3_rampage_world_u54_game.u54", 0x00000, 0x80000, CRC(2a8f6e1e) SHA1(7a87ad37fa1d1228c4cdd4704ff0aee42e9c86cb) )
ROM_LOAD16_BYTE( "1.3_rampage_world_u63_game.u63", 0x00001, 0x80000, CRC(403ae41e) SHA1(c08d9352efe63849f5d10c1bd1efe2b9dd7382e0) )
+ ROM_REGION( 0x1009, "serial_security:pic", 0 ) /* security PIC (provides game ID code and serial number) */
+ ROM_LOAD( "465 Rampage WT.u64", 0x0000, 0x1009, CRC(5c14d850) SHA1(f57aef8350e477252bff1fa0f930c1b5d0ceb03f) )
+
ROM_REGION( 0x2000000, "gfxrom", 0 )
ROM_LOAD32_BYTE( "1.0_rampage_world_tour_u133_image.u133", 0x0000000, 0x100000, CRC(5b5ac449) SHA1(1c01dde9a9dbd9f4a6cd30aea9f6410cab13c2c9) )
ROM_LOAD32_BYTE( "1.0_rampage_world_tour_u132_image.u132", 0x0000001, 0x100000, CRC(7b3f09c6) SHA1(477658481ee96d5ce462d5e198d80faff4d4352c) )
@@ -1128,6 +1152,9 @@ ROM_START( rmpgwt11 )
ROM_LOAD16_BYTE( "1.1_rampage_world_u54_game.u54", 0x00000, 0x80000, CRC(3aa514eb) SHA1(4ed8db55f257da6d872586d0f9f0cdf1c30e0d22) )
ROM_LOAD16_BYTE( "1.1_rampage_world_u63_game.u63", 0x00001, 0x80000, CRC(031c908f) SHA1(531669b13c33921ff199be1e841dd337c86fec50) )
+ ROM_REGION( 0x1009, "serial_security:pic", 0 ) /* security PIC (provides game ID code and serial number) */
+ ROM_LOAD( "465 Rampage WT.u64", 0x0000, 0x1009, CRC(5c14d850) SHA1(f57aef8350e477252bff1fa0f930c1b5d0ceb03f) )
+
ROM_REGION( 0x2000000, "gfxrom", 0 )
ROM_LOAD32_BYTE( "1.0_rampage_world_tour_u133_image.u133", 0x0000000, 0x100000, CRC(5b5ac449) SHA1(1c01dde9a9dbd9f4a6cd30aea9f6410cab13c2c9) )
ROM_LOAD32_BYTE( "1.0_rampage_world_tour_u132_image.u132", 0x0000001, 0x100000, CRC(7b3f09c6) SHA1(477658481ee96d5ce462d5e198d80faff4d4352c) )
@@ -1260,23 +1287,26 @@ ROM_END
*
*************************************/
-GAME( 1994, mk3, 0, wunit, mk3, midwunit_state, mk3, ROT0, "Midway", "Mortal Kombat 3 (rev 2.1)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, mk3r20, mk3, wunit, mk3, midwunit_state, mk3r20, ROT0, "Midway", "Mortal Kombat 3 (rev 2.0)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, mk3r10, mk3, wunit, mk3, midwunit_state, mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, mk3p40, mk3, wunit, mk3, midwunit_state, mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1 chip label p4.0)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, umk3, 0, wunit, mk3, midwunit_state, umk3, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.2)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, umk3r11, umk3, wunit, mk3, midwunit_state, umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.1)", MACHINE_SUPPORTS_SAVE )
-GAME( 1994, umk3r10, umk3, wunit, mk3, midwunit_state, umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, mk3, 0, wunit_picsim, mk3, midwunit_state, mk3, ROT0, "Midway", "Mortal Kombat 3 (rev 2.1)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, mk3r20, mk3, wunit_picsim, mk3, midwunit_state, mk3r20, ROT0, "Midway", "Mortal Kombat 3 (rev 2.0)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, mk3r10, mk3, wunit_picsim, mk3, midwunit_state, mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, mk3p40, mk3, wunit_picsim, mk3, midwunit_state, mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1 chip label p4.0)", MACHINE_SUPPORTS_SAVE )
+
+GAME( 1994, umk3, 0, wunit_picemu, mk3, midwunit_state, umk3, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.2)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, umk3r11, umk3, wunit_picemu, mk3, midwunit_state, umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.1)", MACHINE_SUPPORTS_SAVE )
+GAME( 1994, umk3r10, umk3, wunit_picemu, mk3, midwunit_state, umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE )
// Ultimate Mortal Kombat 3 rev 2.0.35 (TE? Hack?) version known to exist
-GAME( 1995, wwfmania, 0, wunit, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.30 08/10/95)", MACHINE_SUPPORTS_SAVE )
-GAME( 1995, wwfmaniab, wwfmania, wunit, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.20 08/02/95)", MACHINE_SUPPORTS_SAVE )
-GAME( 1995, wwfmaniac, wwfmania, wunit, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.1 07/11/95)", MACHINE_SUPPORTS_SAVE )
-GAME( 1995, openice, 0, wunit, openice, midwunit_state, openice, ROT0, "Midway", "2 On 2 Open Ice Challenge (rev 1.21)", MACHINE_SUPPORTS_SAVE )
+GAME( 1995, wwfmania, 0, wunit_picsim, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.30 08/10/95)", MACHINE_SUPPORTS_SAVE )
+GAME( 1995, wwfmaniab, wwfmania, wunit_picsim, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.20 08/02/95)", MACHINE_SUPPORTS_SAVE )
+GAME( 1995, wwfmaniac, wwfmania, wunit_picsim, wwfmania, midwunit_state, wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.1 07/11/95)", MACHINE_SUPPORTS_SAVE )
+
+GAME( 1995, openice, 0, wunit_picsim, openice, midwunit_state, openice, ROT0, "Midway", "2 On 2 Open Ice Challenge (rev 1.21)", MACHINE_SUPPORTS_SAVE )
+
+GAME( 1996, nbahangt, 0, wunit_picsim, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Hangtime (rev L1.1 04/16/96)", MACHINE_SUPPORTS_SAVE )
-GAME( 1996, nbahangt, 0, wunit, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Hangtime (rev L1.1 04/16/96)", MACHINE_SUPPORTS_SAVE )
-GAME( 1996, nbamht, nbahangt, wunit, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Maximum Hangtime (rev 1.03 06/09/97)", MACHINE_SUPPORTS_SAVE )
-GAME( 1996, nbamht1, nbahangt, wunit, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Maximum Hangtime (rev 1.0 11/08/96)", MACHINE_SUPPORTS_SAVE )
+GAME( 1996, nbamht, 0, wunit_picsim, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Maximum Hangtime (rev 1.03 06/09/97)", MACHINE_SUPPORTS_SAVE )
+GAME( 1996, nbamht1, nbamht, wunit_picsim, nbahangt, midwunit_state, nbahangt, ROT0, "Midway", "NBA Maximum Hangtime (rev 1.0 11/08/96)", MACHINE_SUPPORTS_SAVE )
-GAME( 1997, rmpgwt, 0, wunit, rmpgwt, midwunit_state, rmpgwt, ROT0, "Midway", "Rampage: World Tour (rev 1.3)", MACHINE_SUPPORTS_SAVE )
-GAME( 1997, rmpgwt11, rmpgwt, wunit, rmpgwt, midwunit_state, rmpgwt, ROT0, "Midway", "Rampage: World Tour (rev 1.1)", MACHINE_SUPPORTS_SAVE )
+GAME( 1997, rmpgwt, 0, wunit_picemu, rmpgwt, midwunit_state, rmpgwt, ROT0, "Midway", "Rampage: World Tour (rev 1.3)", MACHINE_SUPPORTS_SAVE )
+GAME( 1997, rmpgwt11, rmpgwt, wunit_picemu, rmpgwt, midwunit_state, rmpgwt, ROT0, "Midway", "Rampage: World Tour (rev 1.1)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/model1.cpp b/src/mame/drivers/model1.cpp
index 82aaebdfb48..02f8c8ac4bf 100644
--- a/src/mame/drivers/model1.cpp
+++ b/src/mame/drivers/model1.cpp
@@ -1683,28 +1683,28 @@ READ16_MEMBER(model1_state::r360_r)
WRITE16_MEMBER(model1_state::r360_w)
{
/*
- this uses the feedback board protocol
- command group B - these seem to be gamestates
-
- bf = init
- be = attract
- bd = setup #1 (lower safety bar etc.)
- bc = setup #2 (push emergency button)
- bb = ready to go
- ba = ingame
- b9 = game over
-
- results:
- 40 = default status
- 41 = * (setup #1 ack)
- 42 = lowered safety bar
- 43 = closed belt
- 44 = lever up
- 45 = pushed button
- 46 = game start
- 47 = game over
- 48 = lever down
- 49 = released belt
+ this uses the feedback board protocol
+ command group B - these seem to be gamestates
+
+ bf = init
+ be = attract
+ bd = setup #1 (lower safety bar etc.)
+ bc = setup #2 (push emergency button)
+ bb = ready to go
+ ba = ingame
+ b9 = game over
+
+ results:
+ 40 = default status
+ 41 = * (setup #1 ack)
+ 42 = lowered safety bar
+ 43 = closed belt
+ 44 = lever up
+ 45 = pushed button
+ 46 = game start
+ 47 = game over
+ 48 = lever down
+ 49 = released belt
*/
switch (data & 0xff)
{
@@ -1716,7 +1716,7 @@ WRITE16_MEMBER(model1_state::r360_w)
case 0xbd:
m_r360_state = ~0x44;
break;
-
+
case 0xbc:
m_r360_state = ~0x45;
break;
diff --git a/src/mame/drivers/model2.cpp b/src/mame/drivers/model2.cpp
index 0849e185cc3..5be07f60c5d 100644
--- a/src/mame/drivers/model2.cpp
+++ b/src/mame/drivers/model2.cpp
@@ -773,7 +773,7 @@ READ32_MEMBER(model2_state::copro_fifo_r)
else
{
// TODO
-// printf("FIFO OUT read\n");
+// printf("FIFO OUT read\n");
if (m_tgpx4->is_fifoout0_empty())
{
/* Reading from empty FIFO causes the i960 to enter wait state */
@@ -831,10 +831,18 @@ WRITE32_MEMBER(model2_state::copro_fifo_w)
else if (m_dsp_type == DSP_TYPE_TGPX4)
{
if (m_tgpx4->is_fifoin_full())
- printf("trying to push to full fifo!\n");
-
-// printf("push %08X at %08X\n", data, space.device().safe_pc());
- m_tgpx4->fifoin_w(data);
+ {
+ /* Writing to full FIFO causes the i960 to enter wait state */
+ downcast<i960_cpu_device &>(space.device()).i960_stall();
+ /* spin the main cpu and let the TGP catch up */
+ space.device().execute().spin_until_time(attotime::from_usec(100));
+ printf("write stalled\n");
+ }
+ else
+ {
+// printf("push %08X at %08X\n", data, space.device().safe_pc());
+ m_tgpx4->fifoin_w(data);
+ }
}
}
}
@@ -3159,7 +3167,7 @@ ROM_START( srallycdx ) /* Sega Rally Championship DX Revision A, Model 2A - Sing
ROM_LOAD32_WORD( "mpr-17747.11", 0x000002, 0x200000, CRC(543593fd) SHA1(5ba63a77e9fc70569af21d50b3171bc8ff4522b8) )
ROM_LOAD32_WORD( "mpr-17744.8", 0x400000, 0x200000, CRC(71fed098) SHA1(1d187cad375121a45348d640edd3cc7dce658d28) )
ROM_LOAD32_WORD( "mpr-17745.9", 0x400002, 0x200000, CRC(8ecca705) SHA1(ed2b3298aad6f4e52dc672a0168183e457564b43) )
- ROM_LOAD32_WORD( "mpr-17764a.6", 0x800000, 0x200000, CRC(dcb91e31) SHA1(2725268e97b9f4c14d56c040af38bc82f5020e3e) ) // IC 6 and 7 likely EPROMs
+ ROM_LOAD32_WORD( "mpr-17764a.6", 0x800000, 0x200000, CRC(dcb91e31) SHA1(2725268e97b9f4c14d56c040af38bc82f5020e3e) ) // IC 6 and 7 likely EPROMs
ROM_LOAD32_WORD( "mpr-17765a.7", 0x800002, 0x200000, CRC(b657dc48) SHA1(ae0f1bc6e2479fa51ca36f8be3a1785981c4dfe9) )
ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
@@ -3213,8 +3221,8 @@ ROM_START( srallycdxa ) // Sega Rally Championship DX, Model 2A? - Single player
ROM_LOAD32_WORD( "epr-17765.7", 0x800002, 0x100000, CRC(81112ea5) SHA1(a0251b4f5f18ae2e2d0576087a687dd7c2e49c34) ) // NEC D27C8000D EPROM
ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
- ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) ) // not present in this rev memory test, why ?
- ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) ) //
+ ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) ) // not present in this rev memory test, why ?
+ ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) ) //
ROM_REGION( 0x010000, "drivecpu", 0 ) // Drive I/O program
ROM_LOAD( "epr-17762.ic12", 0x000000, 0x010000, NO_DUMP ) /* Need to verify actual EPR-xxxx number, might be EPR-17759 */
diff --git a/src/mame/drivers/model3.cpp b/src/mame/drivers/model3.cpp
index 1247ddf12ef..ec2f0e64a36 100644
--- a/src/mame/drivers/model3.cpp
+++ b/src/mame/drivers/model3.cpp
@@ -3473,7 +3473,7 @@ ROM_START( vs298 ) /* Step 2.0, Sega ID# 833-13346, ROM board ID# 834-13347 */
ROM_PARAMETER( ":315_5881:key", "29234e96" )
ROM_END
-ROM_START( vs29815 ) /* Step 1.5, ROM board ID# 834-13495 VS2 VER98 STEP 1.5 */
+ROM_START( vs29815 ) /* Step 1.5, Sega game ID# is 833-13494, ROM board ID# 834-13495 VS2 VER98 STEP 1.5 */
ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */
// CROM
ROM_LOAD64_WORD_SWAP( "epr-20909.17", 0x600006, 0x080000, CRC(3dff0d7e) SHA1(c6a6a103f499cd451796ae2480b8c38c3e87a143) )
@@ -3626,7 +3626,7 @@ ROM_START( vs2v991 ) /* Step 2.0 */
ROM_PARAMETER( ":315_5881:key", "29222ac8" )
ROM_END
-ROM_START( vs299b ) /* Step 2.0 */
+ROM_START( vs299b ) /* Step 2.0, Sega game ID# is 833-13688, ROM board ID# 834-13689 VS2 VER99 STEP2 */
ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */
// CROM
ROM_LOAD64_WORD_SWAP( "epr-21550b.17", 0x400006, 0x100000, CRC(c508e488) SHA1(3134d418beaee9f824a0bd0e5441a997b5911d16) )
@@ -3860,7 +3860,7 @@ ROM_START( vs299 ) /* Step 2.0 */
ROM_PARAMETER( ":315_5881:key", "29222ac8" )
ROM_END
-ROM_START( vs29915 ) /* Step 1.5 */
+ROM_START( vs29915 ) /* Step 1.5, Sega game ID# is 833-13686-01 VS2 VER99 STEP 1.5 JPN */
ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */
// CROM
ROM_LOAD64_WORD_SWAP( "epr-21531.17", 0x600006, 0x080000, CRC(ec45015c) SHA1(b3496da10111dfa505686c0bc8f0a30042d8a8e3) )
@@ -3935,7 +3935,7 @@ ROM_START( vs29915 ) /* Step 1.5 */
ROM_FILL( 0x000000, 0x80000, 0x0000 )
ROM_END
-ROM_START( von2 ) /* Step 2.0 */
+ROM_START( von2 ) /* Step 2.0, Sega game ID# is 833-13346, ROM board ID# 834-13347 VOT, Security board ID# 837-13379-COM */
ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */
// CROM
ROM_LOAD64_WORD_SWAP( "epr-20683b.17", 0x000006, 0x200000, CRC(59d9c974) SHA1(c45594ed474a9e8fd074e0d9d5fa6662bc88dee6) )
diff --git a/src/mame/drivers/momoko.cpp b/src/mame/drivers/momoko.cpp
index 1c7c46a5a74..bcb9f874a4c 100644
--- a/src/mame/drivers/momoko.cpp
+++ b/src/mame/drivers/momoko.cpp
@@ -253,11 +253,11 @@ void momoko_state::machine_reset()
static MACHINE_CONFIG_START( momoko, momoko_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 5.0MHz */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_10MHz/2) /* 5.0MHz */
MCFG_CPU_PROGRAM_MAP(momoko_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", momoko_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, 2500000) /* 2.5MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_10MHz/4) /* 2.5MHz */
MCFG_CPU_PROGRAM_MAP(momoko_sound_map)
MCFG_WATCHDOG_ADD("watchdog")
@@ -281,13 +281,13 @@ static MACHINE_CONFIG_START( momoko, momoko_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
- MCFG_SOUND_ADD("ym1", YM2203, 1250000)
+ MCFG_SOUND_ADD("ym1", YM2203, XTAL_10MHz/8)
MCFG_SOUND_ROUTE(0, "mono", 0.15)
MCFG_SOUND_ROUTE(1, "mono", 0.15)
MCFG_SOUND_ROUTE(2, "mono", 0.15)
MCFG_SOUND_ROUTE(3, "mono", 0.40)
- MCFG_SOUND_ADD("ym2", YM2203, 1250000)
+ MCFG_SOUND_ADD("ym2", YM2203, XTAL_10MHz/8)
MCFG_AY8910_PORT_A_READ_CB(DEVREAD8("soundlatch", generic_latch_8_device, read))
MCFG_SOUND_ROUTE(0, "mono", 0.15)
MCFG_SOUND_ROUTE(1, "mono", 0.15)
@@ -299,43 +299,85 @@ MACHINE_CONFIG_END
ROM_START( momoko )
ROM_REGION( 0x10000, "maincpu", 0 ) /* main CPU */
- ROM_LOAD( "momoko03.bin", 0x0000, 0x8000, CRC(386e26ed) SHA1(ad746ed1b87bafc5b4df9a28aade58cf894f4e7b) )
- ROM_LOAD( "momoko02.bin", 0x8000, 0x4000, CRC(4255e351) SHA1(27a0e8d8aea223d2128139582e3b66106f3608ef) )
+ ROM_LOAD( "momoko03.m6", 0x0000, 0x8000, CRC(386e26ed) SHA1(ad746ed1b87bafc5b4df9a28aade58cf894f4e7b) ) // age progression text in Japanese
+ ROM_LOAD( "momoko02.m5", 0x8000, 0x4000, CRC(4255e351) SHA1(27a0e8d8aea223d2128139582e3b66106f3608ef) )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound CPU */
- ROM_LOAD( "momoko01.bin", 0x0000, 0x8000, CRC(e8a6673c) SHA1(f8984b063929305c9058801202405e6d45254b5b) )
+ ROM_LOAD( "momoko01.u4", 0x0000, 0x8000, CRC(e8a6673c) SHA1(f8984b063929305c9058801202405e6d45254b5b) )
ROM_REGION( 0x2000, "gfx1", 0 ) /* text */
- ROM_LOAD( "momoko13.bin", 0x0000, 0x2000, CRC(2745cf5a) SHA1(3db7c6319cac63df1620ef25508c5c45eaa4b141) )
+ ROM_LOAD( "momoko13.u4", 0x0000, 0x2000, CRC(2745cf5a) SHA1(3db7c6319cac63df1620ef25508c5c45eaa4b141) ) // On the FP-8631 PCB
ROM_REGION( 0x2000, "gfx3", 0 ) /* FG */
- ROM_LOAD( "momoko14.bin", 0x0000, 0x2000, CRC(cfccca05) SHA1(4ecff488a37ac76ecb9ecf8980bea30dcc9c9951) )
+ ROM_LOAD( "momoko14.p2", 0x0000, 0x2000, CRC(cfccca05) SHA1(4ecff488a37ac76ecb9ecf8980bea30dcc9c9951) )
ROM_REGION( 0x10000, "gfx4", 0 ) /* sprite */
- ROM_LOAD16_BYTE( "momoko16.bin", 0x0000, 0x8000, CRC(fc6876fc) SHA1(b2d06bc01ef9f4db9bf8902d67f31ccbb0fea61a) )
- ROM_LOAD16_BYTE( "momoko17.bin", 0x0001, 0x8000, CRC(45dc0247) SHA1(1b2bd4197ab7d237966e037c249b5bd623646c0b) )
+ ROM_LOAD16_BYTE( "momoko16.e5", 0x0000, 0x8000, CRC(fc6876fc) SHA1(b2d06bc01ef9f4db9bf8902d67f31ccbb0fea61a) ) // On the FP-8631 PCB
+ ROM_LOAD16_BYTE( "momoko17.e6", 0x0001, 0x8000, CRC(45dc0247) SHA1(1b2bd4197ab7d237966e037c249b5bd623646c0b) ) // On the FP-8631 PCB
ROM_REGION( 0x20000, "gfx2", 0 ) /* BG */
- ROM_LOAD16_BYTE( "momoko09.bin", 0x00000, 0x8000, CRC(9f5847c7) SHA1(6bc9a00622d8a23446294a8d5d467375c5719125) )
- ROM_LOAD16_BYTE( "momoko11.bin", 0x00001, 0x8000, CRC(9c9fbd43) SHA1(7adfd7ea3dd6745c14e719883f1a86e0a3b3c0ff) )
- ROM_LOAD16_BYTE( "momoko10.bin", 0x10000, 0x8000, CRC(ae17e74b) SHA1(f52657ea6b6ac518b70fd7b811d9699da27f67d9) )
- ROM_LOAD16_BYTE( "momoko12.bin", 0x10001, 0x8000, CRC(1e29c9c4) SHA1(d78f102cefc9852b529dd317a76c7003ec2ad3d5) )
+ ROM_LOAD16_BYTE( "momoko09.e8", 0x00000, 0x8000, CRC(9f5847c7) SHA1(6bc9a00622d8a23446294a8d5d467375c5719125) )
+ ROM_LOAD16_BYTE( "momoko11.c8", 0x00001, 0x8000, CRC(9c9fbd43) SHA1(7adfd7ea3dd6745c14e719883f1a86e0a3b3c0ff) )
+ ROM_LOAD16_BYTE( "momoko10.d8", 0x10000, 0x8000, CRC(ae17e74b) SHA1(f52657ea6b6ac518b70fd7b811d9699da27f67d9) )
+ ROM_LOAD16_BYTE( "momoko12.a8", 0x10001, 0x8000, CRC(1e29c9c4) SHA1(d78f102cefc9852b529dd317a76c7003ec2ad3d5) )
ROM_REGION( 0x20000, "user1", 0 ) /* BG map */
- ROM_LOAD( "momoko04.bin", 0x0000, 0x8000, CRC(3ab3c2c3) SHA1(d4a0d7f83bf64769e90a2c264c6114ac308cb8b5) )
- ROM_LOAD( "momoko05.bin", 0x8000, 0x8000, CRC(757cdd2b) SHA1(3471b42dc6458a18894dbd0638f4fe43c86dd70d) )
- ROM_LOAD( "momoko06.bin", 0x10000, 0x8000, CRC(20cacf8b) SHA1(e2b39abfc960e1c472e2bcf0cf06825c39941c03) )
- ROM_LOAD( "momoko07.bin", 0x18000, 0x8000, CRC(b94b38db) SHA1(9c9e45bbeca7b6b8b0051b144fb31fceaf5d6906) )
+ ROM_LOAD( "momoko04.r8", 0x0000, 0x8000, CRC(3ab3c2c3) SHA1(d4a0d7f83bf64769e90a2c264c6114ac308cb8b5) )
+ ROM_LOAD( "momoko05.p8", 0x8000, 0x8000, CRC(757cdd2b) SHA1(3471b42dc6458a18894dbd0638f4fe43c86dd70d) )
+ ROM_LOAD( "momoko06.n8", 0x10000, 0x8000, CRC(20cacf8b) SHA1(e2b39abfc960e1c472e2bcf0cf06825c39941c03) )
+ ROM_LOAD( "momoko07.l8", 0x18000, 0x8000, CRC(b94b38db) SHA1(9c9e45bbeca7b6b8b0051b144fb31fceaf5d6906) )
ROM_REGION( 0x2000, "user2", 0 ) /* BG color/priority table */
- ROM_LOAD( "momoko08.bin", 0x0000, 0x2000, CRC(69b41702) SHA1(21b33b243dd6eaec8d41d9fd4d9e7faf2bd7f4d2) )
+ ROM_LOAD( "momoko08.h8", 0x0000, 0x2000, CRC(69b41702) SHA1(21b33b243dd6eaec8d41d9fd4d9e7faf2bd7f4d2) )
ROM_REGION( 0x4000, "user3", 0 ) /* FG map */
- ROM_LOAD( "momoko15.bin", 0x0000, 0x4000, CRC(8028f806) SHA1(c7450d48803082f64af67fe752b6f49b71b6ff48) )
+ ROM_LOAD( "momoko15.k2", 0x0000, 0x4000, CRC(8028f806) SHA1(c7450d48803082f64af67fe752b6f49b71b6ff48) ) // On the FP-8631 PCB
ROM_REGION( 0x0120, "proms", 0 ) /* TEXT color */
ROM_LOAD( "momoko-c.bin", 0x0000, 0x0100, CRC(f35ccae0) SHA1(60b99dd3c96637dacba7e96a143b1a2d6ffd28b9) )
ROM_LOAD( "momoko-b.bin", 0x0100, 0x0020, CRC(427b0e5c) SHA1(aa2797b899571527cc96013fd3420b841954ee67) )
ROM_END
-GAME( 1986, momoko, 0, momoko, momoko, driver_device, 0, ROT0, "Jaleco", "Momoko 120%", MACHINE_SUPPORTS_SAVE )
+ROM_START( momokoe )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* main CPU */
+ ROM_LOAD( "3.m6", 0x0000, 0x8000, CRC(84053a7d) SHA1(6e8fb22bb48954f4fed2530991ebe5b872c9c089) ) // age progression text in English
+ ROM_LOAD( "2.m5", 0x8000, 0x4000, CRC(98ad397b) SHA1(b7ae218d0d397b1e258ec6d1f836cb998f984092) )
+
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound CPU */
+ ROM_LOAD( "momoko01.u4", 0x0000, 0x8000, CRC(e8a6673c) SHA1(f8984b063929305c9058801202405e6d45254b5b) )
+
+ ROM_REGION( 0x2000, "gfx1", 0 ) /* text */
+ ROM_LOAD( "momoko13.u4", 0x0000, 0x2000, CRC(2745cf5a) SHA1(3db7c6319cac63df1620ef25508c5c45eaa4b141) ) // On the FP-8631 PCB
+
+ ROM_REGION( 0x2000, "gfx3", 0 ) /* FG */
+ ROM_LOAD( "momoko14.p2", 0x0000, 0x2000, CRC(cfccca05) SHA1(4ecff488a37ac76ecb9ecf8980bea30dcc9c9951) )
+
+ ROM_REGION( 0x10000, "gfx4", 0 ) /* sprite */
+ ROM_LOAD16_BYTE( "momoko16.e5", 0x0000, 0x8000, CRC(fc6876fc) SHA1(b2d06bc01ef9f4db9bf8902d67f31ccbb0fea61a) ) // On the FP-8631 PCB
+ ROM_LOAD16_BYTE( "momoko17.e6", 0x0001, 0x8000, CRC(45dc0247) SHA1(1b2bd4197ab7d237966e037c249b5bd623646c0b) ) // On the FP-8631 PCB
+
+ ROM_REGION( 0x20000, "gfx2", 0 ) /* BG */
+ ROM_LOAD16_BYTE( "momoko09.e8", 0x00000, 0x8000, CRC(9f5847c7) SHA1(6bc9a00622d8a23446294a8d5d467375c5719125) )
+ ROM_LOAD16_BYTE( "momoko11.c8", 0x00001, 0x8000, CRC(9c9fbd43) SHA1(7adfd7ea3dd6745c14e719883f1a86e0a3b3c0ff) )
+ ROM_LOAD16_BYTE( "momoko10.d8", 0x10000, 0x8000, CRC(ae17e74b) SHA1(f52657ea6b6ac518b70fd7b811d9699da27f67d9) )
+ ROM_LOAD16_BYTE( "momoko12.a8", 0x10001, 0x8000, CRC(1e29c9c4) SHA1(d78f102cefc9852b529dd317a76c7003ec2ad3d5) )
+
+ ROM_REGION( 0x20000, "user1", 0 ) /* BG map */
+ ROM_LOAD( "momoko04.r8", 0x0000, 0x8000, CRC(3ab3c2c3) SHA1(d4a0d7f83bf64769e90a2c264c6114ac308cb8b5) )
+ ROM_LOAD( "momoko05.p8", 0x8000, 0x8000, CRC(757cdd2b) SHA1(3471b42dc6458a18894dbd0638f4fe43c86dd70d) )
+ ROM_LOAD( "momoko06.n8", 0x10000, 0x8000, CRC(20cacf8b) SHA1(e2b39abfc960e1c472e2bcf0cf06825c39941c03) )
+ ROM_LOAD( "momoko07.l8", 0x18000, 0x8000, CRC(b94b38db) SHA1(9c9e45bbeca7b6b8b0051b144fb31fceaf5d6906) )
+
+ ROM_REGION( 0x2000, "user2", 0 ) /* BG color/priority table */
+ ROM_LOAD( "momoko08.h8", 0x0000, 0x2000, CRC(69b41702) SHA1(21b33b243dd6eaec8d41d9fd4d9e7faf2bd7f4d2) )
+
+ ROM_REGION( 0x4000, "user3", 0 ) /* FG map */
+ ROM_LOAD( "momoko15.k2", 0x0000, 0x4000, CRC(8028f806) SHA1(c7450d48803082f64af67fe752b6f49b71b6ff48) ) // On the FP-8631 PCB
+
+ ROM_REGION( 0x0120, "proms", 0 ) /* TEXT color */
+ ROM_LOAD( "momoko-c.bin", 0x0000, 0x0100, CRC(f35ccae0) SHA1(60b99dd3c96637dacba7e96a143b1a2d6ffd28b9) )
+ ROM_LOAD( "momoko-b.bin", 0x0100, 0x0020, CRC(427b0e5c) SHA1(aa2797b899571527cc96013fd3420b841954ee67) )
+ROM_END
+
+GAME( 1986, momoko, 0, momoko, momoko, driver_device, 0, ROT0, "Jaleco", "Momoko 120% (Japanese text)", MACHINE_SUPPORTS_SAVE )
+GAME( 1986, momokoe, momoko, momoko, momoko, driver_device, 0, ROT0, "Jaleco", "Momoko 120% (English text)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/mzr8105.cpp b/src/mame/drivers/mzr8105.cpp
index 295436fbbea..129146b6e7e 100644
--- a/src/mame/drivers/mzr8105.cpp
+++ b/src/mame/drivers/mzr8105.cpp
@@ -1,378 +1,42 @@
// license:BSD-3-Clause
// copyright-holders:Joakim Larsson Edstrom
-/***************************************************************************
- *
- * Mizar VME8105 rev D 3U SBC driver, initially derived from force68k.c
- *
- * 19/08/2015
- *
- * I baught this board from http://www.retrotechnology.com without documentation.
- * It has a Motorola 68000 CPU @ 10MHz and two 27128 EPROMS with OS9 DEBUG labels
- * and not much more except 16 or so TTLs, 2 PALs and a VME P1 connector. It is a
- * 2 sided design so it shold be possible to trace the schematics quite easily.
- * There is a date on the P1 Connector: "Feb 20 1987"
- *
- * ||
- * ||
- * ||
- * ||
- * ||____________________________________________________________ ___
- * || --------------K2|U6-7432|U7-7474|U14-7405|U21-74645 | |_| |
- * || | 2764 - low |-+-------+-------+--------+-----------+ | | |
- * || | OS9 DEBUG U4| +---------+ +--------+---------+ | | |
- * || -------------- | | |U13-7474|U20-74645| | | |
- * || ______________ | | +--------+---------+ | | |
- * || | | | | ______________K4____ | | |
- * || | U3| | | |U12-7438|U19-74244| | |VME|
- * || -------------- | |+------K6---------K3---+ | | |
- * || ______________ | ||U11-PAL20L10|U18-74244| | |P1 |
- * || | 2764 - high | | |+-----021102-+---------+ | | |
- * || | OS9 DEBUG U2| |MC68000L10+------------+---------+ | | |
- * || |______________| | ||U10-PAL14L4 |U17-74244| | | |
- * || | |+-----021001-+---------+ | | |
- * || -------------- | |+----+_______|U16-74244|+--+| | |
- * || | | | |XTAL |U9-7410+---------+| || | |
- * ||K1 | U1| | |FOX100-------+---------+|K5||_| |
- * || -------------- |_________|10MHz|U8-7404|U15-74148|| || |___|
- * ||--||--------------------------------+----+-------+---------++--+
- * ||--||
- * ||
- *
- * PAL:s
- *------
- * The board has two PAL:s, a PAL20L10 and a PAL14L4.
- *
- * _____ _____
- * OD/CLK 1 |* \_/ | 20 VCC
- * CPU A13 I0 2 | | 19 O0/LR A23
- * U9 7410p12 I1 3 | | 18 O1/A0 A22
- * CPU *AS I2 4 | | 17 02/A1 U2/U4 2764p22 *OE
- * GND I3 5 | | 16 03/A2 U11 PAL20L10p6 I4
- * CPU A14 I4 6 | U10 | 15 A0/O0 U11 PAL20L10p7 I5
- * CPU A15 I5 7 | PAL14L4 | 14 A1/O1 U19 74LS244p11 I0b
- * CPU A16 I6 8 | | 13 A2/O2 A18
- * CPU A17 I7 9 | | 12 LR/O3 A20
- * GND 10 |_____________| 11 CLK/OD A21
- *
- * _____ _____
- * OD/CLK 1 |* \_/ | 24 VCC
- * I0 2 | | 23 O0/LR
- * CPU *AS I1 3 | | 22 O1/A0
- * U10 PAL14L4p3 I2 4 | | 21 02/A1
- * I3 5 | | 20 03/A2
- * U10 PAL14L4p16 I4 6 | U10 | 19 04/NC
- * U10 PAL14L4p15 I5 7 | PAL20L10 | 18 NC/O0
- * I6 8 | | 17 A2/O1
- * I7 9 | | 16 A1/O2
- * I8 10 | | 15 A0/O3
- * I9 11 | | 14 LR/O4
- * GND 12 |_____________| 13 CLK/OD
- *
- * Trace is not fully completed and validated.
- *
- * History of Mizar
- *-------------------
- * Mizar was one of the first companies that released VME boards in 1982-3 together with
- * Force Computers and Motorola. Their systems was often supported by OS9/68000 from Microware.
- * In 1993 Mizar discontinued their OS9/CPU board product range and focused entirely on DSP
- * boards. RTSI was founded by Mizar employees preserving the knowledge in OS9 as consultants.
- * In 1998 Blue Wave resulted from the merger of Mizar and Loughborough Sound Images.
- * Not much tech information availabe but I found some quotes about Mizar on the internet:
- *
- * From http://archive.org/stream/68micro-vol-11-num-02/V11N02_Feb1989_djvu.txt :
- *--------------------------------------------------------------------------------
- * " Mizar provides complete OS-9 solutions for the VMEbus. Mizar's VME CPUs
- * offer (he functions and performance your application demands. Our single
- * height (3U) VME processors are uniquely configurable computing engines,
- * Through Mizar's unique MXbus expansion interface, standard and custom side
- * modules can be added to basic processors to create double-height (6U) boards
- * tor specific applications, 3U CPU options include 68010, 66020, and 63030
- * microprocessors, up to one MB of DRAM, serial I/O, real-time clock, and
- * mailbox interrupt support. Standard MXbus side modules include additional DRAM.
- * SRAM, and I/O.
- *
- * Mizar's standard double- height (6U) processors provide additional features such
- * as a high-speed cache to enhance 68030 performance, floating, point coprocessor
- * support, up to four MB dual ported DRAM, VSB memory interface, Ethernet, and SCSI.
- *
- * Mizar also supports OS-9 with completely configured OS9 development systems and
- * OS-9 application server systems. For more information, call Mizar today
- *
- * 800-635-0200 MIZAR 1419 Dunn Drive CarrolHon, TX 75006 214-446-2664"
- *
- * Known boards from Mizar:
- *
- * MZX 414
- * MZ 7122
- * MZ 7132
- * MZ 7300 Serial I/O Board (Z8530)
- * EMX 7320 Serial I/O Board
- * MZ 7400 Disk Controller Board (WD 2010; WD 1772)
- * MZ 7500 IEEE-488 (GPIB) Interface Board
- * EMX 7550 Ethernet Controller Board (AMD 7990 Lance) MAC: 00:80:F8 MIZAR, INC.
- * MZ 7772
- * MZ 7810 I/O Expansion Module (6681 DUART)
- * MZ 7831 SCSI Expansion Module (WD 33C93A)
- * MZ 7850 Ethernet Expansion Module (WD 83C690)
- * MZ 8000 ??
- * MZ 8105 3U 68000 CPU board
- * MZ 8115
- * MZ 8300 3U serial board, 2 NEC 7201 and 1 AMD CTS9513 5 x 16 bit Counter/Timer
- * MZ 8310 timing module 2 x AM9513
- * MZ 8505 IEEE-488 (GPIB) Interface Board"
- *
- * From http://www.megalextoria.com/forum2/index.php?t=msg&goto=73945&
- *--------------------------------------------------------------------
- * Aug 20 1984 a report by James Jones from the OS/9 conferance in Des Moines:
- * "...
- * Mizar: is selling VME bus 68010 boards, running OS-9/68000; they also make
- * various memory and I/O boards, disk controller boards, and and a NEC 7220-based
- * graphics controller board...."
- *
- * Misc links about Mizar:
- * http://www.vita.com/History
- * http://www.verycomputer.com/154_e272024804bbe203_1.htm
- * https://www.aihitdata.com/company/00814595/RTSI/overview
- *
- * Address Map
- * --------------------------------------------------------------------------
- * Address Range Description/Assumption
- * --------------------------------------------------------------------------
- * 0x000000 0x01ffff ROM because of fixed vectors
- * 0x020000 0x03ffff RAM because bootvector stack starts at 0x21000
- * -- VME adresses---
- * 0xff0000 0xff0003 Bootstrap expects to find a UPD7201 serial device here
- * --------------------------------------------------------------------------
- *
- * Interrupt sources
- * ----------------------------------------------------------
- * Description Device Lvl IRQ VME board
- * /Board Vector Address
- * ----------------------------------------------------------
- * On board Sources
- * TBD
- * Off board Sources (other VME boards)
- * TBD
- * ----------------------------------------------------------
- *
- * TODO:
- * - Dump the ROMs (DONE)
- * - Setup a working address map (DONE)
- * - Add VME bus driver (Faked one)
- * - understand what other device is expected in VME space ff0011-13
- *
- ****************************************************************************/
#include "emu.h"
+#include "includes/mzr8105.h"
+#include "bus/vme/mzr8300.h"
#include "cpu/m68000/m68000.h"
-#include "bus/rs232/rs232.h"
#include "machine/clock.h"
-#include "softlist.h"
-
-// The board needs a SIO board to get a user interface so lets fake one until the VME devices is done
-#define FAKEVME 1
-
-// There are two user prom sockets
-#define CARDSLOT 0
-
-#if FAKEVME
-#include "machine/z80sio.h"
-#endif
-
-#if CARDSLOT // Awaiting info on how to boot the user eproms
-#include "bus/generic/slot.h"
-#include "bus/generic/carts.h"
-#endif
-
-#define VERBOSE 0
-
-#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); }
-#define LOG(x) {} LOGPRINT(x)
-#define LOGR(x) {} LOGPRINT(x)
-#define LOGSETUP(x) {} LOGPRINT(x)
-#define LOGINT(x) {} LOGPRINT(x)
-
-#if VERBOSE >= 2
-#define logerror printf
-#endif
-
-#ifdef _MSC_VER
-#define LLFORMAT "%I64%"
-#define FUNCNAME __func__
-#else
-#define LLFORMAT "%lld"
-#define FUNCNAME __PRETTY_FUNCTION__
-#endif
-
-/* These values are borrowed just to get the terminal going and should be replaced
- * once a proper serial board hardware (ie MZ 8300) is found and emulated. */
-#define BAUDGEN_CLOCK XTAL_19_6608MHz /* fake */
-#define UPD_CLOCK (BAUDGEN_CLOCK / 128) /* This will give prompt */
-
-class mzr8105_state : public driver_device
-{
-public:
-mzr8105_state(const machine_config &mconfig, device_type type, const char *tag) :
- driver_device (mconfig, type, tag)
- ,m_maincpu (*this, "maincpu")
- ,m_updterm(*this, "upd")
-#if CARDSLOT
- ,m_cart(*this, "exp_rom1")
-#endif
-{
-}
-
- DECLARE_READ16_MEMBER (vme_a24_r);
- DECLARE_WRITE16_MEMBER (vme_a24_w);
- DECLARE_READ16_MEMBER (vme_a16_r);
- DECLARE_WRITE16_MEMBER (vme_a16_w);
- virtual void machine_start () override;
- DECLARE_WRITE_LINE_MEMBER (write_updterm_clock);
-
-#if CARDSLOT
- // User EPROM/SRAM slot(s)
- int mzr8105_load_cart(device_image_interface &image, generic_slot_device *slot);
- DECLARE_DEVICE_IMAGE_LOAD_MEMBER (exp1_load) { return mzr8105_load_cart(image, m_cart); }
- DECLARE_READ16_MEMBER (read16_rom);
-#endif
-
-protected:
-
-private:
- required_device<cpu_device> m_maincpu;
- required_device<upd7201N_device> m_updterm;
-
-#if CARDSLOT
- uint16_t *m_usrrom;
- required_device<generic_slot_device> m_cart;
-#endif
-};
static ADDRESS_MAP_START (mzr8105_mem, AS_PROGRAM, 16, mzr8105_state)
ADDRESS_MAP_UNMAP_HIGH
+/* The ROMs contains an OS9 bootloader. It is position independent but reset vector suggests that it sits flat on adress 0 (zero) */
AM_RANGE (0x000000, 0x003fff) AM_ROM AM_REGION("roms", 0x000000) /* System EPROM Area 16Kb OS9 DEBUG - not verified */
AM_RANGE (0x004000, 0x01ffff) AM_ROM AM_REGION("roms", 0x004000)/* System EPROM Area 112Kb for System ROM - not verified */
AM_RANGE (0x020000, 0x03ffff) AM_RAM /* Not verified */
-// AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, max 128Kb mapped by a cartslot */
-// AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
-// AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
-#if FAKEVME
-// Faking a Mizar 8300 SIO UPD7201 BOARD in VME A16 adress space
- AM_RANGE (0xFF0000, 0xFF0001) AM_DEVREADWRITE8("upd", upd7201N_device, db_r, db_w, 0x00ff)
- AM_RANGE (0xFF0002, 0xFF0003) AM_DEVREADWRITE8("upd", upd7201N_device, cb_r, cb_w, 0x00ff)
- AM_RANGE (0xFF0004, 0xFF0005) AM_DEVREADWRITE8("upd", upd7201N_device, da_r, da_w, 0x00ff)
- AM_RANGE (0xFF0006, 0xFF0007) AM_DEVREADWRITE8("upd", upd7201N_device, ca_r, ca_w, 0x00ff)
-#endif
+// AM_RANGE (0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */
+// AM_RANGE (0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */
ADDRESS_MAP_END
/* Input ports */
static INPUT_PORTS_START (mzr8105)
INPUT_PORTS_END
-/* Start it up */
-void mzr8105_state::machine_start ()
-{
- LOG(("%s()\n", FUNCNAME));
-
-#if CARDSLOT
- /* Map user ROM/RAM socket(s) */
- if (m_cart->exists())
- {
- m_usrrom = (uint16_t*)m_cart->get_rom_base();
- m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(generic_slot_device::read16_rom), (generic_slot_device*)m_cart));
- }
-#endif
-}
-
-/* Dummy VME access methods until the VME bus device is ready for use */
-READ16_MEMBER (mzr8105_state::vme_a24_r){
- LOG(("%s()\n", FUNCNAME));
- return (uint16_t) 0;
-}
-
-WRITE16_MEMBER (mzr8105_state::vme_a24_w){
- LOG(("%s()\n", FUNCNAME));
-}
-
-READ16_MEMBER (mzr8105_state::vme_a16_r){
- LOG(("%s()\n", FUNCNAME));
- return (uint16_t) 0;
-}
-
-WRITE16_MEMBER (mzr8105_state::vme_a16_w){
- LOG(("%s()\n", FUNCNAME));
-}
-
-#if CARDSLOT
-/*
- * The USER EPROM Area
- */
-// Implementation of static 2 x 64K EPROM in sockets U1/U3 as 16 bit wide cartridge for easier
-// software handling. TODO: make configurable according to table above.
-static MACHINE_CONFIG_FRAGMENT( mzr8105_eprom_sockets )
- MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "mzr8105_cart")
- MCFG_GENERIC_EXTENSIONS("bin,rom")
- MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH)
- MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG)
- MCFG_GENERIC_LOAD(mzr8105_state, exp1_load)
-// MCFG_SOFTWARE_LIST_ADD("cart_list", "mzr8105_cart")
-MACHINE_CONFIG_END
-
-/***************************
- Rom loading functions
-****************************/
-int mzr8105_state::mzr8105_load_cart(device_image_interface &image, generic_slot_device *slot)
-{
- uint32_t size = slot->common_get_size("rom");
-
- if (size > 0x20000) // Max 128Kb - not verified
- {
- LOG(("Cartridge size exceeding max size (128Kb): %d\n", size) );
- image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (128Kb)");
- return IMAGE_INIT_FAIL;
- }
-
- slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG);
- slot->common_load_rom(slot->get_rom_base(), size, "rom");
-
- return IMAGE_INIT_PASS;
-}
-#endif
-
-WRITE_LINE_MEMBER (mzr8105_state::write_updterm_clock){
- m_updterm->txcb_w (state);
- m_updterm->rxcb_w (state);
-}
+static SLOT_INTERFACE_START(mzr8105_vme_cards)
+ SLOT_INTERFACE("mzr8300", VME_MZR8300)
+SLOT_INTERFACE_END
/*
* Machine configuration
*/
-static MACHINE_CONFIG_START (mzr8105, mzr8105_state)
+MACHINE_CONFIG_START (mzr8105, mzr8105_state)
MCFG_CPU_ADD ("maincpu", M68000, XTAL_10MHz)
MCFG_CPU_PROGRAM_MAP (mzr8105_mem)
-
-/* Terminal Port config */
- MCFG_UPD7201_ADD("upd", XTAL_4MHz, 0, 0, 0, 0 )
- MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_txd))
- MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_dtr))
- MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_rts))
-
- MCFG_RS232_PORT_ADD ("rs232trm", default_rs232_devices, "terminal")
- MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("upd", upd7201N_device, rxb_w))
- MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("upd", upd7201N_device, ctsb_w))
-
- MCFG_DEVICE_ADD ("updterm_clock", CLOCK, UPD_CLOCK)
- MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (mzr8105_state, write_updterm_clock))
-
-#if CARDSLOT
-// EPROM sockets
- MCFG_FRAGMENT_ADD(mzr8105_eprom_sockets)
-#endif
-
+ MCFG_VME_P1_DEVICE_ADD("vme")
+ MCFG_VME_P1_SLOT_ADD ("vme", "slot1", mzr8105_vme_cards, nullptr)
MACHINE_CONFIG_END
/* ROM definitions */
-/* UPD7201 init sequence
+/* mzr8300 UPD7201 init sequence
* :upd B Reg 02 <- 04 Interrupt vector
* :upd B Reg 06 <- 00 Sync byte
* :upd B Reg 07 <- 00 Sync byte
@@ -382,11 +46,8 @@ MACHINE_CONFIG_END
*/
ROM_START (mzr8105)
ROM_REGION (0x20000, "roms", 0)
-
-/* The ROMs contains an OS9 bootloader. It is position independent but reset vector suggests that it sits flat on adress 0 (zero) */
ROM_LOAD16_BYTE ("mzros9LB.bin", 0x000000, 0x2000, CRC (7c6a354d) SHA1 (2721eb649c8046dbcb517a36a97dc0816cd133f2))
ROM_LOAD16_BYTE ("mzros9HB.bin", 0x000001, 0x2000, CRC (d18e69a6) SHA1 (a00b68f4d649bcc09a29361f8692e52be12b3792))
-
ROM_END
/* Driver */
diff --git a/src/mame/drivers/namcos12.cpp b/src/mame/drivers/namcos12.cpp
index 3e847b5fae3..747ee95237f 100644
--- a/src/mame/drivers/namcos12.cpp
+++ b/src/mame/drivers/namcos12.cpp
@@ -1688,13 +1688,10 @@ static MACHINE_CONFIG_START( coh700, namcos12_state )
MCFG_RTC4543_ADD("rtc", XTAL_32_768kHz)
MCFG_RTC4543_DATA_CALLBACK(DEVWRITELINE("sub:sci1", h8_sci_device, rx_w))
- MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
-
MCFG_DEVICE_MODIFY("sub:sci1")
MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w))
- MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb_line_dispatch_device<2>, in_w))
+ MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
MCFG_AT28C16_ADD("at28c16", nullptr)
diff --git a/src/mame/drivers/namcos21.cpp b/src/mame/drivers/namcos21.cpp
index c1fa3d60b90..f04b1cd8ba1 100644
--- a/src/mame/drivers/namcos21.cpp
+++ b/src/mame/drivers/namcos21.cpp
@@ -530,6 +530,9 @@ Filter Board
#include "machine/nvram.h"
#define PTRAM_SIZE 0x20000
+// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace
+#define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \
+ MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480)
#define ENABLE_LOGGING 0
@@ -1234,37 +1237,39 @@ READ16_MEMBER(namcos21_state::NAMCO_C139_SCI_register_r){ return 0; }
/* MASTER 68000 CPU Memory declarations */
/*************************************************************/
-#define NAMCO21_68K_COMMON \
- AM_RANGE(0x200000, 0x20ffff) AM_READWRITE(dspram16_r,dspram16_w) AM_SHARE("dspram16") \
- AM_RANGE(0x280000, 0x280001) AM_WRITENOP /* written once on startup */ \
- AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w) \
- AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w) \
- AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (?) Air Combat */ \
- AM_RANGE(0x480000, 0x4807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) /* Air Combat */ \
- AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(c355_obj_ram_r,c355_obj_ram_w) \
- AM_RANGE(0x720000, 0x720007) AM_READWRITE(c355_obj_position_r,c355_obj_position_w) \
- AM_RANGE(0x740000, 0x74ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") \
- AM_RANGE(0x750000, 0x75ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext") \
- AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) \
- AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0) \
- AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram") \
- AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w) \
- AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w) \
- AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w) \
+static ADDRESS_MAP_START( common_map, AS_PROGRAM, 16, namcos21_state )
+ AM_RANGE(0x200000, 0x20ffff) AM_READWRITE(dspram16_r,dspram16_w) AM_SHARE("dspram16")
+ AM_RANGE(0x280000, 0x280001) AM_WRITENOP /* written once on startup */
+ AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w)
+ AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w)
+ AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (?) Air Combat */
+ AM_RANGE(0x480000, 0x4807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) /* Air Combat */
+ AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(c355_obj_ram_r,c355_obj_ram_w)
+ AM_RANGE(0x720000, 0x720007) AM_READWRITE(c355_obj_position_r,c355_obj_position_w)
+ AM_RANGE(0x740000, 0x74ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
+ AM_RANGE(0x750000, 0x75ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
+ AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w)
+ AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0)
+ AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
+ AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
+ AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
+ AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
AM_RANGE(0xc00000, 0xcfffff) AM_ROM AM_MIRROR(0x100000) AM_REGION("edata", 0)
-static ADDRESS_MAP_START( namcos21_68k_master, AS_PROGRAM, 16, namcos21_state )
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
- NAMCO21_68K_COMMON
+ AM_IMPORT_FROM( common_map )
ADDRESS_MAP_END
-static ADDRESS_MAP_START( namcos21_68k_slave, AS_PROGRAM, 16, namcos21_state )
+static ADDRESS_MAP_START( slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_RAM /* private work RAM */
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
- NAMCO21_68K_COMMON
+ AM_IMPORT_FROM( common_map )
ADDRESS_MAP_END
@@ -1460,7 +1465,7 @@ WRITE16_MEMBER(namcos21_state::winrun_dspcomram_control_w)
COMBINE_DATA( &m_winrun_dspcomram_control[offset] );
}
-static ADDRESS_MAP_START( am_master_winrun, AS_PROGRAM, 16, namcos21_state )
+static ADDRESS_MAP_START( winrun_master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
@@ -1480,7 +1485,7 @@ static ADDRESS_MAP_START( am_master_winrun, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( am_slave_winrun, AS_PROGRAM, 16, namcos21_state )
+static ADDRESS_MAP_START( winrun_slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x13ffff) AM_RAM
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
@@ -1492,7 +1497,7 @@ static ADDRESS_MAP_START( am_slave_winrun, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( am_gpu_winrun, AS_PROGRAM, 16, namcos21_state )
+static ADDRESS_MAP_START( winrun_gpu_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x100000, 0x100001) AM_READWRITE(winrun_gpu_color_r,winrun_gpu_color_w) /* ? */
AM_RANGE(0x180000, 0x19ffff) AM_RAM /* work RAM */
@@ -1511,7 +1516,7 @@ ADDRESS_MAP_END
/* SOUND 6809 CPU Memory declarations */
/*************************************************************/
-static ADDRESS_MAP_START( am_sound_winrun, AS_PROGRAM, 8, namcos21_state )
+static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, namcos21_state )
AM_RANGE(0x0000, 0x3fff) AM_ROMBANK("bank6") /* banked */
AM_RANGE(0x3000, 0x3003) AM_WRITENOP /* ? */
AM_RANGE(0x4000, 0x4001) AM_DEVREADWRITE("ymsnd", ym2151_device,read,write)
@@ -1531,7 +1536,7 @@ ADDRESS_MAP_END
/* I/O HD63705 MCU Memory declarations */
/*************************************************************/
-static ADDRESS_MAP_START( am_mcu_winrun, AS_PROGRAM, 8, namcos21_state )
+static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, namcos21_state )
AM_RANGE(0x0000, 0x0000) AM_READNOP
AM_RANGE(0x0001, 0x0001) AM_READ_PORT("PORTB") /* p1,p2 start */
AM_RANGE(0x0002, 0x0002) AM_READ_PORT("PORTC") /* coins */
@@ -1553,24 +1558,25 @@ static ADDRESS_MAP_START( am_mcu_winrun, AS_PROGRAM, 8, namcos21_state )
ADDRESS_MAP_END
-////////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////////////
-
-#define DRIVEYES_68K_COMMON \
- AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(c355_obj_ram_r,c355_obj_ram_w) \
- AM_RANGE(0x720000, 0x720007) AM_READWRITE(c355_obj_position_r,c355_obj_position_w) \
- AM_RANGE(0x740000, 0x74ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") \
- AM_RANGE(0x750000, 0x75ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext") \
- AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) \
- AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0) \
- AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram") \
- AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w) \
- AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w) \
- AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
+/*************************************************************/
+/* Driver's Eyes Memory declarations overrides */
+/*************************************************************/
-static ADDRESS_MAP_START( driveyes_68k_master, AS_PROGRAM, 16, namcos21_state )
+
+static ADDRESS_MAP_START( driveyes_common_map, AS_PROGRAM, 16, namcos21_state )
+ AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(c355_obj_ram_r,c355_obj_ram_w)
+ AM_RANGE(0x720000, 0x720007) AM_READWRITE(c355_obj_position_r,c355_obj_position_w)
+ AM_RANGE(0x740000, 0x74ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
+ AM_RANGE(0x750000, 0x75ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
+ AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w)
+ AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0)
+ AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
+ AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
+ AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
+ AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( driveyes_master_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
@@ -1581,16 +1587,236 @@ static ADDRESS_MAP_START( driveyes_68k_master, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x3c0000, 0x3c1fff) AM_READWRITE(winrun_68k_dspcomram_r,winrun_68k_dspcomram_w)
AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w)
AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w)
- DRIVEYES_68K_COMMON
+ AM_IMPORT_FROM( driveyes_common_map )
ADDRESS_MAP_END
-static ADDRESS_MAP_START( driveyes_68k_slave, AS_PROGRAM, 16, namcos21_state )
+static ADDRESS_MAP_START( driveyes_slave_map, AS_PROGRAM, 16, namcos21_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
- DRIVEYES_68K_COMMON
+ AM_IMPORT_FROM( driveyes_common_map )
ADDRESS_MAP_END
+/*************************************************************/
+/* */
+/* NAMCO SYSTEM 21 INPUT PORTS */
+/* */
+/*************************************************************/
+
+static INPUT_PORTS_START( s21default )
+ PORT_START("PORTB") /* 63B05Z0 - PORT B */
+ PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
+
+ PORT_START("PORTC") /* 63B05Z0 - PORT C & SCI */
+ PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
+
+ PORT_START("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
+ PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(15) PORT_KEYDELTA(10)
+ PORT_START("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
+ PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(20) PORT_KEYDELTA(10)
+ PORT_START("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_START("PORTH") /* 63B05Z0 - PORT H */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_START("DSW") /* 63B05Z0 - $2000 DIP SW */
+ PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
+ PORT_DIPNAME( 0x02, 0x02, "DSW2")
+ PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x04, 0x04, "DSW3")
+ PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x08, 0x08, "DSW4")
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x10, 0x10, "DSW5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x00, "PCM ROM")
+ PORT_DIPSETTING( 0x20, "2M" )
+ PORT_DIPSETTING( 0x00, "4M" )
+ PORT_DIPNAME( 0x40, 0x40, "DSW7")
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x80, "Screen Stop")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_START("DIAL0") /* 63B05Z0 - $3000 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("DIAL1") /* 63B05Z0 - $3001 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("DIAL2") /* 63B05Z0 - $3002 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_START("DIAL3") /* 63B05Z0 - $3003 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+INPUT_PORTS_END
+
+/* "SCI - ? */
+static INPUT_PORTS_START( winrun )
+ PORT_INCLUDE(s21default)
+
+ PORT_MODIFY("DSW")
+ PORT_DIPNAME( 0x20, 0x20, "PCM ROM")
+ PORT_DIPSETTING( 0x20, "2M" )
+ PORT_DIPSETTING( 0x00, "4M" )
+
+ PORT_MODIFY("PORTB") /* 63B05Z0 - PORT B */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) /* ? */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) /* ? */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */
+
+ PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
+ PORT_BIT( 0xff, 0x80, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Gas Pedal")
+ PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
+ PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Steering Wheel")
+ PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
+ PORT_BIT( 0xff, 0x80, IPT_PEDAL2 ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Brake Pedal")
+ PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("PORTH") /* 63B05Z0 - PORT H */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Shift Down")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Shift Up")
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
+INPUT_PORTS_END
+
+static INPUT_PORTS_START( winrungp )
+ PORT_INCLUDE(winrun)
+
+ PORT_MODIFY("DSW")
+ PORT_DIPNAME( 0x20, 0x00, "PCM ROM")
+ PORT_DIPSETTING( 0x20, "2M" )
+ PORT_DIPSETTING( 0x00, "4M" )
+INPUT_PORTS_END
+
+static INPUT_PORTS_START( driveyes )
+ PORT_INCLUDE(winrungp)
+
+ PORT_MODIFY("PORTB")
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", namcoio_gearbox_device, clutch_r )
+ PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("DIAL0")
+ PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER("gearbox", namcoio_gearbox_device, in_r, nullptr )
+ PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("PORTH") /* 63B05Z0 - PORT H */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red Button")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Green Button")
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
+INPUT_PORTS_END
+
+// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault.
+// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping
+// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the
+// inputs wrap around when they hit the maximum, causing undesired movement
+static INPUT_PORTS_START( cybsled )
+ PORT_INCLUDE(s21default)
+
+ PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
+ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */
+ PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
+ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */
+ PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
+ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */
+ PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
+ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */
+ PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("PORTH") /* 63B05Z0 - PORT H */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Viewport Change Button")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Missile Button")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Gun Button")
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
+INPUT_PORTS_END
+
+static INPUT_PORTS_START( aircomb )
+ PORT_INCLUDE(s21default)
+
+ PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
+ PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4)
+ PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
+ PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4)
+ PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
+ PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE
+ PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */
+ PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_MODIFY("PORTH") /* IN#10: 63B05Z0 - PORT H */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///???
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
+INPUT_PORTS_END
+
static const gfx_layout tile_layout =
{
@@ -1628,20 +1854,20 @@ MACHINE_START_MEMBER(namcos21_state,namcos21)
static MACHINE_CONFIG_START( namcos21, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
- MCFG_CPU_PROGRAM_MAP(namcos21_68k_master)
+ MCFG_CPU_PROGRAM_MAP(master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
- MCFG_CPU_PROGRAM_MAP(namcos21_68k_slave)
+ MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
- MCFG_CPU_PROGRAM_MAP(am_sound_winrun)
+ MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120)
MCFG_CPU_ADD("mcu", HD63705,2048000) /* IO */
- MCFG_CPU_PROGRAM_MAP(am_mcu_winrun)
+ MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, irq0_line_hold)
MCFG_CPU_ADD("dspmaster", TMS32025,24000000) /* 24 MHz? overclocked */
@@ -1668,10 +1894,7 @@ static MACHINE_CONFIG_START( namcos21, namcos21_state )
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
- MCFG_SCREEN_SIZE(NAMCOS21_POLY_FRAME_WIDTH,NAMCOS21_POLY_FRAME_HEIGHT)
- MCFG_SCREEN_VISIBLE_AREA(0,495,0,479)
+ MCFG_SCREEN_RAW_PARAMS_NAMCO480I
MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21)
MCFG_SCREEN_PALETTE("palette")
@@ -1696,20 +1919,20 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( driveyes, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
- MCFG_CPU_PROGRAM_MAP(driveyes_68k_master)
+ MCFG_CPU_PROGRAM_MAP(driveyes_master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
- MCFG_CPU_PROGRAM_MAP(driveyes_68k_slave)
+ MCFG_CPU_PROGRAM_MAP(driveyes_slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
- MCFG_CPU_PROGRAM_MAP(am_sound_winrun)
+ MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120)
MCFG_CPU_ADD("mcu", HD63705,2048000) /* IO */
- MCFG_CPU_PROGRAM_MAP(am_mcu_winrun)
+ MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, irq0_line_hold)
MCFG_CPU_ADD("dsp", TMS32025,24000000*2) /* 24 MHz? overclocked */
@@ -1727,13 +1950,11 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos2)
MCFG_NVRAM_ADD_1FILL("nvram")
+ MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0)
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
- MCFG_SCREEN_SIZE(NAMCOS21_POLY_FRAME_WIDTH,NAMCOS21_POLY_FRAME_HEIGHT)
- MCFG_SCREEN_VISIBLE_AREA(0,495,0,479)
- MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21)
+ MCFG_SCREEN_RAW_PARAMS_NAMCO480I
+ MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_driveyes)
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", namcos21)
@@ -1757,20 +1978,20 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( winrun, namcos21_state )
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
- MCFG_CPU_PROGRAM_MAP(am_master_winrun)
+ MCFG_CPU_PROGRAM_MAP(winrun_master_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
- MCFG_CPU_PROGRAM_MAP(am_slave_winrun)
+ MCFG_CPU_PROGRAM_MAP(winrun_slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
- MCFG_CPU_PROGRAM_MAP(am_sound_winrun)
+ MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60)
MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120)
MCFG_CPU_ADD("mcu", HD63705,2048000) /* IO */
- MCFG_CPU_PROGRAM_MAP(am_mcu_winrun)
+ MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, irq0_line_hold)
MCFG_CPU_ADD("dsp", TMS32025,24000000) /* 24 MHz? overclocked */
@@ -1783,7 +2004,7 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
MCFG_TMS32025_XF_OUT_CB(NOOP)
MCFG_CPU_ADD("gpu", M68000,12288000) /* graphics coprocessor */
- MCFG_CPU_PROGRAM_MAP(am_gpu_winrun)
+ MCFG_CPU_PROGRAM_MAP(winrun_gpu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_gpu_vblank)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */
@@ -1792,13 +2013,9 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos2)
MCFG_NVRAM_ADD_1FILL("nvram")
-
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
- MCFG_SCREEN_SIZE(NAMCOS21_POLY_FRAME_WIDTH,NAMCOS21_POLY_FRAME_HEIGHT)
- MCFG_SCREEN_VISIBLE_AREA(0,495,0,479)
- MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21)
+ MCFG_SCREEN_RAW_PARAMS_NAMCO480I
+ MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_winrun)
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty)
@@ -2507,210 +2724,11 @@ DRIVER_INIT_MEMBER(namcos21_state,driveyes)
m_mbNeedsKickstart = 0;
}
-/*************************************************************/
-/* */
-/* NAMCO SYSTEM 21 INPUT PORTS */
-/* */
-/*************************************************************/
-
-static INPUT_PORTS_START( s21default )
- PORT_START("PORTB") /* 63B05Z0 - PORT B */
- PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
-
- PORT_START("PORTC") /* 63B05Z0 - PORT C & SCI */
- PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
-
- PORT_START("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
- PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(15) PORT_KEYDELTA(10)
- PORT_START("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
- PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(20) PORT_KEYDELTA(10)
- PORT_START("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_START("PORTH") /* 63B05Z0 - PORT H */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_START("DSW") /* 63B05Z0 - $2000 DIP SW */
- PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
- PORT_DIPNAME( 0x02, 0x02, "DSW2")
- PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "DSW3")
- PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, "DSW4")
- PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "DSW5")
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, "PCM ROM")
- PORT_DIPSETTING( 0x20, "2M" )
- PORT_DIPSETTING( 0x00, "4M" )
- PORT_DIPNAME( 0x40, 0x40, "DSW7")
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Screen Stop")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-
- PORT_START("DIAL0") /* 63B05Z0 - $3000 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DIAL1") /* 63B05Z0 - $3001 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DIAL2") /* 63B05Z0 - $3002 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DIAL3") /* 63B05Z0 - $3003 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
-INPUT_PORTS_END
-
-/* "SCI - ? */
-static INPUT_PORTS_START( winrun )
- PORT_INCLUDE(s21default)
-
- PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x20, 0x20, "PCM ROM")
- PORT_DIPSETTING( 0x20, "2M" )
- PORT_DIPSETTING( 0x00, "4M" )
-
- PORT_MODIFY("PORTB") /* 63B05Z0 - PORT B */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) /* ? */
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) /* ? */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */
-
- PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
- PORT_BIT( 0xff, 0x80, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Gas Pedal")
- PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
- PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Steering Wheel")
- PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
- PORT_BIT( 0xff, 0x80, IPT_PEDAL2 ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Brake Pedal")
- PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_MODIFY("PORTH") /* 63B05Z0 - PORT H */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Shift Down")
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Shift Up")
- PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
-INPUT_PORTS_END
-
-static INPUT_PORTS_START( winrungp )
- PORT_INCLUDE(winrun)
-
- PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x20, 0x00, "PCM ROM")
- PORT_DIPSETTING( 0x20, "2M" )
- PORT_DIPSETTING( 0x00, "4M" )
-INPUT_PORTS_END
-
-// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault.
-// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping
-// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the
-// inputs wrap around when they hit the maximum, causing undesired movement
-static INPUT_PORTS_START( cybsled )
- PORT_INCLUDE(s21default)
-
- PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
- PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */
- PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
- PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */
- PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
- PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */
- PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
- PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */
- PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_MODIFY("PORTH") /* 63B05Z0 - PORT H */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
-INPUT_PORTS_END
-
-static INPUT_PORTS_START( aircomb )
- PORT_INCLUDE(s21default)
-
- PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */
- PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4)
- PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */
- PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4)
- PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */
- PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE
- PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
-
- PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */
- PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game
- PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-
- PORT_MODIFY("PORTH") /* IN#10: 63B05Z0 - PORT H */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///???
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
-INPUT_PORTS_END
-
/* YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR, COMPANY, FULLNAME, FLAGS */
GAME( 1988, winrun, 0, winrun, winrun, namcos21_state, winrun, ROT0, "Namco", "Winning Run", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1989, winrungp, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run Suzuka Grand Prix (Japan)", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1991, winrun91, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run '91 (Japan)", MACHINE_IMPERFECT_GRAPHICS )
-GAME( 1991, driveyes, 0, driveyes, winrungp, namcos21_state, driveyes, ROT0, "Namco", "Driver's Eyes (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
+GAME( 1991, driveyes, 0, driveyes, driveyes, namcos21_state, driveyes, ROT0, "Namco", "Driver's Eyes (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
GAME( 1991, solvalou, 0, namcos21, s21default, namcos21_state, solvalou, ROT0, "Namco", "Solvalou (Japan)", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1991, starblad, 0, namcos21, s21default, namcos21_state, starblad, ROT0, "Namco", "Starblade (World)", MACHINE_IMPERFECT_GRAPHICS )
GAME( 1991, starbladj, starblad, namcos21, s21default, namcos21_state, starblad, ROT0, "Namco", "Starblade (Japan)", MACHINE_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/namcos23.cpp b/src/mame/drivers/namcos23.cpp
index 133193de49c..b79ac26831f 100644
--- a/src/mame/drivers/namcos23.cpp
+++ b/src/mame/drivers/namcos23.cpp
@@ -3566,13 +3566,10 @@ static MACHINE_CONFIG_START( gorgon, namcos23_state )
MCFG_RTC4543_ADD("rtc", XTAL_32_768kHz)
MCFG_RTC4543_DATA_CALLBACK(DEVWRITELINE("subcpu:sci1", h8_sci_device, rx_w))
- MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
-
MCFG_DEVICE_MODIFY("subcpu:sci1")
MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w))
- MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb_line_dispatch_device<2>, in_w))
+ MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -3635,13 +3632,10 @@ static MACHINE_CONFIG_START( s23, namcos23_state )
MCFG_RTC4543_ADD("rtc", XTAL_32_768kHz)
MCFG_RTC4543_DATA_CALLBACK(DEVWRITELINE("subcpu:sci1", h8_sci_device, rx_w))
- MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
-
MCFG_DEVICE_MODIFY("subcpu:sci1")
MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w))
- MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb_line_dispatch_device<2>, in_w))
+ MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -3715,13 +3709,10 @@ static MACHINE_CONFIG_START( ss23, namcos23_state )
MCFG_RTC4543_ADD("rtc", XTAL_32_768kHz)
MCFG_RTC4543_DATA_CALLBACK(DEVWRITELINE("subcpu:sci1", h8_sci_device, rx_w))
- MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2)
- MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
- MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
-
MCFG_DEVICE_MODIFY("subcpu:sci1")
MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w))
- MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb_line_dispatch_device<2>, in_w))
+ MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(":namco_settings", namco_settings_device, clk_w))
MCFG_NVRAM_ADD_0FILL("nvram")
diff --git a/src/mame/drivers/neodriv.hxx b/src/mame/drivers/neodriv.hxx
index 777ece76c70..24360853f0f 100644
--- a/src/mame/drivers/neodriv.hxx
+++ b/src/mame/drivers/neodriv.hxx
@@ -1851,6 +1851,28 @@ ROM_START( kotm2 ) /* MVS AND AES VERSION */
ROM_LOAD16_BYTE( "039-c4.c4", 0x200001, 0x080000, CRC(81c9c250) SHA1(e3a34ff69081a8681b5ca895915892dcdccfa7aa) ) /* Plane 2,3 */ /* TC534200 */
ROM_END
+ROM_START( kotm2a ) /* MVS VERSION */
+ ROM_REGION( 0x100000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT )
+ ROM_LOAD16_WORD_SWAP( "039_p1.p1", 0x000000, 0x080000, CRC(8d186638) SHA1(c3874bbb1bfcb220173afb2e0a2123ffaeb7bd2b) ) /* TC534200 */
+ ROM_LOAD16_WORD_SWAP( "039-p2.p2", 0x080000, 0x080000, CRC(28661afe) SHA1(6c85ff6ab334b1ca744f726f42dac211537e7315) ) /* TC534200 */
+
+ NEO_SFIX_128K( "039-s1.s1", CRC(63ee053a) SHA1(7d4b92bd022708975b1470e8f24d1f5a712e1b94) ) /* TC531000 */
+
+ NEO_BIOS_AUDIO_128K( "039-m1.m1", CRC(0c5b2ad5) SHA1(15eb5ea10fecdbdbcfd06225ae6d88bb239592e7) ) /* TC531001 */
+
+ ROM_REGION( 0x300000, "cslot1:ymsnd", 0 )
+ ROM_LOAD( "039-v2.v2", 0x000000, 0x200000, CRC(86d34b25) SHA1(89bdb614b0c63d678962da52e2f596750d20828c) ) /* TC5316200 */
+ ROM_LOAD( "039-v4.v4", 0x200000, 0x100000, CRC(8fa62a0b) SHA1(58ac2fdd73c542eb8178cfc4adfa0e5940183283) ) /* TC538200 */
+
+ ROM_REGION( 0x600000, "cslot1:sprites", 0 )
+ ROM_LOAD16_BYTE( "039-c1.c1", 0x000000, 0x100000, CRC(6d1c4aa9) SHA1(4fbc9d7cb37522ec298eefbe38c75a2d050fbb4a) ) /* Plane 0,1 */ /* TC5316200 */
+ ROM_CONTINUE( 0x400000, 0x100000 )
+ ROM_LOAD16_BYTE( "039-c2.c2", 0x000001, 0x100000, CRC(f7b75337) SHA1(4d85f85948c3e6ed38b0b0ccda79de3ce026e2d9) ) /* Plane 2,3 */ /* TC5316200 */
+ ROM_CONTINUE( 0x400001, 0x100000 )
+ ROM_LOAD16_BYTE( "039-c3.c3", 0x200000, 0x080000, CRC(bfc4f0b2) SHA1(f4abe2b52882b966412f3b503b8f2c8f49b57968) ) /* Plane 0,1 */ /* TC534200 */
+ ROM_LOAD16_BYTE( "039-c4.c4", 0x200001, 0x080000, CRC(81c9c250) SHA1(e3a34ff69081a8681b5ca895915892dcdccfa7aa) ) /* Plane 2,3 */ /* TC534200 */
+ROM_END
+
ROM_START( kotm2p ) /* fairly late prototype release, only the code differs from the main set */
ROM_REGION( 0x100000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT )
ROM_LOAD16_BYTE( "proto_039-p1.p1", 0x000001, 0x080000, CRC(3c1d17e7) SHA1(aeaff465fafa46ded903ed4e8cb8cd05de8dc096) )
@@ -8699,6 +8721,7 @@ GAME( 1991, fatfury1, neogeo, neobase, neogeo, neogeo_state, neogeo, R
GAME( 1991, roboarmy, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Robo Army", MACHINE_SUPPORTS_SAVE )
GAME( 1992, fbfrenzy, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Football Frenzy (NGM-034 ~ NGH-034)", MACHINE_SUPPORTS_SAVE )
GAME( 1992, kotm2, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "King of the Monsters 2 - The Next Thing (NGM-039 ~ NGH-039)", MACHINE_SUPPORTS_SAVE )
+GAME( 1992, kotm2a, kotm2, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "King of the Monsters 2 - The Next Thing (older)", MACHINE_SUPPORTS_SAVE )
GAME( 1992, kotm2p, kotm2, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "King of the Monsters 2 - The Next Thing (prototype)", MACHINE_SUPPORTS_SAVE )
GAME( 1993, sengoku2, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Sengoku 2 / Sengoku Denshou 2", MACHINE_SUPPORTS_SAVE )
GAME( 1992, bstars2, neogeo, neobase, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Baseball Stars 2", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/nmk16.cpp b/src/mame/drivers/nmk16.cpp
index c11895d572b..50046220893 100644
--- a/src/mame/drivers/nmk16.cpp
+++ b/src/mame/drivers/nmk16.cpp
@@ -1134,7 +1134,7 @@ static ADDRESS_MAP_START( atombjt_map, AS_PROGRAM, 16, nmk16_state )
AM_RANGE(0x0c2014, 0x0c2015) AM_READ(atombjt_unkr_r)
AM_RANGE(0x0c2016, 0x0c2017) AM_READ_PORT("DSW1")
AM_RANGE(0x0c2018, 0x0c2019) AM_READ_PORT("DSW2")
-// AM_RANGE(0x0c201c, 0x0c201d) // oki banking related?
+// AM_RANGE(0x0c201c, 0x0c201d) // oki banking related?
AM_RANGE(0x0c201e, 0x0c201f) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("mainram")
AM_RANGE(0x100000, 0x101fff) AM_RAM
diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp
index 7f3c2a4ae2f..e2a6cc74c12 100644
--- a/src/mame/drivers/pacman.cpp
+++ b/src/mame/drivers/pacman.cpp
@@ -29,7 +29,7 @@
* MTV Rock-N-Roll Trivia (Part 2)
* Woodpecker
* Pacman Club / Club Lambada
-
+ * Eeekk!
Known issues:
* Mystery items in Ali Baba don't work correctly because of protection.
@@ -37,7 +37,6 @@
Also need 4-players extra inputs.
Known to exist but dumps needed
- * Eeeek!
* Ms Pac Plus
* Ms Pac Man Twin
* MTV Rock-N-Roll Trivia (Part 2), 1 bad rom. It's not a bad dump, the rom is bad.
@@ -345,10 +344,9 @@ Boards:
#include "machine/watchdog.h"
#include "sound/ay8910.h"
#include "sound/sn76496.h"
-#include "machine/acitya.h"
+#include "machine/epos.h"
#include "machine/jumpshot.h"
#include "machine/pacplus.h"
-#include "machine/theglobp.h"
/*************************************
@@ -1428,13 +1426,8 @@ static ADDRESS_MAP_START( nmouse_portmap, AS_IO, 8, pacman_state )
AM_RANGE(0x00, 0x00) AM_WRITE(nmouse_interrupt_vector_w)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( theglobp_portmap, AS_IO, 8, pacman_state )
- AM_RANGE(0x00, 0xff) AM_READ(theglobp_decrypt_rom) /* Switch protection logic */
- AM_IMPORT_FROM(writeport)
-ADDRESS_MAP_END
-
-static ADDRESS_MAP_START( acitya_portmap, AS_IO, 8, pacman_state )
- AM_RANGE(0x00, 0xff) AM_READ(acitya_decrypt_rom) /* Switch protection logic */
+static ADDRESS_MAP_START( epos_portmap, AS_IO, 8, pacman_state )
+ AM_RANGE(0x00, 0xff) AM_READ(epos_decryption_w) /* Switch protection logic */
AM_IMPORT_FROM(writeport)
ADDRESS_MAP_END
@@ -2376,6 +2369,39 @@ static INPUT_PORTS_START( theglobp )
INPUT_PORTS_END
+static INPUT_PORTS_START( eeekk )
+ PORT_INCLUDE(pacman)
+ PORT_MODIFY("IN0")
+ PORT_SERVICE_NO_TOGGLE( 0x10, 0x10 )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME( "P2 Attack" )
+
+ PORT_MODIFY("IN1")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME( "P1 Attack/2 Player Start" )
+
+ PORT_MODIFY("DSW1")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR(Lives) ) PORT_DIPLOCATION("SW:1,2")
+ PORT_DIPSETTING( 0x03, "3" )
+ PORT_DIPSETTING( 0x02, "4" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x00, "6" )
+ PORT_DIPNAME( 0x1c, 0x10, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW:3,4,5")
+ PORT_DIPSETTING( 0x00, "8 (Hard)" )
+ PORT_DIPSETTING( 0x04, "7" )
+ PORT_DIPSETTING( 0x08, "6" )
+ PORT_DIPSETTING( 0x0c, "5" )
+ PORT_DIPSETTING( 0x10, "4" )
+ PORT_DIPSETTING( 0x14, "3" )
+ PORT_DIPSETTING( 0x18, "2" )
+ PORT_DIPSETTING( 0x1c, "1 (Easy)" )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR(Demo_Sounds) ) PORT_DIPLOCATION("SW:6")
+ PORT_DIPSETTING( 0x00, DEF_STR(On) )
+ PORT_DIPSETTING( 0x20, DEF_STR(Off) )
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
+INPUT_PORTS_END
+
static INPUT_PORTS_START( vanvan )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
@@ -3651,7 +3677,7 @@ static MACHINE_CONFIG_DERIVED( theglobp, pacman )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(epos_map)
- MCFG_CPU_IO_MAP(theglobp_portmap)
+ MCFG_CPU_IO_MAP(epos_portmap)
MCFG_MACHINE_START_OVERRIDE(pacman_state,theglobp)
MCFG_MACHINE_RESET_OVERRIDE(pacman_state,theglobp)
@@ -3663,13 +3689,25 @@ static MACHINE_CONFIG_DERIVED( acitya, pacman )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(epos_map)
- MCFG_CPU_IO_MAP(acitya_portmap)
+ MCFG_CPU_IO_MAP(epos_portmap)
MCFG_MACHINE_START_OVERRIDE(pacman_state,acitya)
MCFG_MACHINE_RESET_OVERRIDE(pacman_state,acitya)
MACHINE_CONFIG_END
+static MACHINE_CONFIG_DERIVED( eeekk, pacman )
+
+ /* basic machine hardware */
+ MCFG_CPU_MODIFY("maincpu")
+ MCFG_CPU_PROGRAM_MAP(epos_map)
+ MCFG_CPU_IO_MAP(epos_portmap)
+
+ MCFG_MACHINE_START_OVERRIDE(pacman_state,eeekk)
+ MCFG_MACHINE_RESET_OVERRIDE(pacman_state,eeekk)
+MACHINE_CONFIG_END
+
+
static MACHINE_CONFIG_DERIVED( vanvan, pacman )
/* basic machine hardware */
@@ -6029,6 +6067,9 @@ ROM_START( beastfp )
ROM_LOAD( "beastf.5e", 0x0000, 0x1000, CRC(5654dc34) SHA1(fc2336b951a3ab48d4fc4f36a8dd80e79e8ca1a0) )
ROM_LOAD( "beastf.5f", 0x1000, 0x1000, CRC(1b30ca61) SHA1(8495d8a280346246f00c4f1dc42ab5a2a02c5863) )
+ ROM_REGION( 0x002c, "epos_pal10h8", 0)
+ ROM_LOAD( "beastf.ic4", 0x0000, 0x002c, CRC(a6ab926d) SHA1(a8c2ddce2d595cecf057b37916f2f897de8a0e4e) ) // pal10h8
+
ROM_REGION( 0x0120, "proms", 0 )
ROM_LOAD( "glob.7f", 0x0000, 0x0020, CRC(1f617527) SHA1(448845cab63800a05fcb106897503d994377f78f) )
ROM_LOAD( "glob.4a", 0x0020, 0x0100, CRC(28faa769) SHA1(7588889f3102d4e0ca7918f536556209b2490ea1) )
@@ -6039,6 +6080,28 @@ ROM_START( beastfp )
ROM_END
+ROM_START( eeekk ) // Pac-Man PCB conversion kit. Includes a small daughtercard (2 roms + 4 PLDs, plugs in through the Z80 socket), 2 roms + 2 BPROMs
+ ROM_REGION( 0x20000, "maincpu", 0 )
+ ROM_LOAD( "u_2_eeekk_pg03094.u2", 0x0000, 0x2000, CRC(701e37f2) SHA1(15bbd983e9112ce15dd229f126f2bccfa8b9807c) ) // encrypted
+ ROM_LOAD( "u_3_eeekk_pg03094.u3", 0x2000, 0x2000, CRC(bcf524ae) SHA1(be2a1a2984ea1439c63d8c353e4ae85bf42c8a55) ) // encrypted
+
+ ROM_REGION( 0x2000, "gfx1", 0 )
+ ROM_LOAD( "5_e_eeekk_pg03094.5e", 0x0000, 0x1000, CRC(780183a8) SHA1(8466d75d79b3c87db143f5c2e8b58dad1d2e501c) )
+ ROM_LOAD( "5_f_eeekk_pg03094.5f", 0x1000, 0x1000, CRC(418526e4) SHA1(a95764e216ccdaca0631604e1101ba91884effde) )
+
+ ROM_REGION( 0x002c, "epos_pal10h8", 0)
+ ROM_LOAD( "eeekk.ic4", 0x0000, 0x002c, CRC(f588ba4e) SHA1(07d74da02172789ccd1fead2b5afe8ce72c5149d) ) // pal10h8
+
+ ROM_REGION( 0x0120, "proms", 0 )
+ ROM_LOAD( "7_f_eeekk.7f", 0x0000, 0x0020, CRC(c64c8a53) SHA1(55e7b88cb1ce129e8154722a489d76c38924d3f1) ) // 82s123
+ ROM_LOAD( "4_a_eeekk.4a", 0x0020, 0x0100, CRC(a5044ded) SHA1(566bd06674bf8069dc633102493c9991b64e4379) ) // 82s126
+
+ ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */
+ ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) // 82s126
+ ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) // 82s126 - timing - not used
+ROM_END
+
+
ROM_START( vanvan )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "van-1.50", 0x0000, 0x1000, CRC(cf1b2df0) SHA1(938b4434c0129cf9151f829901d00e47dca68956) )
@@ -7284,6 +7347,7 @@ GAME( 1983, theglobp, suprglob, theglobp, theglobp, driver_device, 0, ROT
GAME( 1983, sprglobp, suprglob, theglobp, theglobp, driver_device, 0, ROT90, "Epos Corporation", "Super Glob (Pac-Man hardware)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, sprglbpg, suprglob, pacman, theglobp, driver_device, 0, ROT90, "bootleg", "Super Glob (Pac-Man hardware) (German bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, beastfp, suprglob, theglobp, theglobp, driver_device, 0, ROT90, "Epos Corporation", "Beastie Feastie (conversion kit)", MACHINE_SUPPORTS_SAVE )
+GAME( 1984, eeekk, 0, eeekk, eeekk, driver_device, 0, ROT90, "Epos Corporation", "Eeekk!", MACHINE_SUPPORTS_SAVE )
GAME( 1984, drivfrcp, 0, drivfrcp, drivfrcp, pacman_state, drivfrcp, ROT90, "Shinkai Inc. (Magic Electronics Inc. license)", "Driving Force (Pac-Man conversion)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/pc.cpp b/src/mame/drivers/pc.cpp
index a6d5d3b29fe..b0e4fcfa2c9 100644
--- a/src/mame/drivers/pc.cpp
+++ b/src/mame/drivers/pc.cpp
@@ -330,6 +330,60 @@ static MACHINE_CONFIG_DERIVED(m15, pccga)
MCFG_RAM_EXTRA_OPTIONS("16K, 160K, 304K")
MACHINE_CONFIG_END
+static MACHINE_CONFIG_START( laser_turbo_xt, pc_state )
+ MCFG_CPU_PC(pc8, pc8, I8088, XTAL_14_31818MHz/3) /* 4,77 MHz */
+
+ MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
+ MCFG_DEVICE_INPUT_DEFAULTS(pccga)
+
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false) // Multi I/O card (includes FDC)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc_xt", false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", pc_isa8_cards, nullptr, false)
+
+ /* keyboard */
+ MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_IBM_PC_XT_83)
+
+ /* internal ram */
+ MCFG_RAM_ADD(RAM_TAG)
+ MCFG_RAM_DEFAULT_SIZE("640K")
+ MCFG_RAM_EXTRA_OPTIONS("512K,768K,896K,1024K,1408K,1536K,1664K")
+
+ /* software lists */
+ MCFG_SOFTWARE_LIST_ADD("disk_list","ibm5150")
+MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_START( laser_xt3, pc_state )
+ MCFG_CPU_PC(pc8, pc8, I8088, XTAL_14_31818MHz/3) /* 4,77 MHz */
+
+ MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
+ MCFG_DEVICE_INPUT_DEFAULTS(pccga)
+
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga", false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "com", false) // Multi I/O card (includes FDC)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "fdc_xt", false) // floppy drive A is 5.25" 360K and B is 3.5" 720K
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa7", pc_isa8_cards, nullptr, false)
+ MCFG_ISA8_SLOT_ADD("mb:isa", "isa8", pc_isa8_cards, nullptr, false)
+
+ /* keyboard */
+ MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_IBM_PC_XT_83)
+
+ /* internal ram */
+ MCFG_RAM_ADD(RAM_TAG)
+ MCFG_RAM_DEFAULT_SIZE("640K")
+ MCFG_RAM_EXTRA_OPTIONS("512K,1024K,1536K,1664K")
+
+ /* software lists */
+ MCFG_SOFTWARE_LIST_ADD("disk_list","ibm5150")
+MACHINE_CONFIG_END
+
ROM_START( bw230 )
ROM_REGION(0x10000,"bios", 0)
ROM_LOAD("bondwell.bin", 0xe000, 0x2000, CRC(d435a405) SHA1(a57c705d1144c7b61940b6f5c05d785c272fc9bb))
@@ -496,6 +550,17 @@ ROM_START( eagle1600 )
ROM_LOAD("eagle 1600 video char gen u301.bin", 0x00000, 0x1000, CRC(1a7e552f) SHA1(749058783eec9d96a70dc5fdbfccb56196f889dc))
ROM_END
+ROM_START(laser_turbo_xt)
+ ROM_REGION(0x10000, "bios", 0)
+ ROM_LOAD("laser_turbo_xt.bin", 0x0e000, 0x02000, CRC(0a6121d3) SHA1(59b1f8dd6fe981ef9a7700adebf6e1adda7cee90)) // version 1.11 - 27c64d
+ROM_END
+
+ROM_START(laser_xt3)
+ ROM_REGION(0x10000, "bios", 0)
+ ROM_LOAD("laser_xt3.bin", 0x0e000, 0x02000, CRC(b45a7dd3) SHA1(62f17c408be0036d00a182e94c5c88b83d46b625)) // version 1.26 - 27c64
+ROM_END
+
+
/***************************************************************************
Game driver(s)
@@ -530,3 +595,6 @@ COMP( 198?, mbc16, ibm5150, 0, pccga, pccga, driver_device
COMP( 198?, ataripc3, ibm5150, 0, pccga, pccga, driver_device, 0, "Atari", "PC-3" , 0)
COMP( 1989, ssam88s, ibm5150, 0, pccga, pccga, driver_device, 0, "Samsung", "Samtron 88S" , MACHINE_NOT_WORKING)
COMP( 1983, eagle1600, ibm5150, 0, eagle1600, pccga, driver_device, 0, "Eagle", "1600" , MACHINE_NOT_WORKING)
+
+COMP ( 1988, laser_turbo_xt, ibm5150, 0, laser_turbo_xt, 0, driver_device, 0, "VTech", "Laser Turbo XT" , 0)
+COMP ( 1989, laser_xt3, ibm5150, 0, laser_xt3, 0, driver_device, 0, "VTech", "Laser XT/3" , 0)
diff --git a/src/mame/drivers/pg685.cpp b/src/mame/drivers/pg685.cpp
index 9681dcd4ea7..8cfbfa7e2d3 100644
--- a/src/mame/drivers/pg685.cpp
+++ b/src/mame/drivers/pg685.cpp
@@ -490,7 +490,7 @@ static MACHINE_CONFIG_START( pg685, pg685_state )
// MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(zorba_state, fdc_drq_w))
MCFG_FLOPPY_DRIVE_ADD("fdc:0", pg685_floppies, "525qd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
-
+
// harddisk
MCFG_DEVICE_ADD("hdc", WD2010, XTAL_10MHz / 2) // divider guessed
MCFG_WD2010_OUT_INTRQ_CB(DEVWRITELINE("mainpic", pic8259_device, ir3_w))
diff --git a/src/mame/drivers/pgm3.cpp b/src/mame/drivers/pgm3.cpp
index bf7adba35c5..218dd683b5d 100644
--- a/src/mame/drivers/pgm3.cpp
+++ b/src/mame/drivers/pgm3.cpp
@@ -8,8 +8,8 @@
Knights of Valour 3 HD
according to Xing Xing
- "The main cpu of PGM3 whiched coded as 'SOC38' is an ARM1176@800M designed by SOCLE(http://www.socle-tech.com/). Not much infomation is available on this asic"
-
+ "The main cpu of PGM3 whiched coded as 'SOC38' is an ARM1176@800M designed by SOCLE(http://www.socle-tech.com/). Not much infomation is available on this asic"
+
there is likely a 512KBytes encrypted bootloader(u-boot?) inside the cpu which load the kernel&initrd from the external SD card.
however, according to
@@ -22,14 +22,14 @@
Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
-0C2000000 EB 3C 90 6D 6B 64 6F 73 66 73 00 00 02 04 04 00 ë<.mkdosfs......
-0C2000010 02 00 02 00 00 F8 00 01 3F 00 FF 00 00 00 00 00 .....ø..?.ÿ.....
-0C2000020 00 00 04 00 00 00 29 4C 88 BA 7C 20 20 20 20 20 ......)Lˆº|
+0C2000000 EB 3C 90 6D 6B 64 6F 73 66 73 00 00 02 04 04 00 ë<.mkdosfs......
+0C2000010 02 00 02 00 00 F8 00 01 3F 00 FF 00 00 00 00 00 .....ø..?.ÿ.....
+0C2000020 00 00 04 00 00 00 29 4C 88 BA 7C 20 20 20 20 20 ......)L.º|
0C2000030 20 20 20 20 20 20 46 41 54 31 36 20 20 20 0E 1F FAT16 ..
-0C2000040 BE 5B 7C AC 22 C0 74 0B 56 B4 0E BB 07 00 CD 10 ¾[|¬"Àt.V´.»..Í.
-0C2000050 5E EB F0 32 E4 CD 16 CD 19 EB FE 54 68 69 73 20 ^ëð2äÍ.Í.ëþThis
+0C2000040 BE 5B 7C AC 22 C0 74 0B 56 B4 0E BB 07 00 CD 10 ¾[|¬"Àt.V´.»..Ã.
+0C2000050 5E EB F0 32 E4 CD 16 CD 19 EB FE 54 68 69 73 20 ^ëð2äÃ.Ã.ëþThis
0C2000060 69 73 20 6E 6F 74 20 61 20 62 6F 6F 74 61 62 6C is not a bootabl
-0C2000070 65 20 64 69 73 6B 2E 20 20 50 6C 65 61 73 65 20 e disk. Please
+0C2000070 65 20 64 69 73 6B 2E 20 20 50 6C 65 61 73 65 20 e disk. Please
0C2000080 69 6E 73 65 72 74 20 61 20 62 6F 6F 74 61 62 6C insert a bootabl
0C2000090 65 20 66 6C 6F 70 70 79 20 61 6E 64 0D 0A 70 72 e floppy and..pr
0C20000A0 65 73 73 20 61 6E 79 20 6B 65 79 20 74 6F 20 74 ess any key to t
@@ -41,10 +41,10 @@
DSW:
- 1: OFF = Game mode / ON = Test mode
- 2: OFF = JAMMA / ON = JVS
- 3: OFF = 16/9 (1280x720) / ON = 4/3 (800x600)
- 4: NO USE
+ 1: OFF = Game mode / ON = Test mode
+ 2: OFF = JAMMA / ON = JVS
+ 3: OFF = 16/9 (1280x720) / ON = 4/3 (800x600)
+ 4: NO USE
todo: add other hardware details?
@@ -125,7 +125,7 @@ ROM_START( kov3hd )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_v105", 0, SHA1(c185888c59880805bb76b5c0a42b05c614dcff37) )
+ DISK_IMAGE( "kov3hd_v105", 0, SHA1(c185888c59880805bb76b5c0a42b05c614dcff37) )
ROM_END
ROM_START( kov3hd104 )
@@ -133,7 +133,7 @@ ROM_START( kov3hd104 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m104", 0, SHA1(899b3b81825e6f23ae8f39aa67ad5b019f387cf9) )
+ DISK_IMAGE( "kov3hd_m104", 0, SHA1(899b3b81825e6f23ae8f39aa67ad5b019f387cf9) )
ROM_END
ROM_START( kov3hd103 )
@@ -141,7 +141,7 @@ ROM_START( kov3hd103 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m103", 0, SHA1(0d4fd981f477cd5ed62609b875f4ddec939a2bb0) )
+ DISK_IMAGE( "kov3hd_m103", 0, SHA1(0d4fd981f477cd5ed62609b875f4ddec939a2bb0) )
ROM_END
ROM_START( kov3hd102 )
@@ -149,7 +149,7 @@ ROM_START( kov3hd102 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m102", 0, SHA1(a5a872f9add5527b94019ec77ff1cd0f167f040f) )
+ DISK_IMAGE( "kov3hd_m102", 0, SHA1(a5a872f9add5527b94019ec77ff1cd0f167f040f) )
ROM_END
ROM_START( kov3hd101 )
@@ -157,7 +157,7 @@ ROM_START( kov3hd101 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m101", 0, SHA1(086d6f1b8b2c01a8670fd6480da44b9c507f6e08) )
+ DISK_IMAGE( "kov3hd_m101", 0, SHA1(086d6f1b8b2c01a8670fd6480da44b9c507f6e08) )
ROM_END
diff --git a/src/mame/drivers/play_3.cpp b/src/mame/drivers/play_3.cpp
index c7f4412dd04..fc2a3e7329e 100644
--- a/src/mame/drivers/play_3.cpp
+++ b/src/mame/drivers/play_3.cpp
@@ -642,7 +642,7 @@ ROM_START(sklflite)
ROM_LOAD("skflcpu1.rom", 0x0000, 0x2000, CRC(8f833b55) SHA1(1729203582c22b51d1cc401aa8f270aa5cdadabe))
ROM_LOAD("skflaudiocpu.rom", 0x2000, 0x2000, CRC(ffc497aa) SHA1(3e88539ae1688322b9268f502d8ca41cffb28df3))
- ROM_REGION(0x8000, "audiocpu", 0) // Z80A soundcard
+ ROM_REGION(0x20000, "audiocpu", 0) // Z80A soundcard
ROM_LOAD("skflsnd.rom", 0x0000, 0x8000, CRC(926a1da9) SHA1(16c762fbfe6a55597f26ff55d380192bb8647ee0))
ROM_END
@@ -693,6 +693,30 @@ ROM_START(msdisco)
ROM_REGION(0x4000, "audiocpu", ROMREGION_ERASEFF)
ROM_END
+// Eight Ball Champ (Maibesa) on EFO "Z-Pinball" hardware - very different from the Bally original
+// actual year uncertain; schematic in manual says hardware was designed in 1986, so probably not 1985 as claimed
+ROM_START(eballchps)
+ ROM_REGION(0x8000, "maincpu", 0) // Z80-based
+ ROM_LOAD("U18-JEB 5A0 - CPU.BIN", 0x0000, 0x8000, CRC(87615a7d) SHA1(b27ca2d863040a2641f88f9bd3143467a83f181b))
+
+ ROM_REGION(0x20000, "audiocpu", 0) // Z80-based
+ ROM_LOAD("U3-EBE A02 - Sonido.BIN", 0x00000, 0x8000, CRC(34be32ee) SHA1(ce0271540164639f28d617753760ecc479b6b0d0))
+ ROM_LOAD("U4-EBE B01 - Sonido.BIN", 0x08000, 0x8000, CRC(d696c4e8) SHA1(501e18c258e6d42819d25d72e1907984a6cfeecb))
+ ROM_LOAD("U5-EBE C01 - Sonido.BIN", 0x10000, 0x8000, CRC(fe78d7ef) SHA1(ed91c51dd230854a007f88446011f786759687ca))
+ ROM_LOAD("U6-EBE D02 - Sonido.BIN", 0x18000, 0x8000, CRC(a507081b) SHA1(72d025852a12f455981c61a405f97eaaac9c6fac))
+ROM_END
+
+// Cobra (Playbar)
+ROM_START(cobrapb)
+ ROM_REGION(0x8000, "maincpu", 0) // Z80-based
+ ROM_LOAD("U18 - JCB 4 A0 - CPU.BIN", 0x0000, 0x8000, CRC(c663910e) SHA1(c38692343f114388259c4e7b7943e5be934189ca))
+
+ ROM_REGION(0x20000, "audiocpu", 0) // Z80-based
+ ROM_LOAD("U3 - SCB 1 A0 - Sonido.BIN", 0x00000, 0x8000, CRC(d3675770) SHA1(882ce748308f2d78cccd28fc8cd64fe69bd223e3))
+ ROM_LOAD("U4 - SCB 1 B0 - Sonido.BIN", 0x08000, 0x8000, CRC(e8e1bdbb) SHA1(215bdfab751cb0ea47aa529df0ac30976de4f772))
+ ROM_LOAD("U5 - SCB 1 C0 - Sonido.BIN", 0x10000, 0x8000, CRC(c36340ab) SHA1(cd662457959de3a929ba02779e2046ed18b797e2))
+ROM_END
+
GAME(1982, spain82, 0, play_3, play_3, driver_device, 0, ROT0, "Playmatic", "Spain '82", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
GAME(1983, megaaton, 0, megaaton, megaaton, driver_device, 0, ROT0, "Playmatic", "Meg-Aaton", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND)
GAME(1983, megaatona, megaaton, megaaton, megaaton, driver_device, 0, ROT0, "Playmatic", "Meg-Aaton (alternate set)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND)
@@ -711,5 +735,8 @@ GAME(1987, sklflite, 0, play_3, play_3, driver_device, 0, ROT0, "Pl
// not by Playmatic, but same hardware
GAME(1986, ridersrf, 0, play_3, play_3, driver_device, 0, ROT0, "JocMatic", "Rider's Surf", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND)
GAME(1987, ironball, 0, play_3, play_3, driver_device, 0, ROT0, "Stargame", "Iron Balls", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND)
+// "Z-Pinball" hardware, Z80 main and sound CPUs - to be split (?)
+GAME(1986, eballchps, eballchp, play_3, play_3, driver_device, 0, ROT0, "Bally (Maibesa license)", "Eight Ball Champ (Spain, Z-Pinball hardware)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+GAME(1987, cobrapb, 0, play_3, play_3, driver_device, 0, ROT0, "Playbar", "Cobra (Playbar)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
// bingo hardware, to be split (?)
GAME(1983, msdisco, 0, play_3, play_3, driver_device, 0, ROT0, "Playmatic", "Miss Disco (Bingo)", MACHINE_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/playmark.cpp b/src/mame/drivers/playmark.cpp
index cc094efa456..55c5040121c 100644
--- a/src/mame/drivers/playmark.cpp
+++ b/src/mame/drivers/playmark.cpp
@@ -416,7 +416,7 @@ static ADDRESS_MAP_START( oki_map, AS_0, 8, playmark_state )
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank")
ADDRESS_MAP_END
-
+
static INPUT_PORTS_START( bigtwin )
PORT_START("SYSTEM")
@@ -1307,7 +1307,7 @@ static MACHINE_CONFIG_START( wbeachvl, playmark_state )
MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
-// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits
+// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits
MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp
index 4a180158368..1e7df99de34 100644
--- a/src/mame/drivers/rainbow.cpp
+++ b/src/mame/drivers/rainbow.cpp
@@ -34,16 +34,16 @@ SCREEN 1 vs. SCREEN 2 IN EMULATION
// The type of monochrome monitor (VR-210 A, B or C) is selectable via another DIP (coarsly simulates a phosphor color).
BUGS
-- GDC diagnostic disk fails on 9 of 13 tests (tests 4 and 6 - 13).
+- GDC diagnostic disk fails on 9 of 13 tests (tests 4 and 6 - 13).
Details
a. (Rainbow driver) : interaction between DEC's external hardware and the NEC 7220 isn't fully understood (see page 173 of AA-AE36A)
- It is also unclear what port $50 actually does when it 'synchronizes R-M-W cycles'.
+ It is also unclear what port $50 actually does when it 'synchronizes R-M-W cycles'.
For now, we provide sane defaults for both vector and bitmap units without disturbing display mode(s) or the NEC 7220.
b. the HBLANK / VBLANK ratio is plainly wrong (quick test / subtest #6),
-c. IRQs are flagged as 'erratic' (quick test / subtest #12).
+c. IRQs are flagged as 'erratic' (quick test / subtest #12).
d. (7220) : incorrect fifo stati are handed out (GDC reports FIFO_EMPTY instead of _FULL when quick test #4 floods the queue)
-e. (7220) : RDAT with MOD 2 used extensively here, but unimplemented (modes other than 0 undocumented by NEC / Intel)
+e. (7220) : RDAT with MOD 2 used extensively here, but unimplemented (modes other than 0 undocumented by NEC / Intel)
UNIMPLEMENTED:
- Rainbow 100 A palette quirks (2 bit palette... applies to certain modes only)
@@ -61,13 +61,13 @@ To obtain pixel exact graphics use 'Graphics Only' in Video Options plus comman
Programs with initialization / redraw / reentrance problems (invocation order after reset matters in emulation):
- CANON (high resolution + vectors), Solitaire (SOLIT.EXE) and GDEMO (from GRPHCS.ARC, interactive graphics interpreter '85),
- plus 'Monitor Aligment' (from the GDC test disk). Sloppy programming or a bug related to a) to e)...?
+ plus 'Monitor Aligment' (from the GDC test disk). Sloppy programming or a bug related to a) to e)...?
Quote from Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
- (the partial update system gets very confused because it expects both the screens to end at the same time
+ (the partial update system gets very confused because it expects both the screens to end at the same time
and if that isn't the case large parts of one screen end up not updating at all)
-The following games work well: MMIND (MasterMind), (G)OTELO (requires GSX), PACMAN, SCRAM (last one uses scroll extensively).
+The following games work well: MMIND (MasterMind), (G)OTELO (requires GSX), PACMAN, SCRAM (last one uses scroll extensively).
*/
// license:GPL-2.0+
@@ -121,14 +121,14 @@ Some BUGS remain: BIOS autoboot doesnt work at all. It is not possible to boot f
CTRL-SETUP (soft reboot) always triggers ERROR 19 (64 K RAM err.). One explanation is that ZFLIP/ZRESET is
handled wrongly, so shared mem. just below $8000 is tainted by Z80 stack data. A reentrance problem?
-Occassionally, ERROR 13 for keyboard stuck or ERROR 27 for RAM BOARD error appear (for reasons yet unknown).
+Occassionally, ERROR 13 -keyboard stuck- appears (for reasons yet unknown).
CURRENTY UNEMULATED
-------------------
-(a) the serial port does work one way only (incomplete null modem or wiring?), no reception yet.
- The printer interface does not work, so a non fatal ERROR 40 (serial printer interface) will appear.
+(a) the serial printer on port B prints garbage. It is worth to mention that port B relies on XON/XOFF,
+ while DTR_L (CTS B) means 'printer ready'. There is also a ROM patch in place (WORKAROUND macro)...
-(b1) LOOPBACK circuit not emulated ( used in startup tests ).
+(b1) LOOPBACK circuit not emulated (used in startup tests).
(b2) system interaction tests HALT Z80 CPU at location $0211 (forever). Boot the RX50 diag.disk
to see what happens (key 3 - individual tests, then 12 - system interaction). Uses LOOPBACK too?
@@ -305,11 +305,22 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
****************************************************************************/
#define RD51_MAX_HEAD 8
#define RD51_MAX_CYLINDER 1024
-#define RD51_SECTORS_PER_TRACK 17 // OLD: #define RD51_SECTORS_PER_TRACK 16
-
-#define RTC_BASE 0xFC000
-
+#define RD51_SECTORS_PER_TRACK 17
+
+#define RTC_ENABLED
+// Tested drivers (from Suitable Solutions distribution disk and Latrobe archive), preferred first -
+// File.........Version / author ------------------- YY/YYYY ----- Read only RTC_BASE ---- Platform
+// RBCLIK21.COM Author: Vincent Esser. With source.. 4 digits (Y2K)..Y.......$fc000/fe000..100-B (default cfg.)
+// CLIKA.COM .. V1.03A (C) 1987 Suitable Solutions.. 2 digits........N (*)...$ed000........100-A
+// CLIKCLOK.COM V1.01 (C) 1986,87 Suitable Solutions 2 digits........N (*)...$fc000/fe000..100-B (default " )
+// CLIKF4.COM . V1.0 (C) 1986 Suitable Solutions... 2 digits........N (*)...$f4000........100-B (alternate " )
+// (*) Time or date changes are not persistent in emulation. To prove the setter works, changes are logged.
+
+// (Y2K) DS1315 unit only holds 2 digits, so Vincent Esser's freeware employs a windowing technique.
+// While Suitable's DOS 3.10 accepts dates > 2000, don't take that for granted with software from the 80s.
#ifdef ASSUME_MODEL_A_HARDWARE
+ #define RTC_BASE 0xED000
+
// Define standard and maximum RAM sizes (A model):
#define MOTHERBOARD_RAM 0x0ffff // 64 K base RAM (100-A)
#define END_OF_RAM 0xcffff // Very last byte (theretical; on 100-A) DO NOT CHANGE.
@@ -317,15 +328,16 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
// Pretend to emulate older RAM board (no NMI, also affects presence bit in 'system_parameter_r'):
#define OLD_RAM_BOARD_PRESENT
#else
+ #define RTC_BASE 0xFC000 // (default configuration, also covers FE000+)
+// #define RTC_BASE 0xF4000 // (alternate configuration) - ClikClok V1.0 / CLIKF4.COM
+
// DEC-100-B probes until a 'flaky' area is found (BOOT ROM around F400:0E04).
// It is no longer possible to key in the RAM size from within the 100-B BIOS.
#define MOTHERBOARD_RAM 0x1ffff // 128 K base RAM (100-B)
#define END_OF_RAM 0xdffff // very last byte (100-B theoretical max.) DO NOT CHANGE.
#define WORKAROUND_RAINBOW_B // work around DRIVE ERROR (tested on 100-B ROM only)
-
- #define RTC_ENABLED
-#endif
+ #endif
// ----------------------------------------------------------------------------------------------
// * MHFU disabled by writing a _sensible_ value to port 0x10C (instead of port 0x0c)
@@ -538,6 +550,7 @@ public:
DECLARE_READ8_MEMBER(rtc_reset);
DECLARE_READ8_MEMBER(rtc_enable);
DECLARE_READ8_MEMBER(rtc_r);
+ DECLARE_WRITE8_MEMBER(rtc_w);
DECLARE_WRITE8_MEMBER(ext_ram_w);
@@ -712,10 +725,10 @@ private:
// THIS MACRO * RESETS * the PATTERN TO DEFAULT.
// NOTE 2: m_patmult MUST BE LOADED BEFORE !!
#define OPTION_RESET_PATTERNS \
-m_vpat = 0xff; \
+m_vpat = 0xff; \
if(m_patmult == 0) m_patmult = 0x01;\
if(m_patcnt == 0) m_patcnt = m_patmult;\
-if(m_patidx == 0) m_patidx = 7;
+if(m_patidx == 0) m_patidx = 7;
// GDC RESET MACRO - used in "machine_reset" & GDC_EXTRA_REGISTER_w !
@@ -728,11 +741,11 @@ m_color_map_changed = true; \
for(int i=0; i <256; i++) { m_GDC_SCROLL_BUFFER[i] = i; }; \
m_GDC_scroll_index = 0; \
m_GDC_write_buffer_index = 0; \
-m_GDC_WRITE_MASK = 0x00; \
+m_GDC_WRITE_MASK = 0x00; \
m_GDC_ALU_PS_REGISTER = 0x0F; \
m_GDC_FG_BG = 0xF0; \
m_GDC_MODE_REGISTER &= GDC_MODE_VECTOR | GDC_MODE_HIGHRES | GDC_MODE_ENABLE_WRITES | GDC_MODE_READONLY_SCROLL_MAP;\
-m_GDC_MODE_REGISTER |= GDC_MODE_ENABLE_VIDEO; \
+m_GDC_MODE_REGISTER |= GDC_MODE_ENABLE_VIDEO; \
printf("\n** OPTION GRFX. RESET **\n");
UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
@@ -753,11 +766,11 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
uint8_t pen;
if(m_ONBOARD_GRAPHICS_SELECTED && (m_inp13->read() != DUAL_MONITOR) )
- {
+ {
for(xi=0;xi<16;xi++) // blank screen when VT102 output active (..)
- {
+ {
if (bitmap.cliprect().contains(x + xi, y))
- bitmap.pix32(y, x + xi) = 0;
+ bitmap.pix32(y, x + xi) = 0;
}
return; // no output from graphics option
}
@@ -839,7 +852,7 @@ void rainbow_state::machine_start()
rom[0xf4000 + 0x135e] = 0x00; // Floppy / RX-50 workaround: in case of Z80 RESPONSE FAILURE ($80 bit set in AL), do not block floppy access.
rom[0xf4000 + 0x198F] = 0xeb; // cond.JMP to uncond.JMP (disables error message 60...)
-
+
rom[0xf4000 + 0x315D] = 0x00; // AND DL,0 (make sure DL is zero before ROM_Initialize7201)
rom[0xf4000 + 0x315E] = 0xe2;
rom[0xf4000 + 0x315F] = 0x02;
@@ -1077,7 +1090,7 @@ INPUT_PORTS_END
void rainbow_state::machine_reset()
{
- // 'F3' (in partial emulation) here replaces 'CTRL-SETUP' (soft reboot on an original Rainbow)
+ // 'F3' (in partial emulation) here replaces 'CTRL-SETUP' (soft reboot on an original Rainbow)
// FIXME: BIOS reports error 19 when CTRL-SETUP is pressed (Z80 or flags aren't fully reset then?)
popmessage("Reset");
@@ -1098,8 +1111,16 @@ void rainbow_state::machine_reset()
printf("\nWARNING: 896 K is not a valid memory configuration on Rainbow 100 A!\n");
}
-// check = (unmap_start >> 16)-1; // guess.
-// NVRAM_LOCATION = nv[0xed084]; // location not verified yet. DMT RAM check tests offset $84 !
+ check = (unmap_start >> 16)-1; // guess.
+ NVRAM_LOCATION = nv[0xed084]; // location not verified yet. DMT RAM check tests offset $84 !
+
+ #ifdef RTC_ENABLED
+ // *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-A' ***************************************
+ program.install_read_handler(RTC_BASE, RTC_BASE, read8_delegate(FUNC(rainbow_state::rtc_r), this));
+ program.install_write_handler(RTC_BASE + 0xFE, RTC_BASE + 0xFF, write8_delegate(FUNC(rainbow_state::rtc_w), this));
+ // *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-A' ***************************************
+ #endif
+
#else
printf("\n*** RAINBOW B MODEL ASSUMED (128 - 896 K RAM)\n");
if (unmap_start < 0x20000)
@@ -1110,6 +1131,13 @@ void rainbow_state::machine_reset()
check = (unmap_start >> 16) - 2;
NVRAM_LOCATION = nv[0xed0db];
+
+ #ifdef RTC_ENABLED
+ // *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
+ // No address space needed ( -> IRQs must be disabled to block ROM accesses during reads ).
+ program.install_read_handler(RTC_BASE, RTC_BASE + 0x2104, read8_delegate(FUNC(rainbow_state::rtc_r), this));
+ // *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
+ #endif
#endif
if (check != NVRAM_LOCATION)
printf("\nNOTE: RAM configuration does not match NVRAM.\nUNMAP_START = %05x NVRAM VALUE = %02x SHOULD BE: %02x\n", unmap_start, NVRAM_LOCATION, check);
@@ -1122,13 +1150,6 @@ void rainbow_state::machine_reset()
m_crtc->MHFU(MHFU_RESET_and_DISABLE);
-#ifdef RTC_ENABLED
-// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
-// No address space needed ( -> IRQs must be disabled to block ROM accesses during reads ).
- program.install_read_handler(RTC_BASE, RTC_BASE + 0x2104, read8_delegate(FUNC(rainbow_state::rtc_r), this));
-// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
-#endif
-
m_rtc->chip_reset(); // * Reset RTC to a defined state *
// *********** HARD DISK CONTROLLER...
@@ -1175,10 +1196,10 @@ void rainbow_state::machine_reset()
// *********** NEC 7220 DISPLAY CONTROLLER [ OPTIONAL ]
OPTION_GRFX_RESET
-
+
OPTION_RESET_PATTERNS
- for(int i=0; i <32; i++) { m_GDC_COLOR_MAP[i] = 0x00; };
+ for(int i=0; i <32; i++) { m_GDC_COLOR_MAP[i] = 0x00; };
m_GDC_color_map_index = 0;
m_color_map_changed = true;
// *********** Z80
@@ -1246,15 +1267,6 @@ uint32_t rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind1
{
static int old_palette, old_monitor;
-#ifdef BOOST_DEBUG_PERFORMANCE
- uint8_t *ram = memregion("maincpu")->base();
- if( !(m_p_vol_ram[0x84] == 0x00) )
- {
- if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
- return 0;
- }
-#endif
-
int monitor_selected = m_inp13->read();
if(monitor_selected != old_monitor)
{
@@ -1274,6 +1286,15 @@ uint32_t rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind1
m_color_map_changed = true;
}
+#ifdef BOOST_DEBUG_PERFORMANCE
+ uint8_t *ram = memregion("maincpu")->base();
+ if( !(m_p_vol_ram[0x84] == 0x00) )
+ {
+ if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
+ return 0;
+ }
+#endif
+
m_crtc->palette_select(palette_selected);
if( m_SCREEN_BLANK ||
@@ -1322,7 +1343,7 @@ void rainbow_state::lower_8088_irq(int ref)
// IRQ service for 7201 (commm / printer)
void rainbow_state::update_mpsc_irq()
{
- if (m_mpsc_irq == 0)
+ if (m_mpsc_irq == 0)
lower_8088_irq(IRQ_COMM_PTR_INTR_L);
else
raise_8088_irq(IRQ_COMM_PTR_INTR_L);
@@ -1347,7 +1368,7 @@ WRITE8_MEMBER(rainbow_state::comm_bitrate_w)
// PORT 0x0e : Printer bit rates
WRITE8_MEMBER(rainbow_state::printer_bitrate_w)
{
- m_dbrg_B->str_w(data & 7); // bits 0 - 2
+ m_dbrg_B->str_w(data & 7); // bits 0 - 2
m_dbrg_B->stt_w(data & 7); // TX and RX rate cannot be programmed independently.
printf("\n(PRINTER) RECEIVE / TRANSMIT bitrate = %02x HEX\n",data & 7);
@@ -1367,7 +1388,7 @@ WRITE_LINE_MEMBER(rainbow_state::com8116_a_ft_w)
WRITE_LINE_MEMBER(rainbow_state::com8116_b_fr_w)
{
- m_mpsc->rxcb_w(state);
+ m_mpsc->rxcb_w(state);
}
WRITE_LINE_MEMBER(rainbow_state::com8116_b_ft_w)
@@ -1445,21 +1466,51 @@ WRITE8_MEMBER(rainbow_state::ext_ram_w)
#endif
}
-// ------------------------ClikClok (for model B; DS1315) ---------------------------------
-// DESCRIPTION: version for 100-A plugs into NVRAM chip socket (unemulated yet)
-// On a 100-B, it occupies one of the EPROM sockets. There is a socket on the ClikClok for the NVRAM / EPROM.
+// ------------------------ClikClok (for 100-A; DS1315) ------------------------------------------
+// Version for 100-A plugs into NVRAM chip socket. There is a socket on the ClikClok for the NVRAM
-// DRIVERS: (a) DOS and CP/M binaries plus source from DEC employee (rbclik); Reads & displays times. Y2K READY!
-// (b) Suitable Solutions ClikClok distribution disk; Uses $FE000 and up. 2 digit year. Needed to set time & date.
-//
-// TODO: obtain hardware / check address decoders.
-// RTC accesses here were derived from Vincent Esser's published source.
+// Requires a short program from the Suitable Solutions ClikClok distribution disk (CLIKA.COM)
+// - also needed to set time/date (*). Reads $ed000, writes ed0fe/ed0ff.
+WRITE8_MEMBER(rainbow_state::rtc_w)
+{
+ if((m_inp11->read() == 0x01)) // if enabled...
+ {
+ switch (offset)
+ {
+ case 0x00: // Write to 0xED0FE
+ if (m_rtc->chip_enable())
+ m_rtc->write_data(space, offset & 0x01); // Transfer data to DS1315 (data = offset):
+ else
+ m_rtc->read_0(space, 0); // (RTC ACTIVATION) read magic pattern 0
+ break;
+
+ case 0x01: // Write to 0xED0FF
+ if (m_rtc->chip_enable())
+ m_rtc->write_data(space, offset & 0x01); // Transfer data to DS1315 (data = offset):
+ else
+ m_rtc->read_1(space, 0); // (RTC ACTIVATION) read magic pattern 1
+ break;
+ }
+ }
+ m_p_vol_ram[offset] = data; // Poke value into VOL_RAM.
+}
+
+// ------------------------ClikClok (for 100-B; DS1315) ------------------------------------------------
+// Add-on hardware, occupies one of the EPROM sockets of the 100-B. TODO: check address decoders on board
+// Requires CLIKCLOK.COM or RBCLIK21.COM (freeware from Latrobe). Uses FC000/FE000.
READ8_MEMBER(rainbow_state::rtc_r)
{
if((m_inp11->read() == 0x01)) // if enabled...
{
switch (offset)
{
+#ifdef ASSUME_RAINBOW_A_HARDWARE
+ case 0x00: // read time/date from 0xED000 (ClikClok for 100-A)
+ if (m_rtc->chip_enable())
+ return m_rtc->read_data(space, 0) & 0x01;
+ else
+ m_rtc->chip_reset();
+#else
// Transfer data to DS1315 (data = offset):
case 0x0000: // RTC_WRITE_DATA_0 0xFC000
case 0x2000: // RTC_WRITE_DATA_0 0xFE000 (MIRROR)
@@ -1475,13 +1526,13 @@ READ8_MEMBER(rainbow_state::rtc_r)
if (m_rtc->chip_enable())
return (m_rtc->read_data(space, 0) & 0x01);
- // (RTC ACTIVATION) READ MAGIC PATTERN 0
+ // (RTC ACTIVATION) read magic pattern 0
case 0x0100: // 0xFC100
case 0x2100: // 0xFE100 (MIRROR)
m_rtc->read_0(space, 0);
break;
- // (RTC ACTIVATION) READ MAGIC PATTERN 1
+ // (RTC ACTIVATION) read magic pattern 1
case 0x0101: // 0xFC101
case 0x2101: // 0xFE101 (MIRROR)
m_rtc->read_1(space, 0);
@@ -1492,11 +1543,16 @@ READ8_MEMBER(rainbow_state::rtc_r)
case 0x2104: // 0xFE104 (MIRROR)
m_rtc->chip_reset();
break;
+#endif
}
}
+#ifdef ASSUME_RAINBOW_A_HARDWARE
+ return m_p_vol_ram[offset]; // return volatile RAM
+#else
uint8_t *rom = memregion("maincpu")->base();
- return rom[RTC_BASE + offset]; // Return ROM to prevent crashes
+ return rom[RTC_BASE + offset]; // return ROM
+#endif
}
// ------------------------/ ClikClok (for model B; DS1315) ---------------------------------
@@ -2181,7 +2237,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
int fdc_write_gate = 0;
int last_dir = 0;
-// printf("\nFLOPPY %02d - ", m_unit);
+// printf("\nFLOPPY %02d - ", m_unit);
if (m_fdc)
{
track = m_fdc->track_r(space, 0);
@@ -2404,7 +2460,7 @@ IRQ_CALLBACK_MEMBER(rainbow_state::irq_callback)
if (i == IRQ_8088_VBL) // If VBL IRQ acknowledged...
m_crtc->MHFU(MHFU_RESET); // ...reset counter (also: DC012_W)
- if (i == IRQ_COMM_PTR_INTR_L)
+ if (i == IRQ_COMM_PTR_INTR_L)
m_mpsc->m1_r(); // serial interrupt acknowledge
intnum = vectors[i] | m_irq_high;
@@ -2484,8 +2540,8 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
}
case COLOR_MONITOR:
-
- if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
+
+ if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
red = blue = 0; // Page 21 of PDF AA-AE36A (PDF) explains why
red = uint8_t( red * 17 * ( (255-video_levels[ red ] ) / 255.0f) );
green = uint8_t( mono * 17 * ( (255-video_levels[ mono ]) / 255.0f) ); // BCC-17 cable (red, mono -> green, blue)
@@ -2541,7 +2597,7 @@ WRITE_LINE_MEMBER(rainbow_state::clear_video_interrupt)
// Reflects bits from 'diagnostic_w' (1:1), except test jumpers
READ8_MEMBER(rainbow_state::diagnostic_r) // 8088 (port 0A READ). Fig.4-29 + table 4-15
-{
+{
return ((m_diagnostic & (0xf1)) |
m_inp1->read() |
m_inp2->read() |
@@ -2599,7 +2655,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
}
// BIT 3: PARITY (1 enables parity test on memory board. Usually 64K per bank). -> ext_ram_w.
- if(data & 0x08)
+ if(data & 0x08)
printf("\n*** PARITY TEST [on RAM EXTENSION] - (bit 3 - diagnostic_w) ");
// MISSING BITS (* not vital for normal operation, see diag.disk) -
@@ -2871,7 +2927,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{
if(last_message != 1)
{
- printf("\nCOLOR GRAPHICS ADAPTER INVOKED. PLEASE TURN ON THE APPROPRIATE DIP SWITCH, THEN RESTART.\n");
+ popmessage("\nCOLOR GRAPHICS ADAPTER INVOKED. PLEASE TURN ON THE APPROPRIATE DIP SWITCH, THEN REBOOT.\n");
printf("OFFSET: %x (PC=%x)\n", 0x50 +offset , machine().device("maincpu")->safe_pc());
last_message = 1;
}
@@ -2885,9 +2941,9 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
// read/modify/write memory cycles of the Graphics Option to those of the GDC." (?)
if( data & 1 ) // PDF QV069 suggests 1 -> 0 -> 1. Most programs just set bit 0 (PACMAN).
- {
+ {
// Graphics option software reset (separate from GDC reset...)
- OPTION_GRFX_RESET
+ OPTION_GRFX_RESET
OPTION_RESET_PATTERNS
}
break;
@@ -3126,12 +3182,12 @@ MCFG_PALETTE_ADD("palette2", 32)
MCFG_SCREEN_ADD("screen2", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
-// VR241 color monitor is specified for 20 MHz bandwidth ( 60 Hz / 15.72 kHz horizontal rate )
+// VR241 color monitor is specified for 20 MHz bandwidth ( 60 Hz / 15.72 kHz horizontal rate )
// - sufficient for 800 x 240 non-interlaced at 60 Hz (non interlaced).
-//MCFG_SCREEN_RAW_PARAMS(31188000 / 2 , 992, 0, 800, 262, 0, 240)
+//MCFG_SCREEN_RAW_PARAMS(31188000 / 2 , 992, 0, 800, 262, 0, 240)
// Alternate configuration:
-MCFG_SCREEN_RAW_PARAMS(31188000 / 4 , 496, 0, 400, 262, 0, 240)
+MCFG_SCREEN_RAW_PARAMS(31188000 / 4 , 496, 0, 400, 262, 0, 240)
MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
@@ -3172,7 +3228,7 @@ MCFG_DEVICE_ADD("com8116_a", COM8116, XTAL_5_0688MHz) // Baud rate generator
MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_a_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_a_ft_w))
-MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL_5_0688MHz) // Baud rate generator B
+MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL_5_0688MHz) // Baud rate generator B
MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_b_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_b_ft_w))
diff --git a/src/mame/drivers/rohga.cpp b/src/mame/drivers/rohga.cpp
index a310456c385..8b3d103078b 100644
--- a/src/mame/drivers/rohga.cpp
+++ b/src/mame/drivers/rohga.cpp
@@ -153,7 +153,7 @@ static ADDRESS_MAP_START( rohga_map, AS_PROGRAM, 16, rohga_state )
AM_RANGE(0x3c4000, 0x3c4fff) AM_DEVREADWRITE("tilegen2", deco16ic_device, pf1_data_r, pf1_data_w)
AM_RANGE(0x3c6000, 0x3c6fff) AM_DEVREADWRITE("tilegen2", deco16ic_device, pf2_data_r, pf2_data_w)
- AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_RAM AM_SHARE("pf1_rowscroll")
+ AM_RANGE(0x3c8000, 0x3c9fff) AM_RAM AM_SHARE("pf1_rowscroll")
AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_RAM AM_SHARE("pf2_rowscroll")
AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_RAM AM_SHARE("pf3_rowscroll")
AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_RAM AM_SHARE("pf4_rowscroll")
@@ -823,7 +823,7 @@ static MACHINE_CONFIG_START( rohga, rohga_state )
MCFG_DEVICE_ADD("tilegen1", DECO16IC, 0)
MCFG_DECO16IC_SPLIT(0)
- MCFG_DECO16IC_WIDTH12(1)
+ MCFG_DECO16IC_WIDTH12(1|4)
MCFG_DECO16IC_PF1_TRANS_MASK(0x0f)
MCFG_DECO16IC_PF2_TRANS_MASK(0x0f)
MCFG_DECO16IC_PF1_COL_BANK(0x00)
diff --git a/src/mame/drivers/royalmah.cpp b/src/mame/drivers/royalmah.cpp
index 9d72c8b8754..1c229246af0 100644
--- a/src/mame/drivers/royalmah.cpp
+++ b/src/mame/drivers/royalmah.cpp
@@ -4914,12 +4914,13 @@ DRIVER_INIT_MEMBER(royalmah_state,janptr96)
machine().device<nvram_device>("nvram")->set_base(m_janptr96_nvram.get(), 0x1000 * 9);
}
+// the original Janputer (Sanritsu) is not yet dumped, basically Royal Mahjong but non-BET type
GAME( 1981, royalmj, 0, royalmah, royalmah, driver_device, 0, ROT0, "Nichibutsu", "Royal Mahjong (Japan, v1.13)", 0 )
GAME( 1981?, openmj, royalmj, royalmah, royalmah, driver_device, 0, ROT0, "Sapporo Mechanic", "Open Mahjong [BET] (Japan)", 0 )
GAME( 1982, royalmah, royalmj, royalmah, royalmah, driver_device, 0, ROT0, "bootleg", "Royal Mahjong (Falcon bootleg, v1.01)", 0 )
GAME( 1983, janyoup2, royalmj, ippatsu, janyoup2, driver_device, 0, ROT0, "Cosmo Denshi", "Janyou Part II (ver 7.03, July 1 1983)",0 )
GAME( 1985, tahjong, royalmj, tahjong, tahjong, driver_device, 0, ROT0, "Bally Pond / Nasco", "Tahjong Yakitori (ver. 2-1)", 0 ) // 1985 Jun. 17
-GAME( 1981, janputer, 0, royalmah, royalmah, driver_device, 0, ROT0, "bootleg (Public Software Ltd. / Mes)", "New Double Bet Mahjong (bootleg of Janputer)", 0 ) // the original Janputer (Sanritsu) is not yet dumped
+GAME( 1981, janputer, 0, royalmah, royalmah, driver_device, 0, ROT0, "bootleg (Paradise Denshi Ltd. / Mes)", "New Double Bet Mahjong (bootleg of Royal Mahjong) [BET]", 0 ) // MT #05392
GAME( 1984, janoh, 0, royalmah, royalmah, driver_device, 0, ROT0, "Toaplan", "Jan Oh (set 1)", MACHINE_NOT_WORKING )
GAME( 1984, janoha, janoh, janoh, royalmah, driver_device, 0, ROT0, "Toaplan", "Jan Oh (set 2)", MACHINE_NOT_WORKING ) // this one is complete?
GAME( 1985, jansou, 0, jansou, jansou, driver_device, 0, ROT0, "Dyna", "Jansou (set 1)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND )
@@ -4936,8 +4937,8 @@ GAME( 1987, tontonb, 0, tontonb, tontonb, driver_device, 0, R
GAME( 1987, makaijan, 0, makaijan, makaijan, driver_device, 0, ROT0, "Dynax", "Makaijan [BET] (Japan)", 0 )
GAME( 1988, majs101b, 0, majs101b, majs101b, driver_device, 0, ROT0, "Dynax", "Mahjong Studio 101 [BET] (Japan)", 0 )
GAME( 1988, mjapinky, 0, mjapinky, mjapinky, driver_device, 0, ROT0, "Dynax", "Almond Pinky [BET] (Japan)", 0 )
-GAME( 1989, mjdejavu, 0, mjdejavu, mjdejavu, driver_device, 0, ROT0, "Dynax", "Mahjong Shinkirou Deja Vu (Japan)", 0 )
-GAME( 1989, mjdejav2, mjdejavu, mjdejavu, mjdejavu, driver_device, 0, ROT0, "Dynax", "Mahjong Shinkirou Deja Vu 2 (Japan)", 0 )
+GAME( 1989, mjdejavu, 0, mjdejavu, mjdejavu, driver_device, 0, ROT0, "Dynax", "Mahjong Shinkirou Deja Vu (Japan)", MACHINE_NOT_WORKING ) // MT #00964
+GAME( 1989, mjdejav2, mjdejavu, mjdejavu, mjdejavu, driver_device, 0, ROT0, "Dynax", "Mahjong Shinkirou Deja Vu 2 (Japan)", MACHINE_NOT_WORKING )
GAME( 1989, mjderngr, 0, mjderngr, mjderngr, driver_device, 0, ROT0, "Dynax", "Mahjong Derringer (Japan)", 0 )
GAME( 1989, daisyari, 0, daisyari, daisyari, driver_device, 0, ROT0, "Best System", "Daisyarin [BET] (Japan)", 0 )
GAME( 1990, mjifb, 0, mjifb, mjifb, driver_device, 0, ROT0, "Dynax", "Mahjong If...? [BET]", 0 )
diff --git a/src/mame/drivers/savquest.cpp b/src/mame/drivers/savquest.cpp
index 89d9b887199..3d20a6ff9b2 100644
--- a/src/mame/drivers/savquest.cpp
+++ b/src/mame/drivers/savquest.cpp
@@ -9,7 +9,7 @@
TODO:
- currently asserts by selecting a s3 video bank above 1M (register 0x6a)z
-
+
- The version is labeled "SQ05" in the filesystem but has the 1999 release year.
Other components are labeled "v0.5", but the game doesn't boot far enough to see if
any graphics have version information. There appears to also be a "Savage Quest 2.1" which
diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp
index ff1c4b66d4d..391d399d1f1 100644
--- a/src/mame/drivers/segas16b.cpp
+++ b/src/mame/drivers/segas16b.cpp
@@ -6453,13 +6453,13 @@ ROM_START( goldnaxe2 )
ROM_REGION( 0x1000, "mcu", 0 ) // Intel i8751 protection MCU
/* NOT CURRENTLY USED
-
+
this chip was faulty, the internal checksum routine fails. actual code looks like it should be 99.99% the
same as the 'goldnaxe' set but unused areas have different garbage fill data, so finding the bad bits is
- difficult.
+ difficult.
Calculated checksum: 5F8F
- File checksum: 5E8F */
+ File checksum: 5E8F */
ROM_LOAD( "317-0112.c2", 0x00000, 0x1000, BAD_DUMP CRC(d8f2f1c0) SHA1(04594ed5558af63cde62de6cc4020b35b8a5889e) )
ROM_END
diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp
index 5724b698d4e..f292518cda7 100644
--- a/src/mame/drivers/seta.cpp
+++ b/src/mame/drivers/seta.cpp
@@ -1999,11 +1999,11 @@ static ADDRESS_MAP_START( wrofaero_map, AS_PROGRAM, 16, seta_state )
#endif
AM_RANGE(0xe00000, 0xe00001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP // ? Sound IRQ Ack
-ADDRESS_MAP_END
+ADDRESS_MAP_END
static ADDRESS_MAP_START( zombraid_map, AS_PROGRAM, 16, seta_state )
AM_IMPORT_FROM( wrofaero_map )
- AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_SHARE("nvram") // actually 8K x8 SRAM
+ AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_SHARE("nvram") // actually 8K x8 SRAM
ADDRESS_MAP_END
READ16_MEMBER(seta_state::zingzipbl_unknown_r)
diff --git a/src/mame/drivers/shootout.cpp b/src/mame/drivers/shootout.cpp
index ec1565abaec..e839031a544 100644
--- a/src/mame/drivers/shootout.cpp
+++ b/src/mame/drivers/shootout.cpp
@@ -16,9 +16,9 @@
strangely features the same encryption as used on the DE-0219 board. It
also has some edited graphics.
- The DE-0219 PCB seems to have only one 12 MHz XTAL, some images with recognizable XTAL value can be found here:
- - http://www.jammarcade.net/images/2016/04/Shootout.jpg
- - http://thumbs.picclick.com/00/s/MTIwMFgxNjAw/z/7iIAAOSw5ClXxbrB/$/Data-East-Shootout-Arcade-Video-Game-Pcb-Circuit-_57.jpg
+ The DE-0219 PCB seems to have only one 12 MHz XTAL, some images with recognizable XTAL value can be found here:
+ - http://www.jammarcade.net/images/2016/04/Shootout.jpg
+ - http://thumbs.picclick.com/00/s/MTIwMFgxNjAw/z/7iIAAOSw5ClXxbrB/$/Data-East-Shootout-Arcade-Video-Game-Pcb-Circuit-_57.jpg
Driver by:
@@ -29,8 +29,8 @@
TODO:
- Lots of unmapped memory reads and writes (sprram or vram mirrors, perhaps...), bg_vram is also read.
- - Does the korean bootleg really have the DECO 222 CPU? I think it should use the shootclr.003 prom to decrypt the opcodes.
- Something like -> rom [addr] = (rom [addr] & 0x0F) | proms [rom [addr] >> 4]]);
+ - Does the korean bootleg really have the DECO 222 CPU? I think it should use the shootclr.003 prom to decrypt the opcodes.
+ Something like -> rom [addr] = (rom [addr] & 0x0F) | proms [rom [addr] >> 4]]);
*******************************************************************************/
@@ -76,15 +76,15 @@ WRITE8_MEMBER(shootout_state::flipscreen_w)
}
/*
- This is actually a double BCD counter (2 BCD digits packet in a byte)...
- The first write is always 0x40, then when a coin is inserted it starts to count from 0x01 up to 0x99.
- When it reaches 99 credits, 0x99 is always written...
+ This is actually a double BCD counter (2 BCD digits packet in a byte)...
+ The first write is always 0x40, then when a coin is inserted it starts to count from 0x01 up to 0x99.
+ When it reaches 99 credits, 0x99 is always written...
- On the shootoutj and shootoutb sets, it works as above but it counts up to 0x09 instead of 0x99 (Single BCD digit).
+ On the shootoutj and shootoutb sets, it works as above but it counts up to 0x09 instead of 0x99 (Single BCD digit).
- Note:
- This should be an input for a BCD to 7-segment decoder (e.g. a 74LS47), but all the PCBs I've seen don't have 'onboard'
- display(s), so this was implemented as normal "coin counter" (after all, they both have the same goal: count credits ;))
+ Note:
+ This should be an input for a BCD to 7-segment decoder (e.g. a 74LS47), but all the PCBs I've seen don't have 'onboard'
+ display(s), so this was implemented as normal "coin counter" (after all, they both have the same goal: count credits ;))
*/
WRITE8_MEMBER(shootout_state::coincounter_w)
{
@@ -93,7 +93,7 @@ WRITE8_MEMBER(shootout_state::coincounter_w)
// Do a coin pulse
machine().bookkeeping().coin_counter_w(0, 0);
machine().bookkeeping().coin_counter_w(0, 1);
-
+
m_ccnt_old_val = data;
}
}
@@ -282,9 +282,9 @@ static MACHINE_CONFIG_START( shootout, shootout_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
+ // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
MCFG_SCREEN_RAW_PARAMS (XTAL_12MHz / 2, 384, 0, 256, 262, 8, 248)
-
+
MCFG_SCREEN_UPDATE_DRIVER(shootout_state, screen_update_shootout)
MCFG_SCREEN_PALETTE("palette")
@@ -311,10 +311,10 @@ static MACHINE_CONFIG_START( shootouj, shootout_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
-
- // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
+
+ // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
MCFG_SCREEN_RAW_PARAMS (XTAL_12MHz / 2, 384, 0, 256, 262, 8, 248)
-
+
MCFG_SCREEN_UPDATE_DRIVER(shootout_state, screen_update_shootouj)
MCFG_SCREEN_PALETTE("palette")
diff --git a/src/mame/drivers/slapfght.cpp b/src/mame/drivers/slapfght.cpp
index 633fa0dfc88..65520599436 100644
--- a/src/mame/drivers/slapfght.cpp
+++ b/src/mame/drivers/slapfght.cpp
@@ -481,39 +481,6 @@ ADDRESS_MAP_END
-/***************************************************************************
-
- MCU Memory Maps
-
- NOTE: handlers and simulation are in the src/mame/machine folder
-
-***************************************************************************/
-
-static ADDRESS_MAP_START( tigerh_m68705_map, AS_PROGRAM, 8, slapfght_state )
- ADDRESS_MAP_GLOBAL_MASK(0x7ff)
- AM_RANGE(0x0000, 0x0000) AM_READWRITE(tigerh_68705_portA_r, tigerh_68705_portA_w)
- AM_RANGE(0x0001, 0x0001) AM_READWRITE(tigerh_68705_portB_r, tigerh_68705_portB_w)
- AM_RANGE(0x0002, 0x0002) AM_READWRITE(tigerh_68705_portC_r, tigerh_68705_portC_w)
- AM_RANGE(0x0004, 0x0004) AM_WRITE(tigerh_68705_ddrA_w)
- AM_RANGE(0x0005, 0x0005) AM_WRITE(tigerh_68705_ddrB_w)
- AM_RANGE(0x0006, 0x0006) AM_WRITE(tigerh_68705_ddrC_w)
- AM_RANGE(0x0010, 0x007f) AM_RAM
- AM_RANGE(0x0080, 0x07ff) AM_ROM
-ADDRESS_MAP_END
-
-static ADDRESS_MAP_START( slapfight_m68705_map, AS_PROGRAM, 8, slapfght_state )
- ADDRESS_MAP_GLOBAL_MASK(0x7ff)
- AM_RANGE(0x0000, 0x0000) AM_READWRITE(slapfight_68705_portA_r, slapfight_68705_portA_w)
- AM_RANGE(0x0001, 0x0001) AM_READWRITE(slapfight_68705_portB_r, slapfight_68705_portB_w)
- AM_RANGE(0x0002, 0x0002) AM_READWRITE(slapfight_68705_portC_r, slapfight_68705_portC_w)
- AM_RANGE(0x0004, 0x0004) AM_WRITE(slapfight_68705_ddrA_w)
- AM_RANGE(0x0005, 0x0005) AM_WRITE(slapfight_68705_ddrB_w)
- AM_RANGE(0x0006, 0x0006) AM_WRITE(slapfight_68705_ddrC_w)
- AM_RANGE(0x0010, 0x007f) AM_RAM
- AM_RANGE(0x0080, 0x07ff) AM_ROM
-ADDRESS_MAP_END
-
-
/***************************************************************************
@@ -770,15 +737,9 @@ void slapfght_state::machine_start()
m_main_sent = false;
m_from_main = 0;
m_from_mcu = 0;
- m_portA_in = 0;
- m_portA_out = 0;
- m_ddrA = 0;
- m_portB_in = 0;
- m_portB_out = 0;
- m_ddrB = 0;
- m_portC_in = 0;
- m_portC_out = 0;
- m_ddrC = 0;
+ m_from_mcu_latch = 0;
+ m_to_mcu_latch = 0;
+ m_old_portB = 0;
m_getstar_status = 0;
m_getstar_sequence_index = 0;
@@ -801,15 +762,10 @@ void slapfght_state::machine_start()
save_item(NAME(m_main_sent));
save_item(NAME(m_from_main));
save_item(NAME(m_from_mcu));
- save_item(NAME(m_portA_in));
- save_item(NAME(m_portA_out));
- save_item(NAME(m_ddrA));
- save_item(NAME(m_portB_in));
- save_item(NAME(m_portB_out));
- save_item(NAME(m_ddrB));
- save_item(NAME(m_portC_in));
- save_item(NAME(m_portC_out));
- save_item(NAME(m_ddrC));
+
+ save_item(NAME(m_from_mcu_latch));
+ save_item(NAME(m_to_mcu_latch));
+ save_item(NAME(m_old_portB));
save_item(NAME(m_getstar_status));
save_item(NAME(m_getstar_sequence_index));
@@ -1030,8 +986,13 @@ static MACHINE_CONFIG_START( tigerh, slapfght_state )
MCFG_CPU_PROGRAM_MAP(tigerh_sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(slapfght_state, sound_nmi, 360) // music speed, verified with pcb recording
- MCFG_CPU_ADD("mcu", M68705, XTAL_36MHz/12) // 3MHz
- MCFG_CPU_PROGRAM_MAP(tigerh_m68705_map)
+ MCFG_CPU_ADD("mcu", M68705_NEW, XTAL_36MHz/12) // 3MHz
+ MCFG_M68705_PORTA_R_CB(READ8(slapfght_state, tigerh_mcu_porta_r))
+ MCFG_M68705_PORTA_W_CB(WRITE8(slapfght_state, tigerh_mcu_porta_w))
+ MCFG_M68705_PORTB_W_CB(WRITE8(slapfght_state, tigerh_mcu_portb_w))
+ MCFG_M68705_PORTC_R_CB(READ8(slapfght_state, tigerh_mcu_portc_r))
+
+
MCFG_QUANTUM_PERFECT_CPU("maincpu")
@@ -1095,8 +1056,11 @@ static MACHINE_CONFIG_START( slapfigh, slapfght_state )
MCFG_CPU_PROGRAM_MAP(tigerh_sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(slapfght_state, sound_nmi, 180)
- MCFG_CPU_ADD("mcu", M68705, XTAL_36MHz/12) // 3MHz
- MCFG_CPU_PROGRAM_MAP(slapfight_m68705_map)
+ MCFG_CPU_ADD("mcu", M68705_NEW, XTAL_36MHz/12) // 3MHz
+ MCFG_M68705_PORTA_R_CB(READ8(slapfght_state, tigerh_mcu_porta_r))
+ MCFG_M68705_PORTA_W_CB(WRITE8(slapfght_state, tigerh_mcu_porta_w))
+ MCFG_M68705_PORTB_W_CB(WRITE8(slapfght_state, slapfght_mcu_portb_w))
+ MCFG_M68705_PORTC_R_CB(READ8(slapfght_state, slapfght_mcu_portc_r))
MCFG_QUANTUM_PERFECT_CPU("maincpu")
diff --git a/src/mame/drivers/srmp2.cpp b/src/mame/drivers/srmp2.cpp
index dc6e15cada5..55108fca811 100644
--- a/src/mame/drivers/srmp2.cpp
+++ b/src/mame/drivers/srmp2.cpp
@@ -196,7 +196,7 @@ WRITE16_MEMBER(srmp2_state::mjyuugi_adpcm_bank_w)
}
-WRITE16_MEMBER(srmp2_state::srmp2_adpcm_code_w)
+WRITE8_MEMBER(srmp2_state::adpcm_code_w)
{
/*
- Received data may be playing ADPCM number.
@@ -214,28 +214,7 @@ WRITE16_MEMBER(srmp2_state::srmp2_adpcm_code_w)
m_adpcm_sptr += (m_adpcm_bank * 0x10000);
m_adpcm_eptr += (m_adpcm_bank * 0x10000);
- m_msm->reset_w(0);
- m_adpcm_data = -1;
-}
-
-
-WRITE8_MEMBER(srmp2_state::srmp3_adpcm_code_w)
-{
-/*
- - Received data may be playing ADPCM number.
- - 0x000000 - 0x0000ff and 0x010000 - 0x0100ff are offset table.
- - When the hardware receives the ADPCM number, it refers the offset
- table and plays the ADPCM for itself.
-*/
-
- uint8_t *ROM = memregion("adpcm")->base();
-
- m_adpcm_sptr = (ROM[((m_adpcm_bank * 0x10000) + (data << 2) + 0)] << 8);
- m_adpcm_eptr = (ROM[((m_adpcm_bank * 0x10000) + (data << 2) + 1)] << 8);
- m_adpcm_eptr = (m_adpcm_eptr - 1) & 0x0ffff;
-
- m_adpcm_sptr += (m_adpcm_bank * 0x10000);
- m_adpcm_eptr += (m_adpcm_bank * 0x10000);
+ //printf("%02x %08x %08x %08x\n",data,m_adpcm_sptr,m_adpcm_eptr,((m_adpcm_bank * 0x10000) + (data << 2) + 0));
m_msm->reset_w(0);
m_adpcm_data = -1;
@@ -419,7 +398,7 @@ static ADDRESS_MAP_START( srmp2_map, AS_PROGRAM, 16, srmp2_state )
AM_RANGE(0x900000, 0x900001) AM_WRITENOP /* ??? */
AM_RANGE(0xa00000, 0xa00001) AM_READWRITE8(iox_mux_r, iox_command_w,0x00ff) /* key matrix | I/O */
AM_RANGE(0xa00002, 0xa00003) AM_READWRITE8(iox_status_r,iox_data_w,0x00ff)
- AM_RANGE(0xb00000, 0xb00001) AM_WRITE(srmp2_adpcm_code_w) /* ADPCM number */
+ AM_RANGE(0xb00000, 0xb00001) AM_WRITE8(adpcm_code_w,0x00ff) /* ADPCM number */
AM_RANGE(0xb00002, 0xb00003) AM_READ8(vox_status_r,0x00ff) /* ADPCM voice status */
AM_RANGE(0xc00000, 0xc00001) AM_WRITE8(srmp2_irq2_ack_w,0x00ff) /* irq ack lv 2 */
AM_RANGE(0xd00000, 0xd00001) AM_WRITE8(srmp2_irq4_ack_w,0x00ff) /* irq ack lv 4 */
@@ -454,7 +433,7 @@ static ADDRESS_MAP_START( mjyuugi_map, AS_PROGRAM, 16, srmp2_state )
AM_RANGE(0x800000, 0x800001) AM_READNOP /* ??? */
AM_RANGE(0x900000, 0x900001) AM_READWRITE8(iox_mux_r, iox_command_w,0x00ff) /* key matrix | I/O */
AM_RANGE(0x900002, 0x900003) AM_READWRITE8(iox_status_r,iox_data_w,0x00ff)
- AM_RANGE(0xa00000, 0xa00001) AM_WRITE(srmp2_adpcm_code_w) /* ADPCM number */
+ AM_RANGE(0xa00000, 0xa00001) AM_WRITE8(adpcm_code_w,0x00ff) /* ADPCM number */
AM_RANGE(0xb00002, 0xb00003) AM_READ8(vox_status_r,0x00ff) /* ADPCM voice status */
AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("aysnd", ay8910_device, data_r, 0x00ff)
AM_RANGE(0xb00000, 0xb00003) AM_DEVWRITE8("aysnd", ay8910_device, address_data_w, 0x00ff)
@@ -503,7 +482,7 @@ static ADDRESS_MAP_START( srmp3_io_map, AS_IO, 8, srmp2_state )
AM_RANGE(0x20, 0x20) AM_WRITE(srmp3_irq_ack_w) /* interrupt acknowledge */
AM_RANGE(0x40, 0x40) AM_READ_PORT("SYSTEM") AM_WRITE(srmp3_flags_w) /* coin, service | GFX bank, counter, lockout */
AM_RANGE(0x60, 0x60) AM_WRITE(srmp3_rombank_w) /* ROM bank select */
- AM_RANGE(0xa0, 0xa0) AM_WRITE(srmp3_adpcm_code_w) /* ADPCM number */
+ AM_RANGE(0xa0, 0xa0) AM_WRITE(adpcm_code_w) /* ADPCM number */
AM_RANGE(0xa1, 0xa1) AM_READ(vox_status_r) /* ADPCM voice status */
AM_RANGE(0xc0, 0xc0) AM_READWRITE(iox_mux_r, iox_command_w) /* key matrix | I/O */
AM_RANGE(0xc1, 0xc1) AM_READWRITE(iox_status_r,iox_data_w)
diff --git a/src/mame/drivers/stv.cpp b/src/mame/drivers/stv.cpp
index 292a9c16967..1cffadd6639 100644
--- a/src/mame/drivers/stv.cpp
+++ b/src/mame/drivers/stv.cpp
@@ -2827,12 +2827,12 @@ ROM_START( choroqhr ) // set to 1p
STV_BIOS
ROM_REGION32_BE( 0x3000000, "cart", ROMREGION_ERASE00 ) /* SH2 code */
- ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(fd04598b) SHA1(4797127869fafae0ecfddc07b1c1325b11ca981a) )
+ ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(22c58710) SHA1(6d8b849f6fcf6566193dcff6e2c7c857b7d0d9bf) )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(09b8a154) SHA1(cfd212c6fe6188b9c665650b21f2fd80cd65268f) )
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(136ca5e9) SHA1(8697a415d0958e58f5cea5dcc767dd6a4cbdef5c) )
ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(3c949563) SHA1(ab2a9f9ec23071cc236dee945b436a9cd73efb92) )
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(7e93078d) SHA1(10fa99029a3e741ea0fddcf00ee07b5fd039bf19) )
- ROM_LOAD16_WORD_SWAP( "ic32.bin", 0x0c00000, 0x200000, BAD_DUMP CRC(d311c5f6) SHA1(c210463ae5b4bcc498de786e05dec245c0d3b46e) ) // ic7 bad
+ ROM_LOAD16_WORD_SWAP( "ic32.bin", 0x0c00000, 0x200000, CRC(86cdcbd8) SHA1(90060cde84c75fd4146ebf6b9101f04140408e88) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad2.bin", 0x000000, 0x200000, CRC(76709d73) SHA1(a7805e956ee1a3701a803d0af082c33c89c26c3a) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad3.bin", 0x000000, 0x200000, CRC(b873cf3e) SHA1(8ed42a229e416125d7a2359faaea17208324feb0) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad4.bin", 0x000000, 0x200000, CRC(ed808ad4) SHA1(b00791ec3ee6255bccde171279a1a14e322d0e6d) )
@@ -3024,11 +3024,11 @@ ROM_START( prc28su ) // set to 1p
ROM_LOAD16_WORD_SWAP( "u22.bin", 0x0200000, 0x0200000, CRC(b78cf122) SHA1(10ecdbb04d1ce2c7f98e57260bbd6a09b8a5905d) ) // OK (tested as IC7)
ROM_LOAD16_WORD_SWAP( "u24.bin", 0x0400000, 0x0200000, CRC(aca05d29) SHA1(68c487821a912aea867f2f5041f5d926f31e4513) ) // OK (tested as IC2)
ROM_LOAD16_WORD_SWAP( "u26.bin", 0x0600000, 0x0200000, CRC(5591f6e2) SHA1(95a28b0a4fc2aeb063902505a4f3613c33f9059a) ) // OK (tested as IC2)
- ROM_LOAD16_WORD_SWAP( "u28.bin", 0x0800000, 0x0200000, BAD_DUMP CRC(0899889b) SHA1(e7a77350a2421bbd867681f4c256d3b0d473468d) ) // BAD? (tested as IC3)
- ROM_LOAD16_WORD_SWAP( "u30.bin", 0x0a00000, 0x0200000, BAD_DUMP CRC(2156b889) SHA1(047d73156da503711283bf7ca8e13722c22d2e1e) ) // BAD? (tested as IC3)
- ROM_LOAD16_WORD_SWAP( "u32.bin", 0x0c00000, 0x0200000, CRC(e989f1e3) SHA1(768ce36b515ef2d777d5ea0dc074d700ade56110) ) // not tested?!
- ROM_LOAD16_WORD_SWAP( "u34.bin", 0x0e00000, 0x0200000, BAD_DUMP CRC(555863d3) SHA1(bce1e63af9c45d9bd99685a42e9b3a6c2af66c87) ) // not tested?!
- ROM_LOAD16_WORD_SWAP( "u36.bin", 0x1000000, 0x0200000, CRC(7cb3cd89) SHA1(7f421b58cde211f047e91fd352c7f7c78f4b2555) ) // not tested?! ( FIXED BITS (xxxxxxxx11111111) )
+ ROM_LOAD16_WORD_SWAP( "u28.bin", 0x0800000, 0x0200000, CRC(0899889b) SHA1(e7a77350a2421bbd867681f4c256d3b0d473468d) ) // OK (tested as IC3)
+ ROM_LOAD16_WORD_SWAP( "u30.bin", 0x0a00000, 0x0200000, CRC(03b9eacf) SHA1(d69c10f7613d9f52042dd6cce64e74e2b1ecc2d8) ) // OK (tested as IC3)
+ ROM_LOAD16_WORD_SWAP( "u32.bin", 0x0c00000, 0x0200000, CRC(5dc1f4d7) SHA1(dbb04d4c45b3ecf5416f32e34d3cabd4945352fb) ) // OK
+ ROM_LOAD16_WORD_SWAP( "u34.bin", 0x0e00000, 0x0200000, CRC(0222734a) SHA1(d65311234100f81aa40a6738f79c61e598da8665) ) // OK
+ ROM_LOAD16_WORD_SWAP( "u36.bin", 0x1000000, 0x0200000, CRC(57c30e0f) SHA1(2286ba237edecc0cab1539b30b5f36843c7e276d) ) // OK
ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player
ROM_LOAD( "eeprom", 0x0000, 0x0080, CRC(447bb3bd) SHA1(9fefec09849bfa0c14b49e73ff13e2a538dff511) )
@@ -3062,11 +3062,12 @@ ROM_START( prc2ksu ) // set to 1p (this dump is too damaged to even run the ROM
ROM_REGION32_BE( 0x3000000, "cart", ROMREGION_ERASE00 ) /* SH2 code */
- ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x0200000, BAD_DUMP CRC(455b22c3) SHA1(8eb87461b690783b36eaa8a56dd1fbeadfa0198d) ) // BAD
+ // NOTE: Game fails IC7 check, might be okay, might not be - supposedly ST-V print carts are known to have bad ROM tests(?)
+ ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x0200000, CRC(4b3de7df) SHA1(869c3840ac2eab263bb8b79ba1430e5789fa5758) )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x0200000, BAD_DUMP CRC(02da49b7) SHA1(dd19bfd6c21f432b3af011ce43ba38d295c06c6d) ) // (maybe bad, maybe good, consistent read at least)
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x0200000, BAD_DUMP CRC(a431d614) SHA1(75de91d8eff5af7e1b668012a0613884ba660e21) ) // (maybe bad, maybe good, consistent read at least)
- ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x0200000, BAD_DUMP CRC(07f99eeb) SHA1(d6798b8eba1c4d6993d9ec6a62c4e39fc58428f3) ) // BAD
- ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x0200000, BAD_DUMP CRC(91b261b1) SHA1(4c270d73be9a82e7139aafc9af5d89e0e4e0c80a) ) // BAD
+ ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x0200000, CRC(c0fba1a5) SHA1(5f98be1eed5f74e62fe5a3e33fdcf3b827dda1a7) )
+ ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x0200000, CRC(0811d0e4) SHA1(b4fd9369c80f76141ae2fb38525b405b4c2f391a) )
ROM_REGION16_BE( 0x80, "eeprom", ROMREGION_ERASE00 ) // preconfigured to 1 player
ROM_END
diff --git a/src/mame/drivers/superqix.cpp b/src/mame/drivers/superqix.cpp
index 736b5b64da1..2577334ce22 100644
--- a/src/mame/drivers/superqix.cpp
+++ b/src/mame/drivers/superqix.cpp
@@ -25,10 +25,11 @@ Super Qix:
- The sq07.ic108 ROM came from a bootleg where the 8751 MCU was replaced by an
8031 MCU plus an external ROM (i.e. the sqixb1 romset). The 8031 ROM was bad
(bit 3 was stuck high). It was originally recovered by carefully checking
- the disassembly, and this repair was later verified from another dump to be
- correct. The majority of the bootleg 8031 MCU code matches the decapped
- sqixu b03__03.l2 mcu code, implying the sq07.ic108 8031 MCU code ROM was
- derived from code dumped from an original Taito b03__03.l2 8751 MCU somehow.
+ the disassembly, and this repair was later verified from another dump of an
+ intact chip to be correct. The majority of the bootleg 8031 MCU code matches
+ the deprotected sqix b03__03.l2 MCU code, implying the sq07.ic108 8031 MCU
+ code ROM was derived from code dumped from an original Taito b03__03.l2 8751
+ MCU somehow.
The bootleg MCU code is different from the original b03__03.l2 MCU since
an 8031 when running in external ROM mode cannot use ports 0 or 2, hence
the code was extensively patched by the bootleggers to avoid use of those
@@ -1578,8 +1579,7 @@ ROM_START( sqix ) // It is unclear what this set fixes vs 1.1 below, but the 'ru
ROM_LOAD( "b03__02.h3", 0x10000, 0x10000, CRC(9c23cb64) SHA1(7e04cb18cabdc0031621162cbc228cd95875a022) )
ROM_REGION( 0x1000, "mcu", 0 ) /* I8751 code */
- ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, BAD_DUMP CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* Original Taito ID code for this set's MCU */
- /* the above file is derived from b03__08.l2 from the sqixu set, by patching 3 bytes, needs verification dump/decap from a real b03__03 MCU */
+ ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* B03 // 03 C8751-88 MCU, verified from deprotected part */
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "b03__04.s8", 0x00000, 0x08000, CRC(f815ef45) SHA1(4189d455b6ccf3ae922d410fb624c4665203febf) )
@@ -1597,8 +1597,7 @@ ROM_START( sqixr1 ) // This set has the coin lockout polarity inverted, and also
ROM_LOAD( "b03__02.h3", 0x10000, 0x10000, CRC(9c23cb64) SHA1(7e04cb18cabdc0031621162cbc228cd95875a022) )
ROM_REGION( 0x1000, "mcu", 0 ) /* I8751 code */
- ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, BAD_DUMP CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* Original Taito ID code for this set's MCU */
- /* the above file is derived from b03__08.l2 from the sqixu set, by patching 3 bytes, needs verification dump/decap from a real b03__03 MCU */
+ ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* B03 // 03 C8751-88 MCU, verified from deprotected part */
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "b03__04.s8", 0x00000, 0x08000, CRC(f815ef45) SHA1(4189d455b6ccf3ae922d410fb624c4665203febf) )
@@ -1616,8 +1615,7 @@ ROM_START( sqixr0 ) // This set is older than the above two: it has the coin loc
ROM_LOAD( "b03__02.h3", 0x10000, 0x10000, CRC(9c23cb64) SHA1(7e04cb18cabdc0031621162cbc228cd95875a022) )
ROM_REGION( 0x1000, "mcu", 0 ) /* I8751 code */
- ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, BAD_DUMP CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* Original Taito ID code for this set's MCU */
- /* the above file is derived from b03__08.l2 from the sqixu set, by patching 3 bytes, needs verification dump/decap from a real b03__03 MCU */
+ ROM_LOAD( "b03__03.l2", 0x00000, 0x1000, CRC(f0c3af2b) SHA1(6dce2175011b5c8d0f1bce433c53979841d5d1a4) ) /* B03 // 03 C8751-88 MCU, verified from deprotected part */
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "b03__04.s8", 0x00000, 0x08000, CRC(f815ef45) SHA1(4189d455b6ccf3ae922d410fb624c4665203febf) )
@@ -1635,7 +1633,7 @@ ROM_START( sqixu )
ROM_LOAD( "b03__07.h3", 0x10000, 0x10000, CRC(4c417d4a) SHA1(de46551da1b27312dca40240a210e77595cf9dbd) )
ROM_REGION( 0x1000, "mcu", 0 ) /* I8751 code */
- ROM_LOAD( "b03__08.l2", 0x00000, 0x01000, CRC(7c338c0f) SHA1(b91468c881641f807067835b2dd490cd3e3c577e) )
+ ROM_LOAD( "b03__08.l2", 0x00000, 0x01000, CRC(7c338c0f) SHA1(b91468c881641f807067835b2dd490cd3e3c577e) ) /* B03 // 08 C8751-88 MCU, verified from deprotected part, 3 bytes different from B03 // 03 */
ROM_REGION( 0x08000, "gfx1", 0 )
ROM_LOAD( "b03__04.s8", 0x00000, 0x08000, CRC(f815ef45) SHA1(4189d455b6ccf3ae922d410fb624c4665203febf) )
@@ -1653,7 +1651,7 @@ ROM_END
latch on the other ports instead. This bootleg MCU is based on a dump of the
original b03__03.l2 code, obtained by the pirates through unknown means.
Barring the bootleg MCU, the actual rom set is an exact copy of sqixr0 above. */
-ROM_START( sqixb1 )
+ROM_START( sqixb1 ) // formerly 'sqixa'
ROM_REGION( 0x20000, "maincpu", 0 )
ROM_LOAD( "sq01.97", 0x00000, 0x08000, CRC(0888b7de) SHA1(de3e4637436de185f43d2ad4186d4cfdcd4d33d9) ) // == b03__01.ef3
ROM_LOAD( "b03__02.h3", 0x10000, 0x10000, CRC(9c23cb64) SHA1(7e04cb18cabdc0031621162cbc228cd95875a022) ) // actual label is something different on the bootleg
diff --git a/src/mame/drivers/system16.cpp b/src/mame/drivers/system16.cpp
index fb4bb0c516a..0f7bc02bb07 100644
--- a/src/mame/drivers/system16.cpp
+++ b/src/mame/drivers/system16.cpp
@@ -122,6 +122,18 @@ WRITE16_MEMBER(segas1x_bootleg_state::sound_command_irq_w)
}
}
+READ8_MEMBER(segas1x_bootleg_state::sound_command_irq_r)
+{
+ m_soundcpu->set_input_line(0, CLEAR_LINE);
+ return m_soundlatch->read(space, 0, 0xff);
+}
+
+WRITE8_MEMBER(segas1x_bootleg_state::soundbank_msm_w)
+{
+ m_soundbank->set_entry((data & 7) ^ 6); // probably wrong
+ m_msm->reset_w(BIT(data, 3));
+}
+
static ADDRESS_MAP_START( shinobib_map, AS_PROGRAM, 16, segas1x_bootleg_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
@@ -424,19 +436,24 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(shinobi_datsu_sound_map, AS_PROGRAM, 8, segas1x_bootleg_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
-
+ AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank")
AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ym1", ym2203_device, read, write)
AM_RANGE(0xe400, 0xe401) AM_DEVREADWRITE("ym2", ym2203_device, read, write)
- AM_RANGE(0xe800, 0xe800) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
-
+ AM_RANGE(0xe800, 0xe800) AM_READ(sound_command_irq_r)
+ AM_RANGE(0xec00, 0xec00) AM_DEVWRITE("adpcm_select", ls157_device, ba_w)
+ AM_RANGE(0xf000, 0xf000) AM_WRITE(soundbank_msm_w)
AM_RANGE(0xf800, 0xffff) AM_RAM
ADDRESS_MAP_END
-static ADDRESS_MAP_START( shinobi_datsu_sound_io, AS_IO, 8, segas1x_bootleg_state )
- ADDRESS_MAP_GLOBAL_MASK(0xff)
-ADDRESS_MAP_END
-
+WRITE_LINE_MEMBER(segas1x_bootleg_state::datsu_msm5205_callback)
+{
+ if (!state)
+ return;
+ m_sample_select = !m_sample_select;
+ m_adpcm_select->select_w(m_sample_select);
+ m_soundcpu->set_input_line(INPUT_LINE_NMI, m_sample_select);
+}
/*******************************************************************************/
@@ -817,7 +834,7 @@ static ADDRESS_MAP_START( goldnaxeb2_map, AS_PROGRAM, 16, segas1x_bootleg_state
AM_RANGE(0xc44060, 0xc44067) AM_WRITE(goldnaxeb2_fgpage_w) AM_SHARE("gab2_fgpage")
AM_RANGE(0xc46000, 0xc46001) AM_WRITENOP
AM_RANGE(0xc43034, 0xc43035) AM_WRITENOP
- AM_RANGE(0xfe0006, 0xfe0007) AM_WRITENOP
+ AM_RANGE(0xfe0006, 0xfe0007) AM_WRITE(sound_command_irq_w)
AM_RANGE(0xffc000, 0xffffff) AM_RAM // work ram
ADDRESS_MAP_END
@@ -2062,18 +2079,15 @@ static MACHINE_CONFIG_FRAGMENT( datsu_ym2151_msm5205 )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.80)
MACHINE_CONFIG_END
-static MACHINE_CONFIG_FRAGMENT( datsu_2x_ym2203 )
+static MACHINE_CONFIG_FRAGMENT( datsu_2x_ym2203_msm5205 )
MCFG_CPU_ADD("soundcpu", Z80, 4000000)
- MCFG_CPU_PERIODIC_INT_DRIVER(segas1x_bootleg_state, nmi_line_pulse, 3000) // or from the YM2203?
MCFG_CPU_PROGRAM_MAP(shinobi_datsu_sound_map)
- MCFG_CPU_IO_MAP(shinobi_datsu_sound_io)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
// 2x YM2203C, one at U57, one at U56
MCFG_SOUND_ADD("ym1", YM2203, 4000000)
-// MCFG_YM2203_IRQ_HANDLER(WRITELINE(segas1x_bootleg_state, datsu_irq_handler))
MCFG_SOUND_ROUTE(0, "mono", 0.50)
MCFG_SOUND_ROUTE(1, "mono", 0.50)
MCFG_SOUND_ROUTE(2, "mono", 0.50)
@@ -2081,10 +2095,17 @@ static MACHINE_CONFIG_FRAGMENT( datsu_2x_ym2203 )
MCFG_SOUND_ADD("ym2", YM2203, 4000000)
MCFG_SOUND_ROUTE(0, "mono", 0.50)
-// MCFG_YM2203_IRQ_HANDLER(WRITELINE(segas1x_bootleg_state, datsu_irq_handler))
MCFG_SOUND_ROUTE(1, "mono", 0.50)
MCFG_SOUND_ROUTE(2, "mono", 0.50)
MCFG_SOUND_ROUTE(3, "mono", 0.80)
+
+ MCFG_DEVICE_ADD("adpcm_select", LS157, 0)
+ MCFG_74157_OUT_CB(DEVWRITE8("5205", msm5205_device, data_w))
+
+ MCFG_SOUND_ADD("5205", MSM5205, 384000)
+ MCFG_MSM5205_VCLK_CB(WRITELINE(segas1x_bootleg_state, datsu_msm5205_callback))
+ MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S48_4B)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
MACHINE_CONFIG_END
/*************************************
@@ -2130,7 +2151,7 @@ static MACHINE_CONFIG_DERIVED( shinobi_datsu, system16_base )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(segas1x_bootleg_state, screen_update_s16a_bootleg)
- MCFG_FRAGMENT_ADD(datsu_2x_ym2203)
+ MCFG_FRAGMENT_ADD(datsu_2x_ym2203_msm5205)
MACHINE_CONFIG_END
@@ -2167,7 +2188,9 @@ static MACHINE_CONFIG_DERIVED( passsht4b, system16_base )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(segas1x_bootleg_state, screen_update_s16a_bootleg_passht4b)
- MCFG_FRAGMENT_ADD(datsu_2x_ym2203)
+ MCFG_FRAGMENT_ADD(datsu_2x_ym2203_msm5205)
+ MCFG_DEVICE_MODIFY("5205")
+ MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S96_4B)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( wb3bb, system16_base )
@@ -2231,7 +2254,7 @@ static MACHINE_CONFIG_DERIVED( goldnaxeb2, goldnaxeb_base )
MCFG_CPU_PROGRAM_MAP(goldnaxeb2_map)
MCFG_DEVICE_REMOVE_ADDRESS_MAP(AS_DECRYPTED_OPCODES)
- MCFG_FRAGMENT_ADD(datsu_ym2151_msm5205)
+ MCFG_FRAGMENT_ADD(datsu_2x_ym2203_msm5205)
MACHINE_CONFIG_END
@@ -2314,7 +2337,9 @@ static MACHINE_CONFIG_DERIVED( altbeastbl, system16_base )
MCFG_BOOTLEG_SYS16B_SPRITES_ADD("sprites")
MCFG_BOOTLEG_SYS16B_SPRITES_XORIGIN(189-112)
- MCFG_FRAGMENT_ADD(datsu_2x_ym2203)
+ MCFG_FRAGMENT_ADD(datsu_2x_ym2203_msm5205)
+ MCFG_DEVICE_MODIFY("5205")
+ MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S96_4B)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( beautyb, system16_base )
@@ -2512,8 +2537,9 @@ ROM_START( shinobld )
ROM_LOAD16_BYTE( "7.bin", 0x60001, 0x10000, CRC(41f41063) SHA1(5cc461e9738dddf9eea06831fce3702d94674163) )
ROM_LOAD16_BYTE( "1.bin", 0x60000, 0x10000, CRC(b6e1fd72) SHA1(eb86e4bf880bd1a1d9bcab3f2f2e917bcaa06172) )
- ROM_REGION( 0x10000, "soundcpu", 0 ) /* sound CPU + data */
+ ROM_REGION( 0x20000, "soundcpu", 0 ) /* sound CPU + data */
ROM_LOAD( "16.bin", 0x0000, 0x10000, CRC(52c8364e) SHA1(01d30b82f92498d155d2e31d43d58dff0285cce3) )
+ ROM_RELOAD( 0x10000, 0x10000 )
ROM_END
ROM_START( shinoblda )
@@ -2538,8 +2564,9 @@ ROM_START( shinoblda )
ROM_LOAD16_BYTE( "7.bin", 0x60001, 0x10000, CRC(41f41063) SHA1(5cc461e9738dddf9eea06831fce3702d94674163) )
ROM_LOAD16_BYTE( "1.bin", 0x60000, 0x10000, CRC(b6e1fd72) SHA1(eb86e4bf880bd1a1d9bcab3f2f2e917bcaa06172) )
- ROM_REGION( 0x10000, "soundcpu", 0 ) /* sound CPU + data */
+ ROM_REGION( 0x20000, "soundcpu", 0 ) /* sound CPU + data */
ROM_LOAD( "16.bin", 0x0000, 0x10000, CRC(52c8364e) SHA1(01d30b82f92498d155d2e31d43d58dff0285cce3) )
+ ROM_RELOAD( 0x10000, 0x10000 )
ROM_END
/* Passing Shot Bootleg is a decrypted version of Passing Shot Japanese (passshtj). It has been heavily modified */
@@ -3582,6 +3609,11 @@ DRIVER_INIT_MEMBER(segas1x_bootleg_state,common)
m_beautyb_unkx = 0;
+ if (m_soundbank.found())
+ {
+ m_soundbank->configure_entries(0, 8, memregion("soundcpu")->base(), 0x4000);
+ m_soundbank->set_entry(0);
+ }
}
/* Sys16A */
@@ -3857,7 +3889,7 @@ GAME( 1988, wb3bble, wb3, wb3bb, wb3b, segas1x_bootleg_state,
GAME( 1989, bayrouteb1, bayroute, bayrouteb1, bayroute, segas1x_bootleg_state, bayrouteb1, ROT0, "bootleg (Datsu)", "Bay Route (encrypted, protected bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // broken sprites (due to missing/wrong irq code?)
GAME( 1989, bayrouteb2, bayroute, bayrouteb2, bayroute, segas1x_bootleg_state, bayrouteb2, ROT0, "bootleg (Datsu)", "Bay Route (Datsu bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING )
GAME( 1989, goldnaxeb1, goldnaxe, goldnaxeb1, goldnaxe, segas1x_bootleg_state, goldnaxeb1, ROT0, "bootleg", "Golden Axe (encrypted bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
-GAME( 1989, goldnaxeb2, goldnaxe, goldnaxeb2, goldnaxe, segas1x_bootleg_state, goldnaxeb2, ROT0, "bootleg", "Golden Axe (bootleg)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
+GAME( 1989, goldnaxeb2, goldnaxe, goldnaxeb2, goldnaxe, segas1x_bootleg_state, goldnaxeb2, ROT0, "bootleg", "Golden Axe (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
GAME( 1989, tturfbl, tturf, tturfbl, tturf, segas1x_bootleg_state, tturfbl, ROT0, "bootleg (Datsu)", "Tough Turf (Datsu bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1989, dduxbl, ddux, dduxbl, ddux, segas1x_bootleg_state, dduxbl, ROT0, "bootleg (Datsu)", "Dynamite Dux (Datsu bootleg)", MACHINE_NOT_WORKING )
GAME( 1988, altbeastbl, altbeast, altbeastbl, tetris, segas1x_bootleg_state, altbeastbl, ROT0, "bootleg (Datsu)", "Altered Beast (Datsu bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
diff --git a/src/mame/drivers/tail2nos.cpp b/src/mame/drivers/tail2nos.cpp
index b86fac04e8e..ffee9010381 100644
--- a/src/mame/drivers/tail2nos.cpp
+++ b/src/mame/drivers/tail2nos.cpp
@@ -6,8 +6,7 @@
Driver by Nicola Salmoria
-
- press F1+F3 to see ROM/RAM tests and the final animation
+ keep pressed F1 during POST to see ROM/RAM/GFX tests.
***************************************************************************/
@@ -18,13 +17,21 @@
#include "includes/tail2nos.h"
-WRITE16_MEMBER(tail2nos_state::sound_command_w)
+WRITE8_MEMBER(tail2nos_state::sound_command_w)
+{
+ m_pending_command = 1;
+ m_soundlatch->write(space, offset, data & 0xff);
+ m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
+}
+
+WRITE8_MEMBER(tail2nos_state::sound_semaphore_w)
+{
+ m_pending_command = 0;
+}
+
+READ8_MEMBER(tail2nos_state::sound_semaphore_r)
{
- if (ACCESSING_BITS_0_7)
- {
- m_soundlatch->write(space, offset, data & 0xff);
- m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
- }
+ return m_pending_command;
}
WRITE8_MEMBER(tail2nos_state::sound_bankswitch_w)
@@ -44,9 +51,12 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, tail2nos_state )
AM_RANGE(0xffc300, 0xffcfff) AM_RAM
AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(tail2nos_txvideoram_w) AM_SHARE("txvideoram")
AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
- AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS") AM_WRITE(tail2nos_gfxbank_w)
+ AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(tail2nos_gfxbank_w)
+ AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1")
AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW")
- AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
+ AM_RANGE(0xfff008, 0xfff009) AM_READWRITE8(sound_semaphore_r,sound_command_w,0x00ff)
+// AM_RANGE(0xfff020, 0xfff023) V-System CRTC
+// AM_RANGE(0xfff030, 0xfff031) link comms
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, tail2nos_state )
@@ -57,23 +67,31 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_port_map, AS_IO, 8, tail2nos_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x07, 0x07) AM_DEVREAD("soundlatch", generic_latch_8_device, read) AM_WRITENOP /* the write is a clear pending command */
+ AM_RANGE(0x07, 0x07) AM_DEVREAD("soundlatch", generic_latch_8_device, read) AM_WRITE(sound_semaphore_w)
AM_RANGE(0x08, 0x0b) AM_DEVWRITE("ymsnd", ym2608_device, write)
#if 0
AM_RANGE(0x18, 0x1b) AM_DEVREAD("ymsnd", ym2608_device, read)
#endif
ADDRESS_MAP_END
+CUSTOM_INPUT_MEMBER(tail2nos_state::analog_in_r)
+{
+ int num = (uintptr_t)param;
+ int delta = ioport(num ? "AN1" : "AN0")->read();
+
+ return delta >> 5;
+}
static INPUT_PORTS_START( tail2nos )
- PORT_START("INPUTS")
+ PORT_START("IN0")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000) PORT_NAME("Brake (standard BD)")
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000) PORT_NAME("Accelerate (standard BD)")
+ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
+ PORT_BIT( 0x0070, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, tail2nos_state,analog_in_r, (void *)0) PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 )
@@ -84,8 +102,21 @@ static INPUT_PORTS_START( tail2nos )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
+ PORT_START("IN1")
+ PORT_BIT( 0x0070, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, tail2nos_state,analog_in_r, (void *)1) PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
+ PORT_BIT( 0x0070, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
+ PORT_BIT( 0xff8f, IP_ACTIVE_LOW, IPT_UNKNOWN )
+
+ PORT_START("AN0")
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_Z ) PORT_SENSITIVITY(10) PORT_KEYDELTA(5) PORT_NAME("Brake (original BD)") PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
+
+ PORT_START("AN1")
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_Z ) PORT_SENSITIVITY(10) PORT_KEYDELTA(5) PORT_NAME("Accelerate (original BD)") PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
+
PORT_START("DSW")
- PORT_DIPNAME( 0x000f, 0x0000, DEF_STR( Coin_A ) )
+ PORT_DIPNAME( 0x000f, 0x0000, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
PORT_DIPSETTING( 0x0009, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0008, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0007, DEF_STR( 3C_1C ) )
@@ -102,7 +133,7 @@ static INPUT_PORTS_START( tail2nos )
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0005, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x00f0, 0x0000, DEF_STR( Coin_B ) )
+ PORT_DIPNAME( 0x00f0, 0x0000, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
PORT_DIPSETTING( 0x0090, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0080, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0070, DEF_STR( 3C_1C ) )
@@ -119,25 +150,26 @@ static INPUT_PORTS_START( tail2nos )
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0040, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0050, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0300, 0x0000, DEF_STR( Difficulty ) )
+ PORT_DIPNAME( 0x0300, 0x0000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0100, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0200, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0300, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Demo_Sounds ) )
+ PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_SERVICE( 0x0800, IP_ACTIVE_HIGH )
- PORT_DIPNAME( 0x1000, 0x1000, "Game Mode" )
+ PORT_SERVICE_DIPLOC( 0x0800, IP_ACTIVE_HIGH, "SW2:4" )
+ PORT_DIPNAME( 0x1000, 0x1000, "Game Mode" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x1000, DEF_STR( Single ) )
PORT_DIPSETTING( 0x0000, "Multiple" )
- PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Flip_Screen ) )
+ PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, "Control Panel" )
+ PORT_DIPNAME( 0x4000, 0x4000, "Control Panel" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, DEF_STR( Standard ) )
PORT_DIPSETTING( 0x0000, "Original" )
- PORT_DIPNAME( 0x8000, 0x0000, "Country" )
+ // TODO: what's this for?
+ PORT_DIPNAME( 0x8000, 0x0000, "Country" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x0000, "Domestic" )
PORT_DIPSETTING( 0x8000, "Overseas" )
INPUT_PORTS_END
@@ -186,6 +218,7 @@ void tail2nos_state::machine_start()
save_item(NAME(m_txbank));
save_item(NAME(m_txpalette));
save_item(NAME(m_video_enable));
+ save_item(NAME(m_pending_command));
}
void tail2nos_state::machine_reset()
diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp
index 8a0187f3935..8e857650e7f 100644
--- a/src/mame/drivers/taitojc.cpp
+++ b/src/mame/drivers/taitojc.cpp
@@ -1452,7 +1452,73 @@ ROM_START( sidebs2u ) /* Side by Side 2 Ver 2.6 A */
*/
ROM_END
-ROM_START( sidebs2j ) /* Side by Side 2 Evoluzione Ver 2.4 J */
+ROM_START( sidebs2j ) /* Side by Side 2 Evoluzione RR Ver 3.1 J */
+ ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */
+ ROM_LOAD32_BYTE( "e38-32.ic36", 0x000000, 0x80000, CRC(88385c6e) SHA1(935b4892a8322a73a8afdf0bd3799c4b11510ac9) )
+ ROM_LOAD32_BYTE( "e38-33.ic37", 0x000001, 0x80000, CRC(d02a9963) SHA1(74d567869b79a7e129a2e5876900e7fecb70d568) )
+ ROM_LOAD32_BYTE( "e38-34.ic38", 0x000002, 0x80000, CRC(7c4d8176) SHA1(89c5da4c60f88bca95980b1829015a6def2eabd5) )
+ ROM_LOAD32_BYTE( "e38-35.ic39", 0x000003, 0x80000, CRC(8746188d) SHA1(de7f611195cd9359328821a0c0c63ac079fad341) )
+
+ ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */
+ ROM_LOAD16_BYTE( "e38-19.ic30", 0x100001, 0x040000, CRC(3f50cb7b) SHA1(76af65c9b74ede843a3182f79cecda8c3e3febe6) )
+ ROM_LOAD16_BYTE( "e38-20.ic31", 0x100000, 0x040000, CRC(d01340e7) SHA1(76ee48d644dc1ec415d47e0df4864c64ac928b9d) )
+
+ ROM_REGION( 0x4000, "dsp", ROMREGION_ERASE00 ) /* TMS320C51 internal rom */
+ ROM_LOAD16_WORD( "e07-11.ic29", 0x0000, 0x4000, NO_DUMP )
+
+ ROM_REGION( 0x010000, "sub", 0 ) /* MC68HC11M0 code */
+ ROM_LOAD( "e17-23.ic65", 0x000000, 0x010000, CRC(80ac1428) SHA1(5a2a1e60a11ecdb8743c20ddacfb61f9fd00f01c) )
+
+ ROM_REGION( 0x1800000, "gfx1", 0 )
+ ROM_LOAD32_WORD( "e38-05.ic9", 0x0800002, 0x200000, CRC(bda366bf) SHA1(a7558e6d5e4583a2d8e3d2bfa8cabcc459d3ee83) )
+ ROM_LOAD32_WORD( "e38-13.ic22", 0x0800000, 0x200000, CRC(1bd7582b) SHA1(35763b9489f995433f66ef72d4f6b6ac67df5480) )
+ ROM_LOAD32_WORD( "e38-06.ic10", 0x0c00002, 0x200000, CRC(308d2783) SHA1(22c309273444bc6c1df78069850958a739664998) )
+ ROM_LOAD32_WORD( "e38-14.ic23", 0x0c00000, 0x200000, CRC(f1699f27) SHA1(3c9a9cefe6f215fd9f0a9746da97147d14df1da4) )
+ ROM_LOAD32_WORD( "e38-07.ic11", 0x1000002, 0x200000, CRC(226ba93d) SHA1(98e6342d070ddd988c1e9bff21afcfb28df86844) )
+ ROM_LOAD32_WORD( "e38-15.ic24", 0x1000000, 0x200000, CRC(2853c2e3) SHA1(046dbbd4bcb3b07cddab19a284fee9fe736f8def) )
+ ROM_LOAD32_WORD( "e38-08.ic12", 0x1400002, 0x200000, CRC(9c513b32) SHA1(fe26e39d3d65073d23d525bc17771f0c244a38c2) )
+ ROM_LOAD32_WORD( "e38-16.ic25", 0x1400000, 0x200000, CRC(fceafae2) SHA1(540ecd5d1aa64c0428a08ea1e4e634e00f7e6bd6) )
+
+ ROM_REGION( 0x1000000, "gfx2", 0 ) /* only accessible to the TMS */
+ ROM_LOAD( "e38-01.ic5", 0x0000000, 0x200000, CRC(a3c2e2c7) SHA1(538208534f996782167e4cf0d157ad93ce2937bd) )
+ ROM_LOAD( "e38-02.ic6", 0x0200000, 0x200000, CRC(ecdfb75a) SHA1(85e7afa321846816fa3bd9074ad9dec95abe23fe) )
+ ROM_LOAD( "e38-03.ic7", 0x0400000, 0x200000, CRC(28e9cb59) SHA1(a2651fd81a1263573f868864ee049f8fc4177ffa) )
+ ROM_LOAD( "e38-04.ic8", 0x0600000, 0x080000, CRC(26cab05b) SHA1(d5bcf021646dade834840051e0ce083319c53985) )
+ ROM_RELOAD( 0x0680000, 0x080000 )
+ ROM_RELOAD( 0x0700000, 0x080000 )
+ ROM_RELOAD( 0x0780000, 0x080000 )
+ ROM_LOAD( "e38-09.ic18", 0x0800000, 0x200000, CRC(03c95a7f) SHA1(fc046cf5fcfcf5648f68af4bed78576f6d67b32f) )
+ ROM_LOAD( "e38-10.ic19", 0x0a00000, 0x200000, CRC(0fb06794) SHA1(2d0e3b07ded698235572fe9e907a84d5779ac2c5) )
+ ROM_LOAD( "e38-11.ic20", 0x0c00000, 0x200000, CRC(6a312351) SHA1(8037e377f8eef4cc6dd84aec9c829106f0bb130c) )
+ ROM_LOAD( "e38-12.ic21", 0x0e00000, 0x080000, CRC(193a5774) SHA1(aa017ae4fec92bb87c0eb94f59d093853ddbabc9) )
+ ROM_RELOAD( 0x0e80000, 0x080000 )
+ ROM_RELOAD( 0x0f00000, 0x080000 )
+ ROM_RELOAD( 0x0f80000, 0x080000 )
+
+ ROM_REGION16_BE( 0x1000000, "ensoniq.0", ROMREGION_ERASE00 )
+ ROM_LOAD16_BYTE( "e23-15.ic32", 0x000000, 0x200000, CRC(8955b7c7) SHA1(767626bd5cf6810b0368ee85e487c12ef7e8a23d) ) // from sidebs (redump)
+ ROM_LOAD16_BYTE( "e38-17.ic33", 0x400000, 0x200000, CRC(61e81c7f) SHA1(aa650bc139685ad456c233b79aa60005a8fd6d79) )
+ ROM_LOAD16_BYTE( "e38-18.ic34", 0x800000, 0x200000, CRC(43e2f149) SHA1(32ea9156948a886dda5bd071e9f493ddc2b06212) )
+ ROM_LOAD16_BYTE( "e38-21.ic35", 0xc00000, 0x200000, CRC(25373c5f) SHA1(ab9f917dbde7c808be2cd836ce2d3fc558e290f1) )
+
+ /* PALS
+ e23-28.ic18 NOT A ROM
+ e23-27.ic13 NOT A ROM
+ e23-26.ic4 NOT A ROM
+ e23-25-1.ic3 NOT A ROM
+ e23-30.ic40 NOT A ROM
+ e23-29.ic39 NOT A ROM
+ e23-31.ic46 NOT A ROM
+ e23-32-1.ic51 NOT A ROM
+ e23-34.ic72 NOT A ROM
+ e23-33.ic53 NOT A ROM
+ e23-35.ic110 NOT A ROM
+ e23-38.ic73 NOT A ROM
+ e23-37.ic69 NOT A ROM
+ */
+ROM_END
+
+ROM_START( sidebs2ja ) /* Side by Side 2 Evoluzione Ver 2.4 J */
ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */
ROM_LOAD32_BYTE( "e38-23+.ic36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) /* Actual label E38-23* */
ROM_LOAD32_BYTE( "e38-24+.ic37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) /* Actual label E38-24* */
@@ -1993,6 +2059,7 @@ GAMEL(1996, dendego, 0, dendego, dendego, taitojc_state, taitojc, ROT
GAMEL(1996, dendegox, dendego, dendego, dendego, taitojc_state, taitojc, ROT0, "Taito", "Densha de GO! EX (Ver 2.4 J)", MACHINE_IMPERFECT_GRAPHICS, layout_dendego ) // DENSYA DE GO VER 2.4 J 1997/ 4/18 13:38:34
GAME( 1997, sidebs2, 0, taitojc, sidebs, taitojc_state, taitojc, ROT0, "Taito", "Side by Side 2 (Ver 2.6 OK)", MACHINE_IMPERFECT_GRAPHICS ) // SIDE BY SIDE2 VER 2.6 OK 1997/ 6/ 4 17:27:37
GAME( 1997, sidebs2u, sidebs2, taitojc, sidebs, taitojc_state, taitojc, ROT0, "Taito", "Side by Side 2 (Ver 2.6 A)", MACHINE_IMPERFECT_GRAPHICS ) // SIDE BY SIDE2 VER 2.6 A 1997/ 6/19 09:39:22
-GAME( 1997, sidebs2j, sidebs2, taitojc, sidebs, taitojc_state, taitojc, ROT0, "Taito", "Side by Side 2 Evoluzione (Ver 2.4 J)", MACHINE_IMPERFECT_GRAPHICS ) // SIDE BY SIDE2 VER 2.4 J 1997/ 5/26 13:06:37
+GAME( 1997, sidebs2j, sidebs2, taitojc, sidebs, taitojc_state, taitojc, ROT0, "Taito", "Side by Side 2 Evoluzione RR (Ver 3.1 J)", MACHINE_IMPERFECT_GRAPHICS ) // SIDE BY SIDE2 VER 3.1 J 1997/10/ 7 13:55:38
+GAME( 1997, sidebs2ja, sidebs2, taitojc, sidebs, taitojc_state, taitojc, ROT0, "Taito", "Side by Side 2 Evoluzione (Ver 2.4 J)", MACHINE_IMPERFECT_GRAPHICS ) // SIDE BY SIDE2 VER 2.4 J 1997/ 5/26 13:06:37
GAMEL(1998, dendego2, 0, dendego, dendego, taitojc_state, dendego2, ROT0, "Taito", "Densha de GO! 2 Kousoku-hen (Ver 2.5 J)", MACHINE_IMPERFECT_GRAPHICS, layout_dendego ) // DENSYA DE GO2 VER 2.5 J 1998/ 3/ 2 15:30:55
GAMEL(1998, dendego23k,dendego2, dendego, dendego, taitojc_state, dendego2, ROT0, "Taito", "Densha de GO! 2 Kousoku-hen 3000-bandai (Ver 2.20 J)", MACHINE_IMPERFECT_GRAPHICS, layout_dendego ) // DENSYA DE GO! 2 3000 VER 2.20 J 1998/ 7/15 17:42:38
diff --git a/src/mame/drivers/tmaster.cpp b/src/mame/drivers/tmaster.cpp
index 5656d23a8e5..c989d84b77e 100644
--- a/src/mame/drivers/tmaster.cpp
+++ b/src/mame/drivers/tmaster.cpp
@@ -1723,6 +1723,16 @@ PAL16V8H-15 @ U26 Red dot on it
PAL16V8H-15 @ U27 Green dot on it
PAL16V8H-15 @ U45 red dot on it
+4 known game carts where produced, these are:
+
+Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Black Jack,
+ Twenty One Thunder Plus, Power Pairs, Prism Poker Plus & Have A Cow
+Star Pak 2: Pack-Man, Ms.Pac-Man, Pharaoh's Tomb, Solar Solitaire, Power Pairs, Seek The peeks & Have A Cow
+Star Pak 3: Centipede, Great Wall, Ker-Chunk, Diamond Derby, Word Sleuth, Pull!, Astro Blast & Sweeper
+Star Pak 4: Berzerk, Neon Nightmare, Battle Checkers, Orbit, Deep Sea Shadow, Star Tiger & Orbit Freefall
+
+Copyright notice in rom state: Creative Electronics & Software Written by Keith M. Kolmos May 29,1998
+
***************************************************************************/
#define GALGAMES_BIOS_ROMS \
diff --git a/src/mame/drivers/tmnt.cpp b/src/mame/drivers/tmnt.cpp
index 6070c0f3507..0c4dfafd384 100644
--- a/src/mame/drivers/tmnt.cpp
+++ b/src/mame/drivers/tmnt.cpp
@@ -1696,8 +1696,8 @@ static INPUT_PORTS_START( ssriders )
INPUT_PORTS_END
static INPUT_PORTS_START( ssridr4p )
- PORT_INCLUDE( ssriders )
-
+ PORT_INCLUDE( ssriders )
+
PORT_MODIFY("COINS")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
diff --git a/src/mame/drivers/tnzs.cpp b/src/mame/drivers/tnzs.cpp
index 9c89fb54e73..ce778c89b0e 100644
--- a/src/mame/drivers/tnzs.cpp
+++ b/src/mame/drivers/tnzs.cpp
@@ -763,8 +763,8 @@ static ADDRESS_MAP_START( tnzs_sub_map, AS_PROGRAM, 8, tnzs_mcu_state )
AM_RANGE(0xc000, 0xc001) AM_READWRITE(mcu_r, mcu_w) /* not present in insectx */
AM_RANGE(0xa000, 0xa000) AM_WRITE(bankswitch1_w)
AM_RANGE(0xf000, 0xf003) AM_READ(analog_r) /* paddles in arkanoid2/plumppop. The ports are */
- /* read but not used by the other games, and are not read at */
- /* all by insectx. */
+ /* read but not used by the other games, and are not read at */
+ /* all by insectx. */
AM_IMPORT_FROM(base_sub_map)
ADDRESS_MAP_END
@@ -1697,49 +1697,49 @@ MACHINE_CONFIG_END
PCBs
***************************************************************************/
-/* The TNZS/Seta hardware has a variety of somewhat different pcbs, all of
- which have both Seta and Taito Part numbers.
- All pcbs have Z80B processors and one 6264 mainram chip and an X1-001
- and X1-002 video chip and an X1-004 I/O? Chip, and four PALs
-
-Seta# Taito#s CPUS RxM2 ROM1 MCU? Video ram PROMs SETA X1 GFXROMs QUADRATURE ESD. PROT Games Picture
-P0-022-A K1100245A J1100108A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 uPD4701AC 3x X2-003 arkanoid2, plumppop(A) http://www.classicarcaderesource.com/RevengeOfDoh3.jpg
-P0-025-A K1100241A J1100107A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 N/A 3x X2-003 drtoppel,extermatn,chukatai(B) http://arcade.ym2149.com/pcb/taito/drtoppel_pcb_partside.jpg
-P0-028-A K1100416A J1100332A 2xZ80B 512/256 512/256 8042 4x6116 No 05,06 23c1000 N/A 3x X2-004 chukatai(B) http://i.ebayimg.com/images/g/AhoAAOSw-FZXj5A5/s-l1600.jpg
-P0-038A M6100309A 3xZ80B 512/256 512/256 NONE 1x6164 No 05,06 23c1000 N/A 3x X2-003 kageki http://i.ebayimg.com/images/a/(KGrHqJ,!lwE6C8-G97lBOjOu9mwVw~~/s-l1600.jpg
-P0-041-1 CA403001A 2xZ80B 61256 27c1000 8742 1x6164 No 05,06 27c1000 N/A 5x X2-005 tnzsop(C) http://arcade.ym2149.com/pcb/taito/tnzs_pcb3_partside.jpg
-P0-041-A K1100356A J1100156A 2xZ80B 61256 27c1000 8042 1x6164 No 05,06 23c1000 N/A 5x X2-005 tnzs(j,u)o http://arcade.ym2149.com/pcb/taito/tnzs_pcb1_partside.jpg
-P0-043A M6100356A 3xZ80B* 61256 27512** NONE 1x6164 No 05,06 LH534000(C) N/A 4x X2-004 tnzs(j,u), kabukiz http://arcade.ym2149.com/pcb/taito/tnzs_pcb2_mainboard_partside.jpg
-P0-056A K1100476A J1100201A 3xZ80B EMPTY*3 27c1000 NONE 1x6164 No 05,06 LH534000 U43??? 5x X2-005 insectx(D) http://www.jammarcade.net/images/2014/04/InsectorX.jpg
+/* The TNZS/Seta hardware has a variety of somewhat different pcbs, all of
+ which have both Seta and Taito Part numbers.
+ All pcbs have Z80B processors and one 6264 mainram chip and an X1-001
+ and X1-002 video chip and an X1-004 I/O? Chip, and four PALs
+
+Seta# Taito#s CPUS RxM2 ROM1 MCU? Video ram PROMs SETA X1 GFXROMs QUADRATURE ESD. PROT Games Picture
+P0-022-A K1100245A J1100108A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 uPD4701AC 3x X2-003 arkanoid2, plumppop(A) http://www.classicarcaderesource.com/RevengeOfDoh3.jpg
+P0-025-A K1100241A J1100107A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 N/A 3x X2-003 drtoppel,extermatn,chukatai(B) http://arcade.ym2149.com/pcb/taito/drtoppel_pcb_partside.jpg
+P0-028-A K1100416A J1100332A 2xZ80B 512/256 512/256 8042 4x6116 No 05,06 23c1000 N/A 3x X2-004 chukatai(B) http://i.ebayimg.com/images/g/AhoAAOSw-FZXj5A5/s-l1600.jpg
+P0-038A M6100309A 3xZ80B 512/256 512/256 NONE 1x6164 No 05,06 23c1000 N/A 3x X2-003 kageki http://i.ebayimg.com/images/a/(KGrHqJ,!lwE6C8-G97lBOjOu9mwVw~~/s-l1600.jpg
+P0-041-1 CA403001A 2xZ80B 61256 27c1000 8742 1x6164 No 05,06 27c1000 N/A 5x X2-005 tnzsop(C) http://arcade.ym2149.com/pcb/taito/tnzs_pcb3_partside.jpg
+P0-041-A K1100356A J1100156A 2xZ80B 61256 27c1000 8042 1x6164 No 05,06 23c1000 N/A 5x X2-005 tnzs(j,u)o http://arcade.ym2149.com/pcb/taito/tnzs_pcb1_partside.jpg
+P0-043A M6100356A 3xZ80B* 61256 27512** NONE 1x6164 No 05,06 LH534000(C) N/A 4x X2-004 tnzs(j,u), kabukiz http://arcade.ym2149.com/pcb/taito/tnzs_pcb2_mainboard_partside.jpg
+P0-056A K1100476A J1100201A 3xZ80B EMPTY*3 27c1000 NONE 1x6164 No 05,06 LH534000 U43??? 5x X2-005 insectx(D) http://www.jammarcade.net/images/2014/04/InsectorX.jpg
(A) It is very likely plumppop also uses this P0-022-A PCB, as the game reads
- the quadratures the same way as arkanoid2 does.
- arkanoid2 only has 1 x2-003 ESD protection resistor pack populated, but the
- PCB can have 3, the other two (for more joysticks/buttons?) are not
- populated. arkanoid2's second maincpu socket is also empty, but this is
- clearly not the case for plumppop.
+ the quadratures the same way as arkanoid2 does.
+ arkanoid2 only has 1 x2-003 ESD protection resistor pack populated, but the
+ PCB can have 3, the other two (for more joysticks/buttons?) are not
+ populated. arkanoid2's second maincpu socket is also empty, but this is
+ clearly not the case for plumppop.
(B) chukatai has one set which unlike its earlier sets uses the P0-025-A
- PCB, but with a daughterboard which converts four of the 23c1000 gfx ROM
- sockets into 8 27c1000 eprom sockets, and DOES use color PROMs!
- The other pcb set uses P0-028-A pcb and 23c1000 mask roms and color RAM,
- but has lower rom id numbers. The higher numbered set was likely created
- by Taito to 'use up' a stock of older P0-025-A pcbs.
+ PCB, but with a daughterboard which converts four of the 23c1000 gfx ROM
+ sockets into 8 27c1000 eprom sockets, and DOES use color PROMs!
+ The other pcb set uses P0-028-A pcb and 23c1000 mask roms and color RAM,
+ but has lower rom id numbers. The higher numbered set was likely created
+ by Taito to 'use up' a stock of older P0-025-A pcbs.
(C) This is a development/prototype PCB, hence it has 32 pin sockets for the
- gfx ROMs as 27c1000 eproms, instead of 28 pin sockets for 23c1000 mask
- ROMs. It also uses an (unprotected?) 8742 MCU.
- Another curious thing is the Taito ID number may have accidentally been
- printed in backwards order, i.e should be C1100304A which fits the pattern
- of the other boards.
+ gfx ROMs as 27c1000 eproms, instead of 28 pin sockets for 23c1000 mask
+ ROMs. It also uses an (unprotected?) 8742 MCU.
+ Another curious thing is the Taito ID number may have accidentally been
+ printed in backwards order, i.e should be C1100304A which fits the pattern
+ of the other boards.
(D) InsectorX has a lot of rework on its PCB, two greenwires for each of the
- two LH534000 mask ROMs, and four wires connected to the X1-004 I/O chip
- pins 18, 19, 20, and 21, connecting it to 4 pins of a dip16 chip @ U43
- with its markings sanded off. Is this chip at U43 a tiny MCU?
-* tnzs(j,u) uses a sub board with a z80b and 23c1000 mask ROMs on it for gfx,
- plugged into the four LH534000 mask ROM sockets and the 2nd z80 socket.
- Like Kageki's P0-038A mainboard, this mainboard has a third z80 on it which
- acts in place of the 8x42 mcu used by the older tnzs sets.
-** This is a 28-pin 27512 in a 32-pin socket which alternately holds a 27c1000.
-*3 This is unpopulated, but the pcb can accept a 61256 SRAM here.
+ two LH534000 mask ROMs, and four wires connected to the X1-004 I/O chip
+ pins 18, 19, 20, and 21, connecting it to 4 pins of a dip16 chip @ U43
+ with its markings sanded off. Is this chip at U43 a tiny MCU?
+* tnzs(j,u) uses a sub board with a z80b and 23c1000 mask ROMs on it for gfx,
+ plugged into the four LH534000 mask ROM sockets and the 2nd z80 socket.
+ Like Kageki's P0-038A mainboard, this mainboard has a third z80 on it which
+ acts in place of the 8x42 mcu used by the older tnzs sets.
+** This is a 28-pin 27512 in a 32-pin socket which alternately holds a 27c1000.
+*3 This is unpopulated, but the pcb can accept a 61256 SRAM here.
*/
@@ -2523,12 +2523,40 @@ Seta ID: P0-041A
There is an M-chip i8x42 (with Taito silkscreen) and no 3rd z80.
There is no daughter-pcb like the later TNZS pcb has.
GFX Roms on the pcb are 28 pin 23C1000/TC531000 128K mask roms */
+
+ROM_START( tnzso )
+ ROM_REGION( 0x20000, "maincpu", 0 ) /* 64k + bankswitch areas for the first CPU */
+ ROM_LOAD( "b53-10.27c1001d.u32", 0x00000, 0x20000, CRC(a73745c6) SHA1(73eb38e75e08312d752332f988dc655084b4a86d) )
+
+ ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
+ ROM_LOAD( "b53-14.u38", 0x00000, 0x10000, CRC(f269c5f1) SHA1(15e00e5bc6394f55fc6c591754e24842708f49f4) ) // World version old style PCB
+
+ ROM_REGION( 0x10000, "mcu", 0 ) /* M-Chip (i8x42 internal ROM) */
+ ROM_LOAD( "b53-09.u46", 0x0000, 0x0800, CRC(a4bfce19) SHA1(9340862d5bdc1ad4799dc92cae9bce1428b47478) )
+
+ ROM_REGION( 0x100000, "gfx1", 0 )
+ ROM_LOAD( "b53-08.u8", 0x00000, 0x20000, CRC(c3519c2a) SHA1(30fe7946fbc95ab6b3ccb6944fb24bf47bf3d743) )
+ ROM_LOAD( "b53-07.u7", 0x20000, 0x20000, CRC(2bf199e8) SHA1(4ed73e4f00ae2f5f4028a0ea5ae3cd238863a370) )
+ ROM_LOAD( "b53-06.u6", 0x40000, 0x20000, CRC(92f35ed9) SHA1(5fdd8d6ddbb7be9887af3c8dea9ad3b58c4e86f9) )
+ ROM_LOAD( "b53-05.u5", 0x60000, 0x20000, CRC(edbb9581) SHA1(539396a01ca0b69455f000d446759b232530b542) )
+ ROM_LOAD( "b53-04.u4", 0x80000, 0x20000, CRC(59d2aef6) SHA1(b657b7603c3eb5f169000d38497ebb93f26f7832) )
+ ROM_LOAD( "b53-03.u3", 0xa0000, 0x20000, CRC(74acfb9b) SHA1(90b544ed7ede7565660bdd13c94c15c54423cda9) )
+ ROM_LOAD( "b53-02.u2", 0xc0000, 0x20000, CRC(095d0dc0) SHA1(ced2937d0594fa00ae344a4e3a3cba23772dc160) )
+ ROM_LOAD( "b53-01.u1", 0xe0000, 0x20000, CRC(9800c54d) SHA1(761647177d621ac2cdd8b009876eed35809f3c92) )
+
+ ROM_REGION( 0x10000, "pal", 0 ) /* these are probably shared with extermination except for u35 */
+ ROM_LOAD( "b06-12.pal16l8a.u26.jed", 0x00000, 0x01000, NO_DUMP)
+ ROM_LOAD( "b06-13.pal16l8a.u25.jed", 0x01000, 0x01000, NO_DUMP)
+ ROM_LOAD( "b53-12.pal16l8a.u35.jed", 0x02000, 0x01000, NO_DUMP)
+ ROM_LOAD( "b06-101.pal16l8a.u36.jed", 0x03000, 0x01000, NO_DUMP)
+ROM_END
+
ROM_START( tnzsjo )
ROM_REGION( 0x20000, "maincpu", 0 ) /* 64k + bankswitch areas for the first CPU */
ROM_LOAD( "b53-10.27c1001d.u32", 0x00000, 0x20000, CRC(a73745c6) SHA1(73eb38e75e08312d752332f988dc655084b4a86d) )
ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
- ROM_LOAD( "b53-11.27c512.u38", 0x00000, 0x10000, CRC(9784d443) SHA1(bc3647aac9974031dbe4898417fbaa99841f9548) )
+ ROM_LOAD( "b53-11.27c512.u38", 0x00000, 0x10000, CRC(9784d443) SHA1(bc3647aac9974031dbe4898417fbaa99841f9548) ) // Japan version old style PCB
ROM_REGION( 0x10000, "mcu", 0 ) /* M-Chip (i8x42 internal ROM) */
ROM_LOAD( "b53-09.u46", 0x0000, 0x0800, CRC(a4bfce19) SHA1(9340862d5bdc1ad4799dc92cae9bce1428b47478) )
@@ -2556,7 +2584,7 @@ ROM_START( tnzsuo )
ROM_LOAD( "b53-10.27c1001d.u32", 0x00000, 0x20000, CRC(a73745c6) SHA1(73eb38e75e08312d752332f988dc655084b4a86d) )
ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the second CPU */
- ROM_LOAD( "b53-13.27c512.u38", 0x00000, 0x10000, CRC(c09f4d28) SHA1(f1fd3202869738e17abcbb757f9ce7260707dd3d) )
+ ROM_LOAD( "b53-13.27c512.u38", 0x00000, 0x10000, CRC(c09f4d28) SHA1(f1fd3202869738e17abcbb757f9ce7260707dd3d) ) // US version old style PCB
ROM_REGION( 0x10000, "mcu", 0 ) /* M-Chip (i8x42 internal ROM) */
ROM_LOAD( "b53-09.u46", 0x0000, 0x0800, CRC(a4bfce19) SHA1(9340862d5bdc1ad4799dc92cae9bce1428b47478) )
@@ -2578,7 +2606,7 @@ ROM_START( tnzsuo )
ROM_LOAD( "b06-101.pal16l8a.u36.jed", 0x03000, 0x01000, NO_DUMP)
ROM_END
-ROM_START( tnzso ) // is this a legit set, or a hack, or a near-final (later than tnzsop below) prototype?
+ROM_START( tnzsoa ) // is this a legit set, or a hack, or a near-final (later than tnzsop below) prototype?
ROM_REGION( 0x20000, "maincpu", 0 ) /* 64k + bankswitch areas for the first CPU */
ROM_LOAD( "b53-unknown.27c1001d.u32", 0x00000, 0x20000, CRC(edf3b39e) SHA1(be221c99e50795d569611dba454c3954a259a859) ) // ROM LABEL FOR THIS SET IS UNKNOWN
@@ -2773,9 +2801,10 @@ GAME( 1988, chukataij, chukatai, tnzs, chukatau, driver_device, 0, ROT0, "
GAME( 1988, tnzs, 0, tnzsb, tnzs, driver_device, 0, ROT0, "Taito Corporation Japan", "The NewZealand Story (World, new version) (newer PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, tnzsj, tnzs, tnzsb, tnzsj, driver_device, 0, ROT0, "Taito Corporation", "The NewZealand Story (Japan, new version) (newer PCB)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, tnzso, tnzs, tnzs, tnzsop, driver_device, 0, ROT0, "Taito Corporation Japan", "The NewZealand Story (World, old version) (older PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, tnzsjo, tnzs, tnzs, tnzsjo, driver_device, 0, ROT0, "Taito Corporation", "The NewZealand Story (Japan, old version) (older PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, tnzsuo, tnzs, tnzs, tnzsjo, driver_device, 0, ROT0, "Taito America Corporation", "The NewZealand Story (US, old version) (older PCB)", MACHINE_SUPPORTS_SAVE )
-GAME( 1988, tnzso, tnzs, tnzs, tnzsop, driver_device, 0, ROT0, "Taito Corporation Japan", "The NewZealand Story (World, old version) (older PCB)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, tnzsoa, tnzs, tnzs, tnzsop, driver_device, 0, ROT0, "Taito Corporation Japan", "The NewZealand Story (World, unknown version) (older PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, tnzsop, tnzs, tnzs, tnzsop, driver_device, 0, ROT0, "Taito Corporation Japan", "The NewZealand Story (World, prototype) (older PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1988, kabukiz, 0, kabukiz, kabukiz, driver_device, 0, ROT0, "Kaneko / Taito Corporation Japan", "Kabuki-Z (World)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/toaplan1.cpp b/src/mame/drivers/toaplan1.cpp
index 9a916bfee97..cd89cc365c2 100644
--- a/src/mame/drivers/toaplan1.cpp
+++ b/src/mame/drivers/toaplan1.cpp
@@ -603,14 +603,6 @@ Stephh's and AWJ's notes (based on the games M68000 and Z80 code and some tests)
- Sound routines at 0x01792c and 0x0179ba.
-To Do:
- Add support for HD647180 (Z180) sound CPUs (once their internal ROMS are dumped).
- These are:
- Fire Shark / Same! Same! Same!
- Vimana
- In the meantime, it can be interesting to simulate the basic communications (coinage and credits)
- between the M68000 and the Z180. [stephh]
-
***************************************************************************/
#include "emu.h"
@@ -756,7 +748,7 @@ static ADDRESS_MAP_START( samesame_main_map, AS_PROGRAM, 16, toaplan1_state )
AM_RANGE(0x140008, 0x140009) AM_READ_PORT("SYSTEM")
AM_RANGE(0x14000a, 0x14000b) AM_READ(samesame_port_6_word_r) /* Territory, and MCU ready */
AM_RANGE(0x14000c, 0x14000d) AM_WRITE(samesame_coin_w) /* Coin counter/lockout */
-// AM_RANGE(0x14000e, 0x14000f) AM_WRITE(samesame_mcu_w) /* Commands sent to HD647180 */
+ AM_RANGE(0x14000e, 0x14000f) AM_WRITE(samesame_mcu_w) /* Commands sent to HD647180 */
AM_RANGE(0x180000, 0x180001) AM_WRITE(toaplan1_bcu_flipscreen_w)
AM_RANGE(0x180002, 0x180003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
AM_RANGE(0x180004, 0x180007) AM_READWRITE(toaplan1_tileram16_r, toaplan1_tileram16_w)
@@ -827,13 +819,7 @@ static ADDRESS_MAP_START( vimana_main_map, AS_PROGRAM, 16, toaplan1_state )
AM_RANGE(0x400008, 0x40000f) AM_WRITE(toaplan1_bcu_control_w)
AM_RANGE(0x404000, 0x4047ff) AM_RAM_WRITE(toaplan1_bgpalette_w) AM_SHARE("bgpalette")
AM_RANGE(0x406000, 0x4067ff) AM_RAM_WRITE(toaplan1_fgpalette_w) AM_SHARE("fgpalette")
- AM_RANGE(0x440000, 0x440005) AM_READWRITE(vimana_mcu_r, vimana_mcu_w) /* shared memory from 0x440000 to 0x44ffff ? */
- AM_RANGE(0x440006, 0x440007) AM_READ_PORT("DSWA")
- AM_RANGE(0x440008, 0x440009) AM_READ(vimana_system_port_r) /* "SYSTEM" + coinage simulation */
- AM_RANGE(0x44000a, 0x44000b) AM_READ_PORT("P1")
- AM_RANGE(0x44000c, 0x44000d) AM_READ_PORT("P2")
- AM_RANGE(0x44000e, 0x44000f) AM_READ_PORT("DSWB")
- AM_RANGE(0x440010, 0x440011) AM_READ_PORT("TJUMP")
+ AM_RANGE(0x440000, 0x4407ff) AM_READWRITE(toaplan1_shared_r, toaplan1_shared_w) /* inputs, coins and sound handled by 647180 MCU via this space */
AM_RANGE(0x480000, 0x487fff) AM_RAM
AM_RANGE(0x4c0000, 0x4c0001) AM_WRITE(toaplan1_bcu_flipscreen_w)
AM_RANGE(0x4c0002, 0x4c0003) AM_READWRITE(toaplan1_tileram_offs_r, toaplan1_tileram_offs_w)
@@ -938,12 +924,90 @@ ADDRESS_MAP_END
/***************************** HD647180 Memory Map **************************/
-static ADDRESS_MAP_START( hd647180_mem_map, AS_PROGRAM, 8, toaplan1_state )
+static ADDRESS_MAP_START( vimana_hd647180_mem_map, AS_PROGRAM, 8, toaplan1_state )
AM_RANGE(0x00000, 0x03fff) AM_ROM /* Internal 16k byte ROM */
+ AM_RANGE(0x08000, 0x087ff) AM_RAM AM_SHARE("sharedram") /* 2048 bytes of shared ram w/maincpu */
AM_RANGE(0x0fe00, 0x0ffff) AM_RAM /* Internal 512 byte RAM */
ADDRESS_MAP_END
+static ADDRESS_MAP_START( vimana_hd647180_io_map, AS_IO, 8, toaplan1_state )
+ ADDRESS_MAP_GLOBAL_MASK(0xff)
+ // lots of low level 647180 peripherals are not emulated yet, ddr regs, timer regs etc, see comments below
+ // also see http://bitsavers.trailing-edge.com/pdf/hitachi/_dataBooks/U94_HD647180X_8-Bit_Microcontroller_Hardware_Manual_Jan88.pdf particularly page 38 (pdf page 56)
+ AM_RANGE(0x32, 0x32) AM_WRITENOP // DMA WAIT/Control register
+ AM_RANGE(0x33, 0x33) AM_WRITENOP // IL (int vector low) register
+ AM_RANGE(0x36, 0x36) AM_WRITENOP // refresh control register for RFSH pin
+ // 53: disable reg for port A
+ AM_RANGE(0x60, 0x60) AM_READ(vimana_dswb_invert_r) // read/write port A; note these inputs seem to be inverted, unlike the DSWA ones.
+ // 61: read/write port B
+ // 62: read/write port C
+ // 63: read/write port D
+ // 64: read/write port E
+ // 65: read/write port F
+ AM_RANGE(0x66, 0x66) AM_READ(vimana_tjump_invert_r) // read/write port G, bits 7 and 6 ALWAYS read as 1 due to port G being just 6 bits; note these inputs seem to be inverted, unlike the DSWA ones.
+ // 70: ddr for port A
+ AM_RANGE(0x71, 0x71) AM_WRITENOP // ddr for port B
+ AM_RANGE(0x72, 0x72) AM_WRITENOP // ddr for port C
+ AM_RANGE(0x73, 0x73) AM_WRITENOP // ddr for port D
+ AM_RANGE(0x74, 0x74) AM_WRITENOP // ddr for port E
+ AM_RANGE(0x75, 0x75) AM_WRITENOP // ddr for port F
+ AM_RANGE(0x80, 0x80) AM_READ_PORT("P1")
+ AM_RANGE(0x81, 0x81) AM_READ_PORT("P2")
+ AM_RANGE(0x82, 0x82) AM_READ_PORT("DSWA")
+ AM_RANGE(0x83, 0x83) AM_READ_PORT("SYSTEM")
+ AM_RANGE(0x84, 0x84) AM_WRITE(toaplan1_coin_w) // Coin counter/lockout // needs verify
+ AM_RANGE(0x87, 0x87) AM_DEVREADWRITE("ymsnd", ym3812_device, status_port_r, control_port_w)
+ AM_RANGE(0x8f, 0x8f) AM_DEVREADWRITE("ymsnd", ym3812_device, read_port_r, write_port_w)
+ADDRESS_MAP_END
+
+READ8_MEMBER(toaplan1_state::vimana_dswb_invert_r)
+{
+ return ioport("DSWB")->read() ^ 0xFF;
+}
+
+READ8_MEMBER(toaplan1_state::vimana_tjump_invert_r)
+{
+ return (ioport("TJUMP")->read() ^ 0xFF)|0xC0; // high 2 bits of port G always read as 1
+}
+
+WRITE16_MEMBER(toaplan1_state::samesame_mcu_w)
+{
+ m_to_mcu = data;
+ m_cmdavailable = 1;
+};
+READ8_MEMBER(toaplan1_state::samesame_soundlatch_r)
+{
+ return m_to_mcu;
+};
+
+WRITE8_MEMBER(toaplan1_state::samesame_sound_done_w)
+{
+ m_to_mcu = data;
+ m_cmdavailable = 0;
+}
+
+READ8_MEMBER(toaplan1_state::samesame_cmdavailable_r)
+{
+ if (m_cmdavailable) return 0xff;
+ else return 0x00;
+};
+
+static ADDRESS_MAP_START( samesame_hd647180_mem_map, AS_PROGRAM, 8, toaplan1_state )
+ AM_RANGE(0x00000, 0x03fff) AM_ROM /* Internal 16k byte ROM */
+ AM_RANGE(0x0fe00, 0x0ffff) AM_RAM /* Internal 512 byte RAM */
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( samesame_hd647180_io_map, AS_IO, 8, toaplan1_state )
+ ADDRESS_MAP_GLOBAL_MASK(0xff)
+
+ AM_RANGE(0x63, 0x63) AM_READ( samesame_cmdavailable_r )
+ AM_RANGE(0xa0, 0xa0) AM_READ( samesame_soundlatch_r )
+ AM_RANGE(0xb0, 0xb0) AM_WRITE( samesame_sound_done_w )
+
+ AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("ymsnd", ym3812_device, status_port_r, control_port_w)
+ AM_RANGE(0x81, 0x81) AM_DEVREADWRITE("ymsnd", ym3812_device, read_port_r, write_port_w)
+ADDRESS_MAP_END
/*****************************************************************************
Generic Input Port definitions
@@ -1645,7 +1709,7 @@ static INPUT_PORTS_START( outzonec )
INPUT_PORTS_END
-/* verified from M68000 - coinage based on "test mode" and handled by the MCU simulation */
+/* verified from M68000 */
static INPUT_PORTS_START( vimana )
PORT_INCLUDE( toaplan1_2b )
@@ -1656,6 +1720,12 @@ static INPUT_PORTS_START( vimana )
/* 0x44000f.b */
PORT_START("DSWB")
+ /* this dipswitch array is inverted either by circuitry on the pcb, or by
+ being between portA of the 647180 and GND, relying on 647180 portA
+ internal pin pullups?
+ Not sure, needs tracing, but for now rather than make a new inverted
+ TOAPLAN_DIFFICULTY macro, I've (LN) wrapped this in a function to invert
+ it on read. See vimana_dswb_invert_r */
TOAPLAN_DIFFICULTY
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) /* table at 0x000998 */
PORT_DIPSETTING( 0x00, "70k 270k 200k+" )
@@ -1675,6 +1745,7 @@ static INPUT_PORTS_START( vimana )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
/* 0x440011.b */
+ /* same as above, this is inverted, handled by vimana_tjump_invert_r */
PORT_START("TJUMP") /* Territory Jumper Block - see notes */
PORT_DIPNAME( 0x0f, 0x02, DEF_STR( Region ) )
PORT_DIPSETTING( 0x02, DEF_STR( Europe ) )
@@ -1704,7 +1775,7 @@ static INPUT_PORTS_START( vimana )
/* VBLANK : 0x400001.b */
INPUT_PORTS_END
-/* verified from M68000 - coinage based on "test mode" and handled by the MCU simulation */
+/* verified from M68000 */
static INPUT_PORTS_START( vimanan )
PORT_INCLUDE( vimana )
@@ -1712,6 +1783,7 @@ static INPUT_PORTS_START( vimanan )
/* DSWB : 0x44000f.b */
/* 0x440011.b */
+ /* same as above, this is inverted, handled by vimana_tjump_invert_r */
PORT_MODIFY("TJUMP") /* Territory Jumper Block - see notes */
PORT_DIPNAME( 0x0f, 0x02, DEF_STR( Region ) )
PORT_DIPSETTING( 0x02, "Europe (Nova Apparate license)" )
@@ -1730,6 +1802,7 @@ static INPUT_PORTS_START( vimanan )
// PORT_DIPSETTING( 0x0c, "???" )
// PORT_DIPSETTING( 0x0d, "???" )
// PORT_DIPSETTING( 0x0e, "???" )
+ PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
/* P1 : 0x44000b.b */
/* P2 : 0x44000d.b */
@@ -1737,7 +1810,7 @@ static INPUT_PORTS_START( vimanan )
/* VBLANK : 0x400001.b */
INPUT_PORTS_END
-/* verified from M68000 - coinage based on "test mode" and handled by the MCU simulation */
+/* verified from M68000 */
static INPUT_PORTS_START( vimanaj )
PORT_INCLUDE( vimana )
@@ -1745,6 +1818,7 @@ static INPUT_PORTS_START( vimanaj )
/* DSWB : 0x44000f.b */
/* 0x440011.b */
+ /* same as above, this is inverted, handled by vimana_tjump_invert_r */
PORT_MODIFY("TJUMP") /* Territory Jumper Block - see notes */
PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Region ) )
// PORT_DIPSETTING( 0x02, DEF_STR( Europe ) )
@@ -2015,8 +2089,10 @@ static MACHINE_CONFIG_START( samesame, toaplan1_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", toaplan1_state, toaplan1_interrupt)
MCFG_CPU_ADD("audiocpu", Z180, XTAL_28MHz/8) /* HD647180XOFS6 CPU */
- MCFG_CPU_PROGRAM_MAP(hd647180_mem_map)
- MCFG_DEVICE_DISABLE() /* Internal code is not dumped */
+ MCFG_CPU_PROGRAM_MAP(samesame_hd647180_mem_map)
+ MCFG_CPU_IO_MAP(samesame_hd647180_io_map)
+
+ MCFG_QUANTUM_PERFECT_CPU("maincpu")
MCFG_MACHINE_RESET_OVERRIDE(toaplan1_state,zerowing)
@@ -2127,8 +2203,10 @@ static MACHINE_CONFIG_START( vimana, toaplan1_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", toaplan1_state, toaplan1_interrupt)
MCFG_CPU_ADD("audiocpu", Z180, XTAL_28MHz/8) /* HD647180XOFS6 CPU */
- MCFG_CPU_PROGRAM_MAP(hd647180_mem_map)
- MCFG_DEVICE_DISABLE() /* Internal code is not dumped */
+ MCFG_CPU_PROGRAM_MAP(vimana_hd647180_mem_map)
+ MCFG_CPU_IO_MAP(vimana_hd647180_io_map)
+
+ MCFG_QUANTUM_TIME(attotime::from_hz(600)) // GUESSED
MCFG_MACHINE_RESET_OVERRIDE(toaplan1_state,vimana)
@@ -2553,8 +2631,7 @@ ROM_START( samesame )
ROM_LOAD16_BYTE( "o17_12.7l", 0x040001, 0x20000, CRC(ef698811) SHA1(4c729704eba0bf469599c79009327e4fa5dc540b) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2581,8 +2658,34 @@ ROM_START( samesame2 )
ROM_LOAD16_BYTE( "o17_12ii.7l", 0x040001, 0x20000, CRC(6adb6eb5) SHA1(9b6e63aa50d271c2bb0b4cf822fc6f3684f10230) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
+
+ ROM_REGION( 0x80000, "gfx1", 0 )
+ ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
+ ROM_LOAD16_BYTE( "o17_06.13j", 0x00001, 0x20000, CRC(95262d4c) SHA1(16f3aabecb1c87ce7eadf4f0ff61b29a4c017614) )
+ ROM_LOAD16_BYTE( "o17_07.12l", 0x40000, 0x20000, CRC(4c4b735c) SHA1(812c3bf46bd7764b2bb812bd2b9eb0331ed257ae) )
+ ROM_LOAD16_BYTE( "o17_08.13l", 0x40001, 0x20000, CRC(95c6586c) SHA1(ff87901f79d80f73ad09664b0c0d892898570616) )
+
+ ROM_REGION( 0x80000, "gfx2", 0 )
+ ROM_LOAD16_BYTE( "o17_01.1d", 0x00000, 0x20000, CRC(ea12e491) SHA1(02190722b7c5383471e0af9596be7039a5367240) )
+ ROM_LOAD16_BYTE( "o17_02.3d", 0x00001, 0x20000, CRC(32a13a9f) SHA1(1446acdfd21cd41f3d97aaf30f498c0c5d890605) )
+ ROM_LOAD16_BYTE( "o17_03.5d", 0x40000, 0x20000, CRC(68723dc9) SHA1(4f1b7aa2469c955e03737b611a7d2524f1e4f61e) )
+ ROM_LOAD16_BYTE( "o17_04.7d", 0x40001, 0x20000, CRC(fe0ecb13) SHA1(634a49262b9c092c25f11b14c6757fe94ea9eddc) )
+
+ ROM_REGION( 0x40, "proms", 0 ) /* nibble bproms, lo/hi order to be determined */
+ ROM_LOAD( "prom14.25b", 0x00, 0x20, CRC(bc88cced) SHA1(5055362710c0f58823c05fb4c0e0eec638b91e3d) ) /* sprite attribute (flip/position) ?? */
+ ROM_LOAD( "prom15.20c", 0x20, 0x20, CRC(a1e17492) SHA1(9ddec4c97f2d541f69f3c32c47aaa21fd9699ae2) ) /* ??? */
+ROM_END
+
+ROM_START( samesamenh ) /* this hack has been used on various PCBs */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* Main 68K code */
+ ROM_LOAD16_BYTE( "o17_09_nv.8j", 0x000000, 0x08000, CRC(f60af2f9) SHA1(ce41efd5ca4f4adc8bf1976f61a8a8d357fb234a) )
+ ROM_LOAD16_BYTE( "o17_10_nv.8l", 0x000001, 0x08000, CRC(023bcb95) SHA1(69a051fb223e6cacaf1cda8bf5430933d24fb8a7) )
+ ROM_LOAD16_BYTE( "o17_11.7j", 0x040000, 0x20000, CRC(be07d101) SHA1(1eda14ba24532b565d6ad57490b73ff312f98b53) )
+ ROM_LOAD16_BYTE( "o17_12.7l", 0x040001, 0x20000, CRC(ef698811) SHA1(4c729704eba0bf469599c79009327e4fa5dc540b) )
+
+ ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2662,8 +2765,7 @@ ROM_START( fireshrk )
ROM_LOAD16_BYTE( "o17_12ii.7l", 0x040001, 0x20000, CRC(6adb6eb5) SHA1(9b6e63aa50d271c2bb0b4cf822fc6f3684f10230) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2690,8 +2792,7 @@ ROM_START( fireshrka )
ROM_LOAD16_BYTE( "o17_12ii.7l", 0x040001, 0x20000, CRC(6adb6eb5) SHA1(9b6e63aa50d271c2bb0b4cf822fc6f3684f10230) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2718,8 +2819,7 @@ ROM_START( fireshrkd )
ROM_LOAD16_BYTE( "o17_12ii.7l", 0x040001, 0x20000, CRC(6adb6eb5) SHA1(9b6e63aa50d271c2bb0b4cf822fc6f3684f10230) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2746,8 +2846,7 @@ ROM_START( fireshrkdh )
ROM_LOAD16_BYTE( "o17_12ii.7l", 0x040001, 0x20000, CRC(6adb6eb5) SHA1(9b6e63aa50d271c2bb0b4cf822fc6f3684f10230) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.017", 0x00000, 0x08000, NO_DUMP )
+ ROM_LOAD( "hd647180.017", 0x00000, 0x08000, CRC(43523032) SHA1(1b94003a00e7bf6bdf1b1b946f42ff5d04629949) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "o17_05.12j", 0x00000, 0x20000, CRC(565315f8) SHA1(6b1c5ef52359483228b329c89c2e1174e3fbf017) )
@@ -2929,8 +3028,8 @@ ROM_START( vimana ) /* From board serial number 1547.04 (July '94) */
ROM_LOAD16_BYTE( "tp019-8a.bin", 0x000001, 0x20000, CRC(03ba27e8) SHA1(edb5fe741d2a6a7fe5cde9a82317ea1e9447cf73) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.019", 0x00000, 0x08000, NO_DUMP )
+ /* sound CPU is a HD647180 (Z180) with internal ROM */
+ ROM_LOAD( "hd647180.019", 0x00000, 0x08000, CRC(41a97ebe) SHA1(9b377086e4d9b8de6e3c8c7d2dd099b80ab88934) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "vim6.bin", 0x00000, 0x20000, CRC(2886878d) SHA1(f44933d87bbcd3bd58f46e0f0f89b05c409b713b) )
@@ -2953,8 +3052,8 @@ ROM_START( vimanan )
ROM_LOAD16_BYTE( "tp019-08.rom", 0x000001, 0x20000, CRC(6cd2dc3c) SHA1(029d974eb938c5e2fbe7575f0dda342b4b12b731) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.019", 0x00000, 0x08000, NO_DUMP )
+ /* sound CPU is a HD647180 (Z180) with internal ROM */
+ ROM_LOAD( "hd647180.019", 0x00000, 0x08000, CRC(41a97ebe) SHA1(9b377086e4d9b8de6e3c8c7d2dd099b80ab88934) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "vim6.bin", 0x00000, 0x20000, CRC(2886878d) SHA1(f44933d87bbcd3bd58f46e0f0f89b05c409b713b) )
@@ -2977,8 +3076,8 @@ ROM_START( vimanaj )
ROM_LOAD16_BYTE( "vim08.bin", 0x000001, 0x20000, CRC(e45b7def) SHA1(6b92a91d64581954da8ecdbeb5fed79bcc9c5217) )
ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.019", 0x00000, 0x08000, NO_DUMP )
+ /* sound CPU is a HD647180 (Z180) with internal ROM */
+ ROM_LOAD( "hd647180.019", 0x00000, 0x08000, CRC(41a97ebe) SHA1(9b377086e4d9b8de6e3c8c7d2dd099b80ab88934) )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD16_BYTE( "vim6.bin", 0x00000, 0x20000, CRC(2886878d) SHA1(f44933d87bbcd3bd58f46e0f0f89b05c409b713b) )
@@ -3007,40 +3106,45 @@ DRIVER_INIT_MEMBER(toaplan1_state,demonwld)
demonwld_driver_savestate();
}
-DRIVER_INIT_MEMBER(toaplan1_state,vimana)
-{
- toaplan1_driver_savestate();
- vimana_driver_savestate();
-}
+
GAME( 1988, rallybik, 0, rallybik, rallybik, toaplan1_state, toaplan1, ROT270, "Toaplan / Taito Corporation", "Rally Bike / Dash Yarou", 0 )
+
GAME( 1988, truxton, 0, truxton, truxton, toaplan1_state, toaplan1, ROT270, "Toaplan / Taito Corporation", "Truxton / Tatsujin", 0 )
-GAME( 1989, hellfire, 0, hellfire, hellfire, toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (2P set)", 0 )
-GAME( 1989, hellfire1, hellfire, hellfire, hellfire1, toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (1P set)", 0 )
-GAME( 1989, hellfire2a, hellfire, hellfire, hellfire2a,toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (2P set, older)", 0 )
-GAME( 1989, hellfire1a, hellfire, hellfire, hellfire1a,toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (1P set, older)", 0 )
-GAME( 1989, zerowing, 0, zerowing, zerowing2, toaplan1_state, toaplan1, ROT0, "Toaplan", "Zero Wing (2P set)", 0 )
-GAME( 1989, zerowing1, zerowing, zerowing, zerowing, toaplan1_state, toaplan1, ROT0, "Toaplan", "Zero Wing (1P set)", 0 )
-GAME( 1989, zerowingw, zerowing, zerowing, zerowing2, toaplan1_state, toaplan1, ROT0, "Toaplan (Williams license)", "Zero Wing (2P set, Williams license)", 0 )
-GAME( 1990, demonwld, 0, demonwld, demonwld, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 1)", 0 )
-GAME( 1989, demonwld1, demonwld, demonwld, demonwld, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 2)", 0 )
-GAME( 1989, demonwld2, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 3)", 0 )
-GAME( 1989, demonwld3, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 4)", 0 )
-GAME( 1989, demonwld4, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 5)", 0 )
-GAME( 1990, fireshrk, 0, samesame, fireshrk, toaplan1_state, toaplan1, ROT270, "Toaplan", "Fire Shark", MACHINE_NO_SOUND )
-GAME( 1989, fireshrka, fireshrk, samesame, fireshrka, toaplan1_state, toaplan1, ROT270, "Toaplan", "Fire Shark (earlier)", MACHINE_NO_SOUND )
-GAME( 1990, fireshrkd, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan (Dooyong license)", "Fire Shark (Korea, set 1, easier)", MACHINE_NO_SOUND )
-GAME( 1990, fireshrkdh, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan (Dooyong license)", "Fire Shark (Korea, set 2, harder)", MACHINE_NO_SOUND )
-GAME( 1989, samesame, fireshrk, samesame, samesame, toaplan1_state, toaplan1, ROT270, "Toaplan", "Same! Same! Same! (1P set)", MACHINE_NO_SOUND )
-GAME( 1989, samesame2, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan", "Same! Same! Same! (2P set)", MACHINE_NO_SOUND )
-GAME( 1990, outzone, 0, outzone, outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone", 0 )
-GAME( 1990, outzoneh, outzone, outzone, outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (harder)", 0 )
-GAME( 1990, outzonea, outzone, outzone, outzonea, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (old set)", 0 )
-GAME( 1990, outzoneb, outzone, outzone, outzonea, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (older set)", 0 )
-GAME( 1990, outzonec, outzone, outzone, outzonec, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (oldest set)", MACHINE_IMPERFECT_SOUND ) // prototype?
-GAME( 1990, outzonecv, outzone, outzonecv,outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (Zero Wing TP-015 PCB conversion)", 0 )
-GAME( 1991, vimana, 0, vimana, vimana, toaplan1_state, vimana, ROT270, "Toaplan", "Vimana (World, set 1)", MACHINE_NO_SOUND )
-GAME( 1991, vimanan, vimana, vimana, vimanan, toaplan1_state, vimana, ROT270, "Toaplan", "Vimana (World, set 2)", MACHINE_NO_SOUND )
-GAME( 1991, vimanaj, vimana, vimana, vimanaj, toaplan1_state, vimana, ROT270, "Toaplan", "Vimana (Japan)", MACHINE_NO_SOUND )
+
+GAME( 1989, hellfire, 0, hellfire, hellfire, toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (2P set)", 0 )
+GAME( 1989, hellfire1, hellfire, hellfire, hellfire1, toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (1P set)", 0 )
+GAME( 1989, hellfire2a, hellfire, hellfire, hellfire2a,toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (2P set, older)", 0 )
+GAME( 1989, hellfire1a, hellfire, hellfire, hellfire1a,toaplan1_state, toaplan1, ROT0, "Toaplan (Taito license)", "Hellfire (1P set, older)", 0 )
+
+GAME( 1989, zerowing, 0, zerowing, zerowing2, toaplan1_state, toaplan1, ROT0, "Toaplan", "Zero Wing (2P set)", 0 )
+GAME( 1989, zerowing1, zerowing, zerowing, zerowing, toaplan1_state, toaplan1, ROT0, "Toaplan", "Zero Wing (1P set)", 0 )
+GAME( 1989, zerowingw, zerowing, zerowing, zerowing2, toaplan1_state, toaplan1, ROT0, "Toaplan (Williams license)", "Zero Wing (2P set, Williams license)", 0 )
+
+GAME( 1990, demonwld, 0, demonwld, demonwld, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 1)", 0 )
+GAME( 1989, demonwld1, demonwld, demonwld, demonwld, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 2)", 0 )
+GAME( 1989, demonwld2, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 3)", 0 )
+GAME( 1989, demonwld3, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 4)", 0 )
+GAME( 1989, demonwld4, demonwld, demonwld, demonwld1, toaplan1_state, demonwld, ROT0, "Toaplan", "Demon's World / Horror Story (set 5)", 0 )
+
+GAME( 1990, fireshrk, 0, samesame, fireshrk, toaplan1_state, toaplan1, ROT270, "Toaplan", "Fire Shark", 0 )
+GAME( 1989, fireshrka, fireshrk, samesame, fireshrka, toaplan1_state, toaplan1, ROT270, "Toaplan", "Fire Shark (earlier)", 0 )
+GAME( 1990, fireshrkd, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan (Dooyong license)", "Fire Shark (Korea, set 1, easier)", 0 )
+GAME( 1990, fireshrkdh, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan (Dooyong license)", "Fire Shark (Korea, set 2, harder)", 0 )
+GAME( 1989, samesame, fireshrk, samesame, samesame, toaplan1_state, toaplan1, ROT270, "Toaplan", "Same! Same! Same! (1P set)", 0 )
+GAME( 1989, samesame2, fireshrk, samesame, samesame2, toaplan1_state, toaplan1, ROT270, "Toaplan", "Same! Same! Same! (2P set)", 0 )
+GAME( 2015, samesamenh, fireshrk, samesame, samesame, toaplan1_state, toaplan1, ROT270, "hack (trap15)", "Same! Same! Same! (1P set, NEW VER! hack)", 0 )
+
+GAME( 1990, outzone, 0, outzone, outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone", 0 )
+GAME( 1990, outzoneh, outzone, outzone, outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (harder)", 0 )
+GAME( 1990, outzonea, outzone, outzone, outzonea, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (old set)", 0 )
+GAME( 1990, outzoneb, outzone, outzone, outzonea, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (older set)", 0 )
+GAME( 1990, outzonec, outzone, outzone, outzonec, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (oldest set)", MACHINE_IMPERFECT_SOUND ) // prototype?
+GAME( 1990, outzonecv, outzone, outzonecv,outzone, toaplan1_state, toaplan1, ROT270, "Toaplan", "Out Zone (Zero Wing TP-015 PCB conversion)", 0 )
+
+// has various licenses / regions depending on jumpers, including Tecmo
+GAME( 1991, vimana, 0, vimana, vimana, toaplan1_state, toaplan1, ROT270, "Toaplan", "Vimana (World, set 1)", 0 )
+GAME( 1991, vimanan, vimana, vimana, vimanan, toaplan1_state, toaplan1, ROT270, "Toaplan", "Vimana (World, set 2)", 0 )
+GAME( 1991, vimanaj, vimana, vimana, vimanaj, toaplan1_state, toaplan1, ROT270, "Toaplan", "Vimana (Japan)", 0 )
diff --git a/src/mame/drivers/toaplan2.cpp b/src/mame/drivers/toaplan2.cpp
index 8ef996f6445..46917219621 100644
--- a/src/mame/drivers/toaplan2.cpp
+++ b/src/mame/drivers/toaplan2.cpp
@@ -39,6 +39,7 @@ Supported games:
batsugun TP-030 Toaplan Batsugun
batsuguna TP-030 Toaplan Batsugun (older)
batsugunsp TP-030 Toaplan Batsugun (Special Version)
+ enmadaio TP-031 Toaplan Enma Daio
pwrkick SW931201 Sunwise Power Kick
othldrby ?????? Sunwise Othello Derby
snowbro2 TP-033 Hanafram Snow Bros. 2 - With New Elves
@@ -311,7 +312,7 @@ Graphics Custom 208pin QFP:
Game status:
-Teki Paki Working, but no sound. Missing sound MCU dump. Chip is protected. It's a QFP80 Hitachi HD647180.
+Teki Paki Working. MCU type is a Hitachi HD647180.
Ghox Working, but no sound. Missing sound MCU dump. It's a QFP80 Hitachi HD647180.
Dogyuun Working. MCU type is a NEC V25. Chip is a PLCC94 stamped 'TS-002-MACH'.*
Knuckle Bash Working. MCU type is a NEC V25. Chip is a PLCC94 stamped 'TS-004-DASH'.*
@@ -478,6 +479,15 @@ DRIVER_INIT_MEMBER(toaplan2_state,bbakraid)
m_sndirq_line = 2;
}
+DRIVER_INIT_MEMBER(toaplan2_state,enmadaio)
+{
+ uint8_t *ROM = memregion("oki")->base();
+
+ membank("bank1")->configure_entries(0, 0x60, ROM, 0x40000);
+ membank("bank1")->set_entry(0);
+}
+
+
/***************************************************************************
Toaplan games
@@ -659,9 +669,9 @@ CUSTOM_INPUT_MEMBER(toaplan2_state::c2map_r)
// For Teki Paki hardware
// bit 4 high signifies secondary CPU is ready
// bit 5 is tested low before V-Blank bit ???
- m_mcu_data = 0xff;
+ //m_mcu_data = 0xff;
- return (m_mcu_data == 0xff) ? 0x01 : 0x00;
+ return (m_cmdavailable) ? 0x00 : 0x01;
}
@@ -998,10 +1008,11 @@ static ADDRESS_MAP_START( tekipaki_68k_mem, AS_PROGRAM, 16, toaplan2_state )
AM_RANGE(0x180040, 0x180041) AM_WRITE(toaplan2_coin_word_w)
AM_RANGE(0x180050, 0x180051) AM_READ_PORT("IN1")
AM_RANGE(0x180060, 0x180061) AM_READ_PORT("IN2")
- AM_RANGE(0x180070, 0x180071) AM_WRITE(toaplan2_hd647180_cpu_w)
+ AM_RANGE(0x180070, 0x180071) AM_WRITE(tekipaki_mcu_w)
ADDRESS_MAP_END
+
static ADDRESS_MAP_START( ghox_68k_mem, AS_PROGRAM, 16, toaplan2_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0x040001) AM_READ(ghox_p2_h_analog_r)
@@ -1243,6 +1254,46 @@ static ADDRESS_MAP_START( othldrby_68k_mem, AS_PROGRAM, 16, toaplan2_state )
ADDRESS_MAP_END
+WRITE16_MEMBER(toaplan2_state::enmadaio_oki_bank_w)
+{
+ data &= mem_mask;
+
+ if (data < 0x60)
+ {
+ membank("bank1")->set_entry(data);
+ }
+ else
+ {
+ logerror("enmadaio_oki_bank_w >=0x60 (%04x)\n",data);
+ }
+
+}
+
+static ADDRESS_MAP_START( enmadaio_68k_mem, AS_PROGRAM, 16, toaplan2_state )
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM
+ AM_RANGE(0x100000, 0x103fff) AM_RAM // AM_SHARE("nvram")
+ AM_RANGE(0x104000, 0x10ffff) AM_RAM
+
+ AM_RANGE(0x200000, 0x20000d) AM_DEVREADWRITE("gp9001", gp9001vdp_device, gp9001_vdp_r, gp9001_vdp_w)
+ AM_RANGE(0x300000, 0x300fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
+ AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("ymsnd", ym2151_device, read, write, 0x00ff)
+ AM_RANGE(0x500000, 0x500001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
+
+ AM_RANGE(0x700000, 0x700001) AM_READ(video_count_r)
+
+ AM_RANGE(0x700004, 0x700005) AM_READ_PORT("DSWA")
+ AM_RANGE(0x70000c, 0x70000d) AM_READ_PORT("MISC2")
+ AM_RANGE(0x700010, 0x700011) AM_READ_PORT("MISC3")
+ AM_RANGE(0x700014, 0x700015) AM_READ_PORT("MISC4")
+ AM_RANGE(0x700018, 0x700019) AM_READ_PORT("SYS")
+ AM_RANGE(0x70001c, 0x70001d) AM_READ_PORT("UNK") //AM_READ_PORT("SYS")
+
+ AM_RANGE(0x700020, 0x700021) AM_WRITE(enmadaio_oki_bank_w) // oki bank
+
+ AM_RANGE(0x700028, 0x700029) AM_WRITENOP
+ AM_RANGE(0x70003c, 0x70003d) AM_WRITENOP
+ AM_RANGE(0x70002c, 0x70002d) AM_WRITENOP
+ADDRESS_MAP_END
static ADDRESS_MAP_START( snowbro2_68k_mem, AS_PROGRAM, 16, toaplan2_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
@@ -1505,6 +1556,48 @@ static ADDRESS_MAP_START( fixeightbl_oki, AS_0, 8, toaplan2_state )
AM_RANGE(0x30000, 0x3ffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END
+static ADDRESS_MAP_START( enmadaio_oki, AS_0, 8, toaplan2_state )
+ AM_RANGE(0x00000, 0x3ffff) AM_ROMBANK("bank1")
+ADDRESS_MAP_END
+
+
+
+WRITE16_MEMBER(toaplan2_state::tekipaki_mcu_w)
+{
+ if (ACCESSING_BITS_0_7)
+ {
+ m_mcu_data = data & 0xff;
+ m_cmdavailable = 1;
+ }
+};
+
+READ8_MEMBER(toaplan2_state::tekipaki_soundlatch_r)
+{
+ m_cmdavailable = 0;
+ return m_mcu_data;
+};
+
+READ8_MEMBER(toaplan2_state::tekipaki_cmdavailable_r)
+{
+ if (m_cmdavailable) return 0xff;
+ else return 0x00;
+};
+
+static ADDRESS_MAP_START( hd647180_mem_map, AS_PROGRAM, 8, toaplan2_state )
+ AM_RANGE(0x00000, 0x03fff) AM_ROM /* Internal 16k byte ROM */
+ AM_RANGE(0x0fe00, 0x0ffff) AM_RAM /* Internal 512 byte RAM */
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START( hd647180_io_map, AS_IO, 8, toaplan2_state )
+ ADDRESS_MAP_GLOBAL_MASK(0xff)
+
+ AM_RANGE(0x60, 0x60) AM_READ(tekipaki_cmdavailable_r)
+ AM_RANGE(0x84, 0x84) AM_READ(tekipaki_soundlatch_r)
+
+ AM_RANGE(0x82, 0x82) AM_DEVREADWRITE("ymsnd", ym3812_device, status_port_r, control_port_w)
+ AM_RANGE(0x83, 0x83) AM_DEVREADWRITE("ymsnd", ym3812_device, read_port_r, write_port_w)
+ADDRESS_MAP_END
+
/*****************************************************************************
Input Port definitions
@@ -2467,6 +2560,218 @@ static INPUT_PORTS_START( othldrby )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
+
+static INPUT_PORTS_START( enmadaio )
+ PORT_START("SYS")
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SERVICE1 )
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_TILT )
+ TOAPLAN_TEST_SWITCH( 0x04, IP_ACTIVE_HIGH )
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_COIN1 )
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_COIN2 )
+ PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_START1 )
+ PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_START2 )
+ PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+
+ PORT_START("DSWA")
+ PORT_DIPNAME( 0x0001, 0x0000, "Game Mode" )
+ PORT_DIPSETTING( 0x0000, "Normal Game" )
+ PORT_DIPSETTING( 0x0001, "Stop and Slow Mode" )
+ PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) // unused
+ PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coin_A ) )
+ PORT_DIPSETTING( 0x0030, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
+ PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) )
+ PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) ) // unused
+ PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) ) // unused
+ PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
+
+ PORT_START("MISC2") // should be DSWB? but not even read in test mode display?
+ PORT_DIPNAME( 0x0001, 0x0001, "2" )
+ PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+
+ PORT_START("MISC3")
+ PORT_DIPNAME( 0x0001, 0x0001, "3" )
+ PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("yes")
+ PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("no")
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+
+ PORT_START("MISC4")
+ PORT_DIPNAME( 0x0001, 0x0001, "4" )
+ PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0004, 0x0000, "Status of Something 1" ) // gives error in attract mode otherwise
+ PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0040, 0x0000, "Status of Something 2" ) // turn this off and it comes up with an error
+ PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+
+ PORT_START("UNK")
+ PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) // this is the sensor, not sure what it measures, pulse / heartbeat?
+ PORT_DIPNAME( 0x0100, 0x0100, "Freeze" ) // not sure
+ PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+
+INPUT_PORTS_END
+
static INPUT_PORTS_START( snowbro2 )
PORT_INCLUDE( toaplan2_2b )
@@ -3014,10 +3319,7 @@ static MACHINE_CONFIG_START( tekipaki, toaplan2_state )
MCFG_CPU_PROGRAM_MAP(tekipaki_68k_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", toaplan2_state, toaplan2_vblank_irq4)
-#ifdef USE_HD64x180
- MCFG_CPU_ADD("audiocpu", Z180, XTAL_10MHz) /* HD647180 CPU actually */
- MCFG_CPU_PROGRAM_MAP(hd647180_mem)
-#endif
+
MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
MCFG_MACHINE_RESET_OVERRIDE(toaplan2_state,toaplan2)
@@ -3045,13 +3347,26 @@ static MACHINE_CONFIG_START( tekipaki, toaplan2_state )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_27MHz/8)
-#ifdef USE_HD64x180
- MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", 0))
-#endif
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_DERIVED( tekipaki_mcu, tekipaki )
+
+ MCFG_CPU_ADD("audiocpu", Z180, XTAL_10MHz) /* HD647180 CPU actually */
+ MCFG_CPU_PROGRAM_MAP(hd647180_mem_map)
+ MCFG_CPU_IO_MAP(hd647180_io_map)
+
+ MCFG_QUANTUM_TIME(attotime::from_hz(600)) // GUESSED
+
+ MCFG_DEVICE_REMOVE("ymsnd")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_27MHz/8)
+ MCFG_YM3812_IRQ_HANDLER(INPUTLINE("audiocpu", 0))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+MACHINE_CONFIG_END
+
static MACHINE_CONFIG_START( ghox, toaplan2_state )
/* basic machine hardware */
@@ -3692,6 +4007,42 @@ static MACHINE_CONFIG_START( othldrby, toaplan2_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
MACHINE_CONFIG_END
+
+static MACHINE_CONFIG_START( enmadaio, toaplan2_state )
+ /* basic machine hardware */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_20MHz/2)
+ MCFG_CPU_PROGRAM_MAP(enmadaio_68k_mem)
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", toaplan2_state, toaplan2_vblank_irq4)
+
+ MCFG_MACHINE_START_OVERRIDE(toaplan2_state,toaplan2)
+
+ /* video hardware */
+ MCFG_SCREEN_ADD("screen", RASTER)
+ MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
+ MCFG_SCREEN_RAW_PARAMS(XTAL_27MHz/4,432,0,320,262,0,240)
+ MCFG_SCREEN_UPDATE_DRIVER(toaplan2_state, screen_update_toaplan2)
+ MCFG_SCREEN_VBLANK_DRIVER(toaplan2_state, screen_eof_toaplan2)
+ MCFG_SCREEN_PALETTE("palette")
+
+ MCFG_PALETTE_ADD("palette", T2PALETTE_LENGTH)
+ MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
+
+ MCFG_DEVICE_ADD("gp9001", GP9001_VDP, 0)
+ MCFG_GFX_PALETTE("palette")
+
+ MCFG_VIDEO_START_OVERRIDE(toaplan2_state,toaplan2)
+
+ /* sound hardware */
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", XTAL_27MHz/8)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
+
+ MCFG_OKIM6295_ADD("oki", XTAL_16MHz/4, OKIM6295_PIN7_LOW) // pin7 not confirmed
+ MCFG_DEVICE_ADDRESS_MAP(AS_0, enmadaio_oki)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
+MACHINE_CONFIG_END
+
static MACHINE_CONFIG_START( snowbro2, toaplan2_state )
/* basic machine hardware */
@@ -4002,9 +4353,8 @@ ROM_START( tekipaki )
ROM_LOAD16_BYTE( "tp020-1.bin", 0x000000, 0x010000, CRC(d8420bd5) SHA1(30c1ad9e053cd7e79adb42aa428ebee28e144755) )
ROM_LOAD16_BYTE( "tp020-2.bin", 0x000001, 0x010000, CRC(7222de8e) SHA1(8352ae23efc24a2e20cc24b6d37cb8fc6b1a730c) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound HD647180 code */
- /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
- ROM_LOAD( "hd647180.020", 0x00000, 0x08000, NO_DUMP )
+ ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */
+ ROM_LOAD( "hd647180.020", 0x00000, 0x08000, CRC(d5157c12) SHA1(b2c6c087bb539456a9e562d0b40f05dde26cacd3) )
ROM_REGION( 0x100000, "gp9001", 0 )
ROM_LOAD( "tp020-4.bin", 0x000000, 0x080000, CRC(3ebbe41e) SHA1(cea196c5f83e1a23d5b538a0db9bbbffa7af5118) )
@@ -4012,6 +4362,7 @@ ROM_START( tekipaki )
ROM_END
+
ROM_START( ghox ) /* Spinner with single axis (up/down) controls */
ROM_REGION( 0x040000, "maincpu", 0 ) /* Main 68K code */
ROM_LOAD16_BYTE( "tp021-01.u10", 0x000000, 0x020000, CRC(9e56ac67) SHA1(daf241d9e55a6e60fc004ed61f787641595b1e62) )
@@ -4615,6 +4966,29 @@ ROM_START( othldrby )
ROM_LOAD( "db0.4", 0x00000, 0x80000, CRC(a9701868) SHA1(9ee89556666d358e8d3915622573b3ba660048b8) )
ROM_END
+ROM_START( enmadaio )
+ ROM_REGION( 0x080000, "maincpu", 0 )
+ ROM_LOAD16_WORD_SWAP( "03N_U53.C8", 0x00000, 0x80000, CRC(1a6ca2ee) SHA1(13d34a10004ca172db7953e2be8daa90fc5b62ed) )
+
+ ROM_REGION( 0x200000, "gp9001", 0 )
+ ROM_LOAD( "ROM4_U30.C19", 0x000000, 0x100000, CRC(7a012d8b) SHA1(a33d9490573a9fd1e799d3fe567f991926851c51) )
+ ROM_LOAD( "ROM5_U31.C18", 0x100000, 0x100000, CRC(60b127ab) SHA1(98785dfd6a86b4bd2c9786f6f72796c023b5b73a) )
+
+ ROM_REGION( 0x1800000, "oki", 0 ) /* OKIM6295 samples */ // each rom contains 8 0x40000 banks, there are 12 roms, so 96 (0x60) banks here!
+ ROM_LOAD( "ROM6_U65.A1", 0x0000000, 0x0200000, CRC(f33c6c0b) SHA1(06d73cd5b6d27de4d68f2dde1ed4dfa72b9a9178) )
+ ROM_LOAD( "ROM7_U66.A3", 0x0200000, 0x0200000, CRC(1306f8b3) SHA1(21b0d3180f1f4af77074c35c66844e38a464fea0) )
+ ROM_LOAD( "ROM8_U61.A4", 0x0400000, 0x0200000, CRC(4f211c00) SHA1(b067de95ad595a4915effefb83789e4e3d9db6f9) )
+ ROM_LOAD( "ROM9_U62.A6", 0x0600000, 0x0200000, CRC(292d3ef6) SHA1(d027d4c64e57f46e444ee83b62f6c3bdf02e4eed) )
+ ROM_LOAD( "ROM10_U67.A8", 0x0800000, 0x0200000, CRC(5219bf86) SHA1(946c8fcf3c04a88517d1a66ccd56609d22da945f) )
+ ROM_LOAD( "ROM11_U68.A10", 0x0a00000, 0x0200000, CRC(56fe4b1d) SHA1(2ea0413b435dd178174eb66d38dc9f7ab3d07ba5) )
+ ROM_LOAD( "ROM12_U63.A11", 0x0c00000, 0x0200000, CRC(cc48ff18) SHA1(10f6d9f445c9244b797846450f0c94700ccc7367) )
+ ROM_LOAD( "ROM13_U64.A13", 0x0e00000, 0x0200000, CRC(a3cd181a) SHA1(6a87479c24a61f7ac940e9c9bb62a18f26c9c843) )
+ ROM_LOAD( "ROM14_U69.A14", 0x1000000, 0x0200000, CRC(5d8cddec) SHA1(1912850d065d4ce1a1cdfd5a704218e660b5345b) )
+ ROM_LOAD( "ROM15_U70.A16", 0x1200000, 0x0200000, CRC(c75012f5) SHA1(b1ba0abab3eb8e9e3778eecab4951d828c85cecb) )
+ ROM_LOAD( "ROM16_U71.A18", 0x1400000, 0x0200000, CRC(efd02b0d) SHA1(b23fa3298fc29086f9ab05bc58775ff47b4cb7a9) )
+ ROM_LOAD( "ROM17_U72.A19", 0x1600000, 0x0200000, CRC(6b8717c3) SHA1(b5b7e35deaa2f34bccd1e83844d4bc0be845d0b8) )
+ROM_END
+
ROM_START( snowbro2 )
ROM_REGION( 0x080000, "maincpu", 0 ) /* Main 68K code */
ROM_LOAD16_WORD_SWAP( "pro-4", 0x000000, 0x080000, CRC(4c7ee341) SHA1(ad46c605a38565d0148daac301be4e4b72302fe7) )
@@ -5364,7 +5738,7 @@ ROM_END
// See list at top of file
// ( YEAR NAME PARENT MACHINE INPUT INIT MONITOR COMPANY FULLNAME FLAGS )
-GAME( 1991, tekipaki, 0, tekipaki, tekipaki, driver_device, 0, ROT0, "Toaplan", "Teki Paki", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
+GAME( 1991, tekipaki, 0, tekipaki_mcu, tekipaki, driver_device, 0, ROT0, "Toaplan", "Teki Paki", MACHINE_SUPPORTS_SAVE )
GAME( 1991, ghox, 0, ghox, ghox, driver_device, 0, ROT270, "Toaplan", "Ghox (spinner)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1991, ghoxj, ghox, ghox, ghox, driver_device, 0, ROT270, "Toaplan", "Ghox (joystick)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
@@ -5387,6 +5761,8 @@ GAME( 1991, whoopee, pipibibs, tekipaki, whoopee, driver_device, 0, R
GAME( 1991, pipibibsbl, pipibibs, pipibibsbl, pipibibsbl, toaplan2_state, pipibibsbl, ROT0, "bootleg (Ryouta Kikaku)", "Pipi & Bibis / Whoopee!! (bootleg)", MACHINE_SUPPORTS_SAVE )
+GAME( 1993, enmadaio, 0, enmadaio, enmadaio,toaplan2_state, enmadaio, ROT0, "Toaplan / Taito", "Enma Daio (Japan)", 0 ) // TP-031
+
// region is in eeprom (and also requires correct return value from a v25 mapped address??)
GAME( 1992, fixeight, 0, fixeight, fixeight, toaplan2_state, fixeight, ROT270, "Toaplan", "FixEight (Europe)", MACHINE_SUPPORTS_SAVE )
GAME( 1992, fixeightk, fixeight, fixeight, fixeight, toaplan2_state, fixeight, ROT270, "Toaplan", "FixEight (Korea)", MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/tosh1000.cpp b/src/mame/drivers/tosh1000.cpp
index 376241770ab..ee0150afd99 100644
--- a/src/mame/drivers/tosh1000.cpp
+++ b/src/mame/drivers/tosh1000.cpp
@@ -4,16 +4,16 @@
Toshiba T1000 portable
- 80C88 CPU @ 5 MHz [OKI MSM80C88A-10GS-K (56 pin PQFP)]
- 512KB RAM + 16KB video RAM
- 32KB BIOS ROM [Toshiba TC54256AD]
- 256KB MS-DOS 2.11 ROM [Toshiba TC534000]
- SuperIO chip (Toshiba T7885) = 82C84 + 82C88 + 82C59 + upd765 + 82C53 + 82C37 + 82C55
- Real Time Clock chip: TC8521
- Keyboard controller: 80C50
- RS232C controller: 8250
+ 80C88 CPU @ 5 MHz [OKI MSM80C88A-10GS-K (56 pin PQFP)]
+ 512KB RAM + 16KB video RAM
+ 32KB BIOS ROM [Toshiba TC54256AD]
+ 256KB MS-DOS 2.11 ROM [Toshiba TC534000]
+ SuperIO chip (Toshiba T7885) = 82C84 + 82C88 + 82C59 + upd765 + 82C53 + 82C37 + 82C55
+ Real Time Clock chip: TC8521
+ Keyboard controller: 80C50
+ RS232C controller: 8250
- NB: dumps of ROM-DOS and CGA chargen are missing.
+ NB: dumps of ROM-DOS and CGA chargen are missing.
***************************************************************************/
@@ -49,7 +49,7 @@ class tosh1000_state : public driver_device
public:
tosh1000_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
- , m_maincpu(*this, "maincpu")
+ , m_maincpu(*this, "maincpu")
, m_bankdev(*this, "romdos")
{ }
@@ -80,8 +80,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tosh1000_io, AS_IO, 8, tosh1000_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", ibm5160_mb_device, map)
- AM_RANGE(0x00c8, 0x00c8) AM_NOP // ROM-DOS page select [p. B-15]
- AM_RANGE(0x00e0, 0x00ef) AM_NOP // ???
+ AM_RANGE(0x00c8, 0x00c8) AM_NOP // ROM-DOS page select [p. B-15]
+ AM_RANGE(0x00e0, 0x00ef) AM_NOP // ???
AM_RANGE(0x02c0, 0x02cf) AM_DEVREADWRITE("rtc", rp5c01_device, read, write)
ADDRESS_MAP_END
@@ -112,7 +112,7 @@ static MACHINE_CONFIG_START( tosh1000, tosh1000_state )
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "lpt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "com", false)
-// MCFG_SOFTWARE_LIST_ADD("flop_list","tosh1000")
+// MCFG_SOFTWARE_LIST_ADD("flop_list","tosh1000")
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp
index 893f25df22f..33e7e4cabce 100644
--- a/src/mame/drivers/vegas.cpp
+++ b/src/mame/drivers/vegas.cpp
@@ -1244,7 +1244,7 @@ WRITE32_MEMBER( vegas_state::nile_w )
break;
case NREG_UARTTHR: /* serial port output */
- if (PRINTF_SERIAL) osd_printf_debug("%c", data & 0xff);
+ if (PRINTF_SERIAL) osd_printf_info("%c", data & 0xff);
logit = 0;
break;
case NREG_UARTIER: /* serial interrupt enable */
diff --git a/src/mame/drivers/vis.cpp b/src/mame/drivers/vis.cpp
index 27c4f73d1be..bedd268d398 100644
--- a/src/mame/drivers/vis.cpp
+++ b/src/mame/drivers/vis.cpp
@@ -246,7 +246,8 @@ private:
uint8_t m_extreg;
uint8_t m_interlace;
uint16_t m_wina, m_winb;
- uint8_t m_shift256, m_dw;
+ uint8_t m_shift256, m_dw, m_8bit_640;
+ uint8_t m_crtc_regs[0x31];
};
const device_type VIS_VGA = &device_creator<vis_vga_device>;
@@ -277,16 +278,15 @@ void vis_vga_device::recompute_params()
int pixel_clock;
int xtal = (vga.miscellaneous_output & 0xc) ? XTAL_28_63636MHz : XTAL_25_1748MHz;
int divisor = 1; // divisor is 2 for 15/16 bit rgb/yuv modes and 3 for 24bit
- int interlace = m_interlace ? 2 : 1;
/* safety check */
if(!vga.crtc.horz_disp_end || !vga.crtc.vert_disp_end || !vga.crtc.horz_total || !vga.crtc.vert_total)
return;
- rectangle visarea(0, ((vga.crtc.horz_disp_end + 1) / interlace * ((float)(hclock_m)/divisor))-1, 0, vga.crtc.vert_disp_end * interlace);
+ rectangle visarea(0, ((vga.crtc.horz_disp_end + 1) * ((float)(hclock_m)/divisor))-1, 0, vga.crtc.vert_disp_end);
- vblank_period = (vga.crtc.vert_total * interlace + 2);
- hblank_period = ((vga.crtc.horz_total + 5) / interlace * ((float)(hclock_m)/divisor));
+ vblank_period = (vga.crtc.vert_total + 2);
+ hblank_period = ((vga.crtc.horz_total + 5) * ((float)(hclock_m)/divisor));
/* TODO: 10b and 11b settings aren't known */
pixel_clock = xtal / (((vga.sequencer.data[1]&8) >> 3) + 1);
@@ -294,7 +294,7 @@ void vis_vga_device::recompute_params()
refresh = HZ_TO_ATTOSECONDS(pixel_clock) * (hblank_period) * vblank_period;
machine().first_screen()->configure((hblank_period), (vblank_period), visarea, refresh );
//popmessage("%d %d\n",vga.crtc.horz_total * 8,vga.crtc.vert_total);
- m_vblank_timer->adjust( machine().first_screen()->time_until_pos((vga.crtc.vert_blank_start + vga.crtc.vert_blank_end) * interlace) );
+ m_vblank_timer->adjust( machine().first_screen()->time_until_pos((vga.crtc.vert_blank_start + vga.crtc.vert_blank_end)) );
}
rgb_t vis_vga_device::yuv_to_rgb(int y, int u, int v) const
@@ -315,9 +315,8 @@ void vis_vga_device::vga_vh_yuv8(bitmap_rgb32 &bitmap, const rectangle &cliprect
int pos, line, column, col, addr, curr_addr = 0;
const uint8_t decode_tbl[] = {0, 1, 2, 3, 4, 5, 6, 9, 12, 17, 22, 29, 38, 50, 66, 91, 128, 165, 190,
206, 218, 227, 234, 239, 244, 247, 250, 251, 252, 253, 254, 255};
- int interlace = m_interlace ? 2 : 1;
- for (addr = vga.crtc.start_addr, line=0; line<(vga.crtc.vert_disp_end+1) * interlace; line+=height, addr+=offset(), curr_addr+=offset())
+ for (addr = vga.crtc.start_addr, line=0; line<(vga.crtc.vert_disp_end+1); line+=height, addr+=offset(), curr_addr+=offset())
{
for(int yi = 0;yi < height; yi++)
{
@@ -326,7 +325,7 @@ void vis_vga_device::vga_vh_yuv8(bitmap_rgb32 &bitmap, const rectangle &cliprect
curr_addr = addr;
if((line + yi) == (vga.crtc.line_compare & 0x3ff))
curr_addr = 0;
- for (pos=curr_addr, col=0, column=0; column<(vga.crtc.horz_disp_end+1) / interlace; column++, col+=8, pos+=8)
+ for (pos=curr_addr, col=0, column=0; column<(vga.crtc.horz_disp_end+1); column++, col+=8, pos+=8)
{
if(pos + 0x08 > 0x80000)
return;
@@ -388,6 +387,7 @@ void vis_vga_device::device_start()
m_isa->install_device(0x03b0, 0x03df, read8_delegate(FUNC(vis_vga_device::vga_r), this), write8_delegate(FUNC(vis_vga_device::vga_w), this));
m_isa->install_memory(0x0a0000, 0x0bffff, read8_delegate(FUNC(vis_vga_device::visvgamem_r), this), write8_delegate(FUNC(vis_vga_device::visvgamem_w), this));
svga_device::device_start();
+ vga.svga_intf.seq_regcount = 0x2d;
}
void vis_vga_device::device_reset()
@@ -399,6 +399,7 @@ void vis_vga_device::device_reset()
m_interlace = 0;
m_shift256 = 0;
m_dw = 0;
+ m_8bit_640 = 0;
}
uint32_t vis_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@@ -439,28 +440,34 @@ uint32_t vis_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitm
READ8_MEMBER(vis_vga_device::visvgamem_r)
{
- if(!m_winb)
+ if(!(vga.sequencer.data[0x25] & 0x40))
return mem_r(space, offset, mem_mask);
- return mem_linear_r(space, (offset + (m_winb * 64)) & 0x3ffff, mem_mask);
+ u16 win = (vga.sequencer.data[0x1e] & 0x0f) == 3 ? m_wina : m_winb; // this doesn't seem quite right
+ return mem_linear_r(space, (offset + (win * 64)) & 0x3ffff, mem_mask);
}
WRITE8_MEMBER(vis_vga_device::visvgamem_w)
{
- if(!m_wina)
+ if(!(vga.sequencer.data[0x25] & 0x40))
return mem_w(space, offset, data, mem_mask);
return mem_linear_w(space, (offset + (m_wina * 64)) & 0x3ffff, data, mem_mask);
}
READ8_MEMBER(vis_vga_device::vga_r)
{
- if(offset == 0x16)
+ switch(offset)
{
- if(m_extcnt == 4)
- {
- m_extcnt = 0;
- return m_extreg;
- }
- m_extcnt++;
+ case 0x16:
+ if(m_extcnt == 4)
+ {
+ m_extcnt = 0;
+ return m_extreg;
+ }
+ m_extcnt++;
+ break;
+ case 0x05:
+ case 0x25:
+ return m_crtc_regs[vga.crtc.index];
}
if(offset < 0x10)
return port_03b0_r(space, offset, mem_mask);
@@ -477,6 +484,13 @@ WRITE8_MEMBER(vis_vga_device::vga_w)
case 0x15:
switch(vga.sequencer.index)
{
+ case 0x01:
+ m_8bit_640 = (data & 8) ? 0 : 1;
+ if(m_8bit_640 && (vga.sequencer.data[0x1f] & 0x10))
+ svga.rgb8_en = 1;
+ else
+ svga.rgb8_en = 0;
+ break;
case 0x19:
m_wina = (m_wina & 0xff00) | data;
break;
@@ -494,11 +508,16 @@ WRITE8_MEMBER(vis_vga_device::vga_w)
{
vga.gc.shift256 = 1;
vga.crtc.dw = 1;
+ if(m_8bit_640)
+ svga.rgb8_en = 1;
+ else
+ svga.rgb8_en = 0;
}
else
{
vga.gc.shift256 = m_shift256;
vga.crtc.dw = m_dw;
+ svga.rgb8_en = 0;
}
break;
}
@@ -516,22 +535,154 @@ WRITE8_MEMBER(vis_vga_device::vga_w)
if(vga.gc.index == 0x05)
{
m_shift256 = data & 0x40 ? 1 : 0;
- // remove this if it is shown to be unneeded
- //if(vga.sequencer.data[0x1f] | 0x10)
- //data |= 0x40;
+ if(vga.sequencer.data[0x1f] & 0x10)
+ data |= 0x40;
}
break;
case 0x05:
case 0x25:
+ m_crtc_regs[vga.crtc.index] = data;
switch(vga.crtc.index)
{
+ case 0x00:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_total = data / (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ recompute_params();
+ return;
+ case 0x01:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_disp_end = data / (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ recompute_params();
+ return;
+ case 0x02:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_blank_start = data / (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ return;
+ case 0x03:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_blank_end = (m_crtc_regs[0x05] & 0x80) >> 2;
+ vga.crtc.horz_blank_end |= data & 0x1f;
+ vga.crtc.horz_blank_end /= (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ vga.crtc.disp_enable_skew = (data & 0x60) >> 5;
+ vga.crtc.evra = (data & 0x80) >> 7;
+ return;
+ case 0x04:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_retrace_start = data / (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ return;
+ case 0x05:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.horz_blank_end = m_crtc_regs[0x05] & 0x1f;
+ vga.crtc.horz_blank_end |= ((data & 0x80) >> 2);
+ vga.crtc.horz_blank_end /= (m_interlace && !(vga.sequencer.data[0x25] & 0x20) ? 2 : 1);
+ vga.crtc.horz_retrace_skew = ((data & 0x60) >> 5);
+ vga.crtc.horz_retrace_end = data & 0x1f;
+ return;
+ case 0x06:
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.vert_total = ((m_crtc_regs[0x07] & 0x20) << (9-6)) | ((m_crtc_regs[0x07] & 0x01) << (8-0));
+ vga.crtc.vert_total |= data;
+ vga.crtc.vert_total *= (m_interlace ? 2 : 1);
+ recompute_params();
+ return;
+ case 0x07: // Overflow Register
+ vga.crtc.line_compare &= ~0x100;
+ vga.crtc.line_compare |= ((data & 0x10) << (8-4));
+ if(vga.crtc.protect_enable)
+ return;
+ vga.crtc.vert_total = m_crtc_regs[0x05];
+ vga.crtc.vert_retrace_start = m_crtc_regs[0x10];
+ vga.crtc.vert_disp_end = m_crtc_regs[0x12];
+ vga.crtc.vert_blank_start = m_crtc_regs[0x15] | ((m_crtc_regs[0x09] & 0x20) << (9-5));
+ vga.crtc.vert_retrace_start |= ((data & 0x80) << (9-7));
+ vga.crtc.vert_disp_end |= ((data & 0x40) << (9-6));
+ vga.crtc.vert_total |= ((data & 0x20) << (9-5));
+ vga.crtc.vert_blank_start |= ((data & 0x08) << (8-3));
+ vga.crtc.vert_retrace_start |= ((data & 0x04) << (8-2));
+ vga.crtc.vert_disp_end |= ((data & 0x02) << (8-1));
+ vga.crtc.vert_total |= ((data & 0x01) << (8-0));
+ vga.crtc.vert_total *= (m_interlace ? 2 : 1);
+ vga.crtc.vert_blank_start *= (m_interlace ? 2 : 1);
+ vga.crtc.vert_retrace_start *= (m_interlace ? 2 : 1);
+ vga.crtc.vert_disp_end *= (m_interlace ? 2 : 1);
+ recompute_params();
+ return;
+ case 0x09: // Maximum Scan Line Register
+ vga.crtc.line_compare &= ~0x200;
+ vga.crtc.vert_blank_start = m_crtc_regs[0x15] | ((m_crtc_regs[0x07] & 0x02) << (8-3));
+ vga.crtc.scan_doubling = ((data & 0x80) >> 7);
+ vga.crtc.line_compare |= ((data & 0x40) << (9-6));
+ vga.crtc.vert_blank_start |= ((data & 0x20) << (9-5));
+ vga.crtc.maximum_scan_line = (data & 0x1f) + 1;
+ vga.crtc.vert_blank_start *= (m_interlace ? 2 : 1);
+ return;
+ case 0x10:
+ vga.crtc.vert_retrace_start = ((m_crtc_regs[0x07] & 0x80) << (9-7)) | ((m_crtc_regs[0x07] & 0x40) << (8-2));
+ vga.crtc.vert_retrace_start |= data;
+ vga.crtc.vert_retrace_start *= (m_interlace ? 2 : 1);
+ return;
+ case 0x12:
+ vga.crtc.vert_disp_end = ((m_crtc_regs[0x07] & 0x40) << (9-6)) | ((m_crtc_regs[0x07] & 0x02) << (8-1));
+ vga.crtc.vert_disp_end |= data;
+ vga.crtc.vert_disp_end *= (m_interlace ? 2 : 1);
+ recompute_params();
+ return;
+ case 0x15:
+ vga.crtc.vert_blank_start = ((m_crtc_regs[0x09] & 0x20) << (9-5)) | ((m_crtc_regs[0x07] & 0x02) << (8-3));
+ vga.crtc.vert_blank_start |= data;
+ vga.crtc.vert_blank_start *= (m_interlace ? 2 : 1);
+ return;
+ case 0x16:
+ vga.crtc.vert_blank_end = (data & 0x7f) * (m_interlace ? 2 : 1);
+ return;
case 0x14:
m_dw = data & 0x40 ? 1 : 0;
- if(vga.sequencer.data[0x1f] | 0x10)
+ if(vga.sequencer.data[0x1f] & 0x10)
data |= 0x40;
break;
case 0x30:
- m_interlace = data; // XXX: verify?
+ if(data && !m_interlace)
+ {
+ if(!(vga.sequencer.data[0x25] & 0x20))
+ {
+ vga.crtc.horz_total /= 2;
+ vga.crtc.horz_disp_end /= 2;
+ vga.crtc.horz_blank_end /= 2;
+ vga.crtc.horz_retrace_start /= 2;
+ vga.crtc.horz_retrace_end /= 2;
+ }
+ vga.crtc.vert_total *= 2;
+ vga.crtc.vert_retrace_start *= 2;
+ vga.crtc.vert_disp_end *= 2;
+ vga.crtc.vert_blank_start *= 2;
+ vga.crtc.vert_blank_end *= 2;
+ recompute_params();
+ }
+ else if(!data && m_interlace)
+ {
+ if(!(vga.sequencer.data[0x25] & 0x20))
+ {
+ vga.crtc.horz_total *= 2;
+ vga.crtc.horz_disp_end *= 2;
+ vga.crtc.horz_blank_end *= 2;
+ vga.crtc.horz_retrace_start *= 2;
+ vga.crtc.horz_retrace_end *= 2;
+ }
+ vga.crtc.vert_total /= 2;
+ vga.crtc.vert_retrace_start /= 2;
+ vga.crtc.vert_disp_end /= 2;
+ vga.crtc.vert_blank_start /= 2;
+ vga.crtc.vert_blank_end /= 2;
+ recompute_params();
+ }
+ m_interlace = data;
return;
}
break;
diff --git a/src/mame/drivers/zwackery.cpp b/src/mame/drivers/zwackery.cpp
index 930be6b1cf8..efb42e78cd7 100644
--- a/src/mame/drivers/zwackery.cpp
+++ b/src/mame/drivers/zwackery.cpp
@@ -2,18 +2,18 @@
// copyright-holders: Aaron Giles, Bryan McPhail
/***************************************************************************
- Zwackery
+ Zwackery
- © 1984 Midway
+ © 1984 Midway
- The hardware consists of the following boards:
- - Venus CPU (B084-91668-A385)
- - Venus Video (B084-91675-A385)
- - Venus Background (B084-91672-A385)
- - Artificial Artist (B084-91671-A385)
+ The hardware consists of the following boards:
+ - Venus CPU (B084-91668-A385)
+ - Venus Video (B084-91675-A385)
+ - Venus Background (B084-91672-A385)
+ - Artificial Artist (B084-91671-A385)
- TODO:
- - Accurate screen timings
+ TODO:
+ - Accurate screen timings
***************************************************************************/
@@ -22,7 +22,7 @@
#include "machine/6821pia.h"
#include "machine/6840ptm.h"
#include "machine/watchdog.h"
-#include "audio/midway.h"
+#include "audio/csd.h"
//**************************************************************************
@@ -43,10 +43,9 @@ public:
m_screen(*this, "screen"),
m_gfxdecode(*this, "gfxdecode"),
m_videoram(*this, "videoram"),
- m_chip_squeak_deluxe(*this, "csd"),
+ m_cheap_squeak_deluxe(*this, "csd"),
m_bg_tilemap(nullptr),
- m_fg_tilemap(nullptr),
- m_sound_data(0)
+ m_fg_tilemap(nullptr)
{ }
DECLARE_VIDEO_START(zwackery);
@@ -64,7 +63,6 @@ public:
DECLARE_READ8_MEMBER(pia1_porta_r);
DECLARE_WRITE8_MEMBER(pia1_porta_w);
DECLARE_READ8_MEMBER(pia1_portb_r);
- DECLARE_WRITE_LINE_MEMBER(pia1_ca2_w);
DECLARE_READ8_MEMBER(pia2_porta_r);
DECLARE_READ8_MEMBER(ptm_r);
@@ -82,16 +80,15 @@ private:
required_device<screen_device> m_screen;
required_device<gfxdecode_device> m_gfxdecode;
required_shared_ptr<uint16_t> m_videoram;
- required_device<midway_chip_squeak_deluxe_device> m_chip_squeak_deluxe;
+ required_device<midway_cheap_squeak_deluxe_device> m_cheap_squeak_deluxe;
tilemap_t *m_bg_tilemap;
tilemap_t *m_fg_tilemap;
std::unique_ptr<uint8_t[]> m_spriteram;
+
std::unique_ptr<uint8_t[]> m_srcdata0;
std::unique_ptr<uint8_t[]> m_srcdata2;
-
- uint8_t m_sound_data;
};
@@ -406,12 +403,7 @@ GFXDECODE_END
WRITE8_MEMBER( zwackery_state::pia1_porta_w )
{
- m_sound_data = (data >> 4) & 0x0f;
-}
-
-WRITE_LINE_MEMBER( zwackery_state::pia1_ca2_w )
-{
- m_chip_squeak_deluxe->write(machine().dummy_space(), 0, (state << 4) | m_sound_data);
+ m_cheap_squeak_deluxe->sr_w(space, 0, data >> 4);
}
@@ -486,7 +478,6 @@ void zwackery_state::machine_start()
// register for save states
save_pointer(NAME(m_spriteram.get()), 0x800);
- save_item(NAME(m_sound_data));
}
@@ -514,7 +505,7 @@ static MACHINE_CONFIG_START( zwackery, zwackery_state )
MCFG_PIA_READPA_HANDLER(READ8(zwackery_state, pia1_porta_r))
MCFG_PIA_WRITEPA_HANDLER(WRITE8(zwackery_state, pia1_porta_w))
MCFG_PIA_READPB_HANDLER(READ8(zwackery_state, pia1_portb_r))
- MCFG_PIA_CA2_HANDLER(WRITELINE(zwackery_state, pia1_ca2_w))
+ MCFG_PIA_CA2_HANDLER(DEVWRITELINE("csd", midway_cheap_squeak_deluxe_device, sirq_w))
MCFG_DEVICE_ADD("pia2", PIA6821, 0)
MCFG_PIA_READPA_HANDLER(READ8(zwackery_state, pia2_porta_r))
@@ -539,7 +530,7 @@ static MACHINE_CONFIG_START( zwackery, zwackery_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("speaker")
- MCFG_SOUND_ADD("csd", MIDWAY_CHIP_SQUEAK_DELUXE, 0)
+ MCFG_SOUND_ADD("csd", MIDWAY_CHEAP_SQUEAK_DELUXE, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0)
MACHINE_CONFIG_END
@@ -549,47 +540,47 @@ MACHINE_CONFIG_END
//**************************************************************************
ROM_START( zwackery )
- ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "pro0.bin", 0x00000, 0x4000, CRC(6fb9731c) SHA1(ee5b297ef2b4cf20df5e776f1c585b51f174bfa7) )
- ROM_LOAD16_BYTE( "pro1.bin", 0x00001, 0x4000, CRC(84b92555) SHA1(9b4af81374828c1742c1e13fc425eea2973b0867) )
- ROM_LOAD16_BYTE( "pro2.bin", 0x08000, 0x4000, CRC(e6977a2a) SHA1(602bf3f7e0f4080cb5b72d8fd3ee9fd11f27c558) )
- ROM_LOAD16_BYTE( "pro3.bin", 0x08001, 0x4000, CRC(f5d0a60e) SHA1(7e0e4936cb37ac16d6db5533ae4aecdfb07ead93) )
- ROM_LOAD16_BYTE( "pro4.bin", 0x10000, 0x4000, CRC(ec5841d9) SHA1(4bafe614e8993994b0ea9aedc8dc2474361e4594) )
- ROM_LOAD16_BYTE( "pro5.bin", 0x10001, 0x4000, CRC(d7d99ce0) SHA1(fdf428ab9c96dae555d49bac47495613ba265452) )
- ROM_LOAD16_BYTE( "pro6.bin", 0x18000, 0x4000, CRC(b9fe7bf5) SHA1(a94f80f49b4520a2c1098eee8983560b4ecdf3d5) )
- ROM_LOAD16_BYTE( "pro7.bin", 0x18001, 0x4000, CRC(5e261b3b) SHA1(dcf99f528c9e3b4f8b52d413c088559bfb37d733) )
- ROM_LOAD16_BYTE( "pro8.bin", 0x20000, 0x4000, CRC(55e380a5) SHA1(e3fef8486858cd714086449327a93b4a70ae73ff) )
- ROM_LOAD16_BYTE( "pro9.bin", 0x20001, 0x4000, CRC(12249dca) SHA1(154170286047ea78645d45dfdd895a597dad17da) )
- ROM_LOAD16_BYTE( "pro10.bin", 0x28000, 0x4000, CRC(6a39a8ca) SHA1(8ac9c3e60dc6f1918bfb95acf3ee170cedfb20ea) )
- ROM_LOAD16_BYTE( "pro11.bin", 0x28001, 0x4000, CRC(ad6b45bc) SHA1(118496e898654b028f008a3d493e693ba000ef38) )
- ROM_LOAD16_BYTE( "pro12.bin", 0x30000, 0x4000, CRC(e2d25e1f) SHA1(5d8ff303441eccf431422b453a173983a4513630) )
- ROM_LOAD16_BYTE( "pro13.bin", 0x30001, 0x4000, CRC(e131f9b8) SHA1(08b131f2acc84d4c2c931bfd24e7de3d92a8a817) )
-
- ROM_REGION( 0x20000, "csd:cpu", 0 )
- ROM_LOAD16_BYTE( "csd7.bin", 0x00000, 0x2000, CRC(5501f54b) SHA1(84c0851fb868e81400cfe3ebfd7b91fe98a47bac) )
- ROM_LOAD16_BYTE( "csd17.bin", 0x00001, 0x2000, CRC(2e482580) SHA1(92bd3e64ff580800ee16579d97bcb8b3bd9f755c) )
- ROM_LOAD16_BYTE( "csd8.bin", 0x04000, 0x2000, CRC(13366575) SHA1(bcf25a7d4c6b2ccd7cd9978edafc66ef0cadfe72) )
- ROM_LOAD16_BYTE( "csd18.bin", 0x04001, 0x2000, CRC(bcfe5820) SHA1(ca32daa645851a2373b3cdb8a5e63ebda84aa762) )
-
- ROM_REGION( 0x8000, "gfx1", ROMREGION_INVERT )
- ROM_LOAD( "tileh.bin", 0x00000, 0x4000, CRC(a7237eb1) SHA1(197e5838ac2bc732ae9eb33a9257b9391d50abf8) )
- ROM_LOAD( "tileg.bin", 0x04000, 0x4000, CRC(626cc69b) SHA1(86142bafa78f45d1a0bed0b83f3558b21384fa1a) )
-
- ROM_REGION( 0x20000, "sprites", 0 )
- ROM_LOAD( "spr6h.bin", 0x00000, 0x4000, CRC(a51158dc) SHA1(8d3b0054950443fdf57f83dcb973d05f6c7ad9c8) )
- ROM_LOAD( "spr7h.bin", 0x04000, 0x4000, CRC(941feecf) SHA1(8e88c956332e78dc7e55139879f2272116415714) )
- ROM_LOAD( "spr6j.bin", 0x08000, 0x4000, CRC(f3eef316) SHA1(026e18bdfdda8cc9d0774e6d9d758686bf16992c) )
- ROM_LOAD( "spr7j.bin", 0x0c000, 0x4000, CRC(a8a34033) SHA1(abd9fde84bb079c84126ad04d584ec03b44b60cd) )
- ROM_LOAD( "spr10h.bin", 0x10000, 0x4000, CRC(a99daea6) SHA1(c323e05f398b7e9e04b75fd8ac5e8ab675236d66) )
- ROM_LOAD( "spr11h.bin", 0x14000, 0x4000, CRC(c1a767fb) SHA1(c16e09b39b09d409b534ce4c53366e43237a3759) )
- ROM_LOAD( "spr10j.bin", 0x18000, 0x4000, CRC(4dd04376) SHA1(069b64397e7a961c1fc246671472f759bd9f6c03) )
- ROM_LOAD( "spr11j.bin", 0x1c000, 0x4000, CRC(e8c6a880) SHA1(dd3d52ddbc36e244b96cfb87e6a80adb94626407) )
+ ROM_REGION(0x40000, "maincpu", 0)
+ ROM_LOAD16_BYTE("385a-42aae-jxrd.a6", 0x00000, 0x4000, CRC(6fb9731c) SHA1(ee5b297ef2b4cf20df5e776f1c585b51f174bfa7))
+ ROM_LOAD16_BYTE("385a-42aae-kxrd.b6", 0x00001, 0x4000, CRC(84b92555) SHA1(9b4af81374828c1742c1e13fc425eea2973b0867))
+ ROM_LOAD16_BYTE("385a-42aae-lxrd.a7", 0x08000, 0x4000, CRC(e6977a2a) SHA1(602bf3f7e0f4080cb5b72d8fd3ee9fd11f27c558))
+ ROM_LOAD16_BYTE("385a-42aae-mxrd.b7", 0x08001, 0x4000, CRC(f5d0a60e) SHA1(7e0e4936cb37ac16d6db5533ae4aecdfb07ead93))
+ ROM_LOAD16_BYTE("385a-42aae-nxrd.a8", 0x10000, 0x4000, CRC(ec5841d9) SHA1(4bafe614e8993994b0ea9aedc8dc2474361e4594))
+ ROM_LOAD16_BYTE("385a-42aae-pxrd.b8", 0x10001, 0x4000, CRC(d7d99ce0) SHA1(fdf428ab9c96dae555d49bac47495613ba265452))
+ ROM_LOAD16_BYTE("385a-42aae-rxrd.a9", 0x18000, 0x4000, CRC(b9fe7bf5) SHA1(a94f80f49b4520a2c1098eee8983560b4ecdf3d5))
+ ROM_LOAD16_BYTE("385a-42aae-txrd.b9", 0x18001, 0x4000, CRC(5e261b3b) SHA1(dcf99f528c9e3b4f8b52d413c088559bfb37d733))
+ ROM_LOAD16_BYTE("385a-42aae-uxrd.a10", 0x20000, 0x4000, CRC(55e380a5) SHA1(e3fef8486858cd714086449327a93b4a70ae73ff))
+ ROM_LOAD16_BYTE("385a-42aae-vxrd.b10", 0x20001, 0x4000, CRC(12249dca) SHA1(154170286047ea78645d45dfdd895a597dad17da))
+ ROM_LOAD16_BYTE("385a-42aae-wxrd.a11", 0x28000, 0x4000, CRC(6a39a8ca) SHA1(8ac9c3e60dc6f1918bfb95acf3ee170cedfb20ea))
+ ROM_LOAD16_BYTE("385a-42aae-yxrd.b11", 0x28001, 0x4000, CRC(ad6b45bc) SHA1(118496e898654b028f008a3d493e693ba000ef38))
+ ROM_LOAD16_BYTE("385a-42aae-zxrd.a12", 0x30000, 0x4000, CRC(e2d25e1f) SHA1(5d8ff303441eccf431422b453a173983a4513630))
+ ROM_LOAD16_BYTE("385a-42aae-1xrd.b12", 0x30001, 0x4000, CRC(e131f9b8) SHA1(08b131f2acc84d4c2c931bfd24e7de3d92a8a817))
+
+ ROM_REGION(0x8000, "csd:cpu", 0)
+ ROM_LOAD16_BYTE("385a-22aae-aamd.u7", 0x0000, 0x2000, CRC(5501f54b) SHA1(84c0851fb868e81400cfe3ebfd7b91fe98a47bac))
+ ROM_LOAD16_BYTE("385a-22aae-bamd.u17", 0x0001, 0x2000, CRC(2e482580) SHA1(92bd3e64ff580800ee16579d97bcb8b3bd9f755c))
+ ROM_LOAD16_BYTE("385a-22aae-camd.u8", 0x4000, 0x2000, CRC(13366575) SHA1(bcf25a7d4c6b2ccd7cd9978edafc66ef0cadfe72))
+ ROM_LOAD16_BYTE("385a-22aae-damd.u18", 0x4001, 0x2000, CRC(bcfe5820) SHA1(ca32daa645851a2373b3cdb8a5e63ebda84aa762))
+
+ ROM_REGION(0x8000, "gfx1", ROMREGION_INVERT)
+ ROM_LOAD("385a-42aae-2xrd.1h", 0x0000, 0x4000, CRC(a7237eb1) SHA1(197e5838ac2bc732ae9eb33a9257b9391d50abf8))
+ ROM_LOAD("385a-42aae-3xrd.1g", 0x4000, 0x4000, CRC(626cc69b) SHA1(86142bafa78f45d1a0bed0b83f3558b21384fa1a))
+
+ ROM_REGION(0x20000, "sprites", 0)
+ ROM_LOAD("385a-42aae-axrd.6h", 0x00000, 0x4000, CRC(a51158dc) SHA1(8d3b0054950443fdf57f83dcb973d05f6c7ad9c8))
+ ROM_LOAD("385a-42aae-exrd.7h", 0x04000, 0x4000, CRC(941feecf) SHA1(8e88c956332e78dc7e55139879f2272116415714))
+ ROM_LOAD("385a-42aae-bxrd.6j", 0x08000, 0x4000, CRC(f3eef316) SHA1(026e18bdfdda8cc9d0774e6d9d758686bf16992c))
+ ROM_LOAD("385a-42aae-fxrd.7j", 0x0c000, 0x4000, CRC(a8a34033) SHA1(abd9fde84bb079c84126ad04d584ec03b44b60cd))
+ ROM_LOAD("385a-42aae-cxrd.10h", 0x10000, 0x4000, CRC(a99daea6) SHA1(c323e05f398b7e9e04b75fd8ac5e8ab675236d66))
+ ROM_LOAD("385a-42aae-gxrd.11h", 0x14000, 0x4000, CRC(c1a767fb) SHA1(c16e09b39b09d409b534ce4c53366e43237a3759))
+ ROM_LOAD("385a-42aae-dxrd.10j", 0x18000, 0x4000, CRC(4dd04376) SHA1(069b64397e7a961c1fc246671472f759bd9f6c03))
+ ROM_LOAD("385a-42aae-hxrd.11j", 0x1c000, 0x4000, CRC(e8c6a880) SHA1(dd3d52ddbc36e244b96cfb87e6a80adb94626407))
ROM_REGION( 0x8000, "bg_color", 0 )
- ROM_LOAD16_BYTE( "tilef.bin", 0x0000, 0x4000, CRC(a0dfcd7e) SHA1(0fc6723eddef2a96de9bf1f48006dd067c148540) )
- ROM_LOAD16_BYTE( "tilee.bin", 0x0001, 0x4000, CRC(ab504dc8) SHA1(4ebdcd42624e94c29ccdb8247bfff2d8e936ddd7) )
+ ROM_LOAD16_BYTE("385a-42aae-5xrd.1f", 0x0000, 0x4000, CRC(a0dfcd7e) SHA1(0fc6723eddef2a96de9bf1f48006dd067c148540))
+ ROM_LOAD16_BYTE("385a-42aae-4xrd.1e", 0x0001, 0x4000, CRC(ab504dc8) SHA1(4ebdcd42624e94c29ccdb8247bfff2d8e936ddd7))
- ROM_REGION( 0x000D, "plds", 0 )
+ ROM_REGION( 0x000c, "plds", 0 )
// located on the "Venus CPU" board
ROM_LOAD( "pal.d5", 0x0000, 0x00001, NO_DUMP ) // H-T
ROM_LOAD( "pal.d2", 0x0001, 0x00001, NO_DUMP ) // V-T
@@ -605,8 +596,6 @@ ROM_START( zwackery )
ROM_LOAD( "pal.1c", 0x0009, 0x00001, NO_DUMP ) // BGBPE PAL
ROM_LOAD( "pal.5c", 0x000a, 0x00001, NO_DUMP ) // HCT PAL
ROM_LOAD( "pal.5j", 0x000b, 0x00001, NO_DUMP ) // BGBDCD PAL
- // located on the "Artificial Artist" board
- ROM_LOAD( "pal20.u15", 0x000c, 0x00001, NO_DUMP ) // CSD002R0, pal type not specified */
ROM_END
diff --git a/src/mame/includes/archimds.h b/src/mame/includes/archimds.h
index bea394da1f8..168d1b7330c 100644
--- a/src/mame/includes/archimds.h
+++ b/src/mame/includes/archimds.h
@@ -91,6 +91,7 @@ public:
uint8_t m_ioc_regs[0x80/4];
uint8_t m_vidc_bpp_mode;
uint8_t m_vidc_interlace;
+ uint16_t m_vidc_vblank_time;
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@@ -130,7 +131,7 @@ private:
int m_memc_latchrom;
uint32_t m_ioc_timercnt[4], m_ioc_timerout[4];
uint32_t m_vidc_vidstart, m_vidc_vidend, m_vidc_vidinit, m_vidc_vidcur,m_vidc_cinit;
- uint32_t m_vidc_sndstart, m_vidc_sndend, m_vidc_sndcur;
+ uint32_t m_vidc_sndstart, m_vidc_sndend, m_vidc_sndcur, m_vidc_sndendcur;
uint8_t m_video_dma_on,m_audio_dma_on;
uint8_t m_vidc_pixel_clk;
uint8_t m_vidc_stereo_reg[8];
diff --git a/src/mame/includes/armedf.h b/src/mame/includes/armedf.h
index 1f7ff9149ec..3f0d64a6089 100644
--- a/src/mame/includes/armedf.h
+++ b/src/mame/includes/armedf.h
@@ -110,19 +110,15 @@ class bigfghtr_state : public armedf_state
public:
bigfghtr_state(const machine_config &mconfig, device_type type, const char *tag)
: armedf_state(mconfig, type, tag),
- m_sharedram(*this, "sharedram") { }
-
- required_shared_ptr<uint16_t> m_sharedram;
+ m_mcu(*this, "mcu"),
+ m_sharedram(*this, "sharedram")
+ { }
- /* misc */
- int m_read_latch;
- uint8_t m_mcu_input_snippet;
- uint8_t m_mcu_jsr_snippet;
+ required_device<cpu_device> m_mcu;
+ required_shared_ptr<uint8_t> m_sharedram;
DECLARE_READ16_MEMBER(latch_r);
- DECLARE_WRITE16_MEMBER(sharedram_w);
- DECLARE_READ16_MEMBER(sharedram_r);
- DECLARE_DRIVER_INIT(bigfghtr);
- DECLARE_MACHINE_START(bigfghtr);
- DECLARE_MACHINE_RESET(bigfghtr);
+ DECLARE_WRITE8_MEMBER(main_sharedram_w);
+ DECLARE_READ8_MEMBER(main_sharedram_r);
+ DECLARE_WRITE8_MEMBER(mcu_spritelist_w);
};
diff --git a/src/mame/includes/astrocde.h b/src/mame/includes/astrocde.h
index 25b4861b32a..74cfd060422 100644
--- a/src/mame/includes/astrocde.h
+++ b/src/mame/includes/astrocde.h
@@ -19,8 +19,6 @@
#define AC_STARS (0x04)
#define AC_MONITOR_BW (0x08)
-#define USE_FAKE_VOTRAX (1)
-
class astrocde_state : public driver_device
{
@@ -195,13 +193,8 @@ public:
void init_sparklestar();
virtual void machine_start() override;
- /*----------- defined in audio/wow.c -----------*/
- DECLARE_READ8_MEMBER( wow_speech_r );
- CUSTOM_INPUT_MEMBER( wow_speech_status_r );
-
- /*----------- defined in audio/gorf.c -----------*/
- DECLARE_READ8_MEMBER( gorf_speech_r );
- CUSTOM_INPUT_MEMBER( gorf_speech_status_r );
+ DECLARE_READ8_MEMBER( votrax_speech_r );
+ CUSTOM_INPUT_MEMBER( votrax_speech_status_r );
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
diff --git a/src/mame/includes/bublbobl.h b/src/mame/includes/bublbobl.h
index c380a5c1439..26168aca158 100644
--- a/src/mame/includes/bublbobl.h
+++ b/src/mame/includes/bublbobl.h
@@ -17,13 +17,21 @@ public:
m_videoram(*this, "videoram"),
m_objectram(*this, "objectram"),
m_mcu_sharedram(*this, "mcu_sharedram"),
+ m_mcu_sent(false),
+ m_main_sent(false),
+ m_from_main(0),
+ m_from_mcu(0),
+ m_from_mcu_latch(0),
+ m_to_mcu_latch(0),
+ m_old_portB(0),
m_maincpu(*this, "maincpu"),
m_mcu(*this, "mcu"),
m_audiocpu(*this, "audiocpu"),
m_slave(*this, "slave"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
- m_soundlatch(*this, "soundlatch") { }
+ m_soundlatch(*this, "soundlatch")
+ { }
/* memory pointers */
required_shared_ptr<uint8_t> m_videoram;
@@ -39,8 +47,7 @@ public:
int m_sound_status;
/* mcu-related */
- /* Tokio*/
- int m_tokio_prot_count;
+
/* Bubble Bobble MCU */
uint8_t m_ddr1;
uint8_t m_ddr2;
@@ -66,6 +73,14 @@ public:
/* Bobble Bobble */
int m_ic43_a;
int m_ic43_b;
+ /* Tokio */
+ bool m_mcu_sent;
+ bool m_main_sent;
+ uint8_t m_from_main;
+ uint8_t m_from_mcu;
+ uint8_t m_from_mcu_latch;
+ uint8_t m_to_mcu_latch;
+ uint8_t m_old_portB;
/* devices */
required_device<cpu_device> m_maincpu;
@@ -81,6 +96,8 @@ public:
DECLARE_WRITE8_MEMBER(tokio_videoctrl_w);
DECLARE_WRITE8_MEMBER(bublbobl_nmitrigger_w);
DECLARE_READ8_MEMBER(tokio_mcu_r);
+ DECLARE_WRITE8_MEMBER(tokio_mcu_w);
+
DECLARE_READ8_MEMBER(tokiob_mcu_r);
DECLARE_WRITE8_MEMBER(bublbobl_sound_command_w);
DECLARE_WRITE8_MEMBER(bublbobl_sh_nmi_disable_w);
@@ -114,6 +131,20 @@ public:
DECLARE_READ8_MEMBER(bublbobl_68705_port_b_r);
DECLARE_WRITE8_MEMBER(bublbobl_68705_port_b_w);
DECLARE_WRITE8_MEMBER(bublbobl_68705_ddr_b_w);
+
+
+
+
+ DECLARE_CUSTOM_INPUT_MEMBER(tokio_mcu_sent_r);
+ DECLARE_CUSTOM_INPUT_MEMBER(tokio_main_sent_r);
+
+
+ DECLARE_READ8_MEMBER(tokio_mcu_porta_r);
+ DECLARE_READ8_MEMBER(tokio_mcu_portc_r);
+ DECLARE_WRITE8_MEMBER(tokio_mcu_porta_w);
+ DECLARE_WRITE8_MEMBER(tokio_mcu_portb_w);
+
+
DECLARE_DRIVER_INIT(tokiob);
DECLARE_DRIVER_INIT(tokio);
DECLARE_DRIVER_INIT(dland);
diff --git a/src/mame/includes/carpolo.h b/src/mame/includes/carpolo.h
index bec5661a453..6935e9a62d8 100644
--- a/src/mame/includes/carpolo.h
+++ b/src/mame/includes/carpolo.h
@@ -50,9 +50,11 @@ public:
uint8_t m_car_border_collision_cause;
uint8_t m_priority_0_extension;
uint8_t m_last_wheel_value[4];
+ int m_ls153_za;
+ int m_ls153_zb;
required_device<cpu_device> m_maincpu;
required_device<ttl74148_device> m_ttl74148_3s;
- required_device<ttl74153_device> m_ttl74153_1k;
+ required_device<ttl153_device> m_ttl74153_1k;
required_device<ttl7474_device> m_ttl7474_2s_1;
required_device<ttl7474_device> m_ttl7474_2s_2;
required_device<ttl7474_device> m_ttl7474_2u_1;
@@ -108,6 +110,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(carpolo_7474_2s_2_q_cb);
DECLARE_WRITE_LINE_MEMBER(carpolo_7474_2u_1_q_cb);
DECLARE_WRITE_LINE_MEMBER(carpolo_7474_2u_2_q_cb);
+ DECLARE_WRITE_LINE_MEMBER(ls153_za_w);
+ DECLARE_WRITE_LINE_MEMBER(ls153_zb_w);
TTL74148_OUTPUT_CB(ttl74148_3s_cb);
diff --git a/src/mame/includes/combatsc.h b/src/mame/includes/combatsc.h
index 9aef51765a0..d762be420e2 100644
--- a/src/mame/includes/combatsc.h
+++ b/src/mame/includes/combatsc.h
@@ -46,6 +46,7 @@ public:
int m_vreg;
int m_bank_select; /* 0x00..0x1f */
int m_video_circuit; /* 0 or 1 */
+ bool m_textflip;
uint8_t *m_page[2];
/* misc */
diff --git a/src/mame/includes/deco32.h b/src/mame/includes/deco32.h
index 0063c4d97ef..0bf7a485dcd 100644
--- a/src/mame/includes/deco32.h
+++ b/src/mame/includes/deco32.h
@@ -7,6 +7,7 @@
#include "machine/eepromser.h"
#include "machine/gen_latch.h"
#include "sound/okim6295.h"
+#include "sound/ym2151.h"
#include "machine/deco146.h"
#include "machine/deco104.h"
#include "video/deco_zoomspr.h"
@@ -27,6 +28,7 @@ public:
m_sprgen2(*this, "spritegen2"),
m_sprgenzoom(*this, "spritegen_zoom"),
m_eeprom(*this, "eeprom"),
+ m_ym2151(*this, "ymsnd"),
m_oki1(*this, "oki1"),
m_oki2(*this, "oki2"),
m_deco_tilegen1(*this, "tilegen1"),
@@ -55,6 +57,7 @@ public:
optional_device<decospr_device> m_sprgen2;
optional_device<deco_zoomspr_device> m_sprgenzoom;
optional_device<eeprom_serial_93cxx_device> m_eeprom;
+ optional_device<ym2151_device> m_ym2151;
optional_device<okim6295_device> m_oki1;
optional_device<okim6295_device> m_oki2;
required_device<deco16ic_device> m_deco_tilegen1;
@@ -182,7 +185,8 @@ public:
void nslasher_sound_cb( address_space &space, uint16_t data, uint16_t mem_mask );
uint16_t port_b_tattass(int unused);
void tattass_sound_cb( address_space &space, uint16_t data, uint16_t mem_mask );
-
+ void deco32_set_audio_output(uint8_t raw_data);
+
DECO16IC_BANK_CB_MEMBER(fghthist_bank_callback);
DECO16IC_BANK_CB_MEMBER(captaven_bank_callback);
DECO16IC_BANK_CB_MEMBER(tattass_bank_callback);
diff --git a/src/mame/includes/epos.h b/src/mame/includes/epos.h
index 64b18788b0e..2f8858dada4 100644
--- a/src/mame/includes/epos.h
+++ b/src/mame/includes/epos.h
@@ -12,18 +12,22 @@ public:
epos_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_videoram(*this, "videoram"),
+ m_inputs(*this, { "INPUTS", "INPUTS2" }),
m_maincpu(*this, "maincpu") { }
/* memory pointers */
required_shared_ptr<uint8_t> m_videoram;
+ optional_ioport_array<2> m_inputs;
/* video-related */
uint8_t m_palette;
/* misc */
int m_counter;
+ int m_input_multiplex;
DECLARE_WRITE8_MEMBER(dealer_decrypt_rom);
DECLARE_WRITE8_MEMBER(port_1_w);
+ DECLARE_READ8_MEMBER(read_prta);
DECLARE_WRITE8_MEMBER(write_prtc);
DECLARE_WRITE8_MEMBER(flip_screen_w);
DECLARE_DRIVER_INIT(dealer);
diff --git a/src/mame/includes/fromance.h b/src/mame/includes/fromance.h
index 5e80e4d4c75..4f1256bbce3 100644
--- a/src/mame/includes/fromance.h
+++ b/src/mame/includes/fromance.h
@@ -50,7 +50,7 @@ public:
uint8_t m_crtc_register;
uint8_t m_crtc_data[0x10];
emu_timer *m_crtc_timer;
-
+
/* misc */
uint8_t m_directionflag;
uint8_t m_commanddata;
diff --git a/src/mame/includes/hanaawas.h b/src/mame/includes/hanaawas.h
index 2aa55582ee5..e57ea6caede 100644
--- a/src/mame/includes/hanaawas.h
+++ b/src/mame/includes/hanaawas.h
@@ -25,10 +25,13 @@ public:
/* misc */
int m_mux;
+ uint8_t m_coin_settings;
+ uint8_t m_coin_impulse;
DECLARE_READ8_MEMBER(hanaawas_input_port_0_r);
DECLARE_WRITE8_MEMBER(hanaawas_inputs_mux_w);
DECLARE_WRITE8_MEMBER(hanaawas_videoram_w);
DECLARE_WRITE8_MEMBER(hanaawas_colorram_w);
+ DECLARE_WRITE8_MEMBER(key_matrix_status_w);
DECLARE_WRITE8_MEMBER(irq_ack_w);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
virtual void machine_start() override;
diff --git a/src/mame/includes/kaneko16.h b/src/mame/includes/kaneko16.h
index d0214282879..5cc0efa34fa 100644
--- a/src/mame/includes/kaneko16.h
+++ b/src/mame/includes/kaneko16.h
@@ -164,10 +164,15 @@ public:
DECLARE_WRITE16_MEMBER(berlwall_spriteregs_w);
DECLARE_DRIVER_INIT(berlwall);
+ DECLARE_DRIVER_INIT(berlwallk);
+ DECLARE_DRIVER_INIT(berlwallt);
+ DECLARE_DRIVER_INIT(berlwall_common);
DECLARE_PALETTE_INIT(berlwall);
DECLARE_VIDEO_START(berlwall);
uint32_t screen_update_berlwall(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void kaneko16_render_15bpp_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
+
+ void patch_protection(uint32_t bra_offset,uint16_t bra_value,uint16_t checksum);
};
class kaneko16_shogwarr_state : public kaneko16_state
diff --git a/src/mame/includes/mario.h b/src/mame/includes/mario.h
index 2c9563e335e..40161d4f187 100644
--- a/src/mame/includes/mario.h
+++ b/src/mame/includes/mario.h
@@ -83,7 +83,7 @@ public:
#else
optional_device<netlist_mame_logic_input_t> m_audio_snd0;
optional_device<netlist_mame_logic_input_t> m_audio_snd7;
- optional_device<netlist_mame_logic_input_t> m_audio_dac;
+ optional_device<netlist_mame_int_input_t> m_audio_dac;
#endif
/* memory pointers */
diff --git a/src/mame/includes/mcr.h b/src/mame/includes/mcr.h
index 7ceb376c492..37498e92ef4 100644
--- a/src/mame/includes/mcr.h
+++ b/src/mame/includes/mcr.h
@@ -13,6 +13,7 @@
#include "machine/z80dart.h"
#include "machine/watchdog.h"
#include "audio/midway.h"
+#include "audio/csd.h"
#include "sound/samples.h"
/* constants */
@@ -32,7 +33,7 @@ public:
m_paletteram(*this, "paletteram"),
m_sio(*this, "ipu_sio"),
m_ssio(*this, "ssio"),
- m_chip_squeak_deluxe(*this, "csd"),
+ m_cheap_squeak_deluxe(*this, "csd"),
m_sounds_good(*this, "sg"),
m_turbo_chip_squeak(*this, "tcs"),
m_squawk_n_talk(*this, "snt"),
@@ -52,7 +53,7 @@ public:
optional_device<z80dart_device> m_sio;
optional_device<midway_ssio_device> m_ssio;
- optional_device<midway_chip_squeak_deluxe_device> m_chip_squeak_deluxe;
+ optional_device<midway_cheap_squeak_deluxe_device> m_cheap_squeak_deluxe;
optional_device<midway_sounds_good_device> m_sounds_good;
optional_device<midway_turbo_chip_squeak_device> m_turbo_chip_squeak;
optional_device<midway_squawk_n_talk_device> m_squawk_n_talk;
diff --git a/src/mame/includes/midwunit.h b/src/mame/includes/midwunit.h
index 805f0fc0ddb..618ef624f2c 100644
--- a/src/mame/includes/midwunit.h
+++ b/src/mame/includes/midwunit.h
@@ -13,13 +13,15 @@ class midwunit_state : public midtunit_state
public:
midwunit_state(const machine_config &mconfig, device_type type, const char *tag)
: midtunit_state(mconfig, type, tag),
- m_midway_serial_pic(*this, "serial_pic"),
+ m_midway_serial_pic(*this, "serial_security_sim"),
+ m_midway_serial_pic_emu(*this, "serial_security"),
m_nvram(*this, "nvram"),
m_mainram(*this, "mainram"),
m_ports(*this, { { "IN0", "IN1", "DSW", "IN2" } })
{ }
- required_device<midway_serial_pic_device> m_midway_serial_pic;
+ optional_device<midway_serial_pic_device> m_midway_serial_pic;
+ optional_device<midway_serial_pic_emu_device> m_midway_serial_pic_emu;
required_shared_ptr<uint16_t> m_nvram;
required_shared_ptr<uint16_t> m_mainram;
required_ioport_array<4> m_ports;
diff --git a/src/mame/includes/mzr8105.h b/src/mame/includes/mzr8105.h
new file mode 100644
index 00000000000..6b597ff4e25
--- /dev/null
+++ b/src/mame/includes/mzr8105.h
@@ -0,0 +1,30 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/********************************************************************************
+ *
+ * mame/includes/mzr8105
+ *
+ ********************************************************************************/
+
+#ifndef MZR8105_H
+#define MZR8105_H
+#pragma once
+
+#include "bus/vme/vme.h"
+
+class mzr8105_state : public driver_device
+{
+public:
+mzr8105_state(const machine_config &mconfig, device_type type, const char *tag) :
+ driver_device (mconfig, type, tag)
+ ,m_maincpu (*this, "maincpu")
+ {
+ }
+
+ virtual void machine_start() override;
+private:
+ required_device<cpu_device> m_maincpu;
+};
+
+
+#endif // MZR8105_H
diff --git a/src/mame/includes/mzr8300.h b/src/mame/includes/mzr8300.h
new file mode 100644
index 00000000000..1ae01af38c2
--- /dev/null
+++ b/src/mame/includes/mzr8300.h
@@ -0,0 +1,35 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/********************************************************************************
+ *
+ * mame/includes/mzr8105
+ *
+ ********************************************************************************/
+
+#ifndef MZR8300_H
+#define MZR8300_H
+#pragma once
+
+#include "emu.h"
+#include "bus/vme/vme.h"
+#include "machine/z80sio.h"
+
+class vme_p1_mzr8300_device : public device_t, public device_vme_p1_card_interface
+{
+public:
+ // construction/destruction
+ vme_p1_mzr8300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ vme_p1_mzr8300_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const override;
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+private:
+ required_device<upd7201N_device> m_sio0;
+};
+
+#endif // MZR8300_H
diff --git a/src/mame/includes/namcos21.h b/src/mame/includes/namcos21.h
index 0076926c123..e4e9e4c6adb 100644
--- a/src/mame/includes/namcos21.h
+++ b/src/mame/includes/namcos21.h
@@ -5,6 +5,7 @@
*/
#include "namcos2.h"
+#include "machine/namcoio_gearbox.h"
#define NAMCOS21_POLY_FRAME_WIDTH 496
#define NAMCOS21_POLY_FRAME_HEIGHT 480
@@ -52,7 +53,9 @@ public:
m_master_dsp_code(*this,"master_dsp_code"),
m_ptrom24(*this,"point24"),
m_ptrom16(*this,"point16"),
- m_dsp(*this, "dsp") { }
+ m_dsp(*this, "dsp"),
+ m_io_gearbox(*this, "gearbox")
+ { }
optional_shared_ptr<uint16_t> m_winrun_dspbios;
optional_shared_ptr<uint16_t> m_winrun_polydata;
@@ -64,7 +67,8 @@ public:
optional_region_ptr<uint16_t> m_ptrom16;
optional_device<cpu_device> m_dsp;
-
+ optional_device<namcoio_gearbox_device> m_io_gearbox;
+
std::unique_ptr<uint8_t[]> m_videoram;
std::unique_ptr<uint16_t[]> m_winrun_dspcomram;
uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM];
@@ -156,6 +160,8 @@ public:
DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w);
DECLARE_READ16_MEMBER(winrun_gpu_videoram_r);
+ uint8_t m_gearbox_state;
+ DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r);
DECLARE_DRIVER_INIT(driveyes);
DECLARE_DRIVER_INIT(winrun);
DECLARE_DRIVER_INIT(starblad);
@@ -165,6 +171,8 @@ public:
DECLARE_MACHINE_START(namcos21);
DECLARE_VIDEO_START(namcos21);
uint32_t screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void allocate_poly_framebuffer();
void clear_poly_framebuffer();
void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi);
@@ -179,5 +187,6 @@ public:
int init_dsp();
void render_slave_output(uint16_t data);
void winrun_flush_poly();
+ void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect);
void init(int game_type);
};
diff --git a/src/mame/includes/pacman.h b/src/mame/includes/pacman.h
index e9e15c4b938..cbfe2da6948 100644
--- a/src/mame/includes/pacman.h
+++ b/src/mame/includes/pacman.h
@@ -155,14 +155,14 @@ public:
void eyes_decode(uint8_t *data);
void mspacman_install_patches(uint8_t *ROM);
- // theglopb.c
- void theglobp_decrypt_rom_8();
- void theglobp_decrypt_rom_9();
- void theglobp_decrypt_rom_A();
- void theglobp_decrypt_rom_B();
- DECLARE_READ8_MEMBER(theglobp_decrypt_rom);
+ // epos.c
+ DECLARE_READ8_MEMBER(epos_decryption_w);
DECLARE_MACHINE_START(theglobp);
DECLARE_MACHINE_RESET(theglobp);
+ DECLARE_MACHINE_START(eeekk);
+ DECLARE_MACHINE_RESET(eeekk);
+ DECLARE_MACHINE_START(acitya);
+ DECLARE_MACHINE_RESET(acitya);
// pacplus.c
uint8_t pacplus_decrypt(int addr, uint8_t e);
@@ -171,13 +171,4 @@ public:
// jumpshot.c
uint8_t jumpshot_decrypt(int addr, uint8_t e);
void jumpshot_decode();
-
- // acitya.c
- void acitya_decrypt_rom_8();
- void acitya_decrypt_rom_9();
- void acitya_decrypt_rom_A();
- void acitya_decrypt_rom_B();
- DECLARE_READ8_MEMBER(acitya_decrypt_rom);
- DECLARE_MACHINE_START(acitya);
- DECLARE_MACHINE_RESET(acitya);
};
diff --git a/src/mame/includes/playmark.h b/src/mame/includes/playmark.h
index 09f3842a499..1a86acdf68c 100644
--- a/src/mame/includes/playmark.h
+++ b/src/mame/includes/playmark.h
@@ -53,7 +53,7 @@ public:
uint8_t m_oki_control;
uint8_t m_oki_command;
uint8_t m_dispenser_latch;
- int m_oki_numbanks;
+ int m_oki_numbanks;
void configure_oki_banks();
/* devices */
diff --git a/src/mame/includes/slapfght.h b/src/mame/includes/slapfght.h
index 7b2f019ac4b..9b3a66f37cf 100644
--- a/src/mame/includes/slapfght.h
+++ b/src/mame/includes/slapfght.h
@@ -65,15 +65,10 @@ public:
bool m_main_sent;
uint8_t m_from_main;
uint8_t m_from_mcu;
- uint8_t m_portA_in;
- uint8_t m_portA_out;
- uint8_t m_ddrA;
- uint8_t m_portB_in;
- uint8_t m_portB_out;
- uint8_t m_ddrB;
- uint8_t m_portC_in;
- uint8_t m_portC_out;
- uint8_t m_ddrC;
+
+ uint8_t m_from_mcu_latch;
+ uint8_t m_to_mcu_latch;
+ uint8_t m_old_portB;
int m_getstar_status;
int m_getstar_sequence_index;
@@ -102,25 +97,16 @@ public:
DECLARE_WRITE8_MEMBER(tigerh_mcu_w);
DECLARE_READ8_MEMBER(tigerh_mcu_r);
DECLARE_READ8_MEMBER(tigerh_mcu_status_r);
- DECLARE_READ8_MEMBER(tigerh_68705_portA_r);
- DECLARE_WRITE8_MEMBER(tigerh_68705_portA_w);
- DECLARE_WRITE8_MEMBER(tigerh_68705_ddrA_w);
- DECLARE_READ8_MEMBER(tigerh_68705_portB_r);
- DECLARE_WRITE8_MEMBER(tigerh_68705_portB_w);
- DECLARE_WRITE8_MEMBER(tigerh_68705_ddrB_w);
- DECLARE_READ8_MEMBER(tigerh_68705_portC_r);
- DECLARE_WRITE8_MEMBER(tigerh_68705_portC_w);
- DECLARE_WRITE8_MEMBER(tigerh_68705_ddrC_w);
-
- DECLARE_READ8_MEMBER(slapfight_68705_portA_r);
- DECLARE_WRITE8_MEMBER(slapfight_68705_portA_w);
- DECLARE_WRITE8_MEMBER(slapfight_68705_ddrA_w);
- DECLARE_READ8_MEMBER(slapfight_68705_portB_r);
- DECLARE_WRITE8_MEMBER(slapfight_68705_portB_w);
- DECLARE_WRITE8_MEMBER(slapfight_68705_ddrB_w);
- DECLARE_READ8_MEMBER(slapfight_68705_portC_r);
- DECLARE_WRITE8_MEMBER(slapfight_68705_portC_w);
- DECLARE_WRITE8_MEMBER(slapfight_68705_ddrC_w);
+
+ DECLARE_READ8_MEMBER(tigerh_mcu_porta_r);
+ DECLARE_WRITE8_MEMBER(tigerh_mcu_porta_w);
+
+ DECLARE_WRITE8_MEMBER(tigerh_mcu_portb_w);
+ DECLARE_WRITE8_MEMBER(slapfght_mcu_portb_w);
+
+ DECLARE_READ8_MEMBER(tigerh_mcu_portc_r);
+ DECLARE_READ8_MEMBER(slapfght_mcu_portc_r);
+
DECLARE_READ8_MEMBER(getstar_mcusim_r);
DECLARE_WRITE8_MEMBER(getstar_mcusim_w);
diff --git a/src/mame/includes/srmp2.h b/src/mame/includes/srmp2.h
index f05170a6c39..54b4c814890 100644
--- a/src/mame/includes/srmp2.h
+++ b/src/mame/includes/srmp2.h
@@ -53,13 +53,12 @@ public:
DECLARE_WRITE8_MEMBER(srmp2_irq2_ack_w);
DECLARE_WRITE8_MEMBER(srmp2_irq4_ack_w);
DECLARE_WRITE16_MEMBER(srmp2_flags_w);
- DECLARE_WRITE16_MEMBER(srmp2_adpcm_code_w);
+ DECLARE_WRITE8_MEMBER(adpcm_code_w);
// srmp3
DECLARE_WRITE8_MEMBER(srmp3_rombank_w);
DECLARE_WRITE8_MEMBER(srmp3_flags_w);
DECLARE_WRITE8_MEMBER(srmp3_irq_ack_w);
- DECLARE_WRITE8_MEMBER(srmp3_adpcm_code_w);
virtual void machine_start() override;
DECLARE_MACHINE_START(srmp2);
diff --git a/src/mame/includes/system16.h b/src/mame/includes/system16.h
index cd297a863ff..3cc3197e91b 100644
--- a/src/mame/includes/system16.h
+++ b/src/mame/includes/system16.h
@@ -2,6 +2,7 @@
// copyright-holders:Nicola Salmoria, Phil Stroffolino, Mirko Buffoni
#include "video/sega16sp.h"
+#include "machine/74157.h"
#include "machine/gen_latch.h"
#include "machine/segaic16.h"
#include "sound/msm5205.h"
@@ -18,6 +19,7 @@ public:
m_tileram(*this, "tileram"),
m_goldnaxeb2_bgpage(*this, "gab2_bgpage"),
m_goldnaxeb2_fgpage(*this, "gab2_fgpage"),
+ m_soundbank(*this, "soundbank"),
m_sprites(*this, "sprites"),
m_maincpu(*this, "maincpu"),
m_soundcpu(*this, "soundcpu"),
@@ -25,6 +27,7 @@ public:
m_upd7759(*this, "7759"),
m_gfxdecode(*this, "gfxdecode"),
m_soundlatch(*this, "soundlatch"),
+ m_adpcm_select(*this, "adpcm_select"),
m_decrypted_opcodes(*this, "decrypted_opcodes") { }
required_shared_ptr<uint16_t> m_textram;
@@ -34,6 +37,8 @@ public:
optional_shared_ptr<uint16_t> m_goldnaxeb2_bgpage;
optional_shared_ptr<uint16_t> m_goldnaxeb2_fgpage;
+ optional_memory_bank m_soundbank;
+
required_device<sega_16bit_sprite_device> m_sprites;
uint16_t m_coinctrl;
@@ -123,10 +128,13 @@ public:
optional_device<upd7759_device> m_upd7759;
required_device<gfxdecode_device> m_gfxdecode;
optional_device<generic_latch_8_device> m_soundlatch;
+ optional_device<ls157_device> m_adpcm_select;
optional_shared_ptr<uint16_t> m_decrypted_opcodes;
DECLARE_WRITE16_MEMBER(sound_command_nmi_w);
DECLARE_WRITE16_MEMBER(sound_command_irq_w);
+ DECLARE_READ8_MEMBER(sound_command_irq_r);
+ DECLARE_WRITE8_MEMBER(soundbank_msm_w);
DECLARE_WRITE16_MEMBER(sys16_coinctrl_w);
DECLARE_READ16_MEMBER(passht4b_service_r);
DECLARE_READ16_MEMBER(passht4b_io1_r);
@@ -218,6 +226,7 @@ public:
void set_bg_page( int data );
void datsu_set_pages( );
DECLARE_WRITE_LINE_MEMBER(tturfbl_msm5205_callback);
+ DECLARE_WRITE_LINE_MEMBER(datsu_msm5205_callback);
DECLARE_WRITE_LINE_MEMBER(shdancbl_msm5205_callback);
DECLARE_WRITE_LINE_MEMBER(sound_cause_nmi);
};
diff --git a/src/mame/includes/tail2nos.h b/src/mame/includes/tail2nos.h
index e9aa92d5205..3bf2cc0203d 100644
--- a/src/mame/includes/tail2nos.h
+++ b/src/mame/includes/tail2nos.h
@@ -34,6 +34,7 @@ public:
int m_txbank;
int m_txpalette;
int m_video_enable;
+ uint8_t m_pending_command;
/* devices */
required_device<cpu_device> m_maincpu;
@@ -43,11 +44,14 @@ public:
required_device<palette_device> m_palette;
required_device<generic_latch_8_device> m_soundlatch;
- DECLARE_WRITE16_MEMBER(sound_command_w);
+ DECLARE_CUSTOM_INPUT_MEMBER(analog_in_r);
DECLARE_WRITE16_MEMBER(tail2nos_txvideoram_w);
DECLARE_WRITE16_MEMBER(tail2nos_zoomdata_w);
DECLARE_WRITE16_MEMBER(tail2nos_gfxbank_w);
+ DECLARE_WRITE8_MEMBER(sound_command_w);
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
+ DECLARE_WRITE8_MEMBER(sound_semaphore_w);
+ DECLARE_READ8_MEMBER(sound_semaphore_r);
TILE_GET_INFO_MEMBER(get_tile_info);
virtual void machine_start() override;
virtual void machine_reset() override;
diff --git a/src/mame/includes/tnzs.h b/src/mame/includes/tnzs.h
index 7a418ce226f..673ae0d6951 100644
--- a/src/mame/includes/tnzs.h
+++ b/src/mame/includes/tnzs.h
@@ -88,7 +88,7 @@ protected:
required_ioport m_in2;
int m_input_select;
- bool m_lockout_level;
+ bool m_lockout_level;
};
class tnzs_state : public tnzs_mcu_state
@@ -246,4 +246,4 @@ protected:
required_memory_bank m_audiobank;
};
-#endif // MAME_INCLUDES_TNZS_H \ No newline at end of file
+#endif // MAME_INCLUDES_TNZS_H
diff --git a/src/mame/includes/toaplan1.h b/src/mame/includes/toaplan1.h
index ff437df03dc..26020a949d1 100644
--- a/src/mame/includes/toaplan1.h
+++ b/src/mame/includes/toaplan1.h
@@ -39,10 +39,6 @@ public:
uint32_t m_dsp_addr_w;
uint32_t m_main_ram_seg;
- uint8_t m_vimana_coins[2];
- uint8_t m_vimana_credits;
- uint8_t m_vimana_latch;
-
std::unique_ptr<uint16_t[]> m_pf4_tilevram16; /* || Drawn in this order */
std::unique_ptr<uint16_t[]> m_pf3_tilevram16; /* || */
std::unique_ptr<uint16_t[]> m_pf2_tilevram16; /* \||/ */
@@ -84,6 +80,8 @@ public:
tilemap_t *m_pf3_tilemap;
tilemap_t *m_pf4_tilemap;
+
+
DECLARE_WRITE16_MEMBER(toaplan1_intenable_w);
DECLARE_WRITE16_MEMBER(demonwld_dsp_addrsel_w);
DECLARE_READ16_MEMBER(demonwld_dsp_r);
@@ -92,9 +90,6 @@ public:
DECLARE_READ_LINE_MEMBER(demonwld_BIO_r);
DECLARE_WRITE16_MEMBER(demonwld_dsp_ctrl_w);
DECLARE_READ16_MEMBER(samesame_port_6_word_r);
- DECLARE_READ16_MEMBER(vimana_system_port_r);
- DECLARE_READ16_MEMBER(vimana_mcu_r);
- DECLARE_WRITE16_MEMBER(vimana_mcu_w);
DECLARE_READ16_MEMBER(toaplan1_shared_r);
DECLARE_WRITE16_MEMBER(toaplan1_shared_w);
DECLARE_WRITE16_MEMBER(toaplan1_reset_sound_w);
@@ -121,9 +116,19 @@ public:
DECLARE_READ16_MEMBER(toaplan1_scroll_regs_r);
DECLARE_WRITE16_MEMBER(toaplan1_scroll_regs_w);
+ // Fire Shark sound
+ uint8_t m_to_mcu;
+ uint8_t m_cmdavailable;
+
+ DECLARE_READ8_MEMBER(vimana_dswb_invert_r);
+ DECLARE_READ8_MEMBER(vimana_tjump_invert_r);
+ DECLARE_WRITE16_MEMBER(samesame_mcu_w);
+ DECLARE_READ8_MEMBER(samesame_soundlatch_r);
+ DECLARE_WRITE8_MEMBER(samesame_sound_done_w);
+ DECLARE_READ8_MEMBER(samesame_cmdavailable_r);
+
DECLARE_DRIVER_INIT(toaplan1);
DECLARE_DRIVER_INIT(demonwld);
- DECLARE_DRIVER_INIT(vimana);
TILE_GET_INFO_MEMBER(get_pf1_tile_info);
TILE_GET_INFO_MEMBER(get_pf2_tile_info);
TILE_GET_INFO_MEMBER(get_pf3_tile_info);
@@ -151,7 +156,6 @@ public:
void toaplan1_reset_sound();
void toaplan1_driver_savestate();
void demonwld_driver_savestate();
- void vimana_driver_savestate();
DECLARE_WRITE_LINE_MEMBER(toaplan1_reset_callback);
required_device<m68000_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
diff --git a/src/mame/includes/toaplan2.h b/src/mame/includes/toaplan2.h
index 6d75f4781c5..a01691ca013 100644
--- a/src/mame/includes/toaplan2.h
+++ b/src/mame/includes/toaplan2.h
@@ -129,6 +129,7 @@ public:
DECLARE_CUSTOM_INPUT_MEMBER(c2map_r);
DECLARE_WRITE16_MEMBER(oki_bankswitch_w);
DECLARE_WRITE16_MEMBER(oki1_bankswitch_w);
+ DECLARE_WRITE16_MEMBER(enmadaio_oki_bank_w);
DECLARE_DRIVER_INIT(bbakraid);
DECLARE_DRIVER_INIT(pipibibsbl);
DECLARE_DRIVER_INIT(dogyuun);
@@ -137,6 +138,7 @@ public:
DECLARE_DRIVER_INIT(fixeightbl);
DECLARE_DRIVER_INIT(vfive);
DECLARE_DRIVER_INIT(batrider);
+ DECLARE_DRIVER_INIT(enmadaio);
TILE_GET_INFO_MEMBER(get_text_tile_info);
DECLARE_MACHINE_START(toaplan2);
DECLARE_MACHINE_RESET(toaplan2);
@@ -147,6 +149,14 @@ public:
DECLARE_VIDEO_START(bgaregga);
DECLARE_VIDEO_START(bgareggabl);
DECLARE_VIDEO_START(batrider);
+
+ // Teki Paki sound
+ uint8_t m_cmdavailable;
+
+ DECLARE_WRITE16_MEMBER(tekipaki_mcu_w);
+ DECLARE_READ8_MEMBER(tekipaki_soundlatch_r);
+ DECLARE_READ8_MEMBER(tekipaki_cmdavailable_r);
+
uint32_t screen_update_toaplan2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update_dogyuun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update_batsugun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
diff --git a/src/mame/includes/xbox_nv2a.h b/src/mame/includes/xbox_nv2a.h
index ec3879e1a6c..c8f70948202 100644
--- a/src/mame/includes/xbox_nv2a.h
+++ b/src/mame/includes/xbox_nv2a.h
@@ -374,7 +374,9 @@ public:
objectdata->data = this;
combiner.used = 0;
enabled_vertex_attributes = 0;
+ primitives_total_count = 0;
indexesleft_count = 0;
+ triangles_bfculled = 0;
vertex_pipeline = 4;
color_mask = 0xffffffff;
backface_culling_enabled = false;
@@ -405,6 +407,8 @@ public:
limits_rendertarget.set(0, 0, 640, 480);
pitch_rendertarget = 0;
pitch_depthbuffer = 0;
+ size_rendertarget = 0;
+ size_depthbuffer = 0;
log2height_rendertarget = 0;
log2width_rendertarget = 0;
dilate_rendertarget = 0;
@@ -483,6 +487,7 @@ public:
void savestate_items();
void compute_supersample_factors(float &horizontal, float &vertical);
void compute_limits_rendertarget(uint32_t chanel, uint32_t subchannel);
+ void compute_size_rendertarget(uint32_t chanel, uint32_t subchannel);
void read_vertex(address_space & space, offs_t address, vertex_nv &vertex, int attrib);
int read_vertices_0x1800(address_space & space, vertex_nv *destination, uint32_t address, int limit);
int read_vertices_0x1808(address_space & space, vertex_nv *destination, uint32_t address, int limit);
@@ -490,6 +495,7 @@ public:
int read_vertices_0x1818(address_space & space, vertex_nv *destination, uint32_t address, int limit);
void convert_vertices_poly(vertex_nv *source, nv2avertex_t *destination, int count);
void assemble_primitive(vertex_nv *source, int count, render_delegate &renderspans);
+ int clip_triangle_w(nv2avertex_t *vi[3], nv2avertex_t *vo);
uint32_t render_triangle_clipping(const rectangle &cliprect, render_delegate callback, int paramcount, nv2avertex_t &_v1, nv2avertex_t &_v2, nv2avertex_t &_v3);
uint32_t render_triangle_culling(const rectangle &cliprect, render_delegate callback, int paramcount, nv2avertex_t &_v1, nv2avertex_t &_v2, nv2avertex_t &_v3);
void clear_render_target(int what, uint32_t value);
@@ -520,6 +526,8 @@ public:
rectangle limits_rendertarget;
uint32_t pitch_rendertarget;
uint32_t pitch_depthbuffer;
+ uint32_t size_rendertarget;
+ uint32_t size_depthbuffer;
int log2height_rendertarget;
int log2width_rendertarget;
int dilate_rendertarget;
@@ -563,8 +571,10 @@ public:
int rectheight;
int rectwidth;
} texture[4];
+ uint32_t triangles_bfculled;
NV2A_BEGIN_END primitive_type;
uint32_t primitives_count;
+ uint32_t primitives_total_count;
int indexesleft_count;
int indexesleft_first;
uint32_t indexesleft[1024]; // vertex indices sent by the software to the 3d accelerator
diff --git a/src/mame/layout/funjacks.lay b/src/mame/layout/funjacks.lay
index 924c03af199..b75a74002fc 100644
--- a/src/mame/layout/funjacks.lay
+++ b/src/mame/layout/funjacks.lay
@@ -10,6 +10,11 @@
<disk state="1"><color red="1.0" green="0.2" blue="0.23" /></disk>
</element>
+ <element name="hl" defstate="0">
+ <text string=" "><color red="0.0" green="0.0" blue="0.0" /></text>
+ <disk state="1"><color red="1.0" green="1.0" blue="1.0" /></disk>
+ </element>
+
<!-- build screen -->
@@ -19,15 +24,21 @@
<bounds left="0" right="11" top="0" bottom="8" />
</bezel>
- <bezel name="lamp30" element="led"><bounds x="0.2" y="0.2" width="1" height="1" /></bezel>
- <bezel name="lamp31" element="led"><bounds x="9.8" y="0.2" width="1" height="1" /></bezel>
- <bezel name="lamp21" element="led"><bounds x="4" y="2" width="1" height="1" /></bezel>
- <bezel name="lamp20" element="led"><bounds x="6" y="2" width="1" height="1" /></bezel>
- <bezel name="lamp10" element="led"><bounds x="3" y="4" width="1" height="1" /></bezel>
- <bezel name="lamp0" element="led"><bounds x="7" y="4" width="1" height="1" /></bezel>
- <bezel name="lamp11" element="led"><bounds x="4" y="6" width="1" height="1" /></bezel>
- <bezel name="lamp1" element="led"><bounds x="6" y="6" width="1" height="1" /></bezel>
-
+ <bezel name="3.0" element="led"><bounds x="0.2" y="0.2" width="1" height="1" /></bezel>
+ <bezel name="3.1" element="led"><bounds x="9.8" y="0.2" width="1" height="1" /></bezel>
+ <bezel name="2.1" element="led"><bounds x="4" y="2" width="1" height="1" /></bezel>
+ <bezel name="2.0" element="led"><bounds x="6" y="2" width="1" height="1" /></bezel>
+ <bezel name="1.0" element="led"><bounds x="3" y="4" width="1" height="1" /></bezel>
+ <bezel name="0.0" element="led"><bounds x="7" y="4" width="1" height="1" /></bezel>
+ <bezel name="1.1" element="led"><bounds x="4" y="6" width="1" height="1" /></bezel>
+ <bezel name="0.1" element="led"><bounds x="6" y="6" width="1" height="1" /></bezel>
+
+ <bezel element="hl" inputtag="IN.2" inputmask="0x10"><bounds x="4" y="2" width="1" height="1" /><color alpha="0.1" /></bezel>
+ <bezel element="hl" inputtag="IN.2" inputmask="0x20"><bounds x="6" y="2" width="1" height="1" /><color alpha="0.1" /></bezel>
+ <bezel element="hl" inputtag="IN.1" inputmask="0x20"><bounds x="3" y="4" width="1" height="1" /><color alpha="0.1" /></bezel>
+ <bezel element="hl" inputtag="IN.0" inputmask="0x20"><bounds x="7" y="4" width="1" height="1" /><color alpha="0.1" /></bezel>
+ <bezel element="hl" inputtag="IN.1" inputmask="0x10"><bounds x="4" y="6" width="1" height="1" /><color alpha="0.1" /></bezel>
+ <bezel element="hl" inputtag="IN.0" inputmask="0x10"><bounds x="6" y="6" width="1" height="1" /><color alpha="0.1" /></bezel>
</view>
</mamelayout>
diff --git a/src/mame/layout/funrlgl.lay b/src/mame/layout/funrlgl.lay
index 7af9fb61ce8..27141d341f9 100644
--- a/src/mame/layout/funrlgl.lay
+++ b/src/mame/layout/funrlgl.lay
@@ -23,22 +23,22 @@
<bounds left="-1" right="12" top="-0.2" bottom="12" />
</bezel>
- <bezel name="lamp0" element="ledr"><bounds x="0" y="0" width="1" height="1" /></bezel>
- <bezel name="lamp10" element="ledr"><bounds x="0" y="2" width="1" height="1" /></bezel>
- <bezel name="lamp20" element="ledr"><bounds x="0" y="4" width="1" height="1" /></bezel>
- <bezel name="lamp30" element="ledr"><bounds x="0" y="6" width="1" height="1" /></bezel>
- <bezel name="lamp2" element="ledr"><bounds x="0" y="8" width="1" height="1" /></bezel>
- <bezel name="lamp12" element="ledr"><bounds x="0" y="10" width="1" height="1" /></bezel>
-
- <bezel name="lamp22" element="ledr"><bounds x="5" y="2" width="1" height="1" /></bezel>
- <bezel name="lamp33" element="ledg"><bounds x="5" y="4" width="1" height="1" /></bezel>
-
- <bezel name="lamp1" element="ledr"><bounds x="10" y="0" width="1" height="1" /></bezel>
- <bezel name="lamp11" element="ledr"><bounds x="10" y="2" width="1" height="1" /></bezel>
- <bezel name="lamp21" element="ledr"><bounds x="10" y="4" width="1" height="1" /></bezel>
- <bezel name="lamp31" element="ledr"><bounds x="10" y="6" width="1" height="1" /></bezel>
- <bezel name="lamp3" element="ledr"><bounds x="10" y="8" width="1" height="1" /></bezel>
- <bezel name="lamp13" element="ledr"><bounds x="10" y="10" width="1" height="1" /></bezel>
+ <bezel name="0.0" element="ledr"><bounds x="0" y="0" width="1" height="1" /></bezel>
+ <bezel name="1.0" element="ledr"><bounds x="0" y="2" width="1" height="1" /></bezel>
+ <bezel name="2.0" element="ledr"><bounds x="0" y="4" width="1" height="1" /></bezel>
+ <bezel name="3.0" element="ledr"><bounds x="0" y="6" width="1" height="1" /></bezel>
+ <bezel name="0.2" element="ledr"><bounds x="0" y="8" width="1" height="1" /></bezel>
+ <bezel name="1.2" element="ledr"><bounds x="0" y="10" width="1" height="1" /></bezel>
+
+ <bezel name="2.2" element="ledr"><bounds x="5" y="2" width="1" height="1" /></bezel>
+ <bezel name="3.3" element="ledg"><bounds x="5" y="4" width="1" height="1" /></bezel>
+
+ <bezel name="0.1" element="ledr"><bounds x="10" y="0" width="1" height="1" /></bezel>
+ <bezel name="1.1" element="ledr"><bounds x="10" y="2" width="1" height="1" /></bezel>
+ <bezel name="2.1" element="ledr"><bounds x="10" y="4" width="1" height="1" /></bezel>
+ <bezel name="3.1" element="ledr"><bounds x="10" y="6" width="1" height="1" /></bezel>
+ <bezel name="0.3" element="ledr"><bounds x="10" y="8" width="1" height="1" /></bezel>
+ <bezel name="1.3" element="ledr"><bounds x="10" y="10" width="1" height="1" /></bezel>
</view>
</mamelayout>
diff --git a/src/mame/machine/acitya.cpp b/src/mame/machine/acitya.cpp
deleted file mode 100644
index 68b7aec03e8..00000000000
--- a/src/mame/machine/acitya.cpp
+++ /dev/null
@@ -1,204 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:David Widel
-/***************************************************************************
-
- machine.c
-
-Same Epos board as usual(theglobp,beastf,street heat), see theglobp.c for hardware documentation. This is fairly easy to decrypt since it has consecutive bytes with the same algorithym. There are 4 different algorithyms. One consists almost entirely of text, one contains the majority of code and the remaining 2 are not used much and are therefore the most difficult. It is however difficult to decrypt to rom. The data for the coin sound is actually program code in a different phase. You need to move the sound tables and add a rom to get it to run without the daughterboard.
-
-acitya contains a bug with the insurance in blackjack. It's impossible to collect, so it's likely that acitya is earlier than bwcasino.
-
-I don't think this game is a gambling game. For one thing there's no real output hardware on a pacman board and the epos daughterboard doesn't contain any either.
-
-David Widel d_widel@hotmail.com
-
-***************************************************************************/
-
-#include "emu.h"
-#include "includes/pacman.h"
-
-
-void pacman_state::acitya_decrypt_rom_8()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x80) >> 2;
- newbyte |= (oldbyte & 0x40) >> 0;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- newbyte |= (inverted_oldbyte & 0x10) >> 1;
- newbyte |= (oldbyte & 0x08) << 1;
- newbyte |= (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (oldbyte & 0x02) << 6;
- newbyte |= (inverted_oldbyte & 0x01) << 2;
-
- RAM[mem + 0x10000] = newbyte;
- }
-
- return;
-}
-
-
-void pacman_state::acitya_decrypt_rom_9()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x80) >> 0;
- newbyte |= (oldbyte & 0x40) >> 0;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- newbyte |= (oldbyte & 0x10) >> 1;
- newbyte |= (oldbyte & 0x08) << 1;
- newbyte |= (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x02) << 4;
- newbyte |= (inverted_oldbyte & 0x01) << 2;
- RAM[mem + 0x14000] = newbyte;
- }
-
- return;
-}
-
-void pacman_state::acitya_decrypt_rom_A()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- newbyte = (inverted_oldbyte & 0x80) >> 2;
- newbyte |= (inverted_oldbyte & 0x40) >> 2;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- newbyte |= (inverted_oldbyte & 0x10) >> 1;
-
- newbyte |= (inverted_oldbyte & 0x08) >> 1;
- newbyte |= (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (oldbyte & 0x02) << 6;
- newbyte |= (oldbyte & 0x01) << 6;
- RAM[mem + 0x18000] = newbyte;
- }
-
- return;
-}
-
-void pacman_state::acitya_decrypt_rom_B()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x80) >> 0;
- newbyte |= (inverted_oldbyte & 0x40) >> 2;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- newbyte |= (oldbyte & 0x10) >> 1;
- newbyte |= (inverted_oldbyte & 0x08) >> 1;
- newbyte |= (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x02) << 4;
- newbyte |= (oldbyte & 0x01) << 6;
-
-
- RAM[mem + 0x1C000] = newbyte;
- }
-
- return;
-}
-
-
-READ8_MEMBER(pacman_state::acitya_decrypt_rom )
-{
- if (offset & 0x01)
- {
- m_counter = (m_counter - 1) & 0x0F;
- }
- else
- {
- m_counter = (m_counter + 1) & 0x0F;
- }
-
- switch(m_counter)
- {
- case 0x08: membank ("bank1")->set_entry (0); break;
- case 0x09: membank ("bank1")->set_entry (1); break;
- case 0x0A: membank ("bank1")->set_entry (2); break;
- case 0x0B: membank ("bank1")->set_entry (3); break;
- default:
- logerror("Invalid counter = %02X\n",m_counter);
- break;
- }
-
- return 0;
-}
-
-
-MACHINE_START_MEMBER(pacman_state,acitya)
-{
- uint8_t *RAM = memregion("maincpu")->base();
-
- /* While the PAL supports up to 16 decryption methods, only four
- are actually used in the PAL. Therefore, we'll take a little
- memory overhead and decrypt the ROMs using each method in advance. */
- acitya_decrypt_rom_8();
- acitya_decrypt_rom_9();
- acitya_decrypt_rom_A();
- acitya_decrypt_rom_B();
-
- membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
-
- save_item(NAME(m_counter));
-}
-
-
-MACHINE_RESET_MEMBER(pacman_state,acitya)
-{
- /* The initial state of the counter is 0x0B */
- m_counter = 0x0B;
- membank("bank1")->set_entry(3);
-}
diff --git a/src/mame/machine/acitya.h b/src/mame/machine/acitya.h
deleted file mode 100644
index f15a7f4cd0e..00000000000
--- a/src/mame/machine/acitya.h
+++ /dev/null
@@ -1,2 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:David Widel
diff --git a/src/mame/machine/archimds.cpp b/src/mame/machine/archimds.cpp
index 35c2f74999a..9d5b46951f3 100644
--- a/src/mame/machine/archimds.cpp
+++ b/src/mame/machine/archimds.cpp
@@ -116,7 +116,7 @@ void archimedes_state::vidc_vblank()
archimedes_request_irq_a(ARCHIMEDES_IRQA_VBL);
// set up for next vbl
- m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_regs[0xb4]));
+ m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
}
/* video DMA */
@@ -155,7 +155,7 @@ void archimedes_state::vidc_video_tick()
if(m_video_dma_on)
{
- m_vid_timer->adjust(m_screen->time_until_pos(m_vidc_regs[0xb4]));
+ m_vid_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time+1));
}
else
m_vid_timer->adjust(attotime::never);
@@ -204,9 +204,9 @@ void archimedes_state::vidc_audio_tick()
56, 48, 40, 32, 24, 16, 8, 0
};
- for(ch=0;ch<8;ch++)
+ for(ch=0; ch<8; ch++)
{
- uint8_t ulaw_temp = (space.read_byte(m_vidc_sndstart+m_vidc_sndcur + ch)) ^ 0xff;
+ uint8_t ulaw_temp = (space.read_byte(m_vidc_sndcur + ch)) ^ 0xff;
ulaw_comp = (ulaw_temp>>1) | ((ulaw_temp&1)<<7);
@@ -217,19 +217,24 @@ void archimedes_state::vidc_audio_tick()
m_vidc_sndcur+=8;
- if (m_vidc_sndcur >= (m_vidc_sndend-m_vidc_sndstart)+0x10)
+ if (m_vidc_sndcur >= m_vidc_sndendcur)
{
- m_vidc_sndcur = 0;
archimedes_request_irq_b(ARCHIMEDES_IRQB_SOUND_EMPTY);
if(!m_audio_dma_on)
{
m_snd_timer->adjust(attotime::never);
- for(ch=0;ch<8;ch++)
+ for(ch=0; ch<8; ch++)
{
m_dac[ch & 7]->write(0);
}
}
+ else
+ {
+ //printf("Chaining to next: start %x end %x\n", m_vidc_sndstart, m_vidc_sndend);
+ m_vidc_sndcur = m_vidc_sndstart;
+ m_vidc_sndendcur = m_vidc_sndend;
+ }
}
}
@@ -260,6 +265,10 @@ void archimedes_state::ioc_timer(int param)
// all timers always run
a310_set_timer(param);
+ // keep FIQ line ASSERTED if there are active requests
+ if (m_ioc_regs[FIQ_STATUS] & m_ioc_regs[FIQ_MASK])
+ archimedes_request_fiq(0);
+
// but only timers 0 and 1 generate IRQs
switch (param)
{
@@ -289,6 +298,9 @@ void archimedes_state::archimedes_reset()
m_ioc_regs[IRQ_STATUS_B] = 0x00; //set up IL[1] On
m_ioc_regs[FIQ_STATUS] = 0x80; //set up Force FIQ
m_ioc_regs[CONTROL] = 0xff;
+
+ m_vidc_vblank_time = 10000; // set a stupidly high time so it doesn't fire off
+ m_vbl_timer->adjust(attotime::never);
}
void archimedes_state::archimedes_init()
@@ -494,7 +506,7 @@ bool archimedes_state::check_floppy_ready()
}
if(floppy)
- return floppy->ready_r();
+ return !floppy->ready_r();
return false;
}
@@ -617,7 +629,7 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
archimedes_request_irq_a((data & 0x80) ? ARCHIMEDES_IRQA_FORCE : 0);
if(data & 0x08) //set up the VBLANK timer
- m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_regs[0xb4]));
+ m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
break;
@@ -842,7 +854,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_ioc_w)
---- x--- floppy controller reset
*/
m_fdc->dden_w(BIT(data, 1));
- if(data & 8)
+ if (!(data & 8))
m_fdc->soft_reset();
if(data & ~0xa)
printf("%02x Latch B\n",data);
@@ -901,7 +913,6 @@ void archimedes_state::vidc_dynamic_res_change()
*/
if((m_vidc_regs[VIDC_HCR] >= m_vidc_regs[VIDC_HBER]) &&
(m_vidc_regs[VIDC_HBER] >= m_vidc_regs[VIDC_HBSR]) &&
- (m_vidc_regs[VIDC_VCR] >= m_vidc_regs[VIDC_VBER]) &&
(m_vidc_regs[VIDC_VBER] >= m_vidc_regs[VIDC_VBSR]))
{
rectangle visarea;
@@ -912,13 +923,14 @@ void archimedes_state::vidc_dynamic_res_change()
visarea.max_x = m_vidc_regs[VIDC_HBER] - m_vidc_regs[VIDC_HBSR] - 1;
visarea.max_y = (m_vidc_regs[VIDC_VBER] - m_vidc_regs[VIDC_VBSR]) * (m_vidc_interlace+1);
- //logerror("Configuring: htotal %d vtotal %d border %d x %d display %d x %d\n",
+ m_vidc_vblank_time = m_vidc_regs[VIDC_VBER] * (m_vidc_interlace+1);
+ //logerror("Configuring: htotal %d vtotal %d border %d x %d display origin %d x %d vblank = %d\n",
// m_vidc_regs[VIDC_HCR], m_vidc_regs[VIDC_VCR],
// visarea.max_x, visarea.max_y,
- // m_vidc_regs[VIDC_HDER]-m_vidc_regs[VIDC_HDSR],m_vidc_regs[VIDC_VDER]-m_vidc_regs[VIDC_VDSR]+1);
+ // m_vidc_regs[VIDC_HDER]-m_vidc_regs[VIDC_HDSR],m_vidc_regs[VIDC_VDER]-m_vidc_regs[VIDC_VDSR]+1,
+ // m_vidc_vblank_time);
- /* FIXME: pixel clock */
- refresh = HZ_TO_ATTOSECONDS(pixel_rate[m_vidc_pixel_clk]*2) * m_vidc_regs[VIDC_HCR] * m_vidc_regs[VIDC_VCR];
+ refresh = HZ_TO_ATTOSECONDS(pixel_rate[m_vidc_pixel_clk]) * m_vidc_regs[VIDC_HCR] * m_vidc_regs[VIDC_VCR];
m_screen->configure(m_vidc_regs[VIDC_HCR], m_vidc_regs[VIDC_VCR] * (m_vidc_interlace+1), visarea, refresh);
}
@@ -984,6 +996,8 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
}
}
+ // update partials
+ machine().first_screen()->update_partial(machine().first_screen()->vpos());
}
else if (reg >= 0x60 && reg <= 0x7c)
{
@@ -1005,7 +1019,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
case VIDC_HCSR: m_vidc_regs[VIDC_HCSR] = ((val >> 13) & 0x7ff) + 6; break;
// #define VIDC_HIR 0x9c
- case VIDC_VCR: m_vidc_regs[VIDC_VCR] = ((val >> 14)<<1)+1; break;
+ case VIDC_VCR: m_vidc_regs[VIDC_VCR] = ((val >> 14))+1; break;
// #define VIDC_VSWR 0xa4
case VIDC_VBSR: m_vidc_regs[VIDC_VBSR] = (val >> 14)+1; break;
case VIDC_VDSR: m_vidc_regs[VIDC_VDSR] = (val >> 14)+1; break;
@@ -1023,7 +1037,19 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
vidc_dynamic_res_change();
}
- else if(reg == 0xe0)
+ else if (reg == 0xc0)
+ {
+ m_vidc_regs[reg] = val & 0xffff;
+
+ if (m_audio_dma_on)
+ {
+ double sndhz = 1e6 / ((m_vidc_regs[0xc0] & 0xff) + 2);
+ sndhz /= 8.0;
+ m_snd_timer->adjust(attotime::zero, 0, attotime::from_hz(sndhz));
+ //printf("VIDC: sound freq to %d, sndhz = %f\n", (val & 0xff)-2, sndhz);
+ }
+ }
+ else if (reg == 0xe0)
{
m_vidc_bpp_mode = ((val & 0x0c) >> 2);
m_vidc_interlace = ((val & 0x40) >> 6);
@@ -1099,19 +1125,20 @@ WRITE32_MEMBER(archimedes_state::archimedes_memc_w)
if ((data>>10)&1)
{
m_vidc_vidcur = 0;
- m_vid_timer->adjust(m_screen->time_until_pos(m_vidc_regs[0xb4]));
+ m_vid_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time+1));
}
- if ((data>>11)&1)
+ if ((data>>11) & 1)
{
- double sndhz;
-
- /* FIXME: is the frequency correct? */
- sndhz = (250000.0 / 2) / (double)((m_vidc_regs[0xc0]&0xff)+2);
-
- printf("MEMC: Starting audio DMA at %f Hz, buffer from %x to %x\n", sndhz, m_vidc_sndstart, m_vidc_sndend);
+ //printf("MEMC: Starting audio DMA at %d uSec, buffer from %x to %x\n", ((m_vidc_regs[0xc0]&0xff)-2)*8, m_vidc_sndstart, m_vidc_sndend);
+ double sndhz = 1e6 / ((m_vidc_regs[0xc0] & 0xff) + 2);
+ sndhz /= 8.0;
m_snd_timer->adjust(attotime::zero, 0, attotime::from_hz(sndhz));
+ //printf("MEMC: audio DMA start, sound freq %d, sndhz = %f\n", (m_vidc_regs[0xc0] & 0xff)-2, sndhz);
+
+ m_vidc_sndcur = m_vidc_sndstart;
+ m_vidc_sndendcur = m_vidc_sndend;
}
break;
diff --git a/src/mame/machine/at.cpp b/src/mame/machine/at.cpp
index 21f0ac46cc6..56d12935079 100644
--- a/src/mame/machine/at.cpp
+++ b/src/mame/machine/at.cpp
@@ -47,7 +47,6 @@ void at_mb_device::device_start()
MACHINE_CONFIG_FRAGMENT( at_softlists )
/* software lists */
MCFG_SOFTWARE_LIST_ADD("pc_disk_list","ibm5150")
- MCFG_SOFTWARE_LIST_ADD("xt_disk_list","ibm5160_flop")
MCFG_SOFTWARE_LIST_ADD("at_disk_list","ibm5170")
MCFG_SOFTWARE_LIST_ADD("at_cdrom_list","ibm5170_cdrom")
MACHINE_CONFIG_END
diff --git a/src/mame/machine/bublbobl.cpp b/src/mame/machine/bublbobl.cpp
index b4ae1801938..76a76af1f4d 100644
--- a/src/mame/machine/bublbobl.cpp
+++ b/src/mame/machine/bublbobl.cpp
@@ -57,29 +57,104 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_nmitrigger_w)
}
-static const uint8_t tokio_prot_data[] =
-{
- 0x6c,
- 0x7f,0x5f,0x7f,0x6f,0x5f,0x77,0x5f,0x7f,0x5f,0x7f,0x5f,0x7f,0x5b,0x7f,0x5f,0x7f,
- 0x5f,0x77,0x59,0x7f,0x5e,0x7e,0x5f,0x6d,0x57,0x7f,0x5d,0x7d,0x5f,0x7e,0x5f,0x7f,
- 0x5d,0x7d,0x5f,0x7e,0x5e,0x79,0x5f,0x7f,0x5f,0x7f,0x5d,0x7f,0x5f,0x7b,0x5d,0x7e,
- 0x5f,0x7f,0x5d,0x7d,0x5f,0x7e,0x5e,0x7e,0x5f,0x7d,0x5f,0x7f,0x5f,0x7e,0x7f,0x5f,
- 0x01,0x00,0x02,0x01,0x01,0x01,0x03,0x00,0x05,0x02,0x04,0x01,0x03,0x00,0x05,0x01,
- 0x02,0x03,0x00,0x04,0x04,0x01,0x02,0x00,0x05,0x03,0x02,0x01,0x04,0x05,0x00,0x03,
- 0x00,0x05,0x02,0x01,0x03,0x04,0x05,0x00,0x01,0x04,0x04,0x02,0x01,0x04,0x01,0x00,
- 0x03,0x01,0x02,0x05,0x00,0x03,0x00,0x01,0x02,0x00,0x03,0x04,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00,0x00,0x00,0x00,0x01,0x02,0x00,0x00,0x00,
- 0x01,0x02,0x01,0x00,0x00,0x00,0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x01,
- 0x00,0x00,0x00,0x00,0x02,0x00,0x01,0x02,0x00,0x01,0x01,0x00,0x00,0x02,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x01
-};
+
+CUSTOM_INPUT_MEMBER(bublbobl_state::tokio_mcu_sent_r)
+{
+ if (m_mcu_sent) return 0;
+ else return 1;
+}
+
+CUSTOM_INPUT_MEMBER(bublbobl_state::tokio_main_sent_r)
+{
+ if (m_main_sent) return 0;
+ else return 1;
+}
+
READ8_MEMBER(bublbobl_state::tokio_mcu_r)
{
- m_tokio_prot_count %= sizeof(tokio_prot_data);
- return tokio_prot_data[m_tokio_prot_count++];
+ if (!m_mcu)
+ return 0x00;
+
+ m_mcu_sent = false;
+
+// printf("%s: tokio_mcu_r %02x\n", space.machine().describe_context(), m_from_mcu);
+
+ return m_from_mcu;
+}
+
+WRITE8_MEMBER(bublbobl_state::tokio_mcu_w)
+{
+ if (!m_mcu)
+ return;
+
+// printf("%s: tokio_mcu_w %02x\n", space.machine().describe_context(), data);
+
+ m_from_main = data;
+ m_main_sent = true;
+ m_mcu->set_input_line(0, ASSERT_LINE);
+
+}
+
+
+READ8_MEMBER(bublbobl_state::tokio_mcu_porta_r)
+{
+// printf("tokio_mcu_porta_r\n");
+ return m_to_mcu_latch;
+}
+
+WRITE8_MEMBER(bublbobl_state::tokio_mcu_porta_w)
+{
+// printf("tokio_mcu_porta_w %02x\n", data);
+ m_from_mcu_latch = data;
+}
+
+
+READ8_MEMBER(bublbobl_state::tokio_mcu_portc_r)
+{
+ uint8_t ret = 0;
+
+ if (!m_main_sent)
+ ret |= 0x01;
+ if (m_mcu_sent)
+ ret |= 0x02;
+
+ ret ^= 0x3; // inverted logic compared to tigerh
+
+// printf("%s: tokio_mcu_portc_r %02x\n", space.machine().describe_context(), ret);
+
+ return ret;
+}
+
+
+WRITE8_MEMBER(bublbobl_state::tokio_mcu_portb_w)
+{
+// printf("tokio_mcu_portb_w %02x\n", data);
+
+ if ((mem_mask & 0x02) && (~data & 0x02) && (m_old_portB & 0x02))
+ {
+ if (m_main_sent)
+ m_mcu->set_input_line(0, CLEAR_LINE);
+
+ m_to_mcu_latch = m_from_main;
+ m_main_sent = false;
+ }
+ if ((mem_mask & 0x04) && (data & 0x04) && (~m_old_portB & 0x04))
+ {
+ m_from_mcu = m_from_mcu_latch;
+ m_mcu_sent = true;
+ // printf("sent %02x\n", m_from_mcu);
+ }
+
+ m_old_portB = data;
+
}
+
+
+
+
+
READ8_MEMBER(bublbobl_state::tokiob_mcu_r)
{
return 0xbf; /* ad-hoc value set to pass initial testing */
diff --git a/src/mame/machine/carpolo.cpp b/src/mame/machine/carpolo.cpp
index 721e23cbda1..636987a260b 100644
--- a/src/mame/machine/carpolo.cpp
+++ b/src/mame/machine/carpolo.cpp
@@ -253,30 +253,16 @@ INTERRUPT_GEN_MEMBER(carpolo_state::carpolo_timer_interrupt)
/* finally read the accelerator pedals */
port_value = ioport("PEDALS")->read();
- for (player = 0; player < 4; player++)
- {
- /* one line indicates if the pedal is pressed and the other
- how much, resulting in only two different possible levels */
- if (port_value & 0x01)
- {
- m_ttl74153_1k->input_line_w(0, player, 1);
- m_ttl74153_1k->input_line_w(1, player, 0);
- }
- else if (port_value & 0x02)
- {
- m_ttl74153_1k->input_line_w(0, player, 1);
- m_ttl74153_1k->input_line_w(1, player, 1);
- }
- else
- {
- m_ttl74153_1k->input_line_w(0, player, 0);
- /* the other line is irrelevant */
- }
-
- port_value >>= 2;
- }
-
- m_ttl74153_1k->update();
+ // one line indicates if the pedal is pressed and the other
+ // how much, resulting in only two different possible levels
+ m_ttl74153_1k->i0a_w(BIT(port_value, 0) | BIT(port_value, 1));
+ m_ttl74153_1k->i1a_w(BIT(port_value, 2) | BIT(port_value, 3));
+ m_ttl74153_1k->i2a_w(BIT(port_value, 4) | BIT(port_value, 5));
+ m_ttl74153_1k->i3a_w(BIT(port_value, 6) | BIT(port_value, 7));
+ m_ttl74153_1k->i0b_w(BIT(port_value, 1));
+ m_ttl74153_1k->i1b_w(BIT(port_value, 3));
+ m_ttl74153_1k->i2b_w(BIT(port_value, 5));
+ m_ttl74153_1k->i3b_w(BIT(port_value, 7));
}
// FIXME: Remove trampolines
@@ -344,6 +330,16 @@ WRITE8_MEMBER(carpolo_state::carpolo_timer_interrupt_clear_w)
*
*************************************/
+WRITE_LINE_MEMBER( carpolo_state::ls153_za_w )
+{
+ m_ls153_za = state;
+}
+
+WRITE_LINE_MEMBER( carpolo_state::ls153_zb_w )
+{
+ m_ls153_zb = state;
+}
+
WRITE8_MEMBER(carpolo_state::pia_0_port_a_w)
{
/* bit 0 - Coin counter
@@ -374,10 +370,8 @@ WRITE8_MEMBER(carpolo_state::pia_0_port_b_w)
bit 6 - Select pedal 0
bit 7 - Select pdeal 1 */
- m_ttl74153_1k->a_w(data & 0x40);
- m_ttl74153_1k->b_w(data & 0x80);
-
- m_ttl74153_1k->update();
+ m_ttl74153_1k->s0_w(BIT(data, 6));
+ m_ttl74153_1k->s1_w(BIT(data, 7));
}
READ8_MEMBER(carpolo_state::pia_0_port_b_r)
@@ -385,8 +379,7 @@ READ8_MEMBER(carpolo_state::pia_0_port_b_r)
/* bit 4 - Pedal bit 0
bit 5 - Pedal bit 1 */
- return (m_ttl74153_1k->output_r(0) << 5) |
- (m_ttl74153_1k->output_r(1) << 4);
+ return (m_ls153_za << 5) | (m_ls153_zb << 4);
}
@@ -486,9 +479,4 @@ void carpolo_state::machine_reset()
m_ttl7474_1a_2->clear_w (1);
m_ttl7474_1a_2->preset_w(1);
-
-
- /* set up the pedal handling chips */
- m_ttl74153_1k->enable_w(0, 0);
- m_ttl74153_1k->enable_w(1, 0);
}
diff --git a/src/mame/machine/cedar_magnet_sound.cpp b/src/mame/machine/cedar_magnet_sound.cpp
index 37132fb77f3..2ff907658ed 100644
--- a/src/mame/machine/cedar_magnet_sound.cpp
+++ b/src/mame/machine/cedar_magnet_sound.cpp
@@ -2,26 +2,24 @@
// copyright-holders:David Haywood
/*
- how should the ctcs hook up properly?
+ This is very similar to the ZSU1 Sound Control Unit, also manufactured by
+ EFO SA and used in the Playmatic pinballs Skill Flight and Phantom Ship;
+ the emulation here is influenced by available schematics for that board.
irq vectors
- 0xe6 - from ctc0? (would need vector of e0?) probably used to drive MSM5205
- 0xee - from ctc0? (would need vector of e8?) ^^
- 0xf6 - drive AY (once per frame?) triggered by ctc1 channel 3? (sets vector to f0, f6 = channel3?)
- 0xff - read sound latch (triggered by write from master board)
-
- any attempts made to hook up the ctcs end up resulting in it taking an interrupt
- with vector 0xf0, which points to 0x0000 and resets the cpu?!
-
- does the device here also need to add daisychain functions in order for the 0xff vector to be used
- with the soundlatch writes?
+ 0xe6 - from ctc0 channel 3 (vector = E0) used to drive MSM5205 through FIFO
+ 0xee - from ctc0 channel 3 (vector = E8) ^^
+ 0xf6 - drive AY (once per frame?) triggered by ctc1 channel 3 (vector = F0)
+ 0xff - read sound latch (triggered by write from master board; default vector set by 5K/+5 pullups on D0-D7)
*/
#include "emu.h"
#include "cedar_magnet_sound.h"
+#include "machine/clock.h"
+
extern const device_type CEDAR_MAGNET_SOUND = &device_creator<cedar_magnet_sound_device>;
@@ -29,7 +27,9 @@ extern const device_type CEDAR_MAGNET_SOUND = &device_creator<cedar_magnet_sound
cedar_magnet_sound_device::cedar_magnet_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cedar_magnet_board_device(mconfig, CEDAR_MAGNET_SOUND, "Cedar Sound", tag, owner, clock, "cedmag_sound", __FILE__),
m_ctc0(*this, "ctc0"),
- m_ctc1(*this, "ctc1")
+ m_ctc1(*this, "ctc1"),
+ m_fifo(*this, "fifo"),
+ m_adpcm(*this, "adpcm")
{
}
@@ -43,7 +43,7 @@ void cedar_magnet_sound_device::write_command(uint8_t data)
{
m_command = data;
// this interrupt causes it to read the soundlatch at 0x14
- m_cpu->set_input_line_and_vector(0, HOLD_LINE,0xff);
+ m_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
}
@@ -54,11 +54,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cedar_magnet_sound_io, AS_IO, 8, cedar_magnet_sound_device )
ADDRESS_MAP_GLOBAL_MASK(0xff)
+ ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ctc0", z80ctc_device, read, write)
AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("ctc1", z80ctc_device, read, write)
- AM_RANGE(0x08, 0x08) AM_WRITE(adpcm_latch_w)
+ AM_RANGE(0x08, 0x08) AM_WRITE(adpcm_fifo_w)
AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("aysnd0", ay8910_device, address_w)
AM_RANGE(0x0d, 0x0d) AM_DEVWRITE("aysnd0", ay8910_device, data_w)
@@ -70,16 +71,28 @@ static ADDRESS_MAP_START( cedar_magnet_sound_io, AS_IO, 8, cedar_magnet_sound_de
ADDRESS_MAP_END
-WRITE8_MEMBER(cedar_magnet_sound_device::adpcm_latch_w)
+WRITE8_MEMBER(cedar_magnet_sound_device::adpcm_fifo_w)
+{
+ // Z80 code first unpacks 8 bytes of ADPCM sample data into nibbles
+ // and, upon receiving interrupt vector E6, fills FIFO at once using OTIR
+ // 4-bit data is shifted out of the FIFO to the MSM5205 by another timer
+ m_fifo->write(data & 0x0f); // only low nibble is used here
+ m_fifo->si_w(1);
+ m_fifo->si_w(0);
+}
+
+WRITE8_MEMBER(cedar_magnet_sound_device::ay0_porta_w)
{
- // it writes 8-bits of sample data here, to be fed to the msm 4-bits at a time
- // probably via other triggers
- m_adpcm_data = data;
+ // unknown; 0x80 written on reset
}
WRITE8_MEMBER(cedar_magnet_sound_device::ay1_porta_w)
{
- // unknown but used
+ m_adpcm->reset_w(data & 1);
+ if (data & 1)
+ m_fifo->reset();
+ // D4-D6 likely used to select clock for ctc0 channel 2
+ // other bits probably used to modulate analog sound output
}
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z0_w)
@@ -92,9 +105,6 @@ WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z1_w)
// printf("USED ctc0_z1_w %d\n", state);
}
-
-// I don't think any of the below are used
-
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc1_z0_w)
{
printf("ctc1_z0_w %d\n", state);
@@ -115,25 +125,17 @@ WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z2_w)
printf("ctc0_z2_w %d\n", state);
}
-WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_int_w)
-{
- //printf("ctc0_int_w %d\n", state);
-}
-
-WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc1_int_w)
+WRITE_LINE_MEMBER(cedar_magnet_sound_device::fifo_dor_w)
{
-
+ // combined with a clock signal and used to drive ctc0 channel 3
}
-#if 0
static const z80_daisy_config daisy_chain[] =
{
{ "ctc1" },
{ "ctc0" },
-// soundlatch from main CPU needs to be able to generate a vector too?
{ nullptr }
};
-#endif
TIMER_CALLBACK_MEMBER(cedar_magnet_sound_device::reset_assert_callback)
{
@@ -145,52 +147,47 @@ TIMER_CALLBACK_MEMBER(cedar_magnet_sound_device::reset_assert_callback)
-INTERRUPT_GEN_MEMBER(cedar_magnet_sound_device::fake_irq)
-{
- // these should be coming from the CTC...
-// if (m_fake_counter==0) m_cpu->set_input_line_and_vector(0, HOLD_LINE,0xe6);
-// if (m_fake_counter==1) m_cpu->set_input_line_and_vector(0, HOLD_LINE,0xee);
- if (m_fake_counter==2) m_cpu->set_input_line_and_vector(0, HOLD_LINE,0xf6); // drives the AY, should be from ctc1 4th counter?
-
- m_fake_counter++;
-
- if (m_fake_counter == 4) m_fake_counter = 0;
-}
-
static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sound )
- MCFG_CPU_ADD("topcpu", Z80,4000000)
+ MCFG_CPU_ADD("topcpu", Z80, 4000000)
MCFG_CPU_PROGRAM_MAP(cedar_magnet_sound_map)
MCFG_CPU_IO_MAP(cedar_magnet_sound_io)
-// MCFG_Z80_DAISY_CHAIN(daisy_chain)
- MCFG_CPU_PERIODIC_INT_DRIVER(cedar_magnet_sound_device, fake_irq, 4*60)
+ MCFG_Z80_DAISY_CHAIN(daisy_chain)
- MCFG_DEVICE_ADD("ctc0", Z80CTC, 4000000/8 )
-// MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
- MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc0_int_w))
+ MCFG_DEVICE_ADD("ctc0", Z80CTC, 4000000)
+ MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(cedar_magnet_sound_device, ctc0_z2_w))
- MCFG_DEVICE_ADD("ctc1", Z80CTC, 4000000/8 )
-// MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
-// MCFG_Z80CTC_INTR_CB(DEVWRITELINE("ctc0", z80ctc_device, trg0))
- MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc1_int_w))
+ MCFG_DEVICE_ADD("ctc1", Z80CTC, 4000000)
+ MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z2_w))
+#if 0 // does nothing useful now
+ MCFG_DEVICE_ADD("ck1mhz", CLOCK, 4000000/4)
+ MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("ctc1", z80ctc_device, trg0))
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc1", z80ctc_device, trg1))
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc1", z80ctc_device, trg2))
+#endif
+
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("aysnd0", AY8910, 4000000/2)
+ MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(cedar_magnet_sound_device, ay0_porta_w))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
MCFG_SOUND_ADD("aysnd1", AY8910, 4000000/2)
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(cedar_magnet_sound_device, ay1_porta_w))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
- MCFG_SOUND_ADD("adpcm", MSM5205, 4000000/16)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
+ MCFG_DEVICE_ADD("fifo", HC40105, 0) // HCF40105BE at IC13
+ MCFG_40105_DATA_OUT_READY_CB(WRITELINE(cedar_magnet_sound_device, fifo_dor_w))
+ MCFG_40105_DATA_OUT_CB(DEVWRITELINE("adpcm", msm5205_device, data_w))
+ MCFG_SOUND_ADD("adpcm", MSM5205, 4000000/8)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END
machine_config_constructor cedar_magnet_sound_device::device_mconfig_additions() const
@@ -207,6 +204,5 @@ void cedar_magnet_sound_device::device_start()
void cedar_magnet_sound_device::device_reset()
{
m_command = 0;
- m_fake_counter = 0;
cedar_magnet_board_device::device_reset();
}
diff --git a/src/mame/machine/cedar_magnet_sound.h b/src/mame/machine/cedar_magnet_sound.h
index fcd498c1aa8..0d1a5d0226b 100644
--- a/src/mame/machine/cedar_magnet_sound.h
+++ b/src/mame/machine/cedar_magnet_sound.h
@@ -9,6 +9,7 @@
#include "cpu/z80/z80.h"
#include "cpu/z80/z80daisy.h"
#include "machine/z80ctc.h"
+#include "machine/40105.h"
#include "sound/ay8910.h"
#include "sound/msm5205.h"
#include "machine/cedar_magnet_board.h"
@@ -27,13 +28,14 @@ public:
required_device<z80ctc_device> m_ctc0;
required_device<z80ctc_device> m_ctc1;
+ required_device<cmos_40105_device> m_fifo;
+ required_device<msm5205_device> m_adpcm;
DECLARE_READ8_MEMBER(soundlatch_r);
- DECLARE_WRITE8_MEMBER(adpcm_latch_w);
+ DECLARE_WRITE8_MEMBER(adpcm_fifo_w);
+ DECLARE_WRITE8_MEMBER(ay0_porta_w);
DECLARE_WRITE8_MEMBER(ay1_porta_w);
- uint8_t m_adpcm_data;
-
void write_command(uint8_t data);
uint8_t m_command;
@@ -43,14 +45,10 @@ public:
DECLARE_WRITE_LINE_MEMBER(ctc0_z0_w);
DECLARE_WRITE_LINE_MEMBER(ctc0_z1_w);
DECLARE_WRITE_LINE_MEMBER(ctc0_z2_w);
- DECLARE_WRITE_LINE_MEMBER(ctc0_int_w);
- DECLARE_WRITE_LINE_MEMBER(ctc1_int_w);
+ DECLARE_WRITE_LINE_MEMBER(fifo_dor_w);
TIMER_CALLBACK_MEMBER(reset_assert_callback) override;
- int m_fake_counter;
- INTERRUPT_GEN_MEMBER(fake_irq);
-
protected:
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_start() override;
diff --git a/src/mame/machine/epos.cpp b/src/mame/machine/epos.cpp
new file mode 100644
index 00000000000..3ead45d89be
--- /dev/null
+++ b/src/mame/machine/epos.cpp
@@ -0,0 +1,215 @@
+// license:BSD-3-Clause
+// copyright-holders:smf, Mike Balfour, David Widel
+
+#include "emu.h"
+#include "includes/pacman.h"
+
+READ8_MEMBER(pacman_state::epos_decryption_w)
+{
+ if (offset & 0x01)
+ {
+ m_counter = (m_counter - 1) & 0x0F;
+ }
+ else
+ {
+ m_counter = (m_counter + 1) & 0x0F;
+ }
+
+ switch (m_counter)
+ {
+ case 0x08:
+ case 0x09:
+ case 0x0A:
+ case 0x0B:
+ membank("bank1")->set_entry(m_counter & 3);
+ break;
+
+ default:
+ logerror("Invalid counter = %02X\n", m_counter);
+ break;
+ }
+
+ return 0;
+}
+
+static void epos_decrypt_rom(uint8_t *ROM, uint8_t invert, int offset, int *bs)
+{
+ for (int mem = 0; mem < 0x4000; mem++ )
+ {
+ ROM[mem + offset] = BITSWAP8(ROM[mem] ^ invert, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]);
+ }
+}
+
+
+/*
+
+The Glob protection description:
+
+The Glob is designed to run on modified Pacman hardware. It contains
+two graphics ROMs at 5E and 5F, but contains code ROMs on a daughterboard
+similar in concept to Ms. Pacman. However, these code ROMs are decrypted
+through additional circuitry. The daughterboard was encased in epoxy.
+
+Here's a description of the protection as best as I can give it.
+
+1) The decrypted D0 bit fed to the CPU is simply an inversion of the
+D5 bit from the code ROMs.
+2) The decrypted D1 bit fed to the CPU is simply an inversion of the
+D2 bit from the code ROMs.
+3) The other 6 data bits are decrypted by a 10H8 PAL. The PAL also
+takes as input a 4-bit counter. The counter is incremented and
+decremented as follows:
+- the Z-80 command IN($xx) where xx is an odd number decrements the
+counter; an even number increments the counter.
+Ex: IN($64) would increment the counter, IN($6B) would decrement
+the counter.
+4) The PAL output also contains the two ROM enable lines used to enable
+the two encrypted code ROMs. As long as the system is working
+correctly, these ROMs will always be enabled.
+
+As it so happens, only four counter values are ever used, which is
+fortunate because the PAL only contains signals to enable the ROMs for
+those four counter values. The valid counter values are $8, $9, $A, and
+$B. The counter's intial value is $A, which is set by jumpers on the
+daughterboard. Following is a description of the resulting decryptions
+for these four counter states.
+
+COUNTER ENCRYPTED DECRYPTED
+VALUE VALUE
+
+DDDDDDDD DDDDDDDD
+76543210 76543210
+
+Counter = 8: abcdefgh EAhBDgFC
+Counter = 9: abcdefgh FAgeDBFC
+Counter = A: abcdefgh EHDBagFC
+Counter = B: abcdefgh GHDEaBFC
+
+In the above diagram, capital letters represent inverted bits. Notice
+that bits D2 and D5 are the same independent of counter state, this is
+because these bits are not decrypted by the PAL.
+
+
+In the code below, all four of these decryption patterns are used to
+decrypt the entire code ROMs before execution. This is done for speed,
+since we can then just bankswitch between the decrypted code sets on
+each IN($xx) command, as opposed to dynamically decrypting every byte.
+
+- Mike Balfour (mab22@po.cwru.edu)
+
+*/
+
+MACHINE_START_MEMBER(pacman_state, theglobp)
+{
+ /* Note: D2 is inverted and connected to D1, D5 is inverted and
+ connected to D0. The other six data bits are converted by a
+ PAL10H8 driven by the counter. */
+
+ int bs[4][8] = {
+ { 3,7,0,6,4,1,2,5 },
+ { 1,7,0,3,4,6,2,5 },
+ { 3,0,4,6,7,1,2,5 },
+ { 1,0,4,3,7,6,2,5 },
+ };
+
+ /* While the PAL supports up to 16 decryption methods, only four
+ are actually used in the PAL. Therefore, we'll take a little
+ memory overhead and decrypt the ROMs using each method in advance. */
+
+ uint8_t *ROM = memregion("maincpu")->base();
+ epos_decrypt_rom(ROM, 0xfc, 0x10000, bs[0]);
+ epos_decrypt_rom(ROM, 0xf6, 0x14000, bs[1]);
+ epos_decrypt_rom(ROM, 0x7d, 0x18000, bs[2]);
+ epos_decrypt_rom(ROM, 0x77, 0x1c000, bs[3]);
+
+ membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
+
+ save_item(NAME(m_counter));
+}
+
+MACHINE_RESET_MEMBER(pacman_state, theglobp)
+{
+ m_counter = 0x0A;
+ membank("bank1")->set_entry(m_counter & 3);
+}
+
+/*
+
+Same Epos board as usual(theglobp,beastf,street heat). This is fairly easy to decrypt since it has consecutive bytes with the same algorithym. There are 4 different algorithyms. One consists almost entirely of text, one contains the majority of code and the remaining 2 are not used much and are therefore the most difficult. It is however difficult to decrypt to rom. The data for the coin sound is actually program code in a different phase. You need to move the sound tables and add a rom to get it to run without the daughterboard.
+
+acitya contains a bug with the insurance in blackjack. It's impossible to collect, so it's likely that acitya is earlier than bwcasino.
+
+I don't think this game is a gambling game. For one thing there's no real output hardware on a pacman board and the epos daughterboard doesn't contain any either.
+
+David Widel d_widel@hotmail.com
+
+*/
+
+MACHINE_START_MEMBER(pacman_state, acitya)
+{
+ /* Note: D2 is inverted and connected to D1, D5 is inverted and
+ connected to D0. The other six data bits are converted by a
+ PAL10H8 driven by the counter. */
+
+ int bs[4][8] = {
+ { 1,6,7,3,4,0,2,5 },
+ { 7,6,1,3,4,0,2,5 },
+ { 1,0,7,6,4,3,2,5 },
+ { 7,0,1,6,4,3,2,5 },
+ };
+
+ /* While the PAL supports up to 16 decryption methods, only four
+ are actually used in the PAL. Therefore, we'll take a little
+ memory overhead and decrypt the ROMs using each method in advance. */
+
+ uint8_t *ROM = memregion("maincpu")->base();
+ epos_decrypt_rom(ROM, 0xb5, 0x10000, bs[0]);
+ epos_decrypt_rom(ROM, 0xa7, 0x14000, bs[1]);
+ epos_decrypt_rom(ROM, 0xfc, 0x18000, bs[2]);
+ epos_decrypt_rom(ROM, 0xee, 0x1c000, bs[3]);
+
+ membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
+
+ save_item(NAME(m_counter));
+}
+
+MACHINE_RESET_MEMBER(pacman_state, acitya)
+{
+ m_counter = 0x0B;
+ membank("bank1")->set_entry(m_counter & 3);
+}
+
+
+MACHINE_START_MEMBER(pacman_state, eeekk)
+{
+ /* Note: D2 is inverted and connected to D1, D5 is inverted and
+ connected to D0. The other six data bits are converted by a
+ PAL10H8 driven by the counter. */
+
+ int bs[4][8] = {
+ { 7,6,1,3,0,4,2,5 },
+ { 7,1,4,3,0,6,2,5 },
+ { 7,6,1,0,3,4,2,5 },
+ { 7,1,4,0,3,6,2,5 },
+ };
+
+ /* While the PAL supports up to 16 decryption methods, only four
+ are actually used in the PAL. Therefore, we'll take a little
+ memory overhead and decrypt the ROMs using each method in advance. */
+
+ uint8_t *ROM = memregion("maincpu")->base();
+ epos_decrypt_rom(ROM, 0xfd, 0x10000, bs[0]);
+ epos_decrypt_rom(ROM, 0xbf, 0x14000, bs[1]);
+ epos_decrypt_rom(ROM, 0x75, 0x18000, bs[2]);
+ epos_decrypt_rom(ROM, 0x37, 0x1c000, bs[3]);
+
+ membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
+
+ save_item(NAME(m_counter));
+}
+
+MACHINE_RESET_MEMBER(pacman_state, eeekk)
+{
+ m_counter = 0x09;
+ membank("bank1")->set_entry(m_counter & 3);
+}
diff --git a/src/mame/machine/theglobp.h b/src/mame/machine/epos.h
index 6d2f3b8a4dd..6d2f3b8a4dd 100644
--- a/src/mame/machine/theglobp.h
+++ b/src/mame/machine/epos.h
diff --git a/src/mame/machine/iteagle_fpga.cpp b/src/mame/machine/iteagle_fpga.cpp
index 06a2af0170e..b36ed16b12d 100644
--- a/src/mame/machine/iteagle_fpga.cpp
+++ b/src/mame/machine/iteagle_fpga.cpp
@@ -10,10 +10,30 @@
#define LOG_EEPROM (0)
#define LOG_PERIPH (0)
+#define AM85C30_TAG "am85c30_0"
+#define COM1_TAG "com1"
+#define COM2_TAG "com2"
+
const device_type ITEAGLE_FPGA = &device_creator<iteagle_fpga_device>;
MACHINE_CONFIG_FRAGMENT(iteagle_fpga)
MCFG_NVRAM_ADD_0FILL("eagle2_rtc")
+ // RS232 serial ports
+ //MCFG_SCC85C30_ADD(AM85C30_TAG, XTAL_7_3728MHz, XTAL_1_8432MHz, 0, XTAL_1_8432MHz, 0)
+ MCFG_SCC85C30_ADD(AM85C30_TAG, XTAL_1_8432MHz, XTAL_1_8432MHz, 0, XTAL_1_8432MHz, 0)
+ MCFG_Z80SCC_OUT_INT_CB(WRITELINE(iteagle_fpga_device, serial_interrupt))
+ MCFG_Z80SCC_OUT_TXDA_CB(DEVWRITELINE(COM2_TAG, rs232_port_device, write_txd))
+ MCFG_Z80SCC_OUT_TXDB_CB(DEVWRITELINE(COM1_TAG, rs232_port_device, write_txd))
+
+ MCFG_RS232_PORT_ADD(COM1_TAG, default_rs232_devices, nullptr)
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, rxb_w))
+ MCFG_RS232_DCD_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, dcdb_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, ctsb_w))
+
+ MCFG_RS232_PORT_ADD(COM2_TAG, default_rs232_devices, nullptr)
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, rxa_w))
+ MCFG_RS232_DCD_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, dcda_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE(AM85C30_TAG, scc85C30_device, ctsa_w))
MACHINE_CONFIG_END
DEVICE_ADDRESS_MAP_START(fpga_map, 32, iteagle_fpga_device)
@@ -30,7 +50,7 @@ ADDRESS_MAP_END
iteagle_fpga_device::iteagle_fpga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_device(mconfig, ITEAGLE_FPGA, "ITEagle FPGA", tag, owner, clock, "iteagle_fpga", __FILE__),
- m_rtc(*this, "eagle2_rtc"), m_version(0), m_seq_init(0)
+ m_rtc(*this, "eagle2_rtc"), m_scc1(*this, AM85C30_TAG), m_version(0), m_seq_init(0)
{
}
@@ -167,6 +187,27 @@ void iteagle_fpga_device::device_timer(emu_timer &timer, device_timer_id tid, in
}
+WRITE_LINE_MEMBER(iteagle_fpga_device::serial_interrupt)
+{
+ if (LOG_SERIAL) {
+ osd_printf_info("iteagle_fpga_device::serial_interrupt: intr(%i) = %i\n", m_serial_irq_num, state);
+ logerror("serial_interrupt: intr(%i) = %i\n", m_serial_irq_num, state);
+ }
+ m_cpu->set_input_line(m_serial_irq_num, state);
+}
+
+WRITE8_MEMBER(iteagle_fpga_device::serial_rx_w)
+{
+ std::string tmpStr;
+ tmpStr += data;
+ //osd_printf_info("serial_rx_w: %02x\n", data);
+ m_serial0_1.write_rx_str(1, tmpStr);
+ if (0 && m_serial0_1.check_interrupt()) {
+ osd_printf_info("serial_rx_w: %02x\n", data);
+ m_cpu->set_input_line(m_serial_irq_num, ASSERT_LINE);
+ }
+}
+
READ32_MEMBER( iteagle_fpga_device::fpga_r )
{
uint32_t result = m_fpga_regs[offset];
@@ -179,7 +220,7 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
break;
case 0x04/4:
result = (result & 0xFF0FFFFF) | ((machine().root_device().ioport("SW5")->read()&0xf)<<20);
- if (LOG_FPGA && !ACCESSING_BITS_0_7)
+ if (0 && LOG_FPGA && !ACCESSING_BITS_0_7)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x08/4:
@@ -200,21 +241,25 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
case 0x0c/4: //
result = 0;
if (ACCESSING_BITS_0_7) {
- result |= m_serial0_1.read_control(1) << 0;
+ result |= m_scc1->cb_r(space, offset) << 0;
+ if (LOG_SERIAL) m_serial0_1.read_control(1);
}
if (ACCESSING_BITS_8_15) {
- result |= m_serial0_1.read_control(0) << 8;
+ result |= m_scc1->ca_r(space, offset) << 8;
+ if (LOG_SERIAL) m_serial0_1.read_control(0);
}
if (ACCESSING_BITS_16_23) {
- result |= m_serial0_1.read_data(1) << 16;
+ result |= m_scc1->db_r(space, offset) <<16;
+ if (LOG_SERIAL) m_serial0_1.read_data(1);
}
if (ACCESSING_BITS_24_31) {
- result |= m_serial0_1.read_data(0) << 24;
+ result |= m_scc1->da_r(space, offset) << 24;
+ if (LOG_SERIAL) m_serial0_1.read_data(0);
}
if (1 && LOG_FPGA)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
- case 0x1c/4: // 1d = modem byte
+ case 0x1c/4:
result = 0;
if (ACCESSING_BITS_0_7) {
result |= m_serial2_3.read_control(1) << 0;
@@ -224,12 +269,10 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
}
if (ACCESSING_BITS_16_23) {
result |= m_serial2_3.read_data(1) << 16;
- // MODEM
- logerror("fpga_r: LEDSIGN read byte: %c\n", (result >> 16) & 0xff);
+ logerror("fpga_r: LEDSIGN read byte: %02X\n", uint8_t(result >> 16));
}
if (ACCESSING_BITS_24_31) {
result |= m_serial2_3.read_data(0) << 24;
- // LED Sign
logerror("fpga_r: MODEM read byte: %c\n", (result >> 24) & 0xff);
}
// Clear interrupts
@@ -297,23 +340,34 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
break;
case 0x0c/4:
if (ACCESSING_BITS_0_7) {
- m_serial0_1.write_control((data >> 0) & 0xff, 1);
+ m_scc1->cb_w(space, offset, (data >> 0) & 0xff);
+ if (LOG_SERIAL) m_serial0_1.write_control((data >> 0) & 0xff, 1);
}
if (ACCESSING_BITS_8_15) {
- m_serial0_1.write_control((data >> 8) & 0xff, 0);
+ m_scc1->ca_w(space, offset, (data >> 8) & 0xff);
+ if (LOG_SERIAL) m_serial0_1.write_control((data >> 8) & 0xff, 0);
}
if (ACCESSING_BITS_16_23) {
- m_serial0_1.write_data((data >> 16) & 0xff, 1);
- if (m_serial0_1.get_tx_str(1).back() == 0xd) {
- if (LOG_SERIAL) logerror("com0: %s\n", m_serial0_1.get_tx_str(1).c_str());
- osd_printf_debug("com0: %s\n", m_serial0_1.get_tx_str(1).c_str());
- m_serial0_1.clear_tx_str(1);
+ // Convert 0xd to 0xa
+ uint8_t byte = data >> 16;
+ if (byte==0xd)
+ m_scc1->db_w(space, offset, 0xa);
+ else
+ m_scc1->db_w(space, offset, byte);
+ if (LOG_SERIAL) {
+ m_serial0_1.write_data((data >> 16) & 0xff, 1);
+ if (m_serial0_1.get_tx_str(1).back() == 0xd) {
+ logerror("com0: %s", m_serial0_1.get_tx_str(1).c_str());
+ osd_printf_info("com0: %s\n", m_serial0_1.get_tx_str(1).c_str());
+ m_serial0_1.clear_tx_str(1);
+ }
}
}
if (ACCESSING_BITS_24_31) {
- m_serial0_1.write_data((data >> 24) & 0xff, 0);
+ m_scc1->da_w(space, offset, (data >> 24) & 0xff);
+ if (LOG_SERIAL) m_serial0_1.write_data((data >> 24) & 0xff, 0);
}
- if (0 && LOG_FPGA)
+ if (1 && LOG_FPGA)
logerror("%s:fpga_w offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
break;
case 0x1c/4:
@@ -326,12 +380,28 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
if (ACCESSING_BITS_16_23) {
int chan = 1;
m_serial2_3.write_data((data >> 16) & 0xff, chan);
- if (m_serial2_3.get_tx_str(chan).length() == 8) {
- if (LOG_SERIAL) logerror("com2: %s\n", m_serial2_3.get_tx_str(chan).c_str());
- osd_printf_debug("com2: %s\n", m_serial2_3.get_tx_str(chan).c_str());
- m_serial2_3.clear_tx_str(chan);
- // Set Response
- m_serial2_3.write_rx_str(chan, "\x08");
+ std::string txString = m_serial2_3.get_tx_str(chan);
+ if (txString.length() >= 8) {
+ int length = (uint8_t(txString[4]) << 8) | uint8_t(txString[5]);
+ if (txString.length() >= length) {
+ osd_printf_debug("com2:");
+ if (LOG_SERIAL) logerror("com2:\n");
+ for (int i = 0; i < txString.length(); i++) {
+ if (LOG_SERIAL) logerror(" %02x", uint8_t(txString[i]));
+ osd_printf_debug(" %02x", uint8_t(txString[i]));
+ if ((i + 1) % 16 == 0 || i==length-1) {
+ osd_printf_debug("\n");
+ if (LOG_SERIAL) logerror("\n");
+ }
+ }
+ osd_printf_debug("\n");
+ // Set Sign Response ACK
+ //if (txString[0]==0x01 || txString[0] == 0x23)
+ m_serial2_3.write_rx_str(chan, "\x10");
+ // Clear string
+ m_serial2_3.clear_tx_str(chan);
+ txString.clear();
+ }
}
}
if (ACCESSING_BITS_24_31) {
@@ -386,8 +456,8 @@ void iteagle_am85c30::write_control(uint8_t data, int channel)
// Reset address pointer to 0
if (addr != 0) {
m_wr_regs[channel][0] = 0;
- // Mirror wr2 to rr2
- m_rr_regs[channel][2] = m_wr_regs[channel][2];
+ // Mirror wr2 to rr2[chan0]
+ m_rr_regs[0][2] = m_wr_regs[channel][2];
}
}
@@ -413,7 +483,7 @@ void iteagle_am85c30::write_data(uint8_t data, int channel)
m_rr_regs[1][3] = m_rr_regs[0][3];
}
// Limit length
- if (m_serial_tx[channel].size() >= 160) {
+ if (m_serial_tx[channel].size() >= 4000) {
if (LOG_SERIAL) printf("%s\n", m_serial_tx[channel].c_str());
osd_printf_debug("%s\n", m_serial_tx[channel].c_str());
m_serial_tx[channel].clear();
@@ -547,6 +617,7 @@ iteagle_eeprom_device::iteagle_eeprom_device(const machine_config &mconfig, cons
// 0x4 = HW Version - 6-8 is GREEN board PCB, 9 is RED board PCB
// 0x5 = Serial Num + top byte of 0x4
// 0x6 = OperID
+ // 0xd = GT Fore Tournament Board
// 0xe = SW Version
// 0xf = 0x01 for extra courses
// 0x3e = 0x0002 for good nvram
@@ -554,7 +625,7 @@ iteagle_eeprom_device::iteagle_eeprom_device(const machine_config &mconfig, cons
m_iteagle_default_eeprom =
{ {
0xd000,0x0022,0x0000,0x0003,0x1209,0x1111,0x2222,0x1234,
- 0x0000,0x0000,0x0000,0x0000,0xcd00,0x0000,0x0000,0x0001,
+ 0x0000,0x0000,0x0000,0x0000,0xcd00,0x0001,0x0000,0x0001,
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
diff --git a/src/mame/machine/iteagle_fpga.h b/src/mame/machine/iteagle_fpga.h
index edc56984aab..f0cef354373 100644
--- a/src/mame/machine/iteagle_fpga.h
+++ b/src/mame/machine/iteagle_fpga.h
@@ -9,6 +9,8 @@
#include "machine/pci.h"
#include "machine/nvram.h"
#include "machine/eepromser.h"
+#include "machine/z80scc.h"
+#include "bus/rs232/rs232.h"
//MCFG_PCI_DEVICE_ADD(_tag, _type, _main_id, _revision, _pclass, _subsystem_id)
@@ -57,11 +59,15 @@ public:
virtual machine_config_constructor device_mconfig_additions() const override;
required_device<nvram_device> m_rtc;
+ required_device<scc85C30_device> m_scc1;
void set_init_info(int version, int seq_init) {m_version=version; m_seq_init=seq_init;}
void set_irq_info(const char *tag, const int irq_num, const int serial_num) {
m_cpu_tag = tag; m_irq_num = irq_num; m_serial_irq_num = serial_num;}
+ DECLARE_WRITE_LINE_MEMBER(serial_interrupt);
+ DECLARE_WRITE8_MEMBER(serial_rx_w);
+
protected:
virtual void device_start() override;
virtual void device_reset() override;
diff --git a/src/mame/machine/konamigx.cpp b/src/mame/machine/konamigx.cpp
index 4889cbb8f87..27957653f7b 100644
--- a/src/mame/machine/konamigx.cpp
+++ b/src/mame/machine/konamigx.cpp
@@ -468,6 +468,7 @@ if((data1=obj[0])&0x80000000)\
void konamigx_state::fantjour_dma_install()
{
save_item(NAME(m_fantjour_dma));
+ save_item(NAME(m_prot_data));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xdb0000, 0xdb001f, write32_delegate(FUNC(konamigx_state::fantjour_dma_w),this));
memset(m_fantjour_dma, 0, sizeof(m_fantjour_dma));
}
diff --git a/src/mame/machine/leland.cpp b/src/mame/machine/leland.cpp
index 6f844c9dd11..ae9972572be 100644
--- a/src/mame/machine/leland.cpp
+++ b/src/mame/machine/leland.cpp
@@ -385,7 +385,7 @@ MACHINE_START_MEMBER(leland_state,ataxx)
/* start scanline interrupts going */
m_master_int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(leland_state::ataxx_interrupt_callback),this));
-
+
save_item(NAME(m_wcol_enable));
save_item(NAME(m_dial_last_input));
save_item(NAME(m_dial_last_result));
diff --git a/src/mame/machine/m2comm.h b/src/mame/machine/m2comm.h
index 1d5b64ca0ab..0b9cc9731fb 100644
--- a/src/mame/machine/m2comm.h
+++ b/src/mame/machine/m2comm.h
@@ -55,9 +55,9 @@ protected:
private:
uint8_t m_shared[0x4000]; // 16k shared memory
- uint8_t m_zfg; // z80 flip gate - bit 0 switches memory banks, bit7 is connected to FG bit 0
- uint8_t m_cn; // bit0 is used to enable/disable the comm board
- uint8_t m_fg; // i960 flip gate - bit0 is stored, bit7 is connected to ZFG bit 0
+ uint8_t m_zfg; // z80 flip gate - bit 0 switches memory banks, bit7 is connected to FG bit 0
+ uint8_t m_cn; // bit0 is used to enable/disable the comm board
+ uint8_t m_fg; // i960 flip gate - bit0 is stored, bit7 is connected to ZFG bit 0
emu_file m_line_rx; // rx line - can be either differential, simple serial or toslink
emu_file m_line_tx; // tx line - is differential, simple serial and toslink
diff --git a/src/mame/machine/midwayic.cpp b/src/mame/machine/midwayic.cpp
index 52247aac96a..0efddc94174 100644
--- a/src/mame/machine/midwayic.cpp
+++ b/src/mame/machine/midwayic.cpp
@@ -91,7 +91,7 @@ void midway_serial_pic_device::generate_serial_data(int upper)
/*************************************
*
* Original serial number PIC
- * interface
+ * interface - simulation
*
*************************************/
@@ -113,7 +113,7 @@ const device_type MIDWAY_SERIAL_PIC = &device_creator<midway_serial_pic_device>;
//-------------------------------------------------
midway_serial_pic_device::midway_serial_pic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- device_t(mconfig, MIDWAY_SERIAL_PIC2, "Midway Serial Pic", tag, owner, clock, "midway_serial_pic", __FILE__),
+ device_t(mconfig, MIDWAY_SERIAL_PIC2, "Midway Serial Pic Simulation", tag, owner, clock, "midway_serial_pic_sim", __FILE__),
m_upper(0),
m_buff(0),
m_idx(0),
@@ -192,6 +192,91 @@ WRITE8_MEMBER(midway_serial_pic_device::write)
}
+/*************************************
+ *
+ * Original serial number PIC
+ * interface - emulation
+ *
+ *************************************/
+
+
+const device_type MIDWAY_SERIAL_PIC_EMU = &device_creator<midway_serial_pic_emu_device>;
+
+
+//-------------------------------------------------
+// midway_serial_pic_emu_device - constructor
+//-------------------------------------------------
+
+midway_serial_pic_emu_device::midway_serial_pic_emu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, MIDWAY_SERIAL_PIC_EMU, "Midway Serial Pic Emulation", tag, owner, clock, "midway_serial_pic_emu", __FILE__)
+{
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void midway_serial_pic_emu_device::device_start()
+{
+}
+
+
+READ_LINE_MEMBER(midway_serial_pic_emu_device::PIC16C5X_T0_clk_r)
+{
+// printf("%s: PIC16C5X_T0_clk_r\n", machine().describe_context());
+ return 0;
+}
+
+READ8_MEMBER(midway_serial_pic_emu_device::read_a)
+{
+// printf("%s: read_a\n", space.machine().describe_context());
+ return 0x00;
+}
+
+READ8_MEMBER(midway_serial_pic_emu_device::read_b)
+{
+// printf("%s: read_b\n", space.machine().describe_context());
+ return 0x00;
+}
+
+READ8_MEMBER(midway_serial_pic_emu_device::read_c)
+{
+// used
+// printf("%s: read_c\n", space.machine().describe_context());
+ return 0x00;
+}
+
+WRITE8_MEMBER(midway_serial_pic_emu_device::write_a)
+{
+// printf("%s: write_a %02x\n", space.machine().describe_context(), data);
+}
+
+WRITE8_MEMBER(midway_serial_pic_emu_device::write_b)
+{
+// printf("%s: write_b %02x\n", space.machine().describe_context(), data);
+}
+
+WRITE8_MEMBER(midway_serial_pic_emu_device::write_c)
+{
+// used
+// printf("%s: write_c %02x\n", space.machine().describe_context(), data);
+}
+
+static MACHINE_CONFIG_FRAGMENT( midway_pic )
+ MCFG_CPU_ADD("pic", PIC16C57, 12000000) /* ? Mhz */
+ MCFG_PIC16C5x_WRITE_A_CB(WRITE8(midway_serial_pic_emu_device, write_a))
+ MCFG_PIC16C5x_READ_B_CB(READ8(midway_serial_pic_emu_device, read_b))
+ MCFG_PIC16C5x_WRITE_B_CB(WRITE8(midway_serial_pic_emu_device, write_b))
+ MCFG_PIC16C5x_READ_C_CB(READ8(midway_serial_pic_emu_device, read_c))
+ MCFG_PIC16C5x_WRITE_C_CB(WRITE8(midway_serial_pic_emu_device, write_c))
+ MCFG_PIC16C5x_T0_CB(READLINE(midway_serial_pic_emu_device, PIC16C5X_T0_clk_r))
+MACHINE_CONFIG_END
+
+machine_config_constructor midway_serial_pic_emu_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( midway_pic );
+}
+
/*************************************
*
@@ -593,6 +678,7 @@ const device_type MIDWAY_IOASIC = &device_creator<midway_ioasic_device>;
midway_ioasic_device::midway_ioasic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
midway_serial_pic2_device(mconfig, MIDWAY_IOASIC, "Midway IOASIC", tag, owner, clock, "midway_ioasic", __FILE__),
+ m_serial_tx_cb(*this),
m_has_dcs(0),
m_has_cage(0),
m_dcs_cpu(nullptr),
@@ -657,6 +743,7 @@ void midway_ioasic_device::device_start()
m_shuffle_map = &shuffle_maps[m_shuffle_type][0];
// resolve callbacks
m_irq_callback.resolve_safe();
+ m_serial_tx_cb.resolve_safe();
/* initialize the PIC */
midway_serial_pic2_device::device_start();
@@ -1028,6 +1115,12 @@ WRITE32_MEMBER( midway_ioasic_device::packed_w )
write(space, offset*2+1, data >> 16, 0x0000ffff);
}
+WRITE8_MEMBER(midway_ioasic_device::serial_rx_w)
+{
+ m_reg[IOASIC_UARTIN] = data | 0x1000;
+ update_ioasic_irq();
+
+}
WRITE32_MEMBER( midway_ioasic_device::write )
{
@@ -1068,8 +1161,13 @@ WRITE32_MEMBER( midway_ioasic_device::write )
m_reg[IOASIC_UARTIN] = (newreg & 0x00ff) | 0x1000;
update_ioasic_irq();
}
- else if (PRINTF_DEBUG)
- osd_printf_debug("%c", data & 0xff);
+ else {
+ m_serial_tx_cb(data & 0xff);
+ if (PRINTF_DEBUG) {
+ osd_printf_info("%c", data & 0xff);
+ logerror("%c", data & 0xff);
+ }
+ }
break;
case IOASIC_SOUNDCTL:
@@ -1124,7 +1222,7 @@ WRITE32_MEMBER( midway_ioasic_device::write )
/* bit 6 = sound input buffer full */
/* bit 7 = sound output buffer empty */
/* bit 14 = LED? */
- if ((oldreg ^ newreg) & 0x3ff6)
+ if (LOG_IOASIC && ((oldreg ^ newreg) & 0x3ff6))
logerror("IOASIC int control = %04X\n", data);
update_ioasic_irq();
break;
diff --git a/src/mame/machine/midwayic.h b/src/mame/machine/midwayic.h
index 707988ce60e..ddca0ab843d 100644
--- a/src/mame/machine/midwayic.h
+++ b/src/mame/machine/midwayic.h
@@ -11,8 +11,9 @@
#include "audio/cage.h"
#include "audio/dcs.h"
+#include "cpu/pic16c5x/pic16c5x.h"
-/* 1st generation Midway serial PIC */
+/* 1st generation Midway serial PIC - simulation*/
class midway_serial_pic_device : public device_t
{
@@ -52,6 +53,41 @@ extern const device_type MIDWAY_SERIAL_PIC;
#define MCFG_MIDWAY_SERIAL_PIC_UPPER(_upper) \
midway_serial_pic_device::static_set_upper(*device, _upper);
+/* 1st generation Midway serial PIC - emulation */
+
+class midway_serial_pic_emu_device : public device_t
+{
+public:
+ // construction/destruction
+ midway_serial_pic_emu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ midway_serial_pic_emu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+
+ DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
+ DECLARE_READ8_MEMBER(read_a);
+ DECLARE_READ8_MEMBER(read_b);
+ DECLARE_READ8_MEMBER(read_c);
+ DECLARE_WRITE8_MEMBER(write_a);
+ DECLARE_WRITE8_MEMBER(write_b);
+ DECLARE_WRITE8_MEMBER(write_c);
+
+
+
+
+protected:
+ // device-level overrides
+ virtual machine_config_constructor device_mconfig_additions() const override;
+ virtual void device_start() override;
+
+private:
+
+};
+
+
+// device type definition
+extern const device_type MIDWAY_SERIAL_PIC_EMU;
+
+
+
/* 2nd generation Midway serial/NVRAM/RTC PIC */
// ======================> midway_serial_pic2_device
@@ -125,6 +161,7 @@ public:
static void static_set_shuffle_default(device_t &device, uint8_t shuffle) { downcast<midway_ioasic_device &>(device).m_shuffle_default = shuffle; }
static void static_set_auto_ack(device_t &device, uint8_t auto_ack) { downcast<midway_ioasic_device &>(device).m_auto_ack = auto_ack; }
template<class _Object> static devcb_base &set_irqhandler_callback(device_t &device, _Object object) { return downcast<midway_ioasic_device &>(device).m_irq_callback.set_callback(object); }
+ template<class _Object> static devcb_base &set_serial_tx_callback(device_t &device, _Object object) { return downcast<midway_ioasic_device &>(device).m_serial_tx_cb.set_callback(object); }
void set_shuffle_state(int state);
void fifo_w(uint16_t data);
@@ -145,6 +182,8 @@ public:
DECLARE_WRITE8_MEMBER(cage_irq_handler);
+ DECLARE_WRITE8_MEMBER(serial_rx_w);
+
void ioasic_reset();
protected:
@@ -155,6 +194,7 @@ private:
void ioasic_register_state();
void update_ioasic_irq();
+ devcb_write8 m_serial_tx_cb;
uint32_t m_reg[16];
uint8_t m_has_dcs;
@@ -200,6 +240,9 @@ extern const device_type MIDWAY_IOASIC;
#define MCFG_MIDWAY_IOASIC_AUTO_ACK(_ack) \
midway_ioasic_device::static_set_auto_ack(*device, _ack);
+#define MCFG_MIDWAY_IOASIC_OUT_TX_CB(_devcb) \
+ devcb = &midway_ioasic_device::set_serial_tx_callback(*device, DEVCB_##_devcb);
+
enum
{
diff --git a/src/mame/machine/midwunit.cpp b/src/mame/machine/midwunit.cpp
index 4ae8a44fe86..730ca5f49f8 100644
--- a/src/mame/machine/midwunit.cpp
+++ b/src/mame/machine/midwunit.cpp
@@ -89,7 +89,7 @@ WRITE16_MEMBER(midwunit_state::midwunit_io_w)
m_dcs->reset_w(newword & 0x10);
/* bit 5 (active low) reset security chip */
- m_midway_serial_pic->reset_w(newword & 0x20);
+ if (m_midway_serial_pic) m_midway_serial_pic->reset_w(newword & 0x20);
break;
case 3:
@@ -127,8 +127,12 @@ READ16_MEMBER(midwunit_state::midwunit_io_r)
return m_ports[offset]->read();
case 4:
- return (m_midway_serial_pic->status_r(space,0) << 12) | midwunit_sound_state_r(space,0,0xffff);
+ {
+ int picret = 0;
+ if (m_midway_serial_pic) picret = m_midway_serial_pic->status_r(space, 0);
+ return (picret << 12) | midwunit_sound_state_r(space, 0, 0xffff);
+ }
default:
logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset);
break;
@@ -357,14 +361,18 @@ MACHINE_RESET_MEMBER(midwunit_state,midwunit)
READ16_MEMBER(midwunit_state::midwunit_security_r)
{
- return m_midway_serial_pic->read(space,0);
+ uint16_t picret = 0;
+ if (m_midway_serial_pic) picret = m_midway_serial_pic->read(space, 0);
+ return picret;
}
WRITE16_MEMBER(midwunit_state::midwunit_security_w)
{
if (offset == 0 && ACCESSING_BITS_0_7)
- m_midway_serial_pic->write(space, 0, data);
+ {
+ if (m_midway_serial_pic) m_midway_serial_pic->write(space, 0, data);
+ }
}
diff --git a/src/mame/machine/mzr8105.cpp b/src/mame/machine/mzr8105.cpp
new file mode 100644
index 00000000000..4e645c3acf5
--- /dev/null
+++ b/src/mame/machine/mzr8105.cpp
@@ -0,0 +1,192 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/***************************************************************************
+ *
+ * Mizar VME8105 rev D 3U SBC board driver
+ *
+ * 19/08/2015
+ *
+ * I baught this board from http://www.retrotechnology.com without documentation.
+ * It has a Motorola 68000 CPU @ 10MHz and two 27128 EPROMS with OS9 DEBUG labels
+ * and not much more except 16 or so TTLs, 2 PALs and a VME P1 connector. It is a
+ * 2 layered pcb so it shold be possible to trace the schematics quite easily.
+ * There is a date on the P1 Connector: "Feb 20 1987"
+ *
+ * ||
+ * ||
+ * ||
+ * ||
+ * ||____________________________________________________________ ___
+ * || --------------K2|U6-7432|U7-7474|U14-7405|U21-74645 | |_| |
+ * || | 2764 - low |-+-------+-------+--------+-----------+ | | |
+ * || | OS9 DEBUG U4| +---------+ +--------+---------+ | | |
+ * || -------------- | | |U13-7474|U20-74645| | | |
+ * || ______________ | | +--------+---------+ | | |
+ * || | | | | ______________K4____ | | |
+ * || | U3| | | |U12-7438|U19-74244| | |VME|
+ * || -------------- | |+------K6---------K3---+ | | |
+ * || ______________ | ||U11-PAL20L10|U18-74244| | |P1 |
+ * || | 2764 - high | | |+-----021102-+---------+ | | |
+ * || | OS9 DEBUG U2| |MC68000L10+------------+---------+ | | |
+ * || |______________| | ||U10-PAL14L4 |U17-74244| | | |
+ * || | |+-----021001-+---------+ | | |
+ * || -------------- | |+----+_______|U16-74244|+--+| | |
+ * || | | | |XTAL |U9-7410+---------+| || | |
+ * ||K1 | U1| | |FOX100-------+---------+|K5||_| |
+ * || -------------- |_________|10MHz|U8-7404|U15-74148|| || |___|
+ * ||--||--------------------------------+----+-------+---------++--+
+ * ||--||
+ * ||
+ *
+ * PAL:s
+ *------
+ * The board has two PAL:s, a PAL20L10 and a PAL14L4.
+ *
+ * _____ _____
+ * OD/CLK 1 |* \_/ | 20 VCC
+ * CPU A13 I0 2 | | 19 O0/LR A23
+ * U9 7410p12 I1 3 | | 18 O1/A0 A22
+ * CPU *AS I2 4 | | 17 02/A1 U2/U4 2764p22 *OE
+ * GND I3 5 | | 16 03/A2 U11 PAL20L10p6 I4
+ * CPU A14 I4 6 | U10 | 15 A0/O0 U11 PAL20L10p7 I5
+ * CPU A15 I5 7 | PAL14L4 | 14 A1/O1 U19 74LS244p11 I0b
+ * CPU A16 I6 8 | | 13 A2/O2 A18
+ * CPU A17 I7 9 | | 12 LR/O3 A20
+ * GND 10 |_____________| 11 CLK/OD A21
+ *
+ * _____ _____
+ * OD/CLK 1 |* \_/ | 24 VCC
+ * I0 2 | | 23 O0/LR
+ * CPU *AS I1 3 | | 22 O1/A0
+ * U10 PAL14L4p3 I2 4 | | 21 02/A1
+ * I3 5 | | 20 03/A2
+ * U10 PAL14L4p16 I4 6 | U10 | 19 04/NC
+ * U10 PAL14L4p15 I5 7 | PAL20L10 | 18 NC/O0
+ * I6 8 | | 17 A2/O1
+ * I7 9 | | 16 A1/O2
+ * I8 10 | | 15 A0/O3
+ * I9 11 | | 14 LR/O4
+ * GND 12 |_____________| 13 CLK/OD
+ *
+ * Trace is not fully completed and validated.
+ *
+ * History of Mizar
+ *-------------------
+ * Mizar was one of the first companies that released VME boards in 1982-3 together with
+ * Force Computers and Motorola. Their systems was often supported by OS9/68000 from Microware.
+ * In 1993 Mizar discontinued their OS9/CPU board product range and focused entirely on DSP
+ * boards. RTSI was founded by Mizar employees preserving the knowledge in OS9 as consultants.
+ * In 1998 Blue Wave resulted from the merger of Mizar and Loughborough Sound Images.
+ * Not much tech information availabe but I found some quotes about Mizar on the internet:
+ *
+ * From http://archive.org/stream/68micro-vol-11-num-02/V11N02_Feb1989_djvu.txt :
+ *--------------------------------------------------------------------------------
+ * " Mizar provides complete OS-9 solutions for the VMEbus. Mizar's VME CPUs
+ * offer (he functions and performance your application demands. Our single
+ * height (3U) VME processors are uniquely configurable computing engines,
+ * Through Mizar's unique MXbus expansion interface, standard and custom side
+ * modules can be added to basic processors to create double-height (6U) boards
+ * tor specific applications, 3U CPU options include 68010, 66020, and 63030
+ * microprocessors, up to one MB of DRAM, serial I/O, real-time clock, and
+ * mailbox interrupt support. Standard MXbus side modules include additional DRAM.
+ * SRAM, and I/O.
+ *
+ * Mizar's standard double- height (6U) processors provide additional features such
+ * as a high-speed cache to enhance 68030 performance, floating, point coprocessor
+ * support, up to four MB dual ported DRAM, VSB memory interface, Ethernet, and SCSI.
+ *
+ * Mizar also supports OS-9 with completely configured OS9 development systems and
+ * OS-9 application server systems. For more information, call Mizar today
+ *
+ * 800-635-0200 MIZAR 1419 Dunn Drive CarrolHon, TX 75006 214-446-2664"
+ *
+ * Known boards from Mizar:
+ *
+ * MZX 414
+ * MZ 7122
+ * MZ 7132
+ * MZ 7300 Serial I/O Board (Z8530)
+ * EMX 7320 Serial I/O Board
+ * MZ 7400 Disk Controller Board (WD 2010; WD 1772)
+ * MZ 7500 IEEE-488 (GPIB) Interface Board
+ * EMX 7550 Ethernet Controller Board (AMD 7990 Lance) MAC: 00:80:F8 MIZAR, INC.
+ * MZ 7772
+ * MZ 7810 I/O Expansion Module (6681 DUART)
+ * MZ 7831 SCSI Expansion Module (WD 33C93A)
+ * MZ 7850 Ethernet Expansion Module (WD 83C690)
+ * MZ 8000 ??
+ * MZ 8105 3U 68000 CPU board
+ * MZ 8115
+ * MZ 8300 3U serial board, 2 NEC 7201 and 1 AMD CTS9513 5 x 16 bit Counter/Timer
+ * MZ 8310 timing module 2 x AM9513
+ * MZ 8505 IEEE-488 (GPIB) Interface Board"
+ *
+ * From http://www.megalextoria.com/forum2/index.php?t=msg&goto=73945&
+ *--------------------------------------------------------------------
+ * Aug 20 1984 a report by James Jones from the OS/9 conferance in Des Moines:
+ * "...
+ * Mizar: is selling VME bus 68010 boards, running OS-9/68000; they also make
+ * various memory and I/O boards, disk controller boards, and and a NEC 7220-based
+ * graphics controller board...."
+ *
+ * Misc links about Mizar:
+ * http://www.vita.com/History
+ * http://www.verycomputer.com/154_e272024804bbe203_1.htm
+ * https://www.aihitdata.com/company/00814595/RTSI/overview
+ *
+ * Address Map
+ * --------------------------------------------------------------------------
+ * Address Range Description/Assumption
+ * --------------------------------------------------------------------------
+ * 0x000000 0x01ffff ROM because of fixed vectors
+ * 0x020000 0x03ffff RAM because bootvector stack starts at 0x21000
+ * -- VME adresses---
+ * 0xff0000 0xff0003 Bootstrap expects to find a UPD7201 serial device here
+ * --------------------------------------------------------------------------
+ *
+ * Interrupt sources
+ * ----------------------------------------------------------
+ * Description Device Lvl IRQ VME board
+ * /Board Vector Address
+ * ----------------------------------------------------------
+ * On board Sources
+ * TBD
+ * Off board Sources (other VME boards)
+ * TBD
+ * ----------------------------------------------------------
+ *
+ * TODO:
+ * - Dump the ROMs (DONE)
+ * - Setup a working address map (DONE)
+ * - Add VME bus driver (Faked one)
+ * - understand what other device is expected in VME space ff0011-13
+ *
+ ****************************************************************************/
+#include "emu.h"
+#include "includes/mzr8105.h"
+#include "cpu/m68000/m68000.h"
+#include "machine/clock.h"
+
+#define VERBOSE 0
+
+#define LOGPRINT(...) do { if (VERBOSE) logerror(__VA_ARGS__); } while (0)
+#define LOG(...) LOGPRINT(__VA_ARGS__)
+
+#if VERBOSE >= 2
+#define logerror printf
+#endif
+
+#ifdef _MSC_VER
+#define LLFORMAT "%I64%"
+#define FUNCNAME __func__
+#else
+#define LLFORMAT "%lld"
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+/* Start it up */
+void mzr8105_state::machine_start()
+{
+ LOG("%s()\n", FUNCNAME);
+}
+
diff --git a/src/mame/machine/mzr8300.cpp b/src/mame/machine/mzr8300.cpp
new file mode 100644
index 00000000000..9d1541a05ee
--- /dev/null
+++ b/src/mame/machine/mzr8300.cpp
@@ -0,0 +1,165 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/***************************************************************************
+ *
+ * Mizar VME8300 rev G 3U VME slave slot device
+ *
+ * 23/09/2015
+ *
+ * This device was drycoded based on OS9 boot strap code on a Mizar mz8105 board
+ * which expects to find a SIO on the VME bus + photos of a Mizar 8300 board on Ebay
+ * I have found no formal documents for this board so far, so needs verification.
+ *
+ * ||
+ * ||
+ * ||
+ * ||
+ * ||____________________________________________________________ ___
+ * \+++====|| U2|AM26LS32| | NEC | |74LS04N||74LS645 ||_| |
+ * \=/- o|| +--------+ | D7201C | ++-----+++----------+| | |
+ * | | || +-------+ +--------------------+ | | |SN74LS374N|| | |
+ * | | || U1| xxx | ____________________ | | +----------+| | |
+ * | | || +-------+ | NEC | |AMD | |SN74LS374N|| | |
+ * | | || | 7201C | |AM9513++----------+| | |
+ * | | || K10 +--------------------+ | APC ||PAL14L8 || |VME|
+ * | |==|| +-------+ K5 _______ | |+-----------+| | |
+ * | |==|| |MC1488P| K4 |SN74S38|| STC ||PAL20L8 || |P1 |
+ * | | || ++-------+--------+-+------++| |+-----------+| | |
+ * | | || K2 |AM26LS32|AM26LS32| 74S74 | |_____| |SN74LS244N|| | |
+ * | | || +--------+--------+--------+_______ +----------+| | |
+ * | | || | 74S74 | 74F85 | | | |
+ * | | || +-------+--------++-------++-------+ +----------+| | |
+ * /=\- o||J1 K1 U4| xxx | xxx | 74LS164| K6 |AM25LS2521|| | |
+ * /+++====|| J2 +-------+--------+--------+--------+ +----------+|_| |
+ * ||Rev G U3| MC1488| MC1488 | 74LS161| 74F85 | K8 | |___|
+ * ||-----------+-------+-----------------------------------------
+ * ||
+ * ||
+ *
+ *
+ * Misc links about this board:
+ * http://www.ebay.com/itm/MIZAR-INC-8300-0-01-REV-J-INTERFACE-CONTROL-BOARD-W-RIBBON-AND-PLATE-/231508658429?hash=item35e6fdc8fd
+ *
+ * Description
+ * ------------
+ * The Mizar mz8300 is a Quad Serial board.
+ *
+ * - Single High (3U) VME Slave board
+ * - Two upd7201 SIO Serial Input/Ouput
+ * - One AM9513 STC System Timing Controller
+ *
+ * Address Map (just guesses based on driver software behaviours)
+ * --------------------------------------------------------------------------
+ * Local VME Decscription
+ * -------------------------------------------------------------------------
+ * n/a 0xff0000 0xff0003 mzr8105.c Bootstrap expects to find a
+ * UPD7201 serial device here - configurable!
+ * --------------------------------------------------------------------------
+ *
+ * Interrupt sources MVME
+ * ----------------------------------------------------------
+ * Description Device Lvl IRQ VME board
+ * /Board Vector Address
+ * ----------------------------------------------------------
+ * On board Sources
+ *
+ * Off board Sources (other VME boards)
+ *
+ * ----------------------------------------------------------
+ *
+ * DMAC Channel Assignments
+ * ----------------------------------------------------------
+ * Channel
+ * ----------------------------------------------------------
+ *
+ * TODO:
+ * - Setup a working address map (STARTED)
+ * - Get documentation for the board
+ * - Add VME bus interface
+ * - Hook up a CPU board that supports this board (mzr8105.c)
+ * - Get terminal working through this device over the VME interface
+ *
+ ****************************************************************************/
+#include "emu.h"
+#include "includes/mzr8300.h"
+#include "machine/z80sio.h"
+#include "bus/rs232/rs232.h"
+#include "machine/clock.h"
+
+#define LOG_GENERAL 0x01
+#define LOG_SETUP 0x02
+#define LOG_PRINTF 0x04
+
+#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
+
+#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
+#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
+
+#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
+
+#if VERBOSE & LOG_PRINTF
+#define logerror printf
+#endif
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+/* These values are borrowed just to get the terminal going and should be replaced
+ * once a proper serial board hardware (ie MZ 8300) is found and emulated. */
+#define BAUDGEN_CLOCK XTAL_19_6608MHz /* fake */
+#define SIO_CLOCK (BAUDGEN_CLOCK / 128) /* This will give prompt */
+
+MACHINE_CONFIG_FRAGMENT( mzr8300 )
+ MCFG_UPD7201_ADD("sio0", XTAL_4MHz, SIO_CLOCK, SIO_CLOCK, SIO_CLOCK, SIO_CLOCK )
+
+ MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232p1", rs232_port_device, write_txd))
+ MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232p1", rs232_port_device, write_dtr))
+ MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232p1", rs232_port_device, write_rts))
+
+ MCFG_RS232_PORT_ADD ("rs232p1", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("sio0", upd7201N_device, rxb_w))
+ MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("sio0", upd7201N_device, ctsb_w))
+
+ MCFG_Z80SIO_ADD("sio1", XTAL_4MHz, 0, 0, 0, 0 )
+MACHINE_CONFIG_END
+
+const device_type VME_P1_MZR8300 = &device_creator<vme_p1_mzr8300_device>;
+
+machine_config_constructor vme_p1_mzr8300_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( mzr8300 );
+}
+
+vme_p1_mzr8300_device::vme_p1_mzr8300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, VME_P1_MZR8300, "Mizar 8300 quad channel SIO board", tag, owner, clock, "vme_mzr8300", __FILE__)
+ ,device_vme_p1_card_interface(mconfig, *this)
+ ,m_sio0(*this, "sio0")
+{
+}
+
+vme_p1_mzr8300_device::vme_p1_mzr8300_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
+ device_t(mconfig, type, name, tag, owner, clock, shortname, source)
+ ,device_vme_p1_card_interface(mconfig, *this)
+ ,m_sio0(*this, "sio0")
+{
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void vme_p1_mzr8300_device::device_start()
+{
+}
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void vme_p1_mzr8300_device::device_reset()
+{
+}
diff --git a/src/mame/machine/namcoio_gearbox.cpp b/src/mame/machine/namcoio_gearbox.cpp
new file mode 100644
index 00000000000..cf4c472a653
--- /dev/null
+++ b/src/mame/machine/namcoio_gearbox.cpp
@@ -0,0 +1,129 @@
+// license:BSD-3-Clause
+// copyright-holders:Angelo Salese
+/***************************************************************************
+
+ Namco 6-speed Gearbox device
+
+ Used in Ridge Racer deluxe cabinet, Ace Driver and Driver's Eyes
+ User side gear scheme:
+ 1 3 5
+ |-|-|
+ 2 4 6
+
+ Being a mechanical part there are currently two methods hooked up,
+ emulated and natural.
+ First one just uses whatever is read in the inputs, second one
+ simulates clutch lock as in a real car.
+
+ TODO:
+ - check clutch lock via real HW, and get a way to lock current gear via
+ MAME's input system;
+ - Custom part #;
+ - gear output for artwork system;
+
+***************************************************************************/
+
+#include "emu.h"
+#include "namcoio_gearbox.h"
+
+
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+// device type definition
+const device_type NAMCOIO_GEARBOX = &device_creator<namcoio_gearbox_device>;
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// namcoio_gearbox_device - constructor
+//-------------------------------------------------
+
+namcoio_gearbox_device::namcoio_gearbox_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, NAMCOIO_GEARBOX, "Namco I/O Gearbox", tag, owner, clock, "namcoio_gearbox", __FILE__)
+{
+}
+
+
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void namcoio_gearbox_device::device_start()
+{
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void namcoio_gearbox_device::device_reset()
+{
+ m_gearbox_state = 0xf;
+}
+
+static INPUT_PORTS_START( gearbox_inputs )
+ PORT_START("GEARBOX")
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_NAME("Gearbox Up")
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Gearbox Down")
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_NAME("Gearbox Left")
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_NAME("Gearbox Right")
+
+ PORT_START("CLUTCH")
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Clutch Pedal")
+
+ PORT_START("CONFIG")
+ PORT_CONFNAME( 0x01, 0x01, "Clutch Mode" )
+ PORT_CONFSETTING( 0x01, "Emulated" )
+ PORT_CONFSETTING( 0x00, "Natural" )
+ PORT_CONFNAME( 0x02, 0x02, "Gearbox Debug")
+ PORT_CONFSETTING( 0x02, DEF_STR( Yes ) )
+ PORT_CONFSETTING( 0x00, DEF_STR( No ) )
+INPUT_PORTS_END
+
+ioport_constructor namcoio_gearbox_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( gearbox_inputs );
+}
+
+
+//**************************************************************************
+// READ/WRITE HANDLERS
+//**************************************************************************
+
+//static const ioport_value gearbox_table[] = { 0x0f, 0x0a, 0x09, 0x0e, 0x0d, 0x06, 0x05 };
+
+CUSTOM_INPUT_MEMBER( namcoio_gearbox_device::in_r )
+{
+ if(ioport("CONFIG")->read() & 1)
+ return ioport("GEARBOX")->read() & 0xf;
+
+ bool clutch_pressed = (ioport("CLUTCH")->read() & 1) == 0;
+ const char gearbox_output[16] = { '-', '-', '-', '-',
+ '-', '6', '5', 'N',
+ '-', '2', '1', 'N',
+ '-', '4', '3', 'N' };
+
+ if(ioport("CONFIG")->read() & 2)
+ popmessage("%c %c",gearbox_output[m_gearbox_state],clutch_pressed == true ? '*' : '.');
+
+ if(clutch_pressed == false)
+ return m_gearbox_state;
+
+ m_gearbox_state = ioport("GEARBOX")->read() & 0xf;
+
+ return 0xf; // return neutral while changing gear
+}
+
+READ_LINE_MEMBER( namcoio_gearbox_device::clutch_r )
+{
+ return ioport("CLUTCH")->read() & 1;
+}
diff --git a/src/mame/machine/namcoio_gearbox.h b/src/mame/machine/namcoio_gearbox.h
new file mode 100644
index 00000000000..463338930d0
--- /dev/null
+++ b/src/mame/machine/namcoio_gearbox.h
@@ -0,0 +1,60 @@
+// license:BSD-3-Clause
+// copyright-holders:Angelo Salese
+/***************************************************************************
+
+ Namco 6-speed Gearbox device
+
+***************************************************************************/
+
+#pragma once
+
+#ifndef __NAMCOIO_GEARBOXDEV_H__
+#define __NAMCOIO_GEARBOXDEV_H__
+
+
+
+//**************************************************************************
+// INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+
+#define MCFG_NAMCOIO_GEARBOX_ADD(_tag) \
+ MCFG_DEVICE_ADD(_tag, NAMCOIO_GEARBOX, 0)
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> namcoio_gearbox_device
+
+class namcoio_gearbox_device : public device_t
+{
+public:
+ // construction/destruction
+ namcoio_gearbox_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // I/O operations
+ DECLARE_CUSTOM_INPUT_MEMBER( in_r );
+ DECLARE_READ_LINE_MEMBER( clutch_r );
+ uint8_t m_gearbox_state;
+ virtual ioport_constructor device_input_ports() const override;
+
+protected:
+ // device-level overrides
+// virtual void device_validity_check(validity_checker &valid) const;
+ virtual void device_start() override;
+ virtual void device_reset() override;
+};
+
+
+// device type definition
+extern const device_type NAMCOIO_GEARBOX;
+
+
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+
+
+#endif
diff --git a/src/mame/machine/naomigd.cpp b/src/mame/machine/naomigd.cpp
index 329ff6211f2..d82eb9d0166 100644
--- a/src/mame/machine/naomigd.cpp
+++ b/src/mame/machine/naomigd.cpp
@@ -50,7 +50,7 @@ DIMM controller registers
20 5F7048 |
24 5F704C 16bit Interrupt register
-------c ---b---a
- a - IRQ to DIMM (SH4 IRL3): 0 set / 1 clear
+ a - IRQ to DIMM (SH4 IRL3): 0 set / 1 clear
b - unk, mask of a ???
c - IRQ to NAOMI (HOLLY EXT 3): 0 set / 1 clear (write 0 from NAOMI seems ignored)
@@ -60,18 +60,18 @@ DIMM controller registers
c - unk, set to 1 in VxWorks, 0 in 1.02
d - unk, checked for == 1 in 1.02
-2A 8bit possible DES decryption area size 8 MSB bits (16MB units number)
+2A 8bit possible DES decryption area size 8 MSB bits (16MB units number)
VxWorks firmwares set this to ((DIMMsize >> 24) - 1), 1.02 set it to FF
-2C 32bit SDRAM config
-30 32bit DES key low
-34 32bit DES key high
+2C 32bit SDRAM config
+30 32bit DES key low
+34 32bit DES key high
SH4 IO port A bits
-------------------
9 select input, 0 - main/lower board, 1 - option/upper board (IDE, Net, PIC)
0 1
-0 DIMM SPD clk JP? 0 - enable IDE
+0 DIMM SPD clk JP? 0 - enable IDE
1 DIMM SPD data JP? 0 - enable Network
2 93C46 DI PIC16 D0
3 93C46 CS PIC16 D1
diff --git a/src/mame/machine/nl_hazelvid.cpp b/src/mame/machine/nl_hazelvid.cpp
new file mode 100644
index 00000000000..acfb9a5e625
--- /dev/null
+++ b/src/mame/machine/nl_hazelvid.cpp
@@ -0,0 +1,243 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+
+/***************************************************************************
+
+ Netlist (hazelvid) included from hazeltin.cpp
+
+***************************************************************************/
+
+#include "netlist/devices/net_lib.h"
+
+#ifndef __PLIB_PREPROCESSOR__
+#endif
+
+NETLIST_START(hazelvid)
+
+ SOLVER(Solver, 48000)
+ PARAM(Solver.PARALLEL, 0) // Don't do parallel solvers
+ PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient
+ PARAM(NETLIST.USE_DEACTIVATE, 1)
+
+ ANALOG_INPUT(V5, 5)
+
+ TTL_INPUT(high, 1)
+ TTL_INPUT(low, 0)
+
+ MAINCLOCK(video_clk, 16632000.0)
+
+ /* Character line counter, divide-by-9 */
+ TTL_74161(u88, high, high, high, low, high, u87_6.Q, video_clk, high, high)
+
+ TTL_7404_INVERT(u87_6, u88.RCO)
+
+ TTL_74175(u81, video_clk, u88.RCO, u81.Q1, low, u88.QC, high)
+
+ TTL_7404_INVERT(u87_5, u81.Q1)
+ ALIAS(ndot, u87_5.Q)
+ TTL_7404_INVERT(u59_4, u81.Q1Q)
+ ALIAS(dot, u59_4.Q)
+
+ /* Character bucket counter */
+
+ /* least significant 4 bits */
+ TTL_74161(u70, low, low, low, low, high, u59_5.Q, u81.Q2Q, high, high)
+
+ /* most significant 4 bits */
+ TTL_74161(u69, low, low, low, low, high, u59_5.Q, u81.Q2Q, u70.RCO, u70.RCO)
+ /* Horizontal/Vertical timing signals */
+
+ /* signal lookup PROM */
+ PROM_82S126(u71, low, low, u70.QA, u70.QB, u70.QC, u70.QD, u69.QA, u69.QB, u69.QC, low)
+ PARAM(u71.ROM, "u90_702128_82s129.bin")
+
+ /* signal decoding */
+ TTL_9334(u72, high, u81.Q1Q, u71.O4, u71.O1, u71.O2, u71.O3)
+ ALIAS(hms, u72.Q1)
+ ALIAS(hmsd, u72.Q2)
+ ALIAS(hblank, u72.Q3)
+ ALIAS(vstrobe, u72.Q4)
+ ALIAS(hdriveq, u72.Q5)
+ ALIAS(vidbus, u72.Q6)
+ TTL_7404_INVERT(u59_5, u72.Q7)
+
+ TTL_7400_NAND(u83_1, high, vstrobe)
+ ALIAS(char_line_clk, u83_1.Q)
+
+ /* Character line counter */
+ TTL_74161(u84, low, low, low, low, high, u83_3.Q, char_line_clk, high, high)
+ ALIAS(lc20, u84.QA)
+ ALIAS(lc21, u84.QB)
+ ALIAS(lc22, u84.QC)
+ ALIAS(lc23, u84.QD)
+ TTL_7400_NAND(u83_3, u84.QB, u84.QD)
+ TTL_7404_INVERT(u92_5, u90.QD)
+
+ TTL_7410_NAND(u89_3, u90.QD, u90.QC, u90.QA)
+
+ /* Character row counter */
+ TTL_74161(u90, low, low, low, low, high, u89_3.Q, u92_3.Q, high, high)
+ TTL_7404_INVERT(u92_3, u84.QD)
+ TTL_7404_INVERT(u92_1, u90.QB)
+
+ TTL_7474(u95_2, u92_5.Q, u95_2.QQ, high, high)
+
+ TTL_7411_AND(u91_3, u84.QA, u84.QD, u90.QB)
+ TTL_7411_AND(u91_1, u92_1.Q, u90.QA, u84.QC)
+
+ TTL_7404_INVERT(u92_2, u90.QC)
+ TTL_7411_AND(u91_2, u95_2.QQ, u92_2.Q, u92_5.Q)
+ TTL_7404_INVERT(u92_6, u91_2.Q)
+
+ /* Vertical blanking and drive */
+ TTL_7473(u85_vdrive, char_line_clk, u91_1.Q, u91_3.Q, u85_vblankq.QQ)
+ TTL_7473(u85_vblankq, char_line_clk, u92_6.Q, u91_2.Q, high)
+
+ /* Outgoing signals */
+ TTL_7404_INVERT(u73_4, hdriveq)
+ ALIAS(hdrive, u73_4.Q)
+
+ TTL_7404_INVERT(u61_6, hmsd)
+ TTL_7402_NOR(u60_1, u61_6.Q, u81.Q4)
+ ALIAS(lbc, u60_1.Q)
+
+ TTL_7404_INVERT(u74_1, u84.QB)
+ TTL_7410_NAND(u89_2, vidbus, vidbus, u82_2.Q)
+ ALIAS(ncntbenq, u89_2.Q)
+
+ TTL_7410_NAND(u89_1, u81.Q2, hmsd, u82_2.Q)
+ TTL_7400_NAND(u83_4, u89_1.Q, high)
+ ALIAS(cntclk, u83_4.Q)
+
+ TTL_7402_NOR(u60_2, hblank, u85_vblankq.QQ)
+ ALIAS(clr_vid_sr, u60_2.Q)
+
+ TTL_7404_INVERT(u92_4, u84.QB)
+ TTL_74260_NOR(u82_2, u85_vblankq.QQ, u92_3.Q, u84.QC, u92_4.Q, u84.QA)
+ TTL_7400_NAND(u83_2, vstrobe, u82_2.Q)
+ ALIAS(sync_bus_disable_q, u83_2.Q)
+
+ ALIAS(vdrive, u85_vdrive.Q)
+ TTL_7404_INVERT(u73_5, vdrive)
+ ALIAS(vdriveq, u73_5.Q)
+
+ TTL_7474(u95_1, u84.QD, u85_vblankq.QQ, high, high)
+ ALIAS(vblank, u95_1.Q)
+
+ TTL_74260_NOR(u82_1, u85_vblankq.QQ, u92_4.Q, u84.QD, u84.QC, low)
+ TTL_7404_INVERT(u61_3, u82_1.Q)
+ ALIAS(tvinterq, u61_3.Q)
+
+ TTL_INPUT(cpu_iowq, 1)
+ TTL_INPUT(cpu_ba4, 1)
+ TTL_7432_OR(u36_1, cpu_iowq, cpu_ba4)
+
+ /* Character address counter */
+ TTL_74193(u7, low, low, low, low, low, u36_1.Q, cntclk, high)
+ TTL_74193(u5, cpu_db0, cpu_db1, cpu_db2, cpu_db3, low, u36_1.Q, u7.CARRYQ, u7.BORROWQ)
+ TTL_74193(u3, cpu_db4, cpu_db5, cpu_db6, cpu_db7, low, u36_1.Q, u5.CARRYQ, u5.BORROWQ)
+
+ TTL_74365(u6, low, ncntbenq, u7.QA, u7.QB, u7.QC, u7.QD, u5.QA, u5.QB)
+ TTL_74365(u4, low, ncntbenq, u5.QC, u5.QD, u3.QA, u3.QB, u3.QC, low)
+ ALIAS(ba0, u6.Y1)
+ ALIAS(ba1, u6.Y2)
+ ALIAS(ba2, u6.Y3)
+ ALIAS(ba3, u6.Y4)
+ ALIAS(ba4, u6.Y5)
+ ALIAS(ba5, u6.Y6)
+ ALIAS(ba6, u4.Y1)
+ ALIAS(ba7, u4.Y2)
+ ALIAS(ba8, u4.Y3)
+ ALIAS(ba9, u4.Y4)
+ ALIAS(ba10, u4.Y5)
+
+ /* Video RAM */
+ TTL_INPUT(memwq, 1)
+ TTL_INPUT(mrq, 1)
+ TTL_INPUT(ba13, 0)
+
+ TTL_7432_OR(u36_2, memwq, memwq)
+ TTL_7400_NAND(u37_2, u36_2.Q, mrq)
+ TTL_7400_NAND(u37_3, u37_2.Q, ba13)
+ TTL_7400_NAND(u37_4, u37_3.Q, ncntbenq)
+ TTL_7404_INVERT(u17_2, u4.Y5)
+ TTL_7400_NAND(u30_2, u17_2.Q, u37_4.Q)
+ TTL_7400_NAND(u37_1, u4.Y5, u37_4.Q)
+ TTL_INPUT(rwq, 1)
+
+ /* Lower 1K */
+ RAM_2102A(u22, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u22.DO)
+ RAM_2102A(u23, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u23.DO)
+ RAM_2102A(u24, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u24.DO)
+ RAM_2102A(u25, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u25.DO)
+ RAM_2102A(u26, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u26.DO)
+ RAM_2102A(u27, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u27.DO)
+ RAM_2102A(u28, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u28.DO)
+ RAM_2102A(u29, u30_2.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u29.DO)
+
+ /* Upper 1K */
+ RAM_2102A(u9, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u9.DO)
+ RAM_2102A(u10, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u10.DO)
+ RAM_2102A(u11, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u11.DO)
+ RAM_2102A(u12, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u12.DO)
+ RAM_2102A(u13, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u13.DO)
+ RAM_2102A(u14, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u14.DO)
+ RAM_2102A(u15, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u15.DO)
+ RAM_2102A(u16, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u16.DO)
+
+ TTL_INPUT(cpu_db0, 0)
+ TTL_INPUT(cpu_db1, 0)
+ TTL_INPUT(cpu_db2, 0)
+ TTL_INPUT(cpu_db3, 0)
+ TTL_INPUT(cpu_db4, 0)
+ TTL_INPUT(cpu_db5, 0)
+ TTL_INPUT(cpu_db6, 0)
+ TTL_INPUT(cpu_db7, 0)
+
+ TTL_TRISTATE(db0, u30_2.Q, u29.DO, u37_1.Q, u16.DO)
+ TTL_TRISTATE(db1, u30_2.Q, u28.DO, u37_1.Q, u15.DO)
+ TTL_TRISTATE(db2, u30_2.Q, u27.DO, u37_1.Q, u14.DO)
+ TTL_TRISTATE(db3, u30_2.Q, u26.DO, u37_1.Q, u13.DO)
+ TTL_TRISTATE(db4, u30_2.Q, u25.DO, u37_1.Q, u12.DO)
+ TTL_TRISTATE(db5, u30_2.Q, u24.DO, u37_1.Q, u11.DO)
+ TTL_TRISTATE(db6, u30_2.Q, u23.DO, u37_1.Q, u10.DO)
+ TTL_TRISTATE(db7, u30_2.Q, u22.DO, u37_1.Q, u9.DO)
+
+ /* Character generation */
+ TTL_74175(u68, dot, db0.Q, db1.Q, db2.Q, db3.Q, high) // least significant 4 bits of each character
+ TTL_AM2847(u67, lbc, u68.Q1, u68.Q2, u68.Q3, u68.Q4, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q)
+
+ TTL_74175(u58, dot, db4.Q, db5.Q, db6.Q, db7.Q, high) // most signifcant 4 bits of each character
+ TTL_AM2847(u57, lbc, u58.Q1, u58.Q2, u58.Q3, u58.Q4, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q)
+
+ TTL_74174(u66, ndot, u67.OUTA, u67.OUTB, u67.OUTC, u67.OUTD, u57.OUTA, u57.OUTB, high)
+ TTL_74175(u56, ndot, u57.OUTC, clr_vid_sr, u79_1.Q, u57.OUTD, high)
+ TTL_7400_NAND(u79_1, u56.Q4, clr_vid_sr)
+ ALIAS(fgbit_q, u56.Q3Q)
+
+ EPROM_2716(u78, low, low, lc20, lc21, lc22, lc23, u66.Q1, u66.Q2, u66.Q3, u66.Q4, u66.Q5, u66.Q6, u56.Q1)
+ PARAM(u78.ROM, "u83_chr.bin")
+
+ TTL_74166(u77, video_clk, low, ndot, low, u78.D0, u78.D1, u78.D2, u78.D3, u78.D4, u78.D5, u78.D6, low, clr_vid_sr)
+ ALIAS(raw_dot, u77.QH)
+
+ TTL_7400_NAND(u79_4, fgbit_q, fgbit_q)
+ ALIAS(highlight, u79_4.Q)
+
+ ALIAS(video_out, raw_dot)
+
+ /* Highlight and contrast - not yet hooked up */
+ RES(R40, 160)
+ RES(R41, 270)
+ POT(R21_POT, 500)
+
+ NET_C(R40.1, V5)
+ NET_C(R40.2, R21_POT.1)
+ NET_C(raw_dot, R21_POT.1)
+ NET_C(highlight, R41.1)
+ NET_C(R41.2, R21_POT.1)
+
+ NET_C(R21_POT.3, GND)
+ NET_C(R21_POT.2, GND)
+
+NETLIST_END()
diff --git a/src/mame/machine/nl_hazelvid.h b/src/mame/machine/nl_hazelvid.h
new file mode 100644
index 00000000000..ff436aa1f8d
--- /dev/null
+++ b/src/mame/machine/nl_hazelvid.h
@@ -0,0 +1,4 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+
+NETLIST_EXTERNAL(hazelvid)
diff --git a/src/mame/machine/nl_stuntcyc.cpp b/src/mame/machine/nl_stuntcyc.cpp
new file mode 100644
index 00000000000..ee4227932c8
--- /dev/null
+++ b/src/mame/machine/nl_stuntcyc.cpp
@@ -0,0 +1,659 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+
+/***************************************************************************
+
+ Netlist (stuntcyc) included from atarittl.cpp
+
+***************************************************************************/
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(stuntcyc)
+
+ SOLVER(Solver, 48000)
+ PARAM(Solver.PARALLEL, 0) // Don't do parallel solvers
+ PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient
+ PARAM(NETLIST.USE_DEACTIVATE, 1)
+
+ ANALOG_INPUT(V5, 5)
+
+ TTL_INPUT(high, 1)
+ TTL_INPUT(low, 0)
+
+ MAINCLOCK(main_clk, 14258400)
+ //MAINCLOCK(main_clk, 14318181)
+ ALIAS(Y1, main_clk)
+
+#if 1
+ TTL_7404_INVERT(N3_6, main_clk)
+ ALIAS(HF_CLOCK, N3_6.Q)
+
+ ALIAS(P, high)
+ ALIAS(GROUND, low)
+
+ TTL_7474(N4_2, N3_6.Q, N4_2.QQ, P, P)
+ ALIAS(CLOCK, N4_2.Q)
+ ALIAS(CLOCK_Q, N4_2.QQ)
+
+ TTL_9316(M4, N4_2.Q, P, P, P, J6_1.Q, GROUND, GROUND, GROUND, GROUND)
+ TTL_9316(L4, N4_2.Q, M4.RC, P, P, J6_1.Q, GROUND, GROUND, GROUND, GROUND)
+ ALIAS( 1H, M4.QA)
+ ALIAS( 2H, M4.QB)
+ ALIAS( 4H, M4.QC)
+ ALIAS( 8H, M4.QD)
+ ALIAS( 16H, L4.QA)
+ ALIAS( 32H, L4.QB)
+ ALIAS( 64H, L4.QC)
+ ALIAS(128H, L4.QD)
+
+ TTL_74107(K4_1, 128H, P, P, P)
+ ALIAS(256H, K4_1.Q)
+ ALIAS(256H_Q, K4_1.QQ)
+
+ TTL_7420_NAND(J6_1, 8H, 64H, 128H, 256H)
+ ALIAS(HRESET_Q, J6_1.Q)
+
+ TTL_7404_INVERT(H6_3, HRESET_Q)
+ ALIAS(HRESET, H6_3.Q)
+
+ TTL_7493(L3, HRESET, L3.QA, VRESET, VRESET)
+ TTL_7493(K3, L3.QD, K3.QA, VRESET, VRESET)
+ ALIAS( 1V, L3.QA)
+ ALIAS( 2V, L3.QB)
+ ALIAS( 4V, L3.QC)
+ ALIAS( 8V, L3.QD)
+ ALIAS( 16V, K3.QA)
+ ALIAS( 32V, K3.QB)
+ ALIAS( 64V, K3.QC)
+ ALIAS(128V, K3.QD)
+
+ TTL_74107(K4_2, 128V, P, P, VRESET_Q)
+ ALIAS(256V, K4_2.Q)
+ ALIAS(256V_Q, K4_2.QQ)
+
+ TTL_7410_NAND(M5_3, 256V, 2V, 1V)
+ TTL_7474(M3_2, HRESET, M5_3.Q, P, P)
+ ALIAS(VRESET, M3_2.QQ)
+ ALIAS(VRESET_Q, M3_2.Q)
+
+ TTL_7402_NOR(J5_2, H6_3.Q, J5_1.Q)
+ TTL_7402_NOR(J5_1, 32H, J5_2.Q)
+ TTL_7402_NOR(J5_3, 8V, J5_4.Q)
+ TTL_7402_NOR(J5_4, VRESET, J5_3.Q)
+ ALIAS(HSYNC, J5_1.Q)
+ ALIAS(HSYNC_Q, J5_2.Q)
+ ALIAS(VSYNC, J5_3.Q)
+ ALIAS(VSYNC_Q, J5_4.Q)
+
+ TTL_7486_XOR(J4_1, HSYNC, VSYNC_Q)
+ ALIAS(COMP_SYNC_Q, J4_1.Q)
+
+ TTL_7400_NAND(N5_2, FIXED_RAMP_ZONE, H_WINDOW)
+ ALIAS(RAMP_WINDOW_HIT_Q, N5_2.Q)
+
+ TTL_7474(N4_1, H_WINDOW, HSYNC, RAMP_WINDOW_HIT_Q, N4_1.QQ)
+ TTL_7474(M3_1, N4_1.Q, M3_1.QQ, CYCLE_RESET_Q, P)
+ ALIAS(DIRECTION, M3_1.Q)
+ ALIAS(DIRECTION_Q, M3_1.QQ)
+
+ TTL_7404_INVERT(N3_3, 32V)
+ TTL_7474(J2_2, N3_3.Q, J2_1.Q, P, P)
+ TTL_7474(J2_1, N4_1.Q, P, J2_2.QQ, P)
+
+ TTL_7408_AND(H5_2, 256V_Q, VSYNC_Q)
+ TTL_9316(K1, HSYNC, P, H5_2.Q, V_COUNTER_RESET_Q, L2_3.Q, Av, Bv, Cv, Dv)
+ TTL_9316(K2, HSYNC, K1.RC, J2_2.QQ, V_COUNTER_RESET_Q, L2_3.Q, GROUND, GROUND, GROUND, GROUND)
+ TTL_7400_NAND(L2_3, K1.RC, K2.RC)
+ ALIAS(V1, K1.QA)
+ ALIAS(V2, K1.QB)
+ ALIAS(V3, K1.QC)
+ ALIAS(V4, K1.QD)
+ ALIAS(V_WINDOW, K2.RC)
+
+ TTL_7402_NOR(D4_3, DIRECTION_Q, H6) // Schematic says DIRECTION
+ TTL_7408_AND(B5_1, DIRECTION_Q, H5_AND_H6) // Schematic says DIRECTION
+ TTL_7402_NOR(D4_4, D4_3.Q, B5_1.Q)
+ TTL_7400_NAND(H2_1, HSYNC_Q, D4_4.Q)
+ TTL_7400_NAND(H2_2, HSYNC_Q, H5)
+
+ TTL_9322(J1, HSYNC, V4, P, V3, 4V, V1, 1V, V2, 2V, GROUND)
+ PROM_82S115(hf1, GROUND, P, J1.Y3, J1.Y4, J1.Y2, J1.Y1, H2_2.Q, H2_1.Q, R2, R3, R4, P)
+ PARAM(hf1.ROM, "004275.f1")
+
+ CLOCK(PROBECLK, 7129200)
+ ALIAS(probe_bit0, WHITE_VIDEO)
+ ALIAS(probe_bit1, WHITE_VIDEO)
+ ALIAS(probe_bit2, WHITE_VIDEO)
+ ALIAS(probe_bit3, WHITE_VIDEO)
+ ALIAS(probe_bit4, BLACK_VIDEO)
+ ALIAS(probe_bit5, BLACK_VIDEO)
+ ALIAS(probe_bit6, BLACK_VIDEO)
+ ALIAS(probe_clock, PROBECLK)
+
+ TTL_7404_INVERT(D3_5, H1)
+ TTL_74194(E1, D3_5.Q, MS_1, MS_2, GROUND, hf1.O1, hf1.O2, hf1.O3, hf1.O4, E2.QA, CYCLE_RESET_A_Q)
+ TTL_74194(E2, D3_5.Q, MS_1, MS_2, E1.QD, hf1.O4, hf1.O5, hf1.O6, hf1.O7, GROUND, CYCLE_RESET_A_Q)
+
+ TTL_74165(F2, CLOCK, GROUND, HSYNC_Q, F2.QH, hf1.O1, hf1.O2, hf1.O3, hf1.O4, hf1.O5, hf1.O6, hf1.O7, hf1.O8)
+ TTL_7474(D2_1, CLOCK, F2.QH, OBJECT_ZONE, P)
+ ALIAS(OBJECTS_Q, D2_1.QQ)
+
+ TTL_7450_ANDORINVERT(D1_2, E1.QA, DIRECTION, E2.QD, DIRECTION_Q)
+ TTL_7474(D2_2, H1, D1_2.Q, P, V_WINDOW)
+ ALIAS(CYCLE, D2_2.QQ)
+ ALIAS(CYCLE_Q, D2_2.Q)
+
+ /* Coin circuitry */
+ TTL_7404_INVERT(K8_6, K8_5.Q)
+ TTL_7404_INVERT(K8_5, K8_6.Q)
+
+ DIODE(D20, "1N4001")
+ DIODE(D21, "1N914")
+ DIODE(D22, "1N914")
+
+ SWITCH2(coinsw)
+ NET_C(K8_6.Q, coinsw.1)
+ NET_C(D21.K, coinsw.2)
+ NET_C(coinsw.Q, GND)
+
+ NET_C(K8_6.Q, D21.A)
+ NET_C(K8_6.Q, D22.A)
+ NET_C(D21.K, D20.A)
+ NET_C(D20.K, V5)
+ NET_C(D22.K, V5)
+
+ TTL_7474(H8_2, 64V, K8_5.Q, K8_5.Q, P)
+
+ SWITCH2(creditsw)
+ NET_C(creditsw.1, GND)
+ NET_C(creditsw.2, P)
+
+ TTL_7474(F8_1, END_GAME, F8_2.QQ, H9_3.Q, H8_2.QQ)
+ TTL_7474(F8_2, F8_1.QQ, P, ATTRACT_Q, P)
+ ALIAS(FREE_COIN, F8_2.Q)
+ ALIAS(FREE_COIN_Q, F8_2.QQ)
+ ALIAS(FREE_PLAY, F8_1.QQ)
+ ALIAS(FREE_PLAY_Q, F8_1.Q)
+
+ SWITCH2(freegamesw)
+ NET_C(freegamesw.1, P)
+ NET_C(freegamesw.2, GND)
+ TTL_7410_NAND(H9_3, ATTRACT_Q, freegamesw.Q, FREE_GAME)
+
+ /* Antenna to suppress player attempts at glitching in a credit via a piezo spark */
+ /* Has a diode to clamp negative voltages - omitted here */
+
+ TTL_INPUT(ANTENNA, 0)
+
+ QBJT_SW(Q9, "2N3643")
+ RES(R9, 330)
+ RES(R10, 100)
+ CAP(CX3, CAP_U(0.1))
+ NET_C(ANTENNA, Q9.B)
+ NET_C(Q9.E, GND)
+
+ NET_C(R10.1, CX3.1, Q9.C, R9.1)
+ NET_C(R10.2, GND)
+ NET_C(CX3.2, GND)
+ QBJT_SW(Q10, "2N3643")
+ NET_C(Q10.B, R10.1)
+ NET_C(Q10.E, GND)
+
+ DIODE(D2, "1N914")
+ RES(R7, 100)
+ RES(R8, 330)
+ CAP(C2, CAP_U(0.1))
+ QBJT_SW(Q11, "2N3644")
+
+ NET_C(D2.A, R8.1, Q10.C)
+ ALIAS(COIN_Q, D2.K)
+
+ NET_C(R8.2, R7.2, C2.2, Q11.B)
+ NET_C(R7.1, C2.1, Q11.E, V5)
+ NET_C(R9.2, Q11.C)
+
+ TTL_7486_XOR(C8_4, Q11.C, P)
+ ALIAS(QQ, C8_4.Q)
+
+ /* Start buttons, etc. */
+ SWITCH(START1)
+ RES(R11, RES_K(1))
+ NET_C(START1.2, GND)
+ NET_C(R11.1, V5)
+ NET_C(START1.1, R11.2)
+ TTL_7410_NAND(H9_1, 2_PLAYER_CREDIT, START, R11.2)
+
+ SWITCH(START2)
+ RES(R12, RES_K(1))
+ NET_C(START2.2, GND)
+ NET_C(R12.1, V5)
+ NET_C(START2.1, R12.2)
+ TTL_7410_NAND(H9_2, H9_1.Q, START, R12.2)
+
+ TTL_7400_NAND(J8_2, FREE_COIN_Q, H8_2.QQ)
+ TTL_74107(J9_2, 64V, J8_2.Q, J9_1.QQ, J8_2.Q)
+ TTL_7450_ANDORINVERT(K9_2, creditsw.Q, K8_5.Q, FREE_COIN, 2_PLAYER_MODE_Q)
+ TTL_7400_NAND(J8_1, K9_2.Q, J9_2.QQ)
+ TTL_74107(J9_1, 64V, J8_1.Q, GROUND, J8_2.Q)
+
+ TTL_7402_NOR(F9_4, END_GAME, QQ)
+ TTL_7474(D9_2, 256V, START, F9_4.Q, ATTRACT)
+ ALIAS(ATTRACT, D9_2.QQ)
+ ALIAS(ATTRACT_Q, D9_2.Q)
+
+ TTL_7402_NOR(F9_1, R11.2, R12.2)
+ TTL_7427_NOR(D8_1, J8_2.Q, CREDIT_Q, ATTRACT_Q)
+ TTL_7474(D9_1, 256V, F9_1.Q, P, D8_1.Q)
+ ALIAS(START, D9_1.QQ)
+ ALIAS(START_Q, D9_1.Q)
+
+ TTL_7474(H8_1, ATTRACT, GROUND, H9_2.Q, H9_1.Q)
+ ALIAS(2_PLAYER_MODE, H8_1.Q)
+ ALIAS(2_PLAYER_MODE_Q, H8_1.QQ)
+ TTL_7400_NAND(J8_4, 2_PLAYER_MODE, V_RAMP)
+ TTL_7400_NAND(J8_3, START, J8_4.Q)
+
+ TTL_74193(E8, P, P, P, P, QQ, E8.CARRYQ, COIN_Q, J8_3.Q)
+ TTL_7427_NOR(D8_2, E8.QB, E8.QC, E8.QD)
+ TTL_7404_INVERT(K8_4, D8_2.Q)
+ ALIAS(2_PLAYER_CREDIT, K8_4.Q)
+ TTL_7402_NOR(F9_3, E8.QA, 2_PLAYER_CREDIT)
+ ALIAS(CREDIT_Q, F9_3.Q)
+ TTL_7402_NOR(F9_2, CREDIT_Q, CREDIT_Q)
+ ALIAS(CREDIT, F9_2.Q)
+
+ /* Score Window */
+
+ TTL_7402_NOR(L1_4, 64V, 128V)
+ TTL_7410_NAND(H4_1, 16V, 32V, L1_4.Q)
+ ALIAS(V_SCORE_Q, H4_1.Q)
+
+ TTL_7486_XOR(J4_2, 32H, 256H)
+ ALIAS(32H_XOR_256H, J4_2.Q)
+
+ TTL_7486_XOR(J4_3, 128H, 256H)
+ ALIAS(128H_XOR_256H, J4_3.Q)
+
+ TTL_7486_XOR(J4_4, 64H, 256H_Q)
+ TTL_7410_NAND(H4_3, J4_3.Q, J4_2.Q, J4_4.Q)
+ ALIAS(H_SCORE_Q, H4_3.Q)
+
+ TTL_7402_NOR(J3_1, V_SCORE_Q, H_SCORE_Q)
+ ALIAS(SCORE_WINDOW, J3_1.Q)
+
+ /* Video Generation */
+
+ TTL_7400_NAND(H2_4, 8V, 32V)
+ TTL_7474(H3_2, VSYNC_Q, P, H2_4.Q, P)
+ TTL_7474(H3_1, 1V, 32V, P, H3_2.QQ)
+ TTL_7402_NOR(J3_4, H3_2.QQ, HSYNC)
+ TTL_7400_NAND(H2_3, J3_4.Q, 128H_XOR_256H)
+ TTL_7410_NAND(H4_2, 1H, H3_1.QQ, 32V)
+ ALIAS(ROAD_Q, H4_2.Q)
+
+ TTL_7402_NOR(J3_2, 256H_Q, H2_3.Q)
+ TTL_7402_NOR(J3_3, H2_3.Q, 256H)
+ TTL_7486_XOR(C8_3, PLAYER_CONTROL, 256H)
+ TTL_7450_ANDORINVERT(F3_2, RETURN_THROTTLE, J3_2.Q, J3_3.Q, FREE_PLAY)
+ TTL_7450_ANDORINVERT(F3_1, RETURN_THROTTLE_Q, J3_2.Q, FREE_PLAY_Q, J3_3.Q)
+
+ TTL_7427_NOR(K5_3, 64H, 32H_XOR_256H, V_SCORE_Q)
+ TTL_7400_NAND(F4_4, 128H_XOR_256H, K5_3.Q)
+
+ TTL_7402_NOR(D4_1, PLAYER_CONTROL, CYCLE_Q)
+ TTL_7402_NOR(D4_2, F4_4.Q, C8_3.Q)
+ TTL_7404_INVERT(D3_3, F3_2.Q)
+ TTL_7427_NOR(E4_3, D3_3.Q, D4_2.Q, D4_1.Q)
+ TTL_7410_NAND(E3_1, SCORE_1_Q, OBJECTS_Q, E4_3.Q)
+ ALIAS(WHITE_VIDEO, E3_1.Q)
+
+ TTL_7402_NOR(F4_2, PLAYER_CONTROL, CYCLE)
+ TTL_7404_INVERT(D3_1, F4_4.Q)
+ TTL_7402_NOR(F4_3, C8_3.Q, D3_1.Q)
+ TTL_7410_NAND(E3_2, F4_2.Q, F4_3.Q, F3_1.Q)
+ TTL_7400_NAND(F4_1, RAMPS_Q, ROAD_Q)
+ TTL_7427_NOR(E4_2, F4_1.Q, SCORE_2, E3_2.Q)
+ ALIAS(BLACK_VIDEO, E4_2.Q)
+
+ RES(R13, RES_K(1))
+ NET_C(R13.1, E3_1.Q)
+ RES(R14, RES_K(1))
+ NET_C(R14.1, V5)
+ RES(R15, RES_K(1))
+ NET_C(R15.1, E4_2.Q)
+ //RES(R107, RES_K(1))
+
+ DIODE(D17, "1N914")
+ NET_C(D17.K, COMP_SYNC_Q)
+ //NET_C(D17.A, R107.1, R13.2, R14.2, R15.2)
+ NET_C(D17.A, R13.2, R14.2, R15.2)
+
+ //NET_C(R107.2, GND)
+ ALIAS(VIDEO_OUT, R13.2)
+
+ /* Horizontal movement */
+
+ TTL_7474(C2_1, SPEED_PULSES, P, C2_2.QQ, P)
+ TTL_7474(C2_2, A3_2.Q, C2_1.Q, P, P)
+ TTL_7493(C1, C2_1.Q, C1.QA, FLIP, FLIP)
+ ALIAS(MOTOR_PULSE, C1.QA)
+ ALIAS(R4, C1.QD)
+
+ TTL_7400_NAND(B2_2, DIRECTION_Q, C2_2.Q)
+ TTL_9316(C3, HF_CLOCK, P, P, H_COUNTER_RESET_Q, A3_2.Q, C2_2.Q, B2_2.Q, P, P)
+ TTL_9316(B3, HF_CLOCK, C3.RC, P, H_COUNTER_RESET_Q, A3_2.Q, GROUND, P, P, GROUND)
+ ALIAS(H1, C3.QA)
+ ALIAS(H2, C3.QB)
+ ALIAS(H3, C3.QC)
+ ALIAS(H4, C3.QD)
+ ALIAS(H5, B3.QA)
+ ALIAS(H6, B3.QB)
+ ALIAS(H7, B3.QC)
+ ALIAS(H8, B3.QD)
+
+ TTL_7408_AND(B5_3, H5, H6)
+ ALIAS(H5_AND_H6, B5_3.Q)
+
+ TTL_74107(B4_2, B3.RC, P, P, H_COUNTER_RESET_Q)
+ TTL_74107(B4_1, B4_2.Q, P, P, H_COUNTER_RESET_Q)
+
+ TTL_7410_NAND(C4_1, B4_1.QQ, B3.RC, B4_2.Q)
+ TTL_7404_INVERT(D3_6, C4_1.Q)
+ TTL_7400_NAND(A3_2, D3_6.Q, C3.RC)
+
+ TTL_7410_NAND(C4_3, B4_2.Q, H8, B4_1.Q)
+ TTL_7427_NOR(E4_1, H5_AND_H6, H7, C4_3.Q)
+ ALIAS(H_WINDOW, E4_1.Q)
+
+ TTL_7474(A4_1, H4, E4_1.Q, P, P)
+ TTL_7474(A4_2, H2, H4, A4_1.Q, P)
+ ALIAS(H_WINDOW_DELAYED, A4_1.Q)
+
+ TTL_7402_NOR(A8_4, H4, A4_2.QQ)
+ TTL_7404_INVERT(D3_4, A8_4.Q)
+ TTL_7400_NAND(B2_4, DIRECTION, D3_4.Q)
+ TTL_7400_NAND(B2_1, DIRECTION_Q, D3_4.Q)
+ ALIAS(MS_1, B2_4.Q)
+ ALIAS(MS_2, B2_1.Q)
+
+ /* Scoring, etc. logic */
+
+ TTL_7400_NAND(A3_1, C4_2.Q, CYCLE_RESET_A_Q)
+ TTL_7410_NAND(C4_2, A3_1.Q, BAD_JUMP_Q, FLIP_Q)
+ TTL_7410_NAND(D6_3, E5.QA, VRESET, 2_PLAYER_MODE_Q)
+ TTL_7474(C5_1, A3_1.Q, GROUND, D6_3.Q, COMP_SCORE_Q)
+ TTL_7400_NAND(D5_3, OUT_OF_SEQUENCE_RESET_Q, C5_1.Q)
+
+ TTL_INPUT(MISS_SW_B0, 1)
+ TTL_INPUT(MISS_SW_B1, 1)
+ TTL_INPUT(MISS_SW_B2, 1)
+ TTL_74193(E5, GROUND, MISS_SW_B0, MISS_SW_B1, MISS_SW_B2, GROUND, START_Q, P, D5_3.Q)
+ ALIAS(END_GAME_Q, E5.BORROWQ)
+
+ TTL_7408_AND(H5_4, ATTRACT_Q, 128V)
+ TTL_7474(C5_2, GOOD_JUMP_Q, MAX_SCORE_Q, H5_4.Q, P)
+
+ TTL_7402_NOR(A8_2, E5.QA, C5_2.QQ)
+ TTL_74192(B8, GROUND, GROUND, GROUND, P, GROUND, START_Q, A8_2.Q, P)
+ TTL_7474(A9_2, B8.CARRYQ, A9_2.QQ, START_Q, P)
+ TTL_7402_NOR(A8_3, A9_2.Q, B8.QD)
+ ALIAS(A, B8.QA)
+ ALIAS(B, B8.QB)
+ ALIAS(C, B8.QC)
+ ALIAS(D, B8.QD)
+ ALIAS(E, A9_2.Q)
+ ALIAS(F, A8_3.Q)
+
+ TTL_7408_AND(B5_2, E5.QA, C5_2.Q)
+ TTL_74192(B9, GROUND, GROUND, GROUND, P, GROUND, START_Q, B5_2.Q, P)
+ TTL_7474(A9_1, B9.CARRYQ, A9_1.QQ, START_Q, P)
+ TTL_7402_NOR(A8_1, A9_1.Q, B9.QD)
+ ALIAS(G, B9.QA)
+ ALIAS(H, B9.QB)
+ ALIAS(J, B9.QC)
+ ALIAS(K, B9.QD)
+ ALIAS(L, A9_1.Q)
+ ALIAS(M, A8_1.Q)
+
+ TTL_7400_NAND(D5_4, E5.QA, 2_PLAYER_MODE)
+ ALIAS(PLAYER_CONTROL_Q, D5_4.Q)
+ TTL_7404_INVERT(H6_4, PLAYER_CONTROL_Q)
+ ALIAS(PLAYER_CONTROL, H6_4.Q)
+
+ TTL_7404_INVERT(D3_2, 128V)
+ TTL_7450_ANDORINVERT(D1_1, D3_2.Q, 256H_Q, D5_4.Q, 128V)
+
+ TTL_9322(B7, D1_1.Q, A, G, B, H, D, K, C, J, GROUND)
+ TTL_9322(A7, D1_1.Q, E, L, M, F, GROUND, GROUND, GROUND, GROUND, GROUND)
+ ALIAS(S1, B7.Y1)
+ ALIAS(S2, B7.Y2)
+ ALIAS(S3, B7.Y4)
+ ALIAS(S4, B7.Y3)
+ ALIAS(S5, A7.Y1)
+ ALIAS(S6, A7.Y2)
+
+ TTL_9322(C7, 16H, S5, S1, S6, S2, GROUND, S4, GROUND, S3, GROUND)
+ TTL_7448(C6, C7.Y1, C7.Y2, C7.Y4, C7.Y3, P, SCORE_WINDOW, 16H)
+ TTL_9312(B6, 2H, 4H, 8H, C6.f, GROUND, GROUND, C6.b, C6.e, GROUND, GROUND, C6.c, 8H)
+ TTL_9312(A6, 2V, 4V, 8V, C6.a, GROUND, GROUND, C6.g, GROUND, GROUND, GROUND, C6.d, 8H)
+ TTL_7408_AND(B5_4, A6.YQ, B6.YQ)
+ TTL_7474(A5_1, CLOCK, B5_4.Q, P, P)
+ ALIAS(COMP_SCORE_Q, A5_1.Q)
+
+ TTL_7400_NAND(M7_2, 128H, A5_1.QQ)
+ ALIAS(SCORE_1_Q, M7_2.Q)
+
+ TTL_7402_NOR(K6_1, A5_1.Q, 128H)
+ ALIAS(SCORE_2, K6_1.Q)
+
+ PROM_82S123(d7, GROUND, S1, S2, S3, S4, S5)
+ PARAM(d7.ROM, "004811.d7")
+
+ ALIAS(MAX_SCORE_Q, d7.O6)
+
+ TTL_7410_NAND(D6_1, 256H_Q, 128H, 128H)
+ TTL_7427_NOR(D8_3, 64H, 32H, D6_1.Q)
+ TTL_7486_XOR(C8_2, D6_1.Q, d7.O5)
+ ALIAS(FIXED_RAMP_ZONE, D8_3.Q)
+
+ TTL_INPUT(FREESCORE_SW_B0, 0)
+ TTL_INPUT(FREESCORE_SW_B1, 0)
+ TTL_INPUT(FREESCORE_SW_B2, 0)
+ TTL_INPUT(FREESCORE_SW_B3, 1)
+ TTL_7402_NOR(K6_4, d7.O5, OBJECT_ZONE_Q)
+ TTL_7485(E6, d7.O1, d7.O2, d7.O3, d7.O4, 8H, 16H, 32H, 64H, GROUND, C8_2.Q, GROUND)
+ TTL_7485(E7, d7.O1, d7.O2, d7.O3, d7.O4, FREESCORE_SW_B0, FREESCORE_SW_B1, FREESCORE_SW_B2, FREESCORE_SW_B3, GROUND, K6_4.Q, GROUND)
+ ALIAS(FREE_GAME, E7.EQOUT)
+
+ TTL_7474(F6_1, CLOCK_Q, E6.EQOUT, 128H_XOR_256H, P)
+ TTL_9316(H7, 1H, H6_1.Q, P, P, F6_1.QQ, P, P, GROUND, GROUND)
+ TTL_7404_INVERT(H6_1, H7.RC)
+ TTL_7474(A5_2, H7.RC, P, HRESET_Q, P)
+ TTL_7474(J7_1, H_WINDOW, A5_2.QQ, BAD_JUMP_Q, P)
+ TTL_7474(K7_1, JUMP_Q, J7_1.Q, CYCLE_RESET_A_Q, P)
+ TTL_7474(K7_2, JUMP_Q, J7_1.QQ, CYCLE_RESET_A_Q, OBJECT_HIT_Q)
+ ALIAS(GOOD_JUMP, K7_1.Q)
+ ALIAS(GOOD_JUMP_Q, K7_1.QQ)
+ ALIAS(BAD_JUMP, K7_2.Q)
+ ALIAS(BAD_JUMP_Q, K7_2.QQ)
+
+ TTL_7404_INVERT(H6_2, FIXED_RAMP_ZONE)
+ TTL_7474(J7_2, H6_2.Q, V_RAMP, H7.RC, P)
+ ALIAS(OBJECT_ZONE, J7_2.Q)
+ ALIAS(OBJECT_ZONE_Q, J7_2.QQ)
+ ALIAS(FIXED_RAMP_ZONE_Q, H6_2.Q)
+
+ TTL_7408_AND(H5_3, F6_1.QQ, H7.RC)
+ TTL_7408_AND(H5_1, FIXED_RAMP_ZONE_Q, H7.RC)
+
+ TTL_7486_XOR(M2_2, 1V, H5_3.Q)
+ TTL_7486_XOR(M2_4, 2V, H5_3.Q)
+ TTL_7486_XOR(M2_1, 4V, H5_3.Q)
+
+ TTL_7493(N1, 2H, N1.QA, H5_1.Q, H5_1.Q)
+ TTL_7485(N2, M2_2.Q, M2_4.Q, M2_1.Q, GROUND, N1.QA, N1.QB, N1.QC, N1.QD, GROUND, GROUND, GROUND)
+ TTL_7486_XOR(M2_3, N2.GTOUT, H5_3.Q)
+ TTL_7400_NAND(L2_1, 16V, 64V)
+ TTL_7402_NOR(L1_1, L2_1.Q, 32V)
+ TTL_7400_NAND(L2_4, CYCLE_RESET, VRESET)
+ TTL_7410_NAND(E3_3, 8V, 128V, L1_1.Q)
+ TTL_7404_INVERT(N3_4, E3_3.Q)
+ TTL_7474(M1_1, 8V, L1_1.Q, L2_4.Q, M1_1.QQ)
+ TTL_7474(M1_2, 1H, M2_3.Q, V_RAMP, P)
+ TTL_7400_NAND(L2_2, M1_1.QQ, L1_1.Q)
+ TTL_7402_NOR(L1_2, H5_1.Q, M1_2.QQ)
+ ALIAS(V_RAMP, N3_4.Q)
+ ALIAS(V_RAMP_Q, E3_3.Q)
+ ALIAS(V_COUNTER_RESET_Q, L2_2.Q)
+ ALIAS(RAMPS, L1_2.Q)
+
+ TTL_7402_NOR(L1_3, RAMPS, RAMPS)
+ ALIAS(RAMPS_Q, L1_3.Q)
+
+ TTL_7400_NAND(D5_1, FIXED_RAMP_ZONE_Q, D5_2.Q)
+ TTL_7400_NAND(D5_2, CYCLE_RESET_Q, D5_1.Q)
+ ALIAS(H_COUNTER_RESET_Q, D5_1.Q)
+
+ TTL_7404_INVERT(H6_6, END_GAME_Q)
+ ALIAS(END_GAME, H6_6.Q)
+
+ TTL_7404_INVERT(K8_1, RETURN_THROTTLE)
+ ALIAS(RETURN_THROTTLE_Q, K8_1.Q)
+
+ /* Controls */
+
+ CLOCK(SPEED_PULSES, 1000) // FIXME: Should be output of a 566 VCO
+ TTL_INPUT(R38_2, 0) // FIXME: Should be output of the resistor connected to LM747 L10_1
+ TTL_INPUT(R39_2, 0) // FIXME: Should be output of the resistor connected to LM747 L10_2
+
+ // FIXME: Hack
+ TTL_7400_NAND(N5_4, SPEED_KILL_Q, CYCLE_RESET_Q)
+ TTL_7410_NAND(M5_2, P, ATTRACT_Q, N5_4.Q)
+ ALIAS(SPEED_KILL_Q, M5_2.Q)
+
+ TTL_7402_NOR(K6_2, CYCLE_RESET, SPEED_KILL_Q)
+ ALIAS(RETURN_THROTTLE, K6_2.Q)
+
+ TTL_7408_AND(N8_1, CYCLE_WINDOW, RAMPS)
+ ALIAS(RAMPS_AND_CYCLE_WINDOW, N8_1.Q)
+
+ TTL_7400_NAND(M7_1, OBJECT_ZONE, CYCLE)
+ ALIAS(OBJECT_HIT_Q, M7_1.Q)
+
+ TTL_7400_NAND(N9_2, FIXED_RAMP_ZONE, RAMPS_AND_CYCLE_WINDOW)
+ TTL_7408_AND(N8_4, OBJECT_HIT_Q, N9_2.Q)
+ ALIAS(LOAD_Q, N8_4.Q)
+
+ RES(R106, 330)
+ CAP(C57, CAP_P(220))
+ NET_C(R106.1, LOAD_Q)
+ NET_C(R106.2, C57.1)
+ NET_C(C57.2, GND)
+
+ TTL_7400_NAND(N9_4, R106.2, N9_1.Q)
+ TTL_7400_NAND(N9_1, MS_3, N9_4.Q)
+ ALIAS(JUMP, N9_4.Q)
+ ALIAS(JUMP_Q, N9_1.Q)
+
+ TTL_7400_NAND(N9_3, JUMP, BAD_JUMP_Q)
+
+ TTL_7400_NAND(L9_1, R39_2, BAD_JUMP_Q)
+ TTL_7400_NAND(L9_2, BAD_JUMP, 64V)
+ TTL_7420_NAND(M9_1, R38_2, GRAVITY, BAD_JUMP_Q, SPEED_KILL_Q)
+ TTL_7420_NAND(M9_2, L9_2.Q, SPEED_KILL_Q, L9_1.Q, GRAVITY)
+
+ TTL_7408_AND(L6_4, H_WINDOW_DELAYED, V_WINDOW)
+ ALIAS(CYCLE_WINDOW, L6_4.Q)
+
+ TTL_7474(N7_2, V_RAMP_Q, V_WINDOW, P, CYCLE_RESET_A_Q)
+ ALIAS(MS_3, N7_2.QQ)
+
+ TTL_7408_AND(N8_3, M8.QD, N7_2.Q)
+ ALIAS(SFX_CRASH, N8_3.Q)
+
+ TTL_7400_NAND(M7_4, MS_3, M8.BORROWQ)
+ TTL_7400_NAND(L9_4, BAD_JUMP_Q, M7_4.Q)
+ TTL_7400_NAND(L9_3, CYCLE_RESET_Q, L9_4.Q)
+ TTL_74193(M8, P, P, GROUND, GROUND, L9_3.Q, N9_3.Q, M9_1.Q, M9_2.Q)
+ ALIAS(R2, M8.QB)
+ ALIAS(R3, M8.QC)
+
+ TTL_74193(L8, FIXED_RAMP_ZONE_Q, FIXED_RAMP_ZONE, GROUND, GROUND, JUMP_Q, LOAD_Q, P, GRAVITY) // Schematics say C and D should be to VCC?
+ ALIAS(Av, L8.QA)
+ ALIAS(Bv, L8.QB)
+ ALIAS(Cv, L8.QC)
+
+ TTL_7404_INVERT(K8_3, L8.QD)
+ ALIAS(Dv, K8_3.Q)
+
+ TTL_7400_NAND(M6_1, JUMP_Q, FLIP)
+ TTL_7408_AND(N8_2, R2, R3)
+ TTL_7474(N7_1, VRESET_Q, N8_2.Q, CYCLE_RESET_Q, FLIP_Q)
+ ALIAS(FLIP, N7_1.Q)
+ ALIAS(FLIP_Q, N7_1.QQ)
+
+ TTL_7402_NOR(L7_4, BAD_JUMP, FLIP_Q)
+ ALIAS(SFX_SCREECH, L7_4.Q)
+
+ TTL_7402_NOR(L7_3, FLIP, JUMP)
+ ALIAS(FLIP_OR_JUMP_Q, L7_3.Q)
+
+ TTL_7402_NOR(L7_2, FLIP, RAMPS_AND_CYCLE_WINDOW)
+ TTL_7402_NOR(L7_1, BAD_JUMP, L7_2.Q)
+
+ TTL_7493(L5, VRESET_Q, L5.QA, L7_1.Q, L7_1.Q)
+ TTL_7474(F6_2, HSYNC_Q, L5.QD, BAD_JUMP_Q, P)
+ TTL_7408_AND(L6_3, L5.QD, F6_2.QQ)
+ ALIAS(GRAVITY, L6_3.Q)
+
+ TTL_7427_NOR(K5_1, 2V, L5.QA, 32V)
+ ALIAS(SFX_BOUNCE_SOUND, K5_1.Q)
+
+ TTL_7400_NAND(M7_3, MS_3, BAD_JUMP_Q)
+ TTL_7410_NAND(M5_1, M7_3.Q, HRESET, CYCLE)
+ TTL_7427_NOR(K5_2, 16V, HSYNC, 128V)
+ TTL_7400_NAND(M6_3, CYCLE, K5_2.Q)
+ ALIAS(OUT_OF_SEQUENCE_RESET_Q, M6_3.Q)
+
+ TTL_7408_AND(L6_1, M5_1.Q, OUT_OF_SEQUENCE_RESET_Q)
+ TTL_7400_NAND(M6_4, SFX_SCREECH, JUMP)
+ TTL_7408_AND(L6_2, L6_1.Q, M6_4.Q)
+
+ RES(R40, RES_K(47))
+ RES(R41, RES_K(2.2))
+ RES(R42, RES_K(2.2))
+ RES(R43, RES_K(47))
+ CAP(C12, CAP_U(100))
+ CAP(C13, CAP_P(470))
+ CAP(C14, CAP_U(1))
+ TTL_9602_DIP(N6)
+ ALIAS(CYCLE_RESET, N6.9)
+ ALIAS(CYCLE_RESET_Q, N6.10)
+ ALIAS(FLIP_TIMER_Q, N6.7)
+
+ NET_C(R40.1, V5)
+ NET_C(R41.1, V5)
+ NET_C(R42.2, GND)
+ NET_C(R43.1, V5)
+ NET_C(C14.1, R43.2)
+ NET_C(C12.1, R40.2)
+ NET_C(C13.2, R41.2, R42.1)
+ NET_C(N6.4, BAD_JUMP)
+ NET_C(N6.5, M6_1.Q)
+ NET_C(N6.1, C12.2)
+ NET_C(N6.2, R40.2)
+ NET_C(N6.3, N6.9)
+ NET_C(N6.6, C13.1)
+ NET_C(N6.15, C14.2)
+ NET_C(N6.14, R43.2)
+ NET_C(N6.13, P)
+ NET_C(N6.11, L6_2.Q)
+
+ TTL_7400_NAND(M6_2, START_Q, R42.1)
+ NET_C(N6.12, M6_2.Q)
+
+ TTL_7404_INVERT(K8_2, CYCLE_RESET)
+ ALIAS(CYCLE_RESET_A_Q, K8_2.Q)
+#endif
+NETLIST_END()
diff --git a/src/mame/machine/nl_stuntcyc.h b/src/mame/machine/nl_stuntcyc.h
new file mode 100644
index 00000000000..71fd5bfbb7a
--- /dev/null
+++ b/src/mame/machine/nl_stuntcyc.h
@@ -0,0 +1,4 @@
+// license:BSD-3-Clause
+// copyright-holders:Ryan Holtz
+
+NETLIST_EXTERNAL(stuntcyc)
diff --git a/src/mame/machine/pc9801_86.cpp b/src/mame/machine/pc9801_86.cpp
index a60accde274..f7d9b6245b0 100644
--- a/src/mame/machine/pc9801_86.cpp
+++ b/src/mame/machine/pc9801_86.cpp
@@ -4,8 +4,8 @@
NEC PC-9801-86 sound card
- Almost the same thing as PC-9801-86, but this one has YM2608 instead of
- YM2203
+ Similar to PC-9801-26, this one has YM2608 instead of YM2203 and an
+ additional DAC port
TODO:
- joystick code should be shared between -26, -86 and -118
diff --git a/src/mame/machine/slapfght.cpp b/src/mame/machine/slapfght.cpp
index 8da2d772189..c8243414810 100644
--- a/src/mame/machine/slapfght.cpp
+++ b/src/mame/machine/slapfght.cpp
@@ -48,159 +48,108 @@ READ8_MEMBER(slapfght_state::tigerh_mcu_status_r)
}
-/**************************************************************************/
+/***************************************************************************
-READ8_MEMBER(slapfght_state::tigerh_68705_portA_r)
-{
- return (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
-}
+ MCU port handlers (general)
-WRITE8_MEMBER(slapfght_state::tigerh_68705_portA_w)
-{
- m_portA_out = data;
-}
+***************************************************************************/
-WRITE8_MEMBER(slapfght_state::tigerh_68705_ddrA_w)
+
+READ8_MEMBER(slapfght_state::tigerh_mcu_porta_r)
{
- m_ddrA = data;
+ return m_to_mcu_latch;
}
-READ8_MEMBER(slapfght_state::tigerh_68705_portB_r)
+WRITE8_MEMBER(slapfght_state::tigerh_mcu_porta_w)
{
- return (m_portB_out & m_ddrB) | (m_portB_in & ~m_ddrB);
+ m_from_mcu_latch = data;
}
-WRITE8_MEMBER(slapfght_state::tigerh_68705_portB_w)
+
+/***************************************************************************
+
+ MCU port handlers (Tiger Heli)
+
+***************************************************************************/
+
+WRITE8_MEMBER(slapfght_state::tigerh_mcu_portb_w)
{
- if ((m_ddrB & 0x02) && (~data & 0x02) && (m_portB_out & 0x02))
+ if ((mem_mask & 0x02) && (~data & 0x02) && (m_old_portB & 0x02))
{
if (m_main_sent)
m_mcu->set_input_line(0, CLEAR_LINE);
- m_portA_in = m_from_main;
+ m_to_mcu_latch = m_from_main;
m_main_sent = false;
}
- if ((m_ddrB & 0x04) && (data & 0x04) && (~m_portB_out & 0x04))
+ if ((mem_mask & 0x04) && (data & 0x04) && (~m_old_portB & 0x04))
{
- m_from_mcu = m_portA_out;
+ m_from_mcu = m_from_mcu_latch;
m_mcu_sent = true;
}
- m_portB_out = data;
+ m_old_portB = data;
}
-WRITE8_MEMBER(slapfght_state::tigerh_68705_ddrB_w)
+READ8_MEMBER(slapfght_state::tigerh_mcu_portc_r)
{
- m_ddrB = data;
-}
-
-
-READ8_MEMBER(slapfght_state::tigerh_68705_portC_r)
-{
- m_portC_in = 0;
+ uint8_t ret = 0;
if (!m_main_sent)
- m_portC_in |= 0x01;
+ ret |= 0x01;
if (m_mcu_sent)
- m_portC_in |= 0x02;
+ ret |= 0x02;
- return (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
+ return ret;
}
-WRITE8_MEMBER(slapfght_state::tigerh_68705_portC_w)
-{
- m_portC_out = data;
-}
-
-WRITE8_MEMBER(slapfght_state::tigerh_68705_ddrC_w)
-{
- m_ddrC = data;
-}
-
-
-
/***************************************************************************
- Slap Fight MCU
+ MCU port handlers (Slap Fight)
***************************************************************************/
-READ8_MEMBER(slapfght_state::slapfight_68705_portA_r)
+WRITE8_MEMBER(slapfght_state::slapfght_mcu_portb_w)
{
- return (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
-}
-
-WRITE8_MEMBER(slapfght_state::slapfight_68705_portA_w)
-{
- m_portA_out = data;
-}
-
-WRITE8_MEMBER(slapfght_state::slapfight_68705_ddrA_w)
-{
- m_ddrA = data;
-}
-
-READ8_MEMBER(slapfght_state::slapfight_68705_portB_r)
-{
- return (m_portB_out & m_ddrB) | (m_portB_in & ~m_ddrB);
-}
-
-WRITE8_MEMBER(slapfght_state::slapfight_68705_portB_w)
-{
- if ((m_ddrB & 0x02) && (~data & 0x02) && (m_portB_out & 0x02))
+ if ((mem_mask & 0x02) && (~data & 0x02) && (m_old_portB & 0x02))
{
if (m_main_sent)
m_mcu->set_input_line(0, CLEAR_LINE);
- m_portA_in = m_from_main;
+ m_to_mcu_latch = m_from_main;
m_main_sent = false;
}
- if ((m_ddrB & 0x04) && (data & 0x04) && (~m_portB_out & 0x04))
+ if ((mem_mask & 0x04) && (data & 0x04) && (~m_old_portB & 0x04))
{
- m_from_mcu = m_portA_out;
+ m_from_mcu = m_from_mcu_latch;
m_mcu_sent = true;
}
- if ((m_ddrB & 0x08) && (~data & 0x08) && (m_portB_out & 0x08))
+ if ((mem_mask & 0x08) && (~data & 0x08) && (m_old_portB & 0x08))
{
- m_scrollx_lo = m_portA_out;
+ m_scrollx_lo = m_from_mcu_latch;
}
- if ((m_ddrB & 0x10) && (~data & 0x10) && (m_portB_out & 0x10))
+ if ((mem_mask & 0x10) && (~data & 0x10) && (m_old_portB & 0x10))
{
- m_scrollx_hi = m_portA_out;
+ m_scrollx_hi = m_from_mcu_latch;
}
- m_portB_out = data;
+ m_old_portB = data;
}
-WRITE8_MEMBER(slapfght_state::slapfight_68705_ddrB_w)
+READ8_MEMBER(slapfght_state::slapfght_mcu_portc_r)
{
- m_ddrB = data;
-}
+ uint8_t ret = 0;
-READ8_MEMBER(slapfght_state::slapfight_68705_portC_r)
-{
- m_portC_in = 0;
-
- if (m_main_sent)
- m_portC_in |= 0x01;
- if (!m_mcu_sent)
- m_portC_in |= 0x02;
-
- return (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
-}
+ if (!m_main_sent)
+ ret |= 0x01;
+ if (m_mcu_sent)
+ ret |= 0x02;
-WRITE8_MEMBER(slapfght_state::slapfight_68705_portC_w)
-{
- m_portC_out = data;
-}
+ ret ^= 0x3; // inverted logic compared to tigerh
-WRITE8_MEMBER(slapfght_state::slapfight_68705_ddrC_w)
-{
- m_ddrC = data;
+ return ret;
}
-
-
/***************************************************************************
Get Star MCU simulation :(
diff --git a/src/mame/machine/theglobp.cpp b/src/mame/machine/theglobp.cpp
deleted file mode 100644
index 8c153ecfa13..00000000000
--- a/src/mame/machine/theglobp.cpp
+++ /dev/null
@@ -1,258 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Nicola Salmoria
-/***************************************************************************
-
- machine.c
-
- Functions to emulate general aspects of the machine (RAM, ROM, interrupts,
- I/O ports)
-
- The Glob protection description:
-
- The Glob is designed to run on modified Pacman hardware. It contains
- two graphics ROMs at 5E and 5F, but contains code ROMs on a daughterboard
- similar in concept to Ms. Pacman. However, these code ROMs are decrypted
- through additional circuitry. The daughterboard was encased in epoxy.
-
- Here's a description of the protection as best as I can give it.
-
- 1) The decrypted D0 bit fed to the CPU is simply an inversion of the
- D5 bit from the code ROMs.
- 2) The decrypted D1 bit fed to the CPU is simply an inversion of the
- D2 bit from the code ROMs.
- 3) The other 6 data bits are decrypted by a 10H8 PAL. The PAL also
- takes as input a 4-bit counter. The counter is incremented and
- decremented as follows:
- - the Z-80 command IN($xx) where xx is an odd number decrements the
- counter; an even number increments the counter.
- Ex: IN($64) would increment the counter, IN($6B) would decrement
- the counter.
- 4) The PAL output also contains the two ROM enable lines used to enable
- the two encrypted code ROMs. As long as the system is working
- correctly, these ROMs will always be enabled.
-
- As it so happens, only four counter values are ever used, which is
- fortunate because the PAL only contains signals to enable the ROMs for
- those four counter values. The valid counter values are $8, $9, $A, and
- $B. The counter's intial value is $A, which is set by jumpers on the
- daughterboard. Following is a description of the resulting decryptions
- for these four counter states.
-
- COUNTER ENCRYPTED DECRYPTED
- VALUE VALUE
-
- DDDDDDDD DDDDDDDD
- 76543210 76543210
-
- Counter = 8: abcdefgh EAhBDgFC
- Counter = 9: abcdefgh FAgeDBFC
- Counter = A: abcdefgh EHDBagFC
- Counter = B: abcdefgh GHDEaBFC
-
- In the above diagram, capital letters represent inverted bits. Notice
- that bits D2 and D5 are the same independent of counter state, this is
- because these bits are not decrypted by the PAL.
-
-
- In the code below, all four of these decryption patterns are used to
- decrypt the entire code ROMs before execution. This is done for speed,
- since we can then just bankswitch between the decrypted code sets on
- each IN($xx) command, as opposed to dynamically decrypting every byte.
-
- - Mike Balfour (mab22@po.cwru.edu)
-
-***************************************************************************/
-
-#include "emu.h"
-#include "includes/pacman.h"
-
-
-void pacman_state::theglobp_decrypt_rom_8()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- /* PAL */
- newbyte |= (oldbyte & 0x01) << 5;
- newbyte |= (oldbyte & 0x02) << 1;
- newbyte |= (inverted_oldbyte & 0x08) << 4;
- newbyte |= (inverted_oldbyte & 0x10) >> 1;
- newbyte |= (inverted_oldbyte & 0x40) >> 2;
- newbyte |= (inverted_oldbyte & 0x80) >> 1;
-
- RAM[mem + 0x10000] = newbyte;
- }
-
- return;
-}
-
-
-void pacman_state::theglobp_decrypt_rom_9()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- /* PAL */
- newbyte |= (oldbyte & 0x01) << 5;
- newbyte |= (inverted_oldbyte & 0x02) << 6;
- newbyte |= (oldbyte & 0x08) << 1;
- newbyte |= (inverted_oldbyte & 0x10) >> 1;
- newbyte |= (inverted_oldbyte & 0x40) >> 4;
- newbyte |= (inverted_oldbyte & 0x80) >> 1;
-
- RAM[mem + 0x14000] = newbyte;
- }
-
- return;
-}
-
-void pacman_state::theglobp_decrypt_rom_A()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- /* PAL */
- newbyte |= (inverted_oldbyte & 0x01) << 6;
- newbyte |= (oldbyte & 0x02) << 1;
- newbyte |= (inverted_oldbyte & 0x08) << 4;
- newbyte |= (inverted_oldbyte & 0x10) << 1;
- newbyte |= (inverted_oldbyte & 0x40) >> 2;
- newbyte |= (oldbyte & 0x80) >> 4;
-
- RAM[mem + 0x18000] = newbyte;
- }
-
- return;
-}
-
-void pacman_state::theglobp_decrypt_rom_B()
-{
- int oldbyte,inverted_oldbyte,newbyte;
- int mem;
- uint8_t *RAM;
-
- RAM = memregion("maincpu")->base();
-
- for (mem=0;mem<0x4000;mem++)
- {
- oldbyte = RAM[mem];
- inverted_oldbyte = ~oldbyte;
-
- /* Note: D2 is inverted and connected to D1, D5 is inverted and
- connected to D0. The other six data bits are converted by a
- PAL10H8 driven by the counter. */
-
- /* Direct inversion */
- newbyte = (inverted_oldbyte & 0x04) >> 1;
- newbyte |= (inverted_oldbyte & 0x20) >> 5;
- /* PAL */
- newbyte |= (inverted_oldbyte & 0x01) << 6;
- newbyte |= (inverted_oldbyte & 0x02) << 6;
- newbyte |= (oldbyte & 0x08) << 1;
- newbyte |= (inverted_oldbyte & 0x10) << 1;
- newbyte |= (inverted_oldbyte & 0x40) >> 4;
- newbyte |= (oldbyte & 0x80) >> 4;
-
- RAM[mem + 0x1C000] = newbyte;
- }
-
- return;
-}
-
-
-READ8_MEMBER(pacman_state::theglobp_decrypt_rom )
-{
- if (offset & 0x01)
- {
- m_counter = (m_counter - 1) & 0x0F;
- }
- else
- {
- m_counter = (m_counter + 1) & 0x0F;
- }
-
- switch(m_counter)
- {
- case 0x08: membank ("bank1")->set_entry (0); break;
- case 0x09: membank ("bank1")->set_entry (1); break;
- case 0x0A: membank ("bank1")->set_entry (2); break;
- case 0x0B: membank ("bank1")->set_entry (3); break;
- default:
- logerror("Invalid counter = %02X\n",m_counter);
- break;
- }
-
- return 0;
-}
-
-
-MACHINE_START_MEMBER(pacman_state,theglobp)
-{
- uint8_t *RAM = memregion("maincpu")->base();
-
- /* While the PAL supports up to 16 decryption methods, only four
- are actually used in the PAL. Therefore, we'll take a little
- memory overhead and decrypt the ROMs using each method in advance. */
- theglobp_decrypt_rom_8();
- theglobp_decrypt_rom_9();
- theglobp_decrypt_rom_A();
- theglobp_decrypt_rom_B();
-
- membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
-
- save_item(NAME(m_counter));
-}
-
-
-MACHINE_RESET_MEMBER(pacman_state,theglobp)
-{
- /* The initial state of the counter is 0x0A */
- m_counter = 0x0A;
- membank("bank1")->set_entry(2);
-}
diff --git a/src/mame/machine/toaplan1.cpp b/src/mame/machine/toaplan1.cpp
index 3ecf716ce63..8e790267d76 100644
--- a/src/mame/machine/toaplan1.cpp
+++ b/src/mame/machine/toaplan1.cpp
@@ -12,32 +12,6 @@
#include "includes/toaplan1.h"
-
-/* List of possible regions for coinage (for games with unemulated sound CPU) */
-enum {
- TOAPLAN1_REGION_JAPAN=0,
- TOAPLAN1_REGION_US,
- TOAPLAN1_REGION_WORLD,
- TOAPLAN1_REGION_OTHER
-};
-
-static const uint8_t toaplan1_coins_for_credit[TOAPLAN1_REGION_OTHER+1][2][4] =
-{
- { { 1, 1, 2, 2 }, { 1, 1, 2, 2 } }, /* TOAPLAN1_REGION_JAPAN */
- { { 1, 1, 2, 2 }, { 1, 1, 2, 2 } }, /* TOAPLAN1_REGION_US */
- { { 1, 2, 3, 4 }, { 1, 1, 1, 1 } }, /* TOAPLAN1_REGION_WORLD */
- { { 1, 1, 1, 1 }, { 1, 1, 1, 1 } } /* TOAPLAN1_REGION_OTHER */
-};
-
-static const uint8_t toaplan1_credits_for_coin[TOAPLAN1_REGION_OTHER+1][2][4] =
-{
- { { 1, 2, 1, 3 }, { 1, 2, 1, 3 } }, /* TOAPLAN1_REGION_JAPAN */
- { { 1, 2, 1, 3 }, { 1, 2, 1, 3 } }, /* TOAPLAN1_REGION_US */
- { { 1, 1, 1, 1 }, { 2, 3, 4, 6 } }, /* TOAPLAN1_REGION_WORLD */
- { { 1, 1, 1, 1 }, { 1, 1, 1, 1 } }, /* TOAPLAN1_REGION_OTHER */
-};
-
-
INTERRUPT_GEN_MEMBER(toaplan1_state::toaplan1_interrupt)
{
if (m_intenable)
@@ -179,109 +153,6 @@ READ16_MEMBER(toaplan1_state::samesame_port_6_word_r)
return (0x80 | ioport("TJUMP")->read()) & 0xff;
}
-READ16_MEMBER(toaplan1_state::vimana_system_port_r)
-{
- static const uint8_t vimana_region[16] =
- {
- TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US , TOAPLAN1_REGION_WORLD, TOAPLAN1_REGION_JAPAN,
- TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_US ,
- TOAPLAN1_REGION_JAPAN, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER,
- TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_OTHER, TOAPLAN1_REGION_JAPAN
- };
-
- int data, p, r, d, slot, reg, dsw;
-
- slot = -1;
- d = ioport("DSWA")->read();
- r = ioport("TJUMP")->read();
- p = ioport("SYSTEM")->read();
- m_vimana_latch ^= p;
- data = (m_vimana_latch & p);
-
- /* simulate the mcu keeping track of credits based on region and coinage settings */
- /* latch so it doesn't add more than one coin per keypress */
- if (d & 0x04) /* "test mode" ON */
- {
- m_vimana_coins[0] = m_vimana_coins[1] = 0;
- m_vimana_credits = 0;
- }
- else /* "test mode" OFF */
- {
- if (data & 0x02) /* TILT */
- {
- m_vimana_coins[0] = m_vimana_coins[1] = 0;
- m_vimana_credits = 0;
- }
- if (data & 0x01) /* SERVICE1 */
- {
- m_vimana_credits++ ;
- }
- if (data & 0x08) /* COIN1 */
- {
- slot = 0;
- }
- if (data & 0x10) /* COIN2 */
- {
- slot = 1 ;
- }
-
- if (slot != -1)
- {
- reg = vimana_region[r];
- dsw = (d & 0xf0) >> (4 + 2 * slot);
- m_vimana_coins[slot]++;
- if (m_vimana_coins[slot] >= toaplan1_coins_for_credit[reg][slot][dsw])
- {
- m_vimana_credits += toaplan1_credits_for_coin[reg][slot][dsw];
- m_vimana_coins[slot] -= toaplan1_coins_for_credit[reg][slot][dsw];
- }
- machine().bookkeeping().coin_counter_w(slot, 1);
- machine().bookkeeping().coin_counter_w(slot, 0);
- }
-
- if (m_vimana_credits >= 9)
- m_vimana_credits = 9;
- }
-
- machine().bookkeeping().coin_lockout_global_w((m_vimana_credits >= 9));
-
- m_vimana_latch = p;
-
- return p & 0xffff;
-}
-
-READ16_MEMBER(toaplan1_state::vimana_mcu_r)
-{
- int data = 0 ;
- switch (offset)
- {
- case 0: data = 0xff; break;
- case 1: data = 0x00; break;
- case 2:
- {
- data = m_vimana_credits;
- break;
- }
- }
- return data & 0xff;
-}
-
-WRITE16_MEMBER(toaplan1_state::vimana_mcu_w)
-{
- switch (offset)
- {
- case 0: break;
- case 1: break;
- case 2:
- if (ACCESSING_BITS_0_7)
- {
- m_vimana_credits = data & 0xff;
- machine().bookkeeping().coin_lockout_global_w((m_vimana_credits >= 9));
- }
- break;
- }
-}
-
READ16_MEMBER(toaplan1_state::toaplan1_shared_r)
{
return m_sharedram[offset] & 0xff;
@@ -398,9 +269,6 @@ MACHINE_RESET_MEMBER(toaplan1_state,demonwld)
MACHINE_RESET_MEMBER(toaplan1_state,vimana)
{
MACHINE_RESET_CALL_MEMBER(toaplan1);
- m_vimana_coins[0] = m_vimana_coins[1] = 0;
- m_vimana_credits = 0;
- m_vimana_latch = 0;
m_maincpu->set_reset_callback(write_line_delegate(FUNC(toaplan1_state::toaplan1_reset_callback),this));
}
@@ -421,10 +289,3 @@ void toaplan1_state::demonwld_driver_savestate()
machine().save().register_postload(save_prepost_delegate(FUNC(toaplan1_state::demonwld_restore_dsp), this));
}
-void toaplan1_state::vimana_driver_savestate()
-{
- save_item(NAME(m_vimana_coins[0]));
- save_item(NAME(m_vimana_coins[1]));
- save_item(NAME(m_vimana_credits));
- save_item(NAME(m_vimana_latch));
-}
diff --git a/src/mame/machine/xbox.cpp b/src/mame/machine/xbox.cpp
index 7e3ddf3ae63..4405046c13a 100644
--- a/src/mame/machine/xbox.cpp
+++ b/src/mame/machine/xbox.cpp
@@ -21,9 +21,9 @@
#define LOG_PCI
//#define LOG_AUDIO
-const xbox_base_state::debugger_constants xbox_base_state::debugp[] = {
- { 0x66232714, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} },
- { 0x49d8055a, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} }
+const xbox_base_state::debugger_constants xbox_base_state::debugp[] = {
+ { 0x66232714, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} },
+ { 0x49d8055a, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} }
};
int xbox_base_state::find_bios_index(running_machine &mach)
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 9bbd6af8bc9..13670f1e5f0 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -904,6 +904,7 @@ spinlbrkj // (c) 1990 V-System Co. (Japan)
spinlbrku // (c) 1990 V-System Co. (US)
svolly91 // (c) 1991 Video System Co. (Japan)
turbofrc // (c) 1991 Video System Co.
+turbofrcu // (c) 1991 Video System Co. (US)
wbbc97 // (c) 1997 Comad
@source:age_candy.cpp
@@ -9612,7 +9613,7 @@ cocoe // Color Computer (Extended BASIC 1.0)
cp400 // Prologica CP400
lzcolor64 // Digiponto LZ Color64
mx1600 // Dynacom MX-1600
-t4426 // Terco T4426 CNC programming station
+t4426 // Terco T4426 CNC programming station
@source:coco3.cpp
coco3 // Color Computer 3 (NTSC)
@@ -10698,6 +10699,7 @@ ddribblep // GX690 (c) 1986
bttf_a20 //
bttf_a21 //
bttf_a27 //
+bttf_a28 //
bttf_g27 //
kiko_a10 //
lwar_a81 //
@@ -10827,6 +10829,7 @@ drgninjab2 // bootleg
ffantasy // EX (c) 1989 Data East Corporation (World)
ffantasyj // EV (c) 1989 Data East Corporation (Japan)
ffantasya // EV (c) 1989 Data East Corporation (Japan)
+ffantasyb // EX (c) 1989 Data East Corporation (World)
ffantasybl // bootleg
hbarrel // (c) 1987 Data East USA (US)
hbarrelw // (c) 1987 Data East Corporation (World)
@@ -10888,6 +10891,7 @@ ddream95 // MCE (c) 1996 Data East Corporation
hoops95 // MCE (c) 1996 Data East Corporation
hoops96 // MCE (c) 1996 Data East Corporation
skullfng // MCH (c) 1996 Data East Corporation (World)
+skullfnga // MCH (c) 1996 Data East Corporation (Asia)
skullfngj // MCH (c) 1996 Data East Corporation (Japan)
stadhr96 // MCM (c) 1996 Data East Corporation (World)
stadhr96j // MCM (c) 1996 Data East Corporation (Japan)
@@ -11355,10 +11359,11 @@ yarunara // "55" Mahjong Yarunara 1991 Dynax
@source:dynduke.cpp
dbldynj // (c) 1989 Seibu Kaihatsu
dbldynu // (c) 1989 Seibu Kaihatsu + Fabtek license
-dynduke // (c) 1989 Seibu Kaihatsu
-dyndukea // (c) 1989 Seibu Kaihatsu
-dyndukej // (c) 1989 Seibu Kaihatsu
-dyndukeu // (c) 1989 Seibu Kaihatsu + Fabtek license
+dynduke // (c) 1989 Seibu Kaihatsu (03SEP89)
+dyndukea // (c) 1989 Seibu Kaihatsu (25JUL89)
+dyndukej // (c) 1989 Seibu Kaihatsu (03SEP89
+dyndukeja // (c) 1989 Seibu Kaihatsu (25JUL89)
+dyndukeu // (c) 1989 Seibu Kaihatsu + Fabtek license (25JUL89)
@source:eacc.cpp
eacc //
@@ -11993,7 +11998,7 @@ sd1 // 1990 SD-1
sd132 // 1991 SD-1 32
sq1 // 1990 SQ-1
sqrack // 1990 SQ-Rack
-sq2 // 1991 SQ-2
+sq2 // 1991 SQ-2
vfx // 1989 VFX
vfxsd // 1989 VFX-SD
@@ -12207,6 +12212,9 @@ fb01 // 1986 FB-01
@source:fc100.cpp
fc100 //
+@source:fccpu20.cpp
+fccpu20
+
@source:fccpu30.cpp
fccpu30
fccpu30x
@@ -12304,6 +12312,7 @@ super9ccsp // * Spanish
feagv10 //
feagv11 //
feagv2 //
+feagv2a //
feagv7 //
feagv9 //
fexcel68k //
@@ -12789,6 +12798,7 @@ jumpbug // (c) 1981 Rock-ola
jumpbugb // (c) 1981 Sega
jungsub // bootleg
kamakazi3 // Video Games (UK) Ltd., hack or bootleg?
+kamikazp // bootleg (Potomac Games)
kingball // (c) 1980 Namco
kingballj // (c) 1980 Namco
kong // (c) Taito (Brazil) - rewrite of Donkey Kong
@@ -12796,11 +12806,11 @@ levers // (c) 1983 Rock-ola
losttomb // (c) 1982 Stern
losttombh // (c) 1982 Stern
luctoday // 1980 Sigma
+mltiwars // bootleg (Gayton Games)
monsterz // (c) 1982 Nihon (Arcade TV Game List - P.102, Left, 20 from top)
moonal2 // [1980] Nichibutsu
moonal2b // [1980] Nichibutsu
moonaln // [Nichibutsu] (Karateco license) or hack
-kamikazp // bootleg (Potomac Games)
mooncmw // bootleg
mooncptc // bootleg (Petaco S.A.)
mooncreg // bootleg
@@ -13345,7 +13355,7 @@ pc // 1987 PC with CGA
pcega // 1987 PC with EGA
pcherc // 1987 PC with Hercules (for testing hercules)
pcmda // 1987 PC with MDA
-xtvga // 198? PC-XT (VGA, MF2 Keyboard)
+pcvga // 198? PC-XT (VGA, MF2 Keyboard)
@source:ggconnie.cpp
ggconnie // (c) ???? Capcom
@@ -13381,7 +13391,7 @@ gkigtez //
gkkey //
igtsc //
ms72c //
-ms3 //
+ms3 //
@source:gladiatr.cpp
gcastle // QB (c) 1986 Taito Corporation (prototype?)
@@ -14416,6 +14426,7 @@ lemnangl // (c) 1990 Home Data
mhgaiden // (c) 1987 Home Data
mirderby // (c) 1988 Home Data?
mjclinic // (c) 1988 Home Data
+mjclinica // (c) 1988 Home Data
mjhokite // (c) 1988 Home Data
mjikaga // (c) 1991 Mitchell
mjkinjas // (c) 1991 Home Data
@@ -15102,7 +15113,9 @@ leking //
olympic //
@source:joctronic.cpp
+bldyrolr //
punkywil //
+slalom03 //
walkyria //
@source:jokrwild.cpp
@@ -16938,7 +16951,8 @@ gtrfrksa // 1999 - Guitar Freaks (GQ886 VER. AAC)
gtrfrksj // 1999 - Guitar Freaks (GQ886 VER. JAC)
gtrfrksu // 1999 - Guitar Freaks (GQ886 VER. UAC)
gunmania // 2000 - GunMania (GL906 VER. JAA)
-hndlchmp // 1997 - Handle Champ (GQ710 VER. JAA)
+strgchmp // 1997 - Steering Champ (GQ710 VER. UAA)
+hndlchmp // 1997 - Handle Champ (GQ710 VER. JAB)
hypbbc2p // 1999 - Hyper Bishi Bashi Champ - 2 Player (GX908 1999/08/24 VER. JAA)
hypbbc2pk // 1999 - Hyper Bishi Bashi Champ - 2 Player (GX908 1999/08/24 VER. KAA)
hyperbbc // 1998 - Hyper Bishi Bashi (GQ876 VER. EAA)
@@ -17323,7 +17337,7 @@ trojanr // 4/1986 (c) 1986 + Romstar
fball //
@source:lwriter.cpp
-lwriter // Apple LaserWriter
+lwriter // Apple LaserWriter
@source:lynx.cpp
lynx // Atari Lynx Handheld
@@ -20639,7 +20653,8 @@ mole // (c) 1982 Yachiyo Electronics, Ltd.
molecula //
@source:momoko.cpp
-momoko // (c) 1986 Jaleco
+momoko // (c) 1986 Jaleco (Japanese text)
+momokoe // (c) 1986 Jaleco (English text)
@source:monacogp.cpp
monacogp // (c) 1980 Sega
@@ -28786,6 +28801,7 @@ kof99p // 0251 (c) 1999 SNK
kog // bootleg of kof97
kotm // 0016 (c) 1991 SNK
kotm2 // 0039 (c) 1992 SNK
+kotm2a // 0039 (c) 1992 SNK
kotm2p // 0039 (c) 1992 SNK (prototype)
kotmh // 0016 (c) 1991 SNK
lans2004 // bootleg of shocktr2
@@ -28855,7 +28871,7 @@ quizkofk // 0080 (c) 1995 Saurus
ragnagrd // 0218 (c) 1996 Saurus
rbff1 // 0095 (c) 1995 SNK
rbff1a // 0095 (c) 1995 SNK
-rbff1k // 0095 (c) 1995 SNK
+rbff1k // 0095 (c) 1995 SNK
rbff2 // 0240 (c) 1998 SNK
rbff2h // 0240 (c) 1998 SNK
rbff2k // 0140 Censored Korean release of rbff2
@@ -29398,6 +29414,7 @@ crushs // 1981 bootleg
ctrpllrp // hack
dremshpr // (c) 1982 Sanritsu
drivfrcp // (c) 1984 Shinkai Inc. (Magic Eletronics Inc. license)
+eeekk // (c) 1984 Epos Corporation
eggor // (c) 1983 Telko
eyes // (c) 1982 Digitrex Techstar + "Rockola presents"
eyes2 // (c) 1982 Techstar + "Rockola presents"
@@ -29597,6 +29614,8 @@ ssam88s //
sx16 // Sanyo SX-16
zdsupers //
ncrpc4i // NCR PC4i
+laser_turbo_xt // 1988 VTech Laser Turbo XT
+laser_xt3 // 1989 VTech Laser XT/3
@source:pc100.cpp
pc100 //
@@ -30684,6 +30703,8 @@ madrace //
zira //
@source:play_3.cpp
+cobrapb //
+eballchps //
fldragon //
fldragona //
ironball //
@@ -35160,8 +35181,9 @@ landgearj // 1996.?? E17 (c) 1996 Taito Corporation (Japan
landgearja // 1996.03 E17 (c) 1996 Taito Corporation (Japan) - Ver 3.0 J
sidebs // 1996.07 E23 (c) 1996 Taito Corporation (Japan) - Ver 2.7 J
sidebs2 // 1997.07 E38 (c) 1997 Taito Corporation (World) - Ver 2.6 OK
-sidebs2j // 1997.07 E38 (c) 1997 Taito Corporation (Japan) - Ver 2.4 J
+sidebs2j // 1997.07 E38 (c) 1997 Taito Corporation (Japan) - Ver 3.1 J
sidebs2u // 1997.07 E38 (c) 1997 Taito Corporation (US) - Ver 2.6 A
+sidebs2ja // 1997.07 E38 (c) 1997 Taito Corporation (Japan) - Ver 2.4 J
sidebsja // 1996.07 E23 (c) 1996 Taito Corporation (Japan) - Ver 2.6 J
sidebsjb // 1996.07 E23 (c) 1996 Taito Corporation (Japan) - Ver 2.5 J
@@ -35802,6 +35824,7 @@ tnzsj // B53 (c) 1988 Taito Corporation (Japan) (new p
tnzsjo // B53 (c) 1988 Taito Corporation (Japan) (old pcb)
tnzsuo // B53 (c) 1988 Taito America Corporation (US) (old pcb)
tnzso // B53 (c) 1988 Taito Corporation Japan (World) (old pcb)
+tnzsoa // B53?(c) 1988 Taito Corporation Japan (World?) (unknown revision, prototype?)
tnzsop // B53?(c) 1988 Taito Corporation Japan (World?) (old pcb, prototype)
@source:toaplan1.cpp
@@ -35827,6 +35850,7 @@ outzonecv // TP-O18 (c) 1990 Toaplan (TP-015 conversion)
rallybik // B45 / TP-O12 (c) 1988 Taito
samesame // TP-O17 (c) 1989 Toaplan
samesame2 // TP-O17 (c) 1989 Toaplan
+samesamenh // hack
truxton // B65 / TP-O13B (c) 1988 Taito
vimana // TP-O19 (c) 1991 Toaplan (+ Tecmo license when set to Japan)
vimanaj // TP-O19 (c) 1991 Toaplan (+ Tecmo license when set to Japan)
@@ -35902,6 +35926,7 @@ tekipaki // TP-020 (c) 1991 Toaplan
truxton2 // TP-024 (c) 1992 Toaplan
vfive // TP-027 (c) 1993 Toaplan (Japan)
whoopee // TP-025
+enmadaio // TP-031
@source:toki.cpp
juju // (c) 1989 Tad (Japan)
diff --git a/src/mame/nl.lst b/src/mame/nl.lst
index 44f009ed63f..9058e996083 100644
--- a/src/mame/nl.lst
+++ b/src/mame/nl.lst
@@ -36,6 +36,7 @@ pong // (c) 1972 Atari
pongd // (c) 1975 Atari
pongf // (c) 1972 Atari
breakout // (c) 1976 Atari
+stuntcyc // (c) 1976 Atari
@source:m62.cpp
battroad // (c) 1984
@@ -60,3 +61,6 @@ spelunkr // (c) 1985 licensed from Broderbund
spelunkrj // (c) 1985 licensed from Broderbund
yanchamr // (c) 1986 (Japan)
youjyudn // (c) 1986 (Japan)
+
+hazl1500
+
diff --git a/src/mame/video/combatsc.cpp b/src/mame/video/combatsc.cpp
index ea839d681b9..e53b1c5fa14 100644
--- a/src/mame/video/combatsc.cpp
+++ b/src/mame/video/combatsc.cpp
@@ -325,8 +325,14 @@ WRITE8_MEMBER(combatsc_state::combatsc_pf_control_w)
k007121->ctrl_w(space, offset, data);
if (offset == 7)
+ {
m_bg_tilemap[m_video_circuit]->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
-
+ if(m_video_circuit == 0)
+ {
+ m_textflip = (data & 0x08) == 0x08;
+ m_textlayer->set_flip((data & 0x08) ? TILEMAP_FLIPY | TILEMAP_FLIPX : 0);
+ }
+ }
if (offset == 3)
{
if (data & 0x08)
@@ -425,13 +431,15 @@ uint32_t combatsc_state::screen_update_combatsc(screen_device &screen, bitmap_in
{
rectangle clip;
clip = cliprect;
-
+
for (i = 0; i < 32; i++)
{
// scrollram [0x20]-[0x3f]: char enable (presumably bit 0 only)
- if(m_scrollram[0x20 + i] == 0)
+ uint8_t base_scroll = m_textflip == true ? (0x3f - i) : (0x20 + i);
+ if(m_scrollram[base_scroll] == 0)
continue;
+
clip.min_y = i * 8;
clip.max_y = clip.min_y + 7;
diff --git a/src/mame/video/deco16ic.cpp b/src/mame/video/deco16ic.cpp
index 03677b75e8a..5549b11e137 100644
--- a/src/mame/video/deco16ic.cpp
+++ b/src/mame/video/deco16ic.cpp
@@ -192,7 +192,7 @@ deco16ic_device::deco16ic_device(const machine_config &mconfig, const char *tag,
m_pf12_last_big(0),
m_pf1_8bpp_mode(0),
m_split(0),
- m_full_width12(1),
+ m_tilemapsizes(1),
m_pf1_trans_mask(0xf),
m_pf2_trans_mask(0xf),
m_pf1_colour_bank(0),
@@ -229,22 +229,23 @@ void deco16ic_device::device_start()
int fullheight = 0;
int fullwidth = 0;
+ int fullheight_8x8 = 0;
- if (m_full_width12&2)
+
+ if (m_tilemapsizes&4)
+ fullheight_8x8 = 1;
+
+ if (m_tilemapsizes&2)
fullheight = 1;
- if (m_full_width12&1)
+ if (m_tilemapsizes&1)
fullwidth = 1;
m_pf1_tilemap_16x16 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf1_tile_info),this), tilemap_mapper_delegate(FUNC(deco16ic_device::deco16_scan_rows),this), 16, 16, fullwidth ? 64 : 32, fullheight ?64 : 32);
-// m_pf1_tilemap_8x8 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf1_tile_info_b),this), TILEMAP_SCAN_ROWS, 8, 8, m_full_width12 ? 64 : 32, 32);
- m_pf1_tilemap_8x8 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf1_tile_info_b),this), TILEMAP_SCAN_ROWS, 8, 8, 64 , 32); // nitroball
-
- if (m_split)
- m_pf2_tilemap_16x16 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf2_tile_info),this), tilemap_mapper_delegate(FUNC(deco16ic_device::deco16_scan_rows),this), 16, 16, fullwidth ? 64 : 32, fullheight ? 64 : 32);
- else
- m_pf2_tilemap_16x16 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf2_tile_info),this), tilemap_mapper_delegate(FUNC(deco16ic_device::deco16_scan_rows),this), 16, 16, fullwidth ? 64 : 32, fullheight ? 64 : 32);
+// m_pf1_tilemap_8x8 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf1_tile_info_b),this), TILEMAP_SCAN_ROWS, 8, 8, m_tilemapsizes ? 64 : 32, 32);
+ m_pf1_tilemap_8x8 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf1_tile_info_b),this), TILEMAP_SCAN_ROWS, 8, 8, 64 , fullheight_8x8 ? 64 : 32); // nitroball
+ m_pf2_tilemap_16x16 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf2_tile_info),this), tilemap_mapper_delegate(FUNC(deco16ic_device::deco16_scan_rows),this), 16, 16, fullwidth ? 64 : 32, fullheight ? 64 : 32);
m_pf2_tilemap_8x8 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(deco16ic_device::get_pf2_tile_info_b),this), TILEMAP_SCAN_ROWS, 8, 8, fullwidth ? 64 : 32, fullheight ? 64 : 32);
m_pf1_tilemap_8x8->set_transparent_pen(0);
@@ -678,7 +679,9 @@ static int deco16_pf_update(
const uint16_t scrollx,
const uint16_t scrolly,
const uint16_t control0,
- const uint16_t control1)
+ const uint16_t control1,
+ const int tilemapsizes
+ )
{
int rows, cols, offs, use_custom = 0;
@@ -731,11 +734,17 @@ static int deco16_pf_update(
if (tilemap_8x8)
{
+ int numrows = rows;
+
+ // wolffang uses a larger 8x8 tilemap for the Japanese intro text, everything else seems to need this logic tho?
+ if (!(tilemapsizes & 4))
+ numrows = rows >> 1;
+
tilemap_8x8->set_scroll_cols(1);
- tilemap_8x8->set_scroll_rows(rows / 2);
+ tilemap_8x8->set_scroll_rows(numrows);
tilemap_8x8->set_scrolly(0, scrolly);
- for (offs = 0; offs < rows / 2; offs++)
+ for (offs = 0; offs < numrows; offs++)
tilemap_8x8->set_scrollx(offs, scrollx + rowscroll_ptr[offs]);
}
}
@@ -826,8 +835,8 @@ void deco16ic_device::pf_update( const uint16_t *rowscroll_1_ptr, const uint16_t
/* Update scrolling and tilemap enable */
m_pf1_rowscroll_ptr = rowscroll_1_ptr;
m_pf2_rowscroll_ptr = rowscroll_2_ptr;
- m_use_custom_pf2 = deco16_pf_update(m_pf2_tilemap_8x8, m_pf2_tilemap_16x16, rowscroll_2_ptr, m_pf12_control[3], m_pf12_control[4], m_pf12_control[5] >> 8, m_pf12_control[6] >> 8);
- m_use_custom_pf1 = deco16_pf_update(m_pf1_tilemap_8x8, m_pf1_tilemap_16x16, rowscroll_1_ptr, m_pf12_control[1], m_pf12_control[2], m_pf12_control[5] & 0xff, m_pf12_control[6] & 0xff);
+ m_use_custom_pf2 = deco16_pf_update(m_pf2_tilemap_8x8, m_pf2_tilemap_16x16, rowscroll_2_ptr, m_pf12_control[3], m_pf12_control[4], m_pf12_control[5] >> 8, m_pf12_control[6] >> 8, m_tilemapsizes);
+ m_use_custom_pf1 = deco16_pf_update(m_pf1_tilemap_8x8, m_pf1_tilemap_16x16, rowscroll_1_ptr, m_pf12_control[1], m_pf12_control[2], m_pf12_control[5] & 0xff, m_pf12_control[6] & 0xff, m_tilemapsizes);
/* Update banking and global flip state */
if (!m_bank1_cb.isnull())
diff --git a/src/mame/video/deco16ic.h b/src/mame/video/deco16ic.h
index 8af152bc96b..1483c62c24c 100644
--- a/src/mame/video/deco16ic.h
+++ b/src/mame/video/deco16ic.h
@@ -34,7 +34,7 @@ public:
static void set_bank1_callback(device_t &device, deco16_bank_cb_delegate callback) { downcast<deco16ic_device &>(device).m_bank1_cb = callback; }
static void set_bank2_callback(device_t &device, deco16_bank_cb_delegate callback) { downcast<deco16ic_device &>(device).m_bank2_cb = callback; }
static void set_split(device_t &device, int split) { downcast<deco16ic_device &>(device).m_split = split; }
- static void set_full_width(device_t &device, int width) { downcast<deco16ic_device &>(device).m_full_width12 = width; }
+ static void set_full_width(device_t &device, int width) { downcast<deco16ic_device &>(device).m_tilemapsizes = width; }
static void set_pf1_trans_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf1_trans_mask = mask; }
static void set_pf2_trans_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf2_trans_mask = mask; }
static void set_pf1_col_mask(device_t &device, int mask) { downcast<deco16ic_device &>(device).m_pf1_colourmask = mask; }
@@ -142,7 +142,7 @@ private:
int m_pf1_8bpp_mode;
int m_split;
- int m_full_width12;
+ int m_tilemapsizes;
int m_pf1_trans_mask, m_pf2_trans_mask;
int m_pf1_colour_bank, m_pf2_colour_bank;
int m_pf1_colourmask, m_pf2_colourmask;
diff --git a/src/mame/video/fromance.cpp b/src/mame/video/fromance.cpp
index d94982d4ca5..a42eb221506 100644
--- a/src/mame/video/fromance.cpp
+++ b/src/mame/video/fromance.cpp
@@ -217,7 +217,7 @@ WRITE8_MEMBER(fromance_state::fromance_scroll_w)
}
else
{
-
+
switch (offset)
{
case 0:
@@ -273,12 +273,12 @@ void fromance_state::crtc_refresh()
visarea.min_y = 0;
visarea.max_x = ((m_crtc_data[0]+1)*4) - 1;
visarea.max_y = 240 - 1;
-
+
refresh = HZ_TO_ATTOSECONDS(60);
-
- m_screen->configure(512, 256, visarea, refresh);
+
+ m_screen->configure(512, 256, visarea, refresh);
}
-
+
WRITE8_MEMBER(fromance_state::fromance_crtc_data_w)
{
m_crtc_data[m_crtc_register] = data;
@@ -288,7 +288,7 @@ WRITE8_MEMBER(fromance_state::fromance_crtc_data_w)
case 0x00:
crtc_refresh();
break;
-
+
case 0x0b:
// TODO: actually is never > 0x80?
m_crtc_timer->adjust(m_screen->time_until_vblank_start(), (data > 0x80) ? 2 : 1);
diff --git a/src/mame/video/k053246_k053247_k055673.cpp b/src/mame/video/k053246_k053247_k055673.cpp
index 714e581cd4b..30b0a5cf41a 100644
--- a/src/mame/video/k053246_k053247_k055673.cpp
+++ b/src/mame/video/k053246_k053247_k055673.cpp
@@ -1023,10 +1023,10 @@ void k055673_device::device_start()
memset(m_kx46_regs, 0, 8);
memset(m_kx47_regs, 0, 32);
- machine().save().save_pointer(NAME(m_ram.get()), 0x800);
- machine().save().save_item(NAME(m_kx46_regs));
- machine().save().save_item(NAME(m_kx47_regs));
- machine().save().save_item(NAME(m_objcha_line));
+ save_pointer(NAME(m_ram.get()), 0x800);
+ save_item(NAME(m_kx46_regs));
+ save_item(NAME(m_kx47_regs));
+ save_item(NAME(m_objcha_line));
}
//-------------------------------------------------
diff --git a/src/mame/video/k054156_k054157_k056832.cpp b/src/mame/video/k054156_k054157_k056832.cpp
index 51502c14130..b11001ab8c3 100644
--- a/src/mame/video/k054156_k054157_k056832.cpp
+++ b/src/mame/video/k054156_k054157_k056832.cpp
@@ -291,8 +291,6 @@ void k056832_device::create_tilemaps()
void k056832_device::finalize_init()
{
- int i;
-
update_page_layout();
change_rambank();
@@ -301,37 +299,33 @@ void k056832_device::finalize_init()
save_item(NAME(m_videoram));
save_item(NAME(m_regs));
save_item(NAME(m_regsb));
+
+ save_item(NAME(m_cur_gfx_banks));
+
+ save_item(NAME(m_rom_half));
+
+ save_item(NAME(m_layer_assoc_with_page));
+ save_item(NAME(m_layer_offs));
+ save_item(NAME(m_lsram_page));
save_item(NAME(m_x));
save_item(NAME(m_y));
save_item(NAME(m_w));
save_item(NAME(m_h));
save_item(NAME(m_dx));
save_item(NAME(m_dy));
+ save_item(NAME(m_line_dirty));
+ save_item(NAME(m_all_lines_dirty));
+ save_item(NAME(m_page_tile_mode));
+ save_item(NAME(m_last_colorbase));
save_item(NAME(m_layer_tile_mode));
-
save_item(NAME(m_default_layer_association));
+ save_item(NAME(m_layer_association));
save_item(NAME(m_active_layer));
save_item(NAME(m_linemap_enabled));
save_item(NAME(m_use_ext_linescroll));
save_item(NAME(m_uses_tile_banks));
save_item(NAME(m_cur_tile_bank));
- save_item(NAME(m_rom_half));
- save_item(NAME(m_all_lines_dirty));
- save_item(NAME(m_page_tile_mode));
- for (i = 0; i < 8; i++)
- {
- save_item(NAME(m_layer_offs[i]), i);
- save_item(NAME(m_lsram_page[i]), i);
- }
-
- for (i = 0; i < K056832_PAGE_COUNT; i++)
- {
- save_item(NAME(m_line_dirty[i]), i);
- save_item(NAME(m_all_lines_dirty[i]), i);
- save_item(NAME(m_page_tile_mode[i]), i);
- save_item(NAME(m_last_colorbase[i]), i);
- }
machine().save().register_postload(save_prepost_delegate(FUNC(k056832_device::postload), this));
}
diff --git a/src/mame/video/konamigx.cpp b/src/mame/video/konamigx.cpp
index c637dfd9197..205a0c1da87 100644
--- a/src/mame/video/konamigx.cpp
+++ b/src/mame/video/konamigx.cpp
@@ -1097,7 +1097,20 @@ void konamigx_state::common_init()
m_gx_tilebanks[i] = m_gx_oldbanks[i] = 0;
}
- machine().save().save_item(NAME(m_gx_tilebanks));
+ save_pointer(NAME(m_gx_spriteram), 0x800);
+ save_item(NAME(m_gx_tilebanks));
+ save_item(NAME(m_k053247_vrcbk));
+ save_item(NAME(m_k053247_coreg));
+ save_item(NAME(m_k053247_coregshift));
+ save_item(NAME(m_k053247_opset));
+ save_item(NAME(m_opri));
+ save_item(NAME(m_oinprion));
+ save_item(NAME(m_vcblk));
+ save_item(NAME(m_ocblk));
+ save_item(NAME(m_vinmix));
+ save_item(NAME(m_vmixon));
+ save_item(NAME(m_osinmix));
+ save_item(NAME(m_osmixon));
m_gx_tilemode = 0;
diff --git a/src/mame/video/leland.cpp b/src/mame/video/leland.cpp
index a4befb9668f..7f51b56b7c7 100644
--- a/src/mame/video/leland.cpp
+++ b/src/mame/video/leland.cpp
@@ -71,7 +71,7 @@ VIDEO_START_MEMBER(leland_state,leland)
save_item(NAME(m_gfxbank));
save_item(NAME(m_last_scanline));
for (uint8_t i = 0; i < 2; i++)
- {
+ {
save_item(NAME(m_vram_state[i].m_addr), i);
save_item(NAME(m_vram_state[i].m_latch), i);
}
@@ -90,7 +90,7 @@ VIDEO_START_MEMBER(leland_state,ataxx)
save_item(NAME(m_xscroll));
save_item(NAME(m_yscroll));
for (uint8_t i = 0; i < 2; i++)
- {
+ {
save_item(NAME(m_vram_state[i].m_addr), i);
save_item(NAME(m_vram_state[i].m_latch), i);
}
diff --git a/src/mame/video/midzeus.cpp b/src/mame/video/midzeus.cpp
index 2b3b3062cbe..b0e7d47bcdb 100644
--- a/src/mame/video/midzeus.cpp
+++ b/src/mame/video/midzeus.cpp
@@ -351,7 +351,7 @@ uint32_t midzeus_state::screen_update_midzeus(screen_device &screen, bitmap_ind1
poly->wait("VIDEO_UPDATE");
/* normal update case */
- if (!machine().input().code_pressed(KEYCODE_W))
+ if (!machine().input().code_pressed(KEYCODE_V))
{
const void *base = waveram1_ptr_from_expanded_addr(m_zeusbase[0xcc]);
int xoffs = screen.visible_area().min_x;
diff --git a/src/mame/video/namcos21.cpp b/src/mame/video/namcos21.cpp
index df6a7b79ac6..b3aed4c0d6a 100644
--- a/src/mame/video/namcos21.cpp
+++ b/src/mame/video/namcos21.cpp
@@ -7,6 +7,22 @@ Namco System 21 Video Hardware
- there are no tilemaps
- 3d graphics are managed by DSP processors
*/
+/* Palette:
+ 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors)
+
+ 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors)
+ (in starblade, some palette animation effects are performed here)
+
+ 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors)
+
+ 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors)
+
+ The polygon-dedicated color sets within a bank typically increase in
+ intensity from very dark to full intensity.
+
+ Probably the selected palette is determined by most significant bits of z-code.
+ This is not yet hooked up.
+ */
#include "emu.h"
#include "includes/namcoic.h"
@@ -103,101 +119,6 @@ void namcos21_state::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const r
}
}
-VIDEO_START_MEMBER(namcos21_state,namcos21)
-{
- if( m_gametype == NAMCOS21_WINRUN91 )
- {
- m_videoram = std::make_unique<uint8_t[]>(0x80000);
- }
- allocate_poly_framebuffer();
- c355_obj_init(
- 0, /* gfx bank */
- 0xf, /* reverse palette mapping */
- namcos2_shared_state::c355_obj_code2tile_delegate() );
-}
-
-
-/* Palette:
- 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors)
-
- 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors)
- (in starblade, some palette animation effects are performed here)
-
- 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors)
-
- 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors)
-
- The polygon-dedicated color sets within a bank typically increase in
- intensity from very dark to full intensity.
-
- Probably the selected palette is determined by most significant bits of z-code.
- This is not yet hooked up.
- */
-
-
-uint32_t namcos21_state::screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
-{
- uint8_t *videoram = m_videoram.get();
- int pivot = 3;
- int pri;
- bitmap.fill(0xff, cliprect );
-
- if( m_gametype != NAMCOS21_WINRUN91 )
- { /* draw low priority 2d sprites */
- c355_obj_draw(screen, bitmap, cliprect, 2 );
- c355_obj_draw(screen, bitmap, cliprect, 14 ); //driver's eyes
- }
-
- copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe);
-
- if( m_gametype != NAMCOS21_WINRUN91 )
- { /* draw low priority 2d sprites */
- c355_obj_draw(screen, bitmap, cliprect, 0 );
- c355_obj_draw(screen, bitmap, cliprect, 1 );
- }
-
- copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf);
-
-
- if( m_gametype != NAMCOS21_WINRUN91 )
- { /* draw high priority 2d sprites */
- for( pri=pivot; pri<8; pri++ )
- {
- c355_obj_draw(screen, bitmap, cliprect, pri );
- }
- c355_obj_draw(screen, bitmap, cliprect, 15 ); //driver's eyes
- }
- else
- { /* winrun bitmap layer */
- int yscroll = -cliprect.min_y+(int16_t)m_winrun_gpu_register[0x2/2];
- int base = 0x1000+0x100*(m_winrun_color&0xf);
- int sx,sy;
- for( sy=cliprect.min_y; sy<=cliprect.max_y; sy++ )
- {
- const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200];
- uint16_t *pDest = &bitmap.pix16(sy);
- for( sx=cliprect.min_x; sx<=cliprect.max_x; sx++ )
- {
- int pen = pSource[sx];
- switch( pen )
- {
- case 0xff:
- break;
- case 0x00:
- pDest[sx] = (pDest[sx]&0x1fff)+0x4000;
- break;
- case 0x01:
- pDest[sx] = (pDest[sx]&0x1fff)+0x6000;
- break;
- default:
- pDest[sx] = base|pen;
- break;
- }
- }
- }
- } /* winrun bitmap layer */
- return 0;
-}
/*********************************************************************************************/
@@ -436,3 +357,113 @@ void namcos21_state::draw_quad(int sx[4], int sy[4], int zcode[4], int color)
rendertri(&a, &b, &c, color, depthcueenable);
rendertri(&c, &d, &a, color, depthcueenable);
}
+
+VIDEO_START_MEMBER(namcos21_state,namcos21)
+{
+ if( m_gametype == NAMCOS21_WINRUN91 )
+ {
+ m_videoram = std::make_unique<uint8_t[]>(0x80000);
+ }
+ allocate_poly_framebuffer();
+ c355_obj_init(
+ 0, /* gfx bank */
+ 0xf, /* reverse palette mapping */
+ namcos2_shared_state::c355_obj_code2tile_delegate() );
+}
+
+uint32_t namcos21_state::screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ //uint8_t *videoram = m_videoram.get();
+ int pivot = 3;
+ int pri;
+ bitmap.fill(0xff, cliprect );
+
+ c355_obj_draw(screen, bitmap, cliprect, 2 );
+ //c355_obj_draw(screen, bitmap, cliprect, 14 ); //driver's eyes
+
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe);
+
+ c355_obj_draw(screen, bitmap, cliprect, 0 );
+ c355_obj_draw(screen, bitmap, cliprect, 1 );
+
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf);
+
+ /* draw high priority 2d sprites */
+ for( pri=pivot; pri<8; pri++ )
+ {
+ c355_obj_draw(screen, bitmap, cliprect, pri );
+ }
+ // c355_obj_draw(screen, bitmap, cliprect, 15 ); //driver's eyes
+ return 0;
+}
+
+uint32_t namcos21_state::screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ //uint8_t *videoram = m_videoram.get();
+ int pivot = 3;
+ int pri;
+ bitmap.fill(0xff, cliprect );
+
+ c355_obj_draw(screen, bitmap, cliprect, 2 );
+ c355_obj_draw(screen, bitmap, cliprect, 14 ); //driver's eyes
+
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe);
+
+ c355_obj_draw(screen, bitmap, cliprect, 0 );
+ c355_obj_draw(screen, bitmap, cliprect, 1 );
+
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf);
+
+ for( pri=pivot; pri<8; pri++ )
+ c355_obj_draw(screen, bitmap, cliprect, pri );
+
+ c355_obj_draw(screen, bitmap, cliprect, 15 ); //driver's eyes
+
+ return 0;
+
+}
+
+void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ uint8_t *videoram = m_videoram.get();
+ int yscroll = -cliprect.min_y+(int16_t)m_winrun_gpu_register[0x2/2];
+ int base = 0x1000+0x100*(m_winrun_color&0xf);
+ int sx,sy;
+ for( sy=cliprect.min_y; sy<=cliprect.max_y; sy++ )
+ {
+ const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200];
+ uint16_t *pDest = &bitmap.pix16(sy);
+ for( sx=cliprect.min_x; sx<=cliprect.max_x; sx++ )
+ {
+ int pen = pSource[sx];
+ switch( pen )
+ {
+ case 0xff:
+ break;
+ case 0x00:
+ pDest[sx] = (pDest[sx]&0x1fff)+0x4000;
+ break;
+ case 0x01:
+ pDest[sx] = (pDest[sx]&0x1fff)+0x6000;
+ break;
+ default:
+ pDest[sx] = base|pen;
+ break;
+ }
+ }
+ }
+}
+
+
+uint32_t namcos21_state::screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ bitmap.fill(0xff, cliprect );
+
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe);
+ copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf);
+ winrun_bitmap_draw(bitmap,cliprect);
+
+ //popmessage("%04x %04x %04x|%04x %04x",m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]);
+
+ return 0;
+}
diff --git a/src/mame/video/xbox_nv2a.cpp b/src/mame/video/xbox_nv2a.cpp
index bd761a8259e..0d0e2a9d6e1 100644
--- a/src/mame/video/xbox_nv2a.cpp
+++ b/src/mame/video/xbox_nv2a.cpp
@@ -5,8 +5,10 @@
#include "bitmap.h"
#include "machine/pic8259.h"
#include "includes/xbox_nv2a.h"
+#include <bitset>
//#define LOG_NV2A
+#define DEBUG_CHECKS // enable for debugging
const char *vertex_program_disassembler::srctypes[] = { "??", "Rn", "Vn", "Cn" };
const char *vertex_program_disassembler::scaops[] = { "NOP", "IMV", "RCP", "RCC", "RSQ", "EXP", "LOG", "LIT", "???", "???", "???", "???", "???", "???", "???", "???", "???" };
@@ -146,19 +148,23 @@ int vertex_program_disassembler::disassemble_mask(int mask, char *s)
return 0;
s[0] = '.';
l = 1;
- if ((mask & 8) != 0) {
+ if ((mask & 8) != 0)
+ {
s[l] = 'x';
l++;
}
- if ((mask & 4) != 0){
+ if ((mask & 4) != 0)
+ {
s[l] = 'y';
l++;
}
- if ((mask & 2) != 0){
+ if ((mask & 2) != 0)
+ {
s[l] = 'z';
l++;
}
- if ((mask & 1) != 0){
+ if ((mask & 1) != 0)
+ {
s[l] = 'w';
l++;
}
@@ -909,8 +915,8 @@ void nv2a_renderer::computedilated(void)
for (b = 0; b < 16; b++)
for (a = 0; a < 2048; a++) {
- dilated0[b][a] = dilate0(a, b);
- dilated1[b][a] = dilate1(a, b);
+ dilated0[b][a] = dilate0(a, b);
+ dilated1[b][a] = dilate1(a, b);
}
for (b = 0; b < 16; b++)
for (a = 0; a < 16; a++)
@@ -919,6 +925,10 @@ void nv2a_renderer::computedilated(void)
inline uint8_t *nv2a_renderer::direct_access_ptr(offs_t address)
{
+#ifdef DEBUG_CHECKS
+ if (address >= 512*1024*1024)
+ machine().logerror("Bad address in direct_access_ptr !\n");
+#endif
return basemempointer + address;
}
@@ -1267,6 +1277,13 @@ inline uint8_t *nv2a_renderer::read_pixel(int x, int y, int32_t c[4])
offset = (dilated0[dilate_rendertarget][x] + dilated1[dilate_rendertarget][y]) * bytespixel_rendertarget;
else // type_rendertarget == LINEAR
offset = pitch_rendertarget * y + x * bytespixel_rendertarget;
+#ifdef DEBUG_CHECKS
+ if (offset >= size_rendertarget)
+ {
+ machine().logerror("Bad offset computed in read_pixel !\n");
+ offset = 0;
+ }
+#endif
switch (colorformat_rendertarget) {
case NV2A_COLOR_FORMAT::R5G6B5:
addr16 = (uint16_t *)((uint8_t *)rendertarget + offset);
@@ -1317,13 +1334,20 @@ void nv2a_renderer::write_pixel(int x, int y, uint32_t color, int depth)
bool stencil_passed;
bool depth_passed;
- if ((depth > 0xffffff) || (depth < 0))
+ if ((depth > 0xffffff) || (depth < 0) || (x < 0))
return;
fb[3] = fb[2] = fb[1] = fb[0] = 0;
addr = nullptr;
if (color_mask != 0)
addr = read_pixel(x, y, fb);
if (depthformat_rendertarget == NV2A_RT_DEPTH_FORMAT::Z24S8) {
+#ifdef DEBUG_CHECKS
+ if (((pitch_depthbuffer / 4) * y + x) >= size_depthbuffer)
+ {
+ machine().logerror("Bad depthbuffer offset computed in write_pixel !\n");
+ return;
+ }
+#endif
daddr32 = depthbuffer + (pitch_depthbuffer / 4) * y + x;
deptsten = *daddr32;
dep = deptsten >> 8;
@@ -1331,6 +1355,13 @@ void nv2a_renderer::write_pixel(int x, int y, uint32_t color, int depth)
daddr16 = nullptr;
}
else if (depthformat_rendertarget == NV2A_RT_DEPTH_FORMAT::Z16) {
+#ifdef DEBUG_CHECKS
+ if (((pitch_depthbuffer / 2) * y + x) >= size_depthbuffer)
+ {
+ machine().logerror("Bad depthbuffer offset computed in write_pixel !\n");
+ return;
+ }
+#endif
daddr16 = (uint16_t *)depthbuffer + (pitch_depthbuffer / 2) * y + x;
deptsten = *daddr16;
dep = (deptsten << 8) | 0xff;
@@ -1907,23 +1938,29 @@ void nv2a_renderer::write_pixel(int x, int y, uint32_t color, int depth)
void nv2a_renderer::render_color(int32_t scanline, const extent_t &extent, const nvidia_object_data &objectdata, int threadid)
{
- int x;
+ int x, lx;
- if ((extent.startx < 0) || (extent.stopx > 640*4))
+ lx = limits_rendertarget.right();
+ if ((extent.startx < 0) && (extent.stopx <= 0))
return;
- x = extent.stopx - extent.startx - 1; // number of pixels to draw
+ if ((extent.startx > lx) && (extent.stopx > lx))
+ return;
+ x = extent.stopx - extent.startx; // number of pixels to draw (start inclusive, end exclusive)
+ if (extent.stopx > lx)
+ x = x - (extent.stopx - lx - 1);
+ x--;
while (x >= 0) {
uint32_t a8r8g8b8;
int z;
int ca, cr, cg, cb;
int xp = extent.startx + x; // x coordinate of current pixel
- cb = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].dpdx))*255.0f;
- cg = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].dpdx))*255.0f;
- cr = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].dpdx))*255.0f;
- ca = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].dpdx))*255.0f;
+ cb = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].dpdx))*255.0f;
+ cg = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].dpdx))*255.0f;
+ cr = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].dpdx))*255.0f;
+ ca = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].dpdx))*255.0f;
a8r8g8b8 = (ca << 24) + (cr << 16) + (cg << 8) + cb; // pixel color obtained by interpolating the colors of the vertices
- z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
+ z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
write_pixel(xp, scanline, a8r8g8b8, z);
x--;
}
@@ -1931,30 +1968,36 @@ void nv2a_renderer::render_color(int32_t scanline, const extent_t &extent, const
void nv2a_renderer::render_texture_simple(int32_t scanline, const extent_t &extent, const nvidia_object_data &objectdata, int threadid)
{
- int x;
+ int x, lx;
uint32_t a8r8g8b8;
- int z;
if (!objectdata.data->texture[0].enabled) {
return;
}
- if ((extent.startx < 0) || (extent.stopx > 640*4))
+ lx = limits_rendertarget.right();
+ if ((extent.startx < 0) && (extent.stopx <= 0))
return;
- x = extent.stopx - extent.startx - 1;
+ if ((extent.startx > lx) && (extent.stopx > lx))
+ return;
+ x = extent.stopx - extent.startx; // number of pixels to draw (start inclusive, end exclusive)
+ if (extent.stopx > lx)
+ x = x - (extent.stopx - lx - 1);
+ x--;
while (x >= 0) {
int up, vp;
+ int z;
int xp = extent.startx + x; // x coordinate of current pixel
if (objectdata.data->texture[0].rectangle == false) {
- up = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].dpdx)*(float)(objectdata.data->texture[0].sizeu - 1); // x coordinate of texel in texture
- vp = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].dpdx)*(float)(objectdata.data->texture[0].sizev - 1); // y coordinate of texel in texture
+ up = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].dpdx)*(double)(objectdata.data->texture[0].sizeu - 1); // x coordinate of texel in texture
+ vp = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].dpdx)*(double)(objectdata.data->texture[0].sizev - 1); // y coordinate of texel in texture
} else
{
- up = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].dpdx; // x coordinate of texel in texture
- vp = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].dpdx; // y coordinate of texel in texture
+ up = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U].dpdx; // x coordinate of texel in texture
+ vp = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V].dpdx; // y coordinate of texel in texture
}
a8r8g8b8 = texture_get_texel(0, up, vp);
- z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
+ z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
write_pixel(xp, scanline, a8r8g8b8, z);
x--;
}
@@ -1962,7 +2005,7 @@ void nv2a_renderer::render_texture_simple(int32_t scanline, const extent_t &exte
void nv2a_renderer::render_register_combiners(int32_t scanline, const extent_t &extent, const nvidia_object_data &objectdata, int threadid)
{
- int x, xp;
+ int x, lx, xp;
int up, vp;
int ca, cr, cg, cb;
uint32_t color[6];
@@ -1972,30 +2015,36 @@ void nv2a_renderer::render_register_combiners(int32_t scanline, const extent_t &
color[0] = color[1] = color[2] = color[3] = color[4] = color[5] = 0;
- if ((extent.startx < 0) || (extent.stopx > 640*4))
+ lx = limits_rendertarget.right();
+ if ((extent.startx < 0) && (extent.stopx <= 0))
+ return;
+ if ((extent.startx > lx) && (extent.stopx > lx))
return;
+ x = extent.stopx - extent.startx; // number of pixels to draw (start inclusive, end exclusive)
+ if (extent.stopx > lx)
+ x = x - (extent.stopx - lx - 1);
+ x--;
std::lock_guard<std::mutex> lock(combiner.lock); // needed since multithreading is not supported yet
- x = extent.stopx - extent.startx - 1; // number of pixels to draw
while (x >= 0) {
xp = extent.startx + x;
// 1: fetch data
// 1.1: interpolated color from vertices
- cb = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].dpdx))*255.0f;
- cg = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].dpdx))*255.0f;
- cr = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].dpdx))*255.0f;
- ca = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].dpdx))*255.0f;
+ cb = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_B].dpdx))*255.0f;
+ cg = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_G].dpdx))*255.0f;
+ cr = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_R].dpdx))*255.0f;
+ ca = ((extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_COLOR_A].dpdx))*255.0f;
color[0] = (ca << 24) + (cr << 16) + (cg << 8) + cb; // pixel color obtained by interpolating the colors of the vertices
color[1] = 0; // lighting not yet
// 1.2: color for each of the 4 possible textures
for (n = 0; n < 4; n++) {
if (texture[n].enabled) {
if (texture[n].rectangle == false) {
- up = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].dpdx)*(float)(objectdata.data->texture[n].sizeu - 1);
- vp = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].dpdx)*(float)(objectdata.data->texture[n].sizev - 1);
+ up = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].dpdx)*(double)(objectdata.data->texture[n].sizeu - 1);
+ vp = (extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].dpdx)*(double)(objectdata.data->texture[n].sizev - 1);
} else
{
- up = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].dpdx;
- vp = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].dpdx;
+ up = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_U + n * 2].dpdx;
+ vp = extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_TEXTURE0_V + n * 2].dpdx;
}
color[n + 2] = texture_get_texel(n, up, vp);
}
@@ -2021,7 +2070,7 @@ void nv2a_renderer::render_register_combiners(int32_t scanline, const extent_t &
combiner_final_output();
a8r8g8b8 = combiner_float_argb8(combiner.output);
// 3: write pixel
- z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (float)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
+ z = (extent.param[(int)VERTEX_PARAMETER::PARAM_Z].start + (double)x*extent.param[(int)VERTEX_PARAMETER::PARAM_Z].dpdx);
write_pixel(xp, scanline, a8r8g8b8, z);
x--;
}
@@ -2175,7 +2224,6 @@ void nv2a_renderer::read_vertex(address_space & space, offs_t address, vertex_nv
l = vertexbuffer_size[attrib];
switch (vertexbuffer_kind[attrib]) {
case NV2A_VTXBUF_TYPE::FLOAT:
- default:
vertex.attribute[attrib].fv[0] = 0;
vertex.attribute[attrib].fv[1] = 0;
vertex.attribute[attrib].fv[2] = 0;
@@ -2206,6 +2254,12 @@ void nv2a_renderer::read_vertex(address_space & space, offs_t address, vertex_nv
vertex.attribute[attrib].fv[2] = ((u & 0xff0000) >> 16) / 255.0; // r
vertex.attribute[attrib].fv[3] = ((u & 0xff000000) >> 24) / 255.0; // a
break;
+ default:
+ vertex.attribute[attrib].fv[0] = 0;
+ vertex.attribute[attrib].fv[1] = 0;
+ vertex.attribute[attrib].fv[2] = 0;
+ vertex.attribute[attrib].fv[3] = 1.0;
+ machine().logerror("Unsupported vertex type in read_vertex !\n");
}
}
@@ -2627,7 +2681,10 @@ uint32_t nv2a_renderer::render_triangle_culling(const rectangle &cliprect, rende
if (backface_culling_enabled == false)
return render_triangle(cliprect, callback, paramcount, _v1, _v2, _v3);
if (backface_culling_culled == NV2A_GL_CULL_FACE::FRONT_AND_BACK)
+ {
+ triangles_bfculled++;
return 0;
+ }
areax2 = _v1.x*(_v2.y - _v3.y) + _v2.x*(_v3.y - _v1.y) + _v3.x*(_v1.y - _v2.y);
if (backface_culling_winding == NV2A_GL_FRONT_FACE::CCW)
{
@@ -2648,53 +2705,18 @@ uint32_t nv2a_renderer::render_triangle_culling(const rectangle &cliprect, rende
if (face == NV2A_GL_CULL_FACE::BACK)
if (backface_culling_culled == NV2A_GL_CULL_FACE::FRONT)
return render_triangle(cliprect, callback, paramcount, _v1, _v2, _v3);
+ triangles_bfculled++;
return 0;
}
-uint32_t nv2a_renderer::render_triangle_clipping(const rectangle &cliprect, render_delegate callback, int paramcount, nv2avertex_t &_v1, nv2avertex_t &_v2, nv2avertex_t &_v3)
+int nv2a_renderer::clip_triangle_w(nv2avertex_t *vi[3], nv2avertex_t *vo)
{
- nv2avertex_t *vi[3];
- nv2avertex_t vo[16];
int idx_prev, idx_curr;
int neg_prev, neg_curr;
double tfactor;
int idx;
- const double wthreshold = 0.00000001;
+ const double wthreshold = 0.000001;
- if ((_v1.w > 0) && (_v2.w > 0) && (_v3.w > 0))
- return render_triangle_culling(cliprect, callback, paramcount, _v1, _v2, _v3);
- // assign the elements of the array
- vi[0] = &_v1;
- vi[1] = &_v2;
- vi[2] = &_v3;
- // go back to the state before perpective divide
- if (vertex_pipeline == 4)
- {
- for (int n = 0; n < 3; n++)
- {
- vi[n]->x = (vi[n]->x / (double)supersample_factor_x)*vi[n]->w;
- vi[n]->y = (vi[n]->y / (double)supersample_factor_y)*vi[n]->w;
- vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] * vi[n]->w;
- }
- } else
- {
- for (int n = 0; n < 3; n++)
- {
- // remove translate
- vi[n]->x = vi[n]->x - matrix.translate[0];
- vi[n]->y = vi[n]->y - matrix.translate[1];
- vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] - matrix.translate[2];
- // remove scale
- vi[n]->x = vi[n]->x / matrix.translate[0];
- vi[n]->y = vi[n]->y / matrix.translate[1];
- vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] / matrix.translate[2];
- // remove perspective divide
- vi[n]->x = vi[n]->x * vi[n]->w;
- vi[n]->y = vi[n]->y * vi[n]->w;
- vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] * vi[n]->w;
- }
- }
- // do the clipping
idx_prev = 2;
idx_curr = 0;
idx = 0;
@@ -2726,10 +2748,53 @@ uint32_t nv2a_renderer::render_triangle_clipping(const rectangle &cliprect, rend
idx_prev = idx_curr;
idx_curr++;
}
+ return idx;
+}
+
+uint32_t nv2a_renderer::render_triangle_clipping(const rectangle &cliprect, render_delegate callback, int paramcount, nv2avertex_t &_v1, nv2avertex_t &_v2, nv2avertex_t &_v3)
+{
+#if 0
+ nv2avertex_t *vi[3];
+ nv2avertex_t vo[16];
+ int nv;
+#endif
+
+ if ((_v1.w > 0) && (_v2.w > 0) && (_v3.w > 0))
+ return render_triangle_culling(cliprect, callback, paramcount, _v1, _v2, _v3);
+#if 0
+ // assign the elements of the array
+ vi[0] = &_v1;
+ vi[1] = &_v2;
+ vi[2] = &_v3;
+ // go back to the state before perpective divide
+ if (vertex_pipeline == 4)
+ {
+ for (int n = 0; n < 3; n++)
+ {
+ vi[n]->x = (vi[n]->x / (double)supersample_factor_x)*vi[n]->w;
+ vi[n]->y = (vi[n]->y / (double)supersample_factor_y)*vi[n]->w;
+ vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] * vi[n]->w;
+ }
+ } else
+ {
+ for (int n = 0; n < 3; n++)
+ {
+ // remove translate
+ vi[n]->x = vi[n]->x - matrix.translate[0];
+ vi[n]->y = vi[n]->y - matrix.translate[1];
+ vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] - matrix.translate[2];
+ // remove perspective divide
+ vi[n]->x = vi[n]->x * vi[n]->w;
+ vi[n]->y = vi[n]->y * vi[n]->w;
+ vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] = vi[n]->p[(int)VERTEX_PARAMETER::PARAM_Z] * vi[n]->w;
+ }
+ }
+ // do the clipping
+ nv = clip_triangle_w(vi, vo);
// screen coordinates for the new points
if (vertex_pipeline == 4)
{
- for (int n = 0; n < idx; n++)
+ for (int n = 0; n < nv; n++)
{
vo[n].x = vo[n].x*(double)supersample_factor_x / vo[n].w;
vo[n].y = vo[n].y*(double)supersample_factor_y / vo[n].w;
@@ -2737,34 +2802,28 @@ uint32_t nv2a_renderer::render_triangle_clipping(const rectangle &cliprect, rend
}
} else
{
- for (int n = 0; n < idx; n++)
+ for (int n = 0; n < nv; n++)
{
// apply perspective divide
vo[n].x = vo[n].x / vo[n].w;
vo[n].y = vo[n].y / vo[n].w;
vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] = vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] / vo[n].w;
- // apply scale
- vo[n].x = vo[n].x * matrix.scale[0];
- vo[n].y = vo[n].y * matrix.scale[1];
- vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] = vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] * matrix.scale[2];
// apply translate
vo[n].x = vo[n].x + matrix.translate[0];
vo[n].y = vo[n].y + matrix.translate[1];
vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] = vo[n].p[(int)VERTEX_PARAMETER::PARAM_Z] + matrix.translate[2];
}
}
- for (int n = 0; n < (idx - 2); n++)
- {
- if ((n & 1) == 0)
- render_triangle_culling(cliprect, callback, paramcount, vo[n], vo[n + 1], vo[n + 2]);
- else
- render_triangle_culling(cliprect, callback, paramcount, vo[n], vo[n + 2], vo[n + 1]);
- }
+ for (int n = 1; n <= (nv - 2); n++)
+ render_triangle_culling(cliprect, callback, paramcount, vo[0], vo[n], vo[n + 1]);
+#endif
return 0;
}
void nv2a_renderer::assemble_primitive(vertex_nv *source, int count, render_delegate &renderspans)
{
+ uint32_t pc = primitives_count;
+
for (; count > 0; count--) {
if (primitive_type == NV2A_BEGIN_END::QUADS) {
convert_vertices_poly(source, vertex_xy + vertex_count + vertex_accumulated, 1);
@@ -2872,6 +2931,7 @@ void nv2a_renderer::assemble_primitive(vertex_nv *source, int count, render_dele
vertex_count++;
}
}
+ primitives_total_count += primitives_count - pc;
}
void nv2a_renderer::compute_limits_rendertarget(uint32_t chanel, uint32_t subchannel)
@@ -2894,6 +2954,12 @@ void nv2a_renderer::compute_limits_rendertarget(uint32_t chanel, uint32_t subcha
limits_rendertarget.sety(y, y + h - 1);
}
+void nv2a_renderer::compute_size_rendertarget(uint32_t chanel, uint32_t subchannel)
+{
+ size_rendertarget = pitch_rendertarget*(limits_rendertarget.bottom() + 1);
+ size_depthbuffer = pitch_depthbuffer*(limits_rendertarget.bottom() + 1);
+}
+
int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, uint32_t subchannel, uint32_t method, uint32_t address, int &countlen)
{
uint32_t maddress;
@@ -3062,7 +3128,7 @@ int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, u
}
if ((maddress >= 0x1980) && (maddress < 0x1a00))
{
- int v = maddress - 0x1980; // 16 couples,4 values per couple
+ int v = maddress - 0x1980; // 16 couples,4 values per couple,16*2*4=128
int attr = v >> 3;
int comp = (v >> 1) & 2;
uint16_t d1 = data & 0xffff;
@@ -3217,9 +3283,11 @@ int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, u
}
if (maddress == 0x0200) {
compute_limits_rendertarget(chanel, subchannel);
+ compute_size_rendertarget(chanel, subchannel);
}
if (maddress == 0x0204) {
compute_limits_rendertarget(chanel, subchannel);
+ compute_size_rendertarget(chanel, subchannel);
}
if (maddress == 0x0208) {
log2height_rendertarget = (data >> 24) & 255;
@@ -3230,6 +3298,7 @@ int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, u
colorformat_rendertarget = (NV2A_COLOR_FORMAT)((data >> 0) & 15);
compute_supersample_factors(supersample_factor_x, supersample_factor_y);
compute_limits_rendertarget(chanel, subchannel);
+ compute_size_rendertarget(chanel, subchannel);
switch (colorformat_rendertarget) {
case NV2A_COLOR_FORMAT::R5G6B5:
bytespixel_rendertarget = 2;
@@ -3252,6 +3321,7 @@ int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, u
if (maddress == 0x020c) {
pitch_rendertarget=data & 0xffff;
pitch_depthbuffer=(data >> 16) & 0xffff;
+ compute_size_rendertarget(chanel, subchannel);
#ifdef LOG_NV2A
printf("Pitch color %04X zbuffer %04X\n\r", pitch_rendertarget, pitch_depthbuffer);
#endif
diff --git a/src/osd/modules/debugger/win/debugwin.h b/src/osd/modules/debugger/win/debugwin.h
index 0e3bcd25131..8f4a1c3f6c0 100644
--- a/src/osd/modules/debugger/win/debugwin.h
+++ b/src/osd/modules/debugger/win/debugwin.h
@@ -10,7 +10,6 @@
#define __DEBUG_WIN_DEBUG_WIN_H__
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <windowsx.h>
#include <tchar.h>
diff --git a/src/osd/modules/diagnostics/diagnostics_win32.cpp b/src/osd/modules/diagnostics/diagnostics_win32.cpp
index ac3b3b43b00..d833247274d 100644
--- a/src/osd/modules/diagnostics/diagnostics_win32.cpp
+++ b/src/osd/modules/diagnostics/diagnostics_win32.cpp
@@ -11,7 +11,6 @@
#if defined(OSD_WINDOWS) || defined(SDLMAME_WIN32)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#if WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
@@ -22,8 +21,6 @@
#include <memory>
#include <vector>
-#undef min
-#undef max
#include <utility>
#include "modules/lib/osdlib.h"
diff --git a/src/osd/modules/file/windir.cpp b/src/osd/modules/file/windir.cpp
index 84cdf367928..f9575b27e74 100644
--- a/src/osd/modules/file/windir.cpp
+++ b/src/osd/modules/file/windir.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <shlwapi.h>
#include <tchar.h>
diff --git a/src/osd/modules/file/winfile.cpp b/src/osd/modules/file/winfile.cpp
index 44f5b5c13ce..745b9112b7b 100644
--- a/src/osd/modules/file/winfile.cpp
+++ b/src/osd/modules/file/winfile.cpp
@@ -6,7 +6,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include "winfile.h"
diff --git a/src/osd/modules/file/winptty.cpp b/src/osd/modules/file/winptty.cpp
index b3eef069d22..ab0efae37ff 100644
--- a/src/osd/modules/file/winptty.cpp
+++ b/src/osd/modules/file/winptty.cpp
@@ -1,7 +1,6 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles, Vas Crabb
-#define WIN32_LEAN_AND_MEAN
#include "winfile.h"
diff --git a/src/osd/modules/file/winrtdir.cpp b/src/osd/modules/file/winrtdir.cpp
index dc0a9ae7408..be42b6fd874 100644
--- a/src/osd/modules/file/winrtdir.cpp
+++ b/src/osd/modules/file/winrtdir.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <shlwapi.h>
#include <tchar.h>
diff --git a/src/osd/modules/file/winrtfile.cpp b/src/osd/modules/file/winrtfile.cpp
index a33c61cd657..2e561aa32a9 100644
--- a/src/osd/modules/file/winrtfile.cpp
+++ b/src/osd/modules/file/winrtfile.cpp
@@ -6,7 +6,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include "winfile.h"
diff --git a/src/osd/modules/file/winrtptty.cpp b/src/osd/modules/file/winrtptty.cpp
index e32f035582d..ec1e6e73b38 100644
--- a/src/osd/modules/file/winrtptty.cpp
+++ b/src/osd/modules/file/winrtptty.cpp
@@ -1,7 +1,6 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles, Vas Crabb
-#define WIN32_LEAN_AND_MEAN
#include "winrtfile.h"
diff --git a/src/osd/modules/file/winrtsocket.cpp b/src/osd/modules/file/winrtsocket.cpp
index 94a8c3c3dc0..3f2241c25b5 100644
--- a/src/osd/modules/file/winrtsocket.cpp
+++ b/src/osd/modules/file/winrtsocket.cpp
@@ -6,7 +6,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include "winfile.h"
diff --git a/src/osd/modules/file/winsocket.cpp b/src/osd/modules/file/winsocket.cpp
index d1c3f4508e8..a383a876f9d 100644
--- a/src/osd/modules/file/winsocket.cpp
+++ b/src/osd/modules/file/winsocket.cpp
@@ -6,7 +6,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include "winfile.h"
diff --git a/src/osd/modules/font/font_dwrite.cpp b/src/osd/modules/font/font_dwrite.cpp
index 84b8926fe9d..74e15af9265 100644
--- a/src/osd/modules/font/font_dwrite.cpp
+++ b/src/osd/modules/font/font_dwrite.cpp
@@ -11,7 +11,6 @@
#if defined(OSD_WINDOWS) || defined(OSD_UWP)
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <memory>
@@ -80,7 +79,7 @@ HRESULT SaveBitmap(IWICBitmap* bitmap, GUID pixelFormat, const WCHAR *filename)
ComPtr<ID2D1Factory1> d2dfactory;
ComPtr<IDWriteFactory> dwriteFactory;
ComPtr<IWICImagingFactory> wicFactory;
-
+
OSD_DYNAMIC_API(dwrite, "dwrite.dll");
OSD_DYNAMIC_API(d2d1, "d2d1.dll");
OSD_DYNAMIC_API_FN(dwrite, HRESULT, WINAPI, DWriteCreateFactory, DWRITE_FACTORY_TYPE, REFIID, IUnknown **);
diff --git a/src/osd/modules/font/font_windows.cpp b/src/osd/modules/font/font_windows.cpp
index e1440e95af5..95f10c0a051 100644
--- a/src/osd/modules/font/font_windows.cpp
+++ b/src/osd/modules/font/font_windows.cpp
@@ -5,7 +5,6 @@
*
*/
-#define WIN32_LEAN_AND_MEAN
#include "font_module.h"
#include "modules/osdmodule.h"
diff --git a/src/osd/modules/input/input_common.h b/src/osd/modules/input/input_common.h
index c98845eb885..96a197f2543 100644
--- a/src/osd/modules/input/input_common.h
+++ b/src/osd/modules/input/input_common.h
@@ -21,8 +21,6 @@
#include <queue>
#include <algorithm>
#include <functional>
-#undef min
-#undef max
//============================================================
diff --git a/src/osd/modules/input/input_dinput.cpp b/src/osd/modules/input/input_dinput.cpp
index b47a7f86e7d..4d434ce3b4c 100644
--- a/src/osd/modules/input/input_dinput.cpp
+++ b/src/osd/modules/input/input_dinput.cpp
@@ -12,7 +12,6 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <initguid.h>
#include <tchar.h>
@@ -22,8 +21,6 @@
#undef WINNT
#include <dinput.h>
#undef interface
-#undef min
-#undef max
#include <mutex>
diff --git a/src/osd/modules/input/input_rawinput.cpp b/src/osd/modules/input/input_rawinput.cpp
index 3f5274c6eba..9243ec4a0f4 100644
--- a/src/osd/modules/input/input_rawinput.cpp
+++ b/src/osd/modules/input/input_rawinput.cpp
@@ -12,12 +12,9 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <tchar.h>
#undef interface
-#undef min
-#undef max
#include <mutex>
#include <functional>
diff --git a/src/osd/modules/input/input_uwp.cpp b/src/osd/modules/input/input_uwp.cpp
index 86e9ecfe671..ece01a41662 100644
--- a/src/osd/modules/input/input_uwp.cpp
+++ b/src/osd/modules/input/input_uwp.cpp
@@ -14,8 +14,6 @@
#include <agile.h>
#include <ppltasks.h>
#include <collection.h>
-#undef min
-#undef max
#undef interface
// MAME headers
diff --git a/src/osd/modules/input/input_win32.cpp b/src/osd/modules/input/input_win32.cpp
index a4e00eec17f..c07a1c681d8 100644
--- a/src/osd/modules/input/input_win32.cpp
+++ b/src/osd/modules/input/input_win32.cpp
@@ -12,12 +12,9 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <tchar.h>
#undef interface
-#undef min
-#undef max
// MAME headers
#include "emu.h"
diff --git a/src/osd/modules/input/input_windows.h b/src/osd/modules/input/input_windows.h
index fb269df07cf..7afc487fb62 100644
--- a/src/osd/modules/input/input_windows.h
+++ b/src/osd/modules/input/input_windows.h
@@ -10,7 +10,6 @@
#define INPUT_WIN_H_
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#undef interface
diff --git a/src/osd/modules/input/input_winhybrid.cpp b/src/osd/modules/input/input_winhybrid.cpp
index dae3c4bc3bf..6b945710e3b 100644
--- a/src/osd/modules/input/input_winhybrid.cpp
+++ b/src/osd/modules/input/input_winhybrid.cpp
@@ -11,22 +11,19 @@
#if defined(OSD_WINDOWS)
-#include <wbemcli.h>
#include <list>
#include <vector>
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <wrl/client.h>
+#include <wbemcli.h>
// XInput/DirectInput
#include <xinput.h>
#include <dinput.h>
#undef interface
-#undef min
-#undef max
// MAME headers
#include "emu.h"
diff --git a/src/osd/modules/input/input_xinput.cpp b/src/osd/modules/input/input_xinput.cpp
index 8baf1fd6cdd..e6ecdd4d177 100644
--- a/src/osd/modules/input/input_xinput.cpp
+++ b/src/osd/modules/input/input_xinput.cpp
@@ -12,15 +12,12 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
// XInput header
#include <xinput.h>
#undef interface
-#undef min
-#undef max
// MAME headers
#include "emu.h"
diff --git a/src/osd/modules/lib/osdlib_uwp.cpp b/src/osd/modules/lib/osdlib_uwp.cpp
index 170f964f74e..864177d9544 100644
--- a/src/osd/modules/lib/osdlib_uwp.cpp
+++ b/src/osd/modules/lib/osdlib_uwp.cpp
@@ -8,7 +8,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <mmsystem.h>
diff --git a/src/osd/modules/lib/osdlib_win32.cpp b/src/osd/modules/lib/osdlib_win32.cpp
index 907889f37ba..d4dc3327f17 100644
--- a/src/osd/modules/lib/osdlib_win32.cpp
+++ b/src/osd/modules/lib/osdlib_win32.cpp
@@ -8,7 +8,6 @@
//
//============================================================
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <mmsystem.h>
diff --git a/src/osd/modules/monitor/monitor_dxgi.cpp b/src/osd/modules/monitor/monitor_dxgi.cpp
index 27380ed6e6e..5cac0217e6d 100644
--- a/src/osd/modules/monitor/monitor_dxgi.cpp
+++ b/src/osd/modules/monitor/monitor_dxgi.cpp
@@ -11,13 +11,10 @@
#if defined(OSD_WINDOWS) || defined(OSD_UWP)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <dxgi1_2.h>
#include <wrl/client.h>
#undef interface
-#undef min
-#undef max
#include "strconv.h"
#include "modules/lib/osdlib.h"
diff --git a/src/osd/modules/monitor/monitor_win32.cpp b/src/osd/modules/monitor/monitor_win32.cpp
index f5e273a8bb6..47012615656 100644
--- a/src/osd/modules/monitor/monitor_win32.cpp
+++ b/src/osd/modules/monitor/monitor_win32.cpp
@@ -11,11 +11,8 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#undef interface
-#undef min
-#undef max
#include "strconv.h"
#include "windows/video.h"
diff --git a/src/osd/modules/netdev/pcap.cpp b/src/osd/modules/netdev/pcap.cpp
index ad49a399304..ad69c49339c 100644
--- a/src/osd/modules/netdev/pcap.cpp
+++ b/src/osd/modules/netdev/pcap.cpp
@@ -10,7 +10,6 @@
#include "modules/lib/osdlib.h"
#if defined(SDLMAME_WIN32) || defined(OSD_WINDOWS)
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#undef interface
#define LIB_NAME "wpcap.dll"
diff --git a/src/osd/modules/osdwindow.h b/src/osd/modules/osdwindow.h
index a77371668c8..6e80c8c2a6b 100644
--- a/src/osd/modules/osdwindow.h
+++ b/src/osd/modules/osdwindow.h
@@ -16,7 +16,6 @@
// standard windows headers
#ifdef OSD_WINDOWS
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <windowsx.h>
#include <mmsystem.h>
@@ -26,8 +25,6 @@
// forward declaration
struct SDL_Window;
#endif
-#undef min
-#undef max
//============================================================
// TYPE DEFINITIONS
diff --git a/src/osd/modules/output/win32_output.cpp b/src/osd/modules/output/win32_output.cpp
index 6ae431de099..34465659ce3 100644
--- a/src/osd/modules/output/win32_output.cpp
+++ b/src/osd/modules/output/win32_output.cpp
@@ -13,7 +13,6 @@
#if defined(OSD_WINDOWS)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
// MAME headers
diff --git a/src/osd/modules/render/bgfx/chainmanager.cpp b/src/osd/modules/render/bgfx/chainmanager.cpp
index a4306b9dfe2..64e71bd213a 100644
--- a/src/osd/modules/render/bgfx/chainmanager.cpp
+++ b/src/osd/modules/render/bgfx/chainmanager.cpp
@@ -20,8 +20,6 @@
#include <bx/readerwriter.h>
#include <bx/crtimpl.h>
-#undef min
-#undef max
#include "bgfxutil.h"
#include "chainmanager.h"
diff --git a/src/osd/modules/render/bgfx/shaders/makefile b/src/osd/modules/render/bgfx/shaders/makefile
index 792ef5647fd..1ca45471b9b 100644
--- a/src/osd/modules/render/bgfx/shaders/makefile
+++ b/src/osd/modules/render/bgfx/shaders/makefile
@@ -32,5 +32,5 @@ endif
@make -s --no-print-directory TARGET=3 clean all
@make -s --no-print-directory TARGET=4 clean all
@make -s --no-print-directory TARGET=5 clean all
-
+
.PHONY: main rebuild $(SUBDIRS)
diff --git a/src/osd/modules/render/drawbgfx.cpp b/src/osd/modules/render/drawbgfx.cpp
index f94e3bfa631..f23a5084d9f 100644
--- a/src/osd/modules/render/drawbgfx.cpp
+++ b/src/osd/modules/render/drawbgfx.cpp
@@ -7,7 +7,6 @@
//============================================================
#if defined(SDLMAME_WIN32) || defined(OSD_WINDOWS) || defined(OSD_UWP)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#if defined(SDLMAME_WIN32)
#include <SDL2/SDL_syswm.h>
diff --git a/src/osd/modules/render/drawd3d.h b/src/osd/modules/render/drawd3d.h
index f73f6704823..049b2c25ae3 100644
--- a/src/osd/modules/render/drawd3d.h
+++ b/src/osd/modules/render/drawd3d.h
@@ -13,7 +13,6 @@
#ifdef OSD_WINDOWS
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <tchar.h>
#include <mmsystem.h>
diff --git a/src/osd/modules/render/drawgdi.h b/src/osd/modules/render/drawgdi.h
index 6f41148dc70..7d0c2201079 100644
--- a/src/osd/modules/render/drawgdi.h
+++ b/src/osd/modules/render/drawgdi.h
@@ -12,7 +12,6 @@
#define __DRAWGDI__
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
// MAME headers
diff --git a/src/osd/modules/render/drawnone.cpp b/src/osd/modules/render/drawnone.cpp
index c5213afcec3..f56660a7d05 100644
--- a/src/osd/modules/render/drawnone.cpp
+++ b/src/osd/modules/render/drawnone.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
// MAME headers
diff --git a/src/osd/modules/sound/direct_sound.cpp b/src/osd/modules/sound/direct_sound.cpp
index 3117b354c84..4d6c8c26c50 100644
--- a/src/osd/modules/sound/direct_sound.cpp
+++ b/src/osd/modules/sound/direct_sound.cpp
@@ -12,7 +12,6 @@
#if defined(OSD_WINDOWS) || defined(SDLMAME_WIN32)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <mmsystem.h>
@@ -20,8 +19,6 @@
#undef WINNT
#include <dsound.h>
#undef interface
-#undef min
-#undef max
// MAME headers
#include "emu.h"
diff --git a/src/osd/modules/sound/xaudio2_sound.cpp b/src/osd/modules/sound/xaudio2_sound.cpp
index 6667fe7fccf..73573096f5a 100644
--- a/src/osd/modules/sound/xaudio2_sound.cpp
+++ b/src/osd/modules/sound/xaudio2_sound.cpp
@@ -12,7 +12,6 @@
#if defined(OSD_WINDOWS) || defined(OSD_UWP)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <wrl/client.h>
@@ -21,8 +20,6 @@
#include <xaudio2.h>
#undef interface
-#undef min
-#undef max
// stdlib includes
#include <mutex>
diff --git a/src/osd/osdsync.cpp b/src/osd/osdsync.cpp
index 2a0e996b465..12253f2acbd 100644
--- a/src/osd/osdsync.cpp
+++ b/src/osd/osdsync.cpp
@@ -7,7 +7,6 @@
//============================================================
#if defined(OSD_WINDOWS) || defined(SDLMAME_WIN32)
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <process.h>
#include <tchar.h>
@@ -21,8 +20,6 @@
#include <atomic>
#include <thread>
#include <vector>
-#undef min
-#undef max
#include <algorithm>
// MAME headers
#include "osdcore.h"
diff --git a/src/osd/sdl/sdlmain.cpp b/src/osd/sdl/sdlmain.cpp
index c518191d1a7..f8bcb231796 100644
--- a/src/osd/sdl/sdlmain.cpp
+++ b/src/osd/sdl/sdlmain.cpp
@@ -29,7 +29,6 @@
// only for strconv.h
#if defined(SDLMAME_WIN32)
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#endif
diff --git a/src/osd/sdl/window.cpp b/src/osd/sdl/window.cpp
index 17e25bbd875..fa9fe2989e9 100644
--- a/src/osd/sdl/window.cpp
+++ b/src/osd/sdl/window.cpp
@@ -9,7 +9,6 @@
//============================================================
#ifdef SDLMAME_WIN32
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#endif
diff --git a/src/osd/strconv.cpp b/src/osd/strconv.cpp
index d8fed98d687..9ea2e00bd1a 100644
--- a/src/osd/strconv.cpp
+++ b/src/osd/strconv.cpp
@@ -6,11 +6,8 @@
//
//============================================================
#if defined(SDLMAME_WIN32) || defined(OSD_WINDOWS) || defined(OSD_UWP)
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#endif
-#undef min
-#undef max
#include <algorithm>
#include <assert.h>
// MAMEOS headers
diff --git a/src/osd/strconv.h b/src/osd/strconv.h
index 65f9ad35fd1..f1eed54a49a 100644
--- a/src/osd/strconv.h
+++ b/src/osd/strconv.h
@@ -19,10 +19,6 @@
#if defined(WIN32)
-#ifndef WIN32_LEAN_AND_MEAN
-#define WIN32_LEAN_AND_MEAN
-#endif
-
#include <windows.h>
namespace osd
diff --git a/src/osd/uwp/uwpcompat.cpp b/src/osd/uwp/uwpcompat.cpp
index 156ab408219..bd7103b8e31 100644
--- a/src/osd/uwp/uwpcompat.cpp
+++ b/src/osd/uwp/uwpcompat.cpp
@@ -8,9 +8,9 @@
#include "uwpcompat.h"
-#include <errno.h>
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
+#include <errno.h>
+
#undef interface
#include "emu.h"
diff --git a/src/osd/uwp/uwpcompat.h b/src/osd/uwp/uwpcompat.h
index 697d5f9527f..2d495238a99 100644
--- a/src/osd/uwp/uwpcompat.h
+++ b/src/osd/uwp/uwpcompat.h
@@ -13,7 +13,9 @@
extern "C" {
#endif
-#define WIN32_LEAN_AND_MEAN
+#ifndef NOGDI
+#define NOGDI
+#endif
#include <windows.h>
#include <stdio.h>
@@ -66,6 +68,38 @@ int _pclose(
FILE *stream);
_Ret_maybenull_
+HMODULE WINAPI LoadLibraryA(
+ _In_ LPCSTR lpFileName
+);
+
+_Ret_maybenull_
+HMODULE WINAPI LoadLibraryW(
+ _In_ LPCWSTR lpFileName
+);
+
+#ifdef UNICODE
+#define LoadLibrary LoadLibraryW
+#else
+#define LoadLibrary LoadLibraryA
+#endif // !UNICODE
+
+_Ret_maybenull_
+HMODULE WINAPI GetModuleHandleA(
+ _In_ LPCSTR lpModuleName
+);
+
+_Ret_maybenull_
+HMODULE WINAPI GetModuleHandleW(
+ _In_ LPCWSTR lpModuleName
+);
+
+#ifdef UNICODE
+#define GetModuleHandle GetModuleHandleW
+#else
+#define GetModuleHandle GetModuleHandleA
+#endif // !UNICODE
+
+_Ret_maybenull_
HMODULE
WINAPI
LoadLibraryExA(
@@ -83,6 +117,12 @@ LoadLibraryExW(
_In_ DWORD dwFlags
);
+#ifdef UNICODE
+#define LoadLibraryEx LoadLibraryExW
+#else
+#define LoadLibraryEx LoadLibraryExA
+#endif // !UNICODE
+
DWORD
WINAPI
GetFileSize(
@@ -90,12 +130,6 @@ GetFileSize(
_Out_opt_ LPDWORD lpFileSizeHigh
);
-#ifdef UNICODE
-#define LoadLibraryEx LoadLibraryExW
-#else
-#define LoadLibraryEx LoadLibraryExA
-#endif // !UNICODE
-
#ifdef __cplusplus
}
#endif
diff --git a/src/osd/uwp/video.cpp b/src/osd/uwp/video.cpp
index 8a3de3a8ef1..f59b59c171b 100644
--- a/src/osd/uwp/video.cpp
+++ b/src/osd/uwp/video.cpp
@@ -6,9 +6,9 @@
//
//============================================================
-// standard windows headers
#include <exception>
-#define WIN32_LEAN_AND_MEAN
+
+// standard windows headers
#include <windows.h>
#include <dxgi1_2.h>
#include <wrl\client.h>
diff --git a/src/osd/uwp/window.cpp b/src/osd/uwp/window.cpp
index bfee83acbed..0cb74263f34 100644
--- a/src/osd/uwp/window.cpp
+++ b/src/osd/uwp/window.cpp
@@ -46,9 +46,6 @@ using namespace Windows::UI::Core;
#define MAKE_DI_SCAN(scan, isextended) (scan & 0x7f) | (isextended ? 0x80 : 0x00)
#define WINOSD(machine) downcast<windows_osd_interface*>(&machine.osd())
-#undef min
-#undef max
-
//============================================================
// PARAMETERS
//============================================================
diff --git a/src/osd/uwp/window.h b/src/osd/uwp/window.h
index f4907bb97ee..b36ca4ca694 100644
--- a/src/osd/uwp/window.h
+++ b/src/osd/uwp/window.h
@@ -10,14 +10,11 @@
#define __UWP_WINDOW__
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <windowsx.h>
#include <mmsystem.h>
#include <inspectable.h>
#include <agile.h>
-#undef min
-#undef max
#include <chrono>
#include <mutex>
diff --git a/src/osd/windows/ledutil.cpp b/src/osd/windows/ledutil.cpp
index 2db8fed4377..1d2d72d11a5 100644
--- a/src/osd/windows/ledutil.cpp
+++ b/src/osd/windows/ledutil.cpp
@@ -29,7 +29,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <winioctl.h>
diff --git a/src/osd/windows/main.cpp b/src/osd/windows/main.cpp
index cd0d37bc942..7c33434c005 100644
--- a/src/osd/windows/main.cpp
+++ b/src/osd/windows/main.cpp
@@ -10,7 +10,6 @@
#ifdef OSD_SDL
#define _WIN32_WINNT 0x0501
#endif
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <tchar.h>
#include <stdlib.h>
diff --git a/src/osd/windows/video.cpp b/src/osd/windows/video.cpp
index 88c0f318122..b6625ea62e9 100644
--- a/src/osd/windows/video.cpp
+++ b/src/osd/windows/video.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
// MAME headers
diff --git a/src/osd/windows/window.h b/src/osd/windows/window.h
index 688739565fb..3db5177cf6d 100644
--- a/src/osd/windows/window.h
+++ b/src/osd/windows/window.h
@@ -10,7 +10,6 @@
#define __WIN_WINDOW__
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <windowsx.h>
#include <mmsystem.h>
diff --git a/src/osd/windows/winmain.cpp b/src/osd/windows/winmain.cpp
index bc7d51769dd..b146e8b6357 100644
--- a/src/osd/windows/winmain.cpp
+++ b/src/osd/windows/winmain.cpp
@@ -10,7 +10,6 @@
#include <functional>
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <commctrl.h>
#include <mmsystem.h>
diff --git a/src/osd/windows/winmenu.cpp b/src/osd/windows/winmenu.cpp
index a1f6aab2427..2fb0a548dbe 100644
--- a/src/osd/windows/winmenu.cpp
+++ b/src/osd/windows/winmenu.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include "emu.h"
diff --git a/src/osd/windows/winutf8.cpp b/src/osd/windows/winutf8.cpp
index be23d963f5b..1c076158ebe 100644
--- a/src/osd/windows/winutf8.cpp
+++ b/src/osd/windows/winutf8.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <shellapi.h>
#include <stdlib.h>
diff --git a/src/osd/windows/winutil.cpp b/src/osd/windows/winutil.cpp
index 951ce803a7a..3bd27a8eff8 100644
--- a/src/osd/windows/winutil.cpp
+++ b/src/osd/windows/winutil.cpp
@@ -7,7 +7,6 @@
//============================================================
// standard windows headers
-#define WIN32_LEAN_AND_MEAN
#include <windows.h>
#include <direct.h>