summaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
authorGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-01-15 08:33:24 +0000
committerGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-01-15 08:33:24 +0000
commit7f2e4e19be32cc1a3b1f272e1a482dd201137ee1 (patch)
tree8ba4183de60c37fca1e6ffdea81c9269ba1bb0d0
parent1b7793d0fbd99c653c3221116176f31735e1acd0 (diff)
Cleanups and version bump.mame0129u1
-rw-r--r--src/emu/cpu/cop400/cop400.c66
-rw-r--r--src/emu/cpu/cop400/cop400op.c14
-rw-r--r--src/emu/cpu/esrip/esrip.c2
-rw-r--r--src/emu/cpu/i860/i860.c26
-rw-r--r--src/emu/cpu/i860/i860.h60
-rw-r--r--src/emu/cpu/i860/i860dec.c674
-rw-r--r--src/emu/cpu/i860/i860dis.c78
-rw-r--r--src/emu/drawgfx.c332
-rw-r--r--src/emu/drawgfx.h60
-rw-r--r--src/emu/drawgfxm.h222
-rw-r--r--src/emu/machine/6821new.c4
-rw-r--r--src/emu/memory.c24
-rw-r--r--src/emu/sound/digitalk.c12
-rw-r--r--src/emu/sound/k053260.c2
-rw-r--r--src/emu/tilemap.c6
-rw-r--r--src/emu/video.c8
-rw-r--r--src/lib/util/palette.c4
-rw-r--r--src/mame/drivers/3super8.c2
-rw-r--r--src/mame/drivers/86lions.c126
-rw-r--r--src/mame/drivers/adp.c2
-rw-r--r--src/mame/drivers/buster.c6
-rw-r--r--src/mame/drivers/cvs.c2
-rw-r--r--src/mame/drivers/esripsys.c8
-rw-r--r--src/mame/drivers/fastfred.c2
-rw-r--r--src/mame/drivers/goldstar.c20
-rw-r--r--src/mame/drivers/highvdeo.c80
-rw-r--r--src/mame/drivers/igs017.c2
-rw-r--r--src/mame/drivers/igs_ncs.c2
-rw-r--r--src/mame/drivers/jackpool.c8
-rw-r--r--src/mame/drivers/megasys1.c4
-rw-r--r--src/mame/drivers/namcoic.c2
-rw-r--r--src/mame/drivers/pcxt.c16
-rw-r--r--src/mame/drivers/sengokmj.c16
-rw-r--r--src/mame/drivers/sfbonus.c10
-rw-r--r--src/mame/drivers/sms.c110
-rw-r--r--src/mame/drivers/st0016.c4
-rw-r--r--src/mame/drivers/vcombat.c138
-rw-r--r--src/mame/machine/atarigen.c4
-rw-r--r--src/mame/machine/balsente.c2
-rw-r--r--src/mame/mamedriv.c4
-rw-r--r--src/mame/video/asterix.c4
-rw-r--r--src/mame/video/goldstar.c2
-rw-r--r--src/mame/video/konamiic.c8
-rw-r--r--src/mame/video/mcr68.c2
-rw-r--r--src/mame/video/metro.c2
-rw-r--r--src/mame/video/mystwarr.c4
-rw-r--r--src/mame/video/namcos1.c2
-rw-r--r--src/mame/video/namcos22.c2
-rw-r--r--src/mame/video/ppu2c0x.c2
-rw-r--r--src/mame/video/psikyosh.c10
-rw-r--r--src/mame/video/relief.c2
-rw-r--r--src/mame/video/rockola.c4
-rw-r--r--src/mame/video/snes.c2
-rw-r--r--src/mame/video/snk.c8
-rw-r--r--src/mame/video/taitoic.c2
-rw-r--r--src/mame/video/toaplan2.c2
-rw-r--r--src/mame/video/xmen.c8
-rw-r--r--src/version.c2
58 files changed, 1116 insertions, 1116 deletions
diff --git a/src/emu/cpu/cop400/cop400.c b/src/emu/cpu/cop400/cop400.c
index deaa3c1c8cd..d9a74db2d90 100644
--- a/src/emu/cpu/cop400/cop400.c
+++ b/src/emu/cpu/cop400/cop400.c
@@ -9,35 +9,35 @@
****************************************************************************
- Type ROM RAM G D IN
-
- COP410 512x8 32x4 none
- COP411 512x8 32x4 0-2 0-1 none
- COP401 none 32x4 none
- COP413?
- COP414?
- COP415?
- COP405?
-
- COP420 1024x8 64x4
- COP421 1024x8 64x4 none
- COP422 1024x8 64x4 2-3 2-3 none
- COP402 none 64x4
-
- COP444 2048x8 128x4
- COP445 2048x8 128x4 none
- COP424 1024x8 64x4
- COP425 1024x8 64x4 none
- COP426 1024x8 64x4 2-3 2-3
- COP404 none none
-
- COP440 2048x8 160x4
- COP441 2048x8 160x4
- COP442 2048x8 160x4
+ Type ROM RAM G D IN
+
+ COP410 512x8 32x4 none
+ COP411 512x8 32x4 0-2 0-1 none
+ COP401 none 32x4 none
+ COP413?
+ COP414?
+ COP415?
+ COP405?
+
+ COP420 1024x8 64x4
+ COP421 1024x8 64x4 none
+ COP422 1024x8 64x4 2-3 2-3 none
+ COP402 none 64x4
+
+ COP444 2048x8 128x4
+ COP445 2048x8 128x4 none
+ COP424 1024x8 64x4
+ COP425 1024x8 64x4 none
+ COP426 1024x8 64x4 2-3 2-3
+ COP404 none none
+
+ COP440 2048x8 160x4
+ COP441 2048x8 160x4
+ COP442 2048x8 160x4
****************************************************************************
- Prefix Temperature Range
+ Prefix Temperature Range
COP4xx 0C ... 70C
COP3xx -40C ... +85C
@@ -47,21 +47,21 @@
/*
- TODO:
+ TODO:
- - remove LBIOps
- - remove InstLen
+ - remove LBIOps
+ - remove InstLen
- run interrupt test suite
- run production test suite
- run microbus test suite
- when is the microbus int cleared?
- - opcode support for 2048x8 and 128x4/160x4 memory sizes
+ - opcode support for 2048x8 and 128x4/160x4 memory sizes
- CKO sync input
- save internal RAM when CKO is RAM power supply pin
- COP413/COP414/COP415/COP405
- - COP404 opcode map switching, dual timer, microbus enable
+ - COP404 opcode map switching, dual timer, microbus enable
- COP440/COP441/COP442 (new registers: 2-bit N, 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
-
+
*/
#include "driver.h"
@@ -952,7 +952,7 @@ static void cop410_init_opcodes(const device_config *device)
for (i=0; i<256; i++) cpustate->InstLen[i]=1;
- cpustate->InstLen[0x60] = cpustate->InstLen[0x61] = cpustate->InstLen[0x68] =
+ cpustate->InstLen[0x60] = cpustate->InstLen[0x61] = cpustate->InstLen[0x68] =
cpustate->InstLen[0x69] = cpustate->InstLen[0x33] = cpustate->InstLen[0x23] = 2;
/* initialize LBI opcode array */
diff --git a/src/emu/cpu/cop400/cop400op.c b/src/emu/cpu/cop400/cop400op.c
index 8d5bd424733..cf4c68b4b22 100644
--- a/src/emu/cpu/cop400/cop400op.c
+++ b/src/emu/cpu/cop400/cop400op.c
@@ -10,7 +10,7 @@
***************************************************************************/
/***************************************************************************
- ARITHMETIC INSTRUCTIONS
+ ARITHMETIC INSTRUCTIONS
***************************************************************************/
/*
@@ -249,7 +249,7 @@ INSTRUCTION( casc )
}
/***************************************************************************
- TRANSFER-OF-CONTROL INSTRUCTIONS
+ TRANSFER-OF-CONTROL INSTRUCTIONS
***************************************************************************/
/*
@@ -454,7 +454,7 @@ INSTRUCTION( it )
}
/***************************************************************************
- MEMORY REFERENCE INSTRUCTIONS
+ MEMORY REFERENCE INSTRUCTIONS
***************************************************************************/
/*
@@ -851,7 +851,7 @@ INSTRUCTION( ctma )
}
/***************************************************************************
- REGISTER REFERENCE INSTRUCTIONS
+ REGISTER REFERENCE INSTRUCTIONS
***************************************************************************/
/*
@@ -973,7 +973,7 @@ INSTRUCTION( xabr )
/*
- Processor: COP444
+ Processor: COP444
Mnemonic: XABR
@@ -996,7 +996,7 @@ INSTRUCTION( cop444_xabr )
}
/***************************************************************************
- TEST INSTRUCTIONS
+ TEST INSTRUCTIONS
***************************************************************************/
/*
@@ -1136,7 +1136,7 @@ INSTRUCTION( skt )
}
/***************************************************************************
- INPUT/OUTPUT INSTRUCTIONS
+ INPUT/OUTPUT INSTRUCTIONS
***************************************************************************/
/*
diff --git a/src/emu/cpu/esrip/esrip.c b/src/emu/cpu/esrip/esrip.c
index b271c7b01b9..f6c99151b46 100644
--- a/src/emu/cpu/esrip/esrip.c
+++ b/src/emu/cpu/esrip/esrip.c
@@ -1652,7 +1652,7 @@ static CPU_EXECUTE( esrip )
esrip_state *cpustate = device->token;
int calldebugger = (device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0;
UINT8 status;
-
+
cpustate->icount = cycles;
/* I think we can get away with placing this outside of the loop */
diff --git a/src/emu/cpu/i860/i860.c b/src/emu/cpu/i860/i860.c
index 076083c4181..cb6ead9a630 100644
--- a/src/emu/cpu/i860/i860.c
+++ b/src/emu/cpu/i860/i860.c
@@ -1,21 +1,21 @@
/***************************************************************************
- i860.c
+ i860.c
- Interface file for the Intel i860 emulator.
+ Interface file for the Intel i860 emulator.
- Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
- Released for general non-commercial use under the MAME license
- with the additional requirement that you are free to use and
- redistribute this code in modified or unmodified form, provided
- you list me in the credits.
- Visit http://mamedev.org for licensing and usage restrictions.
+ Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
+ Released for general non-commercial use under the MAME license
+ with the additional requirement that you are free to use and
+ redistribute this code in modified or unmodified form, provided
+ you list me in the credits.
+ Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
/*
-TODO: Separate out i860XR and i860XP (make different types, etc).
- Hook IRQ lines into MAME core (they're custom functions atm).
+TODO: Separate out i860XR and i860XP (make different types, etc).
+ Hook IRQ lines into MAME core (they're custom functions atm).
*/
#include "debugger.h"
@@ -49,7 +49,7 @@ static CPU_RESET( i860 )
/***************************************************************************
- * Disassembler hook
+ * Disassembler hook
***************************************************************************/
static CPU_DISASSEMBLE( i860 )
@@ -65,7 +65,7 @@ static CPU_DISASSEMBLE( i860 )
/**************************************************************************
- * The actual decode and execute code.
+ * The actual decode and execute code.
**************************************************************************/
#include "i860dec.c"
@@ -311,7 +311,7 @@ CPU_GET_INFO( i860 )
case CPUINFO_STR_REGISTER + I860_DB: sprintf(info->s, "DB : %08x", cpustate->cregs[CR_DB]); break;
case CPUINFO_STR_REGISTER + I860_FSR: sprintf(info->s, "FSR : %08x", cpustate->cregs[CR_FSR]); break;
case CPUINFO_STR_REGISTER + I860_EPSR: sprintf(info->s, "EPSR : %08x", cpustate->cregs[CR_EPSR]); break;
-
+
case CPUINFO_STR_REGISTER + I860_R0: sprintf(info->s, "R0 : %08x", cpustate->iregs[0]); break;
case CPUINFO_STR_REGISTER + I860_R1: sprintf(info->s, "R1 : %08x", cpustate->iregs[1]); break;
case CPUINFO_STR_REGISTER + I860_R2: sprintf(info->s, "R2 : %08x", cpustate->iregs[2]); break;
diff --git a/src/emu/cpu/i860/i860.h b/src/emu/cpu/i860/i860.h
index ed843ea4b11..30a7724ae2c 100644
--- a/src/emu/cpu/i860/i860.h
+++ b/src/emu/cpu/i860/i860.h
@@ -1,15 +1,15 @@
/***************************************************************************
-
- i860.h
- Interface file for the Intel i860 emulator.
+ i860.h
- Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
- Released for general non-commercial use under the MAME license
- with the additional requirement that you are free to use and
- redistribute this code in modified or unmodified form, provided
- you list me in the credits.
- Visit http://mamedev.org for licensing and usage restrictions.
+ Interface file for the Intel i860 emulator.
+
+ Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
+ Released for general non-commercial use under the MAME license
+ with the additional requirement that you are free to use and
+ redistribute this code in modified or unmodified form, provided
+ you list me in the credits.
+ Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
@@ -61,9 +61,9 @@ typedef struct {
/* Integer registers (32 x 32-bits). */
UINT32 iregs[32];
- /* Floating point registers (32 x 32-bits, 16 x 64 bits, or 8 x 128 bits).
- When referenced as pairs or quads, the higher numbered registers
- are the upper bits. E.g., double precision f0 is f1:f0. */
+ /* Floating point registers (32 x 32-bits, 16 x 64 bits, or 8 x 128 bits).
+ When referenced as pairs or quads, the higher numbered registers
+ are the upper bits. E.g., double precision f0 is f1:f0. */
UINT8 frg[32 * 4];
/* Control registers (6 x 32-bits). */
@@ -88,7 +88,7 @@ typedef struct {
float s;
double d;
} val;
-
+
/* The stage status bits. */
struct {
/* Adder result precision (1 = dbl, 0 = sgl). */
@@ -97,14 +97,14 @@ typedef struct {
} A[3];
/* The multiplier pipeline. 3 stages for single precision, 2 stages
- for double precision, and confusing for mixed precision. */
+ for double precision, and confusing for mixed precision. */
struct {
/* The stage contents. */
union {
float s;
double d;
} val;
-
+
/* The stage status bits. */
struct {
/* Multiplier result precision (1 = dbl, 0 = sgl). */
@@ -119,7 +119,7 @@ typedef struct {
float s;
double d;
} val;
-
+
/* The stage status bits. */
struct {
/* Load result precision (1 = dbl, 0 = sgl). */
@@ -134,7 +134,7 @@ typedef struct {
float s;
double d;
} val;
-
+
/* The stage status bits. */
struct {
/* Integer/graphics result precision (1 = dbl, 0 = sgl). */
@@ -147,29 +147,29 @@ typedef struct {
int pin_reset;
/*
- * Other emulator state.
- */
+ * Other emulator state.
+ */
int exiting_readmem;
int exiting_ifetch;
/* Indicate a control-flow instruction, so we know the PC is updated. */
int pc_updated;
-
+
/* Indicate an instruction just generated a trap, so we know the PC
- needs to go to the trap address. */
+ needs to go to the trap address. */
int pending_trap;
-
+
/* This is 1 if the next fir load gets the trap address, otherwise
- it is 0 to get the ld.c address. This is set to 1 only when a
- non-reset trap occurs. */
+ it is 0 to get the ld.c address. This is set to 1 only when a
+ non-reset trap occurs. */
int fir_gets_trap_addr;
-
+
/* Single stepping flag for internal use. */
- int single_stepping;
-
+ int single_stepping;
+
/*
- * MAME-specific stuff.
- */
+ * MAME-specific stuff.
+ */
const device_config *device;
const address_space *program;
UINT32 ppc;
@@ -200,7 +200,7 @@ enum {
};
-/* TODO: THESE WILL BE REPLACED BY MAME FUNCTIONS
+/* TODO: THESE WILL BE REPLACED BY MAME FUNCTIONS
#define BYTE_REV32(t) \
do { \
(t) = ((UINT32)(t) >> 16) | ((UINT32)(t) << 16); \
diff --git a/src/emu/cpu/i860/i860dec.c b/src/emu/cpu/i860/i860dec.c
index 75c76e00647..0a171776421 100644
--- a/src/emu/cpu/i860/i860dec.c
+++ b/src/emu/cpu/i860/i860dec.c
@@ -4,12 +4,12 @@
Execution engine for the Intel i860 emulator.
- Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
- Released for general non-commercial use under the MAME license
- with the additional requirement that you are free to use and
- redistribute this code in modified or unmodified form, provided
- you list me in the credits.
- Visit http://mamedev.org for licensing and usage restrictions.
+ Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
+ Released for general non-commercial use under the MAME license
+ with the additional requirement that you are free to use and
+ redistribute this code in modified or unmodified form, provided
+ you list me in the credits.
+ Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
@@ -53,7 +53,7 @@
#undef TRACE_ADDR_TRANSLATION
#undef TRACE_PAGE_FAULT
#define TRACE_UNDEFINED_I860
-#undef TRACE_EXT_INT
+#undef TRACE_EXT_INT
#define TRACE_UNALIGNED_MEM
@@ -191,10 +191,10 @@ enum {
/* A mask for all the trap bits of the PSR (FT, DAT, IAT, IN, IT, or
bits [12..8]). */
-#define PSR_ALL_TRAP_BITS_MASK 0x00001f00
+#define PSR_ALL_TRAP_BITS_MASK 0x00001f00
/* A mask for PSR bits which can only be changed from supervisor level. */
-#define PSR_SUPERVISOR_ONLY_MASK 0x0000fff3
+#define PSR_SUPERVISOR_ONLY_MASK 0x0000fff3
/* PSR: BR flag (PSR[0]): set/get. */
@@ -330,8 +330,8 @@ void i860_set_pin (i860s *cpustate, int pin, int val)
void i860_gen_interrupt (i860s *cpustate)
{
/* If interrupts are enabled, then set PSR.IN and prepare for trap.
- Otherwise, the external interrupt is ignored. We also set
- bit EPSR.INT (which tracks the INT pin). */
+ Otherwise, the external interrupt is ignored. We also set
+ bit EPSR.INT (which tracks the INT pin). */
if (GET_PSR_IM ())
{
SET_PSR_IN (1);
@@ -360,7 +360,7 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
/* If virtual mode, get translation. */
if (GET_DIRBASE_ATE ())
{
- phys_pc = get_address_translation (cpustate, pc, 0 /* is_dataref */, 0 /* is_write */);
+ phys_pc = get_address_translation (cpustate, pc, 0 /* is_dataref */, 0 /* is_write */);
cpustate->exiting_ifetch = 0;
if (cpustate->pending_trap && (GET_PSR_DAT () || GET_PSR_IAT ()))
{
@@ -372,7 +372,7 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
phys_pc = pc;
/* Since i860 instructions are always stored LSB first (regardless of
- the BE bit), we need to adjust the instruction below on MSB hosts. */
+ the BE bit), we need to adjust the instruction below on MSB hosts. */
w1 = memory_read_dword_64le(cpustate->program, phys_pc);
#ifdef HOST_MSB
BYTE_REV32 (w1);
@@ -383,14 +383,14 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
/* Given a virtual address, perform the i860 address translation and
return the corresponding physical address.
- vaddr: virtual address
- is_dataref: 1 = load/store, 0 = instruction fetch.
- is_write: 1 = writing to vaddr, 0 = reading from vaddr
+ vaddr: virtual address
+ is_dataref: 1 = load/store, 0 = instruction fetch.
+ is_write: 1 = writing to vaddr, 0 = reading from vaddr
The last two arguments are only used to determine what types
of traps should be taken.
Page tables must always be in memory (not cached). So the routine
- here only accesses memory. */
+ here only accesses memory. */
static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dataref, int is_write)
{
UINT32 vdir = (vaddr >> 22) & 0x3ff;
@@ -514,8 +514,8 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
if (is_write && is_dataref && (pg_tbl_entry & 0x40) == 0)
{
- /* fprintf(stderr, "DAT trap on write without dirty bit v0x%08x/p0x%08x\n",
- vaddr, (pg_tbl_entry & ~0xfff)|voffset); */
+ /* fprintf(stderr, "DAT trap on write without dirty bit v0x%08x/p0x%08x\n",
+ vaddr, (pg_tbl_entry & ~0xfff)|voffset); */
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
@@ -523,20 +523,20 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
}
pfa2 = (pg_tbl_entry & 0xfffff000);
- ret = pfa2 | voffset;
+ ret = pfa2 | voffset;
#ifdef TRACE_ADDR_TRANSLATION
fprintf (stderr, "get_address_translation: virt(0x%08x) -> phys(0x%08x)\n",
vaddr, ret);
#endif
- return ret;
+ return ret;
}
-/* Read memory emulation.
- addr = address to read.
- size = size of read in bytes. */
+/* Read memory emulation.
+ addr = address to read.
+ size = size of read in bytes. */
static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
{
#ifdef TRACE_RDWR_MEM
@@ -547,7 +547,7 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
+ UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
if (cpustate->pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -597,10 +597,10 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
}
-/* Write memory emulation.
- addr = address to write.
- size = size of write in bytes.
- data = data to write. */
+/* Write memory emulation.
+ addr = address to write.
+ size = size of write in bytes.
+ data = data to write. */
static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
{
#ifdef TRACE_RDWR_MEM
@@ -611,7 +611,7 @@ static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 1 /* is_write */);
+ UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 1 /* is_write */);
if (cpustate->pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -655,10 +655,10 @@ static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
/* Floating-point read mem routine.
- addr = address to read.
- size = size of read in bytes.
- dest = memory to put read data. */
-static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
+ addr = address to read.
+ size = size of read in bytes.
+ dest = memory to put read data. */
+static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_readmem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
@@ -670,7 +670,7 @@ static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
+ UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
if (cpustate->pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -721,11 +721,11 @@ static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
/* Floating-point write mem routine.
- addr = address to read.
- size = size of read in bytes.
- data = pointer to the data.
- wmask = bit mask of bytes to write (only for pst.d). */
-static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data, UINT32 wmask)
+ addr = address to read.
+ size = size of read in bytes.
+ data = pointer to the data.
+ wmask = bit mask of bytes to write (only for pst.d). */
+static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data, UINT32 wmask)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_writemem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
@@ -737,7 +737,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 1 /* is_write */);
+ UINT32 phys = get_address_translation (cpustate, addr, 1 /* is_dataref */, 1 /* is_write */);
if (cpustate->pending_trap && GET_PSR_DAT ())
{
#ifdef TRACE_PAGE_FAULT
@@ -765,7 +765,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
memory_write_byte_64le(cpustate->program, addr+2, data[1]);
memory_write_byte_64le(cpustate->program, addr+1, data[2]);
memory_write_byte_64le(cpustate->program, addr+0, data[3]);
-#else
+#else
UINT32 ddd = (data[3]) | (data[2] << 8) | (data[1] << 16) |(data[0] << 24);
memory_write_dword_64le(cpustate->program, addr+0, ddd);
#endif
@@ -810,7 +810,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
#if 0
/* Do a pipeline dump.
- type: 0 (all), 1 (add), 2 (mul), 3 (load), 4 (graphics). */
+ type: 0 (all), 1 (add), 2 (mul), 3 (load), 4 (graphics). */
static void dump_pipe (i860s *cpustate, int type)
{
int i = 0;
@@ -905,7 +905,7 @@ static void dump_state (i860s *cpustate)
fprintf (stderr, " psr: CC = %d, LCC = %d, SC = %d, IM = %d, U = %d\n",
GET_PSR_CC (), GET_PSR_LCC (), GET_PSR_SC (), GET_PSR_IM (),
- GET_PSR_U ());
+ GET_PSR_U ());
fprintf (stderr, " IT/FT/IAT/DAT/IN = %d/%d/%d/%d/%d\n",
GET_PSR_IT (), GET_PSR_FT (), GET_PSR_IAT (),
GET_PSR_DAT (), GET_PSR_IN ());
@@ -913,7 +913,7 @@ static void dump_state (i860s *cpustate)
GET_EPSR_INT (), GET_EPSR_OF (), GET_EPSR_BE ());
fprintf (stderr, " fir: 0x%08x dirbase: 0x%08x fsr: 0x%08x\n",
cpustate->cregs[CR_FIR], cpustate->cregs[CR_DIRBASE],
- cpustate->cregs[CR_FSR]);
+ cpustate->cregs[CR_FSR]);
fprintf (stderr, " pc: 0x%08x\n", cpustate->pc);
}
#endif
@@ -950,8 +950,8 @@ static void insn_ld_ctrl (i860s *cpustate, UINT32 insn)
#endif
/* If this is a load of the fir, then there are two cases:
- 1. First load of fir after a trap = usual value.
- 2. Not first load of fir after a trap = address of the ld.c insn. */
+ 1. First load of fir after a trap = usual value.
+ 2. Not first load of fir after a trap = address of the ld.c insn. */
if (csrc2 == CR_FIR)
{
if (cpustate->fir_gets_trap_addr)
@@ -984,11 +984,11 @@ static void insn_st_ctrl (i860s *cpustate, UINT32 insn)
#endif
/* Look for ITI bit turned on (but it never actually is written --
- it always appears to be 0). */
+ it always appears to be 0). */
if (csrc2 == CR_DIRBASE && (get_iregval (isrc1) & 0x20))
{
- /* NOTE: The actual icache and TLB flush are unimplemented for
- the MAME version. */
+ /* NOTE: The actual icache and TLB flush are unimplemented for
+ the MAME version. */
/* Make sure ITI isn't actually written. */
set_iregval (isrc1, (get_iregval (isrc1) & ~0x20));
@@ -1005,8 +1005,8 @@ static void insn_st_ctrl (i860s *cpustate, UINT32 insn)
{
UINT32 enew = 0, tmp = 0;
/* Make sure unchangeable EPSR bits stay unchanged (DCS, stepping,
- and type). Also, some bits are only writeable in supervisor
- mode. */
+ and type). Also, some bits are only writeable in supervisor
+ mode. */
if (GET_PSR_U ())
{
enew = get_iregval (isrc1) & ~(0x003e1fff | 0x00c06000);
@@ -1058,7 +1058,7 @@ static void insn_ldx (i860s *cpustate, UINT32 insn)
int form_disp_reg = 0;
/* Bits 28 and 0 determine the operand size. */
- size = sizes[((insn >> 27) & 2) | (insn & 1)];
+ size = sizes[((insn >> 27) & 2) | (insn & 1)];
/* Bit 26 determines the addressing mode (reg+reg or disp+reg). */
form_disp_reg = (insn & 0x04000000);
@@ -1085,10 +1085,10 @@ static void insn_ldx (i860s *cpustate, UINT32 insn)
#endif
/* The i860 sign-extends 8- or 16-bit integer loads.
-
- Below, the readmemi_emu() needs to happen outside of the
- set_iregval macro (otherwise the readmem won't occur if r0
- is the target register). */
+
+ Below, the readmemi_emu() needs to happen outside of the
+ set_iregval macro (otherwise the readmem won't occur if r0
+ is the target register). */
if (size < 4)
{
UINT32 readval = sign_ext (readmemi_emu (cpustate, eff, size), size * 8);
@@ -1126,7 +1126,7 @@ static void insn_stx (i860s *cpustate, UINT32 insn)
int size = 0;
/* Bits 28 and 0 determine the operand size. */
- size = sizes[((insn >> 27) & 2) | (insn & 1)];
+ size = sizes[((insn >> 27) & 2) | (insn & 1)];
/* FIXME: Do any necessary traps. */
@@ -1142,7 +1142,7 @@ static void insn_stx (i860s *cpustate, UINT32 insn)
/* Execute "fst.y fdest,isrc1(isrc2)", "fst.y fdest,isrc1(isrc2)++",
- "fst.y fdest,#const(isrc2)" or "fst.y fdest,#const(isrc2)++"
+ "fst.y fdest,#const(isrc2)" or "fst.y fdest,#const(isrc2)++"
instruction. */
static void insn_fsty (i860s *cpustate, UINT32 insn)
{
@@ -1158,13 +1158,13 @@ static void insn_fsty (i860s *cpustate, UINT32 insn)
int auto_inc = (insn & 1);
/* Bits 2 and 1 determine the operand size. */
- size = sizes[((insn >> 1) & 3)];
+ size = sizes[((insn >> 1) & 3)];
/* Bit 26 determines the addressing mode (reg+reg or disp+reg). */
form_disp_reg = (insn & 0x04000000);
/* FIXME: Check for undefined behavior, non-even or non-quad
- register operands for fst.d and fst.q respectively. */
+ register operands for fst.d and fst.q respectively. */
/* Get effective address depending on disp+reg or reg+reg form. */
if (form_disp_reg)
@@ -1214,7 +1214,7 @@ static void insn_fsty (i860s *cpustate, UINT32 insn)
/* Execute "fld.y isrc1(isrc2),fdest", "fld.y isrc1(isrc2)++,idest",
- "fld.y #const(isrc2),fdest" or "fld.y #const(isrc2)++,idest".
+ "fld.y #const(isrc2),fdest" or "fld.y #const(isrc2)++,idest".
Where y = {l,d,q}. Note, there is no pfld.q, though. */
static void insn_fldy (i860s *cpustate, UINT32 insn)
{
@@ -1231,7 +1231,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
int piped = (insn & 0x40000000);
/* Bits 2 and 1 determine the operand size. */
- size = sizes[((insn >> 1) & 3)];
+ size = sizes[((insn >> 1) & 3)];
/* Bit 26 determines the addressing mode (reg+reg or disp+reg). */
form_disp_reg = (insn & 0x04000000);
@@ -1244,7 +1244,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
}
/* FIXME: Check for undefined behavior, non-even or non-quad
- register operands for fld.d and fld.q respectively. */
+ register operands for fld.d and fld.q respectively. */
/* Get effective address depending on disp+reg or reg+reg form. */
if (form_disp_reg)
@@ -1288,7 +1288,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
{
/* Scalar version writes the current result to fdest. */
/* Read data at 'eff' into freg 'fdest' (reads to f0 or f1 are
- thrown away). */
+ thrown away). */
if (fdest > 1)
{
if (size == 4)
@@ -1302,17 +1302,17 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
else
{
/* Read the data into a temp space first. This way we can test
- for any traps before updating the pipeline. The pipeline must
- stay unaffected after a trap so that the instruction can be
- properly restarted. */
+ for any traps before updating the pipeline. The pipeline must
+ stay unaffected after a trap so that the instruction can be
+ properly restarted. */
UINT8 bebuf[8];
fp_readmem_emu (cpustate, eff, size, bebuf);
if (cpustate->pending_trap && cpustate->exiting_readmem)
goto ab_op;
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the LRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the LRP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage LRP to FSR. */
if (cpustate->L[1 /* 2 */].stat.lrp)
@@ -1325,7 +1325,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
else
set_fregval_s (cpustate, fdest, cpustate->L[2].val.s);
- /* Now advance pipeline and write loaded data to first stage. */
+ /* Now advance pipeline and write loaded data to first stage. */
cpustate->L[2] = cpustate->L[1];
cpustate->L[1] = cpustate->L[0];
if (size == 8)
@@ -1372,7 +1372,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
int orig_pm = pm;
/* Get the pixel size, where:
- PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
+ PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
int ps = GET_PSR_PS ();
#ifdef TRACE_UNDEFINED_I860
@@ -1382,7 +1382,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
#ifdef TRACE_UNDEFINED_I860
/* Bits 2 and 1 determine the operand size, which must always be
- zero (indicating a 64-bit operand). */
+ zero (indicating a 64-bit operand). */
if (insn & 0x6)
{
/* Undefined i860XR behavior. */
@@ -1412,7 +1412,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
set_iregval (isrc2, eff);
/* Update the the pixel mask depending on the pixel size. Shift PM
- right by 8/2^ps bits. */
+ right by 8/2^ps bits. */
if (ps == 0)
pm = (pm >> 8) & 0x00;
else if (ps == 1)
@@ -1422,8 +1422,8 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
SET_PSR_PM (pm);
/* Write data (value of freg fdest) to memory at eff-- but only those
- bytes that are enabled by the bits in PSR.PM. Bit 0 of PM selects
- the pixel at the lowest address. */
+ bytes that are enabled by the bits in PSR.PM. Bit 0 of PM selects
+ the pixel at the lowest address. */
wmask = 0;
for (i = 0; i < 8; )
{
@@ -1482,15 +1482,15 @@ static void insn_addu (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = bit 31 carry
- CC = bit 31 carry.
- */
+ For unsigned:
+ OF = bit 31 carry
+ CC = bit 31 carry.
+ */
tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
@@ -1520,15 +1520,15 @@ static void insn_addu_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = bit 31 carry
- CC = bit 31 carry.
- */
+ For unsigned:
+ OF = bit 31 carry
+ CC = bit 31 carry.
+ */
tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
@@ -1558,16 +1558,16 @@ static void insn_adds (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 < -isrc1
- CC clear if isrc2 >= -isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 < -isrc1
+ CC clear if isrc2 >= -isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
@@ -1598,16 +1598,16 @@ static void insn_adds_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 < -isrc1
- CC clear if isrc2 >= -isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 < -isrc1
+ CC clear if isrc2 >= -isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
@@ -1637,17 +1637,17 @@ static void insn_subu (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = NOT(bit 31 carry)
- CC = bit 31 carry.
- (i.e. CC set if isrc2 <= isrc1
- CC clear if isrc2 > isrc1
- */
+ For unsigned:
+ OF = NOT(bit 31 carry)
+ CC = bit 31 carry.
+ (i.e. CC set if isrc2 <= isrc1
+ CC clear if isrc2 > isrc1
+ */
if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
{
SET_PSR_CC (1);
@@ -1675,17 +1675,17 @@ static void insn_subu_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = NOT(bit 31 carry)
- CC = bit 31 carry.
- (i.e. CC set if isrc2 <= isrc1
- CC clear if isrc2 > isrc1
- */
+ For unsigned:
+ OF = NOT(bit 31 carry)
+ CC = bit 31 carry.
+ (i.e. CC set if isrc2 <= isrc1
+ CC clear if isrc2 > isrc1
+ */
if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
{
SET_PSR_CC (1);
@@ -1714,16 +1714,16 @@ static void insn_subs (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 > isrc1
- CC clear if isrc2 <= isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 > isrc1
+ CC clear if isrc2 <= isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
@@ -1754,16 +1754,16 @@ static void insn_subs_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 > isrc1
- CC clear if isrc2 <= isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 > isrc1
+ CC clear if isrc2 <= isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
@@ -1878,13 +1878,13 @@ static void insn_shrd (i860s *cpustate, UINT32 insn)
UINT32 tmp;
/* Do the operation:
- idest = low_32(isrc1ni:isrc2 >> sc). */
+ idest = low_32(isrc1ni:isrc2 >> sc). */
if (sc == 0)
tmp = get_iregval (isrc2);
else
{
tmp = get_iregval (isrc1) << (32 - sc);
- tmp |= (get_iregval (isrc2) >> sc);
+ tmp |= (get_iregval (isrc2) >> sc);
}
set_iregval (idest, tmp);
}
@@ -2320,7 +2320,7 @@ static void insn_bnc (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 0);
/* Branch routines always update the PC, since pc_updated is set
- in the decode routine. */
+ in the decode routine. */
if (res)
cpustate->pc = target_addr;
else
@@ -2346,7 +2346,7 @@ static void insn_bct (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 1);
/* Careful. Unlike bla, the delay slot instruction is only executed
- if the branch is taken. */
+ if the branch is taken. */
if (res)
{
/* Execute delay slot instruction. */
@@ -2361,7 +2361,7 @@ static void insn_bct (i860s *cpustate, UINT32 insn)
}
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
if (res)
cpustate->pc = target_addr;
else
@@ -2390,7 +2390,7 @@ static void insn_bnct (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 0);
/* Careful. Unlike bla, the delay slot instruction is only executed
- if the branch is taken. */
+ if the branch is taken. */
if (res)
{
/* Execute delay slot instruction. */
@@ -2405,7 +2405,7 @@ static void insn_bnct (i860s *cpustate, UINT32 insn)
}
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
if (res)
cpustate->pc = target_addr;
else
@@ -2479,7 +2479,7 @@ static void insn_br (i860s *cpustate, UINT32 insn)
}
-/* Execute "bri isrc1ni" instruction.
+/* Execute "bri isrc1ni" instruction.
Note: I didn't merge this code with calli because bri must do
a lot of flag manipulation if any trap bits are set. */
static void insn_bri (i860s *cpustate, UINT32 insn)
@@ -2506,10 +2506,10 @@ static void insn_bri (i860s *cpustate, UINT32 insn)
}
/* If any trap bits are set, we need to do the return from
- trap work. Note, we must use the PSR value that existed
- before the delay slot instruction was executed since the
- delay slot instruction might itself cause a trap bit to
- be set. */
+ trap work. Note, we must use the PSR value that existed
+ before the delay slot instruction was executed since the
+ delay slot instruction might itself cause a trap bit to
+ be set. */
if (orig_psr & PSR_ALL_TRAP_BITS_MASK)
{
/* Restore U and IM from their previous copies. */
@@ -2522,7 +2522,7 @@ static void insn_bri (i860s *cpustate, UINT32 insn)
/* Update PC. */
cpustate->pc = orig_src1_val;
- cpustate->pc_updated = 1;
+ cpustate->pc_updated = 1;
ab_op:;
}
@@ -2558,7 +2558,7 @@ static void insn_calli (i860s *cpustate, UINT32 insn)
/* Set new PC. */
cpustate->pc = orig_src1_val;
- cpustate->pc_updated = 1;
+ cpustate->pc_updated = 1;
ab_op:;
}
@@ -2592,7 +2592,7 @@ static void insn_bla (i860s *cpustate, UINT32 insn)
/* Determine comparison result based on opcode. */
lcc_tmp = ((INT32)get_iregval (isrc2) >= -(INT32)get_iregval (isrc1));
- set_iregval (isrc2, get_iregval (isrc1) + orig_isrc2val);
+ set_iregval (isrc2, get_iregval (isrc1) + orig_isrc2val);
/* Execute the delay slot instruction. */
cpustate->pc += 4;
@@ -2609,12 +2609,12 @@ static void insn_bla (i860s *cpustate, UINT32 insn)
else
{
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
cpustate->pc += 8;
}
SET_PSR_LCC (lcc_tmp);
- cpustate->pc_updated = 1;
+ cpustate->pc_updated = 1;
ab_op:;
}
@@ -2628,14 +2628,14 @@ static void insn_flush (i860s *cpustate, UINT32 insn)
UINT32 eff = 0;
/* Technically, idest should be encoded as r0 because idest
- is undefined after the instruction. We don't currently
- check for this.
-
- Flush D$ block at address #const+isrc2. Block is undefined
- after. The effective address must be 16-byte aligned.
-
- FIXME: Need to examine RB and RC and do this right.
- */
+ is undefined after the instruction. We don't currently
+ check for this.
+
+ Flush D$ block at address #const+isrc2. Block is undefined
+ after. The effective address must be 16-byte aligned.
+
+ FIXME: Need to examine RB and RC and do this right.
+ */
/* Chop off lower bits of displacement to 16-byte alignment. */
src1val &= ~(16-1);
@@ -2647,8 +2647,8 @@ static void insn_flush (i860s *cpustate, UINT32 insn)
if (GET_PSR_U () == 0)
{
/* If line is dirty, write it to memory and invalidate.
- NOTE: The actual dirty write is unimplemented in the MAME version
- as we don't emulate the dcache. */
+ NOTE: The actual dirty write is unimplemented in the MAME version
+ as we don't emulate the dcache. */
}
}
@@ -2688,10 +2688,10 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
}
/* For pipelined version, retrieve the contents of the last stage
- of the pipeline, whose precision is specified by the MRP bit
- of the stage's result-status bits. Note for pfmul, the number
- of stages is determined by the source precision of the current
- operation. */
+ of the pipeline, whose precision is specified by the MRP bit
+ of the stage's result-status bits. Note for pfmul, the number
+ of stages is determined by the source precision of the current
+ operation. */
if (piped)
{
if (cpustate->M[num_stages - 1].stat.mrp)
@@ -2700,16 +2700,16 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
sgl_last_stage_contents = cpustate->M[num_stages - 1].val.s;
}
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
/* For pipelined mul, if fsrc2 is the same as fdest, then the last
- stage is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ stage is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && piped && fdest != 0 && fsrc1 == fdest)
v1 = dbl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2726,8 +2726,8 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
float v2 = get_fregval_s (cpustate, fsrc2);
/* For pipelined mul, if fsrc2 is the same as fdest, then the last
- stage is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ stage is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && piped && fdest != 0 && fsrc1 == fdest)
v1 = sgl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2739,14 +2739,14 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
sgl_tmp_dest = v1 * v2;
}
- /* FIXME: Set result-status bits besides MRP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides MRP. And copy to fsr from
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
/* FIXME: Mixed precision (only wierd for pfmul). */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -2755,7 +2755,7 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline. */
+ stage of the pipeline. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage MRP to FSR. */
if (cpustate->M[num_stages - 2 /* 1 */].stat.mrp)
@@ -2770,7 +2770,7 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, sgl_last_stage_contents);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
if (num_stages == 3)
{
cpustate->M[2] = cpustate->M[1];
@@ -2814,9 +2814,9 @@ static void insn_fmlow (i860s *cpustate, UINT32 insn)
}
/* The lower 32-bits are obvious. What exactly goes in the upper
- bits?
- Technically, the upper-most 10 bits are undefined, but i'd like
- to be undefined in the same way as the real i860 if possible. */
+ bits?
+ Technically, the upper-most 10 bits are undefined, but i'd like
+ to be undefined in the same way as the real i860 if possible. */
/* Keep lower 53 bits of multiply. */
tmp = i1 * i2;
@@ -2849,9 +2849,9 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
}
/* For pipelined version, retrieve the contents of the last stage
- of the pipeline, whose precision is specified by the ARP bit
- of the stage's result-status bits. There are always three stages
- for pfadd/pfsub. */
+ of the pipeline, whose precision is specified by the ARP bit
+ of the stage's result-status bits. There are always three stages
+ for pfadd/pfsub. */
if (piped)
{
if (cpustate->A[2].stat.arp)
@@ -2860,16 +2860,16 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
sgl_last_stage_contents = cpustate->A[2].val.s;
}
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
/* For pipelined add/sub, if fsrc1 is the same as fdest, then the last
- stage is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ stage is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (piped && fdest != 0 && fsrc1 == fdest)
v1 = dbl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2886,8 +2886,8 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
float v2 = get_fregval_s (cpustate, fsrc2);
/* For pipelined add/sub, if fsrc1 is the same as fdest, then the last
- stage is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ stage is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (piped && fdest != 0 && fsrc1 == fdest)
v1 = sgl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2899,13 +2899,13 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
sgl_tmp_dest = is_sub ? v1 - v2 : v1 + v2;
}
- /* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides ARP. And copy to fsr from
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -2914,8 +2914,8 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -2929,7 +2929,7 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, sgl_last_stage_contents);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -2958,7 +2958,7 @@ enum {
FLAGM = 64 /* Indicates PFMAM uses M rather than A pipe result. */
};
-/* A table to map DPC value to source operands.
+/* A table to map DPC value to source operands.
The PFAM and PFMAM tables are nearly identical, and the only differences
are that every time PFAM uses the A pipe, PFMAM uses the M pipe instead.
@@ -3124,7 +3124,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
}
/* PFMAM table adjustments (M_unit_op1 is never a pipe stage,
- so no adjustment made for it). */
+ so no adjustment made for it). */
M_unit_op2 = (M_unit_op2 & FLAGM) ? OP_MPIPE : M_unit_op2;
A_unit_op1 = (A_unit_op1 & FLAGM) ? OP_MPIPE : A_unit_op1;
A_unit_op2 = (A_unit_op2 & FLAGM) ? OP_MPIPE : A_unit_op2;
@@ -3133,9 +3133,9 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
/* FIXME: Check for fsrc1/fdest overlap for some mul DPC combinations. */
/* Retrieve the contents of the last stage of the multiplier pipeline,
- whose precision is specified by the MRP bit of the stage's result-
- status bits. Note for multiply, the number of stages is determined
- by the source precision of the current operation. */
+ whose precision is specified by the MRP bit of the stage's result-
+ status bits. Note for multiply, the number of stages is determined
+ by the source precision of the current operation. */
if (cpustate->M[num_mul_stages - 1].stat.mrp)
dbl_last_Mstage_contents = cpustate->M[num_mul_stages - 1].val.d;
else
@@ -3147,16 +3147,16 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
else
sgl_last_Astage_contents = cpustate->A[2].val.s;
- /* Do the mul operation, being careful about source and result
- precision. */
+ /* Do the mul operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v1 = get_fval_from_optype_d (cpustate, insn, M_unit_op1);
double v2 = get_fval_from_optype_d (cpustate, insn, M_unit_op2);
/* For mul, if fsrc2 is the same as fdest, then the last stage
- is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && M_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? dbl_last_Astage_contents : dbl_last_Mstage_contents;
if (M_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3173,8 +3173,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
float v2 = get_fval_from_optype_s (cpustate, insn, M_unit_op2);
/* For mul, if fsrc2 is the same as fdest, then the last stage
- is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && M_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? sgl_last_Astage_contents : sgl_last_Mstage_contents;
if (M_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3186,17 +3186,17 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
sgl_tmp_dest_mul = v1 * v2;
}
- /* Do the add operation, being careful about source and result
- precision. Remember, the R bit indicates source and result precision
- here. */
+ /* Do the add operation, being careful about source and result
+ precision. Remember, the R bit indicates source and result precision
+ here. */
if (res_prec)
{
double v1 = get_fval_from_optype_d (cpustate, insn, A_unit_op1);
double v2 = get_fval_from_optype_d (cpustate, insn, A_unit_op2);
/* For add/sub, if fsrc1 is the same as fdest, then the last stage
- is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (A_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? dbl_last_Astage_contents : dbl_last_Mstage_contents;
if (A_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3213,8 +3213,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
float v2 = get_fval_from_optype_s (cpustate, insn, A_unit_op2);
/* For add/sub, if fsrc1 is the same as fdest, then the last stage
- is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (A_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? sgl_last_Astage_contents : sgl_last_Mstage_contents;
if (A_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3258,13 +3258,13 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
assert (0);
}
- /* Now update fdest (either from adder pipe or multiplier pipe,
- depending on whether the instruction is pfam or pfmam). */
+ /* Now update fdest (either from adder pipe or multiplier pipe,
+ depending on whether the instruction is pfam or pfmam). */
if (is_pfam)
{
/* Update fdest with the result from the last stage of the
- adder pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ adder pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
if (cpustate->A[2].stat.arp)
set_fregval_d (cpustate, fdest, dbl_last_Astage_contents);
else
@@ -3273,16 +3273,16 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
else
{
/* Update fdest with the result from the last stage of the
- multiplier pipeline, with precision specified by the MRP
- bit of the stage's result-status bits. */
+ multiplier pipeline, with precision specified by the MRP
+ bit of the stage's result-status bits. */
if (cpustate->M[num_mul_stages - 1].stat.mrp)
set_fregval_d (cpustate, fdest, dbl_last_Mstage_contents);
else
set_fregval_s (cpustate, fdest, sgl_last_Mstage_contents);
}
- /* FIXME: Set result-status bits besides MRP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides MRP. And copy to fsr from
+ last stage. */
/* FIXME: Mixed precision (only wierd for pfmul). */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage MRP to FSR. */
@@ -3293,7 +3293,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
#endif
/* Now advance multiplier pipeline and write current calculation to
- first stage. */
+ first stage. */
if (num_mul_stages == 3)
{
cpustate->M[2] = cpustate->M[1];
@@ -3313,8 +3313,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
cpustate->M[0].stat.mrp = 0;
}
- /* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides ARP. And copy to fsr from
+ last stage. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3324,7 +3324,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
#endif
/* Now advance adder pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -3348,8 +3348,8 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v = get_fregval_d (cpustate, fsrc2);
@@ -3368,7 +3368,7 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
else
{
/* Real i860 isn't a precise as a real divide, but this should
- be okay. */
+ be okay. */
SET_FSR_SE (0);
*((UINT64 *)&v) &= 0xfffff00000000000ULL;
res = (double)1.0/v;
@@ -3397,7 +3397,7 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
else
{
/* Real i860 isn't a precise as a real divide, but this should
- be okay. */
+ be okay. */
SET_FSR_SE (0);
*((UINT32 *)&v) &= 0xffff8000;
res = (float)1.0/v;
@@ -3433,8 +3433,8 @@ static void insn_frsqr (i860s *cpustate, UINT32 insn)
return;
}
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v = get_fregval_d (cpustate, fsrc2);
@@ -3528,15 +3528,15 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
return;
}
- /* Do the operation, being careful about source and result
- precision. Operation: fdest = integer part of fsrc1 in
- lower 32-bits. */
+ /* Do the operation, being careful about source and result
+ precision. Operation: fdest = integer part of fsrc1 in
+ lower 32-bits. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
INT32 iv = (INT32)v1;
/* We always write a single, since the lower 32-bits of fdest
- get the result (and the even numbered reg is the lower). */
+ get the result (and the even numbered reg is the lower). */
set_fregval_s (cpustate, fdest, *(float *)&iv);
}
else
@@ -3544,7 +3544,7 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
float v1 = get_fregval_s (cpustate, fsrc1);
INT32 iv = (INT32)v1;
/* We always write a single, since the lower 32-bits of fdest
- get the result (and the even numbered reg is the lower). */
+ get the result (and the even numbered reg is the lower). */
set_fregval_s (cpustate, fdest, *(float *)&iv);
}
@@ -3552,7 +3552,7 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
/* Includes looking at ARP (add result precision.) */
if (piped)
{
- fprintf (stderr, "insn_ftrunc: FIXME: pipelined not functional yet.\n");
+ fprintf (stderr, "insn_ftrunc: FIXME: pipelined not functional yet.\n");
if (res_prec)
set_fregval_d (cpustate, fdest, 0.0);
else
@@ -3572,8 +3572,8 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
double dbl_tmp_dest = 0.0;
double sgl_tmp_dest = 0.0;
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3591,13 +3591,13 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
sgl_tmp_dest = v1;
}
- /* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides ARP. And copy to fsr from
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -3606,8 +3606,8 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3621,7 +3621,7 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, cpustate->A[2].val.s);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -3659,8 +3659,8 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
return;
}
- /* Do the operation, being careful about source and result
- precision. */
+ /* Do the operation, being careful about source and result
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3699,7 +3699,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -3708,8 +3708,8 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy stage IRP to FSR. */
if (res_prec)
@@ -3752,13 +3752,13 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
int is_le = ((insn & 0x81) == 0x80);
/* Do the operation. Source and result precision must be the same.
- pfgt: CC set if fsrc1 > fsrc2, else cleared.
- pfle: CC cleared if fsrc1 <= fsrc2, else set.
- pfeq: CC set if fsrc1 = fsrc2, else cleared.
-
- Note that the compares write an undefined (but non-exceptional)
- result into the first stage of the adder pipeline. We'll model
- this by just pushing in dbl_ or sgl_tmp_dest which equal 0.0. */
+ pfgt: CC set if fsrc1 > fsrc2, else cleared.
+ pfle: CC cleared if fsrc1 <= fsrc2, else set.
+ pfeq: CC set if fsrc1 = fsrc2, else cleared.
+
+ Note that the compares write an undefined (but non-exceptional)
+ result into the first stage of the adder pipeline. We'll model
+ this by just pushing in dbl_ or sgl_tmp_dest which equal 0.0. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3782,11 +3782,11 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
SET_PSR_CC (v1 == v2 ? 1 : 0);
}
- /* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ /* FIXME: Set result-status bits besides ARP. And copy to fsr from
+ last stage. */
/* These write fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3800,7 +3800,7 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, cpustate->A[2].val.s);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (src_prec)
@@ -3841,9 +3841,9 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
return;
}
- /* Do the operation. The fzchks version operates in parallel on
- four 16-bit pixels, while the fzchkl operates on two 32-bit
- pixels (pixels are unsigned ordinals in this context). */
+ /* Do the operation. The fzchks version operates in parallel on
+ four 16-bit pixels, while the fzchkl operates on two 32-bit
+ pixels (pixels are unsigned ordinals in this context). */
if (is_fzchks)
{
pm = (pm >> 4) & 0x0f;
@@ -3861,7 +3861,7 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
r |= ((UINT64)ps1 << (i * 16));
pm &= ~(1 << (7 - (3 - i)));
}
- }
+ }
}
else
{
@@ -3880,7 +3880,7 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
r |= ((UINT64)ps1 << (i * 32));
pm &= ~(1 << (7 - (1 - i)));
}
- }
+ }
}
dbl_tmp_dest = *(double *)&r;
@@ -3892,14 +3892,14 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
@@ -3939,14 +3939,14 @@ static void insn_form (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
@@ -3978,21 +3978,21 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
dbl_tmp_dest = *(double *)&r;
/* Update the merge register depending on the pixel size.
- PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
+ PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
if (ps == 0)
{
cpustate->merge = ((cpustate->merge >> 8) & ~0xff00ff00ff00ff00ULL);
- cpustate->merge |= (r & 0xff00ff00ff00ff00ULL);
+ cpustate->merge |= (r & 0xff00ff00ff00ff00ULL);
}
else if (ps == 1)
{
- cpustate->merge = ((cpustate->merge >> 6) & ~0xfc00fc00fc00fc00ULL);
- cpustate->merge |= (r & 0xfc00fc00fc00fc00ULL);
+ cpustate->merge = ((cpustate->merge >> 6) & ~0xfc00fc00fc00fc00ULL);
+ cpustate->merge |= (r & 0xfc00fc00fc00fc00ULL);
}
else if (ps == 2)
{
- cpustate->merge = ((cpustate->merge >> 8) & ~0xff000000ff000000ULL);
- cpustate->merge |= (r & 0xff000000ff000000ULL);
+ cpustate->merge = ((cpustate->merge >> 8) & ~0xff000000ff000000ULL);
+ cpustate->merge |= (r & 0xff000000ff000000ULL);
}
#ifdef TRACE_UNDEFINED_I860
else
@@ -4004,14 +4004,14 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
@@ -4042,22 +4042,22 @@ static void insn_faddz (i860s *cpustate, UINT32 insn)
dbl_tmp_dest = *(double *)&r;
/* Update the merge register depending on the pixel size. */
- cpustate->merge = ((cpustate->merge >> 16) & ~0xffff0000ffff0000ULL);
- cpustate->merge |= (r & 0xffff0000ffff0000ULL);
+ cpustate->merge = ((cpustate->merge >> 16) & ~0xffff0000ffff0000ULL);
+ cpustate->merge |= (r & 0xffff0000ffff0000ULL);
/* FIXME: Copy result-status bit IRP to fsr from last stage. */
/* FIXME: Scalar version flows through all stages. */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
@@ -4080,7 +4080,7 @@ enum {
typedef struct {
/* Execute function for this opcode. */
void (*insn_exec)(i860s *, UINT32);
-
+
/* Flags for this opcode. */
char flags;
} decode_tbl_t;
@@ -4089,8 +4089,8 @@ typedef struct {
/* First-level decode table (i.e., for the 6 primary opcode bits). */
static decode_tbl_t decode_tbl[64] = {
/* A slight bit of decoding for loads and stores is done in the
- execution routines (operand size and addressing mode), which
- is why their respective entries are identical. */
+ execution routines (operand size and addressing mode), which
+ is why their respective entries are identical. */
{ insn_ldx, DEC_DECODED}, /* ld.b isrc1(isrc2),idest. */
{ insn_ldx, DEC_DECODED}, /* ld.b #const(isrc2),idest. */
{ insn_ixfr, DEC_DECODED}, /* ixfr isrc1ni,fdest. */
@@ -4111,7 +4111,7 @@ static decode_tbl_t decode_tbl[64] = {
{ insn_trap, DEC_DECODED}, /* trap isrc1ni,isrc2,idest. */
{ 0, DEC_MORE}, /* FP ESCAPE FORMAT, more decode. */
{ 0, DEC_MORE}, /* CORE ESCAPE FORMAT, more decode. */
- { insn_btne, DEC_DECODED}, /* btne isrc1,isrc2,sbroff. */
+ { insn_btne, DEC_DECODED}, /* btne isrc1,isrc2,sbroff. */
{ insn_btne_imm, DEC_DECODED}, /* btne #const,isrc2,sbroff. */
{ insn_bte, DEC_DECODED}, /* bte isrc1,isrc2,sbroff. */
{ insn_bte_imm, DEC_DECODED}, /* bte #const5,isrc2,idest. */
@@ -4140,7 +4140,7 @@ static decode_tbl_t decode_tbl[64] = {
{ insn_shra, DEC_DECODED}, /* shra isrc1,isrc2,idest. */
{ insn_shra_imm, DEC_DECODED}, /* shra #const,isrc2,idest. */
{ insn_and, DEC_DECODED}, /* and isrc1,isrc2,idest. */
- { insn_and_imm, DEC_DECODED}, /* and #const,isrc2,idest. */
+ { insn_and_imm, DEC_DECODED}, /* and #const,isrc2,idest. */
{ 0, 0},
{ insn_andh_imm, DEC_DECODED}, /* andh #const,isrc2,idest. */
{ insn_andnot, DEC_DECODED}, /* andnot isrc1,isrc2,idest. */
@@ -4174,10 +4174,10 @@ static decode_tbl_t core_esc_decode_tbl[8] = {
/* Second-level decode table (i.e., for the 7 FP extended opcode bits). */
static decode_tbl_t fp_decode_tbl[128] = {
/* Floating point instructions. The least significant 7 bits are
- the (extended) opcode and bits 10:7 are P,D,S,R respectively
- ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
- For some operations, I defer decoding the P,S,R bits to the
- emulation routine for them. */
+ the (extended) opcode and bits 10:7 are P,D,S,R respectively
+ ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
+ For some operations, I defer decoding the P,S,R bits to the
+ emulation routine for them. */
{ insn_dualop, DEC_DECODED}, /* 0x00 pf[m]am */
{ insn_dualop, DEC_DECODED}, /* 0x01 pf[m]am */
{ insn_dualop, DEC_DECODED}, /* 0x02 pf[m]am */
@@ -4309,7 +4309,7 @@ static decode_tbl_t fp_decode_tbl[128] = {
};
-/*
+/*
* Main decoder driver.
* insn = instruction at the current PC to execute.
* non_shadow = This insn is not in the shadow of a delayed branch).
@@ -4364,7 +4364,7 @@ static void decode_exec (i860s *cpustate, UINT32 insn, UINT32 non_shadow)
unrecog_opcode (cpustate->pc, insn);
/* For now, just treat every instruction as taking the same number of
- clocks-- a major oversimplification. */
+ clocks-- a major oversimplification. */
cpustate->icount -= 9;
}
@@ -4374,22 +4374,22 @@ void reset_i860 (i860s *cpustate)
{
int i;
/* On power-up/reset, i860 has values:
- PC = 0xffffff00.
- Integer registers: r0 = 0, others = undefined.
- FP registers: f0:f1 = 0, others undefined.
- psr: U = IM = BR = BW = 0; others = undefined.
- epsr: IL = WP = PBM = BE = 0; processor type, stepping, and
- DCS are proper and read-only; others = undefined.
- db: undefined.
- dirbase: DPS, BL, ATE = 0
- fir, fsr, KR, KI, MERGE: undefined. (what about T?)
-
- I$: flushed.
- D$: undefined (all modified bits = 0).
- TLB: flushed.
-
- Note that any undefined values are set to 0x55aa55aa patterns to
- try to detect defective i860 software. */
+ PC = 0xffffff00.
+ Integer registers: r0 = 0, others = undefined.
+ FP registers: f0:f1 = 0, others undefined.
+ psr: U = IM = BR = BW = 0; others = undefined.
+ epsr: IL = WP = PBM = BE = 0; processor type, stepping, and
+ DCS are proper and read-only; others = undefined.
+ db: undefined.
+ dirbase: DPS, BL, ATE = 0
+ fir, fsr, KR, KI, MERGE: undefined. (what about T?)
+
+ I$: flushed.
+ D$: undefined (all modified bits = 0).
+ TLB: flushed.
+
+ Note that any undefined values are set to 0x55aa55aa patterns to
+ try to detect defective i860 software. */
/* PC is at trap address after reset. */
cpustate->pc = 0xffffff00;
@@ -4405,19 +4405,19 @@ void reset_i860 (i860s *cpustate)
set_fregval_s (cpustate, 1, 0.0);
/* Set whole psr to 0. This sets the proper bits to 0 as specified
- above, and zeroes the undefined bits. */
+ above, and zeroes the undefined bits. */
cpustate->cregs[CR_PSR] = 0;
- /* Set most of the epsr bits to 0 (as specified above), leaving
- undefined as zero as well. Then properly set processor type,
- step, and DCS. Type = EPSR[7..0], step = EPSR[12..8],
- DCS = EPSR[21..18] (2^[12+dcs] = cache size).
- We'll pretend to be stepping D0, since it has the fewest bugs
- (and I don't want to emulate the many defects in the earlier
- steppings).
- Proc type: 1 = XR, 2 = XP (XR has 8KB data cache -> DCS = 1).
- Steppings (XR): 3,4,5,6,7 = (B2, C0, B3, C1, D0 respectively).
- Steppings (XP): 0, 2, 3, 4 = (A0, B0, B1, B2) (any others?). */
+ /* Set most of the epsr bits to 0 (as specified above), leaving
+ undefined as zero as well. Then properly set processor type,
+ step, and DCS. Type = EPSR[7..0], step = EPSR[12..8],
+ DCS = EPSR[21..18] (2^[12+dcs] = cache size).
+ We'll pretend to be stepping D0, since it has the fewest bugs
+ (and I don't want to emulate the many defects in the earlier
+ steppings).
+ Proc type: 1 = XR, 2 = XP (XR has 8KB data cache -> DCS = 1).
+ Steppings (XR): 3,4,5,6,7 = (B2, C0, B3, C1, D0 respectively).
+ Steppings (XP): 0, 2, 3, 4 = (A0, B0, B1, B2) (any others?). */
cpustate->cregs[CR_EPSR] = 0x00040701;
/* Set DPS, BL, ATE = 0 and the undefined parts also to 0. */
@@ -4448,7 +4448,7 @@ static CPU_EXECUTE( i860 )
i860_state_t *cpustate = device->token;
/* Check if the data bus is held by another device, and bail if so.
- Also check for reset. */
+ Also check for reset. */
if (cpustate->pin_reset)
reset_i860 (cpustate);
if (cpustate->pin_bus_hold)
@@ -4462,7 +4462,7 @@ static CPU_EXECUTE( i860 )
while (cpustate->icount > 0)
{
UINT32 savepc = cpustate->pc;
- cpustate->pc_updated = 0;
+ cpustate->pc_updated = 0;
cpustate->pending_trap = 0;
#if 1 /* Delete me soon, for debugging VC inter-processor synch. */
@@ -4480,7 +4480,7 @@ static CPU_EXECUTE( i860 )
}
#endif
- savepc = cpustate->pc;
+ savepc = cpustate->pc;
debugger_instruction_hook(cpustate->device, cpustate->pc);
decode_exec (cpustate, ifetch (cpustate, cpustate->pc), 1);
@@ -4490,8 +4490,8 @@ static CPU_EXECUTE( i860 )
if (cpustate->pending_trap)
{
/* If we need to trap, change PC to trap address.
- Also set supervisor mode, copy U and IM to their
- previous versions, clear IM. */
+ Also set supervisor mode, copy U and IM to their
+ previous versions, clear IM. */
if ((cpustate->pending_trap & TRAP_WAS_EXTERNAL) || (GET_EPSR_INT () && GET_PSR_IN ()))
{
if (!cpustate->pc_updated)
@@ -4507,8 +4507,8 @@ static CPU_EXECUTE( i860 )
cpustate->cregs[CR_FIR] = savepc;
cpustate->fir_gets_trap_addr = 1;
- SET_PSR_PU (GET_PSR_U ());
- SET_PSR_PIM (GET_PSR_IM ());
+ SET_PSR_PU (GET_PSR_U ());
+ SET_PSR_PIM (GET_PSR_IM ());
SET_PSR_U (0);
SET_PSR_IM (0);
SET_PSR_DIM (0);
@@ -4519,15 +4519,15 @@ static CPU_EXECUTE( i860 )
else if (!cpustate->pc_updated)
{
/* If the PC wasn't updated by a control flow instruction, just
- bump to next sequential instruction. */
+ bump to next sequential instruction. */
cpustate->pc += 4;
}
/*if (cpustate->single_stepping)
- debugger (cpustate); */
+ debugger (cpustate); */
}
- return cycles - cpustate->icount;
+ return cycles - cpustate->icount;
}
/*=================================================================*/
@@ -4554,7 +4554,7 @@ static void disasm (i860s *cpustate, UINT32 addr, int len)
phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
/* Note that we print the incoming (possibly virtual) address as the
- PC rather than the translated address. */
+ PC rather than the translated address. */
fprintf (stderr, " (%s) 0x%08x: ", cpustate->device->tag, addr);
insn = memory_read_dword_64le(cpustate->program, phys_addr);
#ifdef HOST_MSB
@@ -4580,7 +4580,7 @@ static void dbg_db (i860s *cpustate, UINT32 addr, int len)
while (len > 0)
{
/* Note that we print the incoming (possibly virtual) address
- rather than the translated address. */
+ rather than the translated address. */
fprintf (stderr, "0x%08x: ", addr);
for (i = 0; i < 16; i++)
{
@@ -4647,7 +4647,7 @@ void debugger (i860s *cpustate)
{
buf[c] = 0;
c = 0;
- break;
+ break;
}
buf[c++] = it;
}
@@ -4660,7 +4660,7 @@ void debugger (i860s *cpustate)
else
break;
buf[1] = 0;
- fprintf (stderr, "go until pc = 0x%08x.\n",
+ fprintf (stderr, "go until pc = 0x%08x.\n",
cpustate->single_stepping);
cpustate->single_stepping = 0; /* HACK */
}
@@ -4683,7 +4683,7 @@ void debugger (i860s *cpustate)
else if (buf[0] == 's')
cpustate->single_stepping = 1;
else if (buf[0] == 'l')
- ; //cpustate->pc = elf_load(buf + 1);
+ ; //cpustate->pc = elf_load(buf + 1);
else if (buf[0] == 'd' && buf[1] == 'b')
{
if (buf[2] == '0')
diff --git a/src/emu/cpu/i860/i860dis.c b/src/emu/cpu/i860/i860dis.c
index e6b7f384ad1..fb1e7315477 100644
--- a/src/emu/cpu/i860/i860dis.c
+++ b/src/emu/cpu/i860/i860dis.c
@@ -1,15 +1,15 @@
/***************************************************************************
- i860dis.c
+ i860dis.c
- Disassembler for the Intel i860 emulator.
+ Disassembler for the Intel i860 emulator.
- Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
- Released for general non-commercial use under the MAME license
- with the additional requirement that you are free to use and
- redistribute this code in modified or unmodified form, provided
- you list me in the credits.
- Visit http://mamedev.org for licensing and usage restrictions.
+ Copyright (C) 1995-present Jason Eckhardt (jle@rice.edu)
+ Released for general non-commercial use under the MAME license
+ with the additional requirement that you are free to use and
+ redistribute this code in modified or unmodified form, provided
+ you list me in the credits.
+ Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
@@ -31,7 +31,7 @@
/* Control register names. */
-static const char *const cr2str[] =
+static const char *const cr2str[] =
{"fir", "psr", "dirbase", "db", "fsr", "epsr", "!", "!"};
@@ -51,10 +51,10 @@ static void int_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
{
/* Possibly prefix shrd with 'd.' */
if (((insn & 0xfc000000) == 0xb0000000) && (insn & 0x200))
- sprintf(buf, "d.%s\t%%r%d,%%r%d,%%r%d", mnemonic,
+ sprintf(buf, "d.%s\t%%r%d,%%r%d,%%r%d", mnemonic,
get_isrc1 (insn), get_isrc2 (insn), get_idest (insn));
else
- sprintf(buf, "%s\t%%r%d,%%r%d,%%r%d", mnemonic,
+ sprintf(buf, "%s\t%%r%d,%%r%d,%%r%d", mnemonic,
get_isrc1 (insn), get_isrc2 (insn), get_idest (insn));
}
@@ -64,13 +64,13 @@ static void int_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
static void int_i2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
{
/* Sign extend the 16-bit immediate.
- Print as hex for the bitwise operations. */
+ Print as hex for the bitwise operations. */
int upper_6bits = (insn >> 26) & 0x3f;
if (upper_6bits >= 0x30 && upper_6bits <= 0x3f)
sprintf(buf, "%s\t0x%04x,%%r%d,%%r%d", mnemonic,
(UINT32)(get_imm16 (insn)), get_isrc2 (insn), get_idest (insn));
else
- sprintf(buf, "%s\t%d,%%r%d,%%r%d", mnemonic,
+ sprintf(buf, "%s\t%d,%%r%d,%%r%d", mnemonic,
sign_ext(get_imm16 (insn), 16), get_isrc2 (insn), get_idest (insn));
}
@@ -121,10 +121,10 @@ static void flop_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
int s = (insn & 0x180) >> 7;
prefix_p = (insn & 0x400) ? "p" : "";
prefix_d = (insn & 0x200) ? "d." : "";
-
+
/* Special case: pf[m]am and pf[m]sm families are always pipelined, so they
- do not have a prefix. Also, for the pfmam and pfmsm families, replace
- any 'a' in the mnemonic with 'm' and prepend an 'm'. */
+ do not have a prefix. Also, for the pfmam and pfmsm families, replace
+ any 'a' in the mnemonic with 'm' and prepend an 'm'. */
if ((insn & 0x7f) < 0x20)
{
int is_pfam = insn & 0x400;
@@ -153,7 +153,7 @@ static void flop_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
if ((insn & 0x7f) == 0x34)
{
const char *mn[2] = { "fgt.", "fle." };
- int r = (insn & 0x080) >> 7;
+ int r = (insn & 0x080) >> 7;
int s = (insn & 0x100) ? 3 : 0;
sprintf(buf, "%s%s%s%s\t%%f%d,%%f%d,%%f%d", prefix_d, prefix_p, mn[r],
suffix[s], get_fsrc1 (insn), get_fsrc2 (insn), get_fdest (insn));
@@ -186,7 +186,7 @@ static void flop_2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
const char *prefix_d;
int s = (insn & 0x180) >> 7;
prefix_d = (insn & 0x200) ? "d." : "";
- sprintf(buf, "%s%s%s\t%%f%d,%%f%d", prefix_d, mnemonic, suffix[s],
+ sprintf(buf, "%s%s%s\t%%f%d,%%f%d", prefix_d, mnemonic, suffix[s],
get_fsrc2 (insn), get_fdest (insn));
}
@@ -247,14 +247,14 @@ static void int_ldx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
UINT32 idx = 0;
/* Bits 28 and 0 determine the operand size. */
- idx = ((insn >> 27) & 2) | (insn & 1);
+ idx = ((insn >> 27) & 2) | (insn & 1);
/* Bit 26 determines the addressing mode (reg+reg or disp+reg). */
if (insn & 0x04000000)
{
/* Chop off lower bits of displacement. */
INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
- int size = sizes[idx];
+ int size = sizes[idx];
immsrc1 &= ~(size - 1);
sprintf(buf, "%s%s\t%d(%%r%d),%%r%d", mnemonic, suffix[idx],
immsrc1, get_isrc2 (insn), get_idest (insn));
@@ -276,10 +276,10 @@ static void int_stx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
INT32 immsrc = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
/* Bits 28 and 0 determine the operand size. */
- idx = ((insn >> 27) & 2) | (insn & 1);
+ idx = ((insn >> 27) & 2) | (insn & 1);
/* Chop off lower bits of displacement. */
- size = sizes[idx];
+ size = sizes[idx];
immsrc &= ~(size - 1);
sprintf(buf, "%s%s\t%%r%d,%d(%%r%d)", mnemonic, suffix[idx],
get_isrc1 (insn), immsrc, get_isrc2 (insn));
@@ -309,8 +309,8 @@ static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
|| upper_6bits == 25);
/* Bits 2 and 1 determine the operand size. */
- idx = ((insn >> 1) & 3);
- size = sizes[idx];
+ idx = ((insn >> 1) & 3);
+ size = sizes[idx];
/* There is no pipelined load quad on XR. */
if (piped && size == 16)
@@ -333,7 +333,7 @@ static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
immsrc1 &= ~(size - 1);
if (is_load)
sprintf(buf, "%s%s%s\t%d(%%r%d)%s,%%f%d", piped_suff[piped], mnemonic,
- suffix[idx], immsrc1, get_isrc2 (insn), auto_suff[auto_inc],
+ suffix[idx], immsrc1, get_isrc2 (insn), auto_suff[auto_inc],
get_fdest (insn));
else
sprintf(buf, "%s%s\t%%f%d,%d(%%r%d)%s", mnemonic, suffix[idx],
@@ -375,14 +375,14 @@ enum
typedef struct
{
/* Disassembly function for this opcode.
- Call with buffer, mnemonic, pc, insn. */
+ Call with buffer, mnemonic, pc, insn. */
void (*insn_dis)(char *, char *, UINT32, UINT32);
-
+
/* Flags for this opcode. */
char flags;
-
+
/* Mnemonic of this opcode (sometimes partial when more decode is
- done in disassembly routines-- e.g., loads and stores). */
+ done in disassembly routines-- e.g., loads and stores). */
const char *mnemonic;
} decode_tbl_t;
@@ -391,8 +391,8 @@ typedef struct
static decode_tbl_t decode_tbl[64] =
{
/* A slight bit of decoding for loads and stores is done in the
- execution routines (operand size and addressing mode), which
- is why their respective entries are identical. */
+ execution routines (operand size and addressing mode), which
+ is why their respective entries are identical. */
{ int_ldx, DEC_DECODED, "ld." }, /* ld.b isrc1(isrc2),idest. */
{ int_ldx, DEC_DECODED, "ld." }, /* ld.b #const(isrc2),idest. */
{ int_1d, DEC_DECODED, "ixfr" }, /* ixfr isrc1ni,fdest. */
@@ -413,7 +413,7 @@ static decode_tbl_t decode_tbl[64] =
{ int_12d, DEC_DECODED, "trap" }, /* trap isrc1ni,isrc2,idest. */
{ 0, DEC_MORE, 0 }, /* FP ESCAPE FORMAT, more decode. */
{ 0, DEC_MORE, 0 }, /* CORE ESCAPE FORMAT, more decode. */
- { int_12S, DEC_DECODED, "btne" }, /* btne isrc1,isrc2,sbroff. */
+ { int_12S, DEC_DECODED, "btne" }, /* btne isrc1,isrc2,sbroff. */
{ int_i2S, DEC_DECODED, "btne" }, /* btne #const,isrc2,sbroff. */
{ int_12S, DEC_DECODED, "bte" }, /* bte isrc1,isrc2,sbroff. */
{ int_i2S, DEC_DECODED, "bte" }, /* bte #const5,isrc2,idest. */
@@ -442,7 +442,7 @@ static decode_tbl_t decode_tbl[64] =
{ int_12d, DEC_DECODED, "shra" }, /* shra isrc1,isrc2,idest. */
{ int_i2d, DEC_DECODED, "shra" }, /* shra #const,isrc2,idest. */
{ int_12d, DEC_DECODED, "and" }, /* and isrc1,isrc2,idest. */
- { int_i2d, DEC_DECODED, "and" }, /* and #const,isrc2,idest. */
+ { int_i2d, DEC_DECODED, "and" }, /* and #const,isrc2,idest. */
{ 0, 0 , 0 },
{ int_i2d, DEC_DECODED, "andh" }, /* andh #const,isrc2,idest. */
{ int_12d, DEC_DECODED, "andnot" }, /* andnot isrc1,isrc2,idest. */
@@ -478,10 +478,10 @@ static decode_tbl_t core_esc_decode_tbl[8] =
static decode_tbl_t fp_decode_tbl[128] =
{
/* Floating point instructions. The least significant 7 bits are
- the (extended) opcode and bits 10:7 are P,D,S,R respectively
- ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
- For some operations, I defer decoding the P,S,R bits to the
- emulation routine for them. */
+ the (extended) opcode and bits 10:7 are P,D,S,R respectively
+ ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
+ For some operations, I defer decoding the P,S,R bits to the
+ emulation routine for them. */
{ flop_12d, DEC_DECODED, "r2p1." }, /* 0x00 pf[m]am */
{ flop_12d, DEC_DECODED, "r2pt." }, /* 0x01 pf[m]am */
{ flop_12d, DEC_DECODED, "r2ap1." }, /* 0x02 pf[m]am */
@@ -681,10 +681,10 @@ unsigned disasm_i860(char *buf, unsigned pc, UINT32 insn)
}
}
}
-
+
if (unrecognized_op)
sprintf (buf, ".long\t%#08x", insn);
-
+
/* Replace tabs with spaces */
i860_dasm_tab_replacer(buf, 10);
diff --git a/src/emu/drawgfx.c b/src/emu/drawgfx.c
index 6a5e092754c..4969c35691b 100644
--- a/src/emu/drawgfx.c
+++ b/src/emu/drawgfx.c
@@ -46,7 +46,7 @@ INLINE int readbit(const UINT8 *src, unsigned int bitnum)
/*-------------------------------------------------
- normalize_xscroll - normalize an X scroll
+ normalize_xscroll - normalize an X scroll
value for a bitmap to be positive and less
than the width
-------------------------------------------------*/
@@ -58,7 +58,7 @@ INLINE INT32 normalize_xscroll(bitmap_t *bitmap, INT32 xscroll)
/*-------------------------------------------------
- normalize_yscroll - normalize a Y scroll
+ normalize_yscroll - normalize a Y scroll
value for a bitmap to be positive and less
than the height
-------------------------------------------------*/
@@ -104,7 +104,7 @@ gfx_element *gfx_element_alloc(running_machine *machine, const gfx_layout *gl, c
gfx->color_depth = 1 << planes;
gfx->color_granularity = 1 << planes;
gfx->total_colors = total_colors;
-
+
gfx->srcdata = srcdata;
gfx->machine = machine;
@@ -143,7 +143,7 @@ gfx_element *gfx_element_alloc(running_machine *machine, const gfx_layout *gl, c
/* allocate a pen usage array for entries with 32 pens or less */
if (gfx->color_depth <= 32)
gfx->pen_usage = malloc_or_die(gfx->total_elements * sizeof(*gfx->pen_usage));
-
+
/* allocate a dirty array */
gfx->dirty = malloc_or_die(gfx->total_elements * sizeof(*gfx->dirty));
memset(gfx->dirty, 1, gfx->total_elements * sizeof(*gfx->dirty));
@@ -159,7 +159,7 @@ gfx_element *gfx_element_alloc(running_machine *machine, const gfx_layout *gl, c
gfx->flags |= GFX_ELEMENT_DONT_FREE;
if (planes <= 4)
gfx->flags |= GFX_ELEMENT_PACKED;
-
+
/* RAW graphics must have a pointer up front */
gfx->gfxdata = (UINT8 *)gfx->srcdata;
}
@@ -180,7 +180,7 @@ gfx_element *gfx_element_alloc(running_machine *machine, const gfx_layout *gl, c
/*-------------------------------------------------
- gfx_element_decode - update a single code in
+ gfx_element_decode - update a single code in
a gfx_element
-------------------------------------------------*/
@@ -216,7 +216,7 @@ void gfx_element_free(gfx_element *gfx)
/*-------------------------------------------------
- gfx_element_build_temporary - create a
+ gfx_element_build_temporary - create a
temporary one-off gfx_element
-------------------------------------------------*/
@@ -233,21 +233,21 @@ void gfx_element_build_temporary(gfx_element *gfx, running_machine *machine, UIN
gfx->origheight = height;
gfx->flags = flags;
gfx->total_elements = 1;
-
+
gfx->color_base = color_base;
gfx->color_depth = color_granularity;
gfx->color_granularity = color_granularity;
gfx->total_colors = (machine->config->total_colors - color_base) / color_granularity;
-
+
gfx->pen_usage = NULL;
-
+
gfx->gfxdata = base;
gfx->line_modulo = rowbytes;
gfx->char_modulo = 0;
gfx->srcdata = base;
gfx->dirty = &not_dirty;
gfx->dirtyseq = 0;
-
+
gfx->machine = machine;
}
@@ -308,7 +308,7 @@ void decodechar(const gfx_element *gfx, UINT32 code, const UINT8 *src)
const UINT32 *yoffset = gl->extyoffs ? gl->extyoffs : gl->yoffset;
UINT8 *dp = gfx->gfxdata + code * gfx->char_modulo;
int plane, x, y;
-
+
if (!israw)
{
/* zap the data to 0 */
@@ -357,7 +357,7 @@ void decodechar(const gfx_element *gfx, UINT32 code, const UINT8 *src)
/* compute pen usage */
calc_penusage(gfx, code);
-
+
/* no longer dirty */
gfx->dirty[code] = 0;
}
@@ -402,7 +402,7 @@ void decodegfx(gfx_element *gfx, UINT32 first, UINT32 count)
***************************************************************************/
/*-------------------------------------------------
- drawgfx - generic drawgfx with legacy
+ drawgfx - generic drawgfx with legacy
interface
-------------------------------------------------*/
@@ -414,15 +414,15 @@ void drawgfx(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 color,
case TRANSPARENCY_NONE:
drawgfx_opaque(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy);
break;
-
+
case TRANSPARENCY_PEN:
drawgfx_transpen(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, transparent_color);
break;
-
+
case TRANSPARENCY_PENS:
drawgfx_transmask(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, transparent_color);
break;
-
+
default:
fatalerror("Invalid transparency specified for drawgfx (%d)", transparency);
break;
@@ -435,7 +435,7 @@ void drawgfx(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 color,
no transparency
-------------------------------------------------*/
-void drawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
@@ -449,7 +449,7 @@ void drawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_OPAQUE, NO_PRIORITY);
@@ -463,8 +463,8 @@ void drawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element
a single transparent pen
-------------------------------------------------*/
-void drawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 transpen)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
@@ -485,16 +485,16 @@ void drawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_eleme
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~(1 << transpen)) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & (1 << transpen)) == 0)
{
@@ -512,13 +512,13 @@ void drawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_eleme
/*-------------------------------------------------
- drawgfx_transpen_raw - render a gfx element
+ drawgfx_transpen_raw - render a gfx element
with a single transparent pen and no color
lookups
-------------------------------------------------*/
-void drawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 transpen)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
@@ -529,7 +529,7 @@ void drawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_e
/* get final code and color, and grab lookup tables */
code %= gfx->total_elements;
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
@@ -543,13 +543,13 @@ void drawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_e
/*-------------------------------------------------
- drawgfx_transmask - render a gfx element
+ drawgfx_transmask - render a gfx element
with a multiple transparent pens provided as
a mask
-------------------------------------------------*/
-void drawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 transmask)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
@@ -570,16 +570,16 @@ void drawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~transmask) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & transmask) == 0)
{
@@ -597,13 +597,13 @@ void drawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
/*-------------------------------------------------
- drawgfx_transtable - render a gfx element
+ drawgfx_transtable - render a gfx element
using a table to look up which pens are
transparent, opaque, or shadowing
-------------------------------------------------*/
-void drawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
const UINT8 *pentable, const pen_t *shadowtable)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
@@ -618,7 +618,7 @@ void drawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_TRANSTABLE16, NO_PRIORITY);
@@ -633,13 +633,13 @@ void drawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
remaining pixels with a fixed alpha value
-------------------------------------------------*/
-void drawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 transpen, UINT8 alpha)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
const pen_t *paldata;
-
+
/* special case alpha = 0xff */
if (alpha == 0xff)
{
@@ -655,7 +655,7 @@ void drawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
@@ -687,15 +687,15 @@ void drawgfxzoom(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 col
case TRANSPARENCY_NONE:
drawgfxzoom_opaque(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley);
break;
-
+
case TRANSPARENCY_PEN:
drawgfxzoom_transpen(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley, transparent_color);
break;
-
+
case TRANSPARENCY_PENS:
drawgfxzoom_transmask(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley, transparent_color);
break;
-
+
default:
fatalerror("Invalid transparency specified for drawgfxzoom (%d)", transparency);
break;
@@ -704,17 +704,17 @@ void drawgfxzoom(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 col
/*-------------------------------------------------
- drawgfxzoom_opaque - render a scaled gfx
+ drawgfxzoom_opaque - render a scaled gfx
element with no transparency
-------------------------------------------------*/
-void drawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
const pen_t *paldata;
-
+
/* non-zoom case */
if (scalex == 0x10000 && scaley == 0x10000)
{
@@ -730,7 +730,7 @@ void drawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_OPAQUE, NO_PRIORITY);
@@ -740,11 +740,11 @@ void drawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
/*-------------------------------------------------
- drawgfxzoom_transpen - render a scaled gfx
+ drawgfxzoom_transpen - render a scaled gfx
element with a single transparent pen
-------------------------------------------------*/
-void drawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, UINT32 transpen)
{
@@ -773,16 +773,16 @@ void drawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_e
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~(1 << transpen)) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & (1 << transpen)) == 0)
{
@@ -800,12 +800,12 @@ void drawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_e
/*-------------------------------------------------
- drawgfxzoom_transpen_raw - render a scaled gfx
- element with a single transparent pen and no
+ drawgfxzoom_transpen_raw - render a scaled gfx
+ element with a single transparent pen and no
color lookups
-------------------------------------------------*/
-void drawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, UINT32 transpen)
{
@@ -824,7 +824,7 @@ void drawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const g
/* get final code and color, and grab lookup tables */
code %= gfx->total_elements;
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
@@ -838,12 +838,12 @@ void drawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const g
/*-------------------------------------------------
- drawgfxzoom_transmask - render a scaled gfx
- element with a multiple transparent pens
+ drawgfxzoom_transmask - render a scaled gfx
+ element with a multiple transparent pens
provided as a mask
-------------------------------------------------*/
-void drawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, UINT32 transmask)
{
@@ -872,16 +872,16 @@ void drawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~transmask) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & transmask) == 0)
{
@@ -899,12 +899,12 @@ void drawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_
/*-------------------------------------------------
- drawgfxzoom_transtable - render a scaled gfx
- element using a table to look up which pens
+ drawgfxzoom_transtable - render a scaled gfx
+ element using a table to look up which pens
are transparent, opaque, or shadowing
-------------------------------------------------*/
-void drawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, const UINT8 *pentable, const pen_t *shadowtable)
{
@@ -927,7 +927,7 @@ void drawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_TRANSTABLE16, NO_PRIORITY);
@@ -937,18 +937,18 @@ void drawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx
/*-------------------------------------------------
- drawgfxzoom_alpha - render a scaled gfx element
- with a single transparent pen, alpha blending
+ drawgfxzoom_alpha - render a scaled gfx element
+ with a single transparent pen, alpha blending
the remaining pixels with a fixed alpha value
-------------------------------------------------*/
-void drawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void drawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, UINT32 transpen, UINT8 alpha)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
const pen_t *paldata;
-
+
/* non-zoom case */
if (scalex == 0x10000 && scaley == 0x10000)
{
@@ -971,7 +971,7 @@ void drawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
@@ -1003,15 +1003,15 @@ void pdrawgfx(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 color,
case TRANSPARENCY_NONE:
pdrawgfx_opaque(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, priority_bitmap, priority_mask);
break;
-
+
case TRANSPARENCY_PEN:
pdrawgfx_transpen(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, priority_bitmap, priority_mask, transparent_color);
break;
-
+
case TRANSPARENCY_PENS:
pdrawgfx_transmask(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, priority_bitmap, priority_mask, transparent_color);
break;
-
+
default:
fatalerror("Invalid transparency specified for pdrawgfx (%d)", transparency);
break;
@@ -1025,7 +1025,7 @@ void pdrawgfx(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 color,
bitmap
-------------------------------------------------*/
-void pdrawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask)
{
@@ -1039,10 +1039,10 @@ void pdrawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_elemen
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_OPAQUE_PRIORITY, UINT8);
@@ -1053,11 +1053,11 @@ void pdrawgfx_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_elemen
/*-------------------------------------------------
pdrawgfx_transpen - render a gfx element with
- a single transparent pen, checking against the
+ a single transparent pen, checking against the
priority bitmap
-------------------------------------------------*/
-void pdrawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask, UINT32 transpen)
{
@@ -1078,16 +1078,16 @@ void pdrawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~(1 << transpen)) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & (1 << transpen)) == 0)
{
@@ -1098,7 +1098,7 @@ void pdrawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_TRANSPEN_PRIORITY, UINT8);
@@ -1108,12 +1108,12 @@ void pdrawgfx_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_elem
/*-------------------------------------------------
- pdrawgfx_transpen_raw - render a gfx element
+ pdrawgfx_transpen_raw - render a gfx element
with a single transparent pen and no color
lookups, checking against the priority bitmap
-------------------------------------------------*/
-void pdrawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask, UINT32 transpen)
{
@@ -1123,14 +1123,14 @@ void pdrawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_
/* get final code and color, and grab lookup tables */
code %= gfx->total_elements;
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REBASE_TRANSPEN_PRIORITY, UINT8);
@@ -1140,12 +1140,12 @@ void pdrawgfx_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_
/*-------------------------------------------------
- pdrawgfx_transmask - render a gfx element
+ pdrawgfx_transmask - render a gfx element
with a multiple transparent pens provided as
a mask, checking against the priority bitmap
-------------------------------------------------*/
-void pdrawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask, UINT32 transmask)
{
@@ -1166,16 +1166,16 @@ void pdrawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~transmask) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & transmask) == 0)
{
@@ -1186,7 +1186,7 @@ void pdrawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_TRANSMASK_PRIORITY, UINT8);
@@ -1196,13 +1196,13 @@ void pdrawgfx_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
/*-------------------------------------------------
- pdrawgfx_transtable - render a gfx element
+ pdrawgfx_transtable - render a gfx element
using a table to look up which pens are
- transparent, opaque, or shadowing, checking
+ transparent, opaque, or shadowing, checking
against the priority bitmap
-------------------------------------------------*/
-void pdrawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask, const UINT8 *pentable, const pen_t *shadowtable)
{
@@ -1217,10 +1217,10 @@ void pdrawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_el
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY, UINT8);
@@ -1232,11 +1232,11 @@ void pdrawgfx_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_el
/*-------------------------------------------------
pdrawgfx_alpha - render a gfx element with
a single transparent pen, alpha blending the
- remaining pixels with a fixed alpha value,
+ remaining pixels with a fixed alpha value,
checking against the priority bitmap
-------------------------------------------------*/
-void pdrawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
bitmap_t *priority, UINT32 pmask, UINT32 transpen, UINT8 alpha)
{
@@ -1257,14 +1257,14 @@ void pdrawgfx_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFX_CORE(UINT16, PIXEL_OP_REMAP_TRANSPEN_ALPHA16_PRIORITY, UINT8);
@@ -1292,15 +1292,15 @@ void pdrawgfxzoom(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 co
case TRANSPARENCY_NONE:
pdrawgfxzoom_opaque(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley, priority_bitmap, priority_mask);
break;
-
+
case TRANSPARENCY_PEN:
pdrawgfxzoom_transpen(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley, priority_bitmap, priority_mask, transparent_color);
break;
-
+
case TRANSPARENCY_PENS:
pdrawgfxzoom_transmask(dest, cliprect, gfx, code, color, flipx, flipy, sx, sy, scalex, scaley, priority_bitmap, priority_mask, transparent_color);
break;
-
+
default:
fatalerror("Invalid transparency specified for pdrawgfxzoom (%d)", transparency);
break;
@@ -1309,12 +1309,12 @@ void pdrawgfxzoom(bitmap_t *dest, const gfx_element *gfx, UINT32 code, UINT32 co
/*-------------------------------------------------
- pdrawgfxzoom_opaque - render a scaled gfx
- element with no transparency, checking against
+ pdrawgfxzoom_opaque - render a scaled gfx
+ element with no transparency, checking against
the priority bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask)
{
@@ -1335,10 +1335,10 @@ void pdrawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_el
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_OPAQUE_PRIORITY, UINT8);
@@ -1348,14 +1348,14 @@ void pdrawgfxzoom_opaque(bitmap_t *dest, const rectangle *cliprect, const gfx_el
/*-------------------------------------------------
- pdrawgfxzoom_transpen - render a scaled gfx
- element with a single transparent pen,
+ pdrawgfxzoom_transpen - render a scaled gfx
+ element with a single transparent pen,
checking against the priority bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
- UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
+ UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
UINT32 transpen)
{
const pen_t *paldata;
@@ -1382,16 +1382,16 @@ void pdrawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~(1 << transpen)) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & (1 << transpen)) == 0)
{
@@ -1402,7 +1402,7 @@ void pdrawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_TRANSPEN_PRIORITY, UINT8);
@@ -1412,15 +1412,15 @@ void pdrawgfxzoom_transpen(bitmap_t *dest, const rectangle *cliprect, const gfx_
/*-------------------------------------------------
- pdrawgfxzoom_transpen_raw - render a scaled gfx
- element with a single transparent pen and no
- color lookups, checking against the priority
+ pdrawgfxzoom_transpen_raw - render a scaled gfx
+ element with a single transparent pen and no
+ color lookups, checking against the priority
bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
- UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
+ UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
UINT32 transpen)
{
/* non-zoom case */
@@ -1436,14 +1436,14 @@ void pdrawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const
/* get final code and color, and grab lookup tables */
code %= gfx->total_elements;
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REBASE_TRANSPEN_PRIORITY, UINT8);
@@ -1453,15 +1453,15 @@ void pdrawgfxzoom_transpen_raw(bitmap_t *dest, const rectangle *cliprect, const
/*-------------------------------------------------
- pdrawgfxzoom_transmask - render a scaled gfx
- element with a multiple transparent pens
+ pdrawgfxzoom_transmask - render a scaled gfx
+ element with a multiple transparent pens
provided as a mask, checking against the
priority bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
- UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
+ UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
UINT32 transmask)
{
const pen_t *paldata;
@@ -1488,16 +1488,16 @@ void pdrawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* use pen usage to optimize */
if (gfx->pen_usage != NULL && !gfx->dirty[code])
{
UINT32 usage = gfx->pen_usage[code];
-
+
/* fully transparent; do nothing */
if ((usage & ~transmask) == 0)
return;
-
+
/* fully opaque; draw as such */
if ((usage & transmask) == 0)
{
@@ -1508,7 +1508,7 @@ void pdrawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_TRANSMASK_PRIORITY, UINT8);
@@ -1518,15 +1518,15 @@ void pdrawgfxzoom_transmask(bitmap_t *dest, const rectangle *cliprect, const gfx
/*-------------------------------------------------
- pdrawgfxzoom_transtable - render a scaled gfx
- element using a table to look up which pens
- are transparent, opaque, or shadowing,
+ pdrawgfxzoom_transtable - render a scaled gfx
+ element using a table to look up which pens
+ are transparent, opaque, or shadowing,
checking against the priority bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
- UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
+ UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
const UINT8 *pentable, const pen_t *shadowtable)
{
const pen_t *paldata;
@@ -1547,10 +1547,10 @@ void pdrawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gf
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY, UINT8);
@@ -1560,16 +1560,16 @@ void pdrawgfxzoom_transtable(bitmap_t *dest, const rectangle *cliprect, const gf
/*-------------------------------------------------
- pdrawgfxzoom_alpha - render a scaled gfx
- element with a single transparent pen, alpha
- blending the remaining pixels with a fixed
- alpha value, checking against the priority
+ pdrawgfxzoom_alpha - render a scaled gfx
+ element with a single transparent pen, alpha
+ blending the remaining pixels with a fixed
+ alpha value, checking against the priority
bitmap
-------------------------------------------------*/
-void pdrawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+void pdrawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
- UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
+ UINT32 scalex, UINT32 scaley, bitmap_t *priority, UINT32 pmask,
UINT32 transpen, UINT8 alpha)
{
const pen_t *paldata;
@@ -1596,14 +1596,14 @@ void pdrawgfxzoom_alpha(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && !gfx->dirty[code] && (gfx->pen_usage[code] & ~(1 << transpen)) == 0)
return;
/* high bit of the mask is implicitly on */
pmask |= 1 << 31;
-
+
/* render based on dest bitmap depth */
if (dest->bpp == 16)
DRAWGFXZOOM_CORE(UINT16, PIXEL_OP_REMAP_TRANSPEN_ALPHA16_PRIORITY, UINT8);
@@ -1638,7 +1638,7 @@ void draw_scanline8(bitmap_t *bitmap, INT32 destx, INT32 desty, INT32 length, co
else
DRAWSCANLINE_CORE(UINT32, PIXEL_OP_REMAP_OPAQUE, NO_PRIORITY);
}
-
+
/* raw copy case */
else
{
@@ -1672,7 +1672,7 @@ void draw_scanline16(bitmap_t *bitmap, INT32 destx, INT32 desty, INT32 length, c
else
DRAWSCANLINE_CORE(UINT32, PIXEL_OP_REMAP_OPAQUE, NO_PRIORITY);
}
-
+
/* raw copy case */
else
{
@@ -1706,7 +1706,7 @@ void draw_scanline32(bitmap_t *bitmap, INT32 destx, INT32 desty, INT32 length, c
else
DRAWSCANLINE_CORE(UINT32, PIXEL_OP_REMAP_OPAQUE, NO_PRIORITY);
}
-
+
/* raw copy case */
else
{
@@ -1807,7 +1807,7 @@ void copybitmap(bitmap_t *dest, bitmap_t *src, int flipx, int flipy, INT32 destx
/*-------------------------------------------------
- copybitmap_trans - copy from one bitmap to
+ copybitmap_trans - copy from one bitmap to
another, copying all unclipped pixels except
those that match transpen
-------------------------------------------------*/
@@ -1851,23 +1851,23 @@ void copybitmap_trans(bitmap_t *dest, bitmap_t *src, int flipx, int flipy, INT32
***************************************************************************/
/*-------------------------------------------------
- copyscrollbitmap - copy from one bitmap to
- another, copying all unclipped pixels, and
+ copyscrollbitmap - copy from one bitmap to
+ another, copying all unclipped pixels, and
applying scrolling to one or more rows/colums
-------------------------------------------------*/
void copyscrollbitmap(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const INT32 *rowscroll, UINT32 numcols, const INT32 *colscroll, const rectangle *cliprect)
{
/* just call through to the transparent case as the underlying copybitmap will
- optimize for pen == 0xffffffff */
+ optimize for pen == 0xffffffff */
copyscrollbitmap_trans(dest, src, numrows, rowscroll, numcols, colscroll, cliprect, 0xffffffff);
}
/*-------------------------------------------------
- copyscrollbitmap_trans - copy from one bitmap
- to another, copying all unclipped pixels
- except those that match transpen, and applying
+ copyscrollbitmap_trans - copy from one bitmap
+ to another, copying all unclipped pixels
+ except those that match transpen, and applying
scrolling to one or more rows/colums
-------------------------------------------------*/
@@ -1913,7 +1913,7 @@ void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const
rectangle subclip = *cliprect;
int col, colwidth, groupcols;
- /* determine width of each column */
+ /* determine width of each column */
colwidth = src->width / numcols;
assert(src->width % colwidth == 0);
@@ -1947,7 +1947,7 @@ void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const
rectangle subclip = *cliprect;
int row, rowheight, grouprows;
- /* determine width of each rows */
+ /* determine width of each rows */
rowheight = src->height / numrows;
assert(src->height % rowheight == 0);
@@ -1983,7 +1983,7 @@ void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const
/*-------------------------------------------------
copyrozbitmap - copy from one bitmap to another,
- with zoom and rotation, copying all unclipped
+ with zoom and rotation, copying all unclipped
pixels
-------------------------------------------------*/
@@ -2006,9 +2006,9 @@ void copyrozbitmap(bitmap_t *dest, const rectangle *cliprect, bitmap_t *src, INT
/*-------------------------------------------------
- copyrozbitmap_trans - copy from one bitmap to
- another, with zoom and rotation, copying all
- unclipped pixels whose values do not match
+ copyrozbitmap_trans - copy from one bitmap to
+ another, with zoom and rotation, copying all
+ unclipped pixels whose values do not match
transpen
-------------------------------------------------*/
diff --git a/src/emu/drawgfx.h b/src/emu/drawgfx.h
index 7c9e469b8cb..dfeec5157fc 100644
--- a/src/emu/drawgfx.h
+++ b/src/emu/drawgfx.h
@@ -133,7 +133,7 @@ struct _gfx_element
UINT16 color_depth; /* number of colors each pixel can represent */
UINT16 color_granularity; /* number of colors for each color code */
UINT32 total_colors; /* number of color codes */
-
+
UINT32 * pen_usage; /* bitmask of pens that are used (pens 0-31 only) */
UINT8 * gfxdata; /* pixel data, 8bpp or 4bpp (if GFX_ELEMENT_PACKED) */
@@ -277,7 +277,7 @@ void copybitmap(bitmap_t *dest, bitmap_t *src, int flipx, int flipy, INT32 destx
/* copy from one bitmap to another, copying all unclipped pixels except those that match transpen */
void copybitmap_trans(bitmap_t *dest, bitmap_t *src, int flipx, int flipy, INT32 destx, INT32 desty, const rectangle *cliprect, UINT32 transpen);
-/*
+/*
Copy a bitmap onto another with scroll and wraparound.
These functions support multiple independently scrolling rows/columns.
"rows" is the number of indepentently scrolling rows. "rowscroll" is an
@@ -296,32 +296,32 @@ void copyscrollbitmap(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const INT32
void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const INT32 *rowscroll, UINT32 numcols, const INT32 *colscroll, const rectangle *cliprect, UINT32 transpen);
/*
- Copy a bitmap applying rotation, zooming, and arbitrary distortion.
- This function works in a way that mimics some real hardware like the Konami
- 051316, so it requires little or no further processing on the caller side.
-
- Two 16.16 fixed point counters are used to keep track of the position on
- the source bitmap. startx and starty are the initial values of those counters,
- indicating the source pixel that will be drawn at coordinates (0,0) in the
- destination bitmap. The destination bitmap is scanned left to right, top to
- bottom; every time the cursor moves one pixel to the right, incxx is added
- to startx and incxy is added to starty. Every time the cursor moves to the
- next line, incyx is added to startx and incyy is added to startyy.
-
- What this means is that if incxy and incyx are both 0, the bitmap will be
- copied with only zoom and no rotation. If e.g. incxx and incyy are both 0x8000,
- the source bitmap will be doubled.
-
- Rotation is performed this way:
- incxx = 0x10000 * cos(theta)
- incxy = 0x10000 * -sin(theta)
- incyx = 0x10000 * sin(theta)
- incyy = 0x10000 * cos(theta)
- this will perform a rotation around (0,0), you'll have to adjust startx and
- starty to move the center of rotation elsewhere.
-
- Optionally the bitmap can be tiled across the screen instead of doing a single
- copy. This is obtained by setting the wraparound parameter to true.
+ Copy a bitmap applying rotation, zooming, and arbitrary distortion.
+ This function works in a way that mimics some real hardware like the Konami
+ 051316, so it requires little or no further processing on the caller side.
+
+ Two 16.16 fixed point counters are used to keep track of the position on
+ the source bitmap. startx and starty are the initial values of those counters,
+ indicating the source pixel that will be drawn at coordinates (0,0) in the
+ destination bitmap. The destination bitmap is scanned left to right, top to
+ bottom; every time the cursor moves one pixel to the right, incxx is added
+ to startx and incxy is added to starty. Every time the cursor moves to the
+ next line, incyx is added to startx and incyy is added to startyy.
+
+ What this means is that if incxy and incyx are both 0, the bitmap will be
+ copied with only zoom and no rotation. If e.g. incxx and incyy are both 0x8000,
+ the source bitmap will be doubled.
+
+ Rotation is performed this way:
+ incxx = 0x10000 * cos(theta)
+ incxy = 0x10000 * -sin(theta)
+ incyx = 0x10000 * sin(theta)
+ incyy = 0x10000 * cos(theta)
+ this will perform a rotation around (0,0), you'll have to adjust startx and
+ starty to move the center of rotation elsewhere.
+
+ Optionally the bitmap can be tiled across the screen instead of doing a single
+ copy. This is obtained by setting the wraparound parameter to true.
*/
/* copy from one bitmap to another, with zoom and rotation, copying all unclipped pixels */
@@ -349,8 +349,8 @@ INLINE void gfx_element_set_source(gfx_element *gfx, const UINT8 *source)
/*-------------------------------------------------
- gfx_element_get_data - return a pointer to
- the base of the given code within a
+ gfx_element_get_data - return a pointer to
+ the base of the given code within a
gfx_element, decoding it if it is dirty
-------------------------------------------------*/
diff --git a/src/emu/drawgfxm.h b/src/emu/drawgfxm.h
index 8204ad28535..4103e830145 100644
--- a/src/emu/drawgfxm.h
+++ b/src/emu/drawgfxm.h
@@ -11,39 +11,39 @@
**********************************************************************
- How to use these macros:
-
- There are two sets of macros. The PIXEL_OP* macros are simple
- per-pixel operations, designed to take a SOURCE pixel and
- copy it to the DEST, perhaps updating the PRIORITY pixel as
- well. On their own, they are not particularly useful.
-
- The second set of macros represents the core gfx/bitmap walking
- and rendering code. These macros generally take the target pixel
- type (UINT8, UINT16, UINT32), one of the PIXEL_OP* macros,
- and a priority bitmap pixel type (UINT8, UINT16, UINT32, or the
- special type NO_PRIORITY).
-
- Although the code may look inefficient at first, the compiler is
- able to easily optimize out unused cases due to the way the
- macros are written, leaving behind just the cases we are
- interested in.
-
- The general approach for using these macros is:
-
- my_drawing_function(params)
- {
- // ensure that all the required parameters for the mega
- // macro are defined (if they are not needed, just declare
- // the variables and set them equal to a known constant
- // value to help the compiler)
-
- // set up any additional variables needed by the PIXEL_OP*
- // macro you want to use (each macro has its own
- // requirements)
-
- MEGA_MACRO(BITMAP_TYPE, PIXEL_OP, PRIORITY_TYPE);
- }
+ How to use these macros:
+
+ There are two sets of macros. The PIXEL_OP* macros are simple
+ per-pixel operations, designed to take a SOURCE pixel and
+ copy it to the DEST, perhaps updating the PRIORITY pixel as
+ well. On their own, they are not particularly useful.
+
+ The second set of macros represents the core gfx/bitmap walking
+ and rendering code. These macros generally take the target pixel
+ type (UINT8, UINT16, UINT32), one of the PIXEL_OP* macros,
+ and a priority bitmap pixel type (UINT8, UINT16, UINT32, or the
+ special type NO_PRIORITY).
+
+ Although the code may look inefficient at first, the compiler is
+ able to easily optimize out unused cases due to the way the
+ macros are written, leaving behind just the cases we are
+ interested in.
+
+ The general approach for using these macros is:
+
+ my_drawing_function(params)
+ {
+ // ensure that all the required parameters for the mega
+ // macro are defined (if they are not needed, just declare
+ // the variables and set them equal to a known constant
+ // value to help the compiler)
+
+ // set up any additional variables needed by the PIXEL_OP*
+ // macro you want to use (each macro has its own
+ // requirements)
+
+ MEGA_MACRO(BITMAP_TYPE, PIXEL_OP, PRIORITY_TYPE);
+ }
*********************************************************************/
@@ -70,7 +70,7 @@ typedef struct { char dummy[3]; } NO_PRIORITY;
***************************************************************************/
/*-------------------------------------------------
- PIXEL_OP_COPY_OPAQUE - render all pixels
+ PIXEL_OP_COPY_OPAQUE - render all pixels
regardless of pen, copying directly
-------------------------------------------------*/
@@ -83,7 +83,7 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_COPY_TRANSPEN - render all pixels
+ PIXEL_OP_COPY_TRANSPEN - render all pixels
except those matching 'transpen', copying
directly
-------------------------------------------------*/
@@ -99,7 +99,7 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_REMAP_OPAQUE - render all pixels
+ PIXEL_OP_REMAP_OPAQUE - render all pixels
regardless of pen, mapping the pen via the
'paldata' array
-------------------------------------------------*/
@@ -122,8 +122,8 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_REMAP_TRANSPEN - render all pixels
- except those matching 'transpen', mapping the
+ PIXEL_OP_REMAP_TRANSPEN - render all pixels
+ except those matching 'transpen', mapping the
pen via the 'paldata' array
-------------------------------------------------*/
@@ -151,7 +151,7 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_REBASE_TRANSPEN - render all pixels
+ PIXEL_OP_REBASE_TRANSPEN - render all pixels
except those matching 'transpen', adding
'color' to the pen value
-------------------------------------------------*/
@@ -180,8 +180,8 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_REMAP_TRANSMASK - render all pixels
- except those matching 'transmask', mapping the
+ PIXEL_OP_REMAP_TRANSMASK - render all pixels
+ except those matching 'transmask', mapping the
pen via the 'paldata' array
-------------------------------------------------*/
@@ -212,8 +212,8 @@ while (0) \
PIXEL_OP_REMAP_TRANSTABLE - look up each pen in
'pentable'; if the entry is DRAWMODE_NONE,
don't draw it; if the entry is DRAWMODE_SOURCE,
- look up the pen via the 'paldata' array; if the
- entry is DRAWMODE_SHADOW, generate a shadow of
+ look up the pen via the 'paldata' array; if the
+ entry is DRAWMODE_SHADOW, generate a shadow of
the destination pixel using 'shadowtable'
-------------------------------------------------*/
@@ -299,10 +299,10 @@ while (0) \
/*-------------------------------------------------
- PIXEL_OP_REMAP_TRANSPEN_ALPHA - render all
- pixels except those matching 'transpen',
- mapping the pen to via the 'paldata' array;
- the resulting color is RGB alpha blended
+ PIXEL_OP_REMAP_TRANSPEN_ALPHA - render all
+ pixels except those matching 'transpen',
+ mapping the pen to via the 'paldata' array;
+ the resulting color is RGB alpha blended
against the destination using 'alpha'
-------------------------------------------------*/
@@ -357,18 +357,18 @@ while (0) \
***************************************************************************/
/*
- Assumed input parameters or local variables:
-
- bitmap_t *dest - the bitmap to render to
- const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
- const gfx_element *gfx - pointer to the gfx_element to render
- UINT32 code - index of the entry within gfx_element
- UINT32 color - index of the color within gfx_element
- int flipx - non-zero means render right-to-left instead of left-to-right
- int flipy - non-zero means render bottom-to-top instead of top-to-bottom
- INT32 destx - the top-left X coordinate to render to
- INT32 desty - the top-left Y coordinate to render to
- bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
+ Assumed input parameters or local variables:
+
+ bitmap_t *dest - the bitmap to render to
+ const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
+ const gfx_element *gfx - pointer to the gfx_element to render
+ UINT32 code - index of the entry within gfx_element
+ UINT32 color - index of the color within gfx_element
+ int flipx - non-zero means render right-to-left instead of left-to-right
+ int flipy - non-zero means render bottom-to-top instead of top-to-bottom
+ INT32 destx - the top-left X coordinate to render to
+ INT32 desty - the top-left Y coordinate to render to
+ bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
@@ -627,20 +627,20 @@ do { \
***************************************************************************/
/*
- Assumed input parameters or local variables:
-
- bitmap_t *dest - the bitmap to render to
- const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
- const gfx_element *gfx - pointer to the gfx_element to render
- UINT32 code - index of the entry within gfx_element
- UINT32 color - index of the color within gfx_element
- int flipx - non-zero means render right-to-left instead of left-to-right
- int flipy - non-zero means render bottom-to-top instead of top-to-bottom
- INT32 destx - the top-left X coordinate to render to
- INT32 desty - the top-left Y coordinate to render to
- UINT32 scalex - the 16.16 scale factor in the X dimension
- UINT32 scaley - the 16.16 scale factor in the Y dimension
- bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
+ Assumed input parameters or local variables:
+
+ bitmap_t *dest - the bitmap to render to
+ const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
+ const gfx_element *gfx - pointer to the gfx_element to render
+ UINT32 code - index of the entry within gfx_element
+ UINT32 color - index of the color within gfx_element
+ int flipx - non-zero means render right-to-left instead of left-to-right
+ int flipy - non-zero means render bottom-to-top instead of top-to-bottom
+ INT32 destx - the top-left X coordinate to render to
+ INT32 desty - the top-left Y coordinate to render to
+ UINT32 scalex - the 16.16 scale factor in the X dimension
+ UINT32 scaley - the 16.16 scale factor in the Y dimension
+ bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
@@ -808,16 +808,16 @@ do { \
***************************************************************************/
/*
- Assumed input parameters or local variables:
-
- bitmap_t *dest - the bitmap to copy to
- bitmap_t *src - the bitmap to copy from (must be same bpp as dest)
- const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
- int flipx - non-zero means render right-to-left instead of left-to-right
- int flipy - non-zero means render bottom-to-top instead of top-to-bottom
- INT32 destx - the top-left X coordinate to copy to
- INT32 desty - the top-left Y coordinate to copy to
- bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
+ Assumed input parameters or local variables:
+
+ bitmap_t *dest - the bitmap to copy to
+ bitmap_t *src - the bitmap to copy from (must be same bpp as dest)
+ const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
+ int flipx - non-zero means render right-to-left instead of left-to-right
+ int flipy - non-zero means render bottom-to-top instead of top-to-bottom
+ INT32 destx - the top-left X coordinate to copy to
+ INT32 desty - the top-left Y coordinate to copy to
+ bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
#define COPYBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
@@ -986,19 +986,19 @@ do { \
***************************************************************************/
/*
- Assumed input parameters or local variables:
-
- bitmap_t *dest - the bitmap to copy to
- bitmap_t *src - the bitmap to copy from (must be same bpp as dest)
- const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
- INT32 destx - the 16.16 source X position at destination pixel (0,0)
- INT32 desty - the 16.16 source Y position at destination pixel (0,0)
- INT32 incxx - the 16.16 amount to increment in source X for each destination X pixel
- INT32 incyx - the 16.16 amount to increment in source Y for each destination X pixel
- INT32 incxy - the 16.16 amount to increment in source X for each destination Y pixel
- INT32 incyy - the 16.16 amount to increment in source Y for each destination Y pixel
- int wraparound - non-zero means wrap when hitting the edges of the source
- bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
+ Assumed input parameters or local variables:
+
+ bitmap_t *dest - the bitmap to copy to
+ bitmap_t *src - the bitmap to copy from (must be same bpp as dest)
+ const rectangle *cliprect - a clipping rectangle (assumed to be clipped to the size of 'dest')
+ INT32 destx - the 16.16 source X position at destination pixel (0,0)
+ INT32 desty - the 16.16 source Y position at destination pixel (0,0)
+ INT32 incxx - the 16.16 amount to increment in source X for each destination X pixel
+ INT32 incyx - the 16.16 amount to increment in source Y for each destination X pixel
+ INT32 incxy - the 16.16 amount to increment in source X for each destination Y pixel
+ INT32 incyy - the 16.16 amount to increment in source Y for each destination Y pixel
+ int wraparound - non-zero means wrap when hitting the edges of the source
+ bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
#define COPYROZBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
@@ -1291,14 +1291,14 @@ do { \
***************************************************************************/
/*
- Assumed input parameters or local variables:
-
- bitmap_t *bitmap - the bitmap to copy to
- INT32 destx - the X coordinate to copy to
- INT32 desty - the Y coordinate to copy to
- INT32 length - the total number of pixels to copy
- const UINTx *srcptr - pointer to memory containing the source pixels
- bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
+ Assumed input parameters or local variables:
+
+ bitmap_t *bitmap - the bitmap to copy to
+ INT32 destx - the X coordinate to copy to
+ INT32 desty - the Y coordinate to copy to
+ INT32 length - the total number of pixels to copy
+ const UINTx *srcptr - pointer to memory containing the source pixels
+ bitmap_t *priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
#define DRAWSCANLINE_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
@@ -1347,13 +1347,13 @@ do { \
***************************************************************************/
/*
- Assumed input parameters:
-
- bitmap_t *bitmap - the bitmap to extract from
- INT32 srcx - the X coordinate to begin extraction
- INT32 srcy - the Y coordinate to begin extraction
- INT32 length - the total number of pixels to extract
- UINTx *destptr - pointer to memory to receive the extracted pixels
+ Assumed input parameters:
+
+ bitmap_t *bitmap - the bitmap to extract from
+ INT32 srcx - the X coordinate to begin extraction
+ INT32 srcy - the Y coordinate to begin extraction
+ INT32 length - the total number of pixels to extract
+ UINTx *destptr - pointer to memory to receive the extracted pixels
*/
#define EXTRACTSCANLINE_CORE(PIXEL_TYPE) \
diff --git a/src/emu/machine/6821new.c b/src/emu/machine/6821new.c
index 4273e83230d..6786bb2eedf 100644
--- a/src/emu/machine/6821new.c
+++ b/src/emu/machine/6821new.c
@@ -1067,8 +1067,8 @@ int pianew_get_output_ca2(const device_config *device)
/*-------------------------------------------------
pianew_get_output_ca2_z - version of
- pianew_get_output_ca2, which takes account of internal
- pullup resistor
+ pianew_get_output_ca2, which takes account of internal
+ pullup resistor
-------------------------------------------------*/
int pianew_get_output_ca2_z(const device_config *device)
diff --git a/src/emu/memory.c b/src/emu/memory.c
index a38ce7689a3..1828ebb0b8f 100644
--- a/src/emu/memory.c
+++ b/src/emu/memory.c
@@ -807,7 +807,7 @@ void address_map_free(address_map *map)
astring_free(entry->region_string);
free(entry);
}
-
+
/* free the map */
free(map);
}
@@ -899,10 +899,10 @@ int memory_set_direct_region(const address_space *space, offs_t byteaddress)
if (byteaddress == ~0)
return TRUE;
}
-
+
/* remove the masked bits (we'll put them back later) */
maskedbits = byteaddress & ~spacerw->bytemask;
-
+
/* find or allocate a matching range */
range = direct_range_find(spacerw, byteaddress, &entry);
@@ -2977,7 +2977,7 @@ static direct_range *direct_range_find(address_space *space, offs_t byteaddress,
if (*entry >= SUBTABLE_BASE)
*entry = space->readlookup[LEVEL2_INDEX(*entry, byteaddress)];
rangelistptr = &space->direct.rangelist[*entry];
-
+
/* scan our table */
for (rangeptr = rangelistptr; *rangeptr != NULL; rangeptr = &(*rangeptr)->next)
if (byteaddress >= (*rangeptr)->bytestart && byteaddress <= (*rangeptr)->byteend)
@@ -2992,23 +2992,23 @@ static direct_range *direct_range_find(address_space *space, offs_t byteaddress,
}
return range;
}
-
+
/* didn't find out; allocate a new one */
range = space->direct.freerangelist;
if (range != NULL)
space->direct.freerangelist = range->next;
else
range = malloc_or_die(sizeof(*range));
-
+
/* fill in the range */
table_derive_range(&space->read, byteaddress, &range->bytestart, &range->byteend);
range->next = *rangelistptr;
*rangelistptr = range;
-
+
return range;
}
-
+
/*-------------------------------------------------
direct_range_remove_intersecting - remove
all cached ranges that intersect the given
@@ -3018,12 +3018,12 @@ static direct_range *direct_range_find(address_space *space, offs_t byteaddress,
static void direct_range_remove_intersecting(address_space *space, offs_t bytestart, offs_t byteend)
{
int entry;
-
+
/* loop over all entries */
for (entry = 0; entry < ARRAY_LENGTH(space->read.handlers); entry++)
{
direct_range **rangeptr, **nextrangeptr;
-
+
/* loop over all ranges in this entry's list */
for (nextrangeptr = rangeptr = &space->direct.rangelist[entry]; *rangeptr != NULL; rangeptr = nextrangeptr)
{
@@ -3035,7 +3035,7 @@ static void direct_range_remove_intersecting(address_space *space, offs_t bytest
range->next = space->direct.freerangelist;
space->direct.freerangelist = range;
}
-
+
/* otherwise advance to the next in the list */
else
nextrangeptr = &(*rangeptr)->next;
@@ -3419,7 +3419,7 @@ static void dump_map(FILE *file, const address_space *space, const address_table
fprintf(file, " L2 bits = %d\n", LEVEL2_BITS);
fprintf(file, " Address mask = %X\n", space->bytemask);
fprintf(file, "\n");
-
+
/* iterate over addresses */
for (byteaddress = 0; byteaddress <= space->bytemask; byteaddress = byteend + 1)
{
diff --git a/src/emu/sound/digitalk.c b/src/emu/sound/digitalk.c
index e02830482a4..ff44afe290c 100644
--- a/src/emu/sound/digitalk.c
+++ b/src/emu/sound/digitalk.c
@@ -259,7 +259,7 @@ typedef struct {
// Waveform and current index in it
UINT8 dac_index; // 128 for done
INT16 dac[128];
-
+
} digitalker;
// Quantized intensity values, first index is the volume, second the
@@ -344,7 +344,7 @@ static void digitalker_step_mode_0(digitalker *dg)
for(i=0; i<32; i++)
dg->dac[wpos++] = 0;
-
+
for(k=1; k != 9; k++) {
bits |= dg->rom[dg->apos+k] << 8;
for(l=0; l<4; l++) {
@@ -355,7 +355,7 @@ static void digitalker_step_mode_0(digitalker *dg)
}
digitalker_write(dg, &wpos, vol, dac);
-
+
for(k=7; k >= 0; k--) {
bits = (bits << 8) | (k ? dg->rom[dg->apos+k] : 0x80);
for(l=3; l>=0; l--) {
@@ -405,7 +405,7 @@ static void digitalker_step_mode_2(digitalker *dg)
}
digitalker_write(dg, &wpos, vol, dac);
-
+
for(k=7; k >= 0; k--) {
bits = (bits << 8) | (k ? dg->rom[dg->apos+k] : 0x80);
for(l=3; l>=0; l--) {
@@ -426,7 +426,7 @@ static void digitalker_step_mode_2(digitalker *dg)
}
digitalker_write(dg, &wpos, vol, dac);
-
+
for(k=7; k >= 0; k--) {
bits = (bits << 8) | (k ? dg->rom[dg->apos+k] : 0x80);
for(l=3; l>=0; l--) {
@@ -524,7 +524,7 @@ static void digitalker_step(digitalker *dg)
case 1: digitalker_step_mode_1(dg); break;
case 2: digitalker_step_mode_2(dg); break;
case 3: digitalker_step_mode_3(dg); break;
- }
+ }
if(!dg->zero_count)
dg->dac_index = 0;
}
diff --git a/src/emu/sound/k053260.c b/src/emu/sound/k053260.c
index ed29895ad13..f082b5c6bac 100644
--- a/src/emu/sound/k053260.c
+++ b/src/emu/sound/k053260.c
@@ -395,7 +395,7 @@ static UINT8 k053260_read( const address_space *space, offs_t offset, int chip
break;
case 0x2e: /* read rom */
- if ( ic->mode & 1 )
+ if ( ic->mode & 1 )
{
UINT32 offs = ic->channels[0].start + ( ic->channels[0].pos >> BASE_SHIFT ) + ( ic->channels[0].bank << 16 );
diff --git a/src/emu/tilemap.c b/src/emu/tilemap.c
index 1762ca9f3d0..d3a78256f01 100644
--- a/src/emu/tilemap.c
+++ b/src/emu/tilemap.c
@@ -255,7 +255,7 @@ INLINE tilemap *indexed_tilemap(int index)
/*-------------------------------------------------
- gfx_tiles_changed - return TRUE if any
+ gfx_tiles_changed - return TRUE if any
gfx_elements used by this tilemap have
changed
-------------------------------------------------*/
@@ -1220,11 +1220,11 @@ static void pixmap_update(tilemap *tmap, const rectangle *cliprect)
{
int mincol, maxcol, minrow, maxrow;
int row, col;
-
+
/* if the graphics changed, we need to mark everything dirty */
if (gfx_elements_changed(tmap))
tilemap_mark_all_tiles_dirty(tmap);
-
+
/* if everything is clean, do nothing */
if (tmap->all_tiles_clean)
return;
diff --git a/src/emu/video.c b/src/emu/video.c
index bdb7aee3fbe..64ae41af1d7 100644
--- a/src/emu/video.c
+++ b/src/emu/video.c
@@ -2735,8 +2735,8 @@ int video_get_view_for_target(running_machine *machine, render_target *target, c
***************************************************************************/
/*-------------------------------------------------
- video_assert_out_of_range_pixels - assert if
- any pixels in the given bitmap contain an
+ video_assert_out_of_range_pixels - assert if
+ any pixels in the given bitmap contain an
invalid palette index
-------------------------------------------------*/
@@ -2745,11 +2745,11 @@ void video_assert_out_of_range_pixels(running_machine *machine, bitmap_t *bitmap
#ifdef MAME_DEBUG
int maxindex = palette_get_max_index(machine->palette);
int x, y;
-
+
/* this only applies to indexed16 bitmaps */
if (bitmap->format != BITMAP_FORMAT_INDEXED16)
return;
-
+
/* iterate over rows */
for (y = 0; y < bitmap->height; y++)
{
diff --git a/src/lib/util/palette.c b/src/lib/util/palette.c
index e659f152830..e553157d614 100644
--- a/src/lib/util/palette.c
+++ b/src/lib/util/palette.c
@@ -230,8 +230,8 @@ int palette_get_num_groups(palette_t *palette)
/*-------------------------------------------------
- palette_get_max_index - return the maximum
- allowed index (i.e., length of arrays returned
+ palette_get_max_index - return the maximum
+ allowed index (i.e., length of arrays returned
by palette_entry_list*)
-------------------------------------------------*/
diff --git a/src/mame/drivers/3super8.c b/src/mame/drivers/3super8.c
index 055fc421cf2..380abd82ea5 100644
--- a/src/mame/drivers/3super8.c
+++ b/src/mame/drivers/3super8.c
@@ -5,7 +5,7 @@
this dump is bad
-Produttore ?Italy?
+Produttore ?Italy?
N.revisione
CPU
diff --git a/src/mame/drivers/86lions.c b/src/mame/drivers/86lions.c
index d8a06f5f717..c6cb7a0e19e 100644
--- a/src/mame/drivers/86lions.c
+++ b/src/mame/drivers/86lions.c
@@ -14,9 +14,9 @@ NOTES:
- Seems to be 1 DSW bank tied to VIA, and another to ay8910.
TODO:
- - Understand inputs / via mapping properly;
- - Finish the mc6845 conversion;
- - Colors? This shoudn't use a color prom.
+ - Understand inputs / via mapping properly;
+ - Finish the mc6845 conversion;
+ - Colors? This shoudn't use a color prom.
*******************************************************************************************/
@@ -136,57 +136,57 @@ static INPUT_PORTS_START( lions )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-7") PORT_CODE(KEYCODE_M)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1-8") PORT_CODE(KEYCODE_L)
-// PORT_START("DSW1")
-// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-
-// PORT_START("DSW2")
-// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
-// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
-// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_START("DSW1")
+// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+// PORT_START("DSW2")
+// PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+// PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+// PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+// PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -223,39 +223,39 @@ static const ay8910_interface ay8910_config =
//static READ8_DEVICE_HANDLER( input_a )
//{
//return input_port_read(machine, "IN0");
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
//return 0xff;
//}
//static READ8_DEVICE_HANDLER( input_b )
//{
//return input_port_read(machine, "IN1");
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
//return 0xff;
//}
static READ8_DEVICE_HANDLER( input_ca1 )
{
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
return 0x00;
}
static READ8_DEVICE_HANDLER( input_cb1 )
{
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
return 0x00;
}
static READ8_DEVICE_HANDLER( input_ca2 )
{
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
return 0x00;
}
static READ8_DEVICE_HANDLER( input_cb2 )
{
-// return mame_rand(device->machine);
+// return mame_rand(device->machine);
return 0x00;
}
@@ -314,7 +314,7 @@ static INTERRUPT_GEN( lions_irq )
static const mc6845_interface mc6845_intf =
{
/* in fact is a mc6845 driving 4 pixels by memory address.
- that's why the big horizontal parameters */
+ that's why the big horizontal parameters */
"main", /* screen we are acting on */
4, /* number of pixels per video memory address */
@@ -372,8 +372,8 @@ ROM_START( 86lions )
ROM_LOAD( "gn1.u11", 0x01000, 0x1000, CRC(80dce6f4) SHA1(bf953eba9cb270297b0d0efffe15b926e94dfbe7) )
ROM_LOAD( "bl1.u9", 0x02000, 0x1000, CRC(675e164a) SHA1(99346ca70bfe673b31d71dc6b3bbc3b8f961e87f) )
-// ROM_REGION( 0x20, "proms", 0 )
-// ROM_LOAD( "prom.x", 0x00, 0x20, NO_DUMP )
+// ROM_REGION( 0x20, "proms", 0 )
+// ROM_LOAD( "prom.x", 0x00, 0x20, NO_DUMP )
ROM_END
diff --git a/src/mame/drivers/adp.c b/src/mame/drivers/adp.c
index 5f317d8e3a1..d5ea5cd7d0c 100644
--- a/src/mame/drivers/adp.c
+++ b/src/mame/drivers/adp.c
@@ -350,7 +350,7 @@ return 0x4;
if (input_code_pressed(KEYCODE_8)) return 0x0080 ^ 0xffff;
return 0x0004 ^ 0xffff; // 0x0004
-
+
// FIXME: this code is never executed
switch (mame_rand(space->machine) & 3)
{
diff --git a/src/mame/drivers/buster.c b/src/mame/drivers/buster.c
index 96b26f51895..0bcce5146b5 100644
--- a/src/mame/drivers/buster.c
+++ b/src/mame/drivers/buster.c
@@ -44,8 +44,8 @@ static ADDRESS_MAP_START( mainmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_BASE(&buster_rom)
AM_RANGE(0x4000, 0x47ff) AM_RAM
AM_RANGE(0x5000, 0x5fff) AM_RAM AM_BASE(&buster_vram)
-// AM_RANGE(0x6000, 0x6000) MC6845 address
-// AM_RANGE(0x6001, 0x6001) MC6845 data
+// AM_RANGE(0x6000, 0x6000) MC6845 address
+// AM_RANGE(0x6001, 0x6001) MC6845 data
AM_RANGE(0x7000, 0xafff) AM_ROM
ADDRESS_MAP_END
@@ -92,7 +92,7 @@ static MACHINE_DRIVER_START( buster )
MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD("ay", AY8910, 1500000/2)
-// MDRV_SOUND_CONFIG(ay8910_config)
+// MDRV_SOUND_CONFIG(ay8910_config)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_DRIVER_END
diff --git a/src/mame/drivers/cvs.c b/src/mame/drivers/cvs.c
index d9a85903a6e..9e4f854b596 100644
--- a/src/mame/drivers/cvs.c
+++ b/src/mame/drivers/cvs.c
@@ -512,7 +512,7 @@ MACHINE_START( cvs )
if (machine->gfx[1] != NULL)
gfx_element_set_source(machine->gfx[1], cvs_character_ram);
-
+
start_393hz_timer(machine);
/* register state save */
diff --git a/src/mame/drivers/esripsys.c b/src/mame/drivers/esripsys.c
index 8f5f2b5e65e..d323a1957a3 100644
--- a/src/mame/drivers/esripsys.c
+++ b/src/mame/drivers/esripsys.c
@@ -280,7 +280,7 @@ static UINT8 rip_status_in(running_machine *machine)
{
int vpos = video_screen_get_vpos(machine->primary_screen);
UINT8 _vblank = !(vpos >= ESRIPSYS_VBLANK_START);
-// UINT8 _hblank = !video_screen_get_hblank(machine->primary_screen);
+// UINT8 _hblank = !video_screen_get_hblank(machine->primary_screen);
return _vblank
| (esripsys_hblank << 1)
@@ -597,9 +597,9 @@ static WRITE8_HANDLER( dac_w )
UINT16 dac_data = (dac_msb << 8) | data;
/*
- The 8-bit DAC modulates the 10-bit DAC.
- Shift down to prevent clipping.
- */
+ The 8-bit DAC modulates the 10-bit DAC.
+ Shift down to prevent clipping.
+ */
dac_signed_data_16_w(0, (dac_vol * dac_data) >> 1);
}
}
diff --git a/src/mame/drivers/fastfred.c b/src/mame/drivers/fastfred.c
index 22fdcda13ef..81a882d1d59 100644
--- a/src/mame/drivers/fastfred.c
+++ b/src/mame/drivers/fastfred.c
@@ -670,7 +670,7 @@ static MACHINE_DRIVER_START( imago )
MDRV_IMPORT_FROM(fastfred)
MDRV_CPU_MODIFY("main")
MDRV_CPU_PROGRAM_MAP(imago_map,0)
-
+
MDRV_MACHINE_START(imago)
/* video hardware */
diff --git a/src/mame/drivers/goldstar.c b/src/mame/drivers/goldstar.c
index 5dc3ca8e12e..d2104333d5e 100644
--- a/src/mame/drivers/goldstar.c
+++ b/src/mame/drivers/goldstar.c
@@ -367,7 +367,7 @@ ADDRESS_MAP_END
.x.. ....
x... ....
*/
-// popmessage("Output: %02X", data);
+// popmessage("Output: %02X", data);
//}
static ADDRESS_MAP_START( ladylinr_map, ADDRESS_SPACE_PROGRAM, 8 )
@@ -2548,8 +2548,8 @@ static INPUT_PORTS_START( ladylinr )
/* there are 2 extra DSW banks...
both are tied to a daughterboard, maybe hooked to a device.
- they are not related to the original hardware, and are not
- listed in the Input Test Mode.
+ they are not related to the original hardware, and are not
+ listed in the Input Test Mode.
*/
INPUT_PORTS_END
@@ -4274,13 +4274,13 @@ ROM_END
1x 22x2 edge connector.
Both connectors are wired to a strange small PCB with:
- 1x 6x2 edge connector + 1x 60x2 edge connector (with smaller spacing) + 2x 8 DIP Switches.
+ 1x 6x2 edge connector + 1x 60x2 edge connector (with smaller spacing) + 2x 8 DIP Switches.
Silkscreened on PCB:
"TAB AUSTRIA"
Sticker on PCB:
- "TAB Austria" & "LL 2690"
+ "TAB Austria" & "LL 2690"
*/
@@ -4357,10 +4357,10 @@ ROM_START( kkojnoli )
ROM_LOAD( "9006.u23", 0x0100, 0x0100, CRC(526cf9d3) SHA1(eb779d70f2507d0f26d225ac8f5de8f2243599ca) )
/* this one seems bitrotten (bits 3 and 7), except for this issue,
- the prom have concordance with prom1 from lucky8 */
+ the prom have concordance with prom1 from lucky8 */
ROM_REGION( 0x40, "proms2", 0 )
ROM_LOAD( "prom1", 0x0000, 0x0020, CRC(c6b41352) SHA1(d7c3b5aa32e4e456c9432a13bede1db6d62eb270) )
-// ROM_LOAD( "9006.u57", 0x0000, 0x0020, CRC(8a37416a) SHA1(696b46db2ff2bb9ef471ff925977e8a186b17de8) )
+// ROM_LOAD( "9006.u57", 0x0000, 0x0020, CRC(8a37416a) SHA1(696b46db2ff2bb9ef471ff925977e8a186b17de8) )
ROM_REGION( 0x100, "unkprom", 0 )
ROM_LOAD( "9006.u41", 0x0000, 0x0100, CRC(1d668d4a) SHA1(459117f78323ea264d3a29f1da2889bbabe9e4be) )
@@ -4583,9 +4583,9 @@ static DRIVER_INIT( chry10 )
do_blockswaps(ROM);
/* The game has a PIC for protection.
- If the code enter to this sub, just
- keeps looping eternally...
- */
+ If the code enter to this sub, just
+ keeps looping eternally...
+ */
ROM[0xA5DC] = 0xc9;
dump_to_file(machine, ROM);
diff --git a/src/mame/drivers/highvdeo.c b/src/mame/drivers/highvdeo.c
index cf579c36294..ad50970e45c 100644
--- a/src/mame/drivers/highvdeo.c
+++ b/src/mame/drivers/highvdeo.c
@@ -7,29 +7,29 @@ driver by Mirko Buffoni
Memory layout:
-000000-0003FF Interrupt table
-000400-003FFF NVRAM and main ram
-040000-04FFFF VGA 320x200 address space
-080000-0BFFFF Banked ROM
-0C0000-0FFFFF Program ROM
+000000-0003FF Interrupt table
+000400-003FFF NVRAM and main ram
+040000-04FFFF VGA 320x200 address space
+080000-0BFFFF Banked ROM
+0C0000-0FFFFF Program ROM
Port layout:
-0x0008 R Input port -> Keyboard
-0x000A R Input port -> Coin and Service
-0x000C R Input port -> Reset
+0x0008 R Input port -> Keyboard
+0x000A R Input port -> Coin and Service
+0x000C R Input port -> Reset
-0x0030 R Read continuously... maybe watchdog?
+0x0030 R Read continuously... maybe watchdog?
-0x0000 W Keyboard Lights control port
-0x0002 W \ Hopper or ticket related
-0x0004 W /
-0x0006 W OKI6395 ADPCM command: need to be latched
-0x0010 W Like 0x3c8 in VGA
-0x0014 W Like 0x3c9 in VGA
+0x0000 W Keyboard Lights control port
+0x0002 W \ Hopper or ticket related
+0x0004 W /
+0x0006 W OKI6395 ADPCM command: need to be latched
+0x0010 W Like 0x3c8 in VGA
+0x0014 W Like 0x3c9 in VGA
-0x0030 W Bankswitch select
+0x0030 W Bankswitch select
----
@@ -39,30 +39,30 @@ INT 2 (NMI) called every Vblank
Interesting locations. 255 = YES
-3E23-24 Valore Moneta (5) (1,5,10)
-3E25-26 Valore Gettone (5) (1-20)
-3E27-28 Valore Servizio (10) (5-500)
-3E29-2A Banconote 1 (5) (5-500)
-
-3E33 Replay (255) (0,255)
-3E34 Double (0) (0,255)
-3E35 BloccaBanconote (255) (0,255)
-3E36 Accumulo (0) (0,255)
-3E37 Vincita 10 (255) (0,255)
-3E38 Numeroni (255) (0,255)
-3E39 Palline (255) (0,255)
-3E3B Lattine (255) (0,255)
-3E3D Premio (10) (X,10)
-3E3E Bet Max Credit (20) (1-50)
-3E3F Bet Max Points (20) (1-50)
-
-3E40-41 Blocco Getton. (100) (10-1000)
-3E42 Cambio Carte (0) (Veloce=0, Normale=1, Lento=2)
-3E45-46 Valore ticket (100) (1-500)
-3E4B Bet Min Gioco (1) (1-10)
-3E4C Bet Min Fever (1) (1-10)
-
-3E59 Tickets (10) (Tutti=0, 10=F, 1=FF)
+3E23-24 Valore Moneta (5) (1,5,10)
+3E25-26 Valore Gettone (5) (1-20)
+3E27-28 Valore Servizio (10) (5-500)
+3E29-2A Banconote 1 (5) (5-500)
+
+3E33 Replay (255) (0,255)
+3E34 Double (0) (0,255)
+3E35 BloccaBanconote (255) (0,255)
+3E36 Accumulo (0) (0,255)
+3E37 Vincita 10 (255) (0,255)
+3E38 Numeroni (255) (0,255)
+3E39 Palline (255) (0,255)
+3E3B Lattine (255) (0,255)
+3E3D Premio (10) (X,10)
+3E3E Bet Max Credit (20) (1-50)
+3E3F Bet Max Points (20) (1-50)
+
+3E40-41 Blocco Getton. (100) (10-1000)
+3E42 Cambio Carte (0) (Veloce=0, Normale=1, Lento=2)
+3E45-46 Valore ticket (100) (1-500)
+3E4B Bet Min Gioco (1) (1-10)
+3E4C Bet Min Fever (1) (1-10)
+
+3E59 Tickets (10) (Tutti=0, 10=F, 1=FF)
----
diff --git a/src/mame/drivers/igs017.c b/src/mame/drivers/igs017.c
index e793475cbde..95415e60fe2 100644
--- a/src/mame/drivers/igs017.c
+++ b/src/mame/drivers/igs017.c
@@ -173,7 +173,7 @@ static void draw_sprite(running_machine *machine, bitmap_t *bitmap,const rectang
{
// prepare GfxElement on the fly
gfx_element gfx;
-
+
// Bounds checking
if ( addr + dimx * dimy >= sprites_gfx_size )
return;
diff --git a/src/mame/drivers/igs_ncs.c b/src/mame/drivers/igs_ncs.c
index 46604b58da1..8ce6e2a9b2d 100644
--- a/src/mame/drivers/igs_ncs.c
+++ b/src/mame/drivers/igs_ncs.c
@@ -141,7 +141,7 @@ static MACHINE_DRIVER_START( igs_ncs )
MDRV_CPU_PROGRAM_MAP(igs_ncs_map,0)
MDRV_CPU_IO_MAP(igs_ncs_portmap,0)
MDRV_CPU_VBLANK_INT_HACK(igs_ncs_interrupt,2)
-// MDRV_CPU_VBLANK_INT("main",igs_ncs_interrupt)
+// MDRV_CPU_VBLANK_INT("main",igs_ncs_interrupt)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
diff --git a/src/mame/drivers/jackpool.c b/src/mame/drivers/jackpool.c
index 124e4aa1461..6272613a55d 100644
--- a/src/mame/drivers/jackpool.c
+++ b/src/mame/drivers/jackpool.c
@@ -134,17 +134,17 @@ static READ16_HANDLER( jackpool_io_r )
case 0x18: return input_port_read(space->machine,"HOLD5");
case 0x1a: return input_port_read(space->machine,"START1");
case 0x1c: return input_port_read(space->machine,"BET");
-// case 0x2c: eeprom 1 r?
-// case 0x2e: eeprom 2 r?
+// case 0x2c: eeprom 1 r?
+// case 0x2e: eeprom 2 r?
}
-// printf("R %02x\n",offset*2);
+// printf("R %02x\n",offset*2);
return jackpool_io[offset];
}
static WRITE16_HANDLER( jackpool_io_w )
{
-// printf("W %02x %02x\n",offset*2,data);
+// printf("W %02x %02x\n",offset*2,data);
COMBINE_DATA(&jackpool_io[offset]);
#if 0
diff --git a/src/mame/drivers/megasys1.c b/src/mame/drivers/megasys1.c
index 7c882c36a70..94b0ecc9679 100644
--- a/src/mame/drivers/megasys1.c
+++ b/src/mame/drivers/megasys1.c
@@ -1191,7 +1191,7 @@ static INPUT_PORTS_START( plusalph )
PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x0040, DEF_STR( Cocktail ) )
-
+
PORT_DIPNAME( 0x8000, 0x8000, "Freeze Screen (Cheat)")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
@@ -1214,7 +1214,7 @@ static INPUT_PORTS_START( rodland )
PORT_DIPSETTING( 0x0060, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0020, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0040, DEF_STR( Hardest ) )
-
+
PORT_SERVICE( 0x8000, IP_ACTIVE_LOW )
INPUT_PORTS_END
diff --git a/src/mame/drivers/namcoic.c b/src/mame/drivers/namcoic.c
index 5cbc4162a27..e5bfbf4f6d7 100644
--- a/src/mame/drivers/namcoic.c
+++ b/src/mame/drivers/namcoic.c
@@ -1576,7 +1576,7 @@ void
namco_road_init(running_machine *machine, int gfxbank )
{
gfx_element *pGfx;
-
+
mbRoadNeedTransparent = 0;
mRoadGfxBank = gfxbank;
diff --git a/src/mame/drivers/pcxt.c b/src/mame/drivers/pcxt.c
index eb828963ffa..d01d130fddb 100644
--- a/src/mame/drivers/pcxt.c
+++ b/src/mame/drivers/pcxt.c
@@ -456,10 +456,10 @@ static WRITE8_DEVICE_HANDLER( port_b_w )
{
port_b_data = data;
// hc55516_digit_w(0, data);
-// popmessage("%02x\n",data);
-// beep_set_state(0, 0);
-// beep_set_state(0, 1);
-// beep_set_frequency(0, port_b_data);
+// popmessage("%02x\n",data);
+// beep_set_state(0, 0);
+// beep_set_state(0, 1);
+// beep_set_frequency(0, port_b_data);
}
static WRITE8_DEVICE_HANDLER( wss_1_w )
@@ -702,16 +702,16 @@ static ADDRESS_MAP_START( tetriskr_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0080, 0x0087) AM_READWRITE(dma_page_select_r,dma_page_select_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVREADWRITE(PIC8259, "pic8259_2", pic8259_r, pic8259_w )
AM_RANGE(0x0200, 0x020f) AM_RAM //game port
-// AM_RANGE(0x0201, 0x0201) AM_READ_PORT("IN1") //game port
+// AM_RANGE(0x0201, 0x0201) AM_READ_PORT("IN1") //game port
AM_RANGE(0x0278, 0x027f) AM_RAM //printer (parallel) port latch
AM_RANGE(0x02f8, 0x02ff) AM_RAM //Modem port
-// AM_RANGE(0x0310, 0x0311) AM_READWRITE(disk_iobank_r,disk_iobank_w) //Prototyping card
-// AM_RANGE(0x0312, 0x0312) AM_READ_PORT("IN0") //Prototyping card,read only
+// AM_RANGE(0x0310, 0x0311) AM_READWRITE(disk_iobank_r,disk_iobank_w) //Prototyping card
+// AM_RANGE(0x0312, 0x0312) AM_READ_PORT("IN0") //Prototyping card,read only
AM_RANGE(0x0378, 0x037f) AM_RAM //printer (parallel) port
AM_RANGE(0x03c0, 0x03c0) AM_RAM AM_BASE(&vga_bg_bank)
AM_RANGE(0x03c8, 0x03c8) AM_READ_PORT("IN0")
AM_RANGE(0x03c9, 0x03c9) AM_READ_PORT("IN1")
-// AM_RANGE(0x03ce, 0x03ce) AM_READ_PORT("IN1")
+// AM_RANGE(0x03ce, 0x03ce) AM_READ_PORT("IN1")
AM_RANGE(0x03bc, 0x03bf) AM_RAM //printer port
AM_RANGE(0x03b4, 0x03b5) AM_READWRITE(vga_regs_r,vga_regs_w) //various VGA/CGA/EGA regs
AM_RANGE(0x03d4, 0x03d5) AM_READWRITE(vga_regs_r,vga_regs_w) //mirror of above
diff --git a/src/mame/drivers/sengokmj.c b/src/mame/drivers/sengokmj.c
index 8c5783ed725..ed63ead7e11 100644
--- a/src/mame/drivers/sengokmj.c
+++ b/src/mame/drivers/sengokmj.c
@@ -121,18 +121,18 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sengokmj_io_map, ADDRESS_SPACE_IO, 16 )
AM_RANGE(0x4000, 0x400f) AM_READWRITE(seibu_main_word_r, seibu_main_word_w)
/*Areas from 8000-804f are for the custom Seibu CRTC.*/
-// AM_RANGE(0x8000, 0x800f) AM_WRITE(seibu_main_word_w)
-// AM_RANGE(0x8010, 0x801b) AM_WRITENOP
+// AM_RANGE(0x8000, 0x800f) AM_WRITE(seibu_main_word_w)
+// AM_RANGE(0x8010, 0x801b) AM_WRITENOP
AM_RANGE(0x801c, 0x801d) AM_WRITE(sengokmj_layer_enable_w)
-// AM_RANGE(0x801e, 0x801f) AM_WRITENOP
-// AM_RANGE(0x8020, 0x802f) AM_WRITENOP
+// AM_RANGE(0x801e, 0x801f) AM_WRITENOP
+// AM_RANGE(0x8020, 0x802f) AM_WRITENOP
AM_RANGE(0x8022, 0x8023) AM_WRITE(sengokmj_bg_scrolly_w)
-// AM_RANGE(0x8030, 0x803f) AM_WRITENOP
-// AM_RANGE(0x8040, 0x804f) AM_WRITENOP
+// AM_RANGE(0x8030, 0x803f) AM_WRITENOP
+// AM_RANGE(0x8040, 0x804f) AM_WRITENOP
AM_RANGE(0x8080, 0x8081) AM_WRITE(seibu_z80_com_6_mirror_w)
-// AM_RANGE(0x80c0, 0x80c1) AM_WRITE(seibu_z80_com_unk_mirror_w)
-// AM_RANGE(0x8100, 0x8101) AM_WRITENOP // always 0
+// AM_RANGE(0x80c0, 0x80c1) AM_WRITE(seibu_z80_com_unk_mirror_w)
+// AM_RANGE(0x8100, 0x8101) AM_WRITENOP // always 0
AM_RANGE(0x8180, 0x8181) AM_WRITE(sengokmj_out_w)
AM_RANGE(0x8140, 0x8141) AM_WRITE(mahjong_panel_w)
AM_RANGE(0xc000, 0xc001) AM_READ_PORT("DSW1")
diff --git a/src/mame/drivers/sfbonus.c b/src/mame/drivers/sfbonus.c
index 55e2d3efcc3..caabf3d229a 100644
--- a/src/mame/drivers/sfbonus.c
+++ b/src/mame/drivers/sfbonus.c
@@ -62,11 +62,11 @@ static MACHINE_DRIVER_START( sfbonus )
MDRV_VIDEO_START(sfbonus)
MDRV_VIDEO_UPDATE(sfbonus)
-// MDRV_SPEAKER_STANDARD_STEREO("left", "right")
-// MDRV_SOUND_ADD("oki", OKIM6295, 1000000)
-// MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
-// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 0.47)
-// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.47)
+// MDRV_SPEAKER_STANDARD_STEREO("left", "right")
+// MDRV_SOUND_ADD("oki", OKIM6295, 1000000)
+// MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
+// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 0.47)
+// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.47)
MACHINE_DRIVER_END
ROM_START( sfbonus )
diff --git a/src/mame/drivers/sms.c b/src/mame/drivers/sms.c
index ff79dd7c462..31e8d4590fa 100644
--- a/src/mame/drivers/sms.c
+++ b/src/mame/drivers/sms.c
@@ -1,23 +1,23 @@
/*
- SMS Manufacturing Corp hardware
-
- Driver by Mariusz Wojcieszek
-
- Preliminary driver by Reip
- Schematics provided by Exodus
- Sure Shot board provided by ranger_lennier
- Notes by Lord Nightmare
-
- Notes/ToDo:
- - pit8254 is not accessed by z80 (and there is no interrupt service routine), so
- it is not fitted in the driver
- - video registers can be read (to read framebuffer contents), this is not emulated
- as software does not use this feature
- - I8088 clock may be incorrect
- - Video Blanking Zone input - probably hblank or vblank
- - game speed may be not 100% correct - software does not use interrupts and
- Video Blanking Zone is not emulated (which is required to get proper timings)
- - implement video raw parameters
+ SMS Manufacturing Corp hardware
+
+ Driver by Mariusz Wojcieszek
+
+ Preliminary driver by Reip
+ Schematics provided by Exodus
+ Sure Shot board provided by ranger_lennier
+ Notes by Lord Nightmare
+
+ Notes/ToDo:
+ - pit8254 is not accessed by z80 (and there is no interrupt service routine), so
+ it is not fitted in the driver
+ - video registers can be read (to read framebuffer contents), this is not emulated
+ as software does not use this feature
+ - I8088 clock may be incorrect
+ - Video Blanking Zone input - probably hblank or vblank
+ - game speed may be not 100% correct - software does not use interrupts and
+ Video Blanking Zone is not emulated (which is required to get proper timings)
+ - implement video raw parameters
*/
@@ -361,7 +361,7 @@ static READ8_DEVICE_HANDLER(ppi0_c_r)
probably a beam to check the hopper coin out
PC0 - "Video BZ" (Video Blanking Zone, is an input)
it's probably vblank or hblank, 0 is always returned, games wait for this bit
- to become 0 before accesing video
+ to become 0 before accesing video
*/
return 0;
}
@@ -728,10 +728,10 @@ ROM_START( trvhang )
ROM_END
/*
-Etched in copper on back COPYRIGHT SMS 1983
- mfg corp. S/N A-2043
- A-2043 was hand etched
-
+Etched in copper on back COPYRIGHT SMS 1983
+ mfg corp. S/N A-2043
+ A-2043 was hand etched
+
16MHz Crystal
24MHz Crystal
D780C
@@ -739,7 +739,7 @@ D8255AC-5
P8255A-5
P8088
AY-3-8910
-6116 x2
+6116 x2
P8254
Empty 40 pin socket at U2 and U50
@@ -748,43 +748,43 @@ Empty 28 pin socket at U18
-.u16 28128 stickered U-16
- TRIVIA -2
- 011586
+.u16 28128 stickered U-16
+ TRIVIA -2
+ 011586
-.u17 28128 stickered U-16
- TRIVIA -2
- 011586
+.u17 28128 stickered U-16
+ TRIVIA -2
+ 011586
-.u19 28128 stickered U-16
- TRIVIA DLXE
- 021281
+.u19 28128 stickered U-16
+ TRIVIA DLXE
+ 021281
-.u26 2732 stickered #26
- 073184
+.u26 2732 stickered #26
+ 073184
the pal's had colored dots on them
saved in JEDEC format
-.32 dmpal10l8nc red red blue
-.52 dmpal10l8nc red red white
-.38 dmpal10l8nc blue blue blue
-.39 dmpal10l8nc green green green
-.40 dmpal10l8nc pink
-.110 dmpal10l8nc pink pink
-.58 dmpal10h8nc brown brown brown
-.80 dmpal10h8nc blue blue
-.128 dmpal10h8nc blue brown blue
-.129 dmpal10h8nc pink green pink
-.130 dmpal10h8nc pink scratched off
-.94 dmpal14h4nc green green
-.109 dmpal14h4nc brown brown
-.140 dmpal14h4nc brown
-.141 dmpal14h4nc brown
-.142 dmpal14h4nc brown
-.143 dmpal14h4nc brown
-.144 dmpal14h4nc brown
-.145 dmpal14h4nc brown
+.32 dmpal10l8nc red red blue
+.52 dmpal10l8nc red red white
+.38 dmpal10l8nc blue blue blue
+.39 dmpal10l8nc green green green
+.40 dmpal10l8nc pink
+.110 dmpal10l8nc pink pink
+.58 dmpal10h8nc brown brown brown
+.80 dmpal10h8nc blue blue
+.128 dmpal10h8nc blue brown blue
+.129 dmpal10h8nc pink green pink
+.130 dmpal10h8nc pink scratched off
+.94 dmpal14h4nc green green
+.109 dmpal14h4nc brown brown
+.140 dmpal14h4nc brown
+.141 dmpal14h4nc brown
+.142 dmpal14h4nc brown
+.143 dmpal14h4nc brown
+.144 dmpal14h4nc brown
+.145 dmpal14h4nc brown
*/
ROM_START( trvhanga )
diff --git a/src/mame/drivers/st0016.c b/src/mame/drivers/st0016.c
index 94b819a27a3..6006d3d8c84 100644
--- a/src/mame/drivers/st0016.c
+++ b/src/mame/drivers/st0016.c
@@ -271,7 +271,7 @@ static INPUT_PORTS_START( renju )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
@@ -301,7 +301,7 @@ static INPUT_PORTS_START( koikois )
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Crt Mode" ) PORT_DIPLOCATION("SW1:2") // flip screen ?
+ PORT_DIPNAME( 0x02, 0x02, "Crt Mode" ) PORT_DIPLOCATION("SW1:2") // flip screen ?
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE( 0x04, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:3")
diff --git a/src/mame/drivers/vcombat.c b/src/mame/drivers/vcombat.c
index 797eaccc674..64e6ec57519 100644
--- a/src/mame/drivers/vcombat.c
+++ b/src/mame/drivers/vcombat.c
@@ -1,8 +1,8 @@
/*
Virtual Combat hardware games.
-
-Driver by Jason Eckhardt and Andrew Gardner.
-
+
+Driver by Jason Eckhardt and Andrew Gardner.
+
----
There are two known games on this hardware. Both are developed by
@@ -28,7 +28,7 @@ UPPER: (Virtual Combat has an identical MIDDLE board also).
8-way DIP switch
574200D x4
PAL palce24v10 x2 (next to the i860)
- Bt476 RAMDAC
+ Bt476 RAMDAC
LOWER:
Motorola MC68000P12 x2
@@ -59,45 +59,45 @@ NOTES : Shadow Fighters appears to have been dumped from an earlier
The PAL that's dumped for Shadow Fighters looks pretty bad.
TODO : This is a partially working driver. Most of the memory maps for
- all four CPUs are complete. An Intel i860XR CPU core has now
- been incorporated into MAME.
-
- -------- Notes/questions ----------
- - Most of the memory maps and input ports are complete now.
- For "main", the only I/O locations that seem to be left
- mysterious are:
- 0x600010,
- 0x60000C: Only written; maybe mc6845? Often accessed
- together, and 16 consecutive words of data are
- written to 0x60000C, making me think it might be
- 6845-related. May or may not be important for
- reasonable emulation.
- 0x60001C: Only read; might be a latch of some sort. It is
- read each time M0's interrupt service routine syncs
- with the i860's to have them update the frame buffer.
- Might this be a HW blank bit so things look clean when
- the i860's do their updates?
- The two other times I see it read are just before
- and after one of the pallette setups is done.
- 0x600018: ? No info yet.
- 0x704000: (VC only) Likely analog axis for VR headset
- 0x703000: (VC only) Likely analog axis for VR headset
- 0x702000: (Shadow only). I think this is another IN port. It
- is always read at the same time as the other two
- ports.
-
- - Assuming a single framebuffer, as I think we are at the moment,
- how are all the CPUs writes to the framebuffer prioritized,
- if at all? The zero values written by the 68k side erase
- the i860-generated FB data (i.e., zero maps to black in the
- pallette). On the other hand, treating the zero values as
+ all four CPUs are complete. An Intel i860XR CPU core has now
+ been incorporated into MAME.
+
+ -------- Notes/questions ----------
+ - Most of the memory maps and input ports are complete now.
+ For "main", the only I/O locations that seem to be left
+ mysterious are:
+ 0x600010,
+ 0x60000C: Only written; maybe mc6845? Often accessed
+ together, and 16 consecutive words of data are
+ written to 0x60000C, making me think it might be
+ 6845-related. May or may not be important for
+ reasonable emulation.
+ 0x60001C: Only read; might be a latch of some sort. It is
+ read each time M0's interrupt service routine syncs
+ with the i860's to have them update the frame buffer.
+ Might this be a HW blank bit so things look clean when
+ the i860's do their updates?
+ The two other times I see it read are just before
+ and after one of the pallette setups is done.
+ 0x600018: ? No info yet.
+ 0x704000: (VC only) Likely analog axis for VR headset
+ 0x703000: (VC only) Likely analog axis for VR headset
+ 0x702000: (Shadow only). I think this is another IN port. It
+ is always read at the same time as the other two
+ ports.
+
+ - Assuming a single framebuffer, as I think we are at the moment,
+ how are all the CPUs writes to the framebuffer prioritized,
+ if at all? The zero values written by the 68k side erase
+ the i860-generated FB data (i.e., zero maps to black in the
+ pallette). On the other hand, treating the zero values as
transparent doesn't quite look right either. Could just the
i860s each have their own framebuffers? After
- all, since each eye of the binocular sees a slightly different
- picture, the i860's might just maintain their own. Then maybe
- the 68k shares with each of the two, since I think it just
- generates a single picture (not sure about that either).
- ----------------------------------------------
+ all, since each eye of the binocular sees a slightly different
+ picture, the i860's might just maintain their own. Then maybe
+ the 68k shares with each of the two, since I think it just
+ generates a single picture (not sure about that either).
+ ----------------------------------------------
*/
#include <stdio.h>
@@ -134,7 +134,7 @@ static VIDEO_UPDATE( vcombat )
else color = framebuffer_main[count] & 0x00ff;
/* Vcombat's screen renders 'flopped' - very likely because VR headset displays may reflect off mirrors.
- Shadfgtr isn't flopped, so it's not a constant feature of the hardware. */
+ Shadfgtr isn't flopped, so it's not a constant feature of the hardware. */
if(x < video_screen_get_visible_area(screen)->max_x && y < video_screen_get_visible_area(screen)->max_y)
*BITMAP_ADDR32(bitmap, y, x) = pens[color];
@@ -157,7 +157,7 @@ static VIDEO_UPDATE( vcombat )
else color = framebuffer_secondary[count] & 0x00ff;
/* Vcombat's screen renders 'flopped' - very likely because VR headset displays may reflect off mirrors.
- Shadfgtr isn't flopped, so it's not a constant feature of the hardware. */
+ Shadfgtr isn't flopped, so it's not a constant feature of the hardware. */
if(x < video_screen_get_visible_area(screen)->max_x && y < video_screen_get_visible_area(screen)->max_y)
*BITMAP_ADDR32(bitmap, y, x) = pens[color];
@@ -244,21 +244,21 @@ static READ16_HANDLER( sound_resetmain_r )
static WRITE64_HANDLER( v0_fb_w )
{
/* The frame buffer seems to sit on a 32-bit data bus, while the
- i860 uses a 64-bit data bus. Adjust accordingly. */
+ i860 uses a 64-bit data bus. Adjust accordingly. */
char *p = (char *)framebuffer_main;
int m = mem_mask;
int o = (offset << 2);
if (m & 0xff000000) {
- p[o+3] = (data >> 24) & 0xff;
+ p[o+3] = (data >> 24) & 0xff;
}
if (m & 0x00ff0000) {
- p[o+2] = (data >> 16) & 0xff;
+ p[o+2] = (data >> 16) & 0xff;
}
if (m & 0x0000ff00) {
- p[o+1] = (data >> 8) & 0xff;
+ p[o+1] = (data >> 8) & 0xff;
}
if (m & 0x000000ff) {
- p[o+0] = (data >> 0) & 0xff;
+ p[o+0] = (data >> 0) & 0xff;
}
}
@@ -267,21 +267,21 @@ static WRITE64_HANDLER( v0_fb_w )
static WRITE64_HANDLER( v1_fb_w )
{
/* The frame buffer seems to sit on a 32-bit data bus, while the
- i860 uses a 64-bit data bus. Adjust accordingly. */
+ i860 uses a 64-bit data bus. Adjust accordingly. */
char *p = (char *)framebuffer_secondary;
int m = mem_mask;
int o = (offset << 2);
if (m & 0xff000000) {
- p[o+3] = (data >> 24) & 0xff;
+ p[o+3] = (data >> 24) & 0xff;
}
if (m & 0x00ff0000) {
- p[o+2] = (data >> 16) & 0xff;
+ p[o+2] = (data >> 16) & 0xff;
}
if (m & 0x0000ff00) {
- p[o+1] = (data >> 8) & 0xff;
+ p[o+1] = (data >> 8) & 0xff;
}
if (m & 0x000000ff) {
- p[o+0] = (data >> 0) & 0xff;
+ p[o+0] = (data >> 0) & 0xff;
}
}
@@ -290,7 +290,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x200000, 0x2fffff) AM_RAM
AM_RANGE(0x300000, 0x30ffff) AM_RAM_WRITE(main_video_write)
-
+
AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_BASE(&vid_0_shared_RAM) AM_SHARE(2) /* First i860 shared RAM */
AM_RANGE(0x440000, 0x440003) AM_RAM AM_SHARE(6) /* M0->P0 i860 #1 com 1 */
AM_RANGE(0x480000, 0x480003) AM_RAM AM_SHARE(7) /* M0<-P0 i860 #1 com 2 */
@@ -304,8 +304,8 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x600000, 0x600001) AM_READ(control_1_r) /* IN0 port */
AM_RANGE(0x600004, 0x600005) AM_RAM AM_SHARE(5) /* M0<-M1 */
AM_RANGE(0x600008, 0x600009) AM_READ(control_2_r) /* IN1 port */
- /* AM_RANGE(0x60000c, 0x60000d) See notes at top of driver. */
- /* AM_RANGE(0x600010, 0x600011) See notes at top of driver. */
+ /* AM_RANGE(0x60000c, 0x60000d) See notes at top of driver. */
+ /* AM_RANGE(0x600010, 0x600011) See notes at top of driver. */
AM_RANGE(0x700000, 0x7007ff) AM_RAM /* TODO: Non-volatile RAM */
AM_RANGE(0x701000, 0x701001) AM_READ(main_irqiack_r)
AM_RANGE(0x705000, 0x705001) AM_RAM AM_SHARE(4) /* M1->M0 */
@@ -319,7 +319,7 @@ ADDRESS_MAP_END
/* The first i860 - middle board */
static ADDRESS_MAP_START( vid_0_map, ADDRESS_SPACE_PROGRAM, 64 )
- AM_RANGE(0x00000000, 0x0001ffff) AM_RAM_WRITE(v0_fb_w) /* Shared framebuffer - half of the bits lost to 32-bit bus */
+ AM_RANGE(0x00000000, 0x0001ffff) AM_RAM_WRITE(v0_fb_w) /* Shared framebuffer - half of the bits lost to 32-bit bus */
AM_RANGE(0x20000000, 0x20000007) AM_RAM AM_SHARE(6) /* M0<-P0 com 1 (0x440000 in 68k-land) */
AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("gfx", 0)
AM_RANGE(0x80000000, 0x80000007) AM_RAM AM_SHARE(7) /* M0->P0 com 2 (0x480000 in 68k-land) */
@@ -401,18 +401,18 @@ static DRIVER_INIT( vcombat )
framebuffer_secondary = auto_malloc(0x10000 * sizeof(UINT16));
/* pc==4016 : jump 4038 ... There's something strange about how it waits at 402e (interrupts all masked out)
- I think what is happening here is that M0 snags the first time
- it hits this point based on a counter test just above this
- instruction. That counter gets updated just past this instruction.
- However, the only way this can be passed is if the M0 CPU is
- reset (the IPL=7, but irq 7 is a nop). I am almost sure that M1
- reads a latch, which resets M0 (probably to ensure M0 and M1 are
- both alive) and gets passed this snag. I tried to hook up a reset
- which should work, but asserting the reset line on the m68k doesn't
- seem to do anything. Maybe the 68k emulator doesn't respond to
- that, or I didn't do it correctly. But I think that is what needs
- to be done. But it isn't crucial for emulation. Shadow does not
- have this snag. */
+ I think what is happening here is that M0 snags the first time
+ it hits this point based on a counter test just above this
+ instruction. That counter gets updated just past this instruction.
+ However, the only way this can be passed is if the M0 CPU is
+ reset (the IPL=7, but irq 7 is a nop). I am almost sure that M1
+ reads a latch, which resets M0 (probably to ensure M0 and M1 are
+ both alive) and gets passed this snag. I tried to hook up a reset
+ which should work, but asserting the reset line on the m68k doesn't
+ seem to do anything. Maybe the 68k emulator doesn't respond to
+ that, or I didn't do it correctly. But I think that is what needs
+ to be done. But it isn't crucial for emulation. Shadow does not
+ have this snag. */
ROM[0x4017] = 0x66;
}
diff --git a/src/mame/machine/atarigen.c b/src/mame/machine/atarigen.c
index 043d4d76293..f7971556863 100644
--- a/src/mame/machine/atarigen.c
+++ b/src/mame/machine/atarigen.c
@@ -1612,10 +1612,10 @@ void atarigen_blend_gfx(running_machine *machine, int gfx0, int gfx1, int mask0,
gfx_element *gx1 = machine->gfx[gfx1];
UINT8 *srcdata, *dest;
int c, x, y;
-
+
/* allocate memory for the assembled data */
srcdata = auto_malloc(gx0->total_elements * gx0->width * gx0->height);
-
+
/* loop over elements */
dest = srcdata;
for (c = 0; c < gx0->total_elements; c++)
diff --git a/src/mame/machine/balsente.c b/src/mame/machine/balsente.c
index e699e3cda35..e0cfea56c54 100644
--- a/src/mame/machine/balsente.c
+++ b/src/mame/machine/balsente.c
@@ -285,7 +285,7 @@ void balsente_noise_gen(const device_config *device, int count, short *buffer)
{
int chip;
UINT32 step, noise_counter;
-
+
/* find the chip we are referring to */
for (chip = 0; chip < ARRAY_LENGTH(cem_device); chip++)
{
diff --git a/src/mame/mamedriv.c b/src/mame/mamedriv.c
index 8a4a9cccb4c..0338fe65482 100644
--- a/src/mame/mamedriv.c
+++ b/src/mame/mamedriv.c
@@ -4966,7 +4966,7 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11
DRIVER( tbyahhoo ) /* GX424 (c) 1995 (Japan) */
DRIVER( tkmmpzdm ) /* GX515 (c) 1995 (Japan) */
DRIVER( salmndr2 ) /* GX521 (c) 1996 (Japan) */
- DRIVER( salmnd2a ) /* GX521 (c) 1996 (Asia) */
+ DRIVER( salmnd2a ) /* GX521 (c) 1996 (Asia) */
DRIVER( sexyparo ) /* GX533 (c) 1996 (Japan) */
DRIVER( daiskiss ) /* GX535 (c) 1996 (Japan) */
DRIVER( tokkae ) /* GX615 (c) 1996 (Japan) */
@@ -8543,7 +8543,7 @@ Other Sun games
DRIVER( ladylinr ) /* (c) 198? TAB Austria */
DRIVER( kkojnoli ) /* 198? south korean hack */
DRIVER( mtonic ) /* 198? (c) Tonic */
-
+
DRIVER( 3super8 ) /* unknown */
DRIVER( buster ) /* (c) 1987 Marian Electronics Ltd. */
DRIVER( spielbud ) /* (c) 1985 ADP */
diff --git a/src/mame/video/asterix.c b/src/mame/video/asterix.c
index df3d54af5a8..c0fe1bd3b22 100644
--- a/src/mame/video/asterix.c
+++ b/src/mame/video/asterix.c
@@ -123,8 +123,8 @@ VIDEO_UPDATE( asterix )
K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[1], 0, 2);
K056832_tilemap_draw(screen->machine, bitmap, cliprect, layer[2], 0, 4);
-/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
- pdrawgfx_shadow_lowpri = 1; fix shadows in front of feet */
+/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
+ pdrawgfx_shadow_lowpri = 1; fix shadows in front of feet */
K053245_sprites_draw(screen->machine, 0, bitmap, cliprect);
K056832_tilemap_draw(screen->machine, bitmap, cliprect, 2, 0, 0);
diff --git a/src/mame/video/goldstar.c b/src/mame/video/goldstar.c
index f8a68dcd223..f683a4e1015 100644
--- a/src/mame/video/goldstar.c
+++ b/src/mame/video/goldstar.c
@@ -173,7 +173,7 @@ static const rectangle visible1 = { 0*8, (14+48)*8-1, 4*8, (4+7)*8-1 };
static const rectangle visible2 = { 0*8, (14+48)*8-1, 12*8, (12+7)*8-1 };
static const rectangle visible3 = { 0*8, (14+48)*8-1, 20*8, (20+7)*8-1 };
-static const rectangle cm91_visible1 = { 0*8, (14+48)*8-1, 4*8, (4+7)*8-1 }; /* same start for reel1 */
+static const rectangle cm91_visible1 = { 0*8, (14+48)*8-1, 4*8, (4+7)*8-1 }; /* same start for reel1 */
static const rectangle cm91_visible2 = { 0*8, (14+48)*8-1, 11*8, (12+7)*8-1 }; /* 4 pixels less for reel2 */
static const rectangle cm91_visible3 = { 0*8, (14+48)*8-1, 19*8, (19+7)*8-1 }; /* 8 pixels less for reel3 */
diff --git a/src/mame/video/konamiic.c b/src/mame/video/konamiic.c
index 0ebe4c0deff..8fb9e8abc3e 100644
--- a/src/mame/video/konamiic.c
+++ b/src/mame/video/konamiic.c
@@ -2726,7 +2726,7 @@ void K051960_sprites_draw(running_machine *machine,bitmap_t *bitmap,const rectan
int offs,pri_code;
int sortedlist[NUM_SPRITES];
UINT8 drawmode_table[256];
-
+
memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
drawmode_table[0] = DRAWMODE_NONE;
@@ -3244,7 +3244,7 @@ void K053245_sprites_draw(running_machine *machine, int chip, bitmap_t *bitmap,c
int sortedlist[NUM_SPRITES];
int flipscreenX, flipscreenY, spriteoffsX, spriteoffsY;
UINT8 drawmode_table[256];
-
+
memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
drawmode_table[0] = DRAWMODE_NONE;
@@ -3481,7 +3481,7 @@ void K053245_sprites_draw_lethal(running_machine *machine,int chip, bitmap_t *bi
int sortedlist[NUM_SPRITES];
int flipscreenX, flipscreenY, spriteoffsX, spriteoffsY;
UINT8 drawmode_table[256];
-
+
memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
drawmode_table[0] = DRAWMODE_NONE;
@@ -4209,7 +4209,7 @@ void K053247_sprites_draw(running_machine *machine, bitmap_t *bitmap,const recta
UINT8 drawmode_table[256];
UINT8 shadowmode_table[256];
UINT8 *whichtable;
-
+
memset(drawmode_table, DRAWMODE_SOURCE, sizeof(drawmode_table));
drawmode_table[0] = DRAWMODE_NONE;
memset(shadowmode_table, DRAWMODE_SHADOW, sizeof(shadowmode_table));
diff --git a/src/mame/video/mcr68.c b/src/mame/video/mcr68.c
index 621aaa7a57f..5b2ae58a744 100644
--- a/src/mame/video/mcr68.c
+++ b/src/mame/video/mcr68.c
@@ -87,7 +87,7 @@ VIDEO_START( zwackery )
/* allocate memory for the assembled gfx data */
srcdata0 = auto_malloc(gfx0->total_elements * gfx0->width * gfx0->height);
srcdata2 = auto_malloc(gfx2->total_elements * gfx2->width * gfx2->height);
-
+
/* "colorize" each code */
dest0 = srcdata0;
dest2 = srcdata2;
diff --git a/src/mame/video/metro.c b/src/mame/video/metro.c
index 643dae6d6cc..2fb5fc2b555 100644
--- a/src/mame/video/metro.c
+++ b/src/mame/video/metro.c
@@ -622,7 +622,7 @@ void metro_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectan
for (i=0; i<0x20; i++)
{
gfx_element gfx;
-
+
if (!(metro_videoregs[0x02/2] & 0x8000))
{
src = spriteram16 + (sprites - 1) * (8/2);
diff --git a/src/mame/video/mystwarr.c b/src/mame/video/mystwarr.c
index 9addd41ca6f..847902985d1 100644
--- a/src/mame/video/mystwarr.c
+++ b/src/mame/video/mystwarr.c
@@ -24,7 +24,7 @@ static void mystwarr_decode_tiles(running_machine *machine)
UINT8 *pFinish = s+len-3;
UINT8 *d, *decoded;
int gfxnum;
-
+
for (gfxnum = 0; gfxnum < ARRAY_LENGTH(machine->gfx); gfxnum++)
if (machine->gfx[gfxnum] != NULL && machine->gfx[gfxnum]->srcdata == s)
break;
@@ -58,7 +58,7 @@ static void mystwarr_decode_tiles(running_machine *machine)
s += 5;
d += 5;
}
-
+
gfx_element_set_source(machine->gfx[gfxnum], decoded);
}
diff --git a/src/mame/video/namcos1.c b/src/mame/video/namcos1.c
index 6d82c3cb4e9..d224dba8df3 100644
--- a/src/mame/video/namcos1.c
+++ b/src/mame/video/namcos1.c
@@ -328,7 +328,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
flipx,flipy,
sx & 0x1ff,
((sy + 16) & 0xff) - 16,
- priority_bitmap, pri_mask,
+ priority_bitmap, pri_mask,
0xf);
else
pdrawgfx_transtable( bitmap, cliprect, gfx,
diff --git a/src/mame/video/namcos22.c b/src/mame/video/namcos22.c
index c9b9cfebce9..b0cd3093e50 100644
--- a/src/mame/video/namcos22.c
+++ b/src/mame/video/namcos22.c
@@ -2200,7 +2200,7 @@ static void namcos22_exit(running_machine *machine)
static VIDEO_START( common )
{
int code;
-
+
bgtilemap = tilemap_create( machine, TextTilemapGetInfo,tilemap_scan_rows,16,16,64,64 );
tilemap_set_transparent_pen( bgtilemap, 0xf );
diff --git a/src/mame/video/ppu2c0x.c b/src/mame/video/ppu2c0x.c
index d71d62d38f0..1e15f720b6e 100644
--- a/src/mame/video/ppu2c0x.c
+++ b/src/mame/video/ppu2c0x.c
@@ -1360,7 +1360,7 @@ void ppu2c0x_set_videorom_bank( int num, int start_page, int num_pages, int bank
for ( i = start_page; i < start_page + num_pages; i++ )
{
int elemnum;
-
+
if ( chips[num].videoram_banks_indices[i] != -1 )
{
memcpy( &chips[num].videoram[chips[num].videoram_banks_indices[i]*0x400], &chips[num].videomem[i*0x400], 0x400);
diff --git a/src/mame/video/psikyosh.c b/src/mame/video/psikyosh.c
index a8c2604ff16..be44c358a2f 100644
--- a/src/mame/video/psikyosh.c
+++ b/src/mame/video/psikyosh.c
@@ -110,14 +110,14 @@ do \
} \
while (0) \
-void drawgfx_alphatable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
- UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
+void drawgfx_alphatable(bitmap_t *dest, const rectangle *cliprect, const gfx_element *gfx,
+ UINT32 code, UINT32 color, int flipx, int flipy, INT32 destx, INT32 desty,
int fixedalpha)
{
bitmap_t *priority = NULL; /* dummy, no priority in this case */
-
+
const pen_t *paldata;
-
+
/* if we have a fixed alpha, call the standard drawgfx_alpha */
if (fixedalpha >= 0)
{
@@ -134,7 +134,7 @@ void drawgfx_alphatable(bitmap_t *dest, const rectangle *cliprect, const gfx_ele
code %= gfx->total_elements;
color %= gfx->total_colors;
paldata = &gfx->machine->pens[gfx->color_base + gfx->color_granularity * color];
-
+
/* early out if completely transparent */
if (gfx->pen_usage != NULL && (gfx->pen_usage[code] & ~(1 << 0)) == 0)
return;
diff --git a/src/mame/video/relief.c b/src/mame/video/relief.c
index 1ea77515786..04612024c36 100644
--- a/src/mame/video/relief.c
+++ b/src/mame/video/relief.c
@@ -81,7 +81,7 @@ VIDEO_START( relief )
0, /* resulting value to indicate "special" */
0 /* callback routine for special entries */
};
-
+
/* MOs are 5bpp but with a 4-bit color granularity */
machine->gfx[1]->color_granularity = 16;
diff --git a/src/mame/video/rockola.c b/src/mame/video/rockola.c
index afa57fead5c..bdb34cef8a9 100644
--- a/src/mame/video/rockola.c
+++ b/src/mame/video/rockola.c
@@ -180,7 +180,7 @@ VIDEO_START( rockola )
fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
tilemap_set_transparent_pen(fg_tilemap, 0);
-
+
gfx_element_set_source(machine->gfx[0], rockola_charram);
}
@@ -300,6 +300,6 @@ VIDEO_START( satansat )
fg_tilemap = tilemap_create(machine, satansat_get_fg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
tilemap_set_transparent_pen(fg_tilemap, 0);
-
+
gfx_element_set_source(machine->gfx[0], rockola_charram);
}
diff --git a/src/mame/video/snes.c b/src/mame/video/snes.c
index 8519bb40045..099bfe64f13 100644
--- a/src/mame/video/snes.c
+++ b/src/mame/video/snes.c
@@ -1942,7 +1942,7 @@ static void snes_dbg_draw_all_tiles(bitmap_t *bitmap, UINT32 tileaddr, UINT8 bpl
for( kk = 0; kk < 8; kk++ )
{
UINT32 *destline = BITMAP_ADDR32(bitmap, jj * 8 + kk, 0);
-
+
/* Clear buffers */
memset( scanlines[MAINSCREEN].buffer, 0, SNES_SCR_WIDTH * 2 );
memset( scanlines[MAINSCREEN].zbuf, 0, SNES_SCR_WIDTH * 2 );
diff --git a/src/mame/video/snk.c b/src/mame/video/snk.c
index 5a31a6cb91a..161f523e89c 100644
--- a/src/mame/video/snk.c
+++ b/src/mame/video/snk.c
@@ -238,7 +238,7 @@ VIDEO_START( marvins )
tilemap_set_scrolldx(bg_tilemap, 15, 31);
tilemap_set_scrolldy(bg_tilemap, 8, -32);
-
+
tx_tile_offset = 0;
}
@@ -331,14 +331,14 @@ VIDEO_START( ikari )
tilemap_set_scrolldx(bg_tilemap, 15, 24);
tilemap_set_scrolldy(bg_tilemap, 8, -32);
-
+
tx_tile_offset = 0;
}
VIDEO_START( gwar )
{
int i;
-
+
/* prepare drawmode table */
for(i = 0; i <= 14; i++) drawmode_table[i] = DRAWMODE_SOURCE;
drawmode_table[15] = DRAWMODE_NONE;
@@ -352,7 +352,7 @@ VIDEO_START( gwar )
tilemap_set_scrolldx(bg_tilemap, 16, 143);
tilemap_set_scrolldy(bg_tilemap, 0, -32);
-
+
tx_tile_offset = 0;
}
diff --git a/src/mame/video/taitoic.c b/src/mame/video/taitoic.c
index 5de19954fec..58275f569d4 100644
--- a/src/mame/video/taitoic.c
+++ b/src/mame/video/taitoic.c
@@ -1854,7 +1854,7 @@ do \
} \
} \
while (0) \
-
+
static void TC0080VCO_bg1_tilemap_draw(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect,int flags,UINT32 priority)
{
UINT8 layer=1;
diff --git a/src/mame/video/toaplan2.c b/src/mame/video/toaplan2.c
index de15e0fec7b..1d8a35e5d90 100644
--- a/src/mame/video/toaplan2.c
+++ b/src/mame/video/toaplan2.c
@@ -598,7 +598,7 @@ VIDEO_START( batrider_0 )
raizing_tx_gfxram16 = auto_malloc(RAIZING_TX_GFXRAM_SIZE);
memset(raizing_tx_gfxram16,0,RAIZING_TX_GFXRAM_SIZE);
state_save_register_global_pointer(machine, raizing_tx_gfxram16, RAIZING_TX_GFXRAM_SIZE/2);
-
+
gfx_element_set_source(machine->gfx[2], (UINT8 *)raizing_tx_gfxram16);
toaplan2_vram_alloc(0);
diff --git a/src/mame/video/xmen.c b/src/mame/video/xmen.c
index acd0e96ea80..9adc6268462 100644
--- a/src/mame/video/xmen.c
+++ b/src/mame/video/xmen.c
@@ -124,8 +124,8 @@ VIDEO_UPDATE( xmen )
tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[1]],0,2);
tilemap_draw(bitmap,cliprect,K052109_tilemap[layer[2]],0,4);
-/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
- pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
+/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
+ pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
K053247_sprites_draw(screen->machine, bitmap,cliprect);
return 0;
}
@@ -251,8 +251,8 @@ VIDEO_EOF( xmen6p )
tilemap_draw(renderbitmap,&cliprect,K052109_tilemap[layer[1]],0,2);
tilemap_draw(renderbitmap,&cliprect,K052109_tilemap[layer[2]],0,4);
-/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
- pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
+/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
+ pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
K053247_sprites_draw(machine, renderbitmap,&cliprect);
}
diff --git a/src/version.c b/src/version.c
index 75a8d978849..dabe3b35521 100644
--- a/src/version.c
+++ b/src/version.c
@@ -9,4 +9,4 @@
***************************************************************************/
-const char build_version[] = "0.129 ("__DATE__")";
+const char build_version[] = "0.129u1 ("__DATE__")";