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author Aaron Giles <aaron@aarongiles.com>2008-05-05 06:11:13 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-05-05 06:11:13 +0000
commit0cee075e0d6b6b995240ed496a7bc09059e6c458 (patch)
treee63a1e49ef6b6323fabcd5407c176c7e7ef88ce2
parentc75d63a569317eaa75b6fe3ad6a85249de92beb9 (diff)
Added xchg opcodes.
-rw-r--r--src/emu/cpu/x86emit.h61
1 files changed, 60 insertions, 1 deletions
diff --git a/src/emu/cpu/x86emit.h b/src/emu/cpu/x86emit.h
index 60a95a8fc40..166c5fc36c9 100644
--- a/src/emu/cpu/x86emit.h
+++ b/src/emu/cpu/x86emit.h
@@ -1695,6 +1695,21 @@ INLINE void emit_mov_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) {
/*-------------------------------------------------
+ emit_xchg_r8_*
+-------------------------------------------------*/
+
+INLINE void emit_xchg_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg)
+{
+ if (dreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_32BIT, sreg);
+ else if (sreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_32BIT, dreg);
+ else
+ emit_op_modrm_reg(emitptr, OP_XCHG_Eb_Gb, OP_32BIT, dreg, sreg);
+}
+
+
+/*-------------------------------------------------
emit_mov_r16_*
-------------------------------------------------*/
@@ -1717,6 +1732,21 @@ INLINE void emit_cmovcc_r16_m16(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLA
/*-------------------------------------------------
+ emit_xchg_r16_*
+-------------------------------------------------*/
+
+INLINE void emit_xchg_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg)
+{
+ if (dreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_16BIT, sreg);
+ else if (sreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_16BIT, dreg);
+ else
+ emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_16BIT, dreg, sreg);
+}
+
+
+/*-------------------------------------------------
emit_mov_r32_*
-------------------------------------------------*/
@@ -1743,6 +1773,21 @@ INLINE void emit_cmovcc_r32_m32(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLA
/*-------------------------------------------------
+ emit_xchg_r32_*
+-------------------------------------------------*/
+
+INLINE void emit_xchg_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg)
+{
+ if (dreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_32BIT, sreg);
+ else if (sreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_32BIT, dreg);
+ else
+ emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_32BIT, dreg, sreg);
+}
+
+
+/*-------------------------------------------------
emit_mov_r64_*
-------------------------------------------------*/
@@ -1781,8 +1826,22 @@ INLINE void emit_movzx_r64_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS)
INLINE void emit_cmovcc_r64_r64(x86code **emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); }
INLINE void emit_cmovcc_r64_m64(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, MEMPARAMS); }
-#endif
+/*-------------------------------------------------
+ emit_xchg_r64_*
+-------------------------------------------------*/
+
+INLINE void emit_xchg_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg)
+{
+ if (dreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_64BIT, sreg);
+ else if (sreg == REG_EAX)
+ emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_64BIT, dreg);
+ else
+ emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_64BIT, dreg, sreg);
+}
+
+#endif
/***************************************************************************