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author MooglyGuy <mooglyguy@github.com>2026-05-01 17:08:26 +0200
committer MooglyGuy <mooglyguy@github.com>2026-05-01 17:08:26 +0200
commit8a85a8f3a70fff7ba13728fbbe99a308ddd81bd2 (patch)
treea512b5b43091c82bb2a30781b500d00ae1c9a865
parentaf9ef3f74aa04e1c4f80b63d4fb4445586d04d30 (diff)
Redoing offs_t to 64-bits expansion.
-rw-r--r--src/devices/cpu/drcfe.h6
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp8
-rw-r--r--src/devices/cpu/m88000/m88000.cpp8
-rw-r--r--src/devices/cpu/m88000/m88000.h14
-rw-r--r--src/devices/cpu/ns32000/common.h2
-rw-r--r--src/devices/cpu/ns32000/ns32000.cpp12
-rw-r--r--src/devices/cpu/ns32000/ns32000.h6
-rw-r--r--src/devices/cpu/rii/riidasm.cpp2
-rw-r--r--src/devices/cpu/romp/rsc.h52
-rw-r--r--src/devices/cpu/sharc/sharc.cpp4
-rw-r--r--src/devices/cpu/sharc/sharc.h4
-rw-r--r--src/devices/cpu/sparc/sparc_intf.h2
-rw-r--r--src/devices/machine/mc88200.cpp36
-rw-r--r--src/devices/machine/mc88200.h26
-rw-r--r--src/devices/machine/ns32082.cpp4
-rw-r--r--src/devices/machine/ns32082.h2
-rw-r--r--src/devices/machine/ns32382.cpp10
-rw-r--r--src/devices/machine/ns32382.h2
-rw-r--r--src/devices/machine/sun4c_mmu.cpp80
-rw-r--r--src/devices/machine/sun4c_mmu.h68
-rw-r--r--src/emu/debug/debugcon.cpp8
-rw-r--r--src/emu/debug/debugcon.h1
-rw-r--r--src/emu/debug/express.h2
-rw-r--r--src/emu/emumem.h4
-rw-r--r--src/lib/util/disasmintf.h2
-rw-r--r--src/mame/exidy/exidy440_a.cpp37
-rw-r--r--src/mame/exidy/exidy440_a.h4
-rw-r--r--src/mame/funworld/funworld.cpp4
-rw-r--r--src/mame/hp/hp9845_optrom.cpp4
-rw-r--r--src/mame/hp/hp_ipc_optrom.cpp4
-rw-r--r--src/mame/ibm/rosetta.cpp22
-rw-r--r--src/mame/ibm/rosetta.h58
-rw-r--r--src/mame/ibm/rtpc_iocc.cpp12
-rw-r--r--src/mame/ibm/rtpc_iocc.h50
-rw-r--r--src/mame/konami/viper.cpp61
-rw-r--r--src/mame/mattel/stic.cpp9
-rw-r--r--src/mame/mattel/stic.h2
-rw-r--r--src/mame/namco/namcos11.cpp32
-rw-r--r--src/mame/next/next.cpp8
-rw-r--r--src/mame/nintendo/nds.cpp170
-rw-r--r--src/mame/nintendo/vboy.cpp3
-rw-r--r--src/mame/sega/315_5195.cpp4
-rw-r--r--src/mame/sega/315_5195.h2
-rw-r--r--src/mame/sega/coolridr.cpp22
-rw-r--r--src/mame/shared/xbox.cpp8
-rw-r--r--src/mame/tigertel/docg3.cpp74
-rw-r--r--src/mame/tomy/tutor.cpp13
47 files changed, 421 insertions, 547 deletions
diff --git a/src/devices/cpu/drcfe.h b/src/devices/cpu/drcfe.h
index e9d0333a550..52213aba53e 100644
--- a/src/devices/cpu/drcfe.h
+++ b/src/devices/cpu/drcfe.h
@@ -204,9 +204,9 @@ private:
void release_descriptions();
// configuration parameters
- u32 const m_window_start; // code window start offset = startpc - window_start
- u32 const m_window_end; // code window end offset = startpc + window_end
- u32 const m_max_sequence; // maximum instructions to include in a sequence
+ offs_t const m_window_start; // code window start offset = startpc - window_start
+ offs_t const m_window_end; // code window end offset = startpc + window_end
+ offs_t const m_max_sequence; // maximum instructions to include in a sequence
// CPU parameters
offs_t const m_pageshift; // shift to convert address to a page index
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index f5035a793e8..0df03ba00a8 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -88,7 +88,7 @@ inline u32 jaguar_cpu_device::READLONG(offs_t a)
// - pdrive $580e
if (!DWORD_ALIGNED(a))
{
- if (a == std::clamp(a, (u32)0xf00000, (u32)0xf00fff) || a == std::clamp(a, (u32)0xf10000, (u32)0xf10fff))
+ if (a == std::clamp(a, 0xf00000ULL, 0xf00fffULL) || a == std::clamp(a, 0xf10000ULL, 0xf10fffULL))
{
//printf("%d: %08x R\n", m_isdsp, a);
u32 res = m_program.read_word(a) << 0;
@@ -98,7 +98,7 @@ inline u32 jaguar_cpu_device::READLONG(offs_t a)
return res;
}
- //if (a == std::clamp(a, (u32)0xf03000, (u32)0xf03fff) || a == std::clamp(a, (u32)0xf1b000, (u32)0xf1cfff))
+ //if (a == std::clamp(a, 0xf03000ULL, 0xf03fffULL) || a == std::clamp(a, 0xf1b000ULL, 0xf1cfffULL))
// a &= ~3;
}
@@ -121,7 +121,7 @@ inline void jaguar_cpu_device::WRITELONG(offs_t a, u32 v)
// TODO: verify what happens on other accesses (just rolls over?)
if (!DWORD_ALIGNED(a))
{
- if(a == std::clamp(a, (u32)0xf00000, (u32)0xf00fff) || a == std::clamp(a, (u32)0xf10000, (u32)0xf10fff))
+ if(a == std::clamp(a, 0xf00000ULL, 0xf00fffULL) || a == std::clamp(a, 0xf10000ULL, 0xf10fffULL))
{
//printf("%d: %08x %08x W\n", m_isdsp, a, v);
m_program.write_word(a, v & 0xffff);
@@ -129,7 +129,7 @@ inline void jaguar_cpu_device::WRITELONG(offs_t a, u32 v)
return;
}
- //if (a == std::clamp(a, (u32)0xf03000, (u32)0xf03fff) || a == std::clamp(a, (u32)0xf1b000, (u32)0xf1cfff))
+ //if (a == std::clamp(a, 0xf03000ULL, 0xf03fffULL) || a == std::clamp(a, 0xf1b000ULL, 0xf1cfffULL))
// a &= ~3;
}
diff --git a/src/devices/cpu/m88000/m88000.cpp b/src/devices/cpu/m88000/m88000.cpp
index efa63be77fd..c69c33979b8 100644
--- a/src/devices/cpu/m88000/m88000.cpp
+++ b/src/devices/cpu/m88000/m88000.cpp
@@ -136,7 +136,7 @@ enum dmt_mask : u32
constexpr static u32 DMT_EN() { return (DMT_EN3 | DMT_EN2 | DMT_EN1 | DMT_EN0); }
// return data memory transaction byte enables given data width and address
-template <typename T> static u32 DMT_EN(u32 const address)
+template <typename T> static u32 DMT_EN(offs_t const address)
{
return (((DMT_EN() << (4 - sizeof(T))) & DMT_EN()) >> (address & 3));
}
@@ -1537,7 +1537,7 @@ void mc88100_device::fetch(u32 &address, u32 &inst)
inst = m_code_space.read_dword(address & IP_A);
}
-template <typename T, bool Usr> void mc88100_device::ld(u32 address, unsigned const reg)
+template <typename T, bool Usr> void mc88100_device::ld(offs_t address, unsigned const reg)
{
// alignment check
if (address & (sizeof(T) - 1))
@@ -1658,7 +1658,7 @@ template <typename T, bool Usr> void mc88100_device::ld(u32 address, unsigned co
}
}
-template <typename T, bool Usr> void mc88100_device::st(u32 address, unsigned const reg)
+template <typename T, bool Usr> void mc88100_device::st(offs_t address, unsigned const reg)
{
// alignment check
if (address & (sizeof(T) - 1))
@@ -1748,7 +1748,7 @@ template <typename T, bool Usr> void mc88100_device::st(u32 address, unsigned co
}
}
-template <typename T, bool Usr> void mc88100_device::xmem(u32 address, unsigned const reg)
+template <typename T, bool Usr> void mc88100_device::xmem(offs_t address, unsigned const reg)
{
// alignment check
if (address & (sizeof(T) - 1))
diff --git a/src/devices/cpu/m88000/m88000.h b/src/devices/cpu/m88000/m88000.h
index e646f9334c8..81d0e173fb5 100644
--- a/src/devices/cpu/m88000/m88000.h
+++ b/src/devices/cpu/m88000/m88000.h
@@ -20,8 +20,8 @@ public:
// construction/destruction
mc88100_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
- void set_cmmu_code(std::function<mc88200_device &(u32 const address)> f) { m_cmmu_code = f; }
- void set_cmmu_data(std::function<mc88200_device &(u32 const address)> f) { m_cmmu_data = f; }
+ void set_cmmu_code(std::function<mc88200_device &(offs_t const address)> f) { m_cmmu_code = f; }
+ void set_cmmu_data(std::function<mc88200_device &(offs_t const address)> f) { m_cmmu_data = f; }
protected:
// device_t implementation
@@ -44,9 +44,9 @@ protected:
// memory helpers
void fetch(u32 &address, u32 &inst);
- template <typename T, bool Usr = false> void ld(u32 address, unsigned const reg);
- template <typename T, bool Usr = false> void st(u32 address, unsigned const reg);
- template <typename T, bool Usr = false> void xmem(u32 address, unsigned const reg);
+ template <typename T, bool Usr = false> void ld(offs_t address, unsigned const reg);
+ template <typename T, bool Usr = false> void st(offs_t address, unsigned const reg);
+ template <typename T, bool Usr = false> void xmem(offs_t address, unsigned const reg);
// integer helpers
void set_cr(unsigned const cr, u32 const data);
@@ -67,8 +67,8 @@ private:
memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_code_space;
memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_data_space;
- std::function<mc88200_device &(u32 const address)> m_cmmu_code;
- std::function<mc88200_device &(u32 const address)> m_cmmu_data;
+ std::function<mc88200_device &(offs_t const address)> m_cmmu_code;
+ std::function<mc88200_device &(offs_t const address)> m_cmmu_data;
// register storage
u32 m_xip; // execute instruction pointer
diff --git a/src/devices/cpu/ns32000/common.h b/src/devices/cpu/ns32000/common.h
index 8a17ca96294..b25d454cfc9 100644
--- a/src/devices/cpu/ns32000/common.h
+++ b/src/devices/cpu/ns32000/common.h
@@ -87,7 +87,7 @@ class ns32000_mmu_interface : public ns32000_slave_interface
{
public:
enum translate_result : unsigned { COMPLETE, CANCEL, ABORT };
- virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool flag = false, bool suppress = false) = 0;
+ virtual translate_result translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool flag = false, bool suppress = false) = 0;
protected:
ns32000_mmu_interface(machine_config const &mconfig, device_t &device)
diff --git a/src/devices/cpu/ns32000/ns32000.cpp b/src/devices/cpu/ns32000/ns32000.cpp
index df40818387f..fcaddce73d9 100644
--- a/src/devices/cpu/ns32000/ns32000.cpp
+++ b/src/devices/cpu/ns32000/ns32000.cpp
@@ -263,9 +263,9 @@ template <int HighBits, int Width> void ns32000_device<HighBits, Width>::state_s
*
* Underlying handlers further subdivide accesses by device bus width.
*/
-template <int HighBits, int Width> template<typename T> T ns32000_device<HighBits, Width>::mem_read(unsigned st, u32 address, bool user, bool pfs)
+template <int HighBits, int Width> template<typename T> T ns32000_device<HighBits, Width>::mem_read(unsigned st, offs_t address, bool user, bool pfs)
{
- u32 physical = address;
+ offs_t physical = address;
ns32000_mmu_interface::translate_result tr = m_mmu ?
m_mmu->translate(m_bus[st].space(), st, physical, (m_psr & PSR_U) || user, false, pfs) : ns32000_mmu_interface::COMPLETE;
@@ -348,9 +348,9 @@ template <int HighBits, int Width> template<typename T> T ns32000_device<HighBit
return 0;
}
-template <int HighBits, int Width> template<typename T> void ns32000_device<HighBits, Width>::mem_write(unsigned st, u32 address, u64 data, bool user)
+template <int HighBits, int Width> template<typename T> void ns32000_device<HighBits, Width>::mem_write(unsigned st, offs_t address, u64 data, bool user)
{
- u32 physical = address;
+ offs_t physical = address;
ns32000_mmu_interface::translate_result tr = m_mmu ?
m_mmu->translate(m_bus[st].space(), st, physical, (m_psr & PSR_U) || user, true) : ns32000_mmu_interface::COMPLETE;
@@ -3947,7 +3947,7 @@ static constexpr u32 MSR(unsigned st, bool user, bool write, unsigned tex)
return u32(((st << 4) & MSR_STT) | (user ? MSR_UST : 0) | (write ? MSR_DDT : 0) | (tex & MSR_TEX));
}
-ns32000_mmu_interface::translate_result ns32532_device::translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool rdwrval, bool suppress)
+ns32000_mmu_interface::translate_result ns32532_device::translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool rdwrval, bool suppress)
{
enum mcr_mask : u32
{
@@ -4188,7 +4188,7 @@ u16 ns32532_device::slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
case 0: // rdval
case 1: // wrval
{
- u32 address = ea(op1);
+ offs_t address = ea(op1);
switch (translate(space(AS_PROGRAM), ns32000::ST_ODT, address, true, BIT(opword, 2), true, true))
{
diff --git a/src/devices/cpu/ns32000/ns32000.h b/src/devices/cpu/ns32000/ns32000.h
index 24c46f788d1..d0831bbe60f 100644
--- a/src/devices/cpu/ns32000/ns32000.h
+++ b/src/devices/cpu/ns32000/ns32000.h
@@ -117,8 +117,8 @@ protected:
};
// memory accessors
- template <typename T> T mem_read(unsigned st, u32 address, bool user = false, bool pfs = false);
- template <typename T> void mem_write(unsigned st, u32 address, u64 data, bool user = false);
+ template <typename T> T mem_read(unsigned st, offs_t address, bool user = false, bool pfs = false);
+ template <typename T> void mem_write(unsigned st, offs_t address, u64 data, bool user = false);
// instruction fetch/decode helpers
template <typename T> T fetch(unsigned &bytes);
@@ -227,7 +227,7 @@ public:
// ns32000_mmu_interface implementation
virtual void state_add(device_state_interface &parent, int &index) override;
- virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool rdwrval = false, bool suppress = false) override;
+ virtual translate_result translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool rdwrval = false, bool suppress = false) override;
protected:
// device_t implementation
diff --git a/src/devices/cpu/rii/riidasm.cpp b/src/devices/cpu/rii/riidasm.cpp
index c376bbcc391..ea7f5777f31 100644
--- a/src/devices/cpu/rii/riidasm.cpp
+++ b/src/devices/cpu/rii/riidasm.cpp
@@ -14,7 +14,7 @@
using osd::u32;
using util::BIT;
-using offs_t = u32;
+using offs_t = u64;
// TODO: add register sets for other models
const char *const epg3231_disassembler::s_regs[0x60] =
diff --git a/src/devices/cpu/romp/rsc.h b/src/devices/cpu/romp/rsc.h
index a0446af9533..1f3f876474a 100644
--- a/src/devices/cpu/romp/rsc.h
+++ b/src/devices/cpu/romp/rsc.h
@@ -37,29 +37,29 @@ public:
RSC_PUT = 7,
};
- virtual bool mem_load(u32 address, u8 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_load(u32 address, u16 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_load(u32 address, u32 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_load(offs_t address, u8 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_load(offs_t address, u16 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_load(offs_t address, u32 &data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_store(u32 address, u8 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_store(u32 address, u16 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_store(u32 address, u32 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_store(offs_t address, u8 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_store(offs_t address, u16 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
+ virtual bool mem_store(offs_t address, u32 data, rsc_mode const mode = RSC_N, bool sp = false) = 0;
- virtual bool mem_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode = RSC_N) = 0;
- virtual bool mem_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode = RSC_N) = 0;
- virtual bool mem_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool mem_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool mem_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool mem_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_load(u32 address, u8 &data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_load(u32 address, u16 &data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_load(u32 address, u32 &data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_load(offs_t address, u8 &data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_load(offs_t address, u16 &data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_load(offs_t address, u32 &data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_store(u32 address, u8 data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_store(u32 address, u16 data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_store(u32 address, u32 data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_store(offs_t address, u8 data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_store(offs_t address, u16 data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_store(offs_t address, u32 data, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode = RSC_N) = 0;
- virtual bool pio_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode = RSC_N) = 0;
+ virtual bool pio_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode = RSC_N) = 0;
protected:
rsc_bus_interface(machine_config const &mconfig, device_t &device, char const *type)
@@ -79,17 +79,17 @@ public:
virtual ~rsc_cpu_interface() = default;
// cpu interface
- virtual bool fetch(u32 address, u16 &data, rsc_mode const mode = RSC_N) = 0;
- virtual bool translate(u32 &address) const = 0;
+ virtual bool fetch(offs_t address, u16 &data, rsc_mode const mode = RSC_N) = 0;
+ virtual bool translate(offs_t &address) const = 0;
// rsc_bus_interface overrides
- virtual bool mem_load(u32 address, u8 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
- virtual bool mem_load(u32 address, u16 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
- virtual bool mem_load(u32 address, u32 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_load(offs_t address, u8 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_load(offs_t address, u16 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_load(offs_t address, u32 &data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
- virtual bool mem_store(u32 address, u8 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
- virtual bool mem_store(u32 address, u16 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
- virtual bool mem_store(u32 address, u32 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_store(offs_t address, u8 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_store(offs_t address, u16 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
+ virtual bool mem_store(offs_t address, u32 data, rsc_mode const mode = RSC_N, bool sp = true) override = 0;
};
#endif // MAME_CPU_ROMP_RSC_H
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index 5039686a7c7..95230c3f9fc 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -481,7 +481,7 @@ void adsp21062_device::build_opcode_table()
/*****************************************************************************/
-void adsp21062_device::external_iop_write(uint32_t address, uint32_t data)
+void adsp21062_device::external_iop_write(offs_t address, uint32_t data)
{
// host packing mode used to determine width of external host bus width (16/32)
// if writing to external port DMA buffer, just write the data directly;
@@ -514,7 +514,7 @@ void adsp21062_device::external_iop_write(uint32_t address, uint32_t data)
}
}
-void adsp21062_device::external_dma_write(uint32_t address, uint64_t data)
+void adsp21062_device::external_dma_write(offs_t address, uint64_t data)
{
/*
All addresses in the 17-bit index registers are offset by 0x0002 0000, the
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index 6faf7ac3835..f78c7e11fde 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -35,8 +35,8 @@ public:
void set_boot_mode(const sharc_boot_mode boot_mode) { m_boot_mode = boot_mode; }
void enable_recompiler();
- void external_iop_write(uint32_t address, uint32_t data);
- void external_dma_write(uint32_t address, uint64_t data);
+ void external_iop_write(offs_t address, uint32_t data);
+ void external_dma_write(offs_t address, uint64_t data);
void set_flag_input(int flag_num, int state);
void write_stall(int state);
diff --git a/src/devices/cpu/sparc/sparc_intf.h b/src/devices/cpu/sparc/sparc_intf.h
index f84219be8fd..7f004ed6c45 100644
--- a/src/devices/cpu/sparc/sparc_intf.h
+++ b/src/devices/cpu/sparc/sparc_intf.h
@@ -22,7 +22,7 @@ class sparc_mmu_interface
{
public:
virtual ~sparc_mmu_interface() { }
- virtual uint32_t fetch_insn(const bool supervisor, const uint32_t offset) = 0;
+ virtual uint32_t fetch_insn(const bool supervisor, const offs_t offset) = 0;
virtual void set_host(sparc_mmu_host_interface *host) = 0;
};
diff --git a/src/devices/machine/mc88200.cpp b/src/devices/machine/mc88200.cpp
index ecfdf5d6517..b7d33afea16 100644
--- a/src/devices/machine/mc88200.cpp
+++ b/src/devices/machine/mc88200.cpp
@@ -410,7 +410,7 @@ void mc88200_device::cssp_w(u32 data)
}
// abbreviated, side-effect free address translation for debugger
-bool mc88200_device::translate(int intention, u32 &address, bool supervisor)
+bool mc88200_device::translate(int intention, offs_t &address, bool supervisor)
{
// select area descriptor
u32 const apr = supervisor ? m_sapr : m_uapr;
@@ -460,7 +460,7 @@ bool mc88200_device::translate(int intention, u32 &address, bool supervisor)
return true;
}
-std::optional<mc88200_device::translate_result> mc88200_device::translate(u32 virtual_address, bool supervisor, bool write)
+std::optional<mc88200_device::translate_result> mc88200_device::translate(offs_t virtual_address, bool supervisor, bool write)
{
// select area descriptor
u32 const apr = supervisor ? m_sapr : m_uapr;
@@ -658,17 +658,17 @@ bool mc88200_device::cache_set::enabled(unsigned const line) const
return !BIT(status, 20 + line);
}
-bool mc88200_device::cache_set::cache_line::match_segment(u32 const address) const
+bool mc88200_device::cache_set::cache_line::match_segment(offs_t const address) const
{
return BIT(tag, 22, 10) == BIT(address, 22, 10);
}
-bool mc88200_device::cache_set::cache_line::match_page(u32 const address) const
+bool mc88200_device::cache_set::cache_line::match_page(offs_t const address) const
{
return BIT(tag, 12, 20) == BIT(address, 12, 20);
}
-bool mc88200_device::cache_set::cache_line::load_line(mc88200_device &cmmu, u32 const address)
+bool mc88200_device::cache_set::cache_line::load_line(mc88200_device &cmmu, offs_t const address)
{
for (unsigned i = 0; i < 4; i++)
{
@@ -683,7 +683,7 @@ bool mc88200_device::cache_set::cache_line::load_line(mc88200_device &cmmu, u32
return true;
}
-bool mc88200_device::cache_set::cache_line::copy_back(mc88200_device &cmmu, u32 const address, bool const flush)
+bool mc88200_device::cache_set::cache_line::copy_back(mc88200_device &cmmu, offs_t const address, bool const flush)
{
for (unsigned i = 0; i < 4; i++)
if (!cmmu.mbus_write(address | i * 4, data[i], flush))
@@ -757,13 +757,13 @@ void mc88200_device::cache_flush(unsigned const start, unsigned const limit, mat
}
}
-template <typename T> std::optional<T> mc88200_device::read(u32 virtual_address, bool supervisor)
+template <typename T> std::optional<T> mc88200_device::read(offs_t virtual_address, bool supervisor)
{
std::optional<mc88200_device::translate_result> result = translate(virtual_address, supervisor, false);
if (!result.has_value())
return std::nullopt;
- u32 const physical_address = result.value().address;
+ offs_t const physical_address = result.value().address;
if (!result.value().ci)
{
unsigned const s = BIT(physical_address, 4, 8);
@@ -830,13 +830,13 @@ template <typename T> std::optional<T> mc88200_device::read(u32 virtual_address,
return mbus_read<T>(physical_address);
}
-template <typename T> bool mc88200_device::write(u32 virtual_address, T data, bool supervisor)
+template <typename T> bool mc88200_device::write(offs_t virtual_address, T data, bool supervisor)
{
std::optional<mc88200_device::translate_result> result = translate(virtual_address, supervisor, true);
if (!result.has_value())
return false;
- u32 const physical_address = result.value().address;
+ offs_t const physical_address = result.value().address;
if (!result.value().ci)
{
unsigned const s = BIT(physical_address, 4, 8);
@@ -928,15 +928,15 @@ template <typename T> bool mc88200_device::write(u32 virtual_address, T data, bo
return mbus_write(result.value().address, data);
}
-template std::optional<u8> mc88200_device::read(u32 virtual_address, bool supervisor);
-template std::optional<u16> mc88200_device::read(u32 virtual_address, bool supervisor);
-template std::optional<u32> mc88200_device::read(u32 virtual_address, bool supervisor);
+template std::optional<u8> mc88200_device::read(offs_t virtual_address, bool supervisor);
+template std::optional<u16> mc88200_device::read(offs_t virtual_address, bool supervisor);
+template std::optional<u32> mc88200_device::read(offs_t virtual_address, bool supervisor);
-template bool mc88200_device::write(u32 virtual_address, u8 data, bool supervisor);
-template bool mc88200_device::write(u32 virtual_address, u16 data, bool supervisor);
-template bool mc88200_device::write(u32 virtual_address, u32 data, bool supervisor);
+template bool mc88200_device::write(offs_t virtual_address, u8 data, bool supervisor);
+template bool mc88200_device::write(offs_t virtual_address, u16 data, bool supervisor);
+template bool mc88200_device::write(offs_t virtual_address, u32 data, bool supervisor);
-template <typename T> std::optional<T> mc88200_device::mbus_read(u32 address)
+template <typename T> std::optional<T> mc88200_device::mbus_read(offs_t address)
{
std::optional<T> data;
@@ -962,7 +962,7 @@ template <typename T> std::optional<T> mc88200_device::mbus_read(u32 address)
return data;
}
-template <typename T> bool mc88200_device::mbus_write(u32 address, T data, bool flush)
+template <typename T> bool mc88200_device::mbus_write(offs_t address, T data, bool flush)
{
m_bus_error = false;
diff --git a/src/devices/machine/mc88200.h b/src/devices/machine/mc88200.h
index ecf5f541c2b..e5f0d955c63 100644
--- a/src/devices/machine/mc88200.h
+++ b/src/devices/machine/mc88200.h
@@ -14,10 +14,10 @@ public:
template <typename T> void set_mbus(T &&tag, int spacenum) { m_mbus.set_tag(std::forward<T>(tag), spacenum); }
- bool translate(int intention, u32 &address, bool supervisor);
+ bool translate(int intention, offs_t &address, bool supervisor);
- template <typename T> std::optional<T> read(u32 virtual_address, bool supervisor);
- template <typename T> bool write(u32 virtual_address, T data, bool supervisor);
+ template <typename T> std::optional<T> read(offs_t virtual_address, bool supervisor);
+ template <typename T> bool write(offs_t virtual_address, T data, bool supervisor);
void bus_error_w(int state) { if (!machine().side_effects_disabled()) m_bus_error = true; }
protected:
@@ -59,19 +59,19 @@ protected:
struct translate_result
{
- translate_result(u32 address, bool ci, bool g, bool wt)
+ translate_result(offs_t address, bool ci, bool g, bool wt)
: address(address)
, ci(ci)
, g(g)
, wt(wt)
{}
- u32 const address;
+ offs_t const address;
bool const ci; // cache inhibit
bool const g; // global
bool const wt; // writethrough
};
- std::optional<translate_result> translate(u32 virtual_address, bool supervisor, bool write);
+ std::optional<translate_result> translate(offs_t virtual_address, bool supervisor, bool write);
struct cache_set
{
@@ -92,24 +92,24 @@ protected:
struct cache_line
{
- bool match_segment(u32 const address) const;
- bool match_page(u32 const address) const;
+ bool match_segment(offs_t const address) const;
+ bool match_page(offs_t const address) const;
- bool load_line(mc88200_device &cmmu, u32 const address);
- bool copy_back(mc88200_device &cmmu, u32 const address, bool const flush = false);
+ bool load_line(mc88200_device &cmmu, offs_t const address);
+ bool copy_back(mc88200_device &cmmu, offs_t const address, bool const flush = false);
u32 tag;
u32 data[4];
}
line[4];
};
- typedef bool (mc88200_device::cache_set::cache_line::* match_function)(u32 const) const;
+ typedef bool (mc88200_device::cache_set::cache_line::* match_function)(offs_t const) const;
std::optional<unsigned> cache_replace(cache_set const &cs);
void cache_flush(unsigned const start, unsigned const limit, match_function match, bool const copyback, bool const invalidate);
- template <typename T> std::optional<T> mbus_read(u32 address);
- template <typename T> bool mbus_write(u32 address, T data, bool flush = false);
+ template <typename T> std::optional<T> mbus_read(offs_t address);
+ template <typename T> bool mbus_write(offs_t address, T data, bool flush = false);
private:
required_address_space m_mbus;
diff --git a/src/devices/machine/ns32082.cpp b/src/devices/machine/ns32082.cpp
index ffe2f645274..e8d19a9be35 100644
--- a/src/devices/machine/ns32082.cpp
+++ b/src/devices/machine/ns32082.cpp
@@ -374,7 +374,7 @@ void ns32082_device::set_msr(u32 data)
m_msr = (m_msr & ~MSR_WM) | (data & MSR_WM);
}
-ns32082_device::translate_result ns32082_device::translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool pfs, bool suppress)
+ns32082_device::translate_result ns32082_device::translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool pfs, bool suppress)
{
// update program flow trace state
if (pfs && (m_msr & MSR_FT))
@@ -382,7 +382,7 @@ ns32082_device::translate_result ns32082_device::translate(address_space &space,
if (st == ns32000::ST_NIF)
{
m_pf[1] = m_pf[0];
- m_pf[0] = address;
+ m_pf[0] = (u32)address;
m_sc = m_sc << 16;
}
diff --git a/src/devices/machine/ns32082.h b/src/devices/machine/ns32082.h
index b92be3bf8b5..702e2aa3ae2 100644
--- a/src/devices/machine/ns32082.h
+++ b/src/devices/machine/ns32082.h
@@ -25,7 +25,7 @@ public:
virtual void slow_write(u16 data) override;
// ns32000_mmu_interface implementation
- virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool pfs = false, bool suppress = false) override;
+ virtual translate_result translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool pfs = false, bool suppress = false) override;
protected:
// device_t implementation
diff --git a/src/devices/machine/ns32382.cpp b/src/devices/machine/ns32382.cpp
index d801342a102..5b05a0d51b3 100644
--- a/src/devices/machine/ns32382.cpp
+++ b/src/devices/machine/ns32382.cpp
@@ -330,7 +330,7 @@ void ns32382_device::execute()
m_state = STATUS;
}
-ns32382_device::translate_result ns32382_device::translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool pfs, bool debug)
+ns32382_device::translate_result ns32382_device::translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool pfs, bool debug)
{
// check translation required
if ((!(m_mcr & MCR_TU) && user) || (!(m_mcr & MCR_TS) && !user))
@@ -347,8 +347,8 @@ ns32382_device::translate_result ns32382_device::translate(address_space &space,
m_msr &= ~(MSR_STT | MSR_UST | MSR_DDT | MSR_TEX);
// read level 1 page table entry
- u32 const pte1_address = m_ptb[address_space] | ((address & VA_INDEX1) >> 20);
- u32 const pte1 = space.read_dword(pte1_address);
+ offs_t const pte1_address = m_ptb[address_space] | ((address & VA_INDEX1) >> 20);
+ offs_t const pte1 = space.read_dword(pte1_address);
LOGMASKED(LOG_TRANSLATE, "translate level 1 page table address 0x%06x entry 0x%08x\n", pte1_address, pte1);
if (access_level > (pte1 & PTE_PL) || !(pte1 & PTE_V))
@@ -386,8 +386,8 @@ ns32382_device::translate_result ns32382_device::translate(address_space &space,
space.write_dword(pte1_address, pte1 | PTE_R);
// read level 2 page table entry
- u32 const pte2_address = (pte1 & PTE_PFN) | ((address & VA_INDEX2) >> 10);
- u32 const pte2 = space.read_dword(pte2_address);
+ offs_t const pte2_address = (pte1 & PTE_PFN) | ((address & VA_INDEX2) >> 10);
+ offs_t const pte2 = space.read_dword(pte2_address);
LOGMASKED(LOG_TRANSLATE, "translate level 2 page table address 0x%06x entry 0x%08x\n", pte2_address, pte2);
if (access_level > (pte2 & PTE_PL) || !(pte2 & PTE_V))
diff --git a/src/devices/machine/ns32382.h b/src/devices/machine/ns32382.h
index edf44ebf13e..261d2779d63 100644
--- a/src/devices/machine/ns32382.h
+++ b/src/devices/machine/ns32382.h
@@ -25,7 +25,7 @@ public:
virtual void fast_write(u32 data) override;
// ns32000_mmu_interface implementation
- virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool pfs = false, bool debug = false) override;
+ virtual translate_result translate(address_space &space, unsigned st, offs_t &address, bool user, bool write, bool pfs = false, bool debug = false) override;
protected:
// device_t implementation
diff --git a/src/devices/machine/sun4c_mmu.cpp b/src/devices/machine/sun4c_mmu.cpp
index 55ce5a07ce5..669772de0d7 100644
--- a/src/devices/machine/sun4c_mmu.cpp
+++ b/src/devices/machine/sun4c_mmu.cpp
@@ -194,7 +194,7 @@ TIMER_CALLBACK_MEMBER(sun4_mmu_base_device::reset_off_tick)
m_cpu->set_input_line(SPARC_RESET, CLEAR_LINE);
}
-uint32_t sun4_mmu_base_device::fetch_insn(const bool supervisor, const uint32_t offset)
+uint32_t sun4_mmu_base_device::fetch_insn(const bool supervisor, const offs_t offset)
{
if (supervisor)
return insn_data_r<SUPER_INSN>(offset, 0xffffffff);
@@ -202,56 +202,56 @@ uint32_t sun4_mmu_base_device::fetch_insn(const bool supervisor, const uint32_t
return insn_data_r<USER_INSN>(offset, 0xffffffff);
}
-void sun4_mmu_base_device::segment_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::segment_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_SEGMENT_FLUSH, "%s: segment_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::page_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::page_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_PAGE_FLUSH, "%s: page_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::context_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::context_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_CONTEXT_FLUSH, "%s: context_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::hw_segment_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::hw_segment_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_SEGMENT_FLUSH, "%s: segment_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::hw_page_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::hw_page_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_PAGE_FLUSH, "%s: page_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::hw_context_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::hw_context_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_CONTEXT_FLUSH, "%s: context_flush_w %08x & %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-void sun4_mmu_base_device::hw_flush_all_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::hw_flush_all_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Do nothing for now
LOGMASKED(LOG_ALL_FLUSH, "%s: hw_flush_all_w %08x = %08x: %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
-uint32_t sun4_mmu_base_device::context_reg_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::context_reg_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t data = m_context << (mem_mask == 0x00ff0000 ? 16 : 24);
LOGMASKED(LOG_CONTEXT, "%s: context_reg_r %08x & %08x: %08x\n", machine().describe_context(), offset << 2, mem_mask, data);
return data;
}
-void sun4_mmu_base_device::context_reg_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::context_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_CONTEXT, "%s: context_reg_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
m_context = data >> 24;
@@ -261,14 +261,14 @@ void sun4_mmu_base_device::context_reg_w(uint32_t offset, uint32_t data, uint32_
m_curr_segmap_masked = &m_segmap_masked[m_context_masked][0];
}
-uint32_t sun4_mmu_base_device::system_enable_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::system_enable_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t data = m_system_enable << 24;
LOGMASKED(LOG_SYSTEM_ENABLE, "%s: system_enable_r %08x & %08x: %08x\n", machine().describe_context(), offset << 2, mem_mask, data);
return data;
}
-void sun4_mmu_base_device::system_enable_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::system_enable_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_SYSTEM_ENABLE, "%s: system_enable_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
m_system_enable = data >> 24;
@@ -287,7 +287,7 @@ void sun4_mmu_base_device::system_enable_w(uint32_t offset, uint32_t data, uint3
}
}
-uint32_t sun4_mmu_base_device::bus_error_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::bus_error_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t data = m_buserr[offset & 0xf];
LOGMASKED(LOG_BUSERROR, "%s: bus_error_r %08x & %08x: %08x\n", machine().describe_context(), 0x60000000 | (offset << 2), mem_mask, data);
@@ -295,7 +295,7 @@ uint32_t sun4_mmu_base_device::bus_error_r(uint32_t offset, uint32_t mem_mask)
return data;
}
-void sun4_mmu_base_device::bus_error_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::bus_error_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
const uint32_t masked_offset = offset & 0xf;
LOGMASKED(LOG_BUSERROR, "%s: bus_error_w: %08x = %08x & %08x\n", machine().describe_context(), 0x60000000 | (offset << 2), data, mem_mask);
@@ -309,33 +309,33 @@ void sun4_mmu_base_device::bus_error_w(uint32_t offset, uint32_t data, uint32_t
m_buserr[3] = (data & 0x3fffffff) | ((data & 0x20000000) << 1) | ((data & 0x20000000) << 2);
}
-uint32_t sun4_mmu_base_device::cache_tag_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::cache_tag_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t data = m_cachetags[offset & m_cache_mask];
LOGMASKED(LOG_CACHE_TAGS, "%s: cache_tag_r %08x & %08x: %08x\n", machine().describe_context(), offset, mem_mask, data);
return data;
}
-void sun4_mmu_base_device::cache_tag_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::cache_tag_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_CACHE_TAGS, "%s: cache_tag_w: %08x = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask);
m_cachetags[offset & m_cache_mask] = data & 0x03f8fffc;
}
-uint32_t sun4_mmu_base_device::cache_data_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::cache_data_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t data = m_cachedata[offset & m_cache_mask];
LOGMASKED(LOG_CACHE_DATA, "%s: cache_data_r %08x & %08x: %08x\n", machine().describe_context(), offset, mem_mask, data);
return data;
}
-void sun4_mmu_base_device::cache_data_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::cache_data_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_CACHE_DATA, "%s: cache_data_w: %08x = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask);
m_cachedata[offset & m_cache_mask] = data | (1 << 19);
}
-uint32_t sun4_mmu_base_device::uart_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::uart_r(offs_t offset, uint32_t mem_mask)
{
uint32_t data = 0xffffffff;
switch (offset & 3)
@@ -357,7 +357,7 @@ uint32_t sun4_mmu_base_device::uart_r(uint32_t offset, uint32_t mem_mask)
return data;
}
-void sun4_mmu_base_device::uart_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::uart_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_UART, "%s: uart_w: %08x = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask);
switch (offset & 3)
@@ -383,7 +383,7 @@ void sun4_mmu_base_device::uart_w(uint32_t offset, uint32_t data, uint32_t mem_m
}
}
-uint32_t sun4_mmu_base_device::segment_map_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::segment_map_r(offs_t offset, uint32_t mem_mask)
{
uint32_t data = 0;
if (mem_mask == 0xffff0000)
@@ -398,7 +398,7 @@ uint32_t sun4_mmu_base_device::segment_map_r(uint32_t offset, uint32_t mem_mask)
return data;
}
-void sun4_mmu_base_device::segment_map_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::segment_map_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGMASKED(LOG_SEGMENT_MAP, "%s: segment_map_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
@@ -417,7 +417,7 @@ void sun4_mmu_base_device::segment_map_w(uint32_t offset, uint32_t data, uint32_
m_curr_segmap_masked[seg] = (segdata & m_pmeg_mask) << 6;
}
-uint32_t sun4_mmu_base_device::page_map_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::page_map_r(offs_t offset, uint32_t mem_mask)
{
const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> m_seg_entry_shift) & m_seg_entry_mask);
const uint32_t data = page_entry_to_uint(page);
@@ -425,7 +425,7 @@ uint32_t sun4_mmu_base_device::page_map_r(uint32_t offset, uint32_t mem_mask)
return data;
}
-void sun4_mmu_base_device::page_map_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::page_map_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> m_seg_entry_shift) & m_seg_entry_mask);
LOGMASKED(LOG_PAGE_MAP, "%s: page_map_w: %08x (%x) = %08x & %08x\n", machine().describe_context(), offset << 2, page, data, mem_mask);
@@ -433,7 +433,7 @@ void sun4_mmu_base_device::page_map_w(uint32_t offset, uint32_t data, uint32_t m
m_page_valid[page] = m_pagemap[page].valid;
}
-void sun4_mmu_base_device::type0_timeout_r(const uint32_t offset)
+void sun4_mmu_base_device::type0_timeout_r(const offs_t offset)
{
LOGMASKED(LOG_TYPE0_TIMEOUT, "%s: type0_timeout_r (%08x)\n", machine().describe_context(), offset << 2);
m_buserr[0] = 0x20; // read timeout
@@ -441,7 +441,7 @@ void sun4_mmu_base_device::type0_timeout_r(const uint32_t offset)
m_host->set_mae();
}
-void sun4_mmu_base_device::type0_timeout_w(const uint32_t offset)
+void sun4_mmu_base_device::type0_timeout_w(const offs_t offset)
{
LOGMASKED(LOG_TYPE0_TIMEOUT, "%s: type0_timeout_w (%08x)\n", machine().describe_context(), offset << 2);
m_buserr[0] = 0x8020; // write timeout
@@ -449,7 +449,7 @@ void sun4_mmu_base_device::type0_timeout_w(const uint32_t offset)
m_host->set_mae();
}
-uint32_t sun4_mmu_base_device::type1_timeout_r(uint32_t offset)
+uint32_t sun4_mmu_base_device::type1_timeout_r(offs_t offset)
{
LOGMASKED(LOG_TYPE1_TIMEOUT, "%s: type1_timeout_r (%08x)\n", machine().describe_context(), offset << 2);
m_buserr[2] = 0x20; // read timeout
@@ -457,14 +457,14 @@ uint32_t sun4_mmu_base_device::type1_timeout_r(uint32_t offset)
return 0;
}
-void sun4_mmu_base_device::type1_timeout_w(uint32_t offset, uint32_t data)
+void sun4_mmu_base_device::type1_timeout_w(offs_t offset, uint32_t data)
{
LOGMASKED(LOG_TYPE1_TIMEOUT, "%s: type1_timeout_w (%08x)\n", machine().describe_context(), offset << 2);
m_buserr[2] = 0x120; // write timeout
m_buserr[3] = m_type1_offset << 2;
}
-uint32_t sun4_mmu_base_device::parity_r(uint32_t offset, uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::parity_r(offs_t offset, uint32_t mem_mask)
{
uint32_t data = 0;
if (offset == 0)
@@ -481,7 +481,7 @@ uint32_t sun4_mmu_base_device::parity_r(uint32_t offset, uint32_t mem_mask)
return data;
}
-void sun4_mmu_base_device::parity_w(uint32_t offset, uint32_t data, uint32_t mem_mask)
+void sun4_mmu_base_device::parity_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (offset == 0)
{
@@ -515,13 +515,13 @@ void sun4_mmu_base_device::merge_page_entry(uint32_t index, uint32_t data, uint3
pe.page = (new_value & m_page_entry_mask) << m_seg_entry_shift;
}
-template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::USER_INSN>(const uint32_t, const uint32_t);
-template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::SUPER_INSN>(const uint32_t, const uint32_t);
-template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::USER_DATA>(const uint32_t, const uint32_t);
-template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::SUPER_DATA>(const uint32_t, const uint32_t);
+template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::USER_INSN>(const offs_t, const uint32_t);
+template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::SUPER_INSN>(const offs_t, const uint32_t);
+template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::USER_DATA>(const offs_t, const uint32_t);
+template uint32_t sun4_mmu_base_device::insn_data_r<sun4_mmu_base_device::SUPER_DATA>(const offs_t, const uint32_t);
template <sun4_mmu_base_device::insn_data_mode MODE>
-uint32_t sun4_mmu_base_device::insn_data_r(const uint32_t offset, const uint32_t mem_mask)
+uint32_t sun4_mmu_base_device::insn_data_r(const offs_t offset, const uint32_t mem_mask)
{
// supervisor program fetches in boot state are special
if (MODE == SUPER_INSN && m_fetch_bootrom)
@@ -597,13 +597,13 @@ uint32_t sun4_mmu_base_device::insn_data_r(const uint32_t offset, const uint32_t
}
}
-template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::USER_INSN>(const uint32_t, const uint32_t, const uint32_t);
-template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::SUPER_INSN>(const uint32_t, const uint32_t, const uint32_t);
-template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::USER_DATA>(const uint32_t, const uint32_t, const uint32_t);
-template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::SUPER_DATA>(const uint32_t, const uint32_t, const uint32_t);
+template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::USER_INSN>(const offs_t, const uint32_t, const uint32_t);
+template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::SUPER_INSN>(const offs_t, const uint32_t, const uint32_t);
+template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::USER_DATA>(const offs_t, const uint32_t, const uint32_t);
+template void sun4_mmu_base_device::insn_data_w<sun4_mmu_base_device::SUPER_DATA>(const offs_t, const uint32_t, const uint32_t);
template <sun4_mmu_base_device::insn_data_mode MODE>
-void sun4_mmu_base_device::insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask)
+void sun4_mmu_base_device::insn_data_w(const offs_t offset, const uint32_t data, const uint32_t mem_mask)
{
// it's translation time
const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask;
diff --git a/src/devices/machine/sun4c_mmu.h b/src/devices/machine/sun4c_mmu.h
index 423d866ec80..6689a9cf7e0 100644
--- a/src/devices/machine/sun4c_mmu.h
+++ b/src/devices/machine/sun4c_mmu.h
@@ -58,43 +58,43 @@ public:
SUPER_DATA
};
- template <insn_data_mode MODE> uint32_t insn_data_r(const uint32_t offset, const uint32_t mem_mask);
- template <insn_data_mode MODE> void insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask);
+ template <insn_data_mode MODE> uint32_t insn_data_r(const offs_t offset, const uint32_t mem_mask);
+ template <insn_data_mode MODE> void insn_data_w(const offs_t offset, const uint32_t data, const uint32_t mem_mask);
- uint32_t type1_timeout_r(uint32_t offset);
- void type1_timeout_w(uint32_t offset, uint32_t data);
- uint32_t parity_r(uint32_t offset, uint32_t mem_mask);
- void parity_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t type1_timeout_r(offs_t offset);
+ void type1_timeout_w(offs_t offset, uint32_t data);
+ uint32_t parity_r(offs_t offset, uint32_t mem_mask);
+ void parity_w(offs_t offset, uint32_t data, uint32_t mem_mask);
// sparc_mmu_interface overrides
- uint32_t fetch_insn(const bool supervisor, const uint32_t offset) override;
+ uint32_t fetch_insn(const bool supervisor, const offs_t offset) override;
void set_host(sparc_mmu_host_interface *host) override { m_host = host; }
- uint32_t context_reg_r(uint32_t offset, uint32_t mem_mask);
- void context_reg_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t system_enable_r(uint32_t offset, uint32_t mem_mask);
- void system_enable_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t bus_error_r(uint32_t offset, uint32_t mem_mask);
- void bus_error_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t cache_tag_r(uint32_t offset, uint32_t mem_mask);
- void cache_tag_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t cache_data_r(uint32_t offset, uint32_t mem_mask);
- void cache_data_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t uart_r(uint32_t offset, uint32_t mem_mask);
- void uart_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t segment_map_r(uint32_t offset, uint32_t mem_mask);
- void segment_map_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- uint32_t page_map_r(uint32_t offset, uint32_t mem_mask);
- void page_map_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
-
- void segment_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- void page_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- void context_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
-
- void hw_segment_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- void hw_page_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- void hw_context_flush_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
- void hw_flush_all_w(uint32_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t context_reg_r(offs_t offset, uint32_t mem_mask);
+ void context_reg_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t system_enable_r(offs_t offset, uint32_t mem_mask);
+ void system_enable_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t bus_error_r(offs_t offset, uint32_t mem_mask);
+ void bus_error_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t cache_tag_r(offs_t offset, uint32_t mem_mask);
+ void cache_tag_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t cache_data_r(offs_t offset, uint32_t mem_mask);
+ void cache_data_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t uart_r(offs_t offset, uint32_t mem_mask);
+ void uart_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t segment_map_r(offs_t offset, uint32_t mem_mask);
+ void segment_map_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t page_map_r(offs_t offset, uint32_t mem_mask);
+ void page_map_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ void segment_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void page_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void context_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ void hw_segment_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void hw_page_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void hw_context_flush_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void hw_flush_all_w(offs_t offset, uint32_t data, uint32_t mem_mask);
protected:
sun4_mmu_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -107,8 +107,8 @@ protected:
uint32_t page_entry_to_uint(uint32_t index);
void merge_page_entry(uint32_t index, uint32_t data, uint32_t mem_mask);
- void type0_timeout_r(const uint32_t offset);
- void type0_timeout_w(const uint32_t offset);
+ void type0_timeout_r(const offs_t offset);
+ void type0_timeout_w(const offs_t offset);
void l2p_command(const std::vector<std::string_view> &params);
enum
diff --git a/src/emu/debug/debugcon.cpp b/src/emu/debug/debugcon.cpp
index 8f4ad708a95..663f21598fe 100644
--- a/src/emu/debug/debugcon.cpp
+++ b/src/emu/debug/debugcon.cpp
@@ -659,14 +659,6 @@ bool debugger_console::validate_number_parameter(std::string_view param, u64 &re
}
}
-bool debugger_console::validate_number_parameter(std::string_view param, offs_t &result)
-{
- u64 res;
- bool ret = validate_number_parameter(param, res);
- result = res;
- return ret;
-}
-
/// \brief Validate parameter as a device
///
diff --git a/src/emu/debug/debugcon.h b/src/emu/debug/debugcon.h
index b0c4bf6dbe8..ca22a941e4c 100644
--- a/src/emu/debug/debugcon.h
+++ b/src/emu/debug/debugcon.h
@@ -117,7 +117,6 @@ public:
// validates a parameter as a numeric value
bool validate_number_parameter(std::string_view param, u64 &result);
- bool validate_number_parameter(std::string_view param, offs_t &result);
// validates a parameter as a device
bool validate_device_parameter(std::string_view param, device_t *&result);
diff --git a/src/emu/debug/express.h b/src/emu/debug/express.h
index f5a1b685a64..703315e763a 100644
--- a/src/emu/debug/express.h
+++ b/src/emu/debug/express.h
@@ -51,7 +51,7 @@ enum expression_space
// TYPE DEFINITIONS
//**************************************************************************
-using offs_t = u32;
+using offs_t = u64;
// ======================> expression_error
diff --git a/src/emu/emumem.h b/src/emu/emumem.h
index 8020d56d67f..572a9ca38a3 100644
--- a/src/emu/emumem.h
+++ b/src/emu/emumem.h
@@ -68,8 +68,8 @@ template<int Width, int AddrShift> class handler_entry_write_passthrough;
// TYPE DEFINITIONS
//**************************************************************************
-// offsets and addresses are 32-bit (for now...)
-using offs_t = u32;
+// offsets and addresses are 64-bit
+using offs_t = u64;
// address map constructors are delegates that build up an address_map
using address_map_constructor = named_delegate<void (address_map &)>;
diff --git a/src/lib/util/disasmintf.h b/src/lib/util/disasmintf.h
index 562ba5de00a..2ea5a448193 100644
--- a/src/lib/util/disasmintf.h
+++ b/src/lib/util/disasmintf.h
@@ -33,7 +33,7 @@ public:
using s16 = osd::s16;
using s32 = osd::s32;
using s64 = osd::s64;
- using offs_t = u32;
+ using offs_t = u64;
// Disassembler constants for the return value
static constexpr u32 SUPPORTED = 0x80000000; // are disassembly flags supported?
diff --git a/src/mame/exidy/exidy440_a.cpp b/src/mame/exidy/exidy440_a.cpp
index 127e6d49be2..6b0c8464dbe 100644
--- a/src/mame/exidy/exidy440_a.cpp
+++ b/src/mame/exidy/exidy440_a.cpp
@@ -14,10 +14,12 @@
#include "cpu/m6809/m6809.h"
+#define LOG_SOUND (1U << 1)
-#define SOUND_LOG 0
-#define FADE_TO_ZERO 1
+//#define VERBOSE (LOG_SOUND)
+#include "logmacro.h"
+#define FADE_TO_ZERO 1
/* internal caching */
#define SAMPLE_BUFFER_LENGTH 1024 /* size of temporary decode buffer on the stack */
@@ -141,19 +143,6 @@ void exidy440_sound_device::device_start()
/* allocate the mixer buffer */
m_mixer_buffer_left.resize(clock());
m_mixer_buffer_right.resize(clock());
-
- if (SOUND_LOG)
- m_debuglog = fopen("sound.log", "w");
-}
-
-//-------------------------------------------------
-// device_stop - device-specific stop
-//-------------------------------------------------
-
-void exidy440_sound_device::device_stop()
-{
- if (SOUND_LOG && m_debuglog)
- fclose(m_debuglog);
}
/*************************************
@@ -261,8 +250,7 @@ uint8_t exidy440_sound_device::sound_volume_r(offs_t offset)
void exidy440_sound_device::sound_volume_w(offs_t offset, uint8_t data)
{
- if (SOUND_LOG && m_debuglog)
- fprintf(m_debuglog, "Volume %02X=%02X\n", offset, data);
+ LOGMASKED(LOG_SOUND, "Volume %02X=%02X\n", offset, data);
/* update the stream */
m_stream->update();
@@ -589,11 +577,10 @@ void exidy440_sound_device::play_cvsd(int ch)
return;
}
- if (SOUND_LOG && m_debuglog)
- fprintf(m_debuglog, "Sound channel %d play at %02X,%04X, length = %04X, volume = %02X/%02X\n",
- ch, m_sound_banks[ch],
- m_m6844_channel[ch].address, m_m6844_channel[ch].counter,
- m_sound_volume[ch * 2], m_sound_volume[ch * 2 + 1]);
+ LOGMASKED(LOG_SOUND, "Sound channel %d play at %02X,%04X, length = %04X, volume = %02X/%02X\n",
+ ch, m_sound_banks[ch],
+ m_m6844_channel[ch].address, m_m6844_channel[ch].counter,
+ m_sound_volume[ch * 2], m_sound_volume[ch * 2 + 1]);
/* set the pointer and count */
channel->base = base;
@@ -611,8 +598,7 @@ void exidy440_sound_device::stop_cvsd(int ch)
m_sound_channel[ch].remaining = 0;
m_stream->update();
- if (SOUND_LOG && m_debuglog)
- fprintf(m_debuglog, "Channel %d stop\n", ch);
+ LOGMASKED(LOG_SOUND, "Channel %d stop\n", ch);
}
@@ -830,8 +816,7 @@ void exidy440_sound_device::sound_stream_update(sound_stream &stream)
m_m6844_channel[ch].counter = m_m6844_channel[ch].start_counter - effective_offset / 8;
if (m_m6844_channel[ch].counter <= 0)
{
- if (SOUND_LOG && m_debuglog)
- fprintf(m_debuglog, "Channel %d finished\n", ch);
+ LOGMASKED(LOG_SOUND, "Channel %d finished\n", ch);
m6844_finished(&m_m6844_channel[ch]);
}
}
diff --git a/src/mame/exidy/exidy440_a.h b/src/mame/exidy/exidy440_a.h
index 3f25bd7d451..9de6d644154 100644
--- a/src/mame/exidy/exidy440_a.h
+++ b/src/mame/exidy/exidy440_a.h
@@ -26,7 +26,6 @@ protected:
// device-level overrides
virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void device_start() override ATTR_COLD;
- virtual void device_stop() override ATTR_COLD;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream) override;
@@ -86,9 +85,6 @@ private:
sound_stream *m_stream;
sound_channel_data m_sound_channel[4];
- /* debugging */
- FILE *m_debuglog;
-
/* channel frequency is configurable */
int m_channel_frequency[4];
diff --git a/src/mame/funworld/funworld.cpp b/src/mame/funworld/funworld.cpp
index 49b7a15cfc9..2d768cebd65 100644
--- a/src/mame/funworld/funworld.cpp
+++ b/src/mame/funworld/funworld.cpp
@@ -3562,7 +3562,7 @@ uint8_t royalcrdf_state::royalcrdf_opcode_r(offs_t offset)
if(offset < 0x800)
data = bitswap<8>(data ^ 0x22, 2, 6, 7, 4, 3, 1, 5, 0);
- unsigned idx {bitswap<4>(offset, 8, 5, 2, 1)};
+ u64 idx = bitswap<4>(offset, 8, 5, 2, 1);
return bitswap<8>(data, bs[idx][3], 6, bs[idx][2], 4, 3, bs[idx][1], bs[idx][0], 0) ^ xm[idx];
}
@@ -3623,7 +3623,7 @@ uint8_t multiwin_state::multiwin_opcode_r(offs_t offset)
};
uint8_t data {m_maincpu->space(AS_PROGRAM).read_byte(offset)};
- unsigned idx {bitswap<4>(offset, 6,9,5,3)};
+ u64 idx = bitswap<4>(offset, 6,9,5,3);
return bitswap<8>(data, bs[idx&7][4],6,bs[idx&7][3],bs[idx&7][2],3,bs[idx&7][1],1,bs[idx&7][0]) ^ xm[idx];
}
diff --git a/src/mame/hp/hp9845_optrom.cpp b/src/mame/hp/hp9845_optrom.cpp
index 74dc12ebf51..5bea147071d 100644
--- a/src/mame/hp/hp9845_optrom.cpp
+++ b/src/mame/hp/hp9845_optrom.cpp
@@ -46,7 +46,7 @@ std::pair<std::error_condition, std::string> hp9845_optrom_device::call_load()
return std::make_pair(image_error::BADSOFTWARE, "Software item is missing 'base' feature");
}
- offs_t base_addr;
+ uint32_t base_addr;
if (base_feature[ 0 ] != '0' || base_feature[ 1 ] != 'x' || sscanf(&base_feature[ 2 ] , "%x" , &base_addr) != 1) {
return std::make_pair(image_error::BADSOFTWARE, "Can't parse software item 'base' feature");
}
@@ -62,7 +62,7 @@ std::pair<std::error_condition, std::string> hp9845_optrom_device::call_load()
util::string_format("Illegal base address (%x)", base_addr));
}
- auto length = get_software_region_length("rom") / 2;
+ uint32_t length = get_software_region_length("rom") / 2;
if (length < 0x1000 || length > 0x8000 || (length & 0xfff) != 0 || ((base_addr & 0x7000) + length) > 0x8000) {
return std::make_pair(
diff --git a/src/mame/hp/hp_ipc_optrom.cpp b/src/mame/hp/hp_ipc_optrom.cpp
index 5e06c8f5f7f..3051327f390 100644
--- a/src/mame/hp/hp_ipc_optrom.cpp
+++ b/src/mame/hp/hp_ipc_optrom.cpp
@@ -61,7 +61,8 @@ std::pair<std::error_condition, std::string> hp_ipc_optrom_device::call_load()
return std::make_pair(image_error::BADSOFTWARE, "Software item is missing 'base' feature");
}
- if (base_feature[ 0 ] != '0' || base_feature[ 1 ] != 'x' || sscanf(&base_feature[ 2 ] , "%x" , &m_base) != 1) {
+ u32 base;
+ if (base_feature[ 0 ] != '0' || base_feature[ 1 ] != 'x' || sscanf(&base_feature[ 2 ] , "%x" , &base) != 1) {
return std::make_pair(image_error::BADSOFTWARE, "Can't parse software item 'base' feature");
}
@@ -72,6 +73,7 @@ std::pair<std::error_condition, std::string> hp_ipc_optrom_device::call_load()
util::string_format("Illegal base address (%x)", m_base));
}
+ m_base = base;
LOG("hp_ipc_optrom: loaded base=0x%06x\n" , m_base);
return std::make_pair(std::error_condition(), std::string());
}
diff --git a/src/mame/ibm/rosetta.cpp b/src/mame/ibm/rosetta.cpp
index 35b826e16fb..d8a87fa62c0 100644
--- a/src/mame/ibm/rosetta.cpp
+++ b/src/mame/ibm/rosetta.cpp
@@ -245,7 +245,7 @@ void rosetta_device::device_post_load()
config_tlb();
}
-bool rosetta_device::ior(u32 address, u32 &data)
+bool rosetta_device::ior(offs_t address, u32 &data)
{
if ((address >> 16) == u8(m_control[IOBA]))
{
@@ -299,7 +299,7 @@ bool rosetta_device::ior(u32 address, u32 &data)
return false;
}
-bool rosetta_device::iow(u32 address, u32 data)
+bool rosetta_device::iow(offs_t address, u32 data)
{
if ((address >> 16) == u8(m_control[IOBA]))
{
@@ -360,9 +360,9 @@ bool rosetta_device::iow(u32 address, u32 data)
}
// translate logical to physical address ignoring protection and without side effects
-bool rosetta_device::translate(u32 &address) const
+bool rosetta_device::translate(offs_t &address) const
{
- unsigned const segment = address >> 28;
+ offs_t const segment = address >> 28;
// segment present
if (!(m_segment[segment] & SEGMENT_P))
@@ -431,7 +431,7 @@ bool rosetta_device::translate(u32 &address) const
return true;
}
-bool rosetta_device::translate(u32 &address, bool system_processor, bool store)
+bool rosetta_device::translate(offs_t &address, bool system_processor, bool store)
{
unsigned const segment = address >> 28;
@@ -685,7 +685,7 @@ u32 rosetta_device::tlb_reload(rosetta_device::tlb_entry &tlb_entry, u64 const v
fatalerror("rosetta_device::reload() endless loop detected\n");
}
-void rosetta_device::set_mear(u32 const address, mear_state lock)
+void rosetta_device::set_mear(offs_t const address, mear_state lock)
{
if (m_mear_lock == LOCKED)
return;
@@ -1015,7 +1015,7 @@ void rosetta_device::config_map()
void rosetta_device::config_tlb()
{
- unsigned const ram_size = std::max(m_control[RAMS] & RAMS_SIZE, 7U);
+ offs_t const ram_size = std::max(m_control[RAMS] & RAMS_SIZE, 7ULL);
if (m_control[TCR] & TCR_S)
{
@@ -1103,7 +1103,7 @@ void rosetta_device::compute_address(u32 data)
: ((t.field1 & TLB_RPN2K) << 8) | (data & 0x07ffU);
}
-bool rosetta_device::fetch(u32 address, u16 &data, rsc_mode const mode)
+bool rosetta_device::fetch(offs_t address, u16 &data, rsc_mode const mode)
{
if (mode & rsc_mode::RSC_T)
{
@@ -1143,7 +1143,7 @@ bool rosetta_device::fetch(u32 address, u16 &data, rsc_mode const mode)
return true;
}
-template <typename T> bool rosetta_device::load(u32 address, T &data, rsc_mode const mode, bool sp)
+template <typename T> bool rosetta_device::load(offs_t address, T &data, rsc_mode const mode, bool sp)
{
if (mode & rsc_mode::RSC_T)
{
@@ -1193,7 +1193,7 @@ template <typename T> bool rosetta_device::load(u32 address, T &data, rsc_mode c
return true;
}
-template <typename T> bool rosetta_device::store(u32 address, T data, rsc_mode const mode, bool sp)
+template <typename T> bool rosetta_device::store(offs_t address, T data, rsc_mode const mode, bool sp)
{
if (mode & rsc_mode::RSC_T)
{
@@ -1237,7 +1237,7 @@ template <typename T> bool rosetta_device::store(u32 address, T data, rsc_mode c
return true;
}
-template <typename T> bool rosetta_device::modify(u32 address, std::function<T(T)> f, rsc_mode const mode)
+template <typename T> bool rosetta_device::modify(offs_t address, std::function<T(T)> f, rsc_mode const mode)
{
if (mode & rsc_mode::RSC_T)
{
diff --git a/src/mame/ibm/rosetta.h b/src/mame/ibm/rosetta.h
index fcb064652b2..f86484cc21e 100644
--- a/src/mame/ibm/rosetta.h
+++ b/src/mame/ibm/rosetta.h
@@ -35,29 +35,29 @@ public:
using rsc_mode = rsc_bus_interface::rsc_mode;
// rsc_cpu_interface overrides
- virtual bool fetch(u32 address, u16 &data, rsc_mode const mode) override;
- virtual bool translate(u32 &address) const override;
+ virtual bool fetch(offs_t address, u16 &data, rsc_mode const mode) override;
+ virtual bool translate(offs_t &address) const override;
// rsc_bus_interface overrides
- virtual bool mem_load(u32 address, u8 &data, rsc_mode const mode, bool sp) override { return load<u8>(address, data, mode, sp); }
- virtual bool mem_load(u32 address, u16 &data, rsc_mode const mode, bool sp) override { return load<u16>(address, data, mode, sp); }
- virtual bool mem_load(u32 address, u32 &data, rsc_mode const mode, bool sp) override { return load<u32>(address, data, mode, sp); }
- virtual bool mem_store(u32 address, u8 data, rsc_mode const mode, bool sp) override { return store<u8>(address, data, mode, sp); }
- virtual bool mem_store(u32 address, u16 data, rsc_mode const mode, bool sp) override { return store<u16>(address, data, mode, sp); }
- virtual bool mem_store(u32 address, u32 data, rsc_mode const mode, bool sp) override { return store<u32>(address, data, mode, sp); }
- virtual bool mem_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode) override { return modify<u8>(address, f, mode); }
- virtual bool mem_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode) override { return modify<u16>(address, f, mode); }
- virtual bool mem_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode) override { return modify<u32>(address, f, mode); }
-
- virtual bool pio_load(u32 address, u8 &data, rsc_mode const mode) override { return false; }
- virtual bool pio_load(u32 address, u16 &data, rsc_mode const mode) override { return false; }
- virtual bool pio_load(u32 address, u32 &data, rsc_mode const mode) override { return ior(address, data); }
- virtual bool pio_store(u32 address, u8 data, rsc_mode const mode) override { return false; }
- virtual bool pio_store(u32 address, u16 data, rsc_mode const mode) override { return false; }
- virtual bool pio_store(u32 address, u32 data, rsc_mode const mode) override { return iow(address, data); }
- virtual bool pio_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode) override { return false; }
- virtual bool pio_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode) override { return false; }
- virtual bool pio_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode) override { return false; }
+ virtual bool mem_load(offs_t address, u8 &data, rsc_mode const mode, bool sp) override { return load<u8>(address, data, mode, sp); }
+ virtual bool mem_load(offs_t address, u16 &data, rsc_mode const mode, bool sp) override { return load<u16>(address, data, mode, sp); }
+ virtual bool mem_load(offs_t address, u32 &data, rsc_mode const mode, bool sp) override { return load<u32>(address, data, mode, sp); }
+ virtual bool mem_store(offs_t address, u8 data, rsc_mode const mode, bool sp) override { return store<u8>(address, data, mode, sp); }
+ virtual bool mem_store(offs_t address, u16 data, rsc_mode const mode, bool sp) override { return store<u16>(address, data, mode, sp); }
+ virtual bool mem_store(offs_t address, u32 data, rsc_mode const mode, bool sp) override { return store<u32>(address, data, mode, sp); }
+ virtual bool mem_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode) override { return modify<u8>(address, f, mode); }
+ virtual bool mem_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode) override { return modify<u16>(address, f, mode); }
+ virtual bool mem_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode) override { return modify<u32>(address, f, mode); }
+
+ virtual bool pio_load(offs_t address, u8 &data, rsc_mode const mode) override { return false; }
+ virtual bool pio_load(offs_t address, u16 &data, rsc_mode const mode) override { return false; }
+ virtual bool pio_load(offs_t address, u32 &data, rsc_mode const mode) override { return ior(address, data); }
+ virtual bool pio_store(offs_t address, u8 data, rsc_mode const mode) override { return false; }
+ virtual bool pio_store(offs_t address, u16 data, rsc_mode const mode) override { return false; }
+ virtual bool pio_store(offs_t address, u32 data, rsc_mode const mode) override { return iow(address, data); }
+ virtual bool pio_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode) override { return false; }
+ virtual bool pio_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode) override { return false; }
+ virtual bool pio_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode) override { return false; }
protected:
// device_t overrides
@@ -67,14 +67,14 @@ protected:
virtual void device_post_load() override;
// virtual address translation
- bool translate(u32 &address, bool system_processor, bool store);
+ bool translate(offs_t &address, bool system_processor, bool store);
// rsc_bus_interface implementation
- template <typename T> bool load(u32 address, T &data, rsc_mode const mode, bool sp);
- template <typename T> bool store(u32 address, T data, rsc_mode const mode, bool sp);
- template <typename T> bool modify(u32 address, std::function<T(T)> f, rsc_mode const mode);
- bool ior(u32 address, u32 &data);
- bool iow(u32 address, u32 data);
+ template <typename T> bool load(offs_t address, T &data, rsc_mode const mode, bool sp);
+ template <typename T> bool store(offs_t address, T data, rsc_mode const mode, bool sp);
+ template <typename T> bool modify(offs_t address, std::function<T(T)> f, rsc_mode const mode);
+ bool ior(offs_t address, u32 &data);
+ bool iow(offs_t address, u32 data);
// register read handlers
u32 segment_r(offs_t offset);
@@ -122,7 +122,7 @@ protected:
LOCKED,
MEMORY,
};
- void set_mear(u32 const address, mear_state lock);
+ void set_mear(offs_t const address, mear_state lock);
void set_rmdr(u8 const ecc, bool lock);
void set_pchk(bool state)
@@ -160,7 +160,7 @@ private:
// registers
u32 m_segment[16];
- u32 m_control[9];
+ u64 m_control[9];
// lock and line state
mear_state m_mear_lock;
diff --git a/src/mame/ibm/rtpc_iocc.cpp b/src/mame/ibm/rtpc_iocc.cpp
index 777a6a6b47f..9323ac5bccc 100644
--- a/src/mame/ibm/rtpc_iocc.cpp
+++ b/src/mame/ibm/rtpc_iocc.cpp
@@ -170,7 +170,7 @@ void rtpc_iocc_device::dma_w_w(offs_t offset, u8 data)
#pragma warning(disable:4333)
#endif
-template <typename T> bool rtpc_iocc_device::mem_load(u32 address, T &data, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::mem_load(offs_t address, T &data, rsc_mode const mode)
{
if ((mode & RSC_U) && !(m_ccr & CCR_MMP))
{
@@ -193,7 +193,7 @@ template <typename T> bool rtpc_iocc_device::mem_load(u32 address, T &data, rsc_
return true;
}
-template <typename T> bool rtpc_iocc_device::mem_store(u32 address, T data, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::mem_store(offs_t address, T data, rsc_mode const mode)
{
int const spacenum = (address >> 24) & 15 ? AS_PROGRAM : AS_IO;
@@ -225,7 +225,7 @@ template <typename T> bool rtpc_iocc_device::mem_store(u32 address, T data, rsc_
return true;
}
-template <typename T> bool rtpc_iocc_device::mem_modify(u32 address, std::function<T(T)> f, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::mem_modify(offs_t address, std::function<T(T)> f, rsc_mode const mode)
{
if ((mode & RSC_U) && !(m_ccr & CCR_MMP))
{
@@ -262,7 +262,7 @@ template <typename T> bool rtpc_iocc_device::mem_modify(u32 address, std::functi
return true;
}
-template <typename T> bool rtpc_iocc_device::pio_load(u32 address, T &data, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::pio_load(offs_t address, T &data, rsc_mode const mode)
{
if ((mode & RSC_U) && (address == CSR_ADDR || !(m_ccr & CCR_IMP)))
{
@@ -323,7 +323,7 @@ template <typename T> bool rtpc_iocc_device::pio_load(u32 address, T &data, rsc_
return true;
}
-template <typename T> bool rtpc_iocc_device::pio_store(u32 address, T data, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::pio_store(offs_t address, T data, rsc_mode const mode)
{
if ((mode & RSC_U) && (address == CSR_ADDR || !(m_ccr & CCR_IMP)))
{
@@ -393,7 +393,7 @@ template <typename T> bool rtpc_iocc_device::pio_store(u32 address, T data, rsc_
return true;
}
-template <typename T> bool rtpc_iocc_device::pio_modify(u32 address, std::function<T(T)> f, rsc_mode const mode)
+template <typename T> bool rtpc_iocc_device::pio_modify(offs_t address, std::function<T(T)> f, rsc_mode const mode)
{
LOG("modify pio space invalid operation (%s)\n", machine().describe_context());
m_csr |= CSR_EXR | CSR_PER | CSR_PD | CSR_INVOP;
diff --git a/src/mame/ibm/rtpc_iocc.h b/src/mame/ibm/rtpc_iocc.h
index a2edef4f229..1171ead1d95 100644
--- a/src/mame/ibm/rtpc_iocc.h
+++ b/src/mame/ibm/rtpc_iocc.h
@@ -76,25 +76,25 @@ public:
using rsc_mode = rsc_bus_interface::rsc_mode;
// rsc_bus_interface overrides
- virtual bool mem_load(u32 address, u8 &data, rsc_mode const mode, bool sp) override { return mem_load<u8>(address, data, mode); }
- virtual bool mem_load(u32 address, u16 &data, rsc_mode const mode, bool sp) override { return mem_load<u16>(address, data, mode); }
- virtual bool mem_load(u32 address, u32 &data, rsc_mode const mode, bool sp) override { return mem_load<u32>(address, data, mode); }
- virtual bool mem_store(u32 address, u8 data, rsc_mode const mode, bool sp) override { return mem_store<u8>(address, data, mode); }
- virtual bool mem_store(u32 address, u16 data, rsc_mode const mode, bool sp) override { return mem_store<u16>(address, data, mode); }
- virtual bool mem_store(u32 address, u32 data, rsc_mode const mode, bool sp) override { return mem_store<u32>(address, data, mode); }
- virtual bool mem_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode) override { return mem_modify<u8>(address, f, mode); }
- virtual bool mem_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode) override { return mem_modify<u16>(address, f, mode); }
- virtual bool mem_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode) override { return mem_modify<u32>(address, f, mode); }
-
- virtual bool pio_load(u32 address, u8 &data, rsc_mode const mode) override { return pio_load<u8>(address, data, mode); }
- virtual bool pio_load(u32 address, u16 &data, rsc_mode const mode) override { return pio_load<u16>(address, data, mode); }
- virtual bool pio_load(u32 address, u32 &data, rsc_mode const mode) override { return pio_load<u32>(address, data, mode); }
- virtual bool pio_store(u32 address, u8 data, rsc_mode const mode) override { return pio_store<u8>(address, data, mode); }
- virtual bool pio_store(u32 address, u16 data, rsc_mode const mode) override { return pio_store<u16>(address, data, mode); }
- virtual bool pio_store(u32 address, u32 data, rsc_mode const mode) override { return pio_store<u32>(address, data, mode); }
- virtual bool pio_modify(u32 address, std::function<u8(u8)> f, rsc_mode const mode) override { return pio_modify<u8>(address, f, mode); }
- virtual bool pio_modify(u32 address, std::function<u16(u16)> f, rsc_mode const mode) override { return pio_modify<u16>(address, f, mode); }
- virtual bool pio_modify(u32 address, std::function<u32(u32)> f, rsc_mode const mode) override { return pio_modify<u32>(address, f, mode); }
+ virtual bool mem_load(offs_t address, u8 &data, rsc_mode const mode, bool sp) override { return mem_load<u8>(address, data, mode); }
+ virtual bool mem_load(offs_t address, u16 &data, rsc_mode const mode, bool sp) override { return mem_load<u16>(address, data, mode); }
+ virtual bool mem_load(offs_t address, u32 &data, rsc_mode const mode, bool sp) override { return mem_load<u32>(address, data, mode); }
+ virtual bool mem_store(offs_t address, u8 data, rsc_mode const mode, bool sp) override { return mem_store<u8>(address, data, mode); }
+ virtual bool mem_store(offs_t address, u16 data, rsc_mode const mode, bool sp) override { return mem_store<u16>(address, data, mode); }
+ virtual bool mem_store(offs_t address, u32 data, rsc_mode const mode, bool sp) override { return mem_store<u32>(address, data, mode); }
+ virtual bool mem_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode) override { return mem_modify<u8>(address, f, mode); }
+ virtual bool mem_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode) override { return mem_modify<u16>(address, f, mode); }
+ virtual bool mem_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode) override { return mem_modify<u32>(address, f, mode); }
+
+ virtual bool pio_load(offs_t address, u8 &data, rsc_mode const mode) override { return pio_load<u8>(address, data, mode); }
+ virtual bool pio_load(offs_t address, u16 &data, rsc_mode const mode) override { return pio_load<u16>(address, data, mode); }
+ virtual bool pio_load(offs_t address, u32 &data, rsc_mode const mode) override { return pio_load<u32>(address, data, mode); }
+ virtual bool pio_store(offs_t address, u8 data, rsc_mode const mode) override { return pio_store<u8>(address, data, mode); }
+ virtual bool pio_store(offs_t address, u16 data, rsc_mode const mode) override { return pio_store<u16>(address, data, mode); }
+ virtual bool pio_store(offs_t address, u32 data, rsc_mode const mode) override { return pio_store<u32>(address, data, mode); }
+ virtual bool pio_modify(offs_t address, std::function<u8(u8)> f, rsc_mode const mode) override { return pio_modify<u8>(address, f, mode); }
+ virtual bool pio_modify(offs_t address, std::function<u16(u16)> f, rsc_mode const mode) override { return pio_modify<u16>(address, f, mode); }
+ virtual bool pio_modify(offs_t address, std::function<u32(u32)> f, rsc_mode const mode) override { return pio_modify<u32>(address, f, mode); }
u8 ccr_r() { return m_ccr; }
void ccr_w(u8 data) { m_ccr = data; }
@@ -123,12 +123,12 @@ protected:
virtual space_config_vector memory_space_config() const override;
//virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- template <typename T> bool mem_load(u32 address, T &data, rsc_mode const mode);
- template <typename T> bool mem_store(u32 address, T data, rsc_mode const mode);
- template <typename T> bool mem_modify(u32 address, std::function<T(T)> f, rsc_mode const mode);
- template <typename T> bool pio_load(u32 address, T &data, rsc_mode const mode);
- template <typename T> bool pio_store(u32 address, T data, rsc_mode const mode);
- template <typename T> bool pio_modify(u32 address, std::function<T(T)> f, rsc_mode const mode);
+ template <typename T> bool mem_load(offs_t address, T &data, rsc_mode const mode);
+ template <typename T> bool mem_store(offs_t address, T data, rsc_mode const mode);
+ template <typename T> bool mem_modify(offs_t address, std::function<T(T)> f, rsc_mode const mode);
+ template <typename T> bool pio_load(offs_t address, T &data, rsc_mode const mode);
+ template <typename T> bool pio_store(offs_t address, T data, rsc_mode const mode);
+ template <typename T> bool pio_modify(offs_t address, std::function<T(T)> f, rsc_mode const mode);
void set_int(bool state)
{
diff --git a/src/mame/konami/viper.cpp b/src/mame/konami/viper.cpp
index 6c3ca4fdb9b..c7dbf146270 100644
--- a/src/mame/konami/viper.cpp
+++ b/src/mame/konami/viper.cpp
@@ -408,6 +408,8 @@ The golf club acts like a LED gun. PCB power input is 12V.
#include "screen.h"
#include "speaker.h"
+#include <iostream>
+
// configurable logging
//#define LOG_WARN (1U << 1)
#define LOG_I2C (1U << 2)
@@ -1255,15 +1257,11 @@ uint64_t viper_state::cf_card_data_r(offs_t offset, uint64_t mem_mask)
switch (offset & 0xf)
{
case 0x8: // Duplicate Even RD Data
- {
r |= m_ata->cs0_r(0, mem_mask >> 16) << 16;
break;
- }
default:
- {
throw emu_fatalerror("%s:cf_card_data_r: IDE reg %02X\n", machine().describe_context().c_str(), offset & 0xf);
- }
}
}
return r;
@@ -1276,15 +1274,11 @@ void viper_state::cf_card_data_w(offs_t offset, uint64_t data, uint64_t mem_mask
switch (offset & 0xf)
{
case 0x8: // Duplicate Even RD Data
- {
m_ata->cs0_w(0, data >> 16, mem_mask >> 16);
break;
- }
default:
- {
throw emu_fatalerror("%s:cf_card_data_w: IDE reg %02X, %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)(data >> 16));
- }
}
}
}
@@ -1307,30 +1301,23 @@ uint64_t viper_state::cf_card_r(offs_t offset, uint64_t mem_mask)
case 0x5: // Cylinder High
case 0x6: // Select Card/Head
case 0x7: // Status
- {
r |= m_ata->cs0_r(offset & 7, mem_mask >> 16) << 16;
break;
- }
//case 0x8: // Duplicate Even RD Data
//case 0x9: // Duplicate Odd RD Data
case 0xd: // Duplicate Error
- {
r |= m_ata->cs0_r(1, mem_mask >> 16) << 16;
break;
- }
case 0xe: // Alt Status
case 0xf: // Drive Address
- {
r |= m_ata->cs1_r(offset & 7, mem_mask >> 16) << 16;
break;
- }
default:
- {
- printf("%s:compact_flash_r: IDE reg %02X\n", machine().describe_context().c_str(), offset & 0xf);
- }
+ util::stream_format(std::cerr, "%s:compact_flash_r: IDE reg %02X\n", machine().describe_context().c_str(), offset & 0xf);
+ break;
}
}
else
@@ -1370,30 +1357,22 @@ void viper_state::cf_card_w(offs_t offset, uint64_t data, uint64_t mem_mask)
case 0x5: // Cylinder High
case 0x6: // Select Card/Head
case 0x7: // Command
- {
m_ata->cs0_w(offset & 7, data >> 16, mem_mask >> 16);
break;
- }
//case 0x8: // Duplicate Even WR Data
//case 0x9: // Duplicate Odd WR Data
case 0xd: // Duplicate Features
- {
m_ata->cs0_w(1, data >> 16, mem_mask >> 16);
break;
- }
case 0xe: // Device Ctl
case 0xf: // Reserved
- {
m_ata->cs1_w(offset & 7, data >> 16, mem_mask >> 16);
break;
- }
default:
- {
throw emu_fatalerror("%s:compact_flash_w: IDE reg %02X, data %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)((data >> 16) & 0xffff));
- }
}
}
else if (offset >= 0x100)
@@ -1401,7 +1380,6 @@ void viper_state::cf_card_w(offs_t offset, uint64_t data, uint64_t mem_mask)
switch (offset)
{
case 0x100:
- {
if ((data >> 16) & 0x80)
{
m_cf_card_ide = 1;
@@ -1409,11 +1387,8 @@ void viper_state::cf_card_w(offs_t offset, uint64_t data, uint64_t mem_mask)
m_ata->reset();
}
break;
- }
default:
- {
throw emu_fatalerror("%s:compact_flash_w: reg %02X, data %04X\n", machine().describe_context().c_str(), offset, (uint16_t)((data >> 16) & 0xffff));
- }
}
}
}
@@ -1475,33 +1450,19 @@ uint32_t viper_state::voodoo3_pci_r(int function, int reg, uint32_t mem_mask)
switch (reg)
{
case 0x00: // PCI Vendor ID (0x121a = 3dfx), Device ID (0x0005 = Voodoo 3)
- {
return 0x0005121a;
- }
case 0x08: // Device class code
- {
return 0x03000000;
- }
case 0x10: // memBaseAddr0
- {
return m_voodoo3_pci_reg[0x10/4];
- }
case 0x14: // memBaseAddr1
- {
return m_voodoo3_pci_reg[0x14/4];
- }
case 0x18: // memBaseAddr1
- {
return m_voodoo3_pci_reg[0x18/4];
- }
case 0x40: // fabId
- {
return m_voodoo3_pci_reg[0x40/4];
- }
case 0x50: // cfgScratch
- {
return m_voodoo3_pci_reg[0x50/4];
- }
default:
throw emu_fatalerror("voodoo3_pci_r: %08X at %08X\n", reg, m_maincpu->pc());
@@ -1515,12 +1476,9 @@ void viper_state::voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t m
switch (reg)
{
case 0x04: // Command register
- {
m_voodoo3_pci_reg[0x04/4] = data;
break;
- }
case 0x10: // memBaseAddr0
- {
if (data == 0xffffffff)
{
m_voodoo3_pci_reg[0x10/4] = 0xfe000000;
@@ -1530,9 +1488,7 @@ void viper_state::voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t m
m_voodoo3_pci_reg[0x10/4] = data;
}
break;
- }
case 0x14: // memBaseAddr1
- {
if (data == 0xffffffff)
{
m_voodoo3_pci_reg[0x14/4] = 0xfe000008;
@@ -1542,9 +1498,7 @@ void viper_state::voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t m
m_voodoo3_pci_reg[0x14/4] = data;
}
break;
- }
case 0x18: // ioBaseAddr
- {
if (data == 0xffffffff)
{
m_voodoo3_pci_reg[0x18/4] = 0xffffff01;
@@ -1554,21 +1508,14 @@ void viper_state::voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t m
m_voodoo3_pci_reg[0x18/4] = data;
}
break;
- }
case 0x3c: // InterruptLine
- {
break;
- }
case 0x40: // fabId
- {
m_voodoo3_pci_reg[0x40/4] = data;
break;
- }
case 0x50: // cfgScratch
- {
m_voodoo3_pci_reg[0x50/4] = data;
break;
- }
default:
throw emu_fatalerror("voodoo3_pci_w: %08X, %08X at %08X\n", data, reg, m_maincpu->pc());
diff --git a/src/mame/mattel/stic.cpp b/src/mame/mattel/stic.cpp
index 7beff96da82..77848fa390f 100644
--- a/src/mame/mattel/stic.cpp
+++ b/src/mame/mattel/stic.cpp
@@ -11,6 +11,8 @@
#include "stic.h"
#include "screen.h"
+#include <iostream>
+
/****************************************************************************
* *
@@ -1312,6 +1314,13 @@ uint16_t stic_device::gram_read(offs_t offset)
return m_gram[offset];
}
+uint16_t stic_device::grom_read(offs_t offset)
+{
+ if (offset > 0x800)
+ util::stream_format(std::cerr, "help! %X\n", offset);
+ return (0xff00 | m_grom[offset]);
+}
+
void stic_device::gram_write(offs_t offset, uint16_t data)
{
data &= 0xff;
diff --git a/src/mame/mattel/stic.h b/src/mame/mattel/stic.h
index 94bc7ea3646..cc9b13fffb8 100644
--- a/src/mame/mattel/stic.h
+++ b/src/mame/mattel/stic.h
@@ -66,7 +66,7 @@ public:
uint16_t read(offs_t offset);
uint16_t gram_read(offs_t offset);
- uint16_t grom_read(offs_t offset) { if (offset > 0x800) printf("help! %X\n", offset); return (0xff00 | m_grom[offset]); }
+ uint16_t grom_read(offs_t offset);
void write(offs_t offset, uint16_t data);
void gram_write(offs_t offset, uint16_t data);
diff --git a/src/mame/namco/namcos11.cpp b/src/mame/namco/namcos11.cpp
index 5e771a08f17..13f11ca92bb 100644
--- a/src/mame/namco/namcos11.cpp
+++ b/src/mame/namco/namcos11.cpp
@@ -454,11 +454,14 @@ It is highly likely Namco's game uses the same sensors and mechanics.
#include <cstdarg>
+#define LOG_LIMITED ( 1U << 1 )
+#define LOG_MORE ( 1U << 2 )
+#define VERBOSE ( 0 )
+#include "logmacro.h"
namespace {
-#define C76_SPEEDUP ( 1 ) /* sound cpu idle skipping */
-#define VERBOSE_LEVEL ( 0 )
+#define C76_SPEEDUP ( 1 ) /* sound cpu idle skipping */
class namcos11_state : public driver_device
{
@@ -525,23 +528,8 @@ private:
uint32_t m_n_bankoffset;
uint8_t m_su_83;
-
- inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
};
-inline void ATTR_PRINTF(3,4) namcos11_state::verboselog( int n_level, const char *s_fmt, ... )
-{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- logerror( "%s: %s", machine().describe_context(), buf );
- }
-}
-
void namcos11_state::rom8_w(offs_t offset, uint16_t data)
{
m_bank[ offset ]->set_entry( ( ( data & 0xc0 ) >> 4 ) + ( data & 0x03 ) );
@@ -549,14 +537,14 @@ void namcos11_state::rom8_w(offs_t offset, uint16_t data)
void namcos11_state::rom8_64_upper_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- verboselog(2, "rom8_64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
+ LOGMASKED(LOG_MORE, "rom8_64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
m_n_bankoffset = offset * 16;
}
void namcos11_state::rom8_64_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- verboselog(2, "rom8_64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
+ LOGMASKED(LOG_MORE, "rom8_64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
// TODO: verify behaviour
m_bank[ offset ]->set_entry( ( ( ( ( data & 0xc0 ) >> 3 ) + ( data & 0x07 ) ) ^ m_n_bankoffset ) );
@@ -572,11 +560,11 @@ void namcos11_state::lightgun_w(offs_t offset, uint16_t data, uint16_t mem_mask)
m_recoil[0] = BIT(~data, 1);
m_recoil[1] = BIT(~data, 0);
- verboselog(1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
+ LOGMASKED(LOG_LIMITED, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
break;
case 1:
- verboselog(2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
+ LOGMASKED(LOG_MORE, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
break;
}
}
@@ -611,7 +599,7 @@ uint16_t namcos11_state::lightgun_r(offs_t offset, uint16_t mem_mask)
data = m_lightgun_io[3]->read() + 1;
break;
}
- verboselog(2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
+ LOGMASKED(LOG_MORE, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
return data;
}
diff --git a/src/mame/next/next.cpp b/src/mame/next/next.cpp
index 0030a588aec..6dc25ff7cef 100644
--- a/src/mame/next/next.cpp
+++ b/src/mame/next/next.cpp
@@ -34,7 +34,9 @@
#include "softlist.h"
#include "formats/flopimg.h"
+#include "strformat.h"
+#include <iostream>
uint32_t next_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
@@ -84,14 +86,14 @@ uint32_t next_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
uint32_t next_state::rom_map_r()
{
if(0 && !machine().side_effects_disabled())
- printf("%08x ROM MAP?\n",maincpu->pc());
+ util::stream_format(std::cout, "%08x ROM MAP?\n", maincpu->pc());
return 0x01000000;
}
uint32_t next_state::scr2_r()
{
if(0 && !machine().side_effects_disabled())
- printf("%08x\n",maincpu->pc());
+ util::stream_format(std::cout, "%08x\n", maincpu->pc());
/*
x--- ---- ---- ---- ---- ---- ---- ---- dsp reset
-x-- ---- ---- ---- ---- ---- ---- ---- dsp block end
@@ -128,7 +130,7 @@ uint32_t next_state::scr2_r()
void next_state::scr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if(0 && !machine().side_effects_disabled())
- printf("scr2_w %08x (%08x)\n", data, maincpu->pc());
+ util::stream_format(std::cout, "scr2_w %08x (%08x)\n", data, maincpu->pc());
COMBINE_DATA(&scr2);
rtc->ce_w(BIT(scr2, 8));
diff --git a/src/mame/nintendo/nds.cpp b/src/mame/nintendo/nds.cpp
index fde2e24128a..b008f6de338 100644
--- a/src/mame/nintendo/nds.cpp
+++ b/src/mame/nintendo/nds.cpp
@@ -19,7 +19,16 @@
#include <cstdarg>
-#define VERBOSE_LEVEL (0)
+#define LOG_UNK_RD (1U << 1)
+#define LOG_UNK_WR (1U << 2)
+#define LOG_TIMER (1U << 3)
+#define LOG_TIMER_EXTRA (1U << 4)
+#define LOG_SPI (1U << 5)
+#define LOG_GAMECARD (1U << 6)
+#define LOG_INTERRUPT (1U << 7)
+
+#define VERBOSE (0)
+#include "logmacro.h"
// Measured value from GBATEK. Actual crystal unknown.
#define MASTER_CLOCK (33513982)
@@ -59,19 +68,6 @@
static const uint32_t timer_clks[4] = { MASTER_CLOCK, MASTER_CLOCK / 64, MASTER_CLOCK / 256, MASTER_CLOCK / 1024 };
-static inline void ATTR_PRINTF(3,4) verboselog(device_t &device, int n_level, const char *s_fmt, ...)
-{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- device.logerror( "%08x: %s", device.machine().describe_context(), buf );
- }
-}
-
uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
{
uint8_t temp1, temp2;
@@ -82,13 +78,11 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
case TIMER_OFFSET+2:
case TIMER_OFFSET+3:
{
- uint32_t elapsed;
- double time, ticks;
int timer = (offset - TIMER_OFFSET) + 4;
- printf("Read timer reg %x (PC=%x)\n", timer, m_arm7->pc());
+ LOGMASKED(LOG_TIMER, "Read timer reg %x (PC=%x)\n", timer, m_arm7->pc());
- // update times for
+ uint32_t elapsed;
if (m_timer_regs[timer] & 0x800000)
{
if (m_timer_regs[timer] & 0x00040000)
@@ -97,11 +91,11 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
}
else
{
- time = 0.1; //m_tmr_timer[timer]->elapsed().as_double();
+ double time = 0.1; //m_tmr_timer[timer]->elapsed().as_double();
- ticks = (double)(0x10000 - (m_timer_regs[timer] & 0xffff));
+ double ticks = (double)(0x10000 - (m_timer_regs[timer] & 0xffff));
- // printf("time %f ticks %f 1/hz %f\n", time, ticks, 1.0 / m_timer_hz[timer]);
+ LOGMASKED(LOG_TIMER_EXTRA, "time %f ticks %f 1/hz %f\n", time, ticks, 1.0 / m_timer_hz[timer]);
time *= ticks;
time /= (1.0 / m_timer_hz[timer]);
@@ -109,11 +103,11 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
elapsed = (uint32_t)time;
}
-// printf("elapsed = %x\n", elapsed);
+ LOGMASKED(LOG_TIMER_EXTRA, "elapsed = %x\n", elapsed);
}
else
{
-// printf("Reading inactive timer!\n");
+ LOGMASKED(LOG_TIMER_EXTRA, "Reading inactive timer!\n");
elapsed = 0;
}
@@ -134,27 +128,23 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
return m_arm7_ipcsync;
case AUX_SPI_CNT_OFFSET:
- printf("arm7: read AUX_SPI_CNT mask %08x\n", mem_mask);
+ LOGMASKED(LOG_SPI, "arm7: read AUX_SPI_CNT mask %08x\n", mem_mask);
return 0;
- break;
case GAMECARD_BUS_CTRL_OFFSET:
- //printf("arm7: read GAMECARD_BUS_CTRL (%08x) mask %08x\n", m_gamecard_ctrl, mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: read GAMECARD_BUS_CTRL (%08x) mask %08x\n", m_gamecard_ctrl, mem_mask);
return m_gamecard_ctrl;
- break;
case GAMECARD_DATA_OFFSET:
- printf("arm7: read to GAMECARD_DATA mask %08x\n", mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: read to GAMECARD_DATA mask %08x\n", mem_mask);
return 0xffffffff;
- break;
case GAMECARD_DATA_2_OFFSET:
- printf("arm7: read to GAMECARD_DATA2 mask %08x\n", mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: read to GAMECARD_DATA2 mask %08x\n", mem_mask);
return 0xffffffff;
- break;
case GAMECARD_DATA_IN_OFFSET:
- //printf("arm7: read to GAMECARD_DATA_IN mask %08x (len = %x)\n", mem_mask, m_cartdata_len);
+ LOGMASKED(LOG_GAMECARD, "arm7: read to GAMECARD_DATA_IN mask %08x (len = %x)\n", mem_mask, m_cartdata_len);
if (m_cartdata_len >= 4)
{
m_cartdata_len -= 4;
@@ -166,17 +156,15 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
if (m_cartdata_len == 0)
{
- printf("NDS: xfer over\n");
+ LOGMASKED(LOG_GAMECARD, "NDS: xfer over\n");
m_gamecard_ctrl &= ~GAMECARD_DATA_READY;
m_gamecard_ctrl &= ~GAMECARD_BLOCK_BUSY;
}
return 0xffffffff;
- break;
case SPI_CTRL_OFFSET:
- //printf("arm7: read SPI_CTRL mask %08x\n", mem_mask);
+ LOGMASKED(LOG_SPI, "arm7: read SPI_CTRL mask %08x\n", mem_mask);
return 0;
- break;
case POSTFLG_OFFSET:
/* Bit Use
@@ -190,7 +178,7 @@ uint32_t nds_state::arm7_io_r(offs_t offset, uint32_t mem_mask)
return (m_wramcnt << 8) | temp1 | temp2;
default:
- verboselog(*this, 0, "[ARM7] [IO] Unknown read: %08x (%08x)\n", offset*4, mem_mask);
+ LOGMASKED(LOG_UNK_RD, "[ARM7] [IO] Unknown read: %08x (%08x)\n", offset*4, mem_mask);
break;
}
@@ -206,16 +194,11 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
case TIMER_OFFSET+2:
case TIMER_OFFSET+3:
{
- double rate, clocksel;
- uint32_t old_timer_regs;
-
int timer = (offset - TIMER_OFFSET)+4;
-
- old_timer_regs = m_timer_regs[timer];
-
+ uint32_t old_timer_regs = m_timer_regs[timer];
m_timer_regs[timer] = (m_timer_regs[timer] & ~(mem_mask & 0xFFFF0000)) | (data & (mem_mask & 0xFFFF0000));
- printf("%08x to timer %d (mask %08x PC %x)\n", data, timer, ~mem_mask, m_arm7->pc());
+ LOGMASKED(LOG_TIMER, "%08x to timer %d (mask %08x PC %x)\n", data, timer, ~mem_mask, m_arm7->pc());
if (ACCESSING_BITS_0_15)
{
@@ -226,29 +209,24 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
// enabling this timer?
if ((ACCESSING_BITS_16_31) && (data & 0x800000))
{
- double final;
-
if ((old_timer_regs & 0x00800000) == 0) // start bit 0 -> 1
{
m_timer_regs[timer] = (m_timer_regs[timer] & 0xFFFF0000) | (m_timer_reload[timer] & 0x0000FFFF);
}
- rate = 0x10000 - (m_timer_regs[timer] & 0xffff);
-
- clocksel = timer_clks[(m_timer_regs[timer] >> 16) & 3];
-
- final = clocksel / rate;
-
- m_timer_hz[timer] = final;
+ double rate = 0x10000 - (m_timer_regs[timer] & 0xffff);
+ double clocksel = timer_clks[(m_timer_regs[timer] >> 16) & 3];
+ double hz = clocksel / rate;
+ m_timer_hz[timer] = hz;
m_timer_recalc[timer] = 0;
- printf("Enabling timer %d @ %f Hz regs %08x\n", timer, final, m_timer_regs[timer]);
+ LOGMASKED(LOG_TIMER_EXTRA, "Enabling timer %d @ %f Hz regs %08x\n", timer, hz, m_timer_regs[timer]);
// enable the timer
if( !(data & 0x40000) ) // if we're not in Count-Up mode
{
- attotime time = attotime::from_hz(final);
+ attotime time = attotime::from_hz(hz);
m_tmr_timer[timer]->adjust(time, timer, time);
}
}
@@ -256,12 +234,12 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
break;
case IME_OFFSET:
- printf("ARM7: %08x to IME\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM7: %08x to IME\n", data);
COMBINE_DATA(&m_ime[1]);
break;
case IE_OFFSET:
- printf("ARM7: %08x to IE\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM7: %08x to IE\n", data);
COMBINE_DATA(&m_ie[1]);
break;
@@ -270,7 +248,7 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
break;
case IPCSYNC_OFFSET:
- //printf("ARM7: %x to IPCSYNC\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM7: %x to IPCSYNC\n", data);
m_arm9_ipcsync &= ~0xf;
m_arm9_ipcsync |= ((data >> 8) & 0xf);
m_arm7_ipcsync &= 0xf;
@@ -278,18 +256,17 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
break;
case AUX_SPI_CNT_OFFSET:
- //printf("arm7: %08x to AUX_SPI_CNT mask %08x\n", data, mem_mask);
+ LOGMASKED(LOG_SPI, "arm7: %08x to AUX_SPI_CNT mask %08x\n", data, mem_mask);
m_spicnt &= 0x0080;
m_spicnt |= (data & 0xe043);
-
break;
case GAMECARD_BUS_CTRL_OFFSET:
- //printf("arm7: %08x to GAMECARD_BUS_CTRL mask %08x\n", data, mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: %08x to GAMECARD_BUS_CTRL mask %08x\n", data, mem_mask);
m_gamecard_ctrl &= GAMECARD_DATA_READY;
m_gamecard_ctrl |= (data & ~GAMECARD_DATA_READY);
- if (!(m_spicnt & (1<<15)))
+ if (!BIT(m_spicnt, 15))
{
return;
}
@@ -308,7 +285,7 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
m_cartdata_len = 256 << m_cartdata_len;
}
- printf("nds: cartdata for transfer = %x\n", m_cartdata_len);
+ LOGMASKED(LOG_GAMECARD, "nds: cartdata for transfer = %x\n", m_cartdata_len);
if (m_cartdata_len > 0)
{
@@ -316,22 +293,22 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
}
else
{
- printf("NDS: xfer over\n");
+ LOGMASKED(LOG_GAMECARD, "NDS: xfer over\n");
m_gamecard_ctrl &= ~GAMECARD_DATA_READY;
m_gamecard_ctrl &= ~GAMECARD_BLOCK_BUSY;
}
break;
case GAMECARD_DATA_OFFSET:
- //printf("arm7: %08x to GAMECARD_DATA mask %08x\n", data, mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: %08x to GAMECARD_DATA mask %08x\n", data, mem_mask);
break;
case GAMECARD_DATA_2_OFFSET:
- //printf("arm7: %08x to GAMECARD_DATA2 mask %08x\n", data, mem_mask);
+ LOGMASKED(LOG_GAMECARD, "arm7: %08x to GAMECARD_DATA2 mask %08x\n", data, mem_mask);
break;
case SPI_CTRL_OFFSET:
- //printf("arm7: %08x to SPI_CTRL mask %08x\n", data, mem_mask);
+ LOGMASKED(LOG_SPI, "arm7: %08x to SPI_CTRL mask %08x\n", data, mem_mask);
break;
case POSTFLG_OFFSET:
@@ -348,14 +325,14 @@ void nds_state::arm7_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if ((data>>8) & 0x80)
{
- printf("arm7: HALT\n"); // halts the arm7 until an interrupt occurs
+ LOGMASKED(LOG_INTERRUPT, "arm7: HALT\n"); // halts the arm7 until an interrupt occurs
m_arm7->suspend(SUSPEND_REASON_HALT, 1);
m_arm7halted = true;
}
}
break;
default:
- verboselog(*this, 0, "[ARM7] [IO] Unknown write: %08x = %08x (%08x)\n", offset*4, data, mem_mask);
+ LOGMASKED(LOG_UNK_WR, "[ARM7] [IO] Unknown write: %08x = %08x (%08x)\n", offset*4, data, mem_mask);
break;
}
}
@@ -369,13 +346,11 @@ uint32_t nds_state::arm9_io_r(offs_t offset, uint32_t mem_mask)
case TIMER_OFFSET+2:
case TIMER_OFFSET+3:
{
- uint32_t elapsed;
- double time, ticks;
int timer = (offset - TIMER_OFFSET);
- //printf("Read timer reg %x (PC=%x)\n", timer, m_arm9->pc());
+ LOGMASKED(LOG_TIMER, "Read timer reg %x (PC=%x)\n", timer, m_arm9->pc());
- // update times for
+ uint32_t elapsed;
if (m_timer_regs[timer] & 0x800000)
{
if (m_timer_regs[timer] & 0x00040000)
@@ -384,11 +359,11 @@ uint32_t nds_state::arm9_io_r(offs_t offset, uint32_t mem_mask)
}
else
{
- time = 0.1; //m_tmr_timer[timer]->elapsed().as_double();
+ double time = 0.1; //m_tmr_timer[timer]->elapsed().as_double();
- ticks = (double)(0x10000 - (m_timer_regs[timer] & 0xffff));
+ double ticks = (double)(0x10000 - (m_timer_regs[timer] & 0xffff));
- // printf("time %f ticks %f 1/hz %f\n", time, ticks, 1.0 / m_timer_hz[timer]);
+ LOGMASKED(LOG_TIMER_EXTRA, "time %f ticks %f 1/hz %f\n", time, ticks, 1.0 / m_timer_hz[timer]);
time *= ticks;
time /= (1.0 / m_timer_hz[timer]);
@@ -396,11 +371,11 @@ uint32_t nds_state::arm9_io_r(offs_t offset, uint32_t mem_mask)
elapsed = (uint32_t)time;
}
-// printf("elapsed = %x\n", elapsed);
+ LOGMASKED(LOG_TIMER_EXTRA, "elapsed = %x\n", elapsed);
}
else
{
-// printf("Reading inactive timer!\n");
+ LOGMASKED(LOG_TIMER_EXTRA, "Reading inactive timer!\n");
elapsed = 0;
}
@@ -427,7 +402,7 @@ uint32_t nds_state::arm9_io_r(offs_t offset, uint32_t mem_mask)
*/
return m_arm9_postflg;
default:
- verboselog(*this, 0, "[ARM9] [IO] Unknown read: %08x (%08x)\n", offset*4, mem_mask);
+ LOGMASKED(LOG_UNK_RD, "[ARM9] [IO] Unknown read: %08x (%08x)\n", offset*4, mem_mask);
break;
}
@@ -443,16 +418,11 @@ void nds_state::arm9_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
case TIMER_OFFSET+2:
case TIMER_OFFSET+3:
{
- double rate, clocksel;
- uint32_t old_timer_regs;
-
int timer = (offset - TIMER_OFFSET)+4;
-
- old_timer_regs = m_timer_regs[timer];
-
+ uint32_t old_timer_regs = m_timer_regs[timer];
m_timer_regs[timer] = (m_timer_regs[timer] & ~(mem_mask & 0xFFFF0000)) | (data & (mem_mask & 0xFFFF0000));
- printf("%x to timer %d (mask %x PC %x)\n", data, timer, ~mem_mask, m_arm9->pc());
+ LOGMASKED(LOG_TIMER, "%x to timer %d (mask %x PC %x)\n", data, timer, ~mem_mask, m_arm9->pc());
if (ACCESSING_BITS_0_15)
{
@@ -463,29 +433,25 @@ void nds_state::arm9_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
// enabling this timer?
if ((ACCESSING_BITS_16_31) && (data & 0x800000))
{
- double final;
-
if ((old_timer_regs & 0x00800000) == 0) // start bit 0 -> 1
{
m_timer_regs[timer] = (m_timer_regs[timer] & 0xFFFF0000) | (m_timer_reload[timer] & 0x0000FFFF);
}
- rate = 0x10000 - (m_timer_regs[timer] & 0xffff);
+ double rate = 0x10000 - (m_timer_regs[timer] & 0xffff);
+ double clocksel = timer_clks[(m_timer_regs[timer] >> 16) & 3];
+ double hz = clocksel / rate;
- clocksel = timer_clks[(m_timer_regs[timer] >> 16) & 3];
-
- final = clocksel / rate;
-
- m_timer_hz[timer] = final;
+ m_timer_hz[timer] = hz;
m_timer_recalc[timer] = 0;
- printf("Enabling timer %d @ %f Hz\n", timer, final);
+ LOGMASKED(LOG_TIMER_EXTRA, "Enabling timer %d @ %f Hz\n", timer, hz);
// enable the timer
- if( !(data & 0x40000) ) // if we're not in Count-Up mode
+ if (!BIT(data, 18)) // if we're not in Count-Up mode
{
- attotime time = attotime::from_hz(final);
+ attotime time = attotime::from_hz(hz);
m_tmr_timer[timer]->adjust(time, timer, time);
}
}
@@ -493,12 +459,12 @@ void nds_state::arm9_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
break;
case IME_OFFSET:
- printf("ARM9: %08x to IME\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM9: %08x to IME\n", data);
COMBINE_DATA(&m_ime[0]);
break;
case IE_OFFSET:
- printf("ARM9: %08x to IE\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM9: %08x to IE\n", data);
COMBINE_DATA(&m_ie[0]);
break;
@@ -507,7 +473,7 @@ void nds_state::arm9_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
break;
case IPCSYNC_OFFSET:
- printf("ARM9: %x to IPCSYNC\n", data);
+ LOGMASKED(LOG_INTERRUPT, "ARM9: %x to IPCSYNC\n", data);
m_arm7_ipcsync &= ~0xf;
m_arm7_ipcsync |= ((data >> 8) & 0xf);
m_arm9_ipcsync &= 0xf;
@@ -579,7 +545,7 @@ void nds_state::arm9_io_w(offs_t offset, uint32_t data, uint32_t mem_mask)
m_arm9_postflg |= data & POSTFLG_RAM_MASK;
break;
default:
- verboselog(*this, 0, "[ARM7] [IO] Unknown write: %08x = %08x (%08x)\n", offset*4, data, mem_mask);
+ LOGMASKED(LOG_UNK_WR, "[ARM7] [IO] Unknown write: %08x = %08x (%08x)\n", offset*4, data, mem_mask);
break;
}
}
@@ -864,7 +830,7 @@ TIMER_CALLBACK_MEMBER(nds_state::timer_expire)
uintptr_t tmr = (uintptr_t) param;
int cpu = (tmr > 4) ? 1 : 0;
- verboselog(*this, 1, "Timer %d expired\n", (int)tmr);
+ LOGMASKED(LOG_TIMER_EXTRA, "Timer %d expired\n", (int)tmr);
// "The reload value is copied into the counter only upon following two situations: Automatically upon timer overflows,"
// "or when the timer start bit becomes changed from 0 to 1."
diff --git a/src/mame/nintendo/vboy.cpp b/src/mame/nintendo/vboy.cpp
index 98bf25c4d21..c29c9f9585c 100644
--- a/src/mame/nintendo/vboy.cpp
+++ b/src/mame/nintendo/vboy.cpp
@@ -31,6 +31,7 @@ TODO:
#include "vboy.lh"
+#include <iostream>
namespace {
@@ -811,7 +812,7 @@ uint16_t vboy_state::vip_io_r(offs_t offset)
case 0x42: //XPCTRL
return m_vip_io.XPCTRL;
case 0x44: //VER
- printf("%08x read VER\n",m_maincpu->pc());
+ util::stream_format(std::cout, "%08x read VER\n",m_maincpu->pc());
return m_vip_io.VER;
case 0x48: //SPT0
return m_vip_io.SPT[0];
diff --git a/src/mame/sega/315_5195.cpp b/src/mame/sega/315_5195.cpp
index 09579635e84..ebfbd30e400 100644
--- a/src/mame/sega/315_5195.cpp
+++ b/src/mame/sega/315_5195.cpp
@@ -472,14 +472,14 @@ void sega_315_5195_mapper_device::device_reset()
// actual underlying bus connections
//-------------------------------------------------
-void sega_315_5195_mapper_device::compute_region(region_info &info, u8 index, u32 length, u32 mirror, u32 offset)
+void sega_315_5195_mapper_device::compute_region(region_info &info, u8 index, u64 length, u64 mirror, u64 offset)
{
static const offs_t region_size_map[4] = { 0x00ffff, 0x01ffff, 0x07ffff, 0x1fffff };
info.size_mask = region_size_map[m_regs[0x10 + 2 * index] & 3];
info.base = (m_regs[0x11 + 2 * index] << 16) & ~info.size_mask;
info.mirror = mirror & info.size_mask;
info.start = info.base + (offset & info.size_mask);
- info.end = info.start + std::min(length - 1, info.size_mask);
+ info.end = info.start + std::min<offs_t>(length - 1, info.size_mask);
}
diff --git a/src/mame/sega/315_5195.h b/src/mame/sega/315_5195.h
index 5654083450d..3f40d93e7ea 100644
--- a/src/mame/sega/315_5195.h
+++ b/src/mame/sega/315_5195.h
@@ -116,7 +116,7 @@ private:
};
// internal helpers
- void compute_region(region_info &info, u8 index, u32 length, u32 mirror, u32 offset = 0);
+ void compute_region(region_info &info, u8 index, u64 length, u64 mirror, u64 offset = 0ULL);
void update_mapping();
void fd1094_state_change(u8 state);
diff --git a/src/mame/sega/coolridr.cpp b/src/mame/sega/coolridr.cpp
index 9cdc9b40da3..2a69c474d1b 100644
--- a/src/mame/sega/coolridr.cpp
+++ b/src/mame/sega/coolridr.cpp
@@ -296,6 +296,8 @@ to the same bank as defined through A20.
#include "aquastge.lh"
+#include <iostream>
+
namespace {
@@ -2631,26 +2633,18 @@ void coolridr_state::unk_blit_w(offs_t offset, uint32_t data, uint32_t mem_mask)
switch(offset)
{
default:
- {
- printf("sysh1_unk_blit_w unhandled offset %04x %08x %08x\n", offset, data, mem_mask);
- }
+ util::stream_format(std::cerr, "sysh1_unk_blit_w unhandled offset %04x %08x %08x\n", offset, data, mem_mask);
break;
case 0x01:
- {
- // writes on startup
- // sysh1_unk_blit_w unhandled offset 0001 01010101 ffffffff
- }
+ // writes on startup
+ // sysh1_unk_blit_w unhandled offset 0001 01010101 ffffffff
break;
case 0x02:
- {
- // writes 3d0dxxxx / 3d0exxxx before a level start.. offset for a transfer read at 0x400000c, stored in work RAM H
-
- //printf("sysh1_unk_blit_w unhandled offset %04x %08x %08x\n", offset, data, mem_mask);
+ // writes 3d0dxxxx / 3d0exxxx before a level start.. offset for a transfer read at 0x400000c, stored in work RAM H
-
- }
+ //printf("sysh1_unk_blit_w unhandled offset %04x %08x %08x\n", offset, data, mem_mask);
break;
}
@@ -2859,7 +2853,7 @@ uint32_t coolridr_state::sound_dma_r(offs_t offset)
if(offset == 2 || offset == 6) // DMA status
return 0;
- printf("%08x\n",offset);
+ util::stream_format(std::cout, "%08x\n",offset);
return m_sound_dma[offset];
}
diff --git a/src/mame/shared/xbox.cpp b/src/mame/shared/xbox.cpp
index eb0f9176891..b2a91b0c434 100644
--- a/src/mame/shared/xbox.cpp
+++ b/src/mame/shared/xbox.cpp
@@ -310,15 +310,15 @@ void xbox_base_state::threadlist_command(const std::vector<std::string_view> &pa
con.printf("-------------------------------\n");
for (int pri = 0; pri < 16; pri++)
{
- uint32_t curr = debugc_bios->parameter[1 - 1] + pri * 8;
- uint32_t addr = curr;
+ offs_t curr = debugc_bios->parameter[1 - 1] + pri * 8;
+ offs_t addr = curr;
if (!m_maincpu->translate(AS_PROGRAM, device_memory_interface::TR_READ, addr, tspace))
continue;
- uint32_t next = tspace->read_dword_unaligned(addr);
+ offs_t next = tspace->read_dword_unaligned(addr);
while ((next != curr) && (next != 0))
{
- uint32_t kthrd = next - debugc_bios->parameter[2 - 1];
+ offs_t kthrd = next - debugc_bios->parameter[2 - 1];
if (!m_maincpu->translate(AS_PROGRAM, device_memory_interface::TR_READ, kthrd, tspace))
break;
uint32_t topstack = tspace->read_dword_unaligned(kthrd + debugc_bios->parameter[3 - 1]);
diff --git a/src/mame/tigertel/docg3.cpp b/src/mame/tigertel/docg3.cpp
index 2efd8c2c428..46547fef7aa 100644
--- a/src/mame/tigertel/docg3.cpp
+++ b/src/mame/tigertel/docg3.cpp
@@ -13,20 +13,17 @@
#include <cstdarg>
-#define VERBOSE_LEVEL ( 0 )
+#define LOG_SEC1_RD (1U << 1)
+#define LOG_SEC1_WR (1U << 2)
+#define LOG_SEC2_RD (1U << 3)
+#define LOG_SEC2_WR (1U << 4)
+#define LOG_SEC2_UNK (1U << 5)
+#define LOG_SEC3_RD (1U << 6)
+#define LOG_SEC3_WR (1U << 7)
+#define LOG_ERASE (1U << 8)
-static inline void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ... )
-{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- device.logerror( "%s: %s", device.machine().describe_context(), buf );
- }
-}
+#define VERBOSE ( 0 )
+#include "logmacro.h"
/***************************************************************************
@@ -117,7 +114,7 @@ uint16_t diskonchip_g3_device::sec_1_r(offs_t offset)
{
data = (g3_read_data() << 0) | (g3_read_data() << 8);
}
- verboselog(*this, 9, "(DOC) %08X -> %04X\n", 0x0800 + (offset << 1), data);
+ LOGMASKED(LOG_SEC1_RD, "(DOC) %08X -> %04X\n", 0x0800 + (offset << 1), data);
return data;
}
@@ -146,7 +143,7 @@ void diskonchip_g3_device::g3_write_data(uint8_t data)
void diskonchip_g3_device::sec_1_w(offs_t offset, uint16_t data)
{
- verboselog(*this, 9, "(DOC) %08X <- %04X\n", 0x0800 + (offset << 1), data);
+ LOGMASKED(LOG_SEC1_WR, "(DOC) %08X <- %04X\n", 0x0800 + (offset << 1), data);
if (m_sec_2[0x1B] & 0x40)
{
g3_write_data(data);
@@ -401,7 +398,7 @@ uint16_t diskonchip_g3_device::sec_2_read16(uint32_t offset)
// ?
case 0x1074 : data = sec_2_read_1074(); break;
}
- verboselog(*this, 9, "(DOC) %08X -> %04X\n", 0x1000 + offset, data);
+ LOGMASKED(LOG_SEC2_RD, "(DOC) %08X -> %04X\n", 0x1000 + offset, data);
return data;
}
@@ -432,7 +429,7 @@ uint8_t diskonchip_g3_device::sec_2_read8(uint32_t offset)
case 0x104E : data = sec_2_read_104E(); break;
case 0x104F : data = sec_2_read_104F(); break;
}
- verboselog(*this, 9, "(DOC) %08X -> %02X\n", 0x1000 + offset, data);
+ LOGMASKED(LOG_SEC2_RD, "(DOC) %08X -> %02X\n", 0x1000 + offset, data);
return data;
}
@@ -440,7 +437,7 @@ void diskonchip_g3_device::sec_2_write_100C(uint8_t data)
{
const char *mode_name[] = { "reset", "normal", "deep power down" };
uint32_t mode = data & 3;
- verboselog(*this, 5, "mode %d (%s)\n", mode, mode_name[mode]);
+ LOGMASKED(LOG_SEC2_WR, "mode %d (%s)\n", mode, mode_name[mode]);
if (mode == 0)
{
m_sec_2[0x04] = 00;
@@ -449,7 +446,7 @@ void diskonchip_g3_device::sec_2_write_100C(uint8_t data)
void diskonchip_g3_device::sec_2_write_1032(uint8_t data)
{
- verboselog(*this, 5, "flash select %02X\n", data);
+ LOGMASKED(LOG_SEC2_WR, "flash select %02X\n", data);
if ((data == 0x12) || (data == 0x27))
{
m_transfer_offset = 0;
@@ -464,7 +461,7 @@ void diskonchip_g3_device::g3_erase_block()
uint32_t offset;
int i, j;
const uint8_t xxx[] = { 0x00, 0x00, 0x87, 0x00, 0x00, 0x00, 0xCE, 0x00, 0xCF, 0x72, 0xFC, 0x1B, 0xA9, 0xC7, 0xB9, 0x00 };
- verboselog(*this, 5, "erase block %04X\n", m_block);
+ LOGMASKED(LOG_ERASE, "erase block %04X\n", m_block);
for (i=0;i<m_pages;i++)
{
m_page = i;
@@ -488,7 +485,7 @@ void diskonchip_g3_device::g3_erase_block()
void diskonchip_g3_device::sec_2_write_1034(uint8_t data)
{
- verboselog(*this, 5, "flash command %02X\n", data);
+ LOGMASKED(LOG_SEC2_WR, "flash command %02X\n", data);
if ((m_sec_2[0x32] == 0x0E) && (data == 0x00))
{
m_test = 0;
@@ -519,7 +516,7 @@ void diskonchip_g3_device::sec_2_write_1034(uint8_t data)
}
else
{
- verboselog(*this, 0, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
}
}
else if (m_sec_2[0x32] == 0x12)
@@ -544,7 +541,7 @@ void diskonchip_g3_device::sec_2_write_1034(uint8_t data)
}
else
{
- verboselog(*this, 0, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
}
}
else if (m_sec_2[0x32] == 0x27)
@@ -561,7 +558,7 @@ void diskonchip_g3_device::sec_2_write_1034(uint8_t data)
}
else
{
- verboselog(*this, 0, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
}
}
else if ((m_sec_2[0x32] == 0x31) && (data == 0x71))
@@ -583,12 +580,12 @@ void diskonchip_g3_device::sec_2_write_1034(uint8_t data)
}
else
{
- verboselog(*this, 0, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
}
}
else
{
- verboselog(*this, 0, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_sec_2_write_1034: unknown value %02X/%02X\n", data, m_sec_2[0x32]);
}
}
@@ -604,7 +601,7 @@ void diskonchip_g3_device::sec_2_write_1036(uint8_t data)
if (block >= m_blocks) fatalerror( "DOCG3: invalid block (%d)\n", block);
plane = (m_data_1036 >> 6) & 1;
page = (m_data_1036 >> 0) & 0x3F;
- verboselog(*this, 5, "flash address %d - %06X (plane %d block %04X page %04X)\n", m_address_count, m_data_1036, plane, block, page);
+ LOGMASKED(LOG_SEC2_WR, "flash address %d - %06X (plane %d block %04X page %04X)\n", m_address_count, m_data_1036, plane, block, page);
if (m_address_count == 1)
{
m_plane = 0;
@@ -623,7 +620,7 @@ void diskonchip_g3_device::sec_2_write_1036(uint8_t data)
plane = (m_data_1036 >> 14) & 1;
page = (m_data_1036 >> 8) & 0x3F;
unk = (m_data_1036 >> 0) & 0xFF;
- verboselog(*this, 5, "flash address %d - %08X (plane %d block %04X page %04X unk %02X)\n", m_address_count, m_data_1036, plane, block, page, unk);
+ LOGMASKED(LOG_SEC2_WR, "flash address %d - %08X (plane %d block %04X page %04X unk %02X)\n", m_address_count, m_data_1036, plane, block, page, unk);
if (m_address_count == 1)
{
m_plane = 0;
@@ -636,27 +633,27 @@ void diskonchip_g3_device::sec_2_write_1036(uint8_t data)
else if (m_sec_2[0x34] == 0x05)
{
m_transfer_offset = data << 2;
- verboselog(*this, 5, "flash transfer offset %04X\n", m_transfer_offset);
+ LOGMASKED(LOG_SEC2_WR, "flash transfer offset %04X\n", m_transfer_offset);
}
}
void diskonchip_g3_device::sec_2_write_1040(uint16_t data)
{
m_transfersize = (data & 0x3FF);
- verboselog(*this, 5, "flash transfer size %04X\n", m_transfersize);
+ LOGMASKED(LOG_SEC2_WR, "flash transfer size %04X\n", m_transfersize);
}
void diskonchip_g3_device::sec_2_write_100A(uint8_t data)
{
m_device = data & 3;
- verboselog(*this, 5, "select device %d\n", m_device);
+ LOGMASKED(LOG_SEC2_WR, "select device %d\n", m_device);
}
void diskonchip_g3_device::sec_2_write16(uint32_t offset, uint16_t data)
{
m_sec_2[offset+0] = (data >> 0) & 0xFF;
m_sec_2[offset+1] = (data >> 8) & 0xFF;
- verboselog(*this, 9, "(DOC) %08X <- %04X\n", 0x1000 + offset, data);
+ LOGMASKED(LOG_SEC2_WR, "(DOC) %08X <- %04X\n", 0x1000 + offset, data);
switch (0x1000 + offset)
{
// ?
@@ -677,7 +674,7 @@ void diskonchip_g3_device::sec_2_write16(uint32_t offset, uint16_t data)
void diskonchip_g3_device::sec_2_write8(uint32_t offset, uint8_t data)
{
m_sec_2[offset] = data;
- verboselog(*this, 9, "(DOC) %08X <- %02X\n", 0x1000 + offset, data);
+ LOGMASKED(LOG_SEC2_WR, "(DOC) %08X <- %02X\n", 0x1000 + offset, data);
switch (0x1000 + offset)
{
// ?
@@ -709,7 +706,7 @@ uint16_t diskonchip_g3_device::sec_2_r(offs_t offset, uint16_t mem_mask)
}
else
{
- verboselog(*this, 0, "diskonchip_g3_sec_2_r: unknown mem_mask %08X\n", mem_mask);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_g3_sec_2_r: unknown mem_mask %08X\n", mem_mask);
return 0;
}
}
@@ -730,20 +727,20 @@ void diskonchip_g3_device::sec_2_w(offs_t offset, uint16_t data, uint16_t mem_ma
}
else
{
- verboselog(*this, 0, "diskonchip_g3_sec_2_w: unknown mem_mask %08X\n", mem_mask);
+ LOGMASKED(LOG_SEC2_UNK, "diskonchip_g3_sec_2_w: unknown mem_mask %08X\n", mem_mask);
}
}
uint16_t diskonchip_g3_device::sec_3_r(offs_t offset)
{
uint16_t data = 0;
- verboselog(*this, 9, "(DOC) %08X -> %04X\n", 0x1800 + (offset << 1), data);
+ LOGMASKED(LOG_SEC3_RD, "(DOC) %08X -> %04X\n", 0x1800 + (offset << 1), data);
return data;
}
void diskonchip_g3_device::sec_3_w(offs_t offset, uint16_t data)
{
- verboselog(*this, 9, "(DOC) %08X <- %02X\n", 0x1800 + (offset << 1), data);
+ LOGMASKED(LOG_SEC3_WR, "(DOC) %08X <- %02X\n", 0x1800 + (offset << 1), data);
}
//-------------------------------------------------
@@ -751,8 +748,6 @@ void diskonchip_g3_device::sec_3_w(offs_t offset, uint16_t data)
//-------------------------------------------------
void diskonchip_g3_device::device_start()
{
- verboselog(*this, 9, "(DOC) device start\n");
-
switch (m_size)
{
case 64 :
@@ -801,7 +796,6 @@ void diskonchip_g3_device::device_start()
void diskonchip_g3_device::device_reset()
{
- verboselog(*this, 9, "(DOC) device reset\n");
}
//-------------------------------------------------
diff --git a/src/mame/tomy/tutor.cpp b/src/mame/tomy/tutor.cpp
index 3357ea2a12a..09b0e426cee 100644
--- a/src/mame/tomy/tutor.cpp
+++ b/src/mame/tomy/tutor.cpp
@@ -197,6 +197,8 @@ public:
m_cent_data_out(*this, "cent_data_out"),
m_bank1(*this, "bank1"),
m_bank2(*this, "bank2"),
+ m_io_line(*this, "LINE%u", 0U),
+ m_io_line_alt(*this, "LINE%u_alt", 4U),
m_bank1_switching(0)
{
}
@@ -216,6 +218,8 @@ private:
optional_device<output_latch_device> m_cent_data_out;
required_memory_bank m_bank1;
required_memory_bank m_bank2;
+ optional_ioport_array<8> m_io_line;
+ optional_ioport_array<2> m_io_line_alt;
memory_region *m_cart_rom;
int m_tape_interrupt_enable;
@@ -301,17 +305,12 @@ void tutor_state::machine_reset()
uint8_t tutor_state::key_r(offs_t offset)
{
- char port[12];
- uint8_t value;
-
- snprintf(port, std::size(port), "LINE%d", (offset & 0x007e) >> 3);
- value = ioport(port)->read();
+ uint8_t value = m_io_line[(offset & 0x0078) >> 3]->read();
/* hack for ports overlapping with joystick */
if (offset >= 32 && offset < 48)
{
- snprintf(port, std::size(port), "LINE%d_alt", (offset & 0x007e) >> 3);
- value |= ioport(port)->read();
+ value |= m_io_line_alt[(offset & 0x0078) >> 3]->read();
}
return BIT(value, offset & 7);