1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
|
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
#include "emu.h"
#include "emumem_hedw.ipp"
template class handler_entry_write_dispatch< 0, 0, 1>;
template class handler_entry_write_dispatch< 1, 0, 1>;
template class handler_entry_write_dispatch< 2, 0, 1>;
template class handler_entry_write_dispatch< 3, 0, 1>;
template class handler_entry_write_dispatch< 4, 0, 1>;
template class handler_entry_write_dispatch< 5, 0, 1>;
template class handler_entry_write_dispatch< 6, 0, 1>;
template class handler_entry_write_dispatch< 7, 0, 1>;
template class handler_entry_write_dispatch< 8, 0, 1>;
template class handler_entry_write_dispatch< 0, 0, 0>;
template class handler_entry_write_dispatch< 1, 0, 0>;
template class handler_entry_write_dispatch< 2, 0, 0>;
template class handler_entry_write_dispatch< 3, 0, 0>;
template class handler_entry_write_dispatch< 4, 0, 0>;
template class handler_entry_write_dispatch< 5, 0, 0>;
template class handler_entry_write_dispatch< 6, 0, 0>;
template class handler_entry_write_dispatch< 7, 0, 0>;
template class handler_entry_write_dispatch< 8, 0, 0>;
template class handler_entry_write_dispatch< 0, 1, 3>;
template class handler_entry_write_dispatch< 1, 1, 3>;
template class handler_entry_write_dispatch< 2, 1, 3>;
template class handler_entry_write_dispatch< 3, 1, 3>;
template class handler_entry_write_dispatch< 4, 1, 3>;
template class handler_entry_write_dispatch< 5, 1, 3>;
template class handler_entry_write_dispatch< 6, 1, 3>;
template class handler_entry_write_dispatch< 7, 1, 3>;
template class handler_entry_write_dispatch< 8, 1, 3>;
template class handler_entry_write_dispatch< 1, 1, 0>;
template class handler_entry_write_dispatch< 2, 1, 0>;
template class handler_entry_write_dispatch< 3, 1, 0>;
template class handler_entry_write_dispatch< 4, 1, 0>;
template class handler_entry_write_dispatch< 5, 1, 0>;
template class handler_entry_write_dispatch< 6, 1, 0>;
template class handler_entry_write_dispatch< 7, 1, 0>;
template class handler_entry_write_dispatch< 8, 1, 0>;
template class handler_entry_write_dispatch< 0, 1, -1>;
template class handler_entry_write_dispatch< 1, 1, -1>;
template class handler_entry_write_dispatch< 2, 1, -1>;
template class handler_entry_write_dispatch< 3, 1, -1>;
template class handler_entry_write_dispatch< 4, 1, -1>;
template class handler_entry_write_dispatch< 5, 1, -1>;
template class handler_entry_write_dispatch< 6, 1, -1>;
template class handler_entry_write_dispatch< 7, 1, -1>;
template class handler_entry_write_dispatch< 8, 1, -1>;
template class handler_entry_write_dispatch< 0, 2, 3>;
template class handler_entry_write_dispatch< 1, 2, 3>;
template class handler_entry_write_dispatch< 2, 2, 3>;
template class handler_entry_write_dispatch< 3, 2, 3>;
template class handler_entry_write_dispatch< 4, 2, 3>;
template class handler_entry_write_dispatch< 5, 2, 3>;
template class handler_entry_write_dispatch< 6, 2, 3>;
template class handler_entry_write_dispatch< 7, 2, 3>;
template class handler_entry_write_dispatch< 8, 2, 3>;
template class handler_entry_write_dispatch< 2, 2, 0>;
template class handler_entry_write_dispatch< 3, 2, 0>;
template class handler_entry_write_dispatch< 4, 2, 0>;
template class handler_entry_write_dispatch< 5, 2, 0>;
template class handler_entry_write_dispatch< 6, 2, 0>;
template class handler_entry_write_dispatch< 7, 2, 0>;
template class handler_entry_write_dispatch< 8, 2, 0>;
template class handler_entry_write_dispatch< 1, 2, -1>;
template class handler_entry_write_dispatch< 2, 2, -1>;
template class handler_entry_write_dispatch< 3, 2, -1>;
template class handler_entry_write_dispatch< 4, 2, -1>;
template class handler_entry_write_dispatch< 5, 2, -1>;
template class handler_entry_write_dispatch< 6, 2, -1>;
template class handler_entry_write_dispatch< 7, 2, -1>;
template class handler_entry_write_dispatch< 8, 2, -1>;
template class handler_entry_write_dispatch< 0, 2, -2>;
template class handler_entry_write_dispatch< 1, 2, -2>;
template class handler_entry_write_dispatch< 2, 2, -2>;
template class handler_entry_write_dispatch< 3, 2, -2>;
template class handler_entry_write_dispatch< 4, 2, -2>;
template class handler_entry_write_dispatch< 5, 2, -2>;
template class handler_entry_write_dispatch< 6, 2, -2>;
template class handler_entry_write_dispatch< 7, 2, -2>;
template class handler_entry_write_dispatch< 8, 2, -2>;
template class handler_entry_write_dispatch< 3, 3, 0>;
template class handler_entry_write_dispatch< 4, 3, 0>;
template class handler_entry_write_dispatch< 5, 3, 0>;
template class handler_entry_write_dispatch< 6, 3, 0>;
template class handler_entry_write_dispatch< 7, 3, 0>;
template class handler_entry_write_dispatch< 8, 3, 0>;
template class handler_entry_write_dispatch< 2, 3, -1>;
template class handler_entry_write_dispatch< 3, 3, -1>;
template class handler_entry_write_dispatch< 4, 3, -1>;
template class handler_entry_write_dispatch< 5, 3, -1>;
template class handler_entry_write_dispatch< 6, 3, -1>;
template class handler_entry_write_dispatch< 7, 3, -1>;
template class handler_entry_write_dispatch< 8, 3, -1>;
template class handler_entry_write_dispatch< 1, 3, -2>;
template class handler_entry_write_dispatch< 2, 3, -2>;
template class handler_entry_write_dispatch< 3, 3, -2>;
template class handler_entry_write_dispatch< 4, 3, -2>;
template class handler_entry_write_dispatch< 5, 3, -2>;
template class handler_entry_write_dispatch< 6, 3, -2>;
template class handler_entry_write_dispatch< 7, 3, -2>;
template class handler_entry_write_dispatch< 8, 3, -2>;
template class handler_entry_write_dispatch< 0, 3, -3>;
template class handler_entry_write_dispatch< 1, 3, -3>;
template class handler_entry_write_dispatch< 2, 3, -3>;
template class handler_entry_write_dispatch< 3, 3, -3>;
template class handler_entry_write_dispatch< 4, 3, -3>;
template class handler_entry_write_dispatch< 5, 3, -3>;
template class handler_entry_write_dispatch< 6, 3, -3>;
template class handler_entry_write_dispatch< 7, 3, -3>;
template class handler_entry_write_dispatch< 8, 3, -3>;
>BIT(m_keydata, 6);
}
READ8_MEMBER( mekd2_state::mekd2_key_r )
{
char kbdrow[4];
UINT8 i;
m_keydata = 0xff;
for (i = 0; i < 6; i++)
{
if (BIT(m_digit, i))
{
sprintf(kbdrow,"X%d",i);
m_keydata &= ioport(kbdrow)->read();
}
}
i = 0x80;
if (m_digit < 0x40)
i = BIT(m_keydata, 0) ? 0x80 : 0;
else
if (m_digit < 0x80)
i = BIT(m_keydata, 1) ? 0x80 : 0;
else
if (m_digit < 0xc0)
i = BIT(m_keydata, 2) ? 0x80 : 0;
else
i = BIT(m_keydata, 3) ? 0x80 : 0;
return i | m_segment;
}
/***********************************************************
LED display
************************************************************/
WRITE8_MEMBER( mekd2_state::mekd2_segment_w )
{
m_segment = data & 0x7f;
}
WRITE8_MEMBER( mekd2_state::mekd2_digit_w )
{
UINT8 i;
if (data < 0x3f)
{
for (i = 0; i < 6; i++)
{
if (BIT(data, i))
output().set_digit_value(i, ~m_segment & 0x7f);
}
}
m_digit = data;
}
/***********************************************************
Interfaces
************************************************************/
WRITE_LINE_MEMBER( mekd2_state::cass_w )
{
m_cass_state = state;
}
QUICKLOAD_LOAD_MEMBER( mekd2_state, mekd2_quik )
{
static const char magic[] = "MEK6800D2";
char buff[9];
UINT16 addr, size;
UINT8 ident, *RAM = memregion("maincpu")->base();
image.fread(buff, sizeof (buff));
if (memcmp(buff, magic, sizeof (buff)))
{
logerror("mekd2 rom load: magic '%s' not found\n", magic);
return IMAGE_INIT_FAIL;
}
image.fread(&addr, 2);
addr = LITTLE_ENDIANIZE_INT16(addr);
image.fread(&size, 2);
size = LITTLE_ENDIANIZE_INT16(size);
image.fread(&ident, 1);
logerror("mekd2 rom load: $%04X $%04X $%02X\n", addr, size, ident);
while (size-- > 0)
image.fread(&RAM[addr++], 1);
return IMAGE_INIT_PASS;
}
TIMER_DEVICE_CALLBACK_MEMBER(mekd2_state::mekd2_c)
{
m_cass_data[3]++;
if (m_cass_state != m_cassold)
{
m_cass_data[3] = 0;
m_cassold = m_cass_state;
}
if (m_cass_state)
m_cass->output(BIT(m_cass_data[3], 0) ? -1.0 : +1.0); // 2400Hz
else
m_cass->output(BIT(m_cass_data[3], 1) ? -1.0 : +1.0); // 1200Hz
}
TIMER_DEVICE_CALLBACK_MEMBER(mekd2_state::mekd2_p)
{
/* cassette - turn 1200/2400Hz to a bit */
m_cass_data[1]++;
UINT8 cass_ws = (m_cass->input() > +0.03) ? 1 : 0;
if (cass_ws != m_cass_data[0])
{
m_cass_data[0] = cass_ws;
m_acia->write_rxd((m_cass_data[1] < 12) ? 1 : 0);
m_cass_data[1] = 0;
}
}
/***********************************************************
Machine
************************************************************/
static MACHINE_CONFIG_START( mekd2, mekd2_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M6800, XTAL_MEKD2 / 2) /* 614.4 kHz */
MCFG_CPU_PROGRAM_MAP(mekd2_mem)
MCFG_DEFAULT_LAYOUT(layout_mekd2)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_CASSETTE_ADD("cassette")
/* Devices */
MCFG_DEVICE_ADD("pia_s", PIA6821, 0)
MCFG_PIA_READPA_HANDLER(READ8(mekd2_state, mekd2_key_r))
MCFG_PIA_READCB1_HANDLER(READLINE(mekd2_state, mekd2_key40_r))
MCFG_PIA_WRITEPA_HANDLER(WRITE8(mekd2_state, mekd2_segment_w))
MCFG_PIA_WRITEPB_HANDLER(WRITE8(mekd2_state, mekd2_digit_w))
MCFG_PIA_CA2_HANDLER(WRITELINE(mekd2_state, mekd2_nmi_w))
MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, nmi_line))
MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, nmi_line))
MCFG_DEVICE_ADD("pia_u", PIA6821, 0)
MCFG_PIA_IRQA_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line))
MCFG_DEVICE_ADD("acia", ACIA6850, 0)
MCFG_ACIA6850_TXD_HANDLER(WRITELINE(mekd2_state, cass_w))
MCFG_DEVICE_ADD("acia_tx_clock", CLOCK, XTAL_MEKD2 / 256) // 4800Hz
MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia", acia6850_device, write_txc))
MCFG_DEVICE_ADD("acia_rx_clock", CLOCK, 300) // toggled by cassette circuit
MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia", acia6850_device, write_rxc))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mekd2_c", mekd2_state, mekd2_c, attotime::from_hz(4800))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mekd2_p", mekd2_state, mekd2_p, attotime::from_hz(40000))
MCFG_QUICKLOAD_ADD("quickload", mekd2_state, mekd2_quik, "d2", 1)
MACHINE_CONFIG_END
/***********************************************************
ROMS
************************************************************/
ROM_START(mekd2)
ROM_REGION(0x10000,"maincpu",0)
ROM_LOAD("jbug.rom", 0xe000, 0x0400, CRC(5ed08792) SHA1(b06e74652a4c4e67c4a12ddc191ffb8c07f3332e) )
ROM_END
/***************************************************************************
Game driver(s)
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
COMP( 1977, mekd2, 0, 0, mekd2, mekd2, driver_device, 0, "Motorola", "MEK6800D2" , 0 )
|