diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/lib/netlist/devices/nld_devinc.h | 12 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.cpp | 8 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.h | 8 | ||||
-rw-r--r-- | src/mame/machine/nl_breakout.cpp | 12 | ||||
-rw-r--r-- | src/mame/machine/nl_dpatrol.cpp | 4 | ||||
-rw-r--r-- | src/mame/machine/nl_stuntcyc.cpp | 4 |
6 files changed, 24 insertions, 24 deletions
diff --git a/src/lib/netlist/devices/nld_devinc.h b/src/lib/netlist/devices/nld_devinc.h index 48e41f6e561..c43bf9dbcd5 100644 --- a/src/lib/netlist/devices/nld_devinc.h +++ b/src/lib/netlist/devices/nld_devinc.h @@ -1045,10 +1045,10 @@ #define TTL_74279B(...) \ NET_REGISTER_DEVEXT(TTL_74279B, __VA_ARGS__) -// usage : DM9312(name, pA, pB, pC, pG, pD0, pD1, pD2, pD3, pD4, pD5, pD6, pD7) +// usage : TTL_9312(name, pA, pB, pC, pG, pD0, pD1, pD2, pD3, pD4, pD5, pD6, pD7) // auto connect: VCC, GND -#define DM9312(...) \ - NET_REGISTER_DEVEXT(DM9312, __VA_ARGS__) +#define TTL_9312(...) \ + NET_REGISTER_DEVEXT(TTL_9312, __VA_ARGS__) // --------------------------------------------------------------------- // Source: parser: TTL74XX_lib @@ -1209,9 +1209,9 @@ #define SN74LS629_DIP(...) \ NET_REGISTER_DEVEXT(SN74LS629_DIP, __VA_ARGS__) -// usage : DM9312_DIP(name) -#define DM9312_DIP(...) \ - NET_REGISTER_DEVEXT(DM9312_DIP, __VA_ARGS__) +// usage : TTL_9312_DIP(name) +#define TTL_9312_DIP(...) \ + NET_REGISTER_DEVEXT(TTL_9312_DIP, __VA_ARGS__) // usage : TTL_9310_DIP(name) #define TTL_9310_DIP(...) \ diff --git a/src/lib/netlist/macro/nlm_ttl74xx.cpp b/src/lib/netlist/macro/nlm_ttl74xx.cpp index 62c4207e904..29a245e25f4 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.cpp +++ b/src/lib/netlist/macro/nlm_ttl74xx.cpp @@ -2727,8 +2727,8 @@ NETLIST_END() //- | 1 | 1 | 1 | 0 || D7 | D7Q | //- +---+---+---+---++----+-----+ //- -static NETLIST_START(DM9312_DIP) - DM9312(A) +static NETLIST_START(TTL_9312_DIP) + TTL_9312(A) DIPPINS( /* +--------------+ */ A.D0, /* D0 |1 ++ 16| VCC */ A.VCC, @@ -3410,7 +3410,7 @@ NETLIST_START(TTL74XX_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(DM9312, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7,@VCC,@GND") + TRUTHTABLE_START(TTL_9312, 12, 2, "+A,+B,+C,+G,+D0,+D1,+D2,+D3,+D4,+D5,+D6,+D7,@VCC,@GND") TT_HEAD(" C, B, A, G,D0,D1,D2,D3,D4,D5,D6,D7| Y,YQ") TT_LINE(" X, X, X, 1, X, X, X, X, X, X, X, X| 0, 1|33,19") TT_LINE(" 0, 0, 0, 0, 0, X, X, X, X, X, X, X| 0, 1|33,28") @@ -3493,7 +3493,7 @@ NETLIST_START(TTL74XX_lib) LOCAL_LIB_ENTRY(TTL_74379_DIP) LOCAL_LIB_ENTRY(TTL_74393_DIP) LOCAL_LIB_ENTRY(SN74LS629_DIP) - LOCAL_LIB_ENTRY(DM9312_DIP) + LOCAL_LIB_ENTRY(TTL_9312_DIP) LOCAL_LIB_ENTRY(TTL_9310_DIP) LOCAL_LIB_ENTRY(TTL_9316_DIP) LOCAL_LIB_ENTRY(TTL_9322_DIP) diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h index bcfc1f48432..b797bfd6cc9 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.h +++ b/src/lib/netlist/macro/nlm_ttl74xx.h @@ -406,11 +406,11 @@ #define TTL_74393_DIP(name) \ NET_REGISTER_DEV(TTL_74393_DIP, name) -#define DM9312(...) \ - NET_REGISTER_DEVEXT(DM9312, __VA_ARGS__) +#define TTL_9312(...) \ + NET_REGISTER_DEVEXT(TTL_9312, __VA_ARGS__) -#define DM9312_DIP(name) \ - NET_REGISTER_DEV(DM9312_DIP, name) +#define TTL_9312_DIP(name) \ + NET_REGISTER_DEV(TTL_9312_DIP, name) #define TTL_9310_DIP(name) \ NET_REGISTER_DEV(TTL_9310_DIP, name) diff --git a/src/mame/machine/nl_breakout.cpp b/src/mame/machine/nl_breakout.cpp index 5610c008f2d..1f8d17e4d0a 100644 --- a/src/mame/machine/nl_breakout.cpp +++ b/src/mame/machine/nl_breakout.cpp @@ -345,7 +345,7 @@ NETLIST_START(breakout) TTL_7408_DIP(H2) TTL_7427_DIP(H3) TTL_7400_DIP(H4) - DM9312_DIP(H5) + TTL_9312_DIP(H5) TTL_9310_DIP(H6) TTL_7408_DIP(H7) @@ -355,7 +355,7 @@ NETLIST_START(breakout) TTL_74175_DIP(J1) TTL_7404_DIP(J2) TTL_7402_DIP(J3) - DM9312_DIP(J4) + TTL_9312_DIP(J4) TTL_7448_DIP(J5) TTL_9310_DIP(J6) TTL_7420_DIP(J7) @@ -366,7 +366,7 @@ NETLIST_START(breakout) TTL_7486_DIP(K2) TTL_7430_DIP(K3) TTL_7408_DIP(K4) - DM9312_DIP(K5) + TTL_9312_DIP(K5) TTL_9310_DIP(K6) TTL_7486_DIP(K7) TTL_7474_DIP(K8) @@ -376,7 +376,7 @@ NETLIST_START(breakout) TTL_7486_DIP(L2) TTL_82S16_DIP(L3) // Ram chip TTL_7411_DIP(L4) - DM9312_DIP(L5) + TTL_9312_DIP(L5) TTL_9310_DIP(L6) TTL_7486_DIP(L7) TTL_74193_DIP(L8) @@ -386,7 +386,7 @@ NETLIST_START(breakout) TTL_7483_DIP(M2) TTL_7486_DIP(M3) TTL_7410_DIP(M4) - DM9312_DIP(M5) + TTL_9312_DIP(M5) TTL_9310_DIP(M6) TTL_7427_DIP(M8) TTL_7404_DIP(M9) @@ -395,7 +395,7 @@ NETLIST_START(breakout) TTL_7483_DIP(N2) TTL_7486_DIP(N3) TTL_7411_DIP(N4) - DM9312_DIP(N5) + TTL_9312_DIP(N5) TTL_9310_DIP(N6) TTL_7408_DIP(N7) diff --git a/src/mame/machine/nl_dpatrol.cpp b/src/mame/machine/nl_dpatrol.cpp index 2ba7fc9505a..650b8e04c8e 100644 --- a/src/mame/machine/nl_dpatrol.cpp +++ b/src/mame/machine/nl_dpatrol.cpp @@ -473,8 +473,8 @@ NETLIST_START(dpatrol) TTL_9322(C7, 16H, S5, S1, S6, S2, GROUND, S4, GROUND, S3, GROUND) TTL_7448(C6, C7.Y1, C7.Y2, C7.Y4, C7.Y3, P, SCORE_WINDOW, 16H) - DM9312(B6, 2H, 4H, 8H, 8H, C6.f, GROUND, GROUND, C6.b, C6.e, GROUND, GROUND, C6.c) - DM9312(A6, 2V, 4V, 8V, 8H, C6.a, GROUND, GROUND, C6.g, GROUND, GROUND, GROUND, C6.d) + TTL_9312(B6, 2H, 4H, 8H, 8H, C6.f, GROUND, GROUND, C6.b, C6.e, GROUND, GROUND, C6.c) + TTL_9312(A6, 2V, 4V, 8V, 8H, C6.a, GROUND, GROUND, C6.g, GROUND, GROUND, GROUND, C6.d) TTL_7408_AND(B5_4, A6.YQ, B6.YQ) TTL_7474(A5_1, CLOCK, B5_4.Q, P, P) ALIAS(COMP_SCORE_Q, A5_1.Q) diff --git a/src/mame/machine/nl_stuntcyc.cpp b/src/mame/machine/nl_stuntcyc.cpp index e55a7641574..35f69831de4 100644 --- a/src/mame/machine/nl_stuntcyc.cpp +++ b/src/mame/machine/nl_stuntcyc.cpp @@ -443,8 +443,8 @@ NETLIST_START(stuntcyc) TTL_9322(C7, 16H, S5, S1, S6, S2, GROUND, S3, GROUND, S4, GROUND) TTL_7448(C6, C7.Y1, C7.Y2, C7.Y3, C7.Y4, P, SCORE_WINDOW, 16H) - DM9312(B6, 2H, 4H, 8V, 8H, C6.f, GROUND, GROUND, C6.b, C6.e, GROUND, GROUND, C6.c) - DM9312(A6, 2V, 4V, 8V, 8H, C6.a, GROUND, GROUND, C6.g, GROUND, GROUND, GROUND, C6.d) + TTL_9312(B6, 2H, 4H, 8V, 8H, C6.f, GROUND, GROUND, C6.b, C6.e, GROUND, GROUND, C6.c) + TTL_9312(A6, 2V, 4V, 8V, 8H, C6.a, GROUND, GROUND, C6.g, GROUND, GROUND, GROUND, C6.d) TTL_7408_AND(B5_4, A6.YQ, B6.YQ) TTL_7474(A5_1, CLOCK, B5_4.Q, P, P) ALIAS(COMP_SCORE_Q, A5_1.Q) |