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-rw-r--r--src/devices/sound/fmopl.cpp214
1 files changed, 107 insertions, 107 deletions
diff --git a/src/devices/sound/fmopl.cpp b/src/devices/sound/fmopl.cpp
index b3bfe156593..d113a8ddec5 100644
--- a/src/devices/sound/fmopl.cpp
+++ b/src/devices/sound/fmopl.cpp
@@ -197,53 +197,53 @@ static FILE *sample[1];
struct OPL_SLOT
{
- UINT32 ar; /* attack rate: AR<<2 */
- UINT32 dr; /* decay rate: DR<<2 */
- UINT32 rr; /* release rate:RR<<2 */
- UINT8 KSR; /* key scale rate */
- UINT8 ksl; /* keyscale level */
- UINT8 ksr; /* key scale rate: kcode>>KSR */
- UINT8 mul; /* multiple: mul_tab[ML] */
+ uint32_t ar; /* attack rate: AR<<2 */
+ uint32_t dr; /* decay rate: DR<<2 */
+ uint32_t rr; /* release rate:RR<<2 */
+ uint8_t KSR; /* key scale rate */
+ uint8_t ksl; /* keyscale level */
+ uint8_t ksr; /* key scale rate: kcode>>KSR */
+ uint8_t mul; /* multiple: mul_tab[ML] */
/* Phase Generator */
- UINT32 Cnt; /* frequency counter */
- UINT32 Incr; /* frequency counter step */
- UINT8 FB; /* feedback shift value */
- INT32 *connect1; /* slot1 output pointer */
- INT32 op1_out[2]; /* slot1 output for feedback */
- UINT8 CON; /* connection (algorithm) type */
+ uint32_t Cnt; /* frequency counter */
+ uint32_t Incr; /* frequency counter step */
+ uint8_t FB; /* feedback shift value */
+ int32_t *connect1; /* slot1 output pointer */
+ int32_t op1_out[2]; /* slot1 output for feedback */
+ uint8_t CON; /* connection (algorithm) type */
/* Envelope Generator */
- UINT8 eg_type; /* percussive/non-percussive mode */
- UINT8 state; /* phase type */
- UINT32 TL; /* total level: TL << 2 */
- INT32 TLL; /* adjusted now TL */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level: sl_tab[SL] */
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT8 eg_sh_dr; /* (decay state) */
- UINT8 eg_sel_dr; /* (decay state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
- UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
+ uint8_t eg_type; /* percussive/non-percussive mode */
+ uint8_t state; /* phase type */
+ uint32_t TL; /* total level: TL << 2 */
+ int32_t TLL; /* adjusted now TL */
+ int32_t volume; /* envelope counter */
+ uint32_t sl; /* sustain level: sl_tab[SL] */
+ uint8_t eg_sh_ar; /* (attack state) */
+ uint8_t eg_sel_ar; /* (attack state) */
+ uint8_t eg_sh_dr; /* (decay state) */
+ uint8_t eg_sel_dr; /* (decay state) */
+ uint8_t eg_sh_rr; /* (release state) */
+ uint8_t eg_sel_rr; /* (release state) */
+ uint32_t key; /* 0 = KEY OFF, >0 = KEY ON */
/* LFO */
- UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
- UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
+ uint32_t AMmask; /* LFO Amplitude Modulation enable mask */
+ uint8_t vib; /* LFO Phase Modulation enable flag (active high)*/
/* waveform select */
- UINT16 wavetable;
+ uint16_t wavetable;
};
struct OPL_CH
{
OPL_SLOT SLOT[2];
/* phase generator state */
- UINT32 block_fnum; /* block+fnum */
- UINT32 fc; /* Freq. Increment base */
- UINT32 ksl_base; /* KeyScaleLevel Base step */
- UINT8 kcode; /* key code (for key scaling) */
+ uint32_t block_fnum; /* block+fnum */
+ uint32_t fc; /* Freq. Increment base */
+ uint32_t ksl_base; /* KeyScaleLevel Base step */
+ uint8_t kcode; /* key code (for key scaling) */
};
/* OPL state */
@@ -252,34 +252,34 @@ struct FM_OPL
/* FM channel slots */
OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ uint32_t eg_cnt; /* global envelope generator counter */
+ uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
+ uint32_t eg_timer_add; /* step of eg_timer */
+ uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
- UINT8 rhythm; /* Rhythm mode */
+ uint8_t rhythm; /* Rhythm mode */
- UINT32 fn_tab[1024]; /* fnumber->increment counter */
+ uint32_t fn_tab[1024]; /* fnumber->increment counter */
/* LFO */
- UINT32 LFO_AM;
- INT32 LFO_PM;
+ uint32_t LFO_AM;
+ int32_t LFO_PM;
- UINT8 lfo_am_depth;
- UINT8 lfo_pm_depth_range;
- UINT32 lfo_am_cnt;
- UINT32 lfo_am_inc;
- UINT32 lfo_pm_cnt;
- UINT32 lfo_pm_inc;
+ uint8_t lfo_am_depth;
+ uint8_t lfo_pm_depth_range;
+ uint32_t lfo_am_cnt;
+ uint32_t lfo_am_inc;
+ uint32_t lfo_pm_cnt;
+ uint32_t lfo_pm_inc;
- UINT32 noise_rng; /* 23 bit noise shift register */
- UINT32 noise_p; /* current noise 'phase' */
- UINT32 noise_f; /* current noise period */
+ uint32_t noise_rng; /* 23 bit noise shift register */
+ uint32_t noise_p; /* current noise 'phase' */
+ uint32_t noise_f; /* current noise period */
- UINT8 wavesel; /* waveform select enable flag */
+ uint8_t wavesel; /* waveform select enable flag */
- UINT32 T[2]; /* timer counters */
- UINT8 st[2]; /* timer enable */
+ uint32_t T[2]; /* timer counters */
+ uint8_t st[2]; /* timer enable */
#if BUILD_Y8950
/* Delta-T ADPCM unit (Y8950) */
@@ -287,8 +287,8 @@ struct FM_OPL
YM_DELTAT *deltat;
/* Keyboard and I/O ports interface */
- UINT8 portDirection;
- UINT8 portLatch;
+ uint8_t portDirection;
+ uint8_t portLatch;
OPL_PORTHANDLER_R porthandler_r;
OPL_PORTHANDLER_W porthandler_w;
void * port_param;
@@ -305,14 +305,14 @@ struct FM_OPL
OPL_UPDATEHANDLER UpdateHandler;/* stream update handler */
void *UpdateParam; /* stream update parameter */
- UINT8 type; /* chip type */
- UINT8 address; /* address register */
- UINT8 status; /* status flag */
- UINT8 statusmask; /* status mask */
- UINT8 mode; /* Reg.08 : CSM,notesel,etc. */
+ uint8_t type; /* chip type */
+ uint8_t address; /* address register */
+ uint8_t status; /* status flag */
+ uint8_t statusmask; /* status mask */
+ uint8_t mode; /* Reg.08 : CSM,notesel,etc. */
- UINT32 clock; /* master clock (Hz) */
- UINT32 rate; /* sampling rate (Hz) */
+ uint32_t clock; /* master clock (Hz) */
+ uint32_t rate; /* sampling rate (Hz) */
double freqbase; /* frequency base */
attotime TimerBase; /* Timer base time (==sampling time)*/
device_t *device;
@@ -320,7 +320,7 @@ struct FM_OPL
signed int phase_modulation; /* phase modulation input (SLOT 2) */
signed int output[1];
#if BUILD_Y8950
- INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
+ int32_t output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
#endif
};
@@ -385,13 +385,13 @@ static const double ksl_tab[8*16]=
#undef DV
/* 0 / 3.0 / 1.5 / 6.0 dB/OCT */
-static const UINT32 ksl_shift[4] = { 31, 1, 2, 0 };
+static const uint32_t ksl_shift[4] = { 31, 1, 2, 0 };
/* sustain level table (3dB per step) */
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
-#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
-static const UINT32 sl_tab[16]={
+#define SC(db) (uint32_t) ( db * (2.0/ENV_STEP) )
+static const uint32_t sl_tab[16]={
SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
@@ -506,7 +506,7 @@ O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
/* multiple table */
#define ML 2
-static const UINT8 mul_tab[16]= {
+static const uint8_t mul_tab[16]= {
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
ML/2, 1*ML, 2*ML, 3*ML, 4*ML, 5*ML, 6*ML, 7*ML,
8*ML, 9*ML,10*ML,10*ML,12*ML,12*ML,15*ML,15*ML
@@ -543,7 +543,7 @@ static unsigned int sin_tab[SIN_LEN * 4];
#define LFO_AM_TAB_ELEMENTS 210
-static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
+static const uint8_t lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
0,0,0,0,0,0,0,
1,1,1,1,
2,2,2,2,
@@ -599,7 +599,7 @@ static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
};
/* LFO Phase Modulation table (verified on real YM3812) */
-static const INT8 lfo_pm_table[8*8*2] = {
+static const int8_t lfo_pm_table[8*8*2] = {
/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
@@ -701,12 +701,12 @@ static inline void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
/* advance LFO to next sample */
static inline void advance_lfo(FM_OPL *OPL)
{
- UINT8 tmp;
+ uint8_t tmp;
/* LFO */
OPL->lfo_am_cnt += OPL->lfo_am_inc;
- if (OPL->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
- OPL->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
+ if (OPL->lfo_am_cnt >= ((uint32_t)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
+ OPL->lfo_am_cnt -= ((uint32_t)LFO_AM_TAB_ELEMENTS<<LFO_SH);
tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
@@ -821,7 +821,7 @@ static inline void advance(FM_OPL *OPL)
/* Phase Generator */
if(op->vib)
{
- UINT8 block;
+ uint8_t block;
unsigned int block_fnum = CH->block_fnum;
unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
@@ -862,7 +862,7 @@ static inline void advance(FM_OPL *OPL)
while (i)
{
/*
- UINT32 j;
+ uint32_t j;
j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
*/
@@ -883,9 +883,9 @@ static inline void advance(FM_OPL *OPL)
}
-static inline signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
+static inline signed int op_calc(uint32_t phase, unsigned int env, signed int pm, unsigned int wave_tab)
{
- UINT32 p;
+ uint32_t p;
p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ];
@@ -894,9 +894,9 @@ static inline signed int op_calc(UINT32 phase, unsigned int env, signed int pm,
return tl_tab[p];
}
-static inline signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
+static inline signed int op_calc1(uint32_t phase, unsigned int env, signed int pm, unsigned int wave_tab)
{
- UINT32 p;
+ uint32_t p;
p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK) ];
@@ -906,7 +906,7 @@ static inline signed int op_calc1(UINT32 phase, unsigned int env, signed int pm,
}
-#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (OPL->LFO_AM & (OP)->AMmask))
+#define volume_calc(OP) ((OP)->TLL + ((uint32_t)(OP)->volume) + (OPL->LFO_AM & (OP)->AMmask))
/* calculate output */
static inline void OPL_CALC_CH( FM_OPL *OPL, OPL_CH *CH )
@@ -1051,7 +1051,7 @@ static inline void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
/* when res1 = 0 phase = 0x000 | 0xd0; */
/* when res1 = 1 phase = 0x200 | (0xd0>>2); */
- UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
+ uint32_t phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
/* enable gate based on frequency of operator 2 in channel 8 */
unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
@@ -1092,7 +1092,7 @@ static inline void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
/* when bit8 = 0 phase = 0x100; */
/* when bit8 = 1 phase = 0x200; */
- UINT32 phase = bit8 ? 0x200 : 0x100;
+ uint32_t phase = bit8 ? 0x200 : 0x100;
/* Noise bit XOR'es phase by 0x100 */
/* when noisebit = 0 pass the phase from calculation above */
@@ -1122,7 +1122,7 @@ static inline void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
/* when res1 = 0 phase = 0x000 | 0x100; */
/* when res1 = 1 phase = 0x200 | 0x100; */
- UINT32 phase = res1 ? 0x300 : 0x100;
+ uint32_t phase = res1 ? 0x300 : 0x100;
/* enable gate based on frequency of operator 2 in channel 8 */
unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
@@ -1275,7 +1275,7 @@ static void OPL_initalize(FM_OPL *OPL)
for( i=0 ; i < 1024 ; i++ )
{
/* opn phase increment counter = 20bit */
- OPL->fn_tab[i] = (UINT32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
+ OPL->fn_tab[i] = (uint32_t)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
#if 0
logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n",
i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
@@ -1294,7 +1294,7 @@ static void OPL_initalize(FM_OPL *OPL)
logerror("FMOPL.C: ksl_tab[oct=%2i] =",i);
for (j=0; j<16; j++)
{
- logerror("%08x ", static_cast<UINT32>(ksl_tab[i*16+j]) );
+ logerror("%08x ", static_cast<uint32_t>(ksl_tab[i*16+j]) );
}
logerror("\n");
}
@@ -1319,7 +1319,7 @@ static void OPL_initalize(FM_OPL *OPL)
}
-static inline void FM_KEYON(OPL_SLOT *SLOT, UINT32 key_set)
+static inline void FM_KEYON(OPL_SLOT *SLOT, uint32_t key_set)
{
if( !SLOT->key )
{
@@ -1331,7 +1331,7 @@ static inline void FM_KEYON(OPL_SLOT *SLOT, UINT32 key_set)
SLOT->key |= key_set;
}
-static inline void FM_KEYOFF(OPL_SLOT *SLOT, UINT32 key_clr)
+static inline void FM_KEYOFF(OPL_SLOT *SLOT, uint32_t key_clr)
{
if( SLOT->key )
{
@@ -1478,8 +1478,8 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
}
else
{ /* set IRQ mask ,timer enable*/
- UINT8 st1 = v&1;
- UINT8 st2 = (v>>1)&1;
+ uint8_t st1 = v&1;
+ uint8_t st2 = (v>>1)&1;
/* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
OPL_STATUS_RESET(OPL, v & (0x78-0x08) );
@@ -1658,11 +1658,11 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
/* update */
if(CH->block_fnum != block_fnum)
{
- UINT8 block = block_fnum >> 10;
+ uint8_t block = block_fnum >> 10;
CH->block_fnum = block_fnum;
- CH->ksl_base = static_cast<UINT32>(ksl_tab[block_fnum>>6]);
+ CH->ksl_base = static_cast<uint32_t>(ksl_tab[block_fnum>>6]);
CH->fc = OPL->fn_tab[block_fnum&0x03ff] >> (7-block);
/* BLK 2,1,0 bits -> bits 3,2,1 of kcode */
@@ -1790,8 +1790,8 @@ static void OPL_postload(FM_OPL *OPL)
OPL_CH *CH = &OPL->P_CH[ch];
/* Look up key scale level */
- UINT32 block_fnum = CH->block_fnum;
- CH->ksl_base = static_cast<UINT32>(ksl_tab[block_fnum >> 6]);
+ uint32_t block_fnum = CH->block_fnum;
+ CH->ksl_base = static_cast<uint32_t>(ksl_tab[block_fnum >> 6]);
CH->fc = OPL->fn_tab[block_fnum & 0x03ff] >> (7 - (block_fnum >> 10));
for( slot=0 ; slot < 2 ; slot++ )
@@ -1928,7 +1928,7 @@ static void OPL_save_state(FM_OPL *OPL, device_t *device)
device->machine().save().register_postload(save_prepost_delegate(FUNC(OPL_postload), OPL));
}
-static void OPL_clock_changed(FM_OPL *OPL, UINT32 clock, UINT32 rate)
+static void OPL_clock_changed(FM_OPL *OPL, uint32_t clock, uint32_t rate)
{
OPL->clock = clock;
OPL->rate = rate;
@@ -1941,7 +1941,7 @@ static void OPL_clock_changed(FM_OPL *OPL, UINT32 clock, UINT32 rate)
/* Create one of virtual YM3812/YM3526/Y8950 */
/* 'clock' is chip clock in Hz */
/* 'rate' is sampling rate */
-static FM_OPL *OPLCreate(device_t *device, UINT32 clock, UINT32 rate, int type)
+static FM_OPL *OPLCreate(device_t *device, uint32_t clock, uint32_t rate, int type)
{
char *ptr;
FM_OPL *OPL;
@@ -1957,7 +1957,7 @@ static FM_OPL *OPLCreate(device_t *device, UINT32 clock, UINT32 rate, int type)
#endif
/* allocate memory block */
- ptr = (char *)auto_alloc_array_clear(device->machine(), UINT8, state_size);
+ ptr = (char *)auto_alloc_array_clear(device->machine(), uint8_t, state_size);
OPL = (FM_OPL *)ptr;
@@ -2053,7 +2053,7 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
case 0x0f: /* ADPCM-DATA */
if(OPL->type&OPL_TYPE_ADPCM)
{
- UINT8 val;
+ uint8_t val;
val = YM_DELTAT_ADPCM_Read(OPL->deltat);
/*logerror("Y8950: read ADPCM value read=%02x\n",val);*/
@@ -2125,12 +2125,12 @@ static int OPLTimerOver(FM_OPL *OPL,int c)
#if (BUILD_YM3812)
-void ym3812_clock_changed(void *chip, UINT32 clock, UINT32 rate)
+void ym3812_clock_changed(void *chip, uint32_t clock, uint32_t rate)
{
OPL_clock_changed((FM_OPL *)chip, clock, rate);
}
-void * ym3812_init(device_t *device, UINT32 clock, UINT32 rate)
+void * ym3812_init(device_t *device, uint32_t clock, uint32_t rate)
{
/* emulator create */
FM_OPL *YM3812 = OPLCreate(device,clock,rate,OPL_TYPE_YM3812);
@@ -2200,7 +2200,7 @@ void ym3812_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *
void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
+ uint8_t rhythm = OPL->rhythm&0x20;
OPLSAMPLE *buf = buffer;
int i;
@@ -2258,12 +2258,12 @@ void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length)
#if (BUILD_YM3526)
-void ym3526_clock_changed(void *chip, UINT32 clock, UINT32 rate)
+void ym3526_clock_changed(void *chip, uint32_t clock, uint32_t rate)
{
OPL_clock_changed((FM_OPL *)chip, clock, rate);
}
-void *ym3526_init(device_t *device, UINT32 clock, UINT32 rate)
+void *ym3526_init(device_t *device, uint32_t clock, uint32_t rate)
{
/* emulator create */
FM_OPL *YM3526 = OPLCreate(device,clock,rate,OPL_TYPE_YM3526);
@@ -2332,7 +2332,7 @@ void ym3526_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *
void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
+ uint8_t rhythm = OPL->rhythm&0x20;
OPLSAMPLE *buf = buffer;
int i;
@@ -2391,18 +2391,18 @@ void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length)
#if BUILD_Y8950
-static void Y8950_deltat_status_set(void *chip, UINT8 changebits)
+static void Y8950_deltat_status_set(void *chip, uint8_t changebits)
{
FM_OPL *Y8950 = (FM_OPL *)chip;
OPL_STATUS_SET(Y8950, changebits);
}
-static void Y8950_deltat_status_reset(void *chip, UINT8 changebits)
+static void Y8950_deltat_status_reset(void *chip, uint8_t changebits)
{
FM_OPL *Y8950 = (FM_OPL *)chip;
OPL_STATUS_RESET(Y8950, changebits);
}
-void *y8950_init(device_t *device, UINT32 clock, UINT32 rate)
+void *y8950_init(device_t *device, uint32_t clock, uint32_t rate)
{
/* emulator create */
FM_OPL *Y8950 = OPLCreate(device,clock,rate,OPL_TYPE_Y8950);
@@ -2472,7 +2472,7 @@ void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *p
void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size )
{
FM_OPL *OPL = (FM_OPL *)chip;
- OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr);
+ OPL->deltat->memory = (uint8_t *)(deltat_mem_ptr);
OPL->deltat->memory_size = deltat_mem_size;
}
@@ -2487,7 +2487,7 @@ void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
int i;
FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
+ uint8_t rhythm = OPL->rhythm&0x20;
YM_DELTAT *DELTAT = OPL->deltat;
OPLSAMPLE *buf = buffer;