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-rw-r--r--android-project/app/src/main/AndroidManifest.xml4
-rw-r--r--hash/pico.xml83
-rw-r--r--hash/sawatte.xml39
-rw-r--r--hash/sms.xml2
-rw-r--r--hash/zorba.xml869
-rw-r--r--scripts/build/verinfo.py2
-rw-r--r--scripts/target/ldplayer/ldplayer.lua88
-rw-r--r--scripts/target/mame/mess.lua2
-rw-r--r--scripts/target/mame/virtual.lua11
-rw-r--r--src/devices/bus/a2bus/a2bus.h2
-rw-r--r--src/devices/bus/isa/mda.cpp2
-rw-r--r--src/devices/bus/isa/omti8621.cpp2
-rw-r--r--src/devices/bus/nes/disksys.cpp2
-rw-r--r--src/devices/bus/scsi/scsihle.cpp2
-rw-r--r--src/devices/bus/ti99_peb/ti_32kmem.cpp2
-rw-r--r--src/devices/bus/ti99x/990_hd.h2
-rw-r--r--src/devices/bus/vcs/harmony_melody.cpp2
-rw-r--r--src/devices/cpu/alph8201/8201dasm.cpp2
-rw-r--r--src/devices/cpu/alph8201/alph8201.cpp34
-rw-r--r--src/devices/cpu/alph8201/alph8201.h144
-rw-r--r--src/devices/cpu/alto2/a2disp.h2
-rw-r--r--src/devices/cpu/alto2/a2kbd.h4
-rw-r--r--src/devices/cpu/alto2/a2mem.cpp2
-rw-r--r--src/devices/cpu/alto2/a2mem.h4
-rw-r--r--src/devices/cpu/amis2000/amis2000.h2
-rw-r--r--src/devices/cpu/apexc/apexc.cpp8
-rw-r--r--src/devices/cpu/apexc/apexc.h2
-rw-r--r--src/devices/cpu/f8/f8.cpp2
-rw-r--r--src/devices/cpu/f8/f8.h2
-rw-r--r--src/devices/cpu/g65816/g65816cm.h2
-rw-r--r--src/devices/cpu/i4004/i4004.h2
-rw-r--r--src/devices/cpu/i8008/i8008.h2
-rw-r--r--src/devices/cpu/lh5801/lh5801.h2
-rw-r--r--src/devices/cpu/m37710/m37710cm.h2
-rw-r--r--src/devices/cpu/mcs51/mcs51.cpp2
-rw-r--r--src/devices/cpu/mcs51/mcs51.h8
-rw-r--r--src/devices/cpu/nec/v53.cpp2
-rw-r--r--src/devices/cpu/pdp1/pdp1.cpp10
-rw-r--r--src/devices/cpu/pps4/pps4.h2
-rw-r--r--src/devices/cpu/sh4/sh3comn.h2
-rw-r--r--src/devices/cpu/sh4/sh4.cpp310
-rw-r--r--src/devices/cpu/sh4/sh4.h50
-rw-r--r--src/devices/cpu/sh4/sh4comn.cpp291
-rw-r--r--src/devices/cpu/spc700/spc700.cpp2
-rw-r--r--src/devices/cpu/tlcs900/900tbl.hxx2
-rw-r--r--src/devices/cpu/tlcs900/dasm900.cpp2
-rw-r--r--src/devices/cpu/tms7000/tms7000.cpp2
-rw-r--r--src/devices/cpu/tms9900/ti990_10.cpp2
-rw-r--r--src/devices/cpu/tms9900/tms9900.h2
-rw-r--r--src/devices/cpu/tms9900/tms9995.h2
-rw-r--r--src/devices/cpu/uml.h6
-rw-r--r--src/devices/cpu/z180/z180ops.h4
-rw-r--r--src/devices/cpu/z80/kl5c80a12.cpp2
-rw-r--r--src/devices/cpu/z80/kl5c80a12.h2
-rw-r--r--src/devices/machine/6821pia.h2
-rw-r--r--src/devices/machine/68230pit.cpp2
-rw-r--r--src/devices/machine/68230pit.h2
-rw-r--r--src/devices/machine/corvushd.h2
-rw-r--r--src/devices/machine/cs4031.cpp2
-rw-r--r--src/devices/machine/hdc92x4.cpp2
-rw-r--r--src/devices/machine/hdc92x4.h2
-rw-r--r--src/devices/machine/mc6854.h2
-rw-r--r--src/devices/machine/roc10937.h2
-rw-r--r--src/devices/machine/scnxx562.cpp2
-rw-r--r--src/devices/machine/stvcd.cpp2
-rw-r--r--src/devices/machine/wd7600.cpp2
-rw-r--r--src/devices/machine/wd_fdc.h4
-rw-r--r--src/devices/machine/z80scc.cpp4
-rw-r--r--src/devices/machine/z80scc.h2
-rw-r--r--src/devices/sound/315-5641.h2
-rw-r--r--src/devices/sound/beep.h2
-rw-r--r--src/devices/sound/disc_wav.h2
-rw-r--r--src/devices/sound/discrete.h42
-rw-r--r--src/devices/sound/es1373.h4
-rw-r--r--src/devices/sound/fm.cpp4
-rw-r--r--src/devices/sound/fm.h4
-rw-r--r--src/devices/sound/fm2612.cpp2
-rw-r--r--src/devices/sound/fmopl.cpp2
-rw-r--r--src/devices/sound/k054539.h2
-rw-r--r--src/devices/sound/mea8000.h2
-rw-r--r--src/devices/sound/msm5205.h2
-rw-r--r--src/devices/sound/msm5232.cpp2
-rw-r--r--src/devices/sound/nes_apu.cpp2
-rw-r--r--src/devices/sound/nes_apu.h2
-rw-r--r--src/devices/sound/nes_defs.h2
-rw-r--r--src/devices/sound/pokey.cpp6
-rw-r--r--src/devices/sound/pokey.h2
-rw-r--r--src/devices/sound/s14001a.h2
-rw-r--r--src/devices/sound/saa1099.h2
-rw-r--r--src/devices/sound/tms36xx.h2
-rw-r--r--src/devices/sound/tms5110.h2
-rw-r--r--src/devices/sound/vlm5030.h2
-rw-r--r--src/devices/sound/ym2151.h2
-rw-r--r--src/devices/sound/ym2413.h2
-rw-r--r--src/devices/sound/ymdeltat.h6
-rw-r--r--src/devices/sound/ymf262.cpp2
-rw-r--r--src/devices/video/crtc_ega.h2
-rw-r--r--src/devices/video/ef9345.h6
-rw-r--r--src/devices/video/gb_lcd.h2
-rw-r--r--src/devices/video/mc6847.h4
-rw-r--r--src/devices/video/sprite.h2
-rw-r--r--src/devices/video/tms34061.cpp2
-rw-r--r--src/devices/video/upd7220.cpp2
-rw-r--r--src/devices/video/vic4567.h2
-rw-r--r--src/devices/video/zeus2.h4
-rw-r--r--src/emu/devfind.h10
-rw-r--r--src/emu/device.cpp6
-rw-r--r--src/emu/diserial.h2
-rw-r--r--src/emu/drawgfx.h2
-rw-r--r--src/emu/drivers/emudummy.cpp36
-rw-r--r--src/emu/gamedrv.h4
-rw-r--r--src/emu/save.h2
-rw-r--r--src/emu/softlist.h2
-rw-r--r--src/emu/sound.cpp2
-rw-r--r--src/emu/tilemap.h2
-rw-r--r--src/emu/video/resnet.h2
-rw-r--r--src/frontend/mame/ui/datmenu.cpp13
-rw-r--r--src/frontend/mame/ui/dirmenu.h2
-rw-r--r--src/frontend/mame/ui/inputmap.h2
-rw-r--r--src/frontend/mame/ui/moptions.cpp2
-rw-r--r--src/frontend/mame/ui/selmenu.h2
-rw-r--r--src/frontend/mame/ui/text.h2
-rw-r--r--src/ldplayer/layout/LICENSE116
-rw-r--r--src/ldplayer/layout/README.md6
-rw-r--r--src/ldplayer/ldplayer.lst13
-rw-r--r--src/lib/formats/flopimg.h2
-rw-r--r--src/lib/formats/upd765_dsk.cpp2
-rw-r--r--src/lib/netlist/devices/nld_9310.h2
-rw-r--r--src/lib/netlist/devices/nld_9316.h2
-rw-r--r--src/lib/netlist/devices/nld_truthtable.h2
-rw-r--r--src/lib/netlist/nl_base.h4
-rw-r--r--src/lib/netlist/nl_dice_compat.h2
-rw-r--r--src/lib/util/aviio.cpp2
-rw-r--r--src/lib/util/coretmpl.h2
-rw-r--r--src/lib/util/delegate.h2
-rw-r--r--src/lib/util/strformat.h10
-rw-r--r--src/mame/audio/phoenix.cpp2
-rw-r--r--src/mame/audio/pleiads.cpp4
-rw-r--r--src/mame/audio/redbaron.cpp2
-rw-r--r--src/mame/audio/seibu.cpp151
-rw-r--r--src/mame/audio/seibu.h169
-rw-r--r--src/mame/drivers/airraid.cpp35
-rw-r--r--src/mame/drivers/altair.cpp2
-rw-r--r--src/mame/drivers/alto2.cpp2
-rw-r--r--src/mame/drivers/ampoker2.cpp4
-rw-r--r--src/mame/drivers/apexc.cpp2
-rw-r--r--src/mame/drivers/apple2e.cpp2
-rw-r--r--src/mame/drivers/aristmk5.cpp46
-rw-r--r--src/mame/drivers/aristmk6.cpp89
-rw-r--r--src/mame/drivers/asteroid.cpp2
-rw-r--r--src/mame/drivers/atarisy2.cpp2
-rw-r--r--src/mame/drivers/bionicc.cpp39
-rw-r--r--src/mame/drivers/bloodbro.cpp18
-rw-r--r--src/mame/drivers/cabal.cpp17
-rw-r--r--src/mame/drivers/champbwl.cpp2
-rw-r--r--src/mame/drivers/coinmvga.cpp14
-rw-r--r--src/mame/drivers/cvs.cpp2
-rw-r--r--src/mame/drivers/dcon.cpp38
-rw-r--r--src/mame/drivers/deadang.cpp49
-rw-r--r--src/mame/drivers/dec0.cpp2
-rw-r--r--src/mame/drivers/dgn_beta.cpp2
-rw-r--r--src/mame/drivers/dynduke.cpp19
-rw-r--r--src/mame/drivers/fidel6502.cpp23
-rw-r--r--src/mame/drivers/fidel68k.cpp2
-rw-r--r--src/mame/drivers/fidelz80.cpp2
-rw-r--r--src/mame/drivers/fmtowns.cpp19
-rw-r--r--src/mame/drivers/freekick.cpp2
-rw-r--r--src/mame/drivers/goodejan.cpp18
-rw-r--r--src/mame/drivers/hec2hrp.cpp2
-rw-r--r--src/mame/drivers/hp9k.cpp2
-rw-r--r--src/mame/drivers/isbc.cpp38
-rw-r--r--src/mame/drivers/jubilee.cpp6
-rw-r--r--src/mame/drivers/kas89.cpp2
-rw-r--r--src/mame/drivers/ldplayer.cpp (renamed from src/ldplayer/ldplayer.cpp)40
-rw-r--r--src/mame/drivers/legionna.cpp107
-rwxr-xr-xsrc/mame/drivers/mac128.cpp88
-rw-r--r--src/mame/drivers/magicfly.cpp6
-rw-r--r--src/mame/drivers/metalmx.cpp2
-rw-r--r--src/mame/drivers/metro.cpp2
-rw-r--r--src/mame/drivers/multigam.cpp2
-rw-r--r--src/mame/drivers/namcos12.cpp11
-rw-r--r--src/mame/drivers/neogeocd.cpp2
-rw-r--r--src/mame/drivers/nes.cpp4
-rw-r--r--src/mame/drivers/nmk16.cpp34
-rw-r--r--src/mame/drivers/norautp.cpp8
-rw-r--r--src/mame/drivers/notetaker.cpp14
-rw-r--r--src/mame/drivers/omegrace.cpp2
-rw-r--r--src/mame/drivers/pachifev.cpp4
-rw-r--r--src/mame/drivers/pcw.cpp4
-rw-r--r--src/mame/drivers/peplus.cpp1520
-rw-r--r--src/mame/drivers/pg685.cpp184
-rw-r--r--src/mame/drivers/phoenix.cpp2
-rw-r--r--src/mame/drivers/r2dx_v33.cpp21
-rw-r--r--src/mame/drivers/raiden.cpp23
-rw-r--r--src/mame/drivers/raiden2.cpp81
-rw-r--r--src/mame/drivers/rainbow.cpp51
-rw-r--r--src/mame/drivers/sega_sawatte.cpp2
-rw-r--r--src/mame/drivers/seicupbl.cpp1
-rw-r--r--src/mame/drivers/sengokmj.cpp18
-rw-r--r--src/mame/drivers/shanghai.cpp40
-rw-r--r--src/mame/drivers/silvmil.cpp2
-rw-r--r--src/mame/drivers/snookr10.cpp4
-rw-r--r--src/mame/drivers/spc1500.cpp2
-rw-r--r--src/mame/drivers/tecmo.cpp12
-rw-r--r--src/mame/drivers/ti99_2.cpp2
-rw-r--r--src/mame/drivers/ti99_4p.cpp2
-rw-r--r--src/mame/drivers/toki.cpp31
-rw-r--r--src/mame/drivers/x68k.cpp6
-rw-r--r--src/mame/drivers/yunsun16.cpp2
-rw-r--r--src/mame/drivers/zorba.cpp34
-rw-r--r--src/mame/includes/chihiro.h4
-rw-r--r--src/mame/includes/fmtowns.h5
-rw-r--r--src/mame/includes/hec2hrp.h2
-rw-r--r--src/mame/includes/hp48.h2
-rw-r--r--src/mame/includes/iremipt.h2
-rw-r--r--src/mame/includes/lisa.h2
-rw-r--r--src/mame/includes/midzeus2.h31
-rw-r--r--src/mame/includes/n64.h1
-rw-r--r--src/mame/includes/raiden2.h3
-rw-r--r--src/mame/includes/segahang.h2
-rw-r--r--src/mame/includes/segaipt.h12
-rw-r--r--src/mame/includes/starshp1.h4
-rw-r--r--src/mame/includes/swtpc09.h2
-rw-r--r--src/mame/includes/thomson.h8
-rw-r--r--src/mame/layout/pr8210.lay (renamed from src/ldplayer/layout/pr8210.lay)0
-rw-r--r--src/mame/machine/alpha8201.cpp2
-rw-r--r--src/mame/machine/amstrad.cpp4
-rw-r--r--src/mame/machine/apple2gs.cpp2
-rw-r--r--src/mame/machine/coco.cpp2
-rw-r--r--src/mame/machine/fd1094.cpp2
-rw-r--r--src/mame/machine/fmt_icmem.cpp184
-rw-r--r--src/mame/machine/fmt_icmem.h77
-rw-r--r--src/mame/machine/gaelco3d.cpp2
-rw-r--r--src/mame/machine/galaxold.cpp2
-rw-r--r--src/mame/machine/hec2hrp.cpp4
-rw-r--r--src/mame/machine/iteagle_fpga.cpp2
-rw-r--r--src/mame/machine/kaneko_toybox.h2
-rw-r--r--src/mame/machine/kc_keyb.cpp2
-rw-r--r--src/mame/machine/lisa.cpp4
-rw-r--r--src/mame/machine/lynx.cpp8
-rw-r--r--src/mame/machine/mega32x.cpp2
-rw-r--r--src/mame/machine/micropolis.cpp2
-rw-r--r--src/mame/machine/mie.h2
-rw-r--r--src/mame/machine/n64.cpp10
-rw-r--r--src/mame/machine/tecmosys.cpp2
-rw-r--r--src/mame/machine/thomson.cpp4
-rw-r--r--src/mame/machine/vector06.cpp2
-rw-r--r--src/mame/machine/wpc.h4
-rw-r--r--src/mame/mame.lst38
-rw-r--r--src/mame/video/911_chr.h4
-rw-r--r--src/mame/video/911_vdt.h2
-rw-r--r--src/mame/video/angelkds.cpp2
-rw-r--r--src/mame/video/gic.h2
-rw-r--r--src/mame/video/gime.h2
-rw-r--r--src/mame/video/gstriker.cpp4
-rw-r--r--src/mame/video/jagblit.h2
-rw-r--r--src/mame/video/konamigx.cpp2
-rw-r--r--src/mame/video/midzeus2.cpp1365
-rw-r--r--src/mame/video/ppu2c0x.h2
-rw-r--r--src/mame/video/stic.h2
-rw-r--r--src/mame/video/tbowl.cpp4
-rw-r--r--src/mame/virtual.flt1
-rw-r--r--src/mame/virtual.lst3
-rw-r--r--src/osd/eminline.h2
-rw-r--r--src/osd/modules/file/windir.cpp2
-rw-r--r--src/osd/modules/file/winrtdir.cpp2
-rw-r--r--src/osd/modules/input/input_win32.cpp12
-rw-r--r--src/osd/modules/opengl/gl_shader_tool.cpp4
-rw-r--r--src/osd/modules/opengl/gl_shader_tool.h8
-rw-r--r--src/osd/modules/osdmodule.h2
-rw-r--r--src/osd/osdsync.h2
-rw-r--r--src/tools/imgtool/formats/coco_dsk.cpp2
-rw-r--r--src/tools/imgtool/imgtool.h4
-rw-r--r--src/tools/imgtool/library.cpp2
-rw-r--r--src/tools/imgtool/library.h2
275 files changed, 4483 insertions, 3072 deletions
diff --git a/android-project/app/src/main/AndroidManifest.xml b/android-project/app/src/main/AndroidManifest.xml
index 4ab4f0b722d..eebca8ab551 100644
--- a/android-project/app/src/main/AndroidManifest.xml
+++ b/android-project/app/src/main/AndroidManifest.xml
@@ -8,8 +8,8 @@
android:versionName="0.179"
android:installLocation="auto">
- <!-- Android 4.0 -->
- <uses-sdk android:minSdkVersion="14" android:targetSdkVersion="14" />
+ <!-- Android 5.0 -->
+ <uses-sdk android:minSdkVersion="21" android:targetSdkVersion="21" />
<!-- OpenGL ES 2.0 -->
<uses-feature android:glEsVersion="0x00020000" />
diff --git a/hash/pico.xml b/hash/pico.xml
index 77e1808613f..4fc2fa3cc21 100644
--- a/hash/pico.xml
+++ b/hash/pico.xml
@@ -651,6 +651,31 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
</part>
</software>
+ <software name="cookpico">
+ <description>Cooking Pico (Jpn)</description>
+ <year>1999</year>
+ <publisher>Sega Toys</publisher>
+ <part name="cart" interface="pico_cart">
+ <feature name="pcb" value="171-7967" />
+ <feature name="ic1" value="9K0-0001A-RV" />
+ <dataarea name="rom" size="2097152">
+ <rom name="9k0-0001a-rv.ic1" size="2097152" crc="b94f7d54" sha1="dabeb440adbb7477cc880c51fb0cfc1e5f99d23b" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="cookpicok" cloneof="cookpico">
+ <description>Cooking Pico (Kor)</description>
+ <year>1999</year> <!-- PCB had a 2001 date so could be later -->
+ <publisher>Sega Toys / Samsung</publisher>
+ <info name="serial" value="HPC-6076"/>
+ <part name="cart" interface="pico_cart">
+ <dataarea name="rom" size="2097152">
+ <rom name="samsung pico-cook.u1" size="2097152" crc="c8fd3ad4" sha1="6d35b3411df37222acb3a36e4c7830e92a8e3fba" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
<software name="crayola">
<description>Crayola - Create a World (USA)</description>
<year>19??</year>
@@ -2071,6 +2096,7 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</part>
</software>
+ <!-- The 'Best Selection' release has been confirmed to contain the exact same data as the original (but stored in an epoxy block) -->
<software name="ihthomas">
<description>Issho ni Hashirou Kikansha Thomas (Jpn)</description>
<year>199?</year>
@@ -4721,6 +4747,18 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</part>
</software>
+ <software name="toystor2k" cloneof="toystor2">
+ <description>Toy Story 2 (Kor)</description>
+ <year>199?</year>
+ <publisher>Sega Toys / Samsung</publisher>
+ <info name="serial" value="HPC-6090"/>
+ <part name="cart" interface="pico_cart">
+ <dataarea name="rom" size="2097152">
+ <rom name="samsung pico-toy2.u1" size="2097152" crc="27ef458e" sha1="e4f908d235d25d21390a8965416a34c91b880b63" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
<software name="ultraher">
<description>UltraHero (Jpn)</description>
<year>1995</year>
@@ -5104,16 +5142,17 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</software>
<software name="gakkohik">
- <description>Gakken no Obenkyou Soft - Tashizan Hikizan (Jpn, Prototype)</description>
+ <description>Gakken no Obenkyou Soft - Tashizan Hikizan (Japan)</description> <!-- release matches previously dumped prototype -->
<year>1995</year>
<publisher>Gakken</publisher>
+ <info name="serial" value="T-169070-00"/>
<part name="cart" interface="pico_cart">
<dataarea name="rom" size="524288">
- <rom name="gakken no obenkyou soft tasizan hikizan (1995)(chips - gakken)(jp)(beta).bin" size="524288" crc="25639a73" sha1="d0a768236e21d05ea1734691ab9031ea7a4b3e47" offset="000000" loadflag="load16_word_swap" />
+ <rom name="mpr-17620-s.u1" size="524288" crc="25639a73" sha1="d0a768236e21d05ea1734691ab9031ea7a4b3e47" offset="000000" loadflag="load16_word_swap" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="hkiinkaip" cloneof="hkiinkai">
<description>Heisei Kyouiku Iinkai Jr. (Jpn, Prototype)</description>
<year>1995</year>
@@ -6008,6 +6047,42 @@ But how do later protos fit with this theory? Maybe the later protos were from t
</part>
</software>
+ <software name="clouwizd">
+ <description>The Cloud is Wizard (Kor)</description>
+ <year>1997</year>
+ <publisher>Sega / Samsung</publisher>
+ <info name="serial" value="T-102131-08" />
+ <part name="cart" interface="pico_cart">
+ <dataarea name="rom" size="1048576">
+ <rom name="samsung km23c8100dg pico-9837g.u1" size="1048576" crc="70b7440e" sha1="d6f7b9c9e5714afebfdb116480f73976eae23d17" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="muattago">
+ <description>Muat Tago Galka (Kor)</description>
+ <year>1998</year>
+ <publisher>Sega / Samsung</publisher>
+ <info name="serial" value="T-102151-08" />
+ <part name="cart" interface="pico_cart">
+ <dataarea name="rom" size="1048576">
+ <rom name="samsung km23c8100dg pico-9840g.u1" size="1048576" crc="9974d421" sha1="7026dec346ce459ad5e81f3c4d209e2480d6626c" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="drmtour">
+ <description>Dreamland Tour (Kor)</description>
+ <year>1997</year>
+ <publisher>Sega / Samsung</publisher>
+ <info name="serial" value="T-102161-08" />
+ <part name="cart" interface="pico_cart">
+ <dataarea name="rom" size="1048576">
+ <rom name="samsung km23c8100dg pico-9728g.u1" size="1048576" crc="7d2aaa9a" sha1="17060b1d622fa8dffe0db2de748472c21aaac364" offset="000000" loadflag="load16_word_swap" />
+ </dataarea>
+ </part>
+ </software>
+
<!--
Remaining hoarded / unavailable dumps
diff --git a/hash/sawatte.xml b/hash/sawatte.xml
index c72719da411..ecb9d48af11 100644
--- a/hash/sawatte.xml
+++ b/hash/sawatte.xml
@@ -17,6 +17,19 @@
</part>
</software>
+ <software name="doraedbl">
+ <description>Doraemon Nobita no Dou Butsu Land</description>
+ <year>1996</year>
+ <publisher>Sega</publisher>
+ <part name="cart" interface="sawatte_cart">
+ <feature name="pcb" value="171-7323A" />
+ <feature name="ic1" value="MPR-19040" />
+ <dataarea name="rom" size="524288">
+ <rom name="mpr-19040.ic1" size="524288" crc="0c9bae2f" sha1="bc5030fab99e8f4b1bcc8ed77c1cc07d8407df93" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
<software name="mickkuda">
<description>Mickey no Kudamonoya-san</description>
<year>1996</year>
@@ -77,6 +90,19 @@
</part>
</software>
+ <software name="soreike">
+ <description>Soreike! Anpanman Onamae Na~ni</description>
+ <year>1996</year>
+ <publisher>Sega</publisher>
+ <part name="cart" interface="sawatte_cart">
+ <feature name="pcb" value="171-7323A" />
+ <feature name="ic1" value="MPR-19041" />
+ <dataarea name="rom" size="524288">
+ <rom name="mpr-19041.ic1" size="524288" crc="ec924165" sha1="b25a5637c8cc1f2f6224595853d540195be86ec9" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
<software name="micknatk">
<description>Tokyo Disneyland - Mickey no Nakayoshi Tankentai</description>
<year>1998</year>
@@ -122,4 +148,17 @@
</part>
</software>
+ <software name="uht">
+ <description>Ultra Hero Touch</description>
+ <year>1997</year>
+ <publisher>Bandai</publisher>
+ <part name="cart" interface="sawatte_cart">
+ <feature name="pcb" value="171-7323A" />
+ <feature name="ic1" value="MPR-19828-T" />
+ <dataarea name="rom" size="524288">
+ <rom name="mpr-19828-t.ic1" size="524288" crc="57988dc7" sha1="438a35b2a46ec82b5e31478d9e244928f98891ab" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
</softwarelist>
diff --git a/hash/sms.xml b/hash/sms.xml
index b1754d3ccf4..26bc45410b8 100644
--- a/hash/sms.xml
+++ b/hash/sms.xml
@@ -7595,7 +7595,7 @@
<year>1990</year>
<publisher>Seo Jin</publisher>
<part name="cart" interface="sms_cart">
- <feature name="slot" value="seojin" />
+ <feature name="slot" value="seojin" />
<dataarea name="rom" size="0x080000">
<rom name="SG11004A 79ST0086END 9045" size="0x080000" crc="cdbfe86e" sha1="83d6f261471dca20f8d2e33b9807d670e9b4eb9c" offset="000000" />
</dataarea>
diff --git a/hash/zorba.xml b/hash/zorba.xml
new file mode 100644
index 00000000000..0e7355890f6
--- /dev/null
+++ b/hash/zorba.xml
@@ -0,0 +1,869 @@
+<?xml version="1.0"?>
+<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
+<!--
+Thanks to http://www.zorba.z80.de for info!
+
+Attempting to load any td0 dump in this list throws a fatalerror,
+and they are all marked as unsupported.
+
+The following "Oracle of Zeus" newsletter disks are known to be dumped,
+but require special permission for the dumps to be obtained:
+
+ 1983-11-01 Oracle of Zeus Vol.1 No.1
+oracle12.td0 1984-01-01 113K Oracle of Zeus Vol.1 No.2
+oracle13.td0 1984-03-01 182K Oracle of Zeus Vol.1 No.3
+oracle14.td0 1984-06-01 191K Oracle of Zeus Vol.1 No.4
+oracle15.td0 1984-09-01 195K Oracle of Zeus Vol.1 No.5
+oracle16.td0 1984-11-01 191K Oracle of Zeus Vol.1 No.6
+oracle21.td0 1985-02-01 176K Oracle of Zeus Vol.2 No.1
+oracle22.td0 1985-05-01 192K Oracle of Zeus Vol.2 No.2
+oracle23.td0 1985-08-01 190K Oracle of Zeus Vol.2 No.3
+oracle24.td0 1986-05-01 192K Oracle of Zeus Vol.2 No.4
+-->
+<softwarelist name="zorba" description="Telcon Zorba floppy disks">
+
+<!-- CP/M disks -->
+
+ <software name="compat" supported="no">
+ <description>Compat (v3.2)</description>
+ <year>1985</year>
+ <publisher>Mycroft Labs</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="78499">
+ <rom name="compat v3.2 - application disk.td0" size="78499" crc="19a9d6a9" sha1="e496a9bdfa171b742425f11423c101abce8c9e85" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="cpm">
+ <description>58K CP/M (v2.2, BIOS v1.7A)</description>
+ <year>1984?</year>
+ <publisher>Telcon</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="174565">
+ <rom name="zorba1.imd" size="174565" crc="b7c4e257" sha1="be10a48c8e512476cd39c2ca0faa261bda280260" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="332397">
+ <rom name="zorba2.imd" size="332397" crc="9f4832b9" sha1="41b6ff86ac11077f3a16bd9ed7be991448b16968" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="351758">
+ <rom name="zorba5.imd" size="351758" crc="d3a2362a" sha1="4d291814b23144a7f122b565348fd5021af8c43e" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!-- System disk was missing, using one from the parent set -->
+ <software name="cpm17" cloneof="cpm" supported="partial">
+ <description>58K CP/M (v2.2, BIOS v1.7)</description>
+ <year>1984</year>
+ <publisher>Telcon</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="174565">
+ <rom name="zorba1.imd" size="174565" crc="b7c4e257" sha1="be10a48c8e512476cd39c2ca0faa261bda280260" offset="0" status="baddump" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="139002">
+ <rom name="cpm-80 v2.2 (zorba bios v1.7) - source disk.td0" size="139002" crc="1c549210" sha1="0ceff17dca1e9cfb7306d9e04d6c323cf434d2f2" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="109526">
+ <rom name="cpm-80 v2.2 (zorba bios v1.7) - utility disk.td0" size="109526" crc="da09bdd8" sha1="6d78efec8441833498025a2852504489dade9d94" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="cpm16" cloneof="cpm" supported="no">
+ <description>58K CP/M (v2.2, BIOS v1.6)</description>
+ <year>1984</year>
+ <publisher>Telcon</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="171898">
+ <rom name="cpm-80 v2.2 (zorba bios v1.6) - system disk.td0" size="171898" crc="6df3c58e" sha1="3a15e3b927f88fa34e6e6cdfffc272ff83b2a061" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="226552">
+ <rom name="cpm-80 v2.2 (zorba bios v1.6) - utility disk.td0" size="226552" crc="b65c0436" sha1="9f8ed5dd2167f5b9f0abd27fa6d4ed1f50646d2f" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="cpm16a" cloneof="cpm" supported="no">
+ <description>58K CP/M (v2.2, BIOS v1.6, Alt)</description>
+ <year>1984</year>
+ <publisher>Telcon</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="193670">
+ <rom name="cpm-80 v2.2 (zorba bios v1.6) - system disk 1.td0" size="193670" crc="a4530528" sha1="ff29f06c57485e8ff41f2217daac63598bdaa74e" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="171990">
+ <rom name="cpm-80 v2.2 (zorba bios v1.6) - system disk 2.td0" size="171990" crc="993b96ce" sha1="ac3bcd735244d3a6405dd02efbb37f944174ad3a" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="226552">
+ <rom name="cpm-80 v2.2 (zorba bios v1.6) - utility disk.td0" size="226552" crc="b65c0436" sha1="9f8ed5dd2167f5b9f0abd27fa6d4ed1f50646d2f" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="datastar" supported="no">
+ <description>DataStar (Release 1.41)</description>
+ <year>1982</year>
+ <publisher>MicroPro International</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="285491">
+ <rom name="datastar v1.41.td0" size="285491" crc="ff9ce693" sha1="e054c30a4738f94d6a66b21a0d8d1b6a98eecbb4" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="datastar14" cloneof="datastar">
+ <description>DataStar (Release 1.4)</description>
+ <year>1982</year>
+ <publisher>MicroPro International</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="290987">
+ <rom name="zorba3.imd" size="290987" crc="d5cf92cb" sha1="d123e3763ac8da14ef7443361f77df34dcc5cd0f" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="dbase2" supported="no">
+ <description>dBase II (v2.41)</description>
+ <year>1982</year>
+ <publisher>Ashton-Tate</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="117176">
+ <rom name="ashton-tate dbase ii v2.41 application disk - disk 1.td0" size="117176" crc="4d51f8b4" sha1="617169d9e1d2e10460a3966968701ccd44c147f2" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="94274">
+ <rom name="ashton-tate dbase ii v2.41 sample disk 1 - disk 2.td0" size="94274" crc="3f0b6f59" sha1="4af4aaee1f631ae1be0be11f2fc2131cf0bfbd77" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop3" interface="floppy_5_25">
+ <dataarea name="flop" size="22058">
+ <rom name="ashton-tate dbase ii v2.41 sample disk 2 - disk 3.td0" size="22058" crc="cfc04630" sha1="c988d1b330d1cdecf25bd63625a6caae20b53393" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop4" interface="floppy_5_25">
+ <dataarea name="flop" size="22056">
+ <rom name="ashton-tate dbase ii v2.41 sample disk 3 - disk 4.td0" size="22056" crc="f54b6f10" sha1="769b7abd592431cb260f72ab43300fb23ea5ec40" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop5" interface="floppy_5_25">
+ <dataarea name="flop" size="29424">
+ <rom name="ashton-tate dbase ii v2.41 sample disk 4 - disk 5.td0" size="29424" crc="fa4531f8" sha1="9791a692446540bcf57241e798cf7bd0d8a30ce8" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="mite" supported="no">
+ <description>Mite (v3.0)</description>
+ <year>1985</year>
+ <publisher>Mycroft Labs</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="161505">
+ <rom name="mite v3.0 - application disk.td0" size="161505" crc="4a1e5dec" sha1="1bd24b9481047a8c7db93c56fa2fd56b68e0aa49" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="wscs" supported="no">
+ <description>WordStar (Release 3.0) and CalcStar (Release 1.45)</description>
+ <year>198?</year>
+ <publisher>&lt;unknown&gt;</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="356678">
+ <rom name="wordstar v3.00.td0" size="356678" crc="37896ed4" sha1="df2c938987dda821863383cbbcb9b8e1008606f3" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="wscsa" cloneof="wscs">
+ <description>WordStar (Release 3.0) and CalcStar (Release 1.2)</description>
+ <year>198?</year>
+ <publisher>&lt;unknown&gt;</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="259832">
+ <rom name="zorba4.imd" size="259832" crc="3c89eb7a" sha1="c54c579e9a24410870eed5f7a6c3a73f0f5f2633" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 001 Public Domain Software
+ COMPARE.COM - File comparison utility
+ WASH.COM - File management utility
+ SWEEP.COM - File managment utility
+ UNERASE.COM - Unerases deleted file
+ INDEX.COM - Directory utility
+ SHOW.COM - Displays files a screenful at a time
+ WS.KEY - WordStar key definition file
+ SQUEEZE.COM - Data compression program
+ UMPIRE.COM - Give your memory a checkup
+ FILTER.COM - Strips unprintable characters from files
+ MENU.COM - Menu program
+ CHESS.COM - Plays, even displays a little board
+ BANNER.COM - Prints banner headlines
+ DU.COM - Track and sector level disk utility
+ IDXGEN.COM - Generate an idex at the end of WordStar files
+ TRANSLAT.COM - 8080 to Z80 non optimizing translator
+ CAT.COM - Disk catalog program
+ LOOK.COM - Memory search program
+ CRCK.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus1" supported="no">
+ <description>Zeus Public Domain Software Disk 1</description>
+ <year>1983</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="204828">
+ <rom name="zeuslib. 001 public domain software.td0" size="204828" crc="049704a6" sha1="8ad508756e2715d23f8da21825cca31b39e836ee" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 002 Public Domain Software
+ HELP.COM - Help utility
+ *.BAS - Several MBASIC games
+ SM.COM - Smartmodem program
+ PHOTO.COM - Screen-to-file dump utility
+ OK.COM - Setup program for Okidata printer
+ CURSOR.MAC - Program to change cursor
+ NEWSWEEP.COM - Newsweep version 1.9 in 8K file
+ DU-V86.COM - Disk Utility version 8.6
+ SAP27.COM - Directory sort & purge
+ DIR.COM - File diference utility
+ SCAN.COM - File display utility
+ TYPER.COM - Typewritter program
+ PGLST.COM - Converts single column into multi-column list
+ UN.COM - File unprotector
+ RUBIK.CQB - Rubik cube program
+ CRCK.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus2" supported="no">
+ <description>Zeus Public Domain Software Disk 2</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="280008">
+ <rom name="zeuslib. 002 public domain software.td0" size="280008" crc="2eaa4c27" sha1="c2b443d710e5677b0af7bcc696e0fa78f6489796" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 003 Public Domain Software
+ AUTOWRAP.COM - Switches on wrap at the end of the line
+ NOMASK.COM - Disables the zapping of the high bit in CONOUT
+ CMP.COM - File comparision utility
+ DF.COM - Sorted directory program
+ IDXGEN.PQS - Source for index generating program
+ INDEXZ.COM - Index program
+ LINES.COM - Get the number of lines in your document
+ PASSWORD.COM - Allows you to make a program password protected
+ SCRAMBLE.COM - Encript a file
+ RENAME.COM - Accepts wildcards when renaming
+ LU.COM - Library Utility used to combine files
+ XREF.BQS - Generates cross reference listings
+ XCAT36.COM - Cross reference utility for MAST.CAT
+ LISTT16.COM - File printing program version 16
+ FCB.COM - Displays the file control blocks
+ RULER.COM - Displays ruler on 25th line of the screen
+ OKI92.COM - Setup for Okidata 92 printer
+ ZBSET251.LBR - Display text on 25th (status) line
+ ZBMDM727.LBR - Modem 7 terminal program version 2.7
+ NSWP199.COM - Newsweep version 1.99
+ CRCK.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus3" supported="no">
+ <description>Zeus Public Domain Software Disk 3</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="263142">
+ <rom name="zeuslib. 003 public domain software.td0" size="263142" crc="3f715516" sha1="fd22691481f0aab59f6ca5d3a9130eb00c064b77" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 004 Public Domain Software
+ *.* - Programming tools disk
+ (disassemblers, macro libraries, tracer, compiler, loader, etc)
+ CRCK.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus4" supported="no">
+ <description>Zeus Public Domain Software Disk 4</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="269382">
+ <rom name="zeuslib. 004 public domain software.td0" size="269382" crc="a2a3005d" sha1="653329e738f2313e9515016d2a4aacd7d40293ce" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 005 Public Domain Software
+ CAL.COM - Calendar program
+ PHOTO1.COM - Save Screen to disk file
+ QK20.LBR - Qwikkey 2.0 key redefinition program
+ DELBR.COM - Library files extractor
+ LSWEEP.COM - Sweep for libraries
+ BARGRAPH.LBR - Zorba graphics program
+ WASH2.COM - Disk washer-upper version 3.2
+ UNERA12.COM - Unerase program
+ ALLOC.COM - Lists the allocation blocks on disk
+ DIRCHK.COM - Lists the files on a disk
+ DUPUSR21.COM - Make programs accessible in different USER areas
+ RITEMAN.COM - Printer setup for the Inforunner Riteman
+ SD-78.COM - Super Directory 7.8
+ FILEFIND.COM - Checks all available user areas on all drives
+ FAST2.LBR - Speeds up disk bound programs
+ BSORT.LBR - Fast sort program
+ EAC.COM - Extended Arithmetic Calculator
+ FILTER11.AQM - Source code to FILTER
+ UNSPOOL.AQM - print spooler source code
+ FMENU.COM - File Menu program
+ LABEL.LBR - Label printing programs
+ SYNONYM.LBR - Synonym program
+ DRI-HLP.LBR - Library of HELP files for Digital Research programs
+ FIND.COM - Another HELP program
+ CPMADR.COM - CP/M attributes and drive format information
+ PAUSE.COM - For use in SUBMIT files, menu programs, etc.
+ DISKCOPY.COM - Zorba track to track disk copy program
+ CRCK8.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus5" supported="no">
+ <description>Zeus Public Domain Software Disk 5</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="241178">
+ <rom name="zeuslib. 005 public domain software.td0" size="241178" crc="1e82d9bc" sha1="d6a6c1ece5ed55c8883a13c1cd9957e5979edf29" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 006 Public Domain Software
+ WS-INFO.LBR - DOC files for patching WordStar
+ ENSOFT2.LBR - Document conversion program
+ TUCHTYPE.LBR - Touch-typing programs
+ GRADEBOK.LBR - A gradebook program
+ FILT2.LBR - Filters BASIC program files created with WordStar
+ SPELL20.* - Spelling checker version 2.0
+ SPINDOWN.LBR - How to get the Zorba drives to spindown quicker
+ -->
+ <software name="zeus6" supported="no">
+ <description>Zeus Public Domain Software Disk 6</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="268476">
+ <rom name="zeuslib. 006 public domain software.td0" size="268476" crc="1cd375f1" sha1="84d248b824b7d065fd7551fa4a2fd194d6ff2a24" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 007 Public Domain Software
+ *.* - This disk contains a grab-bag of games
+ (requires either MBASIC or CBASIC)
+ CRCK8.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus7" supported="no">
+ <description>Zeus Public Domain Software Disk 7</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="180484">
+ <rom name="zeuslib. 007 public domain software.td0" size="180484" crc="a22ea734" sha1="f66e320ccb4990372ab443a1f1006d175e4307e6" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 008 Public Domain Software
+ ZBMDM740.COM - Modem 7.40 terminal program
+ PHONDATA.LBR - Phone number filing system
+ MSGFILES.LBR - Files commonly downloaded from BBS's
+ LRBDSK22.LBR - Creates logical drives on a single disk
+ RBBS35.LBR - Bulletin board program
+ SECURSYS.DOC - Advice for sysops on system security
+ SCRNWRAP.LBR - Screen wrap program for BIOS 1.7A & 1.8B
+ PILOT.LBR - Pilot Game with source
+ TTY.ASM - TTY program
+ -->
+ <software name="zeus8" supported="no">
+ <description>Zeus Public Domain Software Disk 8</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="304818">
+ <rom name="zeuslib. 008 public domain software.td0" size="304818" crc="c173a8ed" sha1="d3b7fb35a95a1e88f1cacf30fa4690d91c058046" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 009 Public Domain Software
+ MODEM9XX.* - Modem 9.00 terminal program
+ RUNOFF.LBR - Text formating program
+ ZCPR22.LBR - ZCPR is a replacement for CP/M's CCP
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus9" supported="no">
+ <description>Zeus Public Domain Software Disk 9</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="264184">
+ <rom name="zeuslib. 009 public domain software.td0" size="264184" crc="f41a5f53" sha1="f863263f211c328f124abf5a40e93aa6503aa20e" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 010 Public Domain Software
+ GRAF.DQC - MX-80 bit-plot graphics program
+ FX80-PIX.LBR - FX80 pictures
+ ROFF40.LBR - Text formating program version 4.0
+ @.COM - Online expression evaluator for CP/M's CCP
+ SWAP.LBR - Swaps CP/M's CONSOLE and LIST outputs
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus10" supported="no">
+ <description>Zeus Public Domain Software Disk 10</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="249080">
+ <rom name="zeuslib. 010 public domain software.td0" size="249080" crc="aca92c7e" sha1="d05346cb40f9a2ab468c0173a8b9430caa15ecc0" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 011 Public Domain Software
+ VUKEY.COM - Shows function keys on 25th line
+ DU2V17.COM - Disk Utility version 1.7
+ BLIST.COM - Proofing source code for BEGIN END blocks
+ MORSECOD.COM - Morse code program
+ OKI92ITAL.COM - Okidata 92 printer setup program
+ M7ZB-3.ASM - Modem 7 overlay for the Zorba
+ ZSIDFIX.DOC - Patch for Digital Research's ZSID debugger
+ MEX.COM - Modem terminal program
+ CRCK8.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus11" supported="no">
+ <description>Zeus Public Domain Software Disk 11</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="268902">
+ <rom name="zeuslib. 011 public domain software.td0" size="268902" crc="bbca9771" sha1="b8434a474971143ee9cd25e1fc665c5a8dc831e1" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 012 Public Domain Software
+ ADVNTURE.LBR - Adventure game
+ BULLCOW.COM - Bullcow game
+ HANGMAN.LBR - Hangman game
+ PILOT.LBR - Pilot game
+ PLANE.COM - Poor man's flight simulator
+ SQUARE2.COM - Zorba video demonstration program
+ ZWORM2.COM - Green worm screen wiggle
+ ZGAMMON.BAS - Back Gammon game
+ FROG.BAS - dichotomous key demonstration program
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus12" supported="no">
+ <description>Zeus Public Domain Software Disk 12</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="276624">
+ <rom name="zeuslib. 012 public domain software.td0" size="276624" crc="d85bf1cb" sha1="e5a3e46fb9c7258769bb185a6cfc9baf416de0a9" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 013 Public Domain Software
+ MCAT41.LBR - Popular catalog system
+ MEMTEST.COM - Rasmussen memory test version 1.8
+ MTYPE.COM - Type utility that accepts wildcards
+ GRAPHICS.BAS - Zorba Graphics tutorial (MBASIC)
+ INFO.COM - Maps where things are in your CP/M system
+ MONITOR.LBR - Serial line data analyzer
+ PHOTO2.LBR - Saves Screen image to disk
+ DUMPX.LBR - Improved CP/M dump utility
+ ASCIDUMP.LBR - Dump a file to the screen
+ DIABLO.AQM - WordStar patch for Diablo printer
+ DRAW.PQS - Draw program - Turbo Pascal source
+ SCR-MU.LBR - Programmer's screen management utility
+ GEMINI15.LBR - CBASIC program for setting printer attributes
+ DATER.LBR - Calendar program written in C
+ SAP38.LBR - Latest Sort & Pack directory program
+ FIND40.LBR - Find text string
+ WHATSNEW.LBR - What's new on disk since last change
+ HELP.AQM - Source code for HELP.COM
+ UNDEL.LBR - Undelete program
+ SETDRU.LBR - A BIOS filter for hard disk users
+ ZCOMPARE.LBR - File comparision program
+ DISKMON.COM - Disk monitor utility
+ COUNT.LBR - Program to determine length of a file
+ LISTT16A.AQM - Source code for creating lists
+ MBASUTIL.LBR - 4 function calculator
+ ODDBALL.LBR - Bizarre game, supposedly Italian ping pong!
+ INVANALY.BAS - Investment analysis program
+ INSTMNT.LBR - Finds lowest commission rate
+ BNCHMARK.BAS - Benchmark & Timmings
+ DIRECDIF.LBR - Program to compare directory tracks
+ COMPARE2.COM - 2K file compare program
+ ESSAY.RQS - A true story by Richard Stillman
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus13" supported="no">
+ <description>Zeus Public Domain Software Disk 13</description>
+ <year>1984</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="284364">
+ <rom name="zeuslib. 013 public domain software.td0" size="284364" crc="1412b3ac" sha1="6b9727a6cfe26e215b0928d3bdb53f2665c72865" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 014 Public Domain Software
+ APPEND.LBR - Append adds one file to another
+ DBL.LBR - Prints pages side by side on an ordinary page
+ VDO.COM - Good emulation of Wordstar's non-document mode
+ SPEED.PGS - Squeezed source code for SPEED (drive speed checking)
+ DUMP2.LBR - Improved CP/M dump program
+ SAP39.LBR - Latest version of directory sort and pack
+ GOTHIC.LBR - Printing block letters in gothic font
+ SAVEPROM.LBR - Saves contents of the Zorba boot prom
+ SONARWAR.LQR - Squeezed library of game
+ OTHELLO.COM - Compiled version of CBASIC Othello game
+ ZGRAF15.LBR - ZGRAF business graphic program
+ SC2.HQP - Squeezed Help file for SuperCalc 2
+ FUNNIES.LBR - A barrel of fun
+ ZM.LBR - There's always room for another assembler
+ BLIST.LBR - Turbo Pascal list utility
+ QUOTES.PRN - Pithy savings of pithy people
+ PIPPATCH.AQM - File with patches to PIP
+ SAVER.AQM - Recover text from memory after Wordstar crash
+ FRUN.COM - Odd game
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus14" supported="no">
+ <description>Zeus Public Domain Software Disk 14</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="302842">
+ <rom name="zeuslib. 014 public domain software.td0" size="302842" crc="d4ffdd8a" sha1="7b2caae4c4623c25469e06d190b4fa53c67bdce8" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 015 Public Domain Software
+ DIRFILES3.LBR - Utility to associate a comment with each file name
+ NULU10.COM - Assembly language version of LU & LSWEEP
+ ADDRESS.LBR - Computerized name, address and phone number book
+ FTNOTE12.LBR - Footnoting program for use with WordStar
+ EDIT.LBR - Line Editor
+ LUX42.LBR - Utility for browsing on-line in libraries (LBR files)
+ DIRR.COM - Another directory program
+ FOOTBALL.COM - A game of American football
+ LFILTER.LBR - Utility to facilitate file interchange
+ MCIMAIL2.LBR - A library of MCI mail stuff
+ XLIST.COM - Cross-reference utility for Turbo Pascal programs
+ SIFT.LBR - Finds a string in a text file
+ ZORKHINT.LBR - Some programs to assist you with the game ZORK
+ PASSWORD.AQM - squeezed source for PASSWORD program on Zeuslib.003
+ HANG.BAS - what could this be? You'll need MBASIC to find out.
+ UNSPOOL.HLP - Help file for UNSPOOL program
+ CRC.COM - Cyclic redundancy check program
+ -->
+ <software name="zeus15" supported="no">
+ <description>Zeus Public Domain Software Disk 15</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="238514">
+ <rom name="zeuslib. 015 public domain software.td0" size="238514" crc="200665b1" sha1="e8a690c2f2d3a4439b4b34f9c2077f8f3d4035ca" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 016 Public Domain Software
+ SMC.COM - The Small C complier
+ FORTH.COM - A true Fig-Forth
+ XLISP.COM - This is LISP from SIG/M
+ -->
+ <software name="zeus16" supported="no">
+ <description>Zeus Public Domain Software Disk 16</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="284722">
+ <rom name="zeuslib. 016 public domain software.td0" size="284722" crc="6a2de0eb" sha1="a7804dd1a0dec12b5e8525fbdba08b0f3b360cff" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 017 Public Domain Software
+ TOUR.COM - Outline processor
+ DIRFILES.COM - Ver. 3.1 creates a 'data' file listing
+ EDIT.COM - Small, fast text editor
+ EX15.COM - Replacement for Submit.com and Xsub.com
+ FILT6.COM - Filters text files and removes control characters
+ WSDOCON.COM - Converts any text file into Wordstar document file
+ KERMIT39.COM - Telecommunications program
+ N30.COM - Accepts any decimal, hex, or binary number or any ASCII character and displays the value in all four modes
+ WHATCHAR.COM - Accepts keyboard entry and displays decimal and hexadecimal equivalent
+ NULU12.COM - Latest version of NU L(ibrary) U(tility)
+ QK21.COM - Qwikkey version 2.1
+ SUPERZAP.COM - Full screen interactive disk update utility
+ MEMAP.COM - System map utility
+ TPA.COM - Display TPA size
+ WINDEX.COM - Creates an index for any Wordstar document file
+ WS-USER.AQM - Assembly patch for changing default drives
+ GRXR.LBR - Turns a text file into a 'runnable' .com file
+ -->
+ <software name="zeus17" supported="no">
+ <description>Zeus Public Domain Software Disk 17</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="196860">
+ <rom name="zeuslib. 017 public domain software.td0" size="196860" crc="494998ae" sha1="495e97b1329370619b36769be10a90b70995de22" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 018 Public Domain Software
+ MEX (A Modem Executive for CP/M-80)
+ (Version 1.12 and 1.14 - instructions & help files)
+ (Zorba - specific overlay files & runnable version)
+ Command files
+ Documentation, Help files
+ MEX command/key/library files
+ MEX overlay/patch files
+ -->
+ <software name="zeus18" supported="no">
+ <description>Zeus Public Domain Software Disk 18</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="232056">
+ <rom name="zeuslib. 018 public domain software.td0" size="232056" crc="d0cb40d8" sha1="34ce4b85f0245a70c98b79420643e179aaf94e1a" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 019 Public Domain Software
+ Wordprocessing & Text Utilities Disk:
+ Biblioms (Bibliography Management system)
+ Sift 2.2 - Text search/sort (Zorba specific)
+ Listfilz - Annotated disk directories
+ Linesort - Alphabetical sort line-by-line
+ Screenwright - Screenplay formatter
+ Wordstar patches - how to get started
+ -->
+ <software name="zeus19" supported="no">
+ <description>Zeus Public Domain Software Disk 19</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="202302">
+ <rom name="zeuslib. 019 public domain software.td0" size="202302" crc="5aab0c0f" sha1="a79d65730aa2fb8aa6bd8667a1a2a049b29e6b68" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 020 Public Domain Software
+ Oracle of Zeus - Index (Volume 1)
+ Supercalc, Calcstar, Infostar templates
+ Curve-fitting and graphing programs
+ MBASIC programmer's utility
+ Zorba utilities and oddities
+ M7ZB-4 - latest Zorba modem overlay
+ RECIPE.COM - file your kitchen favorites
+ -->
+ <software name="zeus20" supported="no">
+ <description>Zeus Public Domain Software Disk 20</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="237880">
+ <rom name="zeuslib. 020 public domain software.td0" size="237880" crc="48dbec4f" sha1="cbf6ace0fdb29fdff8d7e01f21a029339fab7198" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 021 Public Domain Software
+ Entertaining and Educational Games
+ (With MBASIC, CBASIC, and Pascal source included)
+ -->
+ <software name="zeus21" supported="no">
+ <description>Zeus Public Domain Software Disk 21</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="269470">
+ <rom name="zeuslib. 021 public domain software.td0" size="269470" crc="0efd6c68" sha1="a2b52a52694d9c75486f8573c4534442e3531c7f" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <!--
+ Zeuslib. 022 Public Domain Software
+ Forth-83 (Version 2.1.1) - The Laxen/Perry Model
+ F83.COM - the compiled system
+ The source files - all .BLK files
+ Documentation/instruction files
+ TUTORIAL.COM - simple help for begginers
+ -->
+ <software name="zeus22" supported="no">
+ <description>Zeus Public Domain Software Disk 22</description>
+ <year>1985</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="252560">
+ <rom name="zeuslib. 022 public domain software.td0" size="252560" crc="2bcd0db4" sha1="ccd3371ed90c68f88dede9dbbe6b3d4ee32b717f" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="zeusbios" supported="no">
+ <description>Zorba BIOS (v1.8Z)</description>
+ <year>1986</year>
+ <publisher>Zorba Equipment Users' Society (Zeus)</publisher>
+
+ <part name="flop43" interface="floppy_5_25">
+ <dataarea name="flop" size="116362">
+ <rom name="zorba bios v1.8z.td0" size="116362" crc="51e4746a" sha1="ed363b3ef97e273ac887a46c1a839dc8b5d15307" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+<!-- Co-Power-88 disks -->
+
+ <software name="copower" supported="no">
+ <description>Co-Power-88 for Telcon Zorba</description>
+ <year>1985</year>
+ <publisher>SWP</publisher>
+ <info name="usage" value="Requires Co-Power-88 expansion" />
+
+ <part name="flop19" interface="floppy_5_25">
+ <dataarea name="flop" size="39433">
+ <rom name="swp co-power 88.td0" size="39433" crc="f4134db7" sha1="fc270abad2f715b86138d192ccc7f9ab173e77c9" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="cpm86" supported="no">
+ <description>CP/M-86 (v1.1)</description>
+ <year>1983</year>
+ <publisher>SWP?</publisher>
+ <info name="usage" value="Requires Co-Power-88 expansion" />
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="247616">
+ <rom name="digital research cpm-86 v1.1.td0" size="247616" crc="d6137dca" sha1="0feba6c3c36f28be5aec57ec877ea57e67d1754a" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos330" supported="no">
+ <description>PC-DOS (v3.30)</description>
+ <year>1987</year>
+ <publisher>SWP?</publisher>
+ <info name="usage" value="Requires Co-Power-88 expansion" />
+
+ <part name="flop18" interface="floppy_5_25">
+ <dataarea name="flop" size="322343">
+ <rom name="pc dos 3.30 system disk.td0" size="322343" crc="ca6260df" sha1="2a0d4988ee2562a98b7af1d345d4899ce55aa8d2" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pcdos211" supported="no">
+ <description>PC-DOS (v2.11)</description>
+ <year>1983</year>
+ <publisher>SWP?</publisher>
+ <info name="usage" value="Requires Co-Power-88 expansion" />
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="227363">
+ <rom name="pc dos 2.11 system disk 1.td0" size="227363" crc="c6291464" sha1="68b7ccd7ffac98f76bca48ae4cae2fccd70f8a51" offset="0" />
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="228103">
+ <rom name="pc dos 2.11 system disk 2.td0" size="228103" crc="3f898887" sha1="0071c716f1c6d5be153c5013f29819869f449209" offset="0" />
+ </dataarea>
+ </part>
+ </software>
+
+</softwarelist>
diff --git a/scripts/build/verinfo.py b/scripts/build/verinfo.py
index a73d8ad2689..c294df827aa 100644
--- a/scripts/build/verinfo.py
+++ b/scripts/build/verinfo.py
@@ -11,7 +11,7 @@ import sys
def parse_args():
def usage():
- sys.stderr.write('Usage: verinfo.py [-b mame|mess|ume|ldplayer] [-r|-p] [-o <outfile>] <srcfile>\n')
+ sys.stderr.write('Usage: verinfo.py [-b mame|mess|ume] [-r|-p] [-o <outfile>] <srcfile>\n')
sys.exit(1)
flags = True
diff --git a/scripts/target/ldplayer/ldplayer.lua b/scripts/target/ldplayer/ldplayer.lua
deleted file mode 100644
index 4348f3bd318..00000000000
--- a/scripts/target/ldplayer/ldplayer.lua
+++ /dev/null
@@ -1,88 +0,0 @@
--- license:BSD-3-Clause
--- copyright-holders:MAMEdev Team
-
----------------------------------------------------------------------------
---
--- ldplayer.lua
---
--- Small makefile to build a standalone laserdisc player
---
----------------------------------------------------------------------------
-
---------------------------------------------------
--- specify required CPU cores (none)
---------------------------------------------------
-
-CPUS["MCS48"] = true
-CPUS["Z80"] = true
-
-
-
---------------------------------------------------
--- specify required sound cores
---------------------------------------------------
-
-SOUNDS["WAVE"] = true
-
-
---------------------------------------------------
--- specify available video cores
---------------------------------------------------
-
---------------------------------------------------
--- specify available machine cores
---------------------------------------------------
-
-MACHINES["LDV1000"] = true
-MACHINES["LDPR8210"] = true
-
---------------------------------------------------
--- specify available bus cores
---
--- MIDI is here as dummy bus to allow libbus.a to
--- be created on OSX.
---------------------------------------------------
-
-BUSES["MIDI"] = true
-
---------------------------------------------------
--- this is the list of driver libraries that
--- comprise MAME plus mamedriv.o which contains
--- the list of drivers
---------------------------------------------------
-
-function createProjects_ldplayer_ldplayer(_target, _subtarget)
- project ("drvldplayer")
- targetsubdir(_target .."_" .. _subtarget)
- kind (LIBTYPE)
- uuid (os.uuid("drvldplayer"))
-
- includedirs {
- MAME_DIR .. "src/osd",
- MAME_DIR .. "src/emu",
- MAME_DIR .. "src/devices",
- MAME_DIR .. "src/mame",
- MAME_DIR .. "src/lib",
- MAME_DIR .. "src/lib/util",
- MAME_DIR .. "3rdparty",
- GEN_DIR .. "mame/layout",
- }
-
- files{
- MAME_DIR .. "src/emu/drivers/emudummy.cpp",
- }
-
- dependency {
- { MAME_DIR .. "src/emu/drivers/emudummy.cpp", GEN_DIR .. "ldplayer/layout/pr8210.lh" },
- }
-
- custombuildtask {
- layoutbuildtask("ldplayer/layout", "pr8210"),
- }
-end
-
-function linkProjects_ldplayer_ldplayer(_target, _subtarget)
- links {
- "drvldplayer",
- }
-end
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index 1e515009c4d..9f141d72234 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -1894,6 +1894,8 @@ files {
MAME_DIR .. "src/mame/video/fmtowns.cpp",
MAME_DIR .. "src/mame/machine/fm_scsi.cpp",
MAME_DIR .. "src/mame/machine/fm_scsi.h",
+ MAME_DIR .. "src/mame/machine/fmt_icmem.cpp",
+ MAME_DIR .. "src/mame/machine/fmt_icmem.h",
MAME_DIR .. "src/mame/drivers/fm7.cpp",
MAME_DIR .. "src/mame/includes/fm7.h",
MAME_DIR .. "src/mame/video/fm7.cpp",
diff --git a/scripts/target/mame/virtual.lua b/scripts/target/mame/virtual.lua
index 6d13a002948..5a884e33fc0 100644
--- a/scripts/target/mame/virtual.lua
+++ b/scripts/target/mame/virtual.lua
@@ -15,6 +15,8 @@
CPUS["M6502"] = true
CPUS["H6280"] = true
+CPUS["MCS48"] = true
+CPUS["Z80"] = true
--------------------------------------------------
-- specify available sound cores; some of these are
@@ -37,6 +39,8 @@ SOUNDS["MULTIPCM"] = true
SOUNDS["GB_SOUND"] = true
SOUNDS["POKEY"] = true
SOUNDS["C352"] = true
+SOUNDS["OKIM6295"] = true
+SOUNDS["WAVE"] = true
--------------------------------------------------
-- specify available video cores
@@ -46,7 +50,8 @@ SOUNDS["C352"] = true
--------------------------------------------------
-- specify available machine cores
--------------------------------------------------
-
+MACHINES["LDV1000"] = true
+MACHINES["LDPR8210"] = true
--------------------------------------------------
-- specify available bus cores
@@ -78,12 +83,13 @@ function createVirtualProjects(_target, _subtarget, _name)
MAME_DIR .. "src/mame",
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
- MAME_DIR .. "src/lib/netlist",
MAME_DIR .. "3rdparty",
+ GEN_DIR .. "mame/layout",
}
includedirs {
ext_includedir("zlib"),
+ ext_includedir("flac"),
}
end
@@ -91,5 +97,6 @@ function createProjects_mame_virtual(_target, _subtarget)
createVirtualProjects(_target, _subtarget, "virtual")
files {
MAME_DIR .. "src/mame/drivers/vgmplay.cpp",
+ MAME_DIR .. "src/mame/drivers/ldplayer.cpp",
}
end
diff --git a/src/devices/bus/a2bus/a2bus.h b/src/devices/bus/a2bus/a2bus.h
index 72706946730..19c70b091f8 100644
--- a/src/devices/bus/a2bus/a2bus.h
+++ b/src/devices/bus/a2bus/a2bus.h
@@ -84,7 +84,7 @@ class device_a2bus_card_interface;
// ======================> a2bus_device
class a2bus_device : public device_t
{
- // multi-card devices need to access m_device_list, so they get friend'ed here.
+ // multi-card devices need to access m_device_list, so they get friended here.
friend class a2bus_mcms2_device;
public:
// construction/destruction
diff --git a/src/devices/bus/isa/mda.cpp b/src/devices/bus/isa/mda.cpp
index 764cb361aeb..6887372003b 100644
--- a/src/devices/bus/isa/mda.cpp
+++ b/src/devices/bus/isa/mda.cpp
@@ -519,7 +519,7 @@ READ8_MEMBER( isa8_mda_device::io_read)
/*
When the Hercules changes to graphics mode, the number of pixels per access and
-clock divider should be changed. The currect mc6845 implementation does not
+clock divider should be changed. The correct mc6845 implementation does not
allow this.
The divder/pixels per 6845 clock is 9 for text mode and 16 for graphics mode.
diff --git a/src/devices/bus/isa/omti8621.cpp b/src/devices/bus/isa/omti8621.cpp
index 0acb9a97154..468b8d1fa85 100644
--- a/src/devices/bus/isa/omti8621.cpp
+++ b/src/devices/bus/isa/omti8621.cpp
@@ -109,7 +109,7 @@ public:
#define OMTI_STATUS_REQ 0x01 // Request (1 = request transfer of data via data in/out register)
#define OMTI_STATUS_IO 0x02 // In/Out (1 = direction of transfer is from controller to host)
-#define OMTI_STATUS_CD 0x04 // Command/Data ( 1 = byte transfered is command or status byte)
+#define OMTI_STATUS_CD 0x04 // Command/Data ( 1 = byte transferred is command or status byte)
#define OMTI_STATUS_BUSY 0x08 // Busy (0 = controller is idle, 1 = controller selected)
#define OMTI_STATUS_DREQ 0x10 // Data Request (0 = no DMA request, 1 = DMA cycle requested)
#define OMTI_STATUS_IREQ 0x20 // Interrupt Request (0 = no interrupt, 1 = command complete)
diff --git a/src/devices/bus/nes/disksys.cpp b/src/devices/bus/nes/disksys.cpp
index 7e2d4a36e76..9411c6bf8b0 100644
--- a/src/devices/bus/nes/disksys.cpp
+++ b/src/devices/bus/nes/disksys.cpp
@@ -301,7 +301,7 @@ READ8_MEMBER(nes_disksys_device::read_ex)
case 0x10:
// $4030 - disk status 0
// bit0 - Timer Interrupt (1: an IRQ occurred)
- // bit1 - Byte transfer flag (Set to 1 every time 8 bits have been transfered between
+ // bit1 - Byte transfer flag (Set to 1 every time 8 bits have been transferred between
// the RAM adaptor & disk drive through $4024/$4031; Reset to 0 when $4024,
// $4031, or $4030 has been serviced)
// bit4 - CRC control (0: CRC passed; 1: CRC error)
diff --git a/src/devices/bus/scsi/scsihle.cpp b/src/devices/bus/scsi/scsihle.cpp
index 96c89506444..5ebc39a4d30 100644
--- a/src/devices/bus/scsi/scsihle.cpp
+++ b/src/devices/bus/scsi/scsihle.cpp
@@ -219,7 +219,7 @@ void scsihle_device::device_timer(emu_timer &timer, device_timer_id tid, int par
case 2:
// Some drives, notably the ST225N and ST125N, accept fromat unit commands
- // with flags set indicating that bad block data should be transfered but
+ // with flags set indicating that bad block data should be transferred but
// don't then implemnt a data in phase, this timeout it to catch these !
if (IS_COMMAND(SCSI_CMD_FORMAT_UNIT) && (data_idx==0))
{
diff --git a/src/devices/bus/ti99_peb/ti_32kmem.cpp b/src/devices/bus/ti99_peb/ti_32kmem.cpp
index 16f2d0ccef2..082c85c0e61 100644
--- a/src/devices/bus/ti99_peb/ti_32kmem.cpp
+++ b/src/devices/bus/ti99_peb/ti_32kmem.cpp
@@ -7,7 +7,7 @@
unbuffered 32 KiB. Yet it was a very popular card since it was
required for any kind of advanced programming beyond the console BASIC.
- As a peripheral box card, it is connected via the 8-bit mutiplexed data bus.
+ As a peripheral box card, it is connected via the 8-bit multiplexed data bus.
Later, modifications of the console became increasingly popular which
avoided the bus multiplex so that the full 16bit access was possible.
This helped to noticeably speed up the system.
diff --git a/src/devices/bus/ti99x/990_hd.h b/src/devices/bus/ti99x/990_hd.h
index aef9de11591..dacf4a855f7 100644
--- a/src/devices/bus/ti99x/990_hd.h
+++ b/src/devices/bus/ti99x/990_hd.h
@@ -9,7 +9,7 @@
#include "imagedev/harddriv.h"
/* max disk units per controller: 4 is the protocol limit, but it may be
-overriden if more than one controller is used */
+overridden if more than one controller is used */
#define MAX_DISK_UNIT 4
class ti990_hdc_device : public device_t
diff --git a/src/devices/bus/vcs/harmony_melody.cpp b/src/devices/bus/vcs/harmony_melody.cpp
index 2940bd5cf4f..0822db3d175 100644
--- a/src/devices/bus/vcs/harmony_melody.cpp
+++ b/src/devices/bus/vcs/harmony_melody.cpp
@@ -5,7 +5,7 @@
Harmony / Melody cart for the A2600
The Harmony cart is a 'modern' A2600 cartridge, used for homebrew etc. It has
-an SD slot and can be connected to a PC, roms can be transfered to it with
+an SD slot and can be connected to a PC, roms can be transferred to it with
software on the PC side. It uses an ARM7TDMI-S LPC2103 @ 70 Mhz to emulate
the mapper behavior of other cartridges. It has an SD card slot for storing
game data.
diff --git a/src/devices/cpu/alph8201/8201dasm.cpp b/src/devices/cpu/alph8201/8201dasm.cpp
index 307456f0633..8e5e99ffd37 100644
--- a/src/devices/cpu/alph8201/8201dasm.cpp
+++ b/src/devices/cpu/alph8201/8201dasm.cpp
@@ -334,7 +334,7 @@ static void InitDasm8201(void)
Op[i].type = type;
/* 2 byte code ? */
- while (isspace((uint8_t)*p)) p++;
+ while (isspace(u8(*p))) p++;
if( (*p) )
Op[i].type |= 0x10;
/* number of param */
diff --git a/src/devices/cpu/alph8201/alph8201.cpp b/src/devices/cpu/alph8201/alph8201.cpp
index eb4390e251f..e06b05f39a2 100644
--- a/src/devices/cpu/alph8201/alph8201.cpp
+++ b/src/devices/cpu/alph8201/alph8201.cpp
@@ -184,7 +184,7 @@ const device_type ALPHA8301L = &device_creator<alpha8301_cpu_device>;
#define FN(x) &alpha8201_cpu_device::x
-alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: cpu_device(mconfig, ALPHA8201L, "ALPHA-8201L", tag, owner, clock, "alpha8201l", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 10, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
@@ -193,7 +193,7 @@ alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const
}
-alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
+alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 10, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
@@ -201,7 +201,7 @@ alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device
{
}
-alpha8301_cpu_device::alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+alpha8301_cpu_device::alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: alpha8201_cpu_device(mconfig, ALPHA8301L, "ALPHA-8301L", tag, owner, clock, "alpha8301l", __FILE__)
{
m_opmap = opcode_8301;
@@ -217,49 +217,49 @@ unsigned alpha8201_cpu_device::M_RDMEM_OPCODE()
return retval;
}
-void alpha8201_cpu_device::M_ADD(uint8_t dat)
+void alpha8201_cpu_device::M_ADD(u8 dat)
{
- uint16_t temp = m_A + dat;
+ u16 temp = m_A + dat;
m_A = temp & 0xff;
m_zf = (m_A==0);
m_cf = temp>>8;
}
-void alpha8201_cpu_device::M_ADDB(uint8_t dat)
+void alpha8201_cpu_device::M_ADDB(u8 dat)
{
- uint16_t temp = m_B + dat;
+ u16 temp = m_B + dat;
m_B = temp & 0xff;
m_zf = (m_B==0);
m_cf = temp>>8;
}
-void alpha8201_cpu_device::M_SUB(uint8_t dat)
+void alpha8201_cpu_device::M_SUB(u8 dat)
{
m_cf = (m_A>=dat); // m_cf is No Borrow
m_A -= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_AND(uint8_t dat)
+void alpha8201_cpu_device::M_AND(u8 dat)
{
m_A &= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_OR(uint8_t dat)
+void alpha8201_cpu_device::M_OR(u8 dat)
{
m_A |= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_XOR(uint8_t dat)
+void alpha8201_cpu_device::M_XOR(u8 dat)
{
m_A ^= dat;
m_zf = (m_A==0);
m_cf = 0;
}
-void alpha8201_cpu_device::M_JMP(uint8_t dat)
+void alpha8201_cpu_device::M_JMP(u8 dat)
{
m_pc.b.l = dat;
/* update pc page */
@@ -279,8 +279,8 @@ void alpha8201_cpu_device::M_UNDEFINED()
void alpha8201_cpu_device::M_UNDEFINED2()
{
- uint8_t op = M_RDOP(m_pc.w.l-1);
- uint8_t imm = M_RDMEM_OPCODE();
+ u8 op = M_RDOP(m_pc.w.l-1);
+ u8 imm = M_RDMEM_OPCODE();
logerror("alpha8201: PC = %03x, Unimplemented opcode = %02x,%02x\n", m_pc.w.l-2, op,imm);
#if SHOW_MESSAGE_CONSOLE
osd_printf_debug("alpha8201: PC = %03x, Unimplemented opcode = %02x,%02x\n", m_pc.w.l-2, op,imm);
@@ -293,7 +293,7 @@ void alpha8201_cpu_device::M_UNDEFINED2()
void alpha8201_cpu_device::stop()
{
- uint8_t pcptr = M_RDMEM(0x001) & 0x1f;
+ u8 pcptr = M_RDMEM(0x001) & 0x1f;
M_WRMEM(pcptr,(M_RDMEM(pcptr)&0xf)+0x08); /* mark entry point ODD to HALT */
m_mb |= 0x08; /* mark internal HALT state */
}
@@ -600,7 +600,7 @@ void alpha8201_cpu_device::device_reset()
void alpha8201_cpu_device::execute_run()
{
unsigned opcode;
- uint8_t pcptr;
+ u8 pcptr;
if(m_halt)
{
@@ -688,7 +688,7 @@ void alpha8201_cpu_device::execute_set_input(int inputnum, int state)
}
-offs_t alpha8201_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
+offs_t alpha8201_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
{
extern CPU_DISASSEMBLE( alpha8201 );
return CPU_DISASSEMBLE_NAME(alpha8201)(this, stream, pc, oprom, opram, options);
diff --git a/src/devices/cpu/alph8201/alph8201.h b/src/devices/cpu/alph8201/alph8201.h
index 2f10923e39a..2f098b4d779 100644
--- a/src/devices/cpu/alph8201/alph8201.h
+++ b/src/devices/cpu/alph8201/alph8201.h
@@ -20,11 +20,11 @@ cpu/alph8201/ will be removed when the alpha 8304 has been dumped.
* *
\**************************************************************************/
-#pragma once
-
#ifndef __ALPH8201_H__
#define __ALPH8201_H__
+#pragma once
+
enum
{
ALPHA8201_PC = STATE_GENPC,
@@ -50,8 +50,8 @@ class alpha8201_cpu_device : public cpu_device
{
public:
// construction/destruction
- alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source);
protected:
// device-level overrides
@@ -59,9 +59,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const override { return 1; }
- virtual uint32_t execute_max_cycles() const override { return 16; }
- virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual u32 execute_min_cycles() const override { return 1; }
+ virtual u32 execute_max_cycles() const override { return 16; }
+ virtual u32 execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -74,25 +74,25 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
- virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+ virtual u32 disasm_min_opcode_bytes() const override { return 1; }
+ virtual u32 disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
- uint8_t M_RDMEM(uint16_t A) { return m_program->read_byte(A); }
- void M_WRMEM(uint16_t A,uint8_t V) { m_program->write_byte(A, V); }
- uint8_t M_RDOP(uint16_t A) { return m_direct->read_byte(A); }
- uint8_t M_RDOP_ARG(uint16_t A) { return m_direct->read_byte(A); }
- uint8_t RD_REG(uint8_t x) { return m_RAM[(m_regPtr<<3)+(x)]; }
- void WR_REG(uint8_t x, uint8_t d) { m_RAM[(m_regPtr<<3)+(x)]=(d); }
+ u8 M_RDMEM(u16 A) { return m_program->read_byte(A); }
+ void M_WRMEM(u16 A, u8 V) { m_program->write_byte(A, V); }
+ u8 M_RDOP(u16 A) { return m_direct->read_byte(A); }
+ u8 M_RDOP_ARG(u16 A) { return m_direct->read_byte(A); }
+ u8 RD_REG(u8 x) { return m_RAM[(m_regPtr<<3)+(x)]; }
+ void WR_REG(u8 x, u8 d) { m_RAM[(m_regPtr<<3)+(x)]=(d); }
unsigned M_RDMEM_OPCODE();
- void M_ADD(uint8_t dat);
- void M_ADDB(uint8_t dat);
- void M_SUB(uint8_t dat);
- void M_AND(uint8_t dat);
- void M_OR(uint8_t dat);
- void M_XOR(uint8_t dat);
- void M_JMP(uint8_t dat);
+ void M_ADD(u8 dat);
+ void M_ADDB(u8 dat);
+ void M_SUB(u8 dat);
+ void M_AND(u8 dat);
+ void M_OR(u8 dat);
+ void M_XOR(u8 dat);
+ void M_JMP(u8 dat);
void M_UNDEFINED();
void M_UNDEFINED2();
@@ -102,10 +102,10 @@ protected:
void nop() { }
void rora() { m_cf = m_A &1; m_A = (m_A>>1) | (m_A<<7); }
void rola() { m_cf = (m_A>>7)&1; m_A = (m_A<<1) | (m_A>>7); }
- void inc_b() { M_ADDB(0x02); }
- void dec_b() { M_ADDB(0xfe); }
- void inc_a() { M_ADD(0x01); }
- void dec_a() { M_ADD(0xff); }
+ void inc_b() { M_ADDB(0x02); }
+ void dec_b() { M_ADDB(0xfe); }
+ void inc_a() { M_ADD(0x01); }
+ void dec_a() { M_ADD(0xff); }
void cpl() { m_A ^= 0xff; };
void ld_a_ix0_0() { m_A = M_RDMEM(m_ix0.w.l+0); }
@@ -290,26 +290,26 @@ protected:
void ld_lp2_n() { m_lp2 = M_RDMEM_OPCODE(); }
void ld_b_n() { m_B = M_RDMEM_OPCODE(); }
- void djnz_lp0() { uint8_t i=M_RDMEM_OPCODE(); m_lp0--; if (m_lp0 != 0) M_JMP(i); }
- void djnz_lp1() { uint8_t i=M_RDMEM_OPCODE(); m_lp1--; if (m_lp1 != 0) M_JMP(i); }
- void djnz_lp2() { uint8_t i=M_RDMEM_OPCODE(); m_lp2--; if (m_lp2 != 0) M_JMP(i); }
- void jnz() { uint8_t i=M_RDMEM_OPCODE(); if (!m_zf) M_JMP(i); }
- void jnc() { uint8_t i=M_RDMEM_OPCODE(); if (!m_cf) M_JMP(i);}
- void jz() { uint8_t i=M_RDMEM_OPCODE(); if ( m_zf) M_JMP(i); }
- void jc() { uint8_t i=M_RDMEM_OPCODE(); if ( m_cf) M_JMP(i);}
- void jmp() { M_JMP(M_RDMEM_OPCODE() ); }
+ void djnz_lp0() { u8 i=M_RDMEM_OPCODE(); m_lp0--; if (m_lp0 != 0) M_JMP(i); }
+ void djnz_lp1() { u8 i=M_RDMEM_OPCODE(); m_lp1--; if (m_lp1 != 0) M_JMP(i); }
+ void djnz_lp2() { u8 i=M_RDMEM_OPCODE(); m_lp2--; if (m_lp2 != 0) M_JMP(i); }
+ void jnz() { u8 i=M_RDMEM_OPCODE(); if (!m_zf) M_JMP(i); }
+ void jnc() { u8 i=M_RDMEM_OPCODE(); if (!m_cf) M_JMP(i);}
+ void jz() { u8 i=M_RDMEM_OPCODE(); if ( m_zf) M_JMP(i); }
+ void jc() { u8 i=M_RDMEM_OPCODE(); if ( m_cf) M_JMP(i);}
+ void jmp() { M_JMP(M_RDMEM_OPCODE() ); }
void stop();
/* ALPHA 8301 : added instruction */
- void exg_a_ix0() { uint8_t t=m_A; m_A = m_ix0.b.l; m_ix0.b.l = t; }
- void exg_a_ix1() { uint8_t t=m_A; m_A = m_ix1.b.l; m_ix1.b.l = t; }
- void exg_a_ix2() { uint8_t t=m_A; m_A = m_ix2.b.l; m_ix2.b.l = t; }
- void exg_a_lp0() { uint8_t t=m_A; m_A = m_lp0; m_lp0 = t; }
- void exg_a_lp1() { uint8_t t=m_A; m_A = m_lp1; m_lp1 = t; }
- void exg_a_lp2() { uint8_t t=m_A; m_A = m_lp2; m_lp2 = t; }
- void exg_a_b() { uint8_t t=m_A; m_A = m_B; m_B = t; }
- void exg_a_rb() { uint8_t t=m_A; m_A = m_regPtr; m_regPtr = t; }
+ void exg_a_ix0() { u8 t=m_A; m_A = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_a_ix1() { u8 t=m_A; m_A = m_ix1.b.l; m_ix1.b.l = t; }
+ void exg_a_ix2() { u8 t=m_A; m_A = m_ix2.b.l; m_ix2.b.l = t; }
+ void exg_a_lp0() { u8 t=m_A; m_A = m_lp0; m_lp0 = t; }
+ void exg_a_lp1() { u8 t=m_A; m_A = m_lp1; m_lp1 = t; }
+ void exg_a_lp2() { u8 t=m_A; m_A = m_lp2; m_lp2 = t; }
+ void exg_a_b() { u8 t=m_A; m_A = m_B; m_B = t; }
+ void exg_a_rb() { u8 t=m_A; m_A = m_regPtr; m_regPtr = t; }
void ld_ix0_a() { m_ix0.b.l = m_A; }
void ld_ix1_a() { m_ix1.b.l = m_A; }
@@ -320,8 +320,8 @@ protected:
void ld_b_a() { m_B = m_A; }
void ld_rb_a() { m_regPtr = m_A; }
- void exg_ix0_ix1() { uint8_t t=m_ix1.b.l; m_ix1.b.l = m_ix0.b.l; m_ix0.b.l = t; }
- void exg_ix0_ix2() { uint8_t t=m_ix2.b.l; m_ix2.b.l = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_ix0_ix1() { u8 t=m_ix1.b.l; m_ix1.b.l = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_ix0_ix2() { u8 t=m_ix2.b.l; m_ix2.b.l = m_ix0.b.l; m_ix0.b.l = t; }
void op_d4() { m_A = M_RDMEM( ((m_RAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE() ); }
void op_d5() { M_WRMEM( ((m_RAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE(), m_A ); }
@@ -337,16 +337,16 @@ protected:
void op_rep_ld_b_ix0() { do { m_RAM[(m_B>>1)&0x3f] = M_RDMEM(m_ix0.w.l); m_ix0.b.l++; m_B+=2; m_lp0--; } while (m_lp0 != 0); }
void ld_rxb_a() { m_RAM[(m_B>>1)&0x3f] = m_A; }
void ld_a_rxb() { m_A = m_RAM[(m_B>>1)&0x3f]; }
- void cmp_a_rxb() { uint8_t i=m_RAM[(m_B>>1)&0x3f]; m_zf = (m_A==i); m_cf = (m_A>=i); }
+ void cmp_a_rxb() { u8 i=m_RAM[(m_B>>1)&0x3f]; m_zf = (m_A==i); m_cf = (m_A>=i); }
void xor_a_rxb() { M_XOR(m_RAM[(m_B>>1)&0x3f] ); }
void add_a_cf() { if (m_cf) inc_a(); }
void sub_a_cf() { if (m_cf) dec_a(); }
- void tst_a() { m_zf = (m_A==0); }
- void clr_a() { m_A = 0; m_zf = (m_A==0); }
- void cmp_a_n() { uint8_t i=M_RDMEM_OPCODE(); m_zf = (m_A==i); m_cf = (m_A>=i); }
+ void tst_a() { m_zf = (m_A==0); }
+ void clr_a() { m_A = 0; m_zf = (m_A==0); }
+ void cmp_a_n() { u8 i=M_RDMEM_OPCODE(); m_zf = (m_A==i); m_cf = (m_A>=i); }
void xor_a_n() { M_XOR(M_RDMEM_OPCODE() ); }
- void call() { uint8_t i=M_RDMEM_OPCODE(); m_retptr.w.l = m_pc.w.l; M_JMP(i); };
+ void call() { u8 i=M_RDMEM_OPCODE(); m_retptr.w.l = m_pc.w.l; M_JMP(i); };
void ld_a_ix0_a() { m_A = M_RDMEM(m_ix0.w.l+m_A); }
void ret() { m_mb = m_retptr.b.h; M_JMP( m_retptr.b.l ); };
void save_zc() { m_savez = m_zf; m_savec = m_cf; };
@@ -366,27 +366,27 @@ protected:
address_space_config m_program_config;
address_space_config m_io_config;
- uint8_t m_RAM[8*8]; /* internal GP register 8 * 8bank */
+ u8 m_RAM[8*8]; /* internal GP register 8 * 8bank */
unsigned m_PREVPC;
PAIR m_retptr; /* for 8301, return address of CALL */
PAIR m_pc; /* 2bit+8bit program counter */
- uint8_t m_regPtr; /* RB register base */
- uint8_t m_mb; /* MB memory bank reg. latch after Branch */
- uint8_t m_cf; /* C flag */
- uint8_t m_zf; /* Z flag */
- uint8_t m_savec; /* for 8301, save flags */
- uint8_t m_savez; /* for 8301, save flags */
-//
- PAIR m_ix0; /* 8bit memory read index reg. */
- PAIR m_ix1; /* 8bitmemory read index reg. */
- PAIR m_ix2; /* 8bitmemory write index reg. */
- uint8_t m_lp0; /* 8bit loop reg. */
- uint8_t m_lp1; /* 8bit loop reg. */
- uint8_t m_lp2; /* 8bit loop reg. */
- uint8_t m_A; /* 8bit accumerator */
- uint8_t m_B; /* 8bit regiser */
-//
- uint8_t m_halt; /* halt input line */
+ u8 m_regPtr; /* RB register base */
+ u8 m_mb; /* MB memory bank reg. latch after Branch */
+ u8 m_cf; /* C flag */
+ u8 m_zf; /* Z flag */
+ u8 m_savec; /* for 8301, save flags */
+ u8 m_savez; /* for 8301, save flags */
+
+ PAIR m_ix0; /* 8bit memory read index reg. */
+ PAIR m_ix1; /* 8bitmemory read index reg. */
+ PAIR m_ix2; /* 8bitmemory write index reg. */
+ u8 m_lp0; /* 8bit loop reg. */
+ u8 m_lp1; /* 8bit loop reg. */
+ u8 m_lp2; /* 8bit loop reg. */
+ u8 m_A; /* 8bit accumulator */
+ u8 m_B; /* 8bit register */
+
+ u8 m_halt; /* halt input line */
address_space *m_program;
direct_read_data *m_direct;
@@ -396,9 +396,9 @@ protected:
const s_opcode *m_opmap;
// Used for import/export only
- uint8_t m_sp;
- uint8_t m_R[8];
- uint8_t m_flags;
+ u8 m_sp;
+ u8 m_R[8];
+ u8 m_flags;
};
@@ -406,7 +406,7 @@ class alpha8301_cpu_device : public alpha8201_cpu_device
{
public:
// construction/destruction
- alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
diff --git a/src/devices/cpu/alto2/a2disp.h b/src/devices/cpu/alto2/a2disp.h
index 2d5e641b035..c4d47047519 100644
--- a/src/devices/cpu/alto2/a2disp.h
+++ b/src/devices/cpu/alto2/a2disp.h
@@ -270,7 +270,7 @@ enum {
* H[1]' - 4
*
* The display_state_machine() is called by the CPU at a rate of pixelclock/24,
- * which happens to be very close to every 7th CPU micrcocycle.
+ * which happens to be very close to every 7th CPU microcycle.
* </PRE>
*/
uint8_t* m_disp_a63;
diff --git a/src/devices/cpu/alto2/a2kbd.h b/src/devices/cpu/alto2/a2kbd.h
index 8921132fc11..8f5c9dd2538 100644
--- a/src/devices/cpu/alto2/a2kbd.h
+++ b/src/devices/cpu/alto2/a2kbd.h
@@ -81,7 +81,7 @@
#define A2_KEY_FR2 MAKE_KEY(0,002) //!< ADL right function key 2
#define A2_KEY_FL2 MAKE_KEY(0,001) //!< ADL left function key 1
-#define A2_KEY_FR4 MAKE_KEY(1,001) //!< ADL right funtion key 4
+#define A2_KEY_FR4 MAKE_KEY(1,001) //!< ADL right function key 4
#define A2_KEY_BW MAKE_KEY(1,000) //!< ADL BW (?)
#define A2_KEY_FR3 MAKE_KEY(2,002) //!< ADL right function key 3
@@ -102,7 +102,7 @@ struct {
DECLARE_READ16_MEMBER( kbd_ad_r ); //!< read the keyboard matrix
-void init_kbd(uint16_t bootkey = 0177777); //!< initialize the keyboard hardware, optinally set the boot key
+void init_kbd(uint16_t bootkey = 0177777); //!< initialize the keyboard hardware, optionally set the boot key
void exit_kbd(); //!< deinitialize the keyboard hardware
void reset_kbd(); //!< reset the keyboard hardware
#endif // _A2KBD_H_
diff --git a/src/devices/cpu/alto2/a2mem.cpp b/src/devices/cpu/alto2/a2mem.cpp
index 1f5f5609374..932acc1f729 100644
--- a/src/devices/cpu/alto2/a2mem.cpp
+++ b/src/devices/cpu/alto2/a2mem.cpp
@@ -318,7 +318,7 @@ static const int hamming_lut[64] = {
};
/**
- * @brief Caluclate a Hamming code after reading or before writing a memory double-word.
+ * @brief Calculate a Hamming code after reading or before writing a memory double-word.
*
* Hamming code generation is according to the schematics described above.
*
diff --git a/src/devices/cpu/alto2/a2mem.h b/src/devices/cpu/alto2/a2mem.h
index d9ff97060c9..8c79c439a6c 100644
--- a/src/devices/cpu/alto2/a2mem.h
+++ b/src/devices/cpu/alto2/a2mem.h
@@ -75,7 +75,7 @@ inline bool check_mem_load_mar_stall(uint8_t rsel) {
* 2. REQUIRED
* 3. SUSPEND
* 4. SUSPEND
- * 5. whereever <-MD
+ * 5. wherever <-MD
*
* @return false, if memory can be read without wait cycle
*/
@@ -109,7 +109,7 @@ DECLARE_WRITE16_MEMBER( mesr_w ); //!< memory error status register write
DECLARE_READ16_MEMBER ( mecr_r ); //!< memory error control register read
DECLARE_WRITE16_MEMBER( mecr_w ); //!< memory error control register write
-//! Read or write a memory double-word and caluclate or compare its Hamming code.
+//! Read or write a memory double-word and calculate or compare its Hamming code.
uint32_t hamming_code(bool write, uint32_t dw_addr, uint32_t dw_data);
//! Load the memory address register with some value.
diff --git a/src/devices/cpu/amis2000/amis2000.h b/src/devices/cpu/amis2000/amis2000.h
index f5611b4d54d..68fd87ee0ae 100644
--- a/src/devices/cpu/amis2000/amis2000.h
+++ b/src/devices/cpu/amis2000/amis2000.h
@@ -26,7 +26,7 @@
#define MCFG_AMI_S2000_WRITE_D_CB(_devcb) \
amis2000_base_device::set_write_d_callback(*device, DEVCB_##_devcb);
-// 13-bit external addressbus coupled as output pins
+// 13-bit external address bus coupled as output pins
#define MCFG_AMI_S2000_WRITE_A_CB(_devcb) \
amis2000_base_device::set_write_a_callback(*device, DEVCB_##_devcb);
diff --git a/src/devices/cpu/apexc/apexc.cpp b/src/devices/cpu/apexc/apexc.cpp
index cf132550263..c15f1210002 100644
--- a/src/devices/cpu/apexc/apexc.cpp
+++ b/src/devices/cpu/apexc/apexc.cpp
@@ -225,9 +225,9 @@ field: X address D Function Y address D (part 2)
n last bits of a word, leaving other bits in memory unaffected.
The LSBits are transferred first, since this enables to perform bit-per-bit add and
- substract. Otherwise, the CPU would need an additionnal register to store the second
+ substract. Otherwise, the CPU would need an additional register to store the second
operand, and it would be probably slower, since the operation could only
- take place after all the data has been transfered.
+ take place after all the data has been transferred.
Memory operations are synchronous with 2 clocks found on the memory controller:
* word clock: a pulse on each word boundary (3750rpm*32 -> 2kHz)
@@ -294,7 +294,7 @@ field: X address D Function Y address D (part 2)
although it appears that this delay is not applied when X is not read (cf cross-track
B in Booth p. 49).
However, and here comes the wacky part, analysis of Booth p. 55 shows that
- no additionnal delay is caused by an X instruction having its X operand
+ no additional delay is caused by an X instruction having its X operand
on another track. Maybe, just maybe, this is related to the fact that X does not
need to take the word count into account, any word in track is as good as any (yet,
this leaves the question of why this optimization could not be applied to vector
@@ -450,7 +450,7 @@ uint32_t apexc_cpu_device::load_ml(uint32_t address, uint32_t vector)
{
int delay;
- /* additionnal delay appears if we switch tracks */
+ /* additional delay appears if we switch tracks */
if (((m_ml & 0x3E0) != (address & 0x3E0)) /*|| vector*/)
delay = 6; /* if tracks are different, delay to allow for track switching */
else
diff --git a/src/devices/cpu/apexc/apexc.h b/src/devices/cpu/apexc/apexc.h
index 28aba6a5b52..dfb9bb5d58d 100644
--- a/src/devices/cpu/apexc/apexc.h
+++ b/src/devices/cpu/apexc/apexc.h
@@ -9,7 +9,7 @@
enum
{
APEXC_CR =1, /* control register */
- APEXC_A, /* acumulator */
+ APEXC_A, /* accumulator */
APEXC_R, /* register */
APEXC_ML, /* memory location */
APEXC_WS, /* working store */
diff --git a/src/devices/cpu/f8/f8.cpp b/src/devices/cpu/f8/f8.cpp
index 4a0b76347cc..2c49b8969b8 100644
--- a/src/devices/cpu/f8/f8.cpp
+++ b/src/devices/cpu/f8/f8.cpp
@@ -1607,7 +1607,7 @@ void f8_cpu_device::device_reset()
ROMC_00(cS);
/* initialize the timer shift register
- * this is an 8 bit polynome counter which can be loaded parallel
+ * this is an 8 bit polynomial counter which can be loaded parallel
* with 0xff the outputs never change and thus the timer is disabled.
* with 0xfe the shifter starts cycling through 255 states until it
* reaches 0xfe again (and then issues an interrupt).
diff --git a/src/devices/cpu/f8/f8.h b/src/devices/cpu/f8/f8.h
index 114372a23d1..02c1d4733e3 100644
--- a/src/devices/cpu/f8/f8.h
+++ b/src/devices/cpu/f8/f8.h
@@ -79,7 +79,7 @@ private:
uint8_t m_r[64]; /* scratchpad RAM */
int m_irq_request;
- /* timer shifter polynome values (will be used for timer interrupts) */
+ /* timer shifter polynomial values (will be used for timer interrupts) */
uint8_t timer_shifter[256];
uint16_t m_pc; // For the debugger
diff --git a/src/devices/cpu/g65816/g65816cm.h b/src/devices/cpu/g65816/g65816cm.h
index e0afd6d1305..0a30276a7ba 100644
--- a/src/devices/cpu/g65816/g65816cm.h
+++ b/src/devices/cpu/g65816/g65816cm.h
@@ -231,7 +231,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
#define CFLAG_SET 0x100
#define CFLAG_CLEAR 0
-/* Codition code tests */
+/* Condition code tests */
#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
#define COND_CS() (FLAG_C&0x100) /* Carry Set */
#define COND_EQ() (!FLAG_Z) /* Equal */
diff --git a/src/devices/cpu/i4004/i4004.h b/src/devices/cpu/i4004/i4004.h
index 7bc3d17427b..3e90ba466b8 100644
--- a/src/devices/cpu/i4004/i4004.h
+++ b/src/devices/cpu/i4004/i4004.h
@@ -96,7 +96,7 @@ protected:
address_space *m_data;
address_space *m_io;
int m_icount;
- int m_pc_pos; // PC possition in ADDR
+ int m_pc_pos; // PC position in ADDR
int m_addr_mask;
};
diff --git a/src/devices/cpu/i8008/i8008.h b/src/devices/cpu/i8008/i8008.h
index fde75d3948a..7f45e3dbb52 100644
--- a/src/devices/cpu/i8008/i8008.h
+++ b/src/devices/cpu/i8008/i8008.h
@@ -67,7 +67,7 @@ protected:
void take_interrupt();
void init_tables(void);
- int m_pc_pos; // PC possition in ADDR
+ int m_pc_pos; // PC position in ADDR
int m_icount;
// configuration
diff --git a/src/devices/cpu/lh5801/lh5801.h b/src/devices/cpu/lh5801/lh5801.h
index fba37fed2c7..4b693c1961c 100644
--- a/src/devices/cpu/lh5801/lh5801.h
+++ b/src/devices/cpu/lh5801/lh5801.h
@@ -28,7 +28,7 @@ a A
0 0 0 H V Z IE C
-TM 9bit polynominal?
+TM 9bit polynomial?
pu pv disp flipflops
diff --git a/src/devices/cpu/m37710/m37710cm.h b/src/devices/cpu/m37710/m37710cm.h
index 5595230124c..9924a4ee3f0 100644
--- a/src/devices/cpu/m37710/m37710cm.h
+++ b/src/devices/cpu/m37710/m37710cm.h
@@ -212,7 +212,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
#define CFLAG_SET 0x100
#define CFLAG_CLEAR 0
-/* Codition code tests */
+/* Condition code tests */
#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
#define COND_CS() (FLAG_C&0x100) /* Carry Set */
#define COND_EQ() (!FLAG_Z) /* Equal */
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index bea6b8351e3..9540acb00a0 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -1844,7 +1844,7 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
*
*/
uint32_t new_state = (m_last_line_state & ~(1 << irqline)) | ((state != CLEAR_LINE) << irqline);
- /* detect 0->1 transistions */
+ /* detect 0->1 transitions */
uint32_t tr_state = (~m_last_line_state) & new_state;
switch( irqline )
diff --git a/src/devices/cpu/mcs51/mcs51.h b/src/devices/cpu/mcs51/mcs51.h
index df5aba90d11..f2ff095a940 100644
--- a/src/devices/cpu/mcs51/mcs51.h
+++ b/src/devices/cpu/mcs51/mcs51.h
@@ -138,10 +138,10 @@ protected:
int m_num_interrupts; /* number of interrupts supported */
int m_recalc_parity; /* recalculate parity before next instruction */
uint32_t m_last_line_state; /* last state of input lines line */
- int m_t0_cnt; /* number of 0->1 transistions on T0 line */
- int m_t1_cnt; /* number of 0->1 transistions on T1 line */
- int m_t2_cnt; /* number of 0->1 transistions on T2 line */
- int m_t2ex_cnt; /* number of 0->1 transistions on T2EX line */
+ int m_t0_cnt; /* number of 0->1 transitions on T0 line */
+ int m_t1_cnt; /* number of 0->1 transitions on T1 line */
+ int m_t2_cnt; /* number of 0->1 transitions on T2 line */
+ int m_t2ex_cnt; /* number of 0->1 transitions on T2EX line */
int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
uint8_t m_irq_active; /* mask which irq levels are serviced */
uint8_t m_irq_prio[8]; /* interrupt priority */
diff --git a/src/devices/cpu/nec/v53.cpp b/src/devices/cpu/nec/v53.cpp
index 8ae50d4595e..f56974dda9e 100644
--- a/src/devices/cpu/nec/v53.cpp
+++ b/src/devices/cpu/nec/v53.cpp
@@ -252,7 +252,7 @@ void v53_base_device::install_peripheral_io()
}
}
- if (m_OPSEL & 0x02) // Interupt Control Unit available
+ if (m_OPSEL & 0x02) // Interrupt Control Unit available
{
uint16_t base = (m_OPHA << 8) | m_IULA;
base &= 0xfffe;
diff --git a/src/devices/cpu/pdp1/pdp1.cpp b/src/devices/cpu/pdp1/pdp1.cpp
index 4dee1695d4b..4f3d59f4b20 100644
--- a/src/devices/cpu/pdp1/pdp1.cpp
+++ b/src/devices/cpu/pdp1/pdp1.cpp
@@ -15,7 +15,7 @@
* mid-instruction sequence break. And it enables us to emulate the control panel fairly
* accurately.
*
- * Additionnally, IOT functions have been modified to be external: IOT callback pointers are set
+ * Additionally, IOT functions have been modified to be external: IOT callback pointers are set
* at emulation initiation, and most IOT callback functions are part of the machine emulation.
*
*
@@ -425,7 +425,7 @@ offs_t pdp1_device::disasm_disassemble(std::ostream &stream, offs_t pc, const ui
There are several interrupt lines. With the standard sequence break system, all lines
are logically or'ed to trigger a single interrupt level. Interrupts can be triggered
by either a pulse or a level on the interrupt lines. With the optional type 120 sequence
- break system, each of 16 lines triggers is wired to a different priority level: additionnally,
+ break system, each of 16 lines triggers is wired to a different priority level: additionally,
each interrupt line can be masked out, and interrupt can be triggered through software.
Also, instructions can be interrupted in the middle of execution. This is done by
@@ -837,7 +837,7 @@ void pdp1_device::execute_run()
{ /* there is a discrepancy: the pdp1 handbook tells that only dio should be used,
but the lisp tape uses the dac instruction instead */
/* Yet maintenance manual p. 6-25 states clearly that the data is located
- in IO and transfered to MB, so DAC is likely to be a mistake. */
+ in IO and transferred to MB, so DAC is likely to be a mistake. */
m_rim_step = 2;
}
else
@@ -1125,7 +1125,7 @@ void pdp1_device::execute_instruction()
{ /* maintenance manual 7-14 seems to imply that substract does not test for -0.
The sim 2.3 source says so explicitely, though they do not give a reference.
It sounds a bit weird, but the reason is probably that doing so would
- require additionnal logic that does not exist. */
+ require additional logic that does not exist. */
/* overflow is set if the 2 operands have the same sign and the final result has another */
int ov2; /* 1 if the operands have the same sign*/
@@ -1252,7 +1252,7 @@ void pdp1_device::execute_instruction()
/* As a side note, the order of -0 detection and overflow checking does not matter,
because the sum of two positive number cannot give 0777777 (since positive
numbers are 0377777 at most, their sum is 0777776 at most).
- Additionnally, we cannot have carry set and a result equal to 0777777 (since numbers
+ Additionally, we cannot have carry set and a result equal to 0777777 (since numbers
are 0777777 at most, their sum is 01777776 at most): this is nice, because it makes
the sequence:
AC = (AC + (AC >> 18)) & 0777777; // propagate carry around
diff --git a/src/devices/cpu/pps4/pps4.h b/src/devices/cpu/pps4/pps4.h
index c590ac85384..4d26383281a 100644
--- a/src/devices/cpu/pps4/pps4.h
+++ b/src/devices/cpu/pps4/pps4.h
@@ -133,7 +133,7 @@ private:
void iXBMX(); //!< Exchange BM and X registers
void iXAX(); //!< Exchange accumulator and X
void iXS(); //!< Eychange SA and SB registers
- void iCYS(); //!< Cycle SA register and accumulaor
+ void iCYS(); //!< Cycle SA register and accumulator
void iLB(); //!< Load B indirect
void iLBL(); //!< Load B long
void iINCB(); //!< Increment BL
diff --git a/src/devices/cpu/sh4/sh3comn.h b/src/devices/cpu/sh4/sh3comn.h
index 8aa68c27b26..241035b993e 100644
--- a/src/devices/cpu/sh4/sh3comn.h
+++ b/src/devices/cpu/sh4/sh3comn.h
@@ -8,7 +8,7 @@
// actual port handling is more complex than this
// which should be considered a temporary solution
-// just used some arbitrary port nubmers
+// just used some arbitrary port numbers
#define SH3_PORT_A (0x10*8)
#define SH3_PORT_B (0x11*8)
#define SH3_PORT_C (0x12*8)
diff --git a/src/devices/cpu/sh4/sh4.cpp b/src/devices/cpu/sh4/sh4.cpp
index 1d5c69ad483..0dce1e5c744 100644
--- a/src/devices/cpu/sh4/sh4.cpp
+++ b/src/devices/cpu/sh4/sh4.cpp
@@ -75,7 +75,11 @@ static ADDRESS_MAP_START( sh4_internal_map, AS_PROGRAM, 64, sh4_base_device )
AM_RANGE(0x1C000000, 0x1C000FFF) AM_RAM AM_MIRROR(0x01FFF000)
AM_RANGE(0x1E000000, 0x1E000FFF) AM_RAM AM_MIRROR(0x01FFF000)
AM_RANGE(0xE0000000, 0xE000003F) AM_RAM AM_MIRROR(0x03FFFFC0) // todo: store queues should be write only on DC's SH4, executing PREFM shouldn't cause an actual memory read access!
- AM_RANGE(0xF6000000, 0xF7FFFFFF) AM_READWRITE(sh4_tlb_r,sh4_tlb_w)
+
+ AM_RANGE(0xF6000000, 0xF6FFFFFF) AM_READWRITE(sh4_utlb_address_array_r,sh4_utlb_address_array_w)
+ AM_RANGE(0xF7000000, 0xF77FFFFF) AM_READWRITE(sh4_utlb_data_array1_r,sh4_utlb_data_array1_w)
+ AM_RANGE(0xF7800000, 0xF7FFFFFF) AM_READWRITE(sh4_utlb_data_array2_r,sh4_utlb_data_array2_w)
+
AM_RANGE(0xFE000000, 0xFFFFFFFF) AM_READWRITE32(sh4_internal_r, sh4_internal_w, 0xffffffffffffffffU)
ADDRESS_MAP_END
@@ -99,6 +103,7 @@ sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type ty
, c_md7(0)
, c_md8(0)
, c_clock(0)
+ , m_mmuhack(1)
#if SH4_USE_FASTRAM_OPTIMIZATION
, m_bigendian(endianness == ENDIANNESS_BIG)
, m_byte_xor(m_bigendian ? BYTE8_XOR_BE(0) : BYTE8_XOR_LE(0))
@@ -180,6 +185,37 @@ void sh34_base_device::TODO(const uint16_t opcode)
{
}
+void sh34_base_device::LDTLB(const uint16_t opcode)
+{
+ logerror("unhandled LDTLB for this CPU type\n");
+}
+
+void sh4_base_device::LDTLB(const uint16_t opcode)
+{
+ int replace = (m_m[MMUCR] & 0x0000fc00) >> 10;
+
+ logerror("using LDTLB to replace UTLB entry %02x\n", replace);
+
+ // these come from PTEH
+ m_utlb[replace].VPN = (m_m[PTEH] & 0xfffffc00) >> 10;
+// m_utlb[replace].D = (m_m[PTEH] & 0x00000200) >> 9; // from PTEL
+// m_utlb[replace].V = (m_m[PTEH] & 0x00000100) >> 8; // from PTEL
+ m_utlb[replace].ASID = (m_m[PTEH] & 0x000000ff) >> 0;
+ // these come from PTEL
+ m_utlb[replace].PPN = (m_m[PTEL] & 0x1ffffc00) >> 10;
+ m_utlb[replace].V = (m_m[PTEL] & 0x00000100) >> 8;
+ m_utlb[replace].PSZ = (m_m[PTEL] & 0x00000080) >> 6;
+ m_utlb[replace].PSZ |=(m_m[PTEL] & 0x00000010) >> 4;
+ m_utlb[replace].PPR= (m_m[PTEL] & 0x00000060) >> 5;
+ m_utlb[replace].C = (m_m[PTEL] & 0x00000008) >> 3;
+ m_utlb[replace].D = (m_m[PTEL] & 0x00000004) >> 2;
+ m_utlb[replace].SH = (m_m[PTEL] & 0x00000002) >> 1;
+ m_utlb[replace].WT = (m_m[PTEL] & 0x00000001) >> 0;
+ // these come from PTEA
+ m_utlb[replace].TC = (m_m[PTEA] & 0x00000008) >> 3;
+ m_utlb[replace].SA = (m_m[PTEA] & 0x00000007) >> 0;
+}
+
#if 0
int sign_of(int n)
{
@@ -263,21 +299,36 @@ inline uint8_t sh34_base_device::RB(offs_t A)
if (A >= 0xe0000000)
return m_program->read_byte(A);
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ return fastbase[_A ^ m_byte_xor];
}
- uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- return fastbase[_A ^ m_byte_xor];
- }
- return m_program->read_byte(_A);
+ return m_program->read_byte(_A);
#else
- return m_program->read_byte(A & AM);
+ return m_program->read_byte(A & AM);
#endif
+ }
+ else // P0 region
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ return m_program->read_byte(A & AM);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ return m_program->read_byte(A);
+ }
+ }
}
@@ -286,21 +337,36 @@ inline uint16_t sh34_base_device::RW(offs_t A)
if (A >= 0xe0000000)
return m_program->read_word(A);
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ return ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1];
}
- uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- return ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1];
- }
- return m_program->read_word(_A);
+ return m_program->read_word(_A);
#else
- return m_program->read_word(A & AM);
+ return m_program->read_word(A & AM);
#endif
+ }
+ else
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ return m_program->read_word(A & AM);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ return m_program->read_word(A);
+ }
+ }
}
@@ -309,21 +375,36 @@ inline uint32_t sh34_base_device::RL(offs_t A)
if (A >= 0xe0000000)
return m_program->read_dword(A);
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (_A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ return ((uint32_t*)fastbase)[(_A^m_dword_xor) >> 2];
}
- uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- return ((uint32_t*)fastbase)[(_A^m_dword_xor) >> 2];
- }
- return m_program->read_dword(_A);
+ return m_program->read_dword(_A);
#else
- return m_program->read_dword(A & AM);
+ return m_program->read_dword(A & AM);
#endif
+ }
+ else
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ return m_program->read_dword(A & AM);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ return m_program->read_dword(A);
+ }
+ }
}
@@ -334,22 +415,38 @@ inline void sh34_base_device::WB(offs_t A, uint8_t V)
m_program->write_byte(A,V);
return;
}
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ fastbase[_A ^ m_byte_xor] = V;
+ return;
}
- uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- fastbase[_A ^ m_byte_xor] = V;
- return;
- }
- m_program->write_byte(_A,V);
+ m_program->write_byte(_A, V);
#else
- m_program->write_byte(A & AM,V);
+ m_program->write_byte(A & AM, V);
#endif
+ }
+ else
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ m_program->write_byte(A & AM, V);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ m_program->write_byte(A, V);
+ }
+ }
}
@@ -360,22 +457,38 @@ inline void sh34_base_device::WW(offs_t A, uint16_t V)
m_program->write_word(A,V);
return;
}
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1] = V;
+ return;
}
- void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1] = V;
- return;
- }
- m_program->write_word(_A,V);
+ m_program->write_word(_A, V);
#else
- m_program->write_word(A & AM,V);
+ m_program->write_word(A & AM, V);
#endif
+ }
+ else
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ m_program->write_word(A & AM, V);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ m_program->write_word(A, V);
+ }
+ }
}
@@ -386,22 +499,39 @@ inline void sh34_base_device::WL(offs_t A, uint32_t V)
m_program->write_dword(A,V);
return;
}
-#if SH4_USE_FASTRAM_OPTIMIZATION
- const offs_t _A = A & AM;
- for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
+
+ if (A >= 0x80000000) // P1/P2/P3 region
{
- if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+#if SH4_USE_FASTRAM_OPTIMIZATION
+ const offs_t _A = A & AM;
+ for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
- continue;
+ if (m_fastram[ramnum].readonly == true || _A < m_fastram[ramnum].start || _A > m_fastram[ramnum].end)
+ {
+ continue;
+ }
+ void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ ((uint32_t*)fastbase)[(_A ^ m_dword_xor) >> 2] = V;
+ return;
}
- void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- ((uint32_t*)fastbase)[(_A ^ m_dword_xor) >> 2] = V;
- return;
- }
- m_program->write_dword(_A,V);
+ m_program->write_dword(_A, V);
#else
- m_program->write_dword(A & AM,V);
+ m_program->write_dword(A & AM, V);
#endif
+ }
+ else
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ m_program->write_dword(A & AM, V);
+ }
+ else
+ {
+ A = get_remap(A & AM);
+ m_program->write_dword(A, V);
+ }
+ }
+
}
/* code cycles t-bit
@@ -3331,7 +3461,7 @@ inline void sh34_base_device::execute_one_0000(const uint16_t opcode)
case 0x08: CLRT(opcode); break;
case 0x18: SETT(opcode); break;
case 0x28: CLRMAC(opcode); break;
- case 0x38: TODO(opcode); break;
+ case 0x38: LDTLB(opcode); break;
case 0x48: CLRS(opcode); break;
case 0x58: SETS(opcode); break;
case 0x68: NOP(opcode); break;
@@ -3339,7 +3469,7 @@ inline void sh34_base_device::execute_one_0000(const uint16_t opcode)
case 0x88: CLRT(opcode); break;
case 0x98: SETT(opcode); break;
case 0xa8: CLRMAC(opcode); break;
- case 0xb8: TODO(opcode); break;
+ case 0xb8: LDTLB(opcode); break;
case 0xc8: CLRS(opcode); break;
case 0xd8: SETS(opcode); break;
case 0xe8: NOP(opcode); break;
@@ -3939,7 +4069,10 @@ void sh34_base_device::execute_run()
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
- const uint16_t opcode = m_direct->read_word(m_pc & AM, WORD2_XOR_LE(0));
+ uint16_t opcode;
+
+ if (!m_sh4_mmu_enabled) opcode = m_direct->read_word(m_pc & AM, WORD2_XOR_LE(0));
+ else opcode = RW(m_pc); // should probably use a different function as this needs to go through the ITLB
if (m_delay)
{
@@ -4028,6 +4161,47 @@ void sh4be_device::execute_run()
} while( m_sh4_icount > 0 );
}
+void sh4_base_device::device_start()
+{
+ sh34_base_device::device_start();
+
+ int i;
+ for (i=0;i<64;i++)
+ {
+ m_utlb[i].ASID = 0;
+ m_utlb[i].VPN = 0;
+ m_utlb[i].V = 0;
+ m_utlb[i].PPN = 0;
+ m_utlb[i].PSZ = 0;
+ m_utlb[i].SH = 0;
+ m_utlb[i].C = 0;
+ m_utlb[i].PPR = 0;
+ m_utlb[i].D = 0;
+ m_utlb[i].WT = 0;
+ m_utlb[i].SA = 0;
+ m_utlb[i].TC = 0;
+ }
+
+ for (i=0;i<64;i++)
+ {
+ save_item(NAME(m_utlb[i].ASID), i);
+ save_item(NAME(m_utlb[i].VPN), i);
+ save_item(NAME(m_utlb[i].V), i);
+ save_item(NAME(m_utlb[i].PPN), i);
+ save_item(NAME(m_utlb[i].PSZ), i);
+ save_item(NAME(m_utlb[i].SH), i);
+ save_item(NAME(m_utlb[i].C), i);
+ save_item(NAME(m_utlb[i].PPR), i);
+ save_item(NAME(m_utlb[i].D), i);
+ save_item(NAME(m_utlb[i].WT), i);
+ save_item(NAME(m_utlb[i].SA), i);
+ save_item(NAME(m_utlb[i].TC), i);
+ }
+
+}
+
+
+
void sh34_base_device::device_start()
{
for (int i=0; i<3; i++)
@@ -4134,8 +4308,6 @@ void sh34_base_device::device_start()
save_item(NAME( m_ioport16_direction));
save_item(NAME(m_ioport4_pullup));
save_item(NAME(m_ioport4_direction));
- save_item(NAME(m_sh4_tlb_address));
- save_item(NAME(m_sh4_tlb_data));
save_item(NAME(m_sh4_mmu_enabled));
save_item(NAME(m_sh3internal_upper));
save_item(NAME(m_sh3internal_lower));
diff --git a/src/devices/cpu/sh4/sh4.h b/src/devices/cpu/sh4/sh4.h
index 7531363c2da..0720ec9375d 100644
--- a/src/devices/cpu/sh4/sh4.h
+++ b/src/devices/cpu/sh4/sh4.h
@@ -136,6 +136,26 @@ struct sh4_ddt_dma
int mode;
};
+
+// ASID [7:0] | VPN [31:10] | V | | PPN [28:10] | SZ[1:0] | SH | C | PR[1:0] | D | WT | SA[2:0] | TC
+
+struct sh4_utlb
+{
+ uint8_t ASID;
+ uint32_t VPN;
+ uint8_t V;
+ uint32_t PPN;
+ uint8_t PSZ;
+ uint8_t SH;
+ uint8_t C;
+ uint8_t PPR;
+ uint8_t D;
+ uint8_t WT;
+ uint8_t SA;
+ uint8_t TC;
+};
+
+
typedef void (*sh4_ftcsr_callback)(uint32_t);
@@ -170,6 +190,10 @@ typedef void (*sh4_ftcsr_callback)(uint32_t);
sh34_base_device::set_sh4_clock(*device, _clock);
+#define MCFG_MMU_HACK_TYPE(_hacktype) \
+ sh34_base_device::set_mmu_hacktype(*device, _hacktype);
+
+
class sh34_base_device : public cpu_device
{
public:
@@ -191,6 +215,8 @@ public:
static void set_md8(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md8 = md0; }
static void set_sh4_clock(device_t &device, int clock) { downcast<sh34_base_device &>(device).c_clock = clock; }
+ static void set_mmu_hacktype(device_t &device, int hacktype) { downcast<sh34_base_device &>(device).m_mmuhack = hacktype; }
+
TIMER_CALLBACK_MEMBER( sh4_refresh_timer_callback );
TIMER_CALLBACK_MEMBER( sh4_rtc_timer_callback );
TIMER_CALLBACK_MEMBER( sh4_timer_callback );
@@ -242,6 +268,9 @@ protected:
int c_md8;
int c_clock;
+ // hack 1 = Naomi hack, hack 2 = Work in Progress implementation
+ int m_mmuhack;
+
uint32_t m_ppc;
uint32_t m_pc;
uint32_t m_spc;
@@ -358,8 +387,6 @@ protected:
void (*m_ftcsr_read_callback)(uint32_t data);
/* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
- uint32_t m_sh4_tlb_address[64];
- uint32_t m_sh4_tlb_data[64];
uint8_t m_sh4_mmu_enabled;
int m_cpu_type;
@@ -451,6 +478,7 @@ protected:
void LDSMMACH(const uint16_t opcode);
void LDSMMACL(const uint16_t opcode);
void LDSMPR(const uint16_t opcode);
+ virtual void LDTLB(const uint16_t opcode);
void MAC_L(const uint16_t opcode);
void MAC_W(const uint16_t opcode);
void MOV(const uint16_t opcode);
@@ -627,7 +655,8 @@ protected:
void increment_rtc_time(int mode);
void sh4_dmac_nmi();
void sh4_handler_ipra_w(uint32_t data, uint32_t mem_mask);
- uint32_t sh4_getsqremap(uint32_t address);
+ virtual uint32_t get_remap(uint32_t address);
+ virtual uint32_t sh4_getsqremap(uint32_t address);
void sh4_parse_configuration();
void sh4_timer_recompute(int which);
uint32_t sh4_handle_tcnt0_addr_r(uint32_t mem_mask);
@@ -736,10 +765,21 @@ public:
DECLARE_WRITE32_MEMBER( sh4_internal_w );
DECLARE_READ32_MEMBER( sh4_internal_r );
- DECLARE_READ64_MEMBER( sh4_tlb_r );
- DECLARE_WRITE64_MEMBER( sh4_tlb_w );
+ DECLARE_READ64_MEMBER( sh4_utlb_address_array_r );
+ DECLARE_WRITE64_MEMBER( sh4_utlb_address_array_w );
+ DECLARE_READ64_MEMBER( sh4_utlb_data_array1_r );
+ DECLARE_WRITE64_MEMBER( sh4_utlb_data_array1_w );
+ DECLARE_READ64_MEMBER( sh4_utlb_data_array2_r );
+ DECLARE_WRITE64_MEMBER( sh4_utlb_data_array2_w );
+
+ virtual void LDTLB(const uint16_t opcode) override;
+
+ virtual uint32_t get_remap(uint32_t address) override;
+ virtual uint32_t sh4_getsqremap(uint32_t address) override;
+ sh4_utlb m_utlb[64];
protected:
+ virtual void device_start() override;
virtual void device_reset() override;
};
diff --git a/src/devices/cpu/sh4/sh4comn.cpp b/src/devices/cpu/sh4/sh4comn.cpp
index 985413e4a73..dbb794e0c82 100644
--- a/src/devices/cpu/sh4/sh4comn.cpp
+++ b/src/devices/cpu/sh4/sh4comn.cpp
@@ -676,26 +676,106 @@ WRITE32_MEMBER( sh4_base_device::sh4_internal_w )
// printf("sh4_internal_w: Write %08x (%x), %08x @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), offset, data, mem_mask);
- switch( offset )
+ switch( offset )
{
+ case PTEH: // for use with LDTLB opcode
+ m_m[PTEH] &= 0xffffffff;
+ /*
+ NNNN NNNN NNNN NNNN NNNN NN-- AAAA AAAA
+
+ N = VPM = Virtual Page Number
+ A = ASID = Address Space Identifier
+
+ same as the address table part of the utlb but with 2 unused bits (these are sourced from PTEL instead when LDTLB is called)
+ */
+
+
+ break;
+
+ case PTEL:
+ m_m[PTEL] &= 0xffffffff;
+ /*
+ ---P PPPP PPPP PPPP PPPP PP-V zRRz CDHW
+
+ same format as data array 1 of the utlb
+ */
+ break;
+
+ case PTEA:
+ m_m[PTEA] &= 0xffffffff;
+ /*
+ ---- ---- ---- ---- ---- ---- ---- TSSS
+
+ same format as data array 2 of the utlb
+ */
+ break;
+
+ case TTB:
+ m_m[TTB] &= 0xffffffff;
+ logerror("TTB set to %08x\n", data);
+ break;
+
+ case TEA:
+ m_m[TEA] &= 0xffffffff;
+ logerror("TEA set to %08x\n", data);
+ break;
+
+
case MMUCR: // MMU Control
+ logerror("%s: MMUCR %08x\n", machine().describe_context(), data);
+ m_m[MMUCR] &= 0xffffffff;
+ /*
+ LLLL LL-- BBBB BB-- CCCC CCQV ---- -T-A
+
+ L = LRUI = Least recently used ITLB
+ B = URB = UTLB replace boundary
+ C = URC = UTLB replace counter
+ Q = SQMD = Store Queue Mode Bit
+ V = SV = Single Virtual Mode Bit
+ T = TI = TLB invaldiate
+ A = AT = Address translation bit (enable)
+ */
+
+
+
if (data & MMUCR_AT)
{
- printf("SH4 MMU Enabled\n");
- printf("If you're seeing this, but running something other than a Naomi GD-ROM game then chances are it won't work\n");
- printf("The MMU emulation is a hack specific to that system\n");
m_sh4_mmu_enabled = 1;
- // should be a different bit!
+
+ if (m_mmuhack == 1)
+ {
+ printf("SH4 MMU Enabled\n");
+ printf("If you're seeing this, but running something other than a Naomi GD-ROM game then chances are it won't work\n");
+ printf("The MMU emulation is a hack specific to that system\n");
+ }
+
+
+ if (m_mmuhack == 2)
{
- int i;
- for (i=0;i<64;i++)
+ for (int i = 0;i < 64;i++)
{
- m_sh4_tlb_address[i] = 0;
- m_sh4_tlb_data[i] = 0;
+ if (m_utlb[i].V)
+ {
+ printf("(entry %02x | ASID: %02x VPN: %08x V: %02x PPN: %08x SZ: %02x SH: %02x C: %02x PPR: %02x D: %02x WT %02x: SA: %02x TC: %02x)\n",
+ i,
+ m_utlb[i].ASID,
+ m_utlb[i].VPN << 10,
+ m_utlb[i].V,
+ m_utlb[i].PPN << 10,
+ m_utlb[i].PSZ,
+ m_utlb[i].SH,
+ m_utlb[i].C,
+ m_utlb[i].PPR,
+ m_utlb[i].D,
+ m_utlb[i].WT,
+ m_utlb[i].SA,
+ m_utlb[i].TC);
+ }
}
-
}
+
+
}
else
{
@@ -1184,9 +1264,44 @@ void sh34_base_device::sh4_parse_configuration()
}
}
+uint32_t sh34_base_device::get_remap(uint32_t address)
+{
+ return address;
+}
+
+uint32_t sh4_base_device::get_remap(uint32_t address)
+{
+ if (m_mmuhack != 2)
+ return address;
+
+ // is this the correct way around?
+ int i;
+ uint32_t topaddr = address&0xfff00000;
+
+ for (i=0;i<64;i++)
+ {
+ if (m_utlb[i].V)
+ {
+ uint32_t topcmp = (m_utlb[i].PPN << 10) & 0xfff00000;
+ if (topcmp == topaddr)
+ return (address & 0x000fffff) | ((m_utlb[i].VPN << 10) & 0xfff00000);
+ }
+ }
+
+ //printf("address not in UTLB? %08x\n", address);
+
+
+ return address;
+}
+
uint32_t sh34_base_device::sh4_getsqremap(uint32_t address)
{
- if (!m_sh4_mmu_enabled)
+ return address;
+}
+
+uint32_t sh4_base_device::sh4_getsqremap(uint32_t address)
+{
+ if (!m_sh4_mmu_enabled || (m_mmuhack != 1))
return address;
else
{
@@ -1195,44 +1310,156 @@ uint32_t sh34_base_device::sh4_getsqremap(uint32_t address)
for (i=0;i<64;i++)
{
- uint32_t topcmp = m_sh4_tlb_address[i]&0xfff00000;
+ uint32_t topcmp = (m_utlb[i].VPN<<10)&0xfff00000;
if (topcmp==topaddr)
- return (address&0x000fffff) | ((m_sh4_tlb_data[i])&0xfff00000);
+ return (address&0x000fffff) | ((m_utlb[i].PPN<<10)&0xfff00000);
}
-
}
return address;
}
-READ64_MEMBER( sh4_base_device::sh4_tlb_r )
+
+WRITE64_MEMBER( sh4_base_device::sh4_utlb_address_array_w )
{
- int offs = offset*8;
+/* uses bits 13:8 of address to select which UTLB entry we're addressing
+ bit 7 of the address enables 'associative' mode, causing a search
+ operation rather than a direct write.
+
+ NNNN NNNN NNNN NNNN NNNN NNDV AAAA AAAA
+
+ N = VPN = Virtual Page Number
+ D = Dirty Bit
+ V = Validity Bit
+ A = ASID = Address Space Identifier
+*/
+
+ logerror("sh4_utlb_address_array_w %08x %08x\n", offset, data);
+ int offs = offset << 3;
+
+ uint8_t associative = (offs >> 7) & 1;
- if (offs >= 0x01000000)
+ if (!associative)
{
- uint8_t i = (offs>>8)&63;
- return m_sh4_tlb_data[i];
+ // non-associative mode
+ uint8_t i = (offs >> 8) & 63;
+
+ m_utlb[i].VPN = (data & 0xfffffc00) >> 10;
+ m_utlb[i].D = (data & 0x00000200) >> 9;
+ m_utlb[i].V = (data & 0x00000100) >> 8;
+ m_utlb[i].ASID = (data & 0x000000ff) >> 0;
}
else
{
- uint8_t i = (offs>>8)&63;
- return m_sh4_tlb_address[i];
+ // associative mode
+ fatalerror("SH4MMU: associative mode writes unsupported\n");
}
}
-WRITE64_MEMBER( sh4_base_device::sh4_tlb_w )
+READ64_MEMBER( sh4_base_device::sh4_utlb_address_array_r )
{
+ // associative bit is ignored for reads
int offs = offset*8;
- if (offs >= 0x01000000)
- {
- uint8_t i = (offs>>8)&63;
- m_sh4_tlb_data[i] = data&0xffffffff;
- }
- else
- {
- uint8_t i = (offs>>8)&63;
- m_sh4_tlb_address[i] = data&0xffffffff;
- }
+ uint32_t ret = 0;
+
+ uint8_t i = (offs >> 8) & 63;
+
+ ret |= m_utlb[i].VPN << 10;
+ ret |= m_utlb[i].D << 9;
+ ret |= m_utlb[i].V << 8;
+ ret |= m_utlb[i].ASID << 0;
+
+ return ret;
+}
+
+
+WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array1_w )
+{
+/* uses bits 13:8 of address to select which UTLB entry we're addressing
+
+ ---P PPPP PPPP PPPP PPPP PP-V zRRz CDHW
+
+ P = PPN = Physical page number
+ V = Validity bit
+ z = SZ = Page Size (2 bits, split)
+ D = Dirty Bit
+ R = PR = Protection Key Data
+ C = Cacheable bit
+ H = Share status
+ W = Write through
+ - = unused (should be 0)
+*/
+ logerror("sh4_utlb_data_array1_w %08x %08x\n", offset, data);
+ int offs = offset*8;
+
+ uint8_t i = (offs>>8)&63;
+
+ m_utlb[i].PPN = (data & 0x1ffffc00) >> 10;
+ m_utlb[i].V = (data & 0x00000100) >> 8;
+ m_utlb[i].PSZ = (data & 0x00000080) >> 6;
+ m_utlb[i].PSZ |=(data & 0x00000010) >> 4;
+ m_utlb[i].PPR= (data & 0x00000060) >> 5;
+ m_utlb[i].C = (data & 0x00000008) >> 3;
+ m_utlb[i].D = (data & 0x00000004) >> 2;
+ m_utlb[i].SH = (data & 0x00000002) >> 1;
+ m_utlb[i].WT = (data & 0x00000001) >> 0;
+}
+
+
+READ64_MEMBER(sh4_base_device::sh4_utlb_data_array1_r)
+{
+ uint32_t ret = 0;
+ int offs = offset*8;
+
+ uint8_t i = (offs>>8)&63;
+
+ ret |= m_utlb[i].PPN << 10;
+ ret |= m_utlb[i].V << 8;
+ ret |= (m_utlb[i].PSZ & 2) << 6;
+ ret |= (m_utlb[i].PSZ & 1) << 4;
+ ret |= m_utlb[i].PPR << 5;
+ ret |= m_utlb[i].C << 3;
+ ret |= m_utlb[i].D << 2;
+ ret |= m_utlb[i].SH << 1;
+ ret |= m_utlb[i].WT << 0;
+
+ return ret;
+}
+
+
+
+WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array2_w )
+{
+/* uses bits 13:8 of address to select which UTLB entry we're addressing
+
+ ---- ---- ---- ---- ---- ---- ---- TSSS
+
+ T = TC = Timing Control
+ S = SA = Space attributes
+ - = unused (should be 0)
+
+*/
+
+ logerror("sh4_utlb_data_array2_w %08x %08x\n", offset, data);
+ int offs = offset*8;
+
+ uint8_t i = (offs>>8)&63;
+
+ m_utlb[i].TC = (data & 0x00000008) >> 3;
+ m_utlb[i].SA = (data & 0x00000007) >> 0;
}
+
+
+READ64_MEMBER(sh4_base_device::sh4_utlb_data_array2_r)
+{
+ uint32_t ret = 0;
+ int offs = offset*8;
+
+ uint8_t i = (offs>>8)&63;
+
+ ret |= m_utlb[i].TC << 3;
+ ret |= m_utlb[i].SA << 0;
+
+ return ret;
+} \ No newline at end of file
diff --git a/src/devices/cpu/spc700/spc700.cpp b/src/devices/cpu/spc700/spc700.cpp
index 39b4efb293c..1668be70617 100644
--- a/src/devices/cpu/spc700/spc700.cpp
+++ b/src/devices/cpu/spc700/spc700.cpp
@@ -175,7 +175,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* ============================ GENERAL MACROS ============================ */
/* ======================================================================== */
-/* Codition code tests */
+/* Condition code tests */
#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
#define COND_CS() (FLAG_C&0x100) /* Carry Set */
#define COND_EQ() (!FLAG_Z) /* Equal */
diff --git a/src/devices/cpu/tlcs900/900tbl.hxx b/src/devices/cpu/tlcs900/900tbl.hxx
index 38fe13abb4f..dc331c1d85c 100644
--- a/src/devices/cpu/tlcs900/900tbl.hxx
+++ b/src/devices/cpu/tlcs900/900tbl.hxx
@@ -9,7 +9,7 @@ TLCS-900/H instruction set
enum e_operand
{
- _A=1, /* currect register set register A */
+ _A=1, /* current register set register A */
_C8, /* current register set byte */
_C16, /* current register set word */
_C32, /* current register set long word */
diff --git a/src/devices/cpu/tlcs900/dasm900.cpp b/src/devices/cpu/tlcs900/dasm900.cpp
index a4d46be2dde..64c8c6ba099 100644
--- a/src/devices/cpu/tlcs900/dasm900.cpp
+++ b/src/devices/cpu/tlcs900/dasm900.cpp
@@ -65,7 +65,7 @@ static const char *const s_mnemonic[] =
enum e_operand
{
O_NONE,
- O_A, /* currect register set register A */
+ O_A, /* current register set register A */
O_C8, /* current register set byte */
O_C16, /* current register set word */
O_C32, /* current register set long word */
diff --git a/src/devices/cpu/tms7000/tms7000.cpp b/src/devices/cpu/tms7000/tms7000.cpp
index eb6694a02c4..9e810a02407 100644
--- a/src/devices/cpu/tms7000/tms7000.cpp
+++ b/src/devices/cpu/tms7000/tms7000.cpp
@@ -902,7 +902,7 @@ WRITE8_MEMBER(tms70c46_device::control_w)
// known fast memory areas: internal ROM/RAM, system RAM
// known slow memory areas: system ROM, cartridge ROM/RAM
- // d0-d3(all bits?): clock divider when d4 is set and addressbus is in slow memory area
+ // d0-d3(all bits?): clock divider when d4 is set and address bus is in slow memory area
// needs to be measured, i just know that $30 is full speed, and $38 is about 4 times slower
m_control = data;
}
diff --git a/src/devices/cpu/tms9900/ti990_10.cpp b/src/devices/cpu/tms9900/ti990_10.cpp
index 64858239eb0..8b0a1b5bed6 100644
--- a/src/devices/cpu/tms9900/ti990_10.cpp
+++ b/src/devices/cpu/tms9900/ti990_10.cpp
@@ -17,7 +17,7 @@
tms99000 is the successor to both ti9900 and ti990/10. It supports
privileges, and has a coprocessor interface which enables the use of an
- external memory mapper. Additionnally, it can use a Macrostore ROM to
+ external memory mapper. Additionally, it can use a Macrostore ROM to
emulate additional instructions.
**** This is WORK IN PROGRESS ****
diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h
index 2a627c98664..0a110285637 100644
--- a/src/devices/cpu/tms9900/tms9900.h
+++ b/src/devices/cpu/tms9900/tms9900.h
@@ -197,7 +197,7 @@ protected:
// full range 0000-fffe for its CRU operations.
//
// We could realize this via the CRU access as well, but the data bus access
- // is not that simple to emulate. For the sake of homogenity between the
+ // is not that simple to emulate. For the sake of homogeneity between the
// chip emulations we use a dedicated callback.
devcb_write8 m_external_operation;
diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h
index 91bb29e09b1..57c92db775b 100644
--- a/src/devices/cpu/tms9900/tms9995.h
+++ b/src/devices/cpu/tms9900/tms9995.h
@@ -411,7 +411,7 @@ private:
// 1 1 1 LREX
//
// We could realize this via the CRU access as well, but the data bus access
- // is not that simple to emulate. For the sake of homogenity between the
+ // is not that simple to emulate. For the sake of homogeneity between the
// chip emulations we use a dedicated callback.
devcb_write8 m_external_operation;
diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h
index a86f8eee82b..1b60d46cd8b 100644
--- a/src/devices/cpu/uml.h
+++ b/src/devices/cpu/uml.h
@@ -225,7 +225,7 @@ namespace uml
OP_MAX
};
- // C function callback deinition
+ // C function callback definition
typedef void (*c_function)(void *ptr);
// class describing a global code handle
@@ -274,7 +274,7 @@ namespace uml
uint32_t m_label;
};
- // a parameter for a UML instructon is encoded like this
+ // a parameter for a UML instruction is encoded like this
class parameter
{
public:
@@ -392,7 +392,7 @@ namespace uml
parameter_info param[4]; // information about parameters
};
- // a single UML instructon is encoded like this
+ // a single UML instruction is encoded like this
class instruction
{
public:
diff --git a/src/devices/cpu/z180/z180ops.h b/src/devices/cpu/z180/z180ops.h
index 3e2139fa51c..952685c0f8a 100644
--- a/src/devices/cpu/z180/z180ops.h
+++ b/src/devices/cpu/z180/z180ops.h
@@ -35,7 +35,7 @@
else m_iospace->write_byte(port,value)
/***************************************************************
- * MMU calculate the memory managemant lookup table
+ * MMU calculate the memory management lookup table
* bb and cb specify a 4K page
* If the 4 most significant bits of an 16 bit address are
* greater or equal to the bank base, the bank base register
@@ -126,7 +126,7 @@ uint32_t z180_device::ARG16()
}
/***************************************************************
- * Calculate the effective addess m_ea of an opcode using
+ * Calculate the effective address m_ea of an opcode using
* IX+offset resp. IY+offset addressing.
***************************************************************/
#define EAX() m_ea = (uint32_t)(uint16_t)(_IX + (int8_t)ARG())
diff --git a/src/devices/cpu/z80/kl5c80a12.cpp b/src/devices/cpu/z80/kl5c80a12.cpp
index 1fa24b2365a..954a6933aa9 100644
--- a/src/devices/cpu/z80/kl5c80a12.cpp
+++ b/src/devices/cpu/z80/kl5c80a12.cpp
@@ -6,7 +6,7 @@
KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
- Timers / Counters, Parrallel / Serial ports/ MMU, Interrupt Controller
+ Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
(is this different enough to need it's own core?)
(todo: everything, some code currently lives in machine/hng64_net.c but not much)
diff --git a/src/devices/cpu/z80/kl5c80a12.h b/src/devices/cpu/z80/kl5c80a12.h
index 8ca3aadc146..534dbfa9e7f 100644
--- a/src/devices/cpu/z80/kl5c80a12.h
+++ b/src/devices/cpu/z80/kl5c80a12.h
@@ -6,7 +6,7 @@
KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
- Timers / Counters, Parrallel / Serial ports/ MMU, Interrupt Controller
+ Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
(is this different enough to need it's own core?)
(todo: everything, some code currently lives in machine/hng64_net.c but not much)
diff --git a/src/devices/machine/6821pia.h b/src/devices/machine/6821pia.h
index 6eafbe75645..7ba00c0a770 100644
--- a/src/devices/machine/6821pia.h
+++ b/src/devices/machine/6821pia.h
@@ -6,7 +6,7 @@
Notes:
* get_port_b_z_mask() gives the caller the bitmask that shows
- which bits are high-impendance when reading port B, and thus
+ which bits are high-impedance when reading port B, and thus
neither 0 or 1. get_output_cb2_z() returns the same info
for the CB2 pin.
* set_port_a_z_mask allows the input callback to indicate
diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp
index dc8ff6c5629..5cbddd47df2 100644
--- a/src/devices/machine/68230pit.cpp
+++ b/src/devices/machine/68230pit.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Joakim Larsson Edstrom
/**********************************************************************
*
-* Motorola MC68230 PI/T Parallell Interface and Timer
+* Motorola MC68230 PI/T Parallel Interface and Timer
*
* PORT MODES INCLUDE :
* - BIT I/O
diff --git a/src/devices/machine/68230pit.h b/src/devices/machine/68230pit.h
index 556ac56fa16..0fe41d1a68f 100644
--- a/src/devices/machine/68230pit.h
+++ b/src/devices/machine/68230pit.h
@@ -2,7 +2,7 @@
// copyright-holders:Joakim Larsson Edstr??m
/**********************************************************************
*
-* Motorola MC68230 PI/T Parallell Interface and Timer
+* Motorola MC68230 PI/T Parallel Interface and Timer
*
* _____ _____
* D5 1 |* \_/ | 48 D4
diff --git a/src/devices/machine/corvushd.h b/src/devices/machine/corvushd.h
index a85ffdbb9fe..1008e8eb9dc 100644
--- a/src/devices/machine/corvushd.h
+++ b/src/devices/machine/corvushd.h
@@ -202,7 +202,7 @@ private:
// Sector addressing scheme for Rev B/H drives used in various commands (Called a DADR in the docs)
struct dadr_t {
- uint8_t address_msn_and_drive;// Most significant nibble: Most signficant nibble of sector address, Least significant nibble: Drive #
+ uint8_t address_msn_and_drive;// Most significant nibble: Most significant nibble of sector address, Least significant nibble: Drive #
uint8_t address_lsb; // Least significant byte of sector address
uint8_t address_mid; // Middle byte of sector address
};
diff --git a/src/devices/machine/cs4031.cpp b/src/devices/machine/cs4031.cpp
index d2c9286fffa..e6aaddeac85 100644
--- a/src/devices/machine/cs4031.cpp
+++ b/src/devices/machine/cs4031.cpp
@@ -272,7 +272,7 @@ void cs4031_device::device_start()
if (ram_size > 0x100000)
m_space->install_ram(0x100000, ram_size - 1, m_ram + 0x100000);
- // install bios rom at cpu inital pc
+ // install bios rom at cpu initial pc
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
// install i/o accesses
diff --git a/src/devices/machine/hdc92x4.cpp b/src/devices/machine/hdc92x4.cpp
index 0cc0aa32934..e5473bb5ae5 100644
--- a/src/devices/machine/hdc92x4.cpp
+++ b/src/devices/machine/hdc92x4.cpp
@@ -4664,7 +4664,7 @@ void hdc92x4_device::dma_address_out(uint8_t addrub, uint8_t addrhb, uint8_t add
/*
Set/clear INT
- Interupts are generated in the following occasions:
+ Interrupts are generated in the following occasions:
- when the DONE bit is set to 1 in the ISR and ST_DONE is set to 1
- when the READY_CHANGE bit is set to 1 in the ISR and ST_RDYCHNG is set to 1
(ready change: 1->0 or 0->1)
diff --git a/src/devices/machine/hdc92x4.h b/src/devices/machine/hdc92x4.h
index ae3601d5846..30ab993ef49 100644
--- a/src/devices/machine/hdc92x4.h
+++ b/src/devices/machine/hdc92x4.h
@@ -81,7 +81,7 @@ class hdc92x4_device : public device_t
public:
hdc92x4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
- // Accesors from the CPU side
+ // Accessors from the CPU side
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( reset );
diff --git a/src/devices/machine/mc6854.h b/src/devices/machine/mc6854.h
index 7f6c3ef9fc3..9e3e9d64f85 100644
--- a/src/devices/machine/mc6854.h
+++ b/src/devices/machine/mc6854.h
@@ -151,7 +151,7 @@ extern const device_type MC6854;
It passes bytes directly from one end to the other without bothering with
the actual bit-encoding, synchronization, and CRC.
Once completed, a frame is sent through out_frame. Aborted frames are not
- transmitted at all. No start flag, stop flag, or crc bits are trasmitted.
+ transmitted at all. No start flag, stop flag, or crc bits are transmitted.
send_frame makes a frame available to the CPU through the 6854 (it may
fail and return -1 if the 6854 is not ready to accept the frame; even
if the frame is accepted and 0 is returned, the CPU may abort it). Ony
diff --git a/src/devices/machine/roc10937.h b/src/devices/machine/roc10937.h
index 5a0b19bc5a3..da1b5799438 100644
--- a/src/devices/machine/roc10937.h
+++ b/src/devices/machine/roc10937.h
@@ -2,7 +2,7 @@
// copyright-holders:James Wallace
/**********************************************************************
- Rockwell 10937/10957 interface and simlar chips
+ Rockwell 10937/10957 interface and similar chips
Emulation by J.Wallace
OKI MSC1937 is a clone of this chip, with many others.
diff --git a/src/devices/machine/scnxx562.cpp b/src/devices/machine/scnxx562.cpp
index de4ae89663c..4c7e52e5594 100644
--- a/src/devices/machine/scnxx562.cpp
+++ b/src/devices/machine/scnxx562.cpp
@@ -526,7 +526,7 @@ void duscc_device::trigger_interrupt(int index, int state)
m_int_state[priority_level] |= Z80_DAISY_INT;
LOGINT((" - Interrupt Priority Level %d, caused by Source %02x with vector %02x\n",priority_level, source, m_ivrm ));
- // check for interupts
+ // check for interrupts
check_interrupts();
}
diff --git a/src/devices/machine/stvcd.cpp b/src/devices/machine/stvcd.cpp
index 7b6ac1f4bd5..0d19577524b 100644
--- a/src/devices/machine/stvcd.cpp
+++ b/src/devices/machine/stvcd.cpp
@@ -267,7 +267,7 @@ void saturn_state::cd_exec_command( void )
break;
case 0x06: // end data transfer (TODO: needs to be worked on!)
- // returns # of bytes transfered (24 bits) in
+ // returns # of bytes transferred (24 bits) in
// low byte of cr1 (MSB) and cr2 (middle byte, LSB)
CDROM_LOG(("%s:CD: End data transfer (%d bytes xfer'd)\n", machine().describe_context(), xferdnum))
diff --git a/src/devices/machine/wd7600.cpp b/src/devices/machine/wd7600.cpp
index 8d60250dff1..2b2ee4d847c 100644
--- a/src/devices/machine/wd7600.cpp
+++ b/src/devices/machine/wd7600.cpp
@@ -168,7 +168,7 @@ void wd7600_device::device_start()
//m_space->install_rom(0x000c0000, 0x000cffff, m_bios);
m_space->install_rom(0x000c0000, 0x000cffff, m_isa);
- // install BIOS ROM at cpu inital pc
+ // install BIOS ROM at cpu initial pc
m_space->install_rom(0x000f0000, 0x000fffff, m_bios + 0x10000);
if(m_space->addrmask() == 0xffffffff) // 32-bit address space only
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0x10000);
diff --git a/src/devices/machine/wd_fdc.h b/src/devices/machine/wd_fdc.h
index 3987fb89ea7..9d792f33a4f 100644
--- a/src/devices/machine/wd_fdc.h
+++ b/src/devices/machine/wd_fdc.h
@@ -239,11 +239,11 @@ private:
//
// In the first case, it must first switch to a waiting
// sub-state, then return. The waiting sub-state must just
- // return immediatly when *_continue is called. Eventually the
+ // return immediately when *_continue is called. Eventually the
// event handler function will advance the state machine to
// another sub-state, and things will continue synchronously.
//
- // On command end it's also supposed to return immediatly.
+ // On command end it's also supposed to return immediately.
//
// The last option is to switch to the next sub-state, start a
// live state with live_start() then return. The next sub-state
diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp
index 51e92d27a55..21debec0ec9 100644
--- a/src/devices/machine/z80scc.cpp
+++ b/src/devices/machine/z80scc.cpp
@@ -1133,7 +1133,7 @@ void z80scc_channel::tra_complete()
{
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
}
- else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots availble
+ else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots available
{
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
}
@@ -2437,7 +2437,7 @@ void z80scc_channel::data_write(uint8_t data)
{
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
}
- else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots availble
+ else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots available
{
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
}
diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h
index c2b0f81a68d..41a5c257de7 100644
--- a/src/devices/machine/z80scc.h
+++ b/src/devices/machine/z80scc.h
@@ -677,7 +677,7 @@ public:
DECLARE_READ8_MEMBER( ba_cd_inv_r );
DECLARE_WRITE8_MEMBER( ba_cd_inv_w );
- /* Definitions moved to z80scc.c for enhencements */
+ /* Definitions moved to z80scc.c for enhancements */
DECLARE_READ8_MEMBER( da_r ); // { return m_chanA->data_read(); }
DECLARE_WRITE8_MEMBER( da_w ); // { m_chanA->data_write(data); }
DECLARE_READ8_MEMBER( db_r ); // { return m_chanB->data_read(); }
diff --git a/src/devices/sound/315-5641.h b/src/devices/sound/315-5641.h
index e92d8fe5875..b26328629fa 100644
--- a/src/devices/sound/315-5641.h
+++ b/src/devices/sound/315-5641.h
@@ -3,7 +3,7 @@
/* Sega 315-5641 / D77591 / 9442CA010 */
// this is the PICO sound chip, we are not sure if it's the same as a 7759 or not, it requires FIFO logic
-// which the 7759 does _not_ have but it is possible that is handled somewhere else on the PICO hardawre.
+// which the 7759 does _not_ have but it is possible that is handled somewhere else on the PICO hardware.
#include "upd7759.h"
diff --git a/src/devices/sound/beep.h b/src/devices/sound/beep.h
index d8edefa834a..fe946cd0d2f 100644
--- a/src/devices/sound/beep.h
+++ b/src/devices/sound/beep.h
@@ -32,7 +32,7 @@ public:
private:
sound_stream *m_stream; /* stream number */
int m_enable; /* enable beep */
- int m_frequency; /* set frequency - this can be changed using the appropiate function */
+ int m_frequency; /* set frequency - this can be changed using the appropriate function */
int m_incr; /* initial wave state */
int16_t m_signal; /* current signal */
};
diff --git a/src/devices/sound/disc_wav.h b/src/devices/sound/disc_wav.h
index 37f00626dfa..c9d6ea36a6c 100644
--- a/src/devices/sound/disc_wav.h
+++ b/src/devices/sound/disc_wav.h
@@ -113,7 +113,7 @@ public:
double vInFall; // voltage that triggers the gate input to go low (0V) on fall
double vInRise; // voltage that triggers the gate input to go high (vGate) on rise
double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0;
- int options; // bitmaped options
+ int options; // bitmapped options
};
enum {
IS_TYPE1 = 0x00,
diff --git a/src/devices/sound/discrete.h b/src/devices/sound/discrete.h
index 8c33fcd82c9..3cf24dbb712 100644
--- a/src/devices/sound/discrete.h
+++ b/src/devices/sound/discrete.h
@@ -378,7 +378,7 @@
***********************************************************************
*
* DISCRETE_CONSTANT - Single output, fixed at compile time.
- * This is usefull as a placeholder for
+ * This is useful as a placeholder for
* incomplete circuits.
*
* .----------.
@@ -446,7 +446,7 @@
* it if needed.
* If you need to access a stream from a discrete task, the stream node
* must be part of that task. If a given stream is used in two tasks or
- * a task and the main task, you must declare two stream nodes acccessing the
+ * a task and the main task, you must declare two stream nodes accessing the
* same stream input NUM.
*
* EXAMPLES: see scramble, frogger
@@ -479,7 +479,7 @@
* types above if needed, or use separately with 7492.
* DISC_OUT_IS_ENERGY - This will uses the x_time to
* anti-alias the count. Might be
- * usefull if not connected to other
+ * useful if not connected to other
* modules.
* DISC_OUT_HAS_XTIME - This will generate x_time if
* being used with DISC_CLK_IS_FREQ.
@@ -513,7 +513,7 @@
***********************************************************************
*
* DISCRETE_LFSR_NOISE - Noise waveform generator node, generates
- * psuedo random digital stream at the requested
+ * pseudo random digital stream at the requested
* clock frequency.
*
* Declaration syntax
@@ -767,7 +767,7 @@
*
***********************************************************************
*
- * DISCRETE_TRIANGLEW - Triagular waveform generator, generates
+ * DISCRETE_TRIANGLEW - Triangular waveform generator, generates
* equal ramp up/down at chosen frequency
*
* .------------.
@@ -1148,7 +1148,7 @@
* vInRise voltage that triggers the gate input to go high (vGate) on rise
* vInFall voltage that triggers the gate input to go low (0V) on fall
* clamp internal diode clamp: [-clamp ... vb+clamp] if clamp>= 0
- * options bitmaped options
+ * options bitmapped options
*
* There is a macro DEFAULT_CD40XX_VALUES(_vB) which may be used to initialize the
* structure with .... = { 5, DEFAULT_CD40XX_VALUES(5), DISC_OSC_INVERTER_IS_TYPE1}
@@ -1602,7 +1602,7 @@
* DISC_OUT_ACTIVE_HIGH 0x00 - output active high (DEFAULT)
*
* NOTE: A width of 0 seconds will output a pulse of 1 sample.
- * This is useful for a guaranteed minimun pulse, regardless
+ * This is useful for a guaranteed minimum pulse, regardless
* of the sample rate.
*
* EXAMPLES: see Polaris
@@ -1805,7 +1805,7 @@
=======================================================================
***********************************************************************
*
- * DISCRETE_COMP_ADDER - Selecatable parallel component adder.
+ * DISCRETE_COMP_ADDER - Selectable parallel component adder.
* The total netlist out will be the parallel sum of all
* components with their corresponding data bit = 1.
* Set cDefault to 0 if not used.
@@ -1906,7 +1906,7 @@
*
* v_junction table can be set to nullptr if you want all diodes to
* default to a 0.5V drop. Otherwise use a
- * table of doubles to specify juntion voltages.
+ * table of doubles to specify junction voltages.
*
* EXAMPLES: see dkong
*
@@ -2202,7 +2202,7 @@
* When the output of the function is 0, then the connection is held at 0V or gnd.
* When the output of the function is 1, then the function is an open circuit.
*
- * DISC_OP_AMP_TRIGGER_FUNCTION_NONE - Not used, cicuit open.
+ * DISC_OP_AMP_TRIGGER_FUNCTION_NONE - Not used, circuit open.
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG0 - Gnd when trigger 0 is 0.
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG0_INV - Gnd when trigger 0 is 1.
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG1 - Gnd when trigger 1 is 0.
@@ -2773,7 +2773,7 @@
* DISCRETE_RCDISC5(NODE_11,NODE_10,10,100,CAP_U(1))
*
* When enabled by NODE_10, C discharges from 10v as indicated by RC
- * of 100R & 1uF. If not enabled, the capcitors keeps it load and may
+ * of 100R & 1uF. If not enabled, the capacitors keeps it load and may
* still be charged through input1. The switch is assumed to be a CD4066,
* thus if not enabled the output will be drawn by R to GND since
* the switch is in high impedance mode.
@@ -3028,8 +3028,8 @@
* rate, then the output may change state more then once
* during the sample. Using this flag will cause
* the output to be the number of falling edges that
- * happened during the sample. This is usefull to feed
- * to counter circuits. The Output Type flag is ingnored
+ * happened during the sample. This is useful to feed
+ * to counter circuits. The Output Type flag is ignored
* when this flag is used.
* DISC_555_OUT_COUNT_R - Same as DISC_555_OUT_COUNT_F but with rising edges.
* DISC_555_OUT_ENERGY - Same SQW, but will help reduce aliasing effects.
@@ -3184,7 +3184,7 @@
* v_pos; - B+ voltage of 555
* v_cc_source; - Voltage of the Constant Current source
* v_out_high; - High output voltage of 555 (Defaults to v_pos - 1.2V)
- * v_cc_junction; - The voltage drop of the Constant Current source transitor
+ * v_cc_junction; - The voltage drop of the Constant Current source transistor
* (0 if Op Amp)
* }
*
@@ -3303,7 +3303,7 @@
*
* Waveform Types:
* DISC_566_OUT_SQUARE - Pin 3 Square Wave Output (DEFAULT)
- * DISC_566_OUT_ENERGY - Pin 3 anti-alaised Square Wave Output
+ * DISC_566_OUT_ENERGY - Pin 3 anti-aliased Square Wave Output
* DISC_566_OUT_TRIANGLE - Pin 4 Triangle Wave Output
* DISC_566_OUT_LOGIC - Internal Flip/Flop Output
* DISC_566_COUNT_F - # of falling edges
@@ -3636,7 +3636,7 @@ enum
#define DISC_OP_AMP_FILTER_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
-/* Sallen-Key filter Opions */
+/* Sallen-Key filter Options */
#define DISC_SALLEN_KEY_LOW_PASS 0x01
#define DISC_SALLEN_KEY_HIGH_PASS 0x02
@@ -3700,7 +3700,7 @@ enum
#define DISC_566_OUT_AC 0x10
#define DISC_566_OUT_SQUARE 0x00 /* Squarewave */
-#define DISC_566_OUT_ENERGY 0x01 /* anti-alaised Squarewave */
+#define DISC_566_OUT_ENERGY 0x01 /* anti-aliased Squarewave */
#define DISC_566_OUT_TRIANGLE 0x02 /* Triangle waveform */
#define DISC_566_OUT_LOGIC 0x03 /* 0/1 logic output */
#define DISC_566_OUT_COUNT_F 0x04
@@ -3882,16 +3882,16 @@ struct discrete_schmitt_osc_desc
double trshRise; // voltage that triggers the gate input to go high (vGate) on rise
double trshFall; // voltage that triggers the gate input to go low (0V) on fall
double vGate; // the output high voltage of the gate that gets fedback through rFeedback
- int options; // bitmaped options
+ int options; // bitmapped options
};
struct discrete_comp_adder_table
{
int type;
- double cDefault; // Default componet. 0 if not used.
+ double cDefault; // Default component. 0 if not used.
int length;
- double c[DISC_LADDER_MAXRES]; // Componet table
+ double c[DISC_LADDER_MAXRES]; // Component table
};
@@ -4031,7 +4031,7 @@ struct discrete_555_cc_desc
double v_pos; /* B+ voltage of 555 */
double v_cc_source; /* Voltage of the Constant Current source */
double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
- double v_cc_junction; /* The voltage drop of the Constant Current source transitor (0 if Op Amp) */
+ double v_cc_junction; /* The voltage drop of the Constant Current source transistor (0 if Op Amp) */
};
diff --git a/src/devices/sound/es1373.h b/src/devices/sound/es1373.h
index f1f0ca8e8d8..615a63c3fc2 100644
--- a/src/devices/sound/es1373.h
+++ b/src/devices/sound/es1373.h
@@ -87,8 +87,8 @@ struct chan_info {
uint32_t buf_rptr; // Address to sample cache memory
uint16_t buf_count; // Number of samples that have been played
uint16_t buf_size; // Number of samples minus one to play
- uint32_t pci_addr; // PCI Addresss for system memory accesses
- uint16_t pci_count; // Number of 32 bits transfered
+ uint32_t pci_addr; // PCI Address for system memory accesses
+ uint16_t pci_count; // Number of 32 bits transferred
uint16_t pci_size; // Total number of words (32 bits) minus one in system memory
};
diff --git a/src/devices/sound/fm.cpp b/src/devices/sound/fm.cpp
index d5ecc730f27..e9910028bb6 100644
--- a/src/devices/sound/fm.cpp
+++ b/src/devices/sound/fm.cpp
@@ -643,7 +643,7 @@ struct FM_OPN
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
+ uint32_t eg_timer_overflow;/* envelope generator timer overflows every 3 samples (on real chip) */
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
@@ -2982,7 +2982,7 @@ void * ym2608_init(void *param, device_t *device, int clock, int rate,
F2608->deltaT.status_change_which_chip = F2608;
F2608->deltaT.status_change_EOS_bit = 0x04; /* status flag: set bit2 on End Of Sample */
F2608->deltaT.status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY */
- F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 miliseconds while recording the ADPCM */
+ F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 milliseconds while recording the ADPCM */
/* ADPCM Rhythm */
F2608->pcmbuf = device->memregion("ym2608")->base();
diff --git a/src/devices/sound/fm.h b/src/devices/sound/fm.h
index 8db59a3642f..f5be86ad8a1 100644
--- a/src/devices/sound/fm.h
+++ b/src/devices/sound/fm.h
@@ -25,7 +25,7 @@
#define FM_INTERNAL_TIMER 0
/* --- speedup optimize --- */
-/* busy flag enulation , The definition of FM_GET_TIME_NOW() is necessary. */
+/* busy flag emulation , The definition of FM_GET_TIME_NOW() is necessary. */
#define FM_BUSY_FLAG_SUPPORT 1
/* --- external SSG(YM2149/AY-3-8910)emulator interface port */
@@ -38,7 +38,7 @@ struct ssg_callbacks
void (*reset)(void *param);
};
-/* --- external callback funstions for realtime update --- */
+/* --- external callback functions for realtime update --- */
#if FM_BUSY_FLAG_SUPPORT
#define TIME_TYPE attotime
diff --git a/src/devices/sound/fm2612.cpp b/src/devices/sound/fm2612.cpp
index f9b2e133904..026cbbf7cd1 100644
--- a/src/devices/sound/fm2612.cpp
+++ b/src/devices/sound/fm2612.cpp
@@ -660,7 +660,7 @@ struct fm2612_FM_OPN
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/144/3 */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
+ uint32_t eg_timer_overflow;/* envelope generator timer overflows every 3 samples (on real chip) */
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
diff --git a/src/devices/sound/fmopl.cpp b/src/devices/sound/fmopl.cpp
index d113a8ddec5..fe4d80a1bc6 100644
--- a/src/devices/sound/fmopl.cpp
+++ b/src/devices/sound/fmopl.cpp
@@ -255,7 +255,7 @@ struct FM_OPL
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
uint8_t rhythm; /* Rhythm mode */
diff --git a/src/devices/sound/k054539.h b/src/devices/sound/k054539.h
index 85b5d3b0d82..11991e1155b 100644
--- a/src/devices/sound/k054539.h
+++ b/src/devices/sound/k054539.h
@@ -59,7 +59,7 @@ public:
Note that the eight PCM channels of a K054539 do not have separate
volume controls. Considering the global attenuation equation may not
be entirely accurate, k054539_set_gain() provides means to control
- channel gain. It can be called anywhere but preferrably from
+ channel gain. It can be called anywhere but preferably from
DRIVER_INIT().
Parameters:
diff --git a/src/devices/sound/mea8000.h b/src/devices/sound/mea8000.h
index ec468a309fb..82723bbf5c7 100644
--- a/src/devices/sound/mea8000.h
+++ b/src/devices/sound/mea8000.h
@@ -27,7 +27,7 @@
#define NOISE_LEN 8192
-/* finite machine state controling frames */
+/* finite machine state controlling frames */
enum mea8000_state
{
MEA8000_STOPPED, /* nothing to do, timer disabled */
diff --git a/src/devices/sound/msm5205.h b/src/devices/sound/msm5205.h
index f45b4a67a99..edf38744227 100644
--- a/src/devices/sound/msm5205.h
+++ b/src/devices/sound/msm5205.h
@@ -58,7 +58,7 @@ public:
// if VCLK and reset or data is changed at the same time,
// call vclk_w after data_w and reset_w.
void vclk_w(int vclk);
- // option , selected pin seletor
+ // option , selected pin selector
void playmode_w(int select);
void change_clock_w(int32_t clock);
diff --git a/src/devices/sound/msm5232.cpp b/src/devices/sound/msm5232.cpp
index bae848d5414..7ffd927c055 100644
--- a/src/devices/sound/msm5232.cpp
+++ b/src/devices/sound/msm5232.cpp
@@ -249,7 +249,7 @@ void msm5232_device::init_tables()
#if 0
{
- /* rate tables (in miliseconds) */
+ /* rate tables (in milliseconds) */
static const int ATBL[8] = { 2,4,8,16, 32,64, 32,64};
static const int DTBL[16]= { 40,80,160,320, 640,1280, 640,1280,
333,500,1000,2000, 4000,8000, 4000,8000};
diff --git a/src/devices/sound/nes_apu.cpp b/src/devices/sound/nes_apu.cpp
index 3c5004ea2b3..39d8d32613d 100644
--- a/src/devices/sound/nes_apu.cpp
+++ b/src/devices/sound/nes_apu.cpp
@@ -9,7 +9,7 @@
Who Wants to Know? (wwtk@mail.com)
This core is written with the advise and consent of Matthew Conte and is
- released under the GNU Public License. This core is freely avaiable for
+ released under the GNU Public License. This core is freely available for
use in any freeware project, subject to the following terms:
Any modifications to this code must be duly noted in the source and
diff --git a/src/devices/sound/nes_apu.h b/src/devices/sound/nes_apu.h
index 62e07499646..067f98deffd 100644
--- a/src/devices/sound/nes_apu.h
+++ b/src/devices/sound/nes_apu.h
@@ -9,7 +9,7 @@
Who Wants to Know? (wwtk@mail.com)
This core is written with the advise and consent of Matthew Conte and is
- released under the GNU Public License. This core is freely avaiable for
+ released under the GNU Public License. This core is freely available for
use in any freeware project, subject to the following terms:
Any modifications to this code must be duly noted in the source and
diff --git a/src/devices/sound/nes_defs.h b/src/devices/sound/nes_defs.h
index 71614b31cd6..29a9de4c016 100644
--- a/src/devices/sound/nes_defs.h
+++ b/src/devices/sound/nes_defs.h
@@ -9,7 +9,7 @@
Who Wants to Know? (wwtk@mail.com)
This core is written with the advise and consent of Matthew Conte and is
- released under the GNU Public License. This core is freely avaiable for
+ released under the GNU Public License. This core is freely available for
use in any freeware project, subject to the following terms:
Any modifications to this code must be duly noted in the source and
diff --git a/src/devices/sound/pokey.cpp b/src/devices/sound/pokey.cpp
index f7907d04531..bbbe51707d8 100644
--- a/src/devices/sound/pokey.cpp
+++ b/src/devices/sound/pokey.cpp
@@ -7,14 +7,14 @@
* Based on original info found in Ron Fries' Pokey emulator,
* with additions by Brad Oliver, Eric Smith and Juergen Buchmueller,
* paddle (a/d conversion) details from the Atari 400/800 Hardware Manual.
- * Polynome algorithms according to info supplied by Perry McFarlane.
+ * Polynomial algorithms according to info supplied by Perry McFarlane.
*
* 4.6:
* [1] http://ploguechipsounds.blogspot.de/2009/10/how-i-recorded-and-decoded-pokeys.html
* - changed audio emulation to emulate borrow 3 clock delay and
* proper channel reset. New frequency only becomes effective
* after the counter hits 0. Emulation also treats counters
- * as 8 bit counters which are linked now instead of monolytic
+ * as 8 bit counters which are linked now instead of monolithic
* 16 bit counters.
*
* 4.51:
@@ -28,7 +28,7 @@
* new RNG give this expected result now, bits #0-7 of the 9 bit poly.
* - reading the RNG returns the shift register contents ^ 0xff.
* That way resetting the Pokey with SKCTL (which resets the
- * polynome shifters to 0) returns the expected 0xff value.
+ * polynomial shifters to 0) returns the expected 0xff value.
* 4.4:
* - reversed sample values to make OFF channels produce a zero signal.
* actually de-reversed them; don't remember that I reversed them ;-/
diff --git a/src/devices/sound/pokey.h b/src/devices/sound/pokey.h
index 45d33b62e8d..5918bec7829 100644
--- a/src/devices/sound/pokey.h
+++ b/src/devices/sound/pokey.h
@@ -7,7 +7,7 @@
* Based on original info found in Ron Fries' Pokey emulator,
* with additions by Brad Oliver, Eric Smith and Juergen Buchmueller.
* paddle (a/d conversion) details from the Atari 400/800 Hardware Manual.
- * Polynome algorithms according to info supplied by Perry McFarlane.
+ * Polynomial algorithms according to info supplied by Perry McFarlane.
*
*****************************************************************************/
diff --git a/src/devices/sound/s14001a.h b/src/devices/sound/s14001a.h
index 1b1c8e1eda9..f73840102d9 100644
--- a/src/devices/sound/s14001a.h
+++ b/src/devices/sound/s14001a.h
@@ -120,7 +120,7 @@ private:
// input pins
bool m_bStart;
- uint8_t m_uWord; // 6 bit word noumber to be spoken
+ uint8_t m_uWord; // 6 bit word number to be spoken
// emulator variables
// statistics
diff --git a/src/devices/sound/saa1099.h b/src/devices/sound/saa1099.h
index b14e7142440..58b29c58989 100644
--- a/src/devices/sound/saa1099.h
+++ b/src/devices/sound/saa1099.h
@@ -61,7 +61,7 @@ struct saa1099_noise
/* vars to simulate the noise generator output */
double counter;
double freq;
- int level; /* noise polynomal shifter */
+ int level; /* noise polynomial shifter */
};
diff --git a/src/devices/sound/tms36xx.h b/src/devices/sound/tms36xx.h
index 21a1365b150..07b15cb45a4 100644
--- a/src/devices/sound/tms36xx.h
+++ b/src/devices/sound/tms36xx.h
@@ -124,7 +124,7 @@ private:
int m_counter[12]; // tone frequency counter
int m_frequency[12]; // tone frequency
int m_output; // output signal bits
- int m_enable; // mask which harmoics
+ int m_enable; // mask which harmonics
int m_tune_num; // tune currently playing
int m_tune_ofs; // note currently playing
diff --git a/src/devices/sound/tms5110.h b/src/devices/sound/tms5110.h
index ac7ec87d1d4..569b943a575 100644
--- a/src/devices/sound/tms5110.h
+++ b/src/devices/sound/tms5110.h
@@ -16,7 +16,7 @@
#define TMS5110_CMD_RESET (0) /* 0 0 0 x | 1 */
#define TMS5110_CMD_LOAD_ADDRESS (2) /* 0 0 1 x | 2 */
#define TMS5110_CMD_OUTPUT (4) /* 0 1 0 x | 3 */
-#define TMS5110_CMD_SPKSLOW (6) /* 0 1 1 x | 1 | Note: this command is undocumented on the datasheets, it only appears on the patents. It might not actually work properly on some of the real chips as manufactured. Acts the same as CMD_SPEAK, but makes the interpolator take three A cycles whereever it would normally only take one, effectively making speech of any given word take twice as long as normal. */
+#define TMS5110_CMD_SPKSLOW (6) /* 0 1 1 x | 1 | Note: this command is undocumented on the datasheets, it only appears on the patents. It might not actually work properly on some of the real chips as manufactured. Acts the same as CMD_SPEAK, but makes the interpolator take three A cycles wherever it would normally only take one, effectively making speech of any given word take twice as long as normal. */
#define TMS5110_CMD_READ_BIT (8) /* 1 0 0 x | 1 */
#define TMS5110_CMD_SPEAK (10) /* 1 0 1 x | 1 */
#define TMS5110_CMD_READ_BRANCH (12) /* 1 1 0 x | 1 */
diff --git a/src/devices/sound/vlm5030.h b/src/devices/sound/vlm5030.h
index a1f41e03434..88bbcc19f98 100644
--- a/src/devices/sound/vlm5030.h
+++ b/src/devices/sound/vlm5030.h
@@ -60,7 +60,7 @@ private:
uint8_t m_parameter;
uint8_t m_phase;
- /* state of option paramter */
+ /* state of option parameter */
int m_frame_size;
int m_pitch_offset;
uint8_t m_interp_step;
diff --git a/src/devices/sound/ym2151.h b/src/devices/sound/ym2151.h
index 960a906d2d0..0858a01abb9 100644
--- a/src/devices/sound/ym2151.h
+++ b/src/devices/sound/ym2151.h
@@ -187,7 +187,7 @@ private:
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 3 samples (on real chip) */
+ uint32_t eg_timer_overflow; /* envelope generator timer overflows every 3 samples (on real chip) */
uint32_t lfo_phase; /* accumulated LFO phase (0 to 255) */
uint32_t lfo_timer; /* LFO timer */
diff --git a/src/devices/sound/ym2413.h b/src/devices/sound/ym2413.h
index 33f72db1ef8..aac803e46bc 100644
--- a/src/devices/sound/ym2413.h
+++ b/src/devices/sound/ym2413.h
@@ -130,7 +130,7 @@ private:
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
uint8_t rhythm; /* Rhythm mode */
diff --git a/src/devices/sound/ymdeltat.h b/src/devices/sound/ymdeltat.h
index 10c3df7c52e..364ef4d4fe6 100644
--- a/src/devices/sound/ymdeltat.h
+++ b/src/devices/sound/ymdeltat.h
@@ -15,7 +15,7 @@ typedef void (*STATUS_CHANGE_HANDLER)(void *chip, uint8_t status_bits);
/* DELTA-T (adpcm type B) struct */
-struct YM_DELTAT { /* AT: rearranged and tigntened structure */
+struct YM_DELTAT { /* AT: rearranged and tightened structure */
uint8_t *memory;
int32_t *output_pointer;/* pointer of output pointers */
int32_t *pan; /* pan : &output_pointer[pan] */
@@ -27,7 +27,7 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
uint32_t memory_size;
int output_range;
uint32_t now_addr; /* current address */
- uint32_t now_step; /* currect step */
+ uint32_t now_step; /* correct step */
uint32_t step; /* step */
uint32_t start; /* start address */
uint32_t limit; /* limit address */
@@ -62,7 +62,7 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
void * status_change_which_chip; /* this chip id */
uint8_t status_change_EOS_bit; /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/
uint8_t status_change_BRDY_bit; /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */
- uint8_t status_change_ZERO_bit; /* 1 if silence lasts for more than 290 miliseconds on ADPCM recording */
+ uint8_t status_change_ZERO_bit; /* 1 if silence lasts for more than 290 milliseconds on ADPCM recording */
/* neither Y8950 nor YM2608 can generate IRQ when PCMBSY bit changes, so instead of above,
** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608)
diff --git a/src/devices/sound/ymf262.cpp b/src/devices/sound/ymf262.cpp
index c5829f69850..05af102bd85 100644
--- a/src/devices/sound/ymf262.cpp
+++ b/src/devices/sound/ymf262.cpp
@@ -228,7 +228,7 @@ struct OPL3
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=8*36) */
uint32_t eg_timer_add; /* step of eg_timer */
- uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
uint32_t fn_tab[1024]; /* fnumber->increment counter */
diff --git a/src/devices/video/crtc_ega.h b/src/devices/video/crtc_ega.h
index b5a3dbd7480..f65e949d0f6 100644
--- a/src/devices/video/crtc_ega.h
+++ b/src/devices/video/crtc_ega.h
@@ -100,7 +100,7 @@ public:
void set_hpixels_per_column(int hpixels_per_column);
/* updates the screen -- this will call begin_update(), */
- /* followed by update_row() reapeatedly and after all row */
+ /* followed by update_row() repeatedly and after all row */
/* updating is complete, end_update() */
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
diff --git a/src/devices/video/ef9345.h b/src/devices/video/ef9345.h
index 86d05e115c6..2945f9b8a5b 100644
--- a/src/devices/video/ef9345.h
+++ b/src/devices/video/ef9345.h
@@ -99,9 +99,9 @@ private:
uint8_t m_blink; //cursor status
uint8_t m_last_dial[40]; //last chars dial (for determinate the zoom position)
uint8_t m_latchc0; //background color latch
- uint8_t m_latchm; //hided atribute latch
- uint8_t m_latchi; //insert atribute latch
- uint8_t m_latchu; //underline atribute latch
+ uint8_t m_latchm; //hided attribute latch
+ uint8_t m_latchi; //insert attribute latch
+ uint8_t m_latchu; //underline attribute latch
bitmap_rgb32 m_screen_out;
diff --git a/src/devices/video/gb_lcd.h b/src/devices/video/gb_lcd.h
index 93c4ae7cabe..351178bf006 100644
--- a/src/devices/video/gb_lcd.h
+++ b/src/devices/video/gb_lcd.h
@@ -139,7 +139,7 @@ protected:
} sprite[10];
uint8_t sprite_delay_cycles;
// other internal data
- bool starting; // Inital fetches when (re)starting the rendering engine.
+ bool starting; // Initial fetches when (re)starting the rendering engine.
uint8_t sequence_counter;
bool drawing;
bool start_drawing;
diff --git a/src/devices/video/mc6847.h b/src/devices/video/mc6847.h
index 3a4bfdd3f67..1d408c5f560 100644
--- a/src/devices/video/mc6847.h
+++ b/src/devices/video/mc6847.h
@@ -202,7 +202,7 @@ protected:
}
};
- // artficater internal class
+ // artificater internal class
class artifacter
{
public:
@@ -522,7 +522,7 @@ public:
static void set_black_and_white(device_t &device, bool bw) { downcast<mc6847_base_device &>(device).m_black_and_white = bw; }
/* updates the screen -- this will call begin_update(),
- followed by update_row() reapeatedly and after all row
+ followed by update_row() repeatedly and after all row
updating is complete, end_update() */
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
diff --git a/src/devices/video/sprite.h b/src/devices/video/sprite.h
index 2b5b38d49d5..d17fdc13bb9 100644
--- a/src/devices/video/sprite.h
+++ b/src/devices/video/sprite.h
@@ -39,7 +39,7 @@ public:
sparse_dirty_bitmap(int granularity = 3);
sparse_dirty_bitmap(int width, int height, int granularity = 3);
- // dirtying operations - partially interecting tiles are dirtied
+ // dirtying operations - partially intersecting tiles are dirtied
void dirty(const rectangle &rect) { dirty(rect.left(), rect.right(), rect.top(), rect.bottom()); }
void dirty(int32_t left, int32_t right, int32_t top, int32_t bottom);
void dirty_all() { dirty(0, m_width - 1, 0, m_height - 1); }
diff --git a/src/devices/video/tms34061.cpp b/src/devices/video/tms34061.cpp
index 3c7aebcc357..768c7a01cda 100644
--- a/src/devices/video/tms34061.cpp
+++ b/src/devices/video/tms34061.cpp
@@ -487,7 +487,7 @@ uint8_t tms34061_device::read(address_space &space, int col, int row, int func)
result = xypixel_r(space, col);
break;
- /* funtion 3 maps to direct access */
+ /* function 3 maps to direct access */
case 3:
offs = ((row << m_rowshift) | col) & m_vrammask;
result = m_vram[offs];
diff --git a/src/devices/video/upd7220.cpp b/src/devices/video/upd7220.cpp
index 94f88c85769..32aa6ba4b18 100644
--- a/src/devices/video/upd7220.cpp
+++ b/src/devices/video/upd7220.cpp
@@ -641,7 +641,7 @@ upd7220_device::upd7220_device(const machine_config &mconfig, const char *tag, d
m_br(0),
m_ctop(0),
m_cbot(0),
- m_lr(0),
+ m_lr(1),
m_disp(0),
m_gchr(0),
m_bitmap_mod(0),
diff --git a/src/devices/video/vic4567.h b/src/devices/video/vic4567.h
index d44f89e61bb..53320386365 100644
--- a/src/devices/video/vic4567.h
+++ b/src/devices/video/vic4567.h
@@ -32,7 +32,7 @@ struct vic3_sprite
/* buffer for currently painted line */
int paintedline[8];
- uint8_t bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /*for simplier sprite collision detection*/];
+ uint8_t bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /*for simpler sprite collision detection*/];
};
diff --git a/src/devices/video/zeus2.h b/src/devices/video/zeus2.h
index 4415329c0a9..4d40f2f0882 100644
--- a/src/devices/video/zeus2.h
+++ b/src/devices/video/zeus2.h
@@ -215,13 +215,13 @@ public:
return addr;
}
- // Convert 0xRRRRCCCC to frame buffer addresss
+ // Convert 0xRRRRCCCC to frame buffer address
//inline uint32_t frame_addr_from_expanded_addr(uint32_t addr)
//{
// return (((addr & 0x3ff0000) >> (16 - 9 + 1)) | (addr & 0x1ff)) << 1;
//}
- // Convert Physical 0xRRRRCCCC to frame buffer addresss
+ // Convert Physical 0xRRRRCCCC to frame buffer address
// Based on address reg 51 (no scaling)
inline uint32_t frame_addr_from_phys_addr(uint32_t physAddr)
{
diff --git a/src/emu/devfind.h b/src/emu/devfind.h
index 094bb5a194c..d74799c5672 100644
--- a/src/emu/devfind.h
+++ b/src/emu/devfind.h
@@ -5,7 +5,7 @@
* Object auto-discovery helpers
* \defgroup devfind
* \{
- * Object auto-disovery helpers
+ * Object auto-discovery helpers
*/
#ifndef __EMU_H__
@@ -134,14 +134,14 @@ class finder_base
public:
/// \brief Destructor
///
- /// Destruction via base class pointer and dynmaic type behaviour
+ /// Destruction via base class pointer and dynamic type behaviour
/// are allowed.
virtual ~finder_base();
/// \brief Get next registered object discovery helper
///
/// Implementation of basic single-linked list behaviour.
- /// \return Pointer to the next registerd object discovery helper,
+ /// \return Pointer to the next registered object discovery helper,
/// or nullptr if this is the last.
finder_base *next() const { return m_next; }
@@ -203,7 +203,7 @@ protected:
/// \param [in] required Whether warning message should be printed
/// if a region with matching tag of incorrect width/length is
/// found.
- /// \return Base pointer of the memeroy region if a matching region
+ /// \return Base pointer of the memory region if a matching region
/// is found, or nullptr otherwise.
void *find_memregion(u8 width, size_t &length, bool required) const;
@@ -343,7 +343,7 @@ protected:
/// \brief Pointer to target object
///
/// Pointer to target object, or nullptr if resolution has not been
- /// attempted or the seach failed. Concrete derived classes must
+ /// attempted or the search failed. Concrete derived classes must
/// set this in their implementation of the findit member function.
ObjectClass *m_target;
};
diff --git a/src/emu/device.cpp b/src/emu/device.cpp
index 321c7b18390..a78e7173342 100644
--- a/src/emu/device.cpp
+++ b/src/emu/device.cpp
@@ -323,7 +323,7 @@ void device_t::set_machine(running_machine &machine)
}
//-------------------------------------------------
-// findit - seach for all objects in auto finder
+// findit - search for all objects in auto finder
// list and return status
//-------------------------------------------------
@@ -564,7 +564,7 @@ ioport_constructor device_t::device_input_ports() const
//-------------------------------------------------
// device_reset - actually handle resetting of
-// a device; designed to be overriden by the
+// a device; designed to be overridden by the
// actual device implementation
//-------------------------------------------------
@@ -577,7 +577,7 @@ void device_t::device_reset()
//-------------------------------------------------
// device_reset_after_children - hook to do
// reset logic that must happen after the children
-// are reset; designed to be overriden by the
+// are reset; designed to be overridden by the
// actual device implementation
//-------------------------------------------------
diff --git a/src/emu/diserial.h b/src/emu/diserial.h
index 27c4cb00d74..413692147e7 100644
--- a/src/emu/diserial.h
+++ b/src/emu/diserial.h
@@ -23,7 +23,7 @@ public:
enum
{
/* receive is waiting for start bit. The transition from high-low indicates
- start of start bit. This is used to synchronise with the data being transfered */
+ start of start bit. This is used to synchronise with the data being transferred */
RECEIVE_REGISTER_WAITING_FOR_START_BIT = 0x01,
/* receive is synchronised with data, data bits will be clocked in */
diff --git a/src/emu/drawgfx.h b/src/emu/drawgfx.h
index ca628114c3a..bd5c7bde99e 100644
--- a/src/emu/drawgfx.h
+++ b/src/emu/drawgfx.h
@@ -354,7 +354,7 @@ void copybitmap_trans(bitmap_rgb32 &dest, const bitmap_rgb32 &src, int flipx, in
/*
Copy a bitmap onto another with scroll and wraparound.
These functions support multiple independently scrolling rows/columns.
- "rows" is the number of indepentently scrolling rows. "rowscroll" is an
+ "rows" is the number of independently scrolling rows. "rowscroll" is an
array of integers telling how much to scroll each row. Same thing for
"numcols" and "colscroll".
If the bitmap cannot scroll in one direction, set numrows or columns to 0.
diff --git a/src/emu/drivers/emudummy.cpp b/src/emu/drivers/emudummy.cpp
deleted file mode 100644
index 948be2f2987..00000000000
--- a/src/emu/drivers/emudummy.cpp
+++ /dev/null
@@ -1,36 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/***************************************************************************
-
- emudummy.c
-
- Dummy driver file that references CPU devices which are in turn
- referenced by devices in libemu.a.
-
- The reason we need this is due to link ordering issues with gcc
- if the actual drivers being linked don't reference these CPU
- devices. Since we link libcpu first, if libemu needs stuff from
- libcpu that wasn't previously referenced, it will fail the link.
-
-***************************************************************************/
-
-#include "emu.h"
-#include "cpu/mcs48/mcs48.h"
-#include "cpu/z80/z80.h"
-
-
-MACHINE_CONFIG_START( __dummy, driver_device )
- MCFG_CPU_ADD("dummy1", I8049, 1000000)
- MCFG_CPU_ADD("dummy2", I8748, 1000000)
- MCFG_CPU_ADD("dummy3", Z80, 1000000)
-MACHINE_CONFIG_END
-
-
-ROM_START( __dummy )
- ROM_REGION( 0x1000, "dummy1", ROMREGION_ERASEFF )
- ROM_REGION( 0x1000, "dummy2", ROMREGION_ERASEFF )
- ROM_REGION( 0x1000, "dummy3", ROMREGION_ERASEFF )
-ROM_END
-
-
-GAME( 1900, __dummy, 0, __dummy, 0, driver_device, 0, ROT0, "(none)", "Dummy", MACHINE_NO_SOUND )
diff --git a/src/emu/gamedrv.h b/src/emu/gamedrv.h
index 2ab9dd53933..c2b1a6296a1 100644
--- a/src/emu/gamedrv.h
+++ b/src/emu/gamedrv.h
@@ -41,10 +41,10 @@ constexpr u32 MACHINE_MECHANICAL = 0x00020000; // contains mech
constexpr u32 MACHINE_TYPE_ARCADE = 0x00040000; // arcade machine (coin operated machines)
constexpr u32 MACHINE_TYPE_CONSOLE = 0x00080000; // console system
constexpr u32 MACHINE_TYPE_COMPUTER = 0x00100000; // any kind of computer including home computers, minis, calcs,...
-constexpr u32 MACHINE_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satelite receiver,...)
+constexpr u32 MACHINE_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satellite receiver,...)
constexpr u32 MACHINE_IMPERFECT_KEYBOARD = 0x00400000; // keyboard is known to be wrong
constexpr u32 MACHINE_CLICKABLE_ARTWORK = 0x00800000; // marking that artwork is clickable and require mouse cursor
-constexpr u32 MACHINE_IS_INCOMPLETE = 0x01000000; // any official game/system with blantantly incomplete HW or SW should be marked with this
+constexpr u32 MACHINE_IS_INCOMPLETE = 0x01000000; // any official game/system with blatantly incomplete HW or SW should be marked with this
constexpr u32 MACHINE_NODEVICE_MICROPHONE = 0x02000000; // any game/system that has unemulated recording voice device peripheral
constexpr u32 MACHINE_NODEVICE_CAMERA = 0x04000000; // any game/system that has unemulated capturing image device peripheral
constexpr u32 MACHINE_NODEVICE_PRINTER = 0x08000000; // any game/system that has unemulated grabbing of screen content device
diff --git a/src/emu/save.h b/src/emu/save.h
index 59bf5f54a5e..4f112796eaf 100644
--- a/src/emu/save.h
+++ b/src/emu/save.h
@@ -174,7 +174,7 @@ private:
bool m_reg_allowed; // are registrations allowed?
int m_illegal_regs; // number of illegal registrations
- std::vector<std::unique_ptr<state_entry>> m_entry_list; // list of reigstered entries
+ std::vector<std::unique_ptr<state_entry>> m_entry_list; // list of registered entries
std::vector<std::unique_ptr<state_callback>> m_presave_list; // list of pre-save functions
std::vector<std::unique_ptr<state_callback>> m_postload_list; // list of post-load functions
};
diff --git a/src/emu/softlist.h b/src/emu/softlist.h
index ad430a5aa28..2f321419b56 100644
--- a/src/emu/softlist.h
+++ b/src/emu/softlist.h
@@ -208,7 +208,7 @@ private:
// ----- Helpers -----
-// parses a software identifier (e.g. - 'apple2e:agentusa:flop1') into its consituent parts (returns false if cannot parse)
+// parses a software identifier (e.g. - 'apple2e:agentusa:flop1') into its constituent parts (returns false if cannot parse)
bool software_name_parse(const std::string &identifier, std::string *list_name = nullptr, std::string *software_name = nullptr, std::string *part_name = nullptr);
#endif // __SOFTLIST_H_
diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp
index 24fb330ebe4..d22ee998f7a 100644
--- a/src/emu/sound.cpp
+++ b/src/emu/sound.cpp
@@ -678,7 +678,7 @@ stream_sample_t *sound_stream::generate_resampled_data(stream_input &input, u32
stream_sample_t *source = &output.m_buffer[basesample - input_stream.m_output_base_sampindex];
// determine the current fraction of a sample, expressed as a fraction of FRAC_ONE
- // (Note: this formula is valid as long as input_stream.m_attoseconds_per_sample signficantly exceeds FRAC_ONE > attoseconds = 4.2E-12 s)
+ // (Note: this formula is valid as long as input_stream.m_attoseconds_per_sample significantly exceeds FRAC_ONE > attoseconds = 4.2E-12 s)
u32 basefrac = (basetime - basesample * input_stream.m_attoseconds_per_sample) / ((input_stream.m_attoseconds_per_sample + FRAC_ONE - 1) >> FRAC_BITS);
assert(basefrac < FRAC_ONE);
diff --git a/src/emu/tilemap.h b/src/emu/tilemap.h
index 057cdca8c86..729e0dc99d0 100644
--- a/src/emu/tilemap.h
+++ b/src/emu/tilemap.h
@@ -696,7 +696,7 @@ class tilemap_manager
friend class tilemap_t;
public:
- // construction/destuction
+ // construction/destruction
tilemap_manager(running_machine &machine);
~tilemap_manager();
diff --git a/src/emu/video/resnet.h b/src/emu/video/resnet.h
index 297da2e7db0..ba19503c71d 100644
--- a/src/emu/video/resnet.h
+++ b/src/emu/video/resnet.h
@@ -50,7 +50,7 @@
#define RES_NET_VCC_CUSTOM 0x0008
#define RES_NET_VCC_MASK 0x0008
-/* VBias prebuils - per channel but may be specified globally as default */
+/* VBias prebuilds - per channel but may be specified globally as default */
#define RES_NET_VBIAS_USE_GLOBAL 0x0000
#define RES_NET_VBIAS_5V 0x0010
diff --git a/src/frontend/mame/ui/datmenu.cpp b/src/frontend/mame/ui/datmenu.cpp
index 3ec47e1979b..e8bb21d1f3a 100644
--- a/src/frontend/mame/ui/datmenu.cpp
+++ b/src/frontend/mame/ui/datmenu.cpp
@@ -210,9 +210,6 @@ void menu_dats_view::draw(uint32_t flags)
// if we're on the top line, display the up arrow
if (linenum == 0 && top_line != 0)
{
- draw_arrow(0.5f * (x1 + x2) - 0.5f * ud_arrow_width, line_y + 0.25f * line_height,
- 0.5f * (x1 + x2) + 0.5f * ud_arrow_width, line_y + 0.75f * line_height, fgcolor, ROT0);
-
if (mouse_in_rect(line_x0, line_y0, line_x1, line_y1))
{
fgcolor = UI_MOUSEOVER_COLOR;
@@ -220,13 +217,14 @@ void menu_dats_view::draw(uint32_t flags)
highlight(line_x0, line_y0, line_x1, line_y1, bgcolor);
hover = HOVER_ARROW_UP;
}
+
+ draw_arrow(0.5f * (x1 + x2) - 0.5f * ud_arrow_width, line_y + 0.25f * line_height,
+ 0.5f * (x1 + x2) + 0.5f * ud_arrow_width, line_y + 0.75f * line_height, fgcolor, ROT0);
+
}
// if we're on the bottom line, display the down arrow
else if (linenum == m_visible_lines - 1 && itemnum != visible_items - 1)
{
- draw_arrow(0.5f * (x1 + x2) - 0.5f * ud_arrow_width, line_y + 0.25f * line_height,
- 0.5f * (x1 + x2) + 0.5f * ud_arrow_width, line_y + 0.75f * line_height, fgcolor, ROT0 ^ ORIENTATION_FLIP_Y);
-
if (mouse_in_rect(line_x0, line_y0, line_x1, line_y1))
{
fgcolor = UI_MOUSEOVER_COLOR;
@@ -234,6 +232,9 @@ void menu_dats_view::draw(uint32_t flags)
highlight(line_x0, line_y0, line_x1, line_y1, bgcolor);
hover = HOVER_ARROW_DOWN;
}
+
+ draw_arrow(0.5f * (x1 + x2) - 0.5f * ud_arrow_width, line_y + 0.25f * line_height,
+ 0.5f * (x1 + x2) + 0.5f * ud_arrow_width, line_y + 0.75f * line_height, fgcolor, ROT0 ^ ORIENTATION_FLIP_Y);
}
// draw dats text
diff --git a/src/frontend/mame/ui/dirmenu.h b/src/frontend/mame/ui/dirmenu.h
index baff9bd1d52..5d092273b1c 100644
--- a/src/frontend/mame/ui/dirmenu.h
+++ b/src/frontend/mame/ui/dirmenu.h
@@ -113,6 +113,6 @@ private:
std::vector<std::string> m_folders;
};
-} // namesapce ui
+} // namespace ui
#endif /* MAME_FRONTEND_UI_DIRMENU_H */
diff --git a/src/frontend/mame/ui/inputmap.h b/src/frontend/mame/ui/inputmap.h
index 5006cdffef2..5962d3e592e 100644
--- a/src/frontend/mame/ui/inputmap.h
+++ b/src/frontend/mame/ui/inputmap.h
@@ -173,6 +173,6 @@ private:
virtual void handle() override;
};
-} // namesapce ui
+} // namespace ui
#endif /* MAME_FRONTEND_UI_INPUTMAP_H */
diff --git a/src/frontend/mame/ui/moptions.cpp b/src/frontend/mame/ui/moptions.cpp
index 50cc0bcd14f..2fe51837718 100644
--- a/src/frontend/mame/ui/moptions.cpp
+++ b/src/frontend/mame/ui/moptions.cpp
@@ -19,7 +19,7 @@
const options_entry ui_options::s_option_entries[] =
{
- // seach path options
+ // search path options
{ nullptr, nullptr, OPTION_HEADER, "UI SEARCH PATH OPTIONS" },
{ OPTION_HISTORY_PATH, "history;dats;.", OPTION_STRING, "path to history files" },
{ OPTION_EXTRAINI_PATH, "folders", OPTION_STRING, "path to extra ini files" },
diff --git a/src/frontend/mame/ui/selmenu.h b/src/frontend/mame/ui/selmenu.h
index 7878f12fd54..f5d4deac84c 100644
--- a/src/frontend/mame/ui/selmenu.h
+++ b/src/frontend/mame/ui/selmenu.h
@@ -48,7 +48,7 @@ protected:
virtual void custom_render(void *selectedref, float top, float bottom, float x, float y, float x2, float y2) override;
- // hanlders
+ // handlers
void inkey_navigation();
// draw arrow
diff --git a/src/frontend/mame/ui/text.h b/src/frontend/mame/ui/text.h
index 527713fc483..5852bbeb184 100644
--- a/src/frontend/mame/ui/text.h
+++ b/src/frontend/mame/ui/text.h
@@ -86,7 +86,7 @@ private:
float size;
};
- // information about the "source" of a chracter - also in a struct
+ // information about the "source" of a character - also in a struct
// to facilitate copying
struct source_info
{
diff --git a/src/ldplayer/layout/LICENSE b/src/ldplayer/layout/LICENSE
deleted file mode 100644
index 670154e3538..00000000000
--- a/src/ldplayer/layout/LICENSE
+++ /dev/null
@@ -1,116 +0,0 @@
-CC0 1.0 Universal
-
-Statement of Purpose
-
-The laws of most jurisdictions throughout the world automatically confer
-exclusive Copyright and Related Rights (defined below) upon the creator and
-subsequent owner(s) (each and all, an "owner") of an original work of
-authorship and/or a database (each, a "Work").
-
-Certain owners wish to permanently relinquish those rights to a Work for the
-purpose of contributing to a commons of creative, cultural and scientific
-works ("Commons") that the public can reliably and without fear of later
-claims of infringement build upon, modify, incorporate in other works, reuse
-and redistribute as freely as possible in any form whatsoever and for any
-purposes, including without limitation commercial purposes. These owners may
-contribute to the Commons to promote the ideal of a free culture and the
-further production of creative, cultural and scientific works, or to gain
-reputation or greater distribution for their Work in part through the use and
-efforts of others.
-
-For these and/or other purposes and motivations, and without any expectation
-of additional consideration or compensation, the person associating CC0 with a
-Work (the "Affirmer"), to the extent that he or she is an owner of Copyright
-and Related Rights in the Work, voluntarily elects to apply CC0 to the Work
-and publicly distribute the Work under its terms, with knowledge of his or her
-Copyright and Related Rights in the Work and the meaning and intended legal
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-
-1. Copyright and Related Rights. A Work made available under CC0 may be
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-
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- ii. moral rights retained by the original author(s) and/or performer(s);
-
- iii. publicity and privacy rights pertaining to a person's image or likeness
- depicted in a Work;
-
- iv. rights protecting against unfair competition in regards to a Work,
- subject to the limitations in paragraph 4(a), below;
-
- v. rights protecting the extraction, dissemination, use and reuse of data in
- a Work;
-
- vi. database rights (such as those arising under Directive 96/9/EC of the
- European Parliament and of the Council of 11 March 1996 on the legal
- protection of databases, and under any national implementation thereof,
- including any amended or successor version of such directive); and
-
- vii. other similar, equivalent or corresponding rights throughout the world
- based on applicable law or treaty, and any national implementations thereof.
-
-2. Waiver. To the greatest extent permitted by, but not in contravention of,
-applicable law, Affirmer hereby overtly, fully, permanently, irrevocably and
-unconditionally waives, abandons, and surrenders all of Affirmer's Copyright
-and Related Rights and associated claims and causes of action, whether now
-known or unknown (including existing as well as future claims and causes of
-action), in the Work (i) in all territories worldwide, (ii) for the maximum
-duration provided by applicable law or treaty (including future time
-extensions), (iii) in any current or future medium and for any number of
-copies, and (iv) for any purpose whatsoever, including without limitation
-commercial, advertising or promotional purposes (the "Waiver"). Affirmer makes
-the Waiver for the benefit of each member of the public at large and to the
-detriment of Affirmer's heirs and successors, fully intending that such Waiver
-shall not be subject to revocation, rescission, cancellation, termination, or
-any other legal or equitable action to disrupt the quiet enjoyment of the Work
-by the public as contemplated by Affirmer's express Statement of Purpose.
-
-3. Public License Fallback. Should any part of the Waiver for any reason be
-judged legally invalid or ineffective under applicable law, then the Waiver
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-Affirmer's express Statement of Purpose. In addition, to the extent the Waiver
-is so judged Affirmer hereby grants to each affected person a royalty-free,
-non transferable, non sublicensable, non exclusive, irrevocable and
-unconditional license to exercise Affirmer's Copyright and Related Rights in
-the Work (i) in all territories worldwide, (ii) for the maximum duration
-provided by applicable law or treaty (including future time extensions), (iii)
-in any current or future medium and for any number of copies, and (iv) for any
-purpose whatsoever, including without limitation commercial, advertising or
-promotional purposes (the "License"). The License shall be deemed effective as
-of the date CC0 was applied by Affirmer to the Work. Should any part of the
-License for any reason be judged legally invalid or ineffective under
-applicable law, such partial invalidity or ineffectiveness shall not
-invalidate the remainder of the License, and in such case Affirmer hereby
-affirms that he or she will not (i) exercise any of his or her remaining
-Copyright and Related Rights in the Work or (ii) assert any associated claims
-and causes of action with respect to the Work, in either case contrary to
-Affirmer's express Statement of Purpose.
-
-4. Limitations and Disclaimers.
-
- a. No trademark or patent rights held by Affirmer are waived, abandoned,
- surrendered, licensed or otherwise affected by this document.
-
- b. Affirmer offers the Work as-is and makes no representations or warranties
- of any kind concerning the Work, express, implied, statutory or otherwise,
- including without limitation warranties of title, merchantability, fitness
- for a particular purpose, non infringement, or the absence of latent or
- other defects, accuracy, or the present or absence of errors, whether or not
- discoverable, all to the greatest extent permissible under applicable law.
-
- c. Affirmer disclaims responsibility for clearing rights of other persons
- that may apply to the Work or any use thereof, including without limitation
- any person's Copyright and Related Rights in the Work. Further, Affirmer
- disclaims responsibility for obtaining any necessary consents, permissions
- or other rights required for any use of the Work.
-
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- party to this document and has no duty or obligation with respect to this
- CC0 or use of the Work.
-
-For more information, please see
-<http://creativecommons.org/publicdomain/zero/1.0/>
diff --git a/src/ldplayer/layout/README.md b/src/ldplayer/layout/README.md
deleted file mode 100644
index 78ef2e5e6ad..00000000000
--- a/src/ldplayer/layout/README.md
+++ /dev/null
@@ -1,6 +0,0 @@
-# **Layout** #
-
-Layouts files are definiton files to describe look and fell of emulated machines, and are product
-of many different contributors.
-
-Licensed under [CC0 1.0 Universal (CC0 1.0)](https://creativecommons.org/publicdomain/zero/1.0/) \ No newline at end of file
diff --git a/src/ldplayer/ldplayer.lst b/src/ldplayer/ldplayer.lst
deleted file mode 100644
index 836a4d245a5..00000000000
--- a/src/ldplayer/ldplayer.lst
+++ /dev/null
@@ -1,13 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/******************************************************************************
-
- ldpdriv.c
-
- List of all enabled drivers in the system. This file is parsed by
- makelist.exe, sorted, and output as C code describing the drivers.
-
-******************************************************************************/
-
-ldv1000 // Pioneer LD-V1000
-pr8210 // Pioneer PR-8210
diff --git a/src/lib/formats/flopimg.h b/src/lib/formats/flopimg.h
index 1ad73d94f81..781a3687209 100644
--- a/src/lib/formats/flopimg.h
+++ b/src/lib/formats/flopimg.h
@@ -353,7 +353,7 @@ protected:
CRC_VICTOR_HDR_START, //!< Start a Victor 9000 checksum calculation, p1 = crc id
CRC_VICTOR_DATA_START, //!< Start a Victor 9000 checksum calculation, p1 = crc id
CRC_END, //!< End the checksum, p1 = crc id
- CRC, //!< Write a checksum in the apporpriate format, p1 = crc id
+ CRC, //!< Write a checksum in the appropriate format, p1 = crc id
SECTOR_LOOP_START, //!< Start of the per-sector loop, sector number goes from p1 to p2 inclusive
SECTOR_LOOP_END, //!< End of the per-sector loop
diff --git a/src/lib/formats/upd765_dsk.cpp b/src/lib/formats/upd765_dsk.cpp
index ae11f7080dc..a7e5febc3d7 100644
--- a/src/lib/formats/upd765_dsk.cpp
+++ b/src/lib/formats/upd765_dsk.cpp
@@ -250,7 +250,7 @@ bool upd765_format::save(io_generic *io, floppy_image *image)
// Previously tested cell size
int min_cell_size = 0;
for(;;) {
- // Build the list of all formats for the immediatly superior cell size
+ // Build the list of all formats for the immediately superior cell size
int cur_cell_size = 0;
candidates.clear();
for(int i=0; i != formats_count; i++) {
diff --git a/src/lib/netlist/devices/nld_9310.h b/src/lib/netlist/devices/nld_9310.h
index 4df8a2d03a0..f55e4061e64 100644
--- a/src/lib/netlist/devices/nld_9310.h
+++ b/src/lib/netlist/devices/nld_9310.h
@@ -36,7 +36,7 @@
* +-------++----+----+----+----+----+
*
* Reset count function: Please refer to
- * National Semiconductor datasheet (timing diagramm)
+ * National Semiconductor datasheet (timing diagram)
*
* Naming conventions follow National Semiconductor datasheet
*
diff --git a/src/lib/netlist/devices/nld_9316.h b/src/lib/netlist/devices/nld_9316.h
index 696a5dcba61..ab3fb46a2f5 100644
--- a/src/lib/netlist/devices/nld_9316.h
+++ b/src/lib/netlist/devices/nld_9316.h
@@ -40,7 +40,7 @@
* +-------++----+----+----+----+----+
*
* Reset count function: Please refer to
- * National Semiconductor datasheet (timing diagramm)
+ * National Semiconductor datasheet (timing diagram)
*
* Naming conventions follow National Semiconductor datasheet
*
diff --git a/src/lib/netlist/devices/nld_truthtable.h b/src/lib/netlist/devices/nld_truthtable.h
index 45a150574c8..759d19cf0c9 100644
--- a/src/lib/netlist/devices/nld_truthtable.h
+++ b/src/lib/netlist/devices/nld_truthtable.h
@@ -275,7 +275,7 @@ namespace netlist
/* FIXME:
* Based on current measurements there is no point to disable
* 1 input devices. This should actually be a parameter so that we
- * can decide for each individual gate whether it is benefitial to
+ * can decide for each individual gate whether it is beneficial to
* ignore deactivation.
*/
if (m_NI > 1)
diff --git a/src/lib/netlist/nl_base.h b/src/lib/netlist/nl_base.h
index f47ee3cbdae..55b1ef009b6 100644
--- a/src/lib/netlist/nl_base.h
+++ b/src/lib/netlist/nl_base.h
@@ -183,7 +183,7 @@ namespace netlist
// Exceptions
//============================================================
- /*! Generic netlist expection.
+ /*! Generic netlist exception.
* The exception is used in all events which are considered fatal.
*/
class nl_exception : public plib::pexception
@@ -327,7 +327,7 @@ namespace netlist
};
// -----------------------------------------------------------------------------
- // State variables - predefined and c++11 non-optioanl
+ // State variables - predefined and c++11 non-optional
// -----------------------------------------------------------------------------
/*! predefined state variable type for uint_fast8_t */
diff --git a/src/lib/netlist/nl_dice_compat.h b/src/lib/netlist/nl_dice_compat.h
index a6546e32d52..209f18d82af 100644
--- a/src/lib/netlist/nl_dice_compat.h
+++ b/src/lib/netlist/nl_dice_compat.h
@@ -3,7 +3,7 @@
/*
* nl_dice_compat.h
*
- * The follwoing script will convert a circuit using dice syntax into netlist
+ * The following script will convert a circuit using dice syntax into netlist
* syntax. It's not fail proof, but eases the manual work involved significantly.
sed -e 's/#define \(.*\)"\(.*\)"[ \t]*,[ \t]*\(.*\)/NET_ALIAS(\1,\2.\3)/' src/mame/drivers/nl_breakout.c \
diff --git a/src/lib/util/aviio.cpp b/src/lib/util/aviio.cpp
index 6efae25a654..4a493c2b89b 100644
--- a/src/lib/util/aviio.cpp
+++ b/src/lib/util/aviio.cpp
@@ -2867,7 +2867,7 @@ avi_file::error avi_file_impl::chunk_overwrite(std::uint32_t type, const void *d
/*-------------------------------------------------
- write_initial_headers - write out the inital
+ write_initial_headers - write out the initial
set of AVI and stream headers
-------------------------------------------------*/
diff --git a/src/lib/util/coretmpl.h b/src/lib/util/coretmpl.h
index 5c29d97f89f..758e4821aa3 100644
--- a/src/lib/util/coretmpl.h
+++ b/src/lib/util/coretmpl.h
@@ -237,7 +237,7 @@ public:
return object;
}
- // deatch the entire list, returning the head, but don't free memory
+ // detach the entire list, returning the head, but don't free memory
_ElementType *detach_all() noexcept
{
_ElementType *result = m_head;
diff --git a/src/lib/util/delegate.h b/src/lib/util/delegate.h
index d387db2dfcb..698632888cd 100644
--- a/src/lib/util/delegate.h
+++ b/src/lib/util/delegate.h
@@ -196,7 +196,7 @@ struct delegate_traits
// delegate_mfp is a class that wraps a generic member function pointer
// in a static buffer, and can effectively recast itself back for later use;
-// it hides some of the gross details involved in copying artibtrary member
+// it hides some of the gross details involved in copying arbitrary member
// function pointers around
class delegate_mfp
{
diff --git a/src/lib/util/strformat.h b/src/lib/util/strformat.h
index abb34e80d3f..db3666e448b 100644
--- a/src/lib/util/strformat.h
+++ b/src/lib/util/strformat.h
@@ -13,7 +13,7 @@
object with an appropriate stream output operator can be used as
a format argument with the %s conversion.
- Since the funcitons are implemented using C++ iostream, some
+ Since the functions are implemented using C++ iostream, some
behaviour more closely resembles iostream output operator behaviour
than printf behaviour. You are also exposed to bugs in your C++
iostream implementation (e.g. hexadecimal scientific format doesn't
@@ -28,7 +28,7 @@
Position specifiers for arguments (%123$), field width (*456$) and
precision (.*789$) are supported. Mixing explicit and implied
- positions for arugments/widths/precisions is discouraged, although
+ positions for arguments/widths/precisions is discouraged, although
it does produce deterministic behaviour.
The following format flags are recognised:
@@ -79,13 +79,13 @@
- d/i: signed decimal for integer/char/bool types
- u: unsigned decimal for integer/char/bool types
- o: unsigned octal for integer/char/bool types
- - x/X: lower/upppercase unsigned hexadecimal for integer/char/bool
+ - x/X: lower/uppercase unsigned hexadecimal for integer/char/bool
types or scientific hexadecimal for floating-point types
- e/E: lower/uppercase scientific decimal for floating-point types
- f/F: lower/uppercase fixed-point decimal for floating-point types
- g/G: default stream output format for floating-point types (may
differ from printf behaviour)
- - a/A: lower/upppercase scientific hexadecimal for floating-point
+ - a/A: lower/uppercase scientific hexadecimal for floating-point
types or hexadecimal for integer types
- c/C: cast integer types to stream's character type, no automatic
widening or narrowing
@@ -139,7 +139,7 @@
versa.
- Precision ignored for d/i/u/o/x/X conversions (should set minimum
digits to print).
- - Precisoin for s/S conversion is only honoured for string-like
+ - Precision for s/S conversion is only honoured for string-like
types (output character pointer/array and std::basic_string).
- If the output character type is not char, signed char or unsgined
char, printing the a value of this type with d/i/u/o/x/X
diff --git a/src/mame/audio/phoenix.cpp b/src/mame/audio/phoenix.cpp
index 28ec0574f69..ae2959ebf29 100644
--- a/src/mame/audio/phoenix.cpp
+++ b/src/mame/audio/phoenix.cpp
@@ -30,7 +30,7 @@
* [This information is part of the GIICM]
*
* Pin 8 and 9 are connected to an EXOR gate and the inverted
- * output (EXNOR) is fed back to pin 1 (and the pseudo polynome output).
+ * output (EXNOR) is fed back to pin 1 (and the pseudo polynomial output).
*
* 1D5 1Q1 2D4 2Q0 3D4 3Q0 4D5 4Q1 4Q0
* +--+--+--+--+--+ +--+--+--+--+ +--+--+--+--+ +--+--+--+--+--+
diff --git a/src/mame/audio/pleiads.cpp b/src/mame/audio/pleiads.cpp
index a425d8bf7ee..b3c322cf5dd 100644
--- a/src/mame/audio/pleiads.cpp
+++ b/src/mame/audio/pleiads.cpp
@@ -371,7 +371,7 @@ inline int pleiads_sound_device::tone23(int samplerate)
/*****************************************************************************
* Tone #4 comes from upper half of the lower 556 (IC98 in Pop Flamer)
* It's modulated by the voltage at C49, which is then divided between
- * 0V or 5V, depending on the polynome output bit.
+ * 0V or 5V, depending on the polynomial output bit.
* The tone signal gates two signals (bits 5 of latches A and C), but
* these are also swept between two levels (C52 and C53 in Pop Flamer).
*****************************************************************************/
@@ -575,7 +575,7 @@ inline int pleiads_sound_device::noise(int samplerate)
m_polybit = (m_poly18[m_noise.polyoffs>>5] >> (m_noise.polyoffs & 31)) & 1;
}
- /* The polynome output bit is used to gate bits 6 + 7 of
+ /* The polynomial output bit is used to gate bits 6 + 7 of
* sound latch A through the upper half of a 4066 chip.
* Bit 6 is sweeping a capacitor between 0V and 4.7V
* while bit 7 is connected directly to the 4066.
diff --git a/src/mame/audio/redbaron.cpp b/src/mame/audio/redbaron.cpp
index 9470b6495cd..17e4967035c 100644
--- a/src/mame/audio/redbaron.cpp
+++ b/src/mame/audio/redbaron.cpp
@@ -115,7 +115,7 @@ void redbaron_sound_device::sound_stream_update(sound_stream &stream, stream_sam
{
int sum = 0;
- /* polynome shifter E5 and F4 (LS164) clocked with 12kHz */
+ /* polynomial shifter E5 and F4 (LS164) clocked with 12kHz */
m_poly_counter -= 12000;
while( m_poly_counter <= 0 )
{
diff --git a/src/mame/audio/seibu.cpp b/src/mame/audio/seibu.cpp
index 93bd765d25a..d1a287f5906 100644
--- a/src/mame/audio/seibu.cpp
+++ b/src/mame/audio/seibu.cpp
@@ -36,9 +36,6 @@
#include "emu.h"
#include "audio/seibu.h"
-#include "sound/3812intf.h"
-#include "sound/ym2151.h"
-#include "sound/2203intf.h"
#include "sound/okiadpcm.h"
#include "sound/okim6295.h"
@@ -78,7 +75,10 @@ const device_type SEIBU_SOUND = &device_creator<seibu_sound_device>;
seibu_sound_device::seibu_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SEIBU_SOUND, "Seibu Sound System", tag, owner, clock, "seibu_sound", __FILE__),
- m_sound_rom(*this, ":audiocpu"),
+ m_ym_read_cb(*this),
+ m_ym_write_cb(*this),
+ m_sound_cpu(*this, finder_base::DUMMY_TAG),
+ m_sound_rom(*this, finder_base::DUMMY_TAG),
m_main2sub_pending(0),
m_sub2main_pending(0),
m_rst10_irq(0xff),
@@ -88,9 +88,11 @@ seibu_sound_device::seibu_sound_device(const machine_config &mconfig, const char
m_decrypted_opcodes = nullptr;
}
-void seibu_sound_device::set_encryption(int mode)
+void seibu_sound_device::set_cpu_tag_and_encryption(device_t &device, const char *tag, int mode)
{
- m_encryption_mode = mode;
+ downcast<seibu_sound_device &>(device).m_sound_cpu.set_tag(tag);
+ downcast<seibu_sound_device &>(device).m_sound_rom.set_tag(tag);
+ downcast<seibu_sound_device &>(device).m_encryption_mode = mode;
}
//-------------------------------------------------
@@ -99,6 +101,9 @@ void seibu_sound_device::set_encryption(int mode)
void seibu_sound_device::device_start()
{
+ m_ym_read_cb.resolve_safe(0);
+ m_ym_write_cb.resolve_safe();
+
if (m_sound_rom.length() > 0x10000)
{
membank(":seibu_bank1")->configure_entries(0, (m_sound_rom.length() - 0x10000) / 0x8000, &m_sound_rom[0x10000], 0x8000);
@@ -141,7 +146,6 @@ void seibu_sound_device::device_start()
void seibu_sound_device::device_reset()
{
- m_sound_cpu = machine().device(":audiocpu");
update_irq_lines(VECTOR_INIT);
}
@@ -233,12 +237,12 @@ void seibu_sound_device::update_irq_lines(int param)
break;
}
- if (m_sound_cpu != nullptr)
+ if (m_sound_cpu.found())
{
if ((m_rst10_irq & m_rst18_irq) == 0xff) /* no IRQs pending */
- m_sound_cpu->execute().set_input_line(0, CLEAR_LINE);
+ m_sound_cpu->set_input_line(0, CLEAR_LINE);
else /* IRQ pending */
- m_sound_cpu->execute().set_input_line_and_vector(0, ASSERT_LINE, m_rst10_irq & m_rst18_irq);
+ m_sound_cpu->set_input_line_and_vector(0, ASSERT_LINE, m_rst10_irq & m_rst18_irq);
}
else
return;
@@ -266,6 +270,16 @@ WRITE_LINE_MEMBER( seibu_sound_device::fm_irqhandler )
update_irq_lines(state ? RST10_ASSERT : RST10_CLEAR);
}
+READ8_MEMBER( seibu_sound_device::ym_r )
+{
+ return m_ym_read_cb(offset);
+}
+
+WRITE8_MEMBER( seibu_sound_device::ym_w )
+{
+ m_ym_write_cb(offset, data);
+}
+
WRITE8_MEMBER( seibu_sound_device::bank_w )
{
membank(":seibu_bank1")->set_entry(data & 1);
@@ -371,7 +385,7 @@ ADDRESS_MAP_START( seibu_sound_map, AS_PROGRAM, 8, seibu_sound_device )
AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym3812_device, read, write)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
@@ -381,121 +395,6 @@ ADDRESS_MAP_START( seibu_sound_map, AS_PROGRAM, 8, seibu_sound_device )
AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
ADDRESS_MAP_END
-ADDRESS_MAP_START( seibu2_airraid_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
-// AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_device, read, write)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START( seibu2_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
- AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_device, read, write)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START( seibu2_raiden2_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
- AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki1", okim6295_device, read, write)
- AM_RANGE(0x6002, 0x6002) AM_DEVREADWRITE("oki2", okim6295_device, read, write)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
- AM_RANGE(0x4004, 0x4004) AM_NOP
- AM_RANGE(0x401a, 0x401a) AM_NOP
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START( seibu_newzeroteam_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym3812_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
- AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_device, read, write)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START( seibu3_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ym1", ym2203_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
- AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_device, read, write)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START( seibu3_adpcm_sound_map, AS_PROGRAM, 8, seibu_sound_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM
- AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
- AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
- AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
- AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
- AM_RANGE(0x4005, 0x4006) AM_DEVWRITE("adpcm1", seibu_adpcm_device, adr_w)
- AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ym1", ym2203_device, read, write)
- AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
- AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
- AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
- AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
- AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("adpcm1", seibu_adpcm_device, ctl_w)
- AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
- AM_RANGE(0x6005, 0x6006) AM_DEVWRITE("adpcm2", seibu_adpcm_device, adr_w)
- AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_device, read, write)
- AM_RANGE(0x601a, 0x601a) AM_DEVWRITE("adpcm2", seibu_adpcm_device, ctl_w)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
-ADDRESS_MAP_END
-
/***************************************************************************
Seibu ADPCM device
(MSM5205 with interface to sample ROM provided by YM3931)
diff --git a/src/mame/audio/seibu.h b/src/mame/audio/seibu.h
index 66139a40ca1..f35fb49c93f 100644
--- a/src/mame/audio/seibu.h
+++ b/src/mame/audio/seibu.h
@@ -16,7 +16,7 @@
Related sound programs (not implemented yet):
Zero Team "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC."
- Legionaire "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC." (YM2151 substituted for YM3812)
+ Legionnaire "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC." (YM2151 substituted for YM3812)
Raiden 2 "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC." (YM2151 substituted for YM3812, plus extra MSM6205)
Raiden DX "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC." (YM2151 substituted for YM3812, plus extra MSM6205)
Cup Soccer "START UP PROGRAM V1.02 (C)1986 SEIBU KAIHATSU INC." (YM2151 substituted for YM3812, plus extra MSM6205)
@@ -26,19 +26,10 @@
***************************************************************************/
#include "cpu/z80/z80.h"
-#include "sound/3812intf.h"
-#include "sound/ym2151.h"
-#include "sound/2203intf.h"
-#include "sound/okim6295.h"
+#include "sound/okiadpcm.h"
ADDRESS_MAP_EXTERN(seibu_sound_decrypted_opcodes_map, 8);
ADDRESS_MAP_EXTERN(seibu_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu2_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu2_airraid_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu2_raiden2_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu_newzeroteam_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu3_sound_map, 8);
-ADDRESS_MAP_EXTERN(seibu3_adpcm_sound_map, 8);
class seibu_sound_device : public device_t
{
@@ -46,12 +37,19 @@ public:
seibu_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~seibu_sound_device() {}
+ // static configuration
+ static void set_cpu_tag_and_encryption(device_t &device, const char *tag, int mode);
+ template<class _Object> static devcb_base &set_ym_read_callback(device_t &device, _Object object) { return downcast<seibu_sound_device &>(device).m_ym_read_cb.set_callback(object); }
+ template<class _Object> static devcb_base &set_ym_write_callback(device_t &device, _Object object) { return downcast<seibu_sound_device &>(device).m_ym_write_cb.set_callback(object); }
+
DECLARE_READ16_MEMBER( main_word_r );
DECLARE_WRITE16_MEMBER( main_word_w );
DECLARE_WRITE16_MEMBER( main_mustb_w );
DECLARE_WRITE8_MEMBER( irq_clear_w );
DECLARE_WRITE8_MEMBER( rst10_ack_w );
DECLARE_WRITE8_MEMBER( rst18_ack_w );
+ DECLARE_READ8_MEMBER( ym_r );
+ DECLARE_WRITE8_MEMBER( ym_w );
DECLARE_WRITE8_MEMBER( bank_w );
DECLARE_WRITE8_MEMBER( coin_w );
WRITE_LINE_MEMBER( fm_irqhandler );
@@ -61,7 +59,6 @@ public:
DECLARE_WRITE8_MEMBER( pending_w );
static void apply_decrypt(uint8_t *rom, uint8_t *opcodes, int length);
- void set_encryption(int mode);
uint8_t *get_custom_decrypt();
void update_irq_lines(int param);
@@ -70,12 +67,16 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
- private:
+private:
int m_encryption_mode;
std::unique_ptr<uint8_t[]> m_decrypted_opcodes;
+ // device callbacks
+ devcb_read8 m_ym_read_cb;
+ devcb_write8 m_ym_write_cb;
+
// internal state
- device_t *m_sound_cpu;
+ required_device<cpu_device> m_sound_cpu;
required_region_ptr<uint8_t> m_sound_rom;
uint8_t m_main2sub[2];
uint8_t m_sub2main[2];
@@ -117,7 +118,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
- private:
+private:
// internal state
oki_adpcm_state m_adpcm;
sound_stream *m_stream;
@@ -154,128 +155,22 @@ extern const device_type SEIBU_ADPCM;
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) \
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
+#define MCFG_SEIBU_SOUND_CPU(_audiocputag) \
+ seibu_sound_device::set_cpu_tag_and_encryption(*device, "^" _audiocputag, 0);
+
+#define MCFG_SEIBU_SOUND_CPU_ENCRYPTED_LOW(_audiocputag) \
+ seibu_sound_device::set_cpu_tag_and_encryption(*device, "^" _audiocputag, 1);
+
+#define MCFG_SEIBU_SOUND_CPU_ENCRYPTED_FULL(_audiocputag) \
+ seibu_sound_device::set_cpu_tag_and_encryption(*device, "^" _audiocputag, 2);
+
+#define MCFG_SEIBU_SOUND_CPU_ENCRYPTED_CUSTOM(_audiocputag) \
+ seibu_sound_device::set_cpu_tag_and_encryption(*device, "^" _audiocputag, 3);
+
+#define MCFG_SEIBU_SOUND_YM_READ_CB(_devcb) \
+ devcb = &seibu_sound_device::set_ym_read_callback(*device, DEVCB_##_devcb);
-#define SEIBU_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU2_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU2_AIRRAID_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_airraid_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_raiden2_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu_newzeroteam_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU3_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu3_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU3A_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu3_adpcm_sound_map) \
- MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
-
-#define SEIBU_SOUND_SYSTEM_ENCRYPTED_LOW() \
- MCFG_DEVICE_MODIFY("seibu_sound") \
- downcast<seibu_sound_device *>(device)->set_encryption(1); \
- MCFG_DEVICE_MODIFY("audiocpu") \
- MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
-
-#define SEIBU_SOUND_SYSTEM_ENCRYPTED_FULL() \
- MCFG_DEVICE_MODIFY("seibu_sound") \
- downcast<seibu_sound_device *>(device)->set_encryption(2); \
- MCFG_DEVICE_MODIFY("audiocpu") \
- MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
-
-#define SEIBU_SOUND_SYSTEM_ENCRYPTED_CUSTOM() \
- MCFG_DEVICE_MODIFY("seibu_sound") \
- downcast<seibu_sound_device *>(device)->set_encryption(3); \
- MCFG_DEVICE_MODIFY("audiocpu") \
- MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
-
-#define SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
- MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
- \
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
-
-#define SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
- MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
- \
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
-
-#define SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_YM2151_ADD("ymsnd", freq1) \
- MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50) \
- \
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
-
-#define SEIBU_AIRRAID_SOUND_SYSTEM_YM2151_INTERFACE(freq1) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_YM2151_ADD("ymsnd", freq1) \
- MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50)
-
-#define SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(freq1, freq2, regiona, regionb) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_YM2151_ADD("ymsnd", freq1) \
- MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50) \
- \
- MCFG_OKIM6295_ADD("oki1", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
- \
- MCFG_OKIM6295_ADD("oki2", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
-
-#define SEIBU_SOUND_SYSTEM_YM2203_INTERFACE(freq) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
- \
- MCFG_SOUND_ADD("ym1", YM2203, freq) \
- MCFG_YM2203_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler)) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) \
- \
- MCFG_SOUND_ADD("ym2", YM2203, freq) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
-
-#define SEIBU_SOUND_SYSTEM_ADPCM_INTERFACE \
- MCFG_SOUND_ADD("adpcm1", SEIBU_ADPCM, 8000) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
- \
- MCFG_SOUND_ADD("adpcm2", SEIBU_ADPCM, 8000) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+#define MCFG_SEIBU_SOUND_YM_WRITE_CB(_devcb) \
+ devcb = &seibu_sound_device::set_ym_write_callback(*device, DEVCB_##_devcb);
/**************************************************************************/
diff --git a/src/mame/drivers/airraid.cpp b/src/mame/drivers/airraid.cpp
index 8adb5abd932..df9a92bdadb 100644
--- a/src/mame/drivers/airraid.cpp
+++ b/src/mame/drivers/airraid.cpp
@@ -150,6 +150,7 @@ Stephh's notes (based on the game Z80 code and some tests) :
#include "emu.h"
#include "cpu/z80/z80.h"
+#include "sound/ym2151.h"
#include "audio/seibu.h"
#include "video/airraid_dev.h"
@@ -277,6 +278,23 @@ static ADDRESS_MAP_START( decrypted_opcodes_map, AS_DECRYPTED_OPCODES, 8, airrai
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_SHARE("decrypted_opcodes")
ADDRESS_MAP_END
+static ADDRESS_MAP_START( airraid_sound_map, AS_PROGRAM, 8, airraid_state )
+ AM_RANGE(0x0000, 0x1fff) AM_ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM
+ AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
+ AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
+ AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
+ AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
+ AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
+ AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
+ AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
+ AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
+ AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
+ AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
+ADDRESS_MAP_END
+
static INPUT_PORTS_START( airraid )
PORT_START("IN0") /* IN0 (0xc200) */
@@ -368,8 +386,9 @@ static MACHINE_CONFIG_START( airraid, airraid_state )
MCFG_CPU_PROGRAM_MAP(airraid_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", airraid_state, cshooter_scanline, "airraid_vid:screen", 0, 1)
- SEIBU2_AIRRAID_SOUND_SYSTEM_CPU(XTAL_14_31818MHz/4) /* verified on pcb */
- SEIBU_SOUND_SYSTEM_ENCRYPTED_LOW()
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz/4) /* verified on pcb */
+ MCFG_CPU_PROGRAM_MAP(airraid_sound_map)
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MCFG_QUANTUM_PERFECT_CPU("maincpu")
@@ -379,7 +398,17 @@ static MACHINE_CONFIG_START( airraid, airraid_state )
MCFG_AIRRAID_VIDEO_ADD("airraid_vid")
/* sound hardware */
- SEIBU_AIRRAID_SOUND_SYSTEM_YM2151_INTERFACE(XTAL_14_31818MHz/4)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", XTAL_14_31818MHz/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_LOW("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/altair.cpp b/src/mame/drivers/altair.cpp
index 710f0bcd366..35bcf228fcb 100644
--- a/src/mame/drivers/altair.cpp
+++ b/src/mame/drivers/altair.cpp
@@ -97,7 +97,7 @@ WRITE_LINE_MEMBER(altair_state::write_acia_clock)
void altair_state::machine_reset()
{
- // Set startup addess done by turn-key
+ // Set startup address done by turn-key
m_maincpu->set_state_int(I8085_PC, 0xFD00);
}
diff --git a/src/mame/drivers/alto2.cpp b/src/mame/drivers/alto2.cpp
index 1ed1d1109b0..cd69efbe400 100644
--- a/src/mame/drivers/alto2.cpp
+++ b/src/mame/drivers/alto2.cpp
@@ -135,7 +135,7 @@ static INPUT_PORTS_START( alto2 )
PORT_KEY(A2_KEY_FL2, KEYCODE_F2, 0, 0, "FL2" ) //!< ADL left function key 2
PORT_START("ROW5")
- PORT_KEY(A2_KEY_FR4, KEYCODE_F8, 0, 0, "FR4" ) //!< ADL right funtion key 4
+ PORT_KEY(A2_KEY_FR4, KEYCODE_F8, 0, 0, "FR4" ) //!< ADL right function key 4
PORT_KEY(A2_KEY_BW, KEYCODE_F10, 0, 0, "BW" ) //!< ADL BW (?)
PORT_START("ROW6")
diff --git a/src/mame/drivers/ampoker2.cpp b/src/mame/drivers/ampoker2.cpp
index 54c31aec2d2..ac9028853cd 100644
--- a/src/mame/drivers/ampoker2.cpp
+++ b/src/mame/drivers/ampoker2.cpp
@@ -235,7 +235,7 @@
an oscilloscope, I measured a value of 60 uS = 1538 Hz. We used a NMI period of 1536 Hz due
to a better binary composition (1024+512).
- Inputs/Ouputs are driven through 74LS251 and 74LS259 multiplexers. Each one handles 1 bit
+ Inputs/Outputs are driven through 74LS251 and 74LS259 multiplexers. Each one handles 1 bit
from data bus, and there are many devices as addressed ports (8x 74LS251 and 8x 74LS259).
Input ports are mapped to offsets 0xC410 through 0xC417. Output ports are mapped to 0xC4000
@@ -316,7 +316,7 @@
- Reworked the color routines switching to resnet system.
- Added a resistor network diagram.
- Switch to pre-defined crystal value.
- - Changed the WATCHDOG_TIME_INIT to be based on miliseconds instead of hertz.
+ - Changed the WATCHDOG_TIME_INIT to be based on milliseconds instead of hertz.
- Other minor cleanup/fixes.
- Updated technical notes.
diff --git a/src/mame/drivers/apexc.cpp b/src/mame/drivers/apexc.cpp
index a4d9897907b..4e2337ad84d 100644
--- a/src/mame/drivers/apexc.cpp
+++ b/src/mame/drivers/apexc.cpp
@@ -499,7 +499,7 @@ INTERRUPT_GEN_MEMBER(apexc_state::apexc_interrupt)
Since the APEXC has no video display, we display the control panel.
- Additionnally, We display one page of teletyper output.
+ Additionally, We display one page of teletyper output.
*/
static const rgb_t apexc_palette[] =
diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp
index d1fd1dc9e56..09d03c3d9ca 100644
--- a/src/mame/drivers/apple2e.cpp
+++ b/src/mame/drivers/apple2e.cpp
@@ -3795,7 +3795,7 @@ ROM_START(apple2c)
ROM_LOAD ( "341-0265-a.chr", 0x1000, 0x1000,CRC(2651014d) SHA1(b2b5d87f52693817fc747df087a4aa1ddcdb1f10))
ROM_REGION(0x8000,"maincpu",0)
- ROM_LOAD ( "a2c.128", 0x0000, 0x4000, CRC(f0edaa1b) SHA1(1a9b8aca5e32bb702ddb7791daddd60a89655729))
+ ROM_LOAD ( "a2c.128", 0x0000, 0x4000, CRC(f0edaa1b) SHA1(1a9b8aca5e32bb702ddb7791daddd60a89655729)) /* should be 342-0272-A? */
ROM_REGION( 0x800, "keyboard", ROMREGION_ERASE00 )
ROM_LOAD( "342-0132-c.e12", 0x000, 0x800, CRC(e47045f4) SHA1(12a2e718f5f4acd69b6c33a45a4a940b1440a481) ) // 1983 US-Dvorak
diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp
index 81d0df7c8a7..bf6b59aa5f1 100644
--- a/src/mame/drivers/aristmk5.cpp
+++ b/src/mame/drivers/aristmk5.cpp
@@ -175,6 +175,7 @@
#include "machine/ds1302.h"
#include "machine/watchdog.h"
#include "machine/eepromser.h"
+#include "machine/nvram.h"
#include "machine/ins8250.h"
#include "sound/volt_reg.h"
@@ -185,8 +186,8 @@ public:
: archimedes_state(mconfig, type, tag)
, m_eeprom(*this, "eeprom%d", 0)
, m_rtc(*this, "rtc")
- , m_sram_bank(*this, "sram_bank")
- , m_sram_bank_nz(*this, "sram_bank_nz")
+ , m_nvram(*this, "nvram")
+ , m_sram(*this, "sram")
, m_extra_ports(*this, "EXTRA")
{ }
@@ -201,6 +202,8 @@ public:
DECLARE_READ32_MEMBER(eeprom_r);
DECLARE_READ32_MEMBER(ldor_r);
DECLARE_WRITE32_MEMBER(ldor_clk_w);
+ DECLARE_READ8_MEMBER(sram_r);
+ DECLARE_WRITE8_MEMBER(sram_w);
DECLARE_DRIVER_INIT(aristmk5);
virtual void machine_start() override;
@@ -214,13 +217,14 @@ public:
private:
required_device_array<eeprom_serial_93cxx_device, 2> m_eeprom;
required_device<ds1302_device> m_rtc;
- required_memory_bank m_sram_bank;
- required_memory_bank m_sram_bank_nz;
+ required_device<nvram_device> m_nvram;
+ required_memory_region m_sram;
required_ioport m_extra_ports;
emu_timer * m_mk5_2KHz_timer;
emu_timer * m_mk5_VSYNC_timer;
uint8_t m_ext_latch;
+ uint8_t m_sram_bank;
uint8_t m_flyback;
uint8_t m_ldor_shift_reg;
uint64_t m_coin_start_cycles;
@@ -233,6 +237,16 @@ TIMER_CALLBACK_MEMBER(aristmk5_state::mk5_VSYNC_callback)
m_mk5_VSYNC_timer->adjust(attotime::never);
}
+READ8_MEMBER(aristmk5_state::sram_r)
+{
+ return m_sram->base()[(m_sram_bank << 14) | (offset & 0x3fff)];
+}
+
+WRITE8_MEMBER(aristmk5_state::sram_w)
+{
+ m_sram->base()[(m_sram_bank << 14) | (offset & 0x3fff)] = data;
+}
+
WRITE32_MEMBER(aristmk5_state::Ns5w48)
{
/*
@@ -481,8 +495,8 @@ WRITE32_MEMBER(aristmk5_state::sram_banksel_w)
4 pages of 32k for each sram chip.
*/
- m_sram_bank->set_entry((data & 0xc0) >> 6);
- m_sram_bank_nz->set_entry((data & 0xc0) >> 6);
+
+ m_sram_bank = ((data & 0xc0) >> 3) | (data & 0x07);
}
static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32, aristmk5_state )
@@ -495,6 +509,7 @@ static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32, aristmk5_state )
AM_RANGE(0x03010800, 0x03010803) AM_READ(eeprom_r)
AM_RANGE(0x03010580, 0x03010583) AM_READ_PORT("P3")
+ AM_RANGE(0x03010700, 0x03010703) AM_READ_PORT("P6")
AM_RANGE(0x03012000, 0x03012003) AM_READ_PORT("P1")
AM_RANGE(0x03012010, 0x03012013) AM_READ_PORT("P2")
AM_RANGE(0x03012200, 0x03012203) AM_READ_PORT("DSW1")
@@ -515,8 +530,7 @@ static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32, aristmk5_state )
AM_RANGE(0x03012340, 0x0301235f) AM_DEVREADWRITE8("uart_3b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff)
AM_RANGE(0x03010810, 0x03010813) AM_DEVREADWRITE("watchdog", watchdog_timer_device, reset32_r, reset32_w) //MK-5 specific, watchdog
-// System Startup Code Enabled protection appears to be located at 0x3010400 - 0x30104ff
- AM_RANGE(0x03220000, 0x0323ffff) AM_RAMBANK("sram_bank") //AM_BASE_SIZE_GENERIC(nvram) // nvram 32kbytes x 3
+ AM_RANGE(0x03220000, 0x0323ffff) AM_READWRITE8(sram_r, sram_w, 0x000000ff)
// bank5 slow
AM_RANGE(0x03250048, 0x0325004b) AM_WRITE(Ns5w48) //IOEB control register
@@ -525,7 +539,7 @@ static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32, aristmk5_state )
AM_RANGE(0x03000000, 0x0331ffff) AM_READWRITE(mk5_ioc_r, mk5_ioc_w)
- AM_RANGE(0x03320000, 0x0333ffff) AM_RAMBANK("sram_bank_nz") // AM_BASE_SIZE_GENERIC(nvram) // nvram 32kbytes x 3 NZ
+ AM_RANGE(0x03320000, 0x0333ffff) AM_READWRITE8(sram_r, sram_w, 0x000000ff)
AM_RANGE(0x03400000, 0x035fffff) AM_WRITE(archimedes_vidc_w)
AM_RANGE(0x03600000, 0x037fffff) AM_WRITE(archimedes_memc_w)
@@ -639,6 +653,9 @@ static INPUT_PORTS_START( aristmk5 )
PORT_BIT(0x00000040, IP_ACTIVE_LOW , IPT_KEYPAD) PORT_CODE(KEYCODE_M) PORT_TOGGLE PORT_NAME("Main door")
PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_C) PORT_TOGGLE PORT_NAME("Cashbox door")
+ PORT_START("P6")
+ PORT_BIT(0x00000002, IP_ACTIVE_LOW, IPT_KEYPAD) // Battery
+
PORT_START("P4")
PORT_BIT(0x00000078, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, aristmk5_state, coin_r, nullptr)
@@ -652,14 +669,8 @@ INPUT_PORTS_END
DRIVER_INIT_MEMBER(aristmk5_state,aristmk5)
{
- uint8_t *SRAM = memregion("sram")->base();
- uint8_t *SRAM_NZ = memregion("sram")->base();
-
archimedes_driver_init();
- m_sram_bank->configure_entries(0, 4, &SRAM[0], 0x20000);
- m_sram_bank_nz->configure_entries(0, 4, &SRAM_NZ[0], 0x20000);
-
int do_debug = 0;
if (do_debug)
@@ -790,6 +801,8 @@ DRIVER_INIT_MEMBER(aristmk5_state,aristmk5)
void aristmk5_state::machine_start()
{
+ m_nvram->set_base(m_sram->base(), m_sram->bytes());
+
archimedes_init();
m_mk5_2KHz_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(aristmk5_state::mk5_2KHz_callback),this));
@@ -824,6 +837,7 @@ void aristmk5_state::machine_reset()
m_ldor_shift_reg = 0x55;
m_coin_start_cycles = 0;
+ m_sram_bank = 0;
}
@@ -858,6 +872,8 @@ static MACHINE_CONFIG_START( aristmk5, aristmk5_state )
MCFG_EEPROM_SERIAL_93C56_ADD("eeprom0")
MCFG_EEPROM_SERIAL_93C56_ADD("eeprom1")
+ MCFG_NVRAM_ADD_NO_FILL("nvram")
+
// TL16C452FN U71
MCFG_DEVICE_ADD("uart_0a", NS16450, MASTER_CLOCK / 9)
// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback))
diff --git a/src/mame/drivers/aristmk6.cpp b/src/mame/drivers/aristmk6.cpp
index e732b7b7318..9887fc59f2a 100644
--- a/src/mame/drivers/aristmk6.cpp
+++ b/src/mame/drivers/aristmk6.cpp
@@ -41,12 +41,23 @@ public:
m_vram(*this, "vram")
{ }
- uint32_t m_test_x,m_test_y,m_start_offs;
- uint8_t m_type;
+ u32 m_test_x,m_test_y,m_start_offs;
+ u8 m_type;
+
+ u8 irl0pend, irl0en;
+ u8 irl1pend, irl1en;
+ u8 irl2pend, irl2en; // UARTs ?
+ u8 irl3pend0, irl3en0;
+ u8 irl3pend1, irl3en1;
+ void testIrq();
+
+ DECLARE_READ8_MEMBER(irqpend_r);
+ DECLARE_WRITE8_MEMBER(irqen_w);
DECLARE_READ8_MEMBER(test_r);
DECLARE_WRITE64_MEMBER(eeprom_w);
DECLARE_READ64_MEMBER(hwver_r);
virtual void video_start() override;
+ virtual void machine_reset() override;
uint32_t screen_update_aristmk6(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
required_device<cpu_device> m_maincpu;
required_device<ns16550_device> m_uart0;
@@ -60,6 +71,10 @@ public:
void aristmk6_state::video_start()
{
}
+void aristmk6_state::machine_reset()
+{
+ irl0pend = irl0en = irl1pend = irl1en = irl2pend = irl2en = irl3pend0 = irl3en0 = irl3pend1 = irl3en1 = 0;
+}
uint32_t aristmk6_state::screen_update_aristmk6(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
@@ -67,6 +82,11 @@ uint32_t aristmk6_state::screen_update_aristmk6(screen_device &screen, bitmap_rg
int x,y,count;
const uint8_t *blit_ram = memregion("maincpu")->base();
+ if (machine().input().code_pressed(KEYCODE_U)) {
+ irl2pend |= 2;
+ testIrq();
+ }
+
if(machine().input().code_pressed(KEYCODE_Z))
m_test_x++;
@@ -168,6 +188,68 @@ uint32_t aristmk6_state::screen_update_aristmk6(screen_device &screen, bitmap_rg
return 0;
}
+void aristmk6_state::testIrq()
+{
+ m_maincpu->set_input_line(SH4_IRL0, (irl0pend & irl0en) ? ASSERT_LINE : CLEAR_LINE);
+ m_maincpu->set_input_line(SH4_IRL1, (irl1pend & irl1en) ? ASSERT_LINE : CLEAR_LINE);
+ m_maincpu->set_input_line(SH4_IRL2, (irl2pend & irl2en) ? ASSERT_LINE : CLEAR_LINE);
+ m_maincpu->set_input_line(SH4_IRL3, ((irl3pend0 & irl3en0) || (irl3pend1 & irl3en1)) ? ASSERT_LINE : CLEAR_LINE);
+}
+
+READ8_MEMBER(aristmk6_state::irqpend_r)
+{
+ switch (offset)
+ {
+ case 0x00e8 - 0x00e8:
+ return irl0pend;
+ case 0x00f0 - 0x00e8:
+ return irl1pend;
+ case 0x00f8 - 0x00e8:
+ return irl2pend;
+ case 0x0100 - 0x00e8:
+ return irl3pend0;
+ case 0x0101 - 0x00e8:
+ return irl3pend1;
+ default:
+ logerror("Unhandled read %08x\n", 0x120000e8 + offset);
+ return 0;
+ }
+}
+
+WRITE8_MEMBER(aristmk6_state::irqen_w)
+{
+ switch (offset)
+ {
+ case 0x0108 - 0x0108:
+ irl0en = data;
+ irl0pend &= ~data;
+ testIrq();
+ break;
+ case 0x0110 - 0x0108:
+ irl1en = data;
+ irl1pend &= ~data;
+ testIrq();
+ break;
+ case 0x0118 - 0x0108:
+ irl2en = data;
+ irl2pend &= ~data;
+ testIrq();
+ break;
+ case 0x0120 - 0x0108:
+ irl3en0 = data;
+ irl3pend0 &= ~data;
+ testIrq();
+ break;
+ case 0x0121 - 0x0108:
+ irl3en1 = data;
+ irl3pend1 &= ~data;
+ testIrq();
+ break;
+ default:
+ logerror("Unhandled write %08x %02x\n", 0x12000108 + offset, data);
+ }
+}
+
READ8_MEMBER(aristmk6_state::test_r)
{
static int flip;
@@ -216,6 +298,8 @@ static ADDRESS_MAP_START( aristmk6_map, AS_PROGRAM, 64, aristmk6_state )
AM_RANGE(0x12000078, 0x1200007f) AM_WRITENOP // watchdog ??
AM_RANGE(0x12000080, 0x12000087) AM_WRITENOP // 0-1-2 written here repeatedly, diag LED or smth ?
AM_RANGE(0x120000E0, 0x120000E7) AM_READ(hwver_r)
+ AM_RANGE(0x120000E8, 0x12000107) AM_READ8(irqpend_r, 0xffffffffffffffffU)
+ AM_RANGE(0x12000108, 0x12000127) AM_WRITE8(irqen_w, 0xffffffffffffffffU)
AM_RANGE(0x12400010, 0x12400017) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xffffffffffffffffU)
AM_RANGE(0x12400018, 0x1240001f) AM_DEVREADWRITE8("uart0", ns16550_device, ins8250_r, ins8250_w, 0xffffffffffffffffU)
AM_RANGE(0x13800000, 0x13800007) AM_READ8(test_r, 0xffffffffffffffffU)
@@ -246,6 +330,7 @@ static MACHINE_CONFIG_START( aristmk6, aristmk6_state )
MCFG_SH4_CLOCK(ARISTMK6_CPU_CLOCK)
MCFG_CPU_PROGRAM_MAP(aristmk6_map)
MCFG_CPU_IO_MAP(aristmk6_port)
+ MCFG_MMU_HACK_TYPE(2)
// MCFG_DEVICE_DISABLE()
MCFG_DEVICE_ADD( "uart0", NS16550, XTAL_8MHz )
diff --git a/src/mame/drivers/asteroid.cpp b/src/mame/drivers/asteroid.cpp
index 9188f53ab3e..574c420501e 100644
--- a/src/mame/drivers/asteroid.cpp
+++ b/src/mame/drivers/asteroid.cpp
@@ -932,7 +932,7 @@ explain why there is this mismatch in revision numbers, it seems Atari released
they needed to change default settings becasue of earnings potential in their default
first set (revision 1), not once, but twice! then they changed the romset altogether. The documents
in question are CO-174-02 (2 pages, 3 sides). this document shows what i think was the final revision
-of roms to be produced, they consist of a wholly -02 romset, with the expection being a -03 rom at
+of roms to be produced, they consist of a wholly -02 romset, with the exception being a -03 rom at
location J1.
So, anyhow, find in this file, the FIRST revision of rom -01 in J1. This pcb contained the following
diff --git a/src/mame/drivers/atarisy2.cpp b/src/mame/drivers/atarisy2.cpp
index d703efd9153..707aaf7923f 100644
--- a/src/mame/drivers/atarisy2.cpp
+++ b/src/mame/drivers/atarisy2.cpp
@@ -522,7 +522,7 @@ READ8_MEMBER(atarisy2_state::leta_r)
Also the CH1 output is referenced to 2.5V. Anything
above is positive, below is negative. Then amplified
by 6.556 and clipped to -15V and (15V-1.5V=13.5V).
- This is usefull to work out the relative signal levels
+ This is useful to work out the relative signal levels
of each effect.
This then goes to the stage you were asking about. We
diff --git a/src/mame/drivers/bionicc.cpp b/src/mame/drivers/bionicc.cpp
index c36ebafe9ce..0f13fb4e4e3 100644
--- a/src/mame/drivers/bionicc.cpp
+++ b/src/mame/drivers/bionicc.cpp
@@ -11,14 +11,37 @@
Graphics ROM board: 86612-B-2
Program ROM board: 86612-C-2
- Main CPU: 68000CP10
- Sound CPU: Z80A
- MCU: Intel C8751H-88
+ Main CPU: 68000CP10 @ 24MHz / 2 = 12MHz
+ Sound CPU: Z80A @ 14.31818 / 4 = 3.579545MHz
+ MCU: Intel C8751H-88 @ 24MHz / 4 = 6MHz
Sound Chip: YM2151 & YM3012
OSC: 24.000 MHz (on the 86612-B-2 PCB)
Custom: CAPCOM DL-010D-103 (on the 86612-B-2 PCB)
-
+ Horizontal scan rate: 15.606kHz
+ Vertical scan rate: 60.024Hz
+
+ pixel clock: 6.000MHz, 166ns per pixel
+
+ htotal: 64.076us, 386 pixels
+ hsync: 5.312us, 32 pixels
+ back porch + sync: 15.106us, 91 pixels
+ active video: 42.662us, 257 pixels (it looks like the first pixel is repeated)
+ front porch: 6.308us, 38 pixels
+
+ vtotal: 16.660ms, 260 lines
+ vsync: 256.304us, 4 lines
+ back porch + sync: 1.282ms, 20 lines
+ active video: 14.353ms, 224 lines
+ front porch: 1.025ms, 16 lines
+
+ Clocks verified on 86612-A-2 and 86612-B-2 boards, serial no. 39646
+ ("Bionic Commando", US region) by scope measurement at clock pins.
+ Timings verified at SYNC pin and BLUE pin (jamma edge),
+ using an Agilent DSO9404A scope and two N2873A 500MHz probes
+
+ Note: Protection MCU is labelled "TS" without a number and without a coloured
+ stripe. Maybe its code is not region dependant.
Note: Euro rom labels (IE: "TSE") had a blue stripe, while those labeled
as USA (TSU) had an red stripe on the sticker. The intermixing
of TSE and TSU roms in the parent set is correct and verified.
@@ -349,6 +372,8 @@ static MACHINE_CONFIG_START( bionicc, bionicc_state )
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", bionicc_state, bionicc_scanline, "screen", 0, 1)
+ /* Protection MCU Intel C8751H-88 runs at 24MHz / 4 = 6MHz */
+
MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz / 4) /* EXO3 C,B=GND, A=5V ==> Divisor 2^2 */
MCFG_CPU_PROGRAM_MAP(sound_map)
/* FIXME: interrupt timing
@@ -360,10 +385,8 @@ static MACHINE_CONFIG_START( bionicc, bionicc_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
- MCFG_SCREEN_SIZE(32*8, 32*8)
- MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
+ /* FIXME: should be 257 visible horizontal pixels, first visible pixel should be repeated, back porch/front porch should be separated */
+ MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz / 4, 386, 0, 256, 260, 0, 224)
MCFG_SCREEN_UPDATE_DRIVER(bionicc_state, screen_update_bionicc)
MCFG_SCREEN_VBLANK_DEVICE("spriteram", buffered_spriteram16_device, vblank_copy_rising)
MCFG_SCREEN_PALETTE("palette")
diff --git a/src/mame/drivers/bloodbro.cpp b/src/mame/drivers/bloodbro.cpp
index 1b766e0bfb4..f4bd0d168e0 100644
--- a/src/mame/drivers/bloodbro.cpp
+++ b/src/mame/drivers/bloodbro.cpp
@@ -133,6 +133,7 @@ DIP locations verified for Blood Bros. & Sky Smasher via manual & DIP-SW setting
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
#include "sound/3812intf.h"
+#include "sound/okim6295.h"
#include "includes/bloodbro.h"
#include "video/seibu_crtc.h"
@@ -484,7 +485,8 @@ static MACHINE_CONFIG_START( bloodbro, bloodbro_state )
MCFG_CPU_PROGRAM_MAP(bloodbro_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bloodbro_state, irq4_line_hold)
- SEIBU_SOUND_SYSTEM_CPU(XTAL_7_15909MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_7_15909MHz/2) /* verified on pcb */
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
// video hardware
@@ -506,7 +508,19 @@ static MACHINE_CONFIG_START( bloodbro, bloodbro_state )
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
// sound hardware
- SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(XTAL_7_15909MHz/2, XTAL_12MHz/12)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_7_15909MHz/2)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", XTAL_12MHz/12, OKIM6295_PIN7_HIGH)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( weststry, bloodbro )
diff --git a/src/mame/drivers/cabal.cpp b/src/mame/drivers/cabal.cpp
index 9b05f35a714..da52cb506d9 100644
--- a/src/mame/drivers/cabal.cpp
+++ b/src/mame/drivers/cabal.cpp
@@ -189,7 +189,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, cabal_state )
AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
AM_RANGE(0x4005, 0x4006) AM_DEVWRITE("adpcm1", seibu_adpcm_device, adr_w)
- AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
@@ -496,6 +496,9 @@ static MACHINE_CONFIG_START( cabal_base, cabal_state )
/* sound hardware */
MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MCFG_SPEAKER_STANDARD_MONO("mono")
@@ -511,11 +514,19 @@ static MACHINE_CONFIG_START( cabal_base, cabal_state )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cabal, cabal_base )
- SEIBU_SOUND_SYSTEM_ENCRYPTED_LOW()
+ MCFG_DEVICE_MODIFY("seibu_sound")
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_LOW("audiocpu")
+
+ MCFG_DEVICE_MODIFY("audiocpu")
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cabalbl2, cabal_base )
- SEIBU_SOUND_SYSTEM_ENCRYPTED_CUSTOM()
+ MCFG_DEVICE_MODIFY("seibu_sound")
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_CUSTOM("audiocpu")
+
+ MCFG_DEVICE_MODIFY("audiocpu")
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/champbwl.cpp b/src/mame/drivers/champbwl.cpp
index d72f6e15a49..5e213440836 100644
--- a/src/mame/drivers/champbwl.cpp
+++ b/src/mame/drivers/champbwl.cpp
@@ -140,7 +140,7 @@ Notes:
Standard 6 pin Trackball connector
- Pin Wire Funtion
+ Pin Wire Function
------------------------------
1 | BLK | Ground
2 | RED | +5 Volts DC
diff --git a/src/mame/drivers/coinmvga.cpp b/src/mame/drivers/coinmvga.cpp
index 1cc9bb37299..63470c88a52 100644
--- a/src/mame/drivers/coinmvga.cpp
+++ b/src/mame/drivers/coinmvga.cpp
@@ -22,7 +22,7 @@
---------------
This board is used in each bet station of Coinmaster's Roulette and Keno games.
- Both systems have a phisical electromechanical unit with their own controller
+ Both systems have a physical electromechanical unit with their own controller
plus sound. The central units (wheel controller) are routed to the bet stations
(10 for default) through 2 different kind of networks, depending the wheel system.
@@ -47,7 +47,7 @@
Colorama is a standalone roulette system, driven by one VGA board. It has a big lamps
- loom, and a vertical positioned roulette painted on the marquee with one phisical arm
+ loom, and a vertical positioned roulette painted on the marquee with one physical arm
pointing to the numbers.
@@ -669,7 +669,7 @@ MACHINE_CONFIG_END
Colorama.
p521 (unknown version), English.
- Standalone. Phisical arm on marquee + bet station.
+ Standalone. Physical arm on marquee + bet station.
*/
ROM_START( colorama )
@@ -702,7 +702,7 @@ ROM_START( coloramas )
Colorama.
p521 v13, Spanish.
- Standalone. Phisical arm on marquee + bet station.
+ Standalone. Physical arm on marquee + bet station.
*/
ROM_REGION( 0x100000, "maincpu", 0 )
@@ -731,7 +731,7 @@ ROM_END
/*
Coinmaster Roulette V75 (y2k, spanish)
- Phisical Unit + 10-15 bet stations.
+ Physical Unit + 10-15 bet stations.
*/
ROM_START( cmrltv75 )
@@ -777,7 +777,7 @@ ROM_END
/*
Coinmaster Keno (y2k, spanish, 2000-12-14)
- Phisical Unit + 10 bet stations.
+ Physical Unit + 10 bet stations.
*/
ROM_START( cmkenosp )
@@ -821,7 +821,7 @@ ROM_END
/*
Coinmaster Keno (y2k, spanish, 2000-12-02)
- Phisical Unit + 10 bet stations.
+ Physical Unit + 10 bet stations.
*/
ROM_START( cmkenospa )
diff --git a/src/mame/drivers/cvs.cpp b/src/mame/drivers/cvs.cpp
index d7f45887870..6427f13f64f 100644
--- a/src/mame/drivers/cvs.cpp
+++ b/src/mame/drivers/cvs.cpp
@@ -1530,7 +1530,7 @@ ROM_END
/*************************************
*
- * Game specific initalization
+ * Game specific initialization
*
*************************************/
diff --git a/src/mame/drivers/dcon.cpp b/src/mame/drivers/dcon.cpp
index 488e1527c4a..987a560f180 100644
--- a/src/mame/drivers/dcon.cpp
+++ b/src/mame/drivers/dcon.cpp
@@ -17,6 +17,9 @@
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
+#include "sound/3812intf.h"
+#include "sound/ym2151.h"
+#include "sound/okim6295.h"
#include "audio/seibu.h"
#include "includes/dcon.h"
#include "video/seibu_crtc.h"
@@ -261,7 +264,8 @@ static MACHINE_CONFIG_START( dcon, dcon_state )
MCFG_CPU_PROGRAM_MAP(dcon_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dcon_state, irq4_line_hold)
- SEIBU_SOUND_SYSTEM_CPU(4000000) /* Perhaps 14318180/4? */
+ MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* Perhaps 14318180/4? */
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -281,7 +285,19 @@ static MACHINE_CONFIG_START( dcon, dcon_state )
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(4000000,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 4000000)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( sdgndmps, dcon_state )
@@ -291,7 +307,8 @@ static MACHINE_CONFIG_START( sdgndmps, dcon_state )
MCFG_CPU_PROGRAM_MAP(dcon_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dcon_state, irq4_line_hold)
- SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -311,7 +328,20 @@ static MACHINE_CONFIG_START( sdgndmps, dcon_state )
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", 14318180/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
/***************************************************************************/
diff --git a/src/mame/drivers/deadang.cpp b/src/mame/drivers/deadang.cpp
index 0f996db2c44..cbcfe4d6277 100644
--- a/src/mame/drivers/deadang.cpp
+++ b/src/mame/drivers/deadang.cpp
@@ -88,6 +88,28 @@ static ADDRESS_MAP_START( sub_map, AS_PROGRAM, 16, deadang_state )
AM_RANGE(0xe0000, 0xfffff) AM_ROM
ADDRESS_MAP_END
+static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, deadang_state )
+ AM_RANGE(0x0000, 0x1fff) AM_ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM
+ AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
+ AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
+ AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
+ AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
+ AM_RANGE(0x4005, 0x4006) AM_DEVWRITE("adpcm1", seibu_adpcm_device, adr_w)
+ AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
+ AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
+ AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
+ AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
+ AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
+ AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("adpcm1", seibu_adpcm_device, ctl_w)
+ AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
+ AM_RANGE(0x6005, 0x6006) AM_DEVWRITE("adpcm2", seibu_adpcm_device, adr_w)
+ AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_device, read, write)
+ AM_RANGE(0x601a, 0x601a) AM_DEVWRITE("adpcm2", seibu_adpcm_device, ctl_w)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
+ADDRESS_MAP_END
+
/* Input Ports */
static INPUT_PORTS_START( deadang )
@@ -246,8 +268,9 @@ static MACHINE_CONFIG_START( deadang, deadang_state )
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer2", deadang_state, sub_scanline, "screen", 0, 1)
- SEIBU3A_SOUND_SYSTEM_CPU(XTAL_14_31818MHz/4)
- SEIBU_SOUND_SYSTEM_ENCRYPTED_LOW()
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz/4)
+ MCFG_CPU_PROGRAM_MAP(sound_map)
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MCFG_QUANTUM_TIME(attotime::from_hz(60)) // the game stops working with higher interleave rates..
@@ -266,10 +289,26 @@ static MACHINE_CONFIG_START( deadang, deadang_state )
MCFG_PALETTE_ADD("palette", 2048)
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
-
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2203_INTERFACE(XTAL_14_31818MHz/4)
- SEIBU_SOUND_SYSTEM_ADPCM_INTERFACE
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_LOW("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ym1", ym2203_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ym1", ym2203_device, write))
+
+ MCFG_SOUND_ADD("ym1", YM2203, XTAL_14_31818MHz/4)
+ MCFG_YM2203_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
+
+ MCFG_SOUND_ADD("ym2", YM2203, XTAL_14_31818MHz/4)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
+
+ MCFG_SOUND_ADD("adpcm1", SEIBU_ADPCM, 8000)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_SOUND_ADD("adpcm2", SEIBU_ADPCM, 8000)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
MACHINE_CONFIG_END
/* ROMs */
diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp
index 49dcb7a9a70..fabe82a3943 100644
--- a/src/mame/drivers/dec0.cpp
+++ b/src/mame/drivers/dec0.cpp
@@ -2318,7 +2318,7 @@ the music and circuit design from an earlier
capcom game, i can't work out whcih one, but
what an odd thing to do!
-you can see a youtube video of it runnign here:
+you can see a youtube video of it running here:
http://uk.youtube.com/watch?v=Y-KvbKtqzaQ
Rom 21 is full of 0's... i cleaned and re-dumped
diff --git a/src/mame/drivers/dgn_beta.cpp b/src/mame/drivers/dgn_beta.cpp
index 7bbb17f37ab..9763d6467b4 100644
--- a/src/mame/drivers/dgn_beta.cpp
+++ b/src/mame/drivers/dgn_beta.cpp
@@ -120,7 +120,7 @@ static const unsigned char dgnbeta_palette[] =
the memory as described above.
At reset time the Paging would of course be disabled, as the boot rom needs to be
- mapped in at $C000, the initalisation code would set up the mappings above and then
+ mapped in at $C000, the initialisation code would set up the mappings above and then
enable the paging hardware.
It appears to be more complicated than this, whilst the above is true, there appear to
diff --git a/src/mame/drivers/dynduke.cpp b/src/mame/drivers/dynduke.cpp
index 25d6b1f974c..878099ce5c2 100644
--- a/src/mame/drivers/dynduke.cpp
+++ b/src/mame/drivers/dynduke.cpp
@@ -285,8 +285,9 @@ static MACHINE_CONFIG_START( dynduke, dynduke_state )
MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dynduke_state, interrupt)
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
- SEIBU_SOUND_SYSTEM_ENCRYPTED_FULL()
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MCFG_QUANTUM_TIME(attotime::from_hz(3600))
@@ -308,7 +309,19 @@ static MACHINE_CONFIG_START( dynduke, dynduke_state )
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
// sound hardware
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_FULL("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( dbldyn, dynduke )
diff --git a/src/mame/drivers/fidel6502.cpp b/src/mame/drivers/fidel6502.cpp
index d499359e4bc..81e655a07b5 100644
--- a/src/mame/drivers/fidel6502.cpp
+++ b/src/mame/drivers/fidel6502.cpp
@@ -17,9 +17,6 @@
can be removed together with this note when we implement it across MAME.
- verify cpu speed and rom labels where unknown
- EAG missing bankswitch? where is the 2nd half of the 32KB ROM used, if at all?
- - Why does fexcelp give error beeps at start? As if chessboard buttons are
- pressed (button logic is not inverted). It works fine after pressing clear.
- This also happens on real hardware if you manually upgrade model 6080.
******************************************************************************
@@ -2132,14 +2129,14 @@ ROM_START( fscc12 )
ROM_END
-ROM_START( fexcel )
+ROM_START( fexcel ) // PCB label 510.1117A02
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("101-1080a01.ic5", 0x8000, 0x8000, CRC(846f8e40) SHA1(4e1d5b08d5ff3422192b54fa82cb3f505a69a971) ) // same as fexcelv
ROM_END
-#define rom_fexceld rom_fexcelb
+#define rom_fexceld rom_fexcelb /* model 6093, PCB label 510.1117A02 */
-ROM_START( fexcelv )
+ROM_START( fexcelv ) // model 6092, PCB label 510.1117A02, sound PCB 510.1117A01
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("101-1080a01.ic5", 0x8000, 0x8000, CRC(846f8e40) SHA1(4e1d5b08d5ff3422192b54fa82cb3f505a69a971) ) // PCB1, M27256
@@ -2147,28 +2144,28 @@ ROM_START( fexcelv )
ROM_LOAD("101-1081a01.ic2", 0x0000, 0x8000, CRC(c8ae1607) SHA1(6491ce6be60ed77f3dd931c0ca17616f13af943e) ) // PCB2, M27256
ROM_END
-ROM_START( fexcela )
+ROM_START( fexcela ) // PCB label 510-1099A01
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("101-1072a01.ic5", 0xc000, 0x4000, CRC(212b006d) SHA1(242ff851b0841cbec66bbada6a730da021010e2c) )
ROM_END
-ROM_START( fexcelb )
+ROM_START( fexcelb ) // PCB label 510-1099A01
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("101-1072b01.ic5", 0xc000, 0x4000, CRC(fd2f6064) SHA1(f84bb98bdb9565a04891eb6820597d7aecc90c21) ) // RCA
ROM_END
-ROM_START( fexcelp )
+ROM_START( fexcelp ) // model 6083, PCB label 510-1099B01
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("par_ex.ic5", 0x8000, 0x8000, CRC(274d6aff) SHA1(c8d943b2f15422ac62f539b568f5509cbce568a3) ) // GI 27C256, no label
+ ROM_LOAD("par_ex.ic5", 0x8000, 0x8000, CRC(0d17b0f0) SHA1(3a6070fd4718c62b62ff0f08637bb6eb84eb9a1c) ) // GI 27C256, no label
ROM_END
-ROM_START( fdes2000 )
+ROM_START( fdes2000 ) // model 6102, PCB label 510.1129A01
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("101-1077a01.ic5", 0x8000, 0x8000, CRC(62006320) SHA1(1d6370973dbae42c54639b261cc81e32cdfc1d5d) ) // AMI
ROM_END
-ROM_START( fdes2100d ) // The 'rev B' dump came from a post-release bugfix by Fidelity
+ROM_START( fdes2100d ) // model 6106, PCB label 510.1130A01. The 'rev B' dump came from a post-release bugfix by Fidelity
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("i9_orange.ic9", 0x8000, 0x8000, CRC(83fec02a) SHA1(6f43ab05bc605061989b05d0592dbd184efff9d4) ) // WSI 27C256L-12
@@ -2177,7 +2174,7 @@ ROM_START( fdes2100d ) // The 'rev B' dump came from a post-release bugfix by Fi
ROM_END
-ROM_START( chesster )
+ROM_START( chesster ) // model 6120, PCB label 510.1141C01
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("chesster.ic9", 0x8000, 0x8000, CRC(29f9a698) SHA1(4c83ca46fd5fc9c40302e9c7f16b4ae2c18b06e6) ) // M27C256B, sticker but no label
diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp
index e6343581e9c..9fae822558c 100644
--- a/src/mame/drivers/fidel68k.cpp
+++ b/src/mame/drivers/fidel68k.cpp
@@ -546,7 +546,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( fexcel68k, fidel68k_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_12MHz)
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_12MHz) // HD68HC000P12
MCFG_CPU_PROGRAM_MAP(fexcel68k_map)
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel68k_state, irq_on, attotime::from_hz(618)) // theoretical frequency from 556 timer (22nf, 91K + 20K POT @ 14.8K, 0.1K), measurement was 580Hz
MCFG_TIMER_START_DELAY(attotime::from_hz(618) - attotime::from_nsec(1525)) // active for 1.525us
diff --git a/src/mame/drivers/fidelz80.cpp b/src/mame/drivers/fidelz80.cpp
index 2b83446de32..c468c229d32 100644
--- a/src/mame/drivers/fidelz80.cpp
+++ b/src/mame/drivers/fidelz80.cpp
@@ -37,7 +37,7 @@
- TM: Time
Peripherals, compatible with various boards:
- - Fidelity Challenger Printer - thermal printer, MCU=?
+ - Fidelity Challenger Printer - thermal printer, MCU=D8048C243
Program/data cartridges, for various boards, some cross-compatible:
- CG6: Greatest Chess Games 1
diff --git a/src/mame/drivers/fmtowns.cpp b/src/mame/drivers/fmtowns.cpp
index 425169915c3..e434afa7888 100644
--- a/src/mame/drivers/fmtowns.cpp
+++ b/src/mame/drivers/fmtowns.cpp
@@ -181,6 +181,7 @@ Notes:
#include "bus/scsi/scsihd.h"
#include "softlist.h"
+
// CD controller IRQ types
#define TOWNS_CD_IRQ_MPU 1
#define TOWNS_CD_IRQ_DMA 2
@@ -2143,8 +2144,8 @@ static ADDRESS_MAP_START(towns_mem, AS_PROGRAM, 32, towns_state)
// AM_RANGE(0x00100000, 0x005fffff) AM_RAM // some extra RAM
AM_RANGE(0x80000000, 0x8007ffff) AM_READWRITE8(towns_gfx_high_r,towns_gfx_high_w,0xffffffff) AM_MIRROR(0x180000) // VRAM
AM_RANGE(0x81000000, 0x8101ffff) AM_READWRITE8(towns_spriteram_r,towns_spriteram_w,0xffffffff) // Sprite RAM
- // 0xc0000000 - 0xc0ffffff // IC Memory Card (static, first 16MB only)
- // 0xc1000000 - 0xc1ffffff // IC Memory Card (banked, can show any of 4 banks), JEIDA v4 only (UX and later)
+ AM_RANGE(0xc0000000, 0xc0ffffff) AM_DEVREADWRITE8("icmemcard", fmt_icmem_device, static_mem_read, static_mem_write, 0xffffffff)
+ AM_RANGE(0xc1000000, 0xc1ffffff) AM_DEVREADWRITE8("icmemcard", fmt_icmem_device, mem_read, mem_write, 0xffffffff)
AM_RANGE(0xc2000000, 0xc207ffff) AM_ROM AM_REGION("user",0x000000) // OS ROM
AM_RANGE(0xc2080000, 0xc20fffff) AM_ROM AM_REGION("user",0x100000) // DIC ROM
AM_RANGE(0xc2100000, 0xc213ffff) AM_ROM AM_REGION("user",0x180000) // FONT ROM
@@ -2172,7 +2173,7 @@ static ADDRESS_MAP_START(marty_mem, AS_PROGRAM, 16, towns_state)
AM_RANGE(0x00a00000, 0x00a7ffff) AM_READWRITE8(towns_gfx_high_r,towns_gfx_high_w,0xffff) AM_MIRROR(0x180000) // VRAM
AM_RANGE(0x00b00000, 0x00b7ffff) AM_ROM AM_REGION("user",0x180000) // FONT
AM_RANGE(0x00c00000, 0x00c1ffff) AM_READWRITE8(towns_spriteram_r,towns_spriteram_w,0xffff) // Sprite RAM
- AM_RANGE(0x00d00000, 0x00dfffff) AM_RAM // IC Memory Card (is this usable on the Marty?)
+ AM_RANGE(0x00d00000, 0x00dfffff) AM_DEVREADWRITE8("icmemcard", fmt_icmem_device, mem_read, mem_write, 0xffff)
AM_RANGE(0x00e80000, 0x00efffff) AM_ROM AM_REGION("user",0x100000) // DIC ROM
AM_RANGE(0x00f00000, 0x00f7ffff) AM_ROM AM_REGION("user",0x180000) // FONT
AM_RANGE(0x00f80000, 0x00f8ffff) AM_DEVREADWRITE8("pcm", rf5c68_device, rf5c68_mem_r, rf5c68_mem_w, 0xffff) // WAVE RAM
@@ -2195,7 +2196,7 @@ static ADDRESS_MAP_START(ux_mem, AS_PROGRAM, 16, towns_state)
AM_RANGE(0x00a00000, 0x00a7ffff) AM_READWRITE8(towns_gfx_high_r,towns_gfx_high_w,0xffff) AM_MIRROR(0x180000) // VRAM
AM_RANGE(0x00b00000, 0x00b7ffff) AM_ROM AM_REGION("user",0x180000) // FONT
AM_RANGE(0x00c00000, 0x00c1ffff) AM_READWRITE8(towns_spriteram_r,towns_spriteram_w,0xffff) // Sprite RAM
- AM_RANGE(0x00d00000, 0x00dfffff) AM_RAM // IC Memory Card
+ AM_RANGE(0x00d00000, 0x00dfffff) AM_DEVREADWRITE8("icmemcard", fmt_icmem_device, mem_read, mem_write, 0xffff)
AM_RANGE(0x00e00000, 0x00e7ffff) AM_ROM AM_REGION("user",0x000000) // OS
AM_RANGE(0x00e80000, 0x00efffff) AM_ROM AM_REGION("user",0x100000) // DIC ROM
AM_RANGE(0x00f00000, 0x00f7ffff) AM_ROM AM_REGION("user",0x180000) // FONT
@@ -2229,6 +2230,9 @@ static ADDRESS_MAP_START( towns_io , AS_IO, 32, towns_state)
AM_RANGE(0x0440,0x045f) AM_READWRITE8(towns_video_440_r, towns_video_440_w, 0xffffffff)
// System port
AM_RANGE(0x0480,0x0483) AM_READWRITE8(towns_sys480_r,towns_sys480_w,0x000000ff) // R/W (0x480)
+ // IC Memory Card
+ AM_RANGE(0x0488,0x048b) AM_DEVREAD8("icmemcard",fmt_icmem_device,status_r,0x00ff0000)
+ AM_RANGE(0x0490,0x0493) AM_DEVREADWRITE8("icmemcard",fmt_icmem_device,bank_r,bank_w,0x0000ffff)
// CD-ROM
AM_RANGE(0x04c0,0x04cf) AM_READWRITE8(towns_cdrom_r,towns_cdrom_w,0x00ff00ff)
// Joystick / Mouse ports
@@ -2281,6 +2285,9 @@ static ADDRESS_MAP_START( towns16_io , AS_IO, 16, towns_state) // for the 386SX
AM_RANGE(0x0440,0x045f) AM_READWRITE8(towns_video_440_r, towns_video_440_w, 0xffff)
// System port
AM_RANGE(0x0480,0x0481) AM_READWRITE8(towns_sys480_r,towns_sys480_w,0x00ff) // R/W (0x480)
+ // IC Memory Card
+ AM_RANGE(0x048a,0x048b) AM_DEVREAD8("icmemcard",fmt_icmem_device,status_r,0x00ff)
+ AM_RANGE(0x0490,0x0491) AM_DEVREADWRITE8("icmemcard",fmt_icmem_device,bank_r,bank_w,0xffff)
// CD-ROM
AM_RANGE(0x04c0,0x04cf) AM_READWRITE8(towns_cdrom_r,towns_cdrom_w,0x00ff)
// Joystick / Mouse ports
@@ -2322,7 +2329,7 @@ static INPUT_PORTS_START( towns )
PORT_CONFSETTING(0x20, "Mouse")
PORT_CONFSETTING(0x40, "6-button joystick")
-// Keyboard
+ // Keyboard
PORT_START( "key1" ) // scancodes 0x00-0x1f
PORT_BIT(0x00000001,IP_ACTIVE_HIGH,IPT_UNUSED)
PORT_BIT(0x00000002,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("ESC") PORT_CODE(KEYCODE_TILDE) PORT_CHAR(27)
@@ -2768,6 +2775,8 @@ static MACHINE_CONFIG_FRAGMENT( towns_base )
//MCFG_VIDEO_START_OVERRIDE(towns_state,towns)
+ MCFG_FMT_ICMEMCARD_ADD("icmemcard")
+
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("6M")
diff --git a/src/mame/drivers/freekick.cpp b/src/mame/drivers/freekick.cpp
index 6f4d93f3705..b94db7bfd8c 100644
--- a/src/mame/drivers/freekick.cpp
+++ b/src/mame/drivers/freekick.cpp
@@ -838,7 +838,7 @@ ROM_START( freekick )
ROM_LOAD( "24s10n.7h", 0x0500, 0x0100, CRC(a507f941) SHA1(97619959ee4c366cb010525636ab5eefe5a3127a) )
ROM_END
-ROM_START( freekicka ) /* The bootlegs are derived from this set, "freekbl8.q7" is identical but includes more addresss space then needed */
+ROM_START( freekicka ) /* The bootlegs are derived from this set, "freekbl8.q7" is identical but includes more address space then needed */
ROM_REGION( 0x0d000, "maincpu", 0 ) /* Z80 Code, internal program RAM is 52K in custom cpu module */
ROM_LOAD( "ns6201-a_1987.9_free_kick.cpu", 0x00000, 0x0d000, CRC(acc0a278) SHA1(27675870ece29ccd5135ca20fb2fa91125945ec5) )
diff --git a/src/mame/drivers/goodejan.cpp b/src/mame/drivers/goodejan.cpp
index 9d3eb5f1284..0d546506d34 100644
--- a/src/mame/drivers/goodejan.cpp
+++ b/src/mame/drivers/goodejan.cpp
@@ -74,6 +74,7 @@ Secret menu hack [totmejan only] (I couldn't find official way to enter, so it's
#include "cpu/nec/nec.h"
#include "audio/seibu.h"
#include "sound/3812intf.h"
+#include "sound/okim6295.h"
#include "video/seibu_crtc.h"
@@ -634,7 +635,8 @@ static MACHINE_CONFIG_START( goodejan, goodejan_state )
MCFG_CPU_IO_MAP(goodejan_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", goodejan_state, irq)
- SEIBU_SOUND_SYSTEM_CPU(GOODEJAN_MHZ1/2)
+ MCFG_CPU_ADD("audiocpu", Z80, GOODEJAN_MHZ1/2)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -654,7 +656,19 @@ static MACHINE_CONFIG_START( goodejan, goodejan_state )
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(GOODEJAN_MHZ1/2,GOODEJAN_MHZ2/16)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, GOODEJAN_MHZ1/2)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", GOODEJAN_MHZ2/16, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( totmejan, goodejan )
diff --git a/src/mame/drivers/hec2hrp.cpp b/src/mame/drivers/hec2hrp.cpp
index d847af779ca..012b852d1cc 100644
--- a/src/mame/drivers/hec2hrp.cpp
+++ b/src/mame/drivers/hec2hrp.cpp
@@ -38,7 +38,7 @@
(thank's Daniel)
03/01/2010 Update and clean prog by yo_fr (jj.stac@aliceadsl.fr)
=> add the port mapping for keyboard
- 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M runnig! JJStacino
+ 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
11/11/2011 : add the minidisque support -3 pouces 1/2 driver- JJStacino
don't forget to keep some information about these machine see DChector project : http://dchector.free.fr/ made by DanielCoulom
diff --git a/src/mame/drivers/hp9k.cpp b/src/mame/drivers/hp9k.cpp
index a60d7f00fad..774a76632e2 100644
--- a/src/mame/drivers/hp9k.cpp
+++ b/src/mame/drivers/hp9k.cpp
@@ -72,7 +72,7 @@ static uint8_t prom16a[256] = {
0xff,
0xff,
0xff,
- 0xff,0xfe,0x00,0x00, // bottom minimun address for ram size
+ 0xff,0xfe,0x00,0x00, // bottom minimum address for ram size
0xff,0xff, // 16 required IO cards here not used
0xff,0xff,
0xff,0xff,
diff --git a/src/mame/drivers/isbc.cpp b/src/mame/drivers/isbc.cpp
index 299d117ed72..df24679d7d7 100644
--- a/src/mame/drivers/isbc.cpp
+++ b/src/mame/drivers/isbc.cpp
@@ -66,6 +66,8 @@ void isbc_state::machine_reset()
m_centronics->write_busy(0); // centronics_device sets busy to 1 at reset causing spurious irqs
m_pic_1->ir7_w(0);
}
+ if(m_uart8251)
+ m_uart8251->write_cts(0);
}
static ADDRESS_MAP_START(rpc86_mem, AS_PROGRAM, 16, isbc_state)
@@ -261,7 +263,10 @@ static MACHINE_CONFIG_START( rpc86, isbc_state )
MCFG_I8251_RXRDY_HANDLER(DEVWRITELINE("pic_0", pic8259_device, ir6_w))
/* video hardware */
- MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr)
+ MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart8251", i8251_device, write_rxd))
+ //MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart8251", i8251_device, write_cts))
+ MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart8251", i8251_device, write_dsr))
MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, nullptr)
//MCFG_ISBX_SLOT_MINTR0_CALLBACK(DEVWRITELINE("pic_0", pic8259_device, ir3_w))
@@ -348,6 +353,19 @@ ROM_START( isbc86 )
ROM_LOAD16_BYTE( "8612_3l.bin", 0x2000, 0x1000, CRC(17f27ad2) SHA1(c3f379ac7d67dc4a0a7a611a0bc6323b8a3d4840))
ROM_END
+ROM_START( isbc8605 )
+ ROM_REGION( 0x4000, "user1", ROMREGION_ERASEFF )
+ ROM_LOAD( "i8605mon.bin", 0x0000, 0x4000, CRC(e16acb6e) SHA1(eb9a3fd21f7609d44f8052b6a0603ecbb52dc3f3))
+ROM_END
+
+ROM_START( isbc8630 )
+ ROM_REGION( 0x4000, "user1", ROMREGION_ERASEFF )
+ ROM_LOAD16_BYTE( "143780-001_isdm_for_isbc_86-30_socket_u57_i2732a.bin", 0x0000, 0x1000, CRC(db0ef880) SHA1(8ef296066d16881217618e54b410d12157f318ea))
+ ROM_LOAD16_BYTE( "143782-001_isdm_for_isbc_86-30_socket_u39_i2732a.bin", 0x0001, 0x1000, CRC(ea1ebe78) SHA1(f03b63659e8f5e96f481dbc6c2ddef1d22850ebb))
+ ROM_LOAD16_BYTE( "143781-001_isdm_for_isbc_86-30_socket_u58_i2732a.bin", 0x2000, 0x1000, CRC(93732612) SHA1(06e751d0f5ab1fe2c52fd79f6f4725ccf3379791))
+ ROM_LOAD16_BYTE( "143783-001_isdm_for_isbc_86-30_socket_u40_i2732a.bin", 0x2001, 0x1000, CRC(337102d5) SHA1(535f63d24c3948187b208ea594f979bc33579a15))
+ROM_END
+
ROM_START( isbc286 )
ROM_REGION( 0x20000, "user1", ROMREGION_ERASEFF )
ROM_LOAD16_BYTE( "u79.bin", 0x00001, 0x10000, CRC(144182ea) SHA1(4620ca205a6ac98fe2636183eaead7c4bfaf7a72))
@@ -356,10 +374,16 @@ ROM_END
ROM_START( isbc2861 )
ROM_REGION( 0x10000, "user1", ROMREGION_ERASEFF )
- ROM_LOAD16_BYTE( "174894-001.bin", 0x0000, 0x4000, CRC(79e4f7af) SHA1(911a4595d35e6e82b1149e75bb027927cd1c1658))
- ROM_LOAD16_BYTE( "174894-002.bin", 0x0001, 0x4000, CRC(66747d21) SHA1(4094b1f10a8bc7db8d6dd48d7128e14e875776c7))
- ROM_LOAD16_BYTE( "174894-003.bin", 0x8000, 0x4000, CRC(c98c7f17) SHA1(6e9a14aedd630824dccc5eb6052867e73b1d7db6))
- ROM_LOAD16_BYTE( "174894-004.bin", 0x8001, 0x4000, CRC(61bc1dc9) SHA1(feed5a5f0bb4630c8f6fa0d5cca30654a80b4ee5))
+ ROM_SYSTEM_BIOS( 0, "v11", "iSDM Monitor V1.1" )
+ ROMX_LOAD( "174894-001.bin", 0x0000, 0x4000, CRC(79e4f7af) SHA1(911a4595d35e6e82b1149e75bb027927cd1c1658), ROM_SKIP(1) | ROM_BIOS(1))
+ ROMX_LOAD( "174894-002.bin", 0x0001, 0x4000, CRC(66747d21) SHA1(4094b1f10a8bc7db8d6dd48d7128e14e875776c7), ROM_SKIP(1) | ROM_BIOS(1))
+ ROMX_LOAD( "174894-003.bin", 0x8000, 0x4000, CRC(c98c7f17) SHA1(6e9a14aedd630824dccc5eb6052867e73b1d7db6), ROM_SKIP(1) | ROM_BIOS(1))
+ ROMX_LOAD( "174894-004.bin", 0x8001, 0x4000, CRC(61bc1dc9) SHA1(feed5a5f0bb4630c8f6fa0d5cca30654a80b4ee5), ROM_SKIP(1) | ROM_BIOS(1))
+ ROM_SYSTEM_BIOS( 1, "v10", "iSDM Monitor V1.0" )
+ ROMX_LOAD( "rmx286-_in_socket_u41_on_isbc_286-10.bin.u41", 0x0000, 0x4000, CRC(00996834) SHA1(a17a0f8909be642d89199660b24574b71a9d0c13), ROM_SKIP(1) | ROM_BIOS(2))
+ ROMX_LOAD( "rmx286-_in_socket_u76_on_isbc_286-10.bin.u76", 0x0001, 0x4000, CRC(90c9c7e8) SHA1(b5f961ab236976713266fe7a378e8750825fd5dc), ROM_SKIP(1) | ROM_BIOS(2))
+ ROMX_LOAD( "rmx286-_in_socket_u40_on_isbc_286-10.bin.u40", 0x8000, 0x4000, CRC(35716c9b) SHA1(5b717b4c2f6c59ec140635df7448294a22123a16), ROM_SKIP(1) | ROM_BIOS(2))
+ ROMX_LOAD( "rmx286-_in_socket_u75_on_isbc_286-10.bin.u75", 0x8001, 0x4000, CRC(68c3eb50) SHA1(3eeef2676e4fb187adb8ab50645f4bd172426c15), ROM_SKIP(1) | ROM_BIOS(2))
ROM_END
ROM_START( rpc86 )
@@ -374,5 +398,7 @@ ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
COMP( 19??, rpc86, 0, 0, rpc86, isbc, driver_device, 0, "Intel", "RPC 86",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 1978, isbc86, 0, 0, isbc86, isbc, driver_device, 0, "Intel", "iSBC 86/12A",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+COMP( 1981, isbc8605, 0, 0, rpc86, isbc, driver_device, 0, "Intel", "iSBC 86/05",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+COMP( 1981, isbc8630, 0, 0, rpc86, isbc, driver_device, 0, "Intel", "iSBC 86/30",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 19??, isbc286, 0, 0, isbc286, isbc, driver_device, 0, "Intel", "iSBC 286",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
-COMP( 1983, isbc2861, 0, 0, isbc2861, isbc, driver_device, 0, "Intel", "iSBC 286/10",MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+COMP( 1983, isbc2861, 0, 0, isbc2861, isbc, driver_device, 0, "Intel", "iSBC 286/10", MACHINE_NO_SOUND)
diff --git a/src/mame/drivers/jubilee.cpp b/src/mame/drivers/jubilee.cpp
index ccd5ad9fc33..f7baa860525 100644
--- a/src/mame/drivers/jubilee.cpp
+++ b/src/mame/drivers/jubilee.cpp
@@ -48,10 +48,10 @@
the 2114 find the 74148 or 74ls148, all 9980 cpu's use one, pin3 will generate a reset.
The 5517 ram is compatible with 6116 or 2018.
- The 9980 has 3 interupt inputs, but they are binary.
- The ls148 encodes the interupts to the cpu - the highest interupt is reset.
+ The 9980 has 3 interrupt inputs, but they are binary.
+ The ls148 encodes the interrupts to the cpu - the highest interrupt is reset.
- I tried pulling pin 3 of the 74ls148 low and yes, this sets up the reset interupt
+ I tried pulling pin 3 of the 74ls148 low and yes, this sets up the reset interrupt
on pins 23, 24 and 25. The TC5517 checks out ok as a 6116.
The crystal seems ok and this clock makes it throught to pin 34 of the MPU.
diff --git a/src/mame/drivers/kas89.cpp b/src/mame/drivers/kas89.cpp
index 0a9b434674e..8c9f1ea8b4a 100644
--- a/src/mame/drivers/kas89.cpp
+++ b/src/mame/drivers/kas89.cpp
@@ -6,7 +6,7 @@
/\/\<< Kasino '89 >>/\/\
6-players electronic roulette.
- Video field + phisical LEDs roulette.
+ Video field + physical LEDs roulette.
Driver by Roberto Fresca.
diff --git a/src/ldplayer/ldplayer.cpp b/src/mame/drivers/ldplayer.cpp
index 37b9c170573..bc5feb2d458 100644
--- a/src/ldplayer/ldplayer.cpp
+++ b/src/mame/drivers/ldplayer.cpp
@@ -15,34 +15,10 @@
#include "machine/ldpr8210.h"
#include "machine/ldv1000.h"
#include <ctype.h>
+#include "ui/uimain.h"
#include "pr8210.lh"
-
-#define APPNAME "MAME"
-#define APPNAME_LOWER "mame"
-#define CONFIGNAME "mame"
-#define COPYRIGHT "Copyright Nicola Salmoria\nand the MAME team\nhttp://mamedev.org"
-#define COPYRIGHT_INFO "Copyright Nicola Salmoria and the MAME team"
-
-const char * emulator_info::get_appname() { return APPNAME;}
-const char * emulator_info::get_appname_lower() { return APPNAME_LOWER;}
-const char * emulator_info::get_configname() { return CONFIGNAME;}
-const char * emulator_info::get_copyright() { return COPYRIGHT;}
-const char * emulator_info::get_copyright_info() { return COPYRIGHT_INFO;}
-
-/*************************************
- *
- * Constants
- *
- *************************************/
-
-/*************************************
- *
- * Globals
- *
- *************************************/
-
class ldplayer_state : public driver_device
{
public:
@@ -214,8 +190,10 @@ chd_file *ldplayer_state::get_disc()
}
// if we failed, pop a message and exit
- if (found == false)
- throw emu_fatalerror("No valid image file found!\n");
+ if (found == false) {
+ machine().ui().popup_time(10, "No valid image file found!\n");
+ return nullptr;
+ }
return machine().rom_load().get_disk_handle("laserdisc");
}
@@ -670,12 +648,12 @@ MACHINE_CONFIG_END
*
*************************************/
-ROM_START( ldv1000 )
+ROM_START( simldv1000 )
DISK_REGION( "laserdisc" )
ROM_END
-ROM_START( pr8210 )
+ROM_START( simpr8210 )
DISK_REGION( "laserdisc" )
ROM_END
@@ -687,5 +665,5 @@ ROM_END
*
*************************************/
-GAME( 2008, ldv1000, 0, ldv1000, ldplayer, driver_device, 0, ROT0, "MAME", "Pioneer LDV-1000 Simulator", 0 )
-GAMEL(2008, pr8210, 0, pr8210, ldplayer, driver_device, 0, ROT0, "MAME", "Pioneer PR-8210 Simulator", 0, layout_pr8210 )
+GAME( 2008, simldv1000, 0, ldv1000, ldplayer, driver_device, 0, ROT0, "MAME", "Pioneer LDV-1000 Simulator", 0 )
+GAMEL(2008, simpr8210, 0, pr8210, ldplayer, driver_device, 0, ROT0, "MAME", "Pioneer PR-8210 Simulator", 0, layout_pr8210 )
diff --git a/src/mame/drivers/legionna.cpp b/src/mame/drivers/legionna.cpp
index 3877657df2a..2cd7d796634 100644
--- a/src/mame/drivers/legionna.cpp
+++ b/src/mame/drivers/legionna.cpp
@@ -83,6 +83,7 @@ Preliminary COP MCU memory map
#include "emu.h"
#include "cpu/z80/z80.h"
#include "sound/3812intf.h"
+#include "sound/ym2151.h"
#include "cpu/m68000/m68000.h"
#include "machine/seicop.h"
#include "includes/legionna.h"
@@ -1157,7 +1158,8 @@ static MACHINE_CONFIG_START( legionna, legionna_state )
MCFG_CPU_PROGRAM_MAP(legionna_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1183,7 +1185,19 @@ static MACHINE_CONFIG_START( legionna, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,legionna)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
@@ -1194,7 +1208,8 @@ static MACHINE_CONFIG_START( heatbrl, legionna_state )
MCFG_CPU_PROGRAM_MAP(heatbrl_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1222,7 +1237,19 @@ static MACHINE_CONFIG_START( heatbrl, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,heatbrl)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( godzilla, legionna_state )
@@ -1232,7 +1259,8 @@ static MACHINE_CONFIG_START( godzilla, legionna_state )
MCFG_CPU_PROGRAM_MAP(godzilla_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
- SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1261,7 +1289,20 @@ static MACHINE_CONFIG_START( godzilla, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,godzilla)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", 14318180/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( denjinmk, legionna_state )
@@ -1271,7 +1312,8 @@ static MACHINE_CONFIG_START( denjinmk, legionna_state )
MCFG_CPU_PROGRAM_MAP(denjinmk_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
- SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1299,7 +1341,20 @@ static MACHINE_CONFIG_START( denjinmk, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,denjinmk)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", 14318180/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( grainbow, legionna_state )
@@ -1309,7 +1364,8 @@ static MACHINE_CONFIG_START( grainbow, legionna_state )
MCFG_CPU_PROGRAM_MAP(grainbow_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
- SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1337,7 +1393,20 @@ static MACHINE_CONFIG_START( grainbow, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,grainbow)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", 14318180/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
@@ -1348,7 +1417,8 @@ static MACHINE_CONFIG_START( cupsoc, legionna_state )
MCFG_CPU_PROGRAM_MAP(cupsoc_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_DEVICE_ADD("raiden2cop", RAIDEN2COP, 0)
MCFG_RAIDEN2COP_VIDEORAM_OUT_CB(WRITE16(legionna_state, videowrite_cb_w))
@@ -1376,7 +1446,20 @@ static MACHINE_CONFIG_START( cupsoc, legionna_state )
MCFG_VIDEO_START_OVERRIDE(legionna_state,cupsoc)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_YM2151_ADD("ymsnd", 14318180/4)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cupsocs, cupsoc )
diff --git a/src/mame/drivers/mac128.cpp b/src/mame/drivers/mac128.cpp
index 2885eaf2250..2892cf1d74e 100755
--- a/src/mame/drivers/mac128.cpp
+++ b/src/mame/drivers/mac128.cpp
@@ -104,7 +104,6 @@ c0 8 data bits, Rx disabled
#define MACKBD_TAG "mackbd"
#define DAC_TAG "macdac"
#define SCC_TAG "scc"
-#define OVERLAY_TAG "bank1"
#define C7M (7833600)
#define C3_7M (3916800)
@@ -127,8 +126,8 @@ enum mac128model_t
#define MAC_V_TOTAL (370) // (342+28)
// sound buffer locations
-#define MAC_MAIN_SND_BUF_OFFSET 0x0300
-#define MAC_ALT_SND_BUF_OFFSET 0x5F00
+#define MAC_MAIN_SND_BUF_OFFSET (0x0300>>1)
+#define MAC_ALT_SND_BUF_OFFSET (0x5F00>>1)
#define LOG_KEYBOARD 0
#define LOG_GENERAL 0
@@ -222,6 +221,10 @@ public:
void vblank_irq();
void mouse_callback();
+ DECLARE_READ16_MEMBER ( ram_r );
+ DECLARE_WRITE16_MEMBER ( ram_w );
+ DECLARE_READ16_MEMBER ( ram_600000_r );
+ DECLARE_WRITE16_MEMBER ( ram_600000_w );
DECLARE_READ16_MEMBER ( mac_via_r );
DECLARE_WRITE16_MEMBER ( mac_via_w );
DECLARE_READ16_MEMBER ( mac_autovector_r );
@@ -232,19 +235,7 @@ public:
DECLARE_WRITE16_MEMBER ( macplus_scsi_w );
DECLARE_WRITE_LINE_MEMBER(mac_scsi_irq);
DECLARE_WRITE_LINE_MEMBER(set_scc_interrupt);
-
-private:
- // wait states for accessing the VIA
- int m_via_cycles;
- bool m_snd_enable;
- bool m_main_buffer;
- int m_snd_vol;
-
- required_device<screen_device> m_screen;
- required_device<dac_8bit_pwm_device> m_dac;
- required_device<z80scc_device> m_scc;
-public:
TIMER_DEVICE_CALLBACK_MEMBER(mac_scanline);
DECLARE_DRIVER_INIT(mac128k512k);
DECLARE_DRIVER_INIT(mac512ke);
@@ -269,12 +260,27 @@ public:
void keyboard_receive(int val);
void mac_driver_init(mac128model_t model);
void update_volume();
+
+private:
+ // wait states for accessing the VIA
+ int m_via_cycles;
+ bool m_snd_enable;
+ bool m_main_buffer;
+ int m_snd_vol;
+ u16 *m_ram_ptr, *m_rom_ptr;
+ u32 m_ram_mask, m_ram_size;
+
+ required_device<screen_device> m_screen;
+ required_device<dac_8bit_pwm_device> m_dac;
+ required_device<z80scc_device> m_scc;
};
void mac128_state::machine_start()
{
- membank(OVERLAY_TAG)->configure_entry(0, m_ram->pointer());
- membank(OVERLAY_TAG)->configure_entry(1, memregion("bootrom")->base());
+ m_ram_ptr = (u16*)m_ram->pointer();
+ m_ram_size = m_ram->size()>>1;
+ m_ram_mask = m_ram_size - 1;
+ m_rom_ptr = (u16*)memregion("bootrom")->base();
}
void mac128_state::machine_reset()
@@ -282,7 +288,6 @@ void mac128_state::machine_reset()
m_via_cycles = -10;
m_last_taken_interrupt = -1;
m_overlay = 1;
- membank(OVERLAY_TAG)->set_entry(1);
m_maincpu->reset();
m_screen_buffer = 1;
#ifndef MAC_USE_EMULATED_KBD
@@ -302,6 +307,34 @@ void mac128_state::machine_reset()
m_ca2_data = 0;
}
+READ16_MEMBER(mac128_state::ram_r)
+{
+ if (m_overlay)
+ {
+ return m_rom_ptr[offset];
+ }
+
+ return m_ram_ptr[offset & m_ram_mask];
+}
+
+WRITE16_MEMBER(mac128_state::ram_w)
+{
+ if (!m_overlay)
+ {
+ COMBINE_DATA(&m_ram_ptr[offset & m_ram_mask]);
+ }
+}
+
+READ16_MEMBER(mac128_state::ram_600000_r)
+{
+ return m_ram_ptr[offset & m_ram_mask];
+}
+
+WRITE16_MEMBER(mac128_state::ram_600000_w)
+{
+ COMBINE_DATA(&m_ram_ptr[offset & m_ram_mask]);
+}
+
void mac128_state::field_interrupts()
{
int take_interrupt = -1;
@@ -392,11 +425,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(mac128_state::mac_scanline)
if (m_main_buffer)
{
- mac_snd_buf_ptr = (uint16_t *)(m_ram->pointer() + m_ram->size() - MAC_MAIN_SND_BUF_OFFSET);
+ mac_snd_buf_ptr = (uint16_t *)(m_ram_ptr + m_ram_size - MAC_MAIN_SND_BUF_OFFSET);
}
else
{
- mac_snd_buf_ptr = (uint16_t *)(m_ram->pointer() + m_ram->size() - MAC_ALT_SND_BUF_OFFSET);
+ mac_snd_buf_ptr = (uint16_t *)(m_ram_ptr + m_ram_size - MAC_ALT_SND_BUF_OFFSET);
}
m_dac->write(mac_snd_buf_ptr[scanline] >> 8);
@@ -711,7 +744,6 @@ WRITE8_MEMBER(mac128_state::mac_via_out_a)
if (((data & 0x10) >> 4) != m_overlay)
{
m_overlay = (data & 0x10) >> 4;
- membank(OVERLAY_TAG)->set_entry(m_overlay);
}
}
@@ -1151,7 +1183,6 @@ void mac128_state::mac_driver_init(mac128model_t model)
void mac128_state::mac128_state_load()
{
- membank(OVERLAY_TAG)->set_entry(m_overlay);
}
PALETTE_INIT_MEMBER(mac128_state,mac)
@@ -1164,8 +1195,8 @@ VIDEO_START_MEMBER(mac128_state,mac)
{
}
-#define MAC_MAIN_SCREEN_BUF_OFFSET 0x5900
-#define MAC_ALT_SCREEN_BUF_OFFSET 0xD900
+#define MAC_MAIN_SCREEN_BUF_OFFSET (0x5900>>1)
+#define MAC_ALT_SCREEN_BUF_OFFSET (0xD900>>1)
uint32_t mac128_state::screen_update_mac(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
@@ -1175,8 +1206,8 @@ uint32_t mac128_state::screen_update_mac(screen_device &screen, bitmap_ind16 &bi
uint16_t *line;
int y, x, b;
- video_base = m_ram->size() - (m_screen_buffer ? MAC_MAIN_SCREEN_BUF_OFFSET : MAC_ALT_SCREEN_BUF_OFFSET);
- video_ram = (const uint16_t *) (m_ram->pointer() + video_base);
+ video_base = m_ram_size - (m_screen_buffer ? MAC_MAIN_SCREEN_BUF_OFFSET : MAC_ALT_SCREEN_BUF_OFFSET);
+ video_ram = (const uint16_t *) (m_ram_ptr + video_base);
for (y = 0; y < MAC_V_VIS; y++)
{
@@ -1209,8 +1240,9 @@ MAC_DRIVER_INIT(macplus, MODEL_MAC_PLUS)
***************************************************************************/
static ADDRESS_MAP_START(mac512ke_map, AS_PROGRAM, 16, mac128_state )
- AM_RANGE(0x000000, 0x3fffff) AM_RAMBANK(OVERLAY_TAG)
+ AM_RANGE(0x000000, 0x3fffff) AM_READWRITE(ram_r, ram_w)
AM_RANGE(0x400000, 0x4fffff) AM_ROM AM_REGION("bootrom", 0) AM_MIRROR(0x100000)
+ AM_RANGE(0x600000, 0x6fffff) AM_READWRITE(ram_600000_r, ram_600000_w)
AM_RANGE(0x800000, 0x9fffff) AM_DEVREAD8(SCC_TAG, z80scc_device, cd_ab_r, 0xff00)
AM_RANGE(0xa00000, 0xbfffff) AM_DEVWRITE8(SCC_TAG, z80scc_device, cd_ab_w, 0x00ff)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(mac_iwm_r, mac_iwm_w)
@@ -1219,7 +1251,7 @@ static ADDRESS_MAP_START(mac512ke_map, AS_PROGRAM, 16, mac128_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START(macplus_map, AS_PROGRAM, 16, mac128_state )
- AM_RANGE(0x000000, 0x3fffff) AM_RAMBANK(OVERLAY_TAG)
+ AM_RANGE(0x000000, 0x3fffff) AM_READWRITE(ram_r, ram_w)
AM_RANGE(0x400000, 0x4fffff) AM_ROM AM_REGION("bootrom", 0)
AM_RANGE(0x580000, 0x5fffff) AM_READWRITE(macplus_scsi_r, macplus_scsi_w)
AM_RANGE(0x800000, 0x9fffff) AM_DEVREAD8(SCC_TAG, z80scc_device, cd_ab_r, 0xff00)
diff --git a/src/mame/drivers/magicfly.cpp b/src/mame/drivers/magicfly.cpp
index cd2c3759866..79c36c4dcc5 100644
--- a/src/mame/drivers/magicfly.cpp
+++ b/src/mame/drivers/magicfly.cpp
@@ -731,7 +731,7 @@ static INPUT_PORTS_START( magicfly )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW0") /* Only 4 phisical DIP switches (valid bits = 4, 6, 7) */
+ PORT_START("DSW0") /* Only 4 physical DIP switches (valid bits = 4, 6, 7) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -794,7 +794,7 @@ static INPUT_PORTS_START( 7mezzo )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW0") /* Only 4 phisical DIP switches (valid bits = 4, 6, 7) */
+ PORT_START("DSW0") /* Only 4 physical DIP switches (valid bits = 4, 6, 7) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -869,7 +869,7 @@ static INPUT_PORTS_START( bchance )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW0")
-/* Only 4 phisical DIP switches
+/* Only 4 physical DIP switches
(valid bits = 4, 6, 7)
*/
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
diff --git a/src/mame/drivers/metalmx.cpp b/src/mame/drivers/metalmx.cpp
index c9942e3c8bd..7221eadcce2 100644
--- a/src/mame/drivers/metalmx.cpp
+++ b/src/mame/drivers/metalmx.cpp
@@ -433,7 +433,7 @@ READ32_MEMBER(metalmx_state::dsp32c_2_r)
/*************************************
*
- * Host/TMS34020 accesors
+ * Host/TMS34020 accessors
*
*************************************/
diff --git a/src/mame/drivers/metro.cpp b/src/mame/drivers/metro.cpp
index 4e94917d7b6..4822ff1093d 100644
--- a/src/mame/drivers/metro.cpp
+++ b/src/mame/drivers/metro.cpp
@@ -4567,7 +4567,7 @@ PCB -
REV: LM2D-Y
SEL: 00-200-004
-Same basic componets as those listed for Bang Bang Ball, except
+Same basic components as those listed for Bang Bang Ball, except
PCB uses a Xlinix XC9536 istead of the Altera EMP7032LC44 PLD.
Did Limenko license this or bootleg it? The board doesn't look like a
diff --git a/src/mame/drivers/multigam.cpp b/src/mame/drivers/multigam.cpp
index a25889e7fc8..87c92d7851f 100644
--- a/src/mame/drivers/multigam.cpp
+++ b/src/mame/drivers/multigam.cpp
@@ -7,7 +7,7 @@
uses NES emulation by Brad Olivier
Hardware is based around Nintendo NES. After coin up, it allows to play one of
- 35 NES games (choosen from text menu). Manufacturer is unknown, code for title
+ 35 NES games (chosen from text menu). Manufacturer is unknown, code for title
screen and game selection contains string:
"Programed by SANG HO ENG. K. B. KIM 1986/1/ 1"
diff --git a/src/mame/drivers/namcos12.cpp b/src/mame/drivers/namcos12.cpp
index c35f594f6c8..3e847b5fae3 100644
--- a/src/mame/drivers/namcos12.cpp
+++ b/src/mame/drivers/namcos12.cpp
@@ -2695,6 +2695,17 @@ ROM_START( tekken3 )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tet1wave0.5", 0x0000000, 0x400000, CRC(77ba7975) SHA1(fe9434dcf0fb232c85efaaae1b4b13d36099620a) )
ROM_LOAD( "tet1wave1.4", 0x0400000, 0x400000, CRC(ffeba79f) SHA1(941412bbe9d0305d9a23c224c1bb774c4321f6df) )
+
+ // Namco Cyber Lead cabinet JVS I/O and LED display controller
+ ROM_REGION(0x40000, "cabinet_io", 0)
+ // JVS I/O board (namco ltd.;I/O CYBER LEAD;Ver1.03;JPN,LED-0100)
+ // labels: CL1 I/OB, I/O LED (I/O) PCB
+ // ICs: Namco C77 H8/???? MCU, Atmel AT29C020 256k x8 FlashROM, NEC N341256 32k x8 SRAM, 14.7MHz Xtal, Altera EPM7064 labeled I/OLEDM1
+ ROM_LOAD("cl1-iob.ic5", 0x0000, 0x40000, CRC(abb90360) SHA1(d938b1e1ae596d0ab1007352f61b0b800363c762) )
+ // LED display controller, connected to above I/O
+ // labels: CL1 LEDA, I/O LED (LED) PCB
+ // ICs: same as above plus EPSON SED1351F LCD controller, 12MHz Xtal
+ ROM_LOAD("cl1-leda.ic5", 0x0000, 0x40000, CRC(43602a58) SHA1(64156ded8c43dbbe84b5d6ae13a068c8b18e8aed) )
ROM_END
ROM_START( tekken3ae )
diff --git a/src/mame/drivers/neogeocd.cpp b/src/mame/drivers/neogeocd.cpp
index 60da15ab052..5c109a47820 100644
--- a/src/mame/drivers/neogeocd.cpp
+++ b/src/mame/drivers/neogeocd.cpp
@@ -1073,7 +1073,7 @@ MACHINE_CONFIG_END
/*************************************
*
- * Driver initalization
+ * Driver initialization
*
*************************************/
diff --git a/src/mame/drivers/nes.cpp b/src/mame/drivers/nes.cpp
index 0fd9a519025..5c894331c59 100644
--- a/src/mame/drivers/nes.cpp
+++ b/src/mame/drivers/nes.cpp
@@ -208,6 +208,10 @@ static MACHINE_CONFIG_DERIVED( fds, famicom )
MCFG_DEVICE_REMOVE("cart_list")
MCFG_DEVICE_REMOVE("cass_list")
+ MCFG_DEVICE_REMOVE("ade_list")
+ MCFG_DEVICE_REMOVE("ntb_list")
+ MCFG_DEVICE_REMOVE("kstudio_list")
+ MCFG_DEVICE_REMOVE("datach_list")
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/nmk16.cpp b/src/mame/drivers/nmk16.cpp
index 92b46e83315..83610b6d36f 100644
--- a/src/mame/drivers/nmk16.cpp
+++ b/src/mame/drivers/nmk16.cpp
@@ -154,6 +154,7 @@ Afega stands for "Art-Fiction Electronic Game"
#include "sound/2203intf.h"
#include "sound/okim6295.h"
#include "sound/3812intf.h"
+#include "sound/ym2151.h"
#include "machine/nmk004.h"
#include "cpu/pic16c5x/pic16c5x.h"
#include "includes/nmk16.h"
@@ -3950,7 +3951,8 @@ static MACHINE_CONFIG_START( mustangb, nmk16_state )
MCFG_CPU_PROGRAM_MAP(mustangb_map)
NMK_HACKY_INTERRUPT_TIMING
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
NMK_HACKY_SCREEN_LOWRES
@@ -3964,8 +3966,19 @@ static MACHINE_CONFIG_START( mustangb, nmk16_state )
MCFG_VIDEO_START_OVERRIDE(nmk16_state,macross)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4, 1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
#define BIOSHIP_CRYSTAL1 10000000
@@ -4124,7 +4137,8 @@ static MACHINE_CONFIG_START( tdragonb, nmk16_state ) /* bootleg using Raiden
MCFG_CPU_PROGRAM_MAP(tdragonb_map)
NMK_HACKY_INTERRUPT_TIMING
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
NMK_HACKY_SCREEN_LOWRES
@@ -4138,7 +4152,19 @@ static MACHINE_CONFIG_START( tdragonb, nmk16_state ) /* bootleg using Raiden
MCFG_VIDEO_START_OVERRIDE(nmk16_state,macross)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4, 1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( tdragon, nmk16_state )
diff --git a/src/mame/drivers/norautp.cpp b/src/mame/drivers/norautp.cpp
index 9298f11ba69..1f387ab36cd 100644
--- a/src/mame/drivers/norautp.cpp
+++ b/src/mame/drivers/norautp.cpp
@@ -250,7 +250,7 @@
7654 3210
---- ---x * DEAL / DRAW Lamp.
---- --x- * BET / COLLECT Lamp.
- ---- -x-- + PANEL LIGHTS RESET (always activated after initalize).
+ ---- -x-- + PANEL LIGHTS RESET (always activated after initialize).
---- x--- + PANEL LAMPS CLOCK
xxxx ---- * Discrete Sound Lines.
@@ -381,7 +381,7 @@
[2009-08-23/26]
- Added a default NVRAM to Noraut Joker Poker to bypass the 'F U' screen.
- This is due to the phisical keyboard limitation when needs to enter
+ This is due to the physical keyboard limitation when needs to enter
4 simultaneous inputs.
- Executed a trojan on 2 noraut systems to confirm the way 16x32 tiles are decoded.
- Fixed the x-offset for 32x32 tiles lines.
@@ -481,7 +481,7 @@
- Added Poker / Black Jack (Model 7521).
- Added Kimble Joker Poker.
- Added DRHL Poker (v.2.89).
- - Renamed norautpn descripion to Noraut Deluxe Poker (bootleg).
+ - Renamed norautpn description to Noraut Deluxe Poker (bootleg).
- Added a placeholder for tpoker2's undumped 68705 MCU.
- Reorganized the driver, plus some clean-ups.
- Renamed kimblejp to kimbldhl. Changed game description to Kimble Double HI-LO.
@@ -665,7 +665,7 @@ WRITE8_MEMBER(norautp_state::soundlamps_w)
7654 3210
---- ---x * DEAL / DRAW Lamp.
---- --x- * BET / COLLECT Lamp.
- ---- -x-- + PANEL LIGHTS RESET (always activated after initalize).
+ ---- -x-- + PANEL LIGHTS RESET (always activated after initialize).
---- x--- + PANEL LAMPS CLOCK
xxxx ---- * Discrete Sound Lines.
*/
diff --git a/src/mame/drivers/notetaker.cpp b/src/mame/drivers/notetaker.cpp
index 635cffb6481..6697436548d 100644
--- a/src/mame/drivers/notetaker.cpp
+++ b/src/mame/drivers/notetaker.cpp
@@ -72,7 +72,7 @@ DONE:
- 256k of shared ram maps at 00000-3ffff for both cpus with special mem regs at fffec,fffee. the ram mirrors 4 times on the emulatorcpu only, iocpu the 40000-fffff area is open bus.
- framebuffer, at least for bios 1.5, lives from 0x4000-0xd5ff, exactly 640x480 pixels 1bpp, interlaced (even? plane is at 4000-8aff, odd? plane is at 8b00-d5ff); however the starting address of the framebuffer is configurable to any address within the 0x0000-0x1ffff range? (this exact range is unclear)
* figure out how the emulation-cpu boots and where its 8k of local ram maps to - done
- - both cpus boot, reset and system int controls are accessed at fffea from either cpu; emulatorcpu's 8k of ram lives at the beginning of its address space, but can be disabled in favor of mainram at the same addressses
+ - both cpus boot, reset and system int controls are accessed at fffea from either cpu; emulatorcpu's 8k of ram lives at the beginning of its address space, but can be disabled in favor of mainram at the same addresses
*/
#include "cpu/i86/i86.h"
@@ -594,12 +594,12 @@ static ADDRESS_MAP_START(notetaker_iocpu_io, AS_IO, 16, notetaker_state)
AM_RANGE(0x120, 0x127) AM_MIRROR(0x7E18) AM_DEVREADWRITE8("wd1791", fd1791_t, read, write, 0x00FF) // floppy controller
AM_RANGE(0x140, 0x15f) AM_MIRROR(0x7E00) AM_DEVREADWRITE8("crt5027", crt5027_device, read, write, 0x00FF) // crt controller
AM_RANGE(0x160, 0x161) AM_MIRROR(0x7E1E) AM_WRITE(LoadDispAddr_w) // loads the start address for the display framebuffer
- AM_RANGE(0x1a0, 0x1a1) AM_MIRROR(0x7E10) AM_READ(ReadEIAStatus_r) // read keyboard fifo state
- AM_RANGE(0x1a2, 0x1a3) AM_MIRROR(0x7E10) AM_READ(ReadEIAData_r) // read keyboard data
- AM_RANGE(0x1a8, 0x1a9) AM_MIRROR(0x7E10) AM_WRITE(LoadEIACtlReg_w) // kbd uart control register
- AM_RANGE(0x1aa, 0x1ab) AM_MIRROR(0x7E10) AM_WRITE(LoadEIAData_w) // kbd uart data register
- AM_RANGE(0x1ac, 0x1ad) AM_MIRROR(0x7E10) AM_WRITE(EIADataReset_w) // kbd uart ddr switch (data reset)
- AM_RANGE(0x1ae, 0x1af) AM_MIRROR(0x7E10) AM_WRITE(EIAChipReset_w) // kbd uart reset
+ AM_RANGE(0x1a0, 0x1a1) AM_MIRROR(0x7E10) AM_READ(ReadEIAStatus_r) // read eia fifo state
+ AM_RANGE(0x1a2, 0x1a3) AM_MIRROR(0x7E10) AM_READ(ReadEIAData_r) // read eia data
+ AM_RANGE(0x1a8, 0x1a9) AM_MIRROR(0x7E10) AM_WRITE(LoadEIACtlReg_w) // eia uart control register
+ AM_RANGE(0x1aa, 0x1ab) AM_MIRROR(0x7E10) AM_WRITE(LoadEIAData_w) // eia uart data register
+ AM_RANGE(0x1ac, 0x1ad) AM_MIRROR(0x7E10) AM_WRITE(EIADataReset_w) // eia uart ddr switch (data reset)
+ AM_RANGE(0x1ae, 0x1af) AM_MIRROR(0x7E10) AM_WRITE(EIAChipReset_w) // eia uart reset
//AM_RANGE(0x1c0, 0x1c1) AM_MIRROR(0x7E1E) AM_READ(SelADCHi_r) // ADC read
//AM_RANGE(0x1e0, 0x1e1) AM_MIRROR(0x7E1E) AM_READ(CRTSwitch_w) // CRT power enable?
ADDRESS_MAP_END
diff --git a/src/mame/drivers/omegrace.cpp b/src/mame/drivers/omegrace.cpp
index 296acf8c32a..ba37b547ab8 100644
--- a/src/mame/drivers/omegrace.cpp
+++ b/src/mame/drivers/omegrace.cpp
@@ -603,7 +603,7 @@ ROM_END
/*************************************
*
- * Game specific initalization
+ * Game specific initialization
*
*************************************/
diff --git a/src/mame/drivers/pachifev.cpp b/src/mame/drivers/pachifev.cpp
index 1dbf4313dfe..335770743bf 100644
--- a/src/mame/drivers/pachifev.cpp
+++ b/src/mame/drivers/pachifev.cpp
@@ -62,10 +62,10 @@ Stephh's notes (based on the game TMS9995 code and some tests) :
When you continue, only the balls aren't reset, while score, time and level (GASP !) are.
If you want to continue in a 2 players game, BOTH players will have to continue, which means that
you must have at least 2 credits ("REPLAY") and that you can't continue player 2 without player 1.
- * If you manage to get a score, use BUTTON1 to cycle through avaiable symbols (letters A-Z and '.'),
+ * If you manage to get a score, use BUTTON1 to cycle through available symbols (letters A-Z and '.'),
and pull the plunger to at least 63% (the code expects a value >= 0xa0) to go to next initial.
Be aware that again there is a timer to do so, but that again the timer is not displayed.
- - Usefull addresses :
+ - Useful addresses :
* 0xe001.b : level (0x00-0x04 : 0x01 = level 1 - 0x02 = level 2 - 0x00 = level 3 - 0x3 = bonus - 0x04 = level 4)
* 0xe00f.b : player (0x00 = P1 - 0x01 = P2)
* 0xe016.w : P1 balls (MSB first)
diff --git a/src/mame/drivers/pcw.cpp b/src/mame/drivers/pcw.cpp
index 5a274bf4c0c..f213848c86e 100644
--- a/src/mame/drivers/pcw.cpp
+++ b/src/mame/drivers/pcw.cpp
@@ -51,7 +51,7 @@
The boot-program performs a simple task: Load sector 0, track 0 to &f000 in ram, and execute
&f010.
- From here CP/M is booted, and the appropiate programs can be run.
+ From here CP/M is booted, and the appropriate programs can be run.
The hardware:
- Z80 CPU running at 3.4 MHz
@@ -612,7 +612,7 @@ READ8_MEMBER(pcw_state::pcw_expansion_r)
}
- /* result from floating bus/no peripherial at this port */
+ /* result from floating bus/no peripheral at this port */
return 0x0ff;
}
diff --git a/src/mame/drivers/peplus.cpp b/src/mame/drivers/peplus.cpp
index e9b821070c6..abbb6afc888 100644
--- a/src/mame/drivers/peplus.cpp
+++ b/src/mame/drivers/peplus.cpp
@@ -1427,7 +1427,7 @@ ROM_START( peset001 ) /* Normal board : Set Chip (Set001) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peset004 ) /* Normal board : Set Chip (Set004) - PE+ Set Denomination / Enable Validator */
@@ -1441,7 +1441,7 @@ ROM_START( peset004 ) /* Normal board : Set Chip (Set004) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peset012 ) /* Normal board : Set Chip (Set012) - PE+ Set Denomination / Enable Validator */
@@ -1455,7 +1455,7 @@ ROM_START( peset012 ) /* Normal board : Set Chip (Set012) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peset022 ) /* Normal board : Set Chip (Set022) - PE+ Set Denomination / Enable Validator */
@@ -1469,7 +1469,7 @@ ROM_START( peset022 ) /* Normal board : Set Chip (Set022) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
/* Known to exsist SET033 - PE+ Set Denomination / Enable Validator / SAS 4.0 */
@@ -1485,7 +1485,7 @@ ROM_START( peset038 ) /* Normal board : Set Chip (Set038) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peset100 ) /* Normal board : Set Chip (Set100) - PE+ Set Denomination / Enable Validator */
@@ -1499,7 +1499,7 @@ ROM_START( peset100 ) /* Normal board : Set Chip (Set100) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peset117 ) /* Normal board : Set Chip (Set100) - PE+ Set Denomination / Enable Validator */
@@ -1513,7 +1513,7 @@ ROM_START( peset117 ) /* Normal board : Set Chip (Set100) - PE+ Set Denomination
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peivc006 ) /* Normal board : Clear Chip (IVC006) - PE+ Clear CMOS / E-Square */
@@ -1528,7 +1528,7 @@ ROM_START( peivc006 ) /* Normal board : Clear Chip (IVC006) - PE+ Clear CMOS / E
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepk0719 ) /* Normal board (non-plus) : Jacks or Better (PK0719) */
@@ -1544,13 +1544,13 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_RELOAD( 0x08000, 0x8000) /* 32K version build for the original PE boards (non-plus) */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mr0-cg534.u52", 0x00000, 0x4000, CRC(57180734) SHA1(39ed464e6dbe6d17af1528aa5031349b6c4eb029) )
- ROM_LOAD( "mg0-cg534.u53", 0x08000, 0x4000, CRC(4ef5ef35) SHA1(94b9f37c4a3a8dea1eaeeafa31e19819dcad7290) )
- ROM_LOAD( "mb0-cg534.u54", 0x10000, 0x4000, CRC(dd0d224c) SHA1(39d1d62e12a7f8edc76cb498b006006b52ba007f) )
- ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
+ ROM_LOAD( "mr0-cg791.u52", 0x00000, 0x4000, CRC(95abe335) SHA1(63e7589750e4e05846cf1a19042ac59074dbb13e) ) /* Custom El Cortez card backs */
+ ROM_LOAD( "mg0-cg791.u53", 0x08000, 0x4000, CRC(35575d1d) SHA1(a9b3e4b7470e139215cd45db32130c70e5c7f98a) )
+ ROM_LOAD( "mb0-cg791.u54", 0x10000, 0x4000, CRC(7115d318) SHA1(6d4bc79ddacd63a768d06fd304b1727314bd44a4) )
+ ROM_LOAD( "mx0-cg791.u55", 0x18000, 0x4000, CRC(4e428454) SHA1(98454ff3145fc8e851c9f5962964faaa8029d294) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap791.u37", 0x0000, 0x0100, CRC(6957242b) SHA1(e4a8decbf6f62d46eac1734b4fdb3d3b02ee4c90) )
ROM_END
ROM_START( pepk0719a ) /* Normal board (non-plus) : Jacks or Better (PK0719) */
@@ -1572,7 +1572,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0719b ) /* Normal board (non-plus) : Jacks or Better (PK0719) */
@@ -1594,7 +1594,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0756 ) /* Normal board (non-plus) : Jacks or Better (PK0756) */
@@ -1610,13 +1610,13 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_RELOAD( 0x08000, 0x8000) /* 32K version build for the original PE boards (non-plus) */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mr0-cg534.u52", 0x00000, 0x4000, CRC(57180734) SHA1(39ed464e6dbe6d17af1528aa5031349b6c4eb029) )
- ROM_LOAD( "mg0-cg534.u53", 0x08000, 0x4000, CRC(4ef5ef35) SHA1(94b9f37c4a3a8dea1eaeeafa31e19819dcad7290) )
- ROM_LOAD( "mb0-cg534.u54", 0x10000, 0x4000, CRC(dd0d224c) SHA1(39d1d62e12a7f8edc76cb498b006006b52ba007f) )
- ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
+ ROM_LOAD( "mro-cg857.u52", 0x00000, 0x8000, CRC(0b6c5f96) SHA1(f4cf7bfb715af8b88d9dbbad0c42b65a2c4d341b) ) /* Custom El Cortez card backs */
+ ROM_LOAD( "mgo-cg857.u53", 0x08000, 0x8000, CRC(c49d2258) SHA1(9dd5cc75999f46da84f4331fcd6857dd78768592) )
+ ROM_LOAD( "mbo-cg857.u54", 0x10000, 0x8000, CRC(2c229fcf) SHA1(24d948470d91ede475859f52679fe826547cd248) )
+ ROM_LOAD( "mxo-cg857.u55", 0x18000, 0x8000, CRC(3c216808) SHA1(51fa59710128d6bd653d482d506f383dd671a19f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap857.u37", 0x0000, 0x0100, CRC(6957242b) SHA1(e4a8decbf6f62d46eac1734b4fdb3d3b02ee4c90) )
ROM_END
ROM_START( pepk0756a ) /* Normal board (non-plus) : Jacks or Better (PK0756) */
@@ -1638,7 +1638,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0756b ) /* Normal board (non-plus) : Jacks or Better (PK0756) */
@@ -1660,7 +1660,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0756c ) /* Normal board (non-plus) : Jacks or Better (PK0756) */
@@ -1682,7 +1682,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0757 ) /* Normal (non-plus) board : Two Pair or Better (PK0757) */
@@ -1704,7 +1704,7 @@ PayTable 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0758 ) /* Normal (non-plus) board : Jacks or Better (PK0758) */
@@ -1726,7 +1726,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0769 ) /* Normal board (non-plus) : Jacks or Better (PK0769) */
@@ -1748,7 +1748,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0773 ) /* Normal board (non-plus) : Jacks or Better (PK0773) */
@@ -1760,17 +1760,17 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
Programs Available: PK0733
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pk0773-pc041.u58", 0x00000, 0x8000, CRC(4b4ce88a) SHA1(a597614365223c1f0bec331672a1cf44877162ce) ) /* Game Version: PC041 */
+ ROM_LOAD( "pk0873-pc093.u58", 0x00000, 0x8000, CRC(8921b56c) SHA1(dd4c1a2a40c28ad1e0cd5692deb13877c26fcdd0) ) /* Game Version: PC093 */
ROM_RELOAD( 0x08000, 0x8000) /* 32K version build for the original PE boards (non-plus) */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mr0-cg534.u52", 0x00000, 0x4000, CRC(57180734) SHA1(39ed464e6dbe6d17af1528aa5031349b6c4eb029) )
- ROM_LOAD( "mg0-cg534.u53", 0x08000, 0x4000, CRC(4ef5ef35) SHA1(94b9f37c4a3a8dea1eaeeafa31e19819dcad7290) )
- ROM_LOAD( "mb0-cg534.u54", 0x10000, 0x4000, CRC(dd0d224c) SHA1(39d1d62e12a7f8edc76cb498b006006b52ba007f) )
- ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
+ ROM_LOAD( "mr0-cg690.u52", 0x00000, 0x4000, CRC(4ba98889) SHA1(6dd007349073cbed2d3c1076eec921827ea43bd9) )
+ ROM_LOAD( "mg0-cg690.u53", 0x08000, 0x4000, CRC(09c54bf7) SHA1(1d7b70f327c9f834a2a09aa973677d419dfc2cb1) )
+ ROM_LOAD( "mb0-cg690.u54", 0x10000, 0x4000, CRC(9fa49c0e) SHA1(86d4eb4ec8b7ff426e0a12866f682d331dcbb8dc) )
+ ROM_LOAD( "mx0-cg690.u55", 0x18000, 0x4000, CRC(a68f917b) SHA1(cf53cbd375aa2d860a5eb28a5d72085b29c8d842) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0810 ) /* Normal board (non-plus) : Joker Poker (PK0810) */
@@ -1855,13 +1855,13 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_RELOAD( 0x08000, 0x8000) /* 32K version build for the original PE boards (non-plus) */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mr0-cg534.u52", 0x00000, 0x4000, CRC(57180734) SHA1(39ed464e6dbe6d17af1528aa5031349b6c4eb029) )
- ROM_LOAD( "mg0-cg534.u53", 0x08000, 0x4000, CRC(4ef5ef35) SHA1(94b9f37c4a3a8dea1eaeeafa31e19819dcad7290) )
- ROM_LOAD( "mb0-cg534.u54", 0x10000, 0x4000, CRC(dd0d224c) SHA1(39d1d62e12a7f8edc76cb498b006006b52ba007f) )
- ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
+ ROM_LOAD( "mro-cg665.u52", 0x00000, 0x8000, CRC(deca24f0) SHA1(8cfc0c106b87d961383f32e9e4a60983848a741d) )
+ ROM_LOAD( "mgo-cg665.u53", 0x08000, 0x8000, CRC(7de9a543) SHA1(fe2251e783581f1a9db4511b2563fff78b662adf) )
+ ROM_LOAD( "mbo-cg665.u54", 0x10000, 0x8000, CRC(ad2edc8b) SHA1(63881363b0e23a35ebc4df22838d6328fe86447b) )
+ ROM_LOAD( "mxo-cg665.u55", 0x18000, 0x8000, CRC(3d25aa32) SHA1(17500f5556d54c8de07b63b06a5dd3d701df3cb7) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk0832 ) /* Normal board (non-plus) : Joker Poker (PK0832) */
@@ -2027,6 +2027,29 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
+ROM_START( pepk0885 ) /* Normal board (non-plus) : Deuces Wild Poker (PK0885) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P34D 1 2 2 3 5 9 15 25 200 250 940
+ % Range: 97.2-99.2% Optimum: 101.2% Hit Frequency: 45.3%
+ Programs Available: PK0885
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pk0885-pc056.u58", 0x00000, 0x8000, CRC(0b4ee564) SHA1(f021fd0e680256851440582fc7936226930060fe) ) /* Game Version: PC056 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version build for the original PE boards (non-plus) */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mr0-cg790.u52", 0x00000, 0x4000, CRC(06db2158) SHA1(596b359638bfb26dff7490eba164814570e3b4c3) ) /* Custom El Cortez card backs */
+ ROM_LOAD( "mg0-cg790.u53", 0x08000, 0x4000, CRC(fda6b40f) SHA1(ab9ddd8b8b7ab10ae6781bf79b9591ca7b53a11c) )
+ ROM_LOAD( "mb0-cg790.u54", 0x10000, 0x4000, CRC(b2a7242a) SHA1(40e864aeaa3530e4dcc3f59c3727d324ab63d94d) )
+ ROM_LOAD( "mx0-cg790.u55", 0x18000, 0x4000, CRC(6091a6b4) SHA1(d1178bfad38cdd7854dac5f89c50abac2bba8345) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap790.u37", 0x0000, 0x0100, CRC(6957242b) SHA1(e4a8decbf6f62d46eac1734b4fdb3d3b02ee4c90) )
+ROM_END
+
ROM_START( pepk0930 ) /* Normal board (non-plus) : Deuces Wild Poker (PK0930) */
/*
w/D w/oD
@@ -2138,7 +2161,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk1024 ) /* Normal (non-plus) board : Aces and Faces 4 of a Kind Bonus Poker (PK1024) */
@@ -2161,7 +2184,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K SF RF (Bonus)
ROM_LOAD( "mx0-cg745.u55", 0x18000, 0x4000, CRC(a8cf2a59) SHA1(de623a95237f28827710a86ae86c52106b55b349) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u37", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u37", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepk1030 ) /* Normal (non-plus) board : 4 of a Kind Bonus Poker (PK1030) */
@@ -2184,7 +2207,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
ROM_END
ROM_START( pepk1069 ) /* Normal (non-plus) board : Double Bonus Poker (PK1069) */
@@ -2207,7 +2230,29 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mx0-cg534.u55", 0x18000, 0x4000, CRC(079dfe4b) SHA1(a767eba04c11b67c61654b513cf077869a216295) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap435.u37", 0x0000, 0x0100, CRC(038cabc6) SHA1(c6514b4f9dbed6ab2631f563f7e00648661ebdbb) )
+ROM_END
+
+ROM_START( pepp0001 ) /* Normal board : Standard Draw Poker (PP0001) */
+/*
+PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
+----------------------------------------------------------
+ BA 1 2 3 4 5 8 25 50 250 800
+ % Range: 93.8-95.8% Optimum: 97.8% Hit Frequency: 45.3%
+ Programs Available: PP0001
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0001_520-516.u68", 0x00000, 0x8000, CRC(aea812c9) SHA1(8f08725de0ddfb02f00c4bade58d145208c8cc1c) ) /* Game Version: 520, Library Version: 516 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0002 ) /* Normal board : Standard Draw Poker (PP0002) - PSR Verified */
@@ -2228,7 +2273,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0002a ) /* Normal board : Standard Draw Poker (PP0002) - Multi Regional / Multi Currency - Tournament Mode capable - PSR Verified */
@@ -2249,10 +2294,52 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0008 ) /* Normal board : Standard Draw Poker (PP0008) - PSR Verified */
+/*
+PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
+----------------------------------------------------------
+ CD 1 2 3 4 6 9 25 50 250 940
+ % Range: 95.9-97.9% Optimum: 99.9% Hit Frequency: 45.3%
+ Programs Available: PP0008, X002247P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0008_a45-a74.u68", 0x00000, 0x10000, CRC(97549536) SHA1(16cab9c7bf032edf09c06da8dcfec194b9f66909) ) /* Game Version: A45, Library Version: A74 - 10/23/95 @ IGT L95-2443 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0008a ) /* Normal board : Standard Draw Poker (PP0008) */
+/*
+PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
+----------------------------------------------------------
+ CD 1 2 3 4 6 9 25 50 250 940
+ % Range: 95.9-97.9% Optimum: 99.9% Hit Frequency: 45.3%
+ Programs Available: PP0008, X002247P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0008_a45-a74.u68", 0x00000, 0x10000, CRC(97549536) SHA1(16cab9c7bf032edf09c06da8dcfec194b9f66909) ) /* Game Version: A45, Library Version: A74 - 10/23/95 @ IGT L95-2443 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2110.u77", 0x00000, 0x8000, CRC(adbe666c) SHA1(3b22e9b1c1c6495827e23058c5e582cfa216528b) ) /* Custom El Cortez card backs - 12/27/94 @ IGT L95-0014 */
+ ROM_LOAD( "mgo-cg2110.u78", 0x08000, 0x8000, CRC(0260dc43) SHA1(8195a5af83097297f2fdb504104a204183e58fe1) )
+ ROM_LOAD( "mbo-cg2110.u79", 0x10000, 0x8000, CRC(376d7303) SHA1(9f0358be7165cee391189d668ead4eca1566882e) )
+ ROM_LOAD( "mxo-cg2110.u80", 0x18000, 0x8000, CRC(2dd8a721) SHA1(7b81d62a49a9c23b82caf873d094d37c4299c15d) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap1429.u50", 0x0000, 0x0100, CRC(4c30e51e) SHA1(c4738bbb1ecadf7504557947243e6dd5b21d1fb9) )
ROM_END
-ROM_START( pepp0008 ) /* Normal board : Standard Draw Poker (PP0008) */
+ROM_START( pepp0008b ) /* Normal board : Standard Draw Poker (PP0008) */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -2271,7 +2358,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0009 ) /* Normal board : Standard Draw Poker (PP0009) */
@@ -2295,7 +2382,7 @@ This program set is superseded by PP0060
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0010 ) /* Normal board : Standard Draw Poker (PP0010) - PSR Verified */
@@ -2359,7 +2446,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0021 ) /* Normal board : Standard Draw Poker (PP0021) */
@@ -2382,7 +2469,7 @@ NOTE: REQUIRES Progressive link which is not currently supported
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0023 ) /* Normal board : Tens or Better (PP0023) */
@@ -2404,7 +2491,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0038 ) /* Normal board : Standard Draw Poker (PP0038) - PSR Verified */
@@ -2488,7 +2575,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2014.u75", 0x18000, 0x8000, CRC(af9c89a6) SHA1(e256259c20f5b1308e89c9fbb424d1396bccbcd1) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0041 ) /* Normal board : Standard Draw Poker (PP0041) - PSR Verified */
@@ -2551,7 +2638,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0043 ) /* Normal board : 10's or Better (PP0043) - PSR Verified */
@@ -2593,7 +2680,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0043b ) /* Normal board : 10's or Better (PP0043) - Multi Regional / Multi Currency - Tournament Mode capable */
@@ -2614,7 +2701,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2014.u75", 0x18000, 0x8000, CRC(af9c89a6) SHA1(e256259c20f5b1308e89c9fbb424d1396bccbcd1) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0045 ) /* Normal board : 10's or Better (PP0045) - PSR Verified */
@@ -2678,7 +2765,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_REGION( 0x100, "proms", 0 )
ROM_LOAD( "cap1150.u50", 0x0000, 0x0100, NO_DUMP )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0045c ) /* Normal board : 10's or Better (PP0045) */
@@ -2700,7 +2787,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_REGION( 0x100, "proms", 0 )
ROM_LOAD( "cap1072.u50", 0x0000, 0x0100, NO_DUMP )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0045d ) /* Normal board : 10's or Better (PP0045) */
@@ -2763,7 +2850,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0046b ) /* Normal board : 10's or Better (PP0046) */
@@ -2785,10 +2872,55 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0048 ) /* Normal board : Joker Poker (PP0048) */
+ROM_START( pepp0048 ) /* Normal board : Joker Poker (PP0048) - PSR Verified */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ YD 1 1 2 3 5 7 15 50 100 200 400 940
+ % Range: 92.7-94.7% Optimum: 96.7% Hit Frequency: 44.1%
+ Programs Available: PP0048
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0048_944-964.u68", 0x00000, 0x10000, CRC(312d3c55) SHA1(13ebdf53a6d765c63c482185649b3c54c60a9e7d) ) /* Game Version: 944, Library Version: 964 - 10/01/93 @ IGT L93-2001 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0048a ) /* Normal board : Joker Poker (PP0048) */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ YD 1 1 2 3 5 7 15 50 100 200 400 940
+ % Range: 92.7-94.7% Optimum: 96.7% Hit Frequency: 44.1%
+ Programs Available: PP0048
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0048_561-527.u68", 0x00000, 0x8000, CRC(ea8baaa2) SHA1(347e0a691df72d273e226fd1fbcb74803534df08) ) /* Game Version: 561, Library Version: 527, Video Lib Ver: 544 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0048b ) /* Normal board : Joker Poker (PP0048) */
/*
w/J w/oJ
PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
@@ -2808,7 +2940,118 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0048c ) /* Normal board : Joker Poker (PP0048) */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ YD 1 1 2 3 5 7 15 50 100 200 400 940
+ % Range: 92.7-94.7% Optimum: 96.7% Hit Frequency: 44.1%
+ Programs Available: PP0048
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0048_520-516.u68", 0x00000, 0x8000, CRC(0cf741e1) SHA1(1e2e56ba6389312c48fcfb51e5dce5150c962532) ) /* Game Version: 520, Library Version: 516, Video Lib Ver: 516 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0050 ) /* Normal board : Joker Poker (PP0050) - PSR Verified */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ ZD 1 1 2 3 5 7 20 50 100 200 400 940
+ % Range: 96.6-98.6% Optimum: 100.6% Hit Frequency: 43.9%
+ Programs Available: PP0050, X002441P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0050_a45-a74.u68", 0x00000, 0x10000, CRC(94e39d89) SHA1(54fb60afc29173846108ac71ee9f830cedaa8ee3) ) /* Game Version: A45, Library Version: A74 - 10/23/95 @ IGT L95-2278 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0050a ) /* Normal board : Joker Poker (PP0050) - PSR Verified */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ ZD 1 1 2 3 5 7 20 50 100 200 400 940
+ % Range: 96.6-98.6% Optimum: 100.6% Hit Frequency: 43.9%
+ Programs Available: PP0050, X002441P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0050_944-964.u68", 0x00000, 0x10000, CRC(671bc06c) SHA1(1b2454b3c2723560498bd0ce04d48d08b89953c4) ) /* Game Version: 944, Library Version: 964 - 09/30/93 @ IGT L93-2122 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0050b ) /* Normal board : Joker Poker (PP0050) - Must use a SET chip to set denomination - PSR Verified */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ ZD 1 1 2 3 5 7 20 50 100 200 400 940
+ % Range: 96.6-98.6% Optimum: 100.6% Hit Frequency: 43.9%
+ Programs Available: PP0050, X002441P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* 05/17/93 @IGT INT */
+ ROM_LOAD( "pp0050_896-914.u68", 0x00000, 0x10000, CRC(623888f2) SHA1(3f675e6da4ef52d32c39a615e79c5a961bafb9fb) ) /* Game Version: 896, Library Version: 914 - 05/19/93 @ IGT L93-0900 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2002.u72", 0x00000, 0x8000, CRC(d9d03979) SHA1(9729cbb2e5472eb652f8f549dd85047abe11cae0) ) /* 08/30/94 @IGT */
+ ROM_LOAD( "mgo-cg2002.u73", 0x08000, 0x8000, CRC(ad5bd2cd) SHA1(e5dacd2827f14dd9811311552b7e3816a36b9284) )
+ ROM_LOAD( "mbo-cg2002.u74", 0x10000, 0x8000, CRC(7362f7f3) SHA1(fce4ce2cdd836e37382d39d8b167019cfc4c6166) )
+ ROM_LOAD( "mxo-cg2002.u75", 0x18000, 0x8000, CRC(4560fdec) SHA1(63ec67afd378a06d74084bba72fbbe9be12e24d3) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0050c ) /* Normal board : Joker Poker (PP0050) */
+/* w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ ZD 1 1 2 3 5 7 20 50 100 200 400 940
+ % Range: 96.6-98.6% Optimum: 100.6% Hit Frequency: 43.9%
+ Programs Available: PP0050, X002441P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0050_554-544.u68", 0x00000, 0x8000, CRC(ef03deb3) SHA1(20b2ffbe92fca885c2a58c2d78e628b8a0f7bfab) ) /* Game Version: 554, Library Version: 544, Video Lib Ver: 544 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg834.u72", 0x00000, 0x8000, CRC(97d22af0) SHA1(0588f7772ac9447e4bf6b58804b2c34ca7014b60) ) /* Custom El Cortez card backs - 02/23/89 @ IGT L89-0653 */
+ ROM_LOAD( "mgo-cg834.u73", 0x08000, 0x8000, CRC(502b1673) SHA1(a331fcc0f6705db836b4333ae28ff75296b6cf0d) )
+ ROM_LOAD( "mbo-cg834.u74", 0x10000, 0x8000, CRC(3e0d931a) SHA1(4796147b7e65fdb8452663db1233ef9889614a00) )
+ ROM_LOAD( "mxo-cg834.u75", 0x18000, 0x8000, CRC(2826f2d4) SHA1(4a3b0a90e030e7e9bbc927a2ec2b71bd958d6cf3) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap834.u50", 0x0000, 0x0100, CRC(11dcb412) SHA1(939078e7073f5070de4d9a2a815e301ba36d6fe6) )
ROM_END
ROM_START( pepp0051 ) /* Normal board : Joker Poker (PP0051) */
@@ -2834,7 +3077,7 @@ Superseded by PP0428 (Non Double-up) / PP0459
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0053 ) /* Normal board : Joker Poker (Aces or Better) (PP0053) - PSR Verified */
@@ -2859,29 +3102,30 @@ PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0055 ) /* Normal board : Deuces Wild Poker (PP0055) - PSR Verified */
+ROM_START( pepp0054 ) /* Normal board : Deuces Wild Poker (PP0054) */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
------------------------------------------------------------
- P32A 1 2 2 3 4 10 15 25 200 250 800
- % Range: 90.8-92.8% Optimum: 94.8% Hit Frequency: 45.1%
- Programs Available: PP0055, X000055P, PP0723
+ P21A 1 2 2 3 4 8 10 20 200 250 800
+ % Range: 87.4-89.4% Optimum: 91.4% Hit Frequency: 45.1%
+ Programs Available: PP0054
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0055_961-984.u68", 0x00000, 0x10000, CRC(c6b897cc) SHA1(9ba200652db58e602f388c21aaf9b3f837412385) ) /* Game Version: 961, Library Version: 984 */
+ ROM_LOAD( "pp0054_600-550.u68", 0x00000, 0x8000, CRC(40e13a1a) SHA1(ea2aeccb23e8fc80bab8db51c857f2c21da1a6da) ) /* Game Version: 600, Library Version: 550, Video Lib Ver: 550 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2023.u72", 0x00000, 0x8000, CRC(06f11ac6) SHA1(c9b111ffef75257b88d8500e77b09565c5ccbc54) )
- ROM_LOAD( "mgo-cg2023.u73", 0x08000, 0x8000, CRC(58db7723) SHA1(8cc10f9ed8c7da0d9aae780b9c2204d7c5890d83) )
- ROM_LOAD( "mbo-cg2023.u74", 0x10000, 0x8000, CRC(bbd02472) SHA1(ef05af64502cc7833fe69b0b1bffe4efbc50e6fa) )
- ROM_LOAD( "mxo-cg2023.u75", 0x18000, 0x8000, CRC(21028c83) SHA1(76c3d0811332ca9b3cdb19952dbe6897531f562d) )
+ ROM_LOAD( "mro-cg845.u72", 0x00000, 0x8000, CRC(af626808) SHA1(694182ae8e7d8bb3d219cc4a83672a35e489c5ea) ) /* Custom El Cortez card backs - 05/19/89 @ IGT L89-0967 */
+ ROM_LOAD( "mgo-cg845.u73", 0x08000, 0x8000, CRC(f8aebcd1) SHA1(d4abf044bf75359ba020a6c68245351a1d191990) )
+ ROM_LOAD( "mbo-cg845.u74", 0x10000, 0x8000, CRC(01b5f798) SHA1(1b2c679f4a393d1d649421b6a08c0222a6a626f6) )
+ ROM_LOAD( "mxo-cg845.u75", 0x18000, 0x8000, CRC(e05456bd) SHA1(401652f690dae02180da4d45121823d2dc2d247f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ ROM_LOAD( "cap845.u50", 0x0000, 0x0100, CRC(00439b0d) SHA1(4367ebf3eb90322d796f082f52da2667b0766c1e) )
ROM_END
-ROM_START( pepp0055a ) /* Normal board : Deuces Wild Poker (PP0055) - PSR Verified */
+ROM_START( pepp0055 ) /* Normal board : Deuces Wild Poker (PP0055) - PSR Verified */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -2891,7 +3135,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0055, X000055P, PP0723
*/
ROM_REGION( 0x10000, "maincpu", 0 ) /* 10/23/95 @IGT L95-2432 */
- ROM_LOAD( "pp0055_a47-a76.u68", 0x00000, 0x10000, CRC(adff06ea) SHA1(098409bd4474a69217e3cd17ee8c650005cc3e17) ) /* Game Version: A47, Library Version: A76 */
+ ROM_LOAD( "pp0055_a47-a76.u68", 0x00000, 0x10000, CRC(adff06ea) SHA1(098409bd4474a69217e3cd17ee8c650005cc3e17) ) /* Game Version: A47, Library Version: A76 - 10/23/95 @ IGT L95-2432 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2133.u72", 0x00000, 0x8000, CRC(b21a789f) SHA1(c49f9b5f51c29bbc0e1392e86d6602bd44e46380) ) /* 02/02/95 @ IGT L95-0276 */
@@ -2903,7 +3147,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0055b ) /* Normal board : Deuces Wild Poker (PP0055) */
+ROM_START( pepp0055a ) /* Normal board : Deuces Wild Poker (PP0055) */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -2913,7 +3157,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0055, X000055P, PP0723
*/
ROM_REGION( 0x10000, "maincpu", 0 ) /* 10/23/95 @IGT L95-2432 */
- ROM_LOAD( "pp0055_a47-a76.u68", 0x00000, 0x10000, CRC(adff06ea) SHA1(098409bd4474a69217e3cd17ee8c650005cc3e17) ) /* Game Version: A47, Library Version: A76 */
+ ROM_LOAD( "pp0055_a47-a76.u68", 0x00000, 0x10000, CRC(adff06ea) SHA1(098409bd4474a69217e3cd17ee8c650005cc3e17) ) /* Game Version: A47, Library Version: A76 - 10/23/95 @ IGT L95-2432 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg1276.u72", 0x00000, 0x8000, CRC(9ebc89f2) SHA1(983ace4a9269dea1ddc6b9837df0f0db6b2a1c91) ) /* Custom Skyline Casino card backs */
@@ -2925,6 +3169,28 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap1276.u50", 0x0000, 0x0100, CRC(4ce5aef5) SHA1(e9a9f358aedeb9ed917162eafd6ffade66d460e8) )
ROM_END
+ROM_START( pepp0055b ) /* Normal board : Deuces Wild Poker (PP0055) - PSR Verified */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P32A 1 2 2 3 4 10 15 25 200 250 800
+ % Range: 90.8-92.8% Optimum: 94.8% Hit Frequency: 45.1%
+ Programs Available: PP0055, X000055P, PP0723
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0055_961-984.u68", 0x00000, 0x10000, CRC(c6b897cc) SHA1(9ba200652db58e602f388c21aaf9b3f837412385) ) /* Game Version: 961, Library Version: 984 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2023.u72", 0x00000, 0x8000, CRC(06f11ac6) SHA1(c9b111ffef75257b88d8500e77b09565c5ccbc54) )
+ ROM_LOAD( "mgo-cg2023.u73", 0x08000, 0x8000, CRC(58db7723) SHA1(8cc10f9ed8c7da0d9aae780b9c2204d7c5890d83) )
+ ROM_LOAD( "mbo-cg2023.u74", 0x10000, 0x8000, CRC(bbd02472) SHA1(ef05af64502cc7833fe69b0b1bffe4efbc50e6fa) )
+ ROM_LOAD( "mxo-cg2023.u75", 0x18000, 0x8000, CRC(21028c83) SHA1(76c3d0811332ca9b3cdb19952dbe6897531f562d) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
ROM_START( pepp0055c ) /* Normal board : Deuces Wild Poker (PP0055) */
/*
w/D w/oD
@@ -2939,7 +3205,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -2948,7 +3214,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0057 ) /* Normal board : Deuces Wild Poker (PP0057) PSR Verified */
+ROM_START( pepp0057 ) /* Normal board : Deuces Wild Poker (PP0057) - PSR Verified */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -2958,7 +3224,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0057, X000057P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0057_a47-a76.u68", 0x00000, 0x10000, CRC(44ebb68d) SHA1(4864ba62c225a3ecd576d1a82fcbe1e30d65244d) ) /* Game Version: A47, Library Version: A76 */
+ ROM_LOAD( "pp0057_a47-a76.u68", 0x00000, 0x10000, CRC(44ebb68d) SHA1(4864ba62c225a3ecd576d1a82fcbe1e30d65244d) ) /* Game Version: A47, Library Version: A76 - 10/23/95 @ IGT L95-2299 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2133.u72", 0x00000, 0x8000, CRC(b21a789f) SHA1(c49f9b5f51c29bbc0e1392e86d6602bd44e46380) ) /* 02/02/95 @ IGT L95-0276 */
@@ -2980,11 +3246,79 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0057, X000057P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0057_726-706.u68", 0x00000, 0x10000, CRC(330d2c39) SHA1(1ddc77b79e557767ffae8405c5071d591fe4de92) ) /* Game Version: 726, Library Version: 706 - 05/13/91 @ IGT L91-0559 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0057b ) /* Normal board : Deuces Wild Poker (PP0057) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P34A 1 2 2 3 5 9 15 25 200 250 800
+ % Range: 96.8-98.8% Optimum: 100.8% Hit Frequency: 45.3%
+ Programs Available: PP0057, X000057P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0057_600-550.u68", 0x00000, 0x8000, CRC(846c8066) SHA1(a2d26eb762ece79a3cb813f229e929ec9b16d365) ) /* Game Version: 600, Library Version: 550, Video Lib Ver: 550 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg914.u72", 0x00000, 0x8000, CRC(3a428484) SHA1(04ca1148b29df394d948b5d9ae06ac0ba9e53246) ) /* Custom El Cortez card backs - 4/2/90 @ IGT L90-0708 */
+ ROM_LOAD( "mgo-cg914.u73", 0x08000, 0x8000, CRC(dee10fa3) SHA1(2f2fc6496374e3c145f61f94da99a7c6d7ba8524) )
+ ROM_LOAD( "mbo-cg914.u74", 0x10000, 0x8000, CRC(8c05106f) SHA1(942183094df0ea6666725386711e7b60e16d3d50) )
+ ROM_LOAD( "mxo-cg914.u75", 0x18000, 0x8000, CRC(7e8453e0) SHA1(0d2fdd11767d9982657a75c1276aa8c35abfa653) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap914.u50", 0x0000, 0x0100, CRC(ab8ec1e4) SHA1(e2af88f4ff555a8d56fef98adb57149522239a07) )
+ROM_END
+
+ROM_START( pepp0057c ) /* Normal board : Deuces Wild Poker (PP0057) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P34A 1 2 2 3 5 9 15 25 200 250 800
+ % Range: 96.8-98.8% Optimum: 100.8% Hit Frequency: 45.3%
+ Programs Available: PP0057, X000057P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0057_562-550.u68", 0x00000, 0x8000, CRC(d146aab6) SHA1(be588f73ab33367b42d759e5601e03c747b5639b) ) /* Game Version: 562, Library Version: 550, Video Lib Ver: 550 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0057d ) /* Normal board : Deuces Wild Poker (PP0057) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P34A 1 2 2 3 5 9 15 25 200 250 800
+ % Range: 96.8-98.8% Optimum: 100.8% Hit Frequency: 45.3%
+ Programs Available: PP0057, X000057P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "pp0057_540-508.u68", 0x00000, 0x8000, CRC(9a8281c2) SHA1(d411294062d7896a7f68a1c4a6295e18787dc7d6) ) /* Game Version: 540, Library Version: 508, Video Lib Ver: 508 */
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -3033,7 +3367,7 @@ PayTable 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0060 ) /* Normal board : Standard Draw Poker (PP0060) - PSR Verified */
@@ -3097,10 +3431,10 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0060c ) /* Normal board : Standard Draw Poker (PP0060) - Cruise version - Tournament Mode capable */
+ROM_START( pepp0060c ) /* Normal board : Standard Draw Poker (PP0060) - Tournament Mode capable - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -3108,17 +3442,17 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
% Range: 91.0-93.0% Optimum: 95.0% Hit Frequency: 45.5%
Programs Available: PP0060, X000060P & PP0420 - Non Double-up Only
-NOTE: As found but PSR for build A6H-A8H shows CG2004 with CAP740
+NOTE: PSR for build A6H-A8H shows CG2004 with CAP740, but found with CG2002 - All chips labaled CRUIS
*/
ROM_REGION( 0x10000, "maincpu", 0 ) /* 11/13/97 @IGT CRUIS */
ROM_LOAD( "pp0060_a6h-a8h.u68", 0x00000, 0x10000, CRC(81963084) SHA1(2493bb040b9d0ea5cfe77f8d07546d3a3ac3716a) ) /* Game Version: A6H, Library Version: A8H - 11/13/97 IGT CRUIS */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2002.u72", 0x00000, 0x8000, CRC(d9d03979) SHA1(9729cbb2e5472eb652f8f549dd85047abe11cae0) ) /* 08/30/94 @IGT CRUIS */
- ROM_LOAD( "mgo-cg2002.u73", 0x08000, 0x8000, CRC(ad5bd2cd) SHA1(e5dacd2827f14dd9811311552b7e3816a36b9284) )
- ROM_LOAD( "mbo-cg2002.u74", 0x10000, 0x8000, CRC(7362f7f3) SHA1(fce4ce2cdd836e37382d39d8b167019cfc4c6166) )
- ROM_LOAD( "mxo-cg2002.u75", 0x18000, 0x8000, CRC(4560fdec) SHA1(63ec67afd378a06d74084bba72fbbe9be12e24d3) )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
@@ -3143,7 +3477,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0064 ) /* Normal board : Joker Poker (PP0064) */
@@ -3167,7 +3501,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0065 ) /* Normal board : Joker Poker (Aces or Better) (PP0065) */
@@ -3192,7 +3526,7 @@ Superseded by PP0429 (Non Double-up) / PP0458
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0083 ) /* Normal board : Tens or Better (PP0083) */
@@ -3214,7 +3548,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0085 ) /* Normal board : Joker Poker (Two Pair or Better) (PP0085) - Double Up always enabled */
@@ -3237,7 +3571,7 @@ PayTable 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0089 ) /* Normal board : Standard Draw Poker (PP0089) */
@@ -3259,7 +3593,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0094 ) /* Normal board : Standard Draw Poker (PP0094) - PSR Verified */
@@ -3283,7 +3617,58 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0103 ) /* Normal board : Deuces Wild Poker 1-100 Coin (PP0103) */
+ROM_START( pepp0103 ) /* Normal board : Deuces Wild Poker (PP0103) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P47A 1 2 2 3 4 13 16 25 200 250 800
+ % Range: 92.8-94.8% Optimum: 96.8% Hit Frequency: 44.9%
+ Programs Available: PP0103
+
+This set has the correct payouts for 5K & RF-with Deuce
+
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0103_668-640.u68", 0x00000, 0x10000, CRC(8f02046a) SHA1(78c1af3fe6dfc2b9dfd392c8852c1c354ad97d88) ) /* Game Version: 668, Library Version: 640 - 7-13-90 @ IGT L90-1241 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0103a ) /* Normal board : Deuces Wild Poker (PP0103) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P47A 1 2 2 3 4 13 16 25 200 250 800
+ % Range: 92.8-94.8% Optimum: 96.8% Hit Frequency: 44.9%
+ Programs Available: PP0103
+
+This set erroneously swapped the intended payout of 5K & RF-with Deuce,
+ with this set the 5K pays 25 while the RF-with Deuce pays 16
+
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0103_583-574.u68", 0x00000, 0x10000, CRC(fb12e63b) SHA1(28c0e716f3a9228d2646ce331d3d125eceb4aac2) ) /* Game Version: 583, Library Version: 574 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0103b ) /* Normal board : Deuces Wild Poker (PP0103) */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -3295,15 +3680,40 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
This set erroneously swapped the intended payout of 5K & RF-with Deuce,
with this set the 5K pays 25 while the RF-with Deuce pays 16
-Superseded by PP0224 (Non Double-up) / PP0290
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0103_600-550.u68", 0x00000, 0x8000, CRC(1a9cc3ee) SHA1(55ee93cbfc90f517368a13fb71f5e50d575d703e) ) /* Game Version: 600, Library Version: 550, Video Lib Ver: 550 - 08/15/89 @ IGT L89-1343 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0103c ) /* Normal board : Deuces Wild Poker (PP0103) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P47A 1 2 2 3 4 13 16 25 200 250 800
+ % Range: 92.8-94.8% Optimum: 96.8% Hit Frequency: 44.9%
+ Programs Available: PP0103
+
+This set erroneously swapped the intended payout of 5K & RF-with Deuce,
+ with this set the 5K pays 25 while the RF-with Deuce pays 16
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0103_600-550.u68", 0x00000, 0x8000, CRC(1a9cc3ee) SHA1(55ee93cbfc90f517368a13fb71f5e50d575d703e) ) /* Game Version: 600, Library Version: 550, Video Lib Ver: 550 */
+ ROM_LOAD( "pp0103_540-508.u68", 0x00000, 0x8000, CRC(df2cc111) SHA1(a8f014bf58e6a7c26943e71938f8b33b9ee89016) ) /* Game Version: 540, Library Version: 508, Video Lib Ver: 508 */
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -3330,7 +3740,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0116 ) /* Normal board : Standard Draw Poker (PP0116) */
@@ -3352,7 +3762,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0116a ) /* Normal board : Standard Draw Poker (PP0116) */
@@ -3374,7 +3784,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg864.u75", 0x18000, 0x8000, CRC(04f81245) SHA1(055271c6c502fad3be5f2d694a94f96bf3176404) ) /* However there is no support for Deuces Wild sets */
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap864.u50", 0x0000, 0x0100, CRC(c80e5743) SHA1(edf4e5a68905cc566077613d856bc90b8136a227) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap864.u50", 0x0000, 0x0100, CRC(c80e5743) SHA1(edf4e5a68905cc566077613d856bc90b8136a227) )
ROM_END
ROM_START( pepp0118 ) /* Normal board : Standard Draw Poker (PP0118) */
@@ -3396,7 +3806,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0120 ) /* Normal board : Wild Sevens Poker (PP0120) */
@@ -3416,7 +3826,7 @@ Same payout as P59A (PP0124 / X000124P, Deuces Wild Poker) just swapping Sevens
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -3439,7 +3849,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -3458,6 +3868,28 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0126, X000126P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0126_a47-a76.u68", 0x00000, 0x10000, CRC(fcfa3c7f) SHA1(e2025cf8294ba904456431dc37af5ebef6acc8e5) ) /* Game Version: A47, Library Version: A76 - 11/14/95 @ IGT L95-2462 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2133.u72", 0x00000, 0x8000, CRC(b21a789f) SHA1(c49f9b5f51c29bbc0e1392e86d6602bd44e46380) ) /* 02/02/95 @ IGT L95-0276 */
+ ROM_LOAD( "mgo-cg2133.u73", 0x08000, 0x8000, CRC(2b7db148) SHA1(d5ff5dde3589d28937d13dc5c4c38caa1ebf2d56) )
+ ROM_LOAD( "mbo-cg2133.u74", 0x10000, 0x8000, CRC(6ed455b7) SHA1(e4f223606c19d09be501461f38520f423599e0a2) )
+ ROM_LOAD( "mxo-cg2133.u75", 0x18000, 0x8000, CRC(095ea26d) SHA1(9bdd8afe67da2370c4ca2d8418f3afdaf7b557ff) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0126a ) /* Normal board : Deuces Wild Poker (PP0126) - PSR Verified */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P63A 1 2 2 3 5 9 12 20 200 250 800
+ % Range: 94.9-96.9% Optimum: 98.9% Hit Frequency: 45.4%
+ Programs Available: PP0126, X000126P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "pp0126_961-984.u68", 0x00000, 0x10000, CRC(aadb62ef) SHA1(85979d5932ef254241c363414c2093cc943e88a5) ) /* Game Version: 961, Library Version: 984 */
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -3470,6 +3902,29 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
+ROM_START( pepp0126b ) /* Normal board : Deuces Wild Poker (PP0126) */
+/*
+ w/D w/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P63A 1 2 2 3 5 9 12 20 200 250 800
+ % Range: 94.9-96.9% Optimum: 98.9% Hit Frequency: 45.4%
+ Programs Available: PP0126, X000126P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0126_600-550.u68", 0x00000, 0x8000, CRC(bc1f4de9) SHA1(88a6ff92f0c7a66f9843240dfc55ac3bd93eba68) ) /* Game Version: 600, Library Version: 550, Video Lib Ver: 550 - 08/15/89 @ IGT L89-1349 */
+ ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
ROM_START( pepp0127 ) /* Normal board : Deuces Joker Wild Poker (PP0127) - PSR Verified */
/*
With w/o w/o With
@@ -3493,7 +3948,30 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF 4D (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0127a ) /* Normal board : Deuces Joker Wild Poker (PP0127) - Multi Regional / Multi Currency - Tournament Mode capable */
+ROM_START( pepp0127a ) /* Normal board : Deuces Joker Wild Poker (PP0127) */
+/*
+ With w/o w/o With
+ Wild JKR Wild JKR
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF 4D (Bonus)
+---------------------------------------------------------------------
+ P65N 1 2 3 3 3 6 9 12 25 250 1000 2000
+ % Range: 95.1-97.1% Optimum: 99.1% Hit Frequency: 50.4%
+ Programs Available: PP0127
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0127_611-597.u68", 0x00000, 0x10000, CRC(90e94e05) SHA1(d0d368b2c51ccf5c7dbaa4763db08260f0802c32) ) /* Game Version: 611, Library Version: 597 - 11-21-89 @ IGT L89-1415 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg1348.u72", 0x00000, 0x8000, CRC(b2411211) SHA1(fb78da8c92be7b0ce174aecd0392875fdd3653e7) )
+ ROM_LOAD( "mgo-cg1348.u73", 0x08000, 0x8000, CRC(06e97f8a) SHA1(bcdd33aa36746d71fb6ce804eb222ecd7b27d0d6) )
+ ROM_LOAD( "mbo-cg1348.u74", 0x10000, 0x8000, CRC(5a4547fd) SHA1(ec28731253733b4ecdff341120ae8572995cffc6) )
+ ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0127b ) /* Normal board : Deuces Joker Wild Poker (PP0127) - Multi Regional / Multi Currency - Tournament Mode capable */
/*
With w/o w/o With
Wild JKR Wild JKR
@@ -3513,7 +3991,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF 4D (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap1215.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
ROM_START( pepp0129 ) /* Normal board : Joker Poker (Two Pair or Better) (PP0129) */
@@ -3537,7 +4015,7 @@ Internally the program erroneously reports a 95.50% return, same as X000550P doe
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0130 ) /* Normal board : Aces & Faces (PP0130) - PSR Verified */
@@ -3693,7 +4171,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0158d ) /* Normal board : 4 of a Kind Bonus Poker (PP0158) */
@@ -3718,7 +4196,7 @@ NOTE: While this is a 32K version, it does require DOOR OPEN cycling and isn't c
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0159 ) /* Normal board : Standard Draw Poker (PP0159) - Multi Regional / Multi Currency - Tournament Mode capable - PSR Verified */
@@ -3739,7 +4217,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0171 ) /* Normal board : Joker Poker (PP0171) - PSR Verified */
@@ -3784,7 +4262,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0178 ) /* Normal board : 4 of a Kind Bonus Poker w/ operator selectable special 4 of a Kind (PP0178) */
@@ -3828,7 +4306,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0188 ) /* Normal board : Standard Draw Poker (PP0188) */
@@ -3849,7 +4327,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0188a ) /* Normal board : Standard Draw Poker (PP0188) - Tournament Mode capable - PSR Verified */
@@ -3873,7 +4351,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0188b ) /* Normal board : Standard Draw Poker (PP0188) - 11/04/96 @ IGT L97-0126 - Tournament Mode capable - PSR Verified */
+ROM_START( pepp0188b ) /* Normal board : Standard Draw Poker (PP0188) - Tournament Mode capable - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -3882,7 +4360,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
Programs Available: PP0188, X000188P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0188_a53-a7t.u68", 0x00000, 0x10000, CRC(92b4802e) SHA1(aa5289e0b7845e42501a4df6854a4d1b7612e1e5) ) /* Game Version: A53, Library Version: A7T */
+ ROM_LOAD( "pp0188_a53-a7t.u68", 0x00000, 0x10000, CRC(92b4802e) SHA1(aa5289e0b7845e42501a4df6854a4d1b7612e1e5) ) /* Game Version: A53, Library Version: A7T - 11/04/99 @ IGT L97-0126 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
@@ -3912,10 +4390,10 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0190 ) /* Normal board : Deuces Wild Poker (No Double-up) (PP0190) - 11/13/95 @ IGT L99-0100 - PSR Verified */
+ROM_START( pepp0190 ) /* Normal board : Deuces Wild Poker (No Double-up) (PP0190) - PSR Verified */
/*
w/D w/oD
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -3927,7 +4405,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
NOTE: This later build works with CG1215 (and later Deuces Wild) graphics roms and is NOT compatible with CG773
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0190_a47-a76.u68", 0x00000, 0x10000, CRC(974f9d7a) SHA1(8fe65c568246fbf97b20cd2b05cccb23022dff65) ) /* Game Version: A47, Library Version: A76 */
+ ROM_LOAD( "pp0190_a47-a76.u68", 0x00000, 0x10000, CRC(974f9d7a) SHA1(8fe65c568246fbf97b20cd2b05cccb23022dff65) ) /* Game Version: A47, Library Version: A76 - 11/13/95 @ IGT L99-0100 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2133.u72", 0x00000, 0x8000, CRC(b21a789f) SHA1(c49f9b5f51c29bbc0e1392e86d6602bd44e46380) ) /* 02/02/95 @ IGT L95-0276 */
@@ -3980,7 +4458,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "pp0190_642-623.u68", 0x00000, 0x10000, CRC(3b8a3203) SHA1(33bd285def754df34f4815cd713e2ff599c74f11) ) /* Game Version: 642, Library Version: 623 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* Should be MxO-CG2023.U7x & CAP773 (or CAP2023)?? */
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -4011,7 +4489,29 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0197 ) /* Normal board : Standard Draw Poker (PP0197) - 10/23/95 @ IGT L95-2452 */
+ROM_START( pepp0195 ) /* Normal board : 4 of a Kind Bonus Poker (PP0195) */
+/*
+ 5-K 2-4
+PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
+------------------------------------------------------------------
+ P90A 1 2 3 4 5 7 25 40 80 50 250 800
+ % Range: 94.0-96.0% Optimum: 98.0% Hit Frequency: 45.5%
+ Programs Available: PP0195
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0195_686-648.u68", 0x00000, 0x10000, CRC(8bb4f7a8) SHA1(59fec2cd8afe474988fbb00988c9449ea81df911) ) /* Game Version: 686, Library Version: 648 - 09/11/90 @ IGT L90-1503 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2003.u72", 0x00000, 0x8000, CRC(0d425f48) SHA1(b60aaf3f4bd76f75f72f6e8dda724bdf795cb521) ) /* 08/30/94 @ IGT L95-0145 */
+ ROM_LOAD( "mgo-cg2003.u73", 0x08000, 0x8000, CRC(add0afc4) SHA1(0519bf2f36cb67140933b2c533e625544f27d16b) )
+ ROM_LOAD( "mbo-cg2003.u74", 0x10000, 0x8000, CRC(8649dec0) SHA1(0024d3a8fd85279552910b14b69b225bda93957f) )
+ ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
+ROM_END
+
+ROM_START( pepp0197 ) /* Normal board : Standard Draw Poker (PP0197) - 10/23/95 @ IGT L95-2452 - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -4023,14 +4523,13 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "pp0197_a45-a75.u68", 0x00000, 0x10000, CRC(6b5b3108) SHA1(2fafcf979db92d4f9f1fb0a2e9645fd71d8dd5c2) ) /* Game Version: A45, Library Version: A75 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
- ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
- ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
- ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
-
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0197a ) /* Normal board : Standard Draw Poker (PP0197) - 07/29/96 @ IGT L96-1219 - PSR Verified */
@@ -4115,10 +4614,10 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0197e ) /* Normal board : Standard Draw Poker (PP0197) - Cruise version - Tournament Mode capable - PSR Verified */
+ROM_START( pepp0197e ) /* Normal board : Standard Draw Poker (PP0197) - Tournament Mode capable - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -4203,7 +4702,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0203c ) /* Normal board : 4 of a Kind Bonus Poker (PP0203) */
@@ -4225,7 +4724,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0203d ) /* Normal board : 4 of a Kind Bonus Poker (PP0203) - Multi Regional / Multi Currency - Tournament Mode capable - PSR Verified */
@@ -4247,7 +4746,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0203e ) /* Normal board : 4 of a Kind Bonus Poker (PP0203) */
@@ -4272,7 +4771,29 @@ NOTE: While this is a 32K version, it does require DOOR OPEN cycling and isn't c
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0218 ) /* Normal board : 4 of a Kind Bonus Poker (PP0218) */
+/*
+ 5-K 2-4
+PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
+------------------------------------------------------------------
+ P101A 1 2 3 4 5 6 25 40 80 50 250 800
+ % Range: 92.5-94.5% Optimum: 96.9% Hit Frequency: 45.5%
+ Programs Available: PP0218
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0218_686-648.u68", 0x00000, 0x10000, CRC(a1a6bb87) SHA1(0f41f56ea54a7a17bbb2b1d33a4be719bcdac899) ) /* Game Version: 686, Library Version: 648 - 10/25/90 @ IGT L90-1703 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2003.u72", 0x00000, 0x8000, CRC(0d425f48) SHA1(b60aaf3f4bd76f75f72f6e8dda724bdf795cb521) ) /* 08/30/94 @ IGT L95-0145 */
+ ROM_LOAD( "mgo-cg2003.u73", 0x08000, 0x8000, CRC(add0afc4) SHA1(0519bf2f36cb67140933b2c533e625544f27d16b) )
+ ROM_LOAD( "mbo-cg2003.u74", 0x10000, 0x8000, CRC(8649dec0) SHA1(0024d3a8fd85279552910b14b69b225bda93957f) )
+ ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0219 ) /* Normal board : Standard Draw Poker (Auto Hold in options) (PP0219) */
@@ -4293,7 +4814,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg904.u75", 0x18000, 0x8000, CRC(ff648f12) SHA1(58f8247a997e1b0b69bafed428d30822adef339e) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0221 ) /* Normal board : Standard Draw Poker (PP0221) - PSR Verified */
@@ -4356,7 +4877,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0223 ) /* Normal board : Deuces Joker Wild Poker (PP0223) */
@@ -4381,7 +4902,7 @@ Internally the program erroneously reports a 92.80% return. Superseded by PP0812
ROM_LOAD( "mxo-cg1215.u75", 0x18000, 0x8000, CRC(73c24e43) SHA1(f09beaf374ad371db2701767ce6ac5bdb13c445a) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap1215.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
ROM_START( pepp0224 ) /* Normal board : Deuces Wild Poker (No Double-up) (PP0224) - PSR Verified */
@@ -4446,7 +4967,24 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0232 ) /* Normal board : Uknown Draw Poker (PP0232) */
+/*
+Has 5 additional cards, 10 through Ace, with a US Flag for a Suit. These count towards matches up to 5K and Sequential Flag Royal.
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0232_717-698.u68", 0x00000, 0x10000, CRC(d6d4df92) SHA1(6bb29740658131ae7f25d68427e0c7eb7cb976b0) ) /* Game Version: 717, Library Version: 698 05/02/91 @ IGT L91-0912 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg1020.u72", 0x00000, 0x8000, CRC(7f8f276e) SHA1(0c5ac270ccae56295848c8714512584b6ada2306) ) /* 03-20-91 @ IGT L91-0912 */
+ ROM_LOAD( "mgo-cg1020.u73", 0x08000, 0x8000, CRC(7d07028e) SHA1(59fb989a772525ee6370a0948bc4c8918c550515) ) /* Original labels for both program and CG roms state L91-0912 */
+ ROM_LOAD( "mbo-cg1020.u74", 0x10000, 0x8000, CRC(16731f46) SHA1(9770052020ffe48f7cdc5022d6c96e84311048d8) )
+ ROM_LOAD( "mxo-cg1020.u75", 0x18000, 0x8000, CRC(8f604ac0) SHA1(02ff328a6044ec3697c339f9bfc51aa5557b92bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap1020.u50", 0x0000, 0x0100, CRC(abec7425) SHA1(b52223c4b6657d04230675bac6d100c103d9386a) )
ROM_END
ROM_START( pepp0242 ) /* Normal board : Deuces Wild Poker (PP0242) - Multi Regional / Multi Currency in English / Spanish - Tournament Mode capable */
@@ -4468,7 +5006,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "mxo-cg1325.u75", 0x18000, 0x8000, CRC(9dddc501) SHA1(a0ab8b3866b0ae018b3f6e0199bdc756d4e5f967) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap1215.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
ROM_START( pepp0249 ) /* Normal board : Deuces Wild Poker (PP0249) */
@@ -4488,7 +5026,7 @@ Superseded by PP0469
ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -4606,7 +5144,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0265c ) /* Normal board : 4 of a Kind Bonus Poker (PP0265) - Multi Regional / Multi Currency - Tournament Mode capable */
@@ -4628,7 +5166,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0274 ) /* Normal board : Standard Draw Poker (PP0274) - Normal Poker & Tournament Mode capable */
@@ -4649,7 +5187,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0288 ) /* Normal board : Standard Draw Poker (PP0288) - Spanish */
@@ -4673,7 +5211,7 @@ Spanish version of PP0150
ROM_LOAD( "mxo-cg1152.u75", 0x18000, 0x8000, CRC(d65f7362) SHA1(d56fa0d13126f1599d538c81a2c7ea1f3c94b62f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0290 ) /* Normal board : Deuces Wild Poker (PP0290) - PSR Verified */
@@ -4752,7 +5290,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0125, PP0418, X000291P & PP0291 - Non Double-up Only
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0291_961-984.u68", 0x00000, 0x10000, CRC(64c83e70) SHA1(1c75c7c37a359d07b170ab644ebb98d4bce2affe) ) /* Game Version: 961, Library Version: 984 */
+ ROM_LOAD( "pp0291_961-984.u68", 0x00000, 0x10000, CRC(64c83e70) SHA1(1c75c7c37a359d07b170ab644ebb98d4bce2affe) ) /* Game Version: 961, Library Version: 984 - 12/21/93 @ IGT MS */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2023.u72", 0x00000, 0x8000, CRC(06f11ac6) SHA1(c9b111ffef75257b88d8500e77b09565c5ccbc54) )
@@ -4764,7 +5302,45 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0401 ) /* Normal board : 4 of a Kind Bonus Poker (No Double-up) (PP0401) */
+ROM_START( pepp0294 ) /* Normal board : Unknown Joker Poker Bonus (PP0294) */
+/*
+
+Unknown Paytable
+
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0294_777-785.u68", 0x00000, 0x10000, CRC(aba331b8) SHA1(ce5db8d6682e1eb9b535b93d70c399f8bdc9ff65) ) /* Game Version: 777, Library Version: 785 - 10-23-91 @ IGT L91-1149 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0295 ) /* Normal board : Unknown Deuces Wild Bonus (PP0295) */
+/*
+
+Unknown Paytable
+
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0295_776-785.u68", 0x00000, 0x10000, CRC(3293d1da) SHA1(a5493e7c0eafb256ade0221739134e736ad14f14) ) /* Game Version: 776, Library Version: 785 - 11-06-91 @ IGT L91-1256 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0401 ) /* Normal board : 4 of a Kind Bonus Poker (No Double-up) (PP0401) - PSR Verified */
/*
5-K 2-4
PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
@@ -4777,13 +5353,13 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "pp0401_789-812.u68", 0x00000, 0x10000, CRC(caad4496) SHA1(cecb469d318f25a3ad49eb0014b57f61e54183c6) ) /* Game Version: 789, Library Version: 812 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2003.u72", 0x00000, 0x8000, CRC(0d425f48) SHA1(b60aaf3f4bd76f75f72f6e8dda724bdf795cb521) ) /* 08/30/94 @ IGT L95-0145 */
- ROM_LOAD( "mgo-cg2003.u73", 0x08000, 0x8000, CRC(add0afc4) SHA1(0519bf2f36cb67140933b2c533e625544f27d16b) )
- ROM_LOAD( "mbo-cg2003.u74", 0x10000, 0x8000, CRC(8649dec0) SHA1(0024d3a8fd85279552910b14b69b225bda93957f) )
- ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0409 ) /* Normal board : 4 of a Kind Bonus Poker (No Double-up) (PP0409) */
@@ -4805,7 +5381,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0410 ) /* Normal board : 4 of a Kind Bonus Poker (No Double-up) (PP0410) - PSR Verified */
@@ -4936,7 +5512,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0420 ) /* Normal board : Standard Draw Poker (No Double-up) (PP0420) - requires SET chip to set denomination - PSR Verified */
@@ -5020,7 +5596,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0423c ) /* Normal board : Standard Draw Poker (Auto Hold in options) (No Double-up) (PP0423) */
@@ -5041,7 +5617,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0426 ) /* Normal board : Joker Poker (No Double-up) (PP0426) - PSR Verified */
@@ -5063,7 +5639,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0428 ) /* Normal board : Joker Poker (No Double-up) (PP0428) - PSR Verified */
@@ -5085,7 +5661,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0429 ) /* Normal board : Joker Poker (Aces or Better) (No Double-up) (PP0429) - PSR Verified */
@@ -5107,7 +5683,7 @@ PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0429a ) /* Normal board : Joker Poker (Aces or Better) (No Double-up) (PP0429) - Must use a SET chip to set denomination - PSR Verified */
@@ -5175,10 +5751,10 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF 4D (Bonus)
ROM_LOAD( "mxo-cg1348.u75", 0x18000, 0x8000, CRC(cdd8485f) SHA1(4af2f270ed40955bb11f0e427f4ad614fcb3157c) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap1215.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0434 ) /* Normal board : Bonus Poker Deluxe (PP0434) */
+ROM_START( pepp0434 ) /* Normal board : Bonus Poker Deluxe (PP0434) - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -5190,13 +5766,53 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "pp0434_a45-a75.u68", 0x00000, 0x10000, CRC(e5c9ba19) SHA1(9a01457a54a0445a0f32affe2038366e681cada1) ) /* Game Version: A45, Library Version: A74 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2003.u72", 0x00000, 0x8000, CRC(0d425f48) SHA1(b60aaf3f4bd76f75f72f6e8dda724bdf795cb521) ) /* 08/30/94 @ IGT L95-0145 */
- ROM_LOAD( "mgo-cg2003.u73", 0x08000, 0x8000, CRC(add0afc4) SHA1(0519bf2f36cb67140933b2c533e625544f27d16b) )
- ROM_LOAD( "mbo-cg2003.u74", 0x10000, 0x8000, CRC(8649dec0) SHA1(0024d3a8fd85279552910b14b69b225bda93957f) )
- ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0434a ) /* Normal board : Bonus Poker Deluxe (PP0434) - PSR Verified */
+/*
+PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
+----------------------------------------------------------
+ P200A 1 1 3 4 6 8 80 50 250 800
+ % Range: 94.5-96.5% Optimum: 98.5% Hit Frequency: 45.2%
+ Programs Available: PP0434, X000434P & PP0713 - Non Double-up Only
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0434_979-a0c.u68", 0x00000, 0x10000, CRC(8e28e702) SHA1(048706b891ae43aa1bb430c93bd21d38bf9dd983) ) /* Game Version: 979, Library Version: A0C - 06/08/94 @ IGT L94-1583 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
+ ROM_LOAD( "mgo-cg2004.u73", 0x08000, 0x8000, CRC(12607f1e) SHA1(248e1ecee4e735f5943c50f8c350ca95b81509a7) )
+ ROM_LOAD( "mbo-cg2004.u74", 0x10000, 0x8000, CRC(78c3fb9f) SHA1(2b9847c511888de507a008dec981778ca4dbcd6c) )
+ ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0445 ) /* Normal board : Unknown Joker Poker Bonus (PP0445) */
+/*
+
+Unknown Paytable
+
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0445_777-785.u68", 0x00000, 0x10000, CRC(37ae0789) SHA1(0b41bc88a998a20074315f8daf59dddfd0c3b3b3) ) /* Game Version: 777, Library Version: 785 - 05/12/92 @ IGT L92-0623 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0447 ) /* Normal board : Standard Draw Poker (PP0447) - PSR Verified */
@@ -5238,10 +5854,10 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
-ROM_START( pepp0447b ) /* Normal board : Standard Draw Poker (PP0447) - 10/06/97 @ IGT L97-2422 - Tournament Mode capable - PSR Verified */
+ROM_START( pepp0447b ) /* Normal board : Standard Draw Poker (PP0447) - Tournament Mode capable - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
---------------------------------------------------------
@@ -5250,7 +5866,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
Programs Available: PP0447, X000447P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0447_a6h-a8h.u68", 0x00000, 0x10000, CRC(d52c0917) SHA1(0fd774152bfa9a287fd606d52bd1e331720bbb4a) ) /* Game Version: A6H, Library Version: A8H */
+ ROM_LOAD( "pp0447_a6h-a8h.u68", 0x00000, 0x10000, CRC(d52c0917) SHA1(0fd774152bfa9a287fd606d52bd1e331720bbb4a) ) /* Game Version: A6H, Library Version: A8H - 10/06/97 @ IGT L97-2422 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
@@ -5259,7 +5875,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0449 ) /* Normal board : Standard Draw Poker (PP0449) - PSR Verified */
@@ -5304,7 +5920,29 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0452 ) /* Normal board : Double Deuces Wild Poker (PP0452) */
+ROM_START( pepp0450 ) /* Normal board : Loose Deuce Poker (PP0450) */
+/*
+ w/D W/oD
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+-----------------------------------------------------------
+ P235A 1 2 2 3 4 10 17 25 500 250 800
+ % Range: 97.6-99.6% Optimum: 101.6% Hit Frequency: 45.2%
+ Programs Available: PP0450
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0450_726-706.u68", 0x00000, 0x10000, CRC(547e5a60) SHA1(567a97957d8eb8574e51443146a9a7cc4885fd01) ) /* Game Version: 726, Library Version: 706 - 04-20-92 @ IGT L92-0477 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
+ ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
+ ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
+ ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0452 ) /* Normal board : Double Deuces Wild Poker (PP0452) - PSR Verified */
/*
w/D wo/D
PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
@@ -5314,10 +5952,32 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
Programs Available: PP0452, X000452P
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0452_726-706.u68", 0x00000, 0x10000, CRC(26413947) SHA1(66bc2fb3dd62aa9d8ab125665747d331a55e1868) ) /* Game Version: 726, Library Version: 706 */
+ ROM_LOAD( "pp0452_a47-a76.u68", 0x00000, 0x10000, CRC(0e61c726) SHA1(f5c8d218124372574e0b65cd6601b10093591a07) ) /* Game Version: A47, Library Version: A76 - 11/03/95 @ IGT L95-2251 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg2133.u72", 0x00000, 0x8000, CRC(b21a789f) SHA1(c49f9b5f51c29bbc0e1392e86d6602bd44e46380) ) /* 02/02/95 @ IGT L95-0276 */
+ ROM_LOAD( "mgo-cg2133.u73", 0x08000, 0x8000, CRC(2b7db148) SHA1(d5ff5dde3589d28937d13dc5c4c38caa1ebf2d56) )
+ ROM_LOAD( "mbo-cg2133.u74", 0x10000, 0x8000, CRC(6ed455b7) SHA1(e4f223606c19d09be501461f38520f423599e0a2) )
+ ROM_LOAD( "mxo-cg2133.u75", 0x18000, 0x8000, CRC(095ea26d) SHA1(9bdd8afe67da2370c4ca2d8418f3afdaf7b557ff) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
+ROM_END
+
+ROM_START( pepp0452a ) /* Normal board : Double Deuces Wild Poker (PP0452) */
+/*
+ w/D wo/D
+PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
+------------------------------------------------------------
+ P236A 1 2 2 3 4 11 16 25 400 250 800
+ % Range: 95.6-97.6% Optimum: 99.6% Hit Frequency: 45.1%
+ Programs Available: PP0452, X000452P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0452_726-706.u68", 0x00000, 0x10000, CRC(26413947) SHA1(66bc2fb3dd62aa9d8ab125665747d331a55e1868) ) /* Game Version: 726, Library Version: 706 - 04-20-92 @ IGT L92-0452 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -5326,7 +5986,29 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "cap773.u50", 0x0000, 0x0100, CRC(294b7b10) SHA1(a405a4b8547b713c5c02dacb19e7354095a7b584) )
ROM_END
-ROM_START( pepp0454 ) /* Normal board : Bonus Poker Deluxe (PP0454) */
+ROM_START( pepp0453 ) /* Normal board : Joker Poker (PP0453) */
+/*
+ w/J w/oJ
+PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+----------------------------------------------------------------
+ P245A 1 1 2 3 5 7 18 50 100 200 400 800
+ % Range: 95.1-97.1% Optimum: 99.1% Hit Frequency: 44.2%
+ Programs Available: PP0453
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0453_782-779.u68", 0x00000, 0x10000, CRC(3d1e88c3) SHA1(9b8b313f6d81a5c6dffc081ef54f883f526e707b) ) /* Game Version: 782, Library Version: 779 - 05-14-92 @ IGT L92-0611 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg740.u72", 0x00000, 0x8000, CRC(72667f6c) SHA1(89843f472cc0329317cfc643c63bdfd11234b194) )
+ ROM_LOAD( "mgo-cg740.u73", 0x08000, 0x8000, CRC(7437254a) SHA1(bba166dece8af58da217796f81117d0b05752b87) )
+ ROM_LOAD( "mbo-cg740.u74", 0x10000, 0x8000, CRC(92e8c33e) SHA1(05344664d6fdd3f4205c50fa4ca76fc46c18cf8f) )
+ ROM_LOAD( "mxo-cg740.u75", 0x18000, 0x8000, CRC(ce4cbe0b) SHA1(4bafcd68be94a5deaae9661584fa0fc940b834bb) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0454 ) /* Normal board : Bonus Poker Deluxe (PP0454) - PSR Verified */
/*
PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
----------------------------------------------------------
@@ -5344,7 +6026,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0454a ) /* Normal board : Bonus Poker Deluxe (PP0454) - PSR Verified */
@@ -5431,7 +6113,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0467 ) /* Normal board : Unknown Bonus Poker (PP0467) */
@@ -5451,7 +6133,7 @@ PayTable Js+ 2P 3K STR FL FH 4K ?? SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0488 ) /* Normal board : Standard Draw Poker (PP0488) - 01/12/95 @ IGT L95-0175 */
@@ -5474,7 +6156,7 @@ NOTE: This build / version is exclusive to Arizona Charlies
ROM_LOAD( "mxo-cg2153.u75", 0x18000, 0x8000, CRC(3ae44f7e) SHA1(00d625b60bffef6ce622cb50a3aa93b92131f578) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap2153.u50", 0x0000, 0x0100, CRC(d02fca7e) SHA1(4384b4238d487b4c763983b27381f4c6c08eb605) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap2153.u50", 0x0000, 0x0100, CRC(d02fca7e) SHA1(4384b4238d487b4c763983b27381f4c6c08eb605) )
ROM_END
ROM_START( pepp0508 ) /* Normal board : Loose Deuce Poker (PP0508) */
@@ -5490,7 +6172,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "pp0508_872-888.u68", 0x00000, 0x10000, CRC(41da6c1e) SHA1(75dc178bc48a58ccf7e87d91419c5dcd99af2d58) ) /* Game Version: 872, Library Version: 888 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -5517,7 +6199,7 @@ PayTable Js+ TP 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0510 ) /* Normal board : Standard Draw Poker (PP0510) - 11-24-92 @ IGT L92-1614 */
@@ -5538,7 +6220,7 @@ PayTable Js+ TP 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0514 ) /* Normal board : Double Bonus Poker (PP0514) - PSR Verified */
@@ -5582,7 +6264,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0514b ) /* Normal board : Double Bonus Poker (PP0514) */
@@ -5604,7 +6286,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0515 ) /* Normal board : Double Bonus Poker (PP0515) - PSR Verified */
@@ -5670,7 +6352,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0515c ) /* Normal board : Double Bonus Poker (PP0515) */
@@ -5692,7 +6374,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0516 ) /* Normal board : Double Bonus Poker (PP0516) - PSR Verified */
@@ -5736,7 +6418,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0516b ) /* Normal board : Double Bonus Poker (PP0516) - Multi Regional / Multi Currency - Tournament Mode capable - PSR Verified */
@@ -5774,7 +6456,7 @@ PayTable 3K STR FL FH 4K SF 5K RF 4D RF (Bonus)
ROM_LOAD( "pp0526_872-934.u68", 0x00000, 0x10000, CRC(dca9c400) SHA1(e326e6aa73261b78d331c40640d392c1cd8b1f49) ) /* Game Version: 872, Library Version: 934 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) )
+ ROM_LOAD( "mro-cg773.u72", 0x00000, 0x8000, CRC(73827e49) SHA1(f2b3f58aeac62b36ba60a408cf04c691b0564ace) ) /* 10-06-88 @ IGT L88-2023 */
ROM_LOAD( "mgo-cg773.u73", 0x08000, 0x8000, CRC(af569952) SHA1(d28ae1c216a99bedc4315e61151934f53b932ef4) )
ROM_LOAD( "mbo-cg773.u74", 0x10000, 0x8000, CRC(3b59799b) SHA1(b6da6e719f5cc475f2f7112d6a8fe346ea5d511e) )
ROM_LOAD( "mxo-cg773.u75", 0x18000, 0x8000, CRC(75da0cd8) SHA1(4fb4eda9ae8e59884201368c7d8e4ff8b9967a4f) )
@@ -5802,7 +6484,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0536 ) /* Normal board : Joker Poker (PP0536) - PSR Verified */
@@ -5868,7 +6550,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "mxo-cg2003.u75", 0x18000, 0x8000, CRC(904631cd) SHA1(d280a2f16b51a04b3f601db3535980a765c60e6f) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0542 ) /* Normal board : One Eyed Jacks (PP0542) Use SET001 to set Denomination for this game */
@@ -5890,7 +6572,7 @@ PayTable As 2PR 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2243.u75", 0x18000, 0x8000, CRC(fa6f300b) SHA1(ba72c3004e6fd4e78d8385a52ede566cf5143d10) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0542a ) /* Normal board : One Eyed Jacks (PP0542) Use SET001 to set Denomination for this game */
@@ -5912,7 +6594,29 @@ PayTable As 2PR 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2020.u75", 0x18000, 0x8000, CRC(78d6eac3) SHA1(09b614abe5f5509f3050c2cec94dc794e2b4db0d) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
+ROM_END
+
+ROM_START( pepp0542b ) /* Normal board : One Eyed Jacks (PP0542) Use SET001 to set Denomination for this game */
+/*
+ With w/o
+ Wild Wild
+PayTable As 2PR 3K STR FL FH 4K SF RF 5K RF (Bonus)
+-----------------------------------------------------------------
+ ???? 1 1 1 2 4 5 10 50 100 100 400 1600
+ % Range: 94.8-96.8% Optimum: 98.8% Hit Frequency: 44.5%
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "pp0542_905-923.u68", 0x00000, 0x10000, CRC(f4fe3db5) SHA1(18521a569aae8d89e82f9709edc03badae153dd4) ) /* Game Version: 905, Library Version: 923 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg1199.u72", 0x00000, 0x8000, CRC(1708678e) SHA1(e4518071c78857c63f17394c6589439944b6c686) ) /* 03-17-93 @ IGT L93-1061 */
+ ROM_LOAD( "mgo-cg1199.u73", 0x08000, 0x8000, CRC(485912b5) SHA1(eaafa7cb900c57a467fafb8d744f07a8a5865341) )
+ ROM_LOAD( "mbo-cg1199.u74", 0x10000, 0x8000, CRC(8147e894) SHA1(e6842a31af41321df4cd3bb43066f607c52b351f) )
+ ROM_LOAD( "mxo-cg1199.u75", 0x18000, 0x8000, CRC(4476f103) SHA1(2fee9710721b37da292b439c565e4f3f94e09235) )
+
+ ROM_REGION( 0x100, "proms", 0 )
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( pepp0550 ) /* Normal board : Joker Poker (Two Pair or Better) (PP0550) - PSR Verified */
@@ -5956,7 +6660,7 @@ PayTable 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0555 ) /* Normal board : Standard Draw Poker (PP0555) */
@@ -5980,7 +6684,7 @@ Internally the program reports a 99.40% return.
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0559 ) /* Normal board : Joker Poker (Aces or Better) (Auto Hold in options) (PP0559) */
@@ -6002,7 +6706,7 @@ PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0562 ) /* Normal board : 10's or Better (Auto Hold in options) (PP0562) */
@@ -6023,7 +6727,7 @@ PayTable 10s+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0568 ) /* Normal board : Joker Poker (PP0568) - PSR Verified */
@@ -6036,7 +6740,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
Programs Available: PP0568, X000568P & PP0426 - Non Double-up Only
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pp0568_a45-a74.u68", 0x00000, 0x10000, CRC(a1015eef) SHA1(074dcd966a5da6867532c6e90e2bc98404c2247b) ) /* Game Version: A45, Library Version: A74 */
+ ROM_LOAD( "pp0568_a45-a74.u68", 0x00000, 0x10000, CRC(a1015eef) SHA1(074dcd966a5da6867532c6e90e2bc98404c2247b) ) /* Game Version: A45, Library Version: A74 - 10/23/95 @ IGT L95-2305 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2004.u72", 0x00000, 0x8000, CRC(e5e40ea5) SHA1(e0d9e50b30cc0c25c932b2bf444990df1fb2c38c) ) /* 08/31/94 @ IGT L95-0146 */
@@ -6067,7 +6771,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2004.u75", 0x18000, 0x8000, CRC(5aaa4480) SHA1(353c4ce566c944406fce21f2c5045c856ef7a609) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( pepp0587 ) /* Normal board : Standard Draw Poker (PP0587) - PSR Verified */
@@ -6521,7 +7225,7 @@ Overall average for the 4 of a Kind bonus is 173.35 credits
ROM_REGION( 0x100, "proms", 0 )
ROM_LOAD( "cap2283.u50", 0x0000, 0x0100, NO_DUMP ) /* Should be CAP2283 */
- ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
+ ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) )
ROM_END
ROM_START( peip0028 ) /* Normal board : Joker Poker - French (IP0028) */
@@ -6642,7 +7346,7 @@ PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2094.u75", 0x18000, 0x8000, CRC(d1a9c781) SHA1(8ee6a2fab99be7b2b95603c6420788c5d1143788) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peip0058 ) /* Normal board : Standard Draw Poker - French (IP0058) */
@@ -6686,7 +7390,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2094.u75", 0x18000, 0x8000, CRC(d1a9c781) SHA1(8ee6a2fab99be7b2b95603c6420788c5d1143788) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peip0074 ) /* Normal board : Joker Poker - French (IP0074) */
@@ -6708,7 +7412,7 @@ PayTable As 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "mxo-cg2094.u75", 0x18000, 0x8000, CRC(d1a9c781) SHA1(8ee6a2fab99be7b2b95603c6420788c5d1143788) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peip0079 ) /* Normal board : Standard Draw Poker - French (IP0079) */
@@ -6729,7 +7433,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
ROM_LOAD( "mxo-cg2094.u75", 0x18000, 0x8000, CRC(d1a9c781) SHA1(8ee6a2fab99be7b2b95603c6420788c5d1143788) )
ROM_REGION( 0x100, "proms", 0 )
- ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
+ ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) )
ROM_END
ROM_START( peip0101 ) /* Normal board : Joker Poker - French (IP0101) */
@@ -9680,7 +10384,7 @@ PayTable Ks+ 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
ROM_LOAD( "xp000038.u67", 0x00000, 0x10000, CRC(8707ab9e) SHA1(3e00a2ad8017e1495c6d6fe900d0efa68a1772b8) ) /* 09/05/95 @ IGT L95-2452 */
ROM_REGION( 0x10000, "user1", 0 )
- ROM_LOAD( "x000588p.u66", 0x00000, 0x10000, CRC(baa448cc) SHA1(0f1da407304f7dafbe06119d068f7caf99404cb4) ) /* Joker Poker */
+ ROM_LOAD( "x000588p.u66", 0x00000, 0x10000, CRC(baa448cc) SHA1(0f1da407304f7dafbe06119d068f7caf99404cb4) ) /* Joker Poker - 10/31/94 IGT L94-2068 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2242.u77", 0x00000, 0x8000, CRC(963a7e7d) SHA1(ebb159f6c731a3f912382745ef9a9c6d4fa2fc99) ) /* 03/19/96 @ IGT L96-0703 */
@@ -9705,7 +10409,7 @@ PayTable Js+ 2PR 3K STR FL FH 4K 4K 4A SF RF (Bonus)
ROM_LOAD( "xp000038.u67", 0x00000, 0x10000, CRC(8707ab9e) SHA1(3e00a2ad8017e1495c6d6fe900d0efa68a1772b8) ) /* 09/05/95 @ IGT L95-2452 */
ROM_REGION( 0x10000, "user1", 0 )
- ROM_LOAD( "x000725p.u66", 0x00000, 0x10000, CRC(a56f3910) SHA1(06d0d4a8722e033ff1fbe0947135952ce8274725) ) /* Double Bonus Poker 03/13/95 IGT MSI S */
+ ROM_LOAD( "x000725p.u66", 0x00000, 0x10000, CRC(a56f3910) SHA1(06d0d4a8722e033ff1fbe0947135952ce8274725) ) /* Double Bonus Poker - 03/13/95 IGT MSI S */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2242.u77", 0x00000, 0x8000, CRC(963a7e7d) SHA1(ebb159f6c731a3f912382745ef9a9c6d4fa2fc99) ) /* 03/19/96 @ IGT L96-0703 */
@@ -11030,6 +11734,31 @@ Also compatible with:
ROM_LOAD( "capx1321.u43", 0x0000, 0x0200, CRC(4b57569f) SHA1(fa29c0f627e7ce79951ec6dadec114864144f37d) )
ROM_END
+ROM_START( pex2240p ) /* Superboard : Joker Poker (X002240P+XP000038) - PSR Verified */
+/*
+ w/J w/oJ
+PayTable 2P 3K STR FL FH 4K SF RF 5K RF (Bonus)
+-----------------------------------------------------------
+ ???? 1 2 4 5 8 16 100 200 400 400 800
+ % Range: 95.6-97.6% Optimum: 99.6% Hit Frequency: 30.1%
+ Programs Available: X002240P
+*/
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD( "xp000038.u67", 0x00000, 0x10000, CRC(8707ab9e) SHA1(3e00a2ad8017e1495c6d6fe900d0efa68a1772b8) ) /* 09/05/95 @ IGT L95-2452 */
+
+ ROM_REGION( 0x10000, "user1", 0 )
+ ROM_LOAD( "x002240p.u66", 0x00000, 0x10000, CRC(b66ff8e6) SHA1(2f72169d8100c48758f7a730b749ea2ef65d58d9) ) /* Joker Poker 09/23/96 @ IGT L96-2216 */
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD( "mro-cg2242.u77", 0x00000, 0x8000, CRC(963a7e7d) SHA1(ebb159f6c731a3f912382745ef9a9c6d4fa2fc99) ) /* 03/19/96 @ IGT L96-0703 */
+ ROM_LOAD( "mgo-cg2242.u78", 0x08000, 0x8000, CRC(53eed56f) SHA1(e79f31c5c817b8b96b4970c1a702d1892961d441) )
+ ROM_LOAD( "mbo-cg2242.u79", 0x10000, 0x8000, CRC(af092f50) SHA1(53a3536593bb14c4072e8a5ee9e05af332feceb1) )
+ ROM_LOAD( "mxo-cg2242.u80", 0x18000, 0x8000, CRC(ecacb6b2) SHA1(32660adcc266fbbb3702a0cd30e25d11b953d23d) )
+
+ ROM_REGION( 0x200, "proms", 0 )
+ ROM_LOAD( "capx1321.u43", 0x0000, 0x0200, CRC(4b57569f) SHA1(fa29c0f627e7ce79951ec6dadec114864144f37d) )
+ROM_END
+
ROM_START( pex2241p ) /* Superboard : 4 of a Kind Bonus Poker (X002241P+XP000079) - PSR Verified */
/*
5-K 2-4
@@ -12694,7 +13423,7 @@ Jacks or Better BA 97.30%
Double Bonus Poker P323A 99.10%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 - Linkable Progressive */
+ ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 */
/* Known to be found with XMP00003, XMP00006 or XMP00024 programs */
ROM_REGION( 0x10000, "user1", 0 )
@@ -12729,8 +13458,8 @@ Double Bonus Poker P323A 99.10%
ROM_LOAD( "xm00002p.u66", 0x00000, 0x10000, CRC(96cf471c) SHA1(9597bf6a80c392ee22dc4606db610fdaf032377f) ) /* 07/18/95 @ IGT MI */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2440.u77", 0x00000, 0x8000, CRC(a4b2c9ab) SHA1(962f86bedc5b786080cc2d8a1264b15cca9c2f2e) ) /* 05/28/99 @ IGT MI */
- ROM_LOAD( "mgo-cg2440.u78", 0x08000, 0x8000, CRC(82633a6b) SHA1(3651ef86cb3c33af5a20ac3b7ffceaa19c7e87d6) )
+ ROM_LOAD( "mro-cg2440.u77", 0x00000, 0x8000, CRC(a4b2c9ab) SHA1(962f86bedc5b786080cc2d8a1264b15cca9c2f2e) ) /* Custom MGM Grand Detroit Casino card backs - 05/28/99 @ IGT MI */
+ ROM_LOAD( "mgo-cg2440.u78", 0x08000, 0x8000, CRC(82633a6b) SHA1(3651ef86cb3c33af5a20ac3b7ffceaa19c7e87d6) ) /* Compatible with XM00001P, XM00002P, XM00003P & XM00006P */
ROM_LOAD( "mbo-cg2440.u79", 0x10000, 0x8000, CRC(a984bf7f) SHA1(2c1c01fddafda934112f507d522710d94e30668a) )
ROM_LOAD( "mxo-cg2440.u80", 0x18000, 0x8000, CRC(9849096b) SHA1(65604ac2a2a27d4e458f6878aacf86f63f5f7c58) )
@@ -12780,13 +13509,13 @@ Double Bonus Poker P324A 100.20%
Double Deuce Poker P236A 99.60%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 - Linkable Progressive */
+ ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 */
ROM_REGION( 0x10000, "user1", 0 )
- ROM_LOAD( "xm00004p.u66", 0x00000, 0x10000, CRC(bafd160f) SHA1(7454fbf992d4d0668ef375b76ce2cae3324a5f75) )
+ ROM_LOAD( "xm00004p.u66", 0x00000, 0x10000, CRC(bafd160f) SHA1(7454fbf992d4d0668ef375b76ce2cae3324a5f75) ) /* 09/20/95 @ IGT L95-2267 */
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD( "mro-cg2196.u77", 0x00000, 0x8000, CRC(f2f95ad9) SHA1(92c105147d4cdcebb4c784d771b9cebc982a742f) )
+ ROM_LOAD( "mro-cg2196.u77", 0x00000, 0x8000, CRC(f2f95ad9) SHA1(92c105147d4cdcebb4c784d771b9cebc982a742f) ) /* 09/19/95 @ IGT L95-2268 */
ROM_LOAD( "mgo-cg2196.u78", 0x08000, 0x8000, CRC(95980a94) SHA1(40b84b2f3b77584739f2eb8df49b64533c60e1e7) )
ROM_LOAD( "mbo-cg2196.u79", 0x10000, 0x8000, CRC(38151131) SHA1(7730a342bcfab2c2acd84f93ce280eb5dc9666f3) )
ROM_LOAD( "mxo-cg2196.u80", 0x18000, 0x8000, CRC(60f748b8) SHA1(61af0bac1d6c23f8e1aa3f0094fd56185aa6ae86) )
@@ -12866,11 +13595,11 @@ Jacks or Better CA 99.50%
Double Bonus Poker P323A 99.10%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 - Linkable Progressive */
+ ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 */
/* Also known to be found with XMP00003, XMP00006, XMP00020 or XMP00024 programs */
ROM_REGION( 0x10000, "user1", 0 )
- ROM_LOAD( "xm00006p.u66", 0x00000, 0x10000, CRC(b464ee79) SHA1(8768e52c66881c8f327055124ff31bcad79fd027) ) /* 03/08/96 @ IGT NV (also found as L96-0684) */
+ ROM_LOAD( "xm00006p.u66", 0x00000, 0x10000, CRC(b464ee79) SHA1(8768e52c66881c8f327055124ff31bcad79fd027) ) /* 03/08/96 @ IGT L96-0684 */
ROM_REGION( 0x020000, "gfx1", 0 )
ROM_LOAD( "mro-cg2294.u77", 0x00000, 0x8000, CRC(2f707abc) SHA1(3ed14b165cc1c6ad1a0c8ceddbe6d10666de7a1e) ) /* Custom The Orleans graphics */
@@ -12895,7 +13624,7 @@ Jacks or Better BA 97.30%
Double Bonus Poker P325A 97.80%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 - Linkable Progressive */
+ ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 */
/* Also known to be found with XMP00002 program */
ROM_REGION( 0x10000, "user1", 0 )
@@ -12924,7 +13653,7 @@ Double Bonus Poker P324A 100.20%
Double Double Bonus P505A 97.80%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 - Linkable Progressive */
+ ROM_LOAD( "xmp00006.u67", 0x00000, 0x10000, CRC(d61f1677) SHA1(2eca1315d6aa310a54de2dfa369e443a07495b76) ) /* 07/25/96 @ IGT L96-2041 */
ROM_REGION( 0x10000, "user1", 0 )
ROM_LOAD( "xm00008p.u66", 0x00000, 0x10000, CRC(37ff1a79) SHA1(5b15245e79d8f1b984d254f4307f1a2219ce3ed2) )
@@ -12952,7 +13681,7 @@ Jacks or Better BB 97.80%
Double Aces & Faces ????? 99.20%
*/
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 - Linkable Progressive */
+ ROM_LOAD( "xmp00002.u67", 0x00000, 0x10000, CRC(d5624ac8) SHA1(6b778b0e7ddb81123c6038920b3447e05a0556b2) ) /* 09/07/95 @ IGT L95-2183 */
ROM_REGION( 0x10000, "user1", 0 )
ROM_LOAD( "xm00009p.u66", 0x00000, 0x10000, CRC(e133d0bb) SHA1(7ed4fa335e230c28e6fc66f0c990bc7ead2b279d) )
@@ -13273,189 +14002,220 @@ GAMEL(1987, peset117, 0, peplus, peplus_schip, peplus_state, peplus,
GAMEL(1987, peivc006, 0, peplus, peplus_schip, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (IVC006) Clear EEPROM Chip", 0, layout_pe_schip )
/* Normal (non-plus) board : Poker */
-GAMEL(1987, pepk0719, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC092) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0719a, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC041) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0719b, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC011) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0756, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC084) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0756a, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC041) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0756b, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC011) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0756c, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC001) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0757, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0757-PC074) Two Pair or Better", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0758, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0758-PC041) Jacks or Better", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0769, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0769-PC092) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0773, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0773-PC041) Jacks or Better", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0810, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0810-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0810a, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0810-PC011) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0811, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0811-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0823, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0823-PC009) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0832, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0832-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0719, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC092) Standard Draw Poker (El Cortez)", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0719a, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC041) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0719b, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0719-PC011) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0756, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC084) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0756a, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC041) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0756b, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC011) Standard Draw Poker (El Cortez)", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0756c, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0756-PC001) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0757, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0757-PC074) Two Pair or Better", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0758, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0758-PC041) Jacks or Better", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0769, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0769-PC092) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0773, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0773-PC041) Jacks or Better", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0810, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0810-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0810a, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0810-PC011) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0811, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0811-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0823, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0823-PC009) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0832, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0832-PC041) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
GAMEL(1987, pepk0849, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0849-PC041) Joker Poker (Two Pair or Better)", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0856, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0856-PC092) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0856a, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0856-PC011) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0858, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0858-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0873, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0873-PC093) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0873a, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0873-PC046) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0930, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0930-PC093) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk0930a, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0930-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk1004, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1004-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk1013, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1013-PC087) Tens or Better", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk1020, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1020-PC078) 4 of a Kind Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk1024, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1024-PC095) Aces and Faces Bonus Poker", 0, layout_pe_poker )
-GAMEL(1987, pepk1030, pepk1020, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1030-PC088) 4 of a Kind Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
-GAMEL(1987, pepk1069, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1069-PC088) Double Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0856, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0856-PC092) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0856a, pepk0810, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0856-PC011) Joker Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0858, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0858-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0873, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0873-PC093) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0873a, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0873-PC046) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0885, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0885-PC056) Deuces Wild Poker (El Cortez)", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0930, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0930-PC093) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk0930a, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK0930-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk1004, pepk0858, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1004-PC075) Deuces Wild Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk1013, pepk0719, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1013-PC087) Tens or Better", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk1020, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1020-PC078) 4 of a Kind Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk1024, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1024-PC095) Aces and Faces Bonus Poker", 0, layout_pe_poker )
+GAMEL(1987, pepk1030, pepk1020, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1030-PC088) 4 of a Kind Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
+GAMEL(1987, pepk1069, 0, peplus, nonplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge (PK1069-PC088) Double Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
/* Normal board : Poker */
-GAMEL(1987, pepp0002, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0002) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0002a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0002) Standard Draw Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0008, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0008) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0009, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0009) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0010, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0010) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0014, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0014a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0021, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0021) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker) /* Progressive with link ONLY */
-GAMEL(1987, pepp0023, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0023) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0038, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0038) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0040, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0040a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0040b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0041, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0041) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0042, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0042) 10's or Better (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0042a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0042) 10's or Better (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0043, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0043a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better (International, set 1)",0, layout_pe_poker )
-GAMEL(1987, pepp0043b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better (International, set 2)",0, layout_pe_poker )
-GAMEL(1987, pepp0045, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0045a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Gambler Downtown Reno)", 0, layout_pe_poker )
-GAMEL(1987, pepp0045b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Par-A-Dice Riverboat Casino)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1150 not dumped */
-GAMEL(1987, pepp0045c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Annie Oakley's Central City)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1072 not dumped */
-GAMEL(1987, pepp0045d, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Las Vegas Rio)", 0, layout_pe_poker )
-GAMEL(1987, pepp0046, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0046a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (International)",0, layout_pe_poker )
-GAMEL(1987, pepp0046b, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0048, pepp0053, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0048) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0051, pepp0053, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0051) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0053, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0053) Joker Poker (Aces or Better)", 0, layout_pe_poker )
-GAMEL(1987, pepp0055, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0055a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0055b, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2, Skyline Casino)", 0, layout_pe_poker )
-GAMEL(1987, pepp0055c, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0057, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0057a, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0059, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0059) Two Pair or Better (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0059a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0059) Two Pair or Better (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0060, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0060a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0060b, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0060c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (Cruise)", 0, layout_pe_poker )
-GAMEL(1987, pepp0063, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0063) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0064, pepp0053, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0064) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0065, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0065) Joker Poker (Aces or Better)", 0, layout_pe_poker )
-GAMEL(1987, pepp0083, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0083) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0085, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0085) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
-GAMEL(1987, pepp0089, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0089) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0094, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0094) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0103, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0104, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0104) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0116, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0116a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker (Mirage)", 0, layout_pe_poker )
-GAMEL(1987, pepp0118, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0118) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0001, 0, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0001) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0002, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0002) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0002a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0002) Standard Draw Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0008, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0008) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0008a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0008) Standard Draw Poker (set 2, El Cortez)", 0, layout_pe_poker )
+GAMEL(1987, pepp0008b, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0008) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0009, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0009) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0010, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0010) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0014, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0014a, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0021, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0021) Standard Draw Poker", MACHINE_NOT_WORKING, layout_pe_poker) /* Progressive with link ONLY */
+GAMEL(1987, pepp0023, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0023) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0038, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0038) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0040, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0040a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0040b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0041, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0041) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0042, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0042) 10's or Better (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0042a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0042) 10's or Better (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0043, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0043a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better (International, set 1)",0, layout_pe_poker )
+GAMEL(1987, pepp0043b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0043) 10's or Better (International, set 2)",0, layout_pe_poker )
+GAMEL(1987, pepp0045, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0045a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Gambler Downtown Reno)", 0, layout_pe_poker )
+GAMEL(1987, pepp0045b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Par-A-Dice Riverboat Casino)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1150 not dumped */
+GAMEL(1987, pepp0045c, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Annie Oakley's Central City)", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1072 not dumped */
+GAMEL(1987, pepp0045d, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0045) 10's or Better (Las Vegas Rio)", 0, layout_pe_poker )
+GAMEL(1987, pepp0046, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0046a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (International)",0, layout_pe_poker )
+GAMEL(1987, pepp0046b, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0046) 10's or Better (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0048, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0048) Joker Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0048a, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0048) Joker Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0048b, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0048) Joker Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0048c, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0048) Joker Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0050, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0050) Joker Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0050a, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0050) Joker Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0050b, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0050) Joker Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0050c, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0050) Joker Poker (set 4, El Cortez)", 0, layout_pe_poker )
+GAMEL(1987, pepp0051, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0051) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0053, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0053) Joker Poker (Aces or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0054, 0, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0054) Deuces Wild Poker (El Cortez)", 0, layout_pe_poker )
+GAMEL(1987, pepp0055, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0055a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 2, Skyline Casino)", 0, layout_pe_poker )
+GAMEL(1987, pepp0055b, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0055c, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0055) Deuces Wild Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0057, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0057a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0057b, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 3, El Cortez)", 0, layout_pe_poker )
+GAMEL(1987, pepp0057c, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0057d, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0057) Deuces Wild Poker (set 5)", 0, layout_pe_poker )
+GAMEL(1987, pepp0059, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0059) Two Pair or Better (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0059a, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0059) Two Pair or Better (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0060, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0060a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0060b, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0060c, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0060) Standard Draw Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0063, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0063) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0064, pepp0048, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0064) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0065, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0065) Joker Poker (Aces or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0083, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0083) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0085, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0085) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0089, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0089) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0094, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0094) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0103, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0103a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0103b, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0103c, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0104, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0104) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0116, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0116a, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker (Mirage)", 0, layout_pe_poker )
+GAMEL(1987, pepp0118, pepp0001, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0118) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0120, 0, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0120) Wild Sevens Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0125, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0125) Deuces Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0126, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0126) Deuces Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0127, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0127) Deuces Joker Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0127a, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0127) Deuces Joker Wild Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0129, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0129) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0125, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0125) Deuces Wild Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0126, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0126) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0126a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0126) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0126b, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0126) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0127, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0127) Deuces Joker Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0127a, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0127) Deuces Joker Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0127b, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0127) Deuces Joker Wild Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0129, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0129) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
GAMEL(1987, pepp0130, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0130) Aces and Faces", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1292 not dumped */
-GAMEL(1987, pepp0132, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0132) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0150, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0150) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0132, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0132) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0150, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0150) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0158, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0158a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 2, Skyline Casino)", 0, layout_pe_poker )
GAMEL(1987, pepp0158b, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0158c, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 4)", 0, layout_pe_poker )
GAMEL(1987, pepp0158d, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0158) 4 of a Kind Bonus Poker (set 5)", 0, layout_pe_poker )
-GAMEL(1987, pepp0159, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0159) Standard Draw Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0171, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0171) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0171a, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0171) Joker Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0159, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0159) Standard Draw Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0171, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0171) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0171a, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0171) Joker Poker (International)", 0, layout_pe_poker )
GAMEL(1987, pepp0178, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0178) 4 of a Kind Bonus Poker (Operator selectable special 4 of a Kind)", 0, layout_pe_poker )
-GAMEL(1987, pepp0181, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0181) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0188, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0188a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0188b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0189, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0189) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0190, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0190a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0190b, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0190c, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 4)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197d, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 5)", 0, layout_pe_poker )
-GAMEL(1987, pepp0197e, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (Cruise)", 0, layout_pe_poker )
+GAMEL(1987, pepp0181, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0181) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0188, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0188a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0188b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0188) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0189, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0189) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0190, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0190a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0190b, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0190c, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0190) Deuces Wild Poker (International)", 0, layout_pe_poker )
+GAMEL(1987, pepp0195, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0195) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0197, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0197a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0197b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0197c, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0197d, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (set 5)", 0, layout_pe_poker )
+GAMEL(1987, pepp0197e, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0197) Standard Draw Poker (Cruise)", 0, layout_pe_poker )
GAMEL(1987, pepp0203, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0203a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0203b, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0203c, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (set 4)", 0, layout_pe_poker )
GAMEL(1987, pepp0203d, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (International)", 0, layout_pe_poker )
GAMEL(1987, pepp0203e, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0203) 4 of a Kind Bonus Poker (set 5)", 0, layout_pe_poker )
-GAMEL(1987, pepp0219, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0219) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0221, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0221a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0221b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0218, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0218) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0219, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0219) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0221, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0221a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0221b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0221) Standard Draw Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0223, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0223) Deuces Joker Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0224, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0224) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0224a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0224) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0230, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0230) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0242, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0242) Deuces Wild Poker (International English/Spanish)", 0, layout_pe_poker )
-GAMEL(1987, pepp0249, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0249) Deuces Wild Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0224, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0224) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0224a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0224) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0230, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0230) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0232, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0232) Unknown American Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0242, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0242) Deuces Wild Poker (International English/Spanish)", 0, layout_pe_poker )
+GAMEL(1987, pepp0249, pepp0054, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0249) Deuces Wild Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0250, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0250) Double Down Stud Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0250a, pepp0250, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0250) Double Down Stud Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0265, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0265) 4 of a Kind Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0265a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0265) 4 of a Kind Bonus Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0265b, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0265) 4 of a Kind Bonus Poker (set 3)", 0, layout_pe_poker )
GAMEL(1987, pepp0265c, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0265) 4 of a Kind Bonus Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0274, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0274) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0288, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0288) Standard Draw Poker (Spanish)", 0, layout_pe_poker )
-GAMEL(1987, pepp0290, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0290) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0290a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0290) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0291, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0291) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0291a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0291) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0274, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0274) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0288, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0288) Standard Draw Poker (Spanish)", 0, layout_pe_poker )
+GAMEL(1987, pepp0290, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0290) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0290a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0290) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0291, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0291) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0294, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0294) Unknown Joker Poker Bonus", 0, layout_pe_poker )
+GAMEL(1987, pepp0295, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0295) Unknown Deuces Wild Bonus Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0291a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0291) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0401, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0401) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0409, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0409) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0410, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0410) 4 of a Kind Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0410a, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0410) 4 of a Kind Bonus Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0417, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0417) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0417a, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0417) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0418, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0418) Deuces Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0419, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0419) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0420, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0420) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0423, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0423a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0423b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0423c, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 4)", 0, layout_pe_poker )
-GAMEL(1987, pepp0426, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0426) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0428, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0428) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0429, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0429) Joker Poker (Aces or Better, set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0429a, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0429) Joker Poker (Aces or Better, set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0417, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0417) Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0417a, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0417) Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0418, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0418) Deuces Wild Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0419, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0419) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0420, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0420) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0423, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0423a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0423b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0423c, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0423) Standard Draw Poker (set 4)", 0, layout_pe_poker )
+GAMEL(1987, pepp0426, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0426) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0428, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0428) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0429, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0429) Joker Poker (Aces or Better, set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0429a, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0429) Joker Poker (Aces or Better, set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0430, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0430) Deuces Joker Wild Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0431, pepp0127, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0431) Deuces Joker Wild Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0434, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0434) Bonus Poker Deluxe", 0, layout_pe_poker )
-GAMEL(1987, pepp0447, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0447a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0447b, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 3)", 0, layout_pe_poker )
-GAMEL(1987, pepp0449, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0449) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0449a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0449) Standard Draw Poker (International English/Spanish)", 0, layout_pe_poker )
-GAMEL(1987, pepp0452, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0452) Double Deuces Wild Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0434, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0434) Bonus Poker Deluxe (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0434a, pepp0434, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0434) Bonus Poker Deluxe (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0445, pepp0294, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0445) Unknown Joker Poker Bonus", 0, layout_pe_poker )
+GAMEL(1987, pepp0447, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0447a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0447b, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0447) Standard Draw Poker (set 3)", 0, layout_pe_poker )
+GAMEL(1987, pepp0449, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0449) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0449a, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0449) Standard Draw Poker (International English/Spanish)", 0, layout_pe_poker )
+GAMEL(1987, pepp0450, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0450) Loose Deuce Deuces Wild! Poker",0, layout_pe_poker )
+GAMEL(1987, pepp0452, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0452) Double Deuces Wild Poker (set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0452a, pepp0452, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0452) Double Deuces Wild Poker (set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0453, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0453) Joker Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0454, pepp0434, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0454) Bonus Poker Deluxe (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0454a, pepp0434, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0454) Bonus Poker Deluxe (set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0455, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0455) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0455, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0455) Joker Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0467, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0467) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0458, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0458) Joker Poker (Aces or Better)", 0, layout_pe_poker )
-GAMEL(1987, pepp0459, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0459) Joker Poker", 0, layout_pe_poker )
-GAMEL(1985, pepp0488, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0488) Standard Draw Poker (Arizona Charlie's)", 0, layout_pe_poker )
-GAMEL(1987, pepp0508, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0508) Loose Deuce Deuces Wild! Poker",0, layout_pe_poker )
-GAMEL(1987, pepp0509, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0509) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0510, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0510) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0458, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0458) Joker Poker (Aces or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0459, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0459) Joker Poker", 0, layout_pe_poker )
+GAMEL(1985, pepp0488, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0488) Standard Draw Poker (Arizona Charlie's)", 0, layout_pe_poker )
+GAMEL(1987, pepp0508, pepp0450, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0508) Loose Deuce Deuces Wild! Poker",0, layout_pe_poker )
+GAMEL(1987, pepp0509, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0509) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0510, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0510) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0514, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0514) Double Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0514a, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0514) Double Bonus Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0514b, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0514) Double Bonus Poker (set 3)", 0, layout_pe_poker )
@@ -13466,21 +14226,22 @@ GAMEL(1987, pepp0515c, pepp0514, peplus, peplus_poker, peplus_state, peplus,
GAMEL(1987, pepp0516, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0516) Double Bonus Poker (set 1)", 0, layout_pe_poker )
GAMEL(1987, pepp0516a, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0516) Double Bonus Poker (set 2)", 0, layout_pe_poker )
GAMEL(1987, pepp0516b, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0516) Double Bonus Poker (International)", 0, layout_pe_poker )
-GAMEL(1987, pepp0526, pepp0055, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0526) Deuces Wild Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0531, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0531) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0536, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0536) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0526, pepp0054, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0526) Deuces Wild Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0531, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0531) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0536, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0536) Joker Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0538, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0538) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0540, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0540) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0542, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0542) One Eyed Jacks Wild Poker (CG2243)", 0, layout_pe_poker )
GAMEL(1987, pepp0542a, pepp0542, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0542) One Eyed Jacks Wild Poker (CG2020)", 0, layout_pe_poker )
-GAMEL(1987, pepp0550, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0550) Joker Poker (Two Pair or Better, set 1)", 0, layout_pe_poker )
-GAMEL(1987, pepp0550a, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0550) Joker Poker (Two Pair or Better, set 2)", 0, layout_pe_poker )
-GAMEL(1987, pepp0555, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0555) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0559, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0559) Joker Poker (Aces or Better)", 0, layout_pe_poker )
-GAMEL(1987, pepp0562, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0562) 10's or Better", 0, layout_pe_poker )
-GAMEL(1987, pepp0568, pepp0053, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0568) Joker Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0585, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0585) Standard Draw Poker", 0, layout_pe_poker )
-GAMEL(1987, pepp0587, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0587) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0542b, pepp0542, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0542) One Eyed Jacks Wild Poker (CG1199)", 0, layout_pe_poker )
+GAMEL(1987, pepp0550, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0550) Joker Poker (Two Pair or Better, set 1)", 0, layout_pe_poker )
+GAMEL(1987, pepp0550a, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0550) Joker Poker (Two Pair or Better, set 2)", 0, layout_pe_poker )
+GAMEL(1987, pepp0555, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0555) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0559, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0559) Joker Poker (Aces or Better)", 0, layout_pe_poker )
+GAMEL(1987, pepp0562, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0562) 10's or Better", 0, layout_pe_poker )
+GAMEL(1987, pepp0568, pepp0048, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0568) Joker Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0585, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0585) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0587, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0587) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0596, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0596) Spades Sequential Royal Double Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
GAMEL(1987, pepp0598, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0598) Hearts Sequential Royal Double Bonus Poker", MACHINE_NOT_WORKING, layout_pe_poker )
GAMEL(1987, pepp0711, pepp0434, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0711) Bonus Poker Deluxe", 0, layout_pe_poker )
@@ -13490,7 +14251,7 @@ GAMEL(1987, pepp0725a, pepp0514, peplus, peplus_poker, peplus_state, peplus,
GAMEL(1987, pepp0726, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0726) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0728, pepp0514, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0728) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0733, 0, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0733) Double Aces and Faces", MACHINE_WRONG_COLORS, layout_pe_poker ) /* CAP1292 not dumped */
-GAMEL(1987, pepp0750, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0750) Standard Draw Poker", 0, layout_pe_poker )
+GAMEL(1987, pepp0750, pepp0001, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0750) Standard Draw Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0757, pepp0250, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0757) Double Down Stud Joker Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0760, pepp0250, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0760) Double Down Stud Poker", 0, layout_pe_poker )
GAMEL(1987, pepp0763, pepp0158, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0763) 4 of a Kind Bonus Poker", 0, layout_pe_poker )
@@ -13537,13 +14298,13 @@ GAMEL(1994, pebe0014a, pebe0014, peplus, peplus_bjack, peplus_state, peplus,
/* Normal board : Keno */
GAMEL(1994, peke0004, 0, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE0004) Keno", MACHINE_NOT_WORKING, layout_pe_keno )
GAMEL(1994, peke0017, peke0004, peplus, peplus_keno, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE0017) Keno", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1001, 0, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1001) Keno", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1006, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1006) Keno", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1012, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 1)", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1012a, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 2)", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1012b, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 3)", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1013, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1013) Keno (set 1)", MACHINE_NOT_WORKING, layout_pe_keno )
-GAMEL(1994, peke1013a, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1013) Keno (set 2)", MACHINE_NOT_WORKING, layout_pe_keno )
+GAMEL(1994, peke1001, 0, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1001) Keno", 0, layout_pe_keno )
+GAMEL(1994, peke1006, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1006) Keno", 0, layout_pe_keno )
+GAMEL(1994, peke1012, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 1)", 0, layout_pe_keno )
+GAMEL(1994, peke1012a, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 2)", 0, layout_pe_keno )
+GAMEL(1994, peke1012b, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1012) Keno (set 3)", 0, layout_pe_keno )
+GAMEL(1994, peke1013, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1013) Keno (set 1)", 0, layout_pe_keno )
+GAMEL(1994, peke1013a, peke1001, peplus, peplus_keno, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (KE1013) Keno (set 2)", 0, layout_pe_keno )
/* Normal board : Slots machine */
GAMEL(1996, peps0014, 0, peplus, peplus_slots, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PS0014) Super Joker Slots", 0, layout_pe_slots )
@@ -13703,6 +14464,7 @@ GAMEL(1995, pex2179p, 0, peplus, peplus_poker, peplus_state, peplussb,
GAMEL(1995, pex2180p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002180P+XP000119) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1995, pex2211p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002211P+XP000043) Double Double Bonus with 3 Jacks Poker", 0,layout_pe_poker )
GAMEL(1995, pex2236p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002236P+XP000043) Double Double Bonus with 3 Aces Poker", 0,layout_pe_poker )
+GAMEL(1995, pex2240p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002240P+XP000038) Joker Poker (Two Pair or Better)", 0, layout_pe_poker )
GAMEL(1995, pex2241p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002241P+XP000079) 4 of a Kind Bonus Poker", 0,layout_pe_poker )
GAMEL(1995, pex2244p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002244P+XP000079) Double Bonus Poker", 0, layout_pe_poker )
GAMEL(1995, pex2245p, 0, peplus, peplus_poker, peplus_state, peplussb, ROT0, "IGT - International Game Technology", "Player's Edge Plus (X002245P+XP000055) Standard Draw Poker", 0,layout_pe_poker )
diff --git a/src/mame/drivers/pg685.cpp b/src/mame/drivers/pg685.cpp
index a6e7ae7c430..45b87a26432 100644
--- a/src/mame/drivers/pg685.cpp
+++ b/src/mame/drivers/pg685.cpp
@@ -32,33 +32,8 @@ Backplane: SCN2661B, D8253C-2, SAB 8259AP
6ES5685-OUA11
-John Elliott's kindly analyzed the ROM of this machine, his findings are represented
-in this preliminary memory map. Olivier Galibert remarked that for a 16 bit memory
-map, the address ranges have to begin on even and end on odd addresses.
-
-static ADDRESS_MAP_START(pg685_mem, AS_PROGRAM, 16, pg685_state)
- ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x00000,0xbffff) AM_RAM
- AM_RANGE(0xf0000,0xf1fff) AM_RAM
- AM_RANGE(0xf9f00,0xf9f00) // Keyboard scancode
- AM_RANGE(0xf9f01,0xf9f01) // Keyboard status (read) Keyboard command (write)
- AM_RANGE(0xf9f02,0xf9f02) // 6845 Register select
- AM_RANGE(0xf9f03,0xf9f03) // 6845 Register value
- AM_RANGE(0xf9f04,0xf9f04) // PCP/M-86 keyboard handling code also checks a couple of bits read
- AM_RANGE(0xf9f20,0xf9f20) // WD 279x floppy controller
- AM_RANGE(0xf9f30,0xf9f30) // Printer data
- AM_RANGE(0xf9f31,0xf9f31) // Printer status read
- AM_RANGE(0xf9f33,0xf9f33) // Printer present?
- AM_RANGE(0xf9f42,0xf9f47) // RTC registers
- AM_RANGE(0xf9f48,0xf9f4c) // NVRAM
- AM_RANGE(0xf9f50,0xf9f50) // RTC Busy flag
- AM_RANGE(0xf9f70,0xf9f77) // WD 1010
- AM_RANGE(0xf9f78,0xf9f78) // WD 1010 separate drive/head select register
- AM_RANGE(0xf9f79,0xf9f79) // another write-only register (possibly reset or interrupt control)
- AM_RANGE(0xfa000,0xfa7ff) AM_RAM AM_SHARE ("charcopy")
- AM_RANGE(0xfb000,0xfb7ff) AM_RAM AM_SHARE ("framebuffer")
- AM_RANGE(0xfc000,0xfffff) AM_ROM AM_REGION("bios", 0)
-ADDRESS_MAP_END
+John Elliott's kindly analyzed the ROM of this machine; his findings are represented
+in the preliminary memory map.
This machine only has a textmode screen, Tandon TM262 hard disk drive on a WD1010 controller,
Teac FD-55FV-13-U floppy drive on a Siemens (WD)-1797-02P controller, 768KB of RAM, HD68A45SP
@@ -105,6 +80,7 @@ Memory: 54x 64KBit RAM, 18 empty sockets, 9 bit and 4 bit wire straps
#include "emu.h"
#include "cpu/nec/nec.h"
+#include "cpu/i86/i86.h"
#include "cpu/i86/i286.h"
#include "video/mc6845.h"
#include "machine/i8251.h"
@@ -134,7 +110,19 @@ public:
MC6845_UPDATE_ROW(crtc_update_row);
MC6845_UPDATE_ROW(crtc_update_row_oua12);
-
+
+ DECLARE_READ8_MEMBER(f9f04_r);
+ DECLARE_WRITE8_MEMBER(f9f04_w);
+ DECLARE_READ8_MEMBER(f9f24_r);
+ DECLARE_WRITE8_MEMBER(f9f24_w);
+ DECLARE_WRITE8_MEMBER(f9f32_w);
+ DECLARE_READ8_MEMBER(f9f33_r);
+ DECLARE_WRITE8_MEMBER(f9f3e_w);
+ DECLARE_READ8_MEMBER(f9f3f_r);
+ DECLARE_READ8_MEMBER(f9f78_r);
+ DECLARE_WRITE8_MEMBER(f9f78_w);
+ DECLARE_WRITE8_MEMBER(f9f79_w);
+
private:
virtual void machine_reset() override;
virtual void video_start() override;
@@ -148,50 +136,70 @@ private:
// ADDRESS MAPS
//**************************************************************************
-static ADDRESS_MAP_START(pg685_mem, AS_PROGRAM, 8, pg685_state)
+static ADDRESS_MAP_START(pg675_mem, AS_PROGRAM, 8, pg685_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000,0xbffff) AM_RAM
AM_RANGE(0xf0000,0xf1fff) AM_RAM
AM_RANGE(0xf9f00, 0xf9f01) AM_DEVREADWRITE("kbdc", i8279_device, read, write)
AM_RANGE(0xf9f02, 0xf9f02) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w)
AM_RANGE(0xf9f03, 0xf9f03) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
+ AM_RANGE(0xf9f04, 0xf9f04) AM_READWRITE(f9f04_r, f9f04_w)
AM_RANGE(0xf9f06, 0xf9f07) AM_DEVREADWRITE("mainpic", pic8259_device, read, write)
AM_RANGE(0xf9f08, 0xf9f08) AM_DEVREADWRITE("mainuart", i8251_device, data_r, data_w)
AM_RANGE(0xf9f09, 0xf9f09) AM_DEVREADWRITE("mainuart", i8251_device, status_r, control_w)
AM_RANGE(0xf9f20, 0xf9f23) AM_DEVREADWRITE("fdc", wd2797_t, read, write)
+ AM_RANGE(0xf9f24, 0xf9f24) AM_READWRITE(f9f24_r, f9f24_w)
AM_RANGE(0xf9f28, 0xf9f2b) AM_DEVREADWRITE("modppi1", i8255_device, read, write)
AM_RANGE(0xf9f2c, 0xf9f2f) AM_DEVREADWRITE("modppi2", i8255_device, read, write)
AM_RANGE(0xf9f30, 0xf9f30) AM_DEVREADWRITE("moduart", i8251_device, data_r, data_w)
AM_RANGE(0xf9f31, 0xf9f31) AM_DEVREADWRITE("moduart", i8251_device, status_r, control_w)
- AM_RANGE(0xf9f34, 0xf9f37) AM_DEVREADWRITE("bppit", pit8253_device, read, write)
- AM_RANGE(0xf9f38, 0xf9f3b) AM_DEVREADWRITE("bpuart", mc2661_device, read, write)
- AM_RANGE(0xf9f3c, 0xf9f3d) AM_DEVREADWRITE("bppic", pic8259_device, read, write)
+ AM_RANGE(0xf9f32, 0xf9f32) AM_WRITE(f9f32_w)
+ AM_RANGE(0xf9f33, 0xf9f33) AM_READ(f9f33_r)
AM_RANGE(0xf9f40, 0xf9f5f) AM_DEVREADWRITE("rtc", mm58167_device, read, write)
- AM_RANGE(0xf9f70, 0xf9f77) AM_DEVREADWRITE("hdc", wd2010_device, read, write)
AM_RANGE(0xfa000,0xfa7ff) AM_RAM AM_SHARE ("charcopy")
AM_RANGE(0xfb000,0xfb7ff) AM_RAM AM_SHARE ("framebuffer")
AM_RANGE(0xfc000,0xfffff) AM_ROM AM_REGION("bios", 0)
ADDRESS_MAP_END
+static ADDRESS_MAP_START(pg685_mem, AS_PROGRAM, 8, pg685_state)
+ ADDRESS_MAP_UNMAP_HIGH
+ AM_IMPORT_FROM(pg675_mem)
+ AM_RANGE(0xf9f34, 0xf9f37) AM_DEVREADWRITE("bppit", pit8253_device, read, write)
+ AM_RANGE(0xf9f38, 0xf9f3b) AM_DEVREADWRITE("bpuart", mc2661_device, read, write)
+ AM_RANGE(0xf9f3c, 0xf9f3d) AM_DEVREADWRITE("bppic", pic8259_device, read, write)
+ AM_RANGE(0xf9f3e, 0xf9f3e) AM_WRITE(f9f3e_w)
+ AM_RANGE(0xf9f70, 0xf9f77) AM_DEVREADWRITE("hdc", wd2010_device, read, write)
+ AM_RANGE(0xf9f78, 0xf9f78) AM_READWRITE(f9f78_r, f9f78_w)
+ AM_RANGE(0xf9f79, 0xf9f79) AM_WRITE(f9f79_w)
+ADDRESS_MAP_END
+
static ADDRESS_MAP_START(pg685oua12_mem, AS_PROGRAM, 16, pg685_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000,0xdffff) AM_RAM
AM_RANGE(0xe0000,0xeffff) AM_RAM AM_SHARE ("framebuffer16")
AM_RANGE(0xf0000,0xf1fff) AM_RAM
AM_RANGE(0xf9f00, 0xf9f01) AM_DEVREADWRITE8("kbdc", i8279_device, read, write, 0xffff)
+ AM_RANGE(0xf9f04, 0xf9f05) AM_READWRITE8(f9f04_r, f9f04_w, 0x00ff)
AM_RANGE(0xf9f06, 0xf9f07) AM_DEVREADWRITE8("mainpic", pic8259_device, read, write, 0xffff)
AM_RANGE(0xf9f08, 0xf9f09) AM_DEVREADWRITE8("mainuart", i8251_device, data_r, data_w, 0x00ff)
AM_RANGE(0xf9f08, 0xf9f09) AM_DEVREADWRITE8("mainuart", i8251_device, status_r, control_w, 0xff00)
AM_RANGE(0xf9f20, 0xf9f23) AM_DEVREADWRITE8("fdc", wd2797_t, read, write, 0xffff)
+ AM_RANGE(0xf9f24, 0xf9f25) AM_READWRITE8(f9f24_r, f9f24_w, 0x00ff)
AM_RANGE(0xf9f28, 0xf9f2b) AM_DEVREADWRITE8("modppi1", i8255_device, read, write, 0xffff)
AM_RANGE(0xf9f2c, 0xf9f2f) AM_DEVREADWRITE8("modppi2", i8255_device, read, write, 0xffff)
AM_RANGE(0xf9f30, 0xf9f31) AM_DEVREADWRITE8("moduart", i8251_device, data_r, data_w, 0x00ff)
AM_RANGE(0xf9f30, 0xf9f31) AM_DEVREADWRITE8("moduart", i8251_device, status_r, control_w, 0xff00)
+ AM_RANGE(0xf9f32, 0xf9f33) AM_WRITE8(f9f32_w, 0x00ff)
+ AM_RANGE(0xf9f32, 0xf9f33) AM_READ8(f9f33_r, 0xff00)
AM_RANGE(0xf9f34, 0xf9f37) AM_DEVREADWRITE8("bppit", pit8253_device, read, write, 0xffff)
AM_RANGE(0xf9f38, 0xf9f3b) AM_DEVREADWRITE8("bpuart", mc2661_device, read, write, 0xffff)
AM_RANGE(0xf9f3c, 0xf9f3d) AM_DEVREADWRITE8("bppic", pic8259_device, read, write, 0xffff)
+ AM_RANGE(0xf9f3e, 0xf9f3f) AM_WRITE8(f9f3e_w, 0x00ff)
+ AM_RANGE(0xf9f3e, 0xf9f3f) AM_READ8(f9f3f_r, 0xff00)
AM_RANGE(0xf9f40, 0xf9f5f) AM_DEVREADWRITE8("rtc", mm58167_device, read, write, 0xffff)
AM_RANGE(0xf9f70, 0xf9f77) AM_DEVREADWRITE8("hdc", wd2010_device, read, write, 0xffff)
+ AM_RANGE(0xf9f78, 0xf9f79) AM_READWRITE8(f9f78_r, f9f78_w, 0x00ff)
+ AM_RANGE(0xf9f78, 0xf9f79) AM_WRITE8(f9f79_w, 0xff00)
AM_RANGE(0xf9f80, 0xf9f81) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0x00ff)
AM_RANGE(0xf9f80, 0xf9f81) AM_DEVREADWRITE8("crtc", mc6845_device, register_r, register_w, 0xff00)
AM_RANGE(0xfc000,0xfffff) AM_RAM // BIOS RAM shadow
@@ -206,14 +214,81 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( pg685 )
INPUT_PORTS_END
+READ8_MEMBER(pg685_state::f9f04_r)
+{
+ // PCP/M-86 keyboard handling code also checks a couple of bits read
+ logerror("Reading byte from F9F04\n");
+ return 0xff;
+}
+
+WRITE8_MEMBER(pg685_state::f9f04_w)
+{
+ // PCP/M-86 keyboard handling code also checks a couple of bits read
+ logerror("Writing %02X to F9F04\n", data);
+}
+
+WRITE8_MEMBER(pg685_state::f9f32_w)
+{
+ // 1D written at startup
+ logerror("Writing %02X to F9F32\n", data);
+}
+
+READ8_MEMBER(pg685_state::f9f33_r)
+{
+ // Printer present?
+ logerror("Reading from F9F33\n");
+ return 0xff;
+}
+
+WRITE8_MEMBER(pg685_state::f9f3e_w)
+{
+ // 00 written at startup
+ logerror("Writing %02X to F9F3E\n", data);
+}
+
+READ8_MEMBER(pg685_state::f9f3f_r)
+{
+ logerror("Reading from F9F3F\n");
+ return 0xff;
+}
+
//**************************************************************************
// FLOPPY
//**************************************************************************
+READ8_MEMBER(pg685_state::f9f24_r)
+{
+ logerror("Reading from F9F24\n");
+ return 0xff;
+}
+
+WRITE8_MEMBER(pg685_state::f9f24_w)
+{
+ logerror("Writing %02X to F9F24\n", data);
+}
+
//**************************************************************************
// HARDDISK
//**************************************************************************
+READ8_MEMBER(pg685_state::f9f78_r)
+{
+ logerror("Reading from F9F78\n");
+ return 0xff;
+}
+
+WRITE8_MEMBER(pg685_state::f9f78_w)
+{
+ // WD 1010 separate drive/head select register
+ logerror("Writing %02X to F9F78\n", data);
+}
+
+WRITE8_MEMBER(pg685_state::f9f79_w)
+{
+ // another write-only register (possibly reset or interrupt control)
+ logerror("Writing %02X to F9F79\n", data);
+}
+
//**************************************************************************
// MACHINE EMULATION
//**************************************************************************
@@ -306,6 +381,47 @@ static MACHINE_CONFIG_FRAGMENT(pg685_module)
MCFG_DEVICE_ADD("rtc", MM58167, XTAL_32_768kHz)
MACHINE_CONFIG_END
+static MACHINE_CONFIG_START( pg675, pg685_state )
+ // main cpu
+ MCFG_CPU_ADD("maincpu", I8088, XTAL_15MHz / 3)
+ MCFG_CPU_PROGRAM_MAP(pg675_mem)
+ MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("mainpic", pic8259_device, inta_cb)
+
+ MCFG_PIC8259_ADD("mainpic", INPUTLINE("maincpu", 0), VCC, NOOP)
+
+ // i/o cpu
+
+ // ram
+
+ // video hardware
+ MCFG_SCREEN_ADD("screen", RASTER)
+ MCFG_SCREEN_RAW_PARAMS(12288000, 882, 0, 720, 370, 0, 350 ) // not real values
+ MCFG_SCREEN_UPDATE_DEVICE( "crtc", mc6845_device, screen_update )
+
+ MCFG_MC6845_ADD("crtc", MC6845, "screen", 12288000)
+ MCFG_MC6845_SHOW_BORDER_AREA(false)
+ MCFG_MC6845_CHAR_WIDTH(8)
+ MCFG_MC6845_UPDATE_ROW_CB(pg685_state, crtc_update_row)
+
+ // sound hardware
+
+ // devices
+ MCFG_FRAGMENT_ADD(pg685_module)
+
+ MCFG_DEVICE_ADD("mainuart", I8251, XTAL_12_288MHz / 6) // divider guessed
+
+ // rs232 port
+
+ // keyboard
+ MCFG_DEVICE_ADD("kbdc", I8279, XTAL_12_288MHz / 6) // divider guessed
+ MCFG_I8279_OUT_IRQ_CB(DEVWRITELINE("mainpic", pic8259_device, ir0_w))
+
+ // printer
+
+ // floppy
+
+MACHINE_CONFIG_END
+
static MACHINE_CONFIG_START( pg685, pg685_state )
// main cpu
MCFG_CPU_ADD("maincpu", V20, XTAL_15MHz / 3)
@@ -424,6 +540,6 @@ ROM_END
// ROM DEFINITIONS
//**************************************************************************
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
-COMP( 198?, pg675, 0, 0, pg685, pg685, driver_device, 0, "Siemens", "Simatic PG675", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
+COMP( 198?, pg675, 0, 0, pg675, pg685, driver_device, 0, "Siemens", "Simatic PG675", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 198?, pg685, 0, 0, pg685, pg685, driver_device, 0, "Siemens", "Simatic PG685 OUA11", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
COMP( 198?, pg685oua12, pg685, 0, pg685oua12, pg685, driver_device, 0, "Siemens", "Simatic PG685 OUA12", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
diff --git a/src/mame/drivers/phoenix.cpp b/src/mame/drivers/phoenix.cpp
index 395ce097887..bb3e1e0e370 100644
--- a/src/mame/drivers/phoenix.cpp
+++ b/src/mame/drivers/phoenix.cpp
@@ -16,7 +16,7 @@ To Do:
Survival:
-- Check background visibile area. When the background scrolls up, it
+- Check background visible area. When the background scrolls up, it
currently shows below the top and bottom of the border of the play area.
diff --git a/src/mame/drivers/r2dx_v33.cpp b/src/mame/drivers/r2dx_v33.cpp
index 8fabce316aa..e7582d8bfbf 100644
--- a/src/mame/drivers/r2dx_v33.cpp
+++ b/src/mame/drivers/r2dx_v33.cpp
@@ -66,6 +66,8 @@ Then it puts settings at 0x9e08 and 0x9e0a (bp 91acb)
#include "cpu/nec/nec.h"
#include "cpu/z80/z80.h"
#include "machine/eepromser.h"
+#include "sound/3812intf.h"
+//#include "sound/ym2151.h"
#include "sound/okim6295.h"
#include "includes/raiden2.h"
#include "machine/r2crypt.h"
@@ -804,9 +806,8 @@ static MACHINE_CONFIG_START( nzerotea, r2dx_v33_state )
MCFG_MACHINE_RESET_OVERRIDE(r2dx_v33_state,nzeroteam)
-
- // SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
- SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(zeroteam_sound_map)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
@@ -827,9 +828,19 @@ static MACHINE_CONFIG_START( nzerotea, r2dx_v33_state )
MCFG_SEIBU_CRTC_LAYER_SCROLL_CB(WRITE16(raiden2_state, tile_scroll_w))
/* sound hardware */
-// SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(28636360/8,28636360/28,1,2)
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( zerotm2k, nzerotea )
diff --git a/src/mame/drivers/raiden.cpp b/src/mame/drivers/raiden.cpp
index b98ac455aae..25285f95408 100644
--- a/src/mame/drivers/raiden.cpp
+++ b/src/mame/drivers/raiden.cpp
@@ -276,7 +276,8 @@ static MACHINE_CONFIG_START( raiden, raiden_state )
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", raiden_state, raiden_interrupt)
- SEIBU_SOUND_SYSTEM_CPU(XTAL_14_31818MHz/4) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz/4) /* verified on pcb */
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(12000))
@@ -297,11 +298,27 @@ static MACHINE_CONFIG_START( raiden, raiden_state )
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(XTAL_14_31818MHz/4,XTAL_12MHz/12) // frequency and pin 7 verified (pin set in audio\seibu.h)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_14_31818MHz/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", XTAL_12MHz/12, OKIM6295_PIN7_HIGH) // frequency and pin 7 verified
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( raidene, raiden )
- SEIBU_SOUND_SYSTEM_ENCRYPTED_FULL()
+ MCFG_DEVICE_MODIFY("seibu_sound")
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_FULL("audiocpu")
+
+ MCFG_DEVICE_MODIFY("audiocpu")
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( raidenu, raidene )
diff --git a/src/mame/drivers/raiden2.cpp b/src/mame/drivers/raiden2.cpp
index d17e3143b7c..d35ba423225 100644
--- a/src/mame/drivers/raiden2.cpp
+++ b/src/mame/drivers/raiden2.cpp
@@ -68,7 +68,7 @@ PCB Layout
|----------------------------------------------------------|
Notes:
V30 clock - 16.000MHz [32/2]. Chip is stamped "NEC D70116HG-16 V30 NEC '84" (QFP52)
- Z80 clock - 3.579545MHz [28.63636/8]
+ Z80 clock - 3.579545MHz [28.63636/8]. /NMI, /BUSREQ and /WAIT tied high/unused.
YM2151 clock - 3.579545MHz [28.63636/8]
M6295 clocks - 1.022MHz [28.63636/28] and pin 7 HIGH (both)
CXK58258 - Sony CXK58258 32k x8 SRAM (= 62256)
@@ -173,6 +173,8 @@ Protection Notes:
#include "cpu/nec/nec.h"
#include "cpu/z80/z80.h"
#include "machine/eepromser.h"
+#include "sound/3812intf.h"
+#include "sound/ym2151.h"
#include "sound/okim6295.h"
#include "includes/raiden2.h"
#include "machine/r2crypt.h"
@@ -1060,6 +1062,45 @@ static ADDRESS_MAP_START( xsedae_mem, AS_PROGRAM, 16, raiden2_state )
AM_RANGE(0x20000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x20000)
ADDRESS_MAP_END
+ADDRESS_MAP_START( raiden2_sound_map, AS_PROGRAM, 8, raiden2_state )
+ AM_RANGE(0x0000, 0x1fff) AM_ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM
+ AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
+ AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
+ AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
+ AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
+ AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
+ AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
+ AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
+ AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
+ AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
+ AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
+ AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki1", okim6295_device, read, write)
+ AM_RANGE(0x6002, 0x6002) AM_DEVREADWRITE("oki2", okim6295_device, read, write)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
+ AM_RANGE(0x4004, 0x4004) AM_NOP
+ AM_RANGE(0x401a, 0x401a) AM_NOP
+ADDRESS_MAP_END
+
+ADDRESS_MAP_START( zeroteam_sound_map, AS_PROGRAM, 8, raiden2_state )
+ AM_RANGE(0x0000, 0x1fff) AM_ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM
+ AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
+ AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
+ AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
+ AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
+ AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
+ AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
+ AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
+ AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
+ AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
+ AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
+ AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_device, read, write)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
+ADDRESS_MAP_END
+
/* INPUT PORTS */
@@ -1377,7 +1418,8 @@ static MACHINE_CONFIG_START( raiden2, raiden2_state )
MCFG_MACHINE_RESET_OVERRIDE(raiden2_state,raiden2)
- SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(XTAL_28_63636MHz/8)
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_28_63636MHz/8)
+ MCFG_CPU_PROGRAM_MAP(raiden2_sound_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -1399,13 +1441,23 @@ static MACHINE_CONFIG_START( raiden2, raiden2_state )
MCFG_VIDEO_START_OVERRIDE(raiden2_state,raiden2)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(XTAL_28_63636MHz/8,XTAL_28_63636MHz/28,1,2)
- // the sound z80 has /NMI, /BUSREQ and /WAIT tied high/unused
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+ MCFG_YM2151_ADD("ymsnd", XTAL_28_63636MHz/8)
+ MCFG_YM2151_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(0, "mono", 0.50)
+ MCFG_SOUND_ROUTE(1, "mono", 0.50)
-/* Sound hardware infos: Z80 and YM2151 are clocked at XTAL_28_63636MHz/8 */
-/* The 2 Oki M6295 are clocked at XTAL_28_63636MHz/28 and pin 7 is high for both */
+ MCFG_OKIM6295_ADD("oki1", XTAL_28_63636MHz/28, OKIM6295_PIN7_HIGH)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+ MCFG_OKIM6295_ADD("oki2", XTAL_28_63636MHz/28, OKIM6295_PIN7_HIGH)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2151_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2151_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( xsedae, raiden2 )
@@ -1436,7 +1488,8 @@ static MACHINE_CONFIG_START( zeroteam, raiden2_state )
MCFG_MACHINE_RESET_OVERRIDE(raiden2_state,zeroteam)
- SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(XTAL_28_63636MHz/8)
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_28_63636MHz/8)
+ MCFG_CPU_PROGRAM_MAP(zeroteam_sound_map)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -1459,7 +1512,19 @@ static MACHINE_CONFIG_START( zeroteam, raiden2_state )
MCFG_VIDEO_START_OVERRIDE(raiden2_state,raiden2)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(XTAL_28_63636MHz/8, 1320000/* ? */)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_28_63636MHz/8)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000/* ? */, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
/* ROM LOADING */
diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp
index aa14bcda1ee..21959f7f154 100644
--- a/src/mame/drivers/rainbow.cpp
+++ b/src/mame/drivers/rainbow.cpp
@@ -692,11 +692,13 @@ private:
// FULL RANGE video levels for 100-B model, taken from page 46 of PDF
const uint8_t video_levels[16] = { 255, 217, 201,186, 171, 156, 140, 125, 110, 97, 79, 66, 54, 31, 18, 0 };
+ uint8_t m_PORT50;
};
// GDC RESET MACRO - used in "machine_reset" & GDC_EXTRA_REGISTER_w !
#define GDC_RESET_MACRO \
+m_PORT50 = 0; \
m_GDC_INDIRECT_REGISTER = 0; \
m_GDC_MODE_REGISTER = 0; \
m_GDC_WRITE_MASK = 0; \
@@ -2234,7 +2236,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w)
m_floppy = con->get_device();
if (m_floppy)
selected_drive = drive;
- printf("%i <- SELECTED DRIVE...\n", m_unit);
+// printf("%i <- SELECTED DRIVE...\n", m_unit);
}
if (selected_drive == INVALID_DRIVE)
@@ -2766,7 +2768,7 @@ WRITE16_MEMBER(rainbow_state::vram_w)
}
if(!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) // 0 : (NOT VECTOR MODE) Text Mode and Write Mask Batch
- out = (out & m_GDC_WRITE_MASK) | (mem & ~m_GDC_WRITE_MASK); // // M_MASK (1st use)
+ out = (out & ~m_GDC_WRITE_MASK) | (mem & m_GDC_WRITE_MASK); // // M_MASK (1st use)
else
out = (out & ~data) | (mem & data); // VECTOR MODE !
@@ -2789,17 +2791,21 @@ READ8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_r)
uint8_t out = 0;
switch(offset)
{
+ case 0:
+ out = m_PORT50;
+ break;
+
case 1:
- if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
- {
- // Documentation says it is always incremented, no matter if read or write:
- out = m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index++]; // // * READ * SCROLL_MAP ( 256 x 8 )
- m_GDC_scroll_index &= 0xFF; // 0...255 (CPU accesses 256 bytes)
- break;
- }
- else
- printf("\n * UNEXPECTED CASE: READ REGISTER 50..55 with INDIRECT_REGISTER $%02x and OFFSET $%02x *", m_GDC_INDIRECT_REGISTER, offset);
+ if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
+ {
+ // Documentation says it is always incremented (read and write):
+ out = m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index++]; // // * READ * SCROLL_MAP ( 256 x 8 )
+ m_GDC_scroll_index &= 0xFF; // 0...255 (CPU accesses 256 bytes)
break;
+ }
+ else
+ printf("\n * UNEXPECTED CASE: READ REGISTER 50..55 with INDIRECT_REGISTER $%02x and OFFSET $%02x *", m_GDC_INDIRECT_REGISTER, offset);
+ break;
default:
printf("\n * UNHANDLED CASE: READ REGISTER 50..55 with INDIRECT_REGISTER $%02x and OFFSET $%02x *", m_GDC_INDIRECT_REGISTER, offset);
@@ -2826,10 +2832,15 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
switch(offset)
{
- case 0: // Mode Register must be reloaded following any write to port 50 (software reset).
- // Graphics option software reset. Any write to this port also resynchronizes the
- // read/modify/write memory cycles of the Graphics Option to those of the GDC.
- GDC_RESET_MACRO
+ case 0: // Mode register must be reloaded following any write to port 50 (software reset).
+ // FIXME: "Any write to this port also resynchronizes the
+ // read/modify/write memory cycles of the Graphics Option to those of the GDC." (?)
+ if( data & 1 ) // PDF QV069 suggests 1 -> 0 -> 1; most programs just set bit 0.
+ {
+ GDC_RESET_MACRO // Graphics option software reset (separate from GDC reset...)
+ printf("(PC=%x)\n", machine().device("maincpu")->safe_pc());
+ }
+ m_PORT50 = data;
break;
case 1: // 51h - DATA loaded into register previously written to 53h.
@@ -2993,13 +3004,13 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
break;
// --------- WRITE MASK (2 x 8 = 16 bits) USED IN WORD MODE ONLY !
- // NOTE: there is NO specific order for the WRITE_MASK (according to txt/code samples in PDF)!
- // !! NEW: LOW... HI JUXTAPOSITION...!!
+ // There is no specific order for the WRITE_MASK (according to txt/code samples in DEC's PDF).
+ // NOTE: LOW <-> HI JUXTAPOSITION!
case 4: // 54h Write Mask LOW
- m_GDC_WRITE_MASK = ( BITSWAP8(~data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
+ m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
break;
case 5: // 55h Write Mask HIGH
- m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | BITSWAP8(~data, 0, 1, 2, 3, 4, 5, 6, 7);
+ m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7);
break;
}
}
@@ -3060,7 +3071,7 @@ MCFG_VT_VIDEO_RAM_CALLBACK(READ8(rainbow_state, read_video_ram_r))
MCFG_VT_VIDEO_CLEAR_VIDEO_INTERRUPT_CALLBACK(WRITELINE(rainbow_state, clear_video_interrupt))
// *************************** COLOR GRAPHICS (OPTION) **************************************
-MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_32MHz / 4) // WAR: 31188000 / 4 TO BE VERIFIED. Duell schematics shows 31.188 (?) Mhz (/ 4 = 7.797 Mhz)
+MCFG_DEVICE_ADD("upd7220", UPD7220, 31188000 / 4) // Duell schematics shows a 31.188 Mhz clock (confirmed by RFKA; not in XTAL)
MCFG_UPD7220_VSYNC_CALLBACK(WRITELINE(rainbow_state, GDC_vblank_irq)) // "The vsync callback line needs to be below the 7220 DEVICE_ADD line."
MCFG_DEVICE_ADDRESS_MAP(AS_0, upd7220_map)
diff --git a/src/mame/drivers/sega_sawatte.cpp b/src/mame/drivers/sega_sawatte.cpp
index 04dd9fa432e..1caec4a2748 100644
--- a/src/mame/drivers/sega_sawatte.cpp
+++ b/src/mame/drivers/sega_sawatte.cpp
@@ -5,7 +5,7 @@
a sound-only Pico type system (one of the boards even says S-PICO)
-CPU is unknown (I can't see one?!) cartridge dumps should be good, but not confirmed, might be data only for an MCU?
+CPU is unknown (I can't see one?! MCU with internal ROM?) cartridge dumps have been tested as working using a flash cart.
driver does nothing except allow the softlist to be connected to the -romident commands etc.
diff --git a/src/mame/drivers/seicupbl.cpp b/src/mame/drivers/seicupbl.cpp
index aa22ca69c77..8662811ba53 100644
--- a/src/mame/drivers/seicupbl.cpp
+++ b/src/mame/drivers/seicupbl.cpp
@@ -546,7 +546,6 @@ static MACHINE_CONFIG_START( cupsocbl, seicupbl_state )
MCFG_DEVICE_SEIBUCOP_BOOTLEG_ADD("seibucop_boot")
/*Different Sound hardware*/
- //SEIBU_SOUND_SYSTEM_CPU(14318180/4)
MCFG_CPU_ADD("audiocpu", Z80,14318180/4)
MCFG_CPU_PROGRAM_MAP(cupsocbl_sound_mem)
//MCFG_PERIODIC_INT("screen", nmi_line_pulse)
diff --git a/src/mame/drivers/sengokmj.cpp b/src/mame/drivers/sengokmj.cpp
index 37b58279579..fa6d50e17ca 100644
--- a/src/mame/drivers/sengokmj.cpp
+++ b/src/mame/drivers/sengokmj.cpp
@@ -57,6 +57,7 @@ RSSENGO2.72 chr.
#include "cpu/nec/nec.h"
#include "audio/seibu.h"
#include "sound/3812intf.h"
+#include "sound/okim6295.h"
#include "video/seibu_crtc.h"
#include "machine/nvram.h"
@@ -570,7 +571,8 @@ static MACHINE_CONFIG_START( sengokmj, sengokmj_state )
MCFG_CPU_IO_MAP(sengokmj_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", sengokmj_state, interrupt)
- SEIBU_SOUND_SYSTEM_CPU(14318180/4)
+ MCFG_CPU_ADD("audiocpu", Z80, 14318180/4)
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -592,7 +594,19 @@ static MACHINE_CONFIG_START( sengokmj, sengokmj_state )
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, 14318180/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", 1320000, OKIM6295_PIN7_LOW)
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/shanghai.cpp b/src/mame/drivers/shanghai.cpp
index 07d14a4cf2b..97ce2bcd7dd 100644
--- a/src/mame/drivers/shanghai.cpp
+++ b/src/mame/drivers/shanghai.cpp
@@ -21,6 +21,7 @@ displayed.
#include "emu.h"
#include "cpu/nec/nec.h"
+#include "sound/2203intf.h"
#include "audio/seibu.h"
#include "video/hd63484.h"
@@ -133,6 +134,25 @@ static ADDRESS_MAP_START( kothello_map, AS_PROGRAM, 16, shanghai_state )
AM_RANGE(0x80000, 0xfffff) AM_ROM
ADDRESS_MAP_END
+static ADDRESS_MAP_START( kothello_sound_map, AS_PROGRAM, 8, shanghai_state )
+ AM_RANGE(0x0000, 0x1fff) AM_ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM
+ AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w)
+ AM_RANGE(0x4001, 0x4001) AM_DEVWRITE("seibu_sound", seibu_sound_device, irq_clear_w)
+ AM_RANGE(0x4002, 0x4002) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst10_ack_w)
+ AM_RANGE(0x4003, 0x4003) AM_DEVWRITE("seibu_sound", seibu_sound_device, rst18_ack_w)
+ AM_RANGE(0x4005, 0x4006) AM_DEVWRITE("adpcm", seibu_adpcm_device, adr_w)
+ AM_RANGE(0x4007, 0x4007) AM_DEVWRITE("seibu_sound", seibu_sound_device, bank_w)
+ AM_RANGE(0x4008, 0x4009) AM_DEVREADWRITE("seibu_sound", seibu_sound_device, ym_r, ym_w)
+ AM_RANGE(0x4010, 0x4011) AM_DEVREAD("seibu_sound", seibu_sound_device, soundlatch_r)
+ AM_RANGE(0x4012, 0x4012) AM_DEVREAD("seibu_sound", seibu_sound_device, main_data_pending_r)
+ AM_RANGE(0x4013, 0x4013) AM_READ_PORT("COIN")
+ AM_RANGE(0x4018, 0x4019) AM_DEVWRITE("seibu_sound", seibu_sound_device, main_data_w)
+ AM_RANGE(0x401a, 0x401a) AM_DEVWRITE("adpcm", seibu_adpcm_device, ctl_w)
+ AM_RANGE(0x401b, 0x401b) AM_DEVWRITE("seibu_sound", seibu_sound_device, coin_w)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1")
+ADDRESS_MAP_END
+
static INPUT_PORTS_START( kothello )
SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
@@ -436,7 +456,8 @@ static MACHINE_CONFIG_START( kothello, shanghai_state )
MCFG_CPU_PROGRAM_MAP(kothello_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", shanghai_state, interrupt)
- SEIBU3A_SOUND_SYSTEM_CPU(XTAL_16MHz/4)
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_16MHz/4)
+ MCFG_CPU_PROGRAM_MAP(kothello_sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(12000))
@@ -457,16 +478,19 @@ static MACHINE_CONFIG_START( kothello, shanghai_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- /* same as standard seibu ym2203, but "ym1" also reads "DSW" */
- MCFG_SOUND_ADD("ym1", YM2203, XTAL_16MHz/4)
+ /* same as standard seibu ym2203, but also reads "DSW" */
+ MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_16MHz/4)
MCFG_YM2203_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW"))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
- MCFG_SOUND_ADD("ym2", YM2203, XTAL_16MHz/4)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym2203_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym2203_device, write))
- SEIBU_SOUND_SYSTEM_ADPCM_INTERFACE
+ MCFG_SOUND_ADD("adpcm", SEIBU_ADPCM, 8000) // actually MSM5205
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
MACHINE_CONFIG_END
/***************************************************************************
@@ -621,10 +645,8 @@ ROM_START( kothello )
ROM_LOAD( "rom5.5l", 0x00000, 0x02000, CRC(7eb6e697) SHA1(4476e13f9a9e04472581f2c069760f53b33d5672))
ROM_CONTINUE( 0x10000, 0x0e000 )
- ROM_REGION( 0x10000, "adpcm1", 0 )
+ ROM_REGION( 0x10000, "adpcm", 0 )
ROM_LOAD( "rom6.7m", 0x00000, 0x10000, CRC(4ab1335d) SHA1(3a803e8a7e9b0c2a26ee23e7ac9c89c70cf2504b))
-
- ROM_REGION( 0x10000, "adpcm2", ROMREGION_ERASE00 )
ROM_END
diff --git a/src/mame/drivers/silvmil.cpp b/src/mame/drivers/silvmil.cpp
index d504a4932e6..a365dd8a2fc 100644
--- a/src/mame/drivers/silvmil.cpp
+++ b/src/mame/drivers/silvmil.cpp
@@ -264,7 +264,7 @@ static INPUT_PORTS_START( silvmil )
PORT_DIPSETTING( 0x1000, DEF_STR( 3C_2C ) ) /* Works like 2C/1C then 1C/1C repeat */
PORT_DIPSETTING( 0x2000, DEF_STR( 2C_2C ) ) /* Works the same as 1C/1C */
PORT_DIPSETTING( 0x3800, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x4000, 0x4000, "Coin Box" ) PORT_DIPLOCATION("SW2:7") /* Funtionally reversed?? */
+ PORT_DIPNAME( 0x4000, 0x4000, "Coin Box" ) PORT_DIPLOCATION("SW2:7") /* Functionally reversed?? */
PORT_DIPSETTING( 0x4000, "1" ) /* Credits from Coin1 or Coin2 */
PORT_DIPSETTING( 0x0000, "2" ) /* Doesn't credit up from Coin2 */
PORT_SERVICE_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW2:8" ) /* Verified */
diff --git a/src/mame/drivers/snookr10.cpp b/src/mame/drivers/snookr10.cpp
index c6f51e64117..5c7161a028f 100644
--- a/src/mame/drivers/snookr10.cpp
+++ b/src/mame/drivers/snookr10.cpp
@@ -122,7 +122,7 @@
- Tile matrix and color data (video & color RAM) are totally encrypted/scrambled.
You can see the following table, where 'Normal tile #' is the tile number called
- to be drawn, and 'Scrambled tile #' is the phisical tile position in the matrix:
+ to be drawn, and 'Scrambled tile #' is the physical tile position in the matrix:
Normal | Scrambled
tile # | tile #
@@ -258,7 +258,7 @@
- Tile matrix and color data (video & color RAM) are totally encrypted/scrambled.
You can see the following table, where 'Normal tile #' is the tile number called
- to be drawn, and 'Scrambled tile #' is the phisical tile position in the matrix:
+ to be drawn, and 'Scrambled tile #' is the physical tile position in the matrix:
Normal | Scrambled
tile # | tile #
diff --git a/src/mame/drivers/spc1500.cpp b/src/mame/drivers/spc1500.cpp
index de7aff02a42..78331202047 100644
--- a/src/mame/drivers/spc1500.cpp
+++ b/src/mame/drivers/spc1500.cpp
@@ -90,7 +90,7 @@ TODO:
Hangul ROM
8KB each is divided by a consonant and consonant and neutral.
- - Inital (Choseong) SS151-1223: 8 types of intial character (actual 6 types)
+ - Initial (Choseong) SS151-1223: 8 types of intial character (actual 6 types)
- Middle (Jungseong) SS152-1224: 2 types of middle character
- Final (Jongseong) SS153-1225: 2 types of final character
diff --git a/src/mame/drivers/tecmo.cpp b/src/mame/drivers/tecmo.cpp
index 1ccb1f928d0..3018eeeeff2 100644
--- a/src/mame/drivers/tecmo.cpp
+++ b/src/mame/drivers/tecmo.cpp
@@ -366,6 +366,18 @@ static INPUT_PORTS_START( gemini )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 )
+ PORT_MODIFY("BUTTONS1")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 )
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 )
+
+ PORT_MODIFY("JOY2")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
+
+ PORT_MODIFY("BUTTONS2")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
+
PORT_MODIFY("DSWA")
PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:!1,!2,!3")
PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
diff --git a/src/mame/drivers/ti99_2.cpp b/src/mame/drivers/ti99_2.cpp
index 35740e9efcb..82415956646 100644
--- a/src/mame/drivers/ti99_2.cpp
+++ b/src/mame/drivers/ti99_2.cpp
@@ -30,7 +30,7 @@ general :
- Unlike tms9900, CRU address range is full 0x0000-0xFFFE (A0 is not used as address).
This is possible because tms9995 uses d0-d2 instead of the address MSBits to support external
opcodes.
- - quite more efficient than tms9900, and a few additionnal instructions and features
+ - quite more efficient than tms9900, and a few additional instructions and features
* 24 or 32kb ROM (16kb plain (1kb of which used by vdp), 16kb split into 2 8kb pages)
* 4kb 8-bit RAM, 256 bytes 16-bit RAM
* custom vdp shares CPU RAM/ROM. The display is quite alike to tms9928 graphics mode, except
diff --git a/src/mame/drivers/ti99_4p.cpp b/src/mame/drivers/ti99_4p.cpp
index a4e43e1c0b8..00a4c3d779c 100644
--- a/src/mame/drivers/ti99_4p.cpp
+++ b/src/mame/drivers/ti99_4p.cpp
@@ -563,7 +563,7 @@ WRITE16_MEMBER( ti99_4p_state::memwrite )
if (space.debugger_access()) { debugger_write(space, offset, data); return; }
// Writing the even address now (addr)
- // The databus multplexer puts the even value into the latch and outputs the odd value now.
+ // The databus multiplexer puts the even value into the latch and outputs the odd value now.
m_latch = (data >> 8) & 0xff;
// write odd byte
diff --git a/src/mame/drivers/toki.cpp b/src/mame/drivers/toki.cpp
index d4c59f0a4e1..b823573da5a 100644
--- a/src/mame/drivers/toki.cpp
+++ b/src/mame/drivers/toki.cpp
@@ -97,7 +97,7 @@ Notes:
#include "cpu/z80/z80.h"
#include "machine/watchdog.h"
#include "sound/3812intf.h"
-#include "sound/3812intf.h"
+#include "sound/okim6295.h"
#include "includes/toki.h"
WRITE16_MEMBER(toki_state::tokib_soundcommand_w)
@@ -438,7 +438,8 @@ static MACHINE_CONFIG_START( toki, toki_state ) /* KOYO 20.000MHz near the cpu *
MCFG_CPU_PROGRAM_MAP(toki_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", toki_state, irq1_line_hold)/* VBL */
- SEIBU_SOUND_SYSTEM_CPU(XTAL_14_31818MHz/4) /* verifed on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz/4) // verified on pcb
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map)
/* video hardware */
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
@@ -456,15 +457,35 @@ static MACHINE_CONFIG_START( toki, toki_state ) /* KOYO 20.000MHz near the cpu *
MCFG_PALETTE_FORMAT(xxxxBBBBGGGGRRRR)
/* sound hardware */
- SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(XTAL_14_31818MHz/4,XTAL_12MHz/12) /* verifed on pcb */
+ MCFG_SPEAKER_STANDARD_MONO("mono")
+
+ MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_14_31818MHz/4)
+ MCFG_YM3812_IRQ_HANDLER(DEVWRITELINE("seibu_sound", seibu_sound_device, fm_irqhandler))
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_OKIM6295_ADD("oki", XTAL_12MHz/12, OKIM6295_PIN7_HIGH) // verified on pcb
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+
+ MCFG_DEVICE_ADD("seibu_sound", SEIBU_SOUND, 0)
+ MCFG_SEIBU_SOUND_CPU("audiocpu")
+ MCFG_SEIBU_SOUND_YM_READ_CB(DEVREAD8("ymsnd", ym3812_device, read))
+ MCFG_SEIBU_SOUND_YM_WRITE_CB(DEVWRITE8("ymsnd", ym3812_device, write))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tokie, toki )
- SEIBU_SOUND_SYSTEM_ENCRYPTED_LOW()
+ MCFG_DEVICE_MODIFY("seibu_sound")
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_LOW("audiocpu")
+
+ MCFG_DEVICE_MODIFY("audiocpu")
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tokic, toki )
- SEIBU_SOUND_SYSTEM_ENCRYPTED_CUSTOM()
+ MCFG_DEVICE_MODIFY("seibu_sound")
+ MCFG_SEIBU_SOUND_CPU_ENCRYPTED_CUSTOM("audiocpu")
+
+ MCFG_DEVICE_MODIFY("audiocpu")
+ MCFG_CPU_DECRYPTED_OPCODES_MAP(seibu_sound_decrypted_opcodes_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( tokib, toki_state )
diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp
index d6c74f5640b..dcb19498ca7 100644
--- a/src/mame/drivers/x68k.cpp
+++ b/src/mame/drivers/x68k.cpp
@@ -1480,7 +1480,7 @@ SLOT_INTERFACE_END
MACHINE_RESET_MEMBER(x68k_state,x68000)
{
/* The last half of the IPLROM is mapped to 0x000000 on reset only
- Just copying the inital stack pointer and program counter should
+ Just copying the initial stack pointer and program counter should
more or less do the same job */
int drive;
@@ -1584,7 +1584,7 @@ DRIVER_INIT_MEMBER(x68k_state,x68000)
}
#endif
- // copy last half of BIOS to a user region, to use for inital startup
+ // copy last half of BIOS to a user region, to use for initial startup
memcpy(user2,(rom+0xff0000),0x10000);
m_scanline_timer = timer_alloc(TIMER_X68K_HSYNC);
@@ -1681,7 +1681,7 @@ static MACHINE_CONFIG_START( x68000, x68k_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(55.45)
- MCFG_SCREEN_SIZE(1096, 568) // inital setting
+ MCFG_SCREEN_SIZE(1096, 568) // initial setting
MCFG_SCREEN_VISIBLE_AREA(0, 767, 0, 511)
MCFG_SCREEN_UPDATE_DRIVER(x68k_state, screen_update_x68000)
diff --git a/src/mame/drivers/yunsun16.cpp b/src/mame/drivers/yunsun16.cpp
index 198edee2ab4..388f058c2fd 100644
--- a/src/mame/drivers/yunsun16.cpp
+++ b/src/mame/drivers/yunsun16.cpp
@@ -47,7 +47,7 @@ Stephh's notes (based on the games M68000 code and some tests) :
2) 'magicbua'
- - Additionnal 1P Vs COM mode with always only 1 winning round.
+ - Additional 1P Vs COM mode with always only 1 winning round.
- Starting in 1P Vs 2P mode costs 2 credits. If no "Continue Play", the winner continues.
And when a player joins in, if no "Continue Play", the winner also continues.
- There is an ingame bug when in 1P Vs 2P mode : whatever the settings are, there will
diff --git a/src/mame/drivers/zorba.cpp b/src/mame/drivers/zorba.cpp
index 47a996d9e03..4d5e640cf4f 100644
--- a/src/mame/drivers/zorba.cpp
+++ b/src/mame/drivers/zorba.cpp
@@ -2,13 +2,15 @@
// copyright-holders:Robbbert
/************************************************************************************************************
-Telcon Zorba
+Telcon Industries/Modular Micros/Gemini Electronics Zorba
+http://www.zorba.z80.de
2013-08-25 Skeleton
+2015-02-20 Boots from floppy, is now usable.
This was one of the last CP/M-based systems, already out of date when it was released.
Because it doesn't use the standard Z80 peripherals, it uses a homebrew interrupt controller to make use
- of the Z80's IM2.
+of the Z80's IM2.
The keyboard is an intelligent serial device like the Kaypro's keyboard. They even have the same plug,
and might be swappable. Need a schematic.
@@ -17,6 +19,23 @@ Instead of using a daisy chain, the IM2 vectors are calculated by a prom (u77).
contents make no sense at all (mostly FF), so the vectors for IRQ0 and IRQ2 are hard-coded. Other IRQ
vectors are not used as yet.
+Three companies are known to have sold the Zorba over its lifetime: Telcon Industries, Modular Micros
+(a subsidiary of Modular Computers (ModComp)), and Gemini Electronics. 7-inch and 9-inch models were
+available from Telcon and Modular Micros, while Gemini exclusively sold the 9-inch version. The ROM dumps
+currently used in this emulation originate from a Modular Micros Zorba.
+
+The two versions of the Zorba were sold by Modular Micros were:
+- Zorba 7: 7" CRT, 2 410K floppies, 22 lbs, $1595
+- Zorba 2000: 9" CRT, 2 820K floppies, 10M HD optional, 25 lbs, ~$2000
+
+The 7-inch version has the screen on the left, the floppy drives on the right, and a Zorba logo on the
+far right; on the 9-inch version this arrangement is reversed and the logo is removed.
+
+The startup screen varies across each company:
+- Telcon: "TELCON ZORBA" graphical logo
+- Modular Micros: "ZORBA" graphical logo with "MODULAR MICROS, INC." below in normal text
+- Gemini: "GEMINI ZORBA" graphical logo
+
Status:
- Boots up, and the keyboard works
@@ -27,6 +46,8 @@ ToDo:
- Fix the display
- Connect the PIT to the UARTs
- Replace the ascii keyboard with the real one, if possible
+- Dump Telcon and Gemini BIOSes
+- Emulate the Co-Power-88 expansion (allows PC-DOS, CP/M-86, etc. to be used)
- Probably lots of other things
@@ -44,6 +65,7 @@ ToDo:
#include "sound/beep.h"
#include "machine/keyboard.h"
#include "machine/wd_fdc.h"
+#include "softlist.h"
class zorba_state : public driver_device
@@ -410,6 +432,8 @@ static MACHINE_CONFIG_START( zorba, zorba_state )
/* Keyboard */
MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0)
MCFG_GENERIC_KEYBOARD_CB(WRITE8(zorba_state, kbd_put))
+
+ MCFG_SOFTWARE_LIST_ADD("flop_list", "zorba")
MACHINE_CONFIG_END
ROM_START( zorba )
@@ -428,4 +452,8 @@ ROM_START( zorba )
ROM_LOAD( "74ls288.u77", 0x0040, 0x0020, CRC(946e03b0) SHA1(24240bdd7bdf507a5b51628fb36ad1266fc53a28) ) // suspected bad dump
ROM_END
-COMP( 1982, zorba, 0, 0, zorba, zorba, zorba_state, zorba, "Telcon Industries", "Zorba", MACHINE_NOT_WORKING )
+COMP( 1984?, zorba, 0, 0, zorba, zorba, zorba_state, zorba, "Modular Micros", "Zorba (Modular Micros)", MACHINE_NOT_WORKING )
+
+// Undumped versions (see startup screen notes at top of file)
+// COMP( 1983, zorbat, zorba, 0, zorba, zorba, zorba_state, zorba, "Telcon Industries", "Zorba (Telcon Industries)", MACHINE_NOT_WORKING )
+// COMP( 1984, zorbag, zorba, 0, zorba, zorba, zorba_state, zorba, "Gemini Electronics", "Zorba (Gemini Electronics)", MACHINE_NOT_WORKING )
diff --git a/src/mame/includes/chihiro.h b/src/mame/includes/chihiro.h
index ada5eb240e4..44f7561d58d 100644
--- a/src/mame/includes/chihiro.h
+++ b/src/mame/includes/chihiro.h
@@ -160,7 +160,7 @@ struct nvidia_object_data
};
/*
- * geforce 3d (NV2A) accellerator
+ * geforce 3d (NV2A) accelerator
*/
/* very simplified view
there is a set of context objects
@@ -211,7 +211,7 @@ public:
};
enum class NV2A_VERTEX_ATTR {
POS = 0, // position
- WEIGHT = 1, // blend weigth
+ WEIGHT = 1, // blend weight
NORMAL = 2,
COLOR0 = 3, // diffuse
COLOR1 = 4, // specular
diff --git a/src/mame/includes/fmtowns.h b/src/mame/includes/fmtowns.h
index b973b9655e0..e761dc2c4ee 100644
--- a/src/mame/includes/fmtowns.h
+++ b/src/mame/includes/fmtowns.h
@@ -20,6 +20,9 @@
#include "machine/ram.h"
#include "machine/nvram.h"
#include "machine/fm_scsi.h"
+#include "bus/generic/slot.h"
+#include "bus/generic/carts.h"
+#include "machine/fmt_icmem.h"
#define IRQ_LOG 0 // set to 1 to log IRQ line activity
@@ -92,6 +95,7 @@ class towns_state : public driver_device
m_fdc(*this, "fdc"),
m_flop0(*this, "fdc:0"),
m_flop1(*this, "fdc:1"),
+ m_icmemcard(*this, "icmemcard"),
m_nvram(*this, "nvram"),
m_nvram16(*this, "nvram16"),
m_ctrltype(*this, "ctrltype"),
@@ -124,6 +128,7 @@ class towns_state : public driver_device
required_device<mb8877_t> m_fdc;
required_device<floppy_connector> m_flop0;
required_device<floppy_connector> m_flop1;
+ required_device<fmt_icmem_device> m_icmemcard;
ram_device* m_messram;
cdrom_image_device* m_cdrom;
cdda_device* m_cdda;
diff --git a/src/mame/includes/hec2hrp.h b/src/mame/includes/hec2hrp.h
index f4aae92e3ad..c2d81923fa4 100644
--- a/src/mame/includes/hec2hrp.h
+++ b/src/mame/includes/hec2hrp.h
@@ -29,7 +29,7 @@
=> add device MX80c and bank switching for the ROM
03/01/2010 Update and clean prog by yo_fr (jj.stac@aliceadsl.fr)
=> add the port mapping for keyboard
- 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M runnig! JJStacino
+ 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
11/11/2011 : add the minidisque support -3 pouces 1/2 driver- JJStacino (jj.stac @ aliceadsl.fr)
don't forget to keep some information about these machine see DChector project : http://dchector.free.fr/ made by DanielCoulom
diff --git a/src/mame/includes/hp48.h b/src/mame/includes/hp48.h
index bb680395f51..d2b128d606f 100644
--- a/src/mame/includes/hp48.h
+++ b/src/mame/includes/hp48.h
@@ -127,7 +127,7 @@ public:
DECLARE_READ32_MEMBER( hp48_reg_in );
DECLARE_WRITE32_MEMBER( hp48_reg_out );
- /* keybord interrupt system */
+ /* keyboard interrupt system */
DECLARE_WRITE_LINE_MEMBER( hp48_rsi );
};
diff --git a/src/mame/includes/iremipt.h b/src/mame/includes/iremipt.h
index 2442a37c02a..582c13cd039 100644
--- a/src/mame/includes/iremipt.h
+++ b/src/mame/includes/iremipt.h
@@ -2,7 +2,7 @@
// copyright-holders:Bryan McPhail, Nicola Salmoria
/*******************************************************************************
- Input port macros used by many games in mutiple IREM drivers
+ Input port macros used by many games in multiple IREM drivers
*******************************************************************************/
diff --git a/src/mame/includes/lisa.h b/src/mame/includes/lisa.h
index 1aee9e41553..ec6cea36036 100644
--- a/src/mame/includes/lisa.h
+++ b/src/mame/includes/lisa.h
@@ -86,7 +86,7 @@ struct lisa_features_t
I simply don't understand : in one case the VIA is
connected to the 68k E clock, which is CPUCK/10, and in
another case, to a generated PH2 clock which is CPUCK/4,
- with additionnal logic to keep it in phase with the 68k
+ with additional logic to keep it in phase with the 68k
memory cycle. After hearing the beep when MacWorks XL
boots, I bet the correct values are .625 MHz and .5 MHz.
Maybe the schematics are wrong, and PH2 is CPUCK/8.
diff --git a/src/mame/includes/midzeus2.h b/src/mame/includes/midzeus2.h
deleted file mode 100644
index 5d407a6689c..00000000000
--- a/src/mame/includes/midzeus2.h
+++ /dev/null
@@ -1,31 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/*************************************************************************
-
- Driver for Midway Zeus games
-
-**************************************************************************/
-#include "video/zeus2.h"
-
-class midzeus2_state : public midzeus_state
-{
-public:
- midzeus2_state(const machine_config &mconfig, device_type type, const char *tag)
- : midzeus_state(mconfig, type, tag), m_zeus(*this, "zeus2") { }
- required_device<zeus2_device> m_zeus;
-
- DECLARE_WRITE_LINE_MEMBER(zeus_irq);
- DECLARE_VIDEO_START(midzeus2);
- uint32_t screen_update_midzeus2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
- DECLARE_READ32_MEMBER( zeus2_r );
- DECLARE_WRITE32_MEMBER( zeus2_w );
-private:
- TIMER_CALLBACK_MEMBER(int_timer_callback);
- void exit_handler2();
- void zeus2_register32_w(offs_t offset, uint32_t data, bool logit);
- void zeus2_register_update(offs_t offset, uint32_t oldval, bool logit);
- bool zeus2_fifo_process(const uint32_t *data, int numwords);
- void zeus2_pointer_write(uint8_t which, uint32_t value);
- void zeus2_draw_model(uint32_t baseaddr, uint16_t count, bool logit);
- void log_fifo_command(const uint32_t *data, int numwords, const char *suffix);
-};
diff --git a/src/mame/includes/n64.h b/src/mame/includes/n64.h
index c06938ad3a7..6ad867b2c6f 100644
--- a/src/mame/includes/n64.h
+++ b/src/mame/includes/n64.h
@@ -189,6 +189,7 @@ private:
AUDIO_DMA *ai_fifo_get_top();
void ai_fifo_push(uint32_t address, uint32_t length);
void ai_fifo_pop();
+ bool ai_delayed_carry;
dmadac_sound_device *ai_dac[2];
uint32_t ai_dram_addr;
diff --git a/src/mame/includes/raiden2.h b/src/mame/includes/raiden2.h
index 52adc726ed8..7a18699594a 100644
--- a/src/mame/includes/raiden2.h
+++ b/src/mame/includes/raiden2.h
@@ -4,6 +4,9 @@
#include "machine/seibucop/seibucop.h"
#include "video/seibu_crtc.h"
+ADDRESS_MAP_EXTERN(raiden2_sound_map, 8);
+ADDRESS_MAP_EXTERN(zeroteam_sound_map, 8);
+
class raiden2_state : public driver_device
{
public:
diff --git a/src/mame/includes/segahang.h b/src/mame/includes/segahang.h
index 81a1c0b8e4b..397a6ea635a 100644
--- a/src/mame/includes/segahang.h
+++ b/src/mame/includes/segahang.h
@@ -57,7 +57,7 @@ public:
// Z80 sound CPU read/write handlers
DECLARE_READ8_MEMBER( sound_data_r );
- // I8751-related VBLANK interrupt hanlders
+ // I8751-related VBLANK interrupt handlers
INTERRUPT_GEN_MEMBER( i8751_main_cpu_vblank );
// game-specific driver init
diff --git a/src/mame/includes/segaipt.h b/src/mame/includes/segaipt.h
index c2ed629f2de..029e417d0f1 100644
--- a/src/mame/includes/segaipt.h
+++ b/src/mame/includes/segaipt.h
@@ -49,10 +49,10 @@
// -----------------+-----------------+-----------------
// FREE PLAY | ON ON ON ON & ON ON ON ON
// -----------------+-----------------+-----------------
-// COIN SWITCH 1 | ON ON ON ON | (anywhare OFF)
+// COIN SWITCH 1 | ON ON ON ON | (anywhere OFF)
// 1COIN 1CREDIT | |
// -----------------+-----------------+-----------------
-// COIN SWITCH 2 | (anywhare OFF) | ON ON ON ON
+// COIN SWITCH 2 | (anywhere OFF) | ON ON ON ON
// 1COIN 1CREDIT | |
// [exception 1] not have free play
@@ -66,8 +66,8 @@
// example "Riddle of Pythagoras"
// -----------------+-----------------+-----------------
// FREE PLAY | ON ON ON ON | ON ON ON ON
-// | ON ON ON ON | (anywhare OFF)
-// | (anywhare OFF) | ON ON ON ON
+// | ON ON ON ON | (anywhere OFF)
+// | (anywhere OFF) | ON ON ON ON
#define SEGA_COINAGE_A_PART_H \
PORT_DIPSETTING( 0x07, DEF_STR( 4C_1C ) ) \
@@ -117,7 +117,7 @@
SEGA_COINAGE_B_PART_L \
PORT_DIPSETTING( 0x00, "Free Play (if Coin A too) or 1/1" )
-// [exception 1] not have free play (allow duplicated settins, show 0x00)
+// [exception 1] not have free play (allow duplicated settings, show 0x00)
#define SEGA_COINAGE_NO_FREE_LOC(DIPBANK) \
PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION(#DIPBANK":1,2,3,4") \
SEGA_COINAGE_A_PART_H \
@@ -128,7 +128,7 @@
PORT_DIPSETTING( 0x00, " 1 Coin/1 Credit" ) \
SEGA_COINAGE_B_PART_L
-// [exception 1.1] not have free play (forbid duplicated settins, hide 0x00)
+// [exception 1.1] not have free play (forbid duplicated settings, hide 0x00)
#define SEGA_COINAGE_NO_FREE_NO_DUP_LOC(DIPBANK) \
PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION(#DIPBANK":1,2,3,4") \
SEGA_COINAGE_A_PART_H \
diff --git a/src/mame/includes/starshp1.h b/src/mame/includes/starshp1.h
index 35687540f87..812f86ba242 100644
--- a/src/mame/includes/starshp1.h
+++ b/src/mame/includes/starshp1.h
@@ -8,14 +8,14 @@
* * there are two HBLANK/HSYNC periods as the horizontal
* chain is drawn, which would give an alternating long
* line followed by a much shorter one. This cannot be right
- * * the carry-out/load circuit on LS161@J8 is superflous
+ * * the carry-out/load circuit on LS161@J8 is superfluous
*
* These values also give a frame rate of about 45Hz, which is
* probably too low. I suspect that screen is not really
* 512 pixels wide -- most likely 384, which would give 60Hz
*
* Some of the graphics, like the starfield, is clocked with the
- * 12MHz signal, effecitvely doubling the horizontal resolution
+ * 12MHz signal, effectively doubling the horizontal resolution
*/
#include "sound/discrete.h"
diff --git a/src/mame/includes/swtpc09.h b/src/mame/includes/swtpc09.h
index 23f0906d4fc..f648223c73c 100644
--- a/src/mame/includes/swtpc09.h
+++ b/src/mame/includes/swtpc09.h
@@ -113,7 +113,7 @@ public:
uint8_t m_fdc_dma_address_reg; // dmf2 or dmf3 dma extended address reg
uint8_t m_system_type; // flag to indicate hw and rom combination
uint8_t m_fdc_status; // for floppy controller
- uint8_t m_via_ca1_input; // dmf3 fdc interupt is connected here
+ uint8_t m_via_ca1_input; // dmf3 fdc interrupt is connected here
uint8_t m_dmf3_via_porta;
uint8_t m_piaide_porta;
uint8_t m_piaide_portb;
diff --git a/src/mame/includes/thomson.h b/src/mame/includes/thomson.h
index 0ac25c6a9d3..a0c0745b7f9 100644
--- a/src/mame/includes/thomson.h
+++ b/src/mame/includes/thomson.h
@@ -423,8 +423,8 @@ protected:
uint8_t m_to9_kbd_in; /* data from keyboard */
uint8_t m_to9_kbd_status; /* status */
uint8_t m_to9_kbd_overrun; /* character lost */
- uint8_t m_to9_kbd_periph; /* peripherial mode */
- uint8_t m_to9_kbd_byte_count; /* byte-count in peripherial mode */
+ uint8_t m_to9_kbd_periph; /* peripheral mode */
+ uint8_t m_to9_kbd_byte_count; /* byte-count in peripheral mode */
uint16_t m_to9_mouse_x;
uint16_t m_to9_mouse_y;
uint8_t m_to9_kbd_last_key; /* for key repetition */
@@ -454,7 +454,7 @@ protected:
/* We allow choosing dynamically:
- the border size
- whether we use 640 pixels or 320 pixels in an active row
- (now this is automatically choosen by default for each frame)
+ (now this is automatically chosen by default for each frame)
*/
uint16_t m_thom_bwidth;
uint16_t m_thom_bheight;
@@ -474,7 +474,7 @@ protected:
/* lightpen callback function to call from timer */
void (thomson_state::*m_thom_lightpen_cb)(int step);
uint8_t* m_thom_vram; /* pointer to video memory */
- emu_timer* m_thom_scanline_timer; /* scan-line udpate */
+ emu_timer* m_thom_scanline_timer; /* scan-line update */
uint16_t m_thom_last_pal[16]; /* palette at last scanline start */
uint16_t m_thom_pal[16]; /* current palette */
uint8_t m_thom_pal_changed; /* whether pal != old_pal */
diff --git a/src/ldplayer/layout/pr8210.lay b/src/mame/layout/pr8210.lay
index 709d1346039..709d1346039 100644
--- a/src/ldplayer/layout/pr8210.lay
+++ b/src/mame/layout/pr8210.lay
diff --git a/src/mame/machine/alpha8201.cpp b/src/mame/machine/alpha8201.cpp
index 87c06da6370..852d4eaadd0 100644
--- a/src/mame/machine/alpha8201.cpp
+++ b/src/mame/machine/alpha8201.cpp
@@ -404,7 +404,7 @@ WRITE16_MEMBER(alpha_8201_device::mcu_d_w)
WRITE_LINE_MEMBER(alpha_8201_device::bus_dir_w)
{
// set RAM bus direction to 0: external, 1: MCU side
- // selects one of two 74LS245 (octal bus transceiver) for databus, addressbus via
+ // selects one of two 74LS245 (octal bus transceiver) for databus, address bus via
// a couple of 74LS157 (2-input multiplexer)
m_bus = (state) ? 1 : 0;
mcu_writeram();
diff --git a/src/mame/machine/amstrad.cpp b/src/mame/machine/amstrad.cpp
index 8e4f44da91f..b88e81e6f70 100644
--- a/src/mame/machine/amstrad.cpp
+++ b/src/mame/machine/amstrad.cpp
@@ -113,7 +113,7 @@ static const int RamConfigurations[8 * 4] =
/* this contains the colours in machine.pens form.*/
/* this is updated from the eventlist and reflects the current state
of the render colours - these may be different to the current colour palette values */
-/* colours can be changed at any time and will take effect immediatly */
+/* colours can be changed at any time and will take effect immediately */
@@ -3237,7 +3237,7 @@ MACHINE_RESET_MEMBER(amstrad_state,kccomp)
/* bit 1 = /TEST. When 0, KC compact will enter data transfer
sequence, where another system using the expansion port signals
DATA2,DATA1, /STROBE and DATA7 can transfer 256 bytes of program.
- When the program has been transfered, it will be executed. This
+ When the program has been transferred, it will be executed. This
is not supported in the driver */
/* bit 3,4 are tied to +5V, bit 2 is tied to 0V */
m_ppi_port_inputs[amstrad_ppi_PortB] = (1<<4) | (1<<3) | 2;
diff --git a/src/mame/machine/apple2gs.cpp b/src/mame/machine/apple2gs.cpp
index 3e20664986f..0b76ef83802 100644
--- a/src/mame/machine/apple2gs.cpp
+++ b/src/mame/machine/apple2gs.cpp
@@ -41,7 +41,7 @@
C027 - KMSTATUS (GLU system status)
bit 7 - set if mouse register full
- bit 6 - mouse interupt enable flag
+ bit 6 - mouse interrupt enable flag
bit 5 - set if data register full
bit 4 - data interrupt enabled
bit 3 - set if key data full
diff --git a/src/mame/machine/coco.cpp b/src/mame/machine/coco.cpp
index 4c89a8a8594..c154bbdaa3f 100644
--- a/src/mame/machine/coco.cpp
+++ b/src/mame/machine/coco.cpp
@@ -936,7 +936,7 @@ void coco_state::diecom_lightgun_clock(void)
else
m_dclg_output_v &= ~0x01;
- /* Bit 9 of timer is only avaiable if state == 8*/
+ /* Bit 9 of timer is only available if state == 8*/
if (m_dclg_state == 8 && (((m_dclg_timer >> 9) & 0x01) == 1))
m_dclg_output_v |= 0x02;
else
diff --git a/src/mame/machine/fd1094.cpp b/src/mame/machine/fd1094.cpp
index bdf0a430e5b..8452bf20e77 100644
--- a/src/mame/machine/fd1094.cpp
+++ b/src/mame/machine/fd1094.cpp
@@ -771,7 +771,7 @@ uint16_t fd1094_device::decrypt_one(offs_t address, uint16_t val, const uint8_t
else key_F = BIT(mainkey,6);
// the CPU has been verified to produce different results when fetching opcodes
- // from 0000-0006 than when fetching the inital SP and PC on reset.
+ // from 0000-0006 than when fetching the initial SP and PC on reset.
if (vector_fetch)
{
if (address <= 3) gkey3 = 0x00; // supposed to always be the case
diff --git a/src/mame/machine/fmt_icmem.cpp b/src/mame/machine/fmt_icmem.cpp
new file mode 100644
index 00000000000..da2679a211e
--- /dev/null
+++ b/src/mame/machine/fmt_icmem.cpp
@@ -0,0 +1,184 @@
+// license:BSD-3-Clause
+// copyright-holders:Barry Rodewald
+/*********************************************************************
+
+ fmt_icmem.cpp
+
+ FM Towns IC Memory Card
+ PCMCIA SRAM Memory Cards, up to 64MB supported
+
+*********************************************************************/
+
+#include "emu.h"
+#include "emuopts.h"
+#include "fmt_icmem.h"
+
+// device type definition
+const device_type FMT_ICMEM = &device_creator<fmt_icmem_device>;
+
+//-------------------------------------------------
+// fmt_icmem_device - constructor
+//-------------------------------------------------
+
+fmt_icmem_device::fmt_icmem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, FMT_ICMEM, "FM Towns IC Memory Card", tag, owner, clock, "fmt_icmem", __FILE__),
+ device_image_interface(mconfig, *this),
+ m_writeprotect(*this,"icmem"),
+ m_change(false),
+ m_attr_select(false),
+ m_detect(false),
+ m_bank(0)
+{
+}
+
+
+static INPUT_PORTS_START( fmt_icmem )
+ PORT_START("icmem")
+ PORT_CONFNAME(0x01, 0x00, "IC Memory Card Write Protect")
+ PORT_CONFSETTING(0x00, DEF_STR( Off ))
+ PORT_CONFSETTING(0x01, DEF_STR( On ))
+INPUT_PORTS_END
+
+
+//-------------------------------------------------
+// device_config_complete - perform any
+// operations now that the configuration is
+// complete
+//-------------------------------------------------
+
+void fmt_icmem_device::device_config_complete()
+{
+ // set brief and instance name
+ update_names();
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void fmt_icmem_device::device_start()
+{
+ m_memcard_ram = std::make_unique<uint8_t[]>(0x1000000);
+ m_bank = 0;
+ m_detect = false;
+ m_change = false;
+ save_item(NAME(m_change));
+ save_item(NAME(m_detect));
+ save_item(NAME(m_bank));
+}
+
+ioport_constructor fmt_icmem_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(fmt_icmem);
+}
+
+image_init_result fmt_icmem_device::call_load()
+{
+ memset(m_memcard_ram.get(), 0xff, 0x1000000);
+ fseek(0, SEEK_SET);
+ size_t ret = fread(m_memcard_ram.get(), 0x1000000);
+
+ if(ret != length())
+ return image_init_result::FAIL;
+
+ m_change = true;
+ m_detect = true;
+ return image_init_result::PASS;
+}
+
+void fmt_icmem_device::call_unload()
+{
+ fseek(0, SEEK_SET);
+ if(!m_writeprotect->read())
+ fwrite(m_memcard_ram.get(), 0x1000000);
+ m_change = true;
+ m_detect = false;
+}
+
+image_init_result fmt_icmem_device::call_create(int format_type, util::option_resolution *format_options)
+{
+ memset(m_memcard_ram.get(), 0xff, 0x1000000);
+
+ size_t ret = fwrite(m_memcard_ram.get(), 0x1000000);
+ if(ret != 0x1000000)
+ return image_init_result::FAIL;
+
+ m_change = true;
+ m_detect = true;
+ return image_init_result::PASS;
+}
+
+
+READ8_MEMBER(fmt_icmem_device::static_mem_read)
+{
+ return m_memcard_ram[offset];
+}
+
+WRITE8_MEMBER(fmt_icmem_device::static_mem_write)
+{
+ m_memcard_ram[offset] = data;
+}
+
+READ8_MEMBER(fmt_icmem_device::mem_read)
+{
+ return m_memcard_ram[(m_bank*0x100000) + offset];
+}
+
+WRITE8_MEMBER(fmt_icmem_device::mem_write)
+{
+ m_memcard_ram[(m_bank*0x100000) + offset] = data;
+}
+
+// Memory Card status:
+// bit 0 - 0 = Write Enable, 1 = Write Protect
+// bit 1,2 - Card Detect - 00 = Card Inserted, 11 = No card inserted, 10 or 01 = Card error?
+// bit 3,4,5 - not memory card related (EEPROM and backup battery level)
+// bit 6 - unknown
+// bit 7 - 1 = card changed, flips back to 0 when read
+READ8_MEMBER(fmt_icmem_device::status_r)
+{
+ uint8_t ret = 0x00;
+
+ ret |= (m_writeprotect->read() & 0x01);
+ if(is_readonly()) // if image is read-only, then set write protect.
+ ret |= 0x01;
+ if(!m_detect)
+ ret |= 0x06;
+ if(m_change)
+ ret |= 0x80;
+ m_change = false;
+
+ return ret;
+}
+
+// Memory Card bank select (0x490)
+// bit 0-5: bank select (bits 0-3 not used in non-386SX systems?)
+// Attribute/Common memory select (0x491)
+// bit 0: 0 = common memory, 1 = attribute memory (TODO)
+// bit 7: 0 indicates that card is JEIDA v4 compliant
+READ8_MEMBER(fmt_icmem_device::bank_r)
+{
+ switch(offset)
+ {
+ case 0:
+ return m_bank & 0x0f;
+ case 1:
+ return m_attr_select ? 1 : 0;
+ }
+ return 0xff;
+}
+
+WRITE8_MEMBER(fmt_icmem_device::bank_w)
+{
+ switch(offset)
+ {
+ case 0:
+ m_bank = data & 0x0f;
+ break;
+ case 1:
+ m_attr_select = data & 0x01;
+ break;
+ }
+}
+
diff --git a/src/mame/machine/fmt_icmem.h b/src/mame/machine/fmt_icmem.h
new file mode 100644
index 00000000000..d9eb85cbd30
--- /dev/null
+++ b/src/mame/machine/fmt_icmem.h
@@ -0,0 +1,77 @@
+// license:BSD-3-Clause
+// copyright-holders:Barry Rodewald
+/*********************************************************************
+
+ fmt_icmem.h
+
+ FM Towns IC Memory Card
+
+*********************************************************************/
+
+#pragma once
+
+#ifndef __FMT_ICMEM_H__
+#define __FMT_ICMEM_H__
+
+//**************************************************************************
+// INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+
+#define MCFG_FMT_ICMEMCARD_ADD(_tag) \
+ MCFG_DEVICE_ADD(_tag, FMT_ICMEM, 0)
+
+/***************************************************************************
+ FUNCTION PROTOTYPES
+***************************************************************************/
+
+class fmt_icmem_device : public device_t,
+ public device_image_interface
+{
+public:
+ // construction/destruction
+ fmt_icmem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual iodevice_t image_type() const override { return IO_MEMCARD; }
+
+ virtual bool is_readable() const override { return true; }
+ virtual bool is_writeable() const override { return true; }
+ virtual bool is_creatable() const override { return true; }
+ virtual bool must_be_loaded() const override { return false; }
+ virtual bool is_reset_on_load() const override { return false; }
+ virtual const char *file_extensions() const override { return "icm"; }
+
+ virtual image_init_result call_load() override;
+ virtual void call_unload() override;
+ virtual image_init_result call_create(int format_type, util::option_resolution *format_options) override;
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_config_complete() override;
+
+ DECLARE_READ8_MEMBER(static_mem_read);
+ DECLARE_WRITE8_MEMBER(static_mem_write);
+ DECLARE_READ8_MEMBER(mem_read);
+ DECLARE_WRITE8_MEMBER(mem_write);
+ DECLARE_READ8_MEMBER(status_r);
+ DECLARE_READ8_MEMBER(bank_r);
+ DECLARE_WRITE8_MEMBER(bank_w);
+
+
+protected:
+ virtual ioport_constructor device_input_ports() const override;
+
+private:
+ required_ioport m_writeprotect;
+ std::unique_ptr<uint8_t[]> m_memcard_ram;
+ bool m_change;
+ bool m_attr_select;
+ uint8_t m_detect;
+ uint8_t m_bank;
+};
+
+
+// device type definition
+extern const device_type FMT_ICMEM;
+
+
+#endif /* __FMT_ICMEM_H__ */
diff --git a/src/mame/machine/gaelco3d.cpp b/src/mame/machine/gaelco3d.cpp
index a3b881fb89f..567b0e5a5f6 100644
--- a/src/mame/machine/gaelco3d.cpp
+++ b/src/mame/machine/gaelco3d.cpp
@@ -68,7 +68,7 @@
#define LINK_FREQ (LINK_BAUD / LINK_BITS)
-/* Sync up the instances 8 times for each byte transfered */
+/* Sync up the instances 8 times for each byte transferred */
#define SYNC_MULT (4)
#define SYNC_FREQ (15000000 / 20) //(LINK_FREQ * SYNC_MULT)
diff --git a/src/mame/machine/galaxold.cpp b/src/mame/machine/galaxold.cpp
index 93ce35ba9f9..801eb956e6b 100644
--- a/src/mame/machine/galaxold.cpp
+++ b/src/mame/machine/galaxold.cpp
@@ -57,7 +57,7 @@ void galaxold_state::machine_reset_common(int line)
{
m_irq_line = line;
- /* initalize main CPU interrupt generator flip-flops */
+ /* initialize main CPU interrupt generator flip-flops */
m_7474_9m_2->preset_w(1);
m_7474_9m_2->clear_w (1);
diff --git a/src/mame/machine/hec2hrp.cpp b/src/mame/machine/hec2hrp.cpp
index 950a0a05ae6..affbcd2fd07 100644
--- a/src/mame/machine/hec2hrp.cpp
+++ b/src/mame/machine/hec2hrp.cpp
@@ -28,7 +28,7 @@
=> add the port mapping for keyboard
28/09/2010 add the DISK II support by yo_fr (jj.stac @ aliceadsl.fr)
=> Note that actually the DISK II boot (loading CPM : OK) but do not run (don't run the CPM...).
- 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M runnig! JJStacino
+ 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
11/11/2011 : add the minidisque support -3 pouces 1/2 driver- JJStacino (jj.stac @ aliceadsl.fr)
19/02/2012 : few adjustment for the hrp and hr machine - JJStacino
@@ -832,7 +832,7 @@ MACHINE_CONFIG_END
15/02/2010 : Start of the disc2 project! JJStacino
26/09/2010 : first sending with bug2 (the first "dir" command finih with a crash of the Z80 disc II proc) JJStacino
01/11/2010 : first time ending boot sequence, probleme on the CP/M lauch JJStacino
- 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M runnig! JJStacino
+ 20/11/2010 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
28/11/2010 : Found at Bratislava that the disk writing with TRANS X: is NOT WORKING (the exchange Hector=>Disc2 ok)
*/
diff --git a/src/mame/machine/iteagle_fpga.cpp b/src/mame/machine/iteagle_fpga.cpp
index 7e5f8c133f1..972b2430dff 100644
--- a/src/mame/machine/iteagle_fpga.cpp
+++ b/src/mame/machine/iteagle_fpga.cpp
@@ -656,7 +656,7 @@ READ32_MEMBER( iteagle_periph_device::ctrl_r )
//m_rtc_regs[9] = 0x99; // Use 1998
//m_rtc_regs[0xa] &= ~0x10; // Reg A Status
//m_ctrl_regs[0xb] &= 0x10; // Reg B Status
- //m_ctrl_regs[0xc] &= 0x10; // Reg C Interupt Status
+ //m_ctrl_regs[0xc] &= 0x10; // Reg C Interrupt Status
m_rtc_regs[0xd] = 0x80; // Reg D Valid time/ram Status
result = (result & 0xffff00ff) | (m_rtc_regs[m_ctrl_regs[0x70/4]&0xff]<<8);
}
diff --git a/src/mame/machine/kaneko_toybox.h b/src/mame/machine/kaneko_toybox.h
index 1a01e5c9306..acabe623d6d 100644
--- a/src/mame/machine/kaneko_toybox.h
+++ b/src/mame/machine/kaneko_toybox.h
@@ -18,7 +18,7 @@
***************************************************************************/
// notes based on test programs results, verified on PCB:
-// - bonkadv_mcu_4_30 is the only cmd that ouputs an odd (655) number of bytes
+// - bonkadv_mcu_4_30 is the only cmd that outputs an odd (655) number of bytes
// - bonkadv_mcu_4_33: the 32 'zeroed' bytes every 64 bytes are effectively written by the MCU
// MCU executed command: 4300 0100 - factory settings
diff --git a/src/mame/machine/kc_keyb.cpp b/src/mame/machine/kc_keyb.cpp
index 55236d507ac..984bfa940cf 100644
--- a/src/mame/machine/kc_keyb.cpp
+++ b/src/mame/machine/kc_keyb.cpp
@@ -45,7 +45,7 @@ available but I never found the specs on the web. The SAB 3021 was
produced by Valvo which doesn't exist anymore (bought by Phillips
if I remember correctly). If you have more luck finding the specs
I'm still interested.
-There also was a complementary chip for the recieving side but that
+There also was a complementary chip for the receiving side but that
was not used in the KC unfortunately. They choosed to measure the
pulses sent by the U807 via PIO and CTC.
diff --git a/src/mame/machine/lisa.cpp b/src/mame/machine/lisa.cpp
index 7d2ef1c92c8..e3ab084b671 100644
--- a/src/mame/machine/lisa.cpp
+++ b/src/mame/machine/lisa.cpp
@@ -19,7 +19,7 @@
* finalize sound support (involves adding new features to the 6522 VIA core)
* fix warm-reset (I think I need to use a callback when 68k RESET
instruction is called)
- * write support for additionnal hardware (hard disk, etc...)
+ * write support for additional hardware (hard disk, etc...)
* emulate LISA1 (?)
* optimize MMU emulation !
@@ -1352,7 +1352,7 @@ READ16_MEMBER(lisa_state::lisa_r)
/* Something appears to be wrong with the timings, since we expect to read the
2nd half when v-syncing, i.e. for lines beyond the 431th or 364th one (provided
- there are no additionnal margins).
+ there are no additional margins).
This is caused by the fact that 68k timings are wrong (memory accesses are
interlaced with the video hardware, which is not emulated). */
if (m_features.has_mac_xl_video)
diff --git a/src/mame/machine/lynx.cpp b/src/mame/machine/lynx.cpp
index 21713ad0f77..f80704ce6d8 100644
--- a/src/mame/machine/lynx.cpp
+++ b/src/mame/machine/lynx.cpp
@@ -1394,7 +1394,7 @@ void lynx_state::lynx_timer_signal_irq(int which)
{
if ((m_timer[which].cntrl1 & 0x80) && (which != 4)) // if interrupts are enabled and timer != 4
{
- m_mikey.data[0x81] |= (1 << which); // set interupt poll register
+ m_mikey.data[0x81] |= (1 << which); // set interrupt poll register
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_maincpu->set_input_line(M65SC02_IRQ_LINE, ASSERT_LINE);
}
@@ -1718,7 +1718,7 @@ READ8_MEMBER(lynx_state::mikey_read)
case 0x80:
case 0x81:
- value = m_mikey.data[0x81]; // both registers access the same interupt status byte
+ value = m_mikey.data[0x81]; // both registers access the same interrupt status byte
// logerror( "mikey read %.2x %.2x\n", offset, value );
break;
@@ -1790,14 +1790,14 @@ WRITE8_MEMBER(lynx_state::mikey_write)
m_maincpu->set_input_line(M65SC02_IRQ_LINE, CLEAR_LINE);
break;
- /* Is this correct? */ // Notes say writing to register will result in interupt being triggered.
+ /* Is this correct? */ // Notes say writing to register will result in interrupt being triggered.
case 0x81:
m_mikey.data[0x81] |= data;
if (data)
{
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_maincpu->set_input_line(M65SC02_IRQ_LINE, ASSERT_LINE);
- logerror("direct write to interupt register\n");
+ logerror("direct write to interrupt register\n");
}
break;
diff --git a/src/mame/machine/mega32x.cpp b/src/mame/machine/mega32x.cpp
index 9f60b344e00..f3938f6c534 100644
--- a/src/mame/machine/mega32x.cpp
+++ b/src/mame/machine/mega32x.cpp
@@ -1856,7 +1856,7 @@ void sega_32x_device::device_reset()
// start in a reset state
m_sh2_are_running = 0;
- m_32x_a1518a_reg = 0x00; // inital value
+ m_32x_a1518a_reg = 0x00; // initial value
m_32x_68k_a15104_reg = 0x00;
m_32x_autofill_length = 0;
diff --git a/src/mame/machine/micropolis.cpp b/src/mame/machine/micropolis.cpp
index 06f82ac9e02..f9d4220a83f 100644
--- a/src/mame/machine/micropolis.cpp
+++ b/src/mame/machine/micropolis.cpp
@@ -163,7 +163,7 @@ void micropolis_device::write_sector()
{
#if 0
/* at this point, the disc is write enabled, and data
- * has been transfered into our buffer - now write it to
+ * has been transferred into our buffer - now write it to
* the disc image or to the real disc
*/
diff --git a/src/mame/machine/mie.h b/src/mame/machine/mie.h
index 348cc2a329d..4d3e5213354 100644
--- a/src/mame/machine/mie.h
+++ b/src/mame/machine/mie.h
@@ -93,7 +93,7 @@ private:
CTRL_EMP = 0x000100, // Empty flag
CTRL_PERR = 0x000200, // Parity error
CTRL_BFOV = 0x000800, // Set when overflow, cleared to 0 when starting send/receive
- CTRL_RXB = 0x001000, // Recieving
+ CTRL_RXB = 0x001000, // Receiving
CTRL_RFB = 0x002000, // Receive done
CTRL_TFB = 0x004000, // Transmit done
CTRL_HRES = 0x008000 // Reset pattern received
diff --git a/src/mame/machine/n64.cpp b/src/mame/machine/n64.cpp
index 2e38a7e2815..1b94269b7b4 100644
--- a/src/mame/machine/n64.cpp
+++ b/src/mame/machine/n64.cpp
@@ -170,6 +170,7 @@ void n64_periphs::device_reset()
ai_dacrate = 0;
ai_bitrate = 0;
ai_status = 0;
+ ai_delayed_carry = false;
pi_dma_timer->adjust(attotime::never);
pi_rd_len = 0;
@@ -1255,6 +1256,9 @@ void n64_periphs::ai_dma()
//
//fwrite(&ram[current->address/2],current->length,1,audio_dump);
+ if (ai_delayed_carry)
+ current->address += 0x2000;
+
ram = &ram[current->address/2];
//osd_printf_debug("DACDMA: %x for %x bytes\n", current->address, current->length);
@@ -1266,6 +1270,11 @@ void n64_periphs::ai_dma()
// adjust the timer
period = attotime::from_hz(DACRATE_NTSC) * (ai_dacrate + 1) * (current->length / 4);
ai_timer->adjust(period);
+
+ if (((current->address + current->length) & 0x1FFF) == 0)
+ ai_delayed_carry = true;
+ else
+ ai_delayed_carry = false;
}
TIMER_CALLBACK_MEMBER(n64_periphs::ai_timer_callback)
@@ -1286,6 +1295,7 @@ void n64_periphs::ai_timer_tick()
else
{
ai_status &= ~0x40000000;
+ ai_delayed_carry = false;
}
}
diff --git a/src/mame/machine/tecmosys.cpp b/src/mame/machine/tecmosys.cpp
index e119070d7d6..d0f5f312fca 100644
--- a/src/mame/machine/tecmosys.cpp
+++ b/src/mame/machine/tecmosys.cpp
@@ -8,7 +8,7 @@
After that, it uploads 4 ranges of code to checksum, followed by the 4 checksums.
The 68K does the checksumming, and returns the results to the protection device.
- Apart from inital protection calls and code upload, the vblank in both games writes
+ Apart from initial protection calls and code upload, the vblank in both games writes
info to the protection but they seem to ignore the returned data.
Maybe the protection is tied to something else, or maybe it was preliminary work on
further security.
diff --git a/src/mame/machine/thomson.cpp b/src/mame/machine/thomson.cpp
index 95387a7668a..a6b6e7848dd 100644
--- a/src/mame/machine/thomson.cpp
+++ b/src/mame/machine/thomson.cpp
@@ -2114,7 +2114,7 @@ void thomson_state::to9_update_ram_bank_postload()
/* normal mode: polling interval */
#define TO9_KBD_POLL_PERIOD attotime::from_msec( 10 )
-/* peripherial mode: time between two bytes, and after last byte */
+/* peripheral mode: time between two bytes, and after last byte */
#define TO9_KBD_BYTE_SPACE attotime::from_usec( 300 )
#define TO9_KBD_END_SPACE attotime::from_usec( 9100 )
@@ -2446,7 +2446,7 @@ TIMER_CALLBACK_MEMBER(thomson_state::to9_kbd_timer_cb)
{
if ( m_to9_kbd_periph )
{
- /* peripherial mode: every 10 ms we send 4 bytes */
+ /* peripheral mode: every 10 ms we send 4 bytes */
switch ( m_to9_kbd_byte_count )
{
diff --git a/src/mame/machine/vector06.cpp b/src/mame/machine/vector06.cpp
index 7f6165d7cf6..259dfed9127 100644
--- a/src/mame/machine/vector06.cpp
+++ b/src/mame/machine/vector06.cpp
@@ -119,7 +119,7 @@ INTERRUPT_GEN_MEMBER(vector06_state::vector06_interrupt)
IRQ_CALLBACK_MEMBER(vector06_state::vector06_irq_callback)
{
- // Interupt is RST 7
+ // Interrupt is RST 7
return 0xff;
}
diff --git a/src/mame/machine/wpc.h b/src/mame/machine/wpc.h
index 3ed3151659e..f35aa1bf593 100644
--- a/src/mame/machine/wpc.h
+++ b/src/mame/machine/wpc.h
@@ -38,9 +38,9 @@
#define WPC_FLIPPERS (0x24) /* xxx R: switches W: Solenoids */
/* Sound board */
-#define WPC_SOUNDS11 (0x21) /* xxx RW: R: Sound data availble, W: Reset soundboard ? */
+#define WPC_SOUNDS11 (0x21) /* xxx RW: R: Sound data available, W: Reset soundboard ? */
#define WPC_SOUNDIF (0x2c) /* xxx RW: Sound board interface */
-#define WPC_SOUNDBACK (0x2d) /* xxx RW: R: Sound data availble, W: Reset soundboard ? */
+#define WPC_SOUNDBACK (0x2d) /* xxx RW: R: Sound data available, W: Reset soundboard ? */
#define WPC_SOLENOID1 (0x30) /* xxxxxx W: Solenoid 25-28 */
#define WPC_SOLENOID2 (0x31) /* xxxxxx W: Solenoid 1- 8 */
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index c1f737fb4e5..5533873ef9e 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -14787,6 +14787,8 @@ isbc286 //
isbc2861 //
isbc86 //
rpc86 //
+isbc8605 //
+isbc8630 //
@source:isbc8010.cpp
isbc8010 //
@@ -29825,6 +29827,7 @@ pepk0856a // (c) 1987 IGT - International Game Technology
pepk0858 // (c) 1987 IGT - International Game Technology
pepk0873 // (c) 1987 IGT - International Game Technology
pepk0873a // (c) 1987 IGT - International Game Technology
+pepk0885 // (c) 1987 IGT - International Game Technology
pepk0930 // (c) 1987 IGT - International Game Technology
pepk0930a // (c) 1987 IGT - International Game Technology
pepk1004 // (c) 1987 IGT - International Game Technology
@@ -29833,9 +29836,12 @@ pepk1020 // (c) 1987 IGT - International Game Technology
pepk1024 // (c) 1987 IGT - International Game Technology
pepk1030 // (c) 1987 IGT - International Game Technology
pepk1069 // (c) 1987 IGT - International Game Technology
+pepp0001 // (c) 1987 IGT - International Game Technology
pepp0002 // (c) 1987 IGT - International Game Technology
pepp0002a // (c) 1987 IGT - International Game Technology
pepp0008 // (c) 1987 IGT - International Game Technology
+pepp0008a // (c) 1987 IGT - International Game Technology
+pepp0008b // (c) 1987 IGT - International Game Technology
pepp0009 // (c) 1987 IGT - International Game Technology
pepp0010 // (c) 1987 IGT - International Game Technology
pepp0014 // (c) 1987 IGT - International Game Technology
@@ -29861,14 +29867,25 @@ pepp0046 // (c) 1987 IGT - International Game Technology
pepp0046a // (c) 1987 IGT - International Game Technology
pepp0046b // (c) 1987 IGT - International Game Technology
pepp0048 // (c) 1987 IGT - International Game Technology
+pepp0048a // (c) 1987 IGT - International Game Technology
+pepp0048b // (c) 1987 IGT - International Game Technology
+pepp0048c // (c) 1987 IGT - International Game Technology
+pepp0050 // (c) 1987 IGT - International Game Technology
+pepp0050a // (c) 1987 IGT - International Game Technology
+pepp0050b // (c) 1987 IGT - International Game Technology
+pepp0050c // (c) 1987 IGT - International Game Technology
pepp0051 // (c) 1987 IGT - International Game Technology
pepp0053 // (c) 1987 IGT - International Game Technology
+pepp0054 // (c) 1987 IGT - International Game Technology
pepp0055 // (c) 1987 IGT - International Game Technology
pepp0055a // (c) 1987 IGT - International Game Technology
pepp0055b // (c) 1987 IGT - International Game Technology
pepp0055c // (c) 1987 IGT - International Game Technology
pepp0057 // (c) 1987 IGT - International Game Technology
pepp0057a // (c) 1987 IGT - International Game Technology
+pepp0057b // (c) 1987 IGT - International Game Technology
+pepp0057c // (c) 1987 IGT - International Game Technology
+pepp0057d // (c) 1987 IGT - International Game Technology
pepp0059 // (c) 1987 IGT - International Game Technology
pepp0059a // (c) 1987 IGT - International Game Technology
pepp0060 // (c) 1987 IGT - International Game Technology
@@ -29883,6 +29900,9 @@ pepp0085 // (c) 1987 IGT - International Game Technology
pepp0089 // (c) 1987 IGT - International Game Technology
pepp0094 // (c) 1987 IGT - International Game Technology
pepp0103 // (c) 1987 IGT - International Game Technology
+pepp0103a // (c) 1987 IGT - International Game Technology
+pepp0103b // (c) 1987 IGT - International Game Technology
+pepp0103c // (c) 1987 IGT - International Game Technology
pepp0104 // (c) 1987 IGT - International Game Technology
pepp0116 // (c) 1987 IGT - International Game Technology
pepp0116a // (c) 1987 IGT - International Game Technology
@@ -29890,8 +29910,11 @@ pepp0118 // (c) 1987 IGT - International Game Technology
pepp0120 // (c) 1987 IGT - International Game Technology
pepp0125 // (c) 1987 IGT - International Game Technology
pepp0126 // (c) 1987 IGT - International Game Technology
+pepp0126a // (c) 1987 IGT - International Game Technology
+pepp0126b // (c) 1987 IGT - International Game Technology
pepp0127 // (c) 1987 IGT - International Game Technology
pepp0127a // (c) 1987 IGT - International Game Technology
+pepp0127b // (c) 1987 IGT - International Game Technology
pepp0129 // (c) 1987 IGT - International Game Technology
pepp0130 // (c) 1987 IGT - International Game Technology
pepp0132 // (c) 1987 IGT - International Game Technology
@@ -29914,6 +29937,7 @@ pepp0190 // (c) 1987 IGT - International Game Technology
pepp0190a // (c) 1987 IGT - International Game Technology
pepp0190b // (c) 1987 IGT - International Game Technology
pepp0190c // (c) 1987 IGT - International Game Technology
+pepp0195 // (c) 1987 IGT - International Game Technology
pepp0197 // (c) 1987 IGT - International Game Technology
pepp0197a // (c) 1987 IGT - International Game Technology
pepp0197b // (c) 1987 IGT - International Game Technology
@@ -29926,6 +29950,7 @@ pepp0203b // (c) 1987 IGT - International Game Technology
pepp0203c // (c) 1987 IGT - International Game Technology
pepp0203d // (c) 1987 IGT - International Game Technology
pepp0203e // (c) 1987 IGT - International Game Technology
+pepp0218 // (c) 1987 IGT - International Game Technology
pepp0219 // (c) 1987 IGT - International Game Technology
pepp0221 // (c) 1987 IGT - International Game Technology
pepp0221a // (c) 1987 IGT - International Game Technology
@@ -29934,6 +29959,7 @@ pepp0223 // (c) 1987 IGT - International Game Technology
pepp0224 // (c) 1987 IGT - International Game Technology
pepp0224a // (c) 1987 IGT - International Game Technology
pepp0230 // (c) 1987 IGT - International Game Technology
+pepp0232 // (c) 1987 IGT - International Game Technology
pepp0242 // (c) 1987 IGT - International Game Technology
pepp0249 // (c) 1987 IGT - International Game Technology
pepp0250 // (c) 1987 IGT - International Game Technology
@@ -29948,6 +29974,8 @@ pepp0290 // (c) 1987 IGT - International Game Technology
pepp0290a // (c) 1987 IGT - International Game Technology
pepp0291 // (c) 1987 IGT - International Game Technology
pepp0291a // (c) 1987 IGT - International Game Technology
+pepp0294 // (c) 1987 IGT - International Game Technology
+pepp0295 // (c) 1987 IGT - International Game Technology
pepp0401 // (c) 1987 IGT - International Game Technology
pepp0409 // (c) 1987 IGT - International Game Technology
pepp0410 // (c) 1987 IGT - International Game Technology
@@ -29968,12 +29996,17 @@ pepp0429a // (c) 1987 IGT - International Game Technology
pepp0430 // (c) 1987 IGT - International Game Technology
pepp0431 // (c) 1987 IGT - International Game Technology
pepp0434 // (c) 1987 IGT - International Game Technology
+pepp0434a // (c) 1987 IGT - International Game Technology
+pepp0445 // (c) 1987 IGT - International Game Technology
pepp0447 // (c) 1987 IGT - International Game Technology
pepp0447a // (c) 1987 IGT - International Game Technology
pepp0447b // (c) 1987 IGT - International Game Technology
pepp0449 // (c) 1987 IGT - International Game Technology
pepp0449a // (c) 1987 IGT - International Game Technology
+pepp0450 // (c) 1995 IGT - International Game Technology
pepp0452 // (c) 1987 IGT - International Game Technology
+pepp0452a // (c) 1987 IGT - International Game Technology
+pepp0453 // (c) 1987 IGT - International Game Technology
pepp0454 // (c) 1987 IGT - International Game Technology
pepp0454a // (c) 1987 IGT - International Game Technology
pepp0455 // (c) 1987 IGT - International Game Technology
@@ -30001,6 +30034,7 @@ pepp0538 // (c) 1987 IGT - International Game Technology
pepp0540 // (c) 1987 IGT - International Game Technology
pepp0542 // (c) 1987 IGT - International Game Technology
pepp0542a // (c) 1987 IGT - International Game Technology
+pepp0542b // (c) 1987 IGT - International Game Technology
pepp0550 // (c) 1987 IGT - International Game Technology
pepp0550a // (c) 1987 IGT - International Game Technology
pepp0555 // (c) 1987 IGT - International Game Technology
@@ -30197,6 +30231,7 @@ pex2179p // (c) 1995 IGT - International Game Technology
pex2180p // (c) 1995 IGT - International Game Technology
pex2211p // (c) 1995 IGT - International Game Technology
pex2236p // (c) 1995 IGT - International Game Technology
+pex2240p // (c) 1995 IGT - International Game Technology
pex2241p // (c) 1995 IGT - International Game Technology
pex2244p // (c) 1995 IGT - International Game Technology
pex2245p // (c) 1995 IGT - International Game Technology
@@ -37913,3 +37948,6 @@ zx97 //
@source:vgmplay.cpp
vgmplay
+@source:ldplayer.cpp
+simldv1000 // Pioneer LD-V1000
+simpr8210 // Pioneer PR-8210
diff --git a/src/mame/video/911_chr.h b/src/mame/video/911_chr.h
index 074b485f57c..c972eb975cf 100644
--- a/src/mame/video/911_chr.h
+++ b/src/mame/video/911_chr.h
@@ -44,7 +44,7 @@ enum
{
/* US ASCII: 128 characters (32 symbols + 95 ASCII + 1 blank (delete character)) */
char_defs_US_base = 0,
- /* additionnal katakana set (128 characters, including JIS set) */
+ /* additional katakana set (128 characters, including JIS set) */
char_defs_katakana_base = char_defs_US_base+128,
/* extra symbols for national character sets */
char_defs_pound = char_defs_katakana_base+128, /* pound sign (UK 0x23, French WP 0x23) */
@@ -89,7 +89,7 @@ static const char_override_t UK_overrides[1] =
{ 0x23, char_defs_pound }
};
-/* One Japan-specific character (see below for the 128 additionnal characters) */
+/* One Japan-specific character (see below for the 128 additional characters) */
static const char_override_t japanese_overrides[1] =
{
{ 0x5C, char_defs_yen }
diff --git a/src/mame/video/911_vdt.h b/src/mame/video/911_vdt.h
index 519d49cf357..ea495f12d1e 100644
--- a/src/mame/video/911_vdt.h
+++ b/src/mame/video/911_vdt.h
@@ -86,7 +86,7 @@ private:
uint8_t m_keyboard_data; // last code pressed on keyboard
bool m_keyboard_data_ready; // true if there is a new code in keyboard_data
- bool m_keyboard_interrupt_enable; // true when keybord interrupts are enabled
+ bool m_keyboard_interrupt_enable; // true when keyboard interrupts are enabled
bool m_display_enable; // screen is black when false
bool m_dual_intensity_enable; // if true, MSBit of ASCII codes controls character highlight
diff --git a/src/mame/video/angelkds.cpp b/src/mame/video/angelkds.cpp
index bcd83e5cc2b..63700ca7313 100644
--- a/src/mame/video/angelkds.cpp
+++ b/src/mame/video/angelkds.cpp
@@ -236,7 +236,7 @@ uint32_t angelkds_state::screen_update_angelkds(screen_device &screen, bitmap_in
const rectangle &visarea = screen.visible_area();
rectangle clip;
- bitmap.fill(0x3f, cliprect); /* is there a register controling the colour?, we currently use the last colour of the tx palette */
+ bitmap.fill(0x3f, cliprect); /* is there a register controlling the colour?, we currently use the last colour of the tx palette */
/* draw top of screen */
clip.set(8*0, 8*16-1, visarea.min_y, visarea.max_y);
diff --git a/src/mame/video/gic.h b/src/mame/video/gic.h
index f6569e34475..b6568f21f0d 100644
--- a/src/mame/video/gic.h
+++ b/src/mame/video/gic.h
@@ -69,7 +69,7 @@ public:
//plgDavid please change this to a MESS friendly handshake
void set_shared_memory(const uint8_t*m){ m_ram = m;};
- // Global constants (non mesured figures)
+ // Global constants (non measured figures)
static const int START_ACTIVE_SCAN = 10;
static const int BORDER_SIZE = GIC_CHAR_W*3;
static const int END_ACTIVE_SCAN = 10 + GIC_CHAR_W*2 + 150 + GIC_CHAR_W*2;
diff --git a/src/mame/video/gime.h b/src/mame/video/gime.h
index 607430ca46c..3e141df22a4 100644
--- a/src/mame/video/gime.h
+++ b/src/mame/video/gime.h
@@ -76,7 +76,7 @@ public:
void update_cart_rom(void);
/* updates the screen -- this will call begin_update(),
- followed by update_row() reapeatedly and after all row
+ followed by update_row() repeatedly and after all row
updating is complete, end_update() */
bool update_composite(bitmap_rgb32 &bitmap, const rectangle &cliprect);
bool update_rgb(bitmap_rgb32 &bitmap, const rectangle &cliprect);
diff --git a/src/mame/video/gstriker.cpp b/src/mame/video/gstriker.cpp
index ae49c6668e2..72e1ee4c1bc 100644
--- a/src/mame/video/gstriker.cpp
+++ b/src/mame/video/gstriker.cpp
@@ -36,9 +36,9 @@ uint32_t gstriker_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
void gstriker_state::video_start()
{
- // Initalize the chip for the score plane
+ // Initialize the chip for the score plane
m_tx->get_tilemap()->set_transparent_pen(0xf);
- // Initalize the chip for the screen plane
+ // Initialize the chip for the screen plane
m_bg->get_tilemap()->set_transparent_pen(0xf);
}
diff --git a/src/mame/video/jagblit.h b/src/mame/video/jagblit.h
index b9edd498364..cfbd35dceac 100644
--- a/src/mame/video/jagblit.h
+++ b/src/mame/video/jagblit.h
@@ -63,7 +63,7 @@
W --x----- -------- -------- -------- (BUSHI - hi priority bus)
W ---x---- -------- -------- -------- (BKGWREN - writeback destination)
W ----x--- -------- -------- -------- (DCOMPEN - write inhibit from data comparator)
- W -----x-- -------- -------- -------- (BCOMPEN - write inhibit from bit coparator)
+ W -----x-- -------- -------- -------- (BCOMPEN - write inhibit from bit comparator)
W ------x- -------- -------- -------- (CMPDST - compare dest instead of src)
W -------x xxx----- -------- -------- (logical operation)
W -------- ---xxx-- -------- -------- (ZMODE - Z comparator mode)
diff --git a/src/mame/video/konamigx.cpp b/src/mame/video/konamigx.cpp
index bfeb26a2426..c637dfd9197 100644
--- a/src/mame/video/konamigx.cpp
+++ b/src/mame/video/konamigx.cpp
@@ -674,7 +674,7 @@ void konamigx_state::gx_draw_basic_tilemaps(screen_device &screen, bitmap_rgb32
/* blend layer only when:
1) m_vinmix != 0xff
2) its internal mix code is set
- 3) all mix code bits are internal(overriden until tile blending has been implemented)
+ 3) all mix code bits are internal(overridden until tile blending has been implemented)
4) 0 > alpha < 255;
*/
if (temp1!=0xff && temp2 /*&& temp3==3*/)
diff --git a/src/mame/video/midzeus2.cpp b/src/mame/video/midzeus2.cpp
deleted file mode 100644
index ca0a3e7e95a..00000000000
--- a/src/mame/video/midzeus2.cpp
+++ /dev/null
@@ -1,1365 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/*************************************************************************
-
- Driver for Midway Zeus games
-
-**************************************************************************/
-
-#include "emu.h"
-#include "cpu/tms32031/tms32031.h"
-#include "includes/midzeus.h"
-#include "includes/midzeus2.h"
-#include "video/poly.h"
-#include "video/rgbutil.h"
-
-
-
-/*************************************
- *
- * Constants
- *
- *************************************/
-
-#define DUMP_WAVE_RAM 0
-#define TRACK_REG_USAGE 0
-
-#define WAVERAM0_WIDTH 1024
-#define WAVERAM0_HEIGHT 2048
-
-#define WAVERAM1_WIDTH 512
-#define WAVERAM1_HEIGHT 1024
-
-
-
-/*************************************
- *
- * Type definitions
- *
- *************************************/
-
-struct mz2_poly_extra_data
-{
- const void * palbase;
- const void * texbase;
- uint16_t solidcolor;
- int16_t zoffset;
- uint16_t transcolor;
- uint16_t texwidth;
- uint16_t color;
- uint32_t alpha;
-};
-
-
-/*************************************
- *
- * Polygon renderer
- *
- *************************************/
-
-class midzeus2_renderer : public poly_manager<float, mz2_poly_extra_data, 4, 10000>
-{
-public:
- midzeus2_renderer(midzeus2_state &state);
-
- void render_poly_8bit(int32_t scanline, const extent_t& extent, const mz2_poly_extra_data& object, int threadid);
-
- void zeus2_draw_quad(const uint32_t *databuffer, uint32_t texoffs, bool logit);
-
-private:
- midzeus2_state& m_state;
-};
-
-typedef midzeus2_renderer::vertex_t poly_vertex;
-typedef midzeus2_renderer::extent_t poly_extent;
-
-midzeus2_renderer::midzeus2_renderer(midzeus2_state &state)
- : poly_manager<float, mz2_poly_extra_data, 4, 10000>(state.machine())
- , m_state(state)
-{
-}
-
-
-/*************************************
- *
- * Global variables
- *
- *************************************/
-
-static midzeus2_renderer* poly;
-static uint8_t log_fifo;
-
-static uint32_t zeus_fifo[20];
-static uint8_t zeus_fifo_words;
-static void *zeus_renderbase;
-static rectangle zeus_cliprect;
-
-static float zeus_matrix[3][3];
-static float zeus_point[3];
-static float zeus_point2[3];
-static uint32_t zeus_texbase;
-static uint32_t zeus_unknown_40;
-static int zeus_quad_size;
-
-static uint32_t *waveram[2];
-static emu_timer *int_timer;
-static int yoffs;
-static int texel_width;
-static float zbase;
-
-#if TRACK_REG_USAGE
-struct reg_info
-{
- struct reg_info *next;
- uint32_t value;
-};
-
-static reg_info *regdata[0x80];
-static int regdata_count[0x80];
-static int regread_count[0x80];
-static int regwrite_count[0x80];
-static reg_info *subregdata[0x100];
-static int subregdata_count[0x80];
-static int subregwrite_count[0x100];
-
-#endif
-
-
-
-/*************************************
- *
- * Macros
- *
- *************************************/
-
-#define WAVERAM_BLOCK0(blocknum) ((void *)((uint8_t *)waveram[0] + 8 * (blocknum)))
-#define WAVERAM_BLOCK1(blocknum) ((void *)((uint8_t *)waveram[1] + 12 * (blocknum)))
-
-#define WAVERAM_PTR8(base, bytenum) ((uint8_t *)(base) + BYTE4_XOR_LE(bytenum))
-#define WAVERAM_READ8(base, bytenum) (*WAVERAM_PTR8(base, bytenum))
-#define WAVERAM_WRITE8(base, bytenum, data) do { *WAVERAM_PTR8(base, bytenum) = (data); } while (0)
-
-#define WAVERAM_PTR16(base, wordnum) ((uint16_t *)(base) + BYTE_XOR_LE(wordnum))
-#define WAVERAM_READ16(base, wordnum) (*WAVERAM_PTR16(base, wordnum))
-#define WAVERAM_WRITE16(base, wordnum, data) do { *WAVERAM_PTR16(base, wordnum) = (data); } while (0)
-
-#define WAVERAM_PTR32(base, dwordnum) ((uint32_t *)(base) + (dwordnum))
-#define WAVERAM_READ32(base, dwordnum) (*WAVERAM_PTR32(base, dwordnum))
-#define WAVERAM_WRITE32(base, dwordnum, data) do { *WAVERAM_PTR32(base, dwordnum) = (data); } while (0)
-
-#define PIXYX_TO_DWORDNUM(y, x) (((((y) & 0x1ff) << 8) | (((x) & 0x1fe) >> 1)) * 3 + ((x) & 1))
-#define DEPTHYX_TO_DWORDNUM(y, x) (PIXYX_TO_DWORDNUM(y, (x) & ~1) + 2)
-
-#define WAVERAM_PTRPIX(base, y, x) WAVERAM_PTR32(base, PIXYX_TO_DWORDNUM(y, x))
-#define WAVERAM_READPIX(base, y, x) (*WAVERAM_PTRPIX(base, y, x))
-#define WAVERAM_WRITEPIX(base, y, x, color) do { *WAVERAM_PTRPIX(base, y, x) = (color); } while (0)
-
-#define WAVERAM_PTRDEPTH(base, y, x) WAVERAM_PTR16(base, DEPTHYX_TO_DWORDNUM(y, x) * 2 + (x & 1))
-#define WAVERAM_READDEPTH(base, y, x) (*WAVERAM_PTRDEPTH(base, y, x))
-#define WAVERAM_WRITEDEPTH(base, y, x, color) do { *WAVERAM_PTRDEPTH(base, y, x) = (color); } while (0)
-
-
-
-/*************************************
- *
- * Inlines for block addressing
- *
- *************************************/
-
-static inline void *waveram0_ptr_from_expanded_addr(uint32_t addr)
-{
- uint32_t blocknum = (addr % WAVERAM0_WIDTH) + ((addr >> 16) % WAVERAM0_HEIGHT) * WAVERAM0_WIDTH;
- return WAVERAM_BLOCK0(blocknum);
-}
-
-static inline void *waveram1_ptr_from_expanded_addr(uint32_t addr)
-{
- uint32_t blocknum = (addr % WAVERAM1_WIDTH) + ((addr >> 16) % WAVERAM1_HEIGHT) * WAVERAM1_WIDTH;
- return WAVERAM_BLOCK1(blocknum);
-}
-
-#ifdef UNUSED_FUNCTION
-static inline void *waveram0_ptr_from_texture_addr(uint32_t addr, int width)
-{
- uint32_t blocknum = ((addr & ~1) * width) / 8;
- return WAVERAM_BLOCK0(blocknum);
-}
-#endif
-
-
-/*************************************
- *
- * Inlines for rendering
- *
- *************************************/
-
-#ifdef UNUSED_FUNCTION
-static inline void waveram_plot(int y, int x, uint32_t color)
-{
- if (zeus_cliprect.contains(x, y))
- WAVERAM_WRITEPIX(zeus_renderbase, y, x, color);
-}
-#endif
-
-static inline void waveram_plot_depth(int y, int x, uint32_t color, uint16_t depth)
-{
- if (zeus_cliprect.contains(x, y))
- {
- WAVERAM_WRITEPIX(zeus_renderbase, y, x, color);
- WAVERAM_WRITEDEPTH(zeus_renderbase, y, x, depth);
- }
-}
-
-#ifdef UNUSED_FUNCTION
-static inline void waveram_plot_check_depth(int y, int x, uint32_t color, uint16_t depth)
-{
- if (zeus_cliprect.contains(x, y))
- {
- uint16_t *depthptr = WAVERAM_PTRDEPTH(zeus_renderbase, y, x);
- if (depth <= *depthptr)
- {
- WAVERAM_WRITEPIX(zeus_renderbase, y, x, color);
- *depthptr = depth;
- }
- }
-}
-#endif
-
-#ifdef UNUSED_FUNCTION
-static inline void waveram_plot_check_depth_nowrite(int y, int x, uint32_t color, uint16_t depth)
-{
- if (zeus_cliprect.contains(x, y))
- {
- uint16_t *depthptr = WAVERAM_PTRDEPTH(zeus_renderbase, y, x);
- if (depth <= *depthptr)
- WAVERAM_WRITEPIX(zeus_renderbase, y, x, color);
- }
-}
-#endif
-
-
-/*************************************
- *
- * Inlines for texel accesses
- *
- *************************************/
-
-static inline uint8_t get_texel_8bit(const void *base, int y, int x, int width)
-{
- uint32_t byteoffs = (y / 2) * (width * 2) + ((x / 4) << 3) + ((y & 1) << 2) + (x & 3);
- return WAVERAM_READ8(base, byteoffs);
-}
-
-
-#ifdef UNUSED_FUNCTION
-static inline uint8_t get_texel_4bit(const void *base, int y, int x, int width)
-{
- uint32_t byteoffs = (y / 2) * (width * 2) + ((x / 8) << 3) + ((y & 1) << 2) + ((x / 2) & 3);
- return (WAVERAM_READ8(base, byteoffs) >> (4 * (x & 1))) & 0x0f;
-}
-#endif
-
-
-/*************************************
- *
- * Video startup
- *
- *************************************/
-
-TIMER_CALLBACK_MEMBER(midzeus2_state::int_timer_callback)
-{
- m_maincpu->set_input_line(2, ASSERT_LINE);
-}
-
-
-VIDEO_START_MEMBER(midzeus2_state,midzeus2)
-{
- /* allocate memory for "wave" RAM */
- waveram[0] = auto_alloc_array(machine(), uint32_t, WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8/4);
- waveram[1] = auto_alloc_array(machine(), uint32_t, WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 12/4);
-
- /* initialize polygon engine */
- poly = auto_alloc(machine(), midzeus2_renderer(*this));
-
- /* we need to cleanup on exit */
- machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(&midzeus2_state::exit_handler2, this));
-
- zbase = 2.0f;
- yoffs = 0;
- texel_width = 256;
- zeus_renderbase = waveram[1];
-
- int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(midzeus2_state::int_timer_callback), this));
-
- /* save states */
- save_pointer(NAME(waveram[0]), WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8 / sizeof(waveram[0][0]));
- save_pointer(NAME(waveram[1]), WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 12 / sizeof(waveram[1][0]));
- save_item(NAME(zeus_fifo));
- save_item(NAME(zeus_fifo_words));
- save_item(NAME(zeus_cliprect.min_x));
- save_item(NAME(zeus_cliprect.max_x));
- save_item(NAME(zeus_cliprect.min_y));
- save_item(NAME(zeus_cliprect.max_y));
- save_item(NAME(zeus_matrix));
- save_item(NAME(zeus_point));
- save_item(NAME(zeus_texbase));
-}
-
-
-void midzeus2_state::exit_handler2()
-{
-#if DUMP_WAVE_RAM
- FILE *f = fopen("waveram.dmp", "w");
- int i;
-
- for (i = 0; i < WAVERAM0_WIDTH * WAVERAM0_HEIGHT; i++)
- {
- if (i % 4 == 0) fprintf(f, "%03X%03X: ", i / WAVERAM0_WIDTH, i % WAVERAM0_WIDTH);
- fprintf(f, " %08X %08X ",
- WAVERAM_READ32(waveram[0], i*2+0),
- WAVERAM_READ32(waveram[0], i*2+1));
- if (i % 4 == 3) fprintf(f, "\n");
- }
- fclose(f);
-#endif
-
-#if TRACK_REG_USAGE
-{
- reg_info *info;
- int regnum;
-
- for (regnum = 0; regnum < 0x80; regnum++)
- {
- printf("Register %02X\n", regnum);
- if (regread_count[regnum] == 0)
- printf("\tNever read\n");
- else
- printf("\tRead %d times\n", regread_count[regnum]);
-
- if (regwrite_count[regnum] == 0)
- printf("\tNever written\n");
- else
- {
- printf("\tWritten %d times\n", regwrite_count[regnum]);
- for (info = regdata[regnum]; info != nullptr; info = info->next)
- printf("\t%08X\n", info->value);
- }
- }
-
- for (regnum = 0; regnum < 0x100; regnum++)
- if (subregwrite_count[regnum] != 0)
- {
- printf("Sub-Register %02X (%d writes)\n", regnum, subregwrite_count[regnum]);
- for (info = subregdata[regnum]; info != nullptr; info = info->next)
- printf("\t%08X\n", info->value);
- }
-}
-#endif
-
-}
-
-
-
-/*************************************
- *
- * Video update
- *
- *************************************/
-
-uint32_t midzeus2_state::screen_update_midzeus2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
-{
- int x, y;
-
- poly->wait();
-
-if (machine().input().code_pressed(KEYCODE_UP)) { zbase += 1.0f; popmessage("Zbase = %f", (double) zbase); }
-if (machine().input().code_pressed(KEYCODE_DOWN)) { zbase -= 1.0f; popmessage("Zbase = %f", (double) zbase); }
-
- /* normal update case */
- if (!machine().input().code_pressed(KEYCODE_W))
- {
- const void *base = waveram1_ptr_from_expanded_addr(m_zeusbase[0x38]);
- int xoffs = screen.visible_area().min_x;
- for (y = cliprect.min_y; y <= cliprect.max_y; y++)
- {
- uint32_t *dest = &bitmap.pix32(y);
- for (x = cliprect.min_x; x <= cliprect.max_x; x++)
- dest[x] = WAVERAM_READPIX(base, y, x - xoffs);
- }
- }
-
- /* waveram drawing case */
- else
- {
- const uint64_t *base;
-
- if (machine().input().code_pressed(KEYCODE_DOWN)) yoffs += machine().input().code_pressed(KEYCODE_LSHIFT) ? 0x40 : 1;
- if (machine().input().code_pressed(KEYCODE_UP)) yoffs -= machine().input().code_pressed(KEYCODE_LSHIFT) ? 0x40 : 1;
- if (machine().input().code_pressed(KEYCODE_LEFT) && texel_width > 4) { texel_width >>= 1; while (machine().input().code_pressed(KEYCODE_LEFT)) ; }
- if (machine().input().code_pressed(KEYCODE_RIGHT) && texel_width < 512) { texel_width <<= 1; while (machine().input().code_pressed(KEYCODE_RIGHT)) ; }
-
- if (yoffs < 0) yoffs = 0;
- base = (const uint64_t *)waveram0_ptr_from_expanded_addr(yoffs << 16);
-
- for (y = cliprect.min_y; y <= cliprect.max_y; y++)
- {
- uint32_t *dest = &bitmap.pix32(y);
- for (x = cliprect.min_x; x <= cliprect.max_x; x++)
- {
- uint8_t tex = get_texel_8bit(base, y, x, texel_width);
- dest[x] = (tex << 16) | (tex << 8) | tex;
- }
- }
- popmessage("offs = %06X", yoffs << 12);
- }
-
- return 0;
-}
-
-
-
-/*************************************
- *
- * Core read handler
- *
- *************************************/
-
-READ32_MEMBER( midzeus2_state::zeus2_r )
-{
- bool logit = (offset != 0x00 && offset != 0x01 && offset != 0x54 && offset != 0x48 && offset != 0x49 && offset != 0x58 && offset != 0x59 && offset != 0x5a);
- uint32_t result = m_zeusbase[offset];
-
-#if TRACK_REG_USAGE
- regread_count[offset]++;
-#endif
-
- if (logit)
- logerror("%06X:zeus2_r(%02X)\n", space.device().safe_pc(), offset);
-
- switch (offset)
- {
- case 0x00:
- result = 0x20;
- break;
-
- case 0x01:
- /* bit $000C0070 are tested in a loop until 0 */
- /* bits $00080000 is tested in a loop until 0 */
- /* bit $00000004 is tested for toggling; probably VBLANK */
- result = 0x00;
- if (m_screen->vblank())
- result |= 0x04;
- break;
-
- case 0x07:
- /* this is needed to pass the self-test in thegrid */
- result = 0x10451998;
- break;
-
- case 0x54:
- /* both upper 16 bits and lower 16 bits seem to be used as vertical counters */
- result = (m_screen->vpos() << 16) | m_screen->vpos();
- break;
- }
-
- return result;
-}
-
-
-
-/*************************************
- *
- * Core write handler
- *
- *************************************/
-
-WRITE32_MEMBER( midzeus2_state::zeus2_w )
-{
- bool logit = (offset != 0x08 &&
- (offset != 0x20 || data != 0) &&
- offset != 0x40 && offset != 0x41 && offset != 0x48 && offset != 0x49 && offset != 0x4e &&
- offset != 0x50 && offset != 0x51 && offset != 0x57 && offset != 0x58 && offset != 0x59 && offset != 0x5a && offset != 0x5e);
- if (logit)
- logerror("%06X:zeus2_w", space.device().safe_pc());
- zeus2_register32_w(offset, data, logit);
-}
-
-
-
-/*************************************
- *
- * Handle register writes
- *
- *************************************/
-
-void midzeus2_state::zeus2_register32_w(offs_t offset, uint32_t data, bool logit)
-{
- uint32_t oldval = m_zeusbase[offset];
-
-#if TRACK_REG_USAGE
-regwrite_count[offset]++;
-if (regdata_count[offset] < 256)
-{
- reg_info **tailptr;
-
- for (tailptr = &regdata[offset]; *tailptr != nullptr; tailptr = &(*tailptr)->next)
- if ((*tailptr)->value == data)
- break;
- if (*tailptr == nullptr)
- {
- *tailptr = alloc_or_die(reg_info);
- (*tailptr)->next = nullptr;
- (*tailptr)->value = data;
- regdata_count[offset]++;
- }
-}
-#endif
-
- /* writes to register $CC need to force a partial update */
-// if ((offset & ~1) == 0xcc)
-// m_screen->update_partial(m_screen->vpos());
-
- /* always write to low word? */
- m_zeusbase[offset] = data;
-
- /* log appropriately */
- if (logit)
- logerror("(%02X) = %08X\n", offset, data);
-
- /* handle the update */
- zeus2_register_update(offset, oldval, logit);
-}
-
-
-
-/*************************************
- *
- * Update state after a register write
- *
- *************************************/
-
-void midzeus2_state::zeus2_register_update(offs_t offset, uint32_t oldval, bool logit)
-{
- /* handle the writes; only trigger on low accesses */
- switch (offset)
- {
- case 0x08:
- zeus_fifo[zeus_fifo_words++] = m_zeusbase[0x08];
- if (zeus2_fifo_process(zeus_fifo, zeus_fifo_words))
- zeus_fifo_words = 0;
-
- /* set the interrupt signal to indicate we can handle more */
- int_timer->adjust(attotime::from_nsec(500));
- break;
-
- case 0x20:
- /* toggles between two values based on the page:
-
- Page # m_zeusbase[0x20] m_zeusbase[0x38]
- ------ -------------- --------------
- 0 $04000190 $00000000
- 1 $04000000 $01900000
- */
- zeus2_pointer_write(m_zeusbase[0x20] >> 24, m_zeusbase[0x20]);
- break;
-
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- m_screen->update_partial(m_screen->vpos());
- {
- int vtotal = m_zeusbase[0x37] & 0xffff;
- int htotal = m_zeusbase[0x34] >> 16;
-
- rectangle visarea(m_zeusbase[0x33] >> 16, (m_zeusbase[0x34] & 0xffff) - 1, 0, m_zeusbase[0x35] & 0xffff);
- if (htotal > 0 && vtotal > 0 && visarea.min_x < visarea.max_x && visarea.max_y < vtotal)
- {
- m_screen->configure(htotal, vtotal, visarea, HZ_TO_ATTOSECONDS((double)MIDZEUS_VIDEO_CLOCK / 4.0 / (htotal * vtotal)));
- zeus_cliprect = visarea;
- zeus_cliprect.max_x -= zeus_cliprect.min_x;
- zeus_cliprect.min_x = 0;
- }
- }
- break;
-
- case 0x38:
- {
- uint32_t temp = m_zeusbase[0x38];
- m_zeusbase[0x38] = oldval;
- m_screen->update_partial(m_screen->vpos());
- log_fifo = machine().input().code_pressed(KEYCODE_L);
- m_zeusbase[0x38] = temp;
- }
- break;
-
- case 0x41:
- /* this is the address, except in read mode, where it latches values */
- if (m_zeusbase[0x4e] & 0x10)
- {
- const void *src = waveram0_ptr_from_expanded_addr(oldval);
- m_zeusbase[0x41] = oldval;
- m_zeusbase[0x48] = WAVERAM_READ32(src, 0);
- m_zeusbase[0x49] = WAVERAM_READ32(src, 1);
-
- if (m_zeusbase[0x4e] & 0x40)
- {
- m_zeusbase[0x41]++;
- m_zeusbase[0x41] += (m_zeusbase[0x41] & 0x400) << 6;
- m_zeusbase[0x41] &= ~0xfc00;
- }
- }
- break;
-
- case 0x48:
- case 0x49:
- /* if we're in write mode, process it */
- if (m_zeusbase[0x40] == 0x00890000)
- {
- /*
- m_zeusbase[0x4e]:
- bit 0-1: which register triggers write through
- bit 3: enable write through via these registers
- bit 4: seems to be set during reads, when 0x41 is used for latching
- bit 6: enable autoincrement on write through
- */
- if ((m_zeusbase[0x4e] & 0x08) && (offset & 3) == (m_zeusbase[0x4e] & 3))
- {
- void *dest = waveram0_ptr_from_expanded_addr(m_zeusbase[0x41]);
- WAVERAM_WRITE32(dest, 0, m_zeusbase[0x48]);
- WAVERAM_WRITE32(dest, 1, m_zeusbase[0x49]);
-
- if (m_zeusbase[0x4e] & 0x40)
- {
- m_zeusbase[0x41]++;
- m_zeusbase[0x41] += (m_zeusbase[0x41] & 0x400) << 6;
- m_zeusbase[0x41] &= ~0xfc00;
- }
- }
- }
-
- /* make sure we log anything else */
- else if (logit)
- logerror("\t[40]=%08X [4E]=%08X\n", m_zeusbase[0x40], m_zeusbase[0x4e]);
- break;
-
- case 0x51:
-
- /* in this mode, crusnexo expects the reads to immediately latch */
- if (m_zeusbase[0x50] == 0x00a20000)
- oldval = m_zeusbase[0x51];
-
- /* this is the address, except in read mode, where it latches values */
- if ((m_zeusbase[0x5e] & 0x10) || (m_zeusbase[0x50] == 0x00a20000))
- {
- const void *src = waveram1_ptr_from_expanded_addr(oldval);
- m_zeusbase[0x51] = oldval;
- m_zeusbase[0x58] = WAVERAM_READ32(src, 0);
- m_zeusbase[0x59] = WAVERAM_READ32(src, 1);
- m_zeusbase[0x5a] = WAVERAM_READ32(src, 2);
-
- if (m_zeusbase[0x5e] & 0x40)
- {
- m_zeusbase[0x51]++;
- m_zeusbase[0x51] += (m_zeusbase[0x51] & 0x200) << 7;
- m_zeusbase[0x51] &= ~0xfe00;
- }
- }
- break;
-
- case 0x57:
- /* thegrid uses this to write either left or right halves of pixels */
- if (m_zeusbase[0x50] == 0x00e90000)
- {
- void *dest = waveram1_ptr_from_expanded_addr(m_zeusbase[0x51]);
- if (m_zeusbase[0x57] & 1)
- WAVERAM_WRITE32(dest, 0, m_zeusbase[0x58]);
- if (m_zeusbase[0x57] & 4)
- WAVERAM_WRITE32(dest, 1, m_zeusbase[0x59]);
- }
-
- /* make sure we log anything else */
- else if (logit)
- logerror("\t[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
- break;
-
- case 0x58:
- case 0x59:
- case 0x5a:
- /* if we're in write mode, process it */
- if (m_zeusbase[0x50] == 0x00890000)
- {
- /*
- m_zeusbase[0x5e]:
- bit 0-1: which register triggers write through
- bit 3: enable write through via these registers
- bit 4: seems to be set during reads, when 0x51 is used for latching
- bit 5: unknown, currently used to specify ordering, but this is suspect
- bit 6: enable autoincrement on write through
- */
- if ((m_zeusbase[0x5e] & 0x08) && (offset & 3) == (m_zeusbase[0x5e] & 3))
- {
- void *dest = waveram1_ptr_from_expanded_addr(m_zeusbase[0x51]);
- WAVERAM_WRITE32(dest, 0, m_zeusbase[0x58]);
- if (m_zeusbase[0x5e] & 0x20)
- WAVERAM_WRITE32(dest, 1, m_zeusbase[0x5a]);
- else
- {
- WAVERAM_WRITE32(dest, 1, m_zeusbase[0x59]);
- WAVERAM_WRITE32(dest, 2, m_zeusbase[0x5a]);
- }
-
- if (m_zeusbase[0x5e] & 0x40)
- {
- m_zeusbase[0x51]++;
- m_zeusbase[0x51] += (m_zeusbase[0x51] & 0x200) << 7;
- m_zeusbase[0x51] &= ~0xfe00;
- }
- }
- }
-
- /* make sure we log anything else */
- else if (logit)
- logerror("\t[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
- break;
- }
-}
-
-
-
-/*************************************
- *
- * Process the FIFO
- *
- *************************************/
-
-void midzeus2_state::zeus2_pointer_write(uint8_t which, uint32_t value)
-{
-#if TRACK_REG_USAGE
-subregwrite_count[which]++;
-if (subregdata_count[which] < 256)
-{
- reg_info **tailptr;
-
- for (tailptr = &subregdata[which]; *tailptr != nullptr; tailptr = &(*tailptr)->next)
- if ((*tailptr)->value == value)
- break;
- if (*tailptr == nullptr)
- {
- *tailptr = alloc_or_die(reg_info);
- (*tailptr)->next = nullptr;
- (*tailptr)->value = value;
- subregdata_count[which]++;
- }
-}
-#endif
-
- switch (which)
- {
- case 0x04:
- zeus_renderbase = waveram1_ptr_from_expanded_addr(value << 16);
- break;
-
- case 0x05:
- zeus_texbase = value % (WAVERAM0_HEIGHT * WAVERAM0_WIDTH);
- break;
-
- case 0x40:
- zeus_unknown_40 = value & 0xffffff;
- zeus_quad_size = (zeus_unknown_40 == 0) ? 10 : 14;
- break;
-
-#if 0
- case 0x0c:
- case 0x0d:
- // These seem to have something to do with blending.
- // There are fairly unique 0x0C,0x0D pairs for various things:
- // Car reflection on initial screen: 0x40, 0x00
- // Additively-blended "flares": 0xFA, 0xFF
- // Car windshields (and drivers, apparently): 0x82, 0x7D
- // Other minor things: 0xA4, 0x100
- break;
-#endif
- }
-}
-
-
-
-/*************************************
- *
- * Process the FIFO
- *
- *************************************/
-
-bool midzeus2_state::zeus2_fifo_process(const uint32_t *data, int numwords)
-{
- int dataoffs = 0;
-
- /* handle logging */
- switch (data[0] >> 24)
- {
- /* 0x05: write 32-bit value to low registers */
- case 0x05:
- if (numwords < 2)
- return false;
- if (log_fifo)
- log_fifo_command(data, numwords, " -- reg32");
- if (((data[0] >> 16) & 0x7f) != 0x08)
- zeus2_register32_w((data[0] >> 16) & 0x7f, data[1], log_fifo);
- break;
-
- /* 0x08: set matrix and point (thegrid) */
- case 0x08:
- if (numwords < 14)
- return false;
- dataoffs = 1;
-
- /* 0x07: set matrix and point (crusnexo) */
- case 0x07:
- if (numwords < 13)
- return false;
-
- /* extract the matrix from the raw data */
- zeus_matrix[0][0] = tms3203x_device::fp_to_float(data[dataoffs + 1]);
- zeus_matrix[0][1] = tms3203x_device::fp_to_float(data[dataoffs + 2]);
- zeus_matrix[0][2] = tms3203x_device::fp_to_float(data[dataoffs + 3]);
- zeus_matrix[1][0] = tms3203x_device::fp_to_float(data[dataoffs + 4]);
- zeus_matrix[1][1] = tms3203x_device::fp_to_float(data[dataoffs + 5]);
- zeus_matrix[1][2] = tms3203x_device::fp_to_float(data[dataoffs + 6]);
- zeus_matrix[2][0] = tms3203x_device::fp_to_float(data[dataoffs + 7]);
- zeus_matrix[2][1] = tms3203x_device::fp_to_float(data[dataoffs + 8]);
- zeus_matrix[2][2] = tms3203x_device::fp_to_float(data[dataoffs + 9]);
-
- /* extract the translation point from the raw data */
- zeus_point[0] = tms3203x_device::fp_to_float(data[dataoffs + 10]);
- zeus_point[1] = tms3203x_device::fp_to_float(data[dataoffs + 11]);
- zeus_point[2] = tms3203x_device::fp_to_float(data[dataoffs + 12]);
-
- if (log_fifo)
- {
- log_fifo_command(data, numwords, "");
- logerror("\n\t\tmatrix ( %8.2f %8.2f %8.2f ) ( %8.2f %8.2f %8.2f ) ( %8.2f %8.2f %8.2f )\n\t\tvector %8.2f %8.2f %8.5f\n",
- (double) zeus_matrix[0][0], (double) zeus_matrix[0][1], (double) zeus_matrix[0][2],
- (double) zeus_matrix[1][0], (double) zeus_matrix[1][1], (double) zeus_matrix[1][2],
- (double) zeus_matrix[2][0], (double) zeus_matrix[2][1], (double) zeus_matrix[2][2],
- (double) zeus_point[0],
- (double) zeus_point[1],
- (double) zeus_point[2]);
- }
- break;
-
- /* 0x15: set point only (thegrid) */
- /* 0x16: set point only (crusnexo) */
- case 0x15:
- case 0x16:
- if (numwords < 4)
- return false;
-
- /* extract the translation point from the raw data */
- zeus_point[0] = tms3203x_device::fp_to_float(data[1]);
- zeus_point[1] = tms3203x_device::fp_to_float(data[2]);
- zeus_point[2] = tms3203x_device::fp_to_float(data[3]);
-
- if (log_fifo)
- {
- log_fifo_command(data, numwords, "");
- logerror("\n\t\tvector %8.2f %8.2f %8.5f\n",
- (double) zeus_point[0],
- (double) zeus_point[1],
- (double) zeus_point[2]);
- }
- break;
-
- /* 0x1c: */
- case 0x1c:
- if (numwords < 4)
- return false;
- if (log_fifo)
- {
- log_fifo_command(data, numwords, " -- unknown control + hack clear screen\n");
- logerror("\t\tvector %8.2f %8.2f %8.5f\n",
- (double) tms3203x_device::fp_to_float(data[1]),
- (double) tms3203x_device::fp_to_float(data[2]),
- (double) tms3203x_device::fp_to_float(data[3]));
-
- /* extract the translation point from the raw data */
- zeus_point2[0] = tms3203x_device::fp_to_float(data[1]);
- zeus_point2[1] = tms3203x_device::fp_to_float(data[2]);
- zeus_point2[2] = tms3203x_device::fp_to_float(data[3]);
- }
- {
- /* not right -- just a hack */
- int x, y;
- for (y = zeus_cliprect.min_y; y <= zeus_cliprect.max_y; y++)
- for (x = zeus_cliprect.min_x; x <= zeus_cliprect.max_x; x++)
- waveram_plot_depth(y, x, 0, 0x7fff);
- }
- break;
-
- /* 0x23: render model in waveram (thegrid) */
- /* 0x24: render model in waveram (crusnexo) */
- case 0x23:
- case 0x24:
- if (numwords < 2)
- return false;
- if (log_fifo)
- log_fifo_command(data, numwords, "");
- zeus2_draw_model(data[1], data[0] & 0xffff, log_fifo);
- break;
-
- /* 0x31: sync pipeline? (thegrid) */
- /* 0x32: sync pipeline? (crusnexo) */
- case 0x31:
- case 0x32:
- if (log_fifo)
- log_fifo_command(data, numwords, "\n");
- zeus_quad_size = 10;
- break;
-
- /* 0x38: direct render quad (crusnexo) */
- case 0x38:
- if (numwords < 12)
- return false;
- if (log_fifo)
- log_fifo_command(data, numwords, "");
- break;
-
- /* 0x40: ???? */
- case 0x40:
- if (log_fifo)
- log_fifo_command(data, numwords, "\n");
- break;
-
- default:
- if (data[0] != 0x2c0)
- {
- printf("Unknown command %08X\n", data[0]);
- if (log_fifo)
- log_fifo_command(data, numwords, "\n");
- }
- break;
- }
- return true;
-}
-
-
-
-/*************************************
- *
- * Draw a model in waveram
- *
- *************************************/
-
-void midzeus2_state::zeus2_draw_model(uint32_t baseaddr, uint16_t count, bool logit)
-{
- uint32_t databuffer[32];
- int databufcount = 0;
- bool model_done = false;
- uint32_t texoffs = 0;
- int quadsize = zeus_quad_size;
-
- if (logit)
- logerror(" -- model @ %08X, len %04X\n", baseaddr, count);
-
- if (count > 0x1000)
- fatalerror("Extreme count\n");
-
- while (baseaddr != 0 && !model_done)
- {
- const void *base = waveram0_ptr_from_expanded_addr(baseaddr);
- int curoffs;
-
- /* reset the objdata address */
- baseaddr = 0;
-
- /* loop until we run out of data */
- for (curoffs = 0; curoffs <= count; curoffs++)
- {
- int countneeded = 2;
- uint8_t cmd;
-
- /* accumulate 2 words of data */
- databuffer[databufcount++] = WAVERAM_READ32(base, curoffs * 2 + 0);
- databuffer[databufcount++] = WAVERAM_READ32(base, curoffs * 2 + 1);
-
- /* if this is enough, process the command */
- cmd = databuffer[0] >> 24;
- if (cmd == 0x38)
- countneeded = quadsize;
- if (databufcount == countneeded)
- {
- /* handle logging of the command */
- if (logit)
- {
- int offs;
- logerror("\t");
- for (offs = 0; offs < databufcount; offs++)
- logerror("%08X ", databuffer[offs]);
- logerror("-- ");
- }
-
- /* handle the command */
- switch (cmd)
- {
- case 0x21: /* thegrid */
- case 0x22: /* crusnexo */
- if (((databuffer[0] >> 16) & 0xff) == 0x9b)
- {
- texoffs = databuffer[1];
- if (logit)
- logerror("texture offset\n");
- }
- else if (logit)
- logerror("unknown offset\n");
- break;
-
- case 0x31: /* thegrid */
- if (logit)
- logerror("sync?\n");
- break;
-
- case 0x35: /* thegrid */
- case 0x36: /* crusnexo */
- if (logit)
- logerror("reg32");
- zeus2_register32_w((databuffer[0] >> 16) & 0x7f, databuffer[1], logit);
- break;
-
- case 0x38: /* crusnexo/thegrid */
- poly->zeus2_draw_quad(databuffer, texoffs, logit);
- break;
-
- default:
- if (quadsize == 10)
- {
- logerror("Correcting quad size\n");
- quadsize = 14;
- }
- if (logit)
- logerror("unknown model data\n");
- break;
- }
-
- /* reset the count */
- databufcount = 0;
- }
- }
- }
-}
-
-
-
-/*************************************
- *
- * Draw a quad
- *
- *************************************/
-
-void midzeus2_renderer::zeus2_draw_quad(const uint32_t *databuffer, uint32_t texoffs, bool logit)
-{
- poly_vertex clipvert[8];
- poly_vertex vert[4];
-// float uscale, vscale;
- float maxy, maxx;
-// int val1, val2, texwshift;
- int numverts;
- int i;
-// int16_t normal[3];
-// int32_t rotnormal[3];
- int texmode = texoffs & 0xffff;
-
- if (logit)
- m_state.logerror("quad\n");
-
-if (machine().input().code_pressed(KEYCODE_Q) && (texoffs & 0xffff) == 0x119) return;
-if (machine().input().code_pressed(KEYCODE_E) && (texoffs & 0xffff) == 0x01d) return;
-if (machine().input().code_pressed(KEYCODE_R) && (texoffs & 0xffff) == 0x11d) return;
-if (machine().input().code_pressed(KEYCODE_T) && (texoffs & 0xffff) == 0x05d) return;
-if (machine().input().code_pressed(KEYCODE_Y) && (texoffs & 0xffff) == 0x0dd) return;
-//if (machine().input().code_pressed(KEYCODE_U) && (texoffs & 0xffff) == 0x119) return;
-//if (machine().input().code_pressed(KEYCODE_I) && (texoffs & 0xffff) == 0x119) return;
-//if (machine().input().code_pressed(KEYCODE_O) && (texoffs & 0xffff) == 0x119) return;
-//if (machine().input().code_pressed(KEYCODE_L) && (texoffs & 0x100)) return;
-
-/*
-0 38800000
-1 x2 | x1
-2 v1 | u1
-3 y2 | y1
-4 v2 | u2
-5 z2 | z1
-6 v3 | u3
-7 v4 | u4
-8 ???
-9 x4 | x3
-10 y4 | y3
-11 z4 | z3
-
-In memory:
- +0 = ???
- +1 = set via $05410000/value
- +2 = x1
- +3 = y1
- +4 = z1
- +5 = x2
- +6 = y2
- +7 = z2
- +8 = x3
- +9 = y3
- +10= z3
- +11= x4
- +12= y4
- +13= z4
- +14= uv1
- +15= uv2
- +16= uv3
- +17= uv4
- +18= set via $05200000/$05000000 | (value << 10) (uvoffset?)
- +19= ???
-
-
- 38810000 00000000 00C7|FF38 FF5E|FF5E 15400154 11400114 00000000 00000000 FF38|00C7 00A3|00A3 -- quad
- xxxx|xxxx yyyy|yyyy xxxx|xxxx yyyy|yyyy
-*/
-
- /* extract raw x,y,z */
- vert[0].x = (int16_t)databuffer[2];
- vert[0].y = (int16_t)databuffer[3];
- vert[0].p[0] = (int16_t)databuffer[6];
- vert[0].p[1] = (databuffer[1] >> 2) & 0xff;
- vert[0].p[2] = (databuffer[1] >> 18) & 0xff;
-
- vert[1].x = (int16_t)(databuffer[2] >> 16);
- vert[1].y = (int16_t)(databuffer[3] >> 16);
- vert[1].p[0] = (int16_t)(databuffer[6] >> 16);
- vert[1].p[1] = (databuffer[4] >> 2) & 0xff;
- vert[1].p[2] = (databuffer[4] >> 12) & 0xff;
-
- vert[2].x = (int16_t)databuffer[8];
- vert[2].y = (int16_t)databuffer[9];
- vert[2].p[0] = (int16_t)databuffer[7];
- vert[2].p[1] = (databuffer[4] >> 22) & 0xff;
- vert[2].p[2] = (databuffer[5] >> 2) & 0xff;
-
- vert[3].x = (int16_t)(databuffer[8] >> 16);
- vert[3].y = (int16_t)(databuffer[9] >> 16);
- vert[3].p[0] = (int16_t)(databuffer[7] >> 16);
- vert[3].p[1] = (databuffer[5] >> 12) & 0xff;
- vert[3].p[2] = (databuffer[5] >> 22) & 0xff;
-
-/*
- vert[0].x = (int16_t)databuffer[1];
- vert[0].y = (int16_t)databuffer[3];
- vert[0].p[0] = (int16_t)databuffer[5];
- vert[0].p[1] = (uint16_t)databuffer[2];
- vert[0].p[2] = (uint16_t)(databuffer[2] >> 16);
-
- vert[1].x = (int16_t)(databuffer[1] >> 16);
- vert[1].y = (int16_t)(databuffer[3] >> 16);
- vert[1].p[0] = (int16_t)(databuffer[5] >> 16);
- vert[1].p[1] = (uint16_t)databuffer[4];
- vert[1].p[2] = (uint16_t)(databuffer[4] >> 16);
-
- vert[2].x = (int16_t)databuffer[9];
- vert[2].y = (int16_t)databuffer[10];
- vert[2].p[0] = (int16_t)databuffer[11];
- vert[2].p[1] = (uint16_t)databuffer[6];
- vert[2].p[2] = (uint16_t)(databuffer[6] >> 16);
-
- vert[3].x = (int16_t)(databuffer[9] >> 16);
- vert[3].y = (int16_t)(databuffer[10] >> 16);
- vert[3].p[0] = (int16_t)(databuffer[11] >> 16);
- vert[3].p[1] = (uint16_t)databuffer[7];
- vert[3].p[2] = (uint16_t)(databuffer[7] >> 16);
-*/
- for (i = 0; i < 4; i++)
- {
- float x = vert[i].x;
- float y = vert[i].y;
- float z = vert[i].p[0];
-
- vert[i].x = x * zeus_matrix[0][0] + y * zeus_matrix[0][1] + z * zeus_matrix[0][2] + zeus_point[0];
- vert[i].y = x * zeus_matrix[1][0] + y * zeus_matrix[1][1] + z * zeus_matrix[1][2] + zeus_point[1];
- vert[i].p[0] = x * zeus_matrix[2][0] + y * zeus_matrix[2][1] + z * zeus_matrix[2][2] + zeus_point[2];
- vert[i].p[0] += zbase;
- vert[i].p[2] += texoffs >> 16;
- vert[i].p[1] *= 256.0f;
- vert[i].p[2] *= 256.0f;
-
- if (logit)
- {
- m_state.logerror("\t\t(%f,%f,%f) (%02X,%02X)\n",
- (double) vert[i].x, (double) vert[i].y, (double) vert[i].p[0],
- (int)(vert[i].p[1] / 256.0f), (int)(vert[i].p[2] / 256.0f));
- }
- }
-
- numverts = poly->zclip_if_less(4, &vert[0], &clipvert[0], 4, 1.0f / 512.0f / 4.0f);
- if (numverts < 3)
- return;
-
- maxx = maxy = -1000.0f;
- for (i = 0; i < numverts; i++)
- {
-// 412.0f here works for crusnexo
- float ooz = 512.0f / clipvert[i].p[0];
-
-// ooz *= 1.0f / (512.0f * 512.0f);
-
- clipvert[i].x *= ooz;
- clipvert[i].y *= ooz;
- clipvert[i].x += 256.5f;
- clipvert[i].y += 200.5f;
- clipvert[i].p[0] *= 65536.0f * 16.0f;
-
- maxx = std::max(maxx, clipvert[i].x);
- maxy = std::max(maxy, clipvert[i].y);
- if (logit)
- m_state.logerror("\t\t\tTranslated=(%f,%f)\n", (double) clipvert[i].x, (double) clipvert[i].y);
- }
- for (i = 0; i < numverts; i++)
- {
- if (clipvert[i].x == maxx)
- clipvert[i].x += 0.0005f;
- if (clipvert[i].y == maxy)
- clipvert[i].y += 0.0005f;
- }
-
- mz2_poly_extra_data& extra = poly->object_data_alloc();
- switch (texmode)
- {
- case 0x01d: /* crusnexo: RHS of score bar */
- case 0x05d: /* crusnexo: background, road */
- case 0x0dd: /* crusnexo: license plate letters */
- case 0x11d: /* crusnexo: LHS of score bar */
- case 0x15d: /* crusnexo */
- case 0x85d: /* crusnexo */
- case 0x95d: /* crusnexo */
- case 0xc1d: /* crusnexo */
- case 0xc5d: /* crusnexo */
- extra.texwidth = 256;
- break;
-
- case 0x059: /* crusnexo */
- case 0x0d9: /* crusnexo */
- case 0x119: /* crusnexo: license plates */
- case 0x159: /* crusnexo */
- extra.texwidth = 128;
- break;
-
- case 0x055: /* crusnexo */
- case 0x155: /* crusnexo */
- extra.texwidth = 64;
- break;
-
- default:
- {
- static uint8_t hits[0x10000];
- if (!hits[(texoffs & 0xffff)])
- {
- hits[(texoffs & 0xffff)] = 1;
- printf("format = %04X\n", (texoffs & 0xffff));
- }
- break;
- }
- }
-
- extra.solidcolor = 0;//m_zeusbase[0x00] & 0x7fff;
- extra.zoffset = 0;//m_zeusbase[0x7e] >> 16;
- extra.alpha = 0;//m_zeusbase[0x4e];
- extra.transcolor = 0x100;//((databuffer[1] >> 16) & 1) ? 0 : 0x100;
- extra.texbase = WAVERAM_BLOCK0(zeus_texbase);
- extra.palbase = waveram0_ptr_from_expanded_addr(m_state.m_zeusbase[0x41]);
-
- // Note: Before being converted to the "poly.h" interface, this used to call the polylgcy function
- // poly_render_quad_fan. The behavior seems to be the same as it once was after a few short
- // tests, but the (numverts == 5) statement below may actually be a quad fan instead of a 5-sided
- // polygon.
- if (numverts == 3)
- render_triangle(zeus_cliprect, render_delegate(&midzeus2_renderer::render_poly_8bit, this), 4, clipvert[0], clipvert[1], clipvert[2]);
- else if (numverts == 4)
- render_polygon<4>(zeus_cliprect, render_delegate(&midzeus2_renderer::render_poly_8bit, this), 4, clipvert);
- else if (numverts == 5)
- render_polygon<5>(zeus_cliprect, render_delegate(&midzeus2_renderer::render_poly_8bit, this), 4, clipvert);
-}
-
-
-
-/*************************************
- *
- * Rasterizers
- *
- *************************************/
-
-void midzeus2_renderer::render_poly_8bit(int32_t scanline, const extent_t& extent, const mz2_poly_extra_data& object, int threadid)
-{
- int32_t curz = extent.param[0].start;
- int32_t curu = extent.param[1].start;
- int32_t curv = extent.param[2].start;
-// int32_t curi = extent.param[3].start;
- int32_t dzdx = extent.param[0].dpdx;
- int32_t dudx = extent.param[1].dpdx;
- int32_t dvdx = extent.param[2].dpdx;
-// int32_t didx = extent.param[3].dpdx;
- const void *texbase = object.texbase;
- const void *palbase = object.palbase;
- uint16_t transcolor = object.transcolor;
- int texwidth = object.texwidth;
- int x;
-
- for (x = extent.startx; x < extent.stopx; x++)
- {
- uint16_t *depthptr = WAVERAM_PTRDEPTH(zeus_renderbase, scanline, x);
- int32_t depth = (curz >> 16) + object.zoffset;
- if (depth > 0x7fff) depth = 0x7fff;
- if (depth >= 0 && depth <= *depthptr)
- {
- int u0 = (curu >> 8);// & (texwidth - 1);
- int v0 = (curv >> 8);// & 255;
- int u1 = (u0 + 1);
- int v1 = (v0 + 1);
- uint8_t texel0 = get_texel_8bit(texbase, v0, u0, texwidth);
- uint8_t texel1 = get_texel_8bit(texbase, v0, u1, texwidth);
- uint8_t texel2 = get_texel_8bit(texbase, v1, u0, texwidth);
- uint8_t texel3 = get_texel_8bit(texbase, v1, u1, texwidth);
- if (texel0 != transcolor)
- {
- uint32_t color0 = WAVERAM_READ16(palbase, texel0);
- uint32_t color1 = WAVERAM_READ16(palbase, texel1);
- uint32_t color2 = WAVERAM_READ16(palbase, texel2);
- uint32_t color3 = WAVERAM_READ16(palbase, texel3);
- color0 = ((color0 & 0x7c00) << 9) | ((color0 & 0x3e0) << 6) | ((color0 & 0x1f) << 3);
- color1 = ((color1 & 0x7c00) << 9) | ((color1 & 0x3e0) << 6) | ((color1 & 0x1f) << 3);
- color2 = ((color2 & 0x7c00) << 9) | ((color2 & 0x3e0) << 6) | ((color2 & 0x1f) << 3);
- color3 = ((color3 & 0x7c00) << 9) | ((color3 & 0x3e0) << 6) | ((color3 & 0x1f) << 3);
- rgb_t filtered = rgbaint_t::bilinear_filter(color0, color1, color2, color3, curu, curv);
- WAVERAM_WRITEPIX(zeus_renderbase, scanline, x, filtered);
- *depthptr = depth;
- }
- }
-
- curz += dzdx;
- curu += dudx;
- curv += dvdx;
-// curi += didx;
- }
-}
-
-
-
-/*************************************
- *
- * Debugging tools
- *
- *************************************/
-
-void midzeus2_state::log_fifo_command(const uint32_t *data, int numwords, const char *suffix)
-{
- int wordnum;
-
- logerror("Zeus cmd %02X :", data[0] >> 24);
- for (wordnum = 0; wordnum < numwords; wordnum++)
- logerror(" %08X", data[wordnum]);
- logerror("%s", suffix);
-}
diff --git a/src/mame/video/ppu2c0x.h b/src/mame/video/ppu2c0x.h
index 8d75ed459ec..d426630eb64 100644
--- a/src/mame/video/ppu2c0x.h
+++ b/src/mame/video/ppu2c0x.h
@@ -214,7 +214,7 @@ public:
int m_scan_scale; /* scan scale */
int m_scanlines_per_frame; /* number of scanlines per frame */
int m_security_value; /* 2C05 protection */
- int m_tilecount; /* MMC5 can change attributes to subsets of the 34 visibile tiles */
+ int m_tilecount; /* MMC5 can change attributes to subsets of the 34 visible tiles */
int m_draw_phase; /* MMC5 uses different regs for BG and OAM */
ppu2c0x_latch_delegate m_latch;
diff --git a/src/mame/video/stic.h b/src/mame/video/stic.h
index 4a341297c65..14b1bf1999e 100644
--- a/src/mame/video/stic.h
+++ b/src/mame/video/stic.h
@@ -177,7 +177,7 @@ enum
* +-+-+-+-+-+-+----+----+----+----+----+----+----+----+----+----+ *
* *
* SPRn 1=collision with sprite #n *
- * BKGD 1=collsion with set background bit *
+ * BKGD 1=collision with set background bit *
* BRDR 1=collision with screen border *
* *
****************************************************************************
diff --git a/src/mame/video/tbowl.cpp b/src/mame/video/tbowl.cpp
index cec4b27dc80..a9551de6bea 100644
--- a/src/mame/video/tbowl.cpp
+++ b/src/mame/video/tbowl.cpp
@@ -136,7 +136,7 @@ uint32_t tbowl_state::screen_update_left(screen_device &screen, bitmap_ind16 &bi
m_tx_tilemap->set_scrollx(0, 0 );
m_tx_tilemap->set_scrolly(0, 0 );
- bitmap.fill(0x100, cliprect); /* is there a register controling the colour? looks odd when screen is blank */
+ bitmap.fill(0x100, cliprect); /* is there a register controlling the colour? looks odd when screen is blank */
m_bg_tilemap->draw(screen, bitmap, cliprect, 0,0);
m_sprgen->tbowl_draw_sprites(bitmap,cliprect, m_gfxdecode, 0, m_spriteram);
m_bg2_tilemap->draw(screen, bitmap, cliprect, 0,0);
@@ -154,7 +154,7 @@ uint32_t tbowl_state::screen_update_right(screen_device &screen, bitmap_ind16 &b
m_tx_tilemap->set_scrollx(0, 32*8 );
m_tx_tilemap->set_scrolly(0, 0 );
- bitmap.fill(0x100, cliprect); /* is there a register controling the colour? looks odd when screen is blank */
+ bitmap.fill(0x100, cliprect); /* is there a register controlling the colour? looks odd when screen is blank */
m_bg_tilemap->draw(screen, bitmap, cliprect, 0,0);
m_sprgen->tbowl_draw_sprites(bitmap,cliprect, m_gfxdecode, 32*8, m_spriteram);
m_bg2_tilemap->draw(screen, bitmap, cliprect, 0,0);
diff --git a/src/mame/virtual.flt b/src/mame/virtual.flt
deleted file mode 100644
index 8373a776c00..00000000000
--- a/src/mame/virtual.flt
+++ /dev/null
@@ -1 +0,0 @@
-vgmplay.cpp
diff --git a/src/mame/virtual.lst b/src/mame/virtual.lst
index 27a3e40416c..beac20e0916 100644
--- a/src/mame/virtual.lst
+++ b/src/mame/virtual.lst
@@ -1,4 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
-@source:vgmplay.cpp
vgmplay
+simldv1000
+simpr8210
diff --git a/src/osd/eminline.h b/src/osd/eminline.h
index f7159a522e3..fa9d3083941 100644
--- a/src/osd/eminline.h
+++ b/src/osd/eminline.h
@@ -4,7 +4,7 @@
eminline.h
- Definitions for inline functions that can be overriden by OSD-
+ Definitions for inline functions that can be overridden by OSD-
specific code.
***************************************************************************/
diff --git a/src/osd/modules/file/windir.cpp b/src/osd/modules/file/windir.cpp
index a950c12dbe3..84cdf367928 100644
--- a/src/osd/modules/file/windir.cpp
+++ b/src/osd/modules/file/windir.cpp
@@ -139,4 +139,4 @@ directory::ptr directory::open(std::string const &dirname)
return ptr(std::move(dir));
}
-} // namesapce osd
+} // namespace osd
diff --git a/src/osd/modules/file/winrtdir.cpp b/src/osd/modules/file/winrtdir.cpp
index ac5c9ecaabb..dc0a9ae7408 100644
--- a/src/osd/modules/file/winrtdir.cpp
+++ b/src/osd/modules/file/winrtdir.cpp
@@ -139,4 +139,4 @@ directory::ptr directory::open(std::string const &dirname)
return ptr(std::move(dir));
}
-} // namesapce osd
+} // namespace osd
diff --git a/src/osd/modules/input/input_win32.cpp b/src/osd/modules/input/input_win32.cpp
index edd378be25d..a4e00eec17f 100644
--- a/src/osd/modules/input/input_win32.cpp
+++ b/src/osd/modules/input/input_win32.cpp
@@ -14,12 +14,14 @@
// standard windows headers
#define WIN32_LEAN_AND_MEAN
#include <windows.h>
+#include <tchar.h>
#undef interface
#undef min
#undef max
// MAME headers
#include "emu.h"
+#include "strconv.h"
// MAMEOS headers
#include "winmain.h"
@@ -81,13 +83,15 @@ public:
for (int keynum = 0; keynum < MAX_KEYS; keynum++)
{
input_item_id itemid = table.map_di_scancode_to_itemid(keynum);
- char name[20];
+ TCHAR keyname[100];
- // generate/fetch the name
- _snprintf(name, ARRAY_LENGTH(name), "Scan%03d", keynum);
+ // generate the name
+ if (GetKeyNameText(((keynum & 0x7f) << 16) | ((keynum & 0x80) << 17), keyname, ARRAY_LENGTH(keyname)) == 0)
+ _sntprintf(keyname, ARRAY_LENGTH(keyname), TEXT("Scan%03d"), keynum);
+ std::string name = osd::text::from_tstring(keyname);
// add the item to the device
- devinfo->device()->add_item(name, itemid, generic_button_get_state<std::uint8_t>, &devinfo->keyboard.state[keynum]);
+ devinfo->device()->add_item(name.c_str(), itemid, generic_button_get_state<std::uint8_t>, &devinfo->keyboard.state[keynum]);
}
}
diff --git a/src/osd/modules/opengl/gl_shader_tool.cpp b/src/osd/modules/opengl/gl_shader_tool.cpp
index 33cbac2d129..dedb59fbb7c 100644
--- a/src/osd/modules/opengl/gl_shader_tool.cpp
+++ b/src/osd/modules/opengl/gl_shader_tool.cpp
@@ -2,11 +2,11 @@
// copyright-holders:Sven Gothel
/***
*
- * GL Shader Tool - Convinient Basic Shader functionality
+ * GL Shader Tool - Convenient Basic Shader functionality
*
* Copyright (c) 2007, Sven Gothel
*
- * OpenGL GLSL ARB extentions:
+ * OpenGL GLSL ARB extensions:
*
* GL_ARB_shader_objects
* GL_ARB_shading_language_100
diff --git a/src/osd/modules/opengl/gl_shader_tool.h b/src/osd/modules/opengl/gl_shader_tool.h
index 921a68d96df..2e0160cf85d 100644
--- a/src/osd/modules/opengl/gl_shader_tool.h
+++ b/src/osd/modules/opengl/gl_shader_tool.h
@@ -2,14 +2,14 @@
// copyright-holders:Sven Gothel
/***
*
- * GL Shader Tool - Convinient Basic Shader functionality
+ * GL Shader Tool - Convenient Basic Shader functionality
*
* Copyright (c) 2007, Sven Gothel
* Copyright (c) 2007, MAME Team
*
* GPL version 2
*
- * OpenGL GLSL ARB extentions:
+ * OpenGL GLSL ARB extensions:
*
* GL_ARB_shader_objects
* GL_ARB_shading_language_100
@@ -28,7 +28,7 @@ extern "C" {
/***
*
- * OpenGL GLSL extentions:
+ * OpenGL GLSL extensions:
GL_ARB_shader_objects
GL_ARB_shading_language_100
GL_ARB_vertex_shader
@@ -100,7 +100,7 @@ int gl_round_to_pow2(int v);
/**
* @param obj_query Can be either GL_OBJECT_TYPE_ARB, GL_OBJECT_DELETE_STATUS_ARB, GL_OBJECT_COMPILE_STATUS_ARB,
* GL_OBJECT_LINK_STATUS_ARB, GL_OBJECT_VALIDATE_STATUS_ARB
- * Should be used after the refering action, i.e. GL_OBJECT_DELETE_STATUS_ARB after a
+ * Should be used after the referring action, i.e. GL_OBJECT_DELETE_STATUS_ARB after a
* glDeleteObjectARB call, etc.
*/
int gl_shader_check_error(GLhandleARB obj, GLenum obj_query, GLSLCheckMode m, const char *file, const int line);
diff --git a/src/osd/modules/osdmodule.h b/src/osd/modules/osdmodule.h
index 80a07164bb3..95178b27f70 100644
--- a/src/osd/modules/osdmodule.h
+++ b/src/osd/modules/osdmodule.h
@@ -4,7 +4,7 @@
osdmodule.h
- OSD module manangement
+ OSD module management
*******************************************************************c********/
diff --git a/src/osd/osdsync.h b/src/osd/osdsync.h
index 27497d674d3..71726a830cf 100644
--- a/src/osd/osdsync.h
+++ b/src/osd/osdsync.h
@@ -22,7 +22,7 @@
#define OSD_EVENT_WAIT_INFINITE (~(osd_ticks_t)0)
-/* osd_event is an opaque type which represents a setable/resetable event */
+/* osd_event is an opaque type which represents a setable/resettable event */
class osd_event
{
diff --git a/src/tools/imgtool/formats/coco_dsk.cpp b/src/tools/imgtool/formats/coco_dsk.cpp
index df15ae3d0d2..5e4a855e3f3 100644
--- a/src/tools/imgtool/formats/coco_dsk.cpp
+++ b/src/tools/imgtool/formats/coco_dsk.cpp
@@ -262,7 +262,7 @@ static FLOPPY_CONSTRUCT(coco_jvc_construct)
* $04 value
* $0B 2 owner's user number; normally 0
* $0D 1 disk attributes; normally $FF
- * $0E 2 psuedo random number for identification
+ * $0E 2 pseudo random number for identification
* $10 1 disk format; typical is 3
* %00000001 0=single side 1=double side
* %00000010 0=single density (non Coco) 1=double density
diff --git a/src/tools/imgtool/imgtool.h b/src/tools/imgtool/imgtool.h
index 8d40e109fb8..fb1b6023fff 100644
--- a/src/tools/imgtool/imgtool.h
+++ b/src/tools/imgtool/imgtool.h
@@ -48,7 +48,7 @@ enum
* marking up return codes with the source. In addition, some of the img_*
* calls are high level calls that simply image manipulation
*
- * Calls that return 'int' that are not explictly noted otherwise return
+ * Calls that return 'int' that are not explicitly noted otherwise return
* imgtool error codes
* ---------------------------------------------------------------------------
*/
@@ -124,7 +124,7 @@ namespace imgtool
object_pool *m_pool;
void *m_extra_bytes;
- // because of an idiosycracy of how imgtool::image::internal_open() works, we are only "okay to close"
+ // because of an idiosyncrasy of how imgtool::image::internal_open() works, we are only "okay to close"
// by invoking the module's close function once internal_open() succeeds. the long term solution is
// better C++ adoption (e.g. - std::unique_ptr<>, std:move() etc)
bool m_okay_to_close;
diff --git a/src/tools/imgtool/library.cpp b/src/tools/imgtool/library.cpp
index b637a0fc0ac..c534833da2e 100644
--- a/src/tools/imgtool/library.cpp
+++ b/src/tools/imgtool/library.cpp
@@ -4,7 +4,7 @@
library.cpp
- Code relevant to the Imgtool library; analgous to the MESS/MAME driver
+ Code relevant to the Imgtool library; analogous to the MESS/MAME driver
list.
****************************************************************************/
diff --git a/src/tools/imgtool/library.h b/src/tools/imgtool/library.h
index 59b75be447d..e85ce7bebaf 100644
--- a/src/tools/imgtool/library.h
+++ b/src/tools/imgtool/library.h
@@ -4,7 +4,7 @@
library.h
- Code relevant to the Imgtool library; analgous to the MESS/MAME driver
+ Code relevant to the Imgtool library; analogous to the MESS/MAME driver
list.
Unlike MESS and MAME which have static driver lists, Imgtool has a