diff options
author | 2018-03-13 07:36:43 +0100 | |
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committer | 2018-03-14 14:07:14 +0100 | |
commit | 115bb9936c5cd3faf955d7eb1e251a94e4744b7b (patch) | |
tree | f0230f547f6c750f9974c61479eef28cbe4ad571 /src/mame/drivers/xyonix.cpp | |
parent | f155992daab88ad024cec995428a67108218b51d (diff) |
Address maps macros removal, pass 1 [O. Galibert]
Diffstat (limited to 'src/mame/drivers/xyonix.cpp')
-rw-r--r-- | src/mame/drivers/xyonix.cpp | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/src/mame/drivers/xyonix.cpp b/src/mame/drivers/xyonix.cpp index a22ac8a1297..5da65c3d129 100644 --- a/src/mame/drivers/xyonix.cpp +++ b/src/mame/drivers/xyonix.cpp @@ -143,21 +143,23 @@ WRITE8_MEMBER(xyonix_state::io_w) /* Mem / Port Maps ***********************************************************/ -ADDRESS_MAP_START(xyonix_state::main_map) - AM_RANGE(0x0000, 0xbfff) AM_ROM - AM_RANGE(0xc000, 0xdfff) AM_RAM - AM_RANGE(0xe000, 0xffff) AM_RAM_WRITE(vidram_w) AM_SHARE("vidram") -ADDRESS_MAP_END - -ADDRESS_MAP_START(xyonix_state::port_map) - ADDRESS_MAP_GLOBAL_MASK(0xff) - AM_RANGE(0x20, 0x20) AM_READNOP AM_DEVWRITE("sn1", sn76496_device, write) /* SN76496 ready signal */ - AM_RANGE(0x21, 0x21) AM_READNOP AM_DEVWRITE("sn2", sn76496_device, write) - AM_RANGE(0x40, 0x40) AM_WRITENOP /* NMI ack? */ - AM_RANGE(0x50, 0x50) AM_WRITE(irqack_w) - AM_RANGE(0x60, 0x61) AM_WRITENOP /* mc6845 */ - AM_RANGE(0xe0, 0xe0) AM_READWRITE(io_r, io_w) -ADDRESS_MAP_END +void xyonix_state::main_map(address_map &map) +{ + map(0x0000, 0xbfff).rom(); + map(0xc000, 0xdfff).ram(); + map(0xe000, 0xffff).ram().w(this, FUNC(xyonix_state::vidram_w)).share("vidram"); +} + +void xyonix_state::port_map(address_map &map) +{ + map.global_mask(0xff); + map(0x20, 0x20).nopr().w("sn1", FUNC(sn76496_device::write)); /* SN76496 ready signal */ + map(0x21, 0x21).nopr().w("sn2", FUNC(sn76496_device::write)); + map(0x40, 0x40).nopw(); /* NMI ack? */ + map(0x50, 0x50).w(this, FUNC(xyonix_state::irqack_w)); + map(0x60, 0x61).nopw(); /* mc6845 */ + map(0xe0, 0xe0).rw(this, FUNC(xyonix_state::io_r), FUNC(xyonix_state::io_w)); +} /* Inputs Ports **************************************************************/ |