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author AJR <ajrhacker@users.noreply.github.com>2022-03-27 14:23:03 -0400
committer AJR <ajrhacker@users.noreply.github.com>2022-03-27 14:29:51 -0400
commitc7597225b4f0a3531d53dd806048b136956eb850 (patch)
tree3ed5b758cbd0a94a43d9c6fe9f83f402b169657d /src/devices/cpu/hpc/hpcdasm.cpp
parentc3162e739d625d31ca207ab8b591ea87c5f1fe03 (diff)
Debugger feature improvements
- Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
Diffstat (limited to 'src/devices/cpu/hpc/hpcdasm.cpp')
-rw-r--r--src/devices/cpu/hpc/hpcdasm.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/devices/cpu/hpc/hpcdasm.cpp b/src/devices/cpu/hpc/hpcdasm.cpp
index 132416cbb64..28e1941a3b5 100644
--- a/src/devices/cpu/hpc/hpcdasm.cpp
+++ b/src/devices/cpu/hpc/hpcdasm.cpp
@@ -462,10 +462,12 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
case 0x06:
stream << "ifnc";
+ bytes |= STEP_COND;
break;
case 0x07:
stream << "ifc";
+ bytes |= STEP_COND;
break;
case 0x08: case 0x09: case 0x0a: case 0x0b:
@@ -476,6 +478,7 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
case 0x10: case 0x11: case 0x12: case 0x13:
case 0x14: case 0x15: case 0x16: case 0x17:
disassemble_bit_op(stream, "ifbit", opcode & 0x07, reg, src, indir, idx);
+ bytes |= STEP_COND;
break;
case 0x18: case 0x19: case 0x1a: case 0x1b:
@@ -515,6 +518,7 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
case 0x3a:
disassemble_op(stream, "ifbit", reg, src, imm, indir, idx, false);
+ bytes |= STEP_COND;
break;
case 0x3b:
@@ -589,7 +593,7 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
case 0x8a:
case 0xaa:
disassemble_unary_op(stream, "decsz", reg, src, indir, idx, BIT(opcode, 5));
- bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
+ bytes |= STEP_COND;
break;
case 0x8b:
@@ -643,10 +647,12 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
case 0x9c: case 0xbc: case 0xdc: case 0xfc:
disassemble_op(stream, "ifeq", reg, src, imm, indir, idx, BIT(opcode, 5));
+ bytes |= STEP_COND;
break;
case 0x9d: case 0xbd: case 0xdd: case 0xfd:
disassemble_op(stream, "ifgt", reg, src, imm, indir, idx, BIT(opcode, 5));
+ bytes |= STEP_COND;
break;
case 0x9e: case 0xbe: case 0xde: case 0xfe:
@@ -691,7 +697,7 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
util::stream_format(stream, "%-8sA,[B%c].%c", "lds",
BIT(opcode, 1) ? '-' : '+',
BIT(opcode, 5) ? 'w' : 'b');
- bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
+ bytes |= STEP_COND;
break;
case 0xd0: case 0xd2:
@@ -706,7 +712,7 @@ offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_
util::stream_format(stream, "%-8sA,[B%c].%c", "xs",
BIT(opcode, 1) ? '-' : '+',
BIT(opcode, 5) ? 'w' : 'b');
- bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
+ bytes |= STEP_COND;
break;
case 0xd1: case 0xd3: