diff options
author | 2020-06-23 14:50:59 +1000 | |
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committer | 2020-06-23 14:50:59 +1000 | |
commit | 1bf23e71520ae393d9cf147bb35824331cd7b44d (patch) | |
tree | 7717dff19d916ecde8595bc417b45e4993c2fa7e | |
parent | 177af2ed670565422b2fd7863da48bbd50aef232 (diff) |
Revert "drcbex64: fix pushf/popf bug (nw)"
This reverts commit 177af2ed670565422b2fd7863da48bbd50aef232.
-rw-r--r-- | src/devices/cpu/drcbex64.cpp | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp index 7738b02c169..c6222d2050c 100644 --- a/src/devices/cpu/drcbex64.cpp +++ b/src/devices/cpu/drcbex64.cpp @@ -2695,7 +2695,7 @@ void drcbe_x64::op_getflgs(Assembler &a, const instruction &inst) // default cases default: - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(eax); // pop eax a.and_(eax, flagmask); // and eax,flagmask a.movzx(dstreg, byte_ptr(rbp, rax, 0, offset_from_rbp(&m_near.flagsmap[0]))); // movzx dstreg,[flags_map] @@ -2730,7 +2730,7 @@ void drcbe_x64::op_save(Assembler &a, const instruction &inst) emit_mov_r64_imm(a, rcx, (uintptr_t)dstp.memory()); // mov rcx,dstp // copy flags - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(rax); // pop rax a.and_(eax, 0x8c5); // and eax,0x8c5 a.mov(al, ptr(rbp, rax, 0, offset_from_rbp(&m_near.flagsmap[0]))); // mov al,[flags_map] @@ -2826,7 +2826,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst) // copy flags a.movzx(eax, byte_ptr(rcx, offsetof(drcuml_machine_state, flags))); // movzx eax,state->flags a.push(ptr(rbp, rax, 3, offset_from_rbp(&m_near.flagsunmap[0]))); // push flags_unmap[eax*8] - a.popfq(); // popf + a.popf(); // popf } @@ -4038,7 +4038,7 @@ void drcbe_x64::op_mulu(Assembler &a, const instruction &inst) if (zsflags != 0) { if (vflag) - a.pushfq(); // pushf + a.pushf(); // pushf if (compute_hi) { if (zsflags == FLAG_Z) @@ -4059,11 +4059,11 @@ void drcbe_x64::op_mulu(Assembler &a, const instruction &inst) // we rely on the fact that OF is cleared by all logical operations above if (vflag) { - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(rax); // pop rax a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84 a.or_(ptr(rsp), rax); // or [rsp],rax - a.popfq(); // popf + a.popf(); // popf } } } @@ -4093,7 +4093,7 @@ void drcbe_x64::op_mulu(Assembler &a, const instruction &inst) if (zsflags != 0) { if (vflag) - a.pushfq(); // pushf + a.pushf(); // pushf if (compute_hi) { if (zsflags == FLAG_Z) @@ -4114,11 +4114,11 @@ void drcbe_x64::op_mulu(Assembler &a, const instruction &inst) // we rely on the fact that OF is cleared by all logical operations above if (vflag) { - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(rax); // pop rax a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84 a.or_(ptr(rsp), rax); // or [rsp],rax - a.popfq(); // popf + a.popf(); // popf } } } @@ -4197,7 +4197,7 @@ void drcbe_x64::op_muls(Assembler &a, const instruction &inst) if (zsflags != 0) { if (vflag) - a.pushfq(); // pushf + a.pushf(); // pushf if (compute_hi) { if (zsflags == FLAG_Z) @@ -4218,11 +4218,11 @@ void drcbe_x64::op_muls(Assembler &a, const instruction &inst) // we rely on the fact that OF is cleared by all logical operations above if (vflag) { - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(rax); // pop rax a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84 a.or_(ptr(rsp), rax); // or [rsp],rax - a.popfq(); // popf + a.popf(); // popf } } } @@ -4277,7 +4277,7 @@ void drcbe_x64::op_muls(Assembler &a, const instruction &inst) if (zsflags != 0) { if (vflag) - a.pushfq(); // pushf + a.pushf(); // pushf if (compute_hi) { if (zsflags == FLAG_Z) @@ -4298,11 +4298,11 @@ void drcbe_x64::op_muls(Assembler &a, const instruction &inst) // we rely on the fact that OF is cleared by all logical operations above if (vflag) { - a.pushfq(); // pushf + a.pushf(); // pushf a.pop(rax); // pop rax a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84 a.or_(ptr(rsp), rax); // or [rsp],rax - a.popfq(); // popf + a.popf(); // popf } } } |