diff options
author | 2022-10-12 17:40:25 +0200 | |
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committer | 2022-10-12 17:42:32 +0200 | |
commit | d6e8a43b812828f324aa998cb5037b52fb540a67 (patch) | |
tree | f17d7e623afcdbfaf2cb31fca37f89792430231c | |
parent | 979f0125dd5ed83470dbd52600b7c86f0c8d2186 (diff) |
upd7810: Fixed serial input/output
-rw-r--r-- | src/devices/cpu/upd7810/upd7810.cpp | 34 |
1 files changed, 14 insertions, 20 deletions
diff --git a/src/devices/cpu/upd7810/upd7810.cpp b/src/devices/cpu/upd7810/upd7810.cpp index 6fb869fc7f0..929070e61fc 100644 --- a/src/devices/cpu/upd7810/upd7810.cpp +++ b/src/devices/cpu/upd7810/upd7810.cpp @@ -1270,6 +1270,8 @@ void upd7810_device::upd7810_sio_input() m_rxcnt = 12; break; } + + m_rxcnt--; // reduce by one since we already received the start bit at this point } else /* TSK bit set ? */ @@ -1443,32 +1445,24 @@ void upd7810_device::handle_timers(int cycles) } /**** SIO ****/ - switch (SMH & 0x03) + // we only handle "internal clock" serial mode here + if (((SMH & 0x03) == 0x01) || ((SMH & 0x03) == 0x02)) { - case 0x00: /* interval timer F/F */ - break; - case 0x01: /* internal clock divided by 384 */ - OVCS += cycles; - while (OVCS >= 384/3) - { - OVCS -= 384/3; - if (0 == (EDGES ^= 1)) - upd7810_sio_input(); - else - upd7810_sio_output(); - } - break; - case 0x02: /* internal clock divided by 24 */ + const int divider[] = { 0, 384, 24, 0 }; + const int prescale[] = { 1, 1, 16, 64 }; + const int interval = divider[SMH & 0x03] / 3 * prescale[SML & 0x03]; + OVCS += cycles; - while (OVCS >= 24/3) + + while (OVCS >= interval / 2) { - OVCS -= 24/3; + OVCS -= (interval / 2); + if (0 == (EDGES ^= 1)) - upd7810_sio_input(); + upd7810_sio_input(); // rising edge else - upd7810_sio_output(); + upd7810_sio_output(); // falling edge } - break; } /**** ADC ****/ |