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author AJR <ajrhacker@users.noreply.github.com>2020-04-13 12:12:18 -0400
committer AJR <ajrhacker@users.noreply.github.com>2020-04-13 12:12:18 -0400
commit64c4f0d3ffffcbfc24a87ff373ccf4c683546103 (patch)
tree2ac03bcbc5fb80cc806c4b61d0afdbe62167ac84
parentdc6bb6d07db9ea311d99714be09a9ee62a9685bc (diff)
scn_pci.cpp: Note on emulation (nw)
-rw-r--r--src/devices/machine/scn_pci.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/devices/machine/scn_pci.cpp b/src/devices/machine/scn_pci.cpp
index 2f34f1a9be5..73ef2590e66 100644
--- a/src/devices/machine/scn_pci.cpp
+++ b/src/devices/machine/scn_pci.cpp
@@ -40,6 +40,10 @@
registers are often mapped to separate addresses when placed on an
Intel-type bus, like the MC6850 ACIA but with reads below writes.
+ The clock outputs have not been tested. The documentation for these is
+ not very descriptive, and the resynchronization of the RxC output in
+ 1X mode is more or less a conjecture.
+
***************************************************************************/
#include "emu.h"