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author cracyc <cracyc@users.noreply.github.com>2022-06-21 15:12:53 -0500
committer cracyc <cracyc@users.noreply.github.com>2022-06-21 15:12:53 -0500
commit61b9ae3a5b4386a1525c79208be7304fad9f05ee (patch)
tree2e79565cd9689bf73440ea0a129f4ab64a090622
parent89d81a5b5163d4ee4fc3f6fc0cc469e066611b13 (diff)
pwrview: fdc work
upd765: fix command decoding
-rw-r--r--src/devices/machine/upd765.cpp31
-rw-r--r--src/mame/drivers/pwrview.cpp25
2 files changed, 38 insertions, 18 deletions
diff --git a/src/devices/machine/upd765.cpp b/src/devices/machine/upd765.cpp
index b65afca6de1..39e0a402fd6 100644
--- a/src/devices/machine/upd765.cpp
+++ b/src/devices/machine/upd765.cpp
@@ -1325,17 +1325,31 @@ int upd765_family_device::check_command()
// MSDOS 6.22 format uses 0xcd to format a track, which makes one
// think only the bottom 5 bits are decoded.
+ // The real 765 completely decodes the commands that don't have
+ // variable upper bits. Some later superio chips don't.
+ // The MCS Powerview depends on this.
- switch(command[0] & 0x1f) {
- case 0x02:
- return command_pos == 9 ? C_READ_TRACK : C_INCOMPLETE;
-
+ switch(command[0]) {
case 0x03:
return command_pos == 3 ? C_SPECIFY : C_INCOMPLETE;
case 0x04:
return command_pos == 2 ? C_SENSE_DRIVE_STATUS : C_INCOMPLETE;
+ case 0x07:
+ return command_pos == 2 ? C_RECALIBRATE : C_INCOMPLETE;
+
+ case 0x08:
+ return C_SENSE_INTERRUPT_STATUS;
+
+ case 0x0f:
+ return command_pos == 3 ? C_SEEK : C_INCOMPLETE;
+ }
+
+ switch(command[0] & 0x1f) {
+ case 0x02:
+ return command_pos == 9 ? C_READ_TRACK : C_INCOMPLETE;
+
case 0x05:
case 0x09:
return command_pos == 9 ? C_WRITE_DATA : C_INCOMPLETE;
@@ -1344,21 +1358,12 @@ int upd765_family_device::check_command()
case 0x0c:
return command_pos == 9 ? C_READ_DATA : C_INCOMPLETE;
- case 0x07:
- return command_pos == 2 ? C_RECALIBRATE : C_INCOMPLETE;
-
- case 0x08:
- return C_SENSE_INTERRUPT_STATUS;
-
case 0x0a:
return command_pos == 2 ? C_READ_ID : C_INCOMPLETE;
case 0x0d:
return command_pos == 6 ? C_FORMAT_TRACK : C_INCOMPLETE;
- case 0x0f:
- return command_pos == 3 ? C_SEEK : C_INCOMPLETE;
-
case 0x11:
return command_pos == 9 ? C_SCAN_EQUAL : C_INCOMPLETE;
diff --git a/src/mame/drivers/pwrview.cpp b/src/mame/drivers/pwrview.cpp
index 93bbaaf677d..a92c6d2c5ca 100644
--- a/src/mame/drivers/pwrview.cpp
+++ b/src/mame/drivers/pwrview.cpp
@@ -27,6 +27,7 @@ public:
m_pit(*this, "pit"),
m_uart(*this, "uart"),
m_sio(*this, "sio"),
+ m_fdc(*this, "fdc"),
m_bios(*this, "bios"),
m_ram(*this, "ram"),
m_biosbank(*this, "bios_bank"),
@@ -76,6 +77,7 @@ private:
required_device<pit8253_device> m_pit;
required_device<i8251_device> m_uart;
required_device<z80sio_device> m_sio;
+ required_device<upd765a_device> m_fdc;
required_memory_region m_bios;
required_shared_ptr<u16> m_ram;
required_device<address_map_bank_device> m_biosbank;
@@ -90,6 +92,7 @@ private:
u16 m_vramwin[2];
bool m_dtr, m_rtsa, m_rtsb;
bool m_rts;
+ bool m_enable_fdc;
emu_timer *m_tmr0ext;
emu_timer *m_tmrkbd;
};
@@ -115,6 +118,8 @@ void pwrview_state::machine_reset()
m_biosbank->set_bank(0);
m_uart->write_cts(0);
m_tmrkbd->adjust(attotime::from_hz(9600*16), 0, attotime::from_hz(9600*16)); // kbd baud is guess
+ m_enable_fdc = false;
+ m_fdc->set_floppy(m_fdc->subdevice<floppy_connector>("0")->get_device());
}
TIMER_CALLBACK_MEMBER(pwrview_state::update_tmr0)
@@ -331,6 +336,15 @@ void pwrview_state::unk3_w(offs_t offset, u8 data)
m_pit->set_clockin(2, 0);
}
break;
+ case 1:
+ if(BIT(data, 4))
+ {
+ m_enable_fdc = true;
+ m_fdc->soft_reset();
+ }
+ else
+ m_enable_fdc = false;
+ break;
}
}
@@ -468,9 +482,9 @@ void pwrview_state::pwrview_io(address_map &map)
map(0xc08a, 0xc08a).rw("crtc", FUNC(hd6845s_device::register_r), FUNC(hd6845s_device::register_w));
map(0xc280, 0xc287).rw(FUNC(pwrview_state::unk3_r), FUNC(pwrview_state::unk3_w)).umask16(0x00ff);
map(0xc288, 0xc28f).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff);
- map(0xc2a0, 0xc2a7).rw("sio", FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
+ map(0xc2a0, 0xc2a7).rw(m_sio, FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
map(0xc2c0, 0xc2c3).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff);
- map(0xc2e0, 0xc2e3).m("fdc", FUNC(upd765a_device::map)).umask16(0x00ff);
+ map(0xc2e0, 0xc2e3).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff);
map(0xc2e4, 0xc2e5).ram();
map(0xc2e6, 0xc2e6).r(FUNC(pwrview_state::pitclock_r));
}
@@ -502,9 +516,9 @@ void pwrview_state::pwrview(machine_config &config)
m_pit->out_handler<1>().append([this](int state){ if (!m_rtsb) m_sio->txcb_w(state); });
// floppy disk controller
- UPD765A(config, "fdc", 8'000'000, true, true); // Rockwell R7675P
- //fdc.intrq_wr_callback().set("pic1", FUNC(pic8259_device::ir6_w));
- //fdc.drq_wr_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq1_w));
+ UPD765A(config, m_fdc, 8'000'000, false, false); // Rockwell R6765P
+ m_fdc->intrq_wr_callback().set([this](int state){ if(m_enable_fdc) m_maincpu->int3_w(state); });
+ m_fdc->drq_wr_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq0_w));
FLOPPY_CONNECTOR(config, "fdc:0", pwrview_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats);
FLOPPY_CONNECTOR(config, "fdc:1", pwrview_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats);
@@ -514,6 +528,7 @@ void pwrview_state::pwrview(machine_config &config)
m_uart->dtr_handler().set([this](bool state){ m_dtr = state; });
m_uart->rts_handler().set([this](bool state){ m_rts = state; });
+
Z80SIO(config, m_sio, 4000000); // Z8442BPS (SIO/2)
m_sio->out_int_callback().set(m_maincpu, FUNC(i80186_cpu_device::int2_w));
m_sio->out_txda_callback().set([this](int state){ m_sio->rxa_w(state); }); // TODO: find loopback control reg