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author hap <happppp@users.noreply.github.com>2022-07-18 18:40:29 +0200
committer hap <happppp@users.noreply.github.com>2022-07-18 18:40:44 +0200
commit56768ed3ab3ab359b3e0a77aa10bb54a1207517e (patch)
treea97a1a52d17f7463b4061b5624c98bc1e3d0bc39
parentf99970bb4e2583286abd15b90222101b4b5c45a5 (diff)
cosmac: add 1804 counter timer
-rw-r--r--src/devices/cpu/cosmac/cosmac.cpp139
-rw-r--r--src/devices/cpu/cosmac/cosmac.h53
-rw-r--r--src/mame/hegenerglaser/brikett.cpp6
-rw-r--r--src/mame/hegenerglaser/mm1.cpp29
-rw-r--r--src/mame/hegenerglaser/mm2.cpp110
-rw-r--r--src/mame/layout/mephisto_mirage.lay2
6 files changed, 225 insertions, 114 deletions
diff --git a/src/devices/cpu/cosmac/cosmac.cpp b/src/devices/cpu/cosmac/cosmac.cpp
index af5327c9e93..ee52a0c16b7 100644
--- a/src/devices/cpu/cosmac/cosmac.cpp
+++ b/src/devices/cpu/cosmac/cosmac.cpp
@@ -10,7 +10,7 @@ TODO:
- is it useful to emulate I and N registers or can they just be defined as (m_op >> x & 0xf)?
- 1804/5/6: extended opcode timing is wrong, multiple execute states
- 1804/5/6: add more extended opcodes (05/06 supports more than 04)
-- 1804/5/6: add counter/timer
+- 1804/5/6: other counter modes
- 1804/5: add internal address map (ram/rom)
**********************************************************************/
@@ -251,10 +251,10 @@ cosmac_device::ophandler cdp1802_device::get_ophandler(uint16_t opcode) const
const cosmac_device::ophandler cdp1804_device::s_opcodetable_ex[256] =
{
- &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und,
- &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::ldc, &cdp1804_device::und,
- &cdp1804_device::gec, &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und,
- &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und,
+ &cdp1804_device::stpc, &cdp1804_device::und, &cdp1804_device::spm2, &cdp1804_device::scm2,
+ &cdp1804_device::spm1, &cdp1804_device::scm1, &cdp1804_device::ldc, &cdp1804_device::stm,
+ &cdp1804_device::gec, &cdp1804_device::und, &cdp1804_device::xie, &cdp1804_device::xid,
+ &cdp1804_device::cie, &cdp1804_device::cid, &cdp1804_device::und, &cdp1804_device::und,
&cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und,
&cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und, &cdp1804_device::und,
@@ -371,7 +371,6 @@ cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, co
m_write_dma(*this),
m_write_sc(*this),
m_write_tpb(*this),
- m_op(0),
m_state(cosmac_state::STATE_1_INIT),
m_mode(cosmac_mode::RESET),
m_pmode(cosmac_mode::RUN),
@@ -451,6 +450,34 @@ cdp1806_device::cdp1806_device(const machine_config &mconfig, const char *tag, d
void cosmac_device::device_start()
{
+ // init uninitialized
+ m_pc = 0;
+ m_op = 0;
+ m_flagsio = 0;
+
+ m_d = 0;
+ m_b = 0;
+ m_p = 0;
+ m_x = 0;
+ m_n = 0;
+ m_i = 0;
+ m_t = 0;
+
+ m_df = 0;
+ m_ie = 0;
+ m_cie = 0;
+ m_xie = 0;
+ m_cil = 0;
+ m_q = 0;
+
+ for (uint16_t &r : m_r)
+ r = 0;
+
+ m_cnt_mode = 0;
+ m_cnt_load = 0;
+ m_cnt_count = 0;
+ m_cnt_timer = timer_alloc(FUNC(cosmac_device::cnt_timerout), this);
+
// resolve callbacks
m_read_wait.resolve();
m_read_clear.resolve();
@@ -508,7 +535,13 @@ void cosmac_device::device_start()
save_item(NAME(m_t));
save_item(NAME(m_df));
save_item(NAME(m_ie));
+ save_item(NAME(m_cie));
+ save_item(NAME(m_xie));
+ save_item(NAME(m_cil));
save_item(NAME(m_q));
+ save_item(NAME(m_cnt_mode));
+ save_item(NAME(m_cnt_load));
+ save_item(NAME(m_cnt_count));
// set our instruction counter
set_icountptr(m_icount);
@@ -521,13 +554,7 @@ void cosmac_device::device_start()
void cosmac_device::device_reset()
{
- m_ie = 0;
- set_q_flag(0);
- m_df = 0;
- m_p = 0;
-
- for (uint16_t &r : m_r)
- r = machine().rand() & 0xffff;
+ // not here, it's done with WAIT and CLEAR lines
}
@@ -1053,7 +1080,7 @@ inline void cosmac_device::fetch_instruction()
// reset_state - handle reset state
//-------------------------------------------------
-inline void cosmac_device::reset_state()
+void cosmac_device::reset_state()
{
m_state = cosmac_state::STATE_1_INIT;
@@ -1067,6 +1094,16 @@ inline void cosmac_device::reset_state()
output_state_code();
}
+void cdp1804_device::reset_state()
+{
+ m_xie = 1;
+ m_cie = 1;
+ m_cil = 0;
+ stop_count();
+
+ cosmac_device::reset_state();
+}
+
//-------------------------------------------------
// initialize - handle initialization state
@@ -1074,6 +1111,7 @@ inline void cosmac_device::reset_state()
inline void cosmac_device::initialize()
{
+ T = (X << 4) | P;
X = 0;
P = 0;
R[0] = 0;
@@ -1123,7 +1161,7 @@ inline void cosmac_device::execute_instruction()
{
m_state = cosmac_state::STATE_2_DMA_OUT;
}
- else if (IE && m_irq)
+ else if (check_irq())
{
m_state = cosmac_state::STATE_3_INT;
}
@@ -1155,7 +1193,7 @@ inline void cosmac_device::dma_input()
{
m_state = cosmac_state::STATE_2_DMA_OUT;
}
- else if (IE && m_irq)
+ else if (check_irq())
{
m_state = cosmac_state::STATE_3_INT;
}
@@ -1193,7 +1231,7 @@ inline void cosmac_device::dma_output()
{
m_state = cosmac_state::STATE_2_DMA_OUT;
}
- else if (IE && m_irq)
+ else if (check_irq())
{
m_state = cosmac_state::STATE_3_INT;
}
@@ -1397,7 +1435,7 @@ void cosmac_device::lsie() { long_skip(IE); }
// control instructions opcode handlers
void cosmac_device::idl() { /* idle */ }
void cosmac_device::nop() { }
-void cosmac_device::und() { /* undefined opcode in CDP1801 */ }
+void cosmac_device::und() { /* undefined opcode */ }
void cosmac_device::sep() { P = N; }
void cosmac_device::sex() { X = N; }
void cosmac_device::seq() { set_q_flag(1); }
@@ -1454,11 +1492,68 @@ void cosmac_device::rsxd() { RAM_W(R[X], R[N] & 0xff); R[X]--; RAM_W(R[X], R[N]
void cosmac_device::rnx() { R[X] = R[N]; }
-void cosmac_device::bci() { short_branch(1); } // wrong! tests CI flag
-void cosmac_device::bxi() { short_branch(0); } // wrong! tests XI flag
+void cosmac_device::bci() { short_branch(m_cil); m_cil = 0; }
+void cosmac_device::bxi() { short_branch(m_irq); }
+
+void cosmac_device::xie() { m_xie = 1; }
+void cosmac_device::xid() { m_xie = 0; }
+void cosmac_device::cie() { m_cie = 1; }
+void cosmac_device::cid() { m_cie = 0; }
-void cosmac_device::ldc() { /* logerror("LDC counter set: %X\n", D); */ }
-void cosmac_device::gec() { D = machine().rand() & 0xf; } // wrong!
+void cosmac_device::scm1() { m_cnt_mode = 2; }
+void cosmac_device::scm2() { m_cnt_mode = 3; }
+void cosmac_device::spm1() { m_cnt_mode = 4; }
+void cosmac_device::spm2() { m_cnt_mode = 5; }
+
+void cosmac_device::gec() { D = get_count(); }
+void cosmac_device::stpc() { stop_count(); }
+
+void cosmac_device::stm()
+{
+ if (m_cnt_mode != 1)
+ {
+ // start clocking counter in timer mode
+ m_cnt_mode = 1;
+ int count = (m_cnt_count == 0) ? 0x100 : m_cnt_count;
+ m_cnt_timer->adjust(attotime::from_ticks(0x100 * count, clock()));
+ }
+}
+
+void cosmac_device::ldc()
+{
+ m_cnt_load = D;
+ if (m_cnt_mode == 0)
+ {
+ m_cnt_count = m_cnt_load;
+ m_cil = 0;
+ }
+}
+
+uint8_t cosmac_device::get_count()
+{
+ if (m_cnt_mode == 1)
+ {
+ // get current count of active timer (rounded up)
+ uint64_t ticks = m_cnt_timer->remaining().as_ticks(clock());
+ return (ticks >> 8) + ((ticks & 0xff) ? 1 : 0);
+ }
+ else
+ return m_cnt_count;
+}
+
+void cosmac_device::stop_count()
+{
+ m_cnt_count = get_count();
+ m_cnt_mode = 0;
+ m_cnt_timer->adjust(attotime::never);
+}
+
+TIMER_CALLBACK_MEMBER(cosmac_device::cnt_timerout)
+{
+ m_cil = 1;
+ int count = (m_cnt_load == 0) ? 0x100 : m_cnt_load;
+ m_cnt_timer->adjust(attotime::from_ticks(0x100 * count, clock()));
+}
// CDP1805/06 additional extended opcodes
// TODO
diff --git a/src/devices/cpu/cosmac/cosmac.h b/src/devices/cpu/cosmac/cosmac.h
index 314bad599e8..2d29a10ce44 100644
--- a/src/devices/cpu/cosmac/cosmac.h
+++ b/src/devices/cpu/cosmac/cosmac.h
@@ -218,13 +218,14 @@ protected:
// execution logic
inline void run_state();
inline void debug();
- inline void reset_state();
+ virtual void reset_state();
inline void initialize();
inline void fetch_instruction();
inline void execute_instruction();
inline void dma_input();
inline void dma_output();
inline void interrupt();
+ virtual bool check_irq() { return m_ie && m_irq; }
inline void sample_wait_clear();
inline void sample_ef_lines();
virtual void output_state_code();
@@ -348,6 +349,18 @@ protected:
void ldc();
void gec();
+ void stpc();
+ void stm();
+ void scm1();
+ void scm2();
+ void spm1();
+ void spm2();
+
+ void xie();
+ void xid();
+ void cie();
+ void cid();
+
const address_space_config m_program_config;
const address_space_config m_io_config;
@@ -384,9 +397,9 @@ protected:
};
// internal state
- uint16_t m_pc; // fake program counter
- uint16_t m_op; // current opcode
- uint8_t m_flagsio; // flags storage for state saving
+ uint16_t m_pc; // fake program counter
+ uint16_t m_op; // current opcode
+ uint8_t m_flagsio; // flags storage for state saving
cosmac_state m_state; // state
cosmac_mode m_mode; // control mode
cosmac_mode m_pmode; // previous control mode
@@ -399,20 +412,32 @@ protected:
int m_ef_line[4]; // external flags
// registers
- uint8_t m_d; // data register (accumulator)
- uint8_t m_b; // auxiliary holding register
- uint16_t m_r[16]; // scratchpad registers
- uint8_t m_p; // designates which register is Program Counter
- uint8_t m_x; // designates which register is Data Pointer
- uint8_t m_n; // low-order instruction digit
- uint8_t m_i; // high-order instruction digit
- uint8_t m_t; // temporary register
+ uint8_t m_d; // data register (accumulator)
+ uint8_t m_b; // auxiliary holding register
+ uint16_t m_r[16]; // scratchpad registers
+ uint8_t m_p; // designates which register is Program Counter
+ uint8_t m_x; // designates which register is Data Pointer
+ uint8_t m_n; // low-order instruction digit
+ uint8_t m_i; // high-order instruction digit
+ uint8_t m_t; // temporary register
// flags
int m_df; // data flag (ALU carry)
- int m_ie; // interrupt enable
+ int m_ie; // master interrupt enable
+ int m_cie; // counter interrupt enable
+ int m_xie; // external interrupt enable
+ int m_cil; // counter interrupt latch
int m_q; // output flip-flop
+ uint8_t m_cnt_mode; // counter mode
+ uint8_t m_cnt_load; // counter reload value
+ uint8_t m_cnt_count; // active counter value
+ emu_timer *m_cnt_timer; // counter mode 1 timer handler
+
+ TIMER_CALLBACK_MEMBER(cnt_timerout);
+ uint8_t get_count();
+ void stop_count();
+
// internal stuff
int m_icount;
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cache;
@@ -481,6 +506,8 @@ protected:
virtual cosmac_device::ophandler get_ophandler(uint16_t opcode) const override;
virtual bool has_extended_opcodes() override { return true; }
+ virtual bool check_irq() override { return m_ie && ((m_irq && m_xie) || (m_cil && m_cie)); }
+ virtual void reset_state() override;
private:
static const ophandler s_opcodetable_ex[256];
diff --git a/src/mame/hegenerglaser/brikett.cpp b/src/mame/hegenerglaser/brikett.cpp
index 492baa41c5c..57dea5566de 100644
--- a/src/mame/hegenerglaser/brikett.cpp
+++ b/src/mame/hegenerglaser/brikett.cpp
@@ -203,7 +203,7 @@ INTERRUPT_GEN_MEMBER(brikett_state::interrupt)
READ_LINE_MEMBER(brikett_state::clear_r)
{
- // CLEAR low + RESET high resets cpu
+ // CLEAR low + WAIT high resets cpu
int ret = (m_reset) ? 0 : 1;
m_reset = false;
return ret;
@@ -542,6 +542,7 @@ ROM_START( mephisto2a ) // cartridge s/n 0037011
ROM_LOAD("4005_02_353_01.3", 0x2000, 0x1000, CRC(1f933d33) SHA1(5d5bfd40158354830c434f4c8b4ff1cac8ab4f5c) ) // "
ROM_END
+
ROM_START( mephisto2e )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("251-11.1", 0x0000, 0x1000, CRC(3c8e2631) SHA1(5960e47f0659b1e5f164107069738e730e3ff255) ) // M2532A
@@ -590,7 +591,8 @@ CONS( 1982, mephistoj, 0, 0, mephistoj, mephistoj, brikett_state, emp
CONS( 1981, mephisto2, 0, 0, mephisto2, mephisto, brikett_state, empty_init, "Hegener + Glaser", "Mephisto II (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1981, mephisto2a, mephisto2, 0, mephisto2, mephisto, brikett_state, empty_init, "Hegener + Glaser", "Mephisto II (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1981, mephisto2e, mephisto2, 0, mephisto2e, mephisto2e, brikett_state, empty_init, "Hegener + Glaser", "Mephisto ESB II", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+
+CONS( 1981, mephisto2e, 0, 0, mephisto2e, mephisto2e, brikett_state, empty_init, "Hegener + Glaser", "Mephisto ESB II", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1983, mephisto3, 0, 0, mephisto3, mephisto3, brikett_state, empty_init, "Hegener + Glaser", "Mephisto III (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1983, mephisto3a, mephisto3, 0, mephisto3, mephisto3, brikett_state, empty_init, "Hegener + Glaser", "Mephisto III (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/hegenerglaser/mm1.cpp b/src/mame/hegenerglaser/mm1.cpp
index b7e71e50ca4..b4217523164 100644
--- a/src/mame/hegenerglaser/mm1.cpp
+++ b/src/mame/hegenerglaser/mm1.cpp
@@ -5,7 +5,7 @@
Mephisto MM I, the first H+G slide-in chesscomputer module
-The module was included with either the Modular or Modular Exclusive chessboards.
+The module was included with either the Modular or Exclusive chessboards.
Initially, the module itself didn't have a name. It was only later in retrospect,
after the release of Modul MM II that it became known as the MM I. The program is
actually more like a prequel of III-S Glasgow, same chess engine authors too.
@@ -25,13 +25,12 @@ LCD module is assumed to be same as MM II and others.
Mephisto Mirage is on similar hardware, but it's a single module (LCD is included
on the main PCB). Like MM I, the module by itself didn't have a name at first.
-The boards that were included with the product were either Mephisto Mobil, or
-Mephisto Mirage (both ledless, push-sensory). The module also works on the more
-expensive wooden chessboards like Modular Exclusive or Muenchen, as long as it
-supports the higher voltage.
+The boards that were included with the product were either Mephisto Mirage
+(button sensors, no leds), or Mephisto Mobil (no sensors, no leds). The module
+also works on the more expensive wooden chessboards like Modular, Exclusive or
+Muenchen, as long as it supports the higher voltage.
TODO:
-- remove external interrupt hack when timer interrupt is added to CDP1806 device
- mmirage unknown_w
- mm1 unknown expansion rom at $c000?
- add mm1 STP/ON buttons? (they're off/on, game continues when ON again)
@@ -91,7 +90,6 @@ private:
void mm1_io(address_map &map);
// I/O handlers
- INTERRUPT_GEN_MEMBER(interrupt);
void update_display();
DECLARE_READ_LINE_MEMBER(clear_r);
void sound_w(u8 data);
@@ -121,14 +119,9 @@ void mm1_state::machine_reset()
I/O
******************************************************************************/
-INTERRUPT_GEN_MEMBER(mm1_state::interrupt)
-{
- m_maincpu->set_input_line(COSMAC_INPUT_LINE_INT, HOLD_LINE);
-}
-
READ_LINE_MEMBER(mm1_state::clear_r)
{
- // CLEAR low + RESET high resets cpu
+ // CLEAR low + WAIT high resets cpu
int ret = (m_reset) ? 0 : 1;
m_reset = false;
return ret;
@@ -239,7 +232,7 @@ static INPUT_PORTS_START( mirage )
PORT_START("FAKE") // module came with buttons sensorboard by default
PORT_CONFNAME( 0x01, 0x00, "Board Sensors" ) PORT_CHANGED_MEMBER(DEVICE_SELF, mm1_state, mirage_switch_sensor_type, 0)
- PORT_CONFSETTING( 0x00, "Buttons (Mobil)" )
+ PORT_CONFSETTING( 0x00, "Buttons (Mirage)" )
PORT_CONFSETTING( 0x01, "Magnets (Modular)" )
INPUT_PORTS_END
@@ -265,10 +258,6 @@ void mm1_state::mirage(machine_config &config)
m_maincpu->ef3_cb().set(FUNC(mm1_state::keypad_r<0>));
m_maincpu->ef4_cb().set(FUNC(mm1_state::keypad_r<1>));
- // wrong! uses internal timer interrupt
- const attotime irq_period = attotime::from_ticks(8 * 32 * 0x71, 8_MHz_XTAL); // LDC = 0x71
- m_maincpu->set_periodic_int(FUNC(mm1_state::interrupt), irq_period);
-
MEPHISTO_BUTTONS_BOARD(config, m_board); // see mirage_switch_sensor_type
m_board->set_delay(attotime::from_msec(200));
@@ -289,10 +278,6 @@ void mm1_state::mm1(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &mm1_state::mm1_map);
m_maincpu->q_cb().set("display", FUNC(mephisto_display1_device::strobe_w));
- // wrong! uses internal timer interrupt
- const attotime irq_period = attotime::from_ticks(8 * 32 * 0xfa, 8_MHz_XTAL); // LDC = 0xFA
- m_maincpu->set_periodic_int(FUNC(mm1_state::interrupt), irq_period);
-
MEPHISTO_SENSORS_BOARD(config.replace(), m_board);
m_board->set_delay(attotime::from_msec(200));
diff --git a/src/mame/hegenerglaser/mm2.cpp b/src/mame/hegenerglaser/mm2.cpp
index 42e58581206..983b84a1b11 100644
--- a/src/mame/hegenerglaser/mm2.cpp
+++ b/src/mame/hegenerglaser/mm2.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Dirk Verwiebe, Cowering, hap
/******************************************************************************
-Mephisto 4 + 5 Chess Computer
+Mephisto MM II series chesscomputers
2007 Dirk V.
TODO:
@@ -13,7 +13,40 @@ TODO:
===============================================================================
-Hardware notes:
+For rebel5 and newer, the chess engine is by Ed Schröder. Older chesscomputers in
+this driver were authored by Ulf Rathsman.
+
+The MM II program was also licensed to Daimler-Benz, who gave away several custom
+chesscomputers as a parting gift to retiring executives. The hardware is same as MM II.
+see(1): http://chesseval.com/ChessEvalJournal/DaimlerBenz.htm
+see(2): http://chesseval.com/RareBoard/DaimlerBenzBoard.htm
+
+MM III was never released officially. Rebell 5,0 is commonly known as MM III, but the
+real one didn't get further than a prototype.
+
+Mephisto 4 Turbo Kit 18mhz - (mm4tk)
+ This is a replacement rom combining the turbo kit initial rom with the original MM IV.
+ The Turbo Kit powers up to it's tiny rom, copies itself to ram, banks in normal rom,
+ copies that to faster SRAM, then patches the checksum and the LED blink delays.
+ If someone else wants to code up the power up banking, feel free
+
+ There is an undumped MM V Turbo Kit, which will be the exact same except for location of
+ the patches. The mm5tk just needs the normal mm5 ROM swapped out for that one to
+ blinks the LEDs a little slower.
+
+ -- Cowering (2011)
+
+The MM V prototype was the program that Ed Schröder participated with as "Rebel" at the
+1989 WMCCC in Portorose. It was used with the TK20 TurboKit.
+For more information, see: http://chesseval.com/ChessEvalJournal/PrototypeMMV.htm
+
+MM VI (Saitek, 1994) is on different hardware, H8 CPU.
+
+===============================================================================
+
+MM IV + MM V hardware notes
+
+Overview:
- CPU: R65C02P3/R65C02P4 or G65SC02P-4
- Clock: 4.9152 MHz
- NMI CLK: 600 Hz
@@ -61,37 +94,6 @@ $3000 // Chess Board
$4000-$7FFF Opening Module HG550
$8000-$FFFF ROM
-===============================================================================
-
-For rebel5 and newer, the chess engine is by Ed Schröder. Older chesscomputers in
-this driver were authored by Ulf Rathsman.
-
-The MM II program was also licensed to Daimler-Benz, who gave away several custom
-chesscomputers as a parting gift to retiring executives. The hardware is same as MM II.
-see(1): http://chesseval.com/ChessEvalJournal/DaimlerBenz.htm
-see(2): http://chesseval.com/RareBoard/DaimlerBenzBoard.htm
-
-MM III was never released officially. Rebell 5,0 is commonly known as MM III, but the
-real one didn't get further than a prototype.
-
-Mephisto 4 Turbo Kit 18mhz - (mm4tk)
- This is a replacement rom combining the turbo kit initial rom with the original MM IV.
- The Turbo Kit powers up to it's tiny rom, copies itself to ram, banks in normal rom,
- copies that to faster SRAM, then patches the checksum and the LED blink delays.
- If someone else wants to code up the power up banking, feel free
-
- There is an undumped MM V Turbo Kit, which will be the exact same except for location of
- the patches. The mm5tk just needs the normal mm5 ROM swapped out for that one to
- blinks the LEDs a little slower.
-
- -- Cowering (2011)
-
-The MM V prototype was the program that Ed Schröder participated with as "Rebel" at the
-1989 WMCCC in Portorose. It was used with the TK20 TurboKit.
-For more information, see: http://chesseval.com/ChessEvalJournal/PrototypeMMV.htm
-
-MM VI (Saitek, 1994) is on different hardware, H8 CPU.
-
******************************************************************************/
#include "emu.h"
@@ -108,8 +110,8 @@ MM VI (Saitek, 1994) is on different hardware, H8 CPU.
#include "speaker.h"
// internal artwork
-#include "mephisto_mm2.lh"
#include "mephisto_bup.lh"
+#include "mephisto_mm2.lh"
namespace {
@@ -180,7 +182,7 @@ void mm2_state::lcd_irqack_w(u8 data)
{
m_display->data_w(data);
- // accessing 0x2800 also clears irq
+ // accessing here also clears irq
m_maincpu->set_input_line(0, CLEAR_LINE);
}
@@ -219,7 +221,7 @@ void mm2_state::rebel5_mem(address_map &map)
map(0x2000, 0x2007).w("outlatch", FUNC(hc259_device::write_d7)).nopr();
map(0x3000, 0x3007).r(FUNC(mm2_state::keys_r));
map(0x4000, 0x4000).r("board", FUNC(mephisto_board_device::input_r));
- map(0x5000, 0x5000).w(m_display, FUNC(mephisto_display1_device::data_w));
+ map(0x5000, 0x5000).w(FUNC(mm2_state::lcd_irqack_w));
map(0x6000, 0x6000).w("board", FUNC(mephisto_board_device::led_w));
map(0x7000, 0x7000).w("board", FUNC(mephisto_board_device::mux_w));
map(0x8000, 0xffff).rom();
@@ -314,8 +316,8 @@ void mm2_state::rebel5(machine_config &config)
R65C02(config, m_maincpu, 9.8304_MHz_XTAL / 2);
m_maincpu->set_addrmap(AS_PROGRAM, &mm2_state::rebel5_mem);
- const attotime nmi_period = attotime::from_hz(9.8304_MHz_XTAL / 2 / 0x2000); // 600Hz
- m_maincpu->set_periodic_int(FUNC(mm2_state::nmi_line_pulse), nmi_period);
+ const attotime irq_period = attotime::from_hz(9.8304_MHz_XTAL / 2 / 0x2000); // 600Hz
+ m_maincpu->set_periodic_int(FUNC(mm2_state::irq0_line_assert), irq_period);
HC259(config, m_outlatch);
m_outlatch->q_out_cb<0>().set_output("led100");
@@ -406,6 +408,19 @@ void mm2_state::mm2(machine_config &config)
ROM Definitions
******************************************************************************/
+ROM_START( bup )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD("bup_1.bin", 0x8000, 0x4000, CRC(e1e9625a) SHA1(8a757e28b7afca2a092f8ff419087e06b07b743e) )
+ ROM_LOAD("bup_2.bin", 0xc000, 0x4000, CRC(6db30b80) SHA1(df4b379c4e916dff6b4110ec9c3591a9620c3424) )
+ROM_END
+
+ROM_START( bupa )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD("bupa_1.bin", 0x8000, 0x4000, CRC(e1e9625a) SHA1(8a757e28b7afca2a092f8ff419087e06b07b743e) )
+ ROM_LOAD("bupa_2.bin", 0xc000, 0x4000, CRC(708338ea) SHA1(d617c4aa2161865a22b4b0646ba793f8a1fda863) )
+ROM_END
+
+
ROM_START( mm2 ) // 10 Sep 1986
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("400", 0x8000, 0x8000, CRC(e8c1f431) SHA1(c32dfa66eefbf3e539438d2fe6e6916f78a128be) ) // HN27C256G-20
@@ -443,19 +458,6 @@ ROM_START( mm2e ) // 13 Sep 1985, serial 05569xx
ROM_END
-ROM_START( bup )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("bup_1.bin", 0x8000, 0x4000, CRC(e1e9625a) SHA1(8a757e28b7afca2a092f8ff419087e06b07b743e) )
- ROM_LOAD("bup_2.bin", 0xc000, 0x4000, CRC(6db30b80) SHA1(df4b379c4e916dff6b4110ec9c3591a9620c3424) )
-ROM_END
-
-ROM_START( bupa )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("bupa_1.bin", 0x8000, 0x4000, CRC(e1e9625a) SHA1(8a757e28b7afca2a092f8ff419087e06b07b743e) )
- ROM_LOAD("bupa_2.bin", 0xc000, 0x4000, CRC(708338ea) SHA1(d617c4aa2161865a22b4b0646ba793f8a1fda863) )
-ROM_END
-
-
ROM_START( rebel5 ) // 8 Feb 1987?
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD("rebel5.bin", 0x8000, 0x8000, CRC(17232752) SHA1(3cd6893c0071f3dc02785bf99f1950eed81eba39) )
@@ -518,6 +520,9 @@ ROM_END
******************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS */
+CONS( 1985, bup, 0, 0, bup, bup, mm2_state, empty_init, "Hegener + Glaser", u8"Mephisto Blitz- und Problemlösungs-Modul (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+CONS( 1985, bupa, bup, 0, bup, bup, mm2_state, empty_init, "Hegener + Glaser", u8"Mephisto Blitz- und Problemlösungs-Modul (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+
CONS( 1985, mm2, 0, 0, mm2, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto MM II (set 1, v4.00)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1985, mm2a, mm2, 0, mm2, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto MM II (set 2, v3.00)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1985, mm2b, mm2, 0, mm2, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto MM II (set 3, v2.00)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
@@ -525,9 +530,6 @@ CONS( 1985, mm2c, mm2, 0, mm2, mm2, mm2_state, empty_init, "He
CONS( 1985, mm2d, mm2, 0, mm2, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto MM II (set 5)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
CONS( 1985, mm2e, mm2, 0, mm2, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto MM II (set 6)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1985, bup, 0, 0, bup, bup, mm2_state, empty_init, "Hegener + Glaser", u8"Mephisto Blitz- und Problemlösungs-Modul (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-CONS( 1985, bupa, bup, 0, bup, bup, mm2_state, empty_init, "Hegener + Glaser", u8"Mephisto Blitz- und Problemlösungs-Modul (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-
CONS( 1986, rebel5, 0, 0, rebel5, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto Rebell 5,0 (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // aka MM III
CONS( 1986, rebel5a, rebel5, 0, rebel5, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto Rebell 5,0 (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // "
CONS( 1986, rebel5b, rebel5, 0, rebel5, mm2, mm2_state, empty_init, "Hegener + Glaser", "Mephisto Rebell 5,0 (set 3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // "
diff --git a/src/mame/layout/mephisto_mirage.lay b/src/mame/layout/mephisto_mirage.lay
index 281ec587535..48f13ea32b7 100644
--- a/src/mame/layout/mephisto_mirage.lay
+++ b/src/mame/layout/mephisto_mirage.lay
@@ -231,7 +231,7 @@ license:CC0
</element>
<element name="text_uit1" defstate="0">
- <text string="SB.MOBIL" state="0"><color red="0.81" green="0.8" blue="0.79" /></text>
+ <text string="SB.MIRAGE" state="0"><color red="0.81" green="0.8" blue="0.79" /></text>
<text string="SB.MODULAR" state="1"><color red="0.81" green="0.8" blue="0.79" /></text>
</element>
<element name="text_uit2"><text string="INTERFACE"><color red="0.81" green="0.8" blue="0.79" /></text></element>