diff options
author | 2015-07-04 15:52:26 +0200 | |
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committer | 2015-07-04 15:52:26 +0200 | |
commit | 28252ce2ba49a686358d20b662910085219adf79 (patch) | |
tree | d2a963612bb0e6aadc1d1052fc763cc0c3a98146 | |
parent | 7e84b616516876798ad97280200532ec9b8c2a5f (diff) |
hp64k: ws & indentation cleanup
-rw-r--r-- | src/emu/cpu/hphybrid/hphybrid.c | 1644 | ||||
-rw-r--r-- | src/emu/cpu/hphybrid/hphybrid.h | 2 | ||||
-rw-r--r-- | src/mess/drivers/hp64k.c | 1214 |
3 files changed, 1433 insertions, 1427 deletions
diff --git a/src/emu/cpu/hphybrid/hphybrid.c b/src/emu/cpu/hphybrid/hphybrid.c index 3103ff0e2f3..84f3d911653 100644 --- a/src/emu/cpu/hphybrid/hphybrid.c +++ b/src/emu/cpu/hphybrid/hphybrid.c @@ -6,18 +6,18 @@ #include "hphybrid.h" enum { - HPHYBRID_A, - HPHYBRID_B, - HPHYBRID_C, - HPHYBRID_D, - HPHYBRID_P, - HPHYBRID_R, - HPHYBRID_IV, - HPHYBRID_PA, - HPHYBRID_DMAPA, - HPHYBRID_DMAMA, - HPHYBRID_DMAC, - HPHYBRID_I + HPHYBRID_A, + HPHYBRID_B, + HPHYBRID_C, + HPHYBRID_D, + HPHYBRID_P, + HPHYBRID_R, + HPHYBRID_IV, + HPHYBRID_PA, + HPHYBRID_DMAPA, + HPHYBRID_DMAMA, + HPHYBRID_DMAC, + HPHYBRID_I }; #define BIT_MASK(n) (1U << (n)) @@ -27,19 +27,19 @@ enum { #define BIT_SET(w , n) ((w) |= BIT_MASK(n)) // Bits in m_flags -#define HPHYBRID_C_BIT 0 // Carry/extend -#define HPHYBRID_O_BIT 1 // Overflow -#define HPHYBRID_CB_BIT 2 // Cb -#define HPHYBRID_DB_BIT 3 // Db -#define HPHYBRID_INTEN_BIT 4 // Interrupt enable -#define HPHYBRID_DMAEN_BIT 5 // DMA enable -#define HPHYBRID_DMADIR_BIT 6 // DMA direction (1 = OUT) -#define HPHYBRID_HALT_BIT 7 // Halt flag -#define HPHYBRID_IRH_BIT 8 // IRH requested -#define HPHYBRID_IRL_BIT 9 // IRL requested +#define HPHYBRID_C_BIT 0 // Carry/extend +#define HPHYBRID_O_BIT 1 // Overflow +#define HPHYBRID_CB_BIT 2 // Cb +#define HPHYBRID_DB_BIT 3 // Db +#define HPHYBRID_INTEN_BIT 4 // Interrupt enable +#define HPHYBRID_DMAEN_BIT 5 // DMA enable +#define HPHYBRID_DMADIR_BIT 6 // DMA direction (1 = OUT) +#define HPHYBRID_HALT_BIT 7 // Halt flag +#define HPHYBRID_IRH_BIT 8 // IRH requested +#define HPHYBRID_IRL_BIT 9 // IRL requested #define HPHYBRID_IRH_SVC_BIT 10 // IRH in service #define HPHYBRID_IRL_SVC_BIT 11 // IRL in service -#define HPHYBRID_DMAR_BIT 12 // DMA request +#define HPHYBRID_DMAR_BIT 12 // DMA request #define HPHYBRID_IV_MASK 0xfff0 // IV mask @@ -51,111 +51,111 @@ const device_type HP_5061_3011 = &device_creator<hp_5061_3011_cpu_device>; WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) { - if (state) { - BIT_SET(m_flags , HPHYBRID_DMAR_BIT); - } else { - BIT_CLR(m_flags , HPHYBRID_DMAR_BIT); - } + if (state) { + BIT_SET(m_flags , HPHYBRID_DMAR_BIT); + } else { + BIT_CLR(m_flags , HPHYBRID_DMAR_BIT); + } } hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname) : cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__), - m_program_config("program", ENDIANNESS_BIG, 16, 16, -1), - m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) + m_program_config("program", ENDIANNESS_BIG, 16, 16, -1), + m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) { } void hp_hybrid_cpu_device::device_start() { - m_reg_A = 0; - m_reg_B = 0; - m_reg_P = HP_RESET_ADDR; - m_reg_R = 0; - m_reg_C = 0; - m_reg_D = 0; - m_reg_IV = 0; - m_reg_PA[ 0 ] = 0; - m_reg_PA[ 1 ] = 0; - m_reg_PA[ 2 ] = 0; - m_flags = 0; - m_dmapa = 0; - m_dmama = 0; - m_dmac = 0; - m_reg_I = 0; - - { - state_add(HPHYBRID_A, "A", m_reg_A); - state_add(HPHYBRID_B, "B", m_reg_B); - state_add(HPHYBRID_C, "C", m_reg_C); - state_add(HPHYBRID_D, "D", m_reg_D); - state_add(HPHYBRID_P, "P", m_reg_P); - state_add(STATE_GENPC, "GENPC", m_reg_P).noshow(); - state_add(HPHYBRID_R, "R", m_reg_R); - state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); - state_add(HPHYBRID_IV, "IV", m_reg_IV); - state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); - state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); - state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); - state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); - state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); - state_add(HPHYBRID_I , "I" , m_reg_I).noshow(); - } - - m_program = &space(AS_PROGRAM); - m_direct = &m_program->direct(); - m_io = &space(AS_IO); - - save_item(NAME(m_reg_A)); - save_item(NAME(m_reg_B)); - save_item(NAME(m_reg_C)); - save_item(NAME(m_reg_D)); - save_item(NAME(m_reg_P)); - save_item(NAME(m_reg_R)); - save_item(NAME(m_reg_IV)); - save_item(NAME(m_reg_PA[0])); - save_item(NAME(m_reg_PA[1])); - save_item(NAME(m_reg_PA[2])); - save_item(NAME(m_flags)); - save_item(NAME(m_dmapa)); - save_item(NAME(m_dmama)); - save_item(NAME(m_dmac)); - save_item(NAME(m_reg_I)); - - m_icountptr = &m_icount; + m_reg_A = 0; + m_reg_B = 0; + m_reg_P = HP_RESET_ADDR; + m_reg_R = 0; + m_reg_C = 0; + m_reg_D = 0; + m_reg_IV = 0; + m_reg_PA[ 0 ] = 0; + m_reg_PA[ 1 ] = 0; + m_reg_PA[ 2 ] = 0; + m_flags = 0; + m_dmapa = 0; + m_dmama = 0; + m_dmac = 0; + m_reg_I = 0; + + { + state_add(HPHYBRID_A, "A", m_reg_A); + state_add(HPHYBRID_B, "B", m_reg_B); + state_add(HPHYBRID_C, "C", m_reg_C); + state_add(HPHYBRID_D, "D", m_reg_D); + state_add(HPHYBRID_P, "P", m_reg_P); + state_add(STATE_GENPC, "GENPC", m_reg_P).noshow(); + state_add(HPHYBRID_R, "R", m_reg_R); + state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); + state_add(HPHYBRID_IV, "IV", m_reg_IV); + state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); + state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); + state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); + state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); + state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); + state_add(HPHYBRID_I , "I" , m_reg_I).noshow(); + } + + m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); + m_io = &space(AS_IO); + + save_item(NAME(m_reg_A)); + save_item(NAME(m_reg_B)); + save_item(NAME(m_reg_C)); + save_item(NAME(m_reg_D)); + save_item(NAME(m_reg_P)); + save_item(NAME(m_reg_R)); + save_item(NAME(m_reg_IV)); + save_item(NAME(m_reg_PA[0])); + save_item(NAME(m_reg_PA[1])); + save_item(NAME(m_reg_PA[2])); + save_item(NAME(m_flags)); + save_item(NAME(m_dmapa)); + save_item(NAME(m_dmama)); + save_item(NAME(m_dmac)); + save_item(NAME(m_reg_I)); + + m_icountptr = &m_icount; } void hp_hybrid_cpu_device::device_reset() { - m_reg_P = HP_RESET_ADDR; - m_reg_I = RM(m_reg_P); - m_flags = 0; + m_reg_P = HP_RESET_ADDR; + m_reg_I = RM(m_reg_P); + m_flags = 0; } void hp_hybrid_cpu_device::execute_run() { - do { - if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) { - handle_dma(); - } else { - debugger_instruction_hook(this, m_reg_P); - - // Check for interrupts - check_for_interrupts(); - - m_reg_I = execute_one(m_reg_I); - } - } while (m_icount > 0); + do { + if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) { + handle_dma(); + } else { + debugger_instruction_hook(this, m_reg_P); + + // Check for interrupts + check_for_interrupts(); + + m_reg_I = execute_one(m_reg_I); + } + } while (m_icount > 0); } void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state) { - if (inputnum < HPHYBRID_INT_LVLS) { - if (state) { - BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum); - } else { - BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum); - } - } + if (inputnum < HPHYBRID_INT_LVLS) { + if (state) { + BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum); + } else { + BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum); + } + } } /** @@ -167,14 +167,14 @@ void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state) */ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode) { - if ((opcode & 0x7fe0) == 0x7000) { - // EXE - m_icount -= 8; - return RM(opcode & 0x1f); - } else { - m_reg_P = execute_one_sub(opcode); - return RM(m_reg_P); - } + if ((opcode & 0x7fe0) == 0x7000) { + // EXE + m_icount -= 8; + return RM(opcode & 0x1f); + } else { + m_reg_P = execute_one_sub(opcode); + return RM(m_reg_P); + } } /** @@ -186,773 +186,773 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode) */ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode) { - UINT16 ea; - UINT16 tmp; - - switch (opcode & 0x7800) { - case 0x0000: - // LDA - m_icount -= 13; - m_reg_A = RM(get_ea(opcode)); - break; - - case 0x0800: - // LDB - m_icount -= 13; - m_reg_B = RM(get_ea(opcode)); - break; - - case 0x1000: - // CPA - m_icount -= 16; - if (m_reg_A != RM(get_ea(opcode))) { - // Skip next instruction - return m_reg_P + 2; - } - break; - - case 0x1800: - // CPB - m_icount -= 16; - if (m_reg_B != RM(get_ea(opcode))) { - // Skip next instruction - return m_reg_P + 2; - } - break; - - case 0x2000: - // ADA - m_icount -= 13; - do_add(m_reg_A , RM(get_ea(opcode))); - break; - - case 0x2800: - // ADB - m_icount -= 13; - do_add(m_reg_B , RM(get_ea(opcode))); - break; - - case 0x3000: - // STA - m_icount -= 13; - WM(get_ea(opcode) , m_reg_A); - break; - - case 0x3800: - // STB - m_icount -= 13; - WM(get_ea(opcode) , m_reg_B); - break; - - case 0x4000: - // JSM - m_icount -= 17; - WM(++m_reg_R , m_reg_P); - return get_ea(opcode); - - case 0x4800: - // ISZ - m_icount -= 19; - ea = get_ea(opcode); - tmp = RM(ea) + 1; - WM(ea , tmp); - if (tmp == 0) { - // Skip next instruction - return m_reg_P + 2; - } - break; - - case 0x5000: - // AND - m_icount -= 13; - m_reg_A &= RM(get_ea(opcode)); - break; - - case 0x5800: - // DSZ - m_icount -= 19; - ea = get_ea(opcode); - tmp = RM(ea) - 1; - WM(ea , tmp); - if (tmp == 0) { - // Skip next instruction - return m_reg_P + 2; - } - break; - - case 0x6000: - // IOR - m_icount -= 13; - m_reg_A |= RM(get_ea(opcode)); - break; - - case 0x6800: - // JMP - m_icount -= 8; - return get_ea(opcode); - - default: - switch (opcode & 0xfec0) { - case 0x7400: - // RZA - // SZA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A == 0); - - case 0x7440: - // RIA - // SIA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A++ == 0); - - case 0x7480: - // SFS - // SFC - m_icount -= 14; - // TODO: read flag bit - return get_skip_addr(opcode , true); - - case 0x7C00: - // RZB - // SZB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B == 0); - - case 0x7C40: - // RIB - // SIB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B++ == 0); - - case 0x7c80: - // SSS - // SSC - m_icount -= 14; - // TODO: read status bit - return get_skip_addr(opcode , true); - - case 0x7cc0: - // SHS - // SHC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); - - default: - switch (opcode & 0xfe00) { - case 0x7600: - // SLA - // RLA - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 0); - - case 0x7e00: - // SLB - // RLB - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 0); - - case 0xf400: - // SAP - // SAM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 15); - - case 0xf600: - // SOC - // SOS - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); - - case 0xfc00: - // SBP - // SBM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 15); - - case 0xfe00: - // SEC - // SES - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); - - default: - switch (opcode & 0xfff0) { - case 0xf100: - // AAR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - // A shift by 16 positions is equivalent to a shift by 15 - tmp = tmp > 15 ? 15 : tmp; - m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp); - break; - - case 0xf900: - // ABR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - tmp = tmp > 15 ? 15 : tmp; - m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp); - break; - - case 0xf140: - // SAR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_A >>= tmp; - break; - - case 0xf940: - // SBR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_B >>= tmp; - break; - - case 0xf180: - // SAL - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_A <<= tmp; - break; - - case 0xf980: - // SBL - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_B <<= tmp; - break; - - case 0xf1c0: - // RAR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp)); - break; - - case 0xf9c0: - // RBR - tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); - m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp)); - break; - - default: - if ((opcode & 0xf760) == 0x7160) { - // Place/withdraw instructions - m_icount -= 23; - do_pw(opcode); - } else if ((opcode & 0xff80) == 0xf080) { - // RET - m_icount -= 16; - if (BIT(opcode , 6)) { - // Pop PA stack - if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { - BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT); - memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { - BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT); - memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - } - } - tmp = RM(m_reg_R--) + (opcode & 0x1f); - return BIT(opcode , 5) ? tmp - 0x20 : tmp; - } else { - switch (opcode) { - case 0x7100: - // SDO - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); - break; - - case 0x7108: - // SDI - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); - break; - - case 0x7110: - // EIR - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_INTEN_BIT); - break; - - case 0x7118: - // DIR - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_INTEN_BIT); - break; - - case 0x7120: - // DMA - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DMAEN_BIT); - break; - - case 0x7138: - // DDR - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); - break; - - case 0x7140: - // DBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7148: - // CBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_CB_BIT); - break; - - case 0x7150: - // DBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7158: - // CBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_CB_BIT); - break; - - case 0xf020: - // TCA - m_icount -= 9; - m_reg_A = ~m_reg_A; - do_add(m_reg_A , 1); - break; - - case 0xf060: - // CMA - m_icount -= 9; - m_reg_A = ~m_reg_A; - break; - - case 0xf820: - // TCB - m_icount -= 9; - m_reg_B = ~m_reg_B; - do_add(m_reg_B , 1); - break; - - case 0xf860: - // CMB - m_icount -= 9; - m_reg_B = ~m_reg_B; - break; - - default: - // Unrecognized instructions: NOP - // Execution time is fictional - m_icount -= 6; - } - } - } - } - } - } - - return m_reg_P + 1; + UINT16 ea; + UINT16 tmp; + + switch (opcode & 0x7800) { + case 0x0000: + // LDA + m_icount -= 13; + m_reg_A = RM(get_ea(opcode)); + break; + + case 0x0800: + // LDB + m_icount -= 13; + m_reg_B = RM(get_ea(opcode)); + break; + + case 0x1000: + // CPA + m_icount -= 16; + if (m_reg_A != RM(get_ea(opcode))) { + // Skip next instruction + return m_reg_P + 2; + } + break; + + case 0x1800: + // CPB + m_icount -= 16; + if (m_reg_B != RM(get_ea(opcode))) { + // Skip next instruction + return m_reg_P + 2; + } + break; + + case 0x2000: + // ADA + m_icount -= 13; + do_add(m_reg_A , RM(get_ea(opcode))); + break; + + case 0x2800: + // ADB + m_icount -= 13; + do_add(m_reg_B , RM(get_ea(opcode))); + break; + + case 0x3000: + // STA + m_icount -= 13; + WM(get_ea(opcode) , m_reg_A); + break; + + case 0x3800: + // STB + m_icount -= 13; + WM(get_ea(opcode) , m_reg_B); + break; + + case 0x4000: + // JSM + m_icount -= 17; + WM(++m_reg_R , m_reg_P); + return get_ea(opcode); + + case 0x4800: + // ISZ + m_icount -= 19; + ea = get_ea(opcode); + tmp = RM(ea) + 1; + WM(ea , tmp); + if (tmp == 0) { + // Skip next instruction + return m_reg_P + 2; + } + break; + + case 0x5000: + // AND + m_icount -= 13; + m_reg_A &= RM(get_ea(opcode)); + break; + + case 0x5800: + // DSZ + m_icount -= 19; + ea = get_ea(opcode); + tmp = RM(ea) - 1; + WM(ea , tmp); + if (tmp == 0) { + // Skip next instruction + return m_reg_P + 2; + } + break; + + case 0x6000: + // IOR + m_icount -= 13; + m_reg_A |= RM(get_ea(opcode)); + break; + + case 0x6800: + // JMP + m_icount -= 8; + return get_ea(opcode); + + default: + switch (opcode & 0xfec0) { + case 0x7400: + // RZA + // SZA + m_icount -= 14; + return get_skip_addr(opcode , m_reg_A == 0); + + case 0x7440: + // RIA + // SIA + m_icount -= 14; + return get_skip_addr(opcode , m_reg_A++ == 0); + + case 0x7480: + // SFS + // SFC + m_icount -= 14; + // TODO: read flag bit + return get_skip_addr(opcode , true); + + case 0x7C00: + // RZB + // SZB + m_icount -= 14; + return get_skip_addr(opcode , m_reg_B == 0); + + case 0x7C40: + // RIB + // SIB + m_icount -= 14; + return get_skip_addr(opcode , m_reg_B++ == 0); + + case 0x7c80: + // SSS + // SSC + m_icount -= 14; + // TODO: read status bit + return get_skip_addr(opcode , true); + + case 0x7cc0: + // SHS + // SHC + m_icount -= 14; + return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); + + default: + switch (opcode & 0xfe00) { + case 0x7600: + // SLA + // RLA + m_icount -= 14; + return get_skip_addr_sc(opcode , m_reg_A , 0); + + case 0x7e00: + // SLB + // RLB + m_icount -= 14; + return get_skip_addr_sc(opcode , m_reg_B , 0); + + case 0xf400: + // SAP + // SAM + m_icount -= 14; + return get_skip_addr_sc(opcode , m_reg_A , 15); + + case 0xf600: + // SOC + // SOS + m_icount -= 14; + return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); + + case 0xfc00: + // SBP + // SBM + m_icount -= 14; + return get_skip_addr_sc(opcode , m_reg_B , 15); + + case 0xfe00: + // SEC + // SES + m_icount -= 14; + return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); + + default: + switch (opcode & 0xfff0) { + case 0xf100: + // AAR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + // A shift by 16 positions is equivalent to a shift by 15 + tmp = tmp > 15 ? 15 : tmp; + m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp); + break; + + case 0xf900: + // ABR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + tmp = tmp > 15 ? 15 : tmp; + m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp); + break; + + case 0xf140: + // SAR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_A >>= tmp; + break; + + case 0xf940: + // SBR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_B >>= tmp; + break; + + case 0xf180: + // SAL + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_A <<= tmp; + break; + + case 0xf980: + // SBL + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_B <<= tmp; + break; + + case 0xf1c0: + // RAR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp)); + break; + + case 0xf9c0: + // RBR + tmp = (opcode & 0xf) + 1; + m_icount -= (9 + tmp); + m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp)); + break; + + default: + if ((opcode & 0xf760) == 0x7160) { + // Place/withdraw instructions + m_icount -= 23; + do_pw(opcode); + } else if ((opcode & 0xff80) == 0xf080) { + // RET + m_icount -= 16; + if (BIT(opcode , 6)) { + // Pop PA stack + if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { + BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT); + memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); + } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { + BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT); + memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); + } + } + tmp = RM(m_reg_R--) + (opcode & 0x1f); + return BIT(opcode , 5) ? tmp - 0x20 : tmp; + } else { + switch (opcode) { + case 0x7100: + // SDO + m_icount -= 12; + BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); + break; + + case 0x7108: + // SDI + m_icount -= 12; + BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); + break; + + case 0x7110: + // EIR + m_icount -= 12; + BIT_SET(m_flags , HPHYBRID_INTEN_BIT); + break; + + case 0x7118: + // DIR + m_icount -= 12; + BIT_CLR(m_flags , HPHYBRID_INTEN_BIT); + break; + + case 0x7120: + // DMA + m_icount -= 12; + BIT_SET(m_flags , HPHYBRID_DMAEN_BIT); + break; + + case 0x7138: + // DDR + m_icount -= 12; + BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); + break; + + case 0x7140: + // DBL + m_icount -= 12; + BIT_CLR(m_flags , HPHYBRID_DB_BIT); + break; + + case 0x7148: + // CBL + m_icount -= 12; + BIT_CLR(m_flags , HPHYBRID_CB_BIT); + break; + + case 0x7150: + // DBU + m_icount -= 12; + BIT_SET(m_flags , HPHYBRID_DB_BIT); + break; + + case 0x7158: + // CBU + m_icount -= 12; + BIT_SET(m_flags , HPHYBRID_CB_BIT); + break; + + case 0xf020: + // TCA + m_icount -= 9; + m_reg_A = ~m_reg_A; + do_add(m_reg_A , 1); + break; + + case 0xf060: + // CMA + m_icount -= 9; + m_reg_A = ~m_reg_A; + break; + + case 0xf820: + // TCB + m_icount -= 9; + m_reg_B = ~m_reg_B; + do_add(m_reg_B , 1); + break; + + case 0xf860: + // CMB + m_icount -= 9; + m_reg_B = ~m_reg_B; + break; + + default: + // Unrecognized instructions: NOP + // Execution time is fictional + m_icount -= 6; + } + } + } + } + } + } + + return m_reg_P + 1; } void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) { - if (entry.index() == STATE_GENFLAGS) { - strprintf(str, "%s %s %c %c", - BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..", - BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..", - BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.', - BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.'); - } + if (entry.index() == STATE_GENFLAGS) { + strprintf(str, "%s %s %c %c", + BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..", + BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..", + BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.', + BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.'); + } } offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { - extern CPU_DISASSEMBLE(hp_hybrid); - return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options); + extern CPU_DISASSEMBLE(hp_hybrid); + return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options); } UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode) { - UINT16 base; - UINT16 off; - - if (BIT(opcode , 10)) { - // Current page - base = m_reg_P; - } else { - // Base page - base = 0; - } - - off = opcode & 0x3ff; - if (off & 0x200) { - off -= 0x400; - } - - base += off; - - if (BIT(opcode , 15)) { - // Indirect addressing - m_icount -= 6; - return RM(base); - } else { - // Direct addressing - return base; - } + UINT16 base; + UINT16 off; + + if (BIT(opcode , 10)) { + // Current page + base = m_reg_P; + } else { + // Base page + base = 0; + } + + off = opcode & 0x3ff; + if (off & 0x200) { + off -= 0x400; + } + + base += off; + + if (BIT(opcode , 15)) { + // Indirect addressing + m_icount -= 6; + return RM(base); + } else { + // Direct addressing + return base; + } } void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2) { - UINT32 tmp = addend1 + addend2; + UINT32 tmp = addend1 + addend2; - if (BIT(tmp , 16)) { - // Carry - BIT_SET(m_flags , HPHYBRID_C_BIT); - } + if (BIT(tmp , 16)) { + // Carry + BIT_SET(m_flags , HPHYBRID_C_BIT); + } - if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) { - // Overflow - BIT_SET(m_flags , HPHYBRID_O_BIT); - } + if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) { + // Overflow + BIT_SET(m_flags , HPHYBRID_O_BIT); + } - addend1 = (UINT16)tmp; + addend1 = (UINT16)tmp; } UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const { - bool skip_val = BIT(opcode , 8) != 0; - - if (condition == skip_val) { - UINT16 off = opcode & 0x1f; - - if (BIT(opcode , 5)) { - off -= 0x20; - } - return m_reg_P + off; - } else { - return m_reg_P + 1; - } + bool skip_val = BIT(opcode , 8) != 0; + + if (condition == skip_val) { + UINT16 off = opcode & 0x1f; + + if (BIT(opcode , 5)) { + off -= 0x20; + } + return m_reg_P + off; + } else { + return m_reg_P + 1; + } } UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n) { - bool val = BIT(v , n); - - if (BIT(opcode , 7)) { - if (BIT(opcode , 6)) { - BIT_SET(v , n); - } else { - BIT_CLR(v , n); - } - } + bool val = BIT(v , n); + + if (BIT(opcode , 7)) { + if (BIT(opcode , 6)) { + BIT_SET(v , n); + } else { + BIT_CLR(v , n); + } + } - return get_skip_addr(opcode , val); + return get_skip_addr(opcode , val); } void hp_hybrid_cpu_device::do_pw(UINT16 opcode) { - UINT16 tmp; - UINT16 reg_addr = opcode & 7; - UINT16 *ptr_reg; - UINT16 b_mask; - - if (BIT(opcode , 3)) { - ptr_reg = &m_reg_D; - b_mask = BIT_MASK(HPHYBRID_DB_BIT); - } else { - ptr_reg = &m_reg_C; - b_mask = BIT_MASK(HPHYBRID_CB_BIT); - } - - if (BIT(opcode , 4)) { - // Withdraw - if (BIT(opcode , 11)) { - // Byte - UINT32 tmp_addr = (UINT32)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - tmp = RM((UINT16)(tmp_addr >> 1)); - if (BIT(tmp_addr , 0)) { - tmp &= 0xff; - } else { - tmp >>= 8; - } - } else { - // Word - tmp = RM(*ptr_reg); - } - WM(reg_addr , tmp); - - if (BIT(opcode , 7)) { - // Post-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Post-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - } else { - // Place - if (BIT(opcode , 7)) { - // Pre-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Pre-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - tmp = RM(reg_addr); - if (BIT(opcode , 11)) { - // Byte - UINT32 tmp_addr = (UINT32)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - WMB(tmp_addr , (UINT8)tmp); - } else { - // Word - WM(*ptr_reg , tmp); - } - } + UINT16 tmp; + UINT16 reg_addr = opcode & 7; + UINT16 *ptr_reg; + UINT16 b_mask; + + if (BIT(opcode , 3)) { + ptr_reg = &m_reg_D; + b_mask = BIT_MASK(HPHYBRID_DB_BIT); + } else { + ptr_reg = &m_reg_C; + b_mask = BIT_MASK(HPHYBRID_CB_BIT); + } + + if (BIT(opcode , 4)) { + // Withdraw + if (BIT(opcode , 11)) { + // Byte + UINT32 tmp_addr = (UINT32)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= 0x10000; + } + tmp = RM((UINT16)(tmp_addr >> 1)); + if (BIT(tmp_addr , 0)) { + tmp &= 0xff; + } else { + tmp >>= 8; + } + } else { + // Word + tmp = RM(*ptr_reg); + } + WM(reg_addr , tmp); + + if (BIT(opcode , 7)) { + // Post-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } + } else { + // Post-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } + } + } else { + // Place + if (BIT(opcode , 7)) { + // Pre-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } + } else { + // Pre-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } + } + tmp = RM(reg_addr); + if (BIT(opcode , 11)) { + // Byte + UINT32 tmp_addr = (UINT32)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= 0x10000; + } + WMB(tmp_addr , (UINT8)tmp); + } else { + // Word + WM(*ptr_reg , tmp); + } + } } void hp_hybrid_cpu_device::check_for_interrupts(void) { - if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { - return; - } - - int irqline; - - if (BIT(m_flags , HPHYBRID_IRH_BIT)) { - // Service high-level interrupt - BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT); - irqline = HPHYBRID_IRH; - } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { - // Service low-level interrupt - BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT); - irqline = HPHYBRID_IRL; - } else { - return; - } - - // Get interrupt vector in low byte - UINT8 vector = (UINT8)standard_irq_callback(irqline); - UINT8 new_PA; - - // Get highest numbered 1 - // Don't know what happens if vector is 0, here we assume bit 7 = 1 - if (vector == 0) { - new_PA = 7; - } else { - for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) { - } - } - if (irqline == HPHYBRID_IRH) { - BIT_SET(new_PA , 3); - } - - // Push PA stack - memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS); - - CURRENT_PA = new_PA; - - // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence - // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection) - m_icount -= 26; - - // Do a double-indirect JSM IV,I instruction - WM(++m_reg_R , m_reg_P); - m_reg_P = RM(get_ea(0xc008)); - m_reg_I = RM(m_reg_P); + if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { + return; + } + + int irqline; + + if (BIT(m_flags , HPHYBRID_IRH_BIT)) { + // Service high-level interrupt + BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT); + irqline = HPHYBRID_IRH; + } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { + // Service low-level interrupt + BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT); + irqline = HPHYBRID_IRL; + } else { + return; + } + + // Get interrupt vector in low byte + UINT8 vector = (UINT8)standard_irq_callback(irqline); + UINT8 new_PA; + + // Get highest numbered 1 + // Don't know what happens if vector is 0, here we assume bit 7 = 1 + if (vector == 0) { + new_PA = 7; + } else { + for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) { + } + } + if (irqline == HPHYBRID_IRH) { + BIT_SET(new_PA , 3); + } + + // Push PA stack + memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS); + + CURRENT_PA = new_PA; + + // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence + // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection) + m_icount -= 26; + + // Do a double-indirect JSM IV,I instruction + WM(++m_reg_R , m_reg_P); + m_reg_P = RM(get_ea(0xc008)); + m_reg_I = RM(m_reg_P); } void hp_hybrid_cpu_device::handle_dma(void) { - // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing - bool tc = BIT(--m_dmac , 15) != 0; - UINT16 tmp; - - if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { - // "Outward" DMA: memory -> peripheral - tmp = RM(m_dmama++); - WIO(m_dmapa , tc ? 2 : 0 , tmp); - m_icount -= 10; - } else { - // "Inward" DMA: peripheral -> memory - tmp = RIO(m_dmapa , tc ? 2 : 0); - WM(m_dmama++ , tmp); - m_icount -= 9; - } - - // This is the one of the biggest question marks: is the DMA automatically disabled on TC? - // Here we assume it is. After all it would make no difference because there is no way - // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again. - if (tc) { - BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); - } + // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing + bool tc = BIT(--m_dmac , 15) != 0; + UINT16 tmp; + + if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(m_dmama++); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + m_icount -= 10; + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(m_dmama++ , tmp); + m_icount -= 9; + } + + // This is the one of the biggest question marks: is the DMA automatically disabled on TC? + // Here we assume it is. After all it would make no difference because there is no way + // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again. + if (tc) { + BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); + } } UINT16 hp_hybrid_cpu_device::RM(UINT16 addr) { - UINT16 tmp; - - if (addr <= HP_REG_LAST_ADDR) { - // Memory mapped registers - switch (addr) { - case HP_REG_A_ADDR: - return m_reg_A; - - case HP_REG_B_ADDR: - return m_reg_B; - - case HP_REG_P_ADDR: - return m_reg_P; - - case HP_REG_R_ADDR: - return m_reg_R; - - case HP_REG_R4_ADDR: - case HP_REG_R5_ADDR: - case HP_REG_R6_ADDR: - case HP_REG_R7_ADDR: - return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR); - - case HP_REG_IV_ADDR: - // Correct? - if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { - return m_reg_IV; - } else { - return m_reg_IV | CURRENT_PA; - } - - case HP_REG_PA_ADDR: - return CURRENT_PA; - - case HP_REG_DMAPA_ADDR: - tmp = m_dmapa & HP_REG_PA_MASK; - if (BIT(m_flags , HPHYBRID_CB_BIT)) { - BIT_SET(tmp , 15); - } - if (BIT(m_flags , HPHYBRID_DB_BIT)) { - BIT_SET(tmp , 14); - } - return tmp; - - case HP_REG_DMAMA_ADDR: - return m_dmama; - - case HP_REG_DMAC_ADDR: - return m_dmac; - - case HP_REG_C_ADDR: - return m_reg_C; - - case HP_REG_D_ADDR: - return m_reg_D; - - default: - // Unknown registers are returned as 0 - return 0; - } - } else { - return m_direct->read_decrypted_word((offs_t)addr << 1); - } + UINT16 tmp; + + if (addr <= HP_REG_LAST_ADDR) { + // Memory mapped registers + switch (addr) { + case HP_REG_A_ADDR: + return m_reg_A; + + case HP_REG_B_ADDR: + return m_reg_B; + + case HP_REG_P_ADDR: + return m_reg_P; + + case HP_REG_R_ADDR: + return m_reg_R; + + case HP_REG_R4_ADDR: + case HP_REG_R5_ADDR: + case HP_REG_R6_ADDR: + case HP_REG_R7_ADDR: + return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR); + + case HP_REG_IV_ADDR: + // Correct? + if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { + return m_reg_IV; + } else { + return m_reg_IV | CURRENT_PA; + } + + case HP_REG_PA_ADDR: + return CURRENT_PA; + + case HP_REG_DMAPA_ADDR: + tmp = m_dmapa & HP_REG_PA_MASK; + if (BIT(m_flags , HPHYBRID_CB_BIT)) { + BIT_SET(tmp , 15); + } + if (BIT(m_flags , HPHYBRID_DB_BIT)) { + BIT_SET(tmp , 14); + } + return tmp; + + case HP_REG_DMAMA_ADDR: + return m_dmama; + + case HP_REG_DMAC_ADDR: + return m_dmac; + + case HP_REG_C_ADDR: + return m_reg_C; + + case HP_REG_D_ADDR: + return m_reg_D; + + default: + // Unknown registers are returned as 0 + return 0; + } + } else { + return m_direct->read_decrypted_word((offs_t)addr << 1); + } } void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v) { - if (addr <= HP_REG_LAST_ADDR) { - // Memory mapped registers - switch (addr) { - case HP_REG_A_ADDR: - m_reg_A = v; - break; - - case HP_REG_B_ADDR: - m_reg_B = v; - break; - - case HP_REG_P_ADDR: - m_reg_P = v; - break; - - case HP_REG_R_ADDR: - m_reg_R = v; - break; - - case HP_REG_R4_ADDR: - case HP_REG_R5_ADDR: - case HP_REG_R6_ADDR: - case HP_REG_R7_ADDR: - WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v); - break; - - case HP_REG_IV_ADDR: - m_reg_IV = v & HP_REG_IV_MASK; - break; - - case HP_REG_PA_ADDR: - CURRENT_PA = v & HP_REG_PA_MASK; - break; - - case HP_REG_DMAPA_ADDR: - m_dmapa = v & HP_REG_PA_MASK; - break; - - case HP_REG_DMAMA_ADDR: - m_dmama = v; - break; - - case HP_REG_DMAC_ADDR: - m_dmac = v; - break; - - case HP_REG_C_ADDR: - m_reg_C = v; - break; - - case HP_REG_D_ADDR: - m_reg_D = v; - break; - - default: - // Unknown registers are silently discarded - break; - } - } else { - m_program->write_word((offs_t)addr << 1 , v); - } + if (addr <= HP_REG_LAST_ADDR) { + // Memory mapped registers + switch (addr) { + case HP_REG_A_ADDR: + m_reg_A = v; + break; + + case HP_REG_B_ADDR: + m_reg_B = v; + break; + + case HP_REG_P_ADDR: + m_reg_P = v; + break; + + case HP_REG_R_ADDR: + m_reg_R = v; + break; + + case HP_REG_R4_ADDR: + case HP_REG_R5_ADDR: + case HP_REG_R6_ADDR: + case HP_REG_R7_ADDR: + WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v); + break; + + case HP_REG_IV_ADDR: + m_reg_IV = v & HP_REG_IV_MASK; + break; + + case HP_REG_PA_ADDR: + CURRENT_PA = v & HP_REG_PA_MASK; + break; + + case HP_REG_DMAPA_ADDR: + m_dmapa = v & HP_REG_PA_MASK; + break; + + case HP_REG_DMAMA_ADDR: + m_dmama = v; + break; + + case HP_REG_DMAC_ADDR: + m_dmac = v; + break; + + case HP_REG_C_ADDR: + m_reg_C = v; + break; + + case HP_REG_D_ADDR: + m_reg_D = v; + break; + + default: + // Unknown registers are silently discarded + break; + } + } else { + m_program->write_word((offs_t)addr << 1 , v); + } } void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v) { - if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) { - // Cannot write bytes to registers - } else { - m_program->write_byte(addr , v); - } + if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) { + // Cannot write bytes to registers + } else { + m_program->write_byte(addr , v); + } } UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic) { - return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); + return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); } void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v) { - m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); + m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); } hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) diff --git a/src/emu/cpu/hphybrid/hphybrid.h b/src/emu/cpu/hphybrid/hphybrid.h index f1450727d76..5ef9f927d0e 100644 --- a/src/emu/cpu/hphybrid/hphybrid.h +++ b/src/emu/cpu/hphybrid/hphybrid.h @@ -126,7 +126,7 @@ private: UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n); void do_pw(UINT16 opcode); void check_for_interrupts(void); - void handle_dma(void); + void handle_dma(void); UINT16 RM(UINT16 addr); void WM(UINT16 addr , UINT16 v); diff --git a/src/mess/drivers/hp64k.c b/src/mess/drivers/hp64k.c index 2b485a50293..51b291d6e0d 100644 --- a/src/mess/drivers/hp64k.c +++ b/src/mess/drivers/hp64k.c @@ -6,19 +6,21 @@ // *************************************** // // Documentation used for this driver: -// [1] HP, manual 64100-90910, dec 83 rev. - Model 64100A mainframe service manual +// [1] HP, manual 64100-90910, dec 83 rev. - Model 64100A mainframe service manual +// [2] HP, manual 64941-90902, apr 83 rev. - Model 64941A Flexible disc (Floppy) drive +// controller service manual // // A 64100A system ("mainframe" in HP docs) is built around a 13 slot card cage. // The first 4 slots are reserved for specific card types: -// J1 I/O card -// J2 Display and RAM card -// J3 CPU card -// J4 Floppy interface card +// J1 I/O card +// J2 Display and RAM card +// J3 CPU card +// J4 Floppy interface card // // The rest of the slots are for CPU emulators, logic analyzers and so on (i.e. those -// doing the target function of a development system). +// cards doing the main functions of a development system). // This driver emulates the first 4 cards only. -// +// // All cards are interconnected by 2 separate buses originating from the CPU: // memory (16-bit data & 16-bit addresses) and I/O (16-bit data and 6-bit addresses) buses. // The addresses on I/O bus are split in a 4-bit PA (peripheral address) and a 2-bit IC @@ -33,7 +35,7 @@ // CPU card (64100-66521 or 64100-66532) // // This board holds the HP custom CPU with its massive heatsink, the BIOS roms and little else. -// U30 5061-3011 HP "hybrid" CPU @ 6.25 MHz +// U30 5061-3011 HP "hybrid" CPU @ 6.25 MHz // U8 // U9 // U10 @@ -41,7 +43,7 @@ // U18 // U19 // U20 -// U21 2732 16kw of BIOS EPROMs +// U21 2732 16kw of BIOS EPROMs // // ********** // I/O card (64100-66520) @@ -53,8 +55,12 @@ // - IEEE-488/HP-IB bus // - Miscellaneous peripherals (watchdog, beeper, interrupt registers, option DIP switches) // -//*U20 HP "PHI" Custom HP-IB interface microcontroller -//*U28 i8251 RS232 UART +// Emulation of beeper sound is far from correct: it should be a 2500 Hz tone inside an +// exponentially decaying envelope (a bell sound) whereas in the emulation it's inside a +// simple rectangular envelope. +// +//*U20 HP "PHI" Custom HP-IB interface microcontroller +//*U28 i8251 RS232 UART // // ********** // Display card (64100-66530) @@ -66,10 +72,10 @@ // CRTC is designed to refresh the whole DRAM in parallel. For some mysterious reason the first // display row is always blanked (its 40 words of RAM are even used for the stack!). // -// U33 i8275 CRT controller -// U60 2716 Character generator ROM +// U33 i8275 CRT controller +// U60 2716 Character generator ROM // U23-U30 -// U38-U45 HM4864 64 kw of DRAM +// U38-U45 HM4864 64 kw of DRAM // // ********** // Floppy I/F card (64941-66501) @@ -81,7 +87,7 @@ // I tried to reverse engineer the FSM by looking at the schematics and applying some sensible // assumptions. Then I did a sort of "clean room" re-implementation. It appears to work correctly. // -// U4 FD1791A Floppy disk controller +// U4 FD1791A Floppy disk controller // // A brief summary of the reverse-engineered interface of this card follows. // @@ -156,15 +162,15 @@ #define BIT_MASK(n) (1U << (n)) // Macros to clear/set single bits -#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) -#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) +#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) +#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) class hp64k_state : public driver_device { public: hp64k_state(const machine_config &mconfig, device_type type, const char *tag); - virtual void driver_start(); + virtual void driver_start(); //virtual void machine_start(); virtual void video_start(); virtual void machine_reset(); @@ -185,30 +191,30 @@ public: TIMER_DEVICE_CALLBACK_MEMBER(hp64k_kb_scan); DECLARE_READ16_MEMBER(hp64k_kb_r); - TIMER_DEVICE_CALLBACK_MEMBER(hp64k_line_sync); - DECLARE_READ16_MEMBER(hp64k_deltat_r); - DECLARE_WRITE16_MEMBER(hp64k_deltat_w); - - DECLARE_READ16_MEMBER(hp64k_slot_r); - DECLARE_WRITE16_MEMBER(hp64k_slot_w); - DECLARE_WRITE16_MEMBER(hp64k_slot_sel_w); - - DECLARE_READ16_MEMBER(hp64k_flp_r); - DECLARE_WRITE16_MEMBER(hp64k_flp_w); - DECLARE_WRITE_LINE_MEMBER(hp64k_flp_drq_w); - DECLARE_WRITE_LINE_MEMBER(hp64k_flp_intrq_w); - void hp64k_update_floppy_dma(void); - void hp64k_update_floppy_irq(void); - void hp64k_update_drv_ctrl(void); - DECLARE_WRITE8_MEMBER(hp64k_floppy0_rdy); - DECLARE_WRITE8_MEMBER(hp64k_floppy1_rdy); - void hp64k_floppy_idx_cb(floppy_image_device *floppy , int state); - void hp64k_floppy_wpt_cb(floppy_image_device *floppy , int state); - - DECLARE_READ16_MEMBER(hp64k_usart_r); - - DECLARE_WRITE16_MEMBER(hp64k_beep_w); - TIMER_DEVICE_CALLBACK_MEMBER(hp64k_beeper_off); + TIMER_DEVICE_CALLBACK_MEMBER(hp64k_line_sync); + DECLARE_READ16_MEMBER(hp64k_deltat_r); + DECLARE_WRITE16_MEMBER(hp64k_deltat_w); + + DECLARE_READ16_MEMBER(hp64k_slot_r); + DECLARE_WRITE16_MEMBER(hp64k_slot_w); + DECLARE_WRITE16_MEMBER(hp64k_slot_sel_w); + + DECLARE_READ16_MEMBER(hp64k_flp_r); + DECLARE_WRITE16_MEMBER(hp64k_flp_w); + DECLARE_WRITE_LINE_MEMBER(hp64k_flp_drq_w); + DECLARE_WRITE_LINE_MEMBER(hp64k_flp_intrq_w); + void hp64k_update_floppy_dma(void); + void hp64k_update_floppy_irq(void); + void hp64k_update_drv_ctrl(void); + DECLARE_WRITE8_MEMBER(hp64k_floppy0_rdy); + DECLARE_WRITE8_MEMBER(hp64k_floppy1_rdy); + void hp64k_floppy_idx_cb(floppy_image_device *floppy , int state); + void hp64k_floppy_wpt_cb(floppy_image_device *floppy , int state); + + DECLARE_READ16_MEMBER(hp64k_usart_r); + + DECLARE_WRITE16_MEMBER(hp64k_beep_w); + TIMER_DEVICE_CALLBACK_MEMBER(hp64k_beeper_off); private: required_device<hp_5061_3011_cpu_device> m_cpu; required_device<i8275_device> m_crtc; @@ -217,15 +223,15 @@ private: required_ioport m_io_key1; required_ioport m_io_key2; required_ioport m_io_key3; - required_device<fd1791_t> m_fdc; - required_device<floppy_connector> m_floppy0; - required_device<floppy_connector> m_floppy1; - required_device<ttl74123_device> m_ss0; - required_device<ttl74123_device> m_ss1; - required_ioport m_rear_panel_sw; - required_ioport m_rs232_sw; - required_device<beep_device> m_beeper; - required_device<timer_device> m_beep_timer; + required_device<fd1791_t> m_fdc; + required_device<floppy_connector> m_floppy0; + required_device<floppy_connector> m_floppy1; + required_device<ttl74123_device> m_ss0; + required_device<ttl74123_device> m_ss1; + required_ioport m_rear_panel_sw; + required_ioport m_rs232_sw; + required_device<beep_device> m_beeper; + required_device<timer_device> m_beep_timer; // Character generator const UINT8 *m_chargen; @@ -244,42 +250,42 @@ private: bool m_kb_scan_on; bool m_kb_pressed; - // Slot selection - std::vector<UINT16> m_low32k_ram; - UINT8 m_slot_select; - UINT8 m_slot_map; - - // Floppy I/F - UINT8 m_floppy_in_latch_msb; // U23 - UINT8 m_floppy_in_latch_lsb; // U38 - UINT8 m_floppy_out_latch_msb; // U22 - UINT8 m_floppy_out_latch_lsb; // U37 - UINT8 m_floppy_if_ctrl; // U24 - bool m_floppy_dmaen; - bool m_floppy_dmai; - bool m_floppy_mdci; - bool m_floppy_intrq; - bool m_floppy_drq; - bool m_floppy0_wpt; - bool m_floppy1_wpt; - UINT8 m_floppy_drv_ctrl; // U39 - UINT8 m_floppy_status; // U25 - - typedef enum { - HP64K_FLPST_IDLE, - HP64K_FLPST_DMAWR1, - HP64K_FLPST_DMAWR2, - HP64K_FLPST_DMARD1, - HP64K_FLPST_DMARD2 - } floppy_state_t; - - floppy_state_t m_floppy_if_state; - floppy_image_device *m_current_floppy; + // Slot selection + std::vector<UINT16> m_low32k_ram; + UINT8 m_slot_select; + UINT8 m_slot_map; + + // Floppy I/F + UINT8 m_floppy_in_latch_msb; // U23 + UINT8 m_floppy_in_latch_lsb; // U38 + UINT8 m_floppy_out_latch_msb; // U22 + UINT8 m_floppy_out_latch_lsb; // U37 + UINT8 m_floppy_if_ctrl; // U24 + bool m_floppy_dmaen; + bool m_floppy_dmai; + bool m_floppy_mdci; + bool m_floppy_intrq; + bool m_floppy_drq; + bool m_floppy0_wpt; + bool m_floppy1_wpt; + UINT8 m_floppy_drv_ctrl; // U39 + UINT8 m_floppy_status; // U25 + + typedef enum { + HP64K_FLPST_IDLE, + HP64K_FLPST_DMAWR1, + HP64K_FLPST_DMAWR2, + HP64K_FLPST_DMARD1, + HP64K_FLPST_DMARD2 + } floppy_state_t; + + floppy_state_t m_floppy_if_state; + floppy_image_device *m_current_floppy; }; static ADDRESS_MAP_START(cpu_mem_map , AS_PROGRAM , 16 , hp64k_state) AM_RANGE(0x0000 , 0x3fff) AM_ROM - AM_RANGE(0x4000 , 0x7fff) AM_READWRITE(hp64k_slot_r , hp64k_slot_w) + AM_RANGE(0x4000 , 0x7fff) AM_READWRITE(hp64k_slot_r , hp64k_slot_w) AM_RANGE(0x8000 , 0x8001) AM_WRITE(hp64k_crtc_w) AM_RANGE(0x8002 , 0xffff) AM_RAM ADDRESS_MAP_END @@ -287,25 +293,25 @@ ADDRESS_MAP_END static ADDRESS_MAP_START(cpu_io_map , AS_IO , 16 , hp64k_state) // PA = 0, IC = [0..3] // Keyboard input - AM_RANGE(HP_MAKE_IOADDR(0 , 0) , HP_MAKE_IOADDR(0 , 3)) AM_READ(hp64k_kb_r) - // PA = 2, IC = [0..3] - // Line sync interrupt clear/watchdog reset - AM_RANGE(HP_MAKE_IOADDR(2 , 0) , HP_MAKE_IOADDR(2 , 3)) AM_READWRITE(hp64k_deltat_r , hp64k_deltat_w) - // PA = 4, IC = [0..3] - // Floppy I/F - AM_RANGE(HP_MAKE_IOADDR(4 , 0) , HP_MAKE_IOADDR(4 , 3)) AM_READWRITE(hp64k_flp_r , hp64k_flp_w) - // PA = 6, IC = [0..3] - // Read from USART - AM_RANGE(HP_MAKE_IOADDR(6 , 0) , HP_MAKE_IOADDR(6 , 3)) AM_READ(hp64k_usart_r) + AM_RANGE(HP_MAKE_IOADDR(0 , 0) , HP_MAKE_IOADDR(0 , 3)) AM_READ(hp64k_kb_r) + // PA = 2, IC = [0..3] + // Line sync interrupt clear/watchdog reset + AM_RANGE(HP_MAKE_IOADDR(2 , 0) , HP_MAKE_IOADDR(2 , 3)) AM_READWRITE(hp64k_deltat_r , hp64k_deltat_w) + // PA = 4, IC = [0..3] + // Floppy I/F + AM_RANGE(HP_MAKE_IOADDR(4 , 0) , HP_MAKE_IOADDR(4 , 3)) AM_READWRITE(hp64k_flp_r , hp64k_flp_w) + // PA = 6, IC = [0..3] + // Read from USART + AM_RANGE(HP_MAKE_IOADDR(6 , 0) , HP_MAKE_IOADDR(6 , 3)) AM_READ(hp64k_usart_r) // PA = 7, IC = 2 // Rear-panel switches - AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READ(hp64k_rear_sw_r) - // PA = 9, IC = [0..3] - // Beeper control & interrupt status read - AM_RANGE(HP_MAKE_IOADDR(9 , 0) , HP_MAKE_IOADDR(9 , 3)) AM_WRITE(hp64k_beep_w) - // PA = 10, IC = [0..3] - // Slot selection - AM_RANGE(HP_MAKE_IOADDR(10 , 0) , HP_MAKE_IOADDR(10 , 3)) AM_WRITE(hp64k_slot_sel_w) + AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READ(hp64k_rear_sw_r) + // PA = 9, IC = [0..3] + // Beeper control & interrupt status read + AM_RANGE(HP_MAKE_IOADDR(9 , 0) , HP_MAKE_IOADDR(9 , 3)) AM_WRITE(hp64k_beep_w) + // PA = 10, IC = [0..3] + // Slot selection + AM_RANGE(HP_MAKE_IOADDR(10 , 0) , HP_MAKE_IOADDR(10 , 3)) AM_WRITE(hp64k_slot_sel_w) // PA = 12, IC = [0..3] // Interrupt mask AM_RANGE(HP_MAKE_IOADDR(12 , 0) , HP_MAKE_IOADDR(12 , 3)) AM_WRITE(hp64k_irl_mask_w) @@ -319,23 +325,23 @@ hp64k_state::hp64k_state(const machine_config &mconfig, device_type type, const m_io_key0(*this , "KEY0"), m_io_key1(*this , "KEY1"), m_io_key2(*this , "KEY2"), - m_io_key3(*this , "KEY3"), - m_fdc(*this , "fdc"), - m_floppy0(*this , "fdc:0"), - m_floppy1(*this , "fdc:1"), - m_ss0(*this , "fdc_rdy0"), - m_ss1(*this , "fdc_rdy1"), - m_rear_panel_sw(*this , "rear_sw"), - m_rs232_sw(*this , "rs232_sw"), - m_beeper(*this , "beeper"), - m_beep_timer(*this , "beep_timer") + m_io_key3(*this , "KEY3"), + m_fdc(*this , "fdc"), + m_floppy0(*this , "fdc:0"), + m_floppy1(*this , "fdc:1"), + m_ss0(*this , "fdc_rdy0"), + m_ss1(*this , "fdc_rdy1"), + m_rear_panel_sw(*this , "rear_sw"), + m_rs232_sw(*this , "rs232_sw"), + m_beeper(*this , "beeper"), + m_beep_timer(*this , "beep_timer") { } void hp64k_state::driver_start() { - // 32kW for lower RAM - m_low32k_ram.resize(0x8000); + // 32kW for lower RAM + m_low32k_ram.resize(0x8000); } void hp64k_state::video_start() @@ -353,19 +359,19 @@ void hp64k_state::machine_reset() memset(&m_kb_state[ 0 ] , 0 , sizeof(m_kb_state)); m_kb_row_col = 0; m_kb_scan_on = true; - m_slot_select = 0; - m_slot_map = 3; - m_floppy_if_ctrl = ~0; - m_floppy_dmaen = false; - m_floppy_dmai = false; - m_floppy_mdci = false; - m_floppy_intrq = false; - m_floppy_drv_ctrl = ~0; - m_floppy_if_state = HP64K_FLPST_IDLE; - m_current_floppy = NULL; - m_floppy0_wpt = false; - m_floppy1_wpt = false; - m_beeper->set_state(0); + m_slot_select = 0; + m_slot_map = 3; + m_floppy_if_ctrl = ~0; + m_floppy_dmaen = false; + m_floppy_dmai = false; + m_floppy_mdci = false; + m_floppy_intrq = false; + m_floppy_drv_ctrl = ~0; + m_floppy_if_state = HP64K_FLPST_IDLE; + m_current_floppy = NULL; + m_floppy0_wpt = false; + m_floppy1_wpt = false; + m_beeper->set_state(0); } UINT8 hp64k_state::hp64k_crtc_filter(UINT8 data) @@ -451,7 +457,7 @@ I8275_DRAW_CHARACTER_MEMBER(hp64k_state::crtc_display_pixels) READ16_MEMBER(hp64k_state::hp64k_rear_sw_r) { - return m_rear_panel_sw->read() | 0x0020; + return m_rear_panel_sw->read() | 0x0020; } IRQ_CALLBACK_MEMBER(hp64k_state::hp64k_irq_callback) @@ -523,389 +529,389 @@ READ16_MEMBER(hp64k_state::hp64k_kb_r) TIMER_DEVICE_CALLBACK_MEMBER(hp64k_state::hp64k_line_sync) { - BIT_SET(m_irl_pending , 2); - hp64k_update_irl(); + BIT_SET(m_irl_pending , 2); + hp64k_update_irl(); } READ16_MEMBER(hp64k_state::hp64k_deltat_r) { - BIT_CLR(m_irl_pending , 2); - hp64k_update_irl(); - return 0; + BIT_CLR(m_irl_pending , 2); + hp64k_update_irl(); + return 0; } WRITE16_MEMBER(hp64k_state::hp64k_deltat_w) { - BIT_CLR(m_irl_pending , 2); - hp64k_update_irl(); + BIT_CLR(m_irl_pending , 2); + hp64k_update_irl(); } READ16_MEMBER(hp64k_state::hp64k_slot_r) { - if (m_slot_select == 0x0a) { - // Slot 10 selected - // On this (fictional) slot is allocated the lower 32KW of RAM - - switch (m_slot_map) { - case 0: - // IDEN - // ID of 32KW RAM expansion - return 0x402; - - case 1: - // MAP1 - // Lower half of RAM - return m_low32k_ram[ offset ]; - - default: - // MAP2&3 - // Upper half of RAM - return m_low32k_ram[ offset + 0x4000 ]; - } - } else { - return 0; - } + if (m_slot_select == 0x0a) { + // Slot 10 selected + // On this (fictional) slot is allocated the lower 32KW of RAM + + switch (m_slot_map) { + case 0: + // IDEN + // ID of 32KW RAM expansion + return 0x402; + + case 1: + // MAP1 + // Lower half of RAM + return m_low32k_ram[ offset ]; + + default: + // MAP2&3 + // Upper half of RAM + return m_low32k_ram[ offset + 0x4000 ]; + } + } else { + return 0; + } } WRITE16_MEMBER(hp64k_state::hp64k_slot_w) { - if (m_slot_select == 0x0a && m_slot_map != 0) { - if (m_slot_map != 1) { - // MAP2&3 - offset += 0x4000; - } - m_low32k_ram[ offset ] &= ~mem_mask; - m_low32k_ram[ offset ] |= (data & mem_mask); - } + if (m_slot_select == 0x0a && m_slot_map != 0) { + if (m_slot_map != 1) { + // MAP2&3 + offset += 0x4000; + } + m_low32k_ram[ offset ] &= ~mem_mask; + m_low32k_ram[ offset ] |= (data & mem_mask); + } } WRITE16_MEMBER(hp64k_state::hp64k_slot_sel_w) { - m_slot_map = (UINT8)offset; - m_slot_select = (UINT8)((data >> 8) & 0x3f); + m_slot_map = (UINT8)offset; + m_slot_select = (UINT8)((data >> 8) & 0x3f); } READ16_MEMBER(hp64k_state::hp64k_flp_r) { - m_cpu->dmar_w(0); - - switch (offset) { - case 0: - // DMA transfer, not at TC - if (m_floppy_if_state == HP64K_FLPST_DMARD2) { - m_floppy_if_state = HP64K_FLPST_IDLE; - } else { - logerror("Read from IC=0 with floppy state %d\n" , m_floppy_if_state); - } - break; - - case 1: - if (m_floppy_if_state != HP64K_FLPST_IDLE) { - logerror("read from IC=1 with floppy state %d\n" , m_floppy_if_state); - } - break; - - case 2: - // DMA transfer, at TC - if (m_floppy_if_state == HP64K_FLPST_DMARD2) { - m_floppy_if_state = HP64K_FLPST_IDLE; - m_floppy_dmaen = false; - m_floppy_dmai = true; - } else { - logerror("Read from IC=2 with floppy state %d\n" , m_floppy_if_state); - } - break; - - default: - logerror("read from IC=%d\n" , offset); - } - - hp64k_update_floppy_irq(); - - return ((UINT16)m_floppy_out_latch_msb << 8) | (UINT16)m_floppy_out_latch_lsb; + m_cpu->dmar_w(0); + + switch (offset) { + case 0: + // DMA transfer, not at TC + if (m_floppy_if_state == HP64K_FLPST_DMARD2) { + m_floppy_if_state = HP64K_FLPST_IDLE; + } else { + logerror("Read from IC=0 with floppy state %d\n" , m_floppy_if_state); + } + break; + + case 1: + if (m_floppy_if_state != HP64K_FLPST_IDLE) { + logerror("read from IC=1 with floppy state %d\n" , m_floppy_if_state); + } + break; + + case 2: + // DMA transfer, at TC + if (m_floppy_if_state == HP64K_FLPST_DMARD2) { + m_floppy_if_state = HP64K_FLPST_IDLE; + m_floppy_dmaen = false; + m_floppy_dmai = true; + } else { + logerror("Read from IC=2 with floppy state %d\n" , m_floppy_if_state); + } + break; + + default: + logerror("read from IC=%d\n" , offset); + } + + hp64k_update_floppy_irq(); + + return ((UINT16)m_floppy_out_latch_msb << 8) | (UINT16)m_floppy_out_latch_lsb; } WRITE16_MEMBER(hp64k_state::hp64k_flp_w) { - m_cpu->dmar_w(0); - - if (offset == 3) { - return; - } - - m_floppy_in_latch_msb = (UINT8)(data >> 8); - m_floppy_in_latch_lsb = (UINT8)data; - - switch (offset) { - case 0: - // DMA transfer, not at TC - if (m_floppy_if_state == HP64K_FLPST_DMAWR1) { - m_fdc->data_w(~m_floppy_in_latch_msb); - m_floppy_if_state = HP64K_FLPST_DMAWR2; - } else { - logerror("write to IC=0 with floppy state %d\n" , m_floppy_if_state); - } - break; - - case 1: - if (m_floppy_if_state != HP64K_FLPST_IDLE) { - logerror("write to IC=1 with floppy state %d\n" , m_floppy_if_state); - } - // I/F control register - m_floppy_if_ctrl = m_floppy_in_latch_msb; - if (BIT(m_floppy_if_ctrl , 4)) { - // FDC reset - m_fdc->soft_reset(); - } - if (BIT(m_floppy_if_ctrl , 7)) { - // Interrupt reset - m_floppy_dmai = false; - m_floppy_mdci = false; - } - if (BIT(m_floppy_if_ctrl , 3)) { - // Write (to either FDC or drive control) - if (BIT(m_floppy_if_ctrl , 2)) { - // FDC - m_fdc->gen_w(~m_floppy_if_ctrl & 3 , ~m_floppy_in_latch_lsb); - } else { - // Drive control - m_floppy_drv_ctrl = m_floppy_in_latch_lsb; - hp64k_update_drv_ctrl(); - } - } else { - // Read - if (BIT(m_floppy_if_ctrl , 2)) { - // FDC - m_floppy_out_latch_lsb = ~m_fdc->gen_r(~m_floppy_if_ctrl & 3); - } else { - // Drive control - m_floppy_out_latch_lsb = m_floppy_drv_ctrl; - } - } - // MSB of output latch is always filled with status register - m_floppy_out_latch_msb = m_floppy_status; - m_floppy_dmaen = BIT(m_floppy_if_ctrl , 5) != 0; - hp64k_update_floppy_dma(); - break; - - case 2: - // DMA transfer, at TC - if (m_floppy_if_state == HP64K_FLPST_DMAWR1) { - m_fdc->data_w(~m_floppy_in_latch_msb); - m_floppy_if_state = HP64K_FLPST_DMAWR2; - m_floppy_dmaen = false; - m_floppy_dmai = true; - } else { - logerror("write to IC=2 with floppy state %d\n" , m_floppy_if_state); - } - break; - } - - hp64k_update_floppy_irq(); + m_cpu->dmar_w(0); + + if (offset == 3) { + return; + } + + m_floppy_in_latch_msb = (UINT8)(data >> 8); + m_floppy_in_latch_lsb = (UINT8)data; + + switch (offset) { + case 0: + // DMA transfer, not at TC + if (m_floppy_if_state == HP64K_FLPST_DMAWR1) { + m_fdc->data_w(~m_floppy_in_latch_msb); + m_floppy_if_state = HP64K_FLPST_DMAWR2; + } else { + logerror("write to IC=0 with floppy state %d\n" , m_floppy_if_state); + } + break; + + case 1: + if (m_floppy_if_state != HP64K_FLPST_IDLE) { + logerror("write to IC=1 with floppy state %d\n" , m_floppy_if_state); + } + // I/F control register + m_floppy_if_ctrl = m_floppy_in_latch_msb; + if (BIT(m_floppy_if_ctrl , 4)) { + // FDC reset + m_fdc->soft_reset(); + } + if (BIT(m_floppy_if_ctrl , 7)) { + // Interrupt reset + m_floppy_dmai = false; + m_floppy_mdci = false; + } + if (BIT(m_floppy_if_ctrl , 3)) { + // Write (to either FDC or drive control) + if (BIT(m_floppy_if_ctrl , 2)) { + // FDC + m_fdc->gen_w(~m_floppy_if_ctrl & 3 , ~m_floppy_in_latch_lsb); + } else { + // Drive control + m_floppy_drv_ctrl = m_floppy_in_latch_lsb; + hp64k_update_drv_ctrl(); + } + } else { + // Read + if (BIT(m_floppy_if_ctrl , 2)) { + // FDC + m_floppy_out_latch_lsb = ~m_fdc->gen_r(~m_floppy_if_ctrl & 3); + } else { + // Drive control + m_floppy_out_latch_lsb = m_floppy_drv_ctrl; + } + } + // MSB of output latch is always filled with status register + m_floppy_out_latch_msb = m_floppy_status; + m_floppy_dmaen = BIT(m_floppy_if_ctrl , 5) != 0; + hp64k_update_floppy_dma(); + break; + + case 2: + // DMA transfer, at TC + if (m_floppy_if_state == HP64K_FLPST_DMAWR1) { + m_fdc->data_w(~m_floppy_in_latch_msb); + m_floppy_if_state = HP64K_FLPST_DMAWR2; + m_floppy_dmaen = false; + m_floppy_dmai = true; + } else { + logerror("write to IC=2 with floppy state %d\n" , m_floppy_if_state); + } + break; + } + + hp64k_update_floppy_irq(); } WRITE_LINE_MEMBER(hp64k_state::hp64k_flp_drq_w) { - m_floppy_drq = state; - hp64k_update_floppy_dma(); + m_floppy_drq = state; + hp64k_update_floppy_dma(); } WRITE_LINE_MEMBER(hp64k_state::hp64k_flp_intrq_w) { - if (state && !m_floppy_intrq && !BIT(m_floppy_if_ctrl , 7)) { - m_floppy_mdci = true; - hp64k_update_floppy_irq(); - } - m_floppy_intrq = state; + if (state && !m_floppy_intrq && !BIT(m_floppy_if_ctrl , 7)) { + m_floppy_mdci = true; + hp64k_update_floppy_irq(); + } + m_floppy_intrq = state; } void hp64k_state::hp64k_update_floppy_dma(void) { - if (m_floppy_drq && (m_floppy_dmaen || m_floppy_if_state != HP64K_FLPST_IDLE)) { - switch (m_floppy_if_state) { - case HP64K_FLPST_IDLE: - if (BIT(m_floppy_if_ctrl , 6)) { - // DMA writes - m_cpu->dmar_w(1); - m_floppy_if_state = HP64K_FLPST_DMAWR1; - } else { - // DMA reads - m_floppy_out_latch_msb = ~m_fdc->data_r(); - m_floppy_if_state = HP64K_FLPST_DMARD1; - } - break; - - case HP64K_FLPST_DMAWR2: - m_fdc->data_w(~m_floppy_in_latch_lsb); - m_floppy_if_state = HP64K_FLPST_IDLE; - break; - - case HP64K_FLPST_DMARD1: - m_floppy_out_latch_lsb = ~m_fdc->data_r(); - m_cpu->dmar_w(1); - m_floppy_if_state = HP64K_FLPST_DMARD2; - break; - - default: - logerror("DRQ with floppy state %d\n" , m_floppy_if_state); - } - } + if (m_floppy_drq && (m_floppy_dmaen || m_floppy_if_state != HP64K_FLPST_IDLE)) { + switch (m_floppy_if_state) { + case HP64K_FLPST_IDLE: + if (BIT(m_floppy_if_ctrl , 6)) { + // DMA writes + m_cpu->dmar_w(1); + m_floppy_if_state = HP64K_FLPST_DMAWR1; + } else { + // DMA reads + m_floppy_out_latch_msb = ~m_fdc->data_r(); + m_floppy_if_state = HP64K_FLPST_DMARD1; + } + break; + + case HP64K_FLPST_DMAWR2: + m_fdc->data_w(~m_floppy_in_latch_lsb); + m_floppy_if_state = HP64K_FLPST_IDLE; + break; + + case HP64K_FLPST_DMARD1: + m_floppy_out_latch_lsb = ~m_fdc->data_r(); + m_cpu->dmar_w(1); + m_floppy_if_state = HP64K_FLPST_DMARD2; + break; + + default: + logerror("DRQ with floppy state %d\n" , m_floppy_if_state); + } + } } void hp64k_state::hp64k_update_floppy_irq(void) { - if (m_floppy_dmai) { - BIT_SET(m_floppy_status , 6); - } else { - BIT_CLR(m_floppy_status , 6); - } - if (m_floppy_mdci) { - BIT_SET(m_floppy_status , 7); - } else { - BIT_CLR(m_floppy_status , 7); - } - - bool ir4 = m_floppy_dmai || m_floppy_mdci || - (BIT(m_floppy_status , 2) && !BIT(m_floppy_drv_ctrl , 0)) || - (BIT(m_floppy_status , 5) && !BIT(m_floppy_drv_ctrl , 3)); - - if (ir4) { - BIT_SET(m_irl_pending , 4); - } else { - BIT_CLR(m_irl_pending , 4); - } - - hp64k_update_irl(); + if (m_floppy_dmai) { + BIT_SET(m_floppy_status , 6); + } else { + BIT_CLR(m_floppy_status , 6); + } + if (m_floppy_mdci) { + BIT_SET(m_floppy_status , 7); + } else { + BIT_CLR(m_floppy_status , 7); + } + + bool ir4 = m_floppy_dmai || m_floppy_mdci || + (BIT(m_floppy_status , 2) && !BIT(m_floppy_drv_ctrl , 0)) || + (BIT(m_floppy_status , 5) && !BIT(m_floppy_drv_ctrl , 3)); + + if (ir4) { + BIT_SET(m_irl_pending , 4); + } else { + BIT_CLR(m_irl_pending , 4); + } + + hp64k_update_irl(); } void hp64k_state::hp64k_update_drv_ctrl(void) { - floppy_image_device *floppy0 = m_floppy0->get_device(); - floppy_image_device *floppy1 = m_floppy1->get_device(); - - floppy0->mon_w(BIT(m_floppy_drv_ctrl , 1)); - floppy1->mon_w(BIT(m_floppy_drv_ctrl , 4)); - floppy0->ss_w(!BIT(m_floppy_drv_ctrl , 7)); - floppy1->ss_w(!BIT(m_floppy_drv_ctrl , 7)); - - if (BIT(m_floppy_drv_ctrl , 2)) { - BIT_CLR(m_floppy_status , 2); - } - if (BIT(m_floppy_drv_ctrl , 5)) { - BIT_CLR(m_floppy_status , 5); - } - hp64k_update_floppy_irq(); - - // Drive selection logic: - // m_floppy_drv_ctrl - // Bit 3 0 - Drive selected - // ======================== - // 0 0 - Invalid:both drives selected. Signals to/from drive 1 are routed to FDC. - // 0 1 - Drive 1 - // 1 0 - Drive 0 - // 1 1 - None - floppy_image_device *new_drive; - - if (!BIT(m_floppy_drv_ctrl , 3)) { - new_drive = m_floppy1->get_device(); - } else if (!BIT(m_floppy_drv_ctrl , 0)) { - new_drive = m_floppy0->get_device(); - } else { - new_drive = NULL; - } - - if (new_drive != m_current_floppy) { - m_fdc->set_floppy(new_drive); - - floppy0->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(FUNC(hp64k_state::hp64k_floppy_idx_cb) , this)); - floppy1->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(FUNC(hp64k_state::hp64k_floppy_idx_cb) , this)); - - floppy0->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(hp64k_state::hp64k_floppy_wpt_cb) , this)); - floppy1->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(hp64k_state::hp64k_floppy_wpt_cb) , this)); - - m_current_floppy = new_drive; - } + floppy_image_device *floppy0 = m_floppy0->get_device(); + floppy_image_device *floppy1 = m_floppy1->get_device(); + + floppy0->mon_w(BIT(m_floppy_drv_ctrl , 1)); + floppy1->mon_w(BIT(m_floppy_drv_ctrl , 4)); + floppy0->ss_w(!BIT(m_floppy_drv_ctrl , 7)); + floppy1->ss_w(!BIT(m_floppy_drv_ctrl , 7)); + + if (BIT(m_floppy_drv_ctrl , 2)) { + BIT_CLR(m_floppy_status , 2); + } + if (BIT(m_floppy_drv_ctrl , 5)) { + BIT_CLR(m_floppy_status , 5); + } + hp64k_update_floppy_irq(); + + // Drive selection logic: + // m_floppy_drv_ctrl + // Bit 3 0 - Drive selected + // ======================== + // 0 0 - Invalid:both drives selected. Signals to/from drive 1 are routed to FDC anyway. + // 0 1 - Drive 1 + // 1 0 - Drive 0 + // 1 1 - None + floppy_image_device *new_drive; + + if (!BIT(m_floppy_drv_ctrl , 3)) { + new_drive = m_floppy1->get_device(); + } else if (!BIT(m_floppy_drv_ctrl , 0)) { + new_drive = m_floppy0->get_device(); + } else { + new_drive = NULL; + } + + if (new_drive != m_current_floppy) { + m_fdc->set_floppy(new_drive); + + floppy0->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(FUNC(hp64k_state::hp64k_floppy_idx_cb) , this)); + floppy1->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(FUNC(hp64k_state::hp64k_floppy_idx_cb) , this)); + + floppy0->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(hp64k_state::hp64k_floppy_wpt_cb) , this)); + floppy1->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(hp64k_state::hp64k_floppy_wpt_cb) , this)); + + m_current_floppy = new_drive; + } } WRITE8_MEMBER(hp64k_state::hp64k_floppy0_rdy) { - if (data) { - BIT_CLR(m_floppy_status , 0); - } else { - BIT_SET(m_floppy_status , 0); - } + if (data) { + BIT_CLR(m_floppy_status , 0); + } else { + BIT_SET(m_floppy_status , 0); + } } WRITE8_MEMBER(hp64k_state::hp64k_floppy1_rdy) { - if (data) { - BIT_CLR(m_floppy_status , 3); - } else { - BIT_SET(m_floppy_status , 3); - } + if (data) { + BIT_CLR(m_floppy_status , 3); + } else { + BIT_SET(m_floppy_status , 3); + } } void hp64k_state::hp64k_floppy_idx_cb(floppy_image_device *floppy , int state) { - if (floppy == m_floppy0->get_device()) { - m_ss0->a_w(machine().driver_data()->generic_space() , 0 , !state); - } else if (floppy == m_floppy1->get_device()) { - m_ss1->a_w(machine().driver_data()->generic_space() , 0 , !state); - } - - if (floppy == m_current_floppy) { - m_fdc->index_callback(floppy , state); - } + if (floppy == m_floppy0->get_device()) { + m_ss0->a_w(machine().driver_data()->generic_space() , 0 , !state); + } else if (floppy == m_floppy1->get_device()) { + m_ss1->a_w(machine().driver_data()->generic_space() , 0 , !state); + } + + if (floppy == m_current_floppy) { + m_fdc->index_callback(floppy , state); + } } void hp64k_state::hp64k_floppy_wpt_cb(floppy_image_device *floppy , int state) { - if (floppy == m_floppy0->get_device()) { - logerror("floppy0_wpt %d\n" , state); - if (m_floppy0_wpt && !state) { - BIT_SET(m_floppy_status , 2); - hp64k_update_floppy_irq(); - } - if (state) { - BIT_SET(m_floppy_status, 1); - } else { - BIT_CLR(m_floppy_status, 1); - } - m_floppy0_wpt = state; - } else if (floppy == m_floppy1->get_device()) { - logerror("floppy1_wpt %d\n" , state); - if (m_floppy1_wpt && !state) { - BIT_SET(m_floppy_status , 5); - hp64k_update_floppy_irq(); - } - if (state) { - BIT_SET(m_floppy_status, 4); - } else { - BIT_CLR(m_floppy_status, 4); - } - m_floppy1_wpt = state; - } + if (floppy == m_floppy0->get_device()) { + logerror("floppy0_wpt %d\n" , state); + if (m_floppy0_wpt && !state) { + BIT_SET(m_floppy_status , 2); + hp64k_update_floppy_irq(); + } + if (state) { + BIT_SET(m_floppy_status, 1); + } else { + BIT_CLR(m_floppy_status, 1); + } + m_floppy0_wpt = state; + } else if (floppy == m_floppy1->get_device()) { + logerror("floppy1_wpt %d\n" , state); + if (m_floppy1_wpt && !state) { + BIT_SET(m_floppy_status , 5); + hp64k_update_floppy_irq(); + } + if (state) { + BIT_SET(m_floppy_status, 4); + } else { + BIT_CLR(m_floppy_status, 4); + } + m_floppy1_wpt = state; + } } READ16_MEMBER(hp64k_state::hp64k_usart_r) { - // todo - // bit 8 == bit 7 rear panel switches (modem/terminal) ??? - return m_rs232_sw->read() << 8; + // todo + // bit 8 == bit 7 rear panel switches (modem/terminal) ??? + return m_rs232_sw->read() << 8; } WRITE16_MEMBER(hp64k_state::hp64k_beep_w) { - if (!BIT(offset , 0)) { - m_beeper->set_state(1); - // Duration is bogus: in the real hw envelope decays exponentially with RC=~136 ms - m_beep_timer->adjust(attotime::from_msec(130)); - } + if (!BIT(offset , 0)) { + m_beeper->set_state(1); + // Duration is bogus: in the real hw envelope decays exponentially with RC=~136 ms + m_beep_timer->adjust(attotime::from_msec(130)); + } } TIMER_DEVICE_CALLBACK_MEMBER(hp64k_state::hp64k_beeper_off) { - m_beeper->set_state(0); + m_beeper->set_state(0); } static INPUT_PORTS_START(hp64k) @@ -916,15 +922,15 @@ static INPUT_PORTS_START(hp64k) // column = [0..15] // row = [0..7] PORT_START("KEY0") - PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) - PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') - PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') - PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') - PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') - PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') - PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') - PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') - PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_UNUSED) @@ -932,90 +938,90 @@ static INPUT_PORTS_START(hp64k) PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') - PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') - PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') - PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') - PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') - PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') - PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('^') PORT_CHAR('~') - PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|') - PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('^') PORT_CHAR('~') + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|') + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_START("KEY1") - PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') - PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') - PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') - PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') - PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') - PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_NAME("RECALL") - PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_NAME("CLRLINE") - PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("CAPS") - PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("RESET") - PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("SK1") - PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("SK2") + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_NAME("RECALL") + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_NAME("CLRLINE") + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("CAPS") + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("RESET") + PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("SK1") + PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("SK2") PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("SK3") - PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("SK4") + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("SK3") + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("SK4") PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("SK5") - PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("SK6") - PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("SK7") + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("SK5") + PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("SK6") + PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("SK7") PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_NAME("SK8") + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_NAME("SK8") PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_START("KEY2") - PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') - PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') - PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') - PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') - PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') - PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("INSCHAR") - PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("DELCHAR") + PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("INSCHAR") + PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("DELCHAR") PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') - PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') - PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`') - PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_CHAR('{') - PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('_') PORT_CHAR(UCHAR_MAMEKEY(DEL)) - PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("ROLLUP") - PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) - PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("NEXTPG") + PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_CHAR('`') + PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('_') PORT_CHAR(UCHAR_MAMEKEY(DEL)) + PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("ROLLUP") + PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) + PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("NEXTPG") PORT_START("KEY3") PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) @@ -1023,15 +1029,15 @@ static INPUT_PORTS_START(hp64k) PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') - PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) - PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') - PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') - PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') - PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') - PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR(']') PORT_CHAR('}') - PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) + PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') + PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') + PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) @@ -1051,82 +1057,82 @@ static INPUT_PORTS_START(hp64k) PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGUP) PORT_NAME("PREVPG") - PORT_START("rear_sw") - PORT_DIPNAME(0x8000 , 0x8000 , "E9-6 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x8000 , DEF_STR(No)) - PORT_DIPNAME(0x4000 , 0x4000 , "E9-5 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x4000 , DEF_STR(No)) - PORT_DIPNAME(0x2000 , 0x2000 , "E9-4 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x2000 , DEF_STR(No)) - PORT_DIPNAME(0x1000 , 0x1000 , "E9-3 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x1000 , DEF_STR(No)) - PORT_DIPNAME(0x0800 , 0x0800 , "E9-2 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x0800 , DEF_STR(No)) - PORT_DIPNAME(0x0400 , 0x0400 , "E9-1 jumper") - PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) - PORT_DIPSETTING(0x0400 , DEF_STR(No)) - PORT_DIPNAME(0x0018 , 0x0000 , "System source") - PORT_DIPLOCATION("S1:!7,!6") - PORT_DIPSETTING(0x0000 , "Sys bus") - PORT_DIPSETTING(0x0008 , "Local storage-talk only") - PORT_DIPSETTING(0x0010 , "Local storage-addressable") - PORT_DIPSETTING(0x0018 , "Performance verification") - PORT_DIPNAME(0x0300 , 0x0000 , "Upper bus address (N/U)") - PORT_DIPLOCATION("S1:!2,!1") - PORT_DIPSETTING(0x0000 , "0") - PORT_DIPSETTING(0x0100 , "1") - PORT_DIPSETTING(0x0200 , "2") - PORT_DIPSETTING(0x0300 , "3") - PORT_DIPNAME(0x0007 , 0x0000 , "System bus address") - PORT_DIPLOCATION("S1:!5,!4,!3") - PORT_DIPSETTING(0x0000 , "0") - PORT_DIPSETTING(0x0001 , "1") - PORT_DIPSETTING(0x0002 , "2") - PORT_DIPSETTING(0x0003 , "3") - PORT_DIPSETTING(0x0004 , "4") - PORT_DIPSETTING(0x0005 , "5") - PORT_DIPSETTING(0x0006 , "6") - PORT_DIPSETTING(0x0007 , "7") - PORT_DIPNAME(0x0080 , 0x0000 , "RS232 mode") - PORT_DIPLOCATION("S4 IO:!8") - PORT_DIPSETTING(0x0000 , "Terminal") - PORT_DIPSETTING(0x0080 , "Modem") - - PORT_START("rs232_sw") - PORT_DIPNAME(0xc0 , 0x00 , "Stop bits") - PORT_DIPLOCATION("S4 IO:!2,!1") - PORT_DIPSETTING(0x00 , "Invalid") - PORT_DIPSETTING(0x40 , "1") - PORT_DIPSETTING(0x80 , "1.5") - PORT_DIPSETTING(0xc0 , "2") - PORT_DIPNAME(0x20 , 0x00 , "Parity") - PORT_DIPLOCATION("S4 IO:!3") - PORT_DIPSETTING(0x00 , "Odd") - PORT_DIPSETTING(0x20 , "Even") - PORT_DIPNAME(0x10 , 0x00 , "Parity enable") - PORT_DIPLOCATION("S4 IO:!4") - PORT_DIPSETTING(0x00 , DEF_STR(No)) - PORT_DIPSETTING(0x10 , DEF_STR(Yes)) - PORT_DIPNAME(0x0c , 0x00 , "Char length") - PORT_DIPLOCATION("S4 IO:!6,!5") - PORT_DIPSETTING(0x00 , "5") - PORT_DIPSETTING(0x04 , "6") - PORT_DIPSETTING(0x08 , "7") - PORT_DIPSETTING(0x0c , "8") - PORT_DIPNAME(0x02 , 0x00 , "Baud rate factor") - PORT_DIPLOCATION("S4 IO:!7") - PORT_DIPSETTING(0x00 , "1x") - PORT_DIPSETTING(0x02 , "16x") - + PORT_START("rear_sw") + PORT_DIPNAME(0x8000 , 0x8000 , "E9-6 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x8000 , DEF_STR(No)) + PORT_DIPNAME(0x4000 , 0x4000 , "E9-5 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x4000 , DEF_STR(No)) + PORT_DIPNAME(0x2000 , 0x2000 , "E9-4 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x2000 , DEF_STR(No)) + PORT_DIPNAME(0x1000 , 0x1000 , "E9-3 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x1000 , DEF_STR(No)) + PORT_DIPNAME(0x0800 , 0x0800 , "E9-2 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x0800 , DEF_STR(No)) + PORT_DIPNAME(0x0400 , 0x0400 , "E9-1 jumper") + PORT_DIPSETTING(0x0000 , DEF_STR(Yes)) + PORT_DIPSETTING(0x0400 , DEF_STR(No)) + PORT_DIPNAME(0x0018 , 0x0000 , "System source") + PORT_DIPLOCATION("S1:!7,!6") + PORT_DIPSETTING(0x0000 , "Sys bus") + PORT_DIPSETTING(0x0008 , "Local storage-talk only") + PORT_DIPSETTING(0x0010 , "Local storage-addressable") + PORT_DIPSETTING(0x0018 , "Performance verification") + PORT_DIPNAME(0x0300 , 0x0000 , "Upper bus address (N/U)") + PORT_DIPLOCATION("S1:!2,!1") + PORT_DIPSETTING(0x0000 , "0") + PORT_DIPSETTING(0x0100 , "1") + PORT_DIPSETTING(0x0200 , "2") + PORT_DIPSETTING(0x0300 , "3") + PORT_DIPNAME(0x0007 , 0x0000 , "System bus address") + PORT_DIPLOCATION("S1:!5,!4,!3") + PORT_DIPSETTING(0x0000 , "0") + PORT_DIPSETTING(0x0001 , "1") + PORT_DIPSETTING(0x0002 , "2") + PORT_DIPSETTING(0x0003 , "3") + PORT_DIPSETTING(0x0004 , "4") + PORT_DIPSETTING(0x0005 , "5") + PORT_DIPSETTING(0x0006 , "6") + PORT_DIPSETTING(0x0007 , "7") + PORT_DIPNAME(0x0080 , 0x0000 , "RS232 mode") + PORT_DIPLOCATION("S4 IO:!8") + PORT_DIPSETTING(0x0000 , "Terminal") + PORT_DIPSETTING(0x0080 , "Modem") + + PORT_START("rs232_sw") + PORT_DIPNAME(0xc0 , 0x00 , "Stop bits") + PORT_DIPLOCATION("S4 IO:!2,!1") + PORT_DIPSETTING(0x00 , "Invalid") + PORT_DIPSETTING(0x40 , "1") + PORT_DIPSETTING(0x80 , "1.5") + PORT_DIPSETTING(0xc0 , "2") + PORT_DIPNAME(0x20 , 0x00 , "Parity") + PORT_DIPLOCATION("S4 IO:!3") + PORT_DIPSETTING(0x00 , "Odd") + PORT_DIPSETTING(0x20 , "Even") + PORT_DIPNAME(0x10 , 0x00 , "Parity enable") + PORT_DIPLOCATION("S4 IO:!4") + PORT_DIPSETTING(0x00 , DEF_STR(No)) + PORT_DIPSETTING(0x10 , DEF_STR(Yes)) + PORT_DIPNAME(0x0c , 0x00 , "Char length") + PORT_DIPLOCATION("S4 IO:!6,!5") + PORT_DIPSETTING(0x00 , "5") + PORT_DIPSETTING(0x04 , "6") + PORT_DIPSETTING(0x08 , "7") + PORT_DIPSETTING(0x0c , "8") + PORT_DIPNAME(0x02 , 0x00 , "Baud rate factor") + PORT_DIPLOCATION("S4 IO:!7") + PORT_DIPSETTING(0x00 , "1x") + PORT_DIPSETTING(0x02 , "16x") + INPUT_PORTS_END static SLOT_INTERFACE_START(hp64k_floppies) - SLOT_INTERFACE("525dd" , FLOPPY_525_DD) + SLOT_INTERFACE("525dd" , FLOPPY_525_DD) SLOT_INTERFACE_END static MACHINE_CONFIG_START(hp64k , hp64k_state) @@ -1139,8 +1145,8 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state) // Actual keyboard refresh rate should be between 1 and 2 kHz MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer" , hp64k_state , hp64k_kb_scan , attotime::from_hz(100)) - // Line sync timer. A line frequency of 50 Hz is assumed. - MCFG_TIMER_DRIVER_ADD_PERIODIC("linesync_timer" , hp64k_state , hp64k_line_sync , attotime::from_hz(50)) + // Line sync timer. A line frequency of 50 Hz is assumed. + MCFG_TIMER_DRIVER_ADD_PERIODIC("linesync_timer" , hp64k_state , hp64k_line_sync , attotime::from_hz(50)) // Clock = 25 MHz / 9 * (112/114) MCFG_DEVICE_ADD("crtc" , I8275 , 2729045) @@ -1154,37 +1160,37 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state) MCFG_SCREEN_REFRESH_RATE(60) MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette") - MCFG_FD1791x_ADD("fdc" , XTAL_4MHz / 4) - MCFG_WD_FDC_FORCE_READY - MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w)) - MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0" , hp64k_floppies , "525dd" , floppy_image_device::default_floppy_formats) - MCFG_SLOT_FIXED(true) - MCFG_FLOPPY_DRIVE_ADD("fdc:1" , hp64k_floppies , "525dd" , floppy_image_device::default_floppy_formats) - MCFG_SLOT_FIXED(true) - - MCFG_DEVICE_ADD("fdc_rdy0" , TTL74123 , 0) - MCFG_TTL74123_CONNECTION_TYPE(TTL74123_NOT_GROUNDED_NO_DIODE) - MCFG_TTL74123_RESISTOR_VALUE(RES_K(68.1)) - // Warning! Duration formula is not correct for LS123, actual capacitor is 10 uF - MCFG_TTL74123_CAPACITOR_VALUE(CAP_U(16)) - MCFG_TTL74123_B_PIN_VALUE(1) - MCFG_TTL74123_CLEAR_PIN_VALUE(1) - MCFG_TTL74123_OUTPUT_CHANGED_CB(WRITE8(hp64k_state , hp64k_floppy0_rdy)); - - MCFG_DEVICE_ADD("fdc_rdy1" , TTL74123 , 0) - MCFG_TTL74123_CONNECTION_TYPE(TTL74123_NOT_GROUNDED_NO_DIODE) - MCFG_TTL74123_RESISTOR_VALUE(RES_K(68.1)) - MCFG_TTL74123_CAPACITOR_VALUE(CAP_U(16)) - MCFG_TTL74123_B_PIN_VALUE(1) - MCFG_TTL74123_CLEAR_PIN_VALUE(1) - MCFG_TTL74123_OUTPUT_CHANGED_CB(WRITE8(hp64k_state , hp64k_floppy1_rdy)); - - MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_SOUND_ADD("beeper" , BEEP , 2500) - MCFG_SOUND_ROUTE(ALL_OUTPUTS , "mono" , 1.00) - - MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off); + MCFG_FD1791x_ADD("fdc" , XTAL_4MHz / 4) + MCFG_WD_FDC_FORCE_READY + MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w)) + MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w)) + MCFG_FLOPPY_DRIVE_ADD("fdc:0" , hp64k_floppies , "525dd" , floppy_image_device::default_floppy_formats) + MCFG_SLOT_FIXED(true) + MCFG_FLOPPY_DRIVE_ADD("fdc:1" , hp64k_floppies , "525dd" , floppy_image_device::default_floppy_formats) + MCFG_SLOT_FIXED(true) + + MCFG_DEVICE_ADD("fdc_rdy0" , TTL74123 , 0) + MCFG_TTL74123_CONNECTION_TYPE(TTL74123_NOT_GROUNDED_NO_DIODE) + MCFG_TTL74123_RESISTOR_VALUE(RES_K(68.1)) + // Warning! Duration formula is not correct for LS123, actual capacitor is 10 uF + MCFG_TTL74123_CAPACITOR_VALUE(CAP_U(16)) + MCFG_TTL74123_B_PIN_VALUE(1) + MCFG_TTL74123_CLEAR_PIN_VALUE(1) + MCFG_TTL74123_OUTPUT_CHANGED_CB(WRITE8(hp64k_state , hp64k_floppy0_rdy)); + + MCFG_DEVICE_ADD("fdc_rdy1" , TTL74123 , 0) + MCFG_TTL74123_CONNECTION_TYPE(TTL74123_NOT_GROUNDED_NO_DIODE) + MCFG_TTL74123_RESISTOR_VALUE(RES_K(68.1)) + MCFG_TTL74123_CAPACITOR_VALUE(CAP_U(16)) + MCFG_TTL74123_B_PIN_VALUE(1) + MCFG_TTL74123_CLEAR_PIN_VALUE(1) + MCFG_TTL74123_OUTPUT_CHANGED_CB(WRITE8(hp64k_state , hp64k_floppy1_rdy)); + + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("beeper" , BEEP , 2500) + MCFG_SOUND_ROUTE(ALL_OUTPUTS , "mono" , 1.00) + + MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off); MACHINE_CONFIG_END ROM_START(hp64k) |