diff options
author | 2020-06-27 21:44:14 +1000 | |
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committer | 2020-06-27 21:44:14 +1000 | |
commit | 27ee93116d3a96ed1a74b6a3be5368116983dbde (patch) | |
tree | 367eb9b573a126f8fc243c873b9ae74ac13b58f2 | |
parent | 5f97eb904ab5e491ddec3431e415de9cc93d36c3 (diff) |
*replaced lambdas with bank
-rw-r--r-- | src/mame/drivers/ccs2810.cpp | 12 | ||||
-rw-r--r-- | src/mame/drivers/ckz80.cpp | 14 | ||||
-rw-r--r-- | src/mame/drivers/cortex.cpp | 12 | ||||
-rw-r--r-- | src/mame/drivers/dps1.cpp | 16 | ||||
-rw-r--r-- | src/mame/drivers/rc702.cpp | 14 |
5 files changed, 39 insertions, 29 deletions
diff --git a/src/mame/drivers/ccs2810.cpp b/src/mame/drivers/ccs2810.cpp index 2d3556198d9..f415c37c6ae 100644 --- a/src/mame/drivers/ccs2810.cpp +++ b/src/mame/drivers/ccs2810.cpp @@ -168,6 +168,7 @@ public: ccs300_state(const machine_config &mconfig, device_type type, const char *tag) : ccs_state(mconfig, type, tag) , m_ram1(*this, "mainram") + , m_bank1(*this, "bank1") { } void ccs300(machine_config &config); @@ -178,8 +179,8 @@ private: void ccs300_io(address_map &map); void ccs300_mem(address_map &map); void port40_w(u8 data); - bool m_rom_in_map; required_shared_ptr<u8> m_ram1; + required_memory_bank m_bank1; }; u8 ccs_state::memory_read(offs_t offset) @@ -251,7 +252,7 @@ void ccs_state::ccs2422_io(address_map &map) void ccs300_state::ccs300_mem(address_map &map) { map(0x0000, 0xffff).ram().share("mainram"); - map(0x0000, 0x07ff).lr8(NAME([this] (offs_t offset) { if (m_rom_in_map) return m_rom[offset]; else return m_ram1[offset]; } )); + map(0x0000, 0x07ff).bankr("bank1"); } void ccs300_state::ccs300_io(address_map &map) @@ -965,17 +966,18 @@ void ccs_state::machine_reset() void ccs300_state::port40_w(u8 data) { - m_rom_in_map = !BIT(data, 0); + m_bank1->set_entry(BIT(~data, 0)); } void ccs300_state::machine_reset() { - m_rom_in_map = true; + m_bank1->set_entry(1); } void ccs300_state::machine_start() { - save_item(NAME(m_rom_in_map)); + m_bank1->configure_entry(0, m_ram1); + m_bank1->configure_entry(1, m_rom); save_item(NAME(m_ss)); save_item(NAME(m_dden)); save_item(NAME(m_dsize)); diff --git a/src/mame/drivers/ckz80.cpp b/src/mame/drivers/ckz80.cpp index ad95a5ac8c2..8c9e73392b8 100644 --- a/src/mame/drivers/ckz80.cpp +++ b/src/mame/drivers/ckz80.cpp @@ -57,6 +57,7 @@ public: , m_maincpu(*this, "maincpu") , m_rom(*this, "maincpu") , m_ram(*this, "mainram") + , m_bank1(*this, "bank1") , m_terminal(*this, "terminal") , m_fdc(*this, "fdc") { } @@ -76,11 +77,11 @@ private: void io_map(address_map &map); void mem_map(address_map &map); u8 m_term_data; - bool m_rom_in_map; + memory_passthrough_handler *m_rom_shadow_tap; required_device<z80_device> m_maincpu; required_region_ptr<u8> m_rom; - memory_passthrough_handler *m_rom_shadow_tap; required_shared_ptr<u8> m_ram; + required_memory_bank m_bank1; required_device<generic_terminal_device> m_terminal; required_device<upd765a_device> m_fdc; }; @@ -88,7 +89,7 @@ private: void ckz80_state::port40_w(u8 data) { - m_rom_in_map = !BIT(data, 1); + m_bank1->set_entry(BIT(~data, 1)); } u8 ckz80_state::port80_r() @@ -106,7 +107,7 @@ u8 ckz80_state::port81_r() void ckz80_state::mem_map(address_map &map) { map(0x0000, 0xffff).ram().share("mainram"); - map(0xe000, 0xffff).lr8(NAME([this] (offs_t offset) { if (m_rom_in_map) return m_rom[offset]; else return m_ram[offset+0xe000]; } )); + map(0xe000, 0xffff).bankr("bank1"); } void ckz80_state::io_map(address_map &map) @@ -153,8 +154,9 @@ WRITE_LINE_MEMBER( ckz80_state::ctc_z2_w ) void ckz80_state::machine_start() { + m_bank1->configure_entry(0, m_ram+0xe000); + m_bank1->configure_entry(1, m_rom); save_item(NAME(m_term_data)); - save_item(NAME(m_rom_in_map)); } void ckz80_state::machine_reset() @@ -176,7 +178,7 @@ void ckz80_state::machine_reset() return data; }); - m_rom_in_map = true; + m_bank1->set_entry(1); } static void ckz80_floppies(device_slot_interface &device) diff --git a/src/mame/drivers/cortex.cpp b/src/mame/drivers/cortex.cpp index 577aee8a71b..e5f2774683f 100644 --- a/src/mame/drivers/cortex.cpp +++ b/src/mame/drivers/cortex.cpp @@ -62,6 +62,7 @@ public: , m_maincpu(*this, "maincpu") , m_rom(*this, "maincpu") , m_ram(*this, "mainram") + , m_bank1(*this, "bank1") , m_beep(*this, "beeper") , m_io_dsw(*this, "DSW") { } @@ -77,7 +78,6 @@ private: u8 keyboard_r(offs_t offset); void io_map(address_map &map); void mem_map(address_map &map); - bool m_rom_in_map; bool m_kbd_ack; bool m_vdp_int; u8 m_term_data; @@ -86,13 +86,14 @@ private: required_device<tms9995_device> m_maincpu; required_region_ptr<u8> m_rom; required_shared_ptr<u8> m_ram; + required_memory_bank m_bank1; required_device<beep_device> m_beep; required_ioport m_io_dsw; }; void cortex_state::mem_map(address_map &map) { - map(0x0000, 0x7fff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; })); + map(0x0000, 0x7fff).ram().share("mainram").bankr("bank1"); map(0x8000, 0xefff).ram(); map(0xf100, 0xf11f).ram(); // memory mapping unit map(0xf120, 0xf121).rw("crtc", FUNC(tms9928a_device::read), FUNC(tms9928a_device::write)); @@ -159,7 +160,7 @@ WRITE_LINE_MEMBER( cortex_state::keyboard_ack_w ) WRITE_LINE_MEMBER( cortex_state::romsw_w ) { - m_rom_in_map = state ? 0 : 1; + m_bank1->set_entry(state ? 0 : 1); } WRITE_LINE_MEMBER( cortex_state::vdp_int_w ) @@ -176,7 +177,8 @@ void cortex_state::kbd_put(u8 data) void cortex_state::machine_start() { - save_item(NAME(m_rom_in_map)); + m_bank1->configure_entry(0, m_ram); + m_bank1->configure_entry(1, m_rom); save_item(NAME(m_kbd_ack)); save_item(NAME(m_vdp_int)); save_item(NAME(m_term_data)); @@ -187,7 +189,7 @@ void cortex_state::machine_reset() m_kbd_ack = 1; m_vdp_int = 0; m_beep->set_state(0); - m_rom_in_map = true; + m_bank1->set_entry(1); m_maincpu->ready_line(ASSERT_LINE); m_maincpu->reset_line(ASSERT_LINE); } diff --git a/src/mame/drivers/dps1.cpp b/src/mame/drivers/dps1.cpp index 1c8a493fb07..e1fb7860c23 100644 --- a/src/mame/drivers/dps1.cpp +++ b/src/mame/drivers/dps1.cpp @@ -31,6 +31,7 @@ public: , m_maincpu(*this, "maincpu") , m_rom(*this, "maincpu") , m_ram(*this, "mainram") + , m_bank1(*this, "bank1") , m_fdc(*this, "fdc") , m_floppy0(*this, "fdc:0") //, m_floppy1(*this, "fdc:1") @@ -54,12 +55,12 @@ private: void io_map(address_map &map); void mem_map(address_map &map); - bool m_rom_in_map; bool m_dma_dir; u16 m_dma_adr; required_device<cpu_device> m_maincpu; required_region_ptr<u8> m_rom; required_shared_ptr<u8> m_ram; + required_memory_bank m_bank1; required_device<upd765_family_device> m_fdc; required_device<floppy_connector> m_floppy0; //required_device<floppy_connector> m_floppy1; @@ -67,8 +68,8 @@ private: void dps1_state::mem_map(address_map &map) { - map(0x0000, 0x03ff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; })); - map(0x0400, 0xffff).ram(); + map(0x0000, 0xffff).ram().share("mainram"); + map(0x0000, 0x03ff).bankr("bank1"); } void dps1_state::io_map(address_map &map) @@ -113,7 +114,7 @@ void dps1_state::portb4_w(u8 data) // enable eprom void dps1_state::portb6_w(u8 data) { - m_rom_in_map = true; + m_bank1->set_entry(1); } // set A16-23 @@ -136,7 +137,7 @@ void dps1_state::portbc_w(u8 data) // disable eprom void dps1_state::portbe_w(u8 data) { - m_rom_in_map = false; + m_bank1->set_entry(0); } // read 8 front-panel switches @@ -173,14 +174,15 @@ WRITE_LINE_MEMBER( dps1_state::fdc_drq_w ) void dps1_state::machine_start() { - save_item(NAME(m_rom_in_map)); + m_bank1->configure_entry(0, m_ram); + m_bank1->configure_entry(1, m_rom); save_item(NAME(m_dma_dir)); save_item(NAME(m_dma_adr)); } void dps1_state::machine_reset() { - m_rom_in_map = true; + m_bank1->set_entry(1); // set fdc for 8 inch floppies m_fdc->set_rate(500000); // turn on the motor diff --git a/src/mame/drivers/rc702.cpp b/src/mame/drivers/rc702.cpp index bd039882f36..2f54c89d024 100644 --- a/src/mame/drivers/rc702.cpp +++ b/src/mame/drivers/rc702.cpp @@ -52,6 +52,7 @@ public: , m_maincpu(*this, "maincpu") , m_rom(*this, "maincpu") , m_ram(*this, "mainram") + , m_bank1(*this, "bank1") , m_p_chargen(*this, "chargen") , m_ctc1(*this, "ctc1") , m_pio(*this, "pio") @@ -92,11 +93,11 @@ private: uint16_t m_beepcnt; bool m_eop; bool m_dack1; - bool m_rom_in_map; required_device<palette_device> m_palette; required_device<z80_device> m_maincpu; required_region_ptr<u8> m_rom; required_shared_ptr<u8> m_ram; + required_memory_bank m_bank1; required_region_ptr<u8> m_p_chargen; required_device<z80ctc_device> m_ctc1; required_device<z80pio_device> m_pio; @@ -110,8 +111,8 @@ private: void rc702_state::mem_map(address_map &map) { - map(0x0000, 0x07ff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; })); - map(0x0800, 0xffff).ram(); + map(0x0000, 0xffff).ram().share("mainram"); + map(0x0000, 0x07ff).bankr("bank1"); } void rc702_state::io_map(address_map &map) @@ -124,7 +125,7 @@ void rc702_state::io_map(address_map &map) map(0x0c, 0x0f).rw(m_ctc1, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); map(0x10, 0x13).rw(m_pio, FUNC(z80pio_device::read), FUNC(z80pio_device::write)); map(0x14, 0x17).portr("DSW").w(FUNC(rc702_state::port14_w)); // motors - map(0x18, 0x1b).lw8(NAME([this] (u8 data) { m_rom_in_map = false; })); // replace roms with ram + map(0x18, 0x1b).lw8(NAME([this] (u8 data) { m_bank1->set_entry(0); })); // replace roms with ram map(0x1c, 0x1f).w(FUNC(rc702_state::port1c_w)); // sound map(0xf0, 0xff).rw(m_dma, FUNC(am9517a_device::read), FUNC(am9517a_device::write)); } @@ -160,7 +161,7 @@ INPUT_PORTS_END void rc702_state::machine_reset() { - m_rom_in_map = true; + m_bank1->set_entry(1); m_beepcnt = 0xffff; m_dack1 = 0; m_eop = 0; @@ -172,13 +173,14 @@ void rc702_state::machine_reset() void rc702_state::machine_start() { + m_bank1->configure_entry(0, m_ram); + m_bank1->configure_entry(1, m_rom); save_item(NAME(m_q_state)); save_item(NAME(m_qbar_state)); save_item(NAME(m_drq_state)); save_item(NAME(m_beepcnt)); save_item(NAME(m_eop)); save_item(NAME(m_dack1)); - save_item(NAME(m_rom_in_map)); } WRITE_LINE_MEMBER( rc702_state::q_w ) |