summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/drivers/bfm_sc4h.c
blob: 256746f635e7da0b69ac4e379aac0067a8bc3790 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
/*

    Scorpion 4 Hardware Platform (c)1996 Bell Fruit Manufacturing

    Skeleton Driver

    THIS DRIVER IS NOT WORKING

    -----------------

    Scorpion 4:::

    Main CPU is a MC68307FG16, present on Motherboard

    Configuration is SC4 motherboard + game card

    The game card contains the program roms, sound rom and YMZ280B

    Adder 4 video board adds an additional card with a MC68340PV25E (25.175Mhz)

    -------------------------------

    This file contains the hardware emulation, for the supported sets
	see bfm_sc4.c

*/



#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "includes/bfm_sc45.h"
#include "sound/ymz280b.h"
#include "machine/68681.h"
#include "bfm_sc4.lh"
#include "machine/bfm_bd1.h"

class sc4_state : public driver_device
{
public:
	sc4_state(const machine_config &mconfig, device_type type, const char *tag)
		: driver_device(mconfig, type, tag),
		  m_maincpu(*this, "maincpu")
	{
	}

	UINT16* m_cpuregion;
	UINT16* m_mainram;
	// devices
	device_t* m_duart;
	device_t* m_ymz;
	required_device<cpu_device> m_maincpu;

	// serial vfd
	int vfd_enabled;
	bool vfd_old_clock;

	UINT8 vfd_ser_value;
	int vfd_ser_count;
};

class sc4_adder4_state : public sc4_state
{
public:
	sc4_adder4_state(const machine_config &mconfig, device_type type, const char *tag)
		: sc4_state(mconfig, type, tag),
		  m_adder4cpu(*this, "adder4")
	{ }

	// devices
	required_device<cpu_device> m_adder4cpu;
};

static READ16_HANDLER( sc4_mem_r )
{
	sc4_state *state = space->machine().driver_data<sc4_state>();
	int pc = cpu_get_pc(&space->device());
	int cs = m68307_get_cs(state->m_maincpu, offset * 2);
	int base = 0, end = 0, base2 = 0, end2 = 0;
//	if (!(space->debugger_access())) printf("cs is %d\n", cs);

	switch ( cs )
	{
		case 1:
			if (offset<0x100000/2)
				return state->m_cpuregion[offset];
			else
				logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d\n", pc, offset*2, mem_mask, cs);
			break;

		case 2:
			base = 0x800000/2;
			end = base + 0x10000 / 2;

			base2 = 0x810000/2;
			end2 = base2 + 0x10000 / 2;


			if ((offset>=base) && (offset<end))
			{
				offset-=base;
				return(state->m_mainram[offset]);
			}
			else if ((offset>=base2) && (offset<end2))
			{
				offset-=base2;

				switch (offset << 1)
				{
					case 0x0030:
						return 0x0000;

					case 0x0050:
						return 0x0000;
				
					case 0x0060:
						return 0x0000;
				
					case 0x0240:
						return 0xffff;

					case 0x02e0:
						return 0x0000;

					case 0x1000:
						return 0x0000;

					case 0x1010:
						return 0x0000;
	
					case 0x1020:
						return 0x0000;

					case 0x1040:
						return 0x0000;

					case 0x1244:
						return ymz280b_r(state->m_ymz,0);

					case 0x1246:
						return ymz280b_r(state->m_ymz,1);

					default:
						logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d (LAMPS etc.)\n", pc, offset*2, mem_mask, cs);
				}
			}
			else
			{
				logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d\n", pc, offset*2, mem_mask, cs);
			}
			break;

		case 3:
			base = 0xc00000/2;
			end = base + 0x20 / 2;
	
			if ((offset>=base) && (offset<end))
			{
				offset-=base;
				return duart68681_r(state->m_duart,offset);
			}
			else
			{
				logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d\n", pc, offset*2, mem_mask, cs);
				return 0x0000;
			}

			break;

		case 4:
			logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d\n", pc, offset*2, mem_mask, cs);
			return 0x0000;//0xffff;
			break;

		default:
			logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d (invalid?)\n", pc, offset*2, mem_mask, cs);

	}

	return 0x0000;
}

static WRITE16_HANDLER( sc4_mem_w )
{
	sc4_state *state = space->machine().driver_data<sc4_state>();
	int pc = cpu_get_pc(&space->device());
	int cs = m68307_get_cs(state->m_maincpu, offset * 2);
	int base = 0, end = 0, base2 = 0, end2 = 0;

	switch ( cs )
	{
		case 1:
			if (offset<0x100000/2)
				logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d (ROM WRITE?!)\n", pc, offset*2, data, mem_mask, cs);
			else
				logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d\n", pc, offset*2, data, mem_mask, cs);
			
			break;

		case 2:
			base = 0x800000/2;
			end = base + 0x10000 / 2;
			base2 = 0x810000/2;
			end2 = base2 + 0x10000 / 2;

			if ((offset>=base) && (offset<end))
			{
				offset-=base;
				COMBINE_DATA(&state->m_mainram[offset]);
			}
			else if ((offset>=base2) && (offset<end2))
			{
				offset-=base2;

				switch (offset << 1)
				{
					case 0x1248:
						ymz280b_w(state->m_ymz,0, data & 0xff);
						break;

					case 0x124a:
						ymz280b_w(state->m_ymz,1, data & 0xff);
						break;

				
					default:
						logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d (LAMPS etc.)\n", pc, offset*2, data, mem_mask, cs);
				}
			}
			else
			{
				logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d\n", pc, offset*2, data, mem_mask, cs);
			}
			break;

		case 3:
			base = 0xc00000/2;
			end = base + 0x20 / 2;
	
			if ((offset>=base) && (offset<end))
			{
				offset-=base;
				duart68681_w(state->m_duart,offset,data&0x00ff);
			}
			else
			{
				logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d\n", pc, offset*2, data, mem_mask, cs);
			}

			break;

		case 4:
			logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d\n", pc, offset*2, data, mem_mask, cs);
			break;

		default:
			logerror("%08x maincpu write access offset %08x data %04x mem_mask %04x cs %d (invalid?)\n", pc, offset*2, data, mem_mask, cs);
	}
}

static ADDRESS_MAP_START( sc4_map, AS_PROGRAM, 16, sc4_adder4_state )
	AM_RANGE(0x0000000, 0xffffff) AM_READWRITE_LEGACY(sc4_mem_r, sc4_mem_w) 
ADDRESS_MAP_END

static ADDRESS_MAP_START( sc4_adder4_map, AS_PROGRAM, 32, sc4_adder4_state )
	AM_RANGE(0x000000, 0x2fffff) AM_ROM
ADDRESS_MAP_END








void bfm_sc4_reset_serial_vfd(running_machine &machine)
{
	sc4_state *state = machine.driver_data<sc4_state>();

	BFM_BD1_reset(0);
	BFM_BD1_draw(0);
	state->vfd_old_clock = false;
}

void bfm_sc4_write_serial_vfd(running_machine &machine, bool cs, bool clock, bool data)
{
	sc4_state *state = machine.driver_data<sc4_state>();

	// if we're turned on
	if ( cs )
	{
		if ( !state->vfd_enabled )
		{
			bfm_sc4_reset_serial_vfd(machine);
			state->vfd_old_clock = clock;
			state->vfd_enabled = true;
		}	
		else
		{
			// if the clock line changes
			if ( clock != state->vfd_old_clock )
			{
				if ( !clock )
				{
					state->vfd_ser_value <<= 1;
					if (data) state->vfd_ser_value |= 1;

					state->vfd_ser_count++;
					if ( state->vfd_ser_count == 8 )
					{
						state->vfd_ser_count = 0;
						BFM_BD1_newdata(0, state->vfd_ser_value);
						BFM_BD1_draw(0);
					}
				}
				state->vfd_old_clock = clock;
			}
		}
	}
	else
	{
		state->vfd_enabled = false;
	}
}


static WRITE8_HANDLER( bfm_sc4_68307_porta_w )
{
	int pc = cpu_get_pc(&space->device());
	logerror("%08x bfm_sc4_68307_porta_w %04x\n", pc, data);
}

static WRITE16_HANDLER( bfm_sc4_68307_portb_w )
{
	int pc = cpu_get_pc(&space->device());
	//m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
	// serial output to the VFD at least..
	logerror("%08x bfm_sc4_68307_portb_w %04x %04x\n", pc, data, mem_mask);

	// this seems good for the earlier sets which use the VFD, but I think the later games use a generic DMD of some kind instead?
	// we have game specific DMD roms in a couple of cases, is it possible ALL the later games are meant to have
	// their own DMD roms rather than it being something generic? (if so we're missing a lot of DMD roms..)
	bfm_sc4_write_serial_vfd(space->machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
//	bfm_sc4_write_serial_vfd(space->machine(), (data & 0x1000)?1:0, (data & 0x4000)?0:1, !(data & 0x2000)?1:0);

}

static READ8_HANDLER( bfm_sc4_68307_porta_r )
{
	int pc = cpu_get_pc(&space->device());
	logerror("%08x bfm_sc4_68307_porta_r\n", pc);
	return space->machine().rand();
}

static READ16_HANDLER( bfm_sc4_68307_portb_r )
{
	int pc = cpu_get_pc(&space->device());
	logerror("%08x bfm_sc4_68307_portb_r %04x\n", pc, mem_mask);
	return 0x0000;//0xffff;//space->machine().rand();
}

static MACHINE_START( sc4 )
{
	sc4_state *state = machine.driver_data<sc4_state>();
	state->m_cpuregion = (UINT16*)machine.region( "maincpu" )->base();
	state->m_mainram = (UINT16*)auto_alloc_array_clear(machine, UINT16, 0x100000);
	state->m_duart = machine.device("duart68681");
	state->m_ymz = machine.device("ymz");
	m68307_set_port_callbacks(machine.device("maincpu"),
		bfm_sc4_68307_porta_r,
		bfm_sc4_68307_porta_w,
		bfm_sc4_68307_portb_r,
		bfm_sc4_68307_portb_w );
	BFM_BD1_init(0);


}


static void bfm_sc4_irqhandler(device_t *device, int state)
{
	logerror("YMZ280 is generating an interrupt. State=%08x\n",state);
}

static const ymz280b_interface ymz280b_config =
{
	bfm_sc4_irqhandler
};



void bfm_sc4_duart_irq_handler(device_t *device, UINT8 vector)
{
	logerror("bfm_sc4_duart_irq_handler\n");
};

void bfm_sc4_duart_tx(device_t *device, int channel, UINT8 data)
{
	logerror("bfm_sc4_duart_irq_handler\n");
};



UINT8 bfm_sc4_duart_input_r(device_t *device)
{
	logerror("bfm_sc4_duart_input_r\n");
	return 0x2;
}

void bfm_sc4_duart_output_w(device_t *device, UINT8 data)
{
	logerror("bfm_sc4_duart_output_w\n");
//	cputag_set_input_line(device->machine(), "audiocpu", INPUT_LINE_RESET, data & 0x20 ? CLEAR_LINE : ASSERT_LINE);
}


static const duart68681_config bfm_sc4_duart68681_config =
{
	bfm_sc4_duart_irq_handler,
	bfm_sc4_duart_tx,
	bfm_sc4_duart_input_r,
	bfm_sc4_duart_output_w
};

// generate some fake interrupts for force things to go a bit further
// until we have the peripheral hookups working..
static INTERRUPT_GEN( sc4_fake_int_check )
{
	int which_int = 0;
	static int count = 0;

	count++;

	if (count>30000)
	{
		which_int = device->machine().rand() % 5;

		/*
		if ( device->machine().input().code_pressed_once(KEYCODE_Q) ) which_int = 1;
		if ( device->machine().input().code_pressed_once(KEYCODE_W) ) which_int = 2;
		if ( device->machine().input().code_pressed_once(KEYCODE_E) ) which_int = 3;
		if ( device->machine().input().code_pressed_once(KEYCODE_R) ) which_int = 4;
		if ( device->machine().input().code_pressed_once(KEYCODE_T) ) which_int = 5;
		*/

		//if (which_int==1) m68307_timer0_interrupt((legacy_cpu_device*)device->machine().device("maincpu"));
		//if (which_int==2) m68307_timer1_interrupt((legacy_cpu_device*)device->machine().device("maincpu"));
		if (which_int==3) m68307_serial_interrupt((legacy_cpu_device*)device->machine().device("maincpu"));
		//if (which_int==4) m68307_mbus_interrupt((legacy_cpu_device*)device->machine().device("maincpu"));
	//	if (which_int==5) m68307_licr2_interrupt((legacy_cpu_device*)device->machine().device("maincpu"));
	}
}


MACHINE_CONFIG_START( sc4, sc4_state )
	MCFG_CPU_ADD("maincpu", M68307, 16000000)	 // 68307! (EC000 core)
	MCFG_CPU_PROGRAM_MAP(sc4_map)
	MCFG_CPU_PERIODIC_INT(sc4_fake_int_check,1000)

	MCFG_MACHINE_START( sc4 )

	/* sound hardware */
	MCFG_SPEAKER_STANDARD_MONO("mono")

	MCFG_DUART68681_ADD("duart68681", 16000000/4, bfm_sc4_duart68681_config) // ?? Mhz


	MCFG_DEFAULT_LAYOUT(layout_bfm_sc4)

	MCFG_SOUND_ADD("ymz", YMZ280B, 16000000) // ?? Mhz
	MCFG_SOUND_CONFIG(ymz280b_config)
	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END


MACHINE_CONFIG_DERIVED_CLASS( sc4_adder4, sc4, sc4_adder4_state )
	MCFG_CPU_ADD("adder4", M68340, 25175000)	 // 68340 (CPU32 core)
	MCFG_CPU_PROGRAM_MAP(sc4_adder4_map)
MACHINE_CONFIG_END


INPUT_PORTS_START( sc4 )
INPUT_PORTS_END