summaryrefslogtreecommitdiffstatshomepage
path: root/src/emu/sound/sn76496.c
blob: d3ff82bd1edfdd591779a6ef1f5024a38f1779a1 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
/***************************************************************************

  sn76496.c
  by Nicola Salmoria
  with contributions by others

  Routines to emulate the:
  Texas Instruments SN76489, SN76489A, SN76494/SN76496
  ( Also known as, or at least compatible with, the TMS9919 and SN94624.)
  and the Sega 'PSG' used on the Master System, Game Gear, and Megadrive/Genesis
  This chip is known as the Programmable Sound Generator, or PSG, and is a 4
  channel sound generator, with three squarewave channels and a noise/arbitrary
  duty cycle channel.

  Noise emulation for all verified chips should be accurate:

  ** SN76489 uses a 15-bit shift register with taps on bits D and E, output on E,
  XOR function.
  It uses a 15-bit ring buffer for periodic noise/arbitrary duty cycle.
  Its output is inverted.
  ** SN94624 is the same as SN76489 but lacks the /8 divider on its clock input.
  ** SN76489A uses a 15-bit shift register with taps on bits D and E, output on F,
  XOR function.
  It uses a 15-bit ring buffer for periodic noise/arbitrary duty cycle.
  Its output is not inverted.
  ** SN76494 is the same as SN76489A but lacks the /8 divider on its clock input.
  ** SN76496 is identical in operation to the SN76489A, but the audio input on pin 9 is
  documented.
  All the TI-made PSG chips have an audio input line which is mixed with the 4 channels
  of output. (It is undocumented and may not function properly on the sn76489, 76489a
  and 76494; the sn76489a input is mentioned in datasheets for the tms5200)
  All the TI-made PSG chips act as if the frequency was set to 0x400 if 0 is
  written to the frequency register.
  ** Sega Master System III/MD/Genesis PSG uses a 16-bit shift register with taps
  on bits C and F, output on F
  It uses a 16-bit ring buffer for periodic noise/arbitrary duty cycle.
  (whether it uses an XOR or XNOR needs to be verified, assumed XOR)
  (whether output is inverted or not needs to be verified, assumed to be inverted)
  ** Sega Game Gear PSG is identical to the SMS3/MD/Genesis one except it has an
  extra register for mapping which channels go to which speaker.
  The register, connected to a z80 port, means:
  for bits 7  6  5  4  3  2  1  0
           L3 L2 L1 L0 R3 R2 R1 R0
  Noise is an XOR function, and audio output is negated before being output.
  All the Sega-made PSG chips act as if the frequency was set to 0 if 0 is written
  to the frequency register.
  ** NCR7496 (as used on the Tandy 1000) is similar to the SN76489 but with a
  different noise LFSR patttern: taps on bits A and E, output on E
  It uses a 15-bit ring buffer for periodic noise/arbitrary duty cycle.
  (all this chip's info needs to be verified)

  28/03/2005 : Sebastien Chevalier
  Update th SN76496Write func, according to SN76489 doc found on SMSPower.
   - On write with 0x80 set to 0, when LastRegister is other then TONE,
   the function is similar than update with 0x80 set to 1

  23/04/2007 : Lord Nightmare
  Major update, implement all three different noise generation algorithms and a
  set_variant call to discern among them.

  28/04/2009 : Lord Nightmare
  Add READY line readback; cleaned up struct a bit. Cleaned up comments.
  Add more TODOs. Fixed some unsaved savestate related stuff.

  04/11/2009 : Lord Nightmare
  Changed the way that the invert works (it now selects between XOR and XNOR
  for the taps), and added R->OldNoise to simulate the extra 0 that is always
  output before the noise LFSR contents are after an LFSR reset.
  This fixes SN76489/A to match chips. Added SN94624.

  14/11/2009 : Lord Nightmare
  Removed STEP mess, vastly simplifying the code. Made output bipolar rather
  than always above the 0 line, but disabled that code due to pending issues.

  16/11/2009 : Lord Nightmare
  Fix screeching in regulus: When summing together four equal channels, the
  size of the max amplitude per channel should be 1/4 of the max range, not
  1/3. Added NCR7496.

  18/11/2009 : Lord Nightmare
  Modify Init functions to support negating the audio output. The gamegear
  psg does this. Change gamegear and sega psgs to use XOR rather than XNOR
  based on testing. Got rid of R->OldNoise and fixed taps accordingly.
  Added stereo support for game gear.

  15/01/2010 : Lord Nightmare
  Fix an issue with SN76489 and SN76489A having the wrong periodic noise periods.
  Note that properly emulating the noise cycle bit timing accurately may require
  extensive rewriting.

  24/01/2010: Lord Nightmare
  Implement periodic noise as forcing one of the XNOR or XOR taps to 1 or 0 respectively.
  Thanks to PlgDavid for providing samples which helped immensely here.
  Added true clock divider emulation, so sn94624 and sn76494 run 8x faster than
  the others, as in real life.

  15/02/2010: Lord Nightmare & Michael Zapf (additional testing by PlgDavid)
  Fix noise period when set to mirror channel 3 and channel 3 period is set to 0 (tested on hardware for noise, wave needs tests) - MZ
  Fix phase of noise on sn94624 and sn76489; all chips use a standard XOR, the only inversion is the output itself - LN, Plgdavid
  Thanks to PlgDavid and Michael Zapf for providing samples which helped immensely here.

  23/02/2011: Lord Nightmare & Enik
  Made it so the Sega PSG chips have a frequency of 0 if 0 is written to the
  frequency register, while the others have 0x400 as before. Should fix a bug
  or two on sega games, particularly Vigilante on Sega Master System. Verified
  on SMS hardware.
  
  27/06/2012: Michael Zapf
  Converted to modern device, legacy devices were gradually removed afterwards.

  TODO: * Implement the TMS9919 - any difference to sn94624?
        * Implement the T6W28; has registers in a weird order, needs writes
          to be 'sanitized' first. Also is stereo, similar to game gear.
        * Test the NCR7496; Smspower says the whitenoise taps are A and E,
          but this needs verification on real hardware.
        * Factor out common code so that the SAA1099 can share some code.

***************************************************************************/

#include "emu.h"
#include "sn76496.h"

#define MAX_OUTPUT 0x7fff


sn76496_base_device::sn76496_base_device(const machine_config &mconfig, device_type type,  const char *name,
	const char *tag, int feedbackmask, int noisetap1, int noisetap2, bool negate, bool stereo, int clockdivider, int freq0,
	device_t *owner, UINT32 clock)

	: device_t(mconfig, type, name, tag, owner, clock),
	  device_sound_interface(mconfig, *this),
	  m_feedback_mask(feedbackmask),
	  m_whitenoise_tap1(noisetap1),
	  m_whitenoise_tap2(noisetap2),
	  m_negate(negate),
	  m_stereo(stereo),
	  m_clock_divider(clockdivider),
	  m_freq0_is_max(freq0)
{
}

void sn76496_base_device::device_start()
{
	int sample_rate = clock()/2;
	int i;
	double out;
	int gain;

	const sn76496_config *conf = reinterpret_cast<const sn76496_config *>(static_config());
	m_ready.resolve(conf->ready, *this);

	m_sound = machine().sound().stream_alloc(*this, 0, (m_stereo? 2:1), sample_rate, this);

	for (i = 0; i < 4; i++) m_volume[i] = 0;

	m_last_register = 0;
	for (i = 0; i < 8; i+=2)
	{
		m_register[i] = 0;
		m_register[i + 1] = 0x0f;	// volume = 0
	}

	for (i = 0; i < 4; i++)
	{
		m_output[i] = 0;
		m_period[i] = 0;
		m_count[i] = 0;
	}

	m_RNG = m_feedback_mask;
	m_output[3] = m_RNG & 1;

	m_cycles_to_ready = 1;			// assume ready is not active immediately on init. is this correct?
	m_stereo_mask = 0xFF;			// all channels enabled
	m_current_clock = m_clock_divider-1;

	// set gain
	gain = 0;

	gain &= 0xff;

	// increase max output basing on gain (0.2 dB per step)
	out = MAX_OUTPUT / 4; // four channels, each gets 1/4 of the total range
	while (gain-- > 0)
		out *= 1.023292992;	// = (10 ^ (0.2/20))

	// build volume table (2dB per step)
	for (i = 0; i < 15; i++)
	{
		// limit volume to avoid clipping
		if (out > MAX_OUTPUT / 4) m_vol_table[i] = MAX_OUTPUT / 4;
		else m_vol_table[i] = out;

		out /= 1.258925412;	/* = 10 ^ (2/20) = 2dB */
	}
	m_vol_table[15] = 0;

	m_ready_state = true;

	register_for_save_states();
}

READ_LINE_MEMBER( sn76496_base_device::ready_r )
{
	m_sound->update();
	return (m_cycles_to_ready > 0)? FALSE : TRUE;
}

WRITE8_MEMBER( sn76496_base_device::stereo_w )
{
	m_sound->update();
	if (m_stereo) m_stereo_mask = data;
	else fatalerror("sn76496_base_device: Call to stereo write with mono chip!\n");
}

void sn76496_base_device::write(UINT8 data)
{
	int n, r, c;

	// update the output buffer before changing the registers
	m_sound->update();

	// set number of cycles until READY is active; this is always one
	// 'sample', i.e. it equals the clock divider exactly; until the
	// clock divider is fully supported, we delay until one sample has
	// played. The fact that this below is '2' and not '1' is because
	// of a ?race condition? in the mess crvision driver, where after
	// any sample is played at all, no matter what, the cycles_to_ready
	// ends up never being not ready, unless this value is greater than
	// 1. Once the full clock divider stuff is written, this should no
	// longer be an issue.

	m_cycles_to_ready = 2;

	if (data & 0x80)
	{
		r = (data & 0x70) >> 4;
		m_last_register = r;
		m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
	}
	else
	{
		r = m_last_register;
	}

	c = r >> 1;
	switch (r)
	{
		case 0:	// tone 0: frequency
		case 2:	// tone 1: frequency
		case 4:	// tone 2: frequency
			if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x0f) | ((data & 0x3f) << 4);
			if ((m_register[r] != 0) || (!m_freq0_is_max)) m_period[c] = m_register[r];
			else m_period[c] = 0x400;

			if (r == 4)
			{
				// update noise shift frequency
				if ((m_register[6] & 0x03) == 0x03)	m_period[3] = m_period[2]<<1;
			}
			break;
		case 1:	// tone 0: volume
		case 3:	// tone 1: volume
		case 5:	// tone 2: volume
		case 7:	// noise: volume
			m_volume[c] = m_vol_table[data & 0x0f];
			if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
			break;
		case 6:	// noise: frequency, mode
			{
				if ((data & 0x80) == 0) logerror("sn76496_base_device: write to reg 6 with bit 7 clear; data was %03x, new write is %02x! report this to LN!\n", m_register[6], data);
				if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
				n = m_register[6];
				// N/512,N/1024,N/2048,Tone #3 output
				m_period[3] = ((n&3) == 3)? (m_period[2]<<1) : (1 << (5+(n&3)));
				m_RNG = m_feedback_mask;
			}
			break;
	}
}

WRITE8_MEMBER( sn76496_base_device::write )
{
	write(data);
}

inline bool sn76496_base_device::in_noise_mode()
{
	return ((m_register[6] & 4)!=0);
}

void sn76496_base_device::countdown_cycles()
{
	if (m_cycles_to_ready > 0)
	{
		m_cycles_to_ready--;
		if (m_ready_state==true) m_ready(CLEAR_LINE);
		m_ready_state = false;
	}
	else
	{
		if (m_ready_state==false) m_ready(ASSERT_LINE);
		m_ready_state = true;
	}
}

void sn76496_base_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
	int i;
	stream_sample_t *lbuffer = outputs[0];
	stream_sample_t *rbuffer = (m_stereo)? outputs[1] : NULL;

	INT16 out = 0;
	INT16 out2 = 0;

	while (samples > 0)
	{
		// clock chip once
		if (m_current_clock > 0) // not ready for new divided clock
		{
			m_current_clock--;
		}
		else // ready for new divided clock, make a new sample
		{
			m_current_clock = m_clock_divider-1;
			// decrement Cycles to READY by one
			countdown_cycles();

			// handle channels 0,1,2
			for (i = 0; i < 3; i++)
			{
				m_count[i]--;
				if (m_count[i] <= 0)
				{
					m_output[i] ^= 1;
					m_count[i] = m_period[i];
				}
			}

			// handle channel 3
			m_count[3]--;
			if (m_count[3] <= 0)
			{
				// if noisemode is 1, both taps are enabled
				// if noisemode is 0, the lower tap, whitenoisetap2, is held at 0
				// The != was a bit-XOR (^) before
				if (((m_RNG & m_whitenoise_tap1)!=0) != (((m_RNG & m_whitenoise_tap2)!=0) && in_noise_mode()))
				{
					m_RNG >>= 1;
					m_RNG |= m_feedback_mask;
				}
				else
				{
					m_RNG >>= 1;
				}
				m_output[3] = m_RNG & 1;

				m_count[3] = m_period[3];
			}
		}

		if (m_stereo)
		{
			out = ((((m_stereo_mask & 0x10)!=0) && (m_output[0]!=0))? m_volume[0] : 0)
				+ ((((m_stereo_mask & 0x20)!=0) && (m_output[1]!=0))? m_volume[1] : 0)
				+ ((((m_stereo_mask & 0x40)!=0) && (m_output[2]!=0))? m_volume[2] : 0)
				+ ((((m_stereo_mask & 0x80)!=0) && (m_output[3]!=0))? m_volume[3] : 0);

			out2= ((((m_stereo_mask & 0x1)!=0) && (m_output[0]!=0))? m_volume[0] : 0)
				+ ((((m_stereo_mask & 0x2)!=0) && (m_output[1]!=0))? m_volume[1] : 0)
				+ ((((m_stereo_mask & 0x4)!=0) && (m_output[2]!=0))? m_volume[2] : 0)
				+ ((((m_stereo_mask & 0x8)!=0) && (m_output[3]!=0))? m_volume[3] : 0);
		}
		else
		{
			out= ((m_output[0]!=0)? m_volume[0]:0)
				+((m_output[1]!=0)? m_volume[1]:0)
				+((m_output[2]!=0)? m_volume[2]:0)
				+((m_output[3]!=0)? m_volume[3]:0);
		}

		if (m_negate) { out = -out; out2 = -out2; }

		*(lbuffer++) = out;
		if (m_stereo) *(rbuffer++) = out2;
		samples--;
	}
}

void sn76496_base_device::register_for_save_states()
{
	save_item(NAME(m_vol_table));
	save_item(NAME(m_register));
	save_item(NAME(m_last_register));
	save_item(NAME(m_volume));
	save_item(NAME(m_RNG));
//  save_item(NAME(m_clock_divider));
	save_item(NAME(m_current_clock));
//  save_item(NAME(m_feedback_mask));
//  save_item(NAME(m_whitenoise_tap1));
//  save_item(NAME(m_whitenoise_tap2));
//  save_item(NAME(m_negate));
//  save_item(NAME(m_stereo));
	save_item(NAME(m_stereo_mask));
	save_item(NAME(m_period));
	save_item(NAME(m_count));
	save_item(NAME(m_output));
	save_item(NAME(m_cycles_to_ready));
//  save_item(NAME(m_freq0_is_max));
}

const device_type SN76496 = &device_creator<sn76496_device>;
const device_type U8106 = &device_creator<u8106_device>;
const device_type Y2404 = &device_creator<y2404_device>;
const device_type SN76489 = &device_creator<sn76489_device>;
const device_type SN76489A = &device_creator<sn76489a_device>;
const device_type SN76494 = &device_creator<sn76494_device>;
const device_type SN94624 = &device_creator<sn94624_device>;
const device_type NCR7496 = &device_creator<ncr7496_device>;
const device_type GAMEGEAR = &device_creator<gamegear_device>;
const device_type SEGAPSG = &device_creator<segapsg_device>;