1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
|
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/**********************************************************************
RCA CDP1869/1870/1876 Video Interface System (VIS) emulation
Copyright MESS Team.
Visit http://mamedev.org for licensing and usage restrictions.
**********************************************************************
_____ _____
TPA 1 |* \_/ | 40 Vdd
TPB 2 | | 39 PMSEL
_MRD 3 | | 38 _PMWR
_MWR 4 | | 37 CMSEL
MA0/8 5 | | 36 _CMWR
MA1/9 6 | | 35 PMA0
MA2/10 7 | | 34 PMA1
MA3/11 8 | | 33 PMA2
MA4/12 9 | | 32 PMA3
MA5/13 10 | | 31 PMA4
MA6/14 11 | CDP1869 | 30 PMA5
MA7/15 12 | | 29 PMA6
N0 13 | | 28 PMA7
N1 14 | | 27 PMA8
N2 15 | | 26 PMA9
_H SYNC 16 | | 25 CMA3/PMA10
_DISPLAY 17 | | 24 CMA2
_ADDRSTB 18 | | 23 CMA1
SOUND 19 | | 22 CMA0
Vss 20 |_____________| 21 _N=3
_____ _____
_PREDISPLAY 1 |* \_/ | 40 Vdd
_DISPLAY 2 | | 39 PAL/_NTSC
PCB 3 | | 38 CPUCLK
CCB1 4 | | 37 XTAL (DOT)
BUS7 5 | | 36 _XTAL (DOT)
CCB0 6 | | 35 _ADDRSTB
BUS6 7 | | 34 _MRD
CDB5 8 | | 33 TPB
BUS5 9 | | 32 CMSEL
CDB4 10 | | 31 BURST
BUS4 11 | CDP1870 | 30 _H SYNC
CDB3 12 | | 29 _COMPSYNC
BUS3 13 | | 28 LUM
CDB2 14 | | 27 PAL CHROM
BUS2 15 | | 26 NTSC CHROM
CDB1 16 | | 25 _XTAL (CHROM)
BUS1 17 | | 24 XTAL (CHROM)
CDB0 18 | | 23 _EMS
BUS0 19 | | 22 _EVS
Vss 20 |_____________| 21 _N=3
_____ _____
_PREDISPLAY 1 |* \_/ | 40 Vdd
_DISPLAY 2 | | 39 PAL/_NTSC
PCB 3 | | 38 CPUCLK
CCB1 4 | | 37 XTAL (DOT)
BUS7 5 | | 36 _XTAL (DOT)
CCB0 6 | | 35 _ADDRSTB
BUS6 7 | | 34 _MRD
CDB5 8 | | 33 TPB
BUS5 9 | | 32 CMSEL
CDB4 10 | | 31 BURST
BUS4 11 | CDP1876 | 30 _H SYNC
CDB3 12 | | 29 _COMPSYNC
BUS3 13 | | 28 RED
CDB2 14 | | 27 BLUE
BUS2 15 | | 26 GREEN
CDB1 16 | | 25 _XTAL (CHROM)
BUS1 17 | | 24 XTAL (CHROM)
CDB0 18 | | 23 _EMS
BUS0 19 | | 22 _EVS
Vss 20 |_____________| 21 _N=3
**********************************************************************/
#pragma once
#ifndef __CDP1869__
#define __CDP1869__
#include "emu.h"
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
#define CDP1869_DOT_CLK_PAL (float)XTAL_5_626MHz
#define CDP1869_DOT_CLK_NTSC (float)XTAL_5_67MHz
#define CDP1869_COLOR_CLK_PAL (float)XTAL_8_867236MHz
#define CDP1869_COLOR_CLK_NTSC (float)XTAL_7_15909MHz
#define CDP1869_CPU_CLK_PAL (CDP1869_DOT_CLK_PAL / 2)
#define CDP1869_CPU_CLK_NTSC (CDP1869_DOT_CLK_NTSC / 2)
#define CDP1869_CHAR_WIDTH 6
#define CDP1869_HSYNC_START (56 * CDP1869_CHAR_WIDTH)
#define CDP1869_HSYNC_END (60 * CDP1869_CHAR_WIDTH)
#define CDP1869_HBLANK_START (54 * CDP1869_CHAR_WIDTH)
#define CDP1869_HBLANK_END ( 5 * CDP1869_CHAR_WIDTH)
#define CDP1869_SCREEN_START_PAL ( 9 * CDP1869_CHAR_WIDTH)
#define CDP1869_SCREEN_START_NTSC (10 * CDP1869_CHAR_WIDTH)
#define CDP1869_SCREEN_START (10 * CDP1869_CHAR_WIDTH)
#define CDP1869_SCREEN_END (50 * CDP1869_CHAR_WIDTH)
#define CDP1869_SCREEN_WIDTH (60 * CDP1869_CHAR_WIDTH)
#define CDP1869_TOTAL_SCANLINES_PAL 312
#define CDP1869_SCANLINE_VBLANK_START_PAL 304
#define CDP1869_SCANLINE_VBLANK_END_PAL 10
#define CDP1869_SCANLINE_VSYNC_START_PAL 308
#define CDP1869_SCANLINE_VSYNC_END_PAL 312
#define CDP1869_SCANLINE_DISPLAY_START_PAL 44
#define CDP1869_SCANLINE_DISPLAY_END_PAL 260
#define CDP1869_SCANLINE_PREDISPLAY_START_PAL 43
#define CDP1869_SCANLINE_PREDISPLAY_END_PAL 260
#define CDP1869_VISIBLE_SCANLINES_PAL (CDP1869_SCANLINE_DISPLAY_END_PAL - CDP1869_SCANLINE_DISPLAY_START_PAL)
#define CDP1869_TOTAL_SCANLINES_NTSC 262
#define CDP1869_SCANLINE_VBLANK_START_NTSC 252
#define CDP1869_SCANLINE_VBLANK_END_NTSC 10
#define CDP1869_SCANLINE_VSYNC_START_NTSC 258
#define CDP1869_SCANLINE_VSYNC_END_NTSC 262
#define CDP1869_SCANLINE_DISPLAY_START_NTSC 36
#define CDP1869_SCANLINE_DISPLAY_END_NTSC 228
#define CDP1869_SCANLINE_PREDISPLAY_START_NTSC 35
#define CDP1869_SCANLINE_PREDISPLAY_END_NTSC 228
#define CDP1869_VISIBLE_SCANLINES_NTSC (CDP1869_SCANLINE_DISPLAY_END_NTSC - CDP1869_SCANLINE_DISPLAY_START_NTSC)
#define CDP1869_PALETTE_LENGTH 8+64
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_CDP1869_ADD(_tag, _pixclock, _config, _map) \
MCFG_DEVICE_ADD(_tag, CDP1869, _pixclock) \
MCFG_DEVICE_CONFIG(_config) \
MCFG_DEVICE_ADDRESS_MAP(AS_0, _map)
#define MCFG_CDP1869_SCREEN_PAL_ADD(_cdptag, _tag, _clock) \
MCFG_SCREEN_ADD(_tag, RASTER) \
MCFG_SCREEN_UPDATE_DEVICE(_cdptag, cdp1869_device, screen_update) \
MCFG_SCREEN_RAW_PARAMS(_clock, CDP1869_SCREEN_WIDTH, CDP1869_HBLANK_END, CDP1869_HBLANK_START, CDP1869_TOTAL_SCANLINES_PAL, CDP1869_SCANLINE_VBLANK_END_PAL, CDP1869_SCANLINE_VBLANK_START_PAL)
#define MCFG_CDP1869_SCREEN_NTSC_ADD(_cdptag, _tag, _clock) \
MCFG_SCREEN_ADD(_tag, RASTER) \
MCFG_SCREEN_UPDATE_DEVICE(_cdptag, cdp1869_device, screen_update) \
MCFG_SCREEN_RAW_PARAMS(_clock, CDP1869_SCREEN_WIDTH, CDP1869_HBLANK_END, CDP1869_HBLANK_START, CDP1869_TOTAL_SCANLINES_NTSC, CDP1869_SCANLINE_VBLANK_END_NTSC, CDP1869_SCANLINE_VBLANK_START_NTSC)
#define CDP1869_INTERFACE(_name) \
const cdp1869_interface (_name) =
#define MCFG_CDP1869_SET_SCREEN MCFG_VIDEO_SET_SCREEN
#define CDP1869_CHAR_RAM_READ(name) UINT8 name(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd)
#define CDP1869_CHAR_RAM_WRITE(name) void name(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd, UINT8 data)
#define CDP1869_PCB_READ(name) int name(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd)
#define CDP1869_PAL \
DEVCB_LINE_VCC
#define CDP1869_NTSC \
DEVCB_LINE_GND
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
typedef UINT8 (*cdp1869_char_ram_read_func)(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd);
typedef void (*cdp1869_char_ram_write_func)(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd, UINT8 data);
typedef int (*cdp1869_pcb_read_func)(device_t *device, UINT16 pma, UINT8 cma, UINT8 pmd);
// ======================> cdp1869_interface
struct cdp1869_interface
{
// pixel clock of the chip is the device clock
int color_clock; // the chroma clock of the chip
// screen format
devcb_read_line in_pal_ntsc_cb;
// page memory color bit read function
cdp1869_pcb_read_func in_pcb_cb;
// character memory read function
cdp1869_char_ram_read_func in_char_ram_cb;
// character memory write function
cdp1869_char_ram_write_func out_char_ram_cb;
// if specified, this gets called for every change of the predisplay pin (CDP1870/76 pin 1)
devcb_write_line out_prd_cb;
};
// ======================> cdp1869_device
class cdp1869_device : public device_t,
public device_sound_interface,
public device_video_interface,
public device_memory_interface,
public cdp1869_interface
{
public:
// construction/destruction
cdp1869_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_PALETTE_INIT(cdp1869);
virtual DECLARE_ADDRESS_MAP(io_map, 8);
virtual DECLARE_ADDRESS_MAP(char_map, 8);
virtual DECLARE_ADDRESS_MAP(page_map, 8);
DECLARE_WRITE8_MEMBER( out3_w );
DECLARE_WRITE8_MEMBER( out4_w );
DECLARE_WRITE8_MEMBER( out5_w );
DECLARE_WRITE8_MEMBER( out6_w );
DECLARE_WRITE8_MEMBER( out7_w );
DECLARE_READ8_MEMBER( char_ram_r );
DECLARE_WRITE8_MEMBER( char_ram_w );
DECLARE_READ8_MEMBER( page_ram_r );
DECLARE_WRITE8_MEMBER( page_ram_w );
DECLARE_READ_LINE_MEMBER( predisplay_r );
DECLARE_READ_LINE_MEMBER( pal_ntsc_r );
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual void device_config_complete();
virtual void device_start();
virtual void device_post_load();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
// device_sound_interface callbacks
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
inline bool is_ntsc();
inline UINT8 read_page_ram_byte(offs_t address);
inline void write_page_ram_byte(offs_t address, UINT8 data);
inline UINT8 read_char_ram_byte(offs_t pma, offs_t cma, UINT8 pmd);
inline void write_char_ram_byte(offs_t pma, offs_t cma, UINT8 pmd, UINT8 data);
inline int read_pcb(offs_t pma, offs_t cma, UINT8 pmd);
inline void update_prd_changed_timer();
inline rgb_t get_rgb(int i, int c, int l);
inline int get_lines();
inline UINT16 get_pmemsize(int cols, int rows);
inline UINT16 get_pma();
inline int get_pen(int ccb0, int ccb1, int pcb);
void draw_line(bitmap_rgb32 &bitmap, const rectangle &rect, int x, int y, UINT8 data, int color);
void draw_char(bitmap_rgb32 &bitmap, const rectangle &rect, int x, int y, UINT16 pma);
private:
devcb_resolved_read_line m_in_pal_ntsc_func;
devcb_resolved_write_line m_out_prd_func;
cdp1869_pcb_read_func m_in_pcb_func;
cdp1869_char_ram_read_func m_in_char_ram_func;
cdp1869_char_ram_write_func m_out_char_ram_func;
//address_space *m_page_ram;
emu_timer *m_prd_timer;
sound_stream *m_stream;
// video state
required_device<palette_device> m_palette;
int m_prd; // predisplay
int m_dispoff; // display off
int m_fresvert; // full resolution vertical
int m_freshorz; // full resolution horizontal
int m_cmem; // character memory access mode
int m_dblpage; // double page mode
int m_line16; // 16-line hi-res mode
int m_line9; // 9 line mode
int m_cfc; // color format control
UINT8 m_col; // character color control
UINT8 m_bkg; // background color
UINT16 m_pma; // page memory address
UINT16 m_hma; // home memory address
// sound state
INT16 m_signal; // current signal
int m_incr; // initial wave state
int m_toneoff; // tone off
int m_wnoff; // white noise off
UINT8 m_tonediv; // tone divisor
UINT8 m_tonefreq; // tone range select
UINT8 m_toneamp; // tone output amplitude
UINT8 m_wnfreq; // white noise range select
UINT8 m_wnamp; // white noise output amplitude
const address_space_config m_space_config;
};
// device type definition
extern const device_type CDP1869;
#endif
|