1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
|
/***************************************************************************
National Semiconductor INS8154
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)
_____ _____
PB6 1 |* \_/ | 40 VCC
PB5 2 | | 39 PB7
PB4 3 | | 38 NWDS
PB3 4 | | 37 NRDS
PB2 5 | | 36 NRST
PB1 6 | | 35 _CS0
PB0 7 | | 34 CS1
DB7 8 | | 33 M/_IO
DB6 9 | | 32 AD6
DB5 10 | INS8154 | 31 AD5
DB4 11 | | 30 AD4
DB3 12 | | 29 AD3
DB2 13 | | 28 AD2
DB1 14 | | 27 AD1
DB0 15 | | 26 AD0
PA7 16 | | 25 INTR
PA6 17 | | 24 PA0
PA5 18 | | 23 PA1
PA4 19 | | 22 PA2
GND 20 |_____________| 21 PA3
***************************************************************************/
#pragma once
#ifndef __INS8154_H__
#define __INS8154_H__
#include "emu.h"
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MDRV_INS8154_ADD(_tag, _intrf) \
MDRV_DEVICE_ADD(_tag, INS8154, 0) \
MDRV_DEVICE_CONFIG(_intrf)
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
// ======================> ins8154_interface
struct ins8154_interface
{
devcb_read8 m_in_a_func;
devcb_write8 m_out_a_func;
devcb_read8 m_in_b_func;
devcb_write8 m_out_b_func;
devcb_write_line m_out_irq_func;
};
// ======================> ins8154_device_config
class ins8154_device_config : public device_config,
public ins8154_interface
{
friend class ins8154_device;
// construction/destruction
ins8154_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
public:
// allocators
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
virtual device_t *alloc_device(running_machine &machine) const;
protected:
// device_config overrides
virtual void device_config_complete();
};
// ======================> ins8154_device
class ins8154_device : public device_t
{
friend class ins8154_device_config;
// construction/destruction
ins8154_device(running_machine &_machine, const ins8154_device_config &_config);
public:
UINT8 ins8154_r(UINT32 offset);
void ins8154_w(UINT32 offset, UINT8 data);
void ins8154_porta_w(UINT32 offset, UINT8 data);
void ins8154_portb_w(UINT32 offset, UINT8 data);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_post_load() { }
virtual void device_clock_changed() { }
private:
/* i/o lines */
devcb_resolved_read8 m_in_a_func;
devcb_resolved_write8 m_out_a_func;
devcb_resolved_read8 m_in_b_func;
devcb_resolved_write8 m_out_b_func;
devcb_resolved_write_line m_out_irq_func;
/* registers */
UINT8 m_in_a; /* Input Latch Port A */
UINT8 m_in_b; /* Input Latch Port B */
UINT8 m_out_a; /* Output Latch Port A */
UINT8 m_out_b; /* Output Latch Port B */
UINT8 m_mdr; /* Mode Definition Register */
UINT8 m_odra; /* Output Definition Register Port A */
UINT8 m_odrb; /* Output Definition Register Port B */
const ins8154_device_config &m_config;
};
// device type definition
extern const device_type INS8154;
/***************************************************************************
PROTOTYPES
***************************************************************************/
READ8_DEVICE_HANDLER( ins8154_r );
WRITE8_DEVICE_HANDLER( ins8154_w );
WRITE8_DEVICE_HANDLER( ins8154_porta_w );
WRITE8_DEVICE_HANDLER( ins8154_portb_w );
#endif /* __INS8154_H__ */
|