summaryrefslogtreecommitdiffstatshomepage
path: root/src/emu/cpu/tms32025/tms32025.h
blob: a5a9a728995beb2524982ab904683818e203994a (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
 /**************************************************************************\
 *                Texas Instruments TMS320x25 DSP Emulator                  *
 *                                                                          *
 *                 Copyright Tony La Porta                                  *
 *                      Written for the MAME project.                       *
 *                                                                          *
 *      Note :  This is a word based microcontroller, with addressing       *
 *              architecture based on the Harvard addressing scheme.        *
 *                                                                          *
 *  Three versions of the chip are available, and they are:                 *
 *  TMS320C25   Internal ROM one time programmed at TI                      *
 *  TMS320E25   Internal ROM programmable as a normal EPROM                 *
 *  TMS320P25   Internal ROM programmable once as a normal EPROM only       *
 *  These devices can also be used as a MicroController with external ROM   *
 *                                                                          *
 \***************************************************************************/

#ifndef _TMS32025_H
#define _TMS32025_H


#include "cpuintrf.h"



#define TMS32025_BIO		0x10000		/* BIO input  */
#define TMS32025_HOLD		0x10001		/* HOLD input */
#define TMS32025_HOLDA		0x10001		/* HOLD Acknowledge output */
#define TMS32025_XF			0x10002		/* XF output  */
#define TMS32025_DR			0x10003		/* Serial Data  Receive  input  */
#define TMS32025_DX			0x10003		/* Serial Data  Transmit output */
#define TMS32025_CLKR		0x10004		/* Serial Clock Receive  input  */
#define TMS32025_CLKX		0x10004		/* Serial Clock Transmit output */
#define TMS32025_FSR		0x10005		/* Serial Frame Receive  pulse input  */
#define TMS32025_FSX		0x10005		/* Serial Frame Transmit pulse output */



/****************************************************************************
 *  Interrupt constants
 */

#define TMS32025_INT0			  0			/* External INT0 */
#define TMS32025_INT1			  1			/* External INT1 */
#define TMS32025_INT2			  2			/* External INT2 */
#define TMS32025_TINT			  3			/* Internal Timer interrupt */
#define TMS32025_RINT			  4			/* Serial Port receive  interrupt */
#define TMS32025_XINT			  5			/* Serial Port transmit interrupt */
#define TMS32025_TRAP			  6			/* Trap instruction */
#define TMS32025_INT_NONE		  -1


enum {
	TMS32025_PC=1,
	TMS32025_PFC,  TMS32025_STR0, TMS32025_STR1, TMS32025_IFR,
	TMS32025_RPTC, TMS32025_ACC,  TMS32025_PREG, TMS32025_TREG,
	TMS32025_AR0,  TMS32025_AR1,  TMS32025_AR2,  TMS32025_AR3,
	TMS32025_AR4,  TMS32025_AR5,  TMS32025_AR6,  TMS32025_AR7,
	TMS32025_STK0, TMS32025_STK1, TMS32025_STK2, TMS32025_STK3,
	TMS32025_STK4, TMS32025_STK5, TMS32025_STK6, TMS32025_STK7,
	TMS32025_DRR,  TMS32025_DXR,  TMS32025_TIM,  TMS32025_PRD,
	TMS32025_IMR,  TMS32025_GREG
};


/****************************************************************************
 *  Public Functions
 */

extern void tms32025_get_info(UINT32 state, cpuinfo *info);
extern void tms32026_get_info(UINT32 state, cpuinfo *info);


offs_t tms32025_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);

#endif	/* _TMS32025_H */