summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/v810/v810.h
blob: e870f514132de566bbba25c71a394ab759568e1a (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
// license:LGPL-2.1+
// copyright-holders:Angelo Salese, Tomasz Slanina
#pragma once

#ifndef __V810_H__
#define __V810_H__


enum
{
	V810_R0=1,
	V810_R1,
	V810_R2,  /* R2 - handler stack pointer */
	V810_SP,  /* R3 - stack pointer */
	V810_R4,  /* R4 - global pointer */
	V810_R5,  /* R5 - text pointer */
	V810_R6,
	V810_R7,
	V810_R8,
	V810_R9,
	V810_R10,
	V810_R11,
	V810_R12,
	V810_R13,
	V810_R14,
	V810_R15,
	V810_R16,
	V810_R17,
	V810_R18,
	V810_R19,
	V810_R20,
	V810_R21,
	V810_R22,
	V810_R23,
	V810_R24,
	V810_R25,
	V810_R26,
	V810_R27,
	V810_R28,
	V810_R29,
	V810_R30,
	V810_R31, /* R31 - link pointer */

	/* System Registers */
	V810_EIPC, /* Exception/interrupt  saving - PC */
	V810_EIPSW,/* Exception/interrupt  saving - PSW */
	V810_FEPC, /* Duplexed exception/NMI  saving - PC */
	V810_FEPSW,/* Duplexed exception/NMI  saving - PSW */
	V810_ECR,  /* Exception cause register */
	V810_PSW,  /* Program status word */
	V810_PIR,  /* Processor ID register */
	V810_TKCW, /* Task control word */
	V810_res08,
	V810_res09,
	V810_res10,
	V810_res11,
	V810_res12,
	V810_res13,
	V810_res14,
	V810_res15,
	V810_res16,
	V810_res17,
	V810_res18,
	V810_res19,
	V810_res20,
	V810_res21,
	V810_res22,
	V810_res23,
	V810_CHCW,  /* Cache control word */
	V810_ADTRE, /* Address trap register */
	V810_res26,
	V810_res27,
	V810_res28,
	V810_res29,
	V810_res30,
	V810_res31,

	V810_PC
};


class v810_device : public cpu_device
{
public:
	// construction/destruction
	v810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);

protected:
	// device-level overrides
	virtual void device_start() override;
	virtual void device_reset() override;

	// device_execute_interface overrides
	virtual uint32_t execute_min_cycles() const override { return 3; }
	virtual uint32_t execute_max_cycles() const override { return 6; }
	virtual uint32_t execute_input_lines() const override { return 16; }
	virtual void execute_run() override;
	virtual void execute_set_input(int inputnum, int state) override;

	// device_memory_interface overrides
	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_IO) ? &m_io_config : nullptr); }

	// device_state_interface overrides
	virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;

	// device_disasm_interface overrides
	virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
	virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
	virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;

private:
	typedef uint32_t (v810_device::*opcode_func)(uint32_t op);
	static const opcode_func s_OpCodeTable[64];

	address_space_config m_program_config;
	address_space_config m_io_config;

	uint32_t m_reg[65];
	uint8_t m_irq_line;
	uint8_t m_irq_state;
	uint8_t m_nmi_line;
	address_space *m_program;
	direct_read_data *m_direct;
	address_space *m_io;
	uint32_t m_PPC;
	int m_icount;

	inline void SETREG(uint32_t reg,uint32_t val);
	inline uint32_t GETREG(uint32_t reg);
	uint32_t opUNDEF(uint32_t op);
	uint32_t opMOVr(uint32_t op);
	uint32_t opMOVEA(uint32_t op);
	uint32_t opMOVHI(uint32_t op);
	uint32_t opMOVi(uint32_t op);
	uint32_t opADDr(uint32_t op);
	uint32_t opADDi(uint32_t op);
	uint32_t opADDI(uint32_t op);
	uint32_t opSUBr(uint32_t op);
	uint32_t opCMPr(uint32_t op);
	uint32_t opCMPi(uint32_t op);
	uint32_t opSETFi(uint32_t op);
	uint32_t opANDr(uint32_t op);
	uint32_t opANDI(uint32_t op);
	uint32_t opORr(uint32_t op);
	uint32_t opORI(uint32_t op);
	uint32_t opXORr(uint32_t op);
	uint32_t opLDSR(uint32_t op);
	uint32_t opSTSR(uint32_t op);
	uint32_t opXORI(uint32_t op);
	uint32_t opNOTr(uint32_t op);
	uint32_t opSHLr(uint32_t op);
	uint32_t opSHLi(uint32_t op);
	uint32_t opSHRr(uint32_t op);
	uint32_t opSHRi(uint32_t op);
	uint32_t opSARr(uint32_t op);
	uint32_t opSARi(uint32_t op);
	uint32_t opJMPr(uint32_t op);
	uint32_t opJR(uint32_t op);
	uint32_t opJAL(uint32_t op);
	uint32_t opEI(uint32_t op);
	uint32_t opDI(uint32_t op);
	uint32_t opTRAP(uint32_t op);
	uint32_t opRETI(uint32_t op);
	uint32_t opHALT(uint32_t op);
	uint32_t opB(uint32_t op);
	uint32_t opLDB(uint32_t op);
	uint32_t opLDH(uint32_t op);
	uint32_t opLDW(uint32_t op);
	uint32_t opINB(uint32_t op);
	uint32_t opCAXI(uint32_t op);
	uint32_t opINH(uint32_t op);
	uint32_t opINW(uint32_t op);
	uint32_t opSTB(uint32_t op);
	uint32_t opSTH(uint32_t op);
	uint32_t opSTW(uint32_t op);
	uint32_t opOUTB(uint32_t op);
	uint32_t opOUTH(uint32_t op);
	uint32_t opOUTW(uint32_t op);
	uint32_t opMULr(uint32_t op);
	uint32_t opMULUr(uint32_t op);
	uint32_t opDIVr(uint32_t op);
	uint32_t opDIVUr(uint32_t op);
	void opADDF(uint32_t op);
	void opSUBF(uint32_t op);
	void opMULF(uint32_t op);
	void opDIVF(uint32_t op);
	void opTRNC(uint32_t op);
	void opCMPF(uint32_t op);
	void opCVTS(uint32_t op);
	void opCVTW(uint32_t op);
	void opMPYHW(uint32_t op);
	void opXB(uint32_t op);
	void opXH(uint32_t op);
	uint32_t opFpoint(uint32_t op);
	uint32_t opBSU(uint32_t op);
	void take_interrupt();

};


extern const device_type V810;


#endif /* __V810_H__ */