summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/bus/wangpc/wangpc.h
blob: 2b3a7860fc1a140eea7b97e22ebdbf9ae1fcb80a (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/**********************************************************************

    Wang Professional Computer bus emulation

**********************************************************************


**********************************************************************/

#ifndef MAME_BUS_WANGPC_WANGPC_H
#define MAME_BUS_WANGPC_WANGPC_H

#pragma once




//**************************************************************************
//  CONSTANTS
//**************************************************************************

#define WANGPC_BUS_TAG      "wangpcbus"


//**************************************************************************
//  TYPE DEFINITIONS
//**************************************************************************

// ======================> wangpcbus_slot_device

class wangpcbus_device;

class wangpcbus_slot_device : public device_t, public device_slot_interface
{
public:
	// construction/destruction
	template <typename T>
	wangpcbus_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt, int sid)
		: wangpcbus_slot_device(mconfig, tag, owner, 0)
	{
		option_reset();
		opts(*this);
		set_default_option(dflt);
		set_fixed(false);
		set_wangpcbus_slot(sid);
	}
	wangpcbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);

	// inline configuration
	void set_wangpcbus_slot(int sid) { m_sid = sid; }

protected:
	// device-level overrides
	virtual void device_start() override;

private:
	// configuration
	wangpcbus_device  *m_bus;
	int m_sid;
};


// device type definition
DECLARE_DEVICE_TYPE(WANGPC_BUS_SLOT, wangpcbus_slot_device)


class device_wangpcbus_card_interface;


// ======================> wangpcbus_device

class wangpcbus_device : public device_t
{
public:
	// construction/destruction
	wangpcbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
	~wangpcbus_device() { m_device_list.detach_all(); }

	auto irq2_wr_callback() { return m_write_irq2.bind(); }
	auto irq3_wr_callback() { return m_write_irq3.bind(); }
	auto irq4_wr_callback() { return m_write_irq4.bind(); }
	auto irq5_wr_callback() { return m_write_irq5.bind(); }
	auto irq6_wr_callback() { return m_write_irq6.bind(); }
	auto irq7_wr_callback() { return m_write_irq7.bind(); }
	auto drq1_wr_callback() { return m_write_drq1.bind(); }
	auto drq2_wr_callback() { return m_write_drq2.bind(); }
	auto drq3_wr_callback() { return m_write_drq3.bind(); }
	auto ioerror_wr_callback() { return m_write_ioerror.bind(); }

	void add_card(device_wangpcbus_card_interface *card, int sid);

	// computer interface
	DECLARE_READ16_MEMBER( mrdc_r );
	DECLARE_WRITE16_MEMBER( amwc_w );

	DECLARE_READ16_MEMBER( sad_r );
	DECLARE_WRITE16_MEMBER( sad_w );

	uint8_t dack_r(address_space &space, int line);
	void dack_w(address_space &space, int line, uint8_t data);

	DECLARE_READ8_MEMBER( dack0_r ) { return dack_r(space, 0); }
	DECLARE_WRITE8_MEMBER( dack0_w ) { dack_w(space, 0, data); }
	DECLARE_READ8_MEMBER( dack1_r ) { return dack_r(space, 1); }
	DECLARE_WRITE8_MEMBER( dack1_w ) { dack_w(space, 1, data); }
	DECLARE_READ8_MEMBER( dack2_r ) { return dack_r(space, 2); }
	DECLARE_WRITE8_MEMBER( dack2_w ) { dack_w(space, 2, data); }
	DECLARE_READ8_MEMBER( dack3_r ) { return dack_r(space, 3); }
	DECLARE_WRITE8_MEMBER( dack3_w ) { dack_w(space, 3, data); }

	DECLARE_WRITE_LINE_MEMBER( tc_w );

	// peripheral interface
	DECLARE_WRITE_LINE_MEMBER( irq2_w ) { m_write_irq2(state); }
	DECLARE_WRITE_LINE_MEMBER( irq3_w ) { m_write_irq3(state); }
	DECLARE_WRITE_LINE_MEMBER( irq4_w ) { m_write_irq4(state); }
	DECLARE_WRITE_LINE_MEMBER( irq5_w ) { m_write_irq5(state); }
	DECLARE_WRITE_LINE_MEMBER( irq6_w ) { m_write_irq6(state); }
	DECLARE_WRITE_LINE_MEMBER( irq7_w ) { m_write_irq7(state); }
	DECLARE_WRITE_LINE_MEMBER( drq1_w ) { m_write_drq1(state); }
	DECLARE_WRITE_LINE_MEMBER( drq2_w ) { m_write_drq2(state); }
	DECLARE_WRITE_LINE_MEMBER( drq3_w ) { m_write_drq3(state); }
	DECLARE_WRITE_LINE_MEMBER( ioerror_w ) { m_write_ioerror(state); }

protected:
	// device-level overrides
	virtual void device_start() override;

private:
	devcb_write_line   m_write_irq2;
	devcb_write_line   m_write_irq3;
	devcb_write_line   m_write_irq4;
	devcb_write_line   m_write_irq5;
	devcb_write_line   m_write_irq6;
	devcb_write_line   m_write_irq7;
	devcb_write_line   m_write_drq1;
	devcb_write_line   m_write_drq2;
	devcb_write_line   m_write_drq3;
	devcb_write_line   m_write_ioerror;

	simple_list<device_wangpcbus_card_interface> m_device_list;
};


// device type definition
DECLARE_DEVICE_TYPE(WANGPC_BUS, wangpcbus_device)


// ======================> device_wangpcbus_card_interface

// class representing interface-specific live wangpcbus card
class device_wangpcbus_card_interface : public device_slot_card_interface
{
	friend class wangpcbus_device;
	template <class ElementType> friend class simple_list;

public:
	device_wangpcbus_card_interface *next() const { return m_next; }

	// memory access
	virtual uint16_t wangpcbus_mrdc_r(address_space &space, offs_t offset, uint16_t mem_mask) { return 0; }
	virtual void wangpcbus_amwc_w(address_space &space, offs_t offset, uint16_t mem_mask, uint16_t data) { }

	// I/O access
	virtual uint16_t wangpcbus_iorc_r(address_space &space, offs_t offset, uint16_t mem_mask) { return 0; }
	virtual void wangpcbus_aiowc_w(address_space &space, offs_t offset, uint16_t mem_mask, uint16_t data) { }
	bool sad(offs_t offset) const { return (offset & 0xf80) == (0x800 | (m_sid << 7)); }

	// DMA
	virtual uint8_t wangpcbus_dack_r(address_space &space, int line) { return 0; }
	virtual void wangpcbus_dack_w(address_space &space, int line, uint8_t data) { }
	virtual void wangpcbus_tc_w(int state) { }
	virtual bool wangpcbus_have_dack(int line) { return false; }

protected:
	// construction/destruction
	device_wangpcbus_card_interface(const machine_config &mconfig, device_t &device);

	wangpcbus_device *m_bus;
	wangpcbus_slot_device *m_slot;

	int m_sid;

private:
	device_wangpcbus_card_interface *m_next;
};


void wangpc_cards(device_slot_interface &device);

#endif // MAME_BUS_WANGPC_WANGPC_H