// license:BSD-3-Clause // copyright-holders:Olivier Galibert, Miodrag Milanovic /* Williams WPC Dot Matrix */ #include "emu.h" #include "includes/wpc_dot.h" #include "screen.h" #include "speaker.h" void wpc_dot_state::wpc_dot_map(address_map &map) { map(0x0000, 0x2fff).rw(this, FUNC(wpc_dot_state::ram_r), FUNC(wpc_dot_state::ram_w)); map(0x3000, 0x31ff).bankrw("dmdbank1"); map(0x3200, 0x33ff).bankrw("dmdbank2"); map(0x3400, 0x35ff).bankrw("dmdbank3"); map(0x3600, 0x37ff).bankrw("dmdbank4"); map(0x3800, 0x39ff).bankrw("dmdbank5"); map(0x3a00, 0x3bff).bankrw("dmdbank6"); map(0x3c00, 0x3faf).ram(); map(0x3fb0, 0x3fff).rw(m_wpc, FUNC(wpc_device::read), FUNC(wpc_device::write)); // WPC device map(0x4000, 0x7fff).bankr("cpubank"); map(0x8000, 0xffff).bankr("fixedbank"); } static INPUT_PORTS_START( wpc_dot ) PORT_START("INP0") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("INP1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LSHIFT) // left flipper PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RSHIFT) // right flipper PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_9_PAD) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_START("INP2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) // slam tilt PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_TOGGLE // coin door PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) // always closed PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_START("INP4") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COMMA) PORT_START("INP8") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_STOP) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_SLASH) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COLON) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_QUOTE) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_MINUS) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_EQUALS) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSPACE) PORT_START("INP10") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_OPENBRACE) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSLASH) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_ENTER) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LEFT) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RIGHT) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_UP) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_DOWN) PORT_START("INP20") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_O) PORT_START("INP40") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LALT) PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("INP80") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("COIN") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service / Escape") PORT_CODE(KEYCODE_DEL_PAD) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_VOLUME_UP ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Begin Test / Enter") PORT_CODE(KEYCODE_ENTER_PAD) PORT_START("DIPS") PORT_DIPNAME(0x01,0x01,"Switch 1") PORT_DIPLOCATION("SWA:1") PORT_DIPSETTING(0x00,DEF_STR( Off )) PORT_DIPSETTING(0x01,DEF_STR( On )) PORT_DIPNAME(0x02,0x02,"Switch 2") PORT_DIPLOCATION("SWA:2") PORT_DIPSETTING(0x00,DEF_STR( Off )) PORT_DIPSETTING(0x02,DEF_STR( On )) PORT_DIPNAME(0x04,0x00,"W20") PORT_DIPLOCATION("SWA:3") PORT_DIPSETTING(0x00,DEF_STR( Off )) PORT_DIPSETTING(0x04,DEF_STR( On )) PORT_DIPNAME(0x08,0x00,"W19") PORT_DIPLOCATION("SWA:4") PORT_DIPSETTING(0x00,DEF_STR( Off )) PORT_DIPSETTING(0x08,DEF_STR( On )) PORT_DIPNAME(0xf0,0x00,"Country") PORT_DIPLOCATION("SWA:5,6,7,8") PORT_DIPSETTING(0x00,"USA 1") PORT_DIPSETTING(0x10,"France 1") PORT_DIPSETTING(0x20,"Germany") PORT_DIPSETTING(0x30,"France 2") PORT_DIPSETTING(0x40,"Unknown 1") PORT_DIPSETTING(0x50,"Unknown 2") PORT_DIPSETTING(0x60,"Unknown 3") PORT_DIPSETTING(0x70,"Unknown 4") PORT_DIPSETTING(0x80,"Export 1") PORT_DIPSETTING(0x90,"France 3") PORT_DIPSETTING(0xa0,"Export 2") PORT_DIPSETTING(0xb0,"France 4") PORT_DIPSETTING(0xc0,"UK") PORT_DIPSETTING(0xd0,"Europe") PORT_DIPSETTING(0xe0,"Spain") PORT_DIPSETTING(0xf0,"USA 2") INPUT_PORTS_END void wpc_dot_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { switch(id) { case TIMER_VBLANK: if((m_vblank_count % 4) == (m_wpc->get_dmd_firq_line()*4/32)) { m_maincpu->set_input_line(M6809_FIRQ_LINE,ASSERT_LINE); m_wpc->set_dmd_firq(); } m_vblank_count++; break; case TIMER_IRQ: m_maincpu->set_input_line(M6809_IRQ_LINE,ASSERT_LINE); break; } } void wpc_dot_state::machine_reset() { m_cpubank->set_entry(0); m_vblank_count = 0; m_irq_count = 0; } void wpc_dot_state::init_wpc_dot() { uint8_t *fixed = memregion("code")->base(); uint32_t codeoff = memregion("code")->bytes() - 0x8000; m_cpubank->configure_entries(0, 64, &fixed[0], 0x4000); m_cpubank->set_entry(0); m_fixedbank->configure_entries(0, 1, &fixed[codeoff],0x8000); m_fixedbank->set_entry(0); m_dmdbank1->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank1->set_entry(0); m_dmdbank2->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank2->set_entry(1); m_dmdbank3->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank3->set_entry(2); m_dmdbank4->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank4->set_entry(3); m_dmdbank5->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank5->set_entry(4); m_dmdbank6->configure_entries(0, 16, &m_dmdram[0x0000],0x200); m_dmdbank6->set_entry(5); m_vblank_timer = timer_alloc(TIMER_VBLANK); m_vblank_timer->adjust(attotime::from_hz(60),0,attotime::from_hz(60*4)); m_irq_timer = timer_alloc(TIMER_IRQ); m_irq_timer->adjust(attotime::from_hz(976),0,attotime::from_hz(976)); m_bankmask = (memregion("code")->bytes() >> 14) - 1; logerror("WPC: ROM bank mask = %02x\n",m_bankmask); memset(m_ram,0,0x3000); memset(m_dmdram,0,0x2000); save_pointer(m_dmdram,"DMD RAM",0x2000); } READ8_MEMBER(wpc_dot_state::ram_r) { return m_ram[offset]; } WRITE8_MEMBER(wpc_dot_state::ram_w) { if((!m_wpc->memprotect_active()) || ((offset & m_wpc->get_memprotect_mask()) != m_wpc->get_memprotect_mask())) m_ram[offset] = data; else logerror("WPC: Memory protection violation at 0x%04x (mask=0x%04x)\n",offset,m_wpc->get_memprotect_mask()); } WRITE8_MEMBER(wpc_dot_state::wpc_rombank_w) { m_cpubank->set_entry(data & m_bankmask); } WRITE8_MEMBER(wpc_dot_state::wpc_dmdbank_w) { uint8_t page = offset >> 4; switch(offset & 0x07) { case 0: m_dmdbank1->set_entry(data + (page*16)); break; case 1: m_dmdbank2->set_entry(data + (page*16)); break; case 2: m_dmdbank3->set_entry(data + (page*16)); break; case 3: m_dmdbank4->set_entry(data + (page*16)); break; case 4: m_dmdbank5->set_entry(data + (page*16)); break; case 5: m_dmdbank6->set_entry(data + (page*16)); break; } } WRITE_LINE_MEMBER(wpc_dot_state::wpcsnd_reply_w) { if(state) { m_maincpu->set_input_line(M6809_FIRQ_LINE,ASSERT_LINE); m_wpc->set_snd_firq(); } } WRITE_LINE_MEMBER(wpc_dot_state::wpc_irq_w) { m_maincpu->set_input_line(M6809_IRQ_LINE,CLEAR_LINE); } WRITE_LINE_MEMBER(wpc_dot_state::wpc_firq_w) { m_maincpu->set_input_line(M6809_FIRQ_LINE,CLEAR_LINE); } READ8_MEMBER(wpc_dot_state::wpc_sound_ctrl_r) { return m_wpcsnd->ctrl_r(); // ack FIRQ? } WRITE8_MEMBER(wpc_dot_state::wpc_sound_ctrl_w) { m_wpcsnd->ctrl_w(data); } READ8_MEMBER(wpc_dot_state::wpc_sound_data_r) { return m_wpcsnd->data_r(); } WRITE8_MEMBER(wpc_dot_state::wpc_sound_data_w) { m_wpcsnd->data_w(data); } uint32_t wpc_dot_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { uint8_t x,y,bit; uint32_t offset = (m_wpc->get_visible_page() * 0x200); uint32_t col; for(y=0;y<32;y++) // scanline { for(x=0;x<128;x+=8) // column { for(bit=0;bit<8;bit++) // bits { assert(offset >= 0 && offset < ARRAY_LENGTH(m_dmdram)); if(m_dmdram[offset] & (1<