From 93d60e7c6a00e1dbe0d8e78197532c66f0259dcd Mon Sep 17 00:00:00 2001 From: couriersud Date: Tue, 5 Jul 2022 08:23:45 +0200 Subject: netlist: gtrak10 performance and other improvements and fixes (#10032) - added support parameter FORCE_TRISTATE_LOGIC on mk28000 - add system device SYS_PULSE to generate pulse based on input changes parameters are delay, pulse width, input polarity and output polarity - add USE_SPEED_HACKS define to gtrak10 to enable the use of the above Brings gtrak10 from 18% to 120%. - Improved interlaced video support in fixfreq.cpp Added two interlace modes: progressive and interlaced which can be selected in machine configuration. - more clang format work - rename link to connection - introduced typed aliases. This information may be used later to rewrite netlists. - added a three terminal base device This will allow the analog code to be more easily comparable to literature about MNA (Modal node analysis). BJT code is now a lot better readable. - fix doxygen consistency - added an example for a cmos inverter based on NMOS/PMOS fets. - TRUTHTABLE_START was renamed to TRUTH_TABLE - truth tables are now enclosed in braces - netlists are now enclosed in braces - TRUTHTABLE_END() and NETLIST_END() removed from files - Fixed static solver script - Add file path to includes in nltool --- src/lib/netlist/examples/vccs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/lib/netlist/examples/vccs.c') diff --git a/src/lib/netlist/examples/vccs.c b/src/lib/netlist/examples/vccs.c index a5e25588717..ef9e2c35a16 100644 --- a/src/lib/netlist/examples/vccs.c +++ b/src/lib/netlist/examples/vccs.c @@ -9,6 +9,7 @@ #include "netlist/devices/net_lib.h" NETLIST_START(vccs) +{ CLOCK(clk, 1000) // 1000 Hz SOLVER(Solver, 48000) @@ -27,4 +28,4 @@ NETLIST_START(vccs) LOG(logX, VV.OP) LOG(logY, clk) -NETLIST_END() +} -- cgit v1.2.3-70-g09d2