From 156d61c760f86447bb27e09a9f67768b2bd098a6 Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Tue, 10 Jun 2008 07:34:48 +0000 Subject: DRC frontend: * changed from tracking "live" registers to tracking "necessary" registers * genericized register tracking to be more flexible * added previous instruction pointer to opcode descriptions PowerPC frontend/DRC: * cleaned up register tracking implementation * fixed numerous errors and shortcomings in the tracking * added support for removing unnecessary XER CA and CR0 computations * updated UML logging to output new frontend statistics MIPS3 frontend/DRC: * tweaked register tracking to match new DRC frontend system * updated UML logging to output new frontend statistics --- src/emu/cpu/mips/mips3fe.h | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'src/emu/cpu/mips/mips3fe.h') diff --git a/src/emu/cpu/mips/mips3fe.h b/src/emu/cpu/mips/mips3fe.h index 197e3fda142..db366e65888 100644 --- a/src/emu/cpu/mips/mips3fe.h +++ b/src/emu/cpu/mips/mips3fe.h @@ -20,12 +20,16 @@ CONSTANTS ***************************************************************************/ -/* register flags */ -#define REGFLAG_R(n) (((n) == 0) ? 0 : ((UINT64)1 << (n))) -#define REGFLAG_LO (REGFLAG_R(REG_LO)) -#define REGFLAG_HI (REGFLAG_R(REG_HI)) -#define REGFLAG_CPR1(n) ((UINT64)1 << (n)) -#define REGFLAG_FCC (REGFLAG_CPR1(32)) +/* register flags 0 */ +#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n))) + +/* register flags 1 */ +#define REGFLAG_CPR1(n) (1 << (n)) + +/* register flags 2 */ +#define REGFLAG_LO (1 << 0) +#define REGFLAG_HI (1 << 1) +#define REGFLAG_FCC (1 << 2) -- cgit v1.2.3-70-g09d2