From 91f928d6cd774c9526c7fde7e0860aded24d08a5 Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Sun, 16 Sep 2012 03:06:55 +0000 Subject: Enum and union normalization. --- src/emu/cpu/i86/i286.c | 4 ++-- src/emu/cpu/i86/i86priv.h | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/emu/cpu/i86') diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c index 99341b69f4a..0c3f9ab7a1b 100644 --- a/src/emu/cpu/i86/i286.c +++ b/src/emu/cpu/i86/i286.c @@ -26,11 +26,11 @@ /* cpu state */ /***************************************************************************/ /* I86 registers */ -typedef union +union i80286basicregs { /* eight general registers */ UINT16 w[8]; /* viewed as 16 bits registers */ UINT8 b[16]; /* or as 8 bit registers */ -} i80286basicregs; +}; struct i80286_state { diff --git a/src/emu/cpu/i86/i86priv.h b/src/emu/cpu/i86/i86priv.h index 0c51e3bc571..c2dcbfbdc3c 100644 --- a/src/emu/cpu/i86/i86priv.h +++ b/src/emu/cpu/i86/i86priv.h @@ -10,8 +10,8 @@ #define I8086_NMI_INT_VECTOR 2 -typedef enum { ES, CS, SS, DS } SREGS; -typedef enum { AX, CX, DX, BX, SP, BP, SI, DI } WREGS; +enum SREGS { ES, CS, SS, DS }; +enum WREGS { AX, CX, DX, BX, SP, BP, SI, DI }; #ifndef FALSE #define FALSE 0 @@ -19,7 +19,7 @@ typedef enum { AX, CX, DX, BX, SP, BP, SI, DI } WREGS; #endif -typedef enum { +enum BREGS { AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1), AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0), CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3), @@ -36,7 +36,7 @@ typedef enum { SIH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc), DIL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf), DIH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe) -} BREGS; +}; /* parameter x = result, y = source 1, z = source 2 */ -- cgit v1.2.3-70-g09d2