From 22513fb6fe281f5ccb75aaddb6417a12a66c313d Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 25 May 2020 16:42:42 +0200 Subject: emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer). --- src/devices/cpu/dspp/dsppdrc.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/devices/cpu/dspp/dsppdrc.cpp') diff --git a/src/devices/cpu/dspp/dsppdrc.cpp b/src/devices/cpu/dspp/dsppdrc.cpp index 68b0c3cb741..947c698576f 100644 --- a/src/devices/cpu/dspp/dsppdrc.cpp +++ b/src/devices/cpu/dspp/dsppdrc.cpp @@ -292,7 +292,7 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c { uint32_t sum = seqhead->opptr.w[0]; uint32_t addr = seqhead->physpc; - const void *base = m_codeptr(addr); + const void *base = m_code_cache.read_ptr(addr); UML_MOV(block, I0, 0); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,word @@ -306,14 +306,14 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c { uint32_t sum = 0; uint32_t addr = seqhead->physpc; - const void *base = m_codeptr(addr); + const void *base = m_code_cache.read_ptr(addr); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,dword sum += seqhead->opptr.w[0]; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) { addr = curdesc->physpc; - base = m_codeptr(addr); + base = m_code_cache.read_ptr(addr); assert(base != nullptr); UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 @@ -830,7 +830,7 @@ void dspp_device::generate_parse_operands(drcuml_block &block, compiler_state *c uint32_t opoffset = 1; while (opidx < numops) { - operand = m_code16(desc->pc + opoffset); + operand = m_code_cache.read_word(desc->pc + opoffset); opoffset++; if (operand & 0x8000) -- cgit v1.2.3-70-g09d2