From 4c0c840f96030685216ad1ff072fba8dd4f3eeb6 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Tue, 31 Jul 2018 23:54:12 +1000 Subject: (nw) be less eager to shadow variables in layouts, make highlights visible on white squares in modena --- docs/source/techspecs/layout_files.rst | 39 ++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 18 deletions(-) (limited to 'docs') diff --git a/docs/source/techspecs/layout_files.rst b/docs/source/techspecs/layout_files.rst index 47a675251de..89ce3e54d58 100644 --- a/docs/source/techspecs/layout_files.rst +++ b/docs/source/techspecs/layout_files.rst @@ -675,18 +675,18 @@ Two horizontally separated, clickable, four-by-four keypads (inside a ``group`` or ``view`` element):: - - + + - - + + - + @@ -697,19 +697,19 @@ top right, ``btn30`` in the bottom left, and ``btn37`` in the bottom right, counting in between. The four rows are connected to I/O ports ``row0``, ``row1``, ``row2``, and ``row3``, from top to bottom. The columns are connected to consecutive I/O port bits, starting with the least significant bit on the -left. Note that the ``col``, ``x`` and ``mask`` parameters in the innermost -``repeat`` element take their initial values from the correspondingly named -parameters in the enclosing scope, but do not modify them. +left. Note that the ``mask`` parameter in the innermost ``repeat`` element +takes its initial value from the correspondingly named parameter in the +enclosing scope, but does not modify it. Generating a chequerboard pattern with alternating alpha values 0.4 and 0.2 (inside a ``group`` or ``view`` element):: - - + + - - + + @@ -717,20 +717,23 @@ Generating a chequerboard pattern with alternating alpha values 0.4 and 0.2 - - + + - - + + -Rows are connected to I/O ports ``board:IN.7`` at the top to ``board.IN.0`` at -the bottom. +The outermost ``repeat`` element generates a group of two rows on each +iteration; the next ``repeat`` element generates an individual row on each +iteration; the innermost ``repeat`` element produces two horizontally adjacent +tiles on each iteration. Rows are connected to I/O ports ``board:IN.7`` at the +top to ``board.IN.0`` at the bottom. .. _layout-autogen: -- cgit v1.2.3-70-g09d2