From 77d530bf18d9531d8af0f46f41e04874419e7935 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Thu, 16 Nov 2017 22:38:23 +0100 Subject: prodigy: Basic LAY to SVG XSLT filter, should probably live somewhere else --- web/layout.xsl | 231 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 231 insertions(+) create mode 100644 web/layout.xsl diff --git a/web/layout.xsl b/web/layout.xsl new file mode 100644 index 00000000000..8238fbbd96e --- /dev/null +++ b/web/layout.xsl @@ -0,0 +1,231 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + 00 + + + + + + + + + + + + + + + + + + + + + + + Title + + + + + + + + & + + + + + Message('', , 0); + Message('', , 1); + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3-70-g09d2 From 0877d556c6c77f5eeb8ca5d8ff9a4a7653a50d1f Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Thu, 16 Nov 2017 22:44:25 +0100 Subject: prodigy: Added XSLT stylesheet reference to enable put the LAY file on a local webserver. Note: buildsystem will remove this line before compressing the LAY --- src/mame/layout/prodigy.lay | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/layout/prodigy.lay b/src/mame/layout/prodigy.lay index 1c8c63cf598..7af176ef7c2 100644 --- a/src/mame/layout/prodigy.lay +++ b/src/mame/layout/prodigy.lay @@ -1,5 +1,5 @@ - + -- cgit v1.2.3-70-g09d2 From 144a7cbb596f8704df2e24ef1408ce9e672a17b5 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Thu, 16 Nov 2017 22:48:13 +0100 Subject: prodigy: WIP Added support for SVG web UI through XSL transformation of the LAY file --- scripts/target/mame/mess.lua | 3 + src/emu/http.cpp | 1 + src/mame/drivers/prodigy.cpp | 302 ++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 302 insertions(+), 4 deletions(-) diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index b0cdb00f6f5..42c82e0849d 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -2659,6 +2659,9 @@ files { MAME_DIR .. "src/mame/drivers/prodigy.cpp", MAME_DIR .. "src/mame/machine/nl_prodigy.cpp", MAME_DIR .. "src/mame/machine/nl_prodigy.h", + } +includedirs { + MAME_DIR .. "3rdparty/rapidjson/include", } createMESSProjects(_target, _subtarget, "psion") diff --git a/src/emu/http.cpp b/src/emu/http.cpp index fc14b0e75ae..899378001fa 100644 --- a/src/emu/http.cpp +++ b/src/emu/http.cpp @@ -48,6 +48,7 @@ const static struct mapping { "jpx", "image/jpx" }, { "js", "application/javascript" }, { "json", "application/json" }, + { "lay", "text/xml" }, { "m3u", "audio/x-mpegurl" }, { "m4v", "video/x-m4v" }, { "mid", "audio/x-midi" }, diff --git a/src/mame/drivers/prodigy.cpp b/src/mame/drivers/prodigy.cpp index 1b0c2e46808..4658540ad4c 100644 --- a/src/mame/drivers/prodigy.cpp +++ b/src/mame/drivers/prodigy.cpp @@ -11,7 +11,6 @@ - Sound - Row/column LEDs - Chess board sensors - - Support for SVG/CSS based browser UI +-------------------------------------------------------------------------------------+ |LEDS--------------------------------------------+ +-----------------+ | @@ -68,12 +67,25 @@ *******************************************************************************************/ #include "emu.h" +#include "emuopts.h" #include "cpu/m6502/m6502.h" #include "machine/74145.h" #include "machine/netlist.h" #include "machine/nl_prodigy.h" #include "machine/6522via.h" +// TODO: Move all HTTPUI stuff global and generic +#define HTTPUI 1 + +#if HTTPUI +#include +#include +#include +#include "rapidjson/include/rapidjson/document.h" +#include "rapidjson/include/rapidjson/stringbuffer.h" +#include "rapidjson/include/rapidjson/writer.h" +#endif + // Generated artwork includes #include "prodigy.lh" @@ -84,8 +96,10 @@ #define LOG_CLK (1U << 5) #define LOG_KBD (1U << 6) #define LOG_AW (1U << 7) +#define LOG_HTTP (1U << 8) +#define LOG_XML (1U << 9) -//#define VERBOSE (LOG_KBD|LOG_AW) // (LOG_BCD|LOG_NETLIST|LOG_SETUP) +//#define VERBOSE (LOG_HTTP|LOG_AW) // (LOG_BCD|LOG_NETLIST|LOG_SETUP) //#define LOG_OUTPUT_STREAM std::cout #include "logmacro.h" @@ -97,6 +111,8 @@ #define LOGCLK(...) LOGMASKED(LOG_CLK, __VA_ARGS__) #define LOGKBD(...) LOGMASKED(LOG_KBD, __VA_ARGS__) #define LOGAW(...) LOGMASKED(LOG_AW, __VA_ARGS__) +#define LOGHTTP(...) LOGMASKED(LOG_HTTP, __VA_ARGS__) +#define LOGXML(...) LOGMASKED(LOG_XML, __VA_ARGS__) #ifdef _MSC_VER #define FUNCNAME __func__ @@ -114,12 +130,21 @@ public: , m_maincpu(*this, "maincpu") , m_74145(*this, "io_74145") , m_segments(0) + , m_digit_cache{0xff, 0xff, 0xff, 0xff} , m_via(*this, "via") , m_bcd(*this, NETLIST_TAG) , m_cb1(*this, "bcd:cb1") , m_cb2(*this, "bcd:cb2") , m_digit(0.0) , m_io_line(*this, "LINE%u", 0) +#if HTTPUI + , m_connection(NULL) + , m_web_line0(0) + , m_web_line1(0) + , m_web_line2(0) + , m_web_line3(0) + , m_web_line4(0) +#endif { } NETDEV_LOGIC_CALLBACK_MEMBER(bcd_bit0_cb); @@ -143,6 +168,7 @@ private: required_device m_maincpu; required_device m_74145; uint8_t m_segments; + uint8_t m_digit_cache[4]; required_device m_via; required_device m_bcd; required_device m_cb1; @@ -153,6 +179,24 @@ private: virtual void device_start() override; required_ioport_array<5> m_io_line; uint16_t m_line[5]; + +#if HTTPUI + http_manager *m_server; + void on_update(http_manager::http_request_ptr request, http_manager::http_response_ptr response); + const std::string decompress_layout_data(const internal_layout *layout_data); + void on_open(http_manager::websocket_connection_ptr connection); + void on_message(http_manager::websocket_connection_ptr connection, const std::string &payload, int opcode); + void on_close(http_manager::websocket_connection_ptr connection, int status, const std::string& reason); + void on_error(http_manager::websocket_connection_ptr connection, const std::error_code& error_code); + void update_web_bcd(uint8_t digit_nbr, uint8_t m_segments); + + http_manager::websocket_connection_ptr m_connection; + uint16_t m_web_line0; + uint16_t m_web_line1; + uint16_t m_web_line2; + uint16_t m_web_line3; + uint16_t m_web_line4; +#endif }; NETDEV_LOGIC_CALLBACK_MEMBER(prodigy_state::bcd_bit0_cb) { if (data != 0) m_digit |= 0x01; else m_digit &= ~(0x01); LOGBCD("%s: %d m_digit: %02x\n", FUNCNAME, data, m_digit); } @@ -167,8 +211,219 @@ NETDEV_LOGIC_CALLBACK_MEMBER(prodigy_state::bcd_bit7_cb) { if (data != 0) m_digi void prodigy_state::device_start() { memset(m_line, 0, sizeof(m_line)); +#if HTTPUI + m_server = machine().manager().http(); + if (m_server->is_active()) + { + using namespace std::placeholders; + m_server->add_http_handler("/layout*", std::bind(&prodigy_state::on_update, this, _1, _2)); + m_server->add_endpoint("/socket", + std::bind(&prodigy_state::on_open, this, _1), + std::bind(&prodigy_state::on_message, this, _1, _2, _3), + std::bind(&prodigy_state::on_close, this, _1, _2, _3), + std::bind(&prodigy_state::on_error, this, _1, _2) + ); + } +#endif +} + +#if HTTPUI +const std::string prodigy_state::decompress_layout_data(const internal_layout *layout_data) +{ + // +1 to ensure data is terminated for XML parser + std::unique_ptr tempout(new u8(layout_data->decompressed_size + 1)); + std::string fail(""); + z_stream stream; + int zerr; + + /* initialize the stream */ + memset(&stream, 0, sizeof(stream)); + stream.next_out = tempout.get(); + stream.avail_out = layout_data->decompressed_size; + + zerr = inflateInit(&stream); + if (zerr != Z_OK) + { + fatalerror("could not inflateInit"); + return fail; // return empty buffer + } + + /* decompress this chunk */ + stream.next_in = (unsigned char*)layout_data->data; + stream.avail_in = layout_data->compressed_size; + zerr = inflate(&stream, Z_NO_FLUSH); + + /* stop at the end of the stream */ + if (zerr == Z_STREAM_END) + { + // OK + } + else if (zerr != Z_OK) + { + fatalerror("decompression error\n"); + return fail; // return empty buffer + } + + /* clean up */ + zerr = inflateEnd(&stream); + if (zerr != Z_OK) + { + fatalerror("inflateEnd error\n"); + return fail; // return empty buffer + } + + return std::string((const char *)tempout.get(), layout_data->decompressed_size + 1); +} + + +void prodigy_state::on_update(http_manager::http_request_ptr request, http_manager::http_response_ptr response) +{ + LOG("%s\n", FUNCNAME); + + LOGHTTP("Full request: %s\n", request->get_resource()); + LOGHTTP("Path: %s\n", request->get_path()); + LOGHTTP("Query: %s\n", request->get_query()); + LOGHTTP("Artpath: %s\n", this->machine().options().art_path()); + LOGHTTP("System: %s\n", machine().system().name); + + response->set_status(200); + response->set_content_type("text/xml"); + + if (std::string("/layout/layout.xsl") == request->get_path()) + { + std::string path; + osd_get_full_path(path, "."); + LOGHTTP("Serving XSL document %s\n", path + "/web/layout.xsl"); +#if 0 + m_server->serve_document(request, response, "layout.xls"); // Doesn't work, how do I make the webserver serve a file? +#else + std::ifstream xslfile (path + "/web/layout.xsl"); + if (xslfile.is_open()) + { + std::string buf; + std::string outstr; + while ( std::getline (xslfile, buf) ) + { + outstr += buf + "\n"; + } + xslfile.close(); + response->set_body(outstr); + LOGXML("%s", outstr); + } + else + { + response->set_status(500); // Or 404...? + logerror("Unable to open file %s", path + "web/layout.xsl"); + LOGHTTP("Unable to open file %s", path + "web/layout.xsl"); + } +#endif + } + else + { + z_stream stream; + int zerr; + char buf[1024 * 10]; + std::string outstr; + memset(&stream, 0, sizeof(stream)); + stream.next_in = (Bytef *)(layout_prodigy.data); + stream.avail_in = layout_prodigy.compressed_size; + if ((zerr = inflateInit(&stream)) == Z_OK) + { + do + { + stream.next_out = (Bytef*)(&buf[0]); + stream.avail_out = sizeof(buf); + zerr = inflate(&stream, 0); + if (zerr == Z_OK || zerr == Z_STREAM_END) + { + outstr.append(&buf[0], stream.total_out - outstr.size()); + LOGXML("appending %s\n", buf); + } + else + { + LOGHTTP("Append Error %d\n", zerr); + } + }while (zerr == Z_OK); + if ((zerr = inflateEnd(&stream)) != Z_OK) + { + response->set_status(500); // Or 404...? + fatalerror("Zlib decompression error\n"); + } + else + { + outstr.insert(std::string("").size(), ""); + response->set_body(outstr); + } + } + else + { + response->set_status(500); // Or 404...? + LOGHTTP("Init Error %d\n", zerr); + } + } +} + +void prodigy_state::on_open(http_manager::websocket_connection_ptr connection) +{ + logerror("websocket connection opened\n"); + LOGHTTP("%s\n", FUNCNAME); + m_connection = connection; + for (int i = 0; i < 4; i++) + { + update_web_bcd(i, m_digit_cache[i]); + } +} + +void prodigy_state::on_message(http_manager::websocket_connection_ptr connection, const std::string &payload, int opcode) +{ + LOGHTTP("%s: %d - %s\n", FUNCNAME, opcode, payload); + using namespace rapidjson; + Document document; + document.Parse(payload.c_str()); + LOGHTTP("%s - %04x: %s\n", document["inputtag"].GetString(), document["inputmask"].GetInt(), document["event"].GetInt() == 0 ? "mouse Down" : "mouse Up"); + + // TODO: Reduce number of LINE%u and match mouse up to last mouse down so that mouse clicks don't stick "forever" when gliding out of click down boundary + if (std::string(document["inputtag"].GetString()).compare("LINE0") == 0) + { + if (document["event"].GetInt() == 0) m_web_line0 |= document["inputmask"].GetInt(); else m_web_line0 &= ~(document["inputmask"].GetInt()); + LOGAW("-WEBLINE0: %02x\n", m_web_line0); + } + else if (std::string(document["inputtag"].GetString()).compare("LINE1") == 0) + { + if (document["event"].GetInt() == 0) m_web_line1 |= document["inputmask"].GetInt(); else m_web_line1 &= ~(document["inputmask"].GetInt()); + LOGAW("-WEBLINE1: %02x\n", m_web_line1); + } + else if (std::string(document["inputtag"].GetString()).compare("LINE2") == 0) + { + if (document["event"].GetInt() == 0) m_web_line2 |= document["inputmask"].GetInt(); else m_web_line2 &= ~(document["inputmask"].GetInt()); + LOGAW("-WEBLINE2: %02x\n", m_web_line2); + } + else if (std::string(document["inputtag"].GetString()).compare("LINE3") == 0) + { + if (document["event"].GetInt() == 0) m_web_line3 |= document["inputmask"].GetInt(); else m_web_line3 &= ~(document["inputmask"].GetInt()); + LOGAW("-WEBLINE3: %02x\n", m_web_line3); + } + else if (std::string(document["inputtag"].GetString()).compare("LINE4") == 0) + { + if (document["event"].GetInt() == 0) m_web_line4 |= document["inputmask"].GetInt(); else m_web_line4 &= ~(document["inputmask"].GetInt()); + LOGAW("-WEBLINE4: %02x\n", m_web_line4); + } } +void prodigy_state::on_close(http_manager::websocket_connection_ptr connection, int status, const std::string& reason) +{ + logerror("websocket connection closed: %d - %s\n", status, reason); + LOGHTTP("%s: %d - %s\n", FUNCNAME, status, reason); +} + +void prodigy_state::on_error(http_manager::websocket_connection_ptr connection, const std::error_code& error_code) +{ + logerror("websocket connection error: %d\n", error_code); + LOGHTTP("%s: %d\n", FUNCNAME, error_code); +} + +#endif + WRITE_LINE_MEMBER(prodigy_state::via_cb1_w) { LOGCLK("%s: %d\n", FUNCNAME, state); @@ -201,9 +456,13 @@ READ8_MEMBER( prodigy_state::via_pa_r ) uint16_t ttl74145_data = m_74145->read(); LOGKBD(" - 74145: %03x\n", ttl74145_data); +#if HTTPUI + if (ttl74145_data & 0x100) return ((m_line[0] & ~m_web_line0) | (m_line[1] & ~m_web_line1)); + if (ttl74145_data & 0x200) return ((m_line[4] & ~m_web_line4) | (m_line[3] & ~m_web_line3)); +#else if (ttl74145_data & 0x100) return (m_line[0] | m_line[1]); if (ttl74145_data & 0x200) return (m_line[4] | m_line[3]); - +#endif return 0xff; } @@ -211,8 +470,14 @@ READ8_MEMBER( prodigy_state::via_pb_r ) { LOGKBD("%s: Port B <- %02x\n", FUNCNAME, 0); uint16_t ttl74145_data = m_74145->read(); + +#if HTTPUI + if (ttl74145_data & 0x100) return ((((m_line[2] & ~m_web_line2) >> 8) & 3) << 4); + if (ttl74145_data & 0x200) return ((((m_line[2] & ~m_web_line2) >> 10) & 3) << 4); +#else if (ttl74145_data & 0x100) return (((m_line[2] >> 8) & 3) << 4); if (ttl74145_data & 0x200) return (((m_line[2] >> 10) & 3) << 4); +#endif return 0xff; } @@ -241,6 +506,28 @@ WRITE8_MEMBER( prodigy_state::via_pb_w ) } } +#if HTTPUI +void prodigy_state::update_web_bcd(uint8_t digit_nbr, uint8_t m_segments) +{ + using namespace rapidjson; + Document d; + d.SetObject(); + Document::AllocatorType& allocator = d.GetAllocator(); + // Add data to JSON document + d.AddMember("name", "digit", allocator); + d.AddMember("number", digit_nbr, allocator); + d.AddMember("segments", m_segments, allocator); + // Convert JSON document to string + StringBuffer buf; + Writer writer(buf); + d.Accept(writer); + if (m_connection != NULL) + { + m_connection->send_message(buf.GetString(), 1);// 1 == Text 2 == binary + } +} +#endif + void prodigy_state::update_bcd() { LOGBCD("%s\n", FUNCNAME); @@ -265,7 +552,14 @@ void prodigy_state::update_bcd() LOGBCD(" - segments: %02x -> ", m_digit); m_segments = m_digit; LOGBCD("%02x\n", m_segments); - output().set_digit_value( digit_nbr, m_segments); + if (m_digit_cache[digit_nbr] != m_segments) + { + output().set_digit_value( digit_nbr, m_segments); + m_digit_cache[digit_nbr] = m_segments; +#if HTTPUI + update_web_bcd(digit_nbr, m_segments); +#endif + } } } -- cgit v1.2.3-70-g09d2 From 3113a63766526c8981ec13ec5f7655122dbbb18f Mon Sep 17 00:00:00 2001 From: sjy96525 <1580594783@qq.com> Date: Mon, 27 Nov 2017 12:46:11 +0800 Subject: Correct Panic Park year In according with Titlescreen, says 1997 (at 1:53): https://www.youtube.com/watch?v=oxn4bqsclp0 --- src/mame/drivers/namcos23.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/namcos23.cpp b/src/mame/drivers/namcos23.cpp index 035018d47cc..138cb3c90d1 100644 --- a/src/mame/drivers/namcos23.cpp +++ b/src/mame/drivers/namcos23.cpp @@ -5270,8 +5270,8 @@ GAME( 1997, timecrs2v2b, timecrs2, timecrs2, timecrs2, namcos23_state, s23, GAME( 1997, timecrs2v1b, timecrs2, timecrs2, timecrs2, namcos23_state, s23, ROT0, "Namco", "Time Crisis II (Japan, TSS1 Ver. B)", GAME_FLAGS ) GAME( 1997, timecrs2v4a, timecrs2, timecrs2v4a, timecrs2, namcos23_state, s23, ROT0, "Namco", "Time Crisis II (World, TSS4 Ver. A)", GAME_FLAGS ) GAME( 1997, timecrs2v5a, timecrs2, timecrs2v4a, timecrs2, namcos23_state, s23, ROT0, "Namco", "Time Crisis II (US, TSS5 Ver. A)", GAME_FLAGS ) -GAME( 1998, panicprk, 0, s23, s23, namcos23_state, s23, ROT0, "Namco", "Panic Park (World, PNP2 Ver. A)", GAME_FLAGS ) -GAME( 1998, panicprkj, panicprk, s23, s23, namcos23_state, s23, ROT0, "Namco", "Panic Park (Japan, PNP1 Ver. B)", GAME_FLAGS ) +GAME( 1997, panicprk, 0, s23, s23, namcos23_state, s23, ROT0, "Namco", "Panic Park (World, PNP2 Ver. A)", GAME_FLAGS ) +GAME( 1997, panicprkj, panicprk, s23, s23, namcos23_state, s23, ROT0, "Namco", "Panic Park (Japan, PNP1 Ver. B)", GAME_FLAGS ) GAME( 1998, gunwars, 0, gmen, s23, namcos23_state, s23, ROT0, "Namco", "Gunmen Wars (Japan, GM1 Ver. B)", GAME_FLAGS ) GAME( 1998, gunwarsa, gunwars, gmen, s23, namcos23_state, s23, ROT0, "Namco", "Gunmen Wars (Japan, GM1 Ver. A)", GAME_FLAGS ) GAME( 1998, raceon, 0, gmen, s23, namcos23_state, s23, ROT0, "Namco", "Race On! (World, RO2 Ver. A)", GAME_FLAGS ) -- cgit v1.2.3-70-g09d2 From 96f8d9241ee712365e95e91c25f14813e276c0b6 Mon Sep 17 00:00:00 2001 From: sjy96525 <1580594783@qq.com> Date: Mon, 27 Nov 2017 13:56:38 +0800 Subject: Correct Virtua Striker 2 '99 year Virtua Striker 2 '99 titlescreen says 1998, and released date is 1998 confirmed from Arcade TV Game List Kokunai - Kaigai Hen (1971 - 2005) at Page 38. https://i.imgur.com/yf3xSWX.png https://i.imgur.com/e4lqNDW.png --- src/mame/drivers/model3.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/model3.cpp b/src/mame/drivers/model3.cpp index a8ab703beb1..c361fd6ede7 100644 --- a/src/mame/drivers/model3.cpp +++ b/src/mame/drivers/model3.cpp @@ -6428,7 +6428,7 @@ GAME( 1997, vs215, vs2, model3_15, model3, model3_state, vs215, ROT0 GAME( 1997, vs215o, vs2, model3_15, model3, model3_state, vs215, ROT0, "Sega", "Virtua Striker 2 (Step 1.5, older)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1997, lemans24, 0, model3_15, scud, model3_state, lemans24, ROT0, "Sega", "Le Mans 24 (Revision B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1998, vs29815, vs298, model3_15, model3, model3_state, vs29815, ROT0, "Sega", "Virtua Striker 2 '98 (Step 1.5)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, vs29915, vs2v991, model3_15, model3, model3_state, vs215, ROT0, "Sega", "Virtua Striker 2 '99 (Step 1.5)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1998, vs29915, vs2v991, model3_15, model3, model3_state, vs215, ROT0, "Sega", "Virtua Striker 2 '99 (Step 1.5)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* Model 3 Step 2.0 */ GAME( 1997, vs2, 0, model3_20, model3, model3_state, vs2, ROT0, "Sega", "Virtua Striker 2 (Step 2.0)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) @@ -6444,10 +6444,10 @@ GAME( 1998, von2a, von2, model3_20_5881, von2, model3_state, von2, GAME( 1998, von254g, von2, model3_20_5881, von2, model3_state, von2, ROT0, "Sega", "Virtual On 2: Oratorio Tangram (ver 5.4g)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1998, fvipers2, 0, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Fighting Vipers 2 (Japan, Revision A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1998, vs298, 0, model3_20_5881, model3, model3_state, vs298, ROT0, "Sega", "Virtua Striker 2 '98 (Step 2.0)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, vs2v991, 0, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99.1 (Revision B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, vs299b, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99 (Revision B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, vs299a, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99 (Revision A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, vs299, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1998, vs2v991, 0, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99.1 (Revision B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1998, vs299b, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99 (Revision B)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1998, vs299a, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99 (Revision A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1998, vs299, vs2v991, model3_20_5881, model3, model3_state, vs299, ROT0, "Sega", "Virtua Striker 2 '99", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* Model 3 Step 2.1 */ GAME( 1998, daytona2, 0, model3_21_5881, daytona2, model3_state, daytona2, ROT0, "Sega", "Daytona USA 2 (Revision A)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -- cgit v1.2.3-70-g09d2 From 60aaa0bb850e7d602ada153a777e7acfd7b72766 Mon Sep 17 00:00:00 2001 From: Wellington Uemura <9029191+katananja@users.noreply.github.com> Date: Thu, 30 Nov 2017 08:26:12 -0200 Subject: Update for Brazilian Portuguese MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Minor fixes and typos. Added @felipesanches requests Shorted some strings as @felipesanches requests, not all "IU" was changed because it breaks the interface or is too big. We will have to deal with the "parent" and "clone" thing later, maybe the use of RAMIFICAÇÃO (RAMIFICATION OF) that will better reflect with our Language. --- language/Portuguese_Brazil/strings.po | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/language/Portuguese_Brazil/strings.po b/language/Portuguese_Brazil/strings.po index 309328de580..2caf2c6a2ab 100644 --- a/language/Portuguese_Brazil/strings.po +++ b/language/Portuguese_Brazil/strings.po @@ -8,8 +8,8 @@ msgid "" msgstr "" "Project-Id-Version: MAME\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2017-10-03 10:32+1100\n" -"PO-Revision-Date: 2017-10-08 16:05-0300\n" +"POT-Creation-Date: 2017-11-30 08:07+1100\n" +"PO-Revision-Date: 2017-11-30 08:07-0300\n" "Last-Translator: Katananja\n" "Language-Team: MAME Language Team\n" "Language: pt_BR\n" @@ -314,7 +314,7 @@ msgstr "" #: src/frontend/mame/ui/cheatopt.cpp:105 msgid "All cheats reloaded" -msgstr "Todos as trapaças recarregadas" +msgstr "Todas as trapaças foram recarregadas" #: src/frontend/mame/ui/cheatopt.cpp:136 msgid "Autofire Settings" @@ -403,7 +403,7 @@ msgstr "Mostrar painéis laterais" #: src/frontend/mame/ui/custui.cpp:173 msgid "Custom UI Settings" -msgstr "Configurações Personalizadas da IU" +msgstr "Personalizaçoes da Interface" #: src/frontend/mame/ui/custui.cpp:223 msgid "default" @@ -411,7 +411,7 @@ msgstr "padrão" #: src/frontend/mame/ui/custui.cpp:331 msgid "UI Font" -msgstr "Fonte da IU" +msgstr "Tipografia da Interface" #: src/frontend/mame/ui/custui.cpp:336 msgid "Bold" @@ -427,11 +427,11 @@ msgstr "Linhas" #: src/frontend/mame/ui/custui.cpp:348 msgid "Infos text size" -msgstr "Tamanho do texto para info" +msgstr "Tamanho do texto de informação" #: src/frontend/mame/ui/custui.cpp:362 msgid "UI Fonts Settings" -msgstr "Configurações das fontes do UI" +msgstr "Configurações das Fontes da Interface" #: src/frontend/mame/ui/custui.cpp:371 msgid "Sample text - Lorem ipsum dolor sit amet, consectetur adipiscing elit." @@ -508,7 +508,7 @@ msgstr "Restaurar as cores originais" #: src/frontend/mame/ui/custui.cpp:481 msgid "UI Colors Settings" -msgstr "Configurações de cores da IU" +msgstr "Configurações de cores da Interface" #: src/frontend/mame/ui/custui.cpp:490 #, c-format @@ -1307,11 +1307,11 @@ msgstr "Há Suporte para Salvamento\tNão\n" #: src/frontend/mame/ui/selgame.cpp:951 msgid "Screen Orientation\tVertical\n" -msgstr "Orientaçlão de tela\tVertical\n" +msgstr "Orientação de tela\tVertical\n" #: src/frontend/mame/ui/selgame.cpp:951 msgid "Screen Orientation\tHorizontal\n" -msgstr "Orientaçlão de tela\tHorizontal\n" +msgstr "Orientação de tela\tHorizontal\n" #: src/frontend/mame/ui/selgame.cpp:961 msgid "Requires CHD\tYes\n" @@ -1398,7 +1398,7 @@ msgstr "Mídia de Software" #: src/frontend/mame/ui/dirmenu.cpp:37 msgid "UI" -msgstr "IU" +msgstr "Interface do Usuário" #: src/frontend/mame/ui/dirmenu.cpp:39 msgid "Samples" @@ -1450,7 +1450,7 @@ msgstr "PCBs" #: src/frontend/mame/ui/dirmenu.cpp:52 msgid "Controls Panels" -msgstr "Painéis de Controles" +msgstr "Painéis de Controle" #: src/frontend/mame/ui/dirmenu.cpp:53 msgid "Crosshairs" @@ -2099,7 +2099,7 @@ msgstr "Steadykey" #: src/frontend/mame/ui/submenu.cpp:77 msgid "UI active" -msgstr "IU ativo" +msgstr "IU ativa" #: src/frontend/mame/ui/submenu.cpp:78 msgid "Offscreen reload" -- cgit v1.2.3-70-g09d2 From fd9ce72783df0361efee7d48906d70f2d3e3390a Mon Sep 17 00:00:00 2001 From: Felipe Corrêa da Silva Sanches Date: Thu, 30 Nov 2017 11:22:01 -0200 Subject: fixing/improving metadata on CoCo FDCs: CP-450 and CD-6809 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Thanks to Daniel Campos & Datassette.org for the CP-450 disk rom. MAME was calling it CP400_FDC, but the correct name of the disk controller unit is "Prológica CP-450". The ROM was correct (verified checksum), but I renamed it to fix the previous naming mistake. Unfortunately this FDC unit is rare, so I still don't know whats the IC reference for the EPROM on the PCB. There is a photo of the CP-450 disk controller unit at: https://datassette.org/softwares/tandy-trs-color/cp-450-basic-disco-v-10 http://files.datassette.org/softwares/img/wp_20141212_22_08_26_pro.jpg --- src/devices/bus/coco/coco_fdc.cpp | 23 ++++++++++++++--------- src/devices/bus/coco/coco_fdc.h | 2 +- src/mame/drivers/coco12.cpp | 4 ++-- 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/src/devices/bus/coco/coco_fdc.cpp b/src/devices/bus/coco/coco_fdc.cpp index 64268c8b17b..01f91976db2 100644 --- a/src/devices/bus/coco/coco_fdc.cpp +++ b/src/devices/bus/coco/coco_fdc.cpp @@ -494,22 +494,27 @@ namespace DEFINE_DEVICE_TYPE(COCO3_HDB1, coco3_hdb1_device, "coco3_hdb1", "CoCo3 HDB-DOS") //************************************************************************** -// CP400 FDC +// Prológica CP-450 BASIC Disco V. 1.0 (1984) +// +// There is a photo of the CP-450 disk controller unit at: +// https://datassette.org/softwares/tandy-trs-color/cp-450-basic-disco-v-10 +// http://files.datassette.org/softwares/img/wp_20141212_22_08_26_pro.jpg +// //************************************************************************** -ROM_START(cp400_fdc) +ROM_START(cp450_fdc) ROM_REGION(0x4000, "eprom", ROMREGION_ERASE00) - ROM_LOAD("cp400dsk.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b)) + ROM_LOAD("cp450_basic_disco_v1.0.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b)) ROM_END namespace { - class cp400_fdc_device : public coco_fdc_device_base + class cp450_fdc_device : public coco_fdc_device_base { public: // construction/destruction - cp400_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : coco_fdc_device_base(mconfig, CP400_FDC, tag, owner, clock) + cp450_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : coco_fdc_device_base(mconfig, CP450_FDC, tag, owner, clock) { } @@ -517,12 +522,12 @@ namespace // optional information overrides virtual const tiny_rom_entry *device_rom_region() const override { - return ROM_NAME(cp400_fdc); + return ROM_NAME(cp450_fdc); } }; } -DEFINE_DEVICE_TYPE(CP400_FDC, cp400_fdc_device, "cp400_fdc", "CP400 FDC") +DEFINE_DEVICE_TYPE(CP450_FDC, cp450_fdc_device, "cp450_fdc", "Prológica CP-450 BASIC Disco V. 1.0 (1984)") //************************************************************************** // Codimex CD-6809 FDC (1986) @@ -556,4 +561,4 @@ namespace }; } -DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "CD6809 FDC") +DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "Codimex CD-6809 Disk BASIC (1986)") diff --git a/src/devices/bus/coco/coco_fdc.h b/src/devices/bus/coco/coco_fdc.h index 11343ec2610..7ca2ca9e6fe 100644 --- a/src/devices/bus/coco/coco_fdc.h +++ b/src/devices/bus/coco/coco_fdc.h @@ -64,7 +64,7 @@ private: extern const device_type COCO_FDC; extern const device_type COCO_FDC_V11; extern const device_type COCO3_HDB1; -extern const device_type CP400_FDC; +extern const device_type CP450_FDC; extern const device_type CD6809_FDC; #endif // MAME_BUS_COCO_COCO_FDC_H diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp index fe89a51b5fa..88141100f81 100644 --- a/src/mame/drivers/coco12.cpp +++ b/src/mame/drivers/coco12.cpp @@ -353,7 +353,7 @@ SLOT_INTERFACE_START( coco_cart ) SLOT_INTERFACE("fdc", COCO_FDC) SLOT_INTERFACE("fdcv11", COCO_FDC_V11) SLOT_INTERFACE("cc3hdb1", COCO3_HDB1) - SLOT_INTERFACE("cp400_fdc", CP400_FDC) + SLOT_INTERFACE("cp450_fdc", CP450_FDC) SLOT_INTERFACE("cd6809_fdc", CD6809_FDC) SLOT_INTERFACE("rs232", COCO_RS232) SLOT_INTERFACE("dcmodem", COCO_DCMODEM) @@ -530,7 +530,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( cp400, coco ) MCFG_COCO_CARTRIDGE_REMOVE(CARTRIDGE_TAG) - MCFG_COCO_CARTRIDGE_ADD(CARTRIDGE_TAG, coco_cart, "cp400_fdc") + MCFG_COCO_CARTRIDGE_ADD(CARTRIDGE_TAG, coco_cart, "cp450_fdc") MCFG_COCO_CARTRIDGE_CART_CB(WRITELINE(coco_state, cart_w)) MCFG_COCO_CARTRIDGE_NMI_CB(INPUTLINE(MAINCPU_TAG, INPUT_LINE_NMI)) MCFG_COCO_CARTRIDGE_HALT_CB(INPUTLINE(MAINCPU_TAG, INPUT_LINE_HALT)) -- cgit v1.2.3-70-g09d2 From 112fbd83abe96bb2a6358528087ee35fd511b48e Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 1 Dec 2017 16:56:20 -0500 Subject: Clones promoted to working -------------------------- SWTPC 6800 Computer System (with MIKBUG) [AJR] --- scripts/src/bus.lua | 2 + src/devices/bus/ss50/interface.cpp | 4 +- src/devices/bus/ss50/mpc.cpp | 216 +++++++++++++++++++++++++++++++++++++ src/devices/bus/ss50/mpc.h | 14 +++ src/mame/drivers/swtpc.cpp | 7 +- 5 files changed, 237 insertions(+), 6 deletions(-) create mode 100644 src/devices/bus/ss50/mpc.cpp create mode 100644 src/devices/bus/ss50/mpc.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 85b772ba345..4dbf4fe0ad0 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -1400,6 +1400,8 @@ if (BUSES["SS50"]~=null) then files { MAME_DIR .. "src/devices/bus/ss50/interface.cpp", MAME_DIR .. "src/devices/bus/ss50/interface.h", + MAME_DIR .. "src/devices/bus/ss50/mpc.cpp", + MAME_DIR .. "src/devices/bus/ss50/mpc.h", MAME_DIR .. "src/devices/bus/ss50/mps.cpp", MAME_DIR .. "src/devices/bus/ss50/mps.h", } diff --git a/src/devices/bus/ss50/interface.cpp b/src/devices/bus/ss50/interface.cpp index e5f2620b0a8..3d51f76ba53 100644 --- a/src/devices/bus/ss50/interface.cpp +++ b/src/devices/bus/ss50/interface.cpp @@ -79,7 +79,7 @@ #include "emu.h" #include "bus/ss50/interface.h" -//#include "bus/ss50/mpc.h" +#include "bus/ss50/mpc.h" //#include "bus/ss50/mpl.h" //#include "bus/ss50/mpr.h" #include "bus/ss50/mps.h" @@ -214,7 +214,7 @@ ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t } SLOT_INTERFACE_START(ss50_default_2rs_devices) - //SLOT_INTERFACE("mpc", SS50_MPC) + SLOT_INTERFACE("mpc", SS50_MPC) //SLOT_INTERFACE("mpl", SS50_MPL) //SLOT_INTERFACE("mpn", SS50_MPN) SLOT_INTERFACE("mps", SS50_MPS) diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp new file mode 100644 index 00000000000..7f587d6bb62 --- /dev/null +++ b/src/devices/bus/ss50/mpc.cpp @@ -0,0 +1,216 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#include "emu.h" +#include "bus/ss50/mpc.h" +#include "bus/ss50/interface.h" + +#include "bus/rs232/rs232.h" +#include "machine/6821pia.h" +#include "machine/input_merger.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ss50_mpc_device + +class ss50_mpc_device : public device_t, public ss50_card_interface +{ +public: + // construction/destruction + ss50_mpc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SS50_MPC, tag, owner, clock), + ss50_card_interface(mconfig, *this), + m_pia(*this, "pia"), + m_loopback(*this, "loopback"), + m_baud_jumper(*this, "BAUD"), + m_cd4024ae_count(0), + m_cd4024ae_clock(false), + m_cd4024ae_reset(true), + m_count_select(false) + { + } + +protected: + // device-specific overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + + // interface-specific overrides + virtual DECLARE_READ8_MEMBER(register_read) override; + virtual DECLARE_WRITE8_MEMBER(register_write) override; + virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override; + virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override; + +private: + DECLARE_WRITE_LINE_MEMBER(serial_input_w); + DECLARE_WRITE_LINE_MEMBER(reader_control_w); + DECLARE_READ_LINE_MEMBER(count_r); + DECLARE_WRITE_LINE_MEMBER(count_reset_w); + DECLARE_WRITE_LINE_MEMBER(count_select_w); + DECLARE_WRITE_LINE_MEMBER(clock_input_w); + + required_device m_pia; + required_device m_loopback; + required_ioport m_baud_jumper; + + u8 m_cd4024ae_count; + bool m_cd4024ae_clock; + bool m_cd4024ae_reset; + bool m_count_select; +}; + + +static INPUT_PORTS_START( mpc ) + PORT_START("BAUD") + PORT_DIPNAME(1, 0, "Baud Rate") + PORT_DIPSETTING(1, "110") + PORT_DIPSETTING(0, "300") + + PORT_START("STOP") + PORT_DIPNAME(1, 0, "Stop Bits") + PORT_DIPSETTING(0, "1") + PORT_DIPSETTING(1, "2") +INPUT_PORTS_END + + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor ss50_mpc_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(mpc); +} + + +static DEVICE_INPUT_DEFAULTS_START( terminal ) + DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_300) + DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1) + DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8) + DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE) + DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1) +DEVICE_INPUT_DEFAULTS_END + + +//------------------------------------------------- +// device_add_mconfig - add device-specific +// machine configuration +//------------------------------------------------- + +MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) + MCFG_DEVICE_ADD("pia", PIA6821, 0) // actually MC6820 + MCFG_PIA_WRITEPA_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<0>)) MCFG_DEVCB_BIT(0) + MCFG_PIA_CB2_HANDLER(WRITELINE(ss50_mpc_device, reader_control_w)) + MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6) + MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7) + MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2) + MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(ss50_mpc_device, count_reset_w)) MCFG_DEVCB_BIT(0) + //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) + + MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal") + MCFG_RS232_RXD_HANDLER(WRITELINE(ss50_mpc_device, serial_input_w)) + MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) + + MCFG_INPUT_MERGER_ALL_HIGH("outgate") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) + + MCFG_INPUT_MERGER_ANY_HIGH("loopback") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>)) +MACHINE_CONFIG_END + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ss50_mpc_device::device_start() +{ + save_item(NAME(m_cd4024ae_count)); + save_item(NAME(m_cd4024ae_clock)); + save_item(NAME(m_cd4024ae_reset)); + save_item(NAME(m_count_select)); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::serial_input_w) +{ + m_pia->set_a_input(state << 7, 0x7f); + m_loopback->in_w<0>(state); +} + + +WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w) +{ + m_loopback->in_w<1>(state); +} + +READ_LINE_MEMBER(ss50_mpc_device::count_r) +{ + return BIT(m_cd4024ae_count, m_count_select ? 4 : 3); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::count_reset_w) +{ + m_cd4024ae_reset = bool(state); + if (state) + m_cd4024ae_count = 0; +} + +WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) +{ + m_count_select = bool(state); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::clock_input_w) +{ + if (m_cd4024ae_clock != bool(state)) + { + m_cd4024ae_clock = bool(state); + if (!state && !m_cd4024ae_reset) + m_cd4024ae_count++; + } +} + + +//------------------------------------------------- +// register_read - read from a port register +//------------------------------------------------- + +READ8_MEMBER(ss50_mpc_device::register_read) +{ + return m_pia->read(space, offset & 3, 0); +} + +//------------------------------------------------- +// register_write - write to a port register +//------------------------------------------------- + +WRITE8_MEMBER(ss50_mpc_device::register_write) +{ + m_pia->write(space, offset & 3, data); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f110_w) +{ + if (m_baud_jumper->read()) + clock_input_w(state); +} + +WRITE_LINE_MEMBER(ss50_mpc_device::f300_w) +{ + if (!m_baud_jumper->read()) + clock_input_w(state); +} + + +// device type definition +DEFINE_DEVICE_TYPE(SS50_MPC, ss50_mpc_device, "ss50_mpc", "MP-C Serial Control Interface") diff --git a/src/devices/bus/ss50/mpc.h b/src/devices/bus/ss50/mpc.h new file mode 100644 index 00000000000..2e769932b0c --- /dev/null +++ b/src/devices/bus/ss50/mpc.h @@ -0,0 +1,14 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + SWTPC MP-C Serial Control Interface + +**********************************************************************/ + +#ifndef MAME_DEVICE_BUS_SS50_MPC_H +#define MAME_DEVICE_BUS_SS50_MPC_H + +extern const device_type SS50_MPC; + +#endif // MAME_DEVICE_BUS_SS50_MPC_H diff --git a/src/mame/drivers/swtpc.cpp b/src/mame/drivers/swtpc.cpp index b5626475ebc..cd7acfc2461 100644 --- a/src/mame/drivers/swtpc.cpp +++ b/src/mame/drivers/swtpc.cpp @@ -16,8 +16,7 @@ Note: All commands must be in uppercase. See the SWTBUG manual. ToDo: - - Add more SS-50 interface slot options (in particular, MIKBUG - needs MP-C for I/O slot #1) + - Add more SS-50 interface slot options - Emulate MP-A2 revision of CPU board, with four 2716 ROM sockets and allowance for extra RAM boards at A000-BFFF and C000-DFFF @@ -182,7 +181,7 @@ static MACHINE_CONFIG_DERIVED( swtpcm, swtpc ) MCFG_DEVICE_CLOCK(XTAL_1_7971MHz) MCFG_DEVICE_MODIFY("io1") - //MCFG_SLOT_DEFAULT_OPTION("mpc") + MCFG_SLOT_DEFAULT_OPTION("mpc") MACHINE_CONFIG_END /* ROM definition */ @@ -200,4 +199,4 @@ ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS COMP( 1977, swtpc, 0, 0, swtpc, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with SWTBUG)", MACHINE_NO_SOUND_HW ) -COMP( 1975, swtpcm, swtpc, 0, swtpcm, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with MIKBUG)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +COMP( 1975, swtpcm, swtpc, 0, swtpcm, swtpc, swtpc_state, 0, "Southwest Technical Products Corporation", "SWTPC 6800 Computer System (with MIKBUG)", MACHINE_NO_SOUND_HW ) -- cgit v1.2.3-70-g09d2 From af1dc2b4a4b624d96acc9fb1a245bb9d34f51086 Mon Sep 17 00:00:00 2001 From: r09 Date: Fri, 1 Dec 2017 23:39:06 +0100 Subject: fmtowns: better horizontal scrolling --- src/mame/video/fmtowns.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index 2055c7aeead..f4c77ab6034 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -958,7 +958,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; } else @@ -970,7 +970,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; } @@ -1150,7 +1150,7 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; } else @@ -1162,7 +1162,7 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; } @@ -1296,7 +1296,7 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[21] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[21] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]); + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; } else @@ -1308,7 +1308,7 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[17] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[17] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]); + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; } -- cgit v1.2.3-70-g09d2 From e1771185d2a8766f95733554c643d0fcad268745 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 2 Dec 2017 03:25:41 +0100 Subject: hh_tms1k: xl25 WIP (nw) --- src/devices/cpu/tms1000/tms1000.cpp | 10 ++ src/devices/cpu/tms1000/tms1000.h | 2 + src/mame/drivers/fidel68k.cpp | 2 +- src/mame/drivers/hh_tms1k.cpp | 181 ++++++++++++++++++++++++++++++++++-- src/mame/mame.lst | 1 + 5 files changed, 188 insertions(+), 8 deletions(-) diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp index 813f1da99f8..54a38a220c7 100644 --- a/src/devices/cpu/tms1000/tms1000.cpp +++ b/src/devices/cpu/tms1000/tms1000.cpp @@ -122,6 +122,16 @@ MACHINE_CONFIG_MEMBER(tms1000_cpu_device::device_add_mconfig) MCFG_PLA_FILEFORMAT(BERKELEY) MACHINE_CONFIG_END +MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig) + + // microinstructions PLA, output PLA + MCFG_PLA_ADD("mpla", 8, 16, 30) + MCFG_PLA_FILEFORMAT(BERKELEY) + MCFG_PLA_ADD("opla", 5, 8, 32) + MCFG_PLA_FILEFORMAT(BERKELEY) +MACHINE_CONFIG_END + + // disasm util::disasm_interface *tms1000_cpu_device::create_disassembler() { diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h index 9e969dfc356..d5f53c890b6 100644 --- a/src/devices/cpu/tms1000/tms1000.h +++ b/src/devices/cpu/tms1000/tms1000.h @@ -69,6 +69,8 @@ public: protected: // overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual void op_br() override { op_br3(); } // 3-level stack virtual void op_call() override { op_call3(); } // " virtual void op_retn() override { op_retn3(); } // " diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 581aba0581c..d2c94518b55 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -275,7 +275,7 @@ WRITE8_MEMBER(fidel68k_state::fdes2265_control_w) READ8_MEMBER(fidel68k_state::fdes2265_input_r) { - // a1-a3,d7: multiplexed inputs (active low) + // a1-a3,d7(d15): multiplexed inputs (active low) return (read_inputs(9) >> offset & 1) ? 0 : 0x80; } diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index 57ab1b33e11..c00d3432039 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -53,7 +53,7 @@ @MP1312 TMS1100 1983, Gakken FX-Micom R-165/Tandy Radio Shack Science Fair Microcomputer Trainer *MP1359 TMS1100? 1985, Capsela CRC2000 @MP1525 TMS1170 1980, Coleco Head to Head Baseball - *MP1604 ? 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 (? note: VFD-capable) + *MP1604 TMS1370 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 @MP1801 TMS1700 1981, Tiger Ditto/Tandy Pocket Repeat (model 60-2152) @MP2105 TMS1370 1979, Gakken/Entex Poker (6005) @MP2139 TMS1370 1982, Gakken Galaxy Invader 1000/Tandy Cosmic 1000 Fire Away @@ -99,7 +99,7 @@ @M34038 TMS1100 1982, Parker Brothers Lost Treasure M34047 TMS1100 1982, MicroVision cartridge: Super Blockbuster @M34078A TMS1100 1983, Milton Bradley Electronic Arcade Mania - *MP4486A TMS1000C 1983, Vulcan XL 25 + @MP4486A TMS1000C 1983, Vulcan XL 25 @MP6100A TMS0980 1979, Ideal Electronic Detective @MP6101B TMS0980 1979, Parker Brothers Stop Thief *MP6361 ? 1983, Defender Strikes (? note: VFD-capable) @@ -6924,6 +6924,7 @@ public: : hh_tms1k_state(mconfig, type, tag) { } + void prepare_display(); DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); @@ -6931,6 +6932,11 @@ public: // handlers +void bankshot_state::prepare_display() +{ + display_matrix(7, 11, m_o, m_r & ~3); +} + WRITE16_MEMBER(bankshot_state::write_r) { // R0: speaker out @@ -6940,8 +6946,8 @@ WRITE16_MEMBER(bankshot_state::write_r) m_inp_mux = data >> 2 & 3; // R2-R10: led select - m_r = data & ~3; - display_matrix(7, 11, m_o, m_r); + m_r = data; + prepare_display(); } WRITE16_MEMBER(bankshot_state::write_o) @@ -6949,7 +6955,7 @@ WRITE16_MEMBER(bankshot_state::write_o) // O0-O6: led state // O7: N/C m_o = data & 0x7f; - display_matrix(7, 11, m_o, m_r); + prepare_display(); } READ8_MEMBER(bankshot_state::read_k) @@ -7047,6 +7053,7 @@ public: : hh_tms1k_state(mconfig, type, tag) { } + void prepare_display(); DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); @@ -7054,6 +7061,11 @@ public: // handlers +void splitsec_state::prepare_display() +{ + display_matrix(7, 8, m_o, m_r); +} + WRITE16_MEMBER(splitsec_state::write_r) { // R8: speaker out @@ -7064,7 +7076,7 @@ WRITE16_MEMBER(splitsec_state::write_r) // R0-R7: led select m_r = data; - display_matrix(7, 8, m_o, m_r); + prepare_display(); } WRITE16_MEMBER(splitsec_state::write_o) @@ -7072,7 +7084,7 @@ WRITE16_MEMBER(splitsec_state::write_o) // O0-O6: led state // O7: N/C m_o = data & 0x7f; - display_matrix(7, 8, m_o, m_r); + prepare_display(); } READ8_MEMBER(splitsec_state::read_k) @@ -8662,6 +8674,148 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Vulcan XL 25 + * TMS1000SLC MP4486A (die label 1000C/, MP4486A) + * 28 LEDs, 1-bit sound + +***************************************************************************/ + +class xl25_state : public hh_tms1k_state +{ +public: + xl25_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_tms1k_state(mconfig, type, tag) + { } + + void prepare_display(); + DECLARE_WRITE16_MEMBER(write_r); + DECLARE_WRITE16_MEMBER(write_o); + DECLARE_READ8_MEMBER(read_k); +}; + +// handlers + +void xl25_state::prepare_display() +{ + display_matrix(3, 10, m_o >> 1, m_r); +} + +WRITE16_MEMBER(xl25_state::write_r) +{ + // R0-R9: input mux, led select + m_inp_mux = data; + m_r = data; + prepare_display(); +} + +WRITE16_MEMBER(xl25_state::write_o) +{ + // O1-O3: led data + m_o = data; + prepare_display(); + + // O5(+K4): MCU halt + //if (~data & 0x20) printf("X"); + + // O6: speaker out + m_speaker->level_w(data >> 6 & 1); +} + +READ8_MEMBER(xl25_state::read_k) +{ + // K: multiplexed inputs + // K4 also goes to MCU halt + return read_inputs(10); +} + + +// config + +static INPUT_PORTS_START( xl25 ) + PORT_START("IN.0") // R0 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // R1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // R2 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // R3 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // R4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_T) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // R5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_U) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_I) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_O) // halt + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // R6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_S) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.7") // R7 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_G) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.8") // R8 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_K) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_L) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.9") // R9 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Z) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_X) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) +INPUT_PORTS_END + +static MACHINE_CONFIG_START( xl25 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", TMS1000C, 330000) // approximation - RC osc. R=5.6K, C=47pF + MCFG_TMS1XXX_READ_K_CB(READ8(xl25_state, read_k)) + MCFG_TMS1XXX_WRITE_R_CB(WRITE16(xl25_state, write_r)) + MCFG_TMS1XXX_WRITE_O_CB(WRITE16(xl25_state, write_o)) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Game driver(s) @@ -9428,6 +9582,17 @@ ROM_START( ssports4 ) ROM_END +ROM_START( xl25 ) + ROM_REGION( 0x0400, "maincpu", 0 ) + ROM_LOAD( "mp4486a", 0x0000, 0x0400, CRC(bd84b515) SHA1(377fcc68a517260acd51eb9746cd62914a75d739) ) + + ROM_REGION( 867, "maincpu:mpla", 0 ) + ROM_LOAD( "tms1000_common2_micro.pla", 0, 867, BAD_DUMP CRC(d33da3cf) SHA1(13c4ebbca227818db75e6db0d45b66ba5e207776) ) // placeholder + ROM_REGION( 558, "maincpu:opla", 0 ) + ROM_LOAD( "tms1000c_xl25_output.pla", 0, 558, CRC(06ecc6e0) SHA1(e0fa1b9388948197b4de2edd3cd02fbde1dbabbb) ) +ROM_END + + // YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS CONS( 1979, matchnum, 0, 0, matchnum, matchnum, matchnum_state, 0, "A-One LSI", "Match Number", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) @@ -9517,5 +9682,7 @@ CONS( 1980, phpball, 0, 0, phpball, phpball, phpball_state, 0, CONS( 1980, ssports4, 0, 0, ssports4, ssports4, ssports4_state, 0, "U.S. Games", "Super Sports-4", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK ) +CONS( 1983, xl25, 0, 0, xl25, xl25, xl25_state, 0, "Vulcan Electronics", "XL 25", MACHINE_SUPPORTS_SAVE ) + // ***: As far as MAME is concerned, the game is emulated fine. But for it to be playable, it requires interaction // with other, unemulatable, things eg. game board/pieces, playing cards, pen & paper, etc. diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 97ba68a0e33..80efc6f4314 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14778,6 +14778,7 @@ tbreakup // Tomy tc4 // Coleco tcfball // Tandy Radio Shack tcfballa // Tandy Radio Shack +xl25 // Vulcan zodiac // Coleco @source:hh_ucom4.cpp -- cgit v1.2.3-70-g09d2 From cf79c7b3f6daa2ecb1adb5a559a33b724c094bc8 Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 1 Dec 2017 21:40:42 -0500 Subject: milwaukee.cpp: Add XTAL and PIT clocks from barely legible schematics (nw) --- src/mame/drivers/milwaukee.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/milwaukee.cpp b/src/mame/drivers/milwaukee.cpp index 8e29012b07f..097130f15d0 100644 --- a/src/mame/drivers/milwaukee.cpp +++ b/src/mame/drivers/milwaukee.cpp @@ -7,7 +7,7 @@ Milwaukee Computer MC-1000 series (MC-1000/1100/1200/1300/1400) all the same except for disk options. Chips: SY6502, 2x 6821, 2x MC6850P, 6852, INS8253 -Other: 2x 7-position rotary "dips" to select baud rates on each 6850. +Other: 2x 7-position rotary "dips" to select baud rates on each 6850 (19.2K, 9600, 4800, 2400, 1200, 600, 300). ************************************************************************************************************************************/ @@ -50,16 +50,21 @@ static INPUT_PORTS_START( milwaukee ) INPUT_PORTS_END static MACHINE_CONFIG_START( milwaukee ) - MCFG_CPU_ADD("maincpu", M6502, 1'000'000) // can't read crystal, but clock is correct + MCFG_CPU_ADD("maincpu", M6502, XTAL_16MHz / 16) MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_DEVICE_ADD("pit", PIT8253, 0) + MCFG_PIT8253_CLK0(XTAL_16MHz / 16 / 4) // 250 Hz + MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pit", pit8253_device, write_gate0)) MCFG_DEVCB_INVERT + MCFG_PIT8253_CLK1(double(XTAL_16MHz) / 2 / 13 / 2048 / 5) // 60.09 Hz? + MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit", pit8253_device, write_clk2)) MCFG_DEVCB_INVERT + MCFG_DEVICE_ADD("pia1", PIA6821, 0) MCFG_DEVICE_ADD("pia2", PIA6821, 0) MCFG_DEVICE_ADD("acia2", ACIA6850, 0) MCFG_DEVICE_ADD("ssda", MC6852, 0) - MCFG_DEVICE_ADD("acia_clock", CLOCK, 153600) + MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_16MHz / 2 / 13 / 4) MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("acia1", acia6850_device, write_txc)) MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("acia1", acia6850_device, write_rxc)) -- cgit v1.2.3-70-g09d2 From 3ebbbedaa3cc7cf278b068d98e64365ff995c18c Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 1 Dec 2017 21:55:10 -0500 Subject: milwaukee.cpp: Unit confusion (nw) --- src/mame/drivers/milwaukee.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/milwaukee.cpp b/src/mame/drivers/milwaukee.cpp index 097130f15d0..457e500f4ce 100644 --- a/src/mame/drivers/milwaukee.cpp +++ b/src/mame/drivers/milwaukee.cpp @@ -54,7 +54,7 @@ static MACHINE_CONFIG_START( milwaukee ) MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_DEVICE_ADD("pit", PIT8253, 0) - MCFG_PIT8253_CLK0(XTAL_16MHz / 16 / 4) // 250 Hz + MCFG_PIT8253_CLK0(XTAL_16MHz / 16 / 4) // 250 kHz MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pit", pit8253_device, write_gate0)) MCFG_DEVCB_INVERT MCFG_PIT8253_CLK1(double(XTAL_16MHz) / 2 / 13 / 2048 / 5) // 60.09 Hz? MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pit", pit8253_device, write_clk2)) MCFG_DEVCB_INVERT -- cgit v1.2.3-70-g09d2 From 495df453156dd73e6767a04c563011b657406cc1 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sun, 19 Nov 2017 14:23:38 +0100 Subject: e132xs: initial drc work, and templated conditional db/b, nw --- scripts/src/cpu.lua | 8 +- src/devices/cpu/e132xs/e132xs.cpp | 151 +++- src/devices/cpu/e132xs/e132xs.h | 390 ++++++---- src/devices/cpu/e132xs/e132xsdefs.h | 79 ++ src/devices/cpu/e132xs/e132xsdrc.cpp | 781 +++++++++++++++++++ src/devices/cpu/e132xs/e132xsdrc_ops.cpp | 1035 ++++++++++++++++++++++++++ src/devices/cpu/e132xs/e132xsfe.cpp | 1198 ++++++++++++++++++++++++++++++ src/devices/cpu/e132xs/e132xsfe.h | 32 + src/devices/cpu/e132xs/e132xsop.hxx | 791 +++++++------------- 9 files changed, 3717 insertions(+), 748 deletions(-) create mode 100644 src/devices/cpu/e132xs/e132xsdefs.h create mode 100644 src/devices/cpu/e132xs/e132xsdrc.cpp create mode 100644 src/devices/cpu/e132xs/e132xsdrc_ops.cpp create mode 100644 src/devices/cpu/e132xs/e132xsfe.cpp create mode 100644 src/devices/cpu/e132xs/e132xsfe.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 35e27b3e97f..dad6fe50a1a 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -13,7 +13,7 @@ -- Dynamic recompiler objects -------------------------------------------------- -if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null) then +if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["E1"]~=null) then files { MAME_DIR .. "src/devices/cpu/drcbec.cpp", MAME_DIR .. "src/devices/cpu/drcbec.h", @@ -808,6 +808,10 @@ if (CPUS["E1"]~=null) then files { MAME_DIR .. "src/devices/cpu/e132xs/e132xs.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xs.h", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.cpp", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.h", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc.cpp", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc_ops.cpp", MAME_DIR .. "src/devices/cpu/e132xs/32xsdefs.h", MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.hxx", } @@ -1016,7 +1020,7 @@ if (CPUS["I86"]~=null) then } end -if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["I86"]~=null or CPUS["I386"]~=null or _OPTIONS["with-tools"]) then +if (CPUS["E1"]~=null or CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["I86"]~=null or CPUS["I386"]~=null or _OPTIONS["with-tools"]) then table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i386/i386dasm.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i386/i386dasm.h") end diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 73725ec8a25..8c88af94c31 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1,3 +1,4 @@ + // license:BSD-3-Clause // copyright-holders:Pierpaolo Prazzoli /******************************************************************** @@ -33,6 +34,7 @@ TODO: - some wrong cycle counts - verify register wrapping with sregf/dregf on hardware + CHANGELOG: Pierpaolo Prazzoli @@ -143,6 +145,7 @@ #include "emu.h" #include "e132xs.h" +#include "e132xsfe.h" #include "debugger.h" @@ -152,6 +155,9 @@ //#define VERBOSE 1 #include "logmacro.h" +/* size of the execution code cache */ +#define CACHE_SIZE (32 * 1024 * 1024) + //************************************************************************** // INTERNAL ADDRESS MAP //************************************************************************** @@ -195,10 +201,31 @@ ADDRESS_MAP_END hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map) - : cpu_device(mconfig, type, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map), - m_io_config("io", ENDIANNESS_BIG, io_data_width, 15), - m_icount(0) + : cpu_device(mconfig, type, tag, owner, clock) + , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map) + , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15) + , m_icount(0) + , m_cache(CACHE_SIZE + sizeof(hyperstone_device)) + , m_drcuml(nullptr) + , m_drcfe(nullptr) + , m_drcoptions(0) + , m_cache_dirty(0) + , m_entry(nullptr) + , m_nocode(nullptr) + , m_out_of_cycles(nullptr) + , m_drc_arg0(0) + , m_drc_arg1(0) + , m_drc_arg2(0) + , m_drc_arg3(0) + , m_mem_read8(nullptr) + , m_mem_write8(nullptr) + , m_mem_read16(nullptr) + , m_mem_write16(nullptr) + , m_mem_read32(nullptr) + , m_mem_write32(nullptr) + , m_io_read32(nullptr) + , m_io_write32(nullptr) + , m_enable_drc(false) { } @@ -777,24 +804,18 @@ void hyperstone_device::execute_br() void hyperstone_device::execute_trap(uint32_t addr) { - uint8_t reg; - uint32_t oldSR; - reg = GET_FP + GET_FL; - + const uint8_t reg = GET_FP + GET_FL; SET_ILC(m_instruction_length); - - oldSR = SR; + const uint32_t oldSR = SR; SET_FL(6); SET_FP(reg); - set_local_register(0, (PC & 0xfffffffe) | GET_S); - set_local_register(1, oldSR); + m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; + m_local_regs[(1 + reg) & 0x3f] = oldSR; - SET_M(0); - SET_T(0); - SET_L(1); - SET_S(1); + SR &= ~(M_MASK | T_MASK); + SR |= (L_MASK | S_MASK); PC = addr; @@ -829,8 +850,8 @@ void hyperstone_device::execute_exception(uint32_t addr) SET_ILC(m_instruction_length); const uint32_t oldSR = SR; - SET_FP(reg); SET_FL(2); + SET_FP(reg); m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(1 + reg) & 0x3f] = oldSR; @@ -1008,6 +1029,8 @@ void hyperstone_device::device_start() void hyperstone_device::init(int scale_mask) { + m_enable_drc = false;//allow_drc(); + memset(m_global_regs, 0, sizeof(uint32_t) * 32); memset(m_local_regs, 0, sizeof(uint32_t) * 64); m_op = 0; @@ -1041,6 +1064,38 @@ void hyperstone_device::init(int scale_mask) m_fl_lut[i] = (i ? i : 16); } + uint32_t umlflags = 0; + m_drcuml = std::make_unique(*this, m_cache, umlflags, 1, 32, 1); + + // add UML symbols- + m_drcuml->symbol_add(&m_global_regs[0], sizeof(uint32_t), "pc"); + m_drcuml->symbol_add(&m_global_regs[1], sizeof(uint32_t), "sr"); + m_drcuml->symbol_add(&m_icount, sizeof(m_icount), "icount"); + + char buf[4]; + for (int i=0; i < 32; i++) + { + sprintf(buf, "g%d", i); + m_drcuml->symbol_add(&m_global_regs[i], sizeof(uint32_t), buf); + } + + for (int i=0; i < 64; i++) + { + sprintf(buf, "l%d", i); + m_drcuml->symbol_add(&m_global_regs[i], sizeof(uint32_t), buf); + } + + m_drcuml->symbol_add(&m_drc_arg0, sizeof(uint32_t), "arg0"); + m_drcuml->symbol_add(&m_drc_arg1, sizeof(uint32_t), "arg1"); + m_drcuml->symbol_add(&m_drc_arg2, sizeof(uint32_t), "arg2"); + m_drcuml->symbol_add(&m_drc_arg3, sizeof(uint32_t), "arg3"); + + /* initialize the front-end helper */ + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); + + /* mark the cache dirty so it is updated on next execute */ + m_cache_dirty = true; + // register our state for the debugger state_add(STATE_GENPC, "GENPC", m_global_regs[0]).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_global_regs[0]).noshow(); @@ -1299,6 +1354,14 @@ void hyperstone_device::device_reset() void hyperstone_device::device_stop() { + if (m_drcfe != nullptr) + { + m_drcfe = nullptr; + } + if (m_drcuml != nullptr) + { + m_drcuml = nullptr; + } } @@ -1499,6 +1562,12 @@ void hyperstone_device::hyperstone_do() void hyperstone_device::execute_run() { + if (m_enable_drc) + { + execute_run_drc(); + return; + } + if (m_intblock < 0) m_intblock = 0; @@ -1741,34 +1810,34 @@ void hyperstone_device::execute_run() case 0xdd: hyperstone_stwp(); break; case 0xde: hyperstone_stdp(); break; case 0xdf: hyperstone_stdp(); break; - case 0xe0: hyperstone_dbv(); break; - case 0xe1: hyperstone_dbnv(); break; - case 0xe2: hyperstone_dbe(); break; - case 0xe3: hyperstone_dbne(); break; - case 0xe4: hyperstone_dbc(); break; - case 0xe5: hyperstone_dbnc(); break; - case 0xe6: hyperstone_dbse(); break; - case 0xe7: hyperstone_dbht(); break; - case 0xe8: hyperstone_dbn(); break; - case 0xe9: hyperstone_dbnn(); break; - case 0xea: hyperstone_dble(); break; - case 0xeb: hyperstone_dbgt(); break; + case 0xe0: hyperstone_db(); break; + case 0xe1: hyperstone_db(); break; + case 0xe2: hyperstone_db(); break; + case 0xe3: hyperstone_db(); break; + case 0xe4: hyperstone_db(); break; + case 0xe5: hyperstone_db(); break; + case 0xe6: hyperstone_db(); break; + case 0xe7: hyperstone_db(); break; + case 0xe8: hyperstone_db(); break; + case 0xe9: hyperstone_db(); break; + case 0xea: hyperstone_db(); break; + case 0xeb: hyperstone_db(); break; case 0xec: hyperstone_dbr(); break; case 0xed: hyperstone_frame(); break; case 0xee: hyperstone_call_global(); break; case 0xef: hyperstone_call_local(); break; - case 0xf0: hyperstone_bv(); break; - case 0xf1: hyperstone_bnv(); break; - case 0xf2: hyperstone_be(); break; - case 0xf3: hyperstone_bne(); break; - case 0xf4: hyperstone_bc(); break; - case 0xf5: hyperstone_bnc(); break; - case 0xf6: hyperstone_bse(); break; - case 0xf7: hyperstone_bht(); break; - case 0xf8: hyperstone_bn(); break; - case 0xf9: hyperstone_bnn(); break; - case 0xfa: hyperstone_ble(); break; - case 0xfb: hyperstone_bgt(); break; + case 0xf0: hyperstone_b(); break; + case 0xf1: hyperstone_b(); break; + case 0xf2: hyperstone_b(); break; + case 0xf3: hyperstone_b(); break; + case 0xf4: hyperstone_b(); break; + case 0xf5: hyperstone_b(); break; + case 0xf6: hyperstone_b(); break; + case 0xf7: hyperstone_b(); break; + case 0xf8: hyperstone_b(); break; + case 0xf9: hyperstone_b(); break; + case 0xfa: hyperstone_b(); break; + case 0xfb: hyperstone_b(); break; case 0xfc: execute_br(); break; case 0xfd: hyperstone_trap(); break; case 0xfe: hyperstone_trap(); break; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 81575c4f0cf..8328215c475 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -5,6 +5,9 @@ #pragma once +#include "cpu/drcfe.h" +#include "cpu/drcuml.h" +#include "cpu/drcumlsh.h" /* A note about clock multipliers and dividers: @@ -22,17 +25,46 @@ -/* Functions */ +/*************************************************************************** + CONSTANTS +***************************************************************************/ + +/* map variables */ +#define MAPVAR_PC M0 +#define MAPVAR_CYCLES M1 + +/* compilation boundaries -- how far back/forward does the analysis extend? */ +#define COMPILE_BACKWARDS_BYTES 128 +#define COMPILE_FORWARDS_BYTES 512 +#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4)) +#define COMPILE_MAX_SEQUENCE 64 + +/* exit codes */ +#define EXECUTE_OUT_OF_CYCLES 0 +#define EXECUTE_MISSING_CODE 1 +#define EXECUTE_UNMAPPED_CODE 2 +#define EXECUTE_RESET_CACHE 3 + +#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */ + +#define SINGLE_INSTRUCTION_MODE (1) //************************************************************************** // TYPE DEFINITIONS //************************************************************************** +class e132xs_frontend; + // ======================> hyperstone_device // Used by core CPU interface class hyperstone_device : public cpu_device { + friend class e132xs_frontend; + +public: + inline void ccfunc_unimplemented(); + protected: enum { @@ -114,6 +146,28 @@ protected: IS_SIGNED = 1 }; + enum branch_condition + { + COND_V = 0, + COND_Z = 1, + COND_C = 2, + COND_CZ = 3, + COND_N = 4, + COND_NZ = 5 + }; + + enum condition_set + { + IS_CLEAR = 0, + IS_SET = 1 + }; + + enum + { + EXCEPTION_INTERRUPT = 0, + EXCEPTION_COUNT + }; + // construction/destruction hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map); @@ -183,6 +237,8 @@ protected: uint8_t m_fl_lut[16]; + uint32_t get_trap_addr(uint8_t trapno); + private: // internal functions void check_interrupts(); @@ -192,7 +248,6 @@ private: uint32_t get_global_register(uint8_t code); - uint32_t get_trap_addr(uint8_t trapno); uint32_t get_emu_code_addr(uint8_t num); void hyperstone_set_trap_entry(int which); uint32_t compute_tr(); @@ -276,37 +331,14 @@ private: template void hyperstone_stwp(); template void hyperstone_stdp(); - void hyperstone_dbv(); - void hyperstone_dbnv(); - void hyperstone_dbe(); - void hyperstone_dbne(); - void hyperstone_dbc(); - void hyperstone_dbnc(); - void hyperstone_dbse(); - void hyperstone_dbht(); - void hyperstone_dbn(); - void hyperstone_dbnn(); - void hyperstone_dble(); - void hyperstone_dbgt(); + template void hyperstone_b(); + template void hyperstone_db(); void hyperstone_dbr(); void hyperstone_frame(); void hyperstone_call_global(); void hyperstone_call_local(); - void hyperstone_bv(); - void hyperstone_bnv(); - void hyperstone_be(); - void hyperstone_bne(); - void hyperstone_bc(); - void hyperstone_bnc(); - void hyperstone_bse(); - void hyperstone_bht(); - void hyperstone_bn(); - void hyperstone_bnn(); - void hyperstone_ble(); - void hyperstone_bgt(); - void hyperstone_trap(); void hyperstone_extend(); @@ -316,152 +348,185 @@ private: int32_t decode_pcrel(); void ignore_pcrel(); -#if 0 + drc_cache m_cache; + std::unique_ptr m_drcuml; + std::unique_ptr m_drcfe; + uint32_t m_drcoptions; + uint8_t m_cache_dirty; + + uml::parameter m_regmap[16]; + + uml::code_handle *m_entry; + uml::code_handle *m_nocode; + uml::code_handle *m_out_of_cycles; + + uint32_t m_drc_arg0; + uint32_t m_drc_arg1; + uint32_t m_drc_arg2; + uint32_t m_drc_arg3; + + uml::code_handle *m_mem_read8; + uml::code_handle *m_mem_write8; + uml::code_handle *m_mem_read16; + uml::code_handle *m_mem_write16; + uml::code_handle *m_mem_read32; + uml::code_handle *m_mem_write32; + uml::code_handle *m_io_read32; + uml::code_handle *m_io_write32; + uml::code_handle *m_exception[EXCEPTION_COUNT]; + + bool m_enable_drc; + + /* internal compiler state */ + struct compiler_state + { + uint32_t m_cycles; /* accumulated cycles */ + uint8_t m_checkints; /* need to check interrupts before next instruction */ + uml::code_label m_labelnum; /* index for local labels */ + }; + void execute_run_drc(); void flush_drc_cache(); void code_flush_cache(); void code_compile_block(offs_t pc); - inline void ccfunc_unimplemented(); + //void load_fast_iregs(drcuml_block *block); + //void save_fast_iregs(drcuml_block *block); void static_generate_entry_point(); void static_generate_nocode_handler(); void static_generate_out_of_cycles(); - void static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr); + void static_generate_exception(uint8_t exception, const char *name); + void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr); void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif - -#if 0 - void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); -#endif + + void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); }; // device type definition @@ -662,4 +727,5 @@ protected: virtual void device_start() override; }; + #endif // MAME_CPU_E132XS_E132XS_H diff --git a/src/devices/cpu/e132xs/e132xsdefs.h b/src/devices/cpu/e132xs/e132xsdefs.h new file mode 100644 index 00000000000..95a0274ed3a --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdefs.h @@ -0,0 +1,79 @@ +/* Memory access */ +/* read byte */ +#define READ_B(addr) m_program->read_byte((addr)) +/* read half-word */ +#define READ_HW(addr) m_program->read_word((addr) & ~1) +/* read word */ +#define READ_W(addr) m_program->read_dword((addr) & ~3) + +/* write byte */ +#define WRITE_B(addr, data) m_program->write_byte(addr, data) +/* write half-word */ +#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data) +/* write word */ +#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data) + + +/* I/O access */ +/* read word */ +#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc) +/* write word */ +#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data) + + +#define READ_OP(addr) m_direct->read_word((addr), m_opcodexor) + +// set C in adds/addsi/subs/sums +#define SETCARRYS 0 +#define MISSIONCRAFT_FLAGS 1 + +/* Registers */ + +/* Internal registers */ + +#define SREG decode.src_value +#define SREGF decode.next_src_value +#define DREG decode.dst_value +#define DREGF decode.next_dst_value +#define EXTRA_U decode.extra.u +#define EXTRA_S decode.extra.s + +#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_)) +#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_)) +#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_)) +#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_)) + +#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER) +#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER) +#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER) +#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER) +#define SAME_SRC_DST decode.same_src_dst +#define SAME_SRC_DSTF decode.same_src_dstf +#define SAME_SRCF_DST decode.same_srcf_dst + + +/* Memory access */ +/* read byte */ +#define READ_B(addr) m_program->read_byte((addr)) +/* read half-word */ +#define READ_HW(addr) m_program->read_word((addr) & ~1) +/* read word */ +#define READ_W(addr) m_program->read_dword((addr) & ~3) + +/* write byte */ +#define WRITE_B(addr, data) m_program->write_byte(addr, data) +/* write half-word */ +#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data) +/* write word */ +#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data) + + +/* I/O access */ +/* read word */ +#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc) +/* write word */ +#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data) + + +#define READ_OP(addr) m_direct->read_word((addr), m_opcodexor) + diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp new file mode 100644 index 00000000000..9e0d7e9ef15 --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -0,0 +1,781 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz + +#include "e132xs.h" +#include "e132xsfe.h" +#include "32xsdefs.h" + +using namespace uml; + +void hyperstone_device::execute_run_drc() +{ + drcuml_state *drcuml = m_drcuml.get(); + int execute_result; + + /* reset the cache if dirty */ + if (m_cache_dirty) + { + code_flush_cache(); + m_cache_dirty = false; + } + + /* execute */ + do + { + /* run as much as we can */ + execute_result = drcuml->execute(*m_entry); + + /* if we need to recompile, do it */ + if (execute_result == EXECUTE_MISSING_CODE) + { + code_compile_block(m_global_regs[0]); + } + else if (execute_result == EXECUTE_UNMAPPED_CODE) + { + fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_global_regs[0]); + } + else if (execute_result == EXECUTE_RESET_CACHE) + { + code_flush_cache(); + } + } while (execute_result != EXECUTE_OUT_OF_CYCLES); +} + +/*************************************************************************** + CACHE MANAGEMENT +***************************************************************************/ + +/*------------------------------------------------- + flush_drc_cache - outward-facing accessor to + code_flush_cache +-------------------------------------------------*/ + +void hyperstone_device::flush_drc_cache() +{ + if (!m_enable_drc) + return; + m_cache_dirty = true; +} + +/*------------------------------------------------- + code_flush_cache - flush the cache and + regenerate static code +-------------------------------------------------*/ + +void hyperstone_device::code_flush_cache() +{ + /* empty the transient cache contents */ + m_drcuml->reset(); + + try + { + /* generate the entry point and out-of-cycles handlers */ + static_generate_entry_point(); + static_generate_nocode_handler(); + static_generate_out_of_cycles(); + + /* add subroutines for memory accesses */ + static_generate_memory_accessor(1, false, false, "read8", m_mem_read8); + static_generate_memory_accessor(1, true, false, "write8", m_mem_write8); + static_generate_memory_accessor(2, false, false, "read16", m_mem_read16); + static_generate_memory_accessor(2, true, false, "write16", m_mem_write16); + static_generate_memory_accessor(4, false, false, "read32", m_mem_read32); + static_generate_memory_accessor(4, true, false, "write32", m_mem_write32); + static_generate_memory_accessor(4, false, true, "ioread32", m_io_read32); + static_generate_memory_accessor(4, true, true, "iowrite32", m_io_write32); + } + + catch (drcuml_block::abort_compilation &) + { + fatalerror("Unable to generate static E132XS code\n"); + } +} + +/*------------------------------------------------- + code_compile_block - compile a block of the + given mode at the specified pc +-------------------------------------------------*/ + +void hyperstone_device::code_compile_block(offs_t pc) +{ + drcuml_state *drcuml = m_drcuml.get(); + compiler_state compiler = { 0 }; + const opcode_desc *seqhead, *seqlast; + const opcode_desc *desclist; + int override = false; + drcuml_block *block; + + g_profiler.start(PROFILER_DRC_COMPILE); + + /* get a description of this sequence */ + desclist = m_drcfe->describe_code(pc); + + bool succeeded = false; + while (!succeeded) + { + try + { + /* start the block */ + block = drcuml->begin_block(4096); + + /* loop until we get through all instruction sequences */ + for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) + { + const opcode_desc *curdesc; + uint32_t nextpc; + + /* add a code log entry */ + if (drcuml->logging()) + block->append_comment("-------------------------"); // comment + + /* determine the last instruction in this sequence */ + for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) + if (seqlast->flags & OPFLAG_END_SEQUENCE) + break; + assert(seqlast != nullptr); + + /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ + if (override || !drcuml->hash_exists(0, seqhead->pc)) + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + + /* if we already have a hash, and this is the first sequence, assume that we */ + /* are recompiling due to being out of sync and allow future overrides */ + else if (seqhead == desclist) + { + override = true; + UML_HASH(block, 0, seqhead->pc); // hash mode,pc + } + + /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ + else + { + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); + // hashjmp <0>,seqhead->pc,nocode + continue; + } + + /* validate this code block if we're not pointing into ROM */ + if (m_program->get_write_ptr(seqhead->physpc) != nullptr) + generate_checksum_block(block, &compiler, seqhead, seqlast); + + /* label this instruction, if it may be jumped to locally */ + if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + + /* iterate over instructions in the sequence and compile them */ + for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) + generate_sequence_instruction(block, &compiler, curdesc); + + /* if we need to return to the start, do it */ + if (seqlast->flags & OPFLAG_RETURN_TO_START) + nextpc = pc; + + /* otherwise we just go to the next instruction */ + else + nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4; + + /* count off cycles and go there */ + generate_update_cycles(block, &compiler, nextpc, true); // + + /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ + if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) + UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp ,nextpc,nocode + } + + /* end the sequence */ + block->end(); + g_profiler.stop(); + succeeded = true; + } + catch (drcuml_block::abort_compilation &) + { + code_flush_cache(); + } + } +} + +/*************************************************************************** + C FUNCTION CALLBACKS +***************************************************************************/ + +/*------------------------------------------------- + cfunc_unimplemented - handler for + unimplemented opcdes +-------------------------------------------------*/ + +inline void hyperstone_device::ccfunc_unimplemented() +{ + fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); +} + +static void cfunc_unimplemented(void *param) +{ + ((hyperstone_device *)param)->ccfunc_unimplemented(); +} + +/*************************************************************************** + STATIC CODEGEN +***************************************************************************/ + +/*------------------------------------------------- + epc - compute the exception PC from a + descriptor +-------------------------------------------------*/ + +static inline uint32_t epc(const opcode_desc *desc) +{ + return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc; +} + + +/*------------------------------------------------- + alloc_handle - allocate a handle if not + already allocated +-------------------------------------------------*/ + +static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) +{ + if (*handleptr == nullptr) + *handleptr = drcuml->handle_alloc(name); +} + + +/*------------------------------------------------- + generate_entry_point - generate a + static entry point +-------------------------------------------------*/ + +void hyperstone_device::static_generate_entry_point() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(20); + + /* forward references */ + alloc_handle(drcuml, &m_nocode, "nocode"); + + alloc_handle(drcuml, &m_entry, "entry"); + UML_HANDLE(block, *m_entry); + + /* load fast integer registers */ + //load_fast_iregs(block); + + /* generate a hash jump via the current mode and PC */ + UML_HASHJMP(block, 0, mem(&m_global_regs[0]), *m_nocode); + block->end(); +} + + +/*------------------------------------------------- + static_generate_nocode_handler - generate an + exception handler for "out of code" +-------------------------------------------------*/ + +void hyperstone_device::static_generate_nocode_handler() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(drcuml, &m_nocode, "nocode"); + UML_HANDLE(block, *m_nocode); + UML_GETEXP(block, I0); + UML_MOV(block, mem(&PC), I0); + //save_fast_iregs(block); + UML_EXIT(block, EXECUTE_MISSING_CODE); + + block->end(); +} + + +/*------------------------------------------------- + static_generate_out_of_cycles - generate an + out of cycles exception handler +-------------------------------------------------*/ + +void hyperstone_device::static_generate_out_of_cycles() +{ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(10); + + /* generate a hash jump via the current mode and PC */ + alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles"); + UML_HANDLE(block, *m_out_of_cycles); + UML_GETEXP(block, I0); + UML_MOV(block, mem(&m_global_regs[0]), I0); + //save_fast_iregs(block); + UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); + + block->end(); +} + +/*------------------------------------------------------------------ + static_generate_memory_accessor +------------------------------------------------------------------*/ + +void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, code_handle *&handleptr) +{ + /* on entry, address is in I0; data for writes is in I1 */ + /* on exit, read result is in I0 */ + /* routine trashes I0-I1 */ + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block; + + /* begin generating */ + block = drcuml->begin_block(1024); + + /* add a global entry for this */ + alloc_handle(drcuml, &handleptr, name); + UML_HANDLE(block, *handleptr); + + // write: + switch (size) + { + case 1: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); + else + UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); + break; + + case 2: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); + else + UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); + break; + + case 4: + if (iswrite) + UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); + else + UML_READ(block, I0, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); + break; + } + UML_RET(block); + + block->end(); +} + + + +/*************************************************************************** + CODE GENERATION +***************************************************************************/ + +/*------------------------------------------------- + generate_update_cycles - generate code to + subtract cycles from the icount and generate + an exception if out +-------------------------------------------------*/ + +void hyperstone_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) +{ + /* account for cycles */ + if (compiler->m_cycles > 0) + { + UML_SUB(block, mem(&m_icount), mem(&m_icount), MAPVAR_CYCLES); + UML_MAPVAR(block, MAPVAR_CYCLES, 0); + UML_EXHc(block, COND_S, *m_out_of_cycles, param); + } + compiler->m_cycles = 0; +} + +/*------------------------------------------------- + generate_checksum_block - generate code to + validate a sequence of opcodes +-------------------------------------------------*/ + +void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) +{ + const opcode_desc *curdesc; + if (m_drcuml->logging()) + { + block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); + } + /* loose verify or single instruction: just compare and fail */ + if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr) + { + if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + { + uint32_t sum = seqhead->opptr.l[0]; + void *base = m_direct->read_ptr(seqhead->physpc | 0x1000); + UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); + + if (seqhead->delay.first() != nullptr && seqhead->physpc != seqhead->delay.first()->physpc) + { + base = m_direct->read_ptr(seqhead->delay.first()->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, I1); + + sum += seqhead->delay.first()->opptr.l[0]; + } + + UML_CMP(block, I0, sum); + UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + } + } + else /* full verification; sum up everything */ + { + void *base = m_direct->read_ptr(seqhead->physpc); + UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); + uint32_t sum = seqhead->opptr.l[0]; + for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) + if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + base = m_direct->read_ptr(curdesc->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, I1); + sum += curdesc->opptr.l[0]; + + if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + { + base = m_direct->read_ptr(curdesc->delay.first()->physpc); + assert(base != nullptr); + UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, I1); + + sum += curdesc->delay.first()->opptr.l[0]; + } + } + UML_CMP(block, I0, sum); + UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + } +} + + +/*------------------------------------------------- + log_add_disasm_comment - add a comment + including disassembly of a MIPS instruction +-------------------------------------------------*/ + +void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op) +{ + if (m_drcuml->logging()) + { + block->append_comment("%08X: %08x", pc, op); + } +} + + +/*------------------------------------------------- + generate_sequence_instruction - generate code + for a single instruction in a sequence +-------------------------------------------------*/ + +void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + offs_t expc; + + /* add an entry for the log */ + if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) + log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + + /* set the PC map variable */ + expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc; + UML_MAPVAR(block, MAPVAR_PC, expc); + + /* accumulate total cycles */ + compiler->m_cycles += desc->cycles; + + /* update the icount map variable */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); + + /* if we are debugging, call the debugger */ + if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) + { + UML_MOV(block, mem(&PC), desc->pc); + //save_fast_iregs(block); + UML_DEBUG(block, desc->pc); + } + + if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + { + /* compile the instruction */ + if (!generate_opcode(block, compiler, desc)) + { + UML_MOV(block, mem(&PC), desc->pc); + UML_MOV(block, mem(&m_drc_arg0), desc->opptr.l[0]); + UML_CALLC(block, cfunc_unimplemented, this); + } + } +} + +bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint32_t op = desc->opptr.l[0]; + uint8_t opswitch = (op & 0x0000ff00) >> 8; + code_label skip; + + switch (opswitch) + { + case 0x00: generate_op00(block, compiler, desc); break; + case 0x01: generate_op01(block, compiler, desc); break; + case 0x02: generate_op02(block, compiler, desc); break; + case 0x03: generate_op03(block, compiler, desc); break; + case 0x04: generate_op04(block, compiler, desc); break; + case 0x05: generate_op05(block, compiler, desc); break; + case 0x06: generate_op06(block, compiler, desc); break; + case 0x07: generate_op07(block, compiler, desc); break; + case 0x08: generate_op08(block, compiler, desc); break; + case 0x09: generate_op09(block, compiler, desc); break; + case 0x0a: generate_op0a(block, compiler, desc); break; + case 0x0b: generate_op0b(block, compiler, desc); break; + case 0x0c: generate_op0c(block, compiler, desc); break; + case 0x0d: generate_op0d(block, compiler, desc); break; + case 0x0e: generate_op0e(block, compiler, desc); break; + case 0x0f: generate_op0f(block, compiler, desc); break; + case 0x10: generate_op10(block, compiler, desc); break; + case 0x11: generate_op11(block, compiler, desc); break; + case 0x12: generate_op12(block, compiler, desc); break; + case 0x13: generate_op13(block, compiler, desc); break; + case 0x14: generate_op14(block, compiler, desc); break; + case 0x15: generate_op15(block, compiler, desc); break; + case 0x16: generate_op16(block, compiler, desc); break; + case 0x17: generate_op17(block, compiler, desc); break; + case 0x18: generate_op18(block, compiler, desc); break; + case 0x19: generate_op19(block, compiler, desc); break; + case 0x1a: generate_op1a(block, compiler, desc); break; + case 0x1b: generate_op1b(block, compiler, desc); break; + case 0x1c: generate_op1c(block, compiler, desc); break; + case 0x1d: generate_op1d(block, compiler, desc); break; + case 0x1e: generate_op1e(block, compiler, desc); break; + case 0x1f: generate_op1f(block, compiler, desc); break; + case 0x20: generate_op20(block, compiler, desc); break; + case 0x21: generate_op21(block, compiler, desc); break; + case 0x22: generate_op22(block, compiler, desc); break; + case 0x23: generate_op23(block, compiler, desc); break; + case 0x24: generate_op24(block, compiler, desc); break; + case 0x25: generate_op25(block, compiler, desc); break; + case 0x26: generate_op26(block, compiler, desc); break; + case 0x27: generate_op27(block, compiler, desc); break; + case 0x28: generate_op28(block, compiler, desc); break; + case 0x29: generate_op29(block, compiler, desc); break; + case 0x2a: generate_op2a(block, compiler, desc); break; + case 0x2b: generate_op2b(block, compiler, desc); break; + case 0x2c: generate_op2c(block, compiler, desc); break; + case 0x2d: generate_op2d(block, compiler, desc); break; + case 0x2e: generate_op2e(block, compiler, desc); break; + case 0x2f: generate_op2f(block, compiler, desc); break; + case 0x30: generate_op30(block, compiler, desc); break; + case 0x31: generate_op31(block, compiler, desc); break; + case 0x32: generate_op32(block, compiler, desc); break; + case 0x33: generate_op33(block, compiler, desc); break; + case 0x34: generate_op34(block, compiler, desc); break; + case 0x35: generate_op35(block, compiler, desc); break; + case 0x36: generate_op36(block, compiler, desc); break; + case 0x37: generate_op37(block, compiler, desc); break; + case 0x38: generate_op38(block, compiler, desc); break; + case 0x39: generate_op39(block, compiler, desc); break; + case 0x3a: generate_op3a(block, compiler, desc); break; + case 0x3b: generate_op3b(block, compiler, desc); break; + case 0x3c: generate_op3c(block, compiler, desc); break; + case 0x3d: generate_op3d(block, compiler, desc); break; + case 0x3e: generate_op3e(block, compiler, desc); break; + case 0x3f: generate_op3f(block, compiler, desc); break; + case 0x40: generate_op40(block, compiler, desc); break; + case 0x41: generate_op41(block, compiler, desc); break; + case 0x42: generate_op42(block, compiler, desc); break; + case 0x43: generate_op43(block, compiler, desc); break; + case 0x44: generate_op44(block, compiler, desc); break; + case 0x45: generate_op45(block, compiler, desc); break; + case 0x46: generate_op46(block, compiler, desc); break; + case 0x47: generate_op47(block, compiler, desc); break; + case 0x48: generate_op48(block, compiler, desc); break; + case 0x49: generate_op49(block, compiler, desc); break; + case 0x4a: generate_op4a(block, compiler, desc); break; + case 0x4b: generate_op4b(block, compiler, desc); break; + case 0x4c: generate_op4c(block, compiler, desc); break; + case 0x4d: generate_op4d(block, compiler, desc); break; + case 0x4e: generate_op4e(block, compiler, desc); break; + case 0x4f: generate_op4f(block, compiler, desc); break; + case 0x50: generate_op50(block, compiler, desc); break; + case 0x51: generate_op51(block, compiler, desc); break; + case 0x52: generate_op52(block, compiler, desc); break; + case 0x53: generate_op53(block, compiler, desc); break; + case 0x54: generate_op54(block, compiler, desc); break; + case 0x55: generate_op55(block, compiler, desc); break; + case 0x56: generate_op56(block, compiler, desc); break; + case 0x57: generate_op57(block, compiler, desc); break; + case 0x58: generate_op58(block, compiler, desc); break; + case 0x59: generate_op59(block, compiler, desc); break; + case 0x5a: generate_op5a(block, compiler, desc); break; + case 0x5b: generate_op5b(block, compiler, desc); break; + case 0x5c: generate_op5c(block, compiler, desc); break; + case 0x5d: generate_op5d(block, compiler, desc); break; + case 0x5e: generate_op5e(block, compiler, desc); break; + case 0x5f: generate_op5f(block, compiler, desc); break; + case 0x60: generate_op60(block, compiler, desc); break; + case 0x61: generate_op61(block, compiler, desc); break; + case 0x62: generate_op62(block, compiler, desc); break; + case 0x63: generate_op63(block, compiler, desc); break; + case 0x64: generate_op64(block, compiler, desc); break; + case 0x65: generate_op65(block, compiler, desc); break; + case 0x66: generate_op66(block, compiler, desc); break; + case 0x67: generate_op67(block, compiler, desc); break; + case 0x68: generate_op68(block, compiler, desc); break; + case 0x69: generate_op69(block, compiler, desc); break; + case 0x6a: generate_op6a(block, compiler, desc); break; + case 0x6b: generate_op6b(block, compiler, desc); break; + case 0x6c: generate_op6c(block, compiler, desc); break; + case 0x6d: generate_op6d(block, compiler, desc); break; + case 0x6e: generate_op6e(block, compiler, desc); break; + case 0x6f: generate_op6f(block, compiler, desc); break; + case 0x70: generate_op70(block, compiler, desc); break; + case 0x71: generate_op71(block, compiler, desc); break; + case 0x72: generate_op72(block, compiler, desc); break; + case 0x73: generate_op73(block, compiler, desc); break; + case 0x74: generate_op74(block, compiler, desc); break; + case 0x75: generate_op75(block, compiler, desc); break; + case 0x76: generate_op76(block, compiler, desc); break; + case 0x77: generate_op77(block, compiler, desc); break; + case 0x78: generate_op78(block, compiler, desc); break; + case 0x79: generate_op79(block, compiler, desc); break; + case 0x7a: generate_op7a(block, compiler, desc); break; + case 0x7b: generate_op7b(block, compiler, desc); break; + case 0x7c: generate_op7c(block, compiler, desc); break; + case 0x7d: generate_op7d(block, compiler, desc); break; + case 0x7e: generate_op7e(block, compiler, desc); break; + case 0x7f: generate_op7f(block, compiler, desc); break; + case 0x80: generate_op80(block, compiler, desc); break; + case 0x81: generate_op81(block, compiler, desc); break; + case 0x82: generate_op82(block, compiler, desc); break; + case 0x83: generate_op83(block, compiler, desc); break; + case 0x84: generate_op84(block, compiler, desc); break; + case 0x85: generate_op85(block, compiler, desc); break; + case 0x86: generate_op86(block, compiler, desc); break; + case 0x87: generate_op87(block, compiler, desc); break; + case 0x88: generate_op88(block, compiler, desc); break; + case 0x89: generate_op89(block, compiler, desc); break; + case 0x8a: generate_op8a(block, compiler, desc); break; + case 0x8b: generate_op8b(block, compiler, desc); break; + case 0x8c: + case 0x8d: return false; + case 0x8e: generate_op8e(block, compiler, desc); break; + case 0x8f: generate_op8f(block, compiler, desc); break; + case 0x90: generate_op90(block, compiler, desc); break; + case 0x91: generate_op91(block, compiler, desc); break; + case 0x92: generate_op92(block, compiler, desc); break; + case 0x93: generate_op93(block, compiler, desc); break; + case 0x94: generate_op94(block, compiler, desc); break; + case 0x95: generate_op95(block, compiler, desc); break; + case 0x96: generate_op96(block, compiler, desc); break; + case 0x97: generate_op97(block, compiler, desc); break; + case 0x98: generate_op98(block, compiler, desc); break; + case 0x99: generate_op99(block, compiler, desc); break; + case 0x9a: generate_op9a(block, compiler, desc); break; + case 0x9b: generate_op9b(block, compiler, desc); break; + case 0x9c: generate_op9c(block, compiler, desc); break; + case 0x9d: generate_op9d(block, compiler, desc); break; + case 0x9e: generate_op9e(block, compiler, desc); break; + case 0x9f: generate_op9f(block, compiler, desc); break; + case 0xa0: generate_opa0(block, compiler, desc); break; + case 0xa1: generate_opa1(block, compiler, desc); break; + case 0xa2: generate_opa2(block, compiler, desc); break; + case 0xa3: generate_opa3(block, compiler, desc); break; + case 0xa4: generate_opa4(block, compiler, desc); break; + case 0xa5: generate_opa5(block, compiler, desc); break; + case 0xa6: generate_opa6(block, compiler, desc); break; + case 0xa7: generate_opa7(block, compiler, desc); break; + case 0xa8: generate_opa8(block, compiler, desc); break; + case 0xa9: generate_opa9(block, compiler, desc); break; + case 0xaa: generate_opaa(block, compiler, desc); break; + case 0xab: generate_opab(block, compiler, desc); break; + case 0xac: + case 0xad: + case 0xae: + case 0xaf: return false; + case 0xb0: generate_opb0(block, compiler, desc); break; + case 0xb1: generate_opb1(block, compiler, desc); break; + case 0xb2: generate_opb2(block, compiler, desc); break; + case 0xb3: generate_opb3(block, compiler, desc); break; + case 0xb4: generate_opb4(block, compiler, desc); break; + case 0xb5: generate_opb5(block, compiler, desc); break; + case 0xb6: generate_opb6(block, compiler, desc); break; + case 0xb7: generate_opb7(block, compiler, desc); break; + case 0xb8: generate_opb8(block, compiler, desc); break; + case 0xb9: generate_opb9(block, compiler, desc); break; + case 0xba: generate_opba(block, compiler, desc); break; + case 0xbb: generate_opbb(block, compiler, desc); break; + case 0xbc: generate_opbc(block, compiler, desc); break; + case 0xbd: generate_opbd(block, compiler, desc); break; + case 0xbe: generate_opbe(block, compiler, desc); break; + case 0xbf: generate_opbf(block, compiler, desc); break; + case 0xc0: generate_opc0(block, compiler, desc); break; + case 0xc1: generate_opc1(block, compiler, desc); break; + case 0xc2: generate_opc2(block, compiler, desc); break; + case 0xc3: generate_opc3(block, compiler, desc); break; + case 0xc4: generate_opc4(block, compiler, desc); break; + case 0xc5: generate_opc5(block, compiler, desc); break; + case 0xc6: generate_opc6(block, compiler, desc); break; + case 0xc7: generate_opc7(block, compiler, desc); break; + case 0xc8: generate_opc8(block, compiler, desc); break; + case 0xc9: generate_opc9(block, compiler, desc); break; + case 0xca: generate_opca(block, compiler, desc); break; + case 0xcb: generate_opcb(block, compiler, desc); break; + case 0xcc: generate_opcc(block, compiler, desc); break; + case 0xcd: generate_opcd(block, compiler, desc); break; + case 0xce: generate_opce(block, compiler, desc); break; + case 0xcf: generate_opcf(block, compiler, desc); break; + case 0xd0: generate_opd0(block, compiler, desc); break; + case 0xd1: generate_opd1(block, compiler, desc); break; + case 0xd2: generate_opd2(block, compiler, desc); break; + case 0xd3: generate_opd3(block, compiler, desc); break; + case 0xd4: generate_opd4(block, compiler, desc); break; + case 0xd5: generate_opd5(block, compiler, desc); break; + case 0xd6: generate_opd6(block, compiler, desc); break; + case 0xd7: generate_opd7(block, compiler, desc); break; + case 0xd8: generate_opd8(block, compiler, desc); break; + case 0xd9: generate_opd9(block, compiler, desc); break; + case 0xda: generate_opda(block, compiler, desc); break; + case 0xdb: generate_opdb(block, compiler, desc); break; + case 0xdc: generate_opdc(block, compiler, desc); break; + case 0xdd: generate_opdd(block, compiler, desc); break; + case 0xde: generate_opde(block, compiler, desc); break; + case 0xdf: generate_opdf(block, compiler, desc); break; + case 0xe0: generate_ope0(block, compiler, desc); break; + case 0xe1: generate_ope1(block, compiler, desc); break; + case 0xe2: generate_ope2(block, compiler, desc); break; + case 0xe3: generate_ope3(block, compiler, desc); break; + case 0xe4: generate_ope4(block, compiler, desc); break; + case 0xe5: generate_ope5(block, compiler, desc); break; + case 0xe6: generate_ope6(block, compiler, desc); break; + case 0xe7: generate_ope7(block, compiler, desc); break; + case 0xe8: generate_ope8(block, compiler, desc); break; + case 0xe9: generate_ope9(block, compiler, desc); break; + case 0xea: generate_opea(block, compiler, desc); break; + case 0xeb: generate_opeb(block, compiler, desc); break; + case 0xec: generate_opec(block, compiler, desc); break; + case 0xed: generate_oped(block, compiler, desc); break; + case 0xee: generate_opee(block, compiler, desc); break; + case 0xef: generate_opef(block, compiler, desc); break; + case 0xf0: generate_opf0(block, compiler, desc); break; + case 0xf1: generate_opf1(block, compiler, desc); break; + case 0xf2: generate_opf2(block, compiler, desc); break; + case 0xf3: generate_opf3(block, compiler, desc); break; + case 0xf4: generate_opf4(block, compiler, desc); break; + case 0xf5: generate_opf5(block, compiler, desc); break; + case 0xf6: generate_opf6(block, compiler, desc); break; + case 0xf7: generate_opf7(block, compiler, desc); break; + case 0xf8: generate_opf8(block, compiler, desc); break; + case 0xf9: generate_opf9(block, compiler, desc); break; + case 0xfa: generate_opfa(block, compiler, desc); break; + case 0xfb: generate_opfb(block, compiler, desc); break; + case 0xfc: generate_opfc(block, compiler, desc); break; + case 0xfd: generate_opfd(block, compiler, desc); break; + case 0xfe: generate_opfe(block, compiler, desc); break; + case 0xff: generate_opff(block, compiler, desc); break; + } + return true; +} \ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.cpp b/src/devices/cpu/e132xs/e132xsdrc_ops.cpp new file mode 100644 index 00000000000..7c421f5af7a --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.cpp @@ -0,0 +1,1035 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz + +#include "e132xs.h" + +void hyperstone_device::generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + + +void hyperstone_device::generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + + +void hyperstone_device::generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp new file mode 100644 index 00000000000..b0ece09d68f --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -0,0 +1,1198 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + e132xsfe.cpp + + Front end for Hyperstone recompiler + +***************************************************************************/ + +#include "emu.h" +#include "e132xsfe.h" + +#define FE_FP ((m_cpu->m_global_regs[1] & 0xfe000000) >> 25) +#define FE_FL (m_cpu->m_fl_lut[((m_cpu->m_global_regs[1] >> 21) & 0xf)]) +#define DST_CODE ((op & 0xf0) >> 4) +#define SRC_CODE (op & 0x0f) +#define SR_CODE (1 << 1) + +/*************************************************************************** + INSTRUCTION PARSERS +***************************************************************************/ + +e132xs_frontend::e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend(*e132xs, window_start, window_end, max_sequence) + , m_cpu(e132xs) +{ +} + +/*------------------------------------------------- + describe_instruction - build a description + of a single instruction +-------------------------------------------------*/ + +inline uint16_t e132xs_frontend::read_word(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc, m_cpu->m_opcodexor); +} + +inline uint16_t e132xs_frontend::read_imm1(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc + 2, m_cpu->m_opcodexor); +} + +inline uint16_t e132xs_frontend::read_imm2(opcode_desc &desc) +{ + return m_cpu->m_direct->read_word(desc.physpc + 4, m_cpu->m_opcodexor); +} + +inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) +{ + const uint16_t imm1 = read_imm1(desc); + uint32_t extra_s; + if (imm1 & 0x8000) + { + extra_s = read_imm2(desc); + extra_s |= ((imm1 & 0xfff) << 16); + + if (imm1 & 0x4000) + extra_s |= 0xf0000000; + } + else + { + extra_s = imm1 & 0xfff; + + if (imm1 & 0x4000) + extra_s |= 0xfffff000; + } + return extra_s; +} + +inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) +{ + if (op & 0x80) + { + uint16_t next = read_imm1(desc); + + desc.length = 4; + + int32_t offset = (op & 0x7f) << 16; + offset |= (next & 0xfffe); + + if (next & 1) + offset |= 0xff800000; + + return offset; + } + else + { + int32_t offset = op & 0x7e; + if (op & 1) + offset |= 0xffffff80; + return offset; + } +} + +inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) +{ + const uint16_t imm_1 = read_imm1(desc); + int32_t extra_s = 0; + if (imm_1 & 0x8000) + { + desc.length = 6; + extra_s = read_imm2(desc); + extra_s |= ((imm_1 & 0x3fff) << 16); + + if (imm_1 & 0x4000) + extra_s |= 0xc0000000; + } + else + { + desc.length = 4; + extra_s = imm_1 & 0x3fff; + if (imm_1 & 0x4000) + extra_s |= 0xffffc000; + } + return extra_s; +} + +bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + uint16_t op = read_word(desc); + + /* most instructions are 2 bytes and a single cycle */ + desc.length = 2; + desc.cycles = m_cpu->m_clock_cycles_1; + + const uint32_t fp = FE_FP; + const uint32_t gdst_code = DST_CODE; + const uint32_t gdstf_code = gdst_code + 1; + const uint32_t gsrc_code = SRC_CODE; + const uint32_t gsrcf_code = gsrc_code + 1; + const uint32_t ldst_code = (gdst_code + fp) & 0x1f; + const uint32_t ldstf_code = (gdstf_code + fp) & 0x1f; + const uint32_t lsrc_code = (gsrc_code + fp) & 0x1f; + const uint32_t lsrcf_code = (gsrcf_code + fp) & 0x1f; + const uint32_t ldst_group = 1 + (((DST_CODE + fp) & 0x20) >> 5); + const uint32_t ldstf_group = 1 + (((DST_CODE + fp + 1) & 0x20) >> 5); + const uint32_t lsrc_group = 1 + (((SRC_CODE + fp) & 0x20) >> 5); + const uint32_t lsrcf_group = 1 + ((SRC_CODE + fp + 1) >> 5); + + switch (op >> 8) + { + case 0x00: // chk global,global + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x01: // chk global,local + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x02: // chk local,global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x03: // chk local,local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + break; + case 0x04: // movd global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + if (gdst_code == 0) + { + desc.regout[1] = 0xffffffff; + desc.regout[2] = 0xffffffff; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + } + else + { + desc.cycles = m_cpu->m_clock_cycles_2; + } + desc.regout[0] |= SR_CODE; + break; + case 0x05: // movd global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + if (gdst_code == 0) + { + desc.regout[1] = 0xffffffff; + desc.regout[2] = 0xffffffff; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + } + else + { + desc.cycles = m_cpu->m_clock_cycles_2; + } + desc.regout[0] |= SR_CODE; + break; + case 0x06: // movd local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x07: // movd local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x08: // divu global,global + case 0x0c: // divs global,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gdstf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x09: // divu global,local + case 0x0d: // divs global,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gdstf_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x0a: // divu local,global + case 0x0e: // divs local,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[ldstf_group] |= 1 << ldstf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x0b: // divu local,local + case 0x0f: // divs local,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[ldstf_group] |= 1 << ldstf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 36 << m_cpu->m_clck_scale; + break; + case 0x10: // xm global,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x11: // xm global,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x12: // xm local,global + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x13: // xm local,local + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x14: // mask global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x15: // mask global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x16: // mask local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x17: // mask local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x18: // sum global,global + case 0x1c: // sums global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x19: // sum global,local + case 0x1d: // sums global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x1a: // sum local,global + case 0x1e: // sums local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x1b: // sum local,local + case 0x1f: // sums local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x20: // cmp global,global + case 0x30: // cmpb global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x21: // cmp global,local + case 0x31: // cmpb global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x22: // cmp local,global + case 0x32: // cmpb local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x23: // cmp local,local + case 0x33: // cmpb local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x24: // mov global,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << (gsrc_code + 16); + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x25: // mov global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x26: // mov local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << (gsrc_code + 16); + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x27: // mov local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x28: // add global,global + case 0x2c: // adds global,global + case 0x48: // sub global,global + case 0x4c: // subs global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x29: // add global,local + case 0x2d: // adds global,local + case 0x49: // sub global,local + case 0x4d: // subs global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x2a: // add local,global + case 0x2e: // adds local,global + case 0x4a: // sub local,global + case 0x4e: // subs local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x2b: // add local,local + case 0x2f: // adds local,local + case 0x4b: // sub local,local + case 0x4f: // subs local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + break; + case 0x34: // andn global,global + case 0x38: // or global,global + case 0x3c: // xor global,global + case 0x54: // and global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x35: // andn global,local + case 0x39: // or global,local + case 0x3d: // xor global,local + case 0x55: // and global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x36: // andn local,global + case 0x3a: // or local,global + case 0x3e: // xor local,global + case 0x56: // and local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x37: // andn local,local + case 0x3b: // or local,local + case 0x3f: // xor local,local + case 0x57: // and local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x40: // subc global,global + case 0x50: // addc global,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x41: // subc global,local + case 0x51: // addc global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x42: // subc local,global + case 0x52: // addc local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x43: // subc local,local + case 0x53: // addc local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x44: // not global,global + case 0x58: // neg global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x45: // not global,local + case 0x59: // neg global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x46: // not local,global + case 0x5a: // neg local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x47: // not local,local + case 0x5b: // neg local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x5c: // negs global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x5d: // negs global,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x5e: // negs local,global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x5f: // negs local,local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x60: // cmpi global,simm + case 0x70: // cmpbi global,simm + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x61: // cmpi global,limm + case 0x71: // cmpbi global,limm + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x62: // cmpi local,simm + case 0x72: // cmpbi local,simm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x63: // cmpi local,limm + case 0x73: // cmpbi local,limm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x64: // movi global,simm + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << (gdst_code + 16); + desc.regout[0] |= SR_CODE; + break; + case 0x65: // movi global,limm + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << (gdst_code + 16); + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x66: // movi local,simm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x67: // movi local,limm + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x68: // addi global,simm + case 0x6c: // addsi global,simm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x69: // addi global,limm + case 0x6d: // addsi global,limm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x6a: // addi local,simm + case 0x6e: // addsi local,simm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x6b: // addi local,limm + case 0x6f: // addsi local,limm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + break; + case 0x74: // andni global,simm + case 0x78: // ori global,simm + case 0x7c: // xori global,simm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x75: // andni global,limm + case 0x79: // ori global,limm + case 0x7d: // xori global,limm + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x76: // andni local,simm + case 0x7a: // ori local,simm + case 0x7e: // xori local,simm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x77: // andni local,limm + case 0x7b: // ori local,limm + case 0x7f: // xori local,limm + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + break; + case 0x80: case 0x81: // shrdi + case 0x84: case 0x85: // sardi + case 0x88: case 0x89: // shldi + desc.regin[0] |= SR_CODE; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x82: // shrd + case 0x86: // sard + case 0x8a: // shld + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_2; + break; + case 0x83: // shr + case 0x87: // sar + case 0x8b: // shl + case 0x8f: // rol + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0x8c: case 0x8d: // reserved + return false; + case 0x8e: // testlz + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + break; + case 0x90: // ldxx1 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x91: // ldxx1 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x92: // ldxx1 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x93: // ldxx1 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x94: // ldxx2 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x95: // ldxx2 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x96: // ldxx2 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x97: // ldxx2 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_READS_MEMORY; + break; + } + case 0x98: // stxx1 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x99: // stxx1 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9a: // stxx1 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9b: // stxx1 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9c: // stxx2 global,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= 1 << gdst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regout[0] |= 1 << gdst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9d: // stxx2 global,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gdst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[0] |= 1 << gdst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9e: // stxx2 local,global + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0x9f: // stxx2 local,local + { + const uint16_t imm1 = read_imm1(desc); + const uint32_t extra_s = read_ldstxx_imm(desc); + + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; + desc.regout[ldst_group] |= 1 << ldst_code; + + desc.length = (imm1 & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + } + case 0xa0: // shri global (lo n) + case 0xa1: // shri global (hi n) + case 0xa4: // sari global (lo n) + case 0xa5: // sari global (hi n) + case 0xa8: // shli global (lo n) + case 0xa9: // shli global (hi n) + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + break; + case 0xa2: // shri local (lo n) + case 0xa3: // shri local (hi n) + case 0xa6: // sari local (lo n) + case 0xa7: // sari local (hi n) + case 0xaa: // shli local (lo n) + case 0xab: // shli local (hi n) + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + break; + case 0xac: case 0xad: case 0xae: case 0xaf: // reserved + return false; + case 0xb0: // mulu global,global + case 0xb4: // muls global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb1: // mulu global,local + case 0xb5: // muls global,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb2: // mulu local,global + case 0xb6: // muls local,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb3: // mulu local,local + case 0xb7: // muls local,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.regout[0] |= SR_CODE; + desc.cycles = m_cpu->m_clock_cycles_4; + break; + case 0xb8: // set global (lo n) + case 0xb9: // set global (hi n) + desc.regin[0] |= SR_CODE; + desc.regout[0] |= 1 << gdst_code; + break; + case 0xba: // set local (lo n) + case 0xbb: // set local (hi n) + desc.regout[ldst_group] |= 1 << ldst_code; + break; + case 0xbc: // mul global,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbd: // muls global,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[0] |= 1 << gdst_code; + desc.regout[0] |= 1 << gdst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbe: // muls local,global + desc.regin[0] |= 1 << gsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xbf: // mulu local,local + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= SR_CODE; + desc.cycles = 3 << m_cpu->m_clck_scale; + break; + case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software + case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software + case 0xc8: case 0xc9: case 0xca: case 0xcb: // software + case 0xcc: case 0xcd: // software + { + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + + const uint32_t reg = FE_FP + FE_FL; + desc.regout[1 + (((reg + 0) & 0x20) >> 5)] |= 1 << ((reg + 0) & 0x1f); + desc.regout[1 + (((reg + 1) & 0x20) >> 5)] |= 1 << ((reg + 1) & 0x1f); + desc.regout[1 + (((reg + 2) & 0x20) >> 5)] |= 1 << ((reg + 2) & 0x1f); + desc.regout[1 + (((reg + 3) & 0x20) >> 5)] |= 1 << ((reg + 3) & 0x1f); + desc.regout[1 + (((reg + 4) & 0x20) >> 5)] |= 1 << ((reg + 4) & 0x1f); + + desc.regout[0] |= SR_CODE; + + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + } + case 0xce: // extend - 4 bytes + desc.regin[0] |= SR_CODE; + desc.regin[0] |= (3 << 14); // global regs 14, 15 + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= (3 << 14); // global regs 14, 15 + break; + case 0xcf: // do + return false; + case 0xd0: // ldwr global + case 0xd4: // ldwp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd1: // ldwr local + case 0xd5: // ldwp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd2: // lddr global + case 0xd6: // lddp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[0] |= 1 << gsrc_code; + desc.regout[0] |= 1 << gsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd3: // lddr local + case 0xd7: // lddp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regout[lsrc_group] |= 1 << lsrc_code; + desc.regout[lsrcf_group] |= 1 << lsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_READS_MEMORY; + break; + case 0xd8: // stwr global + case 0xdc: // stwp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xd9: // stwr local + case 0xdd: // stwp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xda: // stdr global + case 0xde: // stdp global + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[0] |= 1 << gsrc_code; + desc.regin[0] |= 1 << gsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xdb: // stdr local + case 0xdf: // stdp local + desc.regin[0] |= SR_CODE; + desc.regin[ldst_group] |= 1 << ldst_code; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regin[lsrcf_group] |= 1 << lsrcf_code; + if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; + desc.flags |= OPFLAG_WRITES_MEMORY; + break; + case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel) + case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) + case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) + desc.regin[0] |= SR_CODE; + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.delayslots = 1; + break; + case 0xec: // dbr - could be 4 bytes (pcrel) + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.delayslots = 1; + break; + case 0xed: // frame + desc.regin[0] |= SR_CODE; + desc.regin[1] = 0xffffffff; + desc.regin[2] = 0xffffffff; + desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE; + break; + case 0xee: // call global + desc.regin[0] |= SR_CODE; + desc.regin[0] |= 1 << gsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.targetpc = desc.pc + decode_call(desc); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xef: // call local + desc.regin[0] |= SR_CODE; + desc.regin[lsrc_group] |= 1 << lsrc_code; + desc.regout[ldst_group] |= 1 << ldst_code; + desc.regout[ldstf_group] |= 1 << ldstf_code; + desc.targetpc = desc.pc + decode_call(desc); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne + case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht + case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt + desc.regin[0] |= SR_CODE; + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + break; + case 0xfc: // br + desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + break; + case 0xfd: case 0xfe: case 0xff: // trap + desc.regin[0] |= SR_CODE; + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + break; + } + return true; +} diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h new file mode 100644 index 00000000000..1d42177110a --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -0,0 +1,32 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +#ifndef MAME_CPU_E132XS_E132XSFE_H +#define MAME_CPU_E132XS_E132XSFE_H + +#pragma once + +#include "e132xs.h" +#include "cpu/drcfe.h" + +class e132xs_frontend : public drc_frontend +{ +public: + e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + void flush(); + +protected: + // required overrides + virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + +private: + inline uint16_t read_word(opcode_desc &desc); + inline uint16_t read_imm1(opcode_desc &desc); + inline uint16_t read_imm2(opcode_desc &desc); + inline uint32_t read_ldstxx_imm(opcode_desc &desc); + inline int32_t decode_pcrel(opcode_desc &desc, uint16_t op); + inline int32_t decode_call(opcode_desc &desc); + + hyperstone_device *m_cpu; +}; + +#endif /* MAME_CPU_E132XS_E132XSFE_H */ diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index acaa1d99aa9..e9290ea4ab1 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -81,6 +81,8 @@ void hyperstone_device::hyperstone_movd() } else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR { + SR |= Z_MASK; + SR &= ~N_MASK; if (DST_GLOBAL) { set_global_register(dst_code, 0); @@ -91,13 +93,16 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dst_code] = 0; m_local_regs[dstf_code] = 0; } - SR |= Z_MASK; - SR &= ~N_MASK; m_icount -= m_clock_cycles_2; } else // Rd doesn't denote PC and Rs doesn't denote SR { + SR &= ~(Z_MASK | N_MASK); + if (concat_64(sreg, sregf) == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { set_global_register(dst_code, sreg); @@ -109,11 +114,6 @@ void hyperstone_device::hyperstone_movd() m_local_regs[dstf_code] = sregf; } - SR &= ~(Z_MASK | N_MASK); - if (concat_64(sreg, sregf) == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); - m_icount -= m_clock_cycles_2; } } @@ -152,12 +152,12 @@ void hyperstone_device::hyperstone_divsu() { /* TODO: add quotient overflow */ const uint32_t quotient = SIGNED ? (uint32_t)((int64_t)dividend / (int32_t)sreg) : (dividend / sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; SR &= ~(V_MASK | Z_MASK | N_MASK); if (quotient == 0) SR |= Z_MASK; SR |= SIGN_TO_N(quotient); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient; } m_icount -= 36 << m_clck_scale; @@ -219,20 +219,19 @@ template > 32; SR |= ((sreg ^ tmp) & (extra_u ^ tmp) & 0x80000000) >> 28; const uint32_t dreg = sreg + extra_u; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); m_icount -= m_clock_cycles_1; } @@ -285,15 +284,16 @@ void hyperstone_device::hyperstone_sums() //#endif const int32_t res = sreg + extra_s; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if ((SR & V_MASK) && src_code != SR_REGISTER) @@ -346,6 +346,11 @@ void hyperstone_device::hyperstone_mov() const uint32_t src_code = SRC_GLOBAL ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_local_regs[src_code]; + SR &= ~(Z_MASK | N_MASK); + if (sreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(sreg); + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -358,11 +363,6 @@ void hyperstone_device::hyperstone_mov() { m_local_regs[(DST_CODE + fp) & 0x3f] = sreg; } - - SR &= ~(Z_MASK | N_MASK); - if (sreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(sreg); } m_icount -= m_clock_cycles_1; @@ -388,6 +388,11 @@ void hyperstone_device::hyperstone_add() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -400,10 +405,6 @@ void hyperstone_device::hyperstone_add() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -428,15 +429,16 @@ void hyperstone_device::hyperstone_adds() //#endif const int32_t res = sreg + dreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -473,16 +475,17 @@ void hyperstone_device::hyperstone_andn() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & ~sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -494,16 +497,17 @@ void hyperstone_device::hyperstone_or() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] | sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -515,16 +519,17 @@ void hyperstone_device::hyperstone_xor() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] ^ sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -563,15 +568,15 @@ void hyperstone_device::hyperstone_subc() dreg -= sreg_c; } + if (old_z && dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(DST_CODE, dreg); else m_local_regs[dst_code] = dreg; - if (old_z && dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -581,16 +586,17 @@ void hyperstone_device::hyperstone_not() check_delay_PC(); const uint32_t dreg = ~(SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]); - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -609,11 +615,15 @@ void hyperstone_device::hyperstone_sub() const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg); SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); - SR |= (tmp & 0x100000000) >> 32; SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; dreg -= sreg; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -626,10 +636,6 @@ void hyperstone_device::hyperstone_sub() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -655,15 +661,16 @@ void hyperstone_device::hyperstone_subs() SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; const int32_t res = dreg - sreg; - if (DST_GLOBAL) - set_global_register(dst_code, res); - else - m_local_regs[dst_code] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(dst_code, res); + else + m_local_regs[dst_code] = res; + m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -705,15 +712,15 @@ void hyperstone_device::hyperstone_addc() SR |= (tmp & 0x100000000) >> 32; + if (dreg == 0 && old_z) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) set_global_register(dst_code, dreg); else m_local_regs[dst_code] = dreg; - if (dreg == 0 && old_z) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -725,16 +732,17 @@ void hyperstone_device::hyperstone_and() const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]; const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & sreg; - if (DST_GLOBAL) - set_global_register(dst_code, dreg); - else - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; else SR &= ~Z_MASK; + if (DST_GLOBAL) + set_global_register(dst_code, dreg); + else + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -754,15 +762,16 @@ void hyperstone_device::hyperstone_neg() SR |= (tmp & sreg & 0x80000000) >> 28; const uint32_t dreg = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, dreg); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) + set_global_register(DST_CODE, dreg); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = dreg; + m_icount -= m_clock_cycles_1; } @@ -787,15 +796,16 @@ void hyperstone_device::hyperstone_negs() //#endif const int32_t res = -sreg; - if (DST_GLOBAL) - set_global_register(DST_CODE, res); - else - m_local_regs[(DST_CODE + fp) & 0x3f] = res; if (res == 0) SR |= Z_MASK; SR |= SIGN_TO_N(res); + if (DST_GLOBAL) + set_global_register(DST_CODE, res); + else + m_local_regs[(DST_CODE + fp) & 0x3f] = res; + m_icount -= m_clock_cycles_1; if (GET_V) @@ -853,6 +863,15 @@ void hyperstone_device::hyperstone_movi() } else { + SR &= ~(Z_MASK | N_MASK); + if (imm == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(imm); + +#if MISSIONCRAFT_FLAGS + SR &= ~V_MASK; // or V undefined ? +#endif + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE + (h ? 16 : 0); @@ -865,15 +884,6 @@ void hyperstone_device::hyperstone_movi() { m_local_regs[(DST_CODE + GET_FP) & 0x3f] = imm; } - - SR &= ~(Z_MASK | N_MASK); - if (imm == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(imm); - -#if MISSIONCRAFT_FLAGS - SR &= ~V_MASK; // or V undefined ? -#endif } m_icount -= m_clock_cycles_1; @@ -903,6 +913,11 @@ void hyperstone_device::hyperstone_addi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; dreg += imm; + + if (dreg == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(dreg); + if (DST_GLOBAL) { set_global_register(dst_code, dreg); @@ -915,10 +930,6 @@ void hyperstone_device::hyperstone_addi() m_local_regs[dst_code] = dreg; } - if (dreg == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(dreg); - m_icount -= m_clock_cycles_1; } @@ -965,15 +976,15 @@ void hyperstone_device::hyperstone_addsi() const int32_t res = imm + (int32_t)dreg; + if (res == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(res); + if (DST_GLOBAL) set_global_register(dst_code, res); else m_local_regs[dst_code] = res; - if (res == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(res); - m_icount -= m_clock_cycles_1; if (SR & V_MASK) @@ -1056,6 +1067,12 @@ void hyperstone_device::hyperstone_andni() { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] & ~imm; + + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + set_global_register(dst_code, dreg); } else @@ -1063,12 +1080,12 @@ void hyperstone_device::hyperstone_andni() const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] & ~imm; m_local_regs[dst_code] = dreg; - } - if (dreg == 0) - SR |= Z_MASK; - else - SR &= ~Z_MASK; + if (dreg == 0) + SR |= Z_MASK; + else + SR &= ~Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1089,18 +1106,24 @@ void hyperstone_device::hyperstone_ori() { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] | imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] |= imm; - } - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1121,18 +1144,24 @@ void hyperstone_device::hyperstone_xori() { const uint32_t dst_code = DST_CODE; dreg = m_global_regs[dst_code] ^ imm; + + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + set_global_register(dst_code, dreg); } else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; dreg = m_local_regs[dst_code] ^= imm; - } - if (dreg) - SR &= ~Z_MASK; - else - SR |= Z_MASK; + if (dreg) + SR &= ~Z_MASK; + else + SR |= Z_MASK; + } m_icount -= m_clock_cycles_1; } @@ -1164,13 +1193,13 @@ void hyperstone_device::hyperstone_shrdi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1203,13 +1232,13 @@ void hyperstone_device::hyperstone_shrd() val >>= n; } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1229,11 +1258,12 @@ void hyperstone_device::hyperstone_shr() dreg >>= n; - m_local_regs[dst_code] = dreg; if (dreg == 0) SR |= Z_MASK; SR |= SIGN_TO_N(dreg); + m_local_regs[dst_code] = dreg; + m_icount -= m_clock_cycles_1; } @@ -1261,13 +1291,13 @@ void hyperstone_device::hyperstone_sardi() val |= 0xffffffff00000000U << (32 - n); } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1306,12 +1336,13 @@ void hyperstone_device::hyperstone_sard() } } - m_local_regs[dst_code] = (uint32_t)(val >> 32); - m_local_regs[dstf_code] = (uint32_t)val; if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = (uint32_t)(val >> 32); + m_local_regs[dstf_code] = (uint32_t)val; + m_icount -= m_clock_cycles_2; } @@ -1339,12 +1370,12 @@ void hyperstone_device::hyperstone_sar() ret |= 0xffffffff << (32 - n); } - m_local_regs[dst_code] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code] = ret; + m_icount -= m_clock_cycles_1; } @@ -1378,13 +1409,13 @@ void hyperstone_device::hyperstone_shldi() high_order = extract_64hi(val); - m_local_regs[dst_code] = high_order; - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + m_local_regs[dst_code] = high_order; + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1423,13 +1454,13 @@ void hyperstone_device::hyperstone_shld() val <<= n; - m_local_regs[dst_code] = extract_64hi(val); - m_local_regs[dstf_code] = extract_64lo(val); - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(m_local_regs[dst_code]); + m_local_regs[dst_code] = extract_64hi(val); + m_local_regs[dstf_code] = extract_64lo(val); + m_icount -= m_clock_cycles_2; } @@ -1453,12 +1484,12 @@ void hyperstone_device::hyperstone_shl() if (((base & mask) && (!(ret & 0x80000000))) || (((base & mask) ^ mask) && (ret & 0x80000000))) SR |= V_MASK; - m_local_regs[dst_code & 0x3f] = ret; - if (ret == 0) SR |= Z_MASK; SR |= SIGN_TO_N(ret); + m_local_regs[dst_code & 0x3f] = ret; + m_icount -= m_clock_cycles_1; } @@ -1508,12 +1539,12 @@ void hyperstone_device::hyperstone_rol() SR &= ~(Z_MASK | C_MASK | N_MASK); #endif - m_local_regs[dst_code] = val; - if (val == 0) SR |= Z_MASK; SR |= SIGN_TO_N(val); + m_local_regs[dst_code] = val; + m_icount -= m_clock_cycles_1; } @@ -2129,15 +2160,15 @@ void hyperstone_device::hyperstone_shri() val >>= n; + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2163,15 +2194,15 @@ void hyperstone_device::hyperstone_sari() val |= 0xffffffff << (32 - n); } + if (val == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val); + if (DST_GLOBAL) set_global_register(dst_code, val); else m_local_regs[dst_code] = val; - if (val == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val); - m_icount -= m_clock_cycles_1; } @@ -2192,15 +2223,15 @@ void hyperstone_device::hyperstone_shli() if (((val & mask) && (!(val2 & 0x80000000))) || (((val & mask) ^ mask) && (val2 & 0x80000000))) SR |= V_MASK; + if (val2 == 0) + SR |= Z_MASK; + SR |= SIGN_TO_N(val2); + if (DST_GLOBAL) set_global_register(dst_code, val2); else m_local_regs[dst_code] = val2; - if (val2 == 0) - SR |= Z_MASK; - SR |= SIGN_TO_N(val2); - m_icount -= m_clock_cycles_1; } @@ -2226,14 +2257,14 @@ void hyperstone_device::hyperstone_mulsu() const uint32_t high_order = (uint32_t)(double_word >> 32); - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; - SR &= ~(Z_MASK | N_MASK); if (double_word == 0) SR |= Z_MASK; SR |= SIGN_TO_N(high_order); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order; + (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word; + if(SIGNED == IS_SIGNED && (sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= m_clock_cycles_4; else if(SIGNED == IS_UNSIGNED && sreg <= 0xffff && dreg <= 0xffff) @@ -2321,13 +2352,13 @@ void hyperstone_device::hyperstone_mul() const uint32_t sreg = (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; const uint32_t result = sreg * dreg; - (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; - SR &= ~(Z_MASK | N_MASK); if (result == 0) SR |= Z_MASK; SR |= SIGN_TO_N(result); + (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result; + if ((sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff)) m_icount -= 3 << m_clck_scale; else @@ -2636,228 +2667,41 @@ void hyperstone_device::hyperstone_stdp() m_icount -= m_clock_cycles_2; } -void hyperstone_device::hyperstone_dbv() -{ - if (SR & V_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnv() -{ - if (SR & V_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbe() -{ - if (SR & Z_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbc() -{ - if (SR & C_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbse() -{ - if (SR & (C_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbn() -{ - if (SR & N_MASK) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbnn() +template +void hyperstone_device::hyperstone_db() { - if (SR & N_MASK) + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - ignore_pcrel(); - check_delay_PC(); - } - else - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dble() -{ - if (SR & (N_MASK | Z_MASK)) - { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; - } - else - { - ignore_pcrel(); - check_delay_PC(); - } - - m_icount -= m_clock_cycles_1; -} - -void hyperstone_device::hyperstone_dbgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); + if (SR & condition_masks[CONDITION]) + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = true; + m_delay_pc = PC + offset; + m_intblock = 3; + } + else + { + ignore_pcrel(); + check_delay_PC(); + } } else { - const int32_t offset = decode_pcrel(); - check_delay_PC(); - m_delay_slot = true; - m_delay_pc = PC + offset; - m_intblock = 3; + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + } + else + { + const int32_t offset = decode_pcrel(); + check_delay_PC(); + m_delay_slot = true; + m_delay_pc = PC + offset; + m_intblock = 3; + } } m_icount -= m_clock_cycles_1; @@ -2904,8 +2748,7 @@ void hyperstone_device::hyperstone_frame() if (tmp_flag) { - uint32_t addr = get_trap_addr(TRAPNO_FRAME_ERROR); - execute_exception(addr); + execute_exception(get_trap_addr(TRAPNO_FRAME_ERROR)); } } @@ -2920,7 +2763,7 @@ void hyperstone_device::hyperstone_call_global() int32_t extra_s = 0; - if (E_BIT(imm_1)) + if (imm_1 & 0x8000) { uint16_t imm_2 = READ_OP(PC); @@ -2930,7 +2773,7 @@ void hyperstone_device::hyperstone_call_global() extra_s = imm_2; extra_s |= ((imm_1 & 0x3fff) << 16); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xc0000000; } else @@ -2939,7 +2782,7 @@ void hyperstone_device::hyperstone_call_global() SET_ILC(2<<19); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xffffc000; } @@ -2982,7 +2825,7 @@ void hyperstone_device::hyperstone_call_local() int32_t extra_s = 0; - if (E_BIT(imm_1)) + if (imm_1 & 0x8000) { uint16_t imm_2 = READ_OP(PC); @@ -2992,7 +2835,7 @@ void hyperstone_device::hyperstone_call_local() extra_s = imm_2; extra_s |= ((imm_1 & 0x3fff) << 16); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xc0000000; } else @@ -3001,7 +2844,7 @@ void hyperstone_device::hyperstone_call_local() SET_ILC(2<<19); - if (S_BIT_CONST(imm_1)) + if (imm_1 & 0x4000) extra_s |= 0xffffc000; } @@ -3034,172 +2877,34 @@ void hyperstone_device::hyperstone_call_local() m_icount -= m_clock_cycles_1; } - - -void hyperstone_device::hyperstone_bv() -{ - if (SR & V_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnv() -{ - if (SR & V_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_be() -{ - if (SR & Z_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bne() -{ - if (SR & Z_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bc() -{ - if (SR & C_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnc() -{ - if (SR & C_MASK) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bse() -{ - if (SR & (C_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bht() -{ - if (SR & (C_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_bn() -{ - if (SR & N_MASK) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bnn() +template +void hyperstone_device::hyperstone_b() { - if (SR & N_MASK) + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + if (COND_SET) { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } - else - { - execute_br(); - } -} - -void hyperstone_device::hyperstone_ble() -{ - if (SR & (N_MASK | Z_MASK)) - { - execute_br(); - } - else - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; - } -} - -void hyperstone_device::hyperstone_bgt() -{ - if (SR & (N_MASK | Z_MASK)) - { - ignore_pcrel(); - check_delay_PC(); - m_icount -= m_clock_cycles_1; + if (SR & condition_masks[CONDITION]) + { + execute_br(); + } + else + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } } else { - execute_br(); + if (SR & condition_masks[CONDITION]) + { + ignore_pcrel(); + check_delay_PC(); + m_icount -= m_clock_cycles_1; + } + else + { + execute_br(); + } } } -- cgit v1.2.3-70-g09d2 From bccc962b69ea4f5db5ff4ae912db233775cecd00 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Thu, 23 Nov 2017 15:14:13 +0100 Subject: e132xs: initial work on drc, nw --- scripts/src/cpu.lua | 2 +- src/devices/cpu/e132xs/32xsdasm.cpp | 20 +- src/devices/cpu/e132xs/32xsdefs.h | 30 +- src/devices/cpu/e132xs/e132xs.cpp | 23 +- src/devices/cpu/e132xs/e132xs.h | 248 ++++--- src/devices/cpu/e132xs/e132xsdefs.h | 79 --- src/devices/cpu/e132xs/e132xsdrc.cpp | 691 ++++++++++++-------- src/devices/cpu/e132xs/e132xsdrc_ops.cpp | 1035 ------------------------------ src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 575 +++++++++++++++++ src/devices/cpu/e132xs/e132xsfe.cpp | 49 +- src/devices/cpu/e132xs/e132xsfe.h | 1 + src/devices/cpu/e132xs/e132xsop.hxx | 58 +- 12 files changed, 1206 insertions(+), 1605 deletions(-) delete mode 100644 src/devices/cpu/e132xs/e132xsdefs.h delete mode 100644 src/devices/cpu/e132xs/e132xsdrc_ops.cpp create mode 100644 src/devices/cpu/e132xs/e132xsdrc_ops.hxx diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index dad6fe50a1a..69d70d8b237 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -811,7 +811,7 @@ if (CPUS["E1"]~=null) then MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.h", MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc.cpp", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc_ops.cpp", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc_ops.hxx", MAME_DIR .. "src/devices/cpu/e132xs/32xsdefs.h", MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.hxx", } diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index 2060350c5b8..aa4dcc912eb 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -396,27 +396,25 @@ u32 hyperstone_disassembler::opcode_alignment() const /*****************************/ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - uint16_t op; - uint8_t op_num; - - uint8_t source_code, dest_code, source_bit, dest_bit; - char source[5] = "\0", dest[5] = "\0"; uint32_t flags = 0; - op = opcodes.r16(pc); + base_pc = pc; + base_oprom = oprom; + + uint16_t op = READ_OP_DASM(pc); size = 2; - source_code = SOURCECODE(op); - dest_code = DESTCODE(op); - source_bit = SOURCEBIT(op); - dest_bit = DESTBIT(op); + uint8_t source_code = SOURCECODE(op); + uint8_t dest_code = DESTCODE(op); + uint8_t source_bit = SOURCEBIT(op); + uint8_t dest_bit = DESTBIT(op); global_fp = 0; int h_flag = 0; - op_num = (op & 0xff00) >> 8; + uint8_t op_num = (op & 0xff00) >> 8; switch( op_num ) { diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h index a4a5ff876df..943bb4911e6 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/32xsdefs.h @@ -125,27 +125,6 @@ /* Internal registers */ -#define SREG decode.src_value -#define SREGF decode.next_src_value -#define DREG decode.dst_value -#define DREGF decode.next_dst_value -#define EXTRA_U decode.extra.u -#define EXTRA_S decode.extra.s - -#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_)) -#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_)) -#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_)) -#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_)) - -#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER) -#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER) -#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER) -#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER) -#define SAME_SRC_DST decode.same_src_dst -#define SAME_SRC_DSTF decode.same_src_dstf -#define SAME_SRCF_DST decode.same_srcf_dst - - #define OP m_op #define PC m_global_regs[0] //Program Counter #define SR m_global_regs[1] //Status Register @@ -175,6 +154,7 @@ #define T_MASK 0x00010000 #define P_MASK 0x00020000 #define S_MASK 0x00040000 +#define ILC_MASK 0x00180000 /* SR flags */ #define GET_C ( SR & C_MASK) // bit 0 //CARRY @@ -220,17 +200,11 @@ #define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed -#define CHECK_C(x) (SR = (SR & ~0x00000001) | (uint32_t)((x & 0x100000000L) >> 32)) -#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) >> 29)) -#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | (((z ^ y) & (y ^ x) & 0x80000000) >> 29)) - - /* FER flags */ #define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions #define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions //other bits are reversed, in particular 7 - 5 for the operating system. -//the user program can only changes the above 2 flags +//the user program can only change the above 2 flags #endif // MAME_CPU_E132XS_XS32DEFS_H diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 8c88af94c31..3a31e93a2a9 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -661,10 +661,8 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) #define SIGN_BIT(val) ((val & 0x80000000) >> 31) #define SIGN_TO_N(val) ((val & 0x80000000) >> 29) -static constexpr int32_t immediate_values[32] = +/*static*/ const int32_t hyperstone_device::s_immediate_values[16] = { - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), -8, -7, -6, -5, -4, -3, -2, -1 }; @@ -678,7 +676,7 @@ do if (m_delay_slot) \ { \ PC = m_delay_pc; \ - m_delay_slot = false; \ + m_delay_slot = 0; \ } \ } while (0) @@ -697,8 +695,7 @@ uint32_t hyperstone_device::decode_immediate_s() switch (nybble) { case 0: - default: - return immediate_values[0x10 + nybble]; + return 16; case 1: { m_instruction_length = (3<<19); @@ -720,6 +717,8 @@ uint32_t hyperstone_device::decode_immediate_s() PC += 2; return extra_u; } + default: + return s_immediate_values[nybble]; } } @@ -791,7 +790,7 @@ void hyperstone_device::ignore_pcrel() } } -void hyperstone_device::execute_br() +void hyperstone_device::hyperstone_br() { const int32_t offset = decode_pcrel(); check_delay_PC(); @@ -1029,7 +1028,7 @@ void hyperstone_device::device_start() void hyperstone_device::init(int scale_mask) { - m_enable_drc = false;//allow_drc(); + m_enable_drc = allow_drc(); memset(m_global_regs, 0, sizeof(uint32_t) * 32); memset(m_local_regs, 0, sizeof(uint32_t) * 64); @@ -1584,7 +1583,7 @@ void hyperstone_device::execute_run() m_instruction_length = (1<<19); - switch ((OP >> 8) & 0x00ff) + switch (m_op >> 8) { case 0x00: hyperstone_chk(); break; case 0x01: hyperstone_chk(); break; @@ -1798,8 +1797,8 @@ void hyperstone_device::execute_run() case 0xd1: hyperstone_ldwr(); break; case 0xd2: hyperstone_lddr(); break; case 0xd3: hyperstone_lddr(); break; - case 0xd4: hypesrtone_ldwp(); break; - case 0xd5: hypesrtone_ldwp(); break; + case 0xd4: hyperstone_ldwp(); break; + case 0xd5: hyperstone_ldwp(); break; case 0xd6: hyperstone_lddp(); break; case 0xd7: hyperstone_lddp(); break; case 0xd8: hyperstone_stwr(); break; @@ -1838,7 +1837,7 @@ void hyperstone_device::execute_run() case 0xf9: hyperstone_b(); break; case 0xfa: hyperstone_b(); break; case 0xfb: hyperstone_b(); break; - case 0xfc: execute_br(); break; + case 0xfc: hyperstone_br(); break; case 0xfd: hyperstone_trap(); break; case 0xfe: hyperstone_trap(); break; case 0xff: hyperstone_trap(); break; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 8328215c475..93247a4bbc1 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -64,6 +64,7 @@ class hyperstone_device : public cpu_device public: inline void ccfunc_unimplemented(); + inline void ccfunc_print(); protected: enum @@ -165,6 +166,8 @@ protected: enum { EXCEPTION_INTERRUPT = 0, + EXCEPTION_PRIVILEGE_ERROR, + EXCEPTION_TRACE, EXCEPTION_COUNT }; @@ -225,7 +228,7 @@ protected: emu_timer *m_timer; uint32_t m_delay_pc; - bool m_delay_slot; + uint32_t m_delay_slot; uint32_t m_opcodexor; @@ -236,6 +239,7 @@ protected: int m_icount; uint8_t m_fl_lut[16]; + static const int32_t s_immediate_values[16]; uint32_t get_trap_addr(uint8_t trapno); @@ -256,16 +260,18 @@ private: TIMER_CALLBACK_MEMBER(timer_callback); - void execute_br(); + uint32_t decode_const(); + uint32_t decode_immediate_s(); + void ignore_immediate_s(); + int32_t decode_pcrel(); + void ignore_pcrel(); + + void hyperstone_br(); void execute_trap(uint32_t addr); void execute_int(uint32_t addr); void execute_exception(uint32_t addr); void execute_software(); - void ignore_immediate_s(); - uint32_t decode_immediate_s(); - uint32_t decode_const(); - template void hyperstone_chk(); template void hyperstone_movd(); template void hyperstone_divsu(); @@ -323,7 +329,7 @@ private: template void hyperstone_ldwr(); template void hyperstone_lddr(); - template void hypesrtone_ldwp(); + template void hyperstone_ldwp(); template void hyperstone_lddp(); template void hyperstone_stwr(); @@ -345,9 +351,6 @@ private: void hyperstone_reserved(); void hyperstone_do(); - int32_t decode_pcrel(); - void ignore_pcrel(); - drc_cache m_cache; std::unique_ptr m_drcuml; std::unique_ptr m_drcfe; @@ -364,6 +367,7 @@ private: uint32_t m_drc_arg1; uint32_t m_drc_arg2; uint32_t m_drc_arg3; + uint32_t m_branch_dest; uml::code_handle *m_mem_read8; uml::code_handle *m_mem_write8; @@ -394,139 +398,109 @@ private: void static_generate_entry_point(); void static_generate_nocode_handler(); void static_generate_out_of_cycles(); - void static_generate_exception(uint8_t exception, const char *name); + void static_generate_exception(uint32_t exception, const char *name); void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr); - void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception); + void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param); void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + int generate_get_trap_addr(drcuml_block *block, int label, uint32_t trapno); + void generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + int generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + int generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int label); + + void generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); + void generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template int generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + template void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_call_global(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_call_local(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + + void generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); }; // device type definition diff --git a/src/devices/cpu/e132xs/e132xsdefs.h b/src/devices/cpu/e132xs/e132xsdefs.h deleted file mode 100644 index 95a0274ed3a..00000000000 --- a/src/devices/cpu/e132xs/e132xsdefs.h +++ /dev/null @@ -1,79 +0,0 @@ -/* Memory access */ -/* read byte */ -#define READ_B(addr) m_program->read_byte((addr)) -/* read half-word */ -#define READ_HW(addr) m_program->read_word((addr) & ~1) -/* read word */ -#define READ_W(addr) m_program->read_dword((addr) & ~3) - -/* write byte */ -#define WRITE_B(addr, data) m_program->write_byte(addr, data) -/* write half-word */ -#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data) -/* write word */ -#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data) - - -/* I/O access */ -/* read word */ -#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc) -/* write word */ -#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data) - - -#define READ_OP(addr) m_direct->read_word((addr), m_opcodexor) - -// set C in adds/addsi/subs/sums -#define SETCARRYS 0 -#define MISSIONCRAFT_FLAGS 1 - -/* Registers */ - -/* Internal registers */ - -#define SREG decode.src_value -#define SREGF decode.next_src_value -#define DREG decode.dst_value -#define DREGF decode.next_dst_value -#define EXTRA_U decode.extra.u -#define EXTRA_S decode.extra.s - -#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_)) -#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_)) -#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_)) -#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_)) - -#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER) -#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER) -#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER) -#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER) -#define SAME_SRC_DST decode.same_src_dst -#define SAME_SRC_DSTF decode.same_src_dstf -#define SAME_SRCF_DST decode.same_srcf_dst - - -/* Memory access */ -/* read byte */ -#define READ_B(addr) m_program->read_byte((addr)) -/* read half-word */ -#define READ_HW(addr) m_program->read_word((addr) & ~1) -/* read word */ -#define READ_W(addr) m_program->read_dword((addr) & ~3) - -/* write byte */ -#define WRITE_B(addr, data) m_program->write_byte(addr, data) -/* write half-word */ -#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data) -/* write word */ -#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data) - - -/* I/O access */ -/* read word */ -#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc) -/* write word */ -#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data) - - -#define READ_OP(addr) m_direct->read_word((addr), m_opcodexor) - diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 9e0d7e9ef15..43dc59dd016 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -7,6 +7,8 @@ using namespace uml; +#define DRC_SR mem(&m_global_regs[1]) + void hyperstone_device::execute_run_drc() { drcuml_state *drcuml = m_drcuml.get(); @@ -19,6 +21,7 @@ void hyperstone_device::execute_run_drc() m_cache_dirty = false; } + /* execute */ do { @@ -74,6 +77,10 @@ void hyperstone_device::code_flush_cache() static_generate_nocode_handler(); static_generate_out_of_cycles(); + static_generate_exception(EXCEPTION_INTERRUPT, "interrupt"); + static_generate_exception(EXCEPTION_PRIVILEGE_ERROR, "privilege_error"); + static_generate_exception(EXCEPTION_TRACE, "trace"); + /* add subroutines for memory accesses */ static_generate_memory_accessor(1, false, false, "read8", m_mem_read8); static_generate_memory_accessor(1, true, false, "write8", m_mem_write8); @@ -87,10 +94,25 @@ void hyperstone_device::code_flush_cache() catch (drcuml_block::abort_compilation &) { - fatalerror("Unable to generate static E132XS code\n"); + fatalerror("Unable to generate static E132XS code\n"); fflush(stdout); } } +/* Return the entry point for a determinated trap */ +int hyperstone_device::generate_get_trap_addr(drcuml_block *block, int label, uint32_t trapno) +{ + int no_mem3; + UML_MOV(block, I0, trapno); + UML_CMP(block, mem(&m_trap_entry), 0xffffff00); + UML_JMPc(block, uml::COND_NE, no_mem3 = label++); + UML_SUB(block, I0, 63, I0); + + UML_LABEL(block, no_mem3); + UML_SHL(block, I0, I0, 2); + UML_OR(block, I0, I0, mem(&m_trap_entry)); + return label; +} + /*------------------------------------------------- code_compile_block - compile a block of the given mode at the specified pc @@ -126,7 +148,7 @@ void hyperstone_device::code_compile_block(offs_t pc) /* add a code log entry */ if (drcuml->logging()) - block->append_comment("-------------------------"); // comment + block->append_comment("-------------------------"); /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) @@ -136,22 +158,21 @@ void hyperstone_device::code_compile_block(offs_t pc) /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ if (override || !drcuml->hash_exists(0, seqhead->pc)) - UML_HASH(block, 0, seqhead->pc); // hash mode,pc + UML_HASH(block, 0, seqhead->pc); /* if we already have a hash, and this is the first sequence, assume that we */ /* are recompiling due to being out of sync and allow future overrides */ else if (seqhead == desclist) { override = true; - UML_HASH(block, 0, seqhead->pc); // hash mode,pc + UML_HASH(block, 0, seqhead->pc); } /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ else { - UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + UML_LABEL(block, seqhead->pc | 0x80000000); UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); - // hashjmp <0>,seqhead->pc,nocode continue; } @@ -161,11 +182,13 @@ void hyperstone_device::code_compile_block(offs_t pc) /* label this instruction, if it may be jumped to locally */ if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) - UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc + UML_LABEL(block, seqhead->pc | 0x80000000); /* iterate over instructions in the sequence and compile them */ for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) + { generate_sequence_instruction(block, &compiler, curdesc); + } /* if we need to return to the start, do it */ if (seqlast->flags & OPFLAG_RETURN_TO_START) @@ -173,14 +196,16 @@ void hyperstone_device::code_compile_block(offs_t pc) /* otherwise we just go to the next instruction */ else - nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4; + nextpc = seqlast->pc + (seqlast->skipslots + 1) * 2; /* count off cycles and go there */ - generate_update_cycles(block, &compiler, nextpc, true); // + generate_update_cycles(block, &compiler, nextpc); // /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) + { UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp ,nextpc,nocode + } } /* end the sequence */ @@ -209,11 +234,23 @@ inline void hyperstone_device::ccfunc_unimplemented() fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); } +inline void hyperstone_device::ccfunc_print() +{ + printf("%c: %08X\n", (char)m_drc_arg0, m_drc_arg1); +} + static void cfunc_unimplemented(void *param) { ((hyperstone_device *)param)->ccfunc_unimplemented(); } +#if 0 +static void cfunc_print(void *param) +{ + ((hyperstone_device *)param)->ccfunc_print(); +} +#endif + /*************************************************************************** STATIC CODEGEN ***************************************************************************/ @@ -241,6 +278,59 @@ static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, c } + +/*------------------------------------------------- + static_generate_exception - generate an + exception handler +-------------------------------------------------*/ + +void hyperstone_device::static_generate_exception(uint32_t exception, const char *name) +{ + code_handle *&exception_handle = m_exception[exception]; + drcuml_state *drcuml = m_drcuml.get(); + drcuml_block *block = drcuml->begin_block(1024); + + /* add a global entry for this */ + alloc_handle(drcuml, &exception_handle, name); + UML_HANDLE(block, *exception_handle); + + generate_get_trap_addr(block, 1, exception); + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + UML_ROLAND(block, I2, DRC_SR, 11, 0xf); + UML_TEST(block, I2, 0xf); + UML_MOVc(block, uml::COND_Z, I2, 16); + UML_ADD(block, I1, I1, I2); + + UML_AND(block, DRC_SR, DRC_SR, 0xffe7ffff); + UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); + + UML_MOV(block, I4, DRC_SR); + UML_ROLINS(block, DRC_SR, 2, 21, 0x01e00000); + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); + + UML_AND(block, I3, I1, 0x3f); + UML_AND(block, I1, mem(m_global_regs), ~1); + UML_ROLAND(block, I2, DRC_SR, 14, 1); + UML_OR(block, I1, I1, I2); + UML_STORE(block, (void *)m_local_regs, I3, I1, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I3, I3, 1); + UML_AND(block, I3, I3, 0x3f); + UML_STORE(block, (void *)m_local_regs, I3, I4, SIZE_DWORD, SCALE_x4); + + UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK)); + UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK)); + + UML_MOV(block, mem(m_global_regs), I0); + UML_SUB(block, mem(&m_icount), mem(&m_icount), 2); + UML_EXHc(block, COND_S, *m_out_of_cycles, 0); + + UML_HASHJMP(block, 0, I0, *m_nocode);// hashjmp ,i0,nocode + + block->end(); +} + + + /*------------------------------------------------- generate_entry_point - generate a static entry point @@ -378,7 +468,7 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b an exception if out -------------------------------------------------*/ -void hyperstone_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) +void hyperstone_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param) { /* account for cycles */ if (compiler->m_cycles > 0) @@ -469,6 +559,43 @@ void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, } +/*------------------------------------------------------------------ + generate_delay_slot_and_branch +------------------------------------------------------------------*/ + +void hyperstone_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + compiler_state compiler_temp = *compiler; + + /* fetch the target register if dynamic, in case it is modified by the delay slot */ + if (desc->targetpc == BRANCH_TARGET_DYNAMIC) + { + UML_MOV(block, mem(&m_branch_dest), I0); + } + + /* update the cycles and jump through the hash table to the target */ + if (desc->targetpc != BRANCH_TARGET_DYNAMIC) + { + generate_update_cycles(block, &compiler_temp, desc->targetpc); + if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + UML_JMP(block, desc->targetpc | 0x80000000); + else + UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); + } + else + { + generate_update_cycles(block, &compiler_temp, mem(&m_branch_dest)); + UML_HASHJMP(block, 0, mem(&m_branch_dest), *m_nocode); + } + + /* update the label */ + compiler->m_labelnum = compiler_temp.m_labelnum; + + /* reset the mapvar to the current cycles */ + UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); +} + + /*------------------------------------------------- generate_sequence_instruction - generate code for a single instruction in a sequence @@ -495,7 +622,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi /* if we are debugging, call the debugger */ if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) { - UML_MOV(block, mem(&PC), desc->pc); + UML_MOV(block, mem(m_global_regs), desc->pc); //save_fast_iregs(block); UML_DEBUG(block, desc->pc); } @@ -505,277 +632,297 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { - UML_MOV(block, mem(&PC), desc->pc); + UML_MOV(block, mem(m_global_regs), desc->pc); UML_MOV(block, mem(&m_drc_arg0), desc->opptr.l[0]); UML_CALLC(block, cfunc_unimplemented, this); } } } +#include "e132xsdrc_ops.hxx" + bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = (op & 0x0000ff00) >> 8; - code_label skip; + uint32_t op = (uint32_t)desc->opptr.w[0]; + printf("op:%04x\n", op); + printf("pc:%08x\n", desc->pc); + + UML_MOV(block, I0, op); + UML_AND(block, I7, DRC_SR, H_MASK); + UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); + UML_MOV(block, mem(&m_instruction_length), (1 << 19)); - switch (opswitch) + int label = 1; + switch (op >> 8) { - case 0x00: generate_op00(block, compiler, desc); break; - case 0x01: generate_op01(block, compiler, desc); break; - case 0x02: generate_op02(block, compiler, desc); break; - case 0x03: generate_op03(block, compiler, desc); break; - case 0x04: generate_op04(block, compiler, desc); break; - case 0x05: generate_op05(block, compiler, desc); break; - case 0x06: generate_op06(block, compiler, desc); break; - case 0x07: generate_op07(block, compiler, desc); break; - case 0x08: generate_op08(block, compiler, desc); break; - case 0x09: generate_op09(block, compiler, desc); break; - case 0x0a: generate_op0a(block, compiler, desc); break; - case 0x0b: generate_op0b(block, compiler, desc); break; - case 0x0c: generate_op0c(block, compiler, desc); break; - case 0x0d: generate_op0d(block, compiler, desc); break; - case 0x0e: generate_op0e(block, compiler, desc); break; - case 0x0f: generate_op0f(block, compiler, desc); break; - case 0x10: generate_op10(block, compiler, desc); break; - case 0x11: generate_op11(block, compiler, desc); break; - case 0x12: generate_op12(block, compiler, desc); break; - case 0x13: generate_op13(block, compiler, desc); break; - case 0x14: generate_op14(block, compiler, desc); break; - case 0x15: generate_op15(block, compiler, desc); break; - case 0x16: generate_op16(block, compiler, desc); break; - case 0x17: generate_op17(block, compiler, desc); break; - case 0x18: generate_op18(block, compiler, desc); break; - case 0x19: generate_op19(block, compiler, desc); break; - case 0x1a: generate_op1a(block, compiler, desc); break; - case 0x1b: generate_op1b(block, compiler, desc); break; - case 0x1c: generate_op1c(block, compiler, desc); break; - case 0x1d: generate_op1d(block, compiler, desc); break; - case 0x1e: generate_op1e(block, compiler, desc); break; - case 0x1f: generate_op1f(block, compiler, desc); break; - case 0x20: generate_op20(block, compiler, desc); break; - case 0x21: generate_op21(block, compiler, desc); break; - case 0x22: generate_op22(block, compiler, desc); break; - case 0x23: generate_op23(block, compiler, desc); break; - case 0x24: generate_op24(block, compiler, desc); break; - case 0x25: generate_op25(block, compiler, desc); break; - case 0x26: generate_op26(block, compiler, desc); break; - case 0x27: generate_op27(block, compiler, desc); break; - case 0x28: generate_op28(block, compiler, desc); break; - case 0x29: generate_op29(block, compiler, desc); break; - case 0x2a: generate_op2a(block, compiler, desc); break; - case 0x2b: generate_op2b(block, compiler, desc); break; - case 0x2c: generate_op2c(block, compiler, desc); break; - case 0x2d: generate_op2d(block, compiler, desc); break; - case 0x2e: generate_op2e(block, compiler, desc); break; - case 0x2f: generate_op2f(block, compiler, desc); break; - case 0x30: generate_op30(block, compiler, desc); break; - case 0x31: generate_op31(block, compiler, desc); break; - case 0x32: generate_op32(block, compiler, desc); break; - case 0x33: generate_op33(block, compiler, desc); break; - case 0x34: generate_op34(block, compiler, desc); break; - case 0x35: generate_op35(block, compiler, desc); break; - case 0x36: generate_op36(block, compiler, desc); break; - case 0x37: generate_op37(block, compiler, desc); break; - case 0x38: generate_op38(block, compiler, desc); break; - case 0x39: generate_op39(block, compiler, desc); break; - case 0x3a: generate_op3a(block, compiler, desc); break; - case 0x3b: generate_op3b(block, compiler, desc); break; - case 0x3c: generate_op3c(block, compiler, desc); break; - case 0x3d: generate_op3d(block, compiler, desc); break; - case 0x3e: generate_op3e(block, compiler, desc); break; - case 0x3f: generate_op3f(block, compiler, desc); break; - case 0x40: generate_op40(block, compiler, desc); break; - case 0x41: generate_op41(block, compiler, desc); break; - case 0x42: generate_op42(block, compiler, desc); break; - case 0x43: generate_op43(block, compiler, desc); break; - case 0x44: generate_op44(block, compiler, desc); break; - case 0x45: generate_op45(block, compiler, desc); break; - case 0x46: generate_op46(block, compiler, desc); break; - case 0x47: generate_op47(block, compiler, desc); break; - case 0x48: generate_op48(block, compiler, desc); break; - case 0x49: generate_op49(block, compiler, desc); break; - case 0x4a: generate_op4a(block, compiler, desc); break; - case 0x4b: generate_op4b(block, compiler, desc); break; - case 0x4c: generate_op4c(block, compiler, desc); break; - case 0x4d: generate_op4d(block, compiler, desc); break; - case 0x4e: generate_op4e(block, compiler, desc); break; - case 0x4f: generate_op4f(block, compiler, desc); break; - case 0x50: generate_op50(block, compiler, desc); break; - case 0x51: generate_op51(block, compiler, desc); break; - case 0x52: generate_op52(block, compiler, desc); break; - case 0x53: generate_op53(block, compiler, desc); break; - case 0x54: generate_op54(block, compiler, desc); break; - case 0x55: generate_op55(block, compiler, desc); break; - case 0x56: generate_op56(block, compiler, desc); break; - case 0x57: generate_op57(block, compiler, desc); break; - case 0x58: generate_op58(block, compiler, desc); break; - case 0x59: generate_op59(block, compiler, desc); break; - case 0x5a: generate_op5a(block, compiler, desc); break; - case 0x5b: generate_op5b(block, compiler, desc); break; - case 0x5c: generate_op5c(block, compiler, desc); break; - case 0x5d: generate_op5d(block, compiler, desc); break; - case 0x5e: generate_op5e(block, compiler, desc); break; - case 0x5f: generate_op5f(block, compiler, desc); break; - case 0x60: generate_op60(block, compiler, desc); break; - case 0x61: generate_op61(block, compiler, desc); break; - case 0x62: generate_op62(block, compiler, desc); break; - case 0x63: generate_op63(block, compiler, desc); break; - case 0x64: generate_op64(block, compiler, desc); break; - case 0x65: generate_op65(block, compiler, desc); break; - case 0x66: generate_op66(block, compiler, desc); break; - case 0x67: generate_op67(block, compiler, desc); break; - case 0x68: generate_op68(block, compiler, desc); break; - case 0x69: generate_op69(block, compiler, desc); break; - case 0x6a: generate_op6a(block, compiler, desc); break; - case 0x6b: generate_op6b(block, compiler, desc); break; - case 0x6c: generate_op6c(block, compiler, desc); break; - case 0x6d: generate_op6d(block, compiler, desc); break; - case 0x6e: generate_op6e(block, compiler, desc); break; - case 0x6f: generate_op6f(block, compiler, desc); break; - case 0x70: generate_op70(block, compiler, desc); break; - case 0x71: generate_op71(block, compiler, desc); break; - case 0x72: generate_op72(block, compiler, desc); break; - case 0x73: generate_op73(block, compiler, desc); break; - case 0x74: generate_op74(block, compiler, desc); break; - case 0x75: generate_op75(block, compiler, desc); break; - case 0x76: generate_op76(block, compiler, desc); break; - case 0x77: generate_op77(block, compiler, desc); break; - case 0x78: generate_op78(block, compiler, desc); break; - case 0x79: generate_op79(block, compiler, desc); break; - case 0x7a: generate_op7a(block, compiler, desc); break; - case 0x7b: generate_op7b(block, compiler, desc); break; - case 0x7c: generate_op7c(block, compiler, desc); break; - case 0x7d: generate_op7d(block, compiler, desc); break; - case 0x7e: generate_op7e(block, compiler, desc); break; - case 0x7f: generate_op7f(block, compiler, desc); break; - case 0x80: generate_op80(block, compiler, desc); break; - case 0x81: generate_op81(block, compiler, desc); break; - case 0x82: generate_op82(block, compiler, desc); break; - case 0x83: generate_op83(block, compiler, desc); break; - case 0x84: generate_op84(block, compiler, desc); break; - case 0x85: generate_op85(block, compiler, desc); break; - case 0x86: generate_op86(block, compiler, desc); break; - case 0x87: generate_op87(block, compiler, desc); break; - case 0x88: generate_op88(block, compiler, desc); break; - case 0x89: generate_op89(block, compiler, desc); break; - case 0x8a: generate_op8a(block, compiler, desc); break; - case 0x8b: generate_op8b(block, compiler, desc); break; - case 0x8c: - case 0x8d: return false; - case 0x8e: generate_op8e(block, compiler, desc); break; - case 0x8f: generate_op8f(block, compiler, desc); break; - case 0x90: generate_op90(block, compiler, desc); break; - case 0x91: generate_op91(block, compiler, desc); break; - case 0x92: generate_op92(block, compiler, desc); break; - case 0x93: generate_op93(block, compiler, desc); break; - case 0x94: generate_op94(block, compiler, desc); break; - case 0x95: generate_op95(block, compiler, desc); break; - case 0x96: generate_op96(block, compiler, desc); break; - case 0x97: generate_op97(block, compiler, desc); break; - case 0x98: generate_op98(block, compiler, desc); break; - case 0x99: generate_op99(block, compiler, desc); break; - case 0x9a: generate_op9a(block, compiler, desc); break; - case 0x9b: generate_op9b(block, compiler, desc); break; - case 0x9c: generate_op9c(block, compiler, desc); break; - case 0x9d: generate_op9d(block, compiler, desc); break; - case 0x9e: generate_op9e(block, compiler, desc); break; - case 0x9f: generate_op9f(block, compiler, desc); break; - case 0xa0: generate_opa0(block, compiler, desc); break; - case 0xa1: generate_opa1(block, compiler, desc); break; - case 0xa2: generate_opa2(block, compiler, desc); break; - case 0xa3: generate_opa3(block, compiler, desc); break; - case 0xa4: generate_opa4(block, compiler, desc); break; - case 0xa5: generate_opa5(block, compiler, desc); break; - case 0xa6: generate_opa6(block, compiler, desc); break; - case 0xa7: generate_opa7(block, compiler, desc); break; - case 0xa8: generate_opa8(block, compiler, desc); break; - case 0xa9: generate_opa9(block, compiler, desc); break; - case 0xaa: generate_opaa(block, compiler, desc); break; - case 0xab: generate_opab(block, compiler, desc); break; - case 0xac: - case 0xad: - case 0xae: - case 0xaf: return false; - case 0xb0: generate_opb0(block, compiler, desc); break; - case 0xb1: generate_opb1(block, compiler, desc); break; - case 0xb2: generate_opb2(block, compiler, desc); break; - case 0xb3: generate_opb3(block, compiler, desc); break; - case 0xb4: generate_opb4(block, compiler, desc); break; - case 0xb5: generate_opb5(block, compiler, desc); break; - case 0xb6: generate_opb6(block, compiler, desc); break; - case 0xb7: generate_opb7(block, compiler, desc); break; - case 0xb8: generate_opb8(block, compiler, desc); break; - case 0xb9: generate_opb9(block, compiler, desc); break; - case 0xba: generate_opba(block, compiler, desc); break; - case 0xbb: generate_opbb(block, compiler, desc); break; - case 0xbc: generate_opbc(block, compiler, desc); break; - case 0xbd: generate_opbd(block, compiler, desc); break; - case 0xbe: generate_opbe(block, compiler, desc); break; - case 0xbf: generate_opbf(block, compiler, desc); break; - case 0xc0: generate_opc0(block, compiler, desc); break; - case 0xc1: generate_opc1(block, compiler, desc); break; - case 0xc2: generate_opc2(block, compiler, desc); break; - case 0xc3: generate_opc3(block, compiler, desc); break; - case 0xc4: generate_opc4(block, compiler, desc); break; - case 0xc5: generate_opc5(block, compiler, desc); break; - case 0xc6: generate_opc6(block, compiler, desc); break; - case 0xc7: generate_opc7(block, compiler, desc); break; - case 0xc8: generate_opc8(block, compiler, desc); break; - case 0xc9: generate_opc9(block, compiler, desc); break; - case 0xca: generate_opca(block, compiler, desc); break; - case 0xcb: generate_opcb(block, compiler, desc); break; - case 0xcc: generate_opcc(block, compiler, desc); break; - case 0xcd: generate_opcd(block, compiler, desc); break; - case 0xce: generate_opce(block, compiler, desc); break; - case 0xcf: generate_opcf(block, compiler, desc); break; - case 0xd0: generate_opd0(block, compiler, desc); break; - case 0xd1: generate_opd1(block, compiler, desc); break; - case 0xd2: generate_opd2(block, compiler, desc); break; - case 0xd3: generate_opd3(block, compiler, desc); break; - case 0xd4: generate_opd4(block, compiler, desc); break; - case 0xd5: generate_opd5(block, compiler, desc); break; - case 0xd6: generate_opd6(block, compiler, desc); break; - case 0xd7: generate_opd7(block, compiler, desc); break; - case 0xd8: generate_opd8(block, compiler, desc); break; - case 0xd9: generate_opd9(block, compiler, desc); break; - case 0xda: generate_opda(block, compiler, desc); break; - case 0xdb: generate_opdb(block, compiler, desc); break; - case 0xdc: generate_opdc(block, compiler, desc); break; - case 0xdd: generate_opdd(block, compiler, desc); break; - case 0xde: generate_opde(block, compiler, desc); break; - case 0xdf: generate_opdf(block, compiler, desc); break; - case 0xe0: generate_ope0(block, compiler, desc); break; - case 0xe1: generate_ope1(block, compiler, desc); break; - case 0xe2: generate_ope2(block, compiler, desc); break; - case 0xe3: generate_ope3(block, compiler, desc); break; - case 0xe4: generate_ope4(block, compiler, desc); break; - case 0xe5: generate_ope5(block, compiler, desc); break; - case 0xe6: generate_ope6(block, compiler, desc); break; - case 0xe7: generate_ope7(block, compiler, desc); break; - case 0xe8: generate_ope8(block, compiler, desc); break; - case 0xe9: generate_ope9(block, compiler, desc); break; - case 0xea: generate_opea(block, compiler, desc); break; - case 0xeb: generate_opeb(block, compiler, desc); break; - case 0xec: generate_opec(block, compiler, desc); break; - case 0xed: generate_oped(block, compiler, desc); break; - case 0xee: generate_opee(block, compiler, desc); break; - case 0xef: generate_opef(block, compiler, desc); break; - case 0xf0: generate_opf0(block, compiler, desc); break; - case 0xf1: generate_opf1(block, compiler, desc); break; - case 0xf2: generate_opf2(block, compiler, desc); break; - case 0xf3: generate_opf3(block, compiler, desc); break; - case 0xf4: generate_opf4(block, compiler, desc); break; - case 0xf5: generate_opf5(block, compiler, desc); break; - case 0xf6: generate_opf6(block, compiler, desc); break; - case 0xf7: generate_opf7(block, compiler, desc); break; - case 0xf8: generate_opf8(block, compiler, desc); break; - case 0xf9: generate_opf9(block, compiler, desc); break; - case 0xfa: generate_opfa(block, compiler, desc); break; - case 0xfb: generate_opfb(block, compiler, desc); break; - case 0xfc: generate_opfc(block, compiler, desc); break; - case 0xfd: generate_opfd(block, compiler, desc); break; - case 0xfe: generate_opfe(block, compiler, desc); break; - case 0xff: generate_opff(block, compiler, desc); break; + case 0x00: generate_chk(block, compiler, desc); break; + case 0x01: generate_chk(block, compiler, desc); break; + case 0x02: generate_chk(block, compiler, desc); break; + case 0x03: generate_chk(block, compiler, desc); break; + case 0x04: generate_movd(block, compiler, desc); break; + case 0x05: generate_movd(block, compiler, desc); break; + case 0x06: generate_movd(block, compiler, desc); break; + case 0x07: generate_movd(block, compiler, desc); break; + case 0x08: generate_divsu(block, compiler, desc); break; + case 0x09: generate_divsu(block, compiler, desc); break; + case 0x0a: generate_divsu(block, compiler, desc); break; + case 0x0b: generate_divsu(block, compiler, desc); break; + case 0x0c: generate_divsu(block, compiler, desc); break; + case 0x0d: generate_divsu(block, compiler, desc); break; + case 0x0e: generate_divsu(block, compiler, desc); break; + case 0x0f: generate_divsu(block, compiler, desc); break; + case 0x10: generate_xm(block, compiler, desc); break; + case 0x11: generate_xm(block, compiler, desc); break; + case 0x12: generate_xm(block, compiler, desc); break; + case 0x13: generate_xm(block, compiler, desc); break; + case 0x14: generate_mask(block, compiler, desc); break; + case 0x15: generate_mask(block, compiler, desc); break; + case 0x16: generate_mask(block, compiler, desc); break; + case 0x17: generate_mask(block, compiler, desc); break; + case 0x18: generate_sum(block, compiler, desc); break; + case 0x19: generate_sum(block, compiler, desc); break; + case 0x1a: generate_sum(block, compiler, desc); break; + case 0x1b: generate_sum(block, compiler, desc); break; + case 0x1c: generate_sums(block, compiler, desc); break; + case 0x1d: generate_sums(block, compiler, desc); break; + case 0x1e: generate_sums(block, compiler, desc); break; + case 0x1f: generate_sums(block, compiler, desc); break; + case 0x20: generate_cmp(block, compiler, desc); break; + case 0x21: generate_cmp(block, compiler, desc); break; + case 0x22: generate_cmp(block, compiler, desc); break; + case 0x23: generate_cmp(block, compiler, desc); break; + case 0x24: generate_mov(block, compiler, desc); break; + case 0x25: generate_mov(block, compiler, desc); break; + case 0x26: generate_mov(block, compiler, desc); break; + case 0x27: generate_mov(block, compiler, desc); break; + case 0x28: generate_add(block, compiler, desc); break; + case 0x29: generate_add(block, compiler, desc); break; + case 0x2a: generate_add(block, compiler, desc); break; + case 0x2b: generate_add(block, compiler, desc); break; + case 0x2c: generate_adds(block, compiler, desc); break; + case 0x2d: generate_adds(block, compiler, desc); break; + case 0x2e: generate_adds(block, compiler, desc); break; + case 0x2f: generate_adds(block, compiler, desc); break; + case 0x30: generate_cmpb(block, compiler, desc); break; + case 0x31: generate_cmpb(block, compiler, desc); break; + case 0x32: generate_cmpb(block, compiler, desc); break; + case 0x33: generate_cmpb(block, compiler, desc); break; + case 0x34: generate_andn(block, compiler, desc); break; + case 0x35: generate_andn(block, compiler, desc); break; + case 0x36: generate_andn(block, compiler, desc); break; + case 0x37: generate_andn(block, compiler, desc); break; + case 0x38: generate_or(block, compiler, desc); break; + case 0x39: generate_or(block, compiler, desc); break; + case 0x3a: generate_or(block, compiler, desc); break; + case 0x3b: generate_or(block, compiler, desc); break; + case 0x3c: generate_xor(block, compiler, desc); break; + case 0x3d: generate_xor(block, compiler, desc); break; + case 0x3e: generate_xor(block, compiler, desc); break; + case 0x3f: generate_xor(block, compiler, desc); break; + case 0x40: generate_subc(block, compiler, desc); break; + case 0x41: generate_subc(block, compiler, desc); break; + case 0x42: generate_subc(block, compiler, desc); break; + case 0x43: generate_subc(block, compiler, desc); break; + case 0x44: generate_not(block, compiler, desc); break; + case 0x45: generate_not(block, compiler, desc); break; + case 0x46: generate_not(block, compiler, desc); break; + case 0x47: generate_not(block, compiler, desc); break; + case 0x48: generate_sub(block, compiler, desc); break; + case 0x49: generate_sub(block, compiler, desc); break; + case 0x4a: generate_sub(block, compiler, desc); break; + case 0x4b: generate_sub(block, compiler, desc); break; + case 0x4c: generate_subs(block, compiler, desc); break; + case 0x4d: generate_subs(block, compiler, desc); break; + case 0x4e: generate_subs(block, compiler, desc); break; + case 0x4f: generate_subs(block, compiler, desc); break; + case 0x50: generate_addc(block, compiler, desc); break; + case 0x51: generate_addc(block, compiler, desc); break; + case 0x52: generate_addc(block, compiler, desc); break; + case 0x53: generate_addc(block, compiler, desc); break; + case 0x54: generate_and(block, compiler, desc); break; + case 0x55: generate_and(block, compiler, desc); break; + case 0x56: generate_and(block, compiler, desc); break; + case 0x57: generate_and(block, compiler, desc); break; + case 0x58: generate_neg(block, compiler, desc); break; + case 0x59: generate_neg(block, compiler, desc); break; + case 0x5a: generate_neg(block, compiler, desc); break; + case 0x5b: generate_neg(block, compiler, desc); break; + case 0x5c: generate_negs(block, compiler, desc); break; + case 0x5d: generate_negs(block, compiler, desc); break; + case 0x5e: generate_negs(block, compiler, desc); break; + case 0x5f: generate_negs(block, compiler, desc); break; + case 0x60: generate_cmpi(block, compiler, desc); break; + case 0x61: generate_cmpi(block, compiler, desc); break; + case 0x62: generate_cmpi(block, compiler, desc); break; + case 0x63: generate_cmpi(block, compiler, desc); break; + case 0x64: label = generate_movi(block, compiler, desc); break; + case 0x65: label = generate_movi(block, compiler, desc); break; + case 0x66: label = generate_movi(block, compiler, desc); break; + case 0x67: label = generate_movi(block, compiler, desc); break; + case 0x68: generate_addi(block, compiler, desc); break; + case 0x69: generate_addi(block, compiler, desc); break; + case 0x6a: generate_addi(block, compiler, desc); break; + case 0x6b: generate_addi(block, compiler, desc); break; + case 0x6c: generate_addsi(block, compiler, desc); break; + case 0x6d: generate_addsi(block, compiler, desc); break; + case 0x6e: generate_addsi(block, compiler, desc); break; + case 0x6f: generate_addsi(block, compiler, desc); break; + case 0x70: generate_cmpbi(block, compiler, desc); break; + case 0x71: generate_cmpbi(block, compiler, desc); break; + case 0x72: generate_cmpbi(block, compiler, desc); break; + case 0x73: generate_cmpbi(block, compiler, desc); break; + case 0x74: generate_andni(block, compiler, desc); break; + case 0x75: generate_andni(block, compiler, desc); break; + case 0x76: generate_andni(block, compiler, desc); break; + case 0x77: generate_andni(block, compiler, desc); break; + case 0x78: generate_ori(block, compiler, desc); break; + case 0x79: generate_ori(block, compiler, desc); break; + case 0x7a: generate_ori(block, compiler, desc); break; + case 0x7b: generate_ori(block, compiler, desc); break; + case 0x7c: generate_xori(block, compiler, desc); break; + case 0x7d: generate_xori(block, compiler, desc); break; + case 0x7e: generate_xori(block, compiler, desc); break; + case 0x7f: generate_xori(block, compiler, desc); break; + case 0x80: generate_shrdi(block, compiler, desc); break; + case 0x81: generate_shrdi(block, compiler, desc); break; + case 0x82: generate_shrd(block, compiler, desc); break; + case 0x83: generate_shr(block, compiler, desc); break; + case 0x84: generate_sardi(block, compiler, desc); break; + case 0x85: generate_sardi(block, compiler, desc); break; + case 0x86: generate_sard(block, compiler, desc); break; + case 0x87: generate_sar(block, compiler, desc); break; + case 0x88: generate_shldi(block, compiler, desc); break; + case 0x89: generate_shldi(block, compiler, desc); break; + case 0x8a: generate_shld(block, compiler, desc); break; + case 0x8b: generate_shl(block, compiler, desc); break; + case 0x8c: generate_reserved(block, compiler, desc); break; + case 0x8d: generate_reserved(block, compiler, desc); break; + case 0x8e: generate_testlz(block, compiler, desc); break; + case 0x8f: generate_rol(block, compiler, desc); break; + case 0x90: generate_ldxx1(block, compiler, desc); break; + case 0x91: generate_ldxx1(block, compiler, desc); break; + case 0x92: generate_ldxx1(block, compiler, desc); break; + case 0x93: generate_ldxx1(block, compiler, desc); break; + case 0x94: generate_ldxx2(block, compiler, desc); break; + case 0x95: generate_ldxx2(block, compiler, desc); break; + case 0x96: generate_ldxx2(block, compiler, desc); break; + case 0x97: generate_ldxx2(block, compiler, desc); break; + case 0x98: generate_stxx1(block, compiler, desc); break; + case 0x99: generate_stxx1(block, compiler, desc); break; + case 0x9a: generate_stxx1(block, compiler, desc); break; + case 0x9b: generate_stxx1(block, compiler, desc); break; + case 0x9c: generate_stxx2(block, compiler, desc); break; + case 0x9d: generate_stxx2(block, compiler, desc); break; + case 0x9e: generate_stxx2(block, compiler, desc); break; + case 0x9f: generate_stxx2(block, compiler, desc); break; + case 0xa0: generate_shri(block, compiler, desc); break; + case 0xa1: generate_shri(block, compiler, desc); break; + case 0xa2: generate_shri(block, compiler, desc); break; + case 0xa3: generate_shri(block, compiler, desc); break; + case 0xa4: generate_sari(block, compiler, desc); break; + case 0xa5: generate_sari(block, compiler, desc); break; + case 0xa6: generate_sari(block, compiler, desc); break; + case 0xa7: generate_sari(block, compiler, desc); break; + case 0xa8: generate_shli(block, compiler, desc); break; + case 0xa9: generate_shli(block, compiler, desc); break; + case 0xaa: generate_shli(block, compiler, desc); break; + case 0xab: generate_shli(block, compiler, desc); break; + case 0xac: generate_reserved(block, compiler, desc); break; + case 0xad: generate_reserved(block, compiler, desc); break; + case 0xae: generate_reserved(block, compiler, desc); break; + case 0xaf: generate_reserved(block, compiler, desc); break; + case 0xb0: generate_mulsu(block, compiler, desc); break; + case 0xb1: generate_mulsu(block, compiler, desc); break; + case 0xb2: generate_mulsu(block, compiler, desc); break; + case 0xb3: generate_mulsu(block, compiler, desc); break; + case 0xb4: generate_mulsu(block, compiler, desc); break; + case 0xb5: generate_mulsu(block, compiler, desc); break; + case 0xb6: generate_mulsu(block, compiler, desc); break; + case 0xb7: generate_mulsu(block, compiler, desc); break; + case 0xb8: generate_set(block, compiler, desc); break; + case 0xb9: generate_set(block, compiler, desc); break; + case 0xba: generate_set(block, compiler, desc); break; + case 0xbb: generate_set(block, compiler, desc); break; + case 0xbc: generate_mul(block, compiler, desc); break; + case 0xbd: generate_mul(block, compiler, desc); break; + case 0xbe: generate_mul(block, compiler, desc); break; + case 0xbf: generate_mul(block, compiler, desc); break; + case 0xc0: generate_software(block, compiler, desc); break; // fadd + case 0xc1: generate_software(block, compiler, desc); break; // faddd + case 0xc2: generate_software(block, compiler, desc); break; // fsub + case 0xc3: generate_software(block, compiler, desc); break; // fsubd + case 0xc4: generate_software(block, compiler, desc); break; // fmul + case 0xc5: generate_software(block, compiler, desc); break; // fmuld + case 0xc6: generate_software(block, compiler, desc); break; // fdiv + case 0xc7: generate_software(block, compiler, desc); break; // fdivd + case 0xc8: generate_software(block, compiler, desc); break; // fcmp + case 0xc9: generate_software(block, compiler, desc); break; // fcmpd + case 0xca: generate_software(block, compiler, desc); break; // fcmpu + case 0xcb: generate_software(block, compiler, desc); break; // fcmpud + case 0xcc: generate_software(block, compiler, desc); break; // fcvt + case 0xcd: generate_software(block, compiler, desc); break; // fcvtd + case 0xce: generate_extend(block, compiler, desc); break; + case 0xcf: generate_do(block, compiler, desc); break; + case 0xd0: generate_ldwr(block, compiler, desc); break; + case 0xd1: generate_ldwr(block, compiler, desc); break; + case 0xd2: generate_lddr(block, compiler, desc); break; + case 0xd3: generate_lddr(block, compiler, desc); break; + case 0xd4: generate_ldwp(block, compiler, desc); break; + case 0xd5: generate_ldwp(block, compiler, desc); break; + case 0xd6: generate_lddp(block, compiler, desc); break; + case 0xd7: generate_lddp(block, compiler, desc); break; + case 0xd8: generate_stwr(block, compiler, desc); break; + case 0xd9: generate_stwr(block, compiler, desc); break; + case 0xda: generate_stdr(block, compiler, desc); break; + case 0xdb: generate_stdr(block, compiler, desc); break; + case 0xdc: generate_stwp(block, compiler, desc); break; + case 0xdd: generate_stwp(block, compiler, desc); break; + case 0xde: generate_stdp(block, compiler, desc); break; + case 0xdf: generate_stdp(block, compiler, desc); break; + case 0xe0: generate_db(block, compiler, desc); break; + case 0xe1: generate_db(block, compiler, desc); break; + case 0xe2: generate_db(block, compiler, desc); break; + case 0xe3: generate_db(block, compiler, desc); break; + case 0xe4: generate_db(block, compiler, desc); break; + case 0xe5: generate_db(block, compiler, desc); break; + case 0xe6: generate_db(block, compiler, desc); break; + case 0xe7: generate_db(block, compiler, desc); break; + case 0xe8: generate_db(block, compiler, desc); break; + case 0xe9: generate_db(block, compiler, desc); break; + case 0xea: generate_db(block, compiler, desc); break; + case 0xeb: generate_db(block, compiler, desc); break; + case 0xec: generate_dbr(block, compiler, desc); break; + case 0xed: generate_frame(block, compiler, desc); break; + case 0xee: generate_call_global(block, compiler, desc); break; + case 0xef: generate_call_local(block, compiler, desc); break; + case 0xf0: generate_b(block, compiler, desc); break; + case 0xf1: generate_b(block, compiler, desc); break; + case 0xf2: generate_b(block, compiler, desc); break; + case 0xf3: generate_b(block, compiler, desc); break; + case 0xf4: generate_b(block, compiler, desc); break; + case 0xf5: generate_b(block, compiler, desc); break; + case 0xf6: generate_b(block, compiler, desc); break; + case 0xf7: generate_b(block, compiler, desc); break; + case 0xf8: generate_b(block, compiler, desc); break; + case 0xf9: generate_b(block, compiler, desc); break; + case 0xfa: generate_b(block, compiler, desc); break; + case 0xfb: generate_b(block, compiler, desc); break; + case 0xfc: generate_br(block, compiler, desc); break; + case 0xfd: generate_trap_op(block, compiler, desc); break; + case 0xfe: generate_trap_op(block, compiler, desc); break; + case 0xff: generate_trap_op(block, compiler, desc); break; } + + UML_AND(block, DRC_SR, DRC_SR, ~ILC_MASK); + UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); + + int done; + UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK)); + UML_CMP(block, I0, (T_MASK | P_MASK)); + UML_JMPc(block, uml::COND_NE, done = label++); + UML_TEST(block, mem(&m_delay_slot), 1); + UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0); + + UML_LABEL(block, done); return true; } \ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.cpp b/src/devices/cpu/e132xs/e132xsdrc_ops.cpp deleted file mode 100644 index 7c421f5af7a..00000000000 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.cpp +++ /dev/null @@ -1,1035 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz - -#include "e132xs.h" - -void hyperstone_device::generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - - -void hyperstone_device::generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - - - -void hyperstone_device::generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} - -void hyperstone_device::generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ -} diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx new file mode 100644 index 00000000000..4da04f7588d --- /dev/null +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -0,0 +1,575 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz + +#include "e132xs.h" + +void hyperstone_device::generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + /* if PC is used in a delay instruction, the delayed PC should be used */ + UML_TEST(block, mem(&m_delay_slot), 1); + UML_MOVc(block, COND_E, mem(m_global_regs), mem(&m_delay_pc)); + UML_MOVc(block, COND_E, mem(&m_delay_slot), 0); +} + +void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +int hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + static int32_t immediate_values[16] = + { + 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), + -8, -7, -6, -5, -4, -3, -2, -1 + }; + + int label = 1; + int nolut, done, zero_or_one, three; + + UML_AND(block, I1, I0, 0x0f); + UML_CMP(block, I1, 4); + UML_JMPc(block, COND_L, nolut = label++); + + // 4..f, immediate lookup + UML_LOAD(block, I1, (void *)immediate_values, I1, SIZE_DWORD, SCALE_x4); + UML_JMP(block, done = label++); + + UML_LABEL(block, nolut); + UML_CMP(block, I1, 2); + UML_JMPc(block, COND_L, zero_or_one = label++); + UML_JMPc(block, COND_G, three = label++); + + // 2 + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_JMP(block, done); + + // 0..1 + UML_LABEL(block, zero_or_one); + UML_TEST(block, I1, 1); + UML_MOVc(block, COND_E, I1, 16); // 0 + UML_JMPc(block, COND_E, done); // if 0, we exit here. if 1, we fall through. + + // 1 + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_SHL(block, I1, I1, 16); + UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); + UML_READ(block, I2, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); + UML_JMP(block, done); + + // 3 + UML_LABEL(block, three); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_SEXT(block, I1, I1, SIZE_WORD); + // fall through to done + + UML_LABEL(block, done); + return label; +} + +void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +int hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int label) +{ + // Expects register index in I0, value in I1 + return label; +} + +void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) +{ +} + +void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +int hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + int label = 1; + if (IMM_LONG) + { + label = generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + int done = label++; + if (DST_GLOBAL) + { + UML_AND(block, I2, mem(&m_global_regs[1]), H_MASK); + UML_TEST(block, mem(&m_global_regs[1]), S_MASK); + UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); + UML_JMPc(block, uml::COND_Z, done); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + + int no_z; + UML_TEST(block, I1, ~0); + UML_JMPc(block, uml::COND_NZ, no_z = label++); + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_LABEL(block, no_z); + + int no_n; + UML_TEST(block, I1, 0x80000000); + UML_JMPc(block, uml::COND_Z, no_n = label++); + UML_OR(block, DRC_SR, DRC_SR, N_MASK); + UML_LABEL(block, no_n); + +#if MISSIONCRAFT_FLAGS + UML_AND(block, DRC_SR, DRC_SR, ~V_MASK); +#endif + + UML_ROLAND(block, I0, I0, 30, 0x3c); + + if (DST_GLOBAL) + { + int no_pc; + UML_TEST(block, I0, 0xf0); + UML_JMPc(block, uml::COND_NZ, no_pc = label++); + UML_AND(block, mem(m_global_regs), I1, ~1); + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + generate_delay_slot_and_branch(block, compiler, desc); + UML_JMP(block, done); + + UML_LABEL(block, no_pc); + + // TODO + UML_JMP(block, done); + } + else + { + UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); + UML_ADD(block, I0, I0, I2); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } + + UML_LABEL(block, done); + return label; +} + + +template +void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +template +void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_call_global(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_call_local(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + + +void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + +void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ +} + diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index b0ece09d68f..c13e72f8e89 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -10,6 +10,7 @@ #include "emu.h" #include "e132xsfe.h" +#include "32xsdefs.h" #define FE_FP ((m_cpu->m_global_regs[1] & 0xfe000000) >> 25) #define FE_FL (m_cpu->m_fl_lut[((m_cpu->m_global_regs[1] >> 21) & 0xf)]) @@ -69,6 +70,30 @@ inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) return extra_s; } +inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op) +{ + static const int32_t immediate_values[16] = + { + 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), + -8, -7, -6, -5, -4, -3, -2, -1 + }; + + uint8_t nybble = op & 0xf; + switch (nybble) + { + case 0: + return 16; + case 1: + return (read_imm1(desc) << 16) | read_imm2(desc); + case 2: + return read_imm1(desc); + case 3: + return 0xffff0000 | read_imm1(desc); + default: + return immediate_values[nybble]; + } +} + inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) { if (op & 0x80) @@ -119,7 +144,7 @@ inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint16_t op = read_word(desc); + uint16_t op = desc.opptr.w[0] = read_word(desc); /* most instructions are 2 bytes and a single cycle */ desc.length = 2; @@ -326,6 +351,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x19: // sum global,local case 0x1d: // sums global,local @@ -334,6 +360,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x1a: // sum local,global case 0x1e: // sums local,global @@ -342,6 +369,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x1b: // sum local,local case 0x1f: // sums local,local @@ -350,6 +378,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x20: // cmp global,global case 0x30: // cmpb global,global @@ -384,12 +413,14 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << (gsrc_code + 16); desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x25: // mov global,local desc.regin[0] |= SR_CODE; desc.regin[lsrc_group] |= 1 << lsrc_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x26: // mov local,global desc.regin[0] |= SR_CODE; @@ -549,24 +580,28 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << gsrc_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x5d: // negs global,local desc.regin[0] |= SR_CODE; desc.regin[lsrc_group] |= 1 << lsrc_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x5e: // negs local,global desc.regin[0] |= SR_CODE; desc.regin[0] |= 1 << gsrc_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x5f: // negs local,local desc.regin[0] |= SR_CODE; desc.regin[lsrc_group] |= 1 << lsrc_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; break; case 0x60: // cmpi global,simm case 0x70: // cmpbi global,simm @@ -597,6 +632,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= 1 << (gdst_code + 16); desc.regout[0] |= SR_CODE; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = op & 0xf; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x65: // movi global,limm desc.regin[0] |= SR_CODE; @@ -604,6 +645,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << (gdst_code + 16); desc.regout[0] |= SR_CODE; desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = read_limm(desc, op); + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x66: // movi local,simm desc.regin[0] |= SR_CODE; diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h index 1d42177110a..1cac61a08cd 100644 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -23,6 +23,7 @@ private: inline uint16_t read_imm1(opcode_desc &desc); inline uint16_t read_imm2(opcode_desc &desc); inline uint32_t read_ldstxx_imm(opcode_desc &desc); + inline uint32_t read_limm(opcode_desc &desc, uint16_t op); inline int32_t decode_pcrel(opcode_desc &desc, uint16_t op); inline int32_t decode_call(opcode_desc &desc); diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index e9290ea4ab1..22b39a70818 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -277,10 +277,12 @@ void hyperstone_device::hyperstone_sums() const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]); const int64_t tmp = int64_t(sreg) + int64_t(extra_s); + + SR &= ~(Z_MASK | N_MASK | V_MASK); SR |= ((sreg ^ tmp) & (extra_s ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + extra_s; @@ -318,15 +320,14 @@ void hyperstone_device::hyperstone_cmp() SR &= ~(Z_MASK | N_MASK | V_MASK | C_MASK); SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; - if (dreg == sreg) + if (dreg < sreg) + SR |= C_MASK; + else if (dreg == sreg) SR |= Z_MASK; if (int32_t(dreg) < int32_t(sreg)) SR |= N_MASK; - if (dreg < sreg) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -425,7 +426,7 @@ void hyperstone_device::hyperstone_adds() SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = sreg + dreg; @@ -655,7 +656,7 @@ void hyperstone_device::hyperstone_subs() SR &= ~(V_MASK | Z_MASK | N_MASK); //#ifdef SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28; @@ -700,13 +701,13 @@ void hyperstone_device::hyperstone_addc() if (SRC_GLOBAL && (src_code == SR_REGISTER)) { tmp = uint64_t(dreg) + uint64_t(c); - SR |= ((dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += c; } else { tmp = uint64_t(sreg) + uint64_t(dreg) + uint64_t(c); - SR |= ((sreg ^ tmp) & (dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28; + SR |= ((sreg ^ tmp) & (dreg ^ tmp) & tmp & 0x80000000) >> 28; dreg += sreg + c; } @@ -792,7 +793,7 @@ void hyperstone_device::hyperstone_negs() SR |= V_MASK; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = -sreg; @@ -824,7 +825,7 @@ void hyperstone_device::hyperstone_cmpi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f); const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; @@ -833,15 +834,14 @@ void hyperstone_device::hyperstone_cmpi() uint64_t tmp = (uint64_t)dreg - (uint64_t)imm; SR |= ((tmp ^ dreg) & (dreg ^ imm) & 0x80000000) >> 28; - if (dreg == imm) + if (dreg < imm) + SR |= C_MASK; + else if (dreg == imm) SR |= Z_MASK; if ((int32_t)dreg < (int32_t)imm) SR |= N_MASK; - if (dreg < imm) - SR |= C_MASK; - m_icount -= m_clock_cycles_1; } @@ -854,7 +854,7 @@ void hyperstone_device::hyperstone_movi() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; const bool h = (SR & H_MASK) != 0; if (DST_GLOBAL && h && !(SR & S_MASK)) @@ -903,7 +903,7 @@ void hyperstone_device::hyperstone_addi() if (!N_OP_MASK) imm = GET_C & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01)); else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK); @@ -952,7 +952,7 @@ void hyperstone_device::hyperstone_addsi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } else @@ -971,7 +971,7 @@ void hyperstone_device::hyperstone_addsi() SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28; //#if SETCARRYS -// CHECK_C(tmp); +// SR |= (tmp & 0x100000000) >> 32; //#endif const int32_t res = imm + (int32_t)dreg; @@ -1023,7 +1023,7 @@ void hyperstone_device::hyperstone_cmpbi() } else { - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; } } @@ -1060,7 +1060,7 @@ void hyperstone_device::hyperstone_andni() if (N_OP_MASK == 0x10f) imm = 0x7fffffff; // bit 31 = 0, others = 1 else if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) @@ -1100,7 +1100,7 @@ void hyperstone_device::hyperstone_ori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { @@ -1138,7 +1138,7 @@ void hyperstone_device::hyperstone_xori() check_delay_PC(); if (!IMM_LONG) - imm = immediate_values[m_op & 0x0f]; + imm = m_op & 0x0f; uint32_t dreg; if (DST_GLOBAL) { @@ -2535,7 +2535,7 @@ void hyperstone_device::hyperstone_lddr() } template -void hyperstone_device::hypesrtone_ldwp() +void hyperstone_device::hyperstone_ldwp() { check_delay_PC(); @@ -2677,7 +2677,7 @@ void hyperstone_device::hyperstone_db() { const int32_t offset = decode_pcrel(); check_delay_PC(); - m_delay_slot = true; + m_delay_slot = 1; m_delay_pc = PC + offset; m_intblock = 3; } @@ -2698,7 +2698,7 @@ void hyperstone_device::hyperstone_db() { const int32_t offset = decode_pcrel(); check_delay_PC(); - m_delay_slot = true; + m_delay_slot = 1; m_delay_pc = PC + offset; m_intblock = 3; } @@ -2712,7 +2712,7 @@ void hyperstone_device::hyperstone_dbr() const int32_t offset = decode_pcrel(); check_delay_PC(); - m_delay_slot = true; + m_delay_slot = 1; m_delay_pc = PC + offset; m_intblock = 3; } @@ -2885,7 +2885,7 @@ void hyperstone_device::hyperstone_b() { if (SR & condition_masks[CONDITION]) { - execute_br(); + hyperstone_br(); } else { @@ -2904,7 +2904,7 @@ void hyperstone_device::hyperstone_b() } else { - execute_br(); + hyperstone_br(); } } } -- cgit v1.2.3-70-g09d2 From ad5172a47d188aba6ee26da5afc46d28f61ff23f Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Tue, 28 Nov 2017 21:44:53 +0100 Subject: e132xs: Added mask, sum, cmpi, movi, and ori, nw --- src/devices/cpu/e132xs/e132xs.cpp | 71 +++--- src/devices/cpu/e132xs/e132xs.h | 22 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 123 ++++++---- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 388 +++++++++++++++++++++++++++---- src/devices/cpu/e132xs/e132xsfe.cpp | 83 ++++++- src/devices/cpu/e132xs/e132xsfe.h | 1 + src/devices/cpu/e132xs/e132xsop.hxx | 6 +- src/devices/cpu/uml.h | 16 +- 8 files changed, 553 insertions(+), 157 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 3a31e93a2a9..a200a57261f 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1,4 +1,3 @@ - // license:BSD-3-Clause // copyright-holders:Pierpaolo Prazzoli /******************************************************************** @@ -401,46 +400,26 @@ uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */ return addr; } -void hyperstone_device::hyperstone_set_trap_entry(int which) -{ - switch( which ) - { - case E132XS_ENTRY_MEM0: - m_trap_entry = 0x00000000; - break; - - case E132XS_ENTRY_MEM1: - m_trap_entry = 0x40000000; - break; - - case E132XS_ENTRY_MEM2: - m_trap_entry = 0x80000000; - break; - - case E132XS_ENTRY_MEM3: - m_trap_entry = 0xffffff00; - break; - - case E132XS_ENTRY_IRAM: - m_trap_entry = 0xc0000000; - break; - - default: - LOG("Set entry point to a reserved value: %d\n", which); - break; - } -} +/*static*/ const uint32_t hyperstone_device::s_trap_entries[8] = { + 0x00000000, // MEM0 + 0x40000000, // MEM1 + 0x80000000, // MEM2 + 0xc0000000, // IRAM + 0, + 0, + 0, + 0xffffff00, // MEM3 +}; -uint32_t hyperstone_device::compute_tr() +void hyperstone_device::compute_tr() { uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles; uint64_t clocks_since_base = cycles_since_base >> m_clck_scale; - return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); + m_tr_result = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick); } void hyperstone_device::update_timer_prescale() { - uint32_t prevtr = compute_tr(); TPR &= ~0x80000000; m_clck_scale = (TPR >> 26) & m_clock_scale_mask; m_clock_cycles_1 = 1 << m_clck_scale; @@ -449,7 +428,7 @@ void hyperstone_device::update_timer_prescale() m_clock_cycles_4 = 4 << m_clck_scale; m_clock_cycles_6 = 6 << m_clck_scale; m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2; - m_tr_base_value = prevtr; + m_tr_base_value = m_tr_result; m_tr_base_cycles = total_cycles(); } @@ -499,10 +478,13 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback ) /* update the values if necessary */ if (update) + { + compute_tr(); update_timer_prescale(); + } /* see if the timer is right for firing */ - if (!((compute_tr() - TCR) & 0x80000000)) + if (!((m_tr_result - TCR) & 0x80000000)) m_timer_int_pending = 1; /* adjust ourselves for the next time */ @@ -552,7 +534,8 @@ uint32_t hyperstone_device::get_global_register(uint8_t code) /* it is common to poll this in a loop */ if (m_icount > m_tr_clocks_per_tick / 2) m_icount -= m_tr_clocks_per_tick / 2; - return compute_tr(); + compute_tr(); + return m_tr_result; } return m_global_regs[code & 0x1f]; } @@ -606,7 +589,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) case TPR_REGISTER: m_global_regs[code] = val; if (!(val & 0x80000000)) /* change immediately */ + { + compute_tr(); update_timer_prescale(); + } adjust_timer_interrupt(); return; case TCR_REGISTER: @@ -632,15 +618,19 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) case FCR_REGISTER: if ((m_global_regs[code] ^ val) & 0x00800000) adjust_timer_interrupt(); - m_global_regs[code] = val; + m_global_regs[code] = val; if (m_intblock < 1) m_intblock = 1; return; case MCR_REGISTER: + { // bits 14..12 EntryTableMap - hyperstone_set_trap_entry((val & 0x7000) >> 12); + const int which = (val & 0x7000) >> 12; + assert(which < 4 || which == 7); + m_trap_entry = s_trap_entries[which]; m_global_regs[code] = val; return; + } case 28: case 29: case 30: @@ -1043,6 +1033,7 @@ void hyperstone_device::init(int scale_mask) m_tr_base_cycles = 0; m_tr_base_value = 0; + m_tr_result = 0; m_tr_clocks_per_tick = 0; m_timer_int_pending = 0; @@ -1081,7 +1072,7 @@ void hyperstone_device::init(int scale_mask) for (int i=0; i < 64; i++) { sprintf(buf, "l%d", i); - m_drcuml->symbol_add(&m_global_regs[i], sizeof(uint32_t), buf); + m_drcuml->symbol_add(&m_local_regs[i], sizeof(uint32_t), buf); } m_drcuml->symbol_add(&m_drc_arg0, sizeof(uint32_t), "arg0"); @@ -1328,7 +1319,7 @@ void hyperstone_device::device_reset() m_tr_clocks_per_tick = 2; - hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */ + m_trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3 set_global_register(BCR_REGISTER, ~0); set_global_register(MCR_REGISTER, ~0); diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 93247a4bbc1..14e82bcd3ed 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -65,6 +65,10 @@ class hyperstone_device : public cpu_device public: inline void ccfunc_unimplemented(); inline void ccfunc_print(); + inline void ccfunc_total_cycles(); + void update_timer_prescale(); + void compute_tr(); + void adjust_timer_interrupt(); protected: enum @@ -223,10 +227,13 @@ protected: uint64_t m_tr_base_cycles; uint32_t m_tr_base_value; + uint32_t m_tr_result; uint32_t m_tr_clocks_per_tick; uint8_t m_timer_int_pending; emu_timer *m_timer; + uint64_t m_numcycles; + uint32_t m_delay_pc; uint32_t m_delay_slot; @@ -239,6 +246,7 @@ protected: int m_icount; uint8_t m_fl_lut[16]; + static const uint32_t s_trap_entries[8]; static const int32_t s_immediate_values[16]; uint32_t get_trap_addr(uint8_t trapno); @@ -253,10 +261,6 @@ private: uint32_t get_global_register(uint8_t code); uint32_t get_emu_code_addr(uint8_t num); - void hyperstone_set_trap_entry(int which); - uint32_t compute_tr(); - void update_timer_prescale(); - void adjust_timer_interrupt(); TIMER_CALLBACK_MEMBER(timer_callback); @@ -407,15 +411,15 @@ private: void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - int generate_get_trap_addr(drcuml_block *block, int label, uint32_t trapno); - void generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno); + void generate_check_delay_pc(drcuml_block *block); void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - int generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - int generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int label); + void generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); void generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); @@ -446,7 +450,7 @@ private: template void generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template int generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 43dc59dd016..c180cd62f95 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -7,6 +7,7 @@ using namespace uml; +#define DRC_PC mem(m_global_regs) #define DRC_SR mem(&m_global_regs[1]) void hyperstone_device::execute_run_drc() @@ -44,6 +45,66 @@ void hyperstone_device::execute_run_drc() } while (execute_result != EXECUTE_OUT_OF_CYCLES); } + +/*************************************************************************** + C FUNCTION CALLBACKS +***************************************************************************/ + +/*------------------------------------------------- + cfunc_unimplemented - handler for + unimplemented opcdes +-------------------------------------------------*/ + +inline void hyperstone_device::ccfunc_unimplemented() +{ + fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); +} + +inline void hyperstone_device::ccfunc_print() +{ + printf("%c: %08X\n", (char)m_drc_arg0, m_drc_arg1); +} + +static void cfunc_unimplemented(void *param) +{ + ((hyperstone_device *)param)->ccfunc_unimplemented(); +} + +static void cfunc_adjust_timer_interrupt(void *param) +{ + ((hyperstone_device *)param)->adjust_timer_interrupt(); +} + +static void cfunc_compute_tr(void *param) +{ + ((hyperstone_device *)param)->compute_tr(); +} + +static void cfunc_update_timer_prescale(void *param) +{ + ((hyperstone_device *)param)->update_timer_prescale(); +} + +static void cfunc_print(void *param) +{ + ((hyperstone_device *)param)->ccfunc_print(); +} + +/*------------------------------------------------- + ccfunc_total_cycles - compute the total number + of cycles executed so far +-------------------------------------------------*/ + +void hyperstone_device::ccfunc_total_cycles() +{ + m_numcycles = total_cycles(); +} + +static void cfunc_total_cycles(void *param) +{ + ((hyperstone_device *)param)->ccfunc_total_cycles(); +} + /*************************************************************************** CACHE MANAGEMENT ***************************************************************************/ @@ -99,7 +160,7 @@ void hyperstone_device::code_flush_cache() } /* Return the entry point for a determinated trap */ -int hyperstone_device::generate_get_trap_addr(drcuml_block *block, int label, uint32_t trapno) +void hyperstone_device::generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno) { int no_mem3; UML_MOV(block, I0, trapno); @@ -110,7 +171,6 @@ int hyperstone_device::generate_get_trap_addr(drcuml_block *block, int label, ui UML_LABEL(block, no_mem3); UML_SHL(block, I0, I0, 2); UML_OR(block, I0, I0, mem(&m_trap_entry)); - return label; } /*------------------------------------------------- @@ -196,7 +256,9 @@ void hyperstone_device::code_compile_block(offs_t pc) /* otherwise we just go to the next instruction */ else - nextpc = seqlast->pc + (seqlast->skipslots + 1) * 2; + { + nextpc = seqlast->pc + seqlast->length; + } /* count off cycles and go there */ generate_update_cycles(block, &compiler, nextpc); // @@ -220,37 +282,6 @@ void hyperstone_device::code_compile_block(offs_t pc) } } -/*************************************************************************** - C FUNCTION CALLBACKS -***************************************************************************/ - -/*------------------------------------------------- - cfunc_unimplemented - handler for - unimplemented opcdes --------------------------------------------------*/ - -inline void hyperstone_device::ccfunc_unimplemented() -{ - fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); -} - -inline void hyperstone_device::ccfunc_print() -{ - printf("%c: %08X\n", (char)m_drc_arg0, m_drc_arg1); -} - -static void cfunc_unimplemented(void *param) -{ - ((hyperstone_device *)param)->ccfunc_unimplemented(); -} - -#if 0 -static void cfunc_print(void *param) -{ - ((hyperstone_device *)param)->ccfunc_print(); -} -#endif - /*************************************************************************** STATIC CODEGEN ***************************************************************************/ @@ -294,7 +325,8 @@ void hyperstone_device::static_generate_exception(uint32_t exception, const char alloc_handle(drcuml, &exception_handle, name); UML_HANDLE(block, *exception_handle); - generate_get_trap_addr(block, 1, exception); + uml::code_label label = 1; + generate_get_trap_addr(block, label, exception); UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); UML_ROLAND(block, I2, DRC_SR, 11, 0xf); UML_TEST(block, I2, 0xf); @@ -309,7 +341,7 @@ void hyperstone_device::static_generate_exception(uint32_t exception, const char UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); UML_AND(block, I3, I1, 0x3f); - UML_AND(block, I1, mem(m_global_regs), ~1); + UML_AND(block, I1, DRC_PC, ~1); UML_ROLAND(block, I2, DRC_SR, 14, 1); UML_OR(block, I1, I1, I2); UML_STORE(block, (void *)m_local_regs, I3, I1, SIZE_DWORD, SCALE_x4); @@ -320,7 +352,7 @@ void hyperstone_device::static_generate_exception(uint32_t exception, const char UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK)); UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK)); - UML_MOV(block, mem(m_global_regs), I0); + UML_MOV(block, DRC_PC, I0); UML_SUB(block, mem(&m_icount), mem(&m_icount), 2); UML_EXHc(block, COND_S, *m_out_of_cycles, 0); @@ -622,7 +654,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi /* if we are debugging, call the debugger */ if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) { - UML_MOV(block, mem(m_global_regs), desc->pc); + UML_MOV(block, DRC_PC, desc->pc); //save_fast_iregs(block); UML_DEBUG(block, desc->pc); } @@ -632,7 +664,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { - UML_MOV(block, mem(m_global_regs), desc->pc); + UML_MOV(block, DRC_PC, desc->pc); UML_MOV(block, mem(&m_drc_arg0), desc->opptr.l[0]); UML_CALLC(block, cfunc_unimplemented, this); } @@ -649,10 +681,9 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com UML_MOV(block, I0, op); UML_AND(block, I7, DRC_SR, H_MASK); - UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); + UML_ADD(block, DRC_PC, DRC_PC, 2); UML_MOV(block, mem(&m_instruction_length), (1 << 19)); - int label = 1; switch (op >> 8) { case 0x00: generate_chk(block, compiler, desc); break; @@ -755,10 +786,10 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com case 0x61: generate_cmpi(block, compiler, desc); break; case 0x62: generate_cmpi(block, compiler, desc); break; case 0x63: generate_cmpi(block, compiler, desc); break; - case 0x64: label = generate_movi(block, compiler, desc); break; - case 0x65: label = generate_movi(block, compiler, desc); break; - case 0x66: label = generate_movi(block, compiler, desc); break; - case 0x67: label = generate_movi(block, compiler, desc); break; + case 0x64: generate_movi(block, compiler, desc); break; + case 0x65: generate_movi(block, compiler, desc); break; + case 0x66: generate_movi(block, compiler, desc); break; + case 0x67: generate_movi(block, compiler, desc); break; case 0x68: generate_addi(block, compiler, desc); break; case 0x69: generate_addi(block, compiler, desc); break; case 0x6a: generate_addi(block, compiler, desc); break; @@ -919,7 +950,7 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com int done; UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK)); UML_CMP(block, I0, (T_MASK | P_MASK)); - UML_JMPc(block, uml::COND_NE, done = label++); + UML_JMPc(block, uml::COND_NE, done = compiler->m_labelnum++); UML_TEST(block, mem(&m_delay_slot), 1); UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0); diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 4da04f7588d..26d58a071c9 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -3,19 +3,51 @@ #include "e132xs.h" -void hyperstone_device::generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_check_delay_pc(drcuml_block *block) { /* if PC is used in a delay instruction, the delayed PC should be used */ UML_TEST(block, mem(&m_delay_slot), 1); - UML_MOVc(block, COND_E, mem(m_global_regs), mem(&m_delay_pc)); - UML_MOVc(block, COND_E, mem(&m_delay_slot), 0); + UML_MOVc(block, uml::COND_NZ, DRC_PC, mem(&m_delay_pc)); + UML_MOVc(block, uml::COND_NZ, mem(&m_delay_slot), 0); } void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + int half_read; + UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_TEST(block, I1, 0x8000); + UML_JMPc(block, uml::COND_Z, half_read = compiler->m_labelnum++); + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + + int skip; + UML_SHL(block, I1, I1, 16); + UML_AND(block, I2, I1, 0x3fff0000); + UML_TEST(block, I1, 0x40000000); + UML_MOVc(block, uml::COND_Z, I1, I2); + UML_JMPc(block, uml::COND_Z, skip = compiler->m_labelnum++); + UML_OR(block, I1, I2, 0xc0000000); + UML_LABEL(block, skip); + UML_READ(block, I2, DRC_PC, SIZE_WORD, SPACE_PROGRAM); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_OR(block, I1, I1, I2); + + int done; + UML_JMP(block, done = compiler->m_labelnum++); + + UML_LABEL(block, half_read); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_TEST(block, I1, 0x4000); + UML_MOVc(block, uml::COND_NZ, I2, 0xffffc000); + UML_MOVc(block, uml::COND_Z, I2, 0); + UML_AND(block, I1, I1, 0x3fff); + UML_OR(block, I1, I1, I2); + + UML_LABEL(block, done); } -int hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { static int32_t immediate_values[16] = { @@ -23,25 +55,24 @@ int hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler -8, -7, -6, -5, -4, -3, -2, -1 }; - int label = 1; int nolut, done, zero_or_one, three; UML_AND(block, I1, I0, 0x0f); UML_CMP(block, I1, 4); - UML_JMPc(block, COND_L, nolut = label++); + UML_JMPc(block, COND_L, nolut = compiler->m_labelnum++); // 4..f, immediate lookup UML_LOAD(block, I1, (void *)immediate_values, I1, SIZE_DWORD, SCALE_x4); - UML_JMP(block, done = label++); + UML_JMP(block, done = compiler->m_labelnum++); UML_LABEL(block, nolut); UML_CMP(block, I1, 2); - UML_JMPc(block, COND_L, zero_or_one = label++); - UML_JMPc(block, COND_G, three = label++); + UML_JMPc(block, COND_L, zero_or_one = compiler->m_labelnum++); + UML_JMPc(block, COND_G, three = compiler->m_labelnum++); // 2 UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); UML_JMP(block, done); // 0..1 @@ -52,22 +83,21 @@ int hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler // 1 UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); UML_SHL(block, I1, I1, 16); - UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); - UML_READ(block, I2, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); - UML_ADD(block, mem(m_global_regs), mem(m_global_regs), 2); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_READ(block, I2, DRC_PC, SIZE_WORD, SPACE_PROGRAM); + UML_ADD(block, DRC_PC, DRC_PC, 2); UML_JMP(block, done); // 3 UML_LABEL(block, three); UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_READ(block, I1, mem(m_global_regs), SIZE_WORD, SPACE_PROGRAM); + UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); UML_SEXT(block, I1, I1, SIZE_WORD); // fall through to done UML_LABEL(block, done); - return label; } void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) @@ -82,10 +112,108 @@ void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, compiler_stat { } -int hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int label) +void hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - // Expects register index in I0, value in I1 - return label; + // Expects register index in I4, value in I5, clobbers I6 + int extended; + UML_CMP(block, I4, 16); + UML_JMPc(block, uml::COND_AE, extended = compiler->m_labelnum++); + + int generic_store, set_sr, done; + UML_CMP(block, I4, 1); + UML_JMPc(block, uml::COND_A, generic_store = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, set_sr = compiler->m_labelnum++); + UML_AND(block, DRC_PC, I5, ~1); + generate_delay_slot_and_branch(block, compiler, desc); + UML_JMP(block, done = compiler->m_labelnum++); + + UML_LABEL(block, set_sr); + UML_ROLINS(block, DRC_SR, I5, 0, 0x0000ffff); + UML_AND(block, DRC_SR, DRC_SR, ~0x40); + UML_TEST(block, mem(&m_intblock), ~0); + UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); + UML_JMP(block, done); + + UML_LABEL(block, generic_store); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_JMP(block, done); + + int above_bcr; + UML_LABEL(block, extended); + UML_CMP(block, I4, 17); + UML_JMPc(block, uml::COND_BE, generic_store); + UML_CMP(block, I4, BCR_REGISTER); + UML_JMPc(block, uml::COND_A, above_bcr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, generic_store); + + // SP or UB + UML_AND(block, I5, I5, ~3); + UML_JMP(block, generic_store); + + int set_tpr, set_tcr, set_tr, set_fcr; + UML_LABEL(block, above_bcr); + UML_CMP(block, I4, TCR_REGISTER); + UML_JMPc(block, uml::COND_B, set_tpr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, set_tcr = compiler->m_labelnum++); + // Above TCR + UML_CMP(block, I4, WCR_REGISTER); + UML_JMPc(block, uml::COND_B, set_tr = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_E, generic_store); // WCR + // Above WCR + UML_CMP(block, I4, FCR_REGISTER); + UML_JMPc(block, uml::COND_B, done); // ISR - read only + UML_JMPc(block, uml::COND_E, set_fcr = compiler->m_labelnum++); + UML_CMP(block, I4, MCR_REGISTER); + UML_JMPc(block, uml::COND_A, generic_store); // regs 28..31 + // Set MCR + UML_ROLAND(block, I6, I5, 20, 0x7); + UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4); + UML_MOV(block, mem(&m_trap_entry), I6); + UML_JMP(block, generic_store); + + int skip_compute_tr; + UML_LABEL(block, set_tpr); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_TEST(block, I5, 0x80000000); + UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler->m_labelnum++); + UML_CALLC(block, cfunc_compute_tr, this); + UML_CALLC(block, cfunc_update_timer_prescale, this); + UML_LABEL(block, skip_compute_tr); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_JMP(block, done); + + UML_LABEL(block, set_tcr); + UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); + UML_CMP(block, I6, I5); + UML_JMPc(block, uml::COND_E, done); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_CMP(block, mem(&m_intblock), 1); + UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); + UML_JMP(block, done); + + UML_LABEL(block, set_tr); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_MOV(block, mem(&m_tr_base_value), I5); + UML_CALLC(block, cfunc_total_cycles, this); + UML_DMOV(block, mem(&m_tr_base_cycles), mem(&m_numcycles)); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_JMP(block, done); + + int skip_adjust_timer; + UML_LABEL(block, set_fcr); + UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); + UML_XOR(block, I6, I6, I5); + UML_TEST(block, I6, 0x80000000); + UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler->m_labelnum++); + UML_CALLC(block, cfunc_adjust_timer_interrupt, this); + UML_LABEL(block, skip_adjust_timer); + UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); + UML_CMP(block, mem(&m_intblock), 1); + UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); + // Fall through to done + + UML_LABEL(block, done); } void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) @@ -132,12 +260,111 @@ void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compile template void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + generate_decode_const(block, compiler, desc); + generate_check_delay_pc(block); + UML_AND(block, I2, I0, 0x000f); + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I2, I3); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, I1, I2, I1); + + int skip_mask; + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_TEST(block, I1, ~0); + UML_JMPc(block, uml::COND_NZ, skip_mask = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_LABEL(block, skip_mask); + + if (DST_GLOBAL) + { + UML_ROLAND(block, I4, I0, 28, 0xf); + UML_MOV(block, I5, I2); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, I0, 28, 0xf); + UML_ADD(block, I0, I0, I3); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } } template void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + generate_decode_const(block, compiler, desc); + generate_check_delay_pc(block); + UML_AND(block, I2, I0, 0x000f); + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I2, I3); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'Q'); + UML_MOV(block, mem(&m_drc_arg1), I1); + UML_CALLC(block, cfunc_print, this); + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'R'); + UML_MOV(block, mem(&m_drc_arg1), I2); + UML_CALLC(block, cfunc_print, this); + UML_DADD(block, I5, I1, I2); + + UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); + UML_DTEST(block, I5, 0x100000000U); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, C_MASK); + + UML_XOR(block, I1, I5, I2); + UML_XOR(block, I6, I5, I1); + UML_AND(block, I1, I1, I6); + UML_TEST(block, I1, 0x80000000); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, V_MASK); + + UML_TEST(block, I5, ~0); + UML_SETc(block, uml::COND_Z, I6); + UML_ROLINS(block, DRC_SR, I6, 0, Z_MASK); + + UML_TEST(block, I5, 0x80000000); + UML_SETc(block, uml::COND_NZ, I6); + UML_ROLINS(block, DRC_SR, I6, 0, N_MASK); + + UML_ROLAND(block, I4, I0, 28, 0xf); + if (DST_GLOBAL) + { + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I0, I4, I3); + UML_AND(block, I2, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + } } @@ -246,42 +473,90 @@ void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + UML_ROLAND(block, I2, I0, 28, 0xf); + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I2, I3); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK | C_MASK)); + UML_DSUB(block, I0, I2, I1); + + int no_v; + UML_XOR(block, I0, I0, I2); + UML_XOR(block, I3, I1, I2); + UML_AND(block, I0, I0, I3); + UML_TEST(block, I0, 0x80000000); + UML_JMPc(block, uml::COND_Z, no_v = compiler->m_labelnum++); + UML_OR(block, DRC_SR, DRC_SR, V_MASK); + UML_LABEL(block, no_v); + + int no_n; + UML_MOV(block, I3, 0); + UML_CMP(block, I2, I1); + UML_MOVc(block, uml::COND_E, I3, Z_MASK); + UML_MOVc(block, uml::COND_B, I3, C_MASK); + UML_JMPc(block, uml::COND_L, no_n = compiler->m_labelnum++); + UML_OR(block, I3, I3, N_MASK); + UML_LABEL(block, no_n); + UML_OR(block, DRC_SR, DRC_SR, I3); + + UML_CMP(block, I2, I1); + } template -int hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - int label = 1; if (IMM_LONG) { - label = generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 } else { UML_AND(block, I1, I0, 0xf); } - int done = label++; + generate_check_delay_pc(block); + + int done; if (DST_GLOBAL) { UML_AND(block, I2, mem(&m_global_regs[1]), H_MASK); UML_TEST(block, mem(&m_global_regs[1]), S_MASK); UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); - UML_JMPc(block, uml::COND_Z, done); + UML_JMPc(block, uml::COND_Z, done = compiler->m_labelnum++); } UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); int no_z; UML_TEST(block, I1, ~0); - UML_JMPc(block, uml::COND_NZ, no_z = label++); + UML_JMPc(block, uml::COND_NZ, no_z = compiler->m_labelnum++); UML_OR(block, DRC_SR, DRC_SR, Z_MASK); UML_LABEL(block, no_z); int no_n; UML_TEST(block, I1, 0x80000000); - UML_JMPc(block, uml::COND_Z, no_n = label++); + UML_JMPc(block, uml::COND_Z, no_n = compiler->m_labelnum++); UML_OR(block, DRC_SR, DRC_SR, N_MASK); UML_LABEL(block, no_n); @@ -289,22 +564,22 @@ int hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compil UML_AND(block, DRC_SR, DRC_SR, ~V_MASK); #endif - UML_ROLAND(block, I0, I0, 30, 0x3c); - if (DST_GLOBAL) { - int no_pc; + UML_ROLAND(block, I4, I0, 28, 0xf); + UML_TEST(block, I2, ~0); + UML_MOVc(block, uml::COND_NZ, I2, 16); + UML_MOVc(block, uml::COND_Z, I2, 0); + UML_ADD(block, I4, I4, I2); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + UML_TEST(block, I0, 0xf0); - UML_JMPc(block, uml::COND_NZ, no_pc = label++); - UML_AND(block, mem(m_global_regs), I1, ~1); + UML_JMPc(block, uml::COND_NZ, done); UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); generate_delay_slot_and_branch(block, compiler, desc); - UML_JMP(block, done); - UML_LABEL(block, no_pc); - - // TODO - UML_JMP(block, done); + UML_LABEL(block, done); } else { @@ -313,9 +588,6 @@ int hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compil UML_AND(block, I0, I0, 0x3f); UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); } - - UML_LABEL(block, done); - return label; } @@ -346,6 +618,44 @@ void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + UML_ROLAND(block, I2, I0, 28, 0xf); + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I2, I3); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_OR(block, I5, I2, I1); + UML_ROLAND(block, I4, I0, 28, 0xf); + + if (DST_GLOBAL) + { + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I4, I0, 28, 0xf); + UML_ADD(block, I4, I4, I2); + UML_AND(block, I4, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); + } } diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index c13e72f8e89..8d4848373a3 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -28,10 +28,21 @@ e132xs_frontend::e132xs_frontend(hyperstone_device *e132xs, uint32_t window_star { } -/*------------------------------------------------- - describe_instruction - build a description - of a single instruction --------------------------------------------------*/ +inline uint32_t e132xs_frontend::imm_length(opcode_desc &desc, uint16_t op) +{ + uint8_t nybble = op & 0x0f; + switch (nybble) + { + case 0: + default: + return 2; + case 1: + return 6; + case 2: + case 3: + return 4; + } +} inline uint16_t e132xs_frontend::read_word(opcode_desc &desc) { @@ -142,6 +153,12 @@ inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) return extra_s; } + +/*------------------------------------------------- + describe - build a description of a single + instruction +-------------------------------------------------*/ + bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { uint16_t op = desc.opptr.w[0] = read_word(desc); @@ -164,6 +181,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint32_t lsrc_group = 1 + (((SRC_CODE + fp) & 0x20) >> 5); const uint32_t lsrcf_group = 1 + ((SRC_CODE + fp + 1) >> 5); + printf("physpc: %08x\n", desc.physpc); switch (op >> 8) { case 0x00: // chk global,global @@ -612,7 +630,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x71: // cmpbi global,limm desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); break; case 0x62: // cmpi local,simm case 0x72: // cmpbi local,simm @@ -625,7 +643,8 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= SR_CODE; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); + printf("%04x, %d\n", read_imm1(desc), desc.length); break; case 0x64: // movi global,simm desc.regin[0] |= SR_CODE; @@ -644,7 +663,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= 1 << (gdst_code + 16); desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; if (gdst_code == PC_REGISTER) { @@ -661,7 +680,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= SR_CODE; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); break; case 0x68: // addi global,simm case 0x6c: // addsi global,simm @@ -670,6 +689,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x69: // addi global,limm case 0x6d: // addsi global,limm @@ -677,8 +701,13 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << gdst_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x6a: // addi local,simm case 0x6e: // addsi local,simm @@ -694,7 +723,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[ldst_group] |= 1 << ldst_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi break; case 0x74: // andni global,simm @@ -704,6 +733,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << gdst_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x75: // andni global,limm case 0x79: // ori global,limm @@ -712,7 +746,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << gdst_code; desc.regout[0] |= 1 << gdst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; case 0x76: // andni local,simm case 0x7a: // ori local,simm @@ -729,7 +768,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[ldst_group] |= 1 << ldst_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; + desc.length = imm_length(desc, op); break; case 0x80: case 0x81: // shrdi case 0x84: case 0x85: // sardi @@ -777,6 +816,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.length = (imm1 & 0x8000) ? 6 : 4; desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; } case 0x91: // ldxx1 global,local @@ -791,6 +835,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.length = (imm1 & 0x8000) ? 6 : 4; desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; } case 0x92: // ldxx1 local,global @@ -833,6 +882,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.length = (imm1 & 0x8000) ? 6 : 4; desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; } case 0x95: // ldxx2 global,local @@ -848,6 +902,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.length = (imm1 & 0x8000) ? 6 : 4; desc.flags |= OPFLAG_READS_MEMORY; + if (gdst_code == PC_REGISTER) + { + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + } break; } case 0x96: // ldxx2 local,global diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h index 1cac61a08cd..7463fd964d0 100644 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -19,6 +19,7 @@ protected: virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; private: + inline uint32_t imm_length(opcode_desc &desc, uint16_t op); inline uint16_t read_word(opcode_desc &desc); inline uint16_t read_imm1(opcode_desc &desc); inline uint16_t read_imm2(opcode_desc &desc); diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index 22b39a70818..1f15399cb3d 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -1101,11 +1101,11 @@ void hyperstone_device::hyperstone_ori() if (!IMM_LONG) imm = m_op & 0x0f; - uint32_t dreg; + if (DST_GLOBAL) { const uint32_t dst_code = DST_CODE; - dreg = m_global_regs[dst_code] | imm; + const uint32_t dreg = m_global_regs[dst_code] | imm; if (dreg) SR &= ~Z_MASK; @@ -1117,7 +1117,7 @@ void hyperstone_device::hyperstone_ori() else { const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f; - dreg = m_local_regs[dst_code] |= imm; + const uint32_t dreg = m_local_regs[dst_code] |= imm; if (dreg) SR &= ~Z_MASK; diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h index 1b60d46cd8b..be32dedd724 100644 --- a/src/devices/cpu/uml.h +++ b/src/devices/cpu/uml.h @@ -73,20 +73,20 @@ namespace uml COND_NV, // requires V COND_U, // requires U COND_NU, // requires U - COND_A, // requires CZ - COND_BE, // requires CZ - COND_G, // requires SVZ - COND_LE, // requires SVZ - COND_L, // requires SV - COND_GE, // requires SV + COND_A, // requires CZ, unsigned + COND_BE, // requires CZ, unsigned + COND_G, // requires SVZ, signed + COND_LE, // requires SVZ, signed + COND_L, // requires SV, signed + COND_GE, // requires SV, signed COND_MAX, // basic condition code aliases COND_E = COND_Z, COND_NE = COND_NZ, - COND_B = COND_C, - COND_AE = COND_NC + COND_B = COND_C, // unsigned + COND_AE = COND_NC // unsigned }; // floating point rounding modes -- cgit v1.2.3-70-g09d2 From 28185ffbe668125aadab3b5e54466b04b3495f84 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 03:05:29 +0100 Subject: e132xs: drc version of ldxx1 and frame ops, nw --- src/devices/cpu/e132xs/32xsdefs.h | 12 +- src/devices/cpu/e132xs/e132xs.h | 21 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 58 +-- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 645 +++++++++++++++++++++++++------ src/devices/cpu/e132xs/e132xsfe.cpp | 2 - src/devices/cpu/e132xs/e132xsop.hxx | 2 +- 6 files changed, 594 insertions(+), 146 deletions(-) diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h index 943bb4911e6..86b0018b909 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/32xsdefs.h @@ -54,15 +54,15 @@ /* Trap numbers */ #define TRAPNO_IO2 48 #define TRAPNO_IO1 49 -#define TRAPNO_INT4 50 -#define TRAPNO_INT3 51 -#define TRAPNO_INT2 52 -#define TRAPNO_INT1 53 +#define TRAPNO_INT4 50 +#define TRAPNO_INT3 51 +#define TRAPNO_INT2 52 +#define TRAPNO_INT1 53 #define TRAPNO_IO3 54 #define TRAPNO_TIMER 55 #define TRAPNO_RESERVED1 56 #define TRAPNO_TRACE_EXCEPTION 57 -#define TRAPNO_PARITY_ERROR 58 +#define TRAPNO_PARITY_ERROR 58 #define TRAPNO_EXTENDED_OVERFLOW 59 #define TRAPNO_RANGE_ERROR 60 #define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR @@ -156,6 +156,8 @@ #define S_MASK 0x00040000 #define ILC_MASK 0x00180000 +#define S_SHIFT 18 + /* SR flags */ #define GET_C ( SR & C_MASK) // bit 0 //CARRY #define GET_Z ((SR & Z_MASK)>>1) // bit 1 //ZERO diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 14e82bcd3ed..8339d76687d 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -169,9 +169,24 @@ protected: enum { - EXCEPTION_INTERRUPT = 0, - EXCEPTION_PRIVILEGE_ERROR, - EXCEPTION_TRACE, + EXCEPTION_IO2 = 48, + EXCEPTION_IO1 = 49, + EXCEPTION_INT4 = 50, + EXCEPTION_INT3 = 51, + EXCEPTION_INT2 = 52, + EXCEPTION_INT1 = 53, + EXCEPTION_IO3 = 54, + EXCEPTION_TIMER = 55, + EXCEPTION_RESERVED1 = 56, + EXCEPTION_TRACE = 57, + EXCEPTION_PARITY_ERROR = 58, + EXCEPTION_EXTENDED_OVERFLOW = 59, + EXCEPTION_RANGE_ERROR = 60, + EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR, + EXCEPTION_RESERVED2 = 61, + EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3 + EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones EXCEPTION_COUNT }; diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index c180cd62f95..9cfe01d9f5d 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -85,10 +85,12 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } +/* static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } +*/ /*------------------------------------------------- ccfunc_total_cycles - compute the total number @@ -138,9 +140,22 @@ void hyperstone_device::code_flush_cache() static_generate_nocode_handler(); static_generate_out_of_cycles(); - static_generate_exception(EXCEPTION_INTERRUPT, "interrupt"); - static_generate_exception(EXCEPTION_PRIVILEGE_ERROR, "privilege_error"); + static_generate_exception(EXCEPTION_IO2, "io2"); + static_generate_exception(EXCEPTION_IO1, "io1"); + static_generate_exception(EXCEPTION_INT4, "int4"); + static_generate_exception(EXCEPTION_INT3, "int3"); + static_generate_exception(EXCEPTION_INT2, "int2"); + static_generate_exception(EXCEPTION_INT1, "int1"); + static_generate_exception(EXCEPTION_IO3, "io3"); + static_generate_exception(EXCEPTION_TIMER, "timer"); + static_generate_exception(EXCEPTION_RESERVED1, "reserved1"); static_generate_exception(EXCEPTION_TRACE, "trace"); + static_generate_exception(EXCEPTION_PARITY_ERROR, "parity_error"); + static_generate_exception(EXCEPTION_EXTENDED_OVERFLOW, "extended_overflow"); + static_generate_exception(EXCEPTION_RANGE_ERROR, "range_error"); + static_generate_exception(EXCEPTION_RESERVED2, "reserved2"); + static_generate_exception(EXCEPTION_RESET, "reset"); + static_generate_exception(EXCEPTION_ERROR_ENTRY, "error_entry"); /* add subroutines for memory accesses */ static_generate_memory_accessor(1, false, false, "read8", m_mem_read8); @@ -447,7 +462,7 @@ void hyperstone_device::static_generate_out_of_cycles() void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, code_handle *&handleptr) { /* on entry, address is in I0; data for writes is in I1 */ - /* on exit, read result is in I0 */ + /* on exit, read result is in I1 */ /* routine trashes I0-I1 */ drcuml_state *drcuml = m_drcuml.get(); drcuml_block *block; @@ -466,21 +481,21 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b if (iswrite) UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); else - UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); + UML_READ(block, I1, I0, SIZE_BYTE, SPACE_PROGRAM); break; case 2: if (iswrite) UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); else - UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); + UML_READ(block, I1, I0, SIZE_WORD, SPACE_PROGRAM); break; case 4: if (iswrite) UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); else - UML_READ(block, I0, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); + UML_READ(block, I1, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); break; } UML_RET(block); @@ -522,25 +537,25 @@ void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_st const opcode_desc *curdesc; if (m_drcuml->logging()) { - block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); + block->append_comment("[Validation for %08X]", seqhead->pc); } /* loose verify or single instruction: just compare and fail */ if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr) { if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) { - uint32_t sum = seqhead->opptr.l[0]; - void *base = m_direct->read_ptr(seqhead->physpc | 0x1000); - UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); + uint32_t sum = seqhead->opptr.w[0]; + void *base = m_direct->read_ptr(seqhead->physpc); + UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); if (seqhead->delay.first() != nullptr && seqhead->physpc != seqhead->delay.first()->physpc) { base = m_direct->read_ptr(seqhead->delay.first()->physpc); assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); UML_ADD(block, I0, I0, I1); - sum += seqhead->delay.first()->opptr.l[0]; + sum += seqhead->delay.first()->opptr.w[0]; } UML_CMP(block, I0, sum); @@ -550,25 +565,25 @@ void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_st else /* full verification; sum up everything */ { void *base = m_direct->read_ptr(seqhead->physpc); - UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); - uint32_t sum = seqhead->opptr.l[0]; + UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); + uint32_t sum = seqhead->opptr.w[0]; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) { base = m_direct->read_ptr(curdesc->physpc); assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); UML_ADD(block, I0, I0, I1); - sum += curdesc->opptr.l[0]; + sum += curdesc->opptr.w[0]; if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) { base = m_direct->read_ptr(curdesc->delay.first()->physpc); assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); UML_ADD(block, I0, I0, I1); - sum += curdesc->delay.first()->opptr.l[0]; + sum += curdesc->delay.first()->opptr.w[0]; } } UML_CMP(block, I0, sum); @@ -639,7 +654,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi /* add an entry for the log */ if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); /* set the PC map variable */ expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc; @@ -665,7 +680,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi if (!generate_opcode(block, compiler, desc)) { UML_MOV(block, DRC_PC, desc->pc); - UML_MOV(block, mem(&m_drc_arg0), desc->opptr.l[0]); + UML_MOV(block, mem(&m_drc_arg0), desc->opptr.w[0]); UML_CALLC(block, cfunc_unimplemented, this); } } @@ -676,8 +691,6 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { uint32_t op = (uint32_t)desc->opptr.w[0]; - printf("op:%04x\n", op); - printf("pc:%08x\n", desc->pc); UML_MOV(block, I0, op); UML_AND(block, I7, DRC_SR, H_MASK); @@ -955,5 +968,6 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0); UML_LABEL(block, done); + UML_XOR(block, DRC_SR, DRC_SR, I7); return true; } \ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 26d58a071c9..275936be4ba 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -13,91 +13,72 @@ void hyperstone_device::generate_check_delay_pc(drcuml_block *block) void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - int half_read; - UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_TEST(block, I1, 0x8000); - UML_JMPc(block, uml::COND_Z, half_read = compiler->m_labelnum++); - - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - - int skip; - UML_SHL(block, I1, I1, 16); - UML_AND(block, I2, I1, 0x3fff0000); - UML_TEST(block, I1, 0x40000000); - UML_MOVc(block, uml::COND_Z, I1, I2); - UML_JMPc(block, uml::COND_Z, skip = compiler->m_labelnum++); - UML_OR(block, I1, I2, 0xc0000000); - UML_LABEL(block, skip); - UML_READ(block, I2, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_OR(block, I1, I1, I2); - - int done; - UML_JMP(block, done = compiler->m_labelnum++); - - UML_LABEL(block, half_read); - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_TEST(block, I1, 0x4000); - UML_MOVc(block, uml::COND_NZ, I2, 0xffffc000); - UML_MOVc(block, uml::COND_Z, I2, 0); - UML_AND(block, I1, I1, 0x3fff); - UML_OR(block, I1, I1, I2); - - UML_LABEL(block, done); -} + const uint16_t imm_1 = READ_OP(desc->pc + 2); -void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - static int32_t immediate_values[16] = + if (imm_1 & 0x8000) { - 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), - -8, -7, -6, -5, -4, -3, -2, -1 - }; + const uint16_t imm_2 = READ_OP(desc->pc + 4); - int nolut, done, zero_or_one, three; + uint32_t imm = imm_2; + imm |= ((imm_1 & 0x3fff) << 16); - UML_AND(block, I1, I0, 0x0f); - UML_CMP(block, I1, 4); - UML_JMPc(block, COND_L, nolut = compiler->m_labelnum++); - - // 4..f, immediate lookup - UML_LOAD(block, I1, (void *)immediate_values, I1, SIZE_DWORD, SCALE_x4); - UML_JMP(block, done = compiler->m_labelnum++); + if (imm_1 & 0x4000) + imm |= 0xc0000000; - UML_LABEL(block, nolut); - UML_CMP(block, I1, 2); - UML_JMPc(block, COND_L, zero_or_one = compiler->m_labelnum++); - UML_JMPc(block, COND_G, three = compiler->m_labelnum++); + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + UML_MOV(block, I1, imm); + } + else + { + uint32_t imm = imm_1 & 0x3fff; - // 2 - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_JMP(block, done); + if (imm_1 & 0x4000) + imm |= 0xffffc000; - // 0..1 - UML_LABEL(block, zero_or_one); - UML_TEST(block, I1, 1); - UML_MOVc(block, COND_E, I1, 16); // 0 - UML_JMPc(block, COND_E, done); // if 0, we exit here. if 1, we fall through. - - // 1 - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_SHL(block, I1, I1, 16); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_READ(block, I2, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_JMP(block, done); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, imm); + } +} - // 3 - UML_LABEL(block, three); - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_READ(block, I1, DRC_PC, SIZE_WORD, SPACE_PROGRAM); - UML_SEXT(block, I1, I1, SIZE_WORD); - // fall through to done +void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +{ + uint16_t op = desc->opptr.w[0]; - UML_LABEL(block, done); + switch (op & 0xf) + { + case 0: + UML_MOV(block, I1, 16); + return; + case 1: + { + uint32_t extra_u = (READ_OP(desc->pc + 2) << 16) | READ_OP(desc->pc + 4); + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + UML_MOV(block, I1, extra_u); + return; + } + case 2: + { + uint32_t extra_u = READ_OP(desc->pc + 2); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, extra_u); + return; + } + case 3: + { + uint32_t extra_u = 0xffff0000 | READ_OP(desc->pc + 2); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, I1, extra_u); + return; + } + default: + UML_MOV(block, I1, s_immediate_values[op & 0xf]); + return; + } } void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) @@ -242,6 +223,157 @@ void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + generate_check_delay_pc(block); + + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t srcf_code = src_code + 1; + const uint32_t dst_code = (op & 0xf0) >> 4; + const uint32_t dstf_code = dst_code + 1; + + int done = compiler->m_labelnum++; + if (DST_GLOBAL && (dst_code == PC_REGISTER)) + { + if (SRC_GLOBAL && src_code < 2) + { + printf("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc); + return; + } + + UML_AND(block, I1, DRC_SR, (S_MASK | L_MASK)); + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I3, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + UML_AND(block, DRC_PC, I2, ~1); + UML_AND(block, DRC_SR, I3, 0xffe3ffff); + UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK); + + UML_TEST(block, mem(&m_intblock), ~0); + UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); + + UML_MOV(block, mem(&m_instruction_length), 0); + + int no_exception; + UML_AND(block, I2, DRC_SR, (S_MASK | L_MASK)); + UML_AND(block, I3, I1, I2); + UML_TEST(block, I3, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception = compiler->m_labelnum++); // If S is set and unchanged, there won't be an exception. + + UML_XOR(block, I3, I1, I2); + UML_AND(block, I4, I3, I2); + UML_TEST(block, I4, S_MASK); + UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If S is newly set, it's a privilege error. + + UML_TEST(block, I3, L_MASK); + UML_JMPc(block, uml::COND_Z, no_exception); // If L is unchanged, there won't be an exception. + UML_TEST(block, I1, L_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); // If L was previously set, there won't be an exception. + UML_TEST(block, I2, S_MASK); + UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If L is newly set and we are not in Supervisor mode, it's a privilege error. + + int diff_in_range; + UML_LABEL(block, no_exception); + UML_MOV(block, I0, mem(&SP)); + UML_ROLAND(block, I1, I0, 30, 0x7f); + UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); + UML_SUB(block, I3, I2, I1); + UML_CMP(block, I3, -64); + UML_JMPc(block, uml::COND_L, done); + UML_CMP(block, I3, 64); + UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); + UML_OR(block, I3, I3, 0x80); + UML_SEXT(block, I3, I3, SIZE_BYTE); + UML_LABEL(block, diff_in_range); + + int pop_next; + UML_LABEL(block, pop_next = compiler->m_labelnum++); + UML_CMP(block, I3, 0); + UML_JMPc(block, uml::COND_GE, done); + UML_SUB(block, I0, I0, 4); + UML_CALLH(block, *m_mem_read32); + UML_ROLAND(block, I2, I0, 30, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I3, I3, 1); + UML_TEST(block, I3, ~0); + UML_JMP(block, pop_next); + } + else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR + { + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + UML_AND(block, DRC_SR, DRC_SR, ~N_MASK); + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, 0); + generate_set_global_register(block, compiler, desc); + UML_MOV(block, I4, dstf_code); + UML_MOV(block, I5, 0); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I0, I0, dst_code); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, 1); + UML_AND(block, I0, I0, 0x3f); + UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); + } + } + else // Rd doesn't denote PC and Rs doesn't denote SR + { + if (!SRC_GLOBAL || !DST_GLOBAL) + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I1, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I0, I3, src_code); + UML_AND(block, I0, I0, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I1, I3, srcf_code); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + + UML_OR(block, I2, I0, I1); + UML_TEST(block, I2, ~0); + UML_SETc(block, uml::COND_Z, I2); + UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); + + UML_TEST(block, I0, 0x80000000); + UML_SETc(block, uml::COND_NZ, I2); + UML_ROLINS(block, DRC_SR, I2, 0, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I0); + generate_set_global_register(block, compiler, desc); + UML_MOV(block, I4, dstf_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I2, I3, dstf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + } + + UML_LABEL(block, done); } @@ -260,9 +392,13 @@ void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compile template void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + generate_decode_const(block, compiler, desc); generate_check_delay_pc(block); - UML_AND(block, I2, I0, 0x000f); + if (!SRC_GLOBAL || !DST_GLOBAL) { UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); @@ -270,11 +406,11 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi if (SRC_GLOBAL) { - UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); } else { - UML_ADD(block, I2, I2, I3); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); } @@ -290,14 +426,13 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi if (DST_GLOBAL) { - UML_ROLAND(block, I4, I0, 28, 0xf); + UML_MOV(block, I4, dst_code); UML_MOV(block, I5, I2); generate_set_global_register(block, compiler, desc); } else { - UML_ROLAND(block, I0, I0, 28, 0xf); - UML_ADD(block, I0, I0, I3); + UML_ADD(block, I0, I3, dst_code); UML_AND(block, I0, I0, 0x3f); UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); } @@ -307,9 +442,13 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + generate_decode_const(block, compiler, desc); generate_check_delay_pc(block); - UML_AND(block, I2, I0, 0x000f); + if (!SRC_GLOBAL || !DST_GLOBAL) { UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); @@ -317,21 +456,15 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil if (SRC_GLOBAL) { - UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); } else { - UML_ADD(block, I2, I2, I3); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); } - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'Q'); - UML_MOV(block, mem(&m_drc_arg1), I1); - UML_CALLC(block, cfunc_print, this); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'R'); - UML_MOV(block, mem(&m_drc_arg1), I2); - UML_CALLC(block, cfunc_print, this); UML_DADD(block, I5, I1, I2); UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); @@ -354,14 +487,14 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil UML_SETc(block, uml::COND_NZ, I6); UML_ROLINS(block, DRC_SR, I6, 0, N_MASK); - UML_ROLAND(block, I4, I0, 28, 0xf); if (DST_GLOBAL) { + UML_MOV(block, I4, dst_code); generate_set_global_register(block, compiler, desc); } else { - UML_ADD(block, I0, I4, I3); + UML_ADD(block, I0, I3, dst_code); UML_AND(block, I2, I0, 0x3f); UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); } @@ -473,6 +606,9 @@ void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + if (IMM_LONG) { generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 @@ -484,15 +620,14 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi generate_check_delay_pc(block); - UML_ROLAND(block, I2, I0, 28, 0xf); if (DST_GLOBAL) { - UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); } else { UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I2, I3); + UML_ADD(block, I2, I3, dst_code); UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); } @@ -526,6 +661,9 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + if (IMM_LONG) { generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 @@ -537,13 +675,16 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi generate_check_delay_pc(block); - int done; + int done, no_exception; if (DST_GLOBAL) { - UML_AND(block, I2, mem(&m_global_regs[1]), H_MASK); - UML_TEST(block, mem(&m_global_regs[1]), S_MASK); - UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); - UML_JMPc(block, uml::COND_Z, done = compiler->m_labelnum++); + UML_TEST(block, DRC_SR, H_MASK); + UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); + UML_TEST(block, DRC_SR, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); + UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); + UML_JMP(block, done = compiler->m_labelnum++); + UML_LABEL(block, no_exception); } UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); @@ -566,11 +707,9 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi if (DST_GLOBAL) { - UML_ROLAND(block, I4, I0, 28, 0xf); - UML_TEST(block, I2, ~0); - UML_MOVc(block, uml::COND_NZ, I2, 16); - UML_MOVc(block, uml::COND_Z, I2, 0); - UML_ADD(block, I4, I4, I2); + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I4, dst_code + 16); + UML_MOVc(block, uml::COND_Z, I4, dst_code); UML_MOV(block, I5, I1); generate_set_global_register(block, compiler, desc); @@ -584,7 +723,7 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi else { UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); - UML_ADD(block, I0, I0, I2); + UML_ADD(block, I0, I2, dst_code); UML_AND(block, I0, I0, 0x3f); UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); } @@ -618,6 +757,9 @@ void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + if (IMM_LONG) { generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 @@ -629,30 +771,28 @@ void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compil generate_check_delay_pc(block); - UML_ROLAND(block, I2, I0, 28, 0xf); if (DST_GLOBAL) { - UML_LOAD(block, I2, (void *)m_global_regs, I2, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); } else { UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I2, I3); + UML_ADD(block, I2, I3, dst_code); UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); } UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); UML_OR(block, I5, I2, I1); - UML_ROLAND(block, I4, I0, 28, 0xf); if (DST_GLOBAL) { + UML_MOV(block, I4, dst_code); generate_set_global_register(block, compiler, desc); } else { - UML_ROLAND(block, I4, I0, 28, 0xf); - UML_ADD(block, I4, I4, I2); + UML_ADD(block, I4, I2, dst_code); UML_AND(block, I4, I4, 0x3f); UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); } @@ -744,6 +884,241 @@ void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + const uint16_t op = desc->opptr.w[0]; + uint16_t next_1 = READ_OP(desc->pc + 2); + const uint16_t sub_type = (next_1 & 0x3000) >> 12; + + uint32_t extra_s; + if (next_1 & 0x8000) + { + const uint16_t next_2 = READ_OP(desc->pc + 4); + + extra_s = next_2; + extra_s |= ((next_1 & 0xfff) << 16); + + if (next_1 & 0x4000) + extra_s |= 0xf0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = next_1 & 0xfff; + + if (next_1 & 0x4000) + extra_s |= 0xfffff000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t srcf_code = src_code + 1; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (!DST_GLOBAL || dst_code != SR_REGISTER) + { + if (DST_GLOBAL) + UML_LOAD(block, I4, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + else + UML_LOAD(block, I4, (void *)m_local_regs, dst_code, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I6, I4, extra_s); + } + else + { + UML_MOV(block, I6, extra_s); + } + + switch (sub_type) + { + case 0: // LDBS.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read8); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_SEXT(block, I5, I1, SIZE_BYTE); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 1: // LDBU.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read8); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 2: + UML_AND(block, I6, I6, ~1); + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read16); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + if (extra_s & 1) // LDHS.A + UML_SEXT(block, I5, I1, SIZE_WORD); + else // LDHU.A + UML_MOV(block, I5, I1); + + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + if (extra_s & 1) + { + UML_SEXT(block, I5, I1, SIZE_WORD); + UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); + } + else + { + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + } + break; + + case 3: + { + uint32_t switch_val = extra_s & 3; + UML_AND(block, I6, I6, ~3); + switch (switch_val) + { + case 0: // LDW.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + case 1: // LDD.A + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I6, 4); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, srcf_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, srcf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + case 2: // LDW.IOA + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I0, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + + case 3: // LDD.IOA + UML_MOV(block, I0, I6); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, src_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I6, 4); + UML_CALLH(block, *m_io_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I5, I1); + UML_MOV(block, I4, srcf_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, srcf_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); + } + break; + } + break; + } + } } @@ -855,6 +1230,50 @@ void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compil void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + UML_SUB(block, I1, I1, op & 0xf); + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); // SET_FP(GET_FP - SRC_CODE) + UML_ROLINS(block, DRC_SR, op, 17, 0x01e00000); // SET_FL(DST_CODE) + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); // SET_M(0) + + UML_MOV(block, I0, mem(&SP)); + UML_ADD(block, I1, I1, (op & 0xf0) >> 4); + UML_ROLAND(block, I2, I0, 30, 0x7f); + UML_ADD(block, I2, I2, (64 - 10)); + UML_SUB(block, I3, I2, I1); + UML_SEXT(block, I3, I3, SIZE_BYTE); // difference = ((SP & 0x1fc) >> 2) + (64 - 10) - ((GET_FP - SRC_CODE) + GET_FL) + + int diff_in_range, done; + UML_CMP(block, I3, -64); + UML_JMPc(block, uml::COND_L, done = compiler->m_labelnum++); + UML_CMP(block, I3, 64); + UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); + UML_OR(block, I3, I3, 0xffffff80); + UML_LABEL(block, diff_in_range); + + UML_CMP(block, I0, mem(&UB)); + UML_SETc(block, uml::COND_GE, I4); + UML_CMP(block, I3, 0); + UML_JMPc(block, uml::COND_GE, done); + + int push_next; + UML_LABEL(block, push_next = compiler->m_labelnum++); + UML_ROLAND(block, I2, I0, 30, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + UML_CALLH(block, *m_mem_write32); + UML_ADD(block, I0, I0, 4); + UML_ADD(block, I3, I3, 1); + UML_TEST(block, I3, ~0); + UML_JMPc(block, uml::COND_NZ, push_next); + + UML_TEST(block, I4, ~0); + UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_FRAME_ERROR], 0); + + UML_LABEL(block, done); } void hyperstone_device::generate_call_global(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index 8d4848373a3..be54f9342d3 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -181,7 +181,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint32_t lsrc_group = 1 + (((SRC_CODE + fp) & 0x20) >> 5); const uint32_t lsrcf_group = 1 + ((SRC_CODE + fp + 1) >> 5); - printf("physpc: %08x\n", desc.physpc); switch (op >> 8) { case 0x00: // chk global,global @@ -644,7 +643,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[0] |= SR_CODE; desc.length = imm_length(desc, op); - printf("%04x, %d\n", read_imm1(desc), desc.length); break; case 0x64: // movi global,simm desc.regin[0] |= SR_CODE; diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index 1f15399cb3d..e94eeefd15d 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -51,7 +51,7 @@ void hyperstone_device::hyperstone_movd() const uint32_t old_s = SR & S_MASK; const uint32_t old_l = SR & L_MASK; PC = sreg & ~1; - SR = (sregf & 0xffe00000) | ((sreg & 0x01) << 18 ) | (sregf & 0x3ffff); + SR = (sregf & 0xffe3ffff) | ((sreg & 0x01) << 18); if (m_intblock < 1) m_intblock = 1; -- cgit v1.2.3-70-g09d2 From 604636eaff351de95c31d56e613e9a4d82422754 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 03:27:10 +0100 Subject: e132xs: minor prep for checkin, nw --- src/devices/cpu/e132xs/e132xs.cpp | 6 +++++- src/devices/cpu/e132xs/e132xs.h | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index a200a57261f..f4ff034b38d 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -479,11 +479,11 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback ) /* update the values if necessary */ if (update) { - compute_tr(); update_timer_prescale(); } /* see if the timer is right for firing */ + compute_tr(); if (!((m_tr_result - TCR) & 0x80000000)) m_timer_int_pending = 1; @@ -1018,7 +1018,11 @@ void hyperstone_device::device_start() void hyperstone_device::init(int scale_mask) { +#if ENABLE_E132XS_DRC m_enable_drc = allow_drc(); +#else + m_enable_drc = false; +#endif memset(m_global_regs, 0, sizeof(uint32_t) * 32); memset(m_local_regs, 0, sizeof(uint32_t) * 64); diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 8339d76687d..9dd1b919728 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -45,10 +45,12 @@ #define EXECUTE_UNMAPPED_CODE 2 #define EXECUTE_RESET_CACHE 3 -#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */ +#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */ #define SINGLE_INSTRUCTION_MODE (1) +#define ENABLE_E132XS_DRC (0) + //************************************************************************** // TYPE DEFINITIONS //************************************************************************** -- cgit v1.2.3-70-g09d2 From 2e79c87e2688f86df0b819d0a51b8f9ea6a81aa5 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 04:02:22 +0100 Subject: merge fix, nw --- src/devices/cpu/e132xs/32xsdasm.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index aa4dcc912eb..d6ecb866749 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -399,10 +399,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con char source[5] = "\0", dest[5] = "\0"; uint32_t flags = 0; - base_pc = pc; - base_oprom = oprom; - - uint16_t op = READ_OP_DASM(pc); + uint16_t op = opcodes.r16(pc); size = 2; -- cgit v1.2.3-70-g09d2 From bd7c954a3a4a7c5addc22f408ede9342f0fe796c Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 04:53:21 +0100 Subject: e132xs: implemented mov op in drc, nw --- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 58 ++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 275936be4ba..368358bd443 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -3,6 +3,8 @@ #include "e132xs.h" +constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER); + void hyperstone_device::generate_check_delay_pc(drcuml_block *block) { /* if PC is used in a delay instruction, the delayed PC should be used */ @@ -516,6 +518,62 @@ void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + int no_exception; + UML_TEST(block, DRC_SR, H_MASK); + UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); + UML_TEST(block, DRC_SR, S_MASK); + UML_JMPc(block, uml::COND_NZ, no_exception); + UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); + UML_LABEL(block, no_exception); + } + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I1, 16 + src_code); + UML_MOVc(block, uml::COND_Z, I1, src_code); + UML_LOAD(block, I5, (void *)m_global_regs, I1, SIZE_DWORD, SCALE_x4); + UML_SHL(block, I2, 1, I1); + UML_TEST(block, I2, WRITE_ONLY_REGMASK); + UML_MOVc(block, uml::COND_NZ, I5, 0); + } + else + { + UML_ADD(block, I2, I1, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I5, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); + UML_TEST(block, I3, ~0); + UML_SETc(block, uml::COND_Z, I2); + UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I3, 3, N_MASK); + + if (DST_GLOBAL) + { + UML_TEST(block, DRC_SR, H_MASK); + UML_MOVc(block, uml::COND_NZ, I4, 16 + dst_code); + UML_MOVc(block, uml::COND_Z, I4, dst_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I1, dst_code); + UML_AND(block, I2, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); + } } -- cgit v1.2.3-70-g09d2 From 0fe9e1defe81bcc45e249daa3a3197213513d2e3 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 2 Dec 2017 00:46:05 -0500 Subject: twinkle: many fixes to waveram banking + DMA. Most sets are semi-playable now. [R. Belmont, Sarah Purohit] --- src/devices/sound/rf5c400.cpp | 4 ++-- src/mame/drivers/twinkle.cpp | 43 +++++++++++++++++++++++++++---------------- 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index 39440c66991..4fc6a364c7a 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -181,7 +181,7 @@ void rf5c400_device::device_start() m_stream = stream_alloc(0, 2, clock() / 384); - m_rommask = m_rom.length() - 1; + m_rommask = (m_rom.length()/2) - 1; } //------------------------------------------------- @@ -258,7 +258,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * { env_phase = PHASE_DECAY; env_level = 1.0; - if (channel->decay & 0x0080) + if ((channel->decay & 0x0080) || (channel->decay == 0x100)) { env_step = 0.0; } diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 5326a791d83..d0651ac8b2b 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -268,6 +268,7 @@ public: uint16_t m_spu_ctrl; // SPU board control register uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM uint32_t m_spu_ata_dma; + uint32_t m_wave_bank; int m_spu_ata_dmarq; int m_io_offset; @@ -287,6 +288,7 @@ public: DECLARE_WRITE16_MEMBER(twinkle_waveram_w); DECLARE_READ16_MEMBER(shared_68k_r); DECLARE_WRITE16_MEMBER(shared_68k_w); + DECLARE_WRITE16_MEMBER(spu_wavebank_w); DECLARE_READ16_MEMBER(unk_68k_r); DECLARE_WRITE_LINE_MEMBER(spu_ata_irq); DECLARE_WRITE_LINE_MEMBER(spu_ata_dmarq); @@ -764,7 +766,8 @@ WRITE16_MEMBER(twinkle_state::spu_ata_dma_low_w) WRITE16_MEMBER(twinkle_state::spu_ata_dma_high_w) { - m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | (data << 16); + m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | ((uint32_t)data << 16); + //printf("DMA now %x\n", m_spu_ata_dma); } WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) @@ -781,17 +784,10 @@ WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) { uint16_t data = m_ata->read_dma(); //printf("spu_ata_dmarq %08x %04x\n", m_spu_ata_dma * 2, data); - //waveram[m_spu_ata_dma++] = (data >> 8) | (data << 8); + m_waveram[m_wave_bank+m_spu_ata_dma] = data; //(data >> 8) | (data << 8); + m_spu_ata_dma++; // bp 4a0e ;bmiidx4 checksum // bp 4d62 ;bmiidx4 dma - - // $$$HACK - game DMAs nothing useful to 0x400000 but all sound plays are 0x400000 or above - // so limit sound RAM to 4MB (there's 6 MB on the board) and let the 5c400's address masking - // work for us until we figure out what's actually going on. - if (m_spu_ata_dma < 0x200000) - { - m_waveram[m_spu_ata_dma++] = data; - } } m_ata->write_dmack(CLEAR_LINE); @@ -799,14 +795,30 @@ WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq) } } +WRITE16_MEMBER(twinkle_state::spu_wavebank_w) +{ + //printf("%x to wavebank_w, mask %04x\n", data, mem_mask); + + // banks are fairly clearly 8MB, so there's 3 of them in the 24 MB of RAM. + // the games load up the full 24MB of RAM 8 MB at a time, first to bank 1, + // then to bank 2, and finally to bank 3. + // + // neither the 68k nor DMA access wave RAM when the bank is 0. + if (data == 0) + { + data = 1; + } + m_wave_bank = ((data-1) * (4*1024*1024)); +} + READ16_MEMBER(twinkle_state::twinkle_waveram_r) { - return m_waveram[offset]; + return m_waveram[offset+m_wave_bank]; } WRITE16_MEMBER(twinkle_state::twinkle_waveram_w) { - COMBINE_DATA(&m_waveram[offset]); + COMBINE_DATA(&m_waveram[offset+m_wave_bank]); } READ16_MEMBER(twinkle_state::shared_68k_r) @@ -838,14 +850,13 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state ) AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w) AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w) AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w) - // 260000 = ??? + AM_RANGE(0x260000, 0x260001) AM_WRITE(spu_wavebank_w) AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w) AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0) // 34000E = ??? AM_RANGE(0x34000e, 0x34000f) AM_WRITENOP AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w) - AM_RANGE(0x800000, 0xbfffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w ) - AM_RANGE(0xfe0000, 0xffffff) AM_RAM // ...and the RAM test checks this last 128k (mirror of the work RAM at 0x100000?) + AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w ) ADDRESS_MAP_END /* SCSI */ @@ -1087,7 +1098,7 @@ INPUT_PORTS_END ROM_REGION32_LE( 0x080000, "audiocpu", 0 )\ ROM_LOAD16_WORD_SWAP( "863a05.2x", 0x000000, 0x080000, CRC(6f42a09e) SHA1(cab5209f90f47b9ee6e721479913ad74e3ba84b1) )\ \ - ROM_REGION16_LE(0x400000, "rfsnd", ROMREGION_ERASE00) + ROM_REGION16_LE(0x1800000, "rfsnd", ROMREGION_ERASE00) ROM_START( gq863 ) TWINKLE_BIOS -- cgit v1.2.3-70-g09d2 From f5690465203e191b364792785c3cb63fabde7f19 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 2 Dec 2017 01:37:41 -0500 Subject: sdk86: Misc. corrections and additions (nw) --- src/mame/drivers/sdk86.cpp | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/sdk86.cpp b/src/mame/drivers/sdk86.cpp index 0ca083a2898..510a819db78 100644 --- a/src/mame/drivers/sdk86.cpp +++ b/src/mame/drivers/sdk86.cpp @@ -2,7 +2,7 @@ // copyright-holders:Miodrag Milanovic, Jonathan Gevaryahu, Robbbert /*************************************************************************** - Intel SDK-86 + Intel MCS-86 System Design Kit (SDK-86) 12/05/2009 Skeleton driver by Micko 29/11/2009 Some fleshing out by Lord Nightmare @@ -31,6 +31,7 @@ ToDo: #include "cpu/i86/i86.h" #include "machine/clock.h" #include "machine/i8251.h" +#include "machine/i8255.h" #include "machine/i8279.h" #include "sdk86.lh" @@ -65,8 +66,8 @@ static ADDRESS_MAP_START(sdk86_io, AS_IO, 16, sdk86_state) AM_RANGE(0xfff0, 0xfff1) AM_MIRROR(4) AM_DEVREADWRITE8(I8251_TAG, i8251_device, data_r, data_w, 0xff) AM_RANGE(0xfff2, 0xfff3) AM_MIRROR(4) AM_DEVREADWRITE8(I8251_TAG, i8251_device, status_r, control_w, 0xff) AM_RANGE(0xffe8, 0xffeb) AM_MIRROR(4) AM_DEVREADWRITE8("i8279", i8279_device, read, write, 0xff) - // FFF8-FFFF = 2 x 8255A i/o chips. chip 1 uses the odd addresses, chip 2 uses the even addresses. - // ports are A,B,C,control in that order. + AM_RANGE(0xfff8, 0xffff) AM_DEVREADWRITE8("port1", i8255_device, read, write, 0xff00) + AM_RANGE(0xfff8, 0xffff) AM_DEVREADWRITE8("port2", i8255_device, read, write, 0x00ff) ADDRESS_MAP_END /* Input ports */ @@ -155,7 +156,7 @@ static MACHINE_CONFIG_START( sdk86 ) MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251_TAG, i8251_device, write_dsr)) MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) - MCFG_DEVICE_ADD("usart_clock", CLOCK, 307200) + MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_14_7456MHz/3/16) MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE(I8251_TAG, i8251_device, write_txc)) MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(I8251_TAG, i8251_device, write_rxc)) @@ -166,6 +167,8 @@ static MACHINE_CONFIG_START( sdk86 ) MCFG_I8279_IN_SHIFT_CB(GND) // Shift key MCFG_I8279_IN_CTRL_CB(GND) + MCFG_DEVICE_ADD("port1", I8255A, 0) + MCFG_DEVICE_ADD("port2", I8255A, 0) MACHINE_CONFIG_END /* ROM definition */ @@ -209,4 +212,4 @@ ROM_END /* Driver */ /* YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS */ -COMP( 1979, sdk86, 0, 0, sdk86, sdk86, sdk86_state, 0, "Intel", "SDK-86", MACHINE_NO_SOUND_HW) +COMP( 1979, sdk86, 0, 0, sdk86, sdk86, sdk86_state, 0, "Intel", "MCS-86 System Design Kit", MACHINE_NO_SOUND_HW) -- cgit v1.2.3-70-g09d2 From 58942fce28f28e9e85c4af3eae266077900cf607 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 2 Dec 2017 10:08:28 +0200 Subject: pgm2: make RTC ticking, removed orleg2 patch, its not needed anymore --- src/mame/drivers/pgm2.cpp | 41 ++++++++--------------------------------- src/mame/includes/pgm2.h | 1 + 2 files changed, 9 insertions(+), 33 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index ea1b2206695..d28f0fac442 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -64,6 +64,13 @@ READ32_MEMBER(pgm2_state::unk_startup_r) return 0x00000180; } +READ32_MEMBER(pgm2_state::rtc_r) +{ + // write to FFFFFD20 if bit 18 set (0x40000) probably reset this RTC timer + // TODO: somehow hook here current time/date, which is a bit complicated because value is relative, later to it added "base time" stored in SRAM + return machine().time().seconds(); +} + INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) { m_arm_aic->set_irq(0x47); @@ -131,7 +138,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0xfffff430, 0xfffff433) AM_WRITENOP // often AM_RANGE(0xfffff434, 0xfffff437) AM_WRITENOP // often - AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READNOP // often + AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READ(rtc_r) // AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(table_done_w) // after uploading encryption? table might actually send it or enable external ROM? AM_RANGE(0xfffffa0c, 0xfffffa0f) AM_READ(unk_startup_r) @@ -690,38 +697,6 @@ DRIVER_INIT_MEMBER(pgm2_state,orleg2) decrypter.decrypter_rom(memregion("user1")); machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020114, 0x20020117, read32_delegate(FUNC(pgm2_state::orleg2_speedup_r),this)); - - /* HACK! - patch out an ingame assert that ends up being triggered after the 5 element / fire chariot boss due to an invalid value in R3 - todo: why does this happen? ARM core bug? is patching out the assert actually safe? game continues as normal like this, but there could be memory corruption. - */ - uint16_t* rom; - rom = (uint16_t*)memregion("user1")->base(); - int hackaddress = -1; - - if (rom[0x12620 / 2] == 0xd301) // 104 / 103 - { - hackaddress = 0x12620; // RAM: 10012620 - } - else if (rom[0x1257C / 2] == 0xd301) // 101 - { - hackaddress = 0x1257C; - } - - if (hackaddress != -1) - { - rom[(hackaddress + 2) / 2] = 0x2300; - rom[(hackaddress + 4) / 2] = 0x2300; - rom = (uint16_t*)memregion("maincpu")->base(); // BEQ -> BNE for checksum - rom[0x39f2 / 2] = 0x1a00; - - // set a breakpoint on 0x10000000 + hackaddress to see when it triggers - } - else - { - fatalerror("no patch for this set \n"); - } - } DRIVER_INIT_MEMBER(pgm2_state,kov2nl) diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index da52a01d411..1488486b250 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -42,6 +42,7 @@ public: { } DECLARE_READ32_MEMBER(unk_startup_r); + DECLARE_READ32_MEMBER(rtc_r); DECLARE_WRITE32_MEMBER(fg_videoram_w); DECLARE_WRITE32_MEMBER(bg_videoram_w); -- cgit v1.2.3-70-g09d2 From 499520168454a83671ac7b9a8e8a02d72b46b451 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sat, 2 Dec 2017 19:08:31 +1100 Subject: fix sentence building by concatenation, and at the same time collapse two translatable strings to one (nw) --- plugins/cheatfind/init.lua | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/cheatfind/init.lua b/plugins/cheatfind/init.lua index b6fb2758746..191fc390d54 100644 --- a/plugins/cheatfind/init.lua +++ b/plugins/cheatfind/init.lua @@ -715,7 +715,7 @@ function cheatfind.startplugin() cheat_save.json = json.stringify({[1] = cheat}, {indent = true}) cheat_save.xml = string.format("\n\n\n\n", dev.tag:sub(2), widchar, match.addr, match.newval) cheat_save.simple = string.format("%s,%s,%X,%s,%X,%%s\n", setname, dev.tag, match.addr, widchar, match.newval) - manager:machine():popmessage(_("Default name is ") .. cheat_save.name) + manager:machine():popmessage(string.format(_("Default name is %s"), cheat_save.name)) return true else local func = "return space:read" -- cgit v1.2.3-70-g09d2 From 07c83eb9861a5e7fa378a7956caeb9c431e16373 Mon Sep 17 00:00:00 2001 From: theheroGAC Date: Sat, 2 Dec 2017 09:25:07 +0100 Subject: Update strings.po (#2875) Translations added or modified ------------------------------ Italian --- language/Italian/strings.po | 94 ++++++++++++++++++++++----------------------- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/language/Italian/strings.po b/language/Italian/strings.po index b77929e51be..0eaae7cc077 100644 --- a/language/Italian/strings.po +++ b/language/Italian/strings.po @@ -1,4 +1,4 @@ -# Copyright (C) 2016 THE PACKAGE'S COPYRIGHT HOLDER +# Copyright (C) 2017 THE PACKAGE'S COPYRIGHT HOLDER # This file is distributed under the same license as the PACKAGE package. # Automatically generated, 2016. # @@ -8,7 +8,7 @@ msgstr "" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2017-10-03 10:32+1100\n" "PO-Revision-Date: 2017-08-30 09:37+0200\n" -"Last-Translator: Piergiorgio Bellezza\n" +"Last-Translator: theheroGAC\n" "Language-Team: MAME Language Team\n" "Language: it\n" "MIME-Version: 1.0\n" @@ -1266,27 +1266,27 @@ msgstr "" #: src/frontend/mame/ui/selgame.cpp:946 msgid "Requires Artwork\tYes\n" -msgstr "" +msgstr "Richiede Artwork\tSi\n" #: src/frontend/mame/ui/selgame.cpp:946 msgid "Requires Artwork\tNo\n" -msgstr "" +msgstr "Richiede Artwork\tNo\n" #: src/frontend/mame/ui/selgame.cpp:947 msgid "Requires Clickable Artwork\tYes\n" -msgstr "" +msgstr "Richiede Artwork Cliccabile\tSi\n" #: src/frontend/mame/ui/selgame.cpp:947 msgid "Requires Clickable Artwork\tNo\n" -msgstr "" +msgstr "Richiede Artwork Cliccabile\tNo\n" #: src/frontend/mame/ui/selgame.cpp:948 msgid "Support Cocktail\tYes\n" -msgstr "" +msgstr "Supporto Cocktail\tSi\n" #: src/frontend/mame/ui/selgame.cpp:948 msgid "Support Cocktail\tNo\n" -msgstr "" +msgstr "Supporto Cocktail\tNo\n" #: src/frontend/mame/ui/selgame.cpp:949 msgid "Driver is BIOS\tYes\n" @@ -1298,11 +1298,11 @@ msgstr "" #: src/frontend/mame/ui/selgame.cpp:950 msgid "Support Save\tYes\n" -msgstr "" +msgstr "Supporto Salvataggio\tSi\n" #: src/frontend/mame/ui/selgame.cpp:950 msgid "Support Save\tNo\n" -msgstr "" +msgstr "Supporto Salvataggio\tNo\n" #: src/frontend/mame/ui/selgame.cpp:951 msgid "Screen Orientation\tVertical\n" @@ -1314,11 +1314,11 @@ msgstr "" #: src/frontend/mame/ui/selgame.cpp:961 msgid "Requires CHD\tYes\n" -msgstr "" +msgstr "Richiede CHD\tSi\n" #: src/frontend/mame/ui/selgame.cpp:961 msgid "Requires CHD\tNo\n" -msgstr "" +msgstr "Richiede CHD\tNo\n" #: src/frontend/mame/ui/selgame.cpp:974 msgid "ROM Audit Result\tOK\n" @@ -2043,7 +2043,7 @@ msgstr "Utilizza i pannelli di controllo" #: src/frontend/mame/ui/submenu.cpp:62 msgid "Use Marquees" -msgstr "Utilizza le Marce" +msgstr "Utilizza i Marquees" #: src/frontend/mame/ui/submenu.cpp:64 msgid "State/Playback Options" @@ -2475,11 +2475,11 @@ msgstr "Impostazioni" #: plugins/timer/init.lua:94 msgid "Current time" -msgstr "" +msgstr "Tempo corrente" #: plugins/timer/init.lua:96 msgid "Total time" -msgstr "" +msgstr "Tempo totale" #: plugins/timer/init.lua:98 msgid "Play Count" @@ -2491,11 +2491,11 @@ msgstr "" #: plugins/cheat/init.lua:458 msgid "Select cheat to set hotkey" -msgstr "" +msgstr "Seleziona cheat per impostare gli hotkey" #: plugins/cheat/init.lua:464 msgid "Press button for hotkey or wait to clear" -msgstr "" +msgstr "Premere il pulsante per gli hotkey o attendere per cancellare" #: plugins/cheat/init.lua:476 msgid "None" @@ -2503,7 +2503,7 @@ msgstr "Nessuno" #: plugins/cheat/init.lua:481 msgid "Done" -msgstr "" +msgstr "Fatto" #: plugins/cheat/init.lua:495 plugins/cheat/init.lua:509 msgid "Set" @@ -2511,32 +2511,32 @@ msgstr "" #: plugins/cheat/init.lua:528 msgid "Set hotkeys" -msgstr "" +msgstr "Imposta i tasti di scelta rapida" #: plugins/cheat/init.lua:668 #, lua-format msgid "Activated: %s = %s" -msgstr "" +msgstr "Attivato: %s = %s" #: plugins/cheat/init.lua:671 plugins/cheat/init.lua:729 #, lua-format msgid "Activated: %s" -msgstr "" +msgstr "Attivato: %s" #: plugins/cheat/init.lua:733 #, lua-format msgid "Enabled: %s" -msgstr "" +msgstr "Abilitato: %s" #: plugins/cheat/init.lua:738 #, lua-format msgid "Disabled: %s" -msgstr "" +msgstr "Disabilitato: %s" #: plugins/cheat/init.lua:776 #, lua-format msgid "%s added" -msgstr "" +msgstr "%s aggiunto" #: plugins/data/data_command.lua:19 msgid "Command" @@ -2584,15 +2584,15 @@ msgstr "Punteggio MARP" #: plugins/cheatfind/init.lua:344 msgid "Save Cheat" -msgstr "" +msgstr "Salva Cheat" #: plugins/cheatfind/init.lua:347 msgid "Default" -msgstr "" +msgstr "Predefinito" #: plugins/cheatfind/init.lua:347 msgid "Custom" -msgstr "" +msgstr "Personalizzato" #: plugins/cheatfind/init.lua:348 msgid "Cheat Name" @@ -2601,7 +2601,7 @@ msgstr "" #: plugins/cheatfind/init.lua:354 #, lua-format msgid "Default name is %s" -msgstr "" +msgstr "Il nome predefinito è %s" #: plugins/cheatfind/init.lua:362 msgid "Player" @@ -2609,20 +2609,20 @@ msgstr "" #: plugins/cheatfind/init.lua:367 msgid "Type" -msgstr "" +msgstr "Tipo" #: plugins/cheatfind/init.lua:373 msgid "Save" -msgstr "" +msgstr "Salva" #: plugins/cheatfind/init.lua:399 #, lua-format msgid "Cheat written to %s and added to cheat.simple" -msgstr "" +msgstr "Cheat scritto su %s e aggiunto a cheat.simple" #: plugins/cheatfind/init.lua:407 msgid "Cheat added to cheat.simple" -msgstr "" +msgstr "Cheat aggiunto a cheat.simple" #: plugins/cheatfind/init.lua:412 msgid "" @@ -2632,31 +2632,31 @@ msgstr "" #: plugins/cheatfind/init.lua:421 msgid "Cancel" -msgstr "" +msgstr "Cancella" #: plugins/cheatfind/init.lua:426 msgid "CPU or RAM" -msgstr "" +msgstr "CPU o RAM" #: plugins/cheatfind/init.lua:430 msgid "Changes to this only take effect when \"Start new search\" is selected" -msgstr "" +msgstr "Le modifiche avranno effetto solo quando \"Inizia nuova ricerca\" è selezionato" #: plugins/cheatfind/init.lua:449 msgid "Data cleared and current state saved" -msgstr "" +msgstr "Dati cancellati e stato attuale salvato" #: plugins/cheatfind/init.lua:457 msgid "Start new search" -msgstr "" +msgstr "Inizia nuova ricerca" #: plugins/cheatfind/init.lua:467 msgid "Current state saved" -msgstr "" +msgstr "Stato attuale salvato" #: plugins/cheatfind/init.lua:474 msgid "Save current -- #" -msgstr "" +msgstr "Salva corrente -- #" #: plugins/cheatfind/init.lua:506 msgid " total matches found" @@ -2688,7 +2688,7 @@ msgstr "" #: plugins/cheatfind/init.lua:535 msgid "Left equal to right" -msgstr "" +msgstr "Sinistra uguale a destra" #: plugins/cheatfind/init.lua:537 msgid "Left not equal to right, value is difference" @@ -2704,7 +2704,7 @@ msgstr "" #: plugins/cheatfind/init.lua:543 msgid "Left less than value" -msgstr "" +msgstr "Sinistra, inferiore al valore" #: plugins/cheatfind/init.lua:545 msgid "Left greater than value" @@ -2732,7 +2732,7 @@ msgstr "" #: plugins/cheatfind/init.lua:578 msgid "Data Format" -msgstr "" +msgstr "Formato dati" #: plugins/cheatfind/init.lua:602 msgid "Undo last search -- #" @@ -2744,7 +2744,7 @@ msgstr "" #: plugins/cheatfind/init.lua:609 msgid "All" -msgstr "" +msgstr "TUTTO" #: plugins/cheatfind/init.lua:660 #, lua-format @@ -2753,11 +2753,11 @@ msgstr "" #: plugins/cheatfind/init.lua:692 msgid "Cheat engine not available" -msgstr "" +msgstr "Cheat engine non disponibile" #: plugins/cheatfind/init.lua:718 msgid "Default name is " -msgstr "" +msgstr "Il nome predefinito è " #: plugins/cheatfind/init.lua:741 msgid "Test" @@ -2765,7 +2765,7 @@ msgstr "" #: plugins/cheatfind/init.lua:741 msgid "Write" -msgstr "" +msgstr "Scrivere" #: plugins/cheatfind/init.lua:741 msgid "Watch" @@ -2773,7 +2773,7 @@ msgstr "" #: plugins/cheatfind/init.lua:758 msgid "Page" -msgstr "" +msgstr "Pagina" #: plugins/cheatfind/init.lua:776 msgid "Clear Watches" -- cgit v1.2.3-70-g09d2 From 61a02c8bd282b3c674d2c03445d1fff6c93c2cd4 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sat, 2 Dec 2017 06:32:21 -0300 Subject: Aristocrat MK5: Removed Margarita Magic set 2 [marmagicub]. The set is no longer needed since it's a corrupted dump identical to the redumped and verified good set. --- src/mame/drivers/aristmk5.cpp | 33 +-------------------------------- src/mame/mame.lst | 1 - 2 files changed, 1 insertion(+), 33 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 7fa04954cb0..6ff3aa9926e 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -4466,36 +4466,6 @@ ROM_START( marmagicua ) ROM_END -// US003 / Multi credit / Multi line -// Margarita Magic / NSW/ACT / A - 07/07/2000 -// EHG1559 / This is a twenty-line game -// The playlines are 1, 5, 10, 15 and 20 -// For 20 credit per line the max bet is 400 -// ROM has NSW/ACT strings but it is for US platform -ROM_START( marmagicub ) - ARISTOCRAT_MK5_BIOS - /* - This ROM set is exactly the same version as the parent, yet is bad in a completely different way! - Comparing the ROM data between this one and the above bad dump, it is highly possible that this set can be repaired as this ROM set came from a good dump until it was stripped of carriage return symbols (0x0D) by a web server - The "_a" suffix is to differentiate the ROMs from the above set and does not correspond to the label, the correct label is simply EHG1559. - checksum code not found due to ROMs being corrupted, all files except the last 2 are missing bytes consisting of 0x0D - */ - ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "ehg1559_a.u7", 0x000000, 0x7f03e, BAD_DUMP CRC(473afd5b) SHA1(823f8ad8cd5c3676feba8d740b50f25544a6c046) ) - ROM_LOAD32_WORD( "ehg1559_a.u11", 0x000002, 0x7ff66, BAD_DUMP CRC(c66df0dc) SHA1(015e6aed905bfef2f152137aa8aaaeaae41bc90e) ) - ROM_LOAD32_WORD( "ehg1559_a.u8", 0x100000, 0x7fcfe, BAD_DUMP CRC(5d2760d6) SHA1(655da82ae5dca1bb498399d2ee1efad7a3811cba) ) - ROM_LOAD32_WORD( "ehg1559_a.u12", 0x100002, 0x7fce2, BAD_DUMP CRC(56f9dcab) SHA1(2951a7189e5aa6e7338eb11f929fd6eea2541f0d) ) - ROM_LOAD32_WORD( "ehg1559_a.u9", 0x200000, 0x7ff4d, BAD_DUMP CRC(60323004) SHA1(8f188c7109538454a9ad5e14f21ab4ef76115153) ) - ROM_LOAD32_WORD( "ehg1559_a.u13", 0x200002, 0x7ff61, BAD_DUMP CRC(34320e8d) SHA1(b266d9c53cf746f1a164e006f14079bced2887ed) ) - ROM_LOAD32_WORD( "ehg1559.u10", 0x300000, 0x80000, CRC(3db4e373) SHA1(7150242253ae4a1c4f3211e3068f00e8b1ed51b1) ) - ROM_LOAD32_WORD( "ehg1559.u14", 0x300002, 0x80000, CRC(bdfdc0e4) SHA1(0e56f08abc0cdd9dfa5d8e51bb6fe06fa356b3b3) ) - - ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ - ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) - ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) -ROM_END - - // 0400115V / 559/2 / 10 Credit Multiplier/9 Line Multiline // Mine, Mine, Mine / Local / D - 16/01/96 ROM_START( minemine ) @@ -7034,7 +7004,7 @@ GAMEL( 1997, magtcha5a, magtcha5, aristmk5_touch, dimtouch, aristmk5_s GAMEL( 1997, mammothm, aristmk5, aristmk5, kgalah, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mammoth Money (0100425V, NSW/ACT)", MACHINE_FLAGS, layout_kgalah ) // 595/5, D - 07/04/97, Rev 1.22.14.1 GAMEL( 2000, marmagic, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", MACHINE_FLAGS, layout_marmagic ) // JB005, A - 07/07/00, Rev 17 GAMEL( 2000, marmagicu, marmagic, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1558, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US003, 07/07/2000 -GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US, set 1)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 +GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 GAMEL( 1997, mgarden, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Garden (AHG1211-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4033, B - 10/02/97 (alt title for enchanted forest?) GAMEL( 1996, minemine, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (0400115V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 559/2, D - 16/01/96, Rev 1.18.3.0 GAMEL( 1996, minemineu, minemine, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (VHG0416-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 559/2, E - 14/02/96 @@ -7143,7 +7113,6 @@ GAMEL( 2001, dynajacku, dynajack, aristmk5_usa, aristmk5_usa, aristmk5_s GAMEL( 2000, eforsta5ce, eforsta5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest - Cash Express (CHG1536, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/6, C - 17/01/00 GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 -GAMEL( 2000, marmagicub, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US, set 2)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 GAMEL( 2001, mountmonce, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money - Cash Express (AHG1629, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, mountmonu, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money (BHG1465, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, partygrsb, partygrs, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Party Gras (AHG1568, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4115/6, A - 10/11/2001, 20 lines diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 80efc6f4314..a3adca7212a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1531,7 +1531,6 @@ mammothm // (c) 1997 marmagic // (c) 2000 marmagicu // (c) 2000 marmagicua // (c) 2000 -marmagicub // (c) 2000 minemine // (c) 1996 minemineu // (c) 1996 monmouse // (c) 1997 -- cgit v1.2.3-70-g09d2 From 51c06e670fadc0172268149fee689a54ee06e644 Mon Sep 17 00:00:00 2001 From: smf- Date: Sat, 2 Dec 2017 09:48:29 +0000 Subject: fix compiling with latest build tools (nw) Compiling src/devices/cpu/hd61700/hd61700.cpp... ../../../../../src/devices/cpu/e132xs/e132xs.cpp: In member function 'void hyperstone_device::set_global_register(uint8_t, uint32_t)': ../../../../../src/devices/cpu/e132xs/e132xs.cpp:619:4: error: this 'if' clause does not guard... [-Werror=misleading-indentation] if ((m_global_regs[code] ^ val) & 0x00800000) ^~ ../../../../../src/devices/cpu/e132xs/e132xs.cpp:621:5: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if' m_global_regs[code] = val; ^~~~~~~~~~~~~ --- src/devices/cpu/e132xs/e132xs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index f4ff034b38d..a1298208c61 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -618,7 +618,7 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val) case FCR_REGISTER: if ((m_global_regs[code] ^ val) & 0x00800000) adjust_timer_interrupt(); - m_global_regs[code] = val; + m_global_regs[code] = val; if (m_intblock < 1) m_intblock = 1; return; -- cgit v1.2.3-70-g09d2 From 843cf2982eb245531d454d788821230ca000fb7e Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sat, 2 Dec 2017 23:41:43 +1100 Subject: allow compiler a little more optimisation leeway in x86 count_leading_* (nw) --- src/emu/validity.cpp | 4 ++++ src/osd/eigccx86.h | 10 ++++------ src/osd/eivc.h | 4 ++-- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/emu/validity.cpp b/src/emu/validity.cpp index a7e87c39f12..ff29b1b7442 100644 --- a/src/emu/validity.cpp +++ b/src/emu/validity.cpp @@ -514,9 +514,13 @@ void validity_checker::validate_inlines() testi32a = (testi32a & 0x0000ffff) | 0x400000; if (count_leading_zeros(testi32a) != 9) osd_printf_error("Error testing count_leading_zeros\n"); + if (count_leading_zeros(0) != 32) + osd_printf_error("Error testing count_leading_zeros\n"); testi32a = (testi32a | 0xffff0000) & ~0x400000; if (count_leading_ones(testi32a) != 9) osd_printf_error("Error testing count_leading_ones\n"); + if (count_leading_ones(0xffffffff) != 32) + osd_printf_error("Error testing count_leading_ones\n"); } diff --git a/src/osd/eigccx86.h b/src/osd/eigccx86.h index b67b646451e..b3831d21524 100644 --- a/src/osd/eigccx86.h +++ b/src/osd/eigccx86.h @@ -474,13 +474,12 @@ _count_leading_zeros(uint32_t value) __asm__ ( " bsrl %[value], %[result] ;" " cmovzl %[bias], %[result] ;" - " xorl $31, %[result] ;" : [result] "=&r" (result) // result can be in any register : [value] "rm" (value) // 'value' can be register or memory - , [bias] "rm" (uint32_t(63)) // 'bias' can be register or memory + , [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory : "cc" // clobbers condition codes ); - return result; + return 31U - result; } @@ -497,13 +496,12 @@ _count_leading_ones(uint32_t value) __asm__ ( " bsrl %[value], %[result] ;" " cmovzl %[bias], %[result] ;" - " xorl $31, %[result] ;" : [result] "=&r" (result) // result can be in any register : [value] "rm" (~value) // 'value' can be register or memory - , [bias] "rm" (uint32_t(63)) // 'bias' can be register or memory + , [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory : "cc" // clobbers condition codes ); - return result; + return 31U - result; } #endif // MAME_OSD_EIGCCX86_H diff --git a/src/osd/eivc.h b/src/osd/eivc.h index de4ea809a28..3fa34f51b3c 100644 --- a/src/osd/eivc.h +++ b/src/osd/eivc.h @@ -31,7 +31,7 @@ inline uint8_t _count_leading_zeros(uint32_t value) { unsigned long index; - return _BitScanReverse(&index, value) ? (index ^ 31) : 32; + return _BitScanReverse(&index, value) ? (31U - index) : 32U; } #endif @@ -46,7 +46,7 @@ inline uint8_t _count_leading_zeros(uint32_t value) inline uint8_t _count_leading_ones(uint32_t value) { unsigned long index; - return _BitScanReverse(&index, ~value) ? (index ^ 31) : 32; + return _BitScanReverse(&index, ~value) ? (31U - index) : 32U; } #endif -- cgit v1.2.3-70-g09d2 From f89e9af986352a65b37cc382e6715570c15d7379 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 13:47:21 +0100 Subject: e132xs: templatized call opcode, nw --- src/devices/cpu/e132xs/e132xs.cpp | 4 +-- src/devices/cpu/e132xs/e132xs.h | 3 +- src/devices/cpu/e132xs/e132xsop.hxx | 67 ++----------------------------------- 3 files changed, 6 insertions(+), 68 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index a1298208c61..c8051817cf6 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1818,8 +1818,8 @@ void hyperstone_device::execute_run() case 0xeb: hyperstone_db(); break; case 0xec: hyperstone_dbr(); break; case 0xed: hyperstone_frame(); break; - case 0xee: hyperstone_call_global(); break; - case 0xef: hyperstone_call_local(); break; + case 0xee: hyperstone_call(); break; + case 0xef: hyperstone_call(); break; case 0xf0: hyperstone_b(); break; case 0xf1: hyperstone_b(); break; case 0xf2: hyperstone_b(); break; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 9dd1b919728..f6c06917f70 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -363,8 +363,7 @@ private: void hyperstone_dbr(); void hyperstone_frame(); - void hyperstone_call_global(); - void hyperstone_call_local(); + template void hyperstone_call(); void hyperstone_trap(); void hyperstone_extend(); diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index e94eeefd15d..8d83ef6b412 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -2756,7 +2756,8 @@ void hyperstone_device::hyperstone_frame() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_global() +template +void hyperstone_device::hyperstone_call() { uint16_t imm_1 = READ_OP(PC); PC += 2; @@ -2791,10 +2792,7 @@ void hyperstone_device::hyperstone_call_global() uint32_t src_code = SRC_CODE; uint32_t dst_code = DST_CODE; - uint32_t sreg = m_global_regs[src_code]; - - if (src_code == SR_REGISTER) - sreg = 0; + uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; if (!DST_CODE) dst_code = 16; @@ -2818,65 +2816,6 @@ void hyperstone_device::hyperstone_call_global() m_icount -= m_clock_cycles_1; } -void hyperstone_device::hyperstone_call_local() -{ - uint16_t imm_1 = READ_OP(PC); - PC += 2; - - int32_t extra_s = 0; - - if (imm_1 & 0x8000) - { - uint16_t imm_2 = READ_OP(PC); - - PC += 2; - SET_ILC(3<<19); - - extra_s = imm_2; - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - extra_s |= 0xc0000000; - } - else - { - extra_s = imm_1 & 0x3fff; - - SET_ILC(2<<19); - - if (imm_1 & 0x4000) - extra_s |= 0xffffc000; - } - - check_delay_PC(); - - uint32_t src_code = SRC_CODE; - uint32_t dst_code = DST_CODE; - - if (!DST_CODE) - dst_code = 16; - - uint32_t fp = GET_FP; - extra_s = (extra_s & ~1) + m_local_regs[(src_code + fp) & 0x3f]; - - uint32_t dreg_index = dst_code + fp; - m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; - m_local_regs[(dreg_index + 1) & 0x3f] = SR; - - SET_FP(fp + dst_code); - SET_FL(6); //default value for call - SR &= ~M_MASK; - - PC = extra_s; - - m_intblock = 2; - - //TODO: add interrupt locks, errors, .... - - //TODO: no 1! - m_icount -= m_clock_cycles_1; -} - template void hyperstone_device::hyperstone_b() { -- cgit v1.2.3-70-g09d2 From 0b04b7d53338bb2513593543145c4adbec586556 Mon Sep 17 00:00:00 2001 From: r09 Date: Sat, 2 Dec 2017 13:02:17 +0100 Subject: fmtowns: even better horizontal scrolling --- src/mame/video/fmtowns.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index f4c77ab6034..9cb02b6cbb4 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -958,8 +958,8 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / hzoom; } else { @@ -970,8 +970,8 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 2) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / hzoom; } off += line * linesize; @@ -1150,8 +1150,8 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[21] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[21] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / hzoom; } else { @@ -1162,8 +1162,8 @@ void towns_state::towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rect scroll = ((m_video.towns_crtc_reg[17] & 0xfc00) << 3) | (((m_video.towns_crtc_reg[17] & 0x3ff) << 3)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / hzoom; } off += line * linesize; @@ -1296,8 +1296,8 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[21] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[21] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / 2; hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / (hzoom * 2); } else { @@ -1308,8 +1308,8 @@ void towns_state::towns_crtc_draw_scan_layer_16(bitmap_rgb32 &bitmap,const recta scroll = ((m_video.towns_crtc_reg[17] & 0xfc00)<<2) | (((m_video.towns_crtc_reg[17] & 0x3ff)<<2)); off += scroll; } - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / 2; hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / (hzoom * 2); } off += line * linesize; -- cgit v1.2.3-70-g09d2 From f3dcc7e6b695d8d02f10c92b0811c085d37e9b93 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 14:45:12 +0100 Subject: e132xs: fix minor issue with templated call, nw --- src/devices/cpu/e132xs/e132xsop.hxx | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index 8d83ef6b412..d3f9fa50de8 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -2789,7 +2789,8 @@ void hyperstone_device::hyperstone_call() check_delay_PC(); - uint32_t src_code = SRC_CODE; + uint32_t fp = GET_FP; + uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); uint32_t dst_code = DST_CODE; uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]; @@ -2797,7 +2798,6 @@ void hyperstone_device::hyperstone_call() if (!DST_CODE) dst_code = 16; - uint32_t fp = GET_FP; uint32_t dreg_index = dst_code + fp; m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S; m_local_regs[(dreg_index + 1) & 0x3f] = SR; -- cgit v1.2.3-70-g09d2 From 280fb70b58ef02ffac97ebcf1e812e80ab361283 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 2 Dec 2017 16:43:46 +0100 Subject: e132xs: simplify stxx1. nw --- src/devices/cpu/e132xs/e132xs.h | 3 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 4 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 112 +++++++++- src/devices/cpu/e132xs/e132xsop.hxx | 361 ++++++++++--------------------- 4 files changed, 223 insertions(+), 257 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index f6c06917f70..de624a13688 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -513,8 +513,7 @@ private: void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_call_global(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_call_local(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + template void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 9cfe01d9f5d..d6c2bed25b1 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -937,8 +937,8 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com case 0xeb: generate_db(block, compiler, desc); break; case 0xec: generate_dbr(block, compiler, desc); break; case 0xed: generate_frame(block, compiler, desc); break; - case 0xee: generate_call_global(block, compiler, desc); break; - case 0xef: generate_call_local(block, compiler, desc); break; + case 0xee: generate_call(block, compiler, desc); break; + case 0xef: generate_call(block, compiler, desc); break; case 0xf0: generate_b(block, compiler, desc); break; case 0xf1: generate_b(block, compiler, desc); break; case 0xf2: generate_b(block, compiler, desc); break; diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 368358bd443..e829cf070a1 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -1189,6 +1189,38 @@ void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { +/* + const uint16_t op = desc->opptr.w[0]; + uint16_t next_1 = READ_OP(desc->pc + 2); + const uint16_t sub_type = (next_1 & 0x3000) >> 12; + + uint32_t extra_s; + if (next_1 & 0x8000) + { + const uint16_t next_2 = READ_OP(desc->pc + 4); + + extra_s = next_2; + extra_s |= ((next_1 & 0xfff) << 16); + + if (next_1 & 0x4000) + extra_s |= 0xf0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = next_1 & 0xfff; + + if (next_1 & 0x4000) + extra_s |= 0xfffff000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + generate_check_delay_pc(block); +*/ } @@ -1334,15 +1366,87 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp UML_LABEL(block, done); } -void hyperstone_device::generate_call_global(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +template +void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { -} + uint16_t op = desc->opptr.w[0]; + uint16_t imm_1 = READ_OP(desc->pc + 2); -void hyperstone_device::generate_call_local(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ + int32_t extra_s = 0; + + if (imm_1 & 0x8000) + { + uint16_t imm_2 = READ_OP(desc->pc + 4); + + extra_s = imm_2; + extra_s |= ((imm_1 & 0x3fff) << 16); + + if (imm_1 & 0x4000) + extra_s |= 0xc0000000; + + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + extra_s = imm_1 & 0x3fff; + + if (imm_1 & 0x4000) + extra_s |= 0xffffc000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + UML_MOV(block, I1, extra_s); + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + uint32_t dst_code = (op & 0xf0) >> 4; + + if (!dst_code) + dst_code = 16; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I2, 0); + else + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I4, I3, src_code); + UML_AND(block, I5, I4, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, I4, DRC_PC, ~1); + UML_ROLINS(block, I4, DRC_SR, 32-S_SHIFT, 1); + + UML_ADD(block, I1, I3, dst_code); + UML_AND(block, I6, I1, 0x3f); + UML_STORE(block, (void *)m_local_regs, I6, I4, SIZE_DWORD, SCALE_x4); + + UML_ADD(block, I4, I6, 1); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, DRC_SR, SIZE_DWORD, SCALE_x4); + + UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); + UML_ROLINS(block, DRC_SR, 6, 21, 0x01e00000); + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + + UML_ADD(block, DRC_PC, I2, extra_s & ~1); + UML_MOV(block, mem(&m_intblock), 2); + + //TODO: add interrupt locks, errors, .... } + void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { } diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index d3f9fa50de8..9d55b78d233 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -1584,167 +1584,84 @@ void hyperstone_device::hyperstone_ldxx1() const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // LDBS.A - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(extra_s)); - else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(extra_s); - break; - - case 1: // LDBU.A - if (SRC_GLOBAL) - m_global_regs[src_code] = READ_B(extra_s); - else - m_local_regs[src_code] = READ_B(extra_s); - break; + case 0: // LDBS.D + if (SRC_GLOBAL) + set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) // LDHS.A - set_global_register(src_code, (int32_t)(int16_t)READ_HW(extra_s)); - else // LDHU.A - set_global_register(src_code, READ_HW(extra_s)); - } - else - { - if (extra_s & 1) // LDHS.A - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(extra_s); - else // LDHU.A - m_local_regs[src_code] = READ_HW(extra_s); - } - break; + case 1: // LDBU.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_B(dreg + extra_s)); + else + m_local_regs[src_code] = READ_B(dreg + extra_s); + break; - case 3: - switch (extra_s & 3) - { - case 0: // LDW.A - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(extra_s)); - else - m_local_regs[src_code] = READ_W(extra_s); - break; - case 1: // LDD.A - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(extra_s)); - set_global_register(srcf_code, READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = READ_W(extra_s); - m_local_regs[srcf_code] = READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOA - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(extra_s)); - else - m_local_regs[src_code] = IO_READ_W(extra_s); - break; - case 3: // LDD.IOA - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(extra_s)); - set_global_register(srcf_code, IO_READ_W(extra_s + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(extra_s); - m_local_regs[srcf_code] = IO_READ_W(extra_s + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } - } - else - { - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; - switch (sub_type) - { - case 0: // LDBS.D - if (SRC_GLOBAL) - set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s)); + case 2: + if (SRC_GLOBAL) + { + if (extra_s & 1) + set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); else - m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s); - break; - - case 1: // LDBU.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_B(dreg + extra_s)); + set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); + } + else + { + if (extra_s & 1) + m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); else - m_local_regs[src_code] = READ_B(dreg + extra_s); - break; + m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); + } + break; - case 2: - if (SRC_GLOBAL) - { - if (extra_s & 1) - set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1))); + case 3: + switch (extra_s & 3) + { + case 0: // LDW.D + if (SRC_GLOBAL) + set_global_register(src_code, READ_W(dreg + extra_s)); else - set_global_register(src_code, READ_HW(dreg + (extra_s & ~1))); - } - else - { - if (extra_s & 1) - m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)); + m_local_regs[src_code] = READ_W(dreg + extra_s); + break; + case 1: // LDD.D + if (SRC_GLOBAL) + { + set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); + set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); + } else - m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1)); - } - break; - - case 3: - switch (extra_s & 3) - { - case 0: // LDW.D - if (SRC_GLOBAL) - set_global_register(src_code, READ_W(dreg + extra_s)); - else - m_local_regs[src_code] = READ_W(dreg + extra_s); - break; - case 1: // LDD.D - if (SRC_GLOBAL) - { - set_global_register(src_code, READ_W(dreg + (extra_s & ~1))); - set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4)); - } - else - { - m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); - m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - case 2: // LDW.IOD - if (SRC_GLOBAL) - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - else - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - break; - case 3: // LDD.IOD - if (SRC_GLOBAL) - { - set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); - set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); - } - else - { - m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); - m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); - } - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - break; - } + { + m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1)); + m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + case 2: // LDW.IOD + if (SRC_GLOBAL) + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + else + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + break; + case 3: // LDD.IOD + if (SRC_GLOBAL) + { + set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3))); + set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4)); + } + else + { + m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3)); + m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4); + } + m_icount -= m_clock_cycles_1; // extra cycle + break; + } + break; } m_icount -= m_clock_cycles_1; @@ -1930,110 +1847,56 @@ void hyperstone_device::hyperstone_stxx1() const uint32_t fp = GET_FP; const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f); const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f); - const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]; + const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]); const uint32_t sreg = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]); - if (DST_GLOBAL && dst_code == SR_REGISTER) + switch (sub_type) { - switch (sub_type) - { - case 0: // STBS.A - // TODO: missing trap on range error - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.A - WRITE_B(extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.A, STHU.A - WRITE_HW(extra_s, (uint16_t)sreg); - // TODO: missing trap on range error with STHS.A - break; - - case 3: - switch (extra_s & 3) + case 0: // STBS.D + // TODO: missing trap on range error + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 1: // STBU.D + WRITE_B(dreg + extra_s, (uint8_t)sreg); + break; + + case 2: // STHS.D, STHU.D + WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); + // TODO: missing trap on range error with STHS.D + break; + + case 3: + switch (extra_s & 3) + { + case 0: // STW.D + WRITE_W(dreg + (extra_s & ~1), sreg); + break; + case 1: // STD.D { - case 0: // STW.A - WRITE_W(extra_s & ~1, sreg); - break; - case 1: // STD.A - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(extra_s, sreg); - WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOA - IO_WRITE_W(extra_s & ~3, sreg); - break; - case 3: // STD.IOA - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(extra_s, sreg); - IO_WRITE_W(extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~1; + WRITE_W(dreg + extra_s, sreg); + WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } - } - else - { - switch (sub_type) - { - case 0: // STBS.D - // TODO: missing trap on range error - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 1: // STBU.D - WRITE_B(dreg + extra_s, (uint8_t)sreg); - break; - - case 2: // STHS.D, STHU.D - WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg); - // TODO: missing trap on range error with STHS.D - break; - - case 3: - switch (extra_s & 3) + case 2: // STW.IOD + IO_WRITE_W(dreg + (extra_s & ~3), sreg); + break; + case 3: // STD.IOD { - case 0: // STW.D - WRITE_W(dreg + (extra_s & ~1), sreg); - break; - case 1: // STD.D - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~1; - WRITE_W(dreg + extra_s, sreg); - WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } - case 2: // STW.IOD - IO_WRITE_W(dreg + (extra_s & ~3), sreg); - break; - case 3: // STD.IOD - { - const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); - const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); - extra_s &= ~3; - IO_WRITE_W(dreg + extra_s, sreg); - IO_WRITE_W(dreg + extra_s + 4, sregf); - m_icount -= m_clock_cycles_1; // extra cycle - break; - } + const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f); + const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]); + extra_s &= ~3; + IO_WRITE_W(dreg + extra_s, sreg); + IO_WRITE_W(dreg + extra_s + 4, sregf); + m_icount -= m_clock_cycles_1; // extra cycle + break; } - break; - } + } + break; } m_icount -= m_clock_cycles_1; -- cgit v1.2.3-70-g09d2 From 3eb7d8aa7d3df65ccf5d2469ca9133a9c3de5a00 Mon Sep 17 00:00:00 2001 From: smf- Date: Sat, 2 Dec 2017 16:12:05 +0000 Subject: twinkle: Changed RF5C400 clock to match board notes in driver. [smf] twinkle: Added 8mb of dummy ram to the RF5C400 and adjusted the banking so that sounds play correctly. [smf] twinkle: Improved LED font from available reference sources. [smf] twinkle: Mapped lamps and dip switches [smf] twinkle: Added basic internal artwork. [smf] Machines promoted to working ---------------------------- beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM) [smf, R. Belmont, Sarah Purohit] beatmania IIDX 4th style (GCA03 JAA) [smf, R. Belmont, Sarah Purohit] beatmania IIDX 6th style (GCB4U JAB) [smf, R. Belmont, Sarah Purohit] beatmania IIDX 6th style (GCB4U JAA) [smf, R. Belmont, Sarah Purohit] beatmania IIDX 7th style (GCB44 JAA) [smf, R. Belmont, Sarah Purohit] beatmania IIDX 8th style (GCC44 JAA) [smf, R. Belmont, Sarah Purohit] --- src/mame/drivers/twinkle.cpp | 310 +++++++++++++++++++++++++++---------------- src/mame/layout/bmiidx.lay | 151 +++++++++++++++++++++ 2 files changed, 343 insertions(+), 118 deletions(-) create mode 100644 src/mame/layout/bmiidx.lay diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index d0651ac8b2b..2788dc976b0 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -9,7 +9,7 @@ driver by smf and R. Belmont TODO: dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca -finish sound board emulation and remove response hle +remove dummy 8mb bank emulate dvd player and video mixing 16seg led font @@ -247,6 +247,8 @@ Notes: #include "sound/rf5c400.h" #include "speaker.h" +#include "bmiidx.lh" + class twinkle_state : public driver_device { public: @@ -256,6 +258,8 @@ public: m_ata(*this, "ata"), m_waveram(*this, "rfsnd"), m_spu_ata_dma(0), + m_spu_ata_dmarq(0), + m_wave_bank(0), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu") { @@ -268,16 +272,17 @@ public: uint16_t m_spu_ctrl; // SPU board control register uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM uint32_t m_spu_ata_dma; - uint32_t m_wave_bank; int m_spu_ata_dmarq; + uint32_t m_wave_bank; int m_io_offset; int m_output_last[ 0x100 ]; - int m_last_io_offset; uint8_t m_sector_buffer[ 4096 ]; DECLARE_WRITE8_MEMBER(twinkle_io_w); DECLARE_READ8_MEMBER(twinkle_io_r); DECLARE_WRITE16_MEMBER(twinkle_output_w); + DECLARE_WRITE16_MEMBER(led_w); + DECLARE_WRITE16_MEMBER(key_led_w); DECLARE_WRITE16_MEMBER(serial_w); DECLARE_WRITE8_MEMBER(shared_psx_w); DECLARE_READ8_MEMBER(shared_psx_r); @@ -288,6 +293,7 @@ public: DECLARE_WRITE16_MEMBER(twinkle_waveram_w); DECLARE_READ16_MEMBER(shared_68k_r); DECLARE_WRITE16_MEMBER(shared_68k_w); + DECLARE_WRITE16_MEMBER(spu_led_w); DECLARE_WRITE16_MEMBER(spu_wavebank_w); DECLARE_READ16_MEMBER(unk_68k_r); DECLARE_WRITE_LINE_MEMBER(spu_ata_irq); @@ -306,8 +312,6 @@ public: int m_output_clock; }; -/* RTC */ - #define LED_A1 0x0001 #define LED_A2 0x0002 #define LED_B 0x0004 @@ -334,23 +338,15 @@ public: static const uint16_t asciicharset[]= { - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_J | LED_M, // 0 - LED_B | LED_C, // 1 - LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2, // 3 - LED_B | LED_C | LED_F | LED_G1 | LED_G2 , // 4 - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_K, // 5 - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 6 - LED_A1 | LED_A2 | LED_B | LED_C, // 7 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 8 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F, // 9 - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F -// 16 +// 0 + 0, // (default on boot) + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 0, @@ -359,6 +355,7 @@ static const uint16_t asciicharset[]= 0, 0, 0, +// 0x10 0, 0, 0, @@ -367,63 +364,72 @@ static const uint16_t asciicharset[]= 0, 0, 0, -// 32 + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, +// 0x20 0, // space - 0, // ! - 0, // " + LED_D2 | LED_A2 | LED_I | LED_J, // ! + LED_I | LED_B, // " 0, // # 0, // $ 0, // % - 0, // & + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_H | LED_J | LED_M | LED_K | LED_C, // & 0, // ' - 0, // ( - 0, // ) - 0, // * + LED_J | LED_K, // ( + LED_H | LED_M, // ) + LED_G1 | LED_G2 | LED_H | LED_I | LED_J | LED_K | LED_L | LED_M, // * 0, // + 0, // , - 0, // - + LED_G1 | LED_G2, // - 0, // . - 0, // / -// 48 + LED_J | LED_M, // / +// 0x30 LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_J | LED_M, // 0 LED_B | LED_C, // 1 - LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2, // 3 + LED_A1 | LED_A2 | LED_B | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // 2 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G1 | LED_G2, // 3 LED_B | LED_C | LED_F | LED_G1 | LED_G2 , // 4 - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_K, // 5 - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 6 - LED_A1 | LED_A2 | LED_B | LED_C, // 7 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // 8 - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F, // 9 + LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // 5 + LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 6 + LED_A1 | LED_A2 | LED_B | LED_C | LED_F, // 7 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // 8 + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // 9 0, // : 0, // ; 0, // < 0, // = 0, // > - 0, // ? -// 64 + LED_A1 | LED_A2 | LED_J | LED_D2, // ? +// 0x40 0, // @ - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B + LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // A + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_J | LED_K, // B LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D + LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_G1 | LED_G2, // D LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F + LED_A1 | LED_A2 | LED_E | LED_F | LED_G1 | LED_G2, // F LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G2, // G LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // H - LED_I | LED_L, // I - LED_B | LED_C | LED_D1 | LED_D2 | LED_E, // J + LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_I | LED_L, // I + LED_A1 | LED_A2 | LED_I | LED_L | LED_D2, // J LED_E | LED_F | LED_G1 | LED_J | LED_K, // K LED_D1 | LED_D2 | LED_E | LED_F, // L LED_B | LED_C | LED_E | LED_F | LED_H | LED_J, // M LED_B | LED_C | LED_E | LED_F | LED_H | LED_K, // N LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_A1 | LED_A2 | LED_B | LED_E | LED_F, // P +// 0x50 + LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_G1 | LED_G2, // P LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_K, // Q - LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K, // R + LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K | LED_G1 | LED_G2, // R LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // S LED_A1 | LED_A2 | LED_I | LED_L, // T - LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O + LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // U LED_E | LED_F | LED_M | LED_J, // V LED_B | LED_C | LED_E | LED_F | LED_M | LED_K, // W LED_H | LED_J | LED_K | LED_M, // X @@ -434,33 +440,35 @@ static const uint16_t asciicharset[]= 0, // ] 0, // ^ 0, // _ +// 0x60 0, // ` - LED_A1 | LED_A2 | LED_B | LED_C | LED_E | LED_F, // A - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_G2 | LED_I | LED_L, // B - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F, // C - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_I | LED_L, // D - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2, // E - LED_A1 | LED_A2 | LED_E | LED_F | LED_G1, // F - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G2, // G - LED_B | LED_C | LED_E | LED_F | LED_G1 | LED_G2, // H - LED_I | LED_L, // I - LED_B | LED_C | LED_D1 | LED_D2 | LED_E, // J - LED_E | LED_F | LED_G1 | LED_J | LED_K, // K - LED_D1 | LED_D2 | LED_E | LED_F, // L - LED_B | LED_C | LED_E | LED_F | LED_H | LED_J, // M - LED_B | LED_C | LED_E | LED_F | LED_H | LED_K, // N - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_A1 | LED_A2 | LED_B | LED_E | LED_F, // P - LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_K, // Q - LED_A1 | LED_A2 | LED_B | LED_E | LED_F | LED_K, // R - LED_A1 | LED_A2 | LED_C | LED_D1 | LED_D2 | LED_F | LED_G1 | LED_G2, // S - LED_A1 | LED_A2 | LED_I | LED_L, // T - LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F, // O - LED_E | LED_F | LED_M | LED_J, // V - LED_B | LED_C | LED_E | LED_F | LED_M | LED_K, // W - LED_H | LED_J | LED_K | LED_M, // X - LED_H | LED_J | LED_L, // Y - LED_A1 | LED_A2 | LED_D1 | LED_D2 | LED_J | LED_M, // Z + 0, // a + 0, // b + 0, // c + 0, // d + 0, // e + 0, // f + LED_A1 | LED_A2 | LED_B | LED_C | LED_D1 | LED_D2 | LED_E | LED_F | LED_G1 | LED_G2 | LED_H | LED_I | LED_J | LED_K | LED_L | LED_M, // g (16 seg led test) + 0, // h + 0, // i + 0, // j + 0, // k + 0, // l + LED_D2, // m (".") + 0, // n + 0, // o +// 0x70 + 0, // p + LED_J, // q ("'") + 0, // r + 0, // s + 0, // t + LED_M, // u (",") + 0, // v + 0, // w + 0, // x + 0, // y + 0, // z 0, // { 0, // | 0, // } @@ -486,9 +494,25 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) case 0x1f: case 0x27: case 0x2f: + if (data != 0xff) + { + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); + } + break; + case 0x37: + output().set_value("1p", (~data >> 0) & 1); + output().set_value("2p", (~data >> 1) & 1); + output().set_value("vefx", (~data >> 2) & 1); + output().set_value("effect", (~data >> 3) & 1); + output().set_value("credit", (~data >> 4) & 1); + + if ((data & 0xe0) != 0xe0) + { + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); + } + break; - /* led */ case 0x3f: case 0x47: case 0x4f: @@ -498,7 +522,7 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) case 0x6f: case 0x77: case 0x7f: - output().set_indexed_value( "led", ( m_io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] ); + output().set_indexed_value( "led", ( m_io_offset - 0x3f ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] ); break; case 0x87: @@ -519,7 +543,7 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w) if( ( data & 0xf8 ) != 0xf8 ) { - printf("%02x = %02x\n", m_io_offset, data ); + osd_printf_warning("unknown io %02x = %02x\n", m_io_offset, data); } break; @@ -570,10 +594,7 @@ READ8_MEMBER(twinkle_state::twinkle_io_r) break; default: - if( m_last_io_offset != m_io_offset ) - { - m_last_io_offset = m_io_offset; - } + osd_printf_warning("unknown io 0x%02x\n", m_io_offset); break; } break; @@ -597,7 +618,7 @@ WRITE16_MEMBER(twinkle_state::twinkle_output_w) /* data */ break; case 0x08: - /* ?? */ + // overlay enable? break; case 0x10: { @@ -644,6 +665,45 @@ WRITE16_MEMBER(twinkle_state::twinkle_output_w) } } +WRITE16_MEMBER(twinkle_state::led_w) +{ + output().set_indexed_value("main_led", 0, (~data >> 0) & 1); + output().set_indexed_value("main_led", 1, (~data >> 1) & 1); + output().set_indexed_value("main_led", 2, (~data >> 2) & 1); + output().set_indexed_value("main_led", 3, (~data >> 3) & 1); + output().set_indexed_value("main_led", 4, (~data >> 4) & 1); + output().set_indexed_value("main_led", 5, (~data >> 5) & 1); + output().set_indexed_value("main_led", 6, (~data >> 6) & 1); + output().set_indexed_value("main_led", 7, (~data >> 7) & 1); + output().set_indexed_value("main_led", 8, (~data >> 8) & 1); + + if ((data & 0xfe00) != 0xfe00) + { + osd_printf_warning("led_w unknown %04x\n", data); + } +} + +WRITE16_MEMBER(twinkle_state::key_led_w) +{ + // words are written using a byte write + output().set_indexed_value("key1-", 1, (data >> 0) & 1); + output().set_indexed_value("key1-", 2, (data >> 1) & 1); + output().set_indexed_value("key1-", 3, (data >> 2) & 1); + output().set_indexed_value("key1-", 4, (data >> 3) & 1); + output().set_indexed_value("key1-", 5, (data >> 4) & 1); + output().set_indexed_value("key1-", 6, (data >> 5) & 1); + output().set_indexed_value("key1-", 7, (data >> 6) & 1); + output().set_indexed_value("key2-", 1, (data >> 7) & 1); + output().set_indexed_value("key2-", 2, (data >> 8) & 1); + output().set_indexed_value("key2-", 3, (data >> 9) & 1); + output().set_indexed_value("key2-", 4, (data >> 10) & 1); + output().set_indexed_value("key2-", 5, (data >> 11) & 1); + output().set_indexed_value("key2-", 6, (data >> 12) & 1); + output().set_indexed_value("key2-", 7, (data >> 13) & 1); + output().set_value("unknown3", (data >> 14) & 1); + output().set_value("unknown4", (data >> 15) & 1); +} + WRITE16_MEMBER(twinkle_state::serial_w) { int _do = ( data >> 4 ) & 1; @@ -705,9 +765,9 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, twinkle_state ) AM_RANGE(0x1f218000, 0x1f218003) AM_DEVWRITE8("watchdog", watchdog_timer_device, reset_w, 0x000000ff) /* LTC1232 */ AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE8(twinkle_io_w, 0x00ff00ff) AM_RANGE(0x1f220004, 0x1f220007) AM_READ8(twinkle_io_r, 0x00ff00ff) - AM_RANGE(0x1f230000, 0x1f230003) AM_WRITENOP + AM_RANGE(0x1f230000, 0x1f230003) AM_WRITE16(led_w, 0x0000ffff) AM_RANGE(0x1f240000, 0x1f240003) AM_READ_PORT("IN6") - AM_RANGE(0x1f250000, 0x1f250003) AM_WRITENOP + AM_RANGE(0x1f250000, 0x1f250003) AM_WRITE16(key_led_w, 0x0000ffff) AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE16(serial_w, 0x0000ffff) AM_RANGE(0x1f270000, 0x1f270003) AM_WRITE_PORT("OUTSEC") AM_RANGE(0x1f280000, 0x1f280003) AM_READ_PORT("INSEC") @@ -804,11 +864,7 @@ WRITE16_MEMBER(twinkle_state::spu_wavebank_w) // then to bank 2, and finally to bank 3. // // neither the 68k nor DMA access wave RAM when the bank is 0. - if (data == 0) - { - data = 1; - } - m_wave_bank = ((data-1) * (4*1024*1024)); + m_wave_bank = data * (4*1024*1024); } READ16_MEMBER(twinkle_state::twinkle_waveram_r) @@ -837,26 +893,34 @@ WRITE16_MEMBER(twinkle_state::shared_68k_w) m_spu_shared[offset] = data & 0xff; } -READ16_MEMBER(twinkle_state::unk_68k_r) +WRITE16_MEMBER(twinkle_state::spu_led_w) { - return 0xffff; // must return 0xff for 68000 POST to complete properly + // upper 8 bits are occassionally written as all zeros + output().set_indexed_value("spu_led", 0, (~data >> 0) & 1); + output().set_indexed_value("spu_led", 1, (~data >> 1) & 1); + output().set_indexed_value("spu_led", 2, (~data >> 2) & 1); + output().set_indexed_value("spu_led", 3, (~data >> 3) & 1); + output().set_indexed_value("spu_led", 4, (~data >> 4) & 1); + output().set_indexed_value("spu_led", 5, (~data >> 5) & 1); + output().set_indexed_value("spu_led", 6, (~data >> 6) & 1); + output().set_indexed_value("spu_led", 7, (~data >> 7) & 1); } static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x100000, 0x13ffff) AM_RAM - AM_RANGE(0x200000, 0x200001) AM_READ(unk_68k_r) - // 220000 = LEDs? + AM_RANGE(0x200000, 0x200001) AM_READ_PORT("SPU_DSW") + AM_RANGE(0x220000, 0x220001) AM_WRITE(spu_led_w) AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w) - AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w) - AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w) - AM_RANGE(0x260000, 0x260001) AM_WRITE(spu_wavebank_w) + AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w) AM_READNOP + AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w) AM_READNOP + AM_RANGE(0x260000, 0x260001) AM_WRITE(spu_wavebank_w) AM_READNOP AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w) AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0) // 34000E = ??? AM_RANGE(0x34000e, 0x34000f) AM_WRITENOP AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rfsnd", rf5c400_device, rf5c400_r, rf5c400_w) - AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w ) + AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w) ADDRESS_MAP_END /* SCSI */ @@ -1004,7 +1068,7 @@ static MACHINE_CONFIG_START( twinkle ) MCFG_SOUND_ROUTE( 0, "speakerleft", 0.75 ) MCFG_SOUND_ROUTE( 1, "speakerright", 0.75 ) - MCFG_RF5C400_ADD("rfsnd", 32000000/2) + MCFG_RF5C400_ADD("rfsnd", XTAL_33_8688MHz/2); MCFG_SOUND_ROUTE(0, "speakerleft", 1.0) MCFG_SOUND_ROUTE(1, "speakerright", 1.0) MACHINE_CONFIG_END @@ -1066,6 +1130,16 @@ static INPUT_PORTS_START( twinkle ) PORT_START("OUTSEC") PORT_START("INSEC") + + PORT_START("SPU_DSW") + PORT_DIPUNKNOWN_DIPLOC( 0x01, IP_ACTIVE_LOW, "SPU DSW:1" ) + PORT_DIPUNKNOWN_DIPLOC( 0x02, IP_ACTIVE_LOW, "SPU DSW:2" ) + PORT_DIPUNKNOWN_DIPLOC( 0x04, IP_ACTIVE_LOW, "SPU DSW:3" ) + PORT_DIPUNKNOWN_DIPLOC( 0x08, IP_ACTIVE_LOW, "SPU DSW:4" ) + PORT_DIPUNKNOWN_DIPLOC( 0x10, IP_ACTIVE_LOW, "SPU DSW:5" ) + PORT_DIPUNKNOWN_DIPLOC( 0x20, IP_ACTIVE_LOW, "SPU DSW:6" ) + PORT_DIPUNKNOWN_DIPLOC( 0x40, IP_ACTIVE_LOW, "SPU DSW:7" ) + PORT_DIPUNKNOWN_DIPLOC( 0x80, IP_ACTIVE_LOW, "SPU DSW:8" ) INPUT_PORTS_END static INPUT_PORTS_START( twinklex ) @@ -1098,7 +1172,7 @@ INPUT_PORTS_END ROM_REGION32_LE( 0x080000, "audiocpu", 0 )\ ROM_LOAD16_WORD_SWAP( "863a05.2x", 0x000000, 0x080000, CRC(6f42a09e) SHA1(cab5209f90f47b9ee6e721479913ad74e3ba84b1) )\ \ - ROM_REGION16_LE(0x1800000, "rfsnd", ROMREGION_ERASE00) + ROM_REGION16_LE(0x2000000, "rfsnd", ROMREGION_ERASE00) // the first 8mb isn't populated ROM_START( gq863 ) TWINKLE_BIOS @@ -1344,20 +1418,20 @@ ROM_START( bmiidxc2 ) DISK_IMAGE_READONLY( "983hdda01", 0, SHA1(bcbbf55acf8bebc5773ffc5769420a0129f4da57) ) ROM_END -GAME( 1999, gq863, 0, twinkle, twinkle, twinkle_state, 0, ROT0, "Konami", "Twinkle System", MACHINE_IS_BIOS_ROOT ) - -GAME( 1999, bmiidx, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxa, bmiidx, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxc, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxca, bmiidxc, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxs, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidxc2, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1999, bmiidx2, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx3, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2000, bmiidx4, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx5, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx6, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2002, bmiidx7, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 2002, bmiidx8, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAMEL( 1999, gq863, 0, twinkle, twinkle, twinkle_state, 0, ROT0, "Konami", "Twinkle System", MACHINE_IS_BIOS_ROOT, layout_bmiidx ) + +GAMEL( 1999, bmiidx, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxa, bmiidx, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX (863 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxc, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxca, bmiidxc, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxs, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 1999, bmiidxc2, gq863, twinklex, twinklex, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 1999, bmiidx2, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx3, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2000, bmiidx4, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2001, bmiidx5, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING, layout_bmiidx ) +GAMEL( 2001, bmiidx6, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2002, bmiidx7, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) +GAMEL( 2002, bmiidx8, gq863, twinklei, twinklei, twinkle_state, 0, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS, layout_bmiidx ) diff --git a/src/mame/layout/bmiidx.lay b/src/mame/layout/bmiidx.lay new file mode 100644 index 00000000000..90a6b8a9282 --- /dev/null +++ b/src/mame/layout/bmiidx.lay @@ -0,0 +1,151 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3-70-g09d2 From cc3e1898b2eddccd565030674b4143290211c233 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sat, 2 Dec 2017 17:46:48 +0100 Subject: Hyperstone dasm fp/h support (nw) --- src/devices/cpu/e132xs/32xsdasm.cpp | 8 ++++++-- src/devices/cpu/e132xs/32xsdasm.h | 14 ++++++++++++-- src/devices/cpu/e132xs/e132xs.cpp | 13 +++++++++++-- src/devices/cpu/e132xs/e132xs.h | 5 ++++- src/tools/unidasm.cpp | 13 ++++++++++++- 5 files changed, 45 insertions(+), 8 deletions(-) diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index d6ecb866749..339c7b9c0b0 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -391,6 +391,10 @@ u32 hyperstone_disassembler::opcode_alignment() const return 2; } +hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf) +{ +} + /*****************************/ /* Main disassembly function */ /*****************************/ @@ -408,8 +412,8 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con uint8_t source_bit = SOURCEBIT(op); uint8_t dest_bit = DESTBIT(op); - global_fp = 0; - int h_flag = 0; + global_fp = m_config->get_fp(); + int h_flag = m_config->get_h(); uint8_t op_num = (op & 0xff00) >> 8; diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h index 6c5b0fa4482..0ee99457c55 100644 --- a/src/devices/cpu/e132xs/32xsdasm.h +++ b/src/devices/cpu/e132xs/32xsdasm.h @@ -15,7 +15,14 @@ class hyperstone_disassembler : public util::disasm_interface { public: - hyperstone_disassembler() = default; + struct config { + virtual ~config() = default; + + virtual u8 get_fp() const = 0; + virtual bool get_h() const = 0; + }; + + hyperstone_disassembler(config *conf); virtual ~hyperstone_disassembler() = default; virtual u32 opcode_alignment() const override; @@ -26,8 +33,11 @@ private: static const char *const G_REG[]; static const char *const SETxx[]; - int size, global_fp; + config *m_config; + int size; + u8 global_fp; + void LL_format(char *source, char *dest, uint16_t op); void LR_format(char *source, char *dest, uint16_t op); void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag); diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index c8051817cf6..d22d84aead2 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -149,7 +149,6 @@ #include "debugger.h" #include "32xsdefs.h" -#include "32xsdasm.h" //#define VERBOSE 1 #include "logmacro.h" @@ -1413,7 +1412,17 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std util::disasm_interface *hyperstone_device::create_disassembler() { - return new hyperstone_disassembler; + return new hyperstone_disassembler(this); +} + +u8 hyperstone_device::get_fp() const +{ + return GET_FP; +} + +bool hyperstone_device::get_h() const +{ + return GET_H; } /* Opcodes */ diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index de624a13688..acfeea49159 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -8,6 +8,7 @@ #include "cpu/drcfe.h" #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" +#include "32xsdasm.h" /* A note about clock multipliers and dividers: @@ -60,7 +61,7 @@ class e132xs_frontend; // ======================> hyperstone_device // Used by core CPU interface -class hyperstone_device : public cpu_device +class hyperstone_device : public cpu_device, public hyperstone_disassembler::config { friend class e132xs_frontend; @@ -215,6 +216,8 @@ protected: // device_disasm_interface overrides virtual util::disasm_interface *create_disassembler() override; + virtual u8 get_fp() const override; + virtual bool get_h() const override; // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index 744d65282a3..3a9809c5b62 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -238,6 +238,17 @@ struct z8000_unidasm_t : z8000_disassembler::config virtual bool get_segmented_mode() const override { return segmented_mode; } } z8000_unidasm; +// Configuration missing +struct hyperstone_unidasm_t : hyperstone_disassembler::config +{ + bool h; + u8 fp; + hyperstone_unidasm_t() { h = false; fp = 0; } + virtual ~hyperstone_unidasm_t() = default; + + virtual u8 get_fp() const { return fp; } + virtual bool get_h() const { return h; } +} hyperstone_unidasm; @@ -322,7 +333,7 @@ static const dasm_table_entry dasm_table[] = { "hmcs40", le, -1, []() -> util::disasm_interface * { return new hmcs40_disassembler; } }, { "hp_hybrid", be, -1, []() -> util::disasm_interface * { return new hp_hybrid_disassembler; } }, { "hp_5061_3001", be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } }, - { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler; } }, + { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } }, { "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } }, { "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } }, { "i8008", le, 0, []() -> util::disasm_interface * { return new i8008_disassembler; } }, -- cgit v1.2.3-70-g09d2 From 21aac6beb3e38e932e3d13d8e85ff8415ce0220b Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sat, 2 Dec 2017 16:06:13 -0300 Subject: Aristocrat MK5: Redumped Inca Sun (DHG1577, US). Now the set pass the checksum and boots. [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 6ff3aa9926e..6e3ee2ac9e9 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -3840,14 +3840,19 @@ ROM_END // Same strings as incasunu but different version ROM_START( incasunua ) ARISTOCRAT_MK5_BIOS - // checksum code not found due to ROMs being corrupted, all files are missing bytes consisting of 0x0D + /* + Checksum code found at 0x000d18 + Checksum is stored in 0x000020-0x000027 + Expected Checksum 0x24e1ed00 + Calculated Checksum 0x24e1ed00 (OK) + */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "dhg1577.u7", 0x000000, 0x7f079, BAD_DUMP CRC(ebbd4d54) SHA1(7e5c0da2bc62338dd2148af7fa87745d622b85b9) ) - ROM_LOAD32_WORD( "dhg1577.u11", 0x000002, 0x7ff6c, BAD_DUMP CRC(fb86c7b2) SHA1(62b1897907ceebcd0c2c0a4da002a783174321e7) ) - ROM_LOAD32_WORD( "dhg1577.u8", 0x100000, 0x7fcb7, BAD_DUMP CRC(809c5277) SHA1(2efde9a7887d3ca5cb7fa5aebb0b6fcc9aeb880a) ) - ROM_LOAD32_WORD( "dhg1577.u12", 0x100002, 0x7fc89, BAD_DUMP CRC(dbf26048) SHA1(2fcf1f7d5a0402798b4fe25afd178d8c1db89e3b) ) - ROM_LOAD32_WORD( "dhg1577.u9", 0x200000, 0x7fd47, BAD_DUMP CRC(046e019e) SHA1(4c6e17562cb337c3d79efc095960c4d1f9d87f39) ) - ROM_LOAD32_WORD( "dhg1577.u13", 0x200002, 0x7fd62, BAD_DUMP CRC(7299484f) SHA1(f6b75e5be6ef724504a543702692e455437d7046) ) + ROM_LOAD32_WORD( "dhg1577.u7", 0x000000, 0x80000, CRC(e31e3c81) SHA1(56b00aae1b9385686530e089cad05308e0c0751d) ) + ROM_LOAD32_WORD( "dhg1577.u11", 0x000002, 0x80000, CRC(68d58ad3) SHA1(c521da10b719250e3f115357c6e4ff51377d4335) ) + ROM_LOAD32_WORD( "dhg1577.u8", 0x100000, 0x80000, CRC(475db842) SHA1(3c49fbf45a256222e6a5a0343a7dc96386bb8897) ) + ROM_LOAD32_WORD( "dhg1577.u12", 0x100002, 0x80000, CRC(f1be432e) SHA1(ed4a064e4e8200126bda3f1c25ac5075014c9f94) ) + ROM_LOAD32_WORD( "dhg1577.u9", 0x200000, 0x80000, CRC(a8956bf5) SHA1(d444a3a64968a6275b38babf23089c7d186f30e6) ) + ROM_LOAD32_WORD( "dhg1577.u13", 0x200002, 0x80000, CRC(f7c30ef9) SHA1(44d7213e1220d6b89715408d009ef1484de2696f) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) @@ -6983,6 +6988,7 @@ GAMEL( 1999, incasun, aristmk5, aristmk5, incasun, aristmk5_s GAMEL( 1999, incasunsp, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT, Show Program)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 2000, incasunnz, incasun, aristmk5, incasunnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0101108V, New Zealand)", MACHINE_FLAGS, layout_incasunnz ) // MV4113, A - 6/3/00, Rev 25 GAMEL( 2000, incasunu, incasun, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (CHG1458, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130/3, A - 05/09/00 +GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 GAMEL( 1998, indrema5, aristmk5, aristmk5, indrema5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, NSW/ACT)", MACHINE_FLAGS, layout_indrema5 ) // 628/1, B - 15/12/98, Rev 7 GAMEL( 1996, jumpjoey, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jumpin' Joey (0100383V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 586/6, C - 13/11/96 GAMEL( 1996, jungjuic, aristmk5, aristmk5, jungjuic, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jungle Juice (0200240V, New Zealand)", MACHINE_FLAGS, layout_jungjuic ) // 566/3, F - 06/03/96 @@ -7111,7 +7117,6 @@ GAMEL( 2000, bpartya, bparty, aristmk5_usa_touch, bootsctnua, aristmk5_s GAMEL( 1997, cashcra5a, cashcra5, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Crop (0300447V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 607/2, C - 29/08/97, Rev 7 GAMEL( 2001, dynajacku, dynajack, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dynamite Jack (CHG1562, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US002, A - 11/07/01 GAMEL( 2000, eforsta5ce, eforsta5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest - Cash Express (CHG1536, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/6, C - 17/01/00 -GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 GAMEL( 2001, mountmonce, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money - Cash Express (AHG1629, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, mountmonu, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money (BHG1465, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 -- cgit v1.2.3-70-g09d2 From daad8a1ba0b53d98adcdf5b1edef894d04f2d6e9 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 2 Dec 2017 20:48:52 +0100 Subject: tms1000: added halt pin (nw) --- src/devices/cpu/sm510/sm510.h | 2 +- src/devices/cpu/tms1000/tms1000.cpp | 10 +++- src/devices/cpu/tms1000/tms1100.cpp | 3 ++ src/devices/cpu/tms1000/tms1k_base.cpp | 41 +++++++++++---- src/devices/cpu/tms1000/tms1k_base.h | 93 ++++++++++++++++++---------------- src/mame/drivers/hh_tms1k.cpp | 52 ++++++++++++++----- 6 files changed, 131 insertions(+), 70 deletions(-) diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h index f9972a0c6e7..5d44799864d 100644 --- a/src/devices/cpu/sm510/sm510.h +++ b/src/devices/cpu/sm510/sm510.h @@ -17,7 +17,7 @@ #define MCFG_SM510_READ_K_CB(_devcb) \ devcb = &sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb); // when in halt state, any K input going High can wake up the CPU, -// driver is required to use execute_set_input(SM510_INPUT_LINE_K, state) +// driver is required to use set_input_line(SM510_INPUT_LINE_K, state) #define SM510_INPUT_LINE_K 0 // 1-bit BA(aka alpha) input pin (pull-up) diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp index 54a38a220c7..ce21213a1d2 100644 --- a/src/devices/cpu/tms1000/tms1000.cpp +++ b/src/devices/cpu/tms1000/tms1000.cpp @@ -8,7 +8,7 @@ TODO: - add TMS1270 (10 O pins, how does that work?) - add TMS1200C (has L input pins like TMS1600) - - add HALT input pin for TMS1000C + - add TMS1000C-specific mpla */ @@ -34,6 +34,13 @@ DEFINE_DEVICE_TYPE(TMS1700, tms1700_cpu_device, "tms1700", "TMS1700") // 28-p DEFINE_DEVICE_TYPE(TMS1730, tms1730_cpu_device, "tms1730", "TMS1730") // 20-pin DIP, same die as TMS1700, package has less pins: 6 R pins, 5 O pins (output PLA is still 8-bit, O1,O3,O5 unused) // CMOS versions (3-level stack, HALT pin) +// - RAM at top-left, ROM at top-right(rotate CCW) +// - ROM ordering is different: +// * row select is linear (0-63) +// * bit select is 7-0 instead of 0-7 +// * page select doesn't flip in the middle +// - 32-term mpla at bottom-right, different order +// - 32-term opla at bottom-left, ordered O7-O0(0 or 1), and A8,4,2,1,S DEFINE_DEVICE_TYPE(TMS1000C, tms1000c_cpu_device, "tms1000c", "TMS1000C") // 28-pin SDIP, 10 R pins // 2nd source Motorola chips @@ -125,6 +132,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig) // microinstructions PLA, output PLA + //MCFG_PLA_ADD("mpla", 8, 16, 32) MCFG_PLA_ADD("mpla", 8, 16, 30) MCFG_PLA_FILEFORMAT(BERKELEY) MCFG_PLA_ADD("opla", 5, 8, 32) diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp index 70c38bc72c1..8f329a3c725 100644 --- a/src/devices/cpu/tms1000/tms1100.cpp +++ b/src/devices/cpu/tms1000/tms1100.cpp @@ -4,6 +4,9 @@ TMS1000 family - TMS1100, TMS1170, TMS1300, TMS1370 + TODO: + - add TMS1100C when needed + */ #include "emu.h" diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp index eb389fc6bc9..bfbf6eab8af 100644 --- a/src/devices/cpu/tms1000/tms1k_base.cpp +++ b/src/devices/cpu/tms1000/tms1k_base.cpp @@ -5,7 +5,7 @@ TMS1000 family - base/shared TODO: - - INIT pin + - accurate INIT pin (currently, just use INPUT_LINE_RESET) The TMS0980 and TMS1000-family MCU cores are very similar. The TMS0980 has a @@ -144,6 +144,7 @@ void tms1k_base_device::device_start() m_r = 0; m_o = 0; m_o_index = 0; + m_halt = false; m_cki_bus = 0; m_c4 = 0; m_p = 0; @@ -183,6 +184,7 @@ void tms1k_base_device::device_start() save_item(NAME(m_r)); save_item(NAME(m_o)); save_item(NAME(m_o_index)); + save_item(NAME(m_halt)); save_item(NAME(m_cki_bus)); save_item(NAME(m_c4)); save_item(NAME(m_p)); @@ -224,6 +226,14 @@ void tms1k_base_device::device_start() m_icountptr = &m_icount; } +device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_DATA, &m_data_config) + }; +} + //------------------------------------------------- @@ -259,13 +269,6 @@ void tms1k_base_device::device_reset() m_power_off(0); } -device_memory_interface::space_config_vector tms1k_base_device::memory_space_config() const -{ - return space_config_vector { - std::make_pair(AS_PROGRAM, &m_program_config), - std::make_pair(AS_DATA, &m_data_config) - }; -} //------------------------------------------------- @@ -305,6 +308,15 @@ void tms1k_base_device::read_opcode() // i/o handling //------------------------------------------------- +void tms1k_base_device::execute_set_input(int line, int state) +{ + if (line != TMS1XXX_INPUT_LINE_HALT) + return; + + // HALT pin (CMOS only) + m_halt = bool(state); +} + void tms1k_base_device::write_o_output(u8 index) { // a hardcoded table is supported if the output pla is unknown @@ -597,9 +609,17 @@ void tms1k_base_device::op_sbl() void tms1k_base_device::execute_run() { - do + while (m_icount > 0) { m_icount--; + + if (m_halt) + { + // not running (output pins remain unchanged) + m_icount = 0; + return; + } + switch (m_subcycle) { case 0: @@ -722,6 +742,7 @@ void tms1k_base_device::execute_run() // execute: br/call 1/2 break; } + m_subcycle = (m_subcycle + 1) % 6; - } while (m_icount > 0); + } } diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h index 7ddff2bb68f..b5e75ec77d2 100644 --- a/src/devices/cpu/tms1000/tms1k_base.h +++ b/src/devices/cpu/tms1000/tms1k_base.h @@ -38,6 +38,9 @@ #define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \ devcb = &tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb); +// HALT input pin on CMOS chips (use set_input_line) +#define TMS1XXX_INPUT_LINE_HALT 0 + // pinout reference @@ -105,6 +108,7 @@ protected: virtual u32 execute_min_cycles() const override { return 1; } virtual u32 execute_max_cycles() const override { return 6; } virtual u32 execute_input_lines() const override { return 1; } + virtual void execute_set_input(int line, int state) override; virtual void execute_run() override; // device_memory_interface overrides @@ -214,50 +218,51 @@ protected: optional_device m_opla; optional_device m_spla; - u8 m_pc; // 6 or 7-bit program counter - u32 m_sr; // 6 or 7-bit subroutine return register(s) - u8 m_pa; // 4-bit page address register - u8 m_pb; // 4-bit page buffer register - u16 m_ps; // 4-bit page subroutine register(s) - u8 m_a; // 4-bit accumulator - u8 m_x; // 2,3,or 4-bit RAM X register - u8 m_y; // 4-bit RAM Y register - u8 m_ca; // chapter address register - u8 m_cb; // chapter buffer register - u16 m_cs; // chapter subroutine register(s) - u16 m_r; - u16 m_o; - u8 m_cki_bus; - u8 m_c4; - u8 m_p; // 4-bit adder p(lus)-input - u8 m_n; // 4-bit adder n(egative)-input - u8 m_adder_out; // adder result - u8 m_carry_in; // adder carry-in bit - u8 m_carry_out; // adder carry-out bit - u8 m_status; - u8 m_status_latch; - u8 m_eac; // end around carry bit - u8 m_clatch; // call latch bit(s) - u8 m_add; // add latch bit - u8 m_bl; // branch latch bit - - u8 m_ram_in; - u8 m_dam_in; - int m_ram_out; // signed! - u8 m_ram_address; - u16 m_rom_address; - u16 m_opcode; - u32 m_fixed; - u32 m_micro; - int m_subcycle; - int m_icount; - u8 m_o_index; - - u8 m_o_pins; // how many O pins - u8 m_r_pins; // how many R pins - u8 m_pc_bits; // how many program counter bits - u8 m_byte_bits; // how many bits per 'byte' - u8 m_x_bits; // how many X register bits + u8 m_pc; // 6 or 7-bit program counter + u32 m_sr; // 6 or 7-bit subroutine return register(s) + u8 m_pa; // 4-bit page address register + u8 m_pb; // 4-bit page buffer register + u16 m_ps; // 4-bit page subroutine register(s) + u8 m_a; // 4-bit accumulator + u8 m_x; // 2,3,or 4-bit RAM X register + u8 m_y; // 4-bit RAM Y register + u8 m_ca; // chapter address register + u8 m_cb; // chapter buffer register + u16 m_cs; // chapter subroutine register(s) + u16 m_r; + u16 m_o; + u8 m_cki_bus; + u8 m_c4; + u8 m_p; // 4-bit adder p(lus)-input + u8 m_n; // 4-bit adder n(egative)-input + u8 m_adder_out; // adder result + u8 m_carry_in; // adder carry-in bit + u8 m_carry_out; // adder carry-out bit + u8 m_status; + u8 m_status_latch; + u8 m_eac; // end around carry bit + u8 m_clatch; // call latch bit(s) + u8 m_add; // add latch bit + u8 m_bl; // branch latch bit + + u8 m_ram_in; + u8 m_dam_in; + int m_ram_out; // signed! + u8 m_ram_address; + u16 m_rom_address; + u16 m_opcode; + u32 m_fixed; + u32 m_micro; + int m_subcycle; + int m_icount; + u8 m_o_index; + bool m_halt; // halt pin state + + u8 m_o_pins; // how many O pins + u8 m_r_pins; // how many R pins + u8 m_pc_bits; // how many program counter bits + u8 m_byte_bits; // how many bits per 'byte' + u8 m_x_bits; // how many X register bits address_space *m_program; address_space *m_data; diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index c00d3432039..c160c32da96 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -8689,14 +8689,27 @@ public: : hh_tms1k_state(mconfig, type, tag) { } + void update_halt(); + DECLARE_INPUT_CHANGED_MEMBER(k4_button); + void prepare_display(); DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); + +protected: + virtual void machine_reset() override; }; // handlers +void xl25_state::update_halt() +{ + // O5+K4 go to HALT pin (used when pressing store/recall button) + bool halt = !((m_o & 0x20) || (read_k(machine().dummy_space(), 0) & 4)); + m_maincpu->set_input_line(TMS1XXX_INPUT_LINE_HALT, halt ? ASSERT_LINE : CLEAR_LINE); +} + void xl25_state::prepare_display() { display_matrix(3, 10, m_o >> 1, m_r); @@ -8716,11 +8729,11 @@ WRITE16_MEMBER(xl25_state::write_o) m_o = data; prepare_display(); - // O5(+K4): MCU halt - //if (~data & 0x20) printf("X"); - // O6: speaker out m_speaker->level_w(data >> 6 & 1); + + // O5(+K4): MCU halt + update_halt(); } READ8_MEMBER(xl25_state::read_k) @@ -8737,68 +8750,79 @@ static INPUT_PORTS_START( xl25 ) PORT_START("IN.0") // R0 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.1") // R1 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.2") // R2 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // R3 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.4") // R4 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_T) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.5") // R5 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_U) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_I) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_O) // halt + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_O) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.6") // R6 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_S) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.7") // R7 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_G) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.8") // R8 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_K) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_L) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_L) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.9") // R9 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Z) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_X) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) INPUT_PORTS_END +INPUT_CHANGED_MEMBER(xl25_state::k4_button) +{ + update_halt(); +} + +void xl25_state::machine_reset() +{ + hh_tms1k_state::machine_reset(); + update_halt(); +} + static MACHINE_CONFIG_START( xl25 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", TMS1000C, 330000) // approximation - RC osc. R=5.6K, C=47pF + MCFG_CPU_ADD("maincpu", TMS1000C, 300000) // approximation - RC osc. R=5.6K, C=47pF MCFG_TMS1XXX_READ_K_CB(READ8(xl25_state, read_k)) MCFG_TMS1XXX_WRITE_R_CB(WRITE16(xl25_state, write_r)) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(xl25_state, write_o)) -- cgit v1.2.3-70-g09d2 From bd7191f1ea1761d1358c74587192d2ab9ac8a22c Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sat, 2 Dec 2017 18:06:59 -0300 Subject: Aristocrat MK5: Redumped Loco Loot (AHG1513, US). Now the set pass the checksum and boots. [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 6e3ee2ac9e9..5b9a27577de 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -4137,12 +4137,17 @@ ROM_END // Loco Loot / Export / A - 30/07/01 ROM_START( locolootu ) ARISTOCRAT_MK5_BIOS - // checksum code not found due to ROMs being corrupted, all files are missing bytes consisting of 0x0D +/* + Checksum code found at 0x000d18 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0xbd28f614 + Calculated Checksum 0xbd28f614 (OK) +*/ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x7f06f, BAD_DUMP CRC(c0e769a1) SHA1(df0dedf6dc9412efccd26ad16ab0d316863f9488) ) - ROM_LOAD32_WORD( "ahg1513.u11", 0x000002, 0x7ff6c, BAD_DUMP CRC(f60c2e0b) SHA1(d3ba83eb458ab99d28a910688e63c9dd5ae6570b) ) - ROM_LOAD32_WORD( "ahg1513.u8", 0x100000, 0x7fede, BAD_DUMP CRC(c24cfe7b) SHA1(7f1f02a4e77ad178c7e08362feb1ec4b064e539c) ) - ROM_LOAD32_WORD( "ahg1513.u12", 0x100002, 0x7ff14, BAD_DUMP CRC(73e30f47) SHA1(eb12716f3c384901cd80b2f43760b522150c64b0) ) + ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x80000, CRC(16854250) SHA1(a3b6e112dcce38310ca13eb9e9851901ee213fcf) ) + ROM_LOAD32_WORD( "ahg1513.u11", 0x000002, 0x80000, CRC(0abe509a) SHA1(a5d0b870390e7f4b38d7685c09c079acb198dd42) ) + ROM_LOAD32_WORD( "ahg1513.u8", 0x100000, 0x80000, CRC(bd9d2ad7) SHA1(5e5eaf2521473246fb54175f88521b43b9b86f9f) ) + ROM_LOAD32_WORD( "ahg1513.u12", 0x100002, 0x80000, CRC(5bf7b4b1) SHA1(2282ec8d0ddd1aea715005fba2171468831513f4) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) @@ -7000,6 +7005,7 @@ GAMEL( 1998, kookabuk, aristmk5, aristmk5, aristmk5, aristmk5_s GAMEL( 1997, locoloot, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100473V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 599/3, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1997, locoloota, locoloot, aristmk5, locoloota, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100472V, NSW/ACT)", MACHINE_FLAGS, layout_locoloota ) // 599/2, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1998, locolootnz, locoloot, aristmk5, cashchamnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0600725V, New Zealand)", MACHINE_FLAGS, layout_cashchamnz ) // MV4064, A - 8/7/98, Rev 24 +GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 GAMEL( 1997, lonewolf, aristmk5, aristmk5, wildbill, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lone Wolf (0100587V, NSW/ACT)", MACHINE_FLAGS, layout_wildbill ) // 621, A - 29/10/97, Rev 1.27.17.0 GAMEL( 1995, luckyclo, aristmk5, aristmk5, wcougar, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lucky Clover (0300109V, NSW/ACT)", MACHINE_FLAGS, layout_wcougar ) // 570/6, A - 12/10/95 GAMEL( 2000, magimask, aristmk5, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (AHG1549, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4115_1, A - 09/05/00 @@ -7117,7 +7123,6 @@ GAMEL( 2000, bpartya, bparty, aristmk5_usa_touch, bootsctnua, aristmk5_s GAMEL( 1997, cashcra5a, cashcra5, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Crop (0300447V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 607/2, C - 29/08/97, Rev 7 GAMEL( 2001, dynajacku, dynajack, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dynamite Jack (CHG1562, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US002, A - 11/07/01 GAMEL( 2000, eforsta5ce, eforsta5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest - Cash Express (CHG1536, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/6, C - 17/01/00 -GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 GAMEL( 2001, mountmonce, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money - Cash Express (AHG1629, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, mountmonu, mountmon, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mountain Money (BHG1465, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4108/5, A - 10/03/01 GAMEL( 2001, partygrsb, partygrs, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Party Gras (AHG1568, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4115/6, A - 10/11/2001, 20 lines -- cgit v1.2.3-70-g09d2 From 8e59b5d9fad71aa593fd0f76847d30f6aa384fc5 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sun, 3 Dec 2017 00:58:06 -0300 Subject: Aristocrat MK5: Redumped Unicorn Dreaming (BHG1584, US). Now the set pass the checksum and boots. [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 5b9a27577de..a82e30a5213 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -6525,18 +6525,24 @@ ROM_END // Unicorn Dreaming / Export / C - 10/17/01 ROM_START( unicorndu ) ARISTOCRAT_MK5_BIOS - // checksum code not found due to ROMs being corrupted, all files are missing bytes consisting of 0x0D + /* + Checksum code found at 0x000d18 + Checksum is stored in 0x000020-0x000027 + Expected Checksum 0x16dabc9e + Calculated Checksum 0x16dabc9e (OK) + */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "bhg1584.u7", 0x000000, 0x7f06e, BAD_DUMP CRC(4867364d) SHA1(f8f89bcd38b6fda5a5344c3aa5547f24da4a88e5) ) - ROM_LOAD32_WORD( "bhg1584.u11", 0x000002, 0x7ff68, BAD_DUMP CRC(9798b89b) SHA1(bf95196c3aba938813e40fb819baa37a51380fd2) ) - ROM_LOAD32_WORD( "bhg1584.u8", 0x100000, 0x7fa38, BAD_DUMP CRC(960f3e5f) SHA1(981d90277df2aeb76931fe87cf41e11fcdcc132b) ) - ROM_LOAD32_WORD( "bhg1584.u12", 0x100002, 0x7f9ec, BAD_DUMP CRC(15f5d3b0) SHA1(68145549a8c1e58e805e8c4fe1a9fc60e7e3d39d) ) + ROM_LOAD32_WORD( "bhg1584.u7", 0x000000, 0x80000, CRC(1490354e) SHA1(9327f01067e4a7f7ce5b6db9373b9ad59533babf) ) + ROM_LOAD32_WORD( "bhg1584.u11", 0x000002, 0x80000, CRC(d2b6745b) SHA1(04b5586e802ce0bd5891b23222bc1db8e7c67f8a) ) + ROM_LOAD32_WORD( "bhg1584.u8", 0x100000, 0x80000, CRC(e604d399) SHA1(9aab86aa6e8590921de9b7234713be72a7c4faa1) ) + ROM_LOAD32_WORD( "bhg1584.u12", 0x100002, 0x80000, CRC(c1e878b5) SHA1(4e4e9dee4d85fbb77dc6f7d39c2dc5b0bf438aef) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) ROM_END + // 02J02056 / JB009/2 / Multi credit / Multi line // Venice / VENEZUILA / B - 11/07/02 // This game is downported from the MK6 version @@ -7094,6 +7100,7 @@ GAMEL( 1997, trpdlghtu, trpdlght, aristmk5_usa, aristmk5_usa, aristmk5_s GAMEL( 1998, unicornd, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0100791V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 631/1 A, A - 31/08/98, Rev 12 GAMEL( 1998, unicornda, unicornd, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0100813V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 631 A, A - 02/09/98, Rev 14 GAMEL( 2000, unicorndnz, unicornd, aristmk5, unicorndnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0101228V, New Zealand)", MACHINE_FLAGS, layout_aristmk5 ) // MV4113/1, A - 05/04/2000, Rev 27 +GAMEL( 2001, unicorndu, unicornd, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (BHG1584, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130/1, C - 10/17/01 GAMEL( 2002, venicea5, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Venice (02J02056, Venezuela)", MACHINE_FLAGS, layout_venicea5 ) // JB009/2, B - 11/07/02, Rev 17 GAMEL( 1996, wamazon, aristmk5, aristmk5, wamazon, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Amazon (0200507V, NSW/ACT)", MACHINE_FLAGS, layout_wamazon ) // 506/8, A - 10/10/96, Rev 3 GAMEL( 1996, wamazona, wamazon, aristmk5, wamazona, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Amazon (0200285V, NSW/ACT)", MACHINE_FLAGS, layout_wamazona ) // 506/6, A - 7/5/96, Rev 1.22.8.0 @@ -7129,5 +7136,4 @@ GAMEL( 2001, partygrsb, partygrs, aristmk5_usa_touch, bootsctnua, aristmk5_s GAMEL( 1995, pengpayd, pengpay, aristmk5, wcougar, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0300113V, NSW/ACT)", MACHINE_FLAGS, layout_wcougar ) // 586, A - 12/10/95, Rev 4 GAMEL( 1998, petshopa, petshop, aristmk5, snowcat, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100679V, NSW/ACT)", MACHINE_FLAGS, layout_snowcat ) // 618, A - 09/03/98, Rev 10 GAMEL( 1995, sbuk2a, sbuk2, aristmk5, sbuk2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Super Bucks II (0300006V, NSW/ACT)", MACHINE_FLAGS, layout_sbuk2 ) // no data due to missing ROMs -GAMEL( 2001, unicorndu, unicornd, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (BHG1584, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130/1, C - 10/17/01 GAMEL( 2000, wthinga, wthing, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Thing (0201176V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 608/5, B - 25/02/00, Rev 11 -- cgit v1.2.3-70-g09d2 From a203fc9d0cc406f222b512c7fa3769d0622b2d02 Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Sat, 2 Dec 2017 22:40:49 -0800 Subject: New working software list additions ----------------------------------- ibm5150: Advanced Dungeons & Dragons - Curse of the Azure Bonds (V1.0), Advanced Dungeons & Dragons - Pool of Radiance (5.25") [ArcadeShadow] ibm5170: Gravis Utilities V2.1, Gravis UltraSound (GUS) Installation - V3.53 [Justin Kerk] ibm5170_cdrom: The UltraSound CD, The UltraSound Experience [Justin Kerk] New NOT_WORKING software list additions --------------------------------------- ibm5170: Gravis UltraSound BONUS Software Installation v. 1.52 [Justin Kerk] --- hash/ibm5150.xml | 51 ++++++++++++++++++++++++++++++++++++++- hash/ibm5170.xml | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++ hash/ibm5170_cdrom.xml | 29 ++++++++++++++++++++++ 3 files changed, 144 insertions(+), 1 deletion(-) diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml index dda5bb83993..86d0fa9e3c1 100644 --- a/hash/ibm5150.xml +++ b/hash/ibm5150.xml @@ -6168,8 +6168,57 @@ has been replaced with an all-zero block. --> + + Advanced Dungeons & Dragons - Curse of the Azure Bonds (V1.0) + 1989 + SSI + + + + + + + + + + + + + + + + + + + + + + + - Advanced Dungeons & Dragons - Pool of Radiance + Advanced Dungeons & Dragons - Pool of Radiance (5.25") + 1988 + SSI + + + + + + + + + + + + + + + + + + + + Advanced Dungeons & Dragons - Pool of Radiance (3.5") 1988 SSI diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml index ffb8c0e662d..5fc21814f0d 100644 --- a/hash/ibm5170.xml +++ b/hash/ibm5170.xml @@ -4511,6 +4511,71 @@ + + + Gravis Utilities V2.1 + 1993 + Advanced Gravis + + + + + + + + + Gravis UltraSound (GUS) Installation - V3.53 + 1994 + Advanced Gravis + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Gravis UltraSound BONUS Software Installation v. 1.52 + 1994 + Advanced Gravis + + + + + + + + + + + + High-Speed CD-ROM Driver (Version 4.14) 199? diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index cdcef4ea965..ec6d0769861 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -23,6 +23,35 @@ + + + The UltraSound CD + 1995 + Advanced Gravis + + + + + + + + + + + + + The UltraSound Experience + 1994 + Advanced Gravis + + + + + + + + + PC DOS 2000 1998 -- cgit v1.2.3-70-g09d2 From 82d9463dc008a0eea9c38a238c9b0e66af5a00a4 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 15:03:58 +0100 Subject: Fix the memory windows (nw) --- src/emu/debug/dvmemory.cpp | 53 ++++++++++++++++++++++++++++++---------------- src/emu/debug/dvmemory.h | 1 + 2 files changed, 36 insertions(+), 18 deletions(-) diff --git a/src/emu/debug/dvmemory.cpp b/src/emu/debug/dvmemory.cpp index e32d576fa65..fbfd990470f 100644 --- a/src/emu/debug/dvmemory.cpp +++ b/src/emu/debug/dvmemory.cpp @@ -98,6 +98,7 @@ debug_view_memory::debug_view_memory(running_machine &machine, debug_view_osd_up m_expression(machine), m_chunks_per_row(16), m_bytes_per_chunk(1), + m_steps_per_chunk(1), m_data_format(1), m_reverse_view(false), m_ascii_view(true), @@ -197,6 +198,7 @@ void debug_view_memory::view_notify(debug_view_notification type) if (m_bytes_per_chunk > 8) m_bytes_per_chunk = 8; m_data_format = m_bytes_per_chunk; + m_steps_per_chunk = source.m_space ? source.m_space->byte_to_address(m_bytes_per_chunk) : m_bytes_per_chunk; if (source.m_space != nullptr) m_expression.set_context(&source.m_space->device().debug()->symtable()); else @@ -290,7 +292,8 @@ void debug_view_memory::view_update() if (dest >= destmin && dest < destmax) dest->byte = addrtext[ch]; - // generate the data + // generate the data and the ascii string + std::string chunkascii; for (int chunknum = 0; chunknum < m_chunks_per_row; chunknum++) { int chunkindex = m_reverse_view ? (m_chunks_per_row - 1 - chunknum) : chunknum; @@ -298,7 +301,7 @@ void debug_view_memory::view_update() if (m_data_format <= 8) { u64 chunkdata; - bool ismapped = read(m_bytes_per_chunk, addrbyte + chunknum * m_bytes_per_chunk, chunkdata); + bool ismapped = read(m_bytes_per_chunk, address + chunknum * m_steps_per_chunk, chunkdata); dest = destrow + m_section[1].m_pos + 1 + chunkindex * spacing; for (int ch = 0; ch < posdata.m_spacing; ch++, dest++) if (dest >= destmin && dest < destmax) @@ -307,6 +310,10 @@ void debug_view_memory::view_update() if (shift < 64) dest->byte = ismapped ? "0123456789ABCDEF"[(chunkdata >> shift) & 0x0f] : '*'; } + for (int i=0; i < m_bytes_per_chunk; i++) { + u8 chval = chunkdata >> (8 * (m_bytes_per_chunk - i - 1)); + chunkascii += char((ismapped && isprint(chval)) ? chval : '.'); + } } else { int ch; @@ -316,9 +323,9 @@ void debug_view_memory::view_update() bool ismapped; if (m_data_format != 11) - ismapped = read(m_bytes_per_chunk, addrbyte + chunknum * m_bytes_per_chunk, chunkdata); + ismapped = read(m_bytes_per_chunk, address + chunknum * m_steps_per_chunk, chunkdata); else - ismapped = read(m_bytes_per_chunk, addrbyte + chunknum * m_bytes_per_chunk, chunkdata80); + ismapped = read(m_bytes_per_chunk, address + chunknum * m_steps_per_chunk, chunkdata80); if (ismapped) switch (m_data_format) @@ -338,6 +345,7 @@ void debug_view_memory::view_update() valuetext[0] = '*'; valuetext[1] = 0; } + dest = destrow + m_section[1].m_pos + 1 + chunkindex * spacing; // first copy the text for (ch = 0; (ch < spacing) && (valuetext[ch] != 0); ch++, dest++) @@ -347,20 +355,23 @@ void debug_view_memory::view_update() for (; ch < spacing; ch++, dest++) if (dest >= destmin && dest < destmax) dest->byte = ' '; + + for (int i=0; i < m_bytes_per_chunk; i++) { + u8 chval = chunkdata >> (8 * (m_bytes_per_chunk - i - 1)); + chunkascii += char((ismapped && isprint(chval)) ? chval : '.'); + } } } - // generate the ASCII data + // generate the ASCII data, but follow the chunks if (m_section[2].m_width > 0) { dest = destrow + m_section[2].m_pos + 1; - for (int ch = 0; ch < m_bytes_per_row; ch++, dest++) + for (size_t i = 0; i != chunkascii.size(); i++) { if (dest >= destmin && dest < destmax) - { - u64 chval; - bool ismapped = read(1, addrbyte + ch, chval); - dest->byte = (ismapped && isprint(chval)) ? chval : '.'; - } + dest->byte = chunkascii[i]; + dest++; + } } } } @@ -563,7 +574,10 @@ void debug_view_memory::recompute() // recompute the byte offset based on the most recent expression result m_bytes_per_row = m_bytes_per_chunk * m_chunks_per_row; - m_byte_offset = m_expression.value() % m_bytes_per_row; + offs_t val = m_expression.value(); + if (source.m_space) + val = source.m_space->address_to_byte(val); + m_byte_offset = val % m_bytes_per_row; // compute the section widths m_section[0].m_width = 1 + 8 + 1; @@ -612,17 +626,20 @@ bool debug_view_memory::needs_recompute() // handle expression changes if (m_expression.dirty()) { + const debug_view_memory_source &source = downcast(*m_source); + offs_t val = m_expression.value(); + if (source.m_space) + val = source.m_space->address_to_byte(val); recompute = true; - m_topleft.y = (m_expression.value() - m_byte_offset) / m_bytes_per_row; + m_topleft.y = (val - m_byte_offset) / m_bytes_per_row; m_topleft.y = std::max(m_topleft.y, 0); m_topleft.y = std::min(m_topleft.y, m_total.y - 1); - const debug_view_memory_source &source = downcast(*m_source); offs_t resultbyte; if (source.m_space != nullptr) - resultbyte = m_expression.value() & source.m_space->logaddrmask(); + resultbyte = val & source.m_space->logaddrmask(); else - resultbyte = m_expression.value(); + resultbyte = val; set_cursor_pos(cursor_pos(resultbyte, m_bytes_per_chunk * 8 - 4)); } @@ -740,7 +757,7 @@ bool debug_view_memory::read(u8 size, offs_t offs, u64 &data) const debug_view_memory_source &source = downcast(*m_source); // if no raw data, just use the standard debug routines - if (source.m_space != nullptr) + if (source.m_space) { auto dis = machine().disable_side_effect(); @@ -823,7 +840,7 @@ void debug_view_memory::write(u8 size, offs_t offs, u64 data) const debug_view_memory_source &source = downcast(*m_source); // if no raw data, just use the standard debug routines - if (source.m_space != nullptr) + if (source.m_space) { auto dis = machine().disable_side_effect(); diff --git a/src/emu/debug/dvmemory.h b/src/emu/debug/dvmemory.h index 1927e030d2b..c354b644053 100644 --- a/src/emu/debug/dvmemory.h +++ b/src/emu/debug/dvmemory.h @@ -107,6 +107,7 @@ private: debug_view_expression m_expression; // expression describing the start address u32 m_chunks_per_row; // number of chunks displayed per line u8 m_bytes_per_chunk; // bytes per chunk + u8 m_steps_per_chunk; // bytes per chunk int m_data_format; // 1-8 current values 9 32bit floating point bool m_reverse_view; // reverse-endian view? bool m_ascii_view; // display ASCII characters? -- cgit v1.2.3-70-g09d2 From 4f90cbd74460a5fb124056f7ae61115a8b54554c Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 16:38:50 +0100 Subject: Watchpoint fixes (nw) --- src/emu/emumem.cpp | 86 ++++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 68 insertions(+), 18 deletions(-) diff --git a/src/emu/emumem.cpp b/src/emu/emumem.cpp index 2b63aa4952b..bbbf3b59fda 100644 --- a/src/emu/emumem.cpp +++ b/src/emu/emumem.cpp @@ -738,18 +738,20 @@ private: } // internal watchpoint handler - template + template UintType watchpoint_r(address_space &space, offs_t offset, UintType mask) { - m_space.device().debug()->memory_read_hook(m_space, offset * sizeof(UintType), mask); + int base_shift = sizeof(UintType) == 1 ? 0 : sizeof(UintType) == 2 ? 1 : sizeof(UintType) == 4 ? 2 : 3; + offset = offset << (AddrShift + base_shift); + m_space.device().debug()->memory_read_hook(m_space, offset, mask); u16 *oldtable = m_live_lookup; m_live_lookup = &m_table[0]; UintType result; if (sizeof(UintType) == 1) result = m_space.read_byte(offset); - if (sizeof(UintType) == 2) result = m_space.read_word(offset << 1, mask); - if (sizeof(UintType) == 4) result = m_space.read_dword(offset << 2, mask); - if (sizeof(UintType) == 8) result = m_space.read_qword(offset << 3, mask); + if (sizeof(UintType) == 2) result = m_space.read_word(offset, mask); + if (sizeof(UintType) == 4) result = m_space.read_dword(offset, mask); + if (sizeof(UintType) == 8) result = m_space.read_qword(offset, mask); m_live_lookup = oldtable; return result; } @@ -806,17 +808,19 @@ private: { } - template + template void watchpoint_w(address_space &space, offs_t offset, UintType data, UintType mask) { - m_space.device().debug()->memory_write_hook(m_space, offset * sizeof(UintType), data, mask); + int base_shift = sizeof(UintType) == 1 ? 0 : sizeof(UintType) == 2 ? 1 : sizeof(UintType) == 4 ? 2 : 3; + offset = offset << (AddrShift + base_shift); + m_space.device().debug()->memory_write_hook(m_space, offset, data, mask); u16 *oldtable = m_live_lookup; m_live_lookup = &m_table[0]; if (sizeof(UintType) == 1) m_space.write_byte(offset, data); - if (sizeof(UintType) == 2) m_space.write_word(offset << 1, data, mask); - if (sizeof(UintType) == 4) m_space.write_dword(offset << 2, data, mask); - if (sizeof(UintType) == 8) m_space.write_qword(offset << 3, data, mask); + if (sizeof(UintType) == 2) m_space.write_word(offset, data, mask); + if (sizeof(UintType) == 4) m_space.write_dword(offset, data, mask); + if (sizeof(UintType) == 8) m_space.write_qword(offset, data, mask); m_live_lookup = oldtable; } @@ -3913,28 +3917,51 @@ address_table_read::address_table_read(address_space &space, bool large) case 8: m_handlers[STATIC_UNMAP]->set_delegate(read8_delegate(FUNC(address_table_read::unmap_r), this)); m_handlers[STATIC_NOP]->set_delegate(read8_delegate(FUNC(address_table_read::nop_r), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(read8_delegate(FUNC(address_table_read::watchpoint_r), this)); + switch (space.addr_shift()) + { + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(read8_delegate (&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + default: abort(); + } break; // 16-bit case case 16: m_handlers[STATIC_UNMAP]->set_delegate(read16_delegate(FUNC(address_table_read::unmap_r), this)); m_handlers[STATIC_NOP]->set_delegate(read16_delegate(FUNC(address_table_read::nop_r), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(read16_delegate(FUNC(address_table_read::watchpoint_r), this)); + switch (space.addr_shift()) + { + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(read16_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(read16_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case 3: m_handlers[STATIC_WATCHPOINT]->set_delegate(read16_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + default: abort(); + } break; // 32-bit case case 32: m_handlers[STATIC_UNMAP]->set_delegate(read32_delegate(FUNC(address_table_read::unmap_r), this)); m_handlers[STATIC_NOP]->set_delegate(read32_delegate(FUNC(address_table_read::nop_r), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(read32_delegate(FUNC(address_table_read::watchpoint_r), this)); + switch (space.addr_shift()) + { + case -2: m_handlers[STATIC_WATCHPOINT]->set_delegate(read32_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(read32_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(read32_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + default: abort(); + } break; // 64-bit case case 64: m_handlers[STATIC_UNMAP]->set_delegate(read64_delegate(FUNC(address_table_read::unmap_r), this)); m_handlers[STATIC_NOP]->set_delegate(read64_delegate(FUNC(address_table_read::nop_r), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(read64_delegate(FUNC(address_table_read::watchpoint_r), this)); + switch (space.addr_shift()) + { + case -3: m_handlers[STATIC_WATCHPOINT]->set_delegate(read64_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case -2: m_handlers[STATIC_WATCHPOINT]->set_delegate(read64_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(read64_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(read64_delegate(&address_table_read::watchpoint_r, "watchpoint_r", this)); break; + default: abort(); + } break; } @@ -3987,28 +4014,51 @@ address_table_write::address_table_write(address_space &space, bool large) case 8: m_handlers[STATIC_UNMAP]->set_delegate(write8_delegate(FUNC(address_table_write::unmap_w), this)); m_handlers[STATIC_NOP]->set_delegate(write8_delegate(FUNC(address_table_write::nop_w), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(write8_delegate(FUNC(address_table_write::watchpoint_w), this)); + switch (space.addr_shift()) + { + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(write8_delegate (&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + default: abort(); + } break; // 16-bit case case 16: m_handlers[STATIC_UNMAP]->set_delegate(write16_delegate(FUNC(address_table_write::unmap_w), this)); m_handlers[STATIC_NOP]->set_delegate(write16_delegate(FUNC(address_table_write::nop_w), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(write16_delegate(FUNC(address_table_write::watchpoint_w), this)); + switch (space.addr_shift()) + { + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(write16_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(write16_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case 3: m_handlers[STATIC_WATCHPOINT]->set_delegate(write16_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + default: abort(); + } break; // 32-bit case case 32: m_handlers[STATIC_UNMAP]->set_delegate(write32_delegate(FUNC(address_table_write::unmap_w), this)); m_handlers[STATIC_NOP]->set_delegate(write32_delegate(FUNC(address_table_write::nop_w), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(write32_delegate(FUNC(address_table_write::watchpoint_w), this)); + switch (space.addr_shift()) + { + case -2: m_handlers[STATIC_WATCHPOINT]->set_delegate(write32_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(write32_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(write32_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + default: abort(); + } break; // 64-bit case case 64: m_handlers[STATIC_UNMAP]->set_delegate(write64_delegate(FUNC(address_table_write::unmap_w), this)); m_handlers[STATIC_NOP]->set_delegate(write64_delegate(FUNC(address_table_write::nop_w), this)); - m_handlers[STATIC_WATCHPOINT]->set_delegate(write64_delegate(FUNC(address_table_write::watchpoint_w), this)); + switch (space.addr_shift()) + { + case -3: m_handlers[STATIC_WATCHPOINT]->set_delegate(write64_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case -2: m_handlers[STATIC_WATCHPOINT]->set_delegate(write64_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case -1: m_handlers[STATIC_WATCHPOINT]->set_delegate(write64_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + case 0: m_handlers[STATIC_WATCHPOINT]->set_delegate(write64_delegate(&address_table_write::watchpoint_w, "watchpoint_w", this)); break; + default: abort(); + } break; } -- cgit v1.2.3-70-g09d2 From 3555ce616ecbf8df1ccfa1dc229a0f81c1c1ea7f Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 16:55:38 +0100 Subject: More fixes and simplifications (nw) --- src/emu/debug/debugcpu.cpp | 86 +++++++++++++--------------------------------- 1 file changed, 23 insertions(+), 63 deletions(-) diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index eab6f7771e7..9a1b35cf210 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -389,34 +389,20 @@ u8 debugger_cpu::read_byte(address_space &space, offs_t address, bool apply_tran u16 debugger_cpu::read_word(address_space &space, offs_t address, bool apply_translation) { + device_memory_interface &memory = space.device().memory(); + /* mask against the logical byte mask */ address &= space.logaddrmask(); u16 result; - if (!WORD_ALIGNED(address)) - { /* if this is misaligned read, or if there are no word readers, just read two bytes */ - u8 byte0 = read_byte(space, address + 0, apply_translation); - u8 byte1 = read_byte(space, address + 1, apply_translation); - - /* based on the endianness, the result is assembled differently */ - if (space.endianness() == ENDIANNESS_LITTLE) - result = byte0 | (byte1 << 8); - else - result = byte1 | (byte0 << 8); + /* translate if necessary; if not mapped, return 0xffff */ + if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) + { + result = 0xffff; } else - { /* otherwise, this proceeds like the byte case */ - device_memory_interface &memory = space.device().memory(); - - /* translate if necessary; if not mapped, return 0xffff */ - if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) - { - result = 0xffff; - } - else - { /* otherwise, call the byte reading function for the translated address */ - result = space.read_word(address); - } + { /* otherwise, call the byte reading function for the translated address */ + result = space.read_word_unaligned(address); } return result; @@ -430,33 +416,20 @@ u16 debugger_cpu::read_word(address_space &space, offs_t address, bool apply_tra u32 debugger_cpu::read_dword(address_space &space, offs_t address, bool apply_translation) { + device_memory_interface &memory = space.device().memory(); + /* mask against the logical byte mask */ address &= space.logaddrmask(); u32 result; - if (!DWORD_ALIGNED(address)) - { /* if this is a misaligned read, or if there are no dword readers, just read two words */ - u16 word0 = read_word(space, address + 0, apply_translation); - u16 word1 = read_word(space, address + 2, apply_translation); - /* based on the endianness, the result is assembled differently */ - if (space.endianness() == ENDIANNESS_LITTLE) - result = word0 | (word1 << 16); - else - result = word1 | (word0 << 16); + if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) + { /* translate if necessary; if not mapped, return 0xffffffff */ + result = 0xffffffff; } else - { /* otherwise, this proceeds like the byte case */ - device_memory_interface &memory = space.device().memory(); - - if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) - { /* translate if necessary; if not mapped, return 0xffffffff */ - result = 0xffffffff; - } - else - { /* otherwise, call the byte reading function for the translated address */ - result = space.read_dword(address); - } + { /* otherwise, call the byte reading function for the translated address */ + result = space.read_dword_unaligned(address); } return result; @@ -470,34 +443,21 @@ u32 debugger_cpu::read_dword(address_space &space, offs_t address, bool apply_tr u64 debugger_cpu::read_qword(address_space &space, offs_t address, bool apply_translation) { + device_memory_interface &memory = space.device().memory(); + /* mask against the logical byte mask */ address &= space.logaddrmask(); u64 result; - if (!QWORD_ALIGNED(address)) - { /* if this is a misaligned read, or if there are no qword readers, just read two dwords */ - u32 dword0 = read_dword(space, address + 0, apply_translation); - u32 dword1 = read_dword(space, address + 4, apply_translation); - /* based on the endianness, the result is assembled differently */ - if (space.endianness() == ENDIANNESS_LITTLE) - result = dword0 | (u64(dword1) << 32); - else - result = dword1 | (u64(dword0) << 32); + /* translate if necessary; if not mapped, return 0xffffffffffffffff */ + if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) + { + result = ~u64(0); } else - { /* otherwise, this proceeds like the byte case */ - device_memory_interface &memory = space.device().memory(); - - /* translate if necessary; if not mapped, return 0xffffffffffffffff */ - if (apply_translation && !memory.translate(space.spacenum(), TRANSLATE_READ_DEBUG, address)) - { - result = ~u64(0); - } - else - { /* otherwise, call the byte reading function for the translated address */ - result = space.read_qword(address); - } + { /* otherwise, call the byte reading function for the translated address */ + result = space.read_qword_unaligned(address); } return result; -- cgit v1.2.3-70-g09d2 From b28d91f1f2696effc2971d35d74260d00a45543a Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 3 Dec 2017 18:31:04 +0100 Subject: hh_tms1k: fonas 3in1 WIP (nw) --- src/mame/drivers/hh_tms1k.cpp | 129 +++++++++++++++++++++++++++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 127 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index c160c32da96..82f501050c5 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -41,7 +41,7 @@ @MP1180 TMS1100 1980, Tomy Power House Pinball @MP1181 TMS1100 1979, Conic Football 2 @MP1183 TMS1100 1980, E.R.S. Superbowl XV Football/Tandy Championship Football (model 60-2151) - *MP1185 TMS1100 1979, Fonas 3-in-1: Football, Basketball, Soccer + @MP1185 TMS1100 1979, Fonas 3-in-1: Football, Basketball, Soccer @MP1193 TMS1100 1980, Tandy Championship Football (model 60-2150) @MP1204 TMS1100 1980, Entex Baseball 3 (6007) *MP1209 TMS1100 1980, U.S. Games Space Cruiser/Strategy Football @@ -129,7 +129,7 @@ - unknown MCU clocks for some: TMS1000 RC curve is documented in the data manual, but not for newer ones (rev. E or TMS1400 MCUs). TMS0970/0980 osc. is on-die. - some of the games rely on the fact that faster/longer strobed leds appear brighter, - eg. tc4/h2hfootb(offense), bankshot(cue ball), ... + eg. tc4/h2hfootb(offense), bankshot(cue ball), f3in1(ball), ... - stopthiep: unable to start a game (may be intentional?) - 7in1ss: in 2-player mode, game select and skill select can be configured after selecting a game? - arrball: shot button is unresponsive sometimes, maybe BTANB? no video of game on Youtube @@ -3957,6 +3957,116 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Fonas 3 in 1: Football, Basketball, Soccer + * TMS1100NLL MP1185 + * 4 7seg LEDs, 40 other LEDs, 1-bit sound + + It's not known if this game has an official title. The current one is + taken from the handheld front side. + MAME external artwork is needed for the switchable overlays. + +***************************************************************************/ + +class f3in1_state : public hh_tms1k_state +{ +public: + f3in1_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_tms1k_state(mconfig, type, tag) + { } + + void prepare_display(); + DECLARE_WRITE16_MEMBER(write_r); + DECLARE_WRITE16_MEMBER(write_o); + DECLARE_READ8_MEMBER(read_k); +}; + +// handlers + +void f3in1_state::prepare_display() +{ + // R6-R9 are 7segs + set_display_segmask(0x3c0, 0x7f); + display_matrix(8, 10, m_o, m_r & ~0x20); +} + +WRITE16_MEMBER(f3in1_state::write_r) +{ + // R0-R2,R4: input mux + m_inp_mux = (data & 7) | (data >> 1 & 8); + + // R10: speaker out + m_speaker->level_w(data >> 10 & 1); + + // R0-R4,R6-R9: led select + m_r = data; + prepare_display(); +} + +WRITE16_MEMBER(f3in1_state::write_o) +{ + // O0-O7: led state + m_o = data; + prepare_display(); +} + +READ8_MEMBER(f3in1_state::read_k) +{ + // K: multiplexed inputs + return read_inputs(4); +} + + +// config + +static INPUT_PORTS_START( f3in1 ) + PORT_START("IN.0") // R0 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) // P + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // K + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) // D + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // R1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_16WAY + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_16WAY + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // R2 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_16WAY + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // R4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_CONFNAME( 0x0e, 0x02, "Game Select" ) + PORT_CONFSETTING( 0x02, "Football" ) + PORT_CONFSETTING( 0x04, "Basketball" ) + PORT_CONFSETTING( 0x08, "Soccer" ) +INPUT_PORTS_END + +static MACHINE_CONFIG_START( f3in1 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", TMS1100, 325000) // see set_clock ---TODO + MCFG_TMS1XXX_READ_K_CB(READ8(f3in1_state, read_k)) + MCFG_TMS1XXX_WRITE_R_CB(WRITE16(f3in1_state, write_r)) + MCFG_TMS1XXX_WRITE_O_CB(WRITE16(f3in1_state, write_o)) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) + //MCFG_DEFAULT_LAYOUT(layout_f3in1) + MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Gakken Poker @@ -8828,6 +8938,7 @@ static MACHINE_CONFIG_START( xl25 ) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(xl25_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) + //MCFG_DEFAULT_LAYOUT(layout_xl25) MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) /* sound hardware */ @@ -9146,6 +9257,17 @@ ROM_START( f2pbball ) ROM_END +ROM_START( f3in1 ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD( "mp1185", 0x0000, 0x0800, CRC(53f7b28d) SHA1(2249890e3a259095193b4331ca88c29ccd81eefe) ) + + ROM_REGION( 867, "maincpu:mpla", 0 ) + ROM_LOAD( "tms1100_common2_micro.pla", 0, 867, CRC(7cc90264) SHA1(c6e1cf1ffb178061da9e31858514f7cd94e86990) ) + ROM_REGION( 365, "maincpu:opla", 0 ) + ROM_LOAD( "tms1100_f3in1_output.pla", 0, 365, CRC(51d947bc) SHA1(f766397d84f038be96e83d40989195c98ddcb1d9) ) +ROM_END + + ROM_START( gpoker ) ROM_REGION( 0x0800, "maincpu", 0 ) ROM_LOAD( "mp2105", 0x0000, 0x0800, CRC(95a8f5b4) SHA1(d14f00ba9f57e437264d972baa14a14a28ff8719) ) @@ -9652,6 +9774,7 @@ CONS( 1980, ebaskb2 , 0, 0, ebaskb2, ebaskb2, ebaskb2_state, 0, CONS( 1980, raisedvl, 0, 0, raisedvl, raisedvl, raisedvl_state, 0, "Entex", "Raise The Devil", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK ) CONS( 1979, f2pbball, 0, 0, f2pbball, f2pbball, f2pbball_state, 0, "Fonas", "2 Player Baseball (Fonas)", MACHINE_SUPPORTS_SAVE ) +CONS( 1979, f3in1, 0, 0, f3in1, f3in1, f3in1_state, 0, "Fonas", "3 in 1: Football, Basketball, Soccer", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK ) CONS( 1979, gpoker, 0, 0, gpoker, gpoker, gpoker_state, 0, "Gakken", "Poker (Gakken, 1979 version)", MACHINE_SUPPORTS_SAVE ) CONS( 1980, gjackpot, 0, 0, gjackpot, gjackpot, gjackpot_state, 0, "Gakken", "Jackpot: Gin Rummy & Black Jack", MACHINE_SUPPORTS_SAVE ) @@ -9706,7 +9829,7 @@ CONS( 1980, phpball, 0, 0, phpball, phpball, phpball_state, 0, CONS( 1980, ssports4, 0, 0, ssports4, ssports4, ssports4_state, 0, "U.S. Games", "Super Sports-4", MACHINE_SUPPORTS_SAVE | MACHINE_REQUIRES_ARTWORK ) -CONS( 1983, xl25, 0, 0, xl25, xl25, xl25_state, 0, "Vulcan Electronics", "XL 25", MACHINE_SUPPORTS_SAVE ) +CONS( 1983, xl25, 0, 0, xl25, xl25, xl25_state, 0, "Vulcan Electronics", "XL 25", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // ***: As far as MAME is concerned, the game is emulated fine. But for it to be playable, it requires interaction // with other, unemulatable, things eg. game board/pieces, playing cards, pen & paper, etc. diff --git a/src/mame/mame.lst b/src/mame/mame.lst index a3adca7212a..f676922b89e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14743,6 +14743,7 @@ eleciq // Conic esbattle // Entex esoccer // Entex f2pbball // Fonas +f3in1 // Fonas fxmcr165 // Gakken ginv1000 // Gakken gjackpot // Gakken -- cgit v1.2.3-70-g09d2 From 7e567e0ea4c51c8787c0c2b3e745a555db07ef69 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sun, 3 Dec 2017 14:50:04 -0300 Subject: New clones marked as NOT_WORKING -------------------------------- Penguin Pays (OHG0417-03, US) [Roberto Fresca] Penguin Pays (OHG0417-02, US) [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 48 +++++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 2 ++ 2 files changed, 50 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index a82e30a5213..51ff6765484 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -5162,6 +5162,52 @@ ROM_START( pengpayu ) ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) ) ROM_END +// OHG0417-03 / 586/7(b) / 10 Credit Multiplier / 9 Line Multiline +// Penguin Pays / Export / B - 14/07/97 +// All devices are 27c4002 instead of 27c4096 +// marked as 92.130% +ROM_START( pengpayua ) + ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS + /* + Checksum code found at 0x000d08 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0x93affe65 + Calculated Checksum 0x93affe65 (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "ohg041703.u7", 0x000000, 0x80000, CRC(48689db1) SHA1(6aa07a0e6dbf98a34cca31d5983ae9429f2254aa) ) + ROM_LOAD32_WORD( "ohg041703.u11", 0x000002, 0x80000, CRC(50e00a35) SHA1(e8f104621c8fc21d8ba33157729f394554c776e2) ) + ROM_LOAD32_WORD( "ohg041703.u8", 0x100000, 0x80000, CRC(a08acbb3) SHA1(8a7cc927a81521b069873a720d1a083f164dc2ef) ) + ROM_LOAD32_WORD( "ohg041703.u12", 0x100002, 0x80000, CRC(9eae7f7b) SHA1(23bd952de1d6d5d69e5565cc2bc241c2cd775453) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + +// OHG0417-02 / 586/7(b) / 10 Credit Multiplier / 9 Line Multiline +// Penguin Pays / Export / B - 14/07/97 +// All devices are 27c4002 instead of 27c4096 +// marked as 90.45% +ROM_START( pengpayub ) + ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS + /* + Checksum code found at 0x000d08 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0x96aefc60 + Calculated Checksum 0x96aefc60 (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "ohg041702.u7", 0x000000, 0x80000, CRC(76b7641f) SHA1(8df2c46ec8e5ec5574f12878619593e7157df517) ) + ROM_LOAD32_WORD( "ohg041702.u11", 0x000002, 0x80000, CRC(6d731b81) SHA1(06ea80e1003ceba8a790a035c520aaca99db4d54) ) + ROM_LOAD32_WORD( "ohg041702.u8", 0x100000, 0x80000, CRC(a08acbb3) SHA1(8a7cc927a81521b069873a720d1a083f164dc2ef) ) + ROM_LOAD32_WORD( "ohg041702.u12", 0x100002, 0x80000, CRC(9eae7f7b) SHA1(23bd952de1d6d5d69e5565cc2bc241c2cd775453) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + // EHG1257 / MV4122/1 / 3,5,10,20,25,50 Credit Multiplier / 20 Line Multiline // PENGUIN PAYS / PENGUIN PUCKS / Export / C - 19/01/01 // Hyperlink version, but can also run standalone without progressive jackpot @@ -7048,6 +7094,8 @@ GAMEL( 1996, pengpaya, pengpay, aristmk5, cashchama, aristmk5_s GAMEL( 1997, pengpayb, pengpay, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200359V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 586/3(a), D - 03/06/97, Rev 4 GAMEL( 1995, pengpayc, pengpay, aristmk5, wcougar, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (0200113V, NSW/ACT)", MACHINE_FLAGS, layout_wcougar ) // 586, A - 12/10/95 GAMEL( 1997, pengpayu, pengpay, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (BHI0417-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 586/7(b), B - 14/07/97 +GAMEL( 1997, pengpayua, pengpay, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (OHG0417-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 586/7(b), B - 14/07/97 +GAMEL( 1997, pengpayub, pengpay, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (OHG0417-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 586/7(b), B - 14/07/97 GAMEL( 2001, pengpuck, pengpay, aristmk5_usa, pengpuck, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays - Penguin Pucks (EHG1257, US)", MACHINE_FLAGS, layout_pengpuck ) // MV4122/1, C - 19/01/01 GAMEL( 1998, petshop, aristmk5, aristmk5, petshop, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Pet Shop (0100731V, NSW/ACT)", MACHINE_FLAGS, layout_petshop ) // 618/1, A - 17/04/98, Rev 13 GAMEL( 1995, phantpay, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Phantom Pays (0500005V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 570/1, E - 12/09/95 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index f676922b89e..d186689ada0 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1559,6 +1559,8 @@ pengpayb // (c) 1997 pengpayc // (c) 1995 pengpayd // (c) 1995 pengpayu // (c) 1997 +pengpayua // (c) 1997 +pengpayub // (c) 1997 pengpuck // (c) 2001 penpir // (c) 1998 penpira // (c) 1998 -- cgit v1.2.3-70-g09d2 From 0504078620a2e0bec992af64b861a90d72a7a0ff Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sun, 3 Dec 2017 19:33:52 +0100 Subject: e132xs: implemented drc versions of cmp, stxx1, ldwr, stwr, b, br. nw --- src/devices/cpu/e132xs/32xsdefs.h | 4 + src/devices/cpu/e132xs/e132xs.h | 8 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 7 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 352 +++++++++++++++++++++++++++---- src/devices/cpu/e132xs/e132xsfe.cpp | 7 +- 5 files changed, 331 insertions(+), 47 deletions(-) diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h index 86b0018b909..b49aba069a4 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/32xsdefs.h @@ -156,6 +156,10 @@ #define S_MASK 0x00040000 #define ILC_MASK 0x00180000 +#define C_SHIFT 0 +#define Z_SHIFT 1 +#define N_SHIFT 2 +#define V_SHIFT 3 #define S_SHIFT 18 /* SR flags */ diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index acfeea49159..7a665032819 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -50,7 +50,7 @@ #define SINGLE_INSTRUCTION_MODE (1) -#define ENABLE_E132XS_DRC (0) +#define ENABLE_E132XS_DRC (1) //************************************************************************** // TYPE DEFINITIONS @@ -435,8 +435,8 @@ private: void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc); + void generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc); void generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); @@ -511,7 +511,7 @@ private: template void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_br(drcuml_block *block, const opcode_desc *desc); template void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index d6c2bed25b1..944e9c9a723 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -85,12 +85,10 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } -/* static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } -*/ /*------------------------------------------------- ccfunc_total_cycles - compute the total number @@ -617,7 +615,7 @@ void hyperstone_device::generate_delay_slot_and_branch(drcuml_block *block, comp /* fetch the target register if dynamic, in case it is modified by the delay slot */ if (desc->targetpc == BRANCH_TARGET_DYNAMIC) { - UML_MOV(block, mem(&m_branch_dest), I0); + UML_MOV(block, mem(&m_branch_dest), DRC_PC); } /* update the cycles and jump through the hash table to the target */ @@ -951,7 +949,7 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com case 0xf9: generate_b(block, compiler, desc); break; case 0xfa: generate_b(block, compiler, desc); break; case 0xfb: generate_b(block, compiler, desc); break; - case 0xfc: generate_br(block, compiler, desc); break; + case 0xfc: generate_br(block, desc); break; case 0xfd: generate_trap_op(block, compiler, desc); break; case 0xfe: generate_trap_op(block, compiler, desc); break; case 0xff: generate_trap_op(block, compiler, desc); break; @@ -969,5 +967,6 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com UML_LABEL(block, done); UML_XOR(block, DRC_SR, DRC_SR, I7); + return true; } \ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index e829cf070a1..8cbd78c45f0 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -87,12 +87,44 @@ void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compile { } -void hyperstone_device::generate_decode_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + + int32_t offset; + if (op & 0x80) + { + uint16_t next = READ_OP(desc->pc + 2); + + offset = (op & 0x7f) << 16; + offset |= (next & 0xfffe); + + if (next & 1) + offset |= 0xff800000; + + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + else + { + offset = op & 0x7e; + + if (op & 1) + offset |= 0xffffff80; + } + + UML_MOV(block, I1, offset); } -void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + + if (op & 0x80) + { + UML_ADD(block, DRC_PC, DRC_PC, 2); + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + } } void hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) @@ -349,11 +381,11 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi UML_OR(block, I2, I0, I1); UML_TEST(block, I2, ~0); UML_SETc(block, uml::COND_Z, I2); - UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK); UML_TEST(block, I0, 0x80000000); UML_SETc(block, uml::COND_NZ, I2); - UML_ROLINS(block, DRC_SR, I2, 0, N_MASK); + UML_ROLINS(block, DRC_SR, I2, N_SHIFT, N_MASK); if (DST_GLOBAL) { @@ -472,22 +504,19 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); UML_DTEST(block, I5, 0x100000000U); UML_SETc(block, uml::COND_NZ, I6); - UML_ROLINS(block, DRC_SR, I6, 0, C_MASK); + UML_ROLINS(block, DRC_SR, I6, C_SHIFT, C_MASK); UML_XOR(block, I1, I5, I2); UML_XOR(block, I6, I5, I1); UML_AND(block, I1, I1, I6); UML_TEST(block, I1, 0x80000000); - UML_SETc(block, uml::COND_NZ, I6); - UML_ROLINS(block, DRC_SR, I6, 0, V_MASK); + UML_ROLINS(block, DRC_SR, I1, 4, V_MASK); UML_TEST(block, I5, ~0); UML_SETc(block, uml::COND_Z, I6); - UML_ROLINS(block, DRC_SR, I6, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I6, Z_SHIFT, Z_MASK); - UML_TEST(block, I5, 0x80000000); - UML_SETc(block, uml::COND_NZ, I6); - UML_ROLINS(block, DRC_SR, I6, 0, N_MASK); + UML_ROLINS(block, DRC_SR, I5, 3, N_MASK); if (DST_GLOBAL) { @@ -498,7 +527,7 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil { UML_ADD(block, I0, I3, dst_code); UML_AND(block, I2, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); + UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); } } @@ -512,6 +541,75 @@ void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_AND(block, I0, DRC_SR, C_MASK); + else + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + if (DST_GLOBAL) + { + UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + UML_DSUB(block, I2, I1, I0); // tmp + + UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK | V_MASK | C_MASK)); + UML_XOR(block, I4, I1, I2); + UML_XOR(block, I5, I1, I0); + UML_AND(block, I6, I4, I5); + UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); + + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'2'); + UML_DSHR(block, mem(&m_drc_arg1), I0, 32); + UML_CALLC(block, cfunc_print, this); + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'0'); + UML_MOV(block, mem(&m_drc_arg1), I0); + UML_CALLC(block, cfunc_print, this); + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'3'); + UML_DSHR(block, mem(&m_drc_arg1), I1, 32); + UML_CALLC(block, cfunc_print, this); + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'1'); + UML_MOV(block, mem(&m_drc_arg1), I1); + UML_CALLC(block, cfunc_print, this); + + UML_CMP(block, I1, I0); + UML_SETc(block, uml::COND_B, I3); + UML_ROLINS(block, DRC_SR, I3, C_SHIFT, C_MASK); + + UML_CMP(block, I1, I0); + UML_SETc(block, uml::COND_E, I4); + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'4'); + UML_MOV(block, mem(&m_drc_arg1), I4); + UML_CALLC(block, cfunc_print, this); + UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK); + + UML_CMP(block, I1, I0); + UML_SETc(block, uml::COND_L, I5); + UML_ROLINS(block, DRC_SR, I5, N_SHIFT, N_MASK); } @@ -558,8 +656,8 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); UML_TEST(block, I3, ~0); UML_SETc(block, uml::COND_Z, I2); - UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK); - UML_ROLINS(block, DRC_SR, I3, 3, N_MASK); + UML_ROLINS(block, DRC_SR, I2, 1, Z_MASK); + UML_ROLINS(block, DRC_SR, I5, 28, N_MASK); if (DST_GLOBAL) { @@ -977,19 +1075,29 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp const uint32_t srcf_code = src_code + 1; const uint32_t dst_code = (op & 0xf0) >> 4; - if (!DST_GLOBAL || dst_code != SR_REGISTER) + if (!DST_GLOBAL || !SRC_GLOBAL) + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (DST_GLOBAL) { - if (DST_GLOBAL) - UML_LOAD(block, I4, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + if (dst_code == SR_REGISTER) + { + UML_MOV(block, I6, extra_s); + } else - UML_LOAD(block, I4, (void *)m_local_regs, dst_code, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I6, I4, extra_s); + { + UML_LOAD(block, I4, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } } else { - UML_MOV(block, I6, extra_s); + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I5, I2, 0x3f); + UML_LOAD(block, I4, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); } + UML_ADD(block, I6, I4, extra_s); + switch (sub_type) { case 0: // LDBS.A @@ -1004,8 +1112,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I0, src_code); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); } @@ -1023,8 +1130,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I0, src_code); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); } @@ -1047,8 +1153,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I0, src_code); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); if (extra_s & 1) { @@ -1068,7 +1173,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp UML_AND(block, I6, I6, ~3); switch (switch_val) { - case 0: // LDW.A + case 0: // LDW.A/D UML_MOV(block, I0, I6); UML_CALLH(block, *m_mem_read32); @@ -1080,8 +1185,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I0, src_code); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); } @@ -1098,7 +1202,6 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); @@ -1132,8 +1235,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I0, src_code); + UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); } @@ -1151,7 +1253,6 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp } else { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); UML_ADD(block, I2, I3, src_code); UML_AND(block, I2, I2, 0x3f); UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); @@ -1189,8 +1290,8 @@ void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { -/* const uint16_t op = desc->opptr.w[0]; + uint16_t next_1 = READ_OP(desc->pc + 2); const uint16_t sub_type = (next_1 & 0x3000) >> 12; @@ -1220,7 +1321,109 @@ void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *comp } generate_check_delay_pc(block); -*/ + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (DST_GLOBAL) + { + UML_LOAD(block, I0, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I1, I3, dst_code); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); + } + + if (SRC_GLOBAL) + { + UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I1, I3, src_code); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); + } + + switch (sub_type) + { + case 0: // STBS.D + case 1: // STBU.D + // TODO: missing trap on range error for STBS.D + UML_ADD(block, I0, I0, extra_s); + UML_CALLH(block, *m_mem_write8); + break; + + case 2: // STHS.D, STHU.D + // TODO: missing trap on range error with STHS.D + UML_ADD(block, I0, I0, extra_s); + UML_CALLH(block, *m_mem_write16); + break; + + case 3: + switch (extra_s & 3) + { + case 0: // STW.D + UML_ADD(block, I0, I0, extra_s & ~3); + UML_CALLH(block, *m_mem_write32); + break; + case 1: // STD.D + { + UML_ADD(block, I0, I0, extra_s & ~1); + UML_CALLH(block, *m_mem_write32); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I1, 0); + else + UML_LOAD(block, I1, (void *)m_global_regs, src_code + 1, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I1, I3, src_code + 1); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I0, 4); + UML_CALLH(block, *m_mem_write32); + break; + } + case 2: // STW.IOD + UML_ADD(block, I0, I0, extra_s & ~3); + UML_CALLH(block, *m_io_write32); + break; + case 3: // STD.IOD + { + UML_ADD(block, I0, I0, extra_s & ~1); + UML_CALLH(block, *m_io_write32); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I1, 0); + else + UML_LOAD(block, I1, (void *)m_global_regs, src_code + 1, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I1, I3, src_code + 1); + UML_AND(block, I1, I1, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I0, I0, 4); + UML_CALLH(block, *m_io_write32); + break; + } + } + break; + } } @@ -1251,6 +1454,30 @@ void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, dst_code); + UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I4, I2, 0x3f); + UML_STORE(block, (void *)m_local_regs, I4, I1, SIZE_DWORD, SCALE_x4); + } } @@ -1275,6 +1502,33 @@ void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I1, 0); + else + UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I2, I2, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + UML_CALLH(block, *m_mem_write32); } @@ -1299,11 +1553,35 @@ void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + + int done = compiler->m_labelnum++; + uml::condition_t condition = COND_SET ? uml::COND_Z : uml::COND_NZ; + + int skip; + UML_TEST(block, DRC_SR, condition_masks[CONDITION]); + UML_JMPc(block, condition, skip = compiler->m_labelnum++); + generate_br(block, desc); + + UML_JMP(block, done); + + UML_LABEL(block, skip); + generate_ignore_pcrel(block, desc); + generate_check_delay_pc(block); + + UML_LABEL(block, done); } -void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_br(drcuml_block *block, const opcode_desc *desc) { + generate_decode_pcrel(block, desc); + generate_check_delay_pc(block); + + UML_ADD(block, DRC_PC, DRC_PC, I1); + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + + // TODO: correct cycle count } @@ -1440,8 +1718,10 @@ void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compi UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); UML_ADD(block, DRC_PC, I2, extra_s & ~1); + UML_MOV(block, mem(&m_intblock), 2); + generate_delay_slot_and_branch(block, compiler, desc); //TODO: add interrupt locks, errors, .... } diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index be54f9342d3..81129a56460 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -1270,7 +1270,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[0] |= 1 << gsrc_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.targetpc = desc.pc + decode_call(desc); + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; break; case 0xef: // call local @@ -1278,14 +1278,15 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.regin[lsrc_group] |= 1 << lsrc_code; desc.regout[ldst_group] |= 1 << ldst_code; desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.targetpc = desc.pc + decode_call(desc); + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; break; case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt + decode_pcrel(desc, op); desc.regin[0] |= SR_CODE; - desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; break; case 0xfc: // br -- cgit v1.2.3-70-g09d2 From b7f10a80bd0fb1c5220b85e88e72ad259342a652 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Sun, 3 Dec 2017 15:40:40 -0300 Subject: New clones marked as NOT_WORKING -------------------------------- Boot Scootin' (AHG1547, US) [Roberto Fresca] This set should be parent, since it's Export B - 22/03/01. --- src/mame/drivers/aristmk5.cpp | 28 ++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 29 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 51ff6765484..0dd6629c3db 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -2318,6 +2318,33 @@ ROM_START( bootsctnua ) ROM_END +// AHG1547 / MV4098/1 / 10 Credit Multiplier / 20 Line Multiline +// BOOT SCOOTIN' / Export / B - 22/03/01 +// Requires set chip version: 4.04.xx +ROM_START( bootsctnub ) + ARISTOCRAT_MK5_BIOS + /* + Checksum code found at 0x000d18 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0xae44f291 + Calculated Checksum 0xae44f291 (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "ahg1547.u7", 0x000000, 0x80000, CRC(5ded48cb) SHA1(3335a9dc6758dd8b225258ab2cb01cf4e9c02dd2) ) + ROM_LOAD32_WORD( "ahg1547.u11", 0x000002, 0x80000, CRC(764dfdb8) SHA1(e68493dfac2d64c59d7576d4b124210089edda62) ) + ROM_LOAD32_WORD( "ahg1547.u8", 0x100000, 0x80000, CRC(7e26e7a9) SHA1(88dc5dbf6ada1b6f2218ef3b013bc91047401d21) ) + ROM_LOAD32_WORD( "ahg1547.u12", 0x100002, 0x80000, CRC(f2dfc38c) SHA1(7fd6c8e11feef375b0f1fac0cfebca74f5da2ed6) ) + ROM_LOAD32_WORD( "ahg1547.u9", 0x200000, 0x80000, CRC(13f410e4) SHA1(e5022dbb42d174b2e3eda8f1564c97ca8fa39deb) ) + ROM_LOAD32_WORD( "ahg1547.u13", 0x200002, 0x80000, CRC(a5382c96) SHA1(570479383d69dfc9e52ebd55b51989ca284d31e7) ) + ROM_LOAD32_WORD( "ahg1547.u10", 0x300000, 0x80000, CRC(a31d8a45) SHA1(5e62d0d3523fd381e940b4dbc6f84d83434bf83a) ) + ROM_LOAD32_WORD( "ahg1547.u14", 0x300002, 0x80000, CRC(de2888e2) SHA1(f614d68c0e09912e9126cb024f54ed32ee50b57e) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + + // BHG1248 / MV4119/1 / 3,5,10,20,25,50 Credit Multiplier / 9 Line Multiline // Bachelorette Party / Export / B - 25/08/2000 // ROM says "9 Line Multiline" but this is a 20 line game, it cannot be set to 9 lines at all @@ -6991,6 +7018,7 @@ GAMEL( 1996, baddog, aristmk5, aristmk5, baddog, aristmk5_s GAMEL( 1998, bootsctn, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (0100812V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 616/1, B - 11/12/98, Rev 20 GAMEL( 1999, bootsctnu, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (GHG1012-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4098, A - 25/08/99 GAMEL( 1999, bootsctnua, bootsctn, aristmk5_usa, pengpuck, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (GHG1008-03, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4098/1, A - 27/07/99 +GAMEL( 1999, bootsctnub, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (AHG1547, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4098/1, B - 22/03/01 GAMEL( 1996, bumblbug, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200510V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 3 GAMEL( 1996, bumblbugql, bumblbug, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200456V, Queensland)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 1.0 GAMEL( 1997, bumblbugu, bumblbug, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (CHG0479-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 593, D - 05/07/97 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index d186689ada0..669f0cb33a4 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1443,6 +1443,7 @@ blackpnt // (c) 1996 bootsctn // (c) 1998 bootsctnu // (c) 1999 bootsctnua // (c) 1999 +bootsctnub // (c) 1999 bparty // (c) 2000 bpartya // (c) 2000 bumblbug // (c) 1996 -- cgit v1.2.3-70-g09d2 From f2ae8efce0733763214fd7adfab077943cf2b0bc Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 21:24:46 +0100 Subject: hp64k fix (nw) --- src/devices/cpu/hphybrid/hphybrid.cpp | 8 ++++---- src/mame/drivers/hp64k.cpp | 4 +++- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 9e8457b255d..57bc1411186 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -761,7 +761,7 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) return read_non_common_reg(addr_wo_bsc); } } else { - return m_direct->read_word(addr << 1); + return m_direct->read_word(addr); } } @@ -1025,7 +1025,7 @@ void hp_hybrid_cpu_device::do_pw(uint16_t opcode) } WM(tmp_addr >> 1 , tmp); } else { - // Extend address, form byte address + // Extend address uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) << 8 : uint8_t(tmp); uint16_t mask = (tmp_addr & 1) ? 0xff00 : 0x00ff; tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); @@ -1125,12 +1125,12 @@ void hp_hybrid_cpu_device::handle_dma(void) uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) { - return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1); + return m_io->read_word(HP_MAKE_IOADDR(pa, ic)); } void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { - m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v); + m_io->write_word(HP_MAKE_IOADDR(pa, ic), v); } hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) diff --git a/src/mame/drivers/hp64k.cpp b/src/mame/drivers/hp64k.cpp index 7c9bf6e965b..54fe302a140 100644 --- a/src/mame/drivers/hp64k.cpp +++ b/src/mame/drivers/hp64k.cpp @@ -439,7 +439,9 @@ WRITE_LINE_MEMBER(hp64k_state::hp64k_crtc_drq_w) if (!prev_crtc && crtc_drq) { address_space& prog_space = m_cpu->space(AS_PROGRAM); - uint8_t data = prog_space.read_byte(m_crtc_ptr); + uint16_t data = prog_space.read_word(m_crtc_ptr >> 1); + data = m_crtc_ptr & 1 ? data & 0xff : data >> 8; + m_crtc_ptr++; m_crtc->dack_w(prog_space , 0 , hp64k_crtc_filter(data)); -- cgit v1.2.3-70-g09d2 From 48590060812988e18780a350db82ad8fadbb88d6 Mon Sep 17 00:00:00 2001 From: r09 Date: Sun, 3 Dec 2017 22:18:35 +0100 Subject: fmtowns: correct scrolling in 16-bit color mode Final fix for scrolling / positioning issues (hopefully). Fixes Psychic Detective Vol. 5. --- src/mame/video/fmtowns.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index 9cb02b6cbb4..b6846bb4b18 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -959,7 +959,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const off += scroll; } hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) / hzoom; + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) * (hzoom * 2); } else { @@ -971,7 +971,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const off += scroll; } hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) / hzoom; + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) * (hzoom * 2); } off += line * linesize; -- cgit v1.2.3-70-g09d2 From 9d5738c77d5a2efd8f0284674c7aca9b4fbf53c3 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 21:54:44 +0100 Subject: Fix hp9845 (nw) --- src/mame/drivers/hp9845.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp index f8a20913c4d..d66adef8eef 100644 --- a/src/mame/drivers/hp9845.cpp +++ b/src/mame/drivers/hp9845.cpp @@ -1046,7 +1046,7 @@ void hp9845b_state::video_fill_buff(bool buff_idx) // Limit on accesses per row reached break; } - m_video_word = prog_space.read_word(m_video_mar << 1); + m_video_word = prog_space.read_word(m_video_mar); if (m_video_load_mar) { // Load new address into MAR after start of a new frame or NWA instruction if (m_video_first_mar) { @@ -1620,7 +1620,7 @@ void hp9845ct_base_state::video_fill_buff(bool buff_idx) // Limit on accesses per row reached break; } - m_video_word = prog_space.read_word(m_video_mar << 1); + m_video_word = prog_space.read_word(m_video_mar); if (m_video_load_mar) { // Load new address into MAR after start of a new frame or NWA instruction if (m_video_first_mar) { -- cgit v1.2.3-70-g09d2 From 7c85bc8c404a0321cf24322af649625b43050492 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 22:33:54 +0100 Subject: Fix harddriv sound, maybe (nw) --- src/mame/audio/harddriv.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/audio/harddriv.cpp b/src/mame/audio/harddriv.cpp index 22114b3dc4c..06677fbf79e 100644 --- a/src/mame/audio/harddriv.cpp +++ b/src/mame/audio/harddriv.cpp @@ -266,13 +266,13 @@ WRITE16_MEMBER(harddriv_sound_board_device::hdsnd68k_320ram_w) READ16_MEMBER(harddriv_sound_board_device::hdsnd68k_320ports_r) { - return m_sounddsp->space(AS_IO).read_word((offset & 7) << 1); + return m_sounddsp->space(AS_IO).read_word(offset & 7); } WRITE16_MEMBER(harddriv_sound_board_device::hdsnd68k_320ports_w) { - m_sounddsp->space(AS_IO).write_word((offset & 7) << 1, data); + m_sounddsp->space(AS_IO).write_word(offset & 7, data); } -- cgit v1.2.3-70-g09d2 From ca89fa9e155f229502edf458392829dd2342a214 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 3 Dec 2017 22:51:16 +0100 Subject: Fix rax, maybe (nw) --- src/mame/audio/rax.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mame/audio/rax.cpp b/src/mame/audio/rax.cpp index 617eae79a79..76453be8440 100644 --- a/src/mame/audio/rax.cpp +++ b/src/mame/audio/rax.cpp @@ -130,7 +130,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w ) { uint32_t src_dword = (adsp_rom[src_addr + 0] << 16) | (adsp_rom[src_addr + 1] << 8) | adsp_rom[src_addr + 2]; - addr_space->write_dword(m_control_regs[BDMA_INT_ADDR_REG] * 4, src_dword); + addr_space->write_dword(m_control_regs[BDMA_INT_ADDR_REG], src_dword); src_addr += 3; ++m_control_regs[BDMA_INT_ADDR_REG]; @@ -143,7 +143,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w ) { uint16_t src_word = (adsp_rom[src_addr + 0] << 8) | adsp_rom[src_addr + 1]; - addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG] * 2, src_word); + addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG], src_word); src_addr += 2; ++m_control_regs[BDMA_INT_ADDR_REG]; @@ -158,7 +158,7 @@ WRITE16_MEMBER( acclaim_rax_device::adsp_control_w ) { uint16_t src_word = adsp_rom[src_addr] << shift; - addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG] * 2, src_word); + addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG], src_word); ++src_addr; ++m_control_regs[BDMA_INT_ADDR_REG]; @@ -355,7 +355,7 @@ void acclaim_rax_device::adsp_irq(int which) for (uint32_t i = 0; i < count; i++) { - buffer[i] = m_data->read_word(reg * 2); + buffer[i] = m_data->read_word(reg); reg += m_incs[which]; } -- cgit v1.2.3-70-g09d2 From 40761c4c058600b6d00fef85ed572e3c410b2b72 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sun, 3 Dec 2017 23:00:33 +0100 Subject: e132xs: drc xm, cmp, add, stxx1, ldwr, stwr, branches, unconditional delayed branch, nw --- src/devices/cpu/e132xs/e132xs.h | 5 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 12 ++- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 179 +++++++++++++++++++++++++++---- src/devices/cpu/e132xs/e132xsfe.cpp | 4 +- 4 files changed, 175 insertions(+), 25 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 7a665032819..3a974b240f6 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -50,7 +50,7 @@ #define SINGLE_INSTRUCTION_MODE (1) -#define ENABLE_E132XS_DRC (1) +#define ENABLE_E132XS_DRC (0) //************************************************************************** // TYPE DEFINITIONS @@ -254,6 +254,7 @@ protected: uint64_t m_numcycles; + uint32_t m_prev_pc; uint32_t m_delay_pc; uint32_t m_delay_slot; @@ -511,7 +512,7 @@ private: template void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_br(drcuml_block *block, const opcode_desc *desc); + void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); template void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 944e9c9a723..8ba2f007022 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -85,10 +85,12 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } +/* static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } +*/ /*------------------------------------------------- ccfunc_total_cycles - compute the total number @@ -618,6 +620,14 @@ void hyperstone_device::generate_delay_slot_and_branch(drcuml_block *block, comp UML_MOV(block, mem(&m_branch_dest), DRC_PC); } + if (desc->delayslots) + { + /* compile the delay slot using temporary compiler state */ + assert(desc->delay.first() != nullptr); + generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); // + UML_MOV(block, mem(&m_branch_dest), DRC_PC); + } + /* update the cycles and jump through the hash table to the target */ if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { @@ -949,7 +959,7 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com case 0xf9: generate_b(block, compiler, desc); break; case 0xfa: generate_b(block, compiler, desc); break; case 0xfb: generate_b(block, compiler, desc); break; - case 0xfc: generate_br(block, desc); break; + case 0xfc: generate_br(block, compiler, desc); break; case 0xfd: generate_trap_op(block, compiler, desc); break; case 0xfe: generate_trap_op(block, compiler, desc); break; case 0xff: generate_trap_op(block, compiler, desc); break; diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 8cbd78c45f0..8160a9be58f 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -420,6 +420,89 @@ void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + const uint32_t next = READ_OP(desc->pc + 2); + const uint8_t sub_type = (next & 0x7000) >> 12; + + uint32_t extra_u = next & 0xfff; + if (next & 0x8000) + { + extra_u = ((extra_u & 0xfff) << 16) | READ_OP(desc->pc + 4); + UML_MOV(block, mem(&m_instruction_length), (3<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 4); + } + else + { + UML_MOV(block, mem(&m_instruction_length), (2<<19)); + UML_ADD(block, DRC_PC, DRC_PC, 2); + } + + UML_MOV(block, I1, extra_u); + + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_AND(block, I0, DRC_SR, C_MASK); + else + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + if ((SRC_GLOBAL && (src_code == SR_REGISTER)) || (DST_GLOBAL && (dst_code < 2))) + { + return; + } + + if (sub_type < 4) + { + UML_CMP(block, I0, I1); + int skip, done; + if (SRC_GLOBAL && (src_code == PC_REGISTER)) + { + UML_JMPc(block, uml::COND_B, skip = compiler->m_labelnum++); + UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0); + UML_JMP(block, done = compiler->m_labelnum++); + } + else + { + UML_JMPc(block, uml::COND_BE, skip = compiler->m_labelnum++); + UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0); + UML_JMP(block, done = compiler->m_labelnum++); + } + + UML_LABEL(block, skip); + UML_SHL(block, I5, I0, sub_type); + + UML_LABEL(block, done); + } + else + { + UML_SHL(block, I5, I0, sub_type - 4); + } + + if (DST_GLOBAL) + { + UML_STORE(block, (void *)m_global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I6, I3, dst_code); + UML_AND(block, I4, I6, 0x3f); + UML_STORE(block, (void *)m_local_regs, I6, I5, SIZE_DWORD, SCALE_x4); + } } @@ -434,9 +517,7 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi generate_check_delay_pc(block); if (!SRC_GLOBAL || !DST_GLOBAL) - { UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - } if (SRC_GLOBAL) { @@ -583,28 +664,12 @@ void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compil UML_AND(block, I6, I4, I5); UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'2'); - UML_DSHR(block, mem(&m_drc_arg1), I0, 32); - UML_CALLC(block, cfunc_print, this); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'0'); - UML_MOV(block, mem(&m_drc_arg1), I0); - UML_CALLC(block, cfunc_print, this); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'3'); - UML_DSHR(block, mem(&m_drc_arg1), I1, 32); - UML_CALLC(block, cfunc_print, this); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'1'); - UML_MOV(block, mem(&m_drc_arg1), I1); - UML_CALLC(block, cfunc_print, this); - UML_CMP(block, I1, I0); UML_SETc(block, uml::COND_B, I3); UML_ROLINS(block, DRC_SR, I3, C_SHIFT, C_MASK); UML_CMP(block, I1, I0); UML_SETc(block, uml::COND_E, I4); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'4'); - UML_MOV(block, mem(&m_drc_arg1), I4); - UML_CALLC(block, cfunc_print, this); UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK); UML_CMP(block, I1, I0); @@ -678,6 +743,72 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + if (DST_GLOBAL) + { + UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + UML_DADD(block, I2, I0, I1); + + UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); + + UML_DTEST(block, I2, 0x100000000U); + UML_SETc(block, uml::COND_NZ, I4); + UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); + + UML_XOR(block, I4, I0, I2); + UML_XOR(block, I5, I1, I2); + UML_AND(block, I6, I4, I5); + UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); + + UML_ADD(block, I2, I0, I1); + + UML_TEST(block, I2, ~0); + UML_SETc(block, uml::COND_Z, I4); + UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I2, 3, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I2); + generate_set_global_register(block, compiler, desc); + + if (dst_code == 0) + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + } + else + { + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); + } } @@ -1561,7 +1692,7 @@ void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler int skip; UML_TEST(block, DRC_SR, condition_masks[CONDITION]); UML_JMPc(block, condition, skip = compiler->m_labelnum++); - generate_br(block, desc); + generate_br(block, compiler, desc); UML_JMP(block, done); @@ -1573,7 +1704,7 @@ void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler } -void hyperstone_device::generate_br(drcuml_block *block, const opcode_desc *desc) +void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { generate_decode_pcrel(block, desc); generate_check_delay_pc(block); @@ -1581,6 +1712,7 @@ void hyperstone_device::generate_br(drcuml_block *block, const opcode_desc *desc UML_ADD(block, DRC_PC, DRC_PC, I1); UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + generate_delay_slot_and_branch(block, compiler, desc); // TODO: correct cycle count } @@ -1593,6 +1725,13 @@ void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compile void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + generate_decode_pcrel(block, desc); + generate_check_delay_pc(block); + + UML_MOV(block, mem(&m_delay_slot), 1); + UML_ADD(block, mem(&m_delay_pc), DRC_PC, I1); + UML_MOV(block, mem(&m_intblock), 3); + generate_delay_slot_and_branch(block, compiler, desc); } diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index 81129a56460..7532e871c7e 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -1249,12 +1249,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) desc.regin[0] |= SR_CODE; - desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; desc.delayslots = 1; break; case 0xec: // dbr - could be 4 bytes (pcrel) - desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; desc.delayslots = 1; break; -- cgit v1.2.3-70-g09d2 From fe34cfe9f2b7f85366573405f9e4263508628bc3 Mon Sep 17 00:00:00 2001 From: smf- Date: Sat, 2 Dec 2017 21:52:50 +0000 Subject: added missing emu.h (nw) --- src/devices/cpu/e132xs/e132xsdrc.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 8ba2f007022..5e51771e91f 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -1,6 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz +#include "emu.h" #include "e132xs.h" #include "e132xsfe.h" #include "32xsdefs.h" -- cgit v1.2.3-70-g09d2 From b65ef3abfdf70bb2cfad0041877af870169319f1 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Mon, 4 Dec 2017 00:32:39 +0200 Subject: new NOT_WORKING clone --------------------- Death Crimson OX (Rev A) [Jorge Valero, ClawGrip, DU] --- src/mame/drivers/naomi.cpp | 83 +++++++++++++++++++++++++++++----------------- src/mame/mame.lst | 3 +- 2 files changed, 55 insertions(+), 31 deletions(-) diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp index 75dbbca1870..ed210008ce4 100644 --- a/src/mame/drivers/naomi.cpp +++ b/src/mame/drivers/naomi.cpp @@ -387,6 +387,7 @@ Dead Or Alive 2 (Rev A) 841-0003C 22121A 21 (64Mb) Dead Or Alive 2 841-0003C-01 22207 21 (64Mb) present 315-6213 317-5048-COM have unlocked Tag and Survival game modes, possible USA or international release Dead Or Alive 2 Millennium 841-0003C DOA2 Ver.M 21 (64Mb) present 315-6213 317-5048-COM joystick + 3 buttons Death Crimson OX 841-0016C 23524 10 (64Mb) present 315-6213 317-5066-COM +Death Crimson OX 841-0016C 23524A 10 (64Mb) present 315-6213 317-5066-COM cart case had no revision label Dengen Tenshi Taisen Janshi Shangri-La 841-0004C 22060 12 (64Mb) ? 315-6213 317-5050-JPN Derby Owners Club (Japan) (Rev B) 840-0016C 22099B 14 (64Mb) ? 315-6213 317-0262-JPN touch panel + 2 buttons + card reader Derby Owners Club 2000 Ver.2 (Japan) (Rev A) 840-0052C 22284A 16 (64Mb) present 315-6213 not present @@ -3481,7 +3482,7 @@ EXP: DEATH CRIMSON OX */ -ROM_START( deathcox ) +ROM_START( deathcoxo ) NAOMI_BIOS NAOMI_DEFAULT_EEPROM @@ -3502,6 +3503,27 @@ ROM_START( deathcox ) ROM_PARAMETER( ":rom_board:segam2crypt:key", "000b64d0" ) ROM_END +ROM_START( deathcox ) + NAOMI_BIOS + NAOMI_DEFAULT_EEPROM + + ROM_REGION( 0x5800000, "rom_board", ROMREGION_ERASEFF) + ROM_LOAD("epr-23524a.ic22",0x0000000, 0x0400000, CRC(b60e113e) SHA1(4d3a8dcd68addd0776ac9774974fb261a5fe76b8) ) + ROM_LOAD("mpr-23514.ic1", 0x0800000, 0x0800000, CRC(1f2b090e) SHA1(f2863d306512112cd3025c9ce3300ac0a396ee2d) ) + ROM_LOAD("mpr-23515.ic2", 0x1000000, 0x0800000, CRC(dc8557eb) SHA1(855bf4a8a7a7184a64a60d30efd505eb1181d8c6) ) + ROM_LOAD("mpr-23516.ic3", 0x1800000, 0x0800000, CRC(94494cbb) SHA1(fc977c77fa424541573c5cac28dac013d3354754) ) + ROM_LOAD("mpr-23517.ic4", 0x2000000, 0x0800000, CRC(69ba6a41) SHA1(1d5528f7d3f8721492db966ec041966192bebdf8) ) + ROM_LOAD("mpr-23518.ic5", 0x2800000, 0x0800000, CRC(49882766) SHA1(f6a7a7039dc251e02d69d4c95130102dfbb25fc9) ) + ROM_LOAD("mpr-23519.ic6", 0x3000000, 0x0800000, CRC(cdc82805) SHA1(947cdcdc16fc61ba4ca1258d170483b3decdacf2) ) + ROM_LOAD("mpr-23520.ic7", 0x3800000, 0x0800000, CRC(1a268360) SHA1(b35dab00e4e656f13fcad92bebd2c256c1965f54) ) + ROM_LOAD("mpr-23521.ic8", 0x4000000, 0x0800000, CRC(cf8674b8) SHA1(bdd2a0ef98138021707b3dd06b1d9855308ed3ec) ) + ROM_LOAD("mpr-23522.ic9", 0x4800000, 0x0800000, CRC(7ae6716e) SHA1(658b794ae6e3898885524582a207faa1076a65ca) ) + ROM_LOAD("mpr-23523.ic10",0x5000000, 0x0800000, CRC(c91efb67) SHA1(3d79870551310da7a641858ffec3840714e9cc22) ) + + // 841-0016 2000 317-5066-COM Naomi + ROM_PARAMETER( ":rom_board:segam2crypt:key", "000b64d0" ) +ROM_END + /* SYSTEMID: NAOMI @@ -10267,35 +10289,36 @@ ROM_END /* none */ GAME( 2003, clubk2kp, clubk2k3,naomi2m2, naomi, naomi2_state, naomi2, ROT0, "Sega", "Club Kart: European Session (2003, prototype)", GAME_FLAGS ) /* 841-xxxxx ("Licensed by Sega" Naomi cart games)*/ -/* 0001 */ GAME( 1999, pstone, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Power Stone", GAME_FLAGS ) -/* 0002 */ GAME( 1999, suchie3, naomi, naomim2, suchie3, naomi_state,naomi_mp,ROT0, "Jaleco", "Idol Janshi Suchie-Pai 3 (Japan)", MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_SOUND ) -/* 0003 */ GAME( 1999, doa2a, doa2m, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2 (Rev A)", GAME_FLAGS ) -/* 0003-01 */ GAME( 1999, doa2, doa2m, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2", GAME_FLAGS ) -/* 0003 */ GAME( 2000, doa2m, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2 Millennium", GAME_FLAGS ) -/* 0004 */ GAME( 1999, shangril, naomi, naomim2, naomi_mp,naomi_state,naomi_mp,ROT0, "Marvelous Ent.", "Dengen Tenshi Taisen Janshi Shangri-la", GAME_FLAGS ) // (Build 0728) version shown in service mode -/* 0005 */ GAME( 1999, spawn, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Todd Mc Farlane / Capcom","Spawn In the Demon's Hand (Rev B)", GAME_FLAGS ) -/* 0006 */ GAME( 1999, puyoda, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Compile", "Puyo Puyo Da! (Japan)", GAME_FLAGS ) -/* 0007-01 */ GAME( 2000, mvsc2u, mvsc2, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / Marvel", "Marvel Vs. Capcom 2 New Age of Heroes (USA, Rev A)", GAME_FLAGS) -/* 0007-02 -03 */GAME( 2000, mvsc2, naomi, naomim1, naomi, naomi_state, naomi, ROT0, "Capcom / Marvel", "Marvel Vs. Capcom 2 New Age of Heroes (Export, Korea, Rev A)", GAME_FLAGS) -/* 0008 */ GAME( 2000, pstone2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Power Stone 2", GAME_FLAGS ) -/* 0011 */ GAME( 2000, capsnk, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (Rev C)", GAME_FLAGS ) -/* 0011 */ GAME( 2000, capsnka, capsnk,naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (Rev A)", GAME_FLAGS ) -/* 0011 */ GAME( 2000, capsnkb, capsnk,naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000", GAME_FLAGS ) -/* 0012 -01 */ GAME( 2000, cspike, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Psikyo / Capcom", "Cannon Spike / Gun Spike", GAME_FLAGS ) -/* 0013 */ GAME( 2000, ggx, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Arc System Works","Guilty Gear X", GAME_FLAGS ) -/* 0014 */ GAME( 2000, gwing2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Takumi / Capcom", "Giga Wing 2", GAME_FLAGS ) -/* 0015 */ GAME( 2000, pjustic, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Project Justice / Moero! Justice Gakuen (Rev A)", GAME_FLAGS ) -/* 0016 */ GAME( 2000, deathcox, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Ecole Software", "Death Crimson OX", GAME_FLAGS ) -/* 0017 */ GAME( 2001, gundmct, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Banpresto / Capcom","Mobile Suit Gundam: Federation Vs. Zeon", GAME_FLAGS ) -/* 0020 */ GAME( 2001, zerogu2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Psikyo", "Zero Gunner 2", GAME_FLAGS ) -/* 0057 */ GAME( 2007, sl2007, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"Triangle Service","Shooting Love 2007 (Japan)", GAME_FLAGS ) -/* 0058 */ GAME( 2008, ausfache, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Subtle Style", "Akatsuki Blitzkampf Ausf. Achse (Japan)", GAME_FLAGS ) -/* 0059 */ GAME( 2008, illvelo, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"Milestone", "Illvelo (Illmatic Envelope) (Japan)", GAME_FLAGS ) -/* 0060 */ GAME( 2008, mamonoro, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"G.Rev", "Mamoru-kun wa Norowarete Shimatta! (Japan)", GAME_FLAGS ) -/* 0061 */ GAME( 2008, mbaao, mbaa, naomim4, naomi, naomi_state, naomi, ROT0, "Type-Moon/Ecole", "Melty Blood Actress Again (Japan)", GAME_FLAGS ) -/* 0061 */ GAME( 2008, mbaa, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Type-Moon/Ecole", "Melty Blood Actress Again Version A (Japan, Rev A)", GAME_FLAGS ) -/* 0062 */ GAME( 2009, radirgyn, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Milestone/Lucky", "Radirgy Noa (Japan)", GAME_FLAGS ) -/* HMG016007 */ GAME( 2001, hmgeo, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Heavy Metal Geomatrix (Rev B)", GAME_FLAGS ) +/* 0001 */ GAME( 1999, pstone, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Power Stone", GAME_FLAGS ) +/* 0002 */ GAME( 1999, suchie3, naomi, naomim2, suchie3, naomi_state,naomi_mp,ROT0, "Jaleco", "Idol Janshi Suchie-Pai 3 (Japan)", MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_SOUND ) +/* 0003 */ GAME( 1999, doa2a, doa2m, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2 (Rev A)", GAME_FLAGS ) +/* 0003-01 */ GAME( 1999, doa2, doa2m, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2", GAME_FLAGS ) +/* 0003 */ GAME( 2000, doa2m, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Tecmo", "Dead or Alive 2 Millennium", GAME_FLAGS ) +/* 0004 */ GAME( 1999, shangril, naomi, naomim2, naomi_mp,naomi_state,naomi_mp,ROT0, "Marvelous Ent.", "Dengen Tenshi Taisen Janshi Shangri-la", GAME_FLAGS ) // (Build 0728) version shown in service mode +/* 0005 */ GAME( 1999, spawn, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Todd Mc Farlane / Capcom","Spawn In the Demon's Hand (Rev B)", GAME_FLAGS ) +/* 0006 */ GAME( 1999, puyoda, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Compile", "Puyo Puyo Da! (Japan)", GAME_FLAGS ) +/* 0007-01 */ GAME( 2000, mvsc2u, mvsc2, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / Marvel", "Marvel Vs. Capcom 2 New Age of Heroes (USA, Rev A)", GAME_FLAGS) +/* 0007-02 -03 */GAME( 2000, mvsc2, naomi, naomim1, naomi, naomi_state, naomi, ROT0, "Capcom / Marvel", "Marvel Vs. Capcom 2 New Age of Heroes (Export, Korea, Rev A)", GAME_FLAGS) +/* 0008 */ GAME( 2000, pstone2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Power Stone 2", GAME_FLAGS ) +/* 0011 */ GAME( 2000, capsnk, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (Rev C)", GAME_FLAGS ) +/* 0011 */ GAME( 2000, capsnka, capsnk, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000 (Rev A)", GAME_FLAGS ) +/* 0011 */ GAME( 2000, capsnkb, capsnk, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom / SNK", "Capcom Vs. SNK Millennium Fight 2000", GAME_FLAGS ) +/* 0012 -01 */ GAME( 2000, cspike, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Psikyo / Capcom", "Cannon Spike / Gun Spike", GAME_FLAGS ) +/* 0013 */ GAME( 2000, ggx, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Arc System Works","Guilty Gear X", GAME_FLAGS ) +/* 0014 */ GAME( 2000, gwing2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Takumi / Capcom", "Giga Wing 2", GAME_FLAGS ) +/* 0015 */ GAME( 2000, pjustic, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Project Justice / Moero! Justice Gakuen (Rev A)", GAME_FLAGS ) +/* 0016 */ GAME( 2000, deathcoxo, deathcox, naomim2, naomi, naomi_state, naomi, ROT0, "Ecole Software", "Death Crimson OX", GAME_FLAGS ) +/* 0016 */ GAME( 2000, deathcox, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Ecole Software", "Death Crimson OX (Rev A)", GAME_FLAGS ) +/* 0017 */ GAME( 2001, gundmct, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Banpresto / Capcom","Mobile Suit Gundam: Federation Vs. Zeon", GAME_FLAGS ) +/* 0020 */ GAME( 2001, zerogu2, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Psikyo", "Zero Gunner 2", GAME_FLAGS ) +/* 0057 */ GAME( 2007, sl2007, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"Triangle Service","Shooting Love 2007 (Japan)", GAME_FLAGS ) +/* 0058 */ GAME( 2008, ausfache, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Subtle Style", "Akatsuki Blitzkampf Ausf. Achse (Japan)", GAME_FLAGS ) +/* 0059 */ GAME( 2008, illvelo, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"Milestone", "Illvelo (Illmatic Envelope) (Japan)", GAME_FLAGS ) +/* 0060 */ GAME( 2008, mamonoro, naomi, naomim4, naomi, naomi_state, naomi, ROT270,"G.Rev", "Mamoru-kun wa Norowarete Shimatta! (Japan)", GAME_FLAGS ) +/* 0061 */ GAME( 2008, mbaao, mbaa, naomim4, naomi, naomi_state, naomi, ROT0, "Type-Moon/Ecole", "Melty Blood Actress Again (Japan)", GAME_FLAGS ) +/* 0061 */ GAME( 2008, mbaa, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Type-Moon/Ecole", "Melty Blood Actress Again Version A (Japan, Rev A)", GAME_FLAGS ) +/* 0062 */ GAME( 2009, radirgyn, naomi, naomim4, naomi, naomi_state, naomi, ROT0, "Milestone/Lucky", "Radirgy Noa (Japan)", GAME_FLAGS ) +/* HMG016007 */ GAME( 2001, hmgeo, naomi, naomim2, naomi, naomi_state, naomi, ROT0, "Capcom", "Heavy Metal Geomatrix (Rev B)", GAME_FLAGS ) /* Cart games on Namco custom ROM board for game descriptions below NAMCO region codes decoded as such (same as in older NAMCO hardware): diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 669f0cb33a4..05d54073dd6 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -28897,7 +28897,8 @@ cspike // 2000.10 Gun Spike / Cannon Spike cvs2mf // 2001.07.05 Capcom Vs. SNK 2 Millionaire Fighting 2001 (Rev A) cvs2 // 2001.08.04 Capcom Vs. SNK 2 Mark Of The Millennium 2001 cvsgd // 2001.05 Capcom Vs. SNK Millennium Fight 2000 Pro -deathcox // 2000.10 Death Crimson OX +deathcoxo // 2000.10 Death Crimson OX +deathcox // 2000.10 Death Crimson OX (Rev A) demofist // 2003.06 Demolish Fist derbyo2k // 2000.06 Derby Owners Club 2000 Ver.2 (Japan) (Rev A) derbyoc // 1999.10 Derby Owners Club (Japan) (Rev B) -- cgit v1.2.3-70-g09d2 From 61b747810d98e442f5ce597dec3d4c9aaea10910 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sun, 3 Dec 2017 23:40:31 +0100 Subject: e132xs: fix drc ret opcode, nw --- src/devices/cpu/e132xs/e132xsdrc.cpp | 2 - src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 100 +++++++++++++++++++++++++++++-- 2 files changed, 96 insertions(+), 6 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 5e51771e91f..11ce21cb77c 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -86,12 +86,10 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } -/* static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } -*/ /*------------------------------------------------- ccfunc_total_cycles - compute the total number diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 8160a9be58f..fe3ed4312cf 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -275,9 +275,29 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi } UML_AND(block, I1, DRC_SR, (S_MASK | L_MASK)); - UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - UML_LOAD(block, I3, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + if (SRC_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + UML_LOAD(block, I3, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); + UML_ADD(block, I3, I2, src_code); + UML_AND(block, I4, I3, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + + UML_ADD(block, I6, I2, srcf_code); + UML_AND(block, I5, I6, 0x3f); + UML_LOAD(block, I3, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); + } + UML_AND(block, DRC_PC, I2, ~1); + + UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'0'); + UML_MOV(block, mem(&m_drc_arg1), I2); + UML_CALLC(block, cfunc_print, this); + UML_AND(block, DRC_SR, I3, 0xffe3ffff); UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK); @@ -318,10 +338,10 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi UML_SEXT(block, I3, I3, SIZE_BYTE); UML_LABEL(block, diff_in_range); - int pop_next; + int pop_next, done_ret; UML_LABEL(block, pop_next = compiler->m_labelnum++); UML_CMP(block, I3, 0); - UML_JMPc(block, uml::COND_GE, done); + UML_JMPc(block, uml::COND_GE, done_ret = compiler->m_labelnum++); UML_SUB(block, I0, I0, 4); UML_CALLH(block, *m_mem_read32); UML_ROLAND(block, I2, I0, 30, 0x3f); @@ -329,6 +349,9 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi UML_ADD(block, I3, I3, 1); UML_TEST(block, I3, ~0); UML_JMP(block, pop_next); + + UML_LABEL(block, done_ret); + generate_delay_slot_and_branch(block, compiler, desc); } else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR { @@ -833,6 +856,75 @@ void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + generate_check_delay_pc(block); + + if (!SRC_GLOBAL || !DST_GLOBAL) + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + UML_DMOV(block, I0, 0); + UML_DMOV(block, I1, 0); + + if (SRC_GLOBAL) + { + UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + if (DST_GLOBAL) + { + UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + } + + UML_DSUB(block, I2, I1, I0); + + UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); + + UML_DTEST(block, I2, 0x100000000U); + UML_SETc(block, uml::COND_NZ, I4); + UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); + + UML_XOR(block, I4, I0, I2); + UML_XOR(block, I5, I1, I2); + UML_AND(block, I6, I4, I5); + UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); + + UML_SUB(block, I2, I1, I0); + + UML_TEST(block, I2, ~0); + UML_SETc(block, uml::COND_Z, I4); + UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I2, 3, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I2); + generate_set_global_register(block, compiler, desc); + + if (dst_code == 0) + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + } + else + { + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); + } } -- cgit v1.2.3-70-g09d2 From 0425c93e010dfeca9a79de9ad986cda79692f8b3 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 4 Dec 2017 00:22:27 +0100 Subject: New working machines ----------- Space Harrier II (Tiger handheld) [hap, Sean Riddle] --- src/mame/drivers/hh_sm510.cpp | 109 ++++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 110 insertions(+) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index 1879f7801e7..6446801089f 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -7,6 +7,9 @@ List of child drivers: - rzone: Tiger R-Zone + The LCD screen graphics are provided internally with an SVG file. + MAME external artwork is recommended for the backgrounds inlays. + TODO: - improve LCD segments in SVGs for: gnw_mc25, gnw_eg26, exospace - confirm gnw_mc25/gnw_eg26 rom (dumped from Soviet clone, but pretty confident that it's same) @@ -1875,6 +1878,10 @@ MACHINE_CONFIG_END * Sharp SM510 under epoxy (die label M88) * lcd screen with custom segments, 1-bit sound + known releases: + - World: Altered Beast + - Japan: Juuouki (published by Sega) + ***************************************************************************/ class taltbeast_state : public hh_sm510_state @@ -1961,6 +1968,98 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Space Harrier II + * Sharp SM510 under epoxy (die label M91) + * lcd screen with custom segments, 1-bit sound + + known releases: + - World: Space Harrier II + - Japan: Space Harrier (published by Sega) + +***************************************************************************/ + +class tsharr2_state : public hh_sm510_state +{ +public: + tsharr2_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 5; + m_inp_fixed = 5; + } +}; + +// config + +static INPUT_PORTS_START( tsharr2 ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Attack + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Max Score") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tsharr2 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_R_DIRECT_CONTROL(true) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1493, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1493-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Swamp Thing @@ -2615,6 +2714,15 @@ ROM_START( taltbeast ) ROM_END +ROM_START( tsharr2 ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "m91", 0x0000, 0x1000, CRC(b207ac79) SHA1(9889dfec26089313ba2bdac845a75a26742d09e1) ) + + ROM_REGION( 516897, "svg", 0) + ROM_LOAD( "tsharr2.svg", 0, 516897, CRC(f2d103e4) SHA1(a218b7f51edc2a1e9093ca4930c812e859d997bd) ) +ROM_END + + ROM_START( tswampt ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "mb0", 0x0000, 0x1000, CRC(8433530c) SHA1(60716d3bba92dc8ac3f1ee29c5734c9e894a1aff) ) @@ -2686,6 +2794,7 @@ CONS( 1988, tgaunt, 0, 0, tgaunt, tgaunt, tgaunt_state, 0, "T CONS( 1988, tddragon, 0, 0, tddragon, tddragon, tddragon_state, 0, "Tiger Electronics (licensed from Tradewest/Technos)", "Double Dragon (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1989, tbatman, 0, 0, tbatman, tbatman, tbatman_state, 0, "Tiger Electronics", "Batman (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1990, tsharr2, 0, 0, tsharr2, tsharr2, tsharr2_state, 0, "Tiger Electronics (licensed from Sega)", "Space Harrier II (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tswampt, 0, 0, tswampt, tswampt, tswampt_state, 0, "Tiger Electronics", "Swamp Thing (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tsonic, 0, 0, tsonic, tsonic, tsonic_state, 0, "Tiger Electronics (licensed from Sega)", "Sonic The Hedgehog (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1996, tsjam, 0, 0, tsjam, tsjam, tsjam_state, 0, "Tiger Electronics", "Space Jam (handheld)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 05d54073dd6..e360c9f545e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14709,6 +14709,7 @@ tbatman // Tiger tddragon // Tiger tgaunt // Tiger tjdredd // Tiger +tsharr2 // Tiger tsjam // Tiger tsonic // Tiger tswampt // Tiger -- cgit v1.2.3-70-g09d2 From 13dc842471b5c044cc043d818f0cfc332ed8e9fb Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 4 Dec 2017 03:55:28 +0100 Subject: New working machines ----------- Fonas 3 in 1 [hap, Sean Riddle] Vulcan XL 25 [hap, Sean Riddle] --- src/mame/drivers/hh_tms1k.cpp | 107 +++++++++++++++++---------- src/mame/layout/f3in1.lay | 72 ++++++++++++++++++ src/mame/layout/xl25.lay | 167 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 308 insertions(+), 38 deletions(-) create mode 100644 src/mame/layout/f3in1.lay create mode 100644 src/mame/layout/xl25.lay diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index 82f501050c5..89c6af6bd94 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -188,6 +188,7 @@ #include "esbattle.lh" #include "esoccer.lh" #include "f2pbball.lh" +#include "f3in1.lh" #include "fxmcr165.lh" // clickable #include "gjackpot.lh" #include "gpoker.lh" @@ -217,6 +218,7 @@ #include "tc4.lh" #include "tcfball.lh" #include "tcfballa.lh" +#include "xl25.lh" // clickable #include "zodiac.lh" #include "hh_tms1k_test.lh" // common test-layout - use external artwork @@ -3980,6 +3982,12 @@ public: DECLARE_WRITE16_MEMBER(write_r); DECLARE_WRITE16_MEMBER(write_o); DECLARE_READ8_MEMBER(read_k); + + void set_clock(); + DECLARE_INPUT_CHANGED_MEMBER(skill_switch); + +protected: + virtual void machine_reset() override; }; // handlers @@ -4022,9 +4030,9 @@ READ8_MEMBER(f3in1_state::read_k) static INPUT_PORTS_START( f3in1 ) PORT_START("IN.0") // R0 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) // P - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // K - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) // D + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P Button") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("K Button") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("D Button") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.1") // R1 @@ -4043,19 +4051,40 @@ static INPUT_PORTS_START( f3in1 ) PORT_CONFSETTING( 0x02, "Football" ) PORT_CONFSETTING( 0x04, "Basketball" ) PORT_CONFSETTING( 0x08, "Soccer" ) + + PORT_START("IN.4") // fake + PORT_CONFNAME( 0x01, 0x00, DEF_STR( Difficulty ) ) PORT_CHANGED_MEMBER(DEVICE_SELF, f3in1_state, skill_switch, nullptr) + PORT_CONFSETTING( 0x00, "Regular" ) // REG + PORT_CONFSETTING( 0x01, "Professional" ) // PROF INPUT_PORTS_END +INPUT_CHANGED_MEMBER(f3in1_state::skill_switch) +{ + set_clock(); +} + +void f3in1_state::set_clock() +{ + // MCU clock is from an RC circuit where C=47pF, R=39K(PROF) or 56K(REG) + m_maincpu->set_unscaled_clock((m_inp_matrix[4]->read() & 1) ? 400000 : 300000); +} + +void f3in1_state::machine_reset() +{ + hh_tms1k_state::machine_reset(); + set_clock(); +} + static MACHINE_CONFIG_START( f3in1 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", TMS1100, 325000) // see set_clock ---TODO + MCFG_CPU_ADD("maincpu", TMS1100, 300000) // see set_clock MCFG_TMS1XXX_READ_K_CB(READ8(f3in1_state, read_k)) MCFG_TMS1XXX_WRITE_R_CB(WRITE16(f3in1_state, write_r)) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(f3in1_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) - //MCFG_DEFAULT_LAYOUT(layout_f3in1) - MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) + MCFG_DEFAULT_LAYOUT(layout_f3in1) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") @@ -8790,6 +8819,9 @@ MACHINE_CONFIG_END * TMS1000SLC MP4486A (die label 1000C/, MP4486A) * 28 LEDs, 1-bit sound + This game is the same logic puzzle as Tiger's Lights Out, except that + all 25 lights need to be turned on instead of off. + ***************************************************************************/ class xl25_state : public hh_tms1k_state @@ -8858,63 +8890,63 @@ READ8_MEMBER(xl25_state::read_k) static INPUT_PORTS_START( xl25 ) PORT_START("IN.0") // R0 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 1") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 6") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 11") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.1") // R1 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 2") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 7") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 12") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.2") // R2 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 3") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 8") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 13") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // R3 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Q) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_W) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_E) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 4") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 9") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 14") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.4") // R4 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_R) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_T) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Y) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 5") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 10") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 15") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.5") // R5 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_U) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_I) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_O) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 16") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 21") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_NAME("Store / Recall") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.6") // R6 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_A) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_S) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_D) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 17") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 22") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_NAME("Cross / Knight / Score") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.7") // R7 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_F) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_G) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_H) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 18") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 23") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_NAME("Clear") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.8") // R8 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_J) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_K) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_L) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 19") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 24") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_NAME("Random") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.9") // R9 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_Z) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_X) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_C) PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 20") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("Square 25") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_NAME("Sound") PORT_CHANGED_MEMBER(DEVICE_SELF, xl25_state, k4_button, nullptr) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) INPUT_PORTS_END @@ -8938,8 +8970,7 @@ static MACHINE_CONFIG_START( xl25 ) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(xl25_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) - //MCFG_DEFAULT_LAYOUT(layout_xl25) - MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) + MCFG_DEFAULT_LAYOUT(layout_xl25) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") diff --git a/src/mame/layout/f3in1.lay b/src/mame/layout/f3in1.lay new file mode 100644 index 00000000000..dea14a21528 --- /dev/null +++ b/src/mame/layout/f3in1.lay @@ -0,0 +1,72 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/xl25.lay b/src/mame/layout/xl25.lay new file mode 100644 index 00000000000..4355e1e189f --- /dev/null +++ b/src/mame/layout/xl25.lay @@ -0,0 +1,167 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3-70-g09d2 From 05008fc515dbcd526e25012d80af21e5c4e00791 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Mon, 4 Dec 2017 00:03:29 -0300 Subject: Aristocrat MK5: Code consistency. --- src/mame/drivers/aristmk5.cpp | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 0dd6629c3db..65283d6f2e6 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -498,7 +498,7 @@ WRITE8_MEMBER(aristmk5_state::spi_mux_w) break; case 2: // Mechanical meters - for(int i=0; i<4; i++) + for(int i = 0; i < 4; i++) output().set_lamp_value(32 + i, BIT(m_spi_data[m_spi_mux], 1 + i)); // Tower Lamps break; @@ -507,7 +507,7 @@ WRITE8_MEMBER(aristmk5_state::spi_mux_w) break; case 5: // Door outputs - for(int i=0; i<32; i++) + for(int i = 0; i < 32; i++) output().set_lamp_value(i, BIT(m_spi_data[m_spi_mux], i)); break; @@ -818,19 +818,19 @@ WRITE8_MEMBER(aristmk5_state::sram_banksel_w) WRITE8_MEMBER(aristmk5_state::buttons_lamps_w) { - for(int i=0; i<8; i++) + for(int i = 0; i < 8; i++) output().set_lamp_value((offset >> 2) * 8 + i, BIT(data, i)); } WRITE8_MEMBER(aristmk5_state::other_lamps_w) { - for(int i=0; i<8; i++) + for(int i = 0; i < 8; i++) output().set_lamp_value(16 + i, BIT(data, i)); } WRITE8_MEMBER(aristmk5_state::bill_acceptor_lamps_w) { - for(int i=0; i<8; i++) + for(int i = 0; i < 8; i++) output().set_lamp_value(24 + i, BIT(data, i)); } @@ -1743,7 +1743,7 @@ DRIVER_INIT_MEMBER(aristmk5_state,aristmk5) int size = memregion("game_prg")->bytes(); int found = 0; - for (int i = 0;i < (size / 4) - 4;i++) + for (int i = 0; i < (size / 4) - 4; i++) { if (((ROM[i + 0] & 0xfffff000) == 0xe59f1000) && (ROM[i + 1] == 0xe3a03000) && @@ -1784,7 +1784,7 @@ DRIVER_INIT_MEMBER(aristmk5_state,aristmk5) // the checksum is a simple 32-bit sum with the dword containing the checksum skipped (and the dword after it for no obvious reason!) uint32_t calculatedchecksum = 0; - for (int i = actual / 4; i < actual2 / 4;i++) + for (int i = actual / 4; i < actual2 / 4; i++) { if ((i < (actual3 / 4)) || (i > (actual4 / 4))) @@ -1813,7 +1813,7 @@ DRIVER_INIT_MEMBER(aristmk5_state,aristmk5) // almost always just the end of the roms int realend = 0; - for (int i = size - 1; i >= actual2 / 4;i--) + for (int i = size - 1; i >= actual2 / 4; i--) { if ((ROM[i] != 0xffffffff) && (ROM[i] != 0x00000000)) { @@ -1825,7 +1825,7 @@ DRIVER_INIT_MEMBER(aristmk5_state,aristmk5) int realend2 = 0; - for (int i = realend - 4; i >= actual2 / 4;i--) + for (int i = realend - 4; i >= actual2 / 4; i--) { if ((ROM[i] != 0xffffffff) && (ROM[i] != 0x00000000)) { @@ -1889,9 +1889,9 @@ void aristmk5_state::machine_reset() PRG = memregion(rom_region[op_mode & 7])->base(); - if(PRG!=nullptr) + if(PRG != nullptr) - for(i=0;i<0x400000;i++) + for(i = 0; i < 0x400000; i++) ROM[i] = PRG[i]; } -- cgit v1.2.3-70-g09d2 From bbe91a860f3c3be1cb2807cdfbc21e342fa4f836 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 4 Dec 2017 04:04:22 +0100 Subject: arcade.lua: rax device should be in shared.a (nw) --- scripts/target/mame/arcade.lua | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index f0cf97fdb6d..a7302aaf31e 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -887,6 +887,8 @@ files { MAME_DIR .. "src/mame/audio/decobsmt.h", MAME_DIR .. "src/mame/audio/efo_zsu.cpp", MAME_DIR .. "src/mame/audio/efo_zsu.h", + MAME_DIR .. "src/mame/audio/rax.cpp", + MAME_DIR .. "src/mame/audio/rax.h", MAME_DIR .. "src/mame/audio/segam1audio.cpp", MAME_DIR .. "src/mame/audio/segam1audio.h", } @@ -4683,8 +4685,6 @@ files { MAME_DIR .. "src/mame/drivers/pse.cpp", MAME_DIR .. "src/mame/drivers/quizo.cpp", MAME_DIR .. "src/mame/drivers/quizpun2.cpp", - MAME_DIR .. "src/mame/audio/rax.cpp", - MAME_DIR .. "src/mame/audio/rax.h", MAME_DIR .. "src/mame/drivers/rbmk.cpp", MAME_DIR .. "src/mame/drivers/rcorsair.cpp", MAME_DIR .. "src/mame/drivers/re900.cpp", -- cgit v1.2.3-70-g09d2 From d2cf479a165d5481b7b444aafa206a898da32aef Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Mon, 4 Dec 2017 00:06:49 -0300 Subject: Case... (nw) --- src/mame/drivers/murogmbl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/murogmbl.cpp b/src/mame/drivers/murogmbl.cpp index 931edbc6ae7..b94bb13b192 100644 --- a/src/mame/drivers/murogmbl.cpp +++ b/src/mame/drivers/murogmbl.cpp @@ -93,7 +93,7 @@ PALETTE_INIT_MEMBER(murogmbl_state, murogmbl) } static ADDRESS_MAP_START( murogmbl_map, AS_PROGRAM, 8, murogmbl_state ) - AM_RANGE(0x0000, 0x1fFf) AM_ROM + AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x4000, 0x43ff) AM_RAM AM_RANGE(0x4800, 0x4bff) AM_RAM AM_RANGE(0x5800, 0x5bff) AM_RAM AM_SHARE("video") -- cgit v1.2.3-70-g09d2 From 77997779020f2ab353d76740cf50844e724c2234 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 4 Dec 2017 07:27:05 +0100 Subject: Fix linking on linux (nw) --- scripts/target/mame/arcade.lua | 2 -- scripts/target/mame/mess.lua | 13 +++++++++---- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index a7302aaf31e..14acc5ef40a 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -3359,8 +3359,6 @@ files { MAME_DIR .. "src/mame/video/sega16sp.h", MAME_DIR .. "src/mame/video/segaic24.cpp", MAME_DIR .. "src/mame/video/segaic24.h", - MAME_DIR .. "src/mame/machine/gdrom.cpp", - MAME_DIR .. "src/mame/machine/gdrom.h", MAME_DIR .. "src/mame/machine/xbox.cpp", MAME_DIR .. "src/mame/machine/xbox_usb.cpp", MAME_DIR .. "src/mame/machine/xbox_pci.cpp", diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index f7e1c842a17..93fd799bfb1 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -1073,7 +1073,7 @@ function linkProjects_mame_mess(_target, _subtarget) "samsung", "sanyo", "saturn", - "sega", + "segacons", "sequential", "sgi", "sharp", @@ -1246,8 +1246,6 @@ files { MAME_DIR .. "src/mame/machine/dc.cpp", MAME_DIR .. "src/mame/machine/dc-ctrl.cpp", MAME_DIR .. "src/mame/machine/dc-ctrl.h", - MAME_DIR .. "src/mame/machine/gdrom.cpp", - MAME_DIR .. "src/mame/machine/gdrom.h", MAME_DIR .. "src/mame/machine/jvs13551.cpp", MAME_DIR .. "src/mame/machine/jvs13551.h", MAME_DIR .. "src/mame/machine/maple-dc.cpp", @@ -2796,11 +2794,18 @@ files { MAME_DIR .. "src/mame/includes/phc25.h", } -createMESSProjects(_target, _subtarget, "sega") +-- Don't call this project "sega" or it collides with the arcade one +-- and merges with it, which ends up with libsega.a linked after +-- libshared.a. The link then fails on linux because SEGAM1AUDIO and RAX +-- are in shared while model* and stv are in sega. + +createMESSProjects(_target, _subtarget, "segacons") files { MAME_DIR .. "src/mame/drivers/dccons.cpp", MAME_DIR .. "src/mame/includes/dccons.h", MAME_DIR .. "src/mame/machine/dccons.cpp", + MAME_DIR .. "src/mame/machine/gdrom.cpp", + MAME_DIR .. "src/mame/machine/gdrom.h", MAME_DIR .. "src/mame/drivers/megadriv.cpp", MAME_DIR .. "src/mame/includes/megadriv.h", MAME_DIR .. "src/mame/drivers/segapico.cpp", -- cgit v1.2.3-70-g09d2 From 41f722430239ab951b4af5a92873f372d592a249 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 4 Dec 2017 09:42:27 +0100 Subject: Nicer autoscrolling (nw) --- src/emu/debug/dvdisasm.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/emu/debug/dvdisasm.cpp b/src/emu/debug/dvdisasm.cpp index 2292e766132..8084251c7b1 100644 --- a/src/emu/debug/dvdisasm.cpp +++ b/src/emu/debug/dvdisasm.cpp @@ -321,7 +321,7 @@ void debug_view_disasm::generate_dasm(debug_disasm_buffer &buffer, offs_t pc) if(pos != -1) { if(!pc_changed) return; - if(pos >= m_topleft.y && pos < m_topleft.y + m_visible.y) + if(pos >= m_topleft.y && pos < m_topleft.y + m_visible.y - 2) return; if(pos < m_total.y - m_visible.y) { m_topleft.x = 0; @@ -566,6 +566,8 @@ void debug_view_disasm::set_selected_address(offs_t address) void debug_view_disasm::set_source(const debug_view_source &source) { - debug_view::set_source(source); - m_dasm.clear(); + if(&source != m_source) { + debug_view::set_source(source); + m_dasm.clear(); + } } -- cgit v1.2.3-70-g09d2 From 62c3cab42d163423bf6f768e382e2b81e3a40608 Mon Sep 17 00:00:00 2001 From: smf- Date: Mon, 4 Dec 2017 10:48:46 +0000 Subject: twinkle: Changed security card padding from 0x00 to 0xff, 4th & 5th have now been dumped and the serial numbers scrubbed. [smf, Guru] --- src/mame/drivers/twinkle.cpp | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 2788dc976b0..71abe917d83 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -1214,7 +1214,7 @@ ROM_START( bmiidx2 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "985a02", 0x000000, 0x000100, BAD_DUMP CRC(a35143a9) SHA1(1c0feeab60d9dc50dc4b9a2f3dac73ca619e74b0) ) + ROM_LOAD( "985a02", 0x000000, 0x000100, BAD_DUMP CRC(a290f534) SHA1(e7089f5f9c4c90d6c082539f3d839ac7798a27e4) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "gc985a01", 0, SHA1(0b783f11317f64552ebf3323459139529e7f315f) ) @@ -1230,7 +1230,7 @@ ROM_START( bmiidx3 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "992a02", 0x000000, 0x000100, BAD_DUMP CRC(51f24913) SHA1(574b555e3d0c234011198d218d7ae5e95091acb1) ) + ROM_LOAD( "992a02", 0x000000, 0x000100, BAD_DUMP CRC(4b35d2ad) SHA1(4a9015e7f11d1aab9f79f070af9906e71eb4eb6d) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "gc992-jac01", 0, SHA1(c02d6e58439be678ec0d7171eae2dfd53a21acc7) ) @@ -1246,7 +1246,7 @@ ROM_START( bmiidx3a ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "992a02", 0x000000, 0x000100, BAD_DUMP CRC(51f24913) SHA1(574b555e3d0c234011198d218d7ae5e95091acb1) ) + ROM_LOAD( "992a02", 0x000000, 0x000100, BAD_DUMP CRC(4b35d2ad) SHA1(4a9015e7f11d1aab9f79f070af9906e71eb4eb6d) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "gc992-jaa01", 0, BAD_DUMP SHA1(7e5389735dff379bb286ba3744edf59b7dfcc74b) ) @@ -1262,7 +1262,7 @@ ROM_START( bmiidx4 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "a03", 0x000000, 0x000100, BAD_DUMP CRC(8860cfb6) SHA1(85a5b27f24d4baa7960e692b91c0cf3dc5388e72) ) + ROM_LOAD( "a03", 0x000000, 0x000100, CRC(056816a5) SHA1(125d24d1c22b8d3da6fe53f519c8d83eba627e9f) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "a03jaa01", 0, SHA1(f54fc778c2187ccd950402a159babef956b71492) ) @@ -1278,7 +1278,7 @@ ROM_START( bmiidx5 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "a17", 0x000000, 0x000100, BAD_DUMP CRC(9428afb0) SHA1(ba907d3361256b022583d6a42fe223e90590e3c6) ) + ROM_LOAD( "a17", 0x000000, 0x000100, CRC(8eef340e) SHA1(631521baf9ec5db111e62cf0439ae31400447a57) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "a17jaa01", 0, SHA1(5ac46973b42b2c66ae63297d1a7fd69b33ef4d1d) ) @@ -1294,7 +1294,7 @@ ROM_START( bmiidx6 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "b4u", 0x000000, 0x000100, BAD_DUMP CRC(0ab15633) SHA1(df004ff41f35b16089f69808ccf53a5e5cc13ac3) ) + ROM_LOAD( "b4u", 0x000000, 0x000100, BAD_DUMP CRC(1076cd8d) SHA1(e4bdadbf675221cc0170e5d4a37fe1f439c2e72b) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "b4ujab01", 0, SHA1(aaae77f473c4a44ce6838da3ef6dab27e4afa0e4) ) @@ -1310,7 +1310,7 @@ ROM_START( bmiidx6a ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "b4u", 0x000000, 0x000100, BAD_DUMP CRC(0ab15633) SHA1(df004ff41f35b16089f69808ccf53a5e5cc13ac3) ) + ROM_LOAD( "b4u", 0x000000, 0x000100, BAD_DUMP CRC(1076cd8d) SHA1(e4bdadbf675221cc0170e5d4a37fe1f439c2e72b) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "b4ujaa01", 0, BAD_DUMP SHA1(d8f5d56b8728bea761dc4cdbc04851094d276bd6) ) @@ -1326,7 +1326,7 @@ ROM_START( bmiidx7 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "b44", 0x000000, 0x000100, BAD_DUMP CRC(5baf4761) SHA1(aa7e07eb2cada03b85bdf11ac6a3de65f4253eef) ) + ROM_LOAD( "b44", 0x000000, 0x000100, BAD_DUMP CRC(4168dcdf) SHA1(66ef68783a69b04af6bc85cef90a36085dfee612) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "b44jaa01", 0, SHA1(57fb0312d8102e959658e48a97e46aa16e592b60) ) @@ -1342,7 +1342,7 @@ ROM_START( bmiidx8 ) TWINKLE_BIOS ROM_REGION( 0x100, "security", 0 ) - ROM_LOAD( "c44", 0x000000, 0x000100, BAD_DUMP CRC(04c22349) SHA1(d1cb78911cb1ca660d393a81ed3ed07b24c51525) ) + ROM_LOAD( "c44", 0x000000, 0x000100, BAD_DUMP CRC(198de0a2) SHA1(9526e98aaeb7ab3198e7a63715c4fc2d7c9d6021) ) DISK_REGION( "scsi:" SCSI_PORT_DEVICE1 ":cdrom" ) DISK_IMAGE_READONLY( "c44jaa01", 0, BAD_DUMP SHA1(8b544c81bc56b19e4aa1649e68824811d6d51ce5) ) -- cgit v1.2.3-70-g09d2 From e5193d9fa3858a1415e3e0fe905eecf79aaf5f1e Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 4 Dec 2017 12:07:41 +0100 Subject: route16.cpp: added player 2 inputs to T.T. Mahjong [Angelo Salese] --- src/mame/drivers/route16.cpp | 83 ++++++++++++++++++++++++++++++++++---------- src/mame/includes/route16.h | 3 +- 2 files changed, 66 insertions(+), 20 deletions(-) diff --git a/src/mame/drivers/route16.cpp b/src/mame/drivers/route16.cpp index cf174755a4f..f461e476323 100644 --- a/src/mame/drivers/route16.cpp +++ b/src/mame/drivers/route16.cpp @@ -147,7 +147,7 @@ WRITE8_MEMBER(route16_state::ttmahjng_input_port_matrix_w) } -READ8_MEMBER(route16_state::ttmahjng_input_port_matrix_r) +READ8_MEMBER(route16_state::ttmahjng_p1_matrix_r) { uint8_t ret = 0; @@ -163,6 +163,21 @@ READ8_MEMBER(route16_state::ttmahjng_input_port_matrix_r) return ret; } +READ8_MEMBER(route16_state::ttmahjng_p2_matrix_r) +{ + uint8_t ret = 0; + + switch (m_ttmahjng_port_select) + { + case 1: ret = ioport("KEY4")->read(); break; + case 2: ret = ioport("KEY5")->read(); break; + case 4: ret = ioport("KEY6")->read(); break; + case 8: ret = ioport("KEY7")->read(); break; + default: break; + } + + return ret; +} /*************************************************************************** @@ -249,8 +264,8 @@ static ADDRESS_MAP_START( ttmahjng_cpu1_map, AS_PROGRAM, 8, route16_state ) AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("sharedram") AM_RANGE(0x4800, 0x4800) AM_READ_PORT("DSW") AM_WRITE(out0_w) - AM_RANGE(0x5000, 0x5000) AM_READ_PORT("IN0") AM_WRITE(out1_w) - AM_RANGE(0x5800, 0x5800) AM_READWRITE(ttmahjng_input_port_matrix_r, ttmahjng_input_port_matrix_w) + AM_RANGE(0x5000, 0x5000) AM_READ(ttmahjng_p2_matrix_r) AM_WRITE(out1_w) + AM_RANGE(0x5800, 0x5800) AM_READWRITE(ttmahjng_p1_matrix_r, ttmahjng_input_port_matrix_w) AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("ay8910", ay8910_device, data_w) AM_RANGE(0x6900, 0x6900) AM_DEVWRITE("ay8910", ay8910_device, address_w) AM_RANGE(0x8000, 0xbfff) AM_RAM AM_SHARE("videoram1") @@ -492,37 +507,27 @@ static INPUT_PORTS_START( ttmahjng ) PORT_DIPSETTING( 0x00, "00" ) PORT_DIPSETTING( 0x80, "80" ) - PORT_START("IN0") /* IN1 */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) - - PORT_START("KEY0") /* IN2 */ + PORT_START("KEY0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) // START2? + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("KEY1") /* IN3 */ + PORT_START("KEY1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) // START1? + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("KEY2") /* IN4 */ + PORT_START("KEY2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) @@ -532,7 +537,7 @@ static INPUT_PORTS_START( ttmahjng ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("KEY3") /* IN5 */ + PORT_START("KEY3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) @@ -541,6 +546,46 @@ static INPUT_PORTS_START( ttmahjng ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("KEY4") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_COCKTAIL + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("KEY5") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_COCKTAIL + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("KEY6") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_COCKTAIL + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("KEY7") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) INPUT_PORTS_END MACHINE_START_MEMBER(route16_state, speakres) diff --git a/src/mame/includes/route16.h b/src/mame/includes/route16.h index 93dcccbb0af..bcb8eb2911f 100644 --- a/src/mame/includes/route16.h +++ b/src/mame/includes/route16.h @@ -31,7 +31,8 @@ public: DECLARE_WRITE8_MEMBER(route16_sharedram_w); DECLARE_READ8_MEMBER(routex_prot_read); DECLARE_WRITE8_MEMBER(ttmahjng_input_port_matrix_w); - DECLARE_READ8_MEMBER(ttmahjng_input_port_matrix_r); + DECLARE_READ8_MEMBER(ttmahjng_p1_matrix_r); + DECLARE_READ8_MEMBER(ttmahjng_p2_matrix_r); DECLARE_READ8_MEMBER(speakres_in3_r); DECLARE_WRITE8_MEMBER(speakres_out2_w); DECLARE_WRITE8_MEMBER(stratvox_sn76477_w); -- cgit v1.2.3-70-g09d2 From 6347d1db4c614ed79cff0888e2aac91cfe1f4dca Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Mon, 4 Dec 2017 14:58:23 +0200 Subject: pgm2: document debug features --- src/mame/drivers/pgm2.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index d28f0fac442..763cd527c45 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -45,7 +45,7 @@ Support remaining games (need IGS036 dumps) Identify which regions each game was released in and either dump alt. internal ROMs for each region, or create them until that can be done. - RTC (integrated into the CPU with the SRAM?) + properly implement RTC (integrated into the CPU) Memory Card system (there's an MCU on the motherboard that will need simulating or dumping somehow) Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.) Simplify IGS036 encryption based on tables in internal roms @@ -53,6 +53,11 @@ codepath that would not exist in a real environment at the moment) Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests) + Debug features (require DIP SW1:8 On): + - QC TEST mode: hold P1 A+B during boot + - Debug/Test mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be other unknown debug featuers. + works for both currently dumped games (orleg2, kov2nl) + */ #include "includes/pgm2.h" @@ -232,7 +237,7 @@ static INPUT_PORTS_START( pgm2 ) PORT_DIPNAME( 0x40000000, 0x40000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40000000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x80000000, 0x80000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPNAME( 0x80000000, 0x80000000, "Debug" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x80000000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) INPUT_PORTS_END -- cgit v1.2.3-70-g09d2 From 8f6f99fe8b6fd48dc67dc7e290114df5436e6c4c Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Mon, 4 Dec 2017 15:07:05 +0200 Subject: typo/spelling (nw) --- src/mame/drivers/pgm2.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 763cd527c45..c4d4cecb7e8 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -55,7 +55,7 @@ Debug features (require DIP SW1:8 On): - QC TEST mode: hold P1 A+B during boot - - Debug/Test mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be other unknown debug featuers. + - Debug/Cheat mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be more unknown debug features. works for both currently dumped games (orleg2, kov2nl) */ -- cgit v1.2.3-70-g09d2 From 30a160d78295552c0ee3001def36d135fe12821d Mon Sep 17 00:00:00 2001 From: arbee Date: Mon, 4 Dec 2017 09:13:22 -0500 Subject: rf5c400: fix regression (nw) This fixes gradius4, and also fixes the dog whistling and other issues in the bmiidx games. --- src/devices/sound/rf5c400.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index 4fc6a364c7a..f354d358402 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -181,7 +181,7 @@ void rf5c400_device::device_start() m_stream = stream_alloc(0, 2, clock() / 384); - m_rommask = (m_rom.length()/2) - 1; + m_rommask = m_rom.length() - 1; } //------------------------------------------------- -- cgit v1.2.3-70-g09d2 From 3f43c81b5843c3b0d659a68fec4bc71a5c59a3f4 Mon Sep 17 00:00:00 2001 From: cracyc Date: Mon, 4 Dec 2017 10:05:49 -0600 Subject: [compc.cpp, pc10iii] Added BIOS v4.35c and matching char ROM [rfka01] --- src/mame/drivers/compc.cpp | 139 +++++++++++++++++++++++++++++++-------------- 1 file changed, 95 insertions(+), 44 deletions(-) diff --git a/src/mame/drivers/compc.cpp b/src/mame/drivers/compc.cpp index e1223d10c45..587d47fdfa0 100644 --- a/src/mame/drivers/compc.cpp +++ b/src/mame/drivers/compc.cpp @@ -27,16 +27,19 @@ public: void machine_reset() override; + DECLARE_WRITE8_MEMBER(pioiii_w); + DECLARE_READ8_MEMBER(pioiii_r); DECLARE_WRITE8_MEMBER(pio_w); DECLARE_READ8_MEMBER(pio_r); private: - u8 m_portb; + u8 m_portb, m_dips; }; void compc_state::machine_reset() { m_portb = 0; + m_dips = 0; } WRITE8_MEMBER(compc_state::pio_w) @@ -84,6 +87,59 @@ READ8_MEMBER(compc_state::pio_r) return data; } +WRITE8_MEMBER(compc_state::pioiii_w) +{ + switch (offset) + { + case 1: + m_portb = data; + m_mb->m_pit8253->write_gate2(BIT(data, 0)); + m_mb->pc_speaker_set_spkrdata(BIT(data, 1)); + m_keyboard->enable(BIT(data, 6)); + if(data & 0x80) + m_mb->m_pic8259->ir1_w(0); + break; + case 2: + m_dips = (data & ~0x30) | ioport("DSW0")->read(); + break; + } +} + + +READ8_MEMBER(compc_state::pioiii_r) +{ + int data = 0; + switch (offset) + { + case 0: + data = m_keyboard->read(space, 0); + break; + case 1: + data = m_portb; + break; + case 2: + if(!BIT(m_portb, 2)) + data = (m_dips >> 4) & 0x0f; + else + data = m_dips & 0x0f; + if(m_mb->pit_out2()) + data |= 0x30; + break; + } + return data; +} + +static INPUT_PORTS_START(compciii) + PORT_START("DSW0") /* IN1 */ + PORT_DIPNAME( 0x30, 0x30, "Graphics adapter") + PORT_DIPSETTING( 0x00, "EGA/VGA" ) + PORT_DIPSETTING( 0x10, "Color 40x25" ) + PORT_DIPSETTING( 0x20, "Color 80x25" ) + PORT_DIPSETTING( 0x30, "Monochrome" ) + + PORT_INCLUDE(pc_keyboard) +INPUT_PORTS_END + static INPUT_PORTS_START(compc) PORT_START("DSW0") /* IN1 */ PORT_DIPNAME( 0xc0, 0x40, "Number of floppy drives") @@ -111,33 +167,6 @@ static INPUT_PORTS_START(compc) PORT_INCLUDE(pc_keyboard) INPUT_PORTS_END -static INPUT_PORTS_START(compcalt) - PORT_START("DSW0") /* IN1 */ - PORT_DIPNAME( 0x0c, 0x04, "Number of floppy drives") - PORT_DIPSETTING( 0x00, "1" ) - PORT_DIPSETTING( 0x04, "2" ) - PORT_DIPSETTING( 0x08, "3" ) - PORT_DIPSETTING( 0x0c, "4" ) - PORT_DIPNAME( 0x03, 0x03, "Graphics adapter") - PORT_DIPSETTING( 0x00, "EGA/VGA" ) - PORT_DIPSETTING( 0x01, "Color 40x25" ) - PORT_DIPSETTING( 0x02, "Color 80x25" ) - PORT_DIPSETTING( 0x03, "Monochrome" ) - PORT_DIPNAME( 0xc0, 0xc0, "RAM banks") - PORT_DIPSETTING( 0x00, "1 - 16/ 64/256K" ) - PORT_DIPSETTING( 0x40, "2 - 32/128/512K" ) - PORT_DIPSETTING( 0x80, "3 - 48/192/576K" ) - PORT_DIPSETTING( 0xc0, "4 - 64/256/640K" ) - PORT_DIPNAME( 0x20, 0x00, "8087 installed") - PORT_DIPSETTING( 0x00, DEF_STR(No) ) - PORT_DIPSETTING( 0x20, DEF_STR(Yes) ) - PORT_DIPNAME( 0x10, 0x10, "Boot from floppy") - PORT_DIPSETTING( 0x10, DEF_STR(Yes) ) - PORT_DIPSETTING( 0x00, DEF_STR(No) ) - - PORT_INCLUDE(pc_keyboard) -INPUT_PORTS_END - static ADDRESS_MAP_START(compc_map, AS_PROGRAM, 8, compc_state) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0xf0000, 0xfffff) AM_ROM AM_REGION("bios", 0) @@ -149,6 +178,12 @@ static ADDRESS_MAP_START(compc_io, AS_IO, 8, compc_state) AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", pc_noppi_mb_device, map) ADDRESS_MAP_END +static ADDRESS_MAP_START(compciii_io, AS_IO, 8, compc_state) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x0060, 0x0063) AM_READWRITE(pioiii_r, pioiii_w) + AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", pc_noppi_mb_device, map) +ADDRESS_MAP_END + static MACHINE_CONFIG_START(compc) MCFG_CPU_ADD("maincpu", I8088, 4772720*2) MCFG_CPU_PROGRAM_MAP(compc_map) @@ -181,6 +216,11 @@ static MACHINE_CONFIG_START(compc) MCFG_SOFTWARE_LIST_ADD("disk_list", "ibm5150") MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED(pc10iii, compc) + MCFG_DEVICE_MODIFY("maincpu") + MCFG_CPU_IO_MAP(compciii_io) +MACHINE_CONFIG_END + ROM_START(compc10) ROM_REGION(0x10000, "bios", 0) ROM_DEFAULT_BIOS("v205") @@ -195,25 +235,36 @@ ROM_START(pc10iii) ROM_REGION(0x10000, "bios", 0) ROM_DEFAULT_BIOS("v441") ROM_SYSTEM_BIOS(0, "v435", "v4.35") + ROM_SYSTEM_BIOS(1, "v435c", "v4.35c") + ROM_SYSTEM_BIOS(2, "v436", "v4.36") + ROM_SYSTEM_BIOS(3, "v436b", "v4.36b") + ROM_SYSTEM_BIOS(4, "v436c", "v4.36c") + ROM_SYSTEM_BIOS(5, "v438", "v4.38") + ROM_SYSTEM_BIOS(6, "v439", "v4.39") + ROM_SYSTEM_BIOS(7, "v440", "v4.40") + ROM_SYSTEM_BIOS(8, "v441", "v4.41") ROMX_LOAD("318085-01.u201", 0x8000, 0x8000, CRC(be752d1e) SHA1(5e5e63cd6d6269816cd691602e4c4d209fe3df67), ROM_BIOS(1)) - ROM_SYSTEM_BIOS(1, "v436", "v4.36") - ROMX_LOAD("318085-02.u201", 0x8000, 0x8000, CRC(db0c9d04) SHA1(1314ce606840f4f78e58e5f78909e8971387f387), ROM_BIOS(2)) - ROM_SYSTEM_BIOS(2, "v436b", "v4.36b") - ROMX_LOAD("318085-03.u201", 0x8000, 0x8000, CRC(559e6b76) SHA1(cdfd4781f3520db7f5111469ebb29c10b39ab587), ROM_BIOS(3)) - ROM_SYSTEM_BIOS(3, "v436c", "v4.36c") - ROMX_LOAD("318085-04.u201", 0x8000, 0x8000, CRC(f81e67f0) SHA1(b46613cb5c6ac4beb769778bc35f81777ebe02e1), ROM_BIOS(4)) - ROM_SYSTEM_BIOS(4, "v438", "v4.38") - ROMX_LOAD("318085-05.u201", 0x8000, 0x8000, CRC(ae9e6a31) SHA1(853ee251cf230818c407a8d13ef060a21c90a8c1), ROM_BIOS(5)) - ROM_SYSTEM_BIOS(5, "v439", "v4.39") - ROMX_LOAD("318085-06.u201", 0x8000, 0x8000, CRC(1901993c) SHA1(f75060c1c442376bd42c61e74fa9eee053351791), ROM_BIOS(6)) - ROM_SYSTEM_BIOS(6, "v440", "v4.40") - ROMX_LOAD("318085-07.u201", 0x8000, 0x8000, CRC(505d52b0) SHA1(f717c6ab791d51f35e1c38ffbc81a44075b5f2f8), ROM_BIOS(7)) - ROM_SYSTEM_BIOS(7, "v441", "v4.41") - ROMX_LOAD("318085-08.u201", 0x8000, 0x8000, CRC(7e228dc8) SHA1(958dfdd637bd31c01b949fac729d6973a7e630bc), ROM_BIOS(8)) + ROMX_LOAD("318085-01_pc-3_bios_4.35c.bin", 0x8000, 0x8000, CRC(adbc4ab7) SHA1(c157e5bc115906705849f185e4fe8e42ab28930c), ROM_BIOS(2)) + ROMX_LOAD("318085-02.u201", 0x8000, 0x8000, CRC(db0c9d04) SHA1(1314ce606840f4f78e58e5f78909e8971387f387), ROM_BIOS(3)) + ROMX_LOAD("318085-03.u201", 0x8000, 0x8000, CRC(559e6b76) SHA1(cdfd4781f3520db7f5111469ebb29c10b39ab587), ROM_BIOS(4)) + ROMX_LOAD("318085-04.u201", 0x8000, 0x8000, CRC(f81e67f0) SHA1(b46613cb5c6ac4beb769778bc35f81777ebe02e1), ROM_BIOS(5)) + ROMX_LOAD("318085-05.u201", 0x8000, 0x8000, CRC(ae9e6a31) SHA1(853ee251cf230818c407a8d13ef060a21c90a8c1), ROM_BIOS(6)) + ROMX_LOAD("318085-06.u201", 0x8000, 0x8000, CRC(1901993c) SHA1(f75060c1c442376bd42c61e74fa9eee053351791), ROM_BIOS(7)) + ROMX_LOAD("318085-07.u201", 0x8000, 0x8000, CRC(505d52b0) SHA1(f717c6ab791d51f35e1c38ffbc81a44075b5f2f8), ROM_BIOS(8)) + ROMX_LOAD("318085-08.u201", 0x8000, 0x8000, CRC(7e228dc8) SHA1(958dfdd637bd31c01b949fac729d6973a7e630bc), ROM_BIOS(9)) + ROM_REGION(0x8000, "gfx1", 0) - ROM_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6)) + ROMX_LOAD("318086-01_p10c_164a.bin", 0x0000, 0x4000, CRC(ee6c27f0) SHA1(e769cc3a49a1d708bd74eb4ac85bb6ea67220d38), ROM_BIOS(1)) // came with ROM 4.35c + ROMX_LOAD("318086-01_p10c_164a.bin", 0x0000, 0x4000, CRC(ee6c27f0) SHA1(e769cc3a49a1d708bd74eb4ac85bb6ea67220d38), ROM_BIOS(2)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(3)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(4)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(5)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(6)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(7)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(8)) + ROMX_LOAD("318086-02.u607", 0x0000, 0x8000, CRC(b406651c) SHA1(856f58353391a74a06ebb8ec9f8333d7d69e5fd6), ROM_BIOS(9)) ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS COMP( 1984, compc10, ibm5150, 0, compc, compc, compc_state, 0, "Commodore Business Machines", "Commodore PC 10", MACHINE_NOT_WORKING ) -COMP( 1987, pc10iii, ibm5150, 0, compc, compcalt, compc_state, 0, "Commodore Business Machines", "Commodore PC-10 III", MACHINE_NOT_WORKING ) +COMP( 1987, pc10iii, ibm5150, 0, pc10iii, compciii, compc_state, 0, "Commodore Business Machines", "Commodore PC-10 III", MACHINE_NOT_WORKING ) -- cgit v1.2.3-70-g09d2 From 2e1421632406bed91b41d40de0e9a4101a31d31a Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 11:40:30 -0500 Subject: cyclwarr: Driver state class separation (nw) --- src/mame/drivers/tatsumi.cpp | 60 +++++++++++++-------------- src/mame/includes/tatsumi.h | 96 ++++++++++++++++++++++++++------------------ src/mame/video/tatsumi.cpp | 42 +++++++++---------- 3 files changed, 107 insertions(+), 91 deletions(-) diff --git a/src/mame/drivers/tatsumi.cpp b/src/mame/drivers/tatsumi.cpp index 9b6c962078b..ef9ce5e5bcc 100644 --- a/src/mame/drivers/tatsumi.cpp +++ b/src/mame/drivers/tatsumi.cpp @@ -159,42 +159,42 @@ /***************************************************************************/ -READ16_MEMBER(tatsumi_state::cyclwarr_sprite_r) +READ16_MEMBER(cyclwarr_state::cyclwarr_sprite_r) { return m_spriteram[offset]; } -WRITE16_MEMBER(tatsumi_state::cyclwarr_sprite_w) +WRITE16_MEMBER(cyclwarr_state::cyclwarr_sprite_w) { COMBINE_DATA(&m_spriteram[offset]); } -WRITE16_MEMBER(tatsumi_state::bigfight_a20000_w) +WRITE16_MEMBER(cyclwarr_state::bigfight_a20000_w) { COMBINE_DATA(&m_bigfight_a20000[offset]); } -WRITE16_MEMBER(tatsumi_state::bigfight_a40000_w) +WRITE16_MEMBER(cyclwarr_state::bigfight_a40000_w) { COMBINE_DATA(&m_bigfight_a40000[offset]); } -WRITE16_MEMBER(tatsumi_state::bigfight_a60000_w) +WRITE16_MEMBER(cyclwarr_state::bigfight_a60000_w) { COMBINE_DATA(&m_bigfight_a60000[offset]); } -WRITE16_MEMBER(tatsumi_state::io1_byte_smear_w) +WRITE16_MEMBER(cyclwarr_state::io1_byte_smear_w) { m_io[0]->write(space, offset, data & 0xff); } -WRITE16_MEMBER(tatsumi_state::io2_byte_smear_w) +WRITE16_MEMBER(cyclwarr_state::io2_byte_smear_w) { m_io[1]->write(space, offset, data & 0xff); } -WRITE16_MEMBER(tatsumi_state::cyclwarr_sound_w) +WRITE16_MEMBER(cyclwarr_state::cyclwarr_sound_w) { m_soundlatch->write(space, 0, data >> 8); m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); @@ -284,7 +284,7 @@ ADDRESS_MAP_END /******************************************************************************/ -static ADDRESS_MAP_START( cyclwarr_68000a_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( cyclwarr_68000a_map, AS_PROGRAM, 16, cyclwarr_state ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_SHARE("cw_cpua_ram") AM_RANGE(0x03e000, 0x03efff) AM_RAM AM_RANGE(0x040000, 0x04ffff) AM_RAM AM_SHARE("cw_cpub_ram") @@ -305,7 +305,7 @@ static ADDRESS_MAP_START( cyclwarr_68000a_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0x2c0000, 0x33ffff) AM_ROMBANK("bank1") /* CPU A ROM */ ADDRESS_MAP_END -static ADDRESS_MAP_START( cyclwarr_68000b_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( cyclwarr_68000b_map, AS_PROGRAM, 16, cyclwarr_state ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_SHARE("cw_cpub_ram") AM_RANGE(0x080000, 0x08ffff) AM_READWRITE(cyclwarr_videoram1_r, cyclwarr_videoram1_w) @@ -324,7 +324,7 @@ static ADDRESS_MAP_START( cyclwarr_68000b_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0x2c0000, 0x33ffff) AM_ROMBANK("bank1") /* CPU A ROM */ ADDRESS_MAP_END -static ADDRESS_MAP_START( cyclwarr_z80_map, AS_PROGRAM, 8, tatsumi_state ) +static ADDRESS_MAP_START( cyclwarr_z80_map, AS_PROGRAM, 8, cyclwarr_state ) AM_RANGE(0x0000, 0xdfff) AM_ROM AM_RANGE(0xe000, 0xffef) AM_RAM AM_RANGE(0xfff0, 0xfff1) AM_READ(tatsumi_hack_ym2151_r) AM_DEVWRITE("ymsnd", ym2151_device, write) @@ -335,7 +335,7 @@ ADDRESS_MAP_END /******************************************************************************/ -static ADDRESS_MAP_START( bigfight_68000a_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( bigfight_68000a_map, AS_PROGRAM, 16, cyclwarr_state ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_SHARE("cw_cpua_ram") AM_RANGE(0x03e000, 0x03efff) AM_RAM @@ -358,7 +358,7 @@ static ADDRESS_MAP_START( bigfight_68000a_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0x200000, 0x27ffff) AM_ROMBANK("bank1") /* CPU B ROM */ ADDRESS_MAP_END -static ADDRESS_MAP_START( bigfight_68000b_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( bigfight_68000b_map, AS_PROGRAM, 16, cyclwarr_state ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_SHARE("cw_cpub_ram") AM_RANGE(0x080000, 0x08ffff) AM_READWRITE(cyclwarr_videoram1_r, cyclwarr_videoram1_w) AM_RANGE(0x090000, 0x09ffff) AM_READWRITE(cyclwarr_videoram0_r, cyclwarr_videoram0_w) @@ -951,11 +951,11 @@ static MACHINE_CONFIG_START( cyclwarr ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(cyclwarr_68000a_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq5_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", cyclwarr_state, irq5_line_hold) MCFG_CPU_ADD("sub", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(cyclwarr_68000b_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq5_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", cyclwarr_state, irq5_line_hold) MCFG_CPU_ADD("audiocpu", Z80, CLOCK_1 / 4) MCFG_CPU_PROGRAM_MAP(cyclwarr_z80_map) @@ -973,7 +973,7 @@ static MACHINE_CONFIG_START( cyclwarr ) MCFG_CXD1095_IN_PORTB_CB(IOPORT("DSW2")) MCFG_CXD1095_IN_PORTC_CB(IOPORT("P3")) MCFG_CXD1095_IN_PORTD_CB(IOPORT("P4")) - MCFG_CXD1095_OUT_PORTE_CB(WRITE8(tatsumi_state, cyclwarr_control_w)) + MCFG_CXD1095_OUT_PORTE_CB(WRITE8(cyclwarr_state, cyclwarr_control_w)) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -981,13 +981,13 @@ static MACHINE_CONFIG_START( cyclwarr ) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MCFG_SCREEN_SIZE(40*8, 32*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1) - MCFG_SCREEN_UPDATE_DRIVER(tatsumi_state, screen_update_cyclwarr) + MCFG_SCREEN_UPDATE_DRIVER(cyclwarr_state, screen_update_cyclwarr) MCFG_GFXDECODE_ADD("gfxdecode", "palette", cyclwarr) MCFG_PALETTE_ADD("palette", 8192 + 8192) MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB) - MCFG_VIDEO_START_OVERRIDE(tatsumi_state,cyclwarr) + MCFG_VIDEO_START_OVERRIDE(cyclwarr_state, cyclwarr) /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -1009,11 +1009,11 @@ static MACHINE_CONFIG_START( bigfight ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(bigfight_68000a_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq5_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", cyclwarr_state, irq5_line_hold) MCFG_CPU_ADD("sub", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(bigfight_68000b_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq5_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", cyclwarr_state, irq5_line_hold) MCFG_CPU_ADD("audiocpu", Z80, CLOCK_1 / 4) MCFG_CPU_PROGRAM_MAP(cyclwarr_z80_map) @@ -1031,7 +1031,7 @@ static MACHINE_CONFIG_START( bigfight ) MCFG_CXD1095_IN_PORTB_CB(IOPORT("DSW2")) MCFG_CXD1095_IN_PORTC_CB(IOPORT("P3")) MCFG_CXD1095_IN_PORTD_CB(IOPORT("P4")) - MCFG_CXD1095_OUT_PORTE_CB(WRITE8(tatsumi_state, cyclwarr_control_w)) + MCFG_CXD1095_OUT_PORTE_CB(WRITE8(cyclwarr_state, cyclwarr_control_w)) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -1039,13 +1039,13 @@ static MACHINE_CONFIG_START( bigfight ) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MCFG_SCREEN_SIZE(40*8, 32*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1) - MCFG_SCREEN_UPDATE_DRIVER(tatsumi_state, screen_update_bigfight) + MCFG_SCREEN_UPDATE_DRIVER(cyclwarr_state, screen_update_bigfight) MCFG_GFXDECODE_ADD("gfxdecode", "palette", cyclwarr) MCFG_PALETTE_ADD("palette", 8192 + 8192) MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB) - MCFG_VIDEO_START_OVERRIDE(tatsumi_state,bigfight) + MCFG_VIDEO_START_OVERRIDE(cyclwarr_state, bigfight) /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -1409,7 +1409,7 @@ DRIVER_INIT_MEMBER(tatsumi_state,roundup5) tatsumi_reset(); } -DRIVER_INIT_MEMBER(tatsumi_state,cyclwarr) +DRIVER_INIT_MEMBER(cyclwarr_state, cyclwarr) { uint8_t *dst = memregion("gfx1")->base(); uint8_t *src1 = memregion("gfx2")->base(); @@ -1449,9 +1449,9 @@ DRIVER_INIT_MEMBER(tatsumi_state,cyclwarr) /* http://www.tatsu-mi.co.jp/game/trace/index.html */ /* ** 1987 grayout - Gray Out (not dumped yet) */ -GAME( 1988, apache3, 0, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi", "Apache 3", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1988, apache3a, apache3, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi (Kana Corporation license)", "Apache 3 (Kana Corporation license)", MACHINE_IMPERFECT_GRAPHICS ) -GAMEL(1989, roundup5, 0, roundup5, roundup5, tatsumi_state, roundup5, ROT0, "Tatsumi", "Round Up 5 - Super Delta Force", MACHINE_IMPERFECT_GRAPHICS, layout_roundup5 ) -GAME( 1991, cyclwarr, 0, cyclwarr, cyclwarr, tatsumi_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev C)", MACHINE_IMPERFECT_GRAPHICS ) // Rev C & B CPU code -GAME( 1991, cyclwarra, cyclwarr, cyclwarr, cyclwarb, tatsumi_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev B)", MACHINE_IMPERFECT_GRAPHICS ) // Rev B & A CPU code -GAME( 1992, bigfight, 0, bigfight, bigfight, tatsumi_state, cyclwarr, ROT0, "Tatsumi", "Big Fight - Big Trouble In The Atlantic Ocean", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1988, apache3, 0, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi", "Apache 3", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1988, apache3a, apache3, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi (Kana Corporation license)", "Apache 3 (Kana Corporation license)", MACHINE_IMPERFECT_GRAPHICS ) +GAMEL(1989, roundup5, 0, roundup5, roundup5, tatsumi_state, roundup5, ROT0, "Tatsumi", "Round Up 5 - Super Delta Force", MACHINE_IMPERFECT_GRAPHICS, layout_roundup5 ) +GAME( 1991, cyclwarr, 0, cyclwarr, cyclwarr, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev C)", MACHINE_IMPERFECT_GRAPHICS ) // Rev C & B CPU code +GAME( 1991, cyclwarra, cyclwarr, cyclwarr, cyclwarb, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev B)", MACHINE_IMPERFECT_GRAPHICS ) // Rev B & A CPU code +GAME( 1992, bigfight, 0, bigfight, bigfight, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Big Fight - Big Trouble In The Atlantic Ocean", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/includes/tatsumi.h b/src/mame/includes/tatsumi.h index bb8c25ef874..a822a2d7cae 100644 --- a/src/mame/includes/tatsumi.h +++ b/src/mame/includes/tatsumi.h @@ -18,11 +18,7 @@ public: m_oki(*this, "oki"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), - m_soundlatch(*this, "soundlatch"), - m_io(*this, {"io1", "io2"}), m_videoram(*this, "videoram"), - m_cyclwarr_cpua_ram(*this, "cw_cpua_ram"), - m_cyclwarr_cpub_ram(*this, "cw_cpub_ram"), m_apache3_g_ram(*this, "apache3_g_ram"), m_roundup5_d0000_ram(*this, "ru5_d0000_ram"), m_roundup5_e0000_ram(*this, "ru5_e0000_ram"), @@ -32,8 +28,6 @@ public: m_68k_ram(*this, "68k_ram"), m_apache3_z80_ram(*this, "apache3_z80_ram"), m_sprite_control_ram(*this, "sprite_ctlram"), - m_cyclwarr_videoram0(*this, "cw_videoram0"), - m_cyclwarr_videoram1(*this, "cw_videoram1"), m_roundup_r_ram(*this, "roundup_r_ram"), m_roundup_p_ram(*this, "roundup_p_ram"), m_roundup_l_ram(*this, "roundup_l_ram"), @@ -46,12 +40,8 @@ public: required_device m_oki; required_device m_gfxdecode; required_device m_palette; - optional_device m_soundlatch; - optional_device_array m_io; optional_shared_ptr m_videoram; - optional_shared_ptr m_cyclwarr_cpua_ram; - optional_shared_ptr m_cyclwarr_cpub_ram; optional_shared_ptr m_apache3_g_ram; optional_shared_ptr m_roundup5_d0000_ram; optional_shared_ptr m_roundup5_e0000_ram; @@ -61,16 +51,11 @@ public: optional_shared_ptr m_68k_ram; optional_shared_ptr m_apache3_z80_ram; required_shared_ptr m_sprite_control_ram; - optional_shared_ptr m_cyclwarr_videoram0; - optional_shared_ptr m_cyclwarr_videoram1; optional_shared_ptr m_roundup_r_ram; optional_shared_ptr m_roundup_p_ram; optional_shared_ptr m_roundup_l_ram; required_shared_ptr m_spriteram; - uint16_t m_bigfight_a20000[8]; - uint16_t m_bigfight_a60000[2]; - uint16_t m_bigfight_a40000[2]; uint8_t *m_rom_sprite_lookup1; uint8_t *m_rom_sprite_lookup2; uint8_t *m_rom_clut0; @@ -81,27 +66,13 @@ public: uint8_t m_apache3_adc; int m_apache3_rot_idx; tilemap_t *m_tx_layer; - tilemap_t *m_layer0; - tilemap_t *m_layer1; - tilemap_t *m_layer2; - tilemap_t *m_layer3; bitmap_rgb32 m_temp_bitmap; std::unique_ptr m_apache3_road_x_ram; uint8_t m_apache3_road_z; std::unique_ptr m_roundup5_vram; - uint16_t m_bigfight_bank; - uint16_t m_bigfight_last_bank; uint8_t m_roundupt_crt_selected_reg; uint8_t m_roundupt_crt_reg[64]; std::unique_ptr m_shadow_pen_array; - DECLARE_READ16_MEMBER(cyclwarr_sprite_r); - DECLARE_WRITE16_MEMBER(cyclwarr_sprite_w); - DECLARE_WRITE16_MEMBER(bigfight_a20000_w); - DECLARE_WRITE16_MEMBER(bigfight_a40000_w); - DECLARE_WRITE16_MEMBER(bigfight_a60000_w); - DECLARE_WRITE16_MEMBER(io1_byte_smear_w); - DECLARE_WRITE16_MEMBER(io2_byte_smear_w); - DECLARE_WRITE16_MEMBER(cyclwarr_sound_w); DECLARE_READ16_MEMBER(apache3_bank_r); DECLARE_WRITE16_MEMBER(apache3_bank_w); DECLARE_WRITE16_MEMBER(apache3_z80_ctrl_w); @@ -126,29 +97,74 @@ public: DECLARE_READ16_MEMBER(roundup5_vram_r); DECLARE_WRITE16_MEMBER(roundup5_vram_w); DECLARE_WRITE16_MEMBER(roundup5_text_w); - DECLARE_READ16_MEMBER(cyclwarr_videoram0_r); - DECLARE_READ16_MEMBER(cyclwarr_videoram1_r); - DECLARE_WRITE16_MEMBER(cyclwarr_videoram0_w); - DECLARE_WRITE16_MEMBER(cyclwarr_videoram1_w); DECLARE_WRITE16_MEMBER(roundup5_crt_w); DECLARE_DRIVER_INIT(roundup5); DECLARE_DRIVER_INIT(apache3); - DECLARE_DRIVER_INIT(cyclwarr); TILE_GET_INFO_MEMBER(get_text_tile_info); - TILE_GET_INFO_MEMBER(get_tile_info_bigfight_0); - TILE_GET_INFO_MEMBER(get_tile_info_bigfight_1); DECLARE_MACHINE_RESET(apache3); DECLARE_VIDEO_START(apache3); DECLARE_VIDEO_START(roundup5); - DECLARE_VIDEO_START(cyclwarr); - DECLARE_VIDEO_START(bigfight); uint32_t screen_update_apache3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_roundup5(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint32_t screen_update_cyclwarr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint32_t screen_update_bigfight(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(roundup5_interrupt); DECLARE_READ8_MEMBER(tatsumi_hack_ym2151_r); DECLARE_READ8_MEMBER(tatsumi_hack_oki_r); DECLARE_WRITE_LINE_MEMBER(apache3_68000_reset); void tatsumi_reset(); }; + +class cyclwarr_state : public tatsumi_state +{ +public: + cyclwarr_state(const machine_config &mconfig, device_type type, const char *tag) + : tatsumi_state(mconfig, type, tag), + m_io(*this, "io%u", 1), + m_soundlatch(*this, "soundlatch"), + m_cyclwarr_cpua_ram(*this, "cw_cpua_ram"), + m_cyclwarr_cpub_ram(*this, "cw_cpub_ram"), + m_cyclwarr_videoram0(*this, "cw_videoram0"), + m_cyclwarr_videoram1(*this, "cw_videoram1") + { + } + + DECLARE_READ16_MEMBER(cyclwarr_sprite_r); + DECLARE_WRITE16_MEMBER(cyclwarr_sprite_w); + DECLARE_WRITE16_MEMBER(bigfight_a20000_w); + DECLARE_WRITE16_MEMBER(bigfight_a40000_w); + DECLARE_WRITE16_MEMBER(bigfight_a60000_w); + DECLARE_WRITE16_MEMBER(io1_byte_smear_w); + DECLARE_WRITE16_MEMBER(io2_byte_smear_w); + DECLARE_WRITE16_MEMBER(cyclwarr_sound_w); + DECLARE_READ16_MEMBER(cyclwarr_videoram0_r); + DECLARE_READ16_MEMBER(cyclwarr_videoram1_r); + DECLARE_WRITE16_MEMBER(cyclwarr_videoram0_w); + DECLARE_WRITE16_MEMBER(cyclwarr_videoram1_w); + + DECLARE_DRIVER_INIT(cyclwarr); + TILE_GET_INFO_MEMBER(get_tile_info_bigfight_0); + TILE_GET_INFO_MEMBER(get_tile_info_bigfight_1); + DECLARE_VIDEO_START(cyclwarr); + DECLARE_VIDEO_START(bigfight); + uint32_t screen_update_cyclwarr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t screen_update_bigfight(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + +private: + required_device_array m_io; + required_device m_soundlatch; + + required_shared_ptr m_cyclwarr_cpua_ram; + required_shared_ptr m_cyclwarr_cpub_ram; + required_shared_ptr m_cyclwarr_videoram0; + required_shared_ptr m_cyclwarr_videoram1; + + tilemap_t *m_layer0; + tilemap_t *m_layer1; + tilemap_t *m_layer2; + tilemap_t *m_layer3; + + uint16_t m_bigfight_a20000[8]; + uint16_t m_bigfight_a60000[2]; + uint16_t m_bigfight_a40000[2]; + uint16_t m_bigfight_bank; + uint16_t m_bigfight_last_bank; +}; diff --git a/src/mame/video/tatsumi.cpp b/src/mame/video/tatsumi.cpp index f1c117bdffc..84f37e6867b 100644 --- a/src/mame/video/tatsumi.cpp +++ b/src/mame/video/tatsumi.cpp @@ -56,17 +56,17 @@ WRITE16_MEMBER(tatsumi_state::roundup5_text_w) m_tx_layer->mark_tile_dirty(offset); } -READ16_MEMBER(tatsumi_state::cyclwarr_videoram0_r) +READ16_MEMBER(cyclwarr_state::cyclwarr_videoram0_r) { - return m_cyclwarr_videoram0[offset]; + return m_cyclwarr_videoram0[offset]; } -READ16_MEMBER(tatsumi_state::cyclwarr_videoram1_r) +READ16_MEMBER(cyclwarr_state::cyclwarr_videoram1_r) { - return m_cyclwarr_videoram1[offset]; + return m_cyclwarr_videoram1[offset]; } -WRITE16_MEMBER(tatsumi_state::cyclwarr_videoram0_w) +WRITE16_MEMBER(cyclwarr_state::cyclwarr_videoram0_w) { COMBINE_DATA(&m_cyclwarr_videoram0[offset]); if (offset>=0x400) @@ -76,7 +76,7 @@ WRITE16_MEMBER(tatsumi_state::cyclwarr_videoram0_w) } } -WRITE16_MEMBER(tatsumi_state::cyclwarr_videoram1_w) +WRITE16_MEMBER(cyclwarr_state::cyclwarr_videoram1_w) { COMBINE_DATA(&m_cyclwarr_videoram1[offset]); if (offset>=0x400) @@ -109,14 +109,14 @@ TILE_GET_INFO_MEMBER(tatsumi_state::get_text_tile_info) 0); } -TILE_GET_INFO_MEMBER(tatsumi_state::get_tile_info_bigfight_0) +TILE_GET_INFO_MEMBER(cyclwarr_state::get_tile_info_bigfight_0) { int tile=m_cyclwarr_videoram0[(tile_index+0x400)%0x8000]; int bank = (m_bigfight_a40000[0] >> (((tile&0xc00)>>10)*4))&0xf; SET_TILE_INFO_MEMBER(1,(tile&0x3ff)+(bank<<10),(tile>>12)&0xf,0); } -TILE_GET_INFO_MEMBER(tatsumi_state::get_tile_info_bigfight_1) +TILE_GET_INFO_MEMBER(cyclwarr_state::get_tile_info_bigfight_1) { int tile=m_cyclwarr_videoram1[(tile_index+0x400)%0x8000]; int bank = (m_bigfight_a40000[0] >> (((tile&0xc00)>>10)*4))&0xf; @@ -146,23 +146,23 @@ VIDEO_START_MEMBER(tatsumi_state,roundup5) m_gfxdecode->gfx(1)->set_source((uint8_t *)m_roundup5_vram.get()); } -VIDEO_START_MEMBER(tatsumi_state,cyclwarr) +VIDEO_START_MEMBER(cyclwarr_state,cyclwarr) { - m_layer0 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,64,512); - //m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,64,512); - m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); - m_layer2 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,64,512); - m_layer3 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,64,512); + m_layer0 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,64,512); + //m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,64,512); + m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); + m_layer2 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,64,512); + m_layer3 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,64,512); m_shadow_pen_array = make_unique_clear(8192); } -VIDEO_START_MEMBER(tatsumi_state,bigfight) +VIDEO_START_MEMBER(cyclwarr_state,bigfight) { - m_layer0 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); - m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); - m_layer2 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,128,256); - m_layer3 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,128,256); + m_layer0 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); + m_layer1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_0),this),TILEMAP_SCAN_ROWS,8,8,128,256); + m_layer2 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,128,256); + m_layer3 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(cyclwarr_state::get_tile_info_bigfight_1),this),TILEMAP_SCAN_ROWS,8,8,128,256); m_shadow_pen_array = make_unique_clear(8192); } @@ -1034,7 +1034,7 @@ uint32_t tatsumi_state::screen_update_roundup5(screen_device &screen, bitmap_rgb return 0; } -uint32_t tatsumi_state::screen_update_cyclwarr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t cyclwarr_state::screen_update_cyclwarr(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { m_bigfight_bank=m_bigfight_a40000[0]; if (m_bigfight_bank!=m_bigfight_last_bank) @@ -1058,7 +1058,7 @@ uint32_t tatsumi_state::screen_update_cyclwarr(screen_device &screen, bitmap_rgb return 0; } -uint32_t tatsumi_state::screen_update_bigfight(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t cyclwarr_state::screen_update_bigfight(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { m_bigfight_bank=m_bigfight_a40000[0]; if (m_bigfight_bank!=m_bigfight_last_bank) -- cgit v1.2.3-70-g09d2 From d68cf028bb16c11aa0d098f1287977640577b78d Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 4 Dec 2017 18:11:38 +0100 Subject: new working clone -------------------------------------------- Amigo (bootleg of Amidar, set 2) [f205v, The Dumping Union] --- src/mame/drivers/galaxian.cpp | 66 +++++++++++++++++++++++++++++++++++++++++-- src/mame/mame.lst | 1 + 2 files changed, 65 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index 8f8894bd8c6..32f37ae13da 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -1901,6 +1901,29 @@ static ADDRESS_MAP_START( turtles_map, AS_PROGRAM, 8, galaxian_state ) AM_RANGE(0xb800, 0xb83f) AM_MIRROR(0x47c0) AM_READWRITE(turtles_ppi8255_1_r, turtles_ppi8255_1_w) ADDRESS_MAP_END + +/* map NOT derived from schematics */ +static ADDRESS_MAP_START( amigo2_map, AS_PROGRAM, 8, galaxian_state ) + AM_RANGE(0x0000, 0x3fff) AM_ROM + AM_RANGE(0x4000, 0x4000) AM_READ_PORT("IN0") AM_DEVWRITE("soundlatch", generic_latch_8_device, write) + AM_RANGE(0x4001, 0x4001) AM_READ_PORT("IN1") + AM_RANGE(0x4002, 0x4002) AM_READ_PORT("IN2") + AM_RANGE(0x4003, 0x4003) AM_READ_PORT("IN3") + AM_RANGE(0x5000, 0x5000) AM_WRITE(konami_sound_control_w) + AM_RANGE(0x8000, 0x87ff) AM_RAM + AM_RANGE(0x8800, 0x8bff) AM_RAM_WRITE(galaxian_videoram_w) AM_SHARE("videoram") + AM_RANGE(0x9000, 0x90ff) AM_RAM_WRITE(galaxian_objram_w) AM_SHARE("spriteram") + AM_RANGE(0xa000, 0xa000) AM_WRITE(scramble_background_red_w) + AM_RANGE(0xa008, 0xa008) AM_WRITE(irq_enable_w) + AM_RANGE(0xa010, 0xa010) AM_WRITE(galaxian_flip_screen_y_w) + AM_RANGE(0xa018, 0xa018) AM_WRITE(galaxian_flip_screen_x_w) + AM_RANGE(0xa020, 0xa020) AM_WRITE(scramble_background_green_w) + AM_RANGE(0xa028, 0xa028) AM_WRITE(scramble_background_blue_w) + AM_RANGE(0xa030, 0xa030) AM_WRITE(coin_count_0_w) + AM_RANGE(0xa038, 0xa038) AM_WRITE(coin_count_1_w) + AM_RANGE(0xa800, 0xa800) AM_DEVREAD("watchdog", watchdog_timer_device, reset_r) +ADDRESS_MAP_END + static ADDRESS_MAP_START( turpins_map, AS_PROGRAM, 8, galaxian_state ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x8000, 0x87ff) AM_RAM @@ -6040,6 +6063,15 @@ static MACHINE_CONFIG_DERIVED( turtles, konami_base ) MCFG_CPU_PROGRAM_MAP(turtles_map) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( amigo2, galaxian_base ) // bootleg has no i8255s + + /* alternate memory map */ + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_PROGRAM_MAP(amigo2_map) + + MCFG_FRAGMENT_ADD(konami_sound_2x_ay8910) +MACHINE_CONFIG_END + static MACHINE_CONFIG_DERIVED( turpins, turtles ) // the ROMs came from a blister, so there aren't PCB infos available. Chip types and clocks are guessed. @@ -7168,7 +7200,7 @@ DRIVER_INIT_MEMBER(galaxian_state,mandinga) { DRIVER_INIT_CALL(scramble); - /* watchdog is in a different location) */ + /* watchdog is in a different location */ address_space &space = m_maincpu->space(AS_PROGRAM); watchdog_timer_device *wdog = subdevice("watchdog"); space.unmap_read(0x7000, 0x7000, 0x7ff); @@ -10611,6 +10643,35 @@ ROM_START( amigo ) ROM_LOAD( "amidar.clr", 0x0000, 0x0020, CRC(f940dcc3) SHA1(1015e56f37c244a850a8f4bf0e36668f047fd46d) ) ROM_END +/* +1x Z8400A-P5-Z80ACPU 10k 8-bit Microprocessor - main +1x Z8400A-P5-Z80ACPU 3a 8-bit Microprocessor - sound +2x AY-3-8910 6a,7a Programmable Sound Generator - sound +1x LM380N 1 Audio Amplifier - sound +1x oscillator 12.000MHz 12h + +PCB is marked: "AMI" on solder side +*/ + +ROM_START( amigo2 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "a1.10l", 0x0000, 0x1000, CRC(e4aeac3f) SHA1(661e4badcebb6f6811e9b22d9b1561b64d7e77a9) ) // 2532 + ROM_LOAD( "a2.9l", 0x1000, 0x1000, CRC(66ae3320) SHA1(3eba2f221ab2662b2b638a8822da48964ee2ceff) ) // 2532 + ROM_LOAD( "a3.8l", 0x2000, 0x1000, CRC(c369b877) SHA1(4180afee10637781b408ebb50404dd8102351d46) ) // 2532 + ROM_LOAD( "a4.7l", 0x3000, 0x1000, CRC(2194a1d3) SHA1(3807c2e25288b21e940ff33fb5d1541b559c5c1e) ) // 2532 + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "a7.3b", 0x0000, 0x1000, CRC(8ca7b750) SHA1(4f4c2915503b85abe141d717fd254ee10c9da99e) ) // 2532 + ROM_LOAD( "a8.4b", 0x1000, 0x1000, CRC(9b5bdc0a) SHA1(84d953618c8bf510d23b42232a856ac55f1baff5) ) // 2532 + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD( "a6.3h", 0x0000, 0x0800, CRC(2082ad0a) SHA1(c6014d9575e92adf09b0961c2158a779ebe940c4) ) // 2516 + ROM_LOAD( "a5.5h", 0x0800, 0x0800, CRC(3029f94f) SHA1(3b432b42e79f8b0a7d65e197f373a04e3c92ff20) ) // 2716 + + ROM_REGION( 0x0020, "proms", 0 ) + ROM_LOAD( "sn74s288n.1k", 0x0000, 0x0020, CRC(01004d3f) SHA1(e53cbc54ea96e846481a67bbcccf6b1726e70f9c) ) +ROM_END + ROM_START( amidars ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "am2d", 0x0000, 0x0800, CRC(24b79547) SHA1(eca735c6a35561a9a6ba8a20dca1e1c78ed073fc) ) @@ -12099,7 +12160,8 @@ GAME( 1981, amidar1, amidar, turtles, amidar, galaxian_state, turtl GAME( 1982, amidaru, amidar, turtles, amidaru, galaxian_state, turtles, ROT90, "Konami (Stern Electronics license)", "Amidar (Stern Electronics)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, amidaro, amidar, turtles, amidaro, galaxian_state, turtles, ROT90, "Konami (Olympia license)", "Amidar (Olympia)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, amidarb, amidar, turtles, amidaru, galaxian_state, turtles, ROT90, "bootleg", "Amidar (bootleg)", MACHINE_SUPPORTS_SAVE ) /* similar to Amigo bootleg */ -GAME( 1982, amigo, amidar, turtles, amidaru, galaxian_state, turtles, ROT90, "bootleg", "Amigo", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, amigo, amidar, turtles, amidaru, galaxian_state, turtles, ROT90, "bootleg", "Amigo (bootleg of Amidar, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, amigo2, amidar, amigo2, amidaru, galaxian_state, turtles, ROT90, "bootleg", "Amigo (bootleg of Amidar, set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, amidars, amidar, scramble, amidars, galaxian_state, scramble, ROT90, "Konami", "Amidar (Scramble hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, mandinga, amidar, scramble, amidars, galaxian_state, mandinga, ROT90, "bootleg (Artemi)", "Mandinga (bootleg of Amidar)", MACHINE_NO_SOUND | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // sound ROMs have identical halves, reference for color http://www.youtube.com/watch?v=6uGK4AZxV2U diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e360c9f545e..fd268160622 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -13056,6 +13056,7 @@ amidaro // GX337 (c) 1982 Konami + Olympia license amidars // GX337 (c) 1982 Konami amidaru // GX337 (c) 1982 Konami + Stern license amigo // bootleg +amigo2 // bootleg anteater // (c) 1982 Tago anteaterg // (c) 1983 TV-Tuning (F.E.G. license) anteatergg // bootleg -- cgit v1.2.3-70-g09d2 From d6de363a632ac78a05ce4553c457e1ab37c5a9bd Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 18:44:54 +0100 Subject: e132xs: some drc bugfixes, elfin RAM test no longer hangs, nw --- src/devices/cpu/e132xs/e132xsdrc.cpp | 2 ++ src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 17 ++++++++--------- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 11ce21cb77c..5e51771e91f 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -86,10 +86,12 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } +/* static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } +*/ /*------------------------------------------------- ccfunc_total_cycles - compute the total number diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index fe3ed4312cf..c70c234140e 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -282,22 +282,18 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi } else { - UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); - UML_ADD(block, I3, I2, src_code); + UML_ROLAND(block, I5, DRC_SR, 7, 0x7f); + UML_ADD(block, I3, I5, src_code); UML_AND(block, I4, I3, 0x3f); UML_LOAD(block, I2, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I6, I2, srcf_code); + UML_ADD(block, I6, I5, srcf_code); UML_AND(block, I5, I6, 0x3f); UML_LOAD(block, I3, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); } UML_AND(block, DRC_PC, I2, ~1); - UML_MOV(block, mem(&m_drc_arg0), (uint32_t)'0'); - UML_MOV(block, mem(&m_drc_arg1), I2); - UML_CALLC(block, cfunc_print, this); - UML_AND(block, DRC_SR, I3, 0xffe3ffff); UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK); @@ -1092,7 +1088,7 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi UML_MOV(block, I5, I1); generate_set_global_register(block, compiler, desc); - UML_TEST(block, I0, 0xf0); + UML_TEST(block, op, 0xf0); UML_JMPc(block, uml::COND_NZ, done); UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); generate_delay_slot_and_branch(block, compiler, desc); @@ -1855,7 +1851,7 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp UML_LABEL(block, diff_in_range); UML_CMP(block, I0, mem(&UB)); - UML_SETc(block, uml::COND_GE, I4); + UML_SETc(block, uml::COND_AE, I4); UML_CMP(block, I3, 0); UML_JMPc(block, uml::COND_GE, done); @@ -1866,9 +1862,12 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp UML_CALLH(block, *m_mem_write32); UML_ADD(block, I0, I0, 4); UML_ADD(block, I3, I3, 1); + UML_TEST(block, I3, ~0); UML_JMPc(block, uml::COND_NZ, push_next); + UML_MOV(block, mem(&SP), I0); + UML_TEST(block, I4, ~0); UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_FRAME_ERROR], 0); -- cgit v1.2.3-70-g09d2 From afe6751e1a47e67246c5cccb305ad4d8d362c3d6 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 13:45:39 -0500 Subject: tatsumi.cpp: Further driver state class separation (nw) --- src/mame/drivers/tatsumi.cpp | 63 +++++++++++---------- src/mame/includes/tatsumi.h | 127 +++++++++++++++++++++++++++---------------- src/mame/machine/tatsumi.cpp | 35 ++++++------ src/mame/video/tatsumi.cpp | 81 ++++++++++++++------------- 4 files changed, 171 insertions(+), 135 deletions(-) diff --git a/src/mame/drivers/tatsumi.cpp b/src/mame/drivers/tatsumi.cpp index ef9ce5e5bcc..2600373ed22 100644 --- a/src/mame/drivers/tatsumi.cpp +++ b/src/mame/drivers/tatsumi.cpp @@ -202,11 +202,11 @@ WRITE16_MEMBER(cyclwarr_state::cyclwarr_sound_w) /***************************************************************************/ -static ADDRESS_MAP_START( apache3_v30_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( apache3_v30_map, AS_PROGRAM, 16, apache3_state ) AM_RANGE(0x00000, 0x03fff) AM_RAM AM_RANGE(0x04000, 0x07fff) AM_RAM AM_SHARE("nvram") AM_RANGE(0x08000, 0x08fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") - AM_RANGE(0x0c000, 0x0dfff) AM_RAM_WRITE(roundup5_text_w) AM_SHARE("videoram") + AM_RANGE(0x0c000, 0x0dfff) AM_RAM_WRITE(text_w) AM_SHARE("videoram") AM_RANGE(0x0e800, 0x0e803) AM_WRITENOP // CRT AM_RANGE(0x0f000, 0x0f001) AM_READ_PORT("DSW") AM_RANGE(0x0f000, 0x0f001) AM_WRITENOP // todo @@ -216,7 +216,7 @@ static ADDRESS_MAP_START( apache3_v30_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0xa0000, 0xfffff) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( apache3_68000_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( apache3_68000_map, AS_PROGRAM, 16, apache3_state ) AM_RANGE(0x00000, 0x7ffff) AM_ROM AM_RANGE(0x80000, 0x83fff) AM_RAM AM_SHARE("68k_ram") AM_RANGE(0x90000, 0x93fff) AM_RAM AM_SHARE("spriteram") @@ -228,7 +228,7 @@ static ADDRESS_MAP_START( apache3_68000_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0xe0000, 0xe7fff) AM_READWRITE(apache3_z80_r, apache3_z80_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( apache3_v20_map, AS_PROGRAM, 8, tatsumi_state ) +static ADDRESS_MAP_START( apache3_v20_map, AS_PROGRAM, 8, apache3_state ) AM_RANGE(0x00000, 0x01fff) AM_RAM AM_RANGE(0x04000, 0x04003) AM_DEVREADWRITE("ppi", i8255_device, read, write) AM_RANGE(0x06000, 0x06001) AM_READ_PORT("IN0") // esw @@ -238,16 +238,16 @@ static ADDRESS_MAP_START( apache3_v20_map, AS_PROGRAM, 8, tatsumi_state ) AM_RANGE(0xf0000, 0xfffff) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( apache3_z80_map, AS_PROGRAM, 8, tatsumi_state ) +static ADDRESS_MAP_START( apache3_z80_map, AS_PROGRAM, 8, apache3_state ) AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("apache3_z80_ram") AM_RANGE(0x8000, 0xffff) AM_WRITE(apache3_road_x_w) ADDRESS_MAP_END /*****************************************************************/ -static ADDRESS_MAP_START( roundup5_v30_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( roundup5_v30_map, AS_PROGRAM, 16, roundup5_state ) AM_RANGE(0x00000, 0x07fff) AM_RAM - AM_RANGE(0x08000, 0x0bfff) AM_RAM_WRITE(roundup5_text_w) AM_SHARE("videoram") + AM_RANGE(0x08000, 0x0bfff) AM_RAM_WRITE(text_w) AM_SHARE("videoram") AM_RANGE(0x0c000, 0x0c003) AM_WRITE(roundup5_crt_w) AM_RANGE(0x0d000, 0x0d001) AM_READ_PORT("DSW") AM_RANGE(0x0d400, 0x0d40f) AM_WRITEONLY AM_SHARE("ru5_unknown0") @@ -261,7 +261,7 @@ static ADDRESS_MAP_START( roundup5_v30_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0x80000, 0xfffff) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( roundup5_68000_map, AS_PROGRAM, 16, tatsumi_state ) +static ADDRESS_MAP_START( roundup5_68000_map, AS_PROGRAM, 16, roundup5_state ) AM_RANGE(0x00000, 0x7ffff) AM_ROM AM_RANGE(0x80000, 0x83fff) AM_RAM AM_SHARE("68k_ram") AM_RANGE(0x90000, 0x93fff) AM_RAM AM_SHARE("spriteram") @@ -273,7 +273,7 @@ static ADDRESS_MAP_START( roundup5_68000_map, AS_PROGRAM, 16, tatsumi_state ) AM_RANGE(0xe0000, 0xe0001) AM_WRITE(roundup5_e0000_w) AM_SHARE("ru5_e0000_ram") ADDRESS_MAP_END -static ADDRESS_MAP_START( roundup5_z80_map, AS_PROGRAM, 8, tatsumi_state ) +static ADDRESS_MAP_START( roundup5_z80_map, AS_PROGRAM, 8, roundup5_state ) AM_RANGE(0x0000, 0xdfff) AM_ROM AM_RANGE(0xe000, 0xffef) AM_RAM AM_RANGE(0xfff0, 0xfff1) AM_READ(tatsumi_hack_ym2151_r) AM_DEVWRITE("ymsnd", ym2151_device, write) @@ -823,22 +823,22 @@ GFXDECODE_END /******************************************************************************/ -INTERRUPT_GEN_MEMBER(tatsumi_state::roundup5_interrupt) +INTERRUPT_GEN_MEMBER(tatsumi_state::v30_interrupt) { device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xc8/4); /* VBL */ } -WRITE_LINE_MEMBER(tatsumi_state::apache3_68000_reset) +WRITE_LINE_MEMBER(apache3_state::apache3_68000_reset) { m_subcpu2->set_input_line(INPUT_LINE_RESET, PULSE_LINE); } -MACHINE_RESET_MEMBER(tatsumi_state,apache3) +MACHINE_RESET_MEMBER(apache3_state,apache3) { m_subcpu2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // TODO /* Hook the RESET line, which resets the Z80 */ - m_subcpu->set_reset_callback(write_line_delegate(FUNC(tatsumi_state::apache3_68000_reset),this)); + m_subcpu->set_reset_callback(write_line_delegate(FUNC(apache3_state::apache3_68000_reset),this)); } @@ -847,29 +847,29 @@ static MACHINE_CONFIG_START( apache3 ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", V30, CLOCK_1 / 2) MCFG_CPU_PROGRAM_MAP(apache3_v30_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, roundup5_interrupt) + MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, v30_interrupt) MCFG_CPU_ADD("sub", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(apache3_68000_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq4_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", apache3_state, irq4_line_hold) MCFG_CPU_ADD("audiocpu", V20, CLOCK_1 / 2) MCFG_CPU_PROGRAM_MAP(apache3_v20_map) MCFG_CPU_ADD("sub2", Z80, CLOCK_2 / 8) MCFG_CPU_PROGRAM_MAP(apache3_z80_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, irq0_line_hold) + MCFG_CPU_VBLANK_INT_DRIVER("screen", apache3_state, irq0_line_hold) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) MCFG_NVRAM_ADD_0FILL("nvram") - MCFG_MACHINE_RESET_OVERRIDE(tatsumi_state,apache3) + MCFG_MACHINE_RESET_OVERRIDE(apache3_state, apache3) MCFG_DEVICE_ADD("ppi", I8255, 0) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_RAW_PARAMS(CLOCK_2 / 8, 400, 0, 320, 280, 0, 240) // TODO: Hook up CRTC - MCFG_SCREEN_UPDATE_DRIVER(tatsumi_state, screen_update_apache3) + MCFG_SCREEN_UPDATE_DRIVER(apache3_state, screen_update_apache3) MCFG_GFXDECODE_ADD("gfxdecode", "palette", apache3) MCFG_PALETTE_ADD("palette", 1024 + 4096) /* 1024 real colours, and 4096 arranged as series of cluts */ @@ -883,7 +883,7 @@ static MACHINE_CONFIG_START( apache3 ) bit 0: 3.9kOhm resistor */ - MCFG_VIDEO_START_OVERRIDE(tatsumi_state,apache3) + MCFG_VIDEO_START_OVERRIDE(apache3_state, apache3) /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -903,7 +903,7 @@ static MACHINE_CONFIG_START( roundup5 ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", V30, CLOCK_1 / 2) MCFG_CPU_PROGRAM_MAP(roundup5_v30_map) - MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, roundup5_interrupt) + MCFG_CPU_VBLANK_INT_DRIVER("screen", tatsumi_state, v30_interrupt) MCFG_CPU_ADD("sub", M68000, CLOCK_2 / 4) MCFG_CPU_PROGRAM_MAP(roundup5_68000_map) @@ -923,7 +923,7 @@ static MACHINE_CONFIG_START( roundup5 ) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MCFG_SCREEN_SIZE(40*8, 32*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 30*8-1) - MCFG_SCREEN_UPDATE_DRIVER(tatsumi_state, screen_update_roundup5) + MCFG_SCREEN_UPDATE_DRIVER(roundup5_state, screen_update_roundup5) MCFG_GFXDECODE_ADD("gfxdecode", "palette", roundup5) MCFG_PALETTE_ADD("palette", 1024 + 4096) /* 1024 real colours, and 4096 arranged as series of cluts */ @@ -931,7 +931,7 @@ static MACHINE_CONFIG_START( roundup5 ) MCFG_PALETTE_MEMBITS(8) MCFG_PALETTE_ENDIANNESS(ENDIANNESS_BIG) - MCFG_VIDEO_START_OVERRIDE(tatsumi_state,roundup5) + MCFG_VIDEO_START_OVERRIDE(roundup5_state,roundup5) /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -1357,7 +1357,7 @@ ROM_END /***************************************************************************/ -DRIVER_INIT_MEMBER(tatsumi_state,apache3) +DRIVER_INIT_MEMBER(apache3_state,apache3) { uint8_t *dst = memregion("gfx1")->base(); uint8_t *src1 = memregion("gfx2")->base(); @@ -1381,10 +1381,17 @@ DRIVER_INIT_MEMBER(tatsumi_state,apache3) tatsumi_reset(); + m_apache3_adc = 0; + m_apache3_rot_idx = 0; + + save_item(NAME(m_apache3_adc)); + save_item(NAME(m_apache3_rot_idx)); + save_item(NAME(m_apache3_rotate_ctrl)); + // TODO: ym2151_set_port_write_handler for CT1/CT2 outputs } -DRIVER_INIT_MEMBER(tatsumi_state,roundup5) +DRIVER_INIT_MEMBER(roundup5_state,roundup5) { uint8_t *dst = memregion("gfx1")->base(); uint8_t *src1 = memregion("gfx2")->base(); @@ -1409,7 +1416,7 @@ DRIVER_INIT_MEMBER(tatsumi_state,roundup5) tatsumi_reset(); } -DRIVER_INIT_MEMBER(cyclwarr_state, cyclwarr) +DRIVER_INIT_MEMBER(cyclwarr_state,cyclwarr) { uint8_t *dst = memregion("gfx1")->base(); uint8_t *src1 = memregion("gfx2")->base(); @@ -1449,9 +1456,9 @@ DRIVER_INIT_MEMBER(cyclwarr_state, cyclwarr) /* http://www.tatsu-mi.co.jp/game/trace/index.html */ /* ** 1987 grayout - Gray Out (not dumped yet) */ -GAME( 1988, apache3, 0, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi", "Apache 3", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1988, apache3a, apache3, apache3, apache3, tatsumi_state, apache3, ROT0, "Tatsumi (Kana Corporation license)", "Apache 3 (Kana Corporation license)", MACHINE_IMPERFECT_GRAPHICS ) -GAMEL(1989, roundup5, 0, roundup5, roundup5, tatsumi_state, roundup5, ROT0, "Tatsumi", "Round Up 5 - Super Delta Force", MACHINE_IMPERFECT_GRAPHICS, layout_roundup5 ) +GAME( 1988, apache3, 0, apache3, apache3, apache3_state, apache3, ROT0, "Tatsumi", "Apache 3", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1988, apache3a, apache3, apache3, apache3, apache3_state, apache3, ROT0, "Tatsumi (Kana Corporation license)", "Apache 3 (Kana Corporation license)", MACHINE_IMPERFECT_GRAPHICS ) +GAMEL(1989, roundup5, 0, roundup5, roundup5, roundup5_state, roundup5, ROT0, "Tatsumi", "Round Up 5 - Super Delta Force", MACHINE_IMPERFECT_GRAPHICS, layout_roundup5 ) GAME( 1991, cyclwarr, 0, cyclwarr, cyclwarr, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev C)", MACHINE_IMPERFECT_GRAPHICS ) // Rev C & B CPU code GAME( 1991, cyclwarra, cyclwarr, cyclwarr, cyclwarb, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Cycle Warriors (rev B)", MACHINE_IMPERFECT_GRAPHICS ) // Rev B & A CPU code GAME( 1992, bigfight, 0, bigfight, bigfight, cyclwarr_state, cyclwarr, ROT0, "Tatsumi", "Big Fight - Big Trouble In The Atlantic Ocean", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/includes/tatsumi.h b/src/mame/includes/tatsumi.h index a822a2d7cae..24f4d80f59a 100644 --- a/src/mame/includes/tatsumi.h +++ b/src/mame/includes/tatsumi.h @@ -14,46 +14,24 @@ public: m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_subcpu(*this, "sub"), - m_subcpu2(*this, "sub2"), m_oki(*this, "oki"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_videoram(*this, "videoram"), - m_apache3_g_ram(*this, "apache3_g_ram"), - m_roundup5_d0000_ram(*this, "ru5_d0000_ram"), - m_roundup5_e0000_ram(*this, "ru5_e0000_ram"), - m_roundup5_unknown0(*this, "ru5_unknown0"), - m_roundup5_unknown1(*this, "ru5_unknown1"), - m_roundup5_unknown2(*this, "ru5_unknown2"), m_68k_ram(*this, "68k_ram"), - m_apache3_z80_ram(*this, "apache3_z80_ram"), m_sprite_control_ram(*this, "sprite_ctlram"), - m_roundup_r_ram(*this, "roundup_r_ram"), - m_roundup_p_ram(*this, "roundup_p_ram"), - m_roundup_l_ram(*this, "roundup_l_ram"), m_spriteram(*this, "spriteram") { } required_device m_maincpu; required_device m_audiocpu; required_device m_subcpu; - optional_device m_subcpu2; required_device m_oki; required_device m_gfxdecode; required_device m_palette; optional_shared_ptr m_videoram; - optional_shared_ptr m_apache3_g_ram; - optional_shared_ptr m_roundup5_d0000_ram; - optional_shared_ptr m_roundup5_e0000_ram; - optional_shared_ptr m_roundup5_unknown0; - optional_shared_ptr m_roundup5_unknown1; - optional_shared_ptr m_roundup5_unknown2; optional_shared_ptr m_68k_ram; - optional_shared_ptr m_apache3_z80_ram; required_shared_ptr m_sprite_control_ram; - optional_shared_ptr m_roundup_r_ram; - optional_shared_ptr m_roundup_p_ram; - optional_shared_ptr m_roundup_l_ram; required_shared_ptr m_spriteram; uint8_t *m_rom_sprite_lookup1; @@ -61,18 +39,32 @@ public: uint8_t *m_rom_clut0; uint8_t *m_rom_clut1; uint16_t m_control_word; - uint16_t m_apache3_rotate_ctrl[12]; uint8_t m_last_control; - uint8_t m_apache3_adc; - int m_apache3_rot_idx; tilemap_t *m_tx_layer; bitmap_rgb32 m_temp_bitmap; - std::unique_ptr m_apache3_road_x_ram; - uint8_t m_apache3_road_z; - std::unique_ptr m_roundup5_vram; - uint8_t m_roundupt_crt_selected_reg; - uint8_t m_roundupt_crt_reg[64]; std::unique_ptr m_shadow_pen_array; + DECLARE_WRITE16_MEMBER(text_w); + DECLARE_READ16_MEMBER(tatsumi_v30_68000_r); + DECLARE_WRITE16_MEMBER(tatsumi_v30_68000_w); + DECLARE_WRITE16_MEMBER(tatsumi_sprite_control_w); + TILE_GET_INFO_MEMBER(get_text_tile_info); + INTERRUPT_GEN_MEMBER(v30_interrupt); + DECLARE_READ8_MEMBER(tatsumi_hack_ym2151_r); + DECLARE_READ8_MEMBER(tatsumi_hack_oki_r); + void tatsumi_reset(); +}; + +class apache3_state : public tatsumi_state +{ +public: + apache3_state(const machine_config &mconfig, device_type type, const char *tag) + : tatsumi_state(mconfig, type, tag), + m_subcpu2(*this, "sub2"), + m_apache3_g_ram(*this, "apache3_g_ram"), + m_apache3_z80_ram(*this, "apache3_z80_ram") + { + } + DECLARE_READ16_MEMBER(apache3_bank_r); DECLARE_WRITE16_MEMBER(apache3_bank_w); DECLARE_WRITE16_MEMBER(apache3_z80_ctrl_w); @@ -83,34 +75,74 @@ public: DECLARE_READ8_MEMBER(apache3_adc_r); DECLARE_WRITE8_MEMBER(apache3_adc_w); DECLARE_WRITE16_MEMBER(apache3_rotate_w); + DECLARE_WRITE16_MEMBER(apache3_road_z_w); + DECLARE_WRITE8_MEMBER(apache3_road_x_w); + + DECLARE_DRIVER_INIT(apache3); + DECLARE_MACHINE_RESET(apache3); + DECLARE_VIDEO_START(apache3); + uint32_t screen_update_apache3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(apache3_68000_reset); + +private: + void draw_ground(bitmap_rgb32 &dst, const rectangle &cliprect); + + required_device m_subcpu2; + + optional_shared_ptr m_apache3_g_ram; + optional_shared_ptr m_apache3_z80_ram; + + uint16_t m_apache3_rotate_ctrl[12]; + uint8_t m_apache3_adc; + int m_apache3_rot_idx; + std::unique_ptr m_apache3_road_x_ram; + uint8_t m_apache3_road_z; +}; + +class roundup5_state : public tatsumi_state +{ +public: + roundup5_state(const machine_config &mconfig, device_type type, const char *tag) + : tatsumi_state(mconfig, type, tag), + m_roundup5_d0000_ram(*this, "ru5_d0000_ram"), + m_roundup5_e0000_ram(*this, "ru5_e0000_ram"), + m_roundup5_unknown0(*this, "ru5_unknown0"), + m_roundup5_unknown1(*this, "ru5_unknown1"), + m_roundup5_unknown2(*this, "ru5_unknown2"), + m_roundup_r_ram(*this, "roundup_r_ram"), + m_roundup_p_ram(*this, "roundup_p_ram"), + m_roundup_l_ram(*this, "roundup_l_ram") + { + } + DECLARE_READ16_MEMBER(roundup_v30_z80_r); DECLARE_WRITE16_MEMBER(roundup_v30_z80_w); DECLARE_WRITE16_MEMBER(roundup5_control_w); DECLARE_WRITE16_MEMBER(roundup5_d0000_w); DECLARE_WRITE16_MEMBER(roundup5_e0000_w); - DECLARE_WRITE8_MEMBER(cyclwarr_control_w); - DECLARE_READ16_MEMBER(tatsumi_v30_68000_r); - DECLARE_WRITE16_MEMBER(tatsumi_v30_68000_w); - DECLARE_WRITE16_MEMBER(tatsumi_sprite_control_w); - DECLARE_WRITE16_MEMBER(apache3_road_z_w); - DECLARE_WRITE8_MEMBER(apache3_road_x_w); DECLARE_READ16_MEMBER(roundup5_vram_r); DECLARE_WRITE16_MEMBER(roundup5_vram_w); - DECLARE_WRITE16_MEMBER(roundup5_text_w); DECLARE_WRITE16_MEMBER(roundup5_crt_w); + DECLARE_DRIVER_INIT(roundup5); - DECLARE_DRIVER_INIT(apache3); - TILE_GET_INFO_MEMBER(get_text_tile_info); - DECLARE_MACHINE_RESET(apache3); - DECLARE_VIDEO_START(apache3); DECLARE_VIDEO_START(roundup5); - uint32_t screen_update_apache3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_roundup5(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(roundup5_interrupt); - DECLARE_READ8_MEMBER(tatsumi_hack_ym2151_r); - DECLARE_READ8_MEMBER(tatsumi_hack_oki_r); - DECLARE_WRITE_LINE_MEMBER(apache3_68000_reset); - void tatsumi_reset(); + +private: + void draw_road(bitmap_rgb32 &bitmap, const rectangle &cliprect, bitmap_ind8 &shadow_bitmap); + + required_shared_ptr m_roundup5_d0000_ram; + required_shared_ptr m_roundup5_e0000_ram; + required_shared_ptr m_roundup5_unknown0; + required_shared_ptr m_roundup5_unknown1; + required_shared_ptr m_roundup5_unknown2; + required_shared_ptr m_roundup_r_ram; + required_shared_ptr m_roundup_p_ram; + required_shared_ptr m_roundup_l_ram; + + std::unique_ptr m_roundup5_vram; + uint8_t m_roundupt_crt_selected_reg; + uint8_t m_roundupt_crt_reg[64]; }; class cyclwarr_state : public tatsumi_state @@ -135,6 +167,7 @@ public: DECLARE_WRITE16_MEMBER(io1_byte_smear_w); DECLARE_WRITE16_MEMBER(io2_byte_smear_w); DECLARE_WRITE16_MEMBER(cyclwarr_sound_w); + DECLARE_WRITE8_MEMBER(cyclwarr_control_w); DECLARE_READ16_MEMBER(cyclwarr_videoram0_r); DECLARE_READ16_MEMBER(cyclwarr_videoram1_r); DECLARE_WRITE16_MEMBER(cyclwarr_videoram0_w); diff --git a/src/mame/machine/tatsumi.cpp b/src/mame/machine/tatsumi.cpp index a17a33ee903..1fe523e217a 100644 --- a/src/mame/machine/tatsumi.cpp +++ b/src/mame/machine/tatsumi.cpp @@ -12,22 +12,19 @@ void tatsumi_state::tatsumi_reset() { m_last_control = 0; m_control_word = 0; - m_apache3_adc = 0; - m_apache3_rot_idx = 0; save_item(NAME(m_last_control)); save_item(NAME(m_control_word)); - save_item(NAME(m_apache3_adc)); } /******************************************************************************/ -READ16_MEMBER(tatsumi_state::apache3_bank_r) +READ16_MEMBER(apache3_state::apache3_bank_r) { return m_control_word; } -WRITE16_MEMBER(tatsumi_state::apache3_bank_w) +WRITE16_MEMBER(apache3_state::apache3_bank_w) { /* 0x8000 - Set when accessing palette ram (not implemented, perhaps blank screen?) @@ -60,12 +57,12 @@ WRITE16_MEMBER(tatsumi_state::apache3_bank_w) // D1 = /ZBREQ - Z80 bus request // D0 = /GRDACC - Allow 68000 access to road pattern RAM -WRITE16_MEMBER(tatsumi_state::apache3_z80_ctrl_w) +WRITE16_MEMBER(apache3_state::apache3_z80_ctrl_w) { m_subcpu2->set_input_line(INPUT_LINE_HALT, data & 2 ? ASSERT_LINE : CLEAR_LINE); } -READ16_MEMBER(tatsumi_state::apache3_v30_v20_r) +READ16_MEMBER(apache3_state::apache3_v30_v20_r) { address_space &targetspace = m_audiocpu->space(AS_PROGRAM); @@ -81,7 +78,7 @@ READ16_MEMBER(tatsumi_state::apache3_v30_v20_r) return 0xff00 | targetspace.read_byte(offset); } -WRITE16_MEMBER(tatsumi_state::apache3_v30_v20_w) +WRITE16_MEMBER(apache3_state::apache3_v30_v20_w) { address_space &targetspace = m_audiocpu->space(AS_PROGRAM); @@ -95,17 +92,17 @@ WRITE16_MEMBER(tatsumi_state::apache3_v30_v20_w) } } -READ16_MEMBER(tatsumi_state::apache3_z80_r) +READ16_MEMBER(apache3_state::apache3_z80_r) { return m_apache3_z80_ram[offset]; } -WRITE16_MEMBER(tatsumi_state::apache3_z80_w) +WRITE16_MEMBER(apache3_state::apache3_z80_w) { m_apache3_z80_ram[offset] = data & 0xff; } -READ8_MEMBER(tatsumi_state::apache3_adc_r) +READ8_MEMBER(apache3_state::apache3_adc_r) { switch (m_apache3_adc) { @@ -122,7 +119,7 @@ READ8_MEMBER(tatsumi_state::apache3_adc_r) return 0; } -WRITE8_MEMBER(tatsumi_state::apache3_adc_w) +WRITE8_MEMBER(apache3_state::apache3_adc_w) { m_apache3_adc = offset; } @@ -133,7 +130,7 @@ WRITE8_MEMBER(tatsumi_state::apache3_adc_w) * presumably loaded into the 8 TZ2213 custom * accumulators and counters. */ -WRITE16_MEMBER(tatsumi_state::apache3_rotate_w) +WRITE16_MEMBER(apache3_state::apache3_rotate_w) { m_apache3_rotate_ctrl[m_apache3_rot_idx] = data; m_apache3_rot_idx = (m_apache3_rot_idx + 1) % 12; @@ -141,7 +138,7 @@ WRITE16_MEMBER(tatsumi_state::apache3_rotate_w) /******************************************************************************/ -READ16_MEMBER(tatsumi_state::roundup_v30_z80_r) +READ16_MEMBER(roundup5_state::roundup_v30_z80_r) { address_space &targetspace = m_audiocpu->space(AS_PROGRAM); @@ -152,7 +149,7 @@ READ16_MEMBER(tatsumi_state::roundup_v30_z80_r) return 0xff00 | targetspace.read_byte(offset); } -WRITE16_MEMBER(tatsumi_state::roundup_v30_z80_w) +WRITE16_MEMBER(roundup5_state::roundup_v30_z80_w) { address_space &targetspace = m_audiocpu->space(AS_PROGRAM); @@ -167,7 +164,7 @@ WRITE16_MEMBER(tatsumi_state::roundup_v30_z80_w) } -WRITE16_MEMBER(tatsumi_state::roundup5_control_w) +WRITE16_MEMBER(roundup5_state::roundup5_control_w) { COMBINE_DATA(&m_control_word); @@ -225,13 +222,13 @@ WRITE16_MEMBER(tatsumi_state::roundup5_control_w) m_last_control = m_control_word; } -WRITE16_MEMBER(tatsumi_state::roundup5_d0000_w) +WRITE16_MEMBER(roundup5_state::roundup5_d0000_w) { COMBINE_DATA(&m_roundup5_d0000_ram[offset]); // logerror("d_68k_d0000_w %06x %04x\n", space.device().safe_pc(), data); } -WRITE16_MEMBER(tatsumi_state::roundup5_e0000_w) +WRITE16_MEMBER(roundup5_state::roundup5_e0000_w) { /* Bit 0x10 is road bank select, Bit 0x100 is used, but unknown @@ -245,7 +242,7 @@ WRITE16_MEMBER(tatsumi_state::roundup5_e0000_w) /******************************************************************************/ -WRITE8_MEMBER(tatsumi_state::cyclwarr_control_w) +WRITE8_MEMBER(cyclwarr_state::cyclwarr_control_w) { m_control_word = data; diff --git a/src/mame/video/tatsumi.cpp b/src/mame/video/tatsumi.cpp index 84f37e6867b..4b7645cad5a 100644 --- a/src/mame/video/tatsumi.cpp +++ b/src/mame/video/tatsumi.cpp @@ -18,24 +18,24 @@ WRITE16_MEMBER(tatsumi_state::tatsumi_sprite_control_w) /******************************************************************************/ -WRITE16_MEMBER(tatsumi_state::apache3_road_z_w) +WRITE16_MEMBER(apache3_state::apache3_road_z_w) { m_apache3_road_z = data & 0xff; } -WRITE8_MEMBER(tatsumi_state::apache3_road_x_w) +WRITE8_MEMBER(apache3_state::apache3_road_x_w) { // Note: Double buffered. Yes, this is correct :) m_apache3_road_x_ram[data] = offset; } -READ16_MEMBER(tatsumi_state::roundup5_vram_r) +READ16_MEMBER(roundup5_state::roundup5_vram_r) { offset+=((m_control_word&0x0c00)>>10) * 0xc000; return m_roundup5_vram[offset]; } -WRITE16_MEMBER(tatsumi_state::roundup5_vram_w) +WRITE16_MEMBER(roundup5_state::roundup5_vram_w) { offset+=((m_control_word&0x0c00)>>10) * 0xc000; @@ -49,7 +49,7 @@ WRITE16_MEMBER(tatsumi_state::roundup5_vram_w) m_gfxdecode->gfx(1)->mark_dirty(offset/0x10); } -WRITE16_MEMBER(tatsumi_state::roundup5_text_w) +WRITE16_MEMBER(tatsumi_state::text_w) { uint16_t *videoram = m_videoram; COMBINE_DATA(&videoram[offset]); @@ -86,7 +86,7 @@ WRITE16_MEMBER(cyclwarr_state::cyclwarr_videoram1_w) } } -WRITE16_MEMBER(tatsumi_state::roundup5_crt_w) +WRITE16_MEMBER(roundup5_state::roundup5_crt_w) { if (offset==0 && ACCESSING_BITS_0_7) m_roundupt_crt_selected_reg=data&0x3f; @@ -125,7 +125,7 @@ TILE_GET_INFO_MEMBER(cyclwarr_state::get_tile_info_bigfight_1) /********************************************************************/ -VIDEO_START_MEMBER(tatsumi_state,apache3) +VIDEO_START_MEMBER(apache3_state,apache3) { m_tx_layer = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_text_tile_info),this),TILEMAP_SCAN_ROWS,8,8,64,64); m_shadow_pen_array = make_unique_clear(8192); @@ -135,7 +135,7 @@ VIDEO_START_MEMBER(tatsumi_state,apache3) m_tx_layer->set_transparent_pen(0); } -VIDEO_START_MEMBER(tatsumi_state,roundup5) +VIDEO_START_MEMBER(roundup5_state,roundup5) { m_tx_layer = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(tatsumi_state::get_text_tile_info),this),TILEMAP_SCAN_ROWS,8,8,128,64); m_shadow_pen_array = make_unique_clear(8192); @@ -644,9 +644,8 @@ start_offset-=48; } } -static void draw_road(running_machine &machine, bitmap_rgb32 &bitmap,const rectangle &cliprect,bitmap_ind8 &shadow_bitmap) +void roundup5_state::draw_road(bitmap_rgb32 &bitmap, const rectangle &cliprect, bitmap_ind8 &shadow_bitmap) { - tatsumi_state *state = machine.driver_data(); /* 0xf980 0x0008 0x8c80 0x4a00 - road right to below, width unknown (32 pixels guess) 0xfa80 0x0008 0x8c80 0x4a00 - road right to below, width unknown (32 pixels guess) @@ -704,18 +703,18 @@ pos is 11.5 fixed point */ int y,x; int visible_line=0; - const uint16_t* data=state->m_roundup_r_ram; + const uint16_t *data = m_roundup_r_ram; // Road layer enable (?) - if ((state->m_roundup5_unknown0[0x1]&0x1)==0) + if ((m_roundup5_unknown0[0x1]&0x1)==0) return; // Road data bank select (double buffered) - if (state->m_roundup5_e0000_ram[0]&0x10) + if (m_roundup5_e0000_ram[0]&0x10) data+=0x400; // ?? Todo: This is wrong - don't know how to clip the road properly - y=256 - (state->m_roundup5_unknown0[0xb/2] >> 8); + y=256 - (m_roundup5_unknown0[0xb/2] >> 8); data+=y*4; visible_line=0; @@ -726,10 +725,10 @@ pos is 11.5 fixed point int pal=4; //(data[3]>>8)&0xf; int step=((data[1]&0xff)<<8)|((data[1]&0xff00)>>8); int samplePos=0; - const uint16_t* linedata=state->m_roundup_p_ram;// + (0x100 * pal); + const uint16_t* linedata=m_roundup_p_ram;// + (0x100 * pal); int startPos=0, endPos=0; - int palette_byte;//=state->m_roundup_l_ram[visible_line/8]; + int palette_byte;//=m_roundup_l_ram[visible_line/8]; /* Each road line consists of up to two sets of 128 pixel data that can be positioned @@ -754,7 +753,7 @@ offset is from last pixel of first road segment? */ - palette_byte=state->m_roundup_l_ram[visible_line/8]; + palette_byte=m_roundup_l_ram[visible_line/8]; pal=4 + ((palette_byte>>(visible_line%8))&1); visible_line++; @@ -771,9 +770,9 @@ offset is from last pixel of first road segment? int col = linedata[0]&0xf; uint8_t shadow=shadow_bitmap.pix8(y, x); if (shadow) - bitmap.pix32(y, x) = state->m_palette->pen(768 + pal*16 + col); + bitmap.pix32(y, x) = m_palette->pen(768 + pal*16 + col); else - bitmap.pix32(y, x) = state->m_palette->pen(256 + pal*16 + col); + bitmap.pix32(y, x) = m_palette->pen(256 + pal*16 + col); } /* If startpos is negative, clip it and adjust the sampling position accordingly */ @@ -795,9 +794,9 @@ offset is from last pixel of first road segment? // col=linedata[0x7f]&0xf; if (shadow) - bitmap.pix32(y, x) = state->m_palette->pen(768 + pal*16 + col); + bitmap.pix32(y, x) = m_palette->pen(768 + pal*16 + col); else - bitmap.pix32(y, x) = state->m_palette->pen(256 + pal*16 + col); + bitmap.pix32(y, x) = m_palette->pen(256 + pal*16 + col); samplePos+=step; } @@ -826,9 +825,9 @@ offset is from last pixel of first road segment? // col=linedata[0x7f]&0xf; if (shadow) - bitmap.pix32(y, x) = state->m_palette->pen(768 + pal*16 + col + 32); + bitmap.pix32(y, x) = m_palette->pen(768 + pal*16 + col + 32); else - bitmap.pix32(y, x) = state->m_palette->pen(256 + pal*16 + col + 32); + bitmap.pix32(y, x) = m_palette->pen(256 + pal*16 + col + 32); } if (endPos<0) { @@ -850,9 +849,9 @@ offset is from last pixel of first road segment? col=linedata[0x7f + 0x200]&0xf; if (shadow) - bitmap.pix32(y, x) = state->m_palette->pen(768 + pal*16 + col + 32); + bitmap.pix32(y, x) = m_palette->pen(768 + pal*16 + col + 32); else - bitmap.pix32(y, x) = state->m_palette->pen(256 + pal*16 + col + 32); + bitmap.pix32(y, x) = m_palette->pen(256 + pal*16 + col + 32); samplePos+=step; } @@ -934,28 +933,27 @@ static void draw_bg(running_machine &machine, bitmap_rgb32 &dst, tilemap_t *src, } /* Draw the sky and ground, applying rotation (eventually). Experimental! */ -#if 0 -static void draw_ground(running_machine &machine, bitmap_rgb32 &dst, const rectangle &cliprect) +void apache3_state::draw_ground(bitmap_rgb32 &dst, const rectangle &cliprect) { - tatsumi_state *state = machine.driver_data(); +if (0) { int x, y; - const uint8_t *lut = state->memregion("proms")->base(); + const uint8_t *lut = memregion("proms")->base(); uint16_t gva = 0x180; // TODO - uint8_t sky_val = state->m_apache3_rotate_ctrl[1] & 0xff; + uint8_t sky_val = m_apache3_rotate_ctrl[1] & 0xff; for (y = cliprect.min_y; y <= cliprect.max_y; ++y) { - uint16_t rgdb = 0;//state->m_apache3_road_x_ram[gva & 0xff]; + uint16_t rgdb = 0;//m_apache3_road_x_ram[gva & 0xff]; uint16_t gha = 0xf60; // test - int ln = (((lut[gva & 0x7f] & 0x7f) + (state->m_apache3_road_z & 0x7f)) >> 5) & 3; + int ln = (((lut[gva & 0x7f] & 0x7f) + (m_apache3_road_z & 0x7f)) >> 5) & 3; if (gva & 0x100) { /* Sky */ for (x = cliprect.min_x; x <= cliprect.max_x; ++x) { - dst.pix32(y, x) = machine.pens[0x100 + (sky_val & 0x7f)]; + dst.pix32(y, x) = m_palette->pen(0x100 + (sky_val & 0x7f)); /* Update horizontal counter? */ gha = (gha + 1) & 0xfff; @@ -975,17 +973,17 @@ static void draw_ground(running_machine &machine, bitmap_rgb32 &dst, const recta if (hval & 0x800) hval ^= 0x1ff; // TEST - else - hval = hval; + //else + //hval = hval; - pixels = state->m_apache3_g_ram[(((gva & 0xff) << 7) | ((hval >> 2) & 0x7f))]; + pixels = m_apache3_g_ram[(((gva & 0xff) << 7) | ((hval >> 2) & 0x7f))]; pix_sel = hval & 3; colour = (pixels >> (pix_sel << 1)) & 3; colour = (BIT(hval, 11) << 4) | (colour << 2) | ln; /* Draw the pixel */ - dst.pix32(y, x) = machine.pens[0x200 + colour]; + dst.pix32(y, x) = m_palette->pen(0x200 + colour); /* Update horizontal counter */ gha = (gha + 1) & 0xfff; @@ -997,10 +995,11 @@ static void draw_ground(running_machine &machine, bitmap_rgb32 &dst, const recta gva = (gva + 1) & 0x1ff; } } -#endif +} + /**********************************************************************/ -uint32_t tatsumi_state::screen_update_apache3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t apache3_state::screen_update_apache3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { update_cluts(machine(), 1024, 0, 2048); @@ -1014,7 +1013,7 @@ uint32_t tatsumi_state::screen_update_apache3(screen_device &screen, bitmap_rgb3 return 0; } -uint32_t tatsumi_state::screen_update_roundup5(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t roundup5_state::screen_update_roundup5(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { // uint16_t bg_x_scroll=m_roundup5_unknown1[0]; // uint16_t bg_y_scroll=m_roundup5_unknown2[0]; @@ -1028,7 +1027,7 @@ uint32_t tatsumi_state::screen_update_roundup5(screen_device &screen, bitmap_rgb screen.priority().fill(0, cliprect); draw_sprites(machine(), screen.priority(),cliprect,1,(m_sprite_control_ram[0xe0]&0x1000) ? 0x1000 : 0); // Alpha pass only - draw_road(machine(), bitmap,cliprect,screen.priority()); + draw_road(bitmap,cliprect,screen.priority()); draw_sprites(machine(), bitmap,cliprect,0,(m_sprite_control_ram[0xe0]&0x1000) ? 0x1000 : 0); // Full pass m_tx_layer->draw(screen, bitmap, cliprect, 0,0); return 0; -- cgit v1.2.3-70-g09d2 From b744721b1f9ad255145d84a26d9b20270a83f287 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 13:49:51 -0500 Subject: Forgot to make these pointers required (nw) --- src/mame/includes/tatsumi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/includes/tatsumi.h b/src/mame/includes/tatsumi.h index 24f4d80f59a..3bce4e3da2f 100644 --- a/src/mame/includes/tatsumi.h +++ b/src/mame/includes/tatsumi.h @@ -89,8 +89,8 @@ private: required_device m_subcpu2; - optional_shared_ptr m_apache3_g_ram; - optional_shared_ptr m_apache3_z80_ram; + required_shared_ptr m_apache3_g_ram; + required_shared_ptr m_apache3_z80_ram; uint16_t m_apache3_rotate_ctrl[12]; uint8_t m_apache3_adc; -- cgit v1.2.3-70-g09d2 From 36f4e527b0627f9d26c292bc416df2b023d5cb4e Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 4 Dec 2017 20:54:54 +0100 Subject: New working machines ----------- Batman Forever (Tiger handheld) [hap, Sean Riddle] --- src/mame/drivers/hh_sm510.cpp | 255 +++++++++++++++++++++++++++++------------- src/mame/mame.lst | 1 + 2 files changed, 180 insertions(+), 76 deletions(-) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index 6446801089f..c7637b3653e 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -13,7 +13,6 @@ TODO: - improve LCD segments in SVGs for: gnw_mc25, gnw_eg26, exospace - confirm gnw_mc25/gnw_eg26 rom (dumped from Soviet clone, but pretty confident that it's same) - - some of the Tiger games release years are uncertain ***************************************************************************/ @@ -1602,13 +1601,14 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Gauntlet + Tiger Gauntlet (model 7-778) * Sharp SM510 under epoxy (die label CMS54C, KMS583) * lcd screen with custom segments, 1-bit sound known releases: - World: Gauntlet - Japan: Gauntlet (published by Sega) + - UK: Gauntlet (published by Grandstand) ***************************************************************************/ @@ -1699,7 +1699,7 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Double Dragon + Tiger Double Dragon (model 7-780) * Sharp SM510 under epoxy (die label CMS54C, KMS570, KMS593) * lcd screen with custom segments, 1-bit sound @@ -1787,7 +1787,7 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Batman + Tiger Batman (model 7-799) * Sharp SM510 under epoxy (die label CMS54C, KMS597) * lcd screen with custom segments, 1-bit sound @@ -1874,30 +1874,30 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Altered Beast - * Sharp SM510 under epoxy (die label M88) + Tiger Space Harrier II (model 7-814) + * Sharp SM510 under epoxy (die label M91) * lcd screen with custom segments, 1-bit sound known releases: - - World: Altered Beast - - Japan: Juuouki (published by Sega) + - World: Space Harrier II + - Japan: Space Harrier (published by Sega) ***************************************************************************/ -class taltbeast_state : public hh_sm510_state +class tsharr2_state : public hh_sm510_state { public: - taltbeast_state(const machine_config &mconfig, device_type type, const char *tag) + tsharr2_state(const machine_config &mconfig, device_type type, const char *tag) : hh_sm510_state(mconfig, type, tag) { - m_inp_lines = 6; - m_inp_fixed = 6; + m_inp_lines = 5; + m_inp_fixed = 5; } }; // config -static INPUT_PORTS_START( taltbeast ) +static INPUT_PORTS_START( tsharr2 ) PORT_START("IN.0") // S1 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -1912,19 +1912,14 @@ static INPUT_PORTS_START( taltbeast ) PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // S4 - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Punch Right") - PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Attack + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.4") // S5 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Kick/Attack") - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Punch Left") - PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("IN.5") // S6 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Max Score") PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_START("IN.6") // GND! + PORT_START("IN.5") // GND! PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") @@ -1938,7 +1933,7 @@ static INPUT_PORTS_START( taltbeast ) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") INPUT_PORTS_END -static MACHINE_CONFIG_START( taltbeast ) +static MACHINE_CONFIG_START( tsharr2 ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) @@ -1946,14 +1941,15 @@ static MACHINE_CONFIG_START( taltbeast ) MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_R_DIRECT_CONTROL(true) MCFG_SM510_READ_BA_CB(IOPORT("BA")) MCFG_SM510_READ_B_CB(IOPORT("B")) /* video hardware */ MCFG_SCREEN_SVG_ADD("screen", "svg") MCFG_SCREEN_REFRESH_RATE(50) - MCFG_SCREEN_SIZE(1455, 1080) - MCFG_SCREEN_VISIBLE_AREA(0, 1455-1, 0, 1080-1) + MCFG_SCREEN_SIZE(1493, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1493-1, 0, 1080-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_svg) @@ -1970,30 +1966,30 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Space Harrier II - * Sharp SM510 under epoxy (die label M91) + Tiger Altered Beast (model 7-831) + * Sharp SM510 under epoxy (die label M88) * lcd screen with custom segments, 1-bit sound known releases: - - World: Space Harrier II - - Japan: Space Harrier (published by Sega) + - World: Altered Beast + - Japan: Juuouki (published by Sega) ***************************************************************************/ -class tsharr2_state : public hh_sm510_state +class taltbeast_state : public hh_sm510_state { public: - tsharr2_state(const machine_config &mconfig, device_type type, const char *tag) + taltbeast_state(const machine_config &mconfig, device_type type, const char *tag) : hh_sm510_state(mconfig, type, tag) { - m_inp_lines = 5; - m_inp_fixed = 5; + m_inp_lines = 6; + m_inp_fixed = 6; } }; // config -static INPUT_PORTS_START( tsharr2 ) +static INPUT_PORTS_START( taltbeast ) PORT_START("IN.0") // S1 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -2008,14 +2004,19 @@ static INPUT_PORTS_START( tsharr2 ) PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // S4 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Attack - PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Punch Right") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.4") // S5 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Max Score") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Kick/Attack") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Punch Left") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_START("IN.5") // GND! + PORT_START("IN.6") // GND! PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") @@ -2029,7 +2030,7 @@ static INPUT_PORTS_START( tsharr2 ) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") INPUT_PORTS_END -static MACHINE_CONFIG_START( tsharr2 ) +static MACHINE_CONFIG_START( taltbeast ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) @@ -2037,15 +2038,14 @@ static MACHINE_CONFIG_START( tsharr2 ) MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) - MCFG_SM510_R_DIRECT_CONTROL(true) MCFG_SM510_READ_BA_CB(IOPORT("BA")) MCFG_SM510_READ_B_CB(IOPORT("B")) /* video hardware */ MCFG_SCREEN_SVG_ADD("screen", "svg") MCFG_SCREEN_REFRESH_RATE(50) - MCFG_SCREEN_SIZE(1493, 1080) - MCFG_SCREEN_VISIBLE_AREA(0, 1493-1, 0, 1080-1) + MCFG_SCREEN_SIZE(1455, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1455-1, 0, 1080-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_svg) @@ -2062,7 +2062,7 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Swamp Thing + Tiger Swamp Thing (model 7-851) * Sharp SM510 under epoxy (die label MB0) * lcd screen with custom segments, 1-bit sound @@ -2150,7 +2150,7 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Sonic The Hedgehog + Tiger Sonic The Hedgehog (model 78-513) * Sharp SM511 under epoxy (die label KMS73B, N71) * lcd screen with custom segments, 2-bit sound @@ -2268,29 +2268,30 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Space Jam - * Sharp SM510 under epoxy (die label KMS10, 23) + Tiger Batman Forever - Double Dose of Doom (model 78-572) + * Sharp SM510 under epoxy (die label MK3) * lcd screen with custom segments, 1-bit sound ***************************************************************************/ -class tsjam_state : public hh_sm510_state +class tbatfor_state : public hh_sm510_state { public: - tsjam_state(const machine_config &mconfig, device_type type, const char *tag) + tbatfor_state(const machine_config &mconfig, device_type type, const char *tag) : hh_sm510_state(mconfig, type, tag) { - m_inp_lines = 5; - m_inp_fixed = 5; + m_inp_lines = 6; + m_inp_fixed = 6; } }; // config -static INPUT_PORTS_START( tsjam ) +static INPUT_PORTS_START( tbatfor ) PORT_START("IN.0") // S1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Grappling Gun") PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) - PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0a, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.1") // S2 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) @@ -2302,15 +2303,19 @@ static INPUT_PORTS_START( tsjam ) PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // S4 - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shoot/Block") - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Tune/Steal") - PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Help") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Batarang") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Thruster") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_START("IN.5") // GND! + PORT_START("IN.6") // GND! PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") @@ -2324,10 +2329,10 @@ static INPUT_PORTS_START( tsjam ) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") INPUT_PORTS_END -static MACHINE_CONFIG_START( tsjam ) +static MACHINE_CONFIG_START( tbatfor ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) // no external XTAL + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) @@ -2338,8 +2343,8 @@ static MACHINE_CONFIG_START( tsjam ) /* video hardware */ MCFG_SCREEN_SVG_ADD("screen", "svg") MCFG_SCREEN_REFRESH_RATE(50) - MCFG_SCREEN_SIZE(1421, 1080) - MCFG_SCREEN_VISIBLE_AREA(0, 1421-1, 0, 1080-1) + MCFG_SCREEN_SIZE(1493, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1493-1, 0, 1080-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_svg) @@ -2356,7 +2361,7 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Judge Dredd + Tiger Judge Dredd (model 78-581) * Sharp SM510 under epoxy (die label MKS) * lcd screen with custom segments, 1-bit sound @@ -2447,6 +2452,94 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Space Jam (model 78-621) + * Sharp SM510 under epoxy (die label KMS10, 23) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class tsjam_state : public hh_sm510_state +{ +public: + tsjam_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 5; + m_inp_fixed = 5; + } +}; + +// config + +static INPUT_PORTS_START( tsjam ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shoot/Block") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Tune/Steal") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tsjam ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) // no external XTAL + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1421, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1421-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Game driver(s) @@ -2705,21 +2798,21 @@ ROM_START( tbatman ) ROM_END -ROM_START( taltbeast ) +ROM_START( tsharr2 ) ROM_REGION( 0x1000, "maincpu", 0 ) - ROM_LOAD( "m88", 0x0000, 0x1000, CRC(1b3d15e7) SHA1(78371230dff872d6c07eefdbc4856c2a3336eb61) ) + ROM_LOAD( "m91", 0x0000, 0x1000, CRC(b207ac79) SHA1(9889dfec26089313ba2bdac845a75a26742d09e1) ) - ROM_REGION( 668221, "svg", 0) - ROM_LOAD( "taltbeast.svg", 0, 668221, CRC(9b41b5b9) SHA1(4c520f917572894a2f0ab92efbd344c6bc6deccc) ) + ROM_REGION( 555126, "svg", 0) + ROM_LOAD( "tsharr2.svg", 0, 555126, CRC(ff43e29b) SHA1(0af02e65a1dcf95958296a292343430670b67ae5) ) ROM_END -ROM_START( tsharr2 ) +ROM_START( taltbeast ) ROM_REGION( 0x1000, "maincpu", 0 ) - ROM_LOAD( "m91", 0x0000, 0x1000, CRC(b207ac79) SHA1(9889dfec26089313ba2bdac845a75a26742d09e1) ) + ROM_LOAD( "m88", 0x0000, 0x1000, CRC(1b3d15e7) SHA1(78371230dff872d6c07eefdbc4856c2a3336eb61) ) - ROM_REGION( 516897, "svg", 0) - ROM_LOAD( "tsharr2.svg", 0, 516897, CRC(f2d103e4) SHA1(a218b7f51edc2a1e9093ca4930c812e859d997bd) ) + ROM_REGION( 668221, "svg", 0) + ROM_LOAD( "taltbeast.svg", 0, 668221, CRC(9b41b5b9) SHA1(4c520f917572894a2f0ab92efbd344c6bc6deccc) ) ROM_END @@ -2744,12 +2837,12 @@ ROM_START( tsonic ) ROM_END -ROM_START( tsjam ) +ROM_START( tbatfor ) ROM_REGION( 0x1000, "maincpu", 0 ) - ROM_LOAD( "10_23", 0x0000, 0x1000, CRC(6eaabfbd) SHA1(f0ecbd6f65fe72ce2d8a452685be2e77a63fc9f0) ) + ROM_LOAD( "mk3", 0x0000, 0x1000, CRC(9993c382) SHA1(0c89e21024315ce7c086af5390c60f5766028c4f) ) - ROM_REGION( 1044643, "svg", 0) - ROM_LOAD( "tsjam.svg", 0, 1044643, CRC(f91d9429) SHA1(57a843673bf4c5753ae795d49da29ceb6fe095f3) ) + ROM_REGION( 876501, "svg", 0) + ROM_LOAD( "tbatfor.svg", 0, 876501, CRC(2506eb20) SHA1(329dddc514d9c0c6e658b489059371b18b45d301) ) ROM_END @@ -2762,6 +2855,15 @@ ROM_START( tjdredd ) ROM_END +ROM_START( tsjam ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "10_23", 0x0000, 0x1000, CRC(6eaabfbd) SHA1(f0ecbd6f65fe72ce2d8a452685be2e77a63fc9f0) ) + + ROM_REGION( 1044643, "svg", 0) + ROM_LOAD( "tsjam.svg", 0, 1044643, CRC(f91d9429) SHA1(57a843673bf4c5753ae795d49da29ceb6fe095f3) ) +ROM_END + + // YEAR NAME PARENT COMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS CONS( 1989, kdribble, 0, 0, kdribble, kdribble, kdribble_state, 0, "Konami", "Double Dribble (handheld)", MACHINE_SUPPORTS_SAVE ) @@ -2793,9 +2895,10 @@ CONS( 1984, gnw_bx301, 0, 0, bx301, bx301, bx301_state, 0, "N CONS( 1988, tgaunt, 0, 0, tgaunt, tgaunt, tgaunt_state, 0, "Tiger Electronics (licensed from Tengen)", "Gauntlet (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1988, tddragon, 0, 0, tddragon, tddragon, tddragon_state, 0, "Tiger Electronics (licensed from Tradewest/Technos)", "Double Dragon (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1989, tbatman, 0, 0, tbatman, tbatman, tbatman_state, 0, "Tiger Electronics", "Batman (handheld)", MACHINE_SUPPORTS_SAVE ) -CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, tsharr2, 0, 0, tsharr2, tsharr2, tsharr2_state, 0, "Tiger Electronics (licensed from Sega)", "Space Harrier II (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tswampt, 0, 0, tswampt, tswampt, tswampt_state, 0, "Tiger Electronics", "Swamp Thing (handheld)", MACHINE_SUPPORTS_SAVE ) -CONS( 1991, tsonic, 0, 0, tsonic, tsonic, tsonic_state, 0, "Tiger Electronics (licensed from Sega)", "Sonic The Hedgehog (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1992, tsonic, 0, 0, tsonic, tsonic, tsonic_state, 0, "Tiger Electronics (licensed from Sega)", "Sonic The Hedgehog (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1995, tbatfor, 0, 0, tbatfor, tbatfor, tbatfor_state, 0, "Tiger Electronics", "Batman Forever - Double Dose of Doom", MACHINE_SUPPORTS_SAVE ) +CONS( 1995, tjdredd, 0, 0, tjdredd, tjdredd, tjdredd_state, 0, "Tiger Electronics", "Judge Dredd (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1996, tsjam, 0, 0, tsjam, tsjam, tsjam_state, 0, "Tiger Electronics", "Space Jam (handheld)", MACHINE_SUPPORTS_SAVE ) -CONS( 1998, tjdredd, 0, 0, tjdredd, tjdredd, tjdredd_state, 0, "Tiger Electronics", "Judge Dredd (handheld)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index fd268160622..e8257884a7f 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14706,6 +14706,7 @@ ktmnt // Konami ktopgun // Konami nupogodi // Elektronika taltbeast // Tiger +tbatfor // Tiger tbatman // Tiger tddragon // Tiger tgaunt // Tiger -- cgit v1.2.3-70-g09d2 From cfe3d49345766a05328c8d1d16cd813b9d69168a Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 21:04:02 +0100 Subject: e132xs: drc impl of lddp op, nw --- src/devices/cpu/e132xs/e132xsop.hxx | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index 9d55b78d233..128b25d2f43 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -2442,8 +2442,10 @@ void hyperstone_device::hyperstone_lddp() else { const uint32_t srcf_code = (src_code + 1) & 0x3f; - m_local_regs[src_code] = READ_W(dreg); - m_local_regs[srcf_code] = READ_W(dreg + 4); + uint32_t one = READ_W(dreg); + uint32_t two = READ_W(dreg + 4); + m_local_regs[src_code] = one; + m_local_regs[srcf_code] = two; // post increment the destination register if it's different from the source one // and from the "next source" one -- cgit v1.2.3-70-g09d2 From b477ae7dae3e9a85ed690baf8395eb59e6a50f2c Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 21:51:06 +0100 Subject: e132xs: reverted the wrong file, this one actually has drc lddp op, nw --- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 49 ++++++++++++++++++++++++++++++++ src/devices/cpu/e132xs/e132xsop.hxx | 6 ++-- 2 files changed, 51 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index c70c234140e..1607c8ea865 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -1715,6 +1715,55 @@ void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I1, I0, dst_code); + UML_AND(block, I2, I1, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + + UML_ADD(block, I3, I0, 8); + UML_CALLH(block, *m_mem_read32); + UML_MOV(block, I2, I1); // I2: dreg[0] + UML_ADD(block, I0, I0, 4); + UML_CALLH(block, *m_mem_read32); // I1: dreg[4] + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_MOV(block, I5, I2); + generate_set_global_register(block, compiler, desc); + UML_MOV(block, I4, src_code + 1); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I1, I0, dst_code); + UML_AND(block, I2, I1, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I3, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I4, I0, src_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I4, I0, src_code + 1); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I1, SIZE_DWORD, SCALE_x4); + + if (src_code != dst_code && (src_code + 1) != dst_code) + { + UML_ADD(block, I4, I0, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I3, SIZE_DWORD, SCALE_x4); + } + } } diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx index 128b25d2f43..9d55b78d233 100644 --- a/src/devices/cpu/e132xs/e132xsop.hxx +++ b/src/devices/cpu/e132xs/e132xsop.hxx @@ -2442,10 +2442,8 @@ void hyperstone_device::hyperstone_lddp() else { const uint32_t srcf_code = (src_code + 1) & 0x3f; - uint32_t one = READ_W(dreg); - uint32_t two = READ_W(dreg + 4); - m_local_regs[src_code] = one; - m_local_regs[srcf_code] = two; + m_local_regs[src_code] = READ_W(dreg); + m_local_regs[srcf_code] = READ_W(dreg + 4); // post increment the destination register if it's different from the source one // and from the "next source" one -- cgit v1.2.3-70-g09d2 From 971ef4643f7a1092259ca2df463fbd6d7db9dcac Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 16:06:24 -0500 Subject: idsa.cpp: Random fixes (nw) --- src/mame/drivers/idsa.cpp | 81 +++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 71 insertions(+), 10 deletions(-) diff --git a/src/mame/drivers/idsa.cpp b/src/mame/drivers/idsa.cpp index 024150bae00..ee1ffc1dcc3 100644 --- a/src/mame/drivers/idsa.cpp +++ b/src/mame/drivers/idsa.cpp @@ -9,8 +9,8 @@ Hardware: --------- CPU: Z80 @ 4 MHz INT: IRQ @ 977 Hz (4MHz/2048/2) or 488 Hz (4MHz/2048/4) -DRIVERS: 2 x 8255 driving lamps and coils, used as demultiplexers only (no read access) -DISPLAY: bsktball: 7-digit 7-segment panels with PROM-based 5-bit BCD data (allowing a simple alphabet) +DRIVERS: bsktbllp: 2 x 8255 driving lamps and coils, used as demultiplexers only (no read access) +DISPLAY: bsktbllp: 7-digit 7-segment panels with PROM-based 5-bit BCD data (allowing a simple alphabet) v1: 6-digit 7-segment panels with BCD decoding SOUND: 2 x AY8910 @ 2 MHz (also used as output interface) plus SP0256 @ 3.12 MHz on board @@ -50,6 +50,14 @@ public: DECLARE_READ8_MEMBER(portb0_r); DECLARE_WRITE8_MEMBER(port80_w); DECLARE_WRITE8_MEMBER(port90_w); + DECLARE_WRITE8_MEMBER(ppi_control_w); + DECLARE_WRITE8_MEMBER(ppi_data_w); + DECLARE_WRITE8_MEMBER(ppi1_a_w); + DECLARE_WRITE8_MEMBER(ppi1_b_w); + DECLARE_WRITE8_MEMBER(ppi1_c_w); + DECLARE_WRITE8_MEMBER(ppi2_a_w); + DECLARE_WRITE8_MEMBER(ppi2_b_w); + DECLARE_WRITE8_MEMBER(ppi2_c_w); DECLARE_WRITE8_MEMBER(ay1_a_w); DECLARE_WRITE8_MEMBER(ay1_b_w); DECLARE_WRITE8_MEMBER(ay2_a_w); @@ -62,7 +70,7 @@ private: uint8_t m_ppi_data; required_device m_maincpu; required_device m_speech; - required_device_array m_ppi; + optional_device_array m_ppi; }; static ADDRESS_MAP_START( maincpu_map, AS_PROGRAM, 8, idsa_state ) @@ -231,7 +239,7 @@ WRITE8_MEMBER( idsa_state::port90_w ) } // AY ports are for lamps and solenoids -WRITE8_MEMBER( idsa_state::ay1_a_w ) +WRITE8_MEMBER( idsa_state::ppi_control_w ) { //logerror("%s: AY1 port A = %02X\n", machine().describe_context(), data); if (!BIT(data, 2)) @@ -240,11 +248,51 @@ WRITE8_MEMBER( idsa_state::ay1_a_w ) m_ppi[1]->write(space, data & 0x03, m_ppi_data); } -WRITE8_MEMBER( idsa_state::ay1_b_w ) +WRITE8_MEMBER( idsa_state::ppi_data_w ) { m_ppi_data = data; } +WRITE8_MEMBER( idsa_state::ppi1_a_w ) +{ + logerror("%s: PPI1 port A = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ppi1_b_w ) +{ + logerror("%s: PPI1 port B = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ppi1_c_w ) +{ + logerror("%s: PPI1 port C = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ppi2_a_w ) +{ + logerror("%s: PPI2 port A = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ppi2_b_w ) +{ + logerror("%s: PPI2 port B = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ppi2_c_w ) +{ + logerror("%s: PPI2 port C = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ay1_a_w ) +{ + //logerror("%s: AY1 port A = %02X\n", machine().describe_context(), data); +} + +WRITE8_MEMBER( idsa_state::ay1_b_w ) +{ + //logerror("%s: AY1 port B = %02X\n", machine().describe_context(), data); +} + WRITE8_MEMBER( idsa_state::ay2_a_w ) { //logerror("%s: AY2 port A = %02X\n", machine().describe_context(), data); @@ -291,21 +339,33 @@ static MACHINE_CONFIG_START( idsa ) /* sound hardware */ MCFG_FRAGMENT_ADD( genpin_audio ) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") - MCFG_SOUND_ADD("speech", SP0256, 3120000) + MCFG_SOUND_ADD("speech", SP0256, 3120000) // unknown variant MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.5) MCFG_SOUND_ADD("aysnd1", AY8910, 2000000) // 2Mhz according to pinmame, schematic omits the clock line - MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(idsa_state, ay1_a_w)) - MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(idsa_state, ay1_b_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.75) MCFG_SOUND_ADD("aysnd2", AY8910, 2000000) + MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(idsa_state, ay1_a_w)) + MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(idsa_state, ay1_b_w)) MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(idsa_state, ay2_a_w)) MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(idsa_state, ay2_b_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.75) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( bsktbllp, idsa ) + MCFG_DEVICE_MODIFY("aysnd1") + MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(idsa_state, ppi_control_w)) + MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(idsa_state, ppi_data_w)) MCFG_DEVICE_ADD("ppi1", I8255, 0) + MCFG_I8255_OUT_PORTA_CB(WRITE8(idsa_state, ppi1_a_w)) + MCFG_I8255_OUT_PORTB_CB(WRITE8(idsa_state, ppi1_b_w)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(idsa_state, ppi1_c_w)) MCFG_DEVICE_ADD("ppi2", I8255, 0) + MCFG_I8255_OUT_PORTA_CB(WRITE8(idsa_state, ppi2_a_w)) + MCFG_I8255_OUT_PORTB_CB(WRITE8(idsa_state, ppi2_b_w)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(idsa_state, ppi2_c_w)) MACHINE_CONFIG_END @@ -320,11 +380,12 @@ ROM_END ROM_START(bsktbllp) ROM_REGION(0x8000, "maincpu", 0) ROM_LOAD("bsktball.256", 0x0000, 0x8000, CRC(d474e29b) SHA1(750cbacef34dde0b3dcb6c1e4679db78a73643fd)) + ROM_FILL(0x0cb8, 1, 0x3e) // patch suspicious LD that fetches a bad AY address ROM_REGION(0x10000, "speech", 0) ROM_LOAD( "sp0256a-al2.1b", 0x1000, 0x0800, CRC(b504ac15) SHA1(e60fcb5fa16ff3f3b69d36c7a6e955744d3feafc) ) ROM_END -GAME( 1985, v1, 0, idsa, idsa, idsa_state, 0, ROT0, "IDSA", "V.1", MACHINE_IS_SKELETON_MECHANICAL ) -GAME( 1987, bsktbllp, 0, idsa, idsa, idsa_state, 0, ROT0, "IDSA", "Basket Ball", MACHINE_IS_SKELETON_MECHANICAL ) +GAME( 1985, v1, 0, idsa, idsa, idsa_state, 0, ROT0, "IDSA", "V.1", MACHINE_IS_SKELETON_MECHANICAL ) +GAME( 1987, bsktbllp, 0, bsktbllp, idsa, idsa_state, 0, ROT0, "IDSA", "Basket Ball", MACHINE_IS_SKELETON_MECHANICAL ) -- cgit v1.2.3-70-g09d2 From d57860efc2c827b9996894accfd798d61fc4d11c Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 22:21:49 +0100 Subject: e132xs: fix an issue with ori in drc, and implement andni in drc, nw --- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 94 +++++++++++++++++++++++++++++++- src/devices/cpu/e132xs/e132xsfe.cpp | 2 +- 2 files changed, 94 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 1607c8ea865..4198e5708af 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -233,24 +233,29 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { + printf("Unimplemented: generate_trap (%08x)\n", desc->pc); } void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { + printf("Unimplemented: generate_int (%08x)\n", desc->pc); } void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { + printf("Unimplemented: generate_exception (%08x)\n", desc->pc); } void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_software (%08x)\n", desc->pc); } template void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_chk (%08x)\n", desc->pc); } @@ -433,6 +438,7 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_divsu (%08x)\n", desc->pc); } @@ -635,6 +641,7 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_sums (%08x)\n", desc->pc); } @@ -834,18 +841,21 @@ void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_adds (%08x)\n", desc->pc); } template void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_cmpb (%08x)\n", desc->pc); } template void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_subc (%08x)\n", desc->pc); } @@ -927,54 +937,63 @@ void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_ (%08x)\n", desc->pc); } template void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_addc (%08x)\n", desc->pc); } template void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_neg (%08x)\n", desc->pc); } template void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_negs (%08x)\n", desc->pc); } template void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_and (%08x)\n", desc->pc); } template void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_andn (%08x)\n", desc->pc); } template void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_or (%08x)\n", desc->pc); } template void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_xor (%08x)\n", desc->pc); } template void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_not (%08x)\n", desc->pc); } @@ -1108,24 +1127,67 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_addi (%08x)\n", desc->pc); } template void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_addsi (%08x)\n", desc->pc); } template void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_cmpbi (%08x)\n", desc->pc); } template void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + } + else + { + UML_AND(block, I1, I0, 0xf); + } + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I2, I3, dst_code); + UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + } + + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_XOR(block, I1, I1, ~0); + UML_AND(block, I5, I2, I1); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + generate_set_global_register(block, compiler, desc); + } + else + { + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I4, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); + } } @@ -1167,7 +1229,7 @@ void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compil } else { - UML_ADD(block, I4, I2, dst_code); + UML_ADD(block, I4, I3, dst_code); UML_AND(block, I4, I4, 0x3f); UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); } @@ -1177,82 +1239,97 @@ void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_xori (%08x)\n", desc->pc); } template void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shrdi (%08x)\n", desc->pc); } void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shrd (%08x)\n", desc->pc); } void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shr (%08x)\n", desc->pc); } template void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shri (%08x)\n", desc->pc); } template void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_sardi (%08x)\n", desc->pc); } void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_sard (%08x)\n", desc->pc); } void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_sar (%08x)\n", desc->pc); } template void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_sari (%08x)\n", desc->pc); } template void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shldi (%08x)\n", desc->pc); } void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shld (%08x)\n", desc->pc); } void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shl (%08x)\n", desc->pc); } template void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_shli (%08x)\n", desc->pc); } void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_testlz (%08x)\n", desc->pc); } void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_rol (%08x)\n", desc->pc); } @@ -1503,6 +1580,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_ldxx2 (%08x)\n", desc->pc); } @@ -1649,24 +1727,28 @@ void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_stxx2 (%08x)\n", desc->pc); } template void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_mulsu (%08x)\n", desc->pc); } template void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_mul (%08x)\n", desc->pc); } template void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_set (%08x)\n", desc->pc); } @@ -1703,12 +1785,14 @@ void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_lddr (%08x)\n", desc->pc); } template void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_ldwp (%08x)\n", desc->pc); } @@ -1803,18 +1887,21 @@ void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_stdr (%08x)\n", desc->pc); } template void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_stwp (%08x)\n", desc->pc); } template void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_stdp (%08x)\n", desc->pc); } @@ -1857,6 +1944,7 @@ void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compile template void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_db (%08x)\n", desc->pc); } @@ -2008,18 +2096,22 @@ void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compi void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_trap_op (%08x)\n", desc->pc); } void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_extend (%08x)\n", desc->pc); } void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_reserved (%08x)\n", desc->pc); } void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { + printf("Unimplemented: generate_do (%08x)\n", desc->pc); } diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index 7532e871c7e..33f57434e1b 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -1290,7 +1290,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; break; case 0xfc: // br - desc.targetpc = desc.pc + decode_pcrel(desc, op); + desc.targetpc = (desc.pc + 2) + decode_pcrel(desc, op); desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; break; case 0xfd: case 0xfe: case 0xff: // trap -- cgit v1.2.3-70-g09d2 From 4081eac990d94b3e8be77a77f140e72ce19967ad Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 16:35:19 -0500 Subject: spyhunt: 4099 for lamps (nw) --- src/mame/drivers/mcr3.cpp | 32 ++++++++++++++++++++++++-------- src/mame/includes/mcr3.h | 11 +++++++++++ 2 files changed, 35 insertions(+), 8 deletions(-) diff --git a/src/mame/drivers/mcr3.cpp b/src/mame/drivers/mcr3.cpp index f77425c9bf5..1c3f5fdcb41 100644 --- a/src/mame/drivers/mcr3.cpp +++ b/src/mame/drivers/mcr3.cpp @@ -415,25 +415,21 @@ WRITE8_MEMBER(mcr3_state::spyhunt_op4_w) /* Lamp Driver: - A 3-to-8 latching demuxer is connected to the input bits. + A 3-to-8 latching demuxer (MC14099) is connected to the input bits. Three of the inputs (J1-11,10,12) specify which output to write to, and the fourth input (J1-14) is the data value. A fifth input (J1-13) controls the strobe to latch the data value for the - demuxer. The eight outputs directly control 8 lamps. + demuxer. The eight outputs control 8 lamps through a pair of + Darlington drivers (ULN2068B). */ /* bit 5 = STR1 (J1-13) */ if (((m_last_op4 ^ data) & 0x20) && !(data & 0x20)) { - static const char *const lampname[8] = - { - "lamp0", "lamp1", "lamp2", "lamp3", - "lamp4", "lamp5", "lamp6", "lamp7" - }; /* bit 3 -> J1-14 (DATA) */ /* bit 2 -> J1-11 (A2) */ /* bit 1 -> J1-10 (A1) */ /* bit 0 -> J1-12 (A0) */ - output().set_value(lampname[data & 7], (data >> 3) & 1); + m_lamplatch->write_bit(data & 7, BIT(data, 3)); } m_last_op4 = data; @@ -443,6 +439,16 @@ WRITE8_MEMBER(mcr3_state::spyhunt_op4_w) } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp0_w) { output().set_value("lamp0", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp1_w) { output().set_value("lamp1", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp2_w) { output().set_value("lamp2", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp3_w) { output().set_value("lamp3", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp4_w) { output().set_value("lamp4", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp5_w) { output().set_value("lamp5", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp6_w) { output().set_value("lamp6", state); } +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp7_w) { output().set_value("lamp7", state); } + + /************************************* * @@ -1189,6 +1195,16 @@ static MACHINE_CONFIG_DERIVED( mcrsc_csd, mcrscroll ) MCFG_SOUND_ADD("csd", MIDWAY_CHEAP_SQUEAK_DELUXE, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) + + MCFG_DEVICE_ADD("lamplatch", CD4099, 0) // U1 on Lamp Driver Board + MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp0_w)) + MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp1_w)) + MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp2_w)) + MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp3_w)) + MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp4_w)) + MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp5_w)) + MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp6_w)) + MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp7_w)) MACHINE_CONFIG_END diff --git a/src/mame/includes/mcr3.h b/src/mame/includes/mcr3.h index 573236b843e..64465be848a 100644 --- a/src/mame/includes/mcr3.h +++ b/src/mame/includes/mcr3.h @@ -6,6 +6,7 @@ **************************************************************************/ +#include "machine/74259.h" #include "machine/adc0844.h" #include "screen.h" @@ -16,11 +17,13 @@ public: : mcr_state(mconfig, type, tag), m_spyhunt_alpharam(*this, "spyhunt_alpha"), m_maxrpm_adc(*this, "adc"), + m_lamplatch(*this, "lamplatch"), m_screen(*this, "screen") { } optional_shared_ptr m_spyhunt_alpharam; optional_device m_maxrpm_adc; + optional_device m_lamplatch; required_device m_screen; uint8_t m_input_mux; @@ -60,6 +63,14 @@ public: DECLARE_READ8_MEMBER(spyhunt_ip1_r); DECLARE_READ8_MEMBER(spyhunt_ip2_r); DECLARE_WRITE8_MEMBER(spyhunt_op4_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp0_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp1_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp2_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp3_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp4_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp5_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp6_w); + DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp7_w); DECLARE_READ8_MEMBER(turbotag_ip2_r); DECLARE_READ8_MEMBER(turbotag_kludge_r); DECLARE_DRIVER_INIT(crater); -- cgit v1.2.3-70-g09d2 From b39a95ba8f4813011bdb4b853fb5e71cf156367b Mon Sep 17 00:00:00 2001 From: r09 Date: Mon, 4 Dec 2017 23:08:25 +0100 Subject: fmtowns: fixed 16-bit color scrolling a bit more After further testing, it seems Vain Dream uses the horizontal adjust registers in 16-bit color mode for a small part of the intro, and PR #2881 made it slightly worse. This should make both it and psydet5 display correctly. --- src/mame/video/fmtowns.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index b6846bb4b18..d9badf4c7d5 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -959,7 +959,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const off += scroll; } hzoom = ((m_video.towns_crtc_reg[27] & 0x0f00) >> 8) + 1; - off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) * (hzoom * 2); + off += (m_video.towns_crtc_reg[11] - m_video.towns_crtc_reg[22]) * (2 >> (hzoom - 1)); } else { @@ -971,7 +971,7 @@ void towns_state::towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const off += scroll; } hzoom = (m_video.towns_crtc_reg[27] & 0x000f) + 1; - off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) * (hzoom * 2); + off += (m_video.towns_crtc_reg[9] - m_video.towns_crtc_reg[18]) * (2 >> (hzoom - 1)); } off += line * linesize; -- cgit v1.2.3-70-g09d2 From a423a1e93fa0c25fc923f3c2e2d34b953a1b7431 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 22:38:22 +0100 Subject: e132xs: add addi drc op, nw --- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 77 +++++++++++++++++++++++++++++--- 1 file changed, 70 insertions(+), 7 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 4198e5708af..93e292f2784 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -1057,15 +1057,12 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi { uint16_t op = desc->opptr.w[0]; const uint32_t dst_code = (op & 0xf0) >> 4; + const uint32_t src_code = op & 0xf; if (IMM_LONG) - { - generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 - } + generate_decode_immediate_s(block, compiler, desc); else - { - UML_AND(block, I1, I0, 0xf); - } + UML_MOV(block, I1, src_code); generate_check_delay_pc(block); @@ -1127,7 +1124,73 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_addi (%08x)\n", desc->pc); + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + const uint32_t src_code = op & 0xf; + + if (IMM_LONG) + generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 + else + UML_MOV(block, I1, src_code); + + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); + } + + if (!(op & 0x10f)) + { + UML_TEST(block, DRC_SR, Z_MASK); + UML_SETc(block, uml::COND_Z, I4); + UML_AND(block, I5, I2, 1); + UML_OR(block, I6, I4, I5); + UML_AND(block, I1, DRC_SR, I6); + } + + UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); + + UML_DADD(block, I0, I1, I2); + + UML_DTEST(block, I2, 0x100000000U); + UML_SETc(block, uml::COND_NZ, I4); + UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); + + UML_XOR(block, I4, I2, I0); + UML_XOR(block, I5, I1, I0); + UML_AND(block, I6, I4, I5); + UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); + + UML_ADD(block, I0, I1, I2); + + UML_TEST(block, I0, ~0); + UML_SETc(block, uml::COND_Z, I4); + UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I0, 3, N_MASK); + + if (DST_GLOBAL) + { + UML_MOV(block, I4, dst_code); + UML_MOV(block, I5, I0); + generate_set_global_register(block, compiler, desc); + + if (dst_code == 0) + UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); + } + else + { + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I0, SIZE_DWORD, SCALE_x4); + } } -- cgit v1.2.3-70-g09d2 From 338033a2ce0484a3f38bd8bdbf53a3935b78d303 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 23:20:26 +0100 Subject: e132xs: fixed flag issues in drc mov impl, added drc cmpbi impl, nw --- src/devices/cpu/e132xs/e132xs.h | 2 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 4 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 88 ++++++++++++++++++++++++++++++-- 3 files changed, 87 insertions(+), 7 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 3a974b240f6..73e2fe74e77 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -435,7 +435,7 @@ private: void generate_check_delay_pc(drcuml_block *block); void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); + void generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc); void generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc); void generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 5e51771e91f..8f0d44fad1d 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -86,12 +86,12 @@ static void cfunc_update_timer_prescale(void *param) ((hyperstone_device *)param)->update_timer_prescale(); } -/* +#if 0 static void cfunc_print(void *param) { ((hyperstone_device *)param)->ccfunc_print(); } -*/ +#endif /*------------------------------------------------- ccfunc_total_cycles - compute the total number diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 93e292f2784..ebcf5781ce6 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -83,8 +83,16 @@ void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compile } } -void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) +void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc) { + uint16_t op = desc->opptr.w[0]; + + static const uint32_t lengths[16] = { 1<<19, 3<<19, 2<<19, 2<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19 }; + static const uint32_t offsets[16] = { 0, 4, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; + const uint8_t nybble = op & 0x0f; + + UML_MOV(block, mem(&m_instruction_length), lengths[nybble]); + UML_ADD(block, DRC_PC, DRC_PC, offsets[nybble]); } void hyperstone_device::generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc) @@ -748,7 +756,7 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil UML_TEST(block, I3, ~0); UML_SETc(block, uml::COND_Z, I2); UML_ROLINS(block, DRC_SR, I2, 1, Z_MASK); - UML_ROLINS(block, DRC_SR, I5, 28, N_MASK); + UML_ROLINS(block, DRC_SR, I5, 3, N_MASK); if (DST_GLOBAL) { @@ -1042,7 +1050,7 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi UML_CMP(block, I2, I1); UML_MOVc(block, uml::COND_E, I3, Z_MASK); UML_MOVc(block, uml::COND_B, I3, C_MASK); - UML_JMPc(block, uml::COND_L, no_n = compiler->m_labelnum++); + UML_JMPc(block, uml::COND_GE, no_n = compiler->m_labelnum++); UML_OR(block, I3, I3, N_MASK); UML_LABEL(block, no_n); UML_OR(block, DRC_SR, DRC_SR, I3); @@ -1204,7 +1212,79 @@ void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *comp template void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_cmpbi (%08x)\n", desc->pc); + uint16_t op = desc->opptr.w[0]; + const uint32_t dst_code = (op & 0xf0) >> 4; + + if (!IMM_LONG) + generate_check_delay_pc(block); + + if (DST_GLOBAL) + { + UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + UML_ADD(block, I4, I3, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); + } + + const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f); + if (n) + { + if (n == 31) + { + if (IMM_LONG) + { + generate_ignore_immediate_s(block, desc); + generate_check_delay_pc(block); + } + UML_MOV(block, I1, 0x7fffffff); + } + else + { + if (IMM_LONG) + { + generate_decode_immediate_s(block, compiler, desc); + generate_check_delay_pc(block); + } + else + { + UML_MOV(block, I1, op & 0xf); + } + } + + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_TEST(block, I2, I1); + UML_SETc(block, uml::COND_Z, I3); + UML_ROLINS(block, DRC_SR, I3, Z_SHIFT, Z_MASK); + } + else + { + if (IMM_LONG) + { + generate_ignore_immediate_s(block, desc); + generate_check_delay_pc(block); + } + + int or_mask, done; + UML_TEST(block, I2, 0xff000000); + UML_JMPc(block, uml::COND_Z, or_mask = compiler->m_labelnum++); + UML_TEST(block, I2, 0x00ff0000); + UML_JMPc(block, uml::COND_Z, or_mask); + UML_TEST(block, I2, 0x0000ff00); + UML_JMPc(block, uml::COND_Z, or_mask); + UML_TEST(block, I2, 0x000000ff); + UML_JMPc(block, uml::COND_Z, or_mask); + UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); + UML_JMP(block, done = compiler->m_labelnum++); + + UML_LABEL(block, or_mask); + UML_OR(block, DRC_SR, DRC_SR, Z_MASK); + + UML_LABEL(block, done); + } } -- cgit v1.2.3-70-g09d2 From 24ea32c15e77ac165676dd3cb5f39a5c61da32c9 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Mon, 4 Dec 2017 23:27:45 +0100 Subject: e132xs: drc ldwp impl, nw --- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 41 +++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index ebcf5781ce6..b89958c76a8 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -1935,7 +1935,46 @@ void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compi template void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_ldwp (%08x)\n", desc->pc); + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I1, I0, dst_code); + UML_AND(block, I2, I1, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); + + UML_ADD(block, I3, I0, 4); + UML_CALLH(block, *m_mem_read32); + + if (SRC_GLOBAL) + { + UML_MOV(block, I4, src_code); + UML_MOV(block, I5, I1); + generate_set_global_register(block, compiler, desc); + + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I1, I0, dst_code); + UML_AND(block, I2, I1, 0x3f); + UML_STORE(block, (void *)m_local_regs, I2, I3, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); + UML_ADD(block, I4, I0, src_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I1, SIZE_DWORD, SCALE_x4); + + if (src_code != dst_code) + { + UML_ADD(block, I4, I0, dst_code); + UML_AND(block, I5, I4, 0x3f); + UML_STORE(block, (void *)m_local_regs, I5, I3, SIZE_DWORD, SCALE_x4); + } + } } -- cgit v1.2.3-70-g09d2 From 303c8c2d4353c457cb8fcbd23162c750add94c34 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Tue, 5 Dec 2017 10:43:38 +1100 Subject: (nw) tv950 : these roms had been previously removed 16 months ago. --- src/mame/drivers/tv950.cpp | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/tv950.cpp b/src/mame/drivers/tv950.cpp index 5730eb940fd..e66e45239aa 100644 --- a/src/mame/drivers/tv950.cpp +++ b/src/mame/drivers/tv950.cpp @@ -318,13 +318,11 @@ ROM_START( tv950 ) ROM_REGION(0x10000, "user1", 0) // came with "tv950.zip" - ROM_LOAD( "tv-043h.rom", 0x0000, 0x1000, CRC(89b826be) SHA1(fd5575be04317682d0c9062702b5932b46f89926) ) - ROM_LOAD( "tv-044h.rom", 0x0000, 0x1000, CRC(24b0383d) SHA1(71cabb7f3da8652a36afdf3d505ab8a41651e801) ) - ROM_LOAD( "180000-43i_a25_05ce.bin", 0x0000, 0x1000, CRC(ac6f0bfc) SHA1(2a3863700405fbb9e510613559d78fceee3544e8) ) - ROM_LOAD( "180000-44i_a20_689e.bin", 0x0000, 0x1000, CRC(db91a727) SHA1(e94724ed1a563fb846f4203ae6523ee6b4c6577f) ) + ROM_LOAD( "180000-43i.a25", 0x0000, 0x1000, CRC(ac6f0bfc) SHA1(2a3863700405fbb9e510613559d78fceee3544e8) ) + ROM_LOAD( "180000-44i.a20", 0x0000, 0x1000, CRC(db91a727) SHA1(e94724ed1a563fb846f4203ae6523ee6b4c6577f) ) // came with "tv950kbd.zip" - ROM_LOAD( "tv950_a32_1800000-003a.bin", 0x0000, 0x1000, CRC(eaef0138) SHA1(7198851299fce07c95d18e32cbfbe936c0dbec2a) ) - ROM_LOAD( "tv950_a33_1800000-002a.bin", 0x0000, 0x1000, CRC(856dd85c) SHA1(e2570017e098b0e1ead7749e9c2ac40be2367433) ) + ROM_LOAD( "1800000-003a.a32", 0x0000, 0x1000, CRC(eaef0138) SHA1(7198851299fce07c95d18e32cbfbe936c0dbec2a) ) + ROM_LOAD( "1800000-002a.a33", 0x0000, 0x1000, CRC(856dd85c) SHA1(e2570017e098b0e1ead7749e9c2ac40be2367433) ) ROM_END /* Driver */ -- cgit v1.2.3-70-g09d2 From 6f69dbcbab08491bfbb72faec4b2e133d337651f Mon Sep 17 00:00:00 2001 From: briantro Date: Mon, 4 Dec 2017 18:23:44 -0600 Subject: segae.cpp: Correct ROM labels for Hang On Jr. [ShouTime] --- src/mame/drivers/segae.cpp | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/src/mame/drivers/segae.cpp b/src/mame/drivers/segae.cpp index 49531ea7d5c..7d49a14fc3b 100644 --- a/src/mame/drivers/segae.cpp +++ b/src/mame/drivers/segae.cpp @@ -200,7 +200,7 @@ ROMs: Game IC2 IC3 IC4 IC5 IC7 --------------------------------------------------------------------------------- Megumi Rescue* IC-2 IC-3 IC-4 IC-5 IC-7 -Hang-On Jr. EPR-? EPR-? EPR-? EPR-? EPR-? Hello, Sega Part Numbers....!? +Hang-On Jr. EPR-7261 EPR-7260 EPR-7259 EPR-7258 EPR-7257B Transformer EPR-7350 EPR-7606 EPR-7348 EPR-7347 EPR-7605 /Astro Flash EPR-7350 EPR-7349 EPR-7348 EPR-7347 EPR-7723 Slap Shooter EPR-7355 EPR-7354 EPR-7353 EPR-7352 EPR-7751 @@ -971,16 +971,20 @@ ROM_END //************************************************************************************************************************* // Hang-On Jr., Sega System E +// Game ID# 833-5911 HANG ON JR. REV. +// ROM BD # 834-5910 REV.B +// +// Analog control board: 834-5805 (required for game to boot) // ROM_START( hangonjr ) ROM_REGION( 0x30000, "maincpu", 0 ) - ROM_LOAD( "rom5.ic7", 0x00000, 0x08000, CRC(d63925a7) SHA1(699f222d9712fa42651c753fe75d7b60e016d3ad) ) /* Fixed Code */ + ROM_LOAD( "epr-7257b.ic7", 0x00000, 0x08000, CRC(d63925a7) SHA1(699f222d9712fa42651c753fe75d7b60e016d3ad) ) /* Fixed Code */ /* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */ - ROM_LOAD( "rom4.ic5", 0x10000, 0x08000, CRC(ee3caab3) SHA1(f583cf92c579d1ca235e8b300e256ba58a04dc90) ) - ROM_LOAD( "rom3.ic4", 0x18000, 0x08000, CRC(d2ba9bc9) SHA1(85cf2a801883bf69f78134fc4d5075134f47dc03) ) - ROM_LOAD( "rom2.ic3", 0x20000, 0x08000, CRC(e14da070) SHA1(f8781f65be5246a23c1f492905409775bbf82ea8) ) - ROM_LOAD( "rom1.ic2", 0x28000, 0x08000, CRC(3810cbf5) SHA1(c8d5032522c0c903ab3d138f62406a66e14a5c69) ) + ROM_LOAD( "epr-7258.ic5", 0x10000, 0x08000, CRC(ee3caab3) SHA1(f583cf92c579d1ca235e8b300e256ba58a04dc90) ) + ROM_LOAD( "epr-7259.ic4", 0x18000, 0x08000, CRC(d2ba9bc9) SHA1(85cf2a801883bf69f78134fc4d5075134f47dc03) ) + ROM_LOAD( "epr-7260.ic3", 0x20000, 0x08000, CRC(e14da070) SHA1(f8781f65be5246a23c1f492905409775bbf82ea8) ) + ROM_LOAD( "epr-7261.ic2", 0x28000, 0x08000, CRC(3810cbf5) SHA1(c8d5032522c0c903ab3d138f62406a66e14a5c69) ) ROM_END //************************************************************************************************************************* @@ -1078,7 +1082,7 @@ ROM_END // YEAR, NAME, PARENT, MACHINE, INPUT, STATE INIT, MONITOR,COMPANY,FULLNAME,FLAGS -GAME( 1985, hangonjr, 0, hangonjr, hangonjr, systeme_state, 0, ROT0, "Sega", "Hang-On Jr.", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, hangonjr, 0, hangonjr, hangonjr, systeme_state, 0, ROT0, "Sega", "Hang-On Jr. Rev.B", MACHINE_SUPPORTS_SAVE ) GAME( 1986, slapshtr, 0, systeme, slapshtr, systeme_state, 0, ROT0, "Sega", "Slap Shooter", MACHINE_SUPPORTS_SAVE) // 1986 date from flyer GAME( 1986, transfrm, 0, systeme, transfrm, systeme_state, 0, ROT0, "Sega", "Transformer", MACHINE_SUPPORTS_SAVE ) GAME( 1986, astrofl, transfrm, systemex_315_5177, transfrm, systeme_state, 0, ROT0, "Sega", "Astro Flash (Japan)", MACHINE_SUPPORTS_SAVE ) -- cgit v1.2.3-70-g09d2 From e6cf9d69f93d38ae75375fd0cc8692a1cf64d7c7 Mon Sep 17 00:00:00 2001 From: briantro Date: Mon, 4 Dec 2017 19:05:34 -0600 Subject: new clone added - Teki Paki (location test) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New Clone Added ---------------------------------------- Teki Paki (location test) [ShouTime, Mouloud Bessaad, Dulleron, Christian Ricolleau, Marisol Nuñez Serrano, Renato Mucciarelli, Jeffrey Gray, John Wilke, Darksoft, Ryan Holtz, Smitdogg, The Dumping Union] --- src/mame/drivers/toaplan2.cpp | 16 ++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 17 insertions(+) diff --git a/src/mame/drivers/toaplan2.cpp b/src/mame/drivers/toaplan2.cpp index 0c4f7cf758e..c849dfd3f60 100644 --- a/src/mame/drivers/toaplan2.cpp +++ b/src/mame/drivers/toaplan2.cpp @@ -18,6 +18,7 @@ Supported games: Name Board No Maker Game name ---------------------------------------------------------------------------- tekipaki TP-020 Toaplan Teki Paki + tekipakit TP-020 Toaplan Teki Paki (location test) ghox TP-021 Toaplan Ghox (Spinner with single up/down axis control) ghoxj TP-021 Toaplan Ghox (8-Way Joystick controls) dogyuun TP-022 Toaplan Dogyuun @@ -4182,6 +4183,7 @@ MACHINE_CONFIG_END ***************************************************************************/ /* -------------------------- Toaplan games ------------------------- */ + ROM_START( tekipaki ) ROM_REGION( 0x040000, "maincpu", 0 ) /* Main 68K code */ ROM_LOAD16_BYTE( "tp020-1.bin", 0x000000, 0x010000, CRC(d8420bd5) SHA1(30c1ad9e053cd7e79adb42aa428ebee28e144755) ) @@ -4196,6 +4198,19 @@ ROM_START( tekipaki ) ROM_END +ROM_START( tekipakit ) /* Location Test version */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* Main 68K code */ + ROM_LOAD16_BYTE( "e.e5", 0x000000, 0x010000, CRC(89affc73) SHA1(3930bf0c2528de28dcb0cf2cd537adb62a2172e3) ) /* hand written "E" 27C512 chip */ + ROM_LOAD16_BYTE( "o.e6", 0x000001, 0x010000, CRC(a2244558) SHA1(5291cfbea4d4d1c45d6d4bd21b3c466459a0fa17) ) /* hand written "O" 27C512 chip */ + + ROM_REGION( 0x8000, "audiocpu", 0 ) /* Sound HD647180 code */ + ROM_LOAD( "hd647180.020", 0x00000, 0x08000, CRC(d5157c12) SHA1(b2c6c087bb539456a9e562d0b40f05dde26cacd3) ) + + ROM_REGION( 0x100000, "gp9001", 0 ) + ROM_LOAD( "0-1_4.4_cb45.a16", 0x000000, 0x080000, CRC(35e14729) SHA1(8c929604953b78c6e72744a38e06a988510193a5) ) /* hand written "0-1 4/4 CB45" 27C402 chip */ + ROM_LOAD( "3-4_4.4_547d.a15", 0x080000, 0x080000, CRC(41975fcc) SHA1(f850d5a9638d41bb69f204a9cd54e2fd693b57ef) ) /* hand written "3-4 4/4 547D" 27C402 chip */ +ROM_END + ROM_START( ghox ) /* Spinner with single axis (up/down) controls */ ROM_REGION( 0x040000, "maincpu", 0 ) /* Main 68K code */ @@ -5570,6 +5585,7 @@ ROM_END // ( YEAR NAME PARENT MACHINE INPUT STATE INIT MONITOR COMPANY FULLNAME FLAGS ) GAME( 1991, tekipaki, 0, tekipaki, tekipaki, toaplan2_state, 0, ROT0, "Toaplan", "Teki Paki", MACHINE_SUPPORTS_SAVE ) +GAME( 1991, tekipakit, tekipaki, tekipaki, tekipaki, toaplan2_state, 0, ROT0, "Toaplan", "Teki Paki (location test)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, ghox, 0, ghox, ghox, toaplan2_state, 0, ROT270, "Toaplan", "Ghox (spinner)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, ghoxj, ghox, ghox, ghox, toaplan2_state, 0, ROT270, "Toaplan", "Ghox (joystick)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e8257884a7f..4e81c6f0f3d 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -36898,6 +36898,7 @@ snowbro2b // sstriker // (c) 1993 Raizing sstrikera // (c) 1993 Raizing tekipaki // TP-020 (c) 1991 Toaplan +tekipakit // TP-020 (c) 1991 Toaplan (location test) truxton2 // TP-024 (c) 1992 Toaplan vfive // TP-027 (c) 1993 Toaplan (Japan) whoopee // TP-025 -- cgit v1.2.3-70-g09d2 From 8b4f638fe0bb2b72dcf6a8e3f66648647ebcbbc8 Mon Sep 17 00:00:00 2001 From: briantro Date: Mon, 4 Dec 2017 19:37:28 -0600 Subject: new clone added - Twin Brats New Clone Added ------------------------------------------- Twin Brats (set 1) [caius, The Dumping Union] --- src/mame/drivers/stlforce.cpp | 33 +++++++++++++++++++++++++++++---- src/mame/mame.lst | 1 + 2 files changed, 30 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/stlforce.cpp b/src/mame/drivers/stlforce.cpp index a4ecdfe30d6..1a4874f5715 100644 --- a/src/mame/drivers/stlforce.cpp +++ b/src/mame/drivers/stlforce.cpp @@ -299,6 +299,30 @@ Notes: ROM_START( twinbrat ) + ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 Code */ + ROM_LOAD16_BYTE( "12.u105", 0x00000, 0x20000, CRC(552529b1) SHA1(bf23680335e1c5b05b80ab139609bee9f239b910) ) /* higher numbers are newer?? */ + ROM_LOAD16_BYTE( "13.u104", 0x00001, 0x20000, CRC(9805ba90) SHA1(cdc188fa38220d18c60c9f438520ee574e6ce0f7) ) /* higher numbers are newer?? */ + + ROM_REGION( 0x200000, "gfx1", 0 ) + ROM_LOAD16_BYTE( "6.bin", 0x000000, 0x80000, CRC(af10ddfd) SHA1(e5e83044f20d6cbbc1b4ef1812ac57b6dc958a8a) ) + ROM_LOAD16_BYTE( "7.bin", 0x000001, 0x80000, CRC(3696345a) SHA1(ea38be3586757527b2a1aad2e22b83937f8602da) ) + ROM_LOAD16_BYTE( "4.bin", 0x100000, 0x80000, CRC(1ae8a751) SHA1(5f30306580c6ab4af0ddbdc4519eb4e0ab9bd23a) ) + ROM_LOAD16_BYTE( "5.bin", 0x100001, 0x80000, CRC(cf235eeb) SHA1(d067e2dd4f28a8986dd76ec0eba90e1adbf5787c) ) + + ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_LOAD( "11.bin", 0x000000, 0x40000, CRC(00eecb03) SHA1(5913da4d2ad97c1ce5e8e601a22b499cd93af744) ) + ROM_LOAD( "10.bin", 0x040000, 0x40000, CRC(7556bee9) SHA1(3fe99c7e9378791b79c43b04f5d0a36404448beb) ) + ROM_LOAD( "9.bin", 0x080000, 0x40000, CRC(13194d89) SHA1(95c35b6012f98a64630abb40fd55b24ff8a5e031) ) + ROM_LOAD( "8.bin", 0x0c0000, 0x40000, CRC(79f14528) SHA1(9c07d9a9e59f69a525bbaec05d74eb8d21bb9563) ) + + ROM_REGION( 0x080000, "oki", 0 ) /* Samples, 0x00000 - 0x20000 fixed, 0x20000 - 0x40000 banked */ + ROM_LOAD( "1.bin", 0x00000, 0x80000, CRC(76296578) SHA1(04eca78abe60b283269464c0d12815579126ac08) ) + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) + ROM_LOAD( "eeprom-twinbrat.bin", 0x0000, 0x0080, CRC(9366263d) SHA1(ff5155498ed0b349ecc1ce98a39566b642201cf2) ) +ROM_END + +ROM_START( twinbrata ) ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "2.u105", 0x00000, 0x20000, CRC(33a9bb82) SHA1(0f54239397c93e264b9b211f67bf626acf1246a9) ) ROM_LOAD16_BYTE( "3.u104", 0x00001, 0x20000, CRC(b1186a67) SHA1(502074063101885874db76ae707db1082313efcf) ) @@ -322,7 +346,7 @@ ROM_START( twinbrat ) ROM_LOAD( "eeprom-twinbrat.bin", 0x0000, 0x0080, CRC(9366263d) SHA1(ff5155498ed0b349ecc1ce98a39566b642201cf2) ) ROM_END -ROM_START( twinbrata ) +ROM_START( twinbratb ) ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "2.bin", 0x00000, 0x20000, CRC(5e75f568) SHA1(f42d2a73d737e6b01dd049eea2a10fc8c8096d8f) ) ROM_LOAD16_BYTE( "3.bin", 0x00001, 0x20000, CRC(0e3fa9b0) SHA1(0148cc616eac84dc16415e1557ec6040d14392d4) ) @@ -360,6 +384,7 @@ DRIVER_INIT_MEMBER(stlforce_state, twinbrat) } -GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, stlforce, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, twinbrat, 0, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, twinbrata,twinbrat, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, stlforce, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, twinbrat, 0, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, twinbrata, twinbrat, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, twinbratb, twinbrat, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 3)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 4e81c6f0f3d..3e72a66d991 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -35203,6 +35203,7 @@ stfightgb // (c) 1986 Seibu Kaihatsu (Germany-Benelux) stlforce // (c) 1994 Electronic Devices (Italy) / Ecogames S.L. (Spain) twinbrat // (c) 1995 twinbrata // (c) 1995 +twinbratb // (c) 1995 @source:stratos.cpp stratos // Kasparov Stratos Chess Computer -- cgit v1.2.3-70-g09d2 From 76470019a196ffd69d27ffc0cf2b854b8ffba3b6 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Mon, 4 Dec 2017 22:37:28 -0300 Subject: New clones marked as NOT_WORKING -------------------------------- Bumble Bugs (CHG0479-99, US) [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 28 ++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 29 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 65283d6f2e6..f6ae02a2048 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -2468,6 +2468,33 @@ ROM_START( bumblbugu ) ROM_END +// 593 / 10 Credit Multiplier / 9 Line Multiline +// Bumble Bugs / Export / D - 05/07/97 +// All devices are 27c4002 instead of 27c4096 +// Marked as CHG047999 and 87,006% +// Variation (% and NO):87,006% 99 +// No required set chip version +// No required touch screen +ROM_START( bumblbugua ) + ARISTOCRAT_MK5_BIOS + /* + Checksum code found at 0x000d08 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0xa23f49f6 + Calculated Checksum 0xa23f49f6 (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "chg047999.u7", 0x000000, 0x80000, CRC(7e9be2d0) SHA1(84293a391e9797afc904bb3be05367361ae8d4c7) ) // 87,006% 99 + ROM_LOAD32_WORD( "chg047999.u11", 0x000002, 0x80000, CRC(efd350ac) SHA1(19975b4d2b55b65542a7ff38fa035fd516bd6e2e) ) // 87,006% 99 + ROM_LOAD32_WORD( "chg047999.u8", 0x100000, 0x80000, CRC(e0c01d01) SHA1(9153129fd348a97da7cccf002e5d03e4b4db9264) ) // base + ROM_LOAD32_WORD( "chg047999.u12", 0x100002, 0x80000, CRC(7dbb634b) SHA1(f7a752240989032af142f4cd6e4260a12a5b4c0a) ) // base + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + + // 0200143V / 571/4 / 10 Credit Multiplier/9 Line Multiline // Butterfly Delight / Local / A - 19/12/95 ROM_START( buttdeli ) @@ -7022,6 +7049,7 @@ GAMEL( 1999, bootsctnub, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_s GAMEL( 1996, bumblbug, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200510V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 3 GAMEL( 1996, bumblbugql, bumblbug, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200456V, Queensland)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 1.0 GAMEL( 1997, bumblbugu, bumblbug, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (CHG0479-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 593, D - 05/07/97 +GAMEL( 1997, bumblbugua, bumblbug, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (CHG0479-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 593, D - 05/07/97 GAMEL( 1995, buttdeli, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Butterfly Delight (0200143V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 571/4, A - 19/12/95, Rev 1.8.1.0 GAMEL( 1998, cashcat, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0100676V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 614/3, A - 03/04/98, Rev 7 GAMEL( 1997, cashcata, cashcat, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0100557V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 614/1, B - 01/12/97, Rev 7 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 4e81c6f0f3d..533bb1c02ed 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1449,6 +1449,7 @@ bpartya // (c) 2000 bumblbug // (c) 1996 bumblbugql // (c) 1996 bumblbugu // (c) 1997 +bumblbugua // (c) 1997 buttdeli // (c) 1995 canrose // (c) 1996 cashcat // (c) 1998 -- cgit v1.2.3-70-g09d2 From b52cb5401350374a460f6dec7c60ef0b1044158a Mon Sep 17 00:00:00 2001 From: Ted Green Date: Mon, 4 Dec 2017 19:40:47 -0700 Subject: vrc4373: Corrected device/vendor id PCI field. (nw) --- src/devices/machine/vrc4373.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h index e321a4ebde4..9572380fb8b 100644 --- a/src/devices/machine/vrc4373.h +++ b/src/devices/machine/vrc4373.h @@ -11,7 +11,7 @@ #include "cpu/mips/mips3.h" #define MCFG_VRC4373_ADD(_tag, _cpu_tag) \ - MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x005B1033, 0x00, 0x00000000) \ + MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x1033005B, 0x00, 0x00000000) \ downcast(device)->set_cpu_tag(_cpu_tag); #define MCFG_VRC4373_SET_RAM(_size) \ -- cgit v1.2.3-70-g09d2 From 0dd0f672d5308bc76f8973cc3e77708d67118c10 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Mon, 4 Dec 2017 19:42:37 -0700 Subject: voodoo: Set number of SGRAM chips to 2 for 16M cards. (nw) --- src/devices/video/voodoo.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/devices/video/voodoo.cpp b/src/devices/video/voodoo.cpp index 259e24899e5..26de3c787b3 100644 --- a/src/devices/video/voodoo.cpp +++ b/src/devices/video/voodoo.cpp @@ -5174,7 +5174,10 @@ void voodoo_device::device_start() banshee.io[io_sipMonitor] = 0x40000000; banshee.io[io_lfbMemoryConfig] = 0x000a2200; banshee.io[io_dramInit0] = 0x00579d29; - banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs + if (m_fbmem == 16) + banshee.io[io_dramInit0] |= 0x0c000000; // Midway Vegas (denver) expects 2 banks of 16MBit SGRAMs + else + banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs banshee.io[io_dramInit1] = 0x00f02200; banshee.io[io_tmuGbeInit] = 0x00000bfb; -- cgit v1.2.3-70-g09d2 From d972ebf6f033c1413c337375191d2e5955a5b83e Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 4 Dec 2017 22:28:56 -0500 Subject: spyhunt: Use output finder (nw) --- src/mame/drivers/mcr3.cpp | 33 +++++++++++++++++---------------- src/mame/includes/mcr3.h | 11 +++-------- 2 files changed, 20 insertions(+), 24 deletions(-) diff --git a/src/mame/drivers/mcr3.cpp b/src/mame/drivers/mcr3.cpp index 1c3f5fdcb41..ba1aba9366a 100644 --- a/src/mame/drivers/mcr3.cpp +++ b/src/mame/drivers/mcr3.cpp @@ -439,14 +439,11 @@ WRITE8_MEMBER(mcr3_state::spyhunt_op4_w) } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp0_w) { output().set_value("lamp0", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp1_w) { output().set_value("lamp1", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp2_w) { output().set_value("lamp2", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp3_w) { output().set_value("lamp3", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp4_w) { output().set_value("lamp4", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp5_w) { output().set_value("lamp5", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp6_w) { output().set_value("lamp6", state); } -WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp7_w) { output().set_value("lamp7", state); } +template +WRITE_LINE_MEMBER(mcr3_state::spyhunt_lamp_w) +{ + m_spyhunt_lamp[n] = state; +} @@ -1197,14 +1194,14 @@ static MACHINE_CONFIG_DERIVED( mcrsc_csd, mcrscroll ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) MCFG_DEVICE_ADD("lamplatch", CD4099, 0) // U1 on Lamp Driver Board - MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp0_w)) - MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp1_w)) - MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp2_w)) - MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp3_w)) - MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp4_w)) - MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp5_w)) - MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp6_w)) - MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp7_w)) + MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<0>)) + MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<1>)) + MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<2>)) + MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<3>)) + MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<4>)) + MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<5>)) + MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<6>)) + MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(mcr3_state, spyhunt_lamp_w<7>)) MACHINE_CONFIG_END @@ -1642,6 +1639,8 @@ DRIVER_INIT_MEMBER(mcr3_state,spyhunt) machine().device("ssio")->set_custom_input(2, 0xff, read8_delegate(FUNC(mcr3_state::spyhunt_ip2_r),this)); machine().device("ssio")->set_custom_output(4, 0xff, write8_delegate(FUNC(mcr3_state::spyhunt_op4_w),this)); + m_spyhunt_lamp.resolve(); + m_spyhunt_sprite_color_mask = 0x00; m_spyhunt_scroll_offset = 16; } @@ -1664,6 +1663,8 @@ DRIVER_INIT_MEMBER(mcr3_state,turbotag) machine().device("ssio")->set_custom_input(2, 0xff, read8_delegate(FUNC(mcr3_state::turbotag_ip2_r),this)); machine().device("ssio")->set_custom_output(4, 0xff, write8_delegate(FUNC(mcr3_state::spyhunt_op4_w),this)); + m_spyhunt_lamp.resolve(); + m_spyhunt_sprite_color_mask = 0x00; m_spyhunt_scroll_offset = 88; diff --git a/src/mame/includes/mcr3.h b/src/mame/includes/mcr3.h index 64465be848a..31893abb3a2 100644 --- a/src/mame/includes/mcr3.h +++ b/src/mame/includes/mcr3.h @@ -18,12 +18,14 @@ public: m_spyhunt_alpharam(*this, "spyhunt_alpha"), m_maxrpm_adc(*this, "adc"), m_lamplatch(*this, "lamplatch"), + m_spyhunt_lamp(*this, "lamp%u", 0U), m_screen(*this, "screen") { } optional_shared_ptr m_spyhunt_alpharam; optional_device m_maxrpm_adc; optional_device m_lamplatch; + output_finder<8> m_spyhunt_lamp; required_device m_screen; uint8_t m_input_mux; @@ -63,14 +65,7 @@ public: DECLARE_READ8_MEMBER(spyhunt_ip1_r); DECLARE_READ8_MEMBER(spyhunt_ip2_r); DECLARE_WRITE8_MEMBER(spyhunt_op4_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp0_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp1_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp2_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp3_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp4_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp5_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp6_w); - DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp7_w); + template DECLARE_WRITE_LINE_MEMBER(spyhunt_lamp_w); DECLARE_READ8_MEMBER(turbotag_ip2_r); DECLARE_READ8_MEMBER(turbotag_kludge_r); DECLARE_DRIVER_INIT(crater); -- cgit v1.2.3-70-g09d2 From 6ab7c6949f95c5a70a97cde3415c4228c939665f Mon Sep 17 00:00:00 2001 From: fulivi Date: Tue, 5 Dec 2017 04:34:30 +0100 Subject: HLE of HP9845 internal printer (#2884) * hp9845 & hp64k: fixed breakage caused by c46e1007a8 * hp9845: HLE of internal printer added * hp9845: fix to printer interrupt line * hp9845: moved src/devices/machine/hp9845_printer.* to src/mame/machine --- scripts/target/mame/mess.lua | 2 + src/devices/cpu/hphybrid/hphybrid.cpp | 8 +- src/mame/drivers/hp9845.cpp | 41 +- src/mame/includes/hp9845.h | 8 +- src/mame/machine/hp9845_printer.cpp | 971 ++++++++++++++++++++++++++++++++++ src/mame/machine/hp9845_printer.h | 134 +++++ 6 files changed, 1156 insertions(+), 8 deletions(-) create mode 100644 src/mame/machine/hp9845_printer.cpp create mode 100644 src/mame/machine/hp9845_printer.h diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index 93fd799bfb1..3814eb5d019 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -2132,6 +2132,8 @@ files { MAME_DIR .. "src/mame/drivers/hp48.cpp", MAME_DIR .. "src/mame/includes/hp48.h", MAME_DIR .. "src/mame/machine/hp48.cpp", + MAME_DIR .. "src/mame/machine/hp9845_printer.cpp", + MAME_DIR .. "src/mame/machine/hp9845_printer.h", MAME_DIR .. "src/mame/video/hp48.cpp", MAME_DIR .. "src/mame/drivers/hp49gp.cpp", MAME_DIR .. "src/mame/drivers/hp9845.cpp", diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 57bc1411186..f85fd4b9a06 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -1025,9 +1025,9 @@ void hp_hybrid_cpu_device::do_pw(uint16_t opcode) } WM(tmp_addr >> 1 , tmp); } else { - // Extend address - uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) << 8 : uint8_t(tmp); - uint16_t mask = (tmp_addr & 1) ? 0xff00 : 0x00ff; + // Extend address, form byte address + uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8); + uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00; tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); m_program->write_word(tmp_addr , val, mask); } @@ -1130,7 +1130,7 @@ uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { - m_io->write_word(HP_MAKE_IOADDR(pa, ic), v); + m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v); } hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp index d66adef8eef..b104ef1e7b7 100644 --- a/src/mame/drivers/hp9845.cpp +++ b/src/mame/drivers/hp9845.cpp @@ -25,6 +25,7 @@ // - Correct character generator ROMs (a huge "thank you" to Ansgar Kueckes for the dumps!) // - 98775 light pen controller // - Display softkeys on 45C & 45T +// - HLE of integral printer // What's not yet in: // - Better naming of tape drive image (it's now "magt1" and "magt2", should be "t15" and "t14") // - Better documentation of this file @@ -32,7 +33,6 @@ // - Speed, as usual // - Light pen tracing sometimes behaves erratically in 45C and 45T // What will probably never be in: -// - Integral printer (firmware and character generator ROMs are very difficult to dump) // - Fast LPU processor (dump of microcode PROMs is not available) #include "emu.h" @@ -48,6 +48,7 @@ #include "hp9845b.lh" +#include "machine/hp9845_printer.h" // Debugging #define VERBOSE 0 @@ -187,6 +188,7 @@ constexpr unsigned LP_FOV = 9; // Field of view constexpr unsigned LP_XOFFSET = 5; // x-offset of LP (due to delay in hit recognition) // Peripheral Addresses (PA) +#define PRINTER_PA 0 #define IO_SLOT_FIRST_PA 1 #define IO_SLOT_LAST_PA 12 #define GVIDEO_PA 13 @@ -523,6 +525,8 @@ void hp9845_base_state::machine_reset() m_beeper->set_state(0); + m_prt_irl = false; + logerror("STS=%04x FLG=%04x\n" , m_sts_status , m_flg_status); } @@ -708,8 +712,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(hp9845_base_state::kb_scan) // Key pressed, store scancode & generate IRL //logerror("idx=%u msl=%d\n" , max_seq_idx , max_seq_len); m_kb_scancode = max_seq_idx; - irq_w(0 , 1); BIT_SET(m_kb_status, 0); + update_kb_prt_irq(); // Special case: pressing stop key sets LPU "status" flag if (max_seq_idx == 0x47) { @@ -732,8 +736,8 @@ READ16_MEMBER(hp9845_base_state::kb_status_r) WRITE16_MEMBER(hp9845_base_state::kb_irq_clear_w) { - irq_w(0 , 0); BIT_CLR(m_kb_status, 0); + update_kb_prt_irq(); m_lpu->status_w(0); if (BIT(data , 15)) { @@ -743,6 +747,12 @@ WRITE16_MEMBER(hp9845_base_state::kb_irq_clear_w) } } +void hp9845_base_state::update_kb_prt_irq() +{ + bool state = BIT(m_kb_status , 0) || m_prt_irl; + irq_w(0 , state); +} + TIMER_DEVICE_CALLBACK_MEMBER(hp9845_base_state::beeper_off) { m_beeper->set_state(0); @@ -756,6 +766,22 @@ WRITE8_MEMBER(hp9845_base_state::pa_w) } } +WRITE_LINE_MEMBER(hp9845_base_state::prt_irl_w) +{ + m_prt_irl = state; + update_kb_prt_irq(); +} + +WRITE_LINE_MEMBER(hp9845_base_state::prt_flg_w) +{ + flg_w(PRINTER_PA , state); +} + +WRITE_LINE_MEMBER(hp9845_base_state::prt_sts_w) +{ + sts_w(PRINTER_PA , state); +} + WRITE_LINE_MEMBER(hp9845_base_state::t14_irq_w) { irq_w(T14_PA , state); @@ -3695,6 +3721,9 @@ ADDRESS_MAP_END static ADDRESS_MAP_START(ppu_io_map , AS_IO , 16 , hp9845_base_state) ADDRESS_MAP_UNMAP_LOW + // PA = 0, IC = 0..1 + // Internal printer + AM_RANGE(HP_MAKE_IOADDR(PRINTER_PA , 0) , HP_MAKE_IOADDR(PRINTER_PA , 1)) AM_DEVREADWRITE("printer" , hp9845_printer_device , printer_r , printer_w) // PA = 0, IC = 2 // Keyboard scancode input AM_RANGE(HP_MAKE_IOADDR(0 , 2) , HP_MAKE_IOADDR(0 , 2)) AM_READ(kb_scancode_r) @@ -3791,6 +3820,12 @@ static MACHINE_CONFIG_START(hp9845_base) MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("192K") MCFG_RAM_EXTRA_OPTIONS("64K, 320K, 448K") + + // Internal printer + MCFG_DEVICE_ADD("printer" , HP9845_PRINTER , 0) + MCFG_9845PRT_IRL_HANDLER(WRITELINE(hp9845_base_state , prt_irl_w)) + MCFG_9845PRT_FLG_HANDLER(WRITELINE(hp9845_base_state , prt_flg_w)) + MCFG_9845PRT_STS_HANDLER(WRITELINE(hp9845_base_state , prt_sts_w)) MACHINE_CONFIG_END static MACHINE_CONFIG_START(hp9845b) diff --git a/src/mame/includes/hp9845.h b/src/mame/includes/hp9845.h index 52663f376f0..60f09aa5e7d 100644 --- a/src/mame/includes/hp9845.h +++ b/src/mame/includes/hp9845.h @@ -47,6 +47,9 @@ public: DECLARE_WRITE8_MEMBER(pa_w); + DECLARE_WRITE_LINE_MEMBER(prt_irl_w); + DECLARE_WRITE_LINE_MEMBER(prt_flg_w); + DECLARE_WRITE_LINE_MEMBER(prt_sts_w); DECLARE_WRITE_LINE_MEMBER(t14_irq_w); DECLARE_WRITE_LINE_MEMBER(t14_flg_w); DECLARE_WRITE_LINE_MEMBER(t14_sts_w); @@ -55,7 +58,6 @@ public: DECLARE_WRITE_LINE_MEMBER(t15_sts_w); DECLARE_INPUT_CHANGED_MEMBER(togglekey_changed); - protected: required_device m_lpu; required_device m_ppu; @@ -81,6 +83,7 @@ protected: virtual void advance_gv_fsm(bool ds , bool trigger) = 0; void kb_scan_ioport(ioport_value pressed , ioport_port *port , unsigned idx_base , int& max_seq_len , unsigned& max_seq_idx); + void update_kb_prt_irq(); // Character generator required_region_ptr m_chargen; @@ -141,6 +144,9 @@ protected: ioport_value m_kb_state[ 4 ]; uint8_t m_kb_scancode; uint16_t m_kb_status; + + // Printer + bool m_prt_irl; }; #endif /* _HP9845_H_ */ diff --git a/src/mame/machine/hp9845_printer.cpp b/src/mame/machine/hp9845_printer.cpp new file mode 100644 index 00000000000..3741b737552 --- /dev/null +++ b/src/mame/machine/hp9845_printer.cpp @@ -0,0 +1,971 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi +/********************************************************************* + + hp9845_printer.cpp + + HP9845 internal printer HLE + + The internal printer of HP9845-series machines is a thermal + printer. It prints by heating the resistors in a fixed line + of 560 elements. A stepper motor advances the paper (and in some + cases backs it up). + A HP nanoprocessor controls the operation of the printer. + The NP runs firmware from a 2 kB ROM and it has 256 bytes of + RAM. A second 2 kB ROM acts as character generator. + Character cells are 7 pixels wide and 12 pixels high. + Shape of characters in the character generator is "compressed" + in a peculiar way (see patent) so that the 7x12 cell fits in 8 + bytes. These 8 bytes are addressed according to a Gray code, not + a binary code, to speed up access. + Each step of the motor moves the paper by 1/154 of inch. Each + line in a normal sized character is 2 steps high. Lines of big + sized characters are 3 steps high. The horizontal size of + pixels is equal to 2 steps. + HLE is necessary because it's very difficult to dump ROMs (they're + non-standard HP parts and they're soldered on the PCB). + Content of char.gen. was reconstructed by looking at the shape + of each character on paper. + Thanks to Ansgar Kueckes for letting me run tests "remotely" on + his printer. + + Output of printer: + - bitbanger 1: raw dump of all bytes from PPU to printer + - bitbanger 2: output of printer pixels. Each line has this form: + :, where line_no is the line number (counted in + motor steps, see above) and is the 560-pixel line. Each + character of is either a space (no dot) or '*'. This + stream can be post-processed to produce a bitmapped graphic. + Each '*' is to be translated to a 2x2 black square to preserve + the 1:1 aspect-ratio of pixels. + + What's not implemented: + - A realistic simulation of printer speed + - Form Feed + - Handling of page length & top/bottom margins + - ESC & l [ST] commands (set vertical size of lines & + top margin of paper) + + References: + - US Patent 4,180,854 + - HP 09845-93000, sep 81, HP9845 BASIC programming (appendix A) + +*********************************************************************/ + +#include "emu.h" +#include "hp9845_printer.h" + +// Debugging +#define VERBOSE 0 +#include "logmacro.h" + +// Bit manipulation +namespace { + template constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } + + template void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK(n); + } + + template void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK(n); + } + + template void COPY_BIT(bool bit , T& w , unsigned n) + { + if (bit) { + BIT_SET(w , n); + } else { + BIT_CLR(w , n); + } + } +} + +// Character constants +constexpr uint8_t CH_BS = 0x08; +constexpr uint8_t CH_TAB = 0x09; +constexpr uint8_t CH_LF = 0x0a; +constexpr uint8_t CH_CR = 0x0d; +constexpr uint8_t CH_SH_OUT = 0x0e; +constexpr uint8_t CH_SH_IN = 0x0f; +constexpr uint8_t CH_ESC = 0x1b; + +// Bits in m_attrs +constexpr unsigned ATTRS_NEW_BIT = 7; // Redefined character +constexpr unsigned ATTRS_TAB_BIT = 6; // Tab position +constexpr unsigned ATTRS_U_L_BIT = 5; // Underlined +constexpr unsigned ATTRS_BIG_BIT = 4; // Big character +constexpr uint8_t ATTRS_REDEF_NO_MASK = 0x0f; // Redefined character number +constexpr uint8_t ATTRS_NEW_MASK = BIT_MASK(ATTRS_NEW_BIT); +constexpr uint8_t ATTRS_BIG_MASK = BIT_MASK(ATTRS_BIG_BIT); +constexpr uint8_t ATTRS_U_L_MASK = BIT_MASK(ATTRS_U_L_BIT); + +// Various timing constants +constexpr unsigned MAX_PIXELS_BURNED = 62; // Maximum number of pixels burned in parallel +constexpr unsigned USEC_LT_16_PIXELS = 4960; // microseconds to burn < 16 pixels +constexpr unsigned USEC_LT_32_PIXELS = 5984; // microseconds to burn < 32 pixels +constexpr unsigned USEC_LT_48_PIXELS = 6464; // microseconds to burn < 48 pixels +constexpr unsigned USEC_GE_48_PIXELS = 6976; // microseconds to burn >= 48 pixels +constexpr unsigned USEC_1_STEP = 3456; // microseconds for 1 motor step + +// Device type definition +DEFINE_DEVICE_TYPE(HP9845_PRINTER, hp9845_printer_device, "hp9845_prt", "HP9845 internal printer") + +hp9845_printer_device::hp9845_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +: device_t(mconfig , HP9845_PRINTER , tag , owner , clock), + m_irl_handler(*this), + m_flg_handler(*this), + m_sts_handler(*this), + m_prt_graph_out(*this , "prt_graphic"), + m_prt_alpha_out(*this , "prt_alpha"), + m_prt_chargen(*this , "prt_chargen") +{ +} + +ROM_START(hp9845_printer) + ROM_REGION(0x800, "prt_chargen", 0) + ROM_LOAD("1818-2687.bin", 0, 0x800, CRC(cce64de8) SHA1(1dfabd32f4bdef85f88a514bd1978b80b25a6e80)) +ROM_END + +const tiny_rom_entry *hp9845_printer_device::device_rom_region() const +{ + return ROM_NAME(hp9845_printer); +} + +MACHINE_CONFIG_MEMBER(hp9845_printer_device::device_add_mconfig) + MCFG_DEVICE_ADD("prt_alpha", BITBANGER, 0) + MCFG_DEVICE_ADD("prt_graphic", BITBANGER, 0) +MACHINE_CONFIG_END + +void hp9845_printer_device::device_start() +{ + m_irl_handler.resolve_safe(); + m_flg_handler.resolve_safe(); + m_sts_handler.resolve_safe(); + + save_item(NAME(m_display_mode)); + save_item(NAME(m_shifted)); + save_item(NAME(m_current_u_l)); + save_item(NAME(m_current_big)); + save_item(NAME(m_ibf)); + save_item(NAME(m_inten)); + save_item(NAME(m_busy)); + save_item(NAME(m_ib)); + save_item(NAME(m_pos)); + save_item(NAME(m_line)); + save_item(NAME(m_attrs)); + save_item(NAME(m_redef_count)); + save_item(NAME(m_redef_idx)); + save_item(NAME(m_redef_chars)); + save_item(NAME(m_replace_count)); + save_item(NAME(m_redef_buff)); + save_item(NAME(m_next_replace)); + save_item(NAME(m_rep_str_len)); + save_item(NAME(m_rep_str_ptr)); + save_item(NAME(m_octal_accum)); + save_item(NAME(m_fsm_state)); + save_item(NAME(m_cur_line)); + + m_timer = timer_alloc(0); +} + +void hp9845_printer_device::device_reset() +{ + state_reset(); + m_cur_line = 0; + m_inten = false; + m_ibf = false; + m_busy = false; + update_flg(); + m_sts_handler(true); +} + +void hp9845_printer_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + m_busy = false; + update_fsm(); + update_flg(); +} + +READ16_MEMBER(hp9845_printer_device::printer_r) +{ + uint16_t res = 0; + + switch (offset) { + case 0: + case 1: + // Bit 7: Interrupt enabled + // Bit 5: 1 + // Bit 1: Printer powered (1) + // Bit 0: Interrupt pending + if (m_inten) { + BIT_SET(res , 7); + } + BIT_SET(res , 5); + BIT_SET(res , 1); + if (m_inten && !m_ibf && !m_busy) { + BIT_SET(res , 0); + } + break; + + default: + break; + } + + return res; +} + +WRITE16_MEMBER(hp9845_printer_device::printer_w) +{ + switch (offset) { + case 0: + // New character + m_ib = (uint8_t)data; + m_ibf = true; + update_fsm(); + update_flg(); + break; + + case 1: + // Control word + m_inten = BIT(data , 7); + update_flg(); + break; + + default: + break; + } +} + +void hp9845_printer_device::state_reset() +{ + m_display_mode = false; + m_shifted = false; + m_current_u_l = false; + m_current_big = false; + memset(m_attrs , 0 , sizeof(m_attrs)); + memset(m_redef_buff, 0, sizeof(m_redef_buff)); + m_redef_count = 0; + m_replace_count = 0; + m_next_replace = REDEF_BUFF_LEN - 1; + m_rep_str_len = 0; + m_rep_str_ptr = 0; + start_new_line(); + m_fsm_state = FSM_NORMAL_TEXT; +} + +void hp9845_printer_device::insert_char(uint8_t ch) +{ + if (m_pos == 80) { + crlf(); + } + COPY_BIT(m_current_big , m_attrs[ m_pos ] , ATTRS_BIG_BIT); + COPY_BIT(m_current_u_l , m_attrs[ m_pos ] , ATTRS_U_L_BIT); + if (ch == '_') { + BIT_SET(m_attrs[ m_pos ] , ATTRS_U_L_BIT); + } else { + m_line[ m_pos ] = ch; + // Check for redefined characters + unsigned redef_idx; + if (is_ch_redef(ch , redef_idx)) { + m_attrs[ m_pos ] = (m_attrs[ m_pos ] & ~ATTRS_REDEF_NO_MASK) | (uint8_t)redef_idx | ATTRS_NEW_MASK; + } else { + BIT_CLR(m_attrs[ m_pos ] , ATTRS_NEW_BIT); + } + } + m_pos++; +} + +void hp9845_printer_device::start_new_line() +{ + m_pos = 0; + memset(m_line, ' ', sizeof(m_line)); + for (auto& x : m_attrs) { + x &= ~(ATTRS_NEW_MASK | ATTRS_BIG_MASK | ATTRS_U_L_MASK); + } +} + +uint8_t hp9845_printer_device::get_ch_matrix_line(const uint8_t *matrix_base , unsigned line_no , const uint8_t *seq) +{ + uint8_t res = 0; + + switch (line_no) { + case 0: + { + uint8_t b0 = matrix_base[ seq[ 0 ] ]; + if (BIT(b0 , 0)) { + res = b0 >> 1; + } + } + break; + + case 1: + { + uint8_t b3 = matrix_base[ seq[ 3 ] ]; + if (BIT(b3 , 0)) { + res = matrix_base[ seq[ 0 ] ] >> 1; + } + } + break; + + case 2: + { + uint8_t b1 = matrix_base[ seq[ 1 ] ]; + if (!BIT(b1 , 0)) { + res = b1 >> 1; + } + } + break; + + case 3: + { + uint8_t b2 = matrix_base[ seq[ 2 ] ]; + if (!BIT(b2 , 0)) { + res = b2 >> 1; + } + } + break; + + case 4: + case 5: + case 6: + case 7: + case 8: + res = matrix_base[ seq[ line_no - 1 ] ] >> 1; + break; + + case 9: + { + uint8_t b1 = matrix_base[ seq[ 1 ] ]; + if (BIT(b1 , 0)) { + res = b1 >> 1; + } else { + uint8_t b5 = matrix_base[ seq[ 5 ] ]; + if (BIT(b5 , 0)) { + res = matrix_base[ seq[ 0 ] ] >> 1; + } + } + } + break; + + case 10: + { + uint8_t b2 = matrix_base[ seq[ 2 ] ]; + if (BIT(b2 , 0)) { + res = b2 >> 1; + } else { + uint8_t b6 = matrix_base[ seq[ 6 ] ]; + if (BIT(b6 , 0)) { + res = matrix_base[ seq[ 0 ] ] >> 1; + } + } + } + break; + + case 11: + { + uint8_t b7 = matrix_base[ seq[ 7 ] ]; + if (BIT(b7 , 0)) { + res = matrix_base[ seq[ 0 ] ] >> 1; + } + } + break; + } + + return res; +} + +unsigned hp9845_printer_device::print_560_pixels(unsigned line_no , const uint8_t *pixels) +{ + std::ostringstream buff; + buff << line_no; + buff << ':'; + unsigned pixel_count = 0; + for (unsigned i = 0; i < 70; i++) { + uint8_t pop_count = pixels[ i ]; + pop_count = (pop_count & 0x55) + ((pop_count >> 1) & 0x55); + pop_count = (pop_count & 0x33) + ((pop_count >> 2) & 0x33); + pop_count = (pop_count & 0x0f) + ((pop_count >> 4) & 0x0f); + pixel_count += pop_count; + for (uint8_t mask = 0x80; mask; mask >>= 1) { + buff << ((mask & pixels[ i ]) ? '*' : ' '); + } + } + if (pixel_count) { + buff << '\n'; + std::string out{buff.str()}; + for (auto c : out) { + m_prt_graph_out->output(c); + } + } + LOG("pc=%u\n" , pixel_count); + return pixel_count; +} + +static const uint8_t linear_seq[] = { 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 }; +static const uint8_t gray_seq[] = { 0 , 1 , 3 , 2 , 6 , 7 , 5 , 4 }; + +uint8_t hp9845_printer_device::get_ch_pixels(uint8_t ch , uint8_t attrs , unsigned matrix_line) const +{ + uint8_t pixels; + bool new_ch = BIT(attrs , ATTRS_NEW_BIT); + if (new_ch) { + const uint8_t *matrix = &m_redef_buff[ (attrs & ATTRS_REDEF_NO_MASK) * 8 ]; + pixels = get_ch_matrix_line(matrix, matrix_line, linear_seq); + } else { + const uint8_t *matrix = &m_prt_chargen[ ch * 8 ]; + pixels = get_ch_matrix_line(matrix, matrix_line, gray_seq); + } + return pixels; +} + +attotime hp9845_printer_device::burn_time(unsigned pixel_count) +{ + if (pixel_count == 0) { + return attotime::zero; + } + unsigned full_burns = pixel_count / MAX_PIXELS_BURNED; + unsigned rem_pixels = pixel_count - full_burns * MAX_PIXELS_BURNED; + unsigned usec = full_burns * USEC_GE_48_PIXELS; + if (rem_pixels < 16) { + usec += USEC_LT_16_PIXELS; + } else if (rem_pixels < 32) { + usec += USEC_LT_32_PIXELS; + } else if (rem_pixels < 48) { + usec += USEC_LT_48_PIXELS; + } else { + usec += USEC_GE_48_PIXELS; + } + return attotime::from_usec(usec); +} + +void hp9845_printer_device::print_line() +{ + attotime print_time; + bool any_big = false; + // Normal-sized character range is [0..22], every other line + // Big-sized characters range is [-8..22], one line every 3 + for (int line_off = -8; line_off < 23; line_off++) { + if ((line_off + int(m_cur_line)) < 0) { + continue; + } + bool norm_line = line_off >= 0 && line_off % 2 == 0; + bool big_line = (line_off + 8) % 3 == 0; + + if (norm_line || big_line) { + uint8_t pixel_line[ 70 ]; + memset(pixel_line, 0, sizeof(pixel_line)); + + unsigned pixel_line_idx = 0; + uint8_t pixel_line_mask = 0x80; + + for (unsigned pos = 0; pos < m_pos; pos++) { + uint8_t ch = m_line[ pos ]; + uint8_t attrs = m_attrs[ pos ]; + uint8_t pixels = 0; + + if (line_off == 22 && BIT(attrs , ATTRS_U_L_BIT)) { + // Underline + pixels = 0x7f; + } else if (BIT(attrs , ATTRS_BIG_BIT) && big_line) { + any_big = true; + unsigned matrix_line = (line_off + 8) / 3; + pixels = get_ch_pixels(ch, attrs, matrix_line); + } else if (!BIT(attrs , ATTRS_BIG_BIT) && norm_line) { + unsigned matrix_line = line_off / 2; + pixels = get_ch_pixels(ch, attrs, matrix_line); + } + for (uint8_t mask = 0x40; mask; mask >>= 1) { + if (pixels & mask) { + pixel_line[ pixel_line_idx ] |= pixel_line_mask; + } + pixel_line_mask >>= 1; + if (pixel_line_mask == 0) { + pixel_line_mask = 0x80; + pixel_line_idx++; + } + } + } + unsigned pixel_count = print_560_pixels(unsigned(line_off + int(m_cur_line)) , pixel_line); + print_time += burn_time(pixel_count); + } + } + m_cur_line += 24; + // Computing an accurate printing time is a lot more complex than this. + // This should be a reasonable estimate. + if (any_big) { + print_time += attotime::from_usec(USEC_1_STEP * 32); + } else { + print_time += attotime::from_usec(USEC_1_STEP * 24); + } + LOG("A time=%.6f\n" , print_time.as_double()); + m_timer->adjust(print_time); + m_busy = true; +} + +void hp9845_printer_device::print_graphic_line() +{ + unsigned pixel_count = print_560_pixels(m_cur_line , m_line); + attotime print_time{burn_time(pixel_count)}; + print_time += attotime::from_usec(USEC_1_STEP * 2); + m_cur_line += 2; + LOG("G time=%.6f\n" , print_time.as_double()); + m_timer->adjust(print_time); + m_busy = true; +} + +void hp9845_printer_device::crlf() +{ + print_line(); + start_new_line(); +} + +void hp9845_printer_device::set_tab() +{ + if (m_pos > 0) { + BIT_SET(m_attrs[ m_pos - 1 ] , ATTRS_TAB_BIT); + } +} + +void hp9845_printer_device::clear_tabs() +{ + for (auto& x : m_attrs) { + BIT_CLR(x , ATTRS_TAB_BIT); + } +} + +void hp9845_printer_device::move_to_next_tab() +{ + for (unsigned i = m_pos; i < 80; i++) { + if (BIT(m_attrs[ i ] , ATTRS_TAB_BIT)) { + m_pos = i + 1; + return; + } + } + crlf(); +} + +void hp9845_printer_device::update_flg() +{ + m_flg_handler(!m_ibf && !m_busy); + m_irl_handler(!m_ibf && !m_busy && m_inten); +} + +bool hp9845_printer_device::is_ch_redef(uint8_t ch , unsigned& redef_number) const +{ + for (unsigned i = 0; i < m_redef_count; i++) { + if (m_redef_chars[ i ] == ch) { + redef_number = i; + return true; + } + } + return false; +} + +uint8_t hp9845_printer_device::allocate_ch_redef(uint8_t& idx) +{ + if (m_redef_count >= REDEF_CH_COUNT) { + idx = REDEF_CH_COUNT - 1; + return true; + } else if (m_next_replace < 8) { + return false; + } else { + uint8_t max_idx = (m_next_replace - 8) / 8; + if (max_idx < m_redef_count) { + idx = max_idx; + } else { + idx = m_redef_count++; + } + return true; + } +} + +bool hp9845_printer_device::is_ch_replaced(uint8_t ch , uint8_t& len , uint8_t& ptr) const +{ + uint8_t idx = REDEF_BUFF_LEN - 1; + for (unsigned i = 0; i < m_replace_count; i++) { + if (m_redef_buff[ idx-- ] == ch) { + len = m_redef_buff[ idx-- ]; + ptr = idx; + return true; + } else { + idx -= (m_redef_buff[ idx ] + 1); + } + } + return false; +} + +uint8_t hp9845_printer_device::free_redef_space() const +{ + return m_next_replace - m_redef_count * 8; +} + +uint8_t hp9845_printer_device::apply_shifting(uint8_t ch) const +{ + if ((ch & 0x60) == 0 || !m_shifted) { + return ch; + } else { + return ch | 0x80; + } +} + +bool hp9845_printer_device::parse_octal(uint8_t ch) +{ + if (ch >= '0' && ch <= '7') { + m_octal_accum = (m_octal_accum * 8) + (ch - '0'); + return true; + } else { + return false; + } +} + +bool hp9845_printer_device::parse_ch(uint8_t ch) +{ + bool consume = true; + + switch (m_fsm_state) { + case FSM_NORMAL_TEXT: + if (m_display_mode) { + insert_char(apply_shifting(ch)); + if (ch == CH_CR) { + crlf(); + } else if (ch == CH_ESC) { + m_fsm_state = FSM_WAIT_ESC_Z; + } + } else { + switch (ch) { + case CH_BS: + if (m_pos > 0) { + m_pos--; + } + break; + + case CH_TAB: + move_to_next_tab(); + break; + + case CH_LF: + { + auto save_pos = m_pos; + crlf(); + m_pos = save_pos; + } + break; + + case CH_CR: + m_fsm_state = FSM_AFTER_CR; + break; + + case CH_SH_OUT: + m_shifted = true; + break; + + case CH_SH_IN: + m_shifted = false; + break; + + case CH_ESC: + m_fsm_state = FSM_AFTER_ESC; + break; + + default: + if ((ch & 0xe4) == 0x80) { + m_current_u_l = false; + } else if ((ch & 0xe4) == 0x84) { + m_current_u_l = true; + } else if ((ch & 0x60) != 0) { + insert_char(apply_shifting(ch)); + } + break; + } + } + break; + + case FSM_AFTER_CR: + if (ch == CH_LF) { + // CR + LF sequence + crlf(); + } else { + // CR + something not LF + auto save_cur_line = m_cur_line; + crlf(); + m_cur_line = save_cur_line; + // Ch is pushed back for next iteration of FSM + consume = false; + } + m_fsm_state = FSM_NORMAL_TEXT; + break; + + case FSM_AFTER_ESC: + m_fsm_state = FSM_NORMAL_TEXT; + switch (ch) { + case '1': + set_tab(); + break; + + case '3': + clear_tabs(); + break; + + case 'E': + LOG("State reset\n"); + state_reset(); + break; + + case 'Y': + m_display_mode = true; + break; + + case '&': + m_fsm_state = FSM_AFTER_ESC_AMP; + break; + + case '?': + if (m_pos > 0) { + crlf(); + } + m_pos = 0; + m_fsm_state = FSM_COLLECT_ESC_QMARK; + break; + + default: + // Unknown ESC sequence + break; + } + break; + + case FSM_AFTER_ESC_AMP: + switch (ch) { + case 'd': + m_fsm_state = FSM_AFTER_ESC_AMP_D; + break; + + case 'k': + m_fsm_state = FSM_AFTER_ESC_AMP_K; + break; + + case 'l': + m_fsm_state = FSM_AFTER_ESC_AMP_L; + m_octal_accum = 0; + break; + + case 'n': + m_fsm_state = FSM_AFTER_ESC_AMP_N; + m_octal_accum = 0; + break; + + case 'o': + m_fsm_state = FSM_AFTER_ESC_AMP_O; + m_octal_accum = 0; + break; + + default: + // Unknown ESC & sequence + m_fsm_state = FSM_NORMAL_TEXT; + break; + } + break; + + case FSM_COLLECT_ESC_QMARK: + m_line[ m_pos++ ] = ch; + if (m_pos == 70) { + print_graphic_line(); + start_new_line(); + m_fsm_state = FSM_NORMAL_TEXT; + } + break; + + case FSM_AFTER_ESC_AMP_K: + switch (ch) { + case '0': + case '1': + m_octal_accum = ch != '0'; + m_fsm_state = FSM_AFTER_ESC_AMP_K_01; + break; + + default: + m_fsm_state = FSM_NORMAL_TEXT; + break; + } + break; + + case FSM_AFTER_ESC_AMP_K_01: + if (ch == 'S') { + m_current_big = m_octal_accum; + } + m_fsm_state = FSM_NORMAL_TEXT; + break; + + case FSM_AFTER_ESC_AMP_D: + switch (ch) { + case 'D': + case 'E': + case 'F': + case 'G': + case 'L': + case 'M': + case 'N': + case 'O': + m_current_u_l = true; + break; + + case '@': + case 'A': + case 'B': + case 'C': + case 'H': + case 'I': + case 'J': + case 'K': + m_current_u_l = false; + break; + + default: + break; + } + m_fsm_state = FSM_NORMAL_TEXT; + break; + + case FSM_AFTER_ESC_AMP_N: + if (!parse_octal(ch)) { + if (ch == 'c') { + unsigned dummy; + if (is_ch_redef(m_octal_accum, dummy) || !allocate_ch_redef(m_redef_idx)) { + // Character redefined twice or space exhausted + m_redef_idx = 0xff; + } + LOG("Redef ch %02x @%u\n" , m_octal_accum , m_redef_idx); + if (m_redef_idx < REDEF_CH_COUNT) { + m_redef_chars[ m_redef_idx ] = m_octal_accum; + } + m_octal_accum = 0; + m_fsm_state = FSM_AFTER_ESC_AMP_N_C; + } else { + m_fsm_state = FSM_NORMAL_TEXT; + } + } + break; + + case FSM_AFTER_ESC_AMP_O: + if (!parse_octal(ch)) { + if (ch == 'c') { + uint8_t dummy1; + uint8_t dummy2; + if (is_ch_replaced(m_octal_accum, dummy1, dummy2) || free_redef_space() < 2) { + // Character replaced twice or space exhausted + m_redef_idx = 0xff; + } else { + m_redef_idx = m_next_replace; + m_redef_buff[ m_redef_idx-- ] = m_octal_accum; + m_redef_buff[ m_redef_idx ] = 0; + m_next_replace -= 2; + m_replace_count++; + } + m_octal_accum = 0; + m_fsm_state = FSM_AFTER_ESC_AMP_O_C; + } else { + m_fsm_state = FSM_NORMAL_TEXT; + } + } + break; + + case FSM_AFTER_ESC_AMP_O_C: + if (!parse_octal(ch)) { + if (ch == 'L') { + if (m_redef_idx < REDEF_BUFF_LEN) { + uint8_t max_len = std::min(m_octal_accum , free_redef_space()); + m_next_replace -= max_len; + m_redef_buff[ m_redef_idx-- ] = max_len; + LOG("Repl ch %02x with str @%u, len=%u\n" , m_redef_buff[ m_redef_idx + 2 ] , m_redef_idx , max_len); + } + if (m_octal_accum) { + m_fsm_state = FSM_AFTER_ESC_AMP_O_C_L; + } else { + m_fsm_state = FSM_NORMAL_TEXT; + } + } else { + m_fsm_state = FSM_NORMAL_TEXT; + } + } + break; + + case FSM_AFTER_ESC_AMP_O_C_L: + if (m_redef_idx < REDEF_BUFF_LEN && m_redef_idx >= m_next_replace) { + m_redef_buff[ m_redef_idx-- ] = ch; + } + if (--m_octal_accum == 0) { + m_fsm_state = FSM_NORMAL_TEXT; + } + break; + + case FSM_AFTER_ESC_AMP_L: + if (!parse_octal(ch)) { + // TODO: ESC & l [ST] + m_fsm_state = FSM_NORMAL_TEXT; + } + break; + + case FSM_AFTER_ESC_AMP_N_C: + if (!parse_octal(ch)) { + if (ch >= 'p' && ch <= 'w') { + if (m_redef_idx < REDEF_CH_COUNT) { + m_redef_buff[ m_redef_idx * 8 + ch - 'p' ] = m_octal_accum; + } + m_octal_accum = 0; + } else if (ch >= 'P' && ch <= 'W') { + if (m_redef_idx < REDEF_CH_COUNT) { + m_redef_buff[ m_redef_idx * 8 + ch - 'P' ] = m_octal_accum; + } + m_fsm_state = FSM_NORMAL_TEXT; + } else { + m_fsm_state = FSM_NORMAL_TEXT; + } + } + break; + + case FSM_WAIT_ESC_Z: + insert_char(ch); + if (ch == 'Z') { + m_display_mode = false; + m_fsm_state = FSM_NORMAL_TEXT; + } else if (ch != CH_ESC) { + m_fsm_state = FSM_NORMAL_TEXT; + } + break; + } + return consume; +} + +void hp9845_printer_device::update_fsm() +{ + while (!m_busy && m_ibf) { + bool consume = false; + if (m_rep_str_len != 0) { + consume = parse_ch(m_redef_buff[ m_rep_str_ptr ]); + } else if ((m_fsm_state == FSM_NORMAL_TEXT || m_fsm_state == FSM_AFTER_CR || m_fsm_state == FSM_COLLECT_ESC_QMARK) && + is_ch_replaced(apply_shifting(m_ib), m_rep_str_len, m_rep_str_ptr)) { + LOG("Subst ch %02x with str @%u (len = %u)\n" , m_ib , m_rep_str_ptr , m_rep_str_len); + if (m_rep_str_len == 0) { + consume = true; + } + } else { + consume = parse_ch(m_ib); + } + if (consume) { + if (m_rep_str_len) { + m_rep_str_len--; + m_rep_str_ptr--; + } + if (m_rep_str_len == 0) { + m_prt_alpha_out->output(m_ib); + m_ibf = false; + update_flg(); + } + } + } +} diff --git a/src/mame/machine/hp9845_printer.h b/src/mame/machine/hp9845_printer.h new file mode 100644 index 00000000000..db88d87f2c7 --- /dev/null +++ b/src/mame/machine/hp9845_printer.h @@ -0,0 +1,134 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi +/********************************************************************* + + hp9845_printer.h + + HP9845 internal printer HLE + +*********************************************************************/ + +#ifndef MAME_MACHINE_HP9845_PRINTER_H +#define MAME_MACHINE_HP9845_PRINTER_H + +#pragma once + +#include "imagedev/bitbngr.h" + +#define MCFG_9845PRT_IRL_HANDLER(_devcb) \ + devcb = &hp9845_printer_device::set_irl_handler(*device , DEVCB_##_devcb); + +#define MCFG_9845PRT_FLG_HANDLER(_devcb) \ + devcb = &hp9845_printer_device::set_flg_handler(*device , DEVCB_##_devcb); + +#define MCFG_9845PRT_STS_HANDLER(_devcb) \ + devcb = &hp9845_printer_device::set_sts_handler(*device , DEVCB_##_devcb); + +class hp9845_printer_device : public device_t +{ +public: + // construction/destruction + hp9845_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // static configuration helpers + template static devcb_base &set_irl_handler(device_t &device, Object &&cb) { return downcast(device).m_irl_handler.set_callback(std::forward(cb)); } + template static devcb_base &set_flg_handler(device_t &device, Object &&cb) { return downcast(device).m_flg_handler.set_callback(std::forward(cb)); } + template static devcb_base &set_sts_handler(device_t &device, Object &&cb) { return downcast(device).m_sts_handler.set_callback(std::forward(cb)); } + + // device-level overrides + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // PPU access + DECLARE_READ16_MEMBER(printer_r); + DECLARE_WRITE16_MEMBER(printer_w); + +private: + devcb_write_line m_irl_handler; + devcb_write_line m_flg_handler; + devcb_write_line m_sts_handler; + + required_device m_prt_graph_out; + required_device m_prt_alpha_out; + required_region_ptr m_prt_chargen; + + emu_timer *m_timer; + + // Size of various buffers + static constexpr unsigned REDEF_CH_COUNT = 9; + static constexpr unsigned REDEF_BUFF_LEN = 77; + + // State + bool m_display_mode; + bool m_shifted; + bool m_current_u_l; + bool m_current_big; + bool m_ibf; + bool m_inten; + bool m_busy; + uint8_t m_ib; + uint8_t m_pos; + uint8_t m_line[ 80 ]; + uint8_t m_attrs[ 80 ]; + uint8_t m_redef_count; + uint8_t m_redef_idx; + uint8_t m_redef_chars[ REDEF_CH_COUNT ]; + uint8_t m_replace_count; + uint8_t m_redef_buff[ REDEF_BUFF_LEN ]; + uint8_t m_next_replace; + uint8_t m_rep_str_len; + uint8_t m_rep_str_ptr; + uint8_t m_octal_accum; + int m_fsm_state; + unsigned m_cur_line; + + // FSM states + enum { + FSM_NORMAL_TEXT, + FSM_AFTER_CR, + FSM_AFTER_ESC, + FSM_AFTER_ESC_AMP, + FSM_COLLECT_ESC_QMARK, + FSM_AFTER_ESC_AMP_K, + FSM_AFTER_ESC_AMP_K_01, + FSM_AFTER_ESC_AMP_D, + FSM_AFTER_ESC_AMP_N, + FSM_AFTER_ESC_AMP_O, + FSM_AFTER_ESC_AMP_O_C, + FSM_AFTER_ESC_AMP_O_C_L, + FSM_AFTER_ESC_AMP_L, + FSM_AFTER_ESC_AMP_N_C, + FSM_WAIT_ESC_Z + }; + + void state_reset(); + void insert_char(uint8_t ch); + void start_new_line(); + static uint8_t get_ch_matrix_line(const uint8_t *matrix_base , unsigned line_no , const uint8_t *seq); + unsigned print_560_pixels(unsigned line_no , const uint8_t *pixels); + uint8_t get_ch_pixels(uint8_t ch , uint8_t attrs , unsigned matrix_line) const; + static attotime burn_time(unsigned pixel_count); + void print_line(); + void print_graphic_line(); + void crlf(); + void set_tab(); + void clear_tabs(); + void move_to_next_tab(); + void update_flg(); + bool is_ch_redef(uint8_t ch , unsigned& redef_number) const; + uint8_t allocate_ch_redef(uint8_t& idx); + bool is_ch_replaced(uint8_t ch , uint8_t& len , uint8_t& ptr) const; + uint8_t free_redef_space() const; + uint8_t apply_shifting(uint8_t ch) const; + bool parse_octal(uint8_t ch); + bool parse_ch(uint8_t ch); + void update_fsm(); +}; + +// device type definition +DECLARE_DEVICE_TYPE(HP9845_PRINTER, hp9845_printer_device) + +#endif // MAME_MACHINE_HP9845_PRINTER_H -- cgit v1.2.3-70-g09d2 From a54c02a9d69c17f1ea2fa5e25daed2a81f97b0c2 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Wed, 6 Dec 2017 00:38:57 +1100 Subject: (nw) instantm : let's talk. --- src/mame/drivers/instantm.cpp | 97 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 83 insertions(+), 14 deletions(-) diff --git a/src/mame/drivers/instantm.cpp b/src/mame/drivers/instantm.cpp index c2fb903b228..b08d85685ee 100644 --- a/src/mame/drivers/instantm.cpp +++ b/src/mame/drivers/instantm.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:David Haywood -/* +/****************************************************************************************************************************** has a sticker marked Part # 04-0008 @@ -14,33 +14,91 @@ Serial# : 0115 There were several different designs for this, it's possible they used different speech roms etc. +ToDo: +- work out how the cpus communicate (there's an interrupt handler in main cpu) +- clear up the speech +- inputs +- mechanical matters (camera, printer, etc) -*/ +At the moment it simply outputs all the speech strings, one after the other, then stops. + +*****************************************************************************************************************************/ #include "emu.h" #include "cpu/z80/z80.h" +#include "machine/clock.h" +#include "sound/dac.h" +#include "sound/volt_reg.h" +#include "speaker.h" class instantm_state : public driver_device { public: instantm_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") { } + DECLARE_READ8_MEMBER(port01_r); + DECLARE_WRITE8_MEMBER(port01_w); + DECLARE_WRITE_LINE_MEMBER(clock_w); + +private: + u8 m_port01; + bool m_clock_en; virtual void machine_start() override; virtual void machine_reset() override; required_device m_maincpu; }; +// return instruction from main cpu +READ8_MEMBER( instantm_state::port01_r ) +{ + return m_port01; +} + +// tell maincpu the speech is done +WRITE8_MEMBER( instantm_state::port01_w ) +{ + // bump to next bit of speech for now + if ((m_port01 & 15) < 15) + m_port01++; + else + m_clock_en = false; +} + +// clock out the speech bytes +WRITE_LINE_MEMBER( instantm_state::clock_w ) +{ + if (m_clock_en) + m_port01 ^= 0x80; +} + + +static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, instantm_state ) + AM_RANGE(0x0000, 0x1fff) AM_ROM + AM_RANGE(0x4000, 0x47ff) AM_RAM + AM_RANGE(0x8000, 0x8000) //AM_WRITE + AM_RANGE(0xc000, 0xc000) //AM_WRITE + AM_RANGE(0xc400, 0xc400) //AM_WRITE + AM_RANGE(0xc800, 0xc800) //AM_WRITE + AM_RANGE(0xcc00, 0xcc00) //AM_WRITE + AM_RANGE(0xec00, 0xec00) //AM_READ + AM_RANGE(0xf000, 0xf000) //AM_READ + AM_RANGE(0xf400, 0xf400) //AM_READ + AM_RANGE(0xfc00, 0xfc00) //AM_READ +ADDRESS_MAP_END -static ADDRESS_MAP_START( instantm_map, AS_PROGRAM, 8, instantm_state ) - AM_RANGE(0x0000, 0x7fff) AM_ROM +// doesn't use ram +static ADDRESS_MAP_START( sub_map, AS_PROGRAM, 8, instantm_state ) + AM_RANGE(0x0000, 0xffff) AM_ROM + AM_RANGE(0x0000, 0x0000) AM_DEVWRITE("dac", dac_byte_interface, write) ADDRESS_MAP_END -static ADDRESS_MAP_START( instantm_submap, AS_PROGRAM, 8, instantm_state ) - AM_RANGE(0x0000, 0x7fff) AM_ROM +static ADDRESS_MAP_START( sub_io, AS_PROGRAM, 8, instantm_state ) + ADDRESS_MAP_GLOBAL_MASK(0xff) + AM_RANGE(0x01, 0x01) AM_READWRITE(port01_r,port01_w) ADDRESS_MAP_END static INPUT_PORTS_START( instantm ) @@ -53,18 +111,29 @@ void instantm_state::machine_start() void instantm_state::machine_reset() { + m_port01 = 0xf0; // bit 4 low sends subcpu to a test mode + m_clock_en = true; } // OSC1 = XTAL_3_579545MHz static MACHINE_CONFIG_START( instantm ) - /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", Z80,XTAL_3_579545MHz) - MCFG_CPU_PROGRAM_MAP(instantm_map) + MCFG_CPU_ADD("maincpu", Z80, XTAL_3_579545MHz) + MCFG_CPU_PROGRAM_MAP(main_map) + + MCFG_CPU_ADD("subcpu", Z80, XTAL_3_579545MHz) + MCFG_CPU_PROGRAM_MAP(sub_map) + MCFG_CPU_IO_MAP(sub_io) + + // all guesswork + MCFG_DEVICE_ADD("voice_clock", CLOCK, 24000) + MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(instantm_state, clock_w)) - MCFG_CPU_ADD("subcpu", Z80,XTAL_3_579545MHz) - MCFG_CPU_PROGRAM_MAP(instantm_submap) + MCFG_SPEAKER_STANDARD_MONO("speaker") + MCFG_SOUND_ADD("dac", MC1408, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) + MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) + MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END @@ -78,4 +147,4 @@ ROM_START( instantm ) ROM_END -GAME( 199?, instantm, 0, instantm, instantm, instantm_state, 0, ROT0, "Capcom / Polaroid", "Polaroid Instant Memories", MACHINE_IS_SKELETON ) +GAME( 199?, instantm, 0, instantm, instantm, instantm_state, 0, ROT0, "Capcom / Polaroid", "Polaroid Instant Memories", MACHINE_IS_SKELETON_MECHANICAL ) -- cgit v1.2.3-70-g09d2 From 477b4d4f30cd0186014c79f862bef801ad50204b Mon Sep 17 00:00:00 2001 From: Robbbert Date: Wed, 6 Dec 2017 02:14:50 +1100 Subject: (nw) c64dtv : notes --- src/mame/drivers/c64dtv.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/c64dtv.cpp b/src/mame/drivers/c64dtv.cpp index c2d0cf6a62b..11d2da70338 100644 --- a/src/mame/drivers/c64dtv.cpp +++ b/src/mame/drivers/c64dtv.cpp @@ -1,5 +1,16 @@ // license:BSD-3-Clause // copyright-holders:Curt Coder +/************************************************************************************************************* + +Commodore 64 Direct-to-TV +It looks like a fat joystick. + +Chips: All unmarked. According to Wikipedia an ASIC contains an entire + Commodore 64 (6510 CPU, VIC-II, SID, CIA, PLA) running at 32MHz. The + 6510 CPU portion runs at 1MHz. +Crystals: 32.720 (X1), unmarked (X2). + +*************************************************************************************************************/ #include "emu.h" #include "screen.h" @@ -66,4 +77,4 @@ ROM_END // GAME DRIVERS //************************************************************************** -CONS( 2005, c64dtv, 0, 0, c64dtv, c64dtv, c64dtv_state, 0, "The Toy:Lobster Company", "Commodore 64 Direct-to-TV (Version 2 050711) (PAL)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +CONS( 2005, c64dtv, 0, 0, c64dtv, c64dtv, c64dtv_state, 0, "The Toy:Lobster Company", "Commodore 64 Direct-to-TV (Version 2 050711) (PAL)", MACHINE_IS_SKELETON ) -- cgit v1.2.3-70-g09d2 From 946ef76e49a05754e45d4fc0fff9771edf4bf1c5 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 5 Dec 2017 17:30:58 +0100 Subject: new NOT_WORKING game -------------------- Torarechattano - AV Kantoku Hen [system11, ShouTime, The Dumping Union] --- src/mame/drivers/csplayh5.cpp | 29 ++++++++++++++++++++++++++--- src/mame/mame.lst | 1 + 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/csplayh5.cpp b/src/mame/drivers/csplayh5.cpp index c36bf906b27..6c2c7f06b58 100644 --- a/src/mame/drivers/csplayh5.cpp +++ b/src/mame/drivers/csplayh5.cpp @@ -94,8 +94,9 @@ public: DECLARE_DRIVER_INIT(renaimj); DECLARE_DRIVER_INIT(sengomjk); DECLARE_DRIVER_INIT(thenanpa); + DECLARE_DRIVER_INIT(torarech); DECLARE_DRIVER_INIT(tsuwaku); - + virtual void machine_reset() override; TIMER_DEVICE_CALLBACK_MEMBER(csplayh5_irq); DECLARE_WRITE_LINE_MEMBER(csplayh5_vdp0_interrupt); @@ -427,6 +428,7 @@ DRIVER_INIT_MEMBER(csplayh5_state,pokoachu) { general_init(0x7b1e/2, 0x6018); } DRIVER_INIT_MEMBER(csplayh5_state,renaimj) { general_init(0x568c/2, 0x6018); } DRIVER_INIT_MEMBER(csplayh5_state,sengomjk) { general_init(0x5226/2, 0x6018); } DRIVER_INIT_MEMBER(csplayh5_state,thenanpa) { general_init(0x69ec/2, 0x6018); } +DRIVER_INIT_MEMBER(csplayh5_state,torarech) { general_init(0x9384/2, 0x6018); } DRIVER_INIT_MEMBER(csplayh5_state,tsuwaku) { general_init(0x856e/2, 0x6018); } @@ -839,6 +841,27 @@ ROM_START( tsuwaku ) ROM_LOAD( "gal16v8h.020", 0x000000, 0x040000, CRC(ac5c9495) SHA1(1c54ecf6dedbf8c3a29207c1c91b52e2ff394d9d) ) ROM_END +ROM_START( torarech ) + ROM_REGION( 0x40000, "maincpu", 0 ) // tmp68301 prg + ROM_LOAD16_BYTE( "2.ic3", 0x000000, 0x020000, CRC(a7fda49b) SHA1(a7891e574b4d2ae3bcdc40f76b6e67e67d6e72bd) ) + ROM_LOAD16_BYTE( "1.ic2", 0x000001, 0x020000, CRC(887c1a0d) SHA1(a594e3ef6514ed48f097e742633c19e51c10b730) ) + + DVD_BIOS + + ROM_REGION( 0x20000, ":nichisnd:audiorom", 0 ) // z80 + ROM_LOAD( "11.ic51", 0x000000, 0x020000, CRC(bd785d10) SHA1(ceb91c0f13eafabb8d48384857af6fc555d48951) ) + + ROM_REGION( 0x400000, "blit_gfx", ROMREGION_ERASEFF ) // blitter based gfxs + ROM_LOAD16_BYTE( "3.ic40", 0x000000, 0x080000, CRC(cbbbab5c) SHA1(ab8ae64b1f2acfab55ba7cbb173f3036a46001e6) ) + ROM_LOAD16_BYTE( "4.ic41", 0x000001, 0x080000, CRC(18412fd8) SHA1(6907ce2739549519e1f3dcee2186f6add219a3c2) ) + + DISK_REGION( "ide:0:hdd:image" ) + DISK_IMAGE_READONLY( "nb8018", 0, SHA1(cf8758bb2caaba6377b354694123ddec71a4f8e1) ) + + ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 ) + ROM_LOAD( "palce16v8h.020", 0x000000, 0xbb2, BAD_DUMP CRC(c8e8605a) SHA1(02e43d9de73256e5c73d6f99834a23cef321d56b) ) +ROM_END + ROM_START( nichisel ) ROM_REGION( 0x40000, "maincpu", 0 ) // tmp68301 prg ROM_LOAD16_BYTE( "2.ic3", 0x000000, 0x020000, CRC(fb84fc3e) SHA1(6b87c3516ceec59ec96012ea6a3d2fa9670a1cb3) ) @@ -916,9 +939,9 @@ GAME( 1998, nichidvd, 0, csplayh5, csplayh5, csplayh5_state, 0, /* 15 */ GAME( 2000, fuudol, nichidvd, csplayh5, csplayh5, csplayh5_state, fuudol, ROT0, "Nichibutsu/eic", "Fuudol (Japan)", MACHINE_NOT_WORKING ) /* 16 */ GAME( 2000, nuretemi, nichidvd, csplayh5, csplayh5, csplayh5_state, nuretemi, ROT0, "Nichibutsu/Love Factory", "Nurete Mitaino... - Net Idol Hen (Japan)", MACHINE_NOT_WORKING ) /* 17 */ GAME( 2000, tsuwaku, nichidvd, csplayh5, csplayh5, csplayh5_state, tsuwaku, ROT0, "Nichibutsu/Love Factory/Just&Just", "Tsuugakuro no Yuuwaku (Japan)", MACHINE_NOT_WORKING ) -// 18 : Torarechattano - AV Kantoku Hen : Nichibutsu/Love Factory/M Friend +/* 18 */ GAME( 2000, torarech, nichidvd, csplayh5, csplayh5, csplayh5_state, torarech, ROT0, "Nichibutsu/Love Factory/M Friend", "Torarechattano - AV Kantoku Hen (Japan)", MACHINE_NOT_WORKING ) /* sp */ GAME( 2000, nichisel, nichidvd, csplayh5, csplayh5, csplayh5_state, nichisel, ROT0, "Nichibutsu", "DVD Select (Japan)", MACHINE_NOT_WORKING ) // 2001 /* 19 */ GAME( 2001, konhaji, nichidvd, csplayh5, csplayh5, csplayh5_state, konhaji, ROT0, "Nichibutsu/Love Factory", "Konnano Hajimete! (Japan)", MACHINE_NOT_WORKING ) -// 20 : Uwasa no Deaikei Site : Nichibutsu/Love Factory/eic +/* 20 */ // Uwasa no Deaikei Site : Nichibutsu/Love Factory/eic diff --git a/src/mame/mame.lst b/src/mame/mame.lst index dd0a9a3c0a0..4d999f2c3e1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -10616,6 +10616,7 @@ pokoachu // (c) 1999 renaimj // (c) 1999 sengomjk // (c) 1998 thenanpa // (c) 1999 +torarech // (c) 2000 tsuwaku // (c) 2000 @source:cswat.cpp -- cgit v1.2.3-70-g09d2 From f4547fe51c6cef74665d11e1f98bd15f55c521c0 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Tue, 5 Dec 2017 21:40:21 +0100 Subject: e132xs: added stwp and conditional db ops to drc, fixed addi Z flag calculation, simplified interpreter trap opcode, nw --- src/devices/cpu/e132xs/e132xs.cpp | 72 +++------------ src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 149 +++++++++++++++++++++++++++++-- 2 files changed, 158 insertions(+), 63 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index d22d84aead2..7f3d8c2efcc 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1429,72 +1429,28 @@ bool hyperstone_device::get_h() const void hyperstone_device::hyperstone_trap() { + static const uint32_t conditions[16] = { + 0, 0, 0, 0, N_MASK | Z_MASK, N_MASK | Z_MASK, N_MASK, N_MASK, C_MASK | Z_MASK, C_MASK | Z_MASK, C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, 0 + }; + static const bool trap_if_set[16] = { + false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false + }; + check_delay_PC(); const uint8_t trapno = (m_op & 0xfc) >> 2; const uint32_t addr = get_trap_addr(trapno); const uint8_t code = ((m_op & 0x300) >> 6) | (m_op & 0x03); - switch (code) + if (trap_if_set[code]) { - case TRAPLE: - if (SR & (N_MASK | Z_MASK)) - execute_trap(addr); - break; - - case TRAPGT: - if(!(SR & (N_MASK | Z_MASK))) - execute_trap(addr); - break; - - case TRAPLT: - if (SR & N_MASK) - execute_trap(addr); - break; - - case TRAPGE: - if (!(SR & N_MASK)) - execute_trap(addr); - break; - - case TRAPSE: - if (SR & (C_MASK | Z_MASK)) - execute_trap(addr); - break; - - case TRAPHT: - if (!(SR & (C_MASK | Z_MASK))) - execute_trap(addr); - break; - - case TRAPST: - if (SR & C_MASK) - execute_trap(addr); - break; - - case TRAPHE: - if (!(SR & C_MASK)) - execute_trap(addr); - break; - - case TRAPE: - if (SR & Z_MASK) - execute_trap(addr); - break; - - case TRAPNE: - if (!(SR & Z_MASK)) - execute_trap(addr); - break; - - case TRAPV: - if (SR & V_MASK) - execute_trap(addr); - break; - - case TRAP: + if (SR & conditions[code]) + execute_trap(addr); + } + else + { + if (!(SR & conditions[code])) execute_trap(addr); - break; } m_icount -= m_clock_cycles_1; diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index b89958c76a8..45677280d2d 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -242,21 +242,29 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { printf("Unimplemented: generate_trap (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { printf("Unimplemented: generate_int (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) { printf("Unimplemented: generate_exception (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_software (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -264,6 +272,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -447,6 +457,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -650,6 +662,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -755,7 +769,7 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); UML_TEST(block, I3, ~0); UML_SETc(block, uml::COND_Z, I2); - UML_ROLINS(block, DRC_SR, I2, 1, Z_MASK); + UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK); UML_ROLINS(block, DRC_SR, I5, 3, N_MASK); if (DST_GLOBAL) @@ -850,6 +864,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -857,6 +873,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -864,6 +882,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -945,7 +965,9 @@ void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compil template void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_ (%08x)\n", desc->pc); + printf("Unimplemented: generate_subs (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -953,6 +975,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -960,6 +984,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -967,6 +993,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -974,6 +1002,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -981,6 +1011,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -988,6 +1020,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -995,6 +1029,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1002,6 +1038,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1181,7 +1219,7 @@ void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compi UML_TEST(block, I0, ~0); UML_SETc(block, uml::COND_Z, I4); - UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); + UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK); UML_ROLINS(block, DRC_SR, I0, 3, N_MASK); if (DST_GLOBAL) @@ -1206,6 +1244,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1383,6 +1423,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1390,18 +1432,24 @@ template void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shrdi (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shrd (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shr (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -1409,6 +1457,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1416,18 +1466,24 @@ template void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_sardi (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_sard (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_sar (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -1435,6 +1491,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1442,18 +1500,24 @@ template void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shldi (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shld (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_shl (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -1461,18 +1525,24 @@ template pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_testlz (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_rol (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -1724,6 +1794,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1871,6 +1943,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1878,6 +1952,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1885,6 +1961,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1892,6 +1970,8 @@ template pc); + fflush(stdout); + fatalerror(" "); } @@ -1929,6 +2009,8 @@ template void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_lddr (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -2070,13 +2152,43 @@ template void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_stdr (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } template void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_stwp (%08x)\n", desc->pc); + const uint16_t op = desc->opptr.w[0]; + + generate_check_delay_pc(block); + + const uint32_t src_code = op & 0xf; + const uint32_t dst_code = (op & 0xf0) >> 4; + + UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); + + if (SRC_GLOBAL) + { + if (src_code == SR_REGISTER) + UML_MOV(block, I1, 0); + else + UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); + } + else + { + UML_ADD(block, I2, I3, src_code); + UML_AND(block, I0, I2, 0x3f); + UML_LOAD(block, I1, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); + } + + UML_ADD(block, I2, I3, dst_code); + UML_AND(block, I4, I2, 0x3f); + UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); + UML_CALLH(block, *m_mem_write32); + UML_ADD(block, I2, I0, 4); + UML_STORE(block, (void *)m_local_regs, I4, I2, SIZE_DWORD, SCALE_x4); } @@ -2084,6 +2196,8 @@ template void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_stdp (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } @@ -2126,7 +2240,24 @@ void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compile template void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { - printf("Unimplemented: generate_db (%08x)\n", desc->pc); + static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; + int skip_jump = compiler->m_labelnum++; + int done = compiler->m_labelnum++; + + UML_TEST(block, DRC_SR, condition_masks[CONDITION]); + if (COND_SET) + UML_JMPc(block, uml::COND_Z, skip_jump); + else + UML_JMPc(block, uml::COND_NZ, skip_jump); + + generate_dbr(block, compiler, desc); + UML_JMP(block, done); + + UML_LABEL(block, skip_jump); + generate_ignore_pcrel(block, desc); + generate_check_delay_pc(block); + + UML_LABEL(block, done); } @@ -2279,21 +2410,29 @@ void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compi void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_trap_op (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_extend (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_reserved (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) { printf("Unimplemented: generate_do (%08x)\n", desc->pc); + fflush(stdout); + fatalerror(" "); } -- cgit v1.2.3-70-g09d2 From 663d982ff100b369aee41cb332d6c3745569db7e Mon Sep 17 00:00:00 2001 From: mahlemiut Date: Wed, 6 Dec 2017 09:48:07 +1300 Subject: fmtowns_cd.xml: fix size of the Samurai Spirits boot floppy. (nw) --- hash/fmtowns_cd.xml | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hash/fmtowns_cd.xml b/hash/fmtowns_cd.xml index 9033ce4a0af..acd3fd89e9e 100644 --- a/hash/fmtowns_cd.xml +++ b/hash/fmtowns_cd.xml @@ -8614,7 +8614,6 @@ User/save disks that can be created from the game itself are not included. + + Final Soldier (Tourvision PCE bootleg) + 1991 + bootleg (Tourvision) / Hudson + + + + + + @@ -873,6 +884,17 @@ Notes: + + + PC Genjin - Pithecanthropus Computerurus (Tourvision PCE bootleg) + 1989 + bootleg (Tourvision) / Hudson + + + + + + @@ -1214,6 +1236,17 @@ Notes: + + + Splatterhouse (Tourvision PCE bootleg) + 1990 + bootleg (Tourvision) / Namcot + + + + + + @@ -1257,6 +1290,16 @@ Notes: + + Tenseiryuu - Saint Dragon (Tourvision PCE bootleg) + 1990 + bootleg (Tourvision) / Irem + + + + + + @@ -1320,6 +1363,20 @@ Notes: + + + Tora e no Michi (Tourvision PCE bootleg) + 1990 + bootleg (Tourvision) / Victor Entertainment + + + + + + + + + @@ -1397,6 +1454,17 @@ Notes: + + + Violent Soldier (Tourvision PCE bootleg) + 1990 + bootleg (Tourvision) / IGS + + + + + + diff --git a/src/mame/drivers/tourvis.cpp b/src/mame/drivers/tourvis.cpp index 21ea16d8104..05837d2d190 100644 --- a/src/mame/drivers/tourvis.cpp +++ b/src/mame/drivers/tourvis.cpp @@ -57,6 +57,7 @@ Final Blaster (29) Final Lap Twin (79) Final Match Tennis (62) + Final Soldier (45) Formation Soccer (1) Gomola Speed (27) Gradius (187) @@ -83,7 +84,7 @@ Override (53) Pac-Land (16) * Paranoia (18) - * PC Genjin + PC Genjin (8) PC Genjin 2 (84) PC Denjin Punkic Cyborg (201) Power Drift (200) @@ -101,6 +102,7 @@ Raiden (111) Rastan Saga II (33, possibly incorrect riser) Saigo no Nindou (44) + Saint Dragon (36) Salamander (184) Shinobi (5) Side Arms (2) @@ -110,21 +112,23 @@ Son Son II (80) Special Criminal Investigation (58) Spin Pair (50) + Splatterhouse (148) Super Star Soldier (42) Super Volley ball (9) Tatsujin (31) Terra Cresta II (27) The NewZealand Story (11) Thunder Blade (34) - * Tiger Road + Tiger Road (10) * Titan Toilet Kids (196) Toy Shop Boys (51) Tricky (42) * TV Sports - USA Pro Basketball (?) + USA Pro Basketball (206) - marketed as NBA Veigues (40) Vigilante (8) + Violent Soldier (no ID, V1 cart) Volfied (68) W-Ring (21) Winning Shot (28) -- cgit v1.2.3-70-g09d2 From 7e7bff3543662746b07b15ac53d5523c58fa8a89 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 6 Dec 2017 08:00:44 +0100 Subject: pce_tourvision.xml: removed copy-paste leftover (nw) --- hash/pce_tourvision.xml | 3 --- 1 file changed, 3 deletions(-) diff --git a/hash/pce_tourvision.xml b/hash/pce_tourvision.xml index f21070055a7..07ec7724262 100644 --- a/hash/pce_tourvision.xml +++ b/hash/pce_tourvision.xml @@ -1368,9 +1368,6 @@ Notes: Tora e no Michi (Tourvision PCE bootleg) 1990 bootleg (Tourvision) / Victor Entertainment - - - -- cgit v1.2.3-70-g09d2 From ad9b6fe4e53fcf7037463500e42a4a458c9e670f Mon Sep 17 00:00:00 2001 From: Patrick Mackinlay Date: Wed, 6 Dec 2017 18:58:55 +0700 Subject: dp8510: new device An implementation of the National Semiconductor DP8510 BITBLT Processing Unit. This is used on the InterPro GT family graphics boards, and this implementation seems to be correct enough to enable me to progress there, hence the PR. While I'd love to have another system to test against, I'm not aware of any other systems that ever used this device other than some NatSemi reference designs, which are not (yet) in MAME. --- scripts/src/video.lua | 12 +++ scripts/target/mame/mess.lua | 1 + src/devices/video/dp8510.cpp | 211 +++++++++++++++++++++++++++++++++++++++++++ src/devices/video/dp8510.h | 88 ++++++++++++++++++ 4 files changed, 312 insertions(+) create mode 100644 src/devices/video/dp8510.cpp create mode 100644 src/devices/video/dp8510.h diff --git a/scripts/src/video.lua b/scripts/src/video.lua index 59ed7ef18f8..035717a2da1 100644 --- a/scripts/src/video.lua +++ b/scripts/src/video.lua @@ -1033,3 +1033,15 @@ if (VIDEOS["I4100"]~=null) then MAME_DIR .. "src/devices/video/imagetek_i4100.h", } end + +-------------------------------------------------- +-- +--@src/devices/video/dp8510.h,VIDEOS["DP8510"] = true +-------------------------------------------------- + +if (VIDEOS["DP8510"]~=null) then + files { + MAME_DIR .. "src/devices/video/dp8510.cpp", + MAME_DIR .. "src/devices/video/dp8510.h", + } +end diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index 3814eb5d019..65c89bc15ce 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -353,6 +353,7 @@ VIDEOS["GB_LCD"] = true VIDEOS["GBA_LCD"] = true VIDEOS["MGA2064W"] = true VIDEOS["PPU2C0X"] = true +VIDEOS["DP8510"] = true -------------------------------------------------- -- specify available machine cores diff --git a/src/devices/video/dp8510.cpp b/src/devices/video/dp8510.cpp new file mode 100644 index 00000000000..d0e64deb307 --- /dev/null +++ b/src/devices/video/dp8510.cpp @@ -0,0 +1,211 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An implementation of the National Semiconductor DP8510 BITBLT Processing Unit. + * + * This device is designed to perform shifting, masking and logic operations on + * source and destination video memory data values. The device relies on + * external logic to drive the system video memory, and to control input lines + * on the device to enable it to read or write its inputs and outputs on the + * data bus. The device has a 16 bit data bus, as well as a 16 slot internal + * fifo, which enables it to work with up to 16 words containing 16 bits of + * pixel data at a time. The expected design was that a single BPU would handle + * each video bitplane, with multiple devices being used in parallel to handle + * multiple planes. + * + * This device is used in the InterPro GT family graphics, which do not make + * use of the line drawing mode, and is therefore currently unimplemented. + * + * Reference: http://bitsavers.org/components/national/_dataBooks/1988_National_Graphics_Handbook.pdf + * + * TODO + * - line drawing mode + */ + +#include "emu.h" +#include "dp8510.h" + +#define VERBOSE 0 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(DP8510, dp8510_device, "dp8510", "National Semiconductor BITBLT Processing Unit") + +const char *const dp8510_device::BITBLT_OP[] = { + "0", "~s & ~d", "~s & d", "~s", "s & ~d", "~d", "s ^ d", "~s | ~d", + "s & d", "~s ^ ~d", "d", "~s | d", "s", "s | ~d", "s | d", "1" +}; + +dp8510_device::dp8510_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, DP8510, tag, owner, clock) + , m_line_drawing(CLEAR_LINE) + , m_barrel_input_select(CLEAR_LINE) + , m_pixel_data_input(CLEAR_LINE) + , m_data_output_select(CLEAR_LINE) + , m_left_mask(CLEAR_LINE) + , m_right_mask(CLEAR_LINE) +{ +} + +void dp8510_device::device_start() +{ + // input lines + save_item(NAME(m_line_drawing)); + save_item(NAME(m_barrel_input_select)); + save_item(NAME(m_pixel_data_input)); + save_item(NAME(m_data_output_select)); + save_item(NAME(m_left_mask)); + save_item(NAME(m_right_mask)); + + // registers and latches + save_item(NAME(m_control)); + save_item(NAME(m_barrel_input_latch)); + save_item(NAME(m_logic_output)); + save_item(NAME(m_fifo_output_latch)); + + // fifo + save_item(NAME(m_fifo[FIFO_SIZE])); + save_item(NAME(m_fifo_head)); + save_item(NAME(m_fifo_tail)); + + // helper internal state + save_item(NAME(m_f0)); + save_item(NAME(m_f1)); + save_item(NAME(m_f2)); + save_item(NAME(m_f3)); +} + +void dp8510_device::device_reset() +{ + m_fifo_head = 0; + m_fifo_tail = 0; +} + +void dp8510_device::control_w(const u16 data) +{ + LOG("control_w function select %d shift number %d left mask %d right mask %d (%s)\n", + (data & CONTROL_FS) >> 12, + (data & CONTROL_SN) >> 8, + (data & CONTROL_LM) >> 4, + (data & CONTROL_RM) >> 0, + machine().describe_context()); + + m_control = data; + + // expand function select bits to 16 bit size for convenience + m_f0 = (data & FS_0) ? ~u16(0) : 0; + m_f1 = (data & FS_1) ? ~u16(0) : 0; + m_f2 = (data & FS_2) ? ~u16(0) : 0; + m_f3 = (data & FS_3) ? ~u16(0) : 0; +} + +void dp8510_device::source_w(const u16 data, const bool fifo_write) +{ + if (fifo_write) + { + // execute barrel shift + const u8 shift_amount = (m_control & CONTROL_SN) >> 8; + const u16 shift_result = m_barrel_input_select + ? (data << shift_amount) | (m_barrel_input_latch >> (16 - shift_amount)) + : (m_barrel_input_latch << shift_amount) | (data >> (16 - shift_amount)); + + LOG("source_w 0x%04x shifted data 0x%04x written to fifo\n", data, shift_result); + + // write result to fifo + fifo_w(shift_result); + } + else + LOG("source_w barrel input latch 0x%04x\n", data); + + // save data in input latch + m_barrel_input_latch = data; +} + +u16 dp8510_device::logic_unit(const u16 src, const u16 dst) const +{ + // compute logic unit result + const u16 result = + (m_f3 & src & dst) + + (m_f2 & src & ~dst) + + (m_f1 & ~src & dst) + + (m_f0 & ~src & ~dst); + + LOG("logic_unit operation %s source 0x%04x destination 0x%04x result 0x%04x\n", + BITBLT_OP[(m_control & CONTROL_FS) >> 12], src, dst, result); + + return result; +} + +void dp8510_device::destination_w(const u16 data, const bool fifo_write) +{ + // fetch the source from the pixel data input or fifo + const u16 source = m_line_drawing ? m_pixel_data_input ? 0xffff : 0 : m_fifo_output_latch = fifo_r(); + + // compute the result + u16 result = logic_unit(source, data); + + // apply left mask + if (m_left_mask) + { + const u16 left_mask = 0xffffU >> ((m_control & CONTROL_LM) >> 4); + if (left_mask != 0xffff) + LOG("destination_w left mask 0x%04x applied\n", left_mask); + + result = (result & left_mask) | (data & ~left_mask); + } + + // apply right mask + if (m_right_mask) + { + const u16 right_mask = s16(0x8000) >> (m_control & CONTROL_RM); + if (right_mask != 0xffff) + LOG("destination_w right mask 0x%04x applied\n", right_mask); + + result = (result & right_mask) | (data & ~right_mask); + } + + // latch output + m_logic_output = result; + + // write the result back to the fifo + if (fifo_write) + { + LOG("destination_w masked data 0x%04x written to fifo\n", m_logic_output); + fifo_w(m_logic_output); + } + else + LOG("destination_w masked data 0x%04x latched\n", m_logic_output); +} + +u16 dp8510_device::output_r() const +{ + // return output from fifo or logic unit + if (m_data_output_select) + return m_fifo_output_latch; + else + return m_logic_output; +} + +u8 dp8510_device::pixel_r(const offs_t pixel_address) const +{ + return (m_logic_output >> (~pixel_address & 0xf)) & 0x1; +} + +u16 dp8510_device::fifo_r() +{ + const u16 data = m_fifo[m_fifo_head++]; + + m_fifo_head %= FIFO_SIZE; + + return data; +} + +void dp8510_device::fifo_w(const u16 data) +{ + m_fifo[m_fifo_tail++] = data; + + m_fifo_tail %= FIFO_SIZE; + + if (m_fifo_tail == m_fifo_head) + logerror("fifo_w warning fifo full (%s)\n", machine().describe_context()); +} diff --git a/src/devices/video/dp8510.h b/src/devices/video/dp8510.h new file mode 100644 index 00000000000..946dd0d8c15 --- /dev/null +++ b/src/devices/video/dp8510.h @@ -0,0 +1,88 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay +#ifndef MAME_VIDEO_DP8510_H +#define MAME_VIDEO_DP8510_H + +#pragma once + +#include "video/dp8510.h" + +class dp8510_device : public device_t +{ +public: + dp8510_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + static const char *const BITBLT_OP[]; + static const int FIFO_SIZE = 16; + + DECLARE_WRITE_LINE_MEMBER(line_drawing) { m_line_drawing = state; } + DECLARE_WRITE_LINE_MEMBER(barrel_input_select) { m_barrel_input_select = state; } + DECLARE_WRITE_LINE_MEMBER(pixel_data_input) { m_pixel_data_input = state; } + DECLARE_WRITE_LINE_MEMBER(data_output_select) { m_data_output_select = state; } + DECLARE_WRITE_LINE_MEMBER(left_mask_enable) { m_left_mask = state; } + DECLARE_WRITE_LINE_MEMBER(right_mask_enable) { m_right_mask = state; } + + enum control_mask : u16 + { + CONTROL_RM = 0x000f, // right mask + CONTROL_LM = 0x00f0, // left mask + CONTROL_SN = 0x0f00, // shift number + CONTROL_FS = 0xf000 // function select + }; + + enum control_fs_mask : u16 + { + FS_0 = 0x1000, + FS_1 = 0x2000, + FS_2 = 0x4000, + FS_3 = 0x8000 + }; + + void control_w(const u16 data); + + void source_w(const u16 data, const bool fifo_write = true); + void destination_w(const u16 data, const bool fifo_write = false); + + u16 output_r() const; + u8 pixel_r(const offs_t pixel_address) const; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + + u16 logic_unit(const u16 src, const u16 dst) const; + + u16 fifo_r(); + void fifo_w(const u16 data); + +private: + // input lines + int m_line_drawing; + int m_barrel_input_select; + int m_pixel_data_input; + int m_data_output_select; + int m_left_mask; + int m_right_mask; + + // registers and latches + u16 m_control; + u16 m_barrel_input_latch; + u16 m_logic_output; + u16 m_fifo_output_latch; + + // fifo + u16 m_fifo[FIFO_SIZE]; + u8 m_fifo_head; + u8 m_fifo_tail; + + // helper internal state + u16 m_f0; + u16 m_f1; + u16 m_f2; + u16 m_f3; +}; + +// device type definition +DECLARE_DEVICE_TYPE(DP8510, dp8510_device) + +#endif // MAME_VIDEO_DP8510_H -- cgit v1.2.3-70-g09d2 From c3ddfa90b44d1f9320751ff39f52cff656485f9c Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 6 Dec 2017 15:56:48 +0200 Subject: ibm_5170.xml: Added Quantum Ontrack Disk Manager and one of the disks for Lotus 1-2-3 R3. [Curt Coder] --- hash/ibm5170.xml | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml index 5fc21814f0d..c3baaf7b65a 100644 --- a/hash/ibm5170.xml +++ b/hash/ibm5170.xml @@ -10211,4 +10211,48 @@ + + + Lotus 1-2-3 Release 3 + 1989 + Lotus Development + + + + + + + + + + + Ontrack Disk Manager + 1997 + Quantum Data Systems + + + + + + + + -- cgit v1.2.3-70-g09d2 From 9416c5cf80fb3db6649fdb6d3a3c53a84cec0079 Mon Sep 17 00:00:00 2001 From: smf- Date: Wed, 6 Dec 2017 14:02:03 +0000 Subject: RF5C400: Converted to use device_rom_interface [smf] --- src/devices/sound/rf5c400.cpp | 17 +++++++++-------- src/devices/sound/rf5c400.h | 10 +++++----- src/mame/drivers/twinkle.cpp | 29 ++++++++++++++++------------- 3 files changed, 30 insertions(+), 26 deletions(-) diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index f354d358402..c4bf56bc1b0 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -129,7 +129,7 @@ void rf5c400_device::envelope_tables::init(uint32_t clock) rf5c400_device::rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, RF5C400, tag, owner, clock) , device_sound_interface(mconfig, *this) - , m_rom(*this, DEVICE_SELF) + , device_rom_interface(mconfig, *this, 25, ENDIANNESS_LITTLE, 16) , m_stream(nullptr) , m_env_tables() { @@ -180,8 +180,6 @@ void rf5c400_device::device_start() } m_stream = stream_alloc(0, 2, clock() / 384); - - m_rommask = m_rom.length() - 1; } //------------------------------------------------- @@ -191,7 +189,6 @@ void rf5c400_device::device_start() void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) { int i, ch; - int16_t *rom = m_rom; uint32_t end, loop; uint64_t pos; uint8_t vol, lvol, rvol, type; @@ -228,7 +225,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * if (env_phase == PHASE_NONE) break; - tmp = rom[(pos>>16) & m_rommask]; + tmp = read_word((pos>>16)<<1); switch ( type ) { case TYPE_16: @@ -295,7 +292,7 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * *buf1++ += sample * pan_table[rvol]; pos += channel->step; - if ( (pos>>16) > m_rom.length() || (pos>>16) > end) + if ((pos>>16) > end) { pos -= loop<<16; pos &= 0xFFFFFF0000U; @@ -310,6 +307,10 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t * } } +void rf5c400_device::rom_bank_updated() +{ + m_stream->update(); +} /*****************************************************************************/ @@ -330,7 +331,7 @@ READ16_MEMBER( rf5c400_device::rf5c400_r ) case 0x13: // memory read { - return m_rom[m_ext_mem_address]; + return read_word(m_ext_mem_address<<1); } } @@ -411,7 +412,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) { if ((data & 0x3) == 3) { - m_rom[m_ext_mem_address] = m_ext_mem_data; + this->space().write_word(m_ext_mem_address << 1, m_ext_mem_data); } break; } diff --git a/src/devices/sound/rf5c400.h b/src/devices/sound/rf5c400.h index 6fe27863f70..3c365f76e3a 100644 --- a/src/devices/sound/rf5c400.h +++ b/src/devices/sound/rf5c400.h @@ -25,7 +25,8 @@ // ======================> rf5c400_device class rf5c400_device : public device_t, - public device_sound_interface + public device_sound_interface, + public device_rom_interface { public: rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -40,6 +41,9 @@ protected: // sound stream update overrides virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override; + // device_rom_interface overrides + virtual void rom_bank_updated() override; + private: struct rf5c400_channel { @@ -88,10 +92,6 @@ private: uint8_t decode80(uint8_t val); - required_region_ptr m_rom; - - uint32_t m_rommask; - sound_stream *m_stream; envelope_tables m_env_tables; diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 71abe917d83..85dbd059fea 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -9,7 +9,7 @@ driver by smf and R. Belmont TODO: dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca -remove dummy 8mb bank +The first 128k of RF5C400 bank 0 is uploaded by the 68000, the rest is unused. It may be using 16J & 18J emulate dvd player and video mixing 16seg led font @@ -28,14 +28,14 @@ beatmania IIDX + DDR Club Kit(newer) 1999 896 JA BBM *? * beatmania IIDX Substream 1999 *? GC983 A04 *? ? beatmania IIDX Club Version 2 1999 GE984 A01(BM) *? *984 A02 ? + GE984 A01(DDR) -beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 * *985 HDD A01 -beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 * *992 HDD A01 -beatmania IIDX 3rd Style(newer) 2000 GC992-JA C01 GC992-JA A04 * *992 HDD A01 -beatmania IIDX 4th Style 2000 A03 JA A01 A03 JA A02 *A03 A03 JA A03 -beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 * *A17 JA A03 -beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 * B4U JA A03 -beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 * B4U JA A03 -beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 * B44 JA A03 +beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 *? *985 HDD A01 +beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 *? *992 HDD A01 +beatmania IIDX 3rd Style(newer) 2000 GC992-JA C01 GC992-JA A04 *? *992 HDD A01 +beatmania IIDX 4th Style 2000 A03 JA A01 A03 JA A02 A03 A03 JA A03 +beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 A17 *A17 JA A03 +beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 *? B4U JA A03 +beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 *? B4U JA A03 +beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 *? B44 JA A03 beatmania IIDX 8th Style 2002 C44 JA A01 C44 JA A02 *C44 C44 JA A03 * = Not dumped. @@ -267,7 +267,7 @@ public: required_device m_am53cf96; required_device m_ata; - required_region_ptr m_waveram; + required_shared_ptr m_waveram; uint16_t m_spu_ctrl; // SPU board control register uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM @@ -923,6 +923,10 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state ) AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w) ADDRESS_MAP_END +static ADDRESS_MAP_START(rf5c400_map, 0, 16, twinkle_state) + AM_RANGE(0x0000000, 0x1ffffff) AM_RAM AM_SHARE("rfsnd") +ADDRESS_MAP_END + /* SCSI */ static void scsi_dma_read( twinkle_state *state, uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size ) @@ -1069,6 +1073,7 @@ static MACHINE_CONFIG_START( twinkle ) MCFG_SOUND_ROUTE( 1, "speakerright", 0.75 ) MCFG_RF5C400_ADD("rfsnd", XTAL_33_8688MHz/2); + MCFG_DEVICE_ADDRESS_MAP(0, rf5c400_map) MCFG_SOUND_ROUTE(0, "speakerleft", 1.0) MCFG_SOUND_ROUTE(1, "speakerright", 1.0) MACHINE_CONFIG_END @@ -1170,9 +1175,7 @@ INPUT_PORTS_END ROM_LOAD( "863a03.7b", 0x000000, 0x080000, CRC(81498f73) SHA1(3599b40a5872eab3a00d345287635355fcb25a71) )\ \ ROM_REGION32_LE( 0x080000, "audiocpu", 0 )\ - ROM_LOAD16_WORD_SWAP( "863a05.2x", 0x000000, 0x080000, CRC(6f42a09e) SHA1(cab5209f90f47b9ee6e721479913ad74e3ba84b1) )\ -\ - ROM_REGION16_LE(0x2000000, "rfsnd", ROMREGION_ERASE00) // the first 8mb isn't populated + ROM_LOAD16_WORD_SWAP( "863a05.2x", 0x000000, 0x080000, CRC(6f42a09e) SHA1(cab5209f90f47b9ee6e721479913ad74e3ba84b1) ) ROM_START( gq863 ) TWINKLE_BIOS -- cgit v1.2.3-70-g09d2 From 981617e558adbe956ef70581e96659d1bf93c238 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 6 Dec 2017 16:05:49 +0200 Subject: Compile fix. (nw) --- src/devices/video/dp8510.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/video/dp8510.cpp b/src/devices/video/dp8510.cpp index d0e64deb307..a98ea433322 100644 --- a/src/devices/video/dp8510.cpp +++ b/src/devices/video/dp8510.cpp @@ -64,7 +64,7 @@ void dp8510_device::device_start() save_item(NAME(m_fifo_output_latch)); // fifo - save_item(NAME(m_fifo[FIFO_SIZE])); + save_item(NAME(m_fifo)); save_item(NAME(m_fifo_head)); save_item(NAME(m_fifo_tail)); -- cgit v1.2.3-70-g09d2 From ff0e837d7d72a8122a95ee4d49078d138f5f2c08 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Thu, 7 Dec 2017 02:49:31 +1100 Subject: (nw) c900 : notes --- src/mame/drivers/c900.cpp | 65 ++++++++++++++++++++++++++++++----------------- 1 file changed, 41 insertions(+), 24 deletions(-) diff --git a/src/mame/drivers/c900.cpp b/src/mame/drivers/c900.cpp index 4ded9072ca8..18b3dc19cf5 100644 --- a/src/mame/drivers/c900.cpp +++ b/src/mame/drivers/c900.cpp @@ -2,39 +2,44 @@ // copyright-holders:Curt Coder /****************************************************************************************** - Commodore C900 - UNIX prototype +Commodore C900 +UNIX prototype - http://www.zimmers.net/cbmpics/c900.html - http://www.zimmers.net/cbmpics/cbm/900/c900-chips.txt +http://www.zimmers.net/cbmpics/c900.html +http://www.zimmers.net/cbmpics/cbm/900/c900-chips.txt - Chips: Z8001 CPU, Z8010 MMU, Z8030 SCC, Z8036 CIO. Crystal: 12MHz +Chips: Z8001 CPU, Z8010 MMU, Z8030 SCC, Z8036 CIO. Crystal: 12MHz - The Z8030 runs 2 serial ports. The Z8036 runs the IEEE interface and the speaker. +The Z8030 runs 2 serial ports. The Z8036 runs the IEEE interface and the speaker. - The FDC is an intelligent device that communicates with the main board via the MMU. - It has a 6508 CPU. +The FDC is an intelligent device that communicates with the main board via the MMU. +It has a 6508 CPU. - Disk drive is a Matsushita JA-560-012 +Disk drive is a Matsushita JA-560-012 + +Our implementation of z80scc is currently incomplete and therefore unusable. + +Increasing the amount of RAM stops the error message, however it still keeps running +into the weeds (jumps to 00000). *******************************************************************************************/ #include "emu.h" #include "cpu/z8000/z8000.h" +//#include "machine/z80scc.h" +//#include "bus/rs232/rs232.h" #include "machine/terminal.h" -#define TERMINAL_TAG "terminal" class c900_state : public driver_device { public: c900_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_terminal(*this, TERMINAL_TAG) - { - } + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_terminal(*this, "terminal") + { } DECLARE_READ16_MEMBER(port1e_r); DECLARE_READ16_MEMBER(key_r); @@ -47,21 +52,22 @@ private: required_device m_terminal; }; -static ADDRESS_MAP_START(c900_mem, AS_PROGRAM, 16, c900_state) +static ADDRESS_MAP_START(mem_map, AS_PROGRAM, 16, c900_state) AM_RANGE(0x00000, 0x07fff) AM_ROM AM_REGION("roms", 0) ADDRESS_MAP_END -static ADDRESS_MAP_START(c900_data, AS_DATA, 16, c900_state) +static ADDRESS_MAP_START(data_map, AS_DATA, 16, c900_state) AM_RANGE(0x00000, 0x07fff) AM_ROM AM_REGION("roms", 0) AM_RANGE(0x08000, 0x6ffff) AM_RAM ADDRESS_MAP_END -static ADDRESS_MAP_START(c900_io, AS_IO, 16, c900_state) +static ADDRESS_MAP_START(io_map, AS_IO, 16, c900_state) + //AM_RANGE(0x0100, 0x011f) AM_DEVREADWRITE8("scc", scc8030_device, zbus_r, zbus_w, 0x00ff) // range for one channel AM_RANGE(0x0010, 0x0011) AM_READ(stat_r) AM_RANGE(0x001A, 0x001B) AM_READ(key_r) AM_RANGE(0x001E, 0x001F) AM_READ(port1e_r) AM_RANGE(0x0100, 0x0101) AM_READ(stat_r) - AM_RANGE(0x0110, 0x0111) AM_READ(key_r) AM_DEVWRITE8(TERMINAL_TAG, generic_terminal_device, write, 0x00ff) + AM_RANGE(0x0110, 0x0111) AM_READ(key_r) AM_DEVWRITE8("terminal", generic_terminal_device, write, 0x00ff) ADDRESS_MAP_END static INPUT_PORTS_START( c900 ) @@ -81,7 +87,7 @@ READ16_MEMBER( c900_state::key_r ) READ16_MEMBER( c900_state::stat_r ) { - return (m_term_data) ? 6 : 4; + return (m_term_data) ? 5 : 4; } void c900_state::kbd_put(u8 data) @@ -110,14 +116,25 @@ GFXDECODE_END static MACHINE_CONFIG_START( c900 ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", Z8001, XTAL_12MHz / 2) - MCFG_CPU_PROGRAM_MAP(c900_mem) - MCFG_CPU_DATA_MAP(c900_data) - MCFG_CPU_IO_MAP(c900_io) + MCFG_CPU_PROGRAM_MAP(mem_map) + MCFG_CPU_DATA_MAP(data_map) + MCFG_CPU_IO_MAP(io_map) - MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0) + MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0) MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(c900_state, kbd_put)) MCFG_GFXDECODE_ADD("gfxdecode", "palette", c900) MCFG_PALETTE_ADD_MONOCHROME("palette") + + //MCFG_SCC8030_ADD("scc", 6'000'000, 326400, 0, 326400, 0) + /* Port A */ + //MCFG_Z80SCC_OUT_TXDA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd)) + //MCFG_Z80SCC_OUT_DTRA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_dtr)) + //MCFG_Z80SCC_OUT_RTSA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_rts)) + //MCFG_Z80SCC_OUT_INT_CB(WRITELINE(lwriter_state, scc_int)) + + //MCFG_RS232_PORT_ADD ("rs232a", default_rs232_devices, "terminal") + //MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("scc", scc8030_device, rxa_w)) + //MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("scc", scc8030_device, ctsa_w)) MACHINE_CONFIG_END ROM_START( c900 ) -- cgit v1.2.3-70-g09d2 From a66cb36cc79dc9ecefd9e78441b321153ed4ac95 Mon Sep 17 00:00:00 2001 From: vadosnaprimer Date: Tue, 10 Oct 2017 21:31:01 +0300 Subject: Rewind feature and RAM savestates. This starts the work requested in #2398. How RAM states work. Implemented using util::vectorstream. Instead of dumping m_save.m_entry_list to file, it writes them as binary to vectorstream. Compression is not used, as it would slow down the process. The header is written as usual, also in binary. When a state is loaded, the savestate data gets binary-read from vectorstream. How rewind works. Rewind is optional, it can be turned off through MAME GUI while not running. Rewind capacity is available there too. Rewind step hotkey is available from the standard hotkey menu. In the debugger you have the "rewind" command ("rw" shortcut) that works the same as the hotkey. Every time you advance a frame (pause step), rewinder captures a RAM savestate of the frame you were at. It does the same when you do step into/over/out in the debugger. Every time it captures a new state (and when you unpause), it marks as invalid all its states that go after the current machine time, because input might change, so they are not relevant anymore. It keeps their buffers allocated though, for future use. When rewinder runs out of allowed amount of savestates it can have, it invalidates the first state in the list and tosses its unique_ptr to the end of the list, then it uses its buffer to capture a new state. When you hit the rewind step key, or use "rewind" command in the debugger, it loads a state that is immediately before the current machine time. Invalid states between valid ones are not allowed to appear, as that breaks rewinder integrity and causes problems. Rewinder keeps its own set of ram states as a vector of unique_ptr's. All rewinder operations and errors get reported using machine().popmessage(). --- src/emu/debug/debugcmd.cpp | 23 +- src/emu/debug/debugcmd.h | 1 + src/emu/debug/debugcpu.cpp | 8 + src/emu/emuopts.cpp | 2 + src/emu/emuopts.h | 4 + src/emu/inpttype.h | 7 +- src/emu/ioport.h | 1 + src/emu/machine.cpp | 39 ++++ src/emu/machine.h | 5 + src/emu/save.cpp | 465 +++++++++++++++++++++++++++++++++++++-- src/emu/save.h | 68 +++++- src/frontend/mame/ui/submenu.cpp | 2 + src/frontend/mame/ui/ui.cpp | 5 + 13 files changed, 603 insertions(+), 27 deletions(-) diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp index 38bff17b8c4..dd0c918ae6e 100644 --- a/src/emu/debug/debugcmd.cpp +++ b/src/emu/debug/debugcmd.cpp @@ -206,6 +206,9 @@ debugger_commands::debugger_commands(running_machine& machine, debugger_cpu& cpu m_console.register_command("stateload", CMDFLAG_NONE, 0, 1, 1, std::bind(&debugger_commands::execute_stateload, this, _1, _2)); m_console.register_command("sl", CMDFLAG_NONE, 0, 1, 1, std::bind(&debugger_commands::execute_stateload, this, _1, _2)); + m_console.register_command("rewind", CMDFLAG_NONE, 0, 0, 0, std::bind(&debugger_commands::execute_rewind, this, _1, _2)); + m_console.register_command("rw", CMDFLAG_NONE, 0, 0, 0, std::bind(&debugger_commands::execute_rewind, this, _1, _2)); + m_console.register_command("save", CMDFLAG_NONE, AS_PROGRAM, 3, 4, std::bind(&debugger_commands::execute_save, this, _1, _2)); m_console.register_command("saved", CMDFLAG_NONE, AS_DATA, 3, 4, std::bind(&debugger_commands::execute_save, this, _1, _2)); m_console.register_command("savei", CMDFLAG_NONE, AS_IO, 3, 4, std::bind(&debugger_commands::execute_save, this, _1, _2)); @@ -1627,7 +1630,7 @@ void debugger_commands::execute_stateload(int ref, const std::vectortrack_pc_data_clear(); @@ -1637,6 +1640,24 @@ void debugger_commands::execute_stateload(int ref, const std::vector ¶ms) +{ + m_machine.rewind_step(); + + // clear all PC & memory tracks + for (device_t &device : device_iterator(m_machine.root_device())) + { + device.debug()->track_pc_data_clear(); + device.debug()->track_mem_data_clear(); + } + m_console.printf("Rewind step attempted. Please refer to window message popup for results.\n"); +} + + /*------------------------------------------------- execute_save - execute the save command -------------------------------------------------*/ diff --git a/src/emu/debug/debugcmd.h b/src/emu/debug/debugcmd.h index 98b6d8ae03d..41405ec0a71 100644 --- a/src/emu/debug/debugcmd.h +++ b/src/emu/debug/debugcmd.h @@ -131,6 +131,7 @@ private: void execute_hotspot(int ref, const std::vector ¶ms); void execute_statesave(int ref, const std::vector ¶ms); void execute_stateload(int ref, const std::vector ¶ms); + void execute_rewind(int ref, const std::vector ¶ms); void execute_save(int ref, const std::vector ¶ms); void execute_load(int ref, const std::vector ¶ms); void execute_dump(int ref, const std::vector ¶ms); diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index eab6f7771e7..4e03e09f54a 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -1902,6 +1902,7 @@ void device_debug::single_step(int numsteps) { assert(m_exec != nullptr); + m_device.machine().rewind_capture(); m_stepsleft = numsteps; m_stepaddr = ~0; m_flags |= DEBUG_FLAG_STEPPING; @@ -1918,6 +1919,7 @@ void device_debug::single_step_over(int numsteps) { assert(m_exec != nullptr); + m_device.machine().rewind_capture(); m_stepsleft = numsteps; m_stepaddr = ~0; m_flags |= DEBUG_FLAG_STEPPING_OVER; @@ -1934,6 +1936,7 @@ void device_debug::single_step_out() { assert(m_exec != nullptr); + m_device.machine().rewind_capture(); m_stepsleft = 100; m_stepaddr = ~0; m_flags |= DEBUG_FLAG_STEPPING_OUT; @@ -1950,6 +1953,7 @@ void device_debug::go(offs_t targetpc) { assert(m_exec != nullptr); + m_device.machine().rewind_invalidate(); m_stopaddr = targetpc; m_flags |= DEBUG_FLAG_STOP_PC; m_device.machine().debugger().cpu().set_execution_state(EXECUTION_STATE_RUNNING); @@ -1964,6 +1968,7 @@ void device_debug::go_vblank() { assert(m_exec != nullptr); + m_device.machine().rewind_invalidate(); m_flags |= DEBUG_FLAG_STOP_VBLANK; m_device.machine().debugger().cpu().go_vblank(); } @@ -1978,6 +1983,7 @@ void device_debug::go_interrupt(int irqline) { assert(m_exec != nullptr); + m_device.machine().rewind_invalidate(); m_stopirq = irqline; m_flags |= DEBUG_FLAG_STOP_INTERRUPT; m_device.machine().debugger().cpu().set_execution_state(EXECUTION_STATE_RUNNING); @@ -1997,6 +2003,7 @@ void device_debug::go_exception(int exception) { assert(m_exec != nullptr); + m_device.machine().rewind_invalidate(); m_stopexception = exception; m_flags |= DEBUG_FLAG_STOP_EXCEPTION; m_device.machine().debugger().cpu().set_execution_state(EXECUTION_STATE_RUNNING); @@ -2012,6 +2019,7 @@ void device_debug::go_milliseconds(u64 milliseconds) { assert(m_exec != nullptr); + m_device.machine().rewind_invalidate(); m_stoptime = m_device.machine().time() + attotime::from_msec(milliseconds); m_flags |= DEBUG_FLAG_STOP_TIME; m_device.machine().debugger().cpu().set_execution_state(EXECUTION_STATE_RUNNING); diff --git a/src/emu/emuopts.cpp b/src/emu/emuopts.cpp index 11e369f0aca..12e674718d9 100644 --- a/src/emu/emuopts.cpp +++ b/src/emu/emuopts.cpp @@ -62,6 +62,8 @@ const options_entry emu_options::s_option_entries[] = { nullptr, nullptr, OPTION_HEADER, "CORE STATE/PLAYBACK OPTIONS" }, { OPTION_STATE, nullptr, OPTION_STRING, "saved state to load" }, { OPTION_AUTOSAVE, "0", OPTION_BOOLEAN, "enable automatic restore at startup, and automatic save at exit time" }, + { OPTION_REWIND, "1", OPTION_BOOLEAN, "enable rewind savestates" }, + { OPTION_REWIND_CAPACITY "(1-500)", "100", OPTION_INTEGER, "quantity of states rewind buffer can contain" }, { OPTION_PLAYBACK ";pb", nullptr, OPTION_STRING, "playback an input file" }, { OPTION_RECORD ";rec", nullptr, OPTION_STRING, "record an input file" }, { OPTION_RECORD_TIMECODE, "0", OPTION_BOOLEAN, "record an input timecode file (requires -record option)" }, diff --git a/src/emu/emuopts.h b/src/emu/emuopts.h index a449c5d95a1..60de574bb22 100644 --- a/src/emu/emuopts.h +++ b/src/emu/emuopts.h @@ -51,6 +51,8 @@ // core state/playback options #define OPTION_STATE "state" #define OPTION_AUTOSAVE "autosave" +#define OPTION_REWIND "rewind" +#define OPTION_REWIND_CAPACITY "rewind_capacity" #define OPTION_PLAYBACK "playback" #define OPTION_RECORD "record" #define OPTION_RECORD_TIMECODE "record_timecode" @@ -327,6 +329,8 @@ public: // core state/playback options const char *state() const { return value(OPTION_STATE); } bool autosave() const { return bool_value(OPTION_AUTOSAVE); } + int rewind() const { return bool_value(OPTION_REWIND); } + int rewind_capacity() const { return int_value(OPTION_REWIND_CAPACITY); } const char *playback() const { return value(OPTION_PLAYBACK); } const char *record() const { return value(OPTION_RECORD); } bool record_timecode() const { return bool_value(OPTION_RECORD_TIMECODE); } diff --git a/src/emu/inpttype.h b/src/emu/inpttype.h index b58ca37bec6..a1e5bef133b 100644 --- a/src/emu/inpttype.h +++ b/src/emu/inpttype.h @@ -820,11 +820,12 @@ inline void construct_core_types_keypad(simple_list &typelist) inline void construct_core_types_UI(simple_list &typelist) { - INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_ON_SCREEN_DISPLAY,"On Screen Display", input_seq(KEYCODE_TILDE) ) - INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_DEBUG_BREAK, "Break in Debugger", input_seq(KEYCODE_TILDE) ) + INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_ON_SCREEN_DISPLAY,"On Screen Display", input_seq(KEYCODE_TILDE, input_seq::not_code, KEYCODE_LSHIFT) ) + INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_DEBUG_BREAK, "Break in Debugger", input_seq(KEYCODE_TILDE, input_seq::not_code, KEYCODE_LSHIFT) ) INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_CONFIGURE, "Config Menu", input_seq(KEYCODE_TAB) ) INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_PAUSE, "Pause", input_seq(KEYCODE_P, input_seq::not_code, KEYCODE_LSHIFT, input_seq::not_code, KEYCODE_RSHIFT) ) - INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_PAUSE_SINGLE, "Pause - Single Step", input_seq(KEYCODE_P, KEYCODE_LSHIFT, input_seq::or_code, KEYCODE_P, KEYCODE_RSHIFT) ) + INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_PAUSE_SINGLE, "Pause - Single Step", input_seq(KEYCODE_P, KEYCODE_LSHIFT) ) + INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_REWIND_SINGLE, "Rewind - Single Step", input_seq(KEYCODE_TILDE, KEYCODE_LSHIFT, input_seq::or_code, KEYCODE_TILDE, KEYCODE_RSHIFT) ) INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_RESET_MACHINE, "Reset Machine", input_seq(KEYCODE_F3, KEYCODE_LSHIFT) ) INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_SOFT_RESET, "Soft Reset", input_seq(KEYCODE_F3, input_seq::not_code, KEYCODE_LSHIFT) ) INPUT_PORT_DIGITAL_TYPE( 0, UI, UI_SHOW_GFX, "Show Gfx", input_seq(KEYCODE_F4) ) diff --git a/src/emu/ioport.h b/src/emu/ioport.h index 722c028e4dc..a9f25e29184 100644 --- a/src/emu/ioport.h +++ b/src/emu/ioport.h @@ -322,6 +322,7 @@ enum ioport_type IPT_UI_DEBUG_BREAK, IPT_UI_PAUSE, IPT_UI_PAUSE_SINGLE, + IPT_UI_REWIND_SINGLE, IPT_UI_RESET_MACHINE, IPT_UI_SOFT_RESET, IPT_UI_SHOW_GFX, diff --git a/src/emu/machine.cpp b/src/emu/machine.cpp index fa6375ef937..f55bfb6c5ad 100644 --- a/src/emu/machine.cpp +++ b/src/emu/machine.cpp @@ -682,6 +682,42 @@ void running_machine::immediate_load(const char *filename) } +//------------------------------------------------- +// rewind_capture - capture and append a new +// state to the rewind list +//------------------------------------------------- + +void running_machine::rewind_capture() +{ + if (m_save.rewind()->enabled()) + m_save.rewind()->capture(); +} + + +//------------------------------------------------- +// rewind_step - a single step back through +// rewind states +//------------------------------------------------- + +void running_machine::rewind_step() +{ + if (m_save.rewind()->enabled()) + m_save.rewind()->step(); +} + + +//------------------------------------------------- +// rewind_invalidate - mark all the future rewind +// states as invalid +//------------------------------------------------- + +void running_machine::rewind_invalidate() +{ + if (m_save.rewind()->enabled()) + m_save.rewind()->invalidate(); +} + + //------------------------------------------------- // pause - pause the system //------------------------------------------------- @@ -721,7 +757,10 @@ void running_machine::resume() void running_machine::toggle_pause() { if (paused()) + { + rewind_invalidate(); resume(); + } else pause(); } diff --git a/src/emu/machine.h b/src/emu/machine.h index 4cf274c9617..efe464983db 100644 --- a/src/emu/machine.h +++ b/src/emu/machine.h @@ -229,6 +229,11 @@ public: void immediate_save(const char *filename); void immediate_load(const char *filename); + // rewind operations + void rewind_capture(); + void rewind_step(); + void rewind_invalidate(); + // scheduled operations void schedule_exit(); void schedule_hard_reset(); diff --git a/src/emu/save.cpp b/src/emu/save.cpp index dea222227ee..eff71cd6870 100644 --- a/src/emu/save.cpp +++ b/src/emu/save.cpp @@ -23,6 +23,7 @@ ***************************************************************************/ #include "emu.h" +#include "emuopts.h" #include "coreutil.h" @@ -60,10 +61,11 @@ enum //------------------------------------------------- save_manager::save_manager(running_machine &machine) - : m_machine(machine), - m_reg_allowed(true), - m_illegal_regs(0) + : m_machine(machine) + , m_reg_allowed(true) + , m_illegal_regs(0) { + m_rewind = std::make_unique(*this); } @@ -169,8 +171,8 @@ void save_manager::save_memory(device_t *device, const char *module, const char totalname = string_format("%s/%X/%s", module, index, name); // look for duplicates and an entry to insert in front of - std::vector>::iterator insert_after = m_entry_list.begin(); - for (auto it = m_entry_list.begin(); it!= m_entry_list.end(); ++it) + std::vector>::iterator insert_after = m_entry_list.begin(); + for (auto it = m_entry_list.begin(); it != m_entry_list.end(); ++it) { // stop when we find an entry whose name is after ours if (it->get()->m_name.compare(totalname)>0) @@ -183,7 +185,7 @@ void save_manager::save_memory(device_t *device, const char *module, const char } // insert us into the list - m_entry_list.insert(insert_after,std::make_unique(val, totalname.c_str(), device, module, tag ? tag : "", index, valsize, valcount)); + m_entry_list.insert(insert_after, std::make_unique(val, totalname.c_str(), device, module, tag ? tag : "", index, valsize, valcount)); } @@ -213,18 +215,19 @@ save_error save_manager::check_file(running_machine &machine, emu_file &file, co return validate_header(header, gamename, sig, errormsg, ""); } + //------------------------------------------------- // dispatch_postload - invoke all registered // postload callbacks for updates //------------------------------------------------- - void save_manager::dispatch_postload() { for (auto &func : m_postload_list) func->m_func(); } + //------------------------------------------------- // read_file - read the data from a file //------------------------------------------------- @@ -269,18 +272,19 @@ save_error save_manager::read_file(emu_file &file) return STATERR_NONE; } + //------------------------------------------------- // dispatch_presave - invoke all registered // presave callbacks for updates //------------------------------------------------- - void save_manager::dispatch_presave() { for (auto &func : m_presave_list) func->m_func(); } + //------------------------------------------------- // write_file - writes the data to a file //------------------------------------------------- @@ -414,27 +418,452 @@ save_manager::state_callback::state_callback(save_prepost_delegate callback) } +//------------------------------------------------- +// ram_state - constructor +//------------------------------------------------- + +ram_state::ram_state(save_manager &save) + : m_save(save) + , m_data() + , m_valid(false) + , m_time(m_save.machine().time()) +{ + m_data.reserve(get_size(save)); + m_data.clear(); + m_data.rdbuf()->clear(); + m_data.seekp(0); + m_data.seekg(0); +} + + +//------------------------------------------------- +// get_size - utility function to get the +// uncompressed size of a state +//------------------------------------------------- + +size_t ram_state::get_size(save_manager &save) +{ + size_t totalsize = 0; + + for (auto &entry : save.m_entry_list) + { + totalsize += entry->m_typesize * entry->m_typecount; + } + + return totalsize + HEADER_SIZE; +} + + +//------------------------------------------------- +// save - write the current machine state to the +// allocated stream +//------------------------------------------------- + +save_error ram_state::save() +{ + // initialize + m_valid = false; + m_data.seekp(0); + + // if we have illegal registrations, return an error + if (m_save.m_illegal_regs > 0) + return STATERR_ILLEGAL_REGISTRATIONS; + + // generate the header + u8 header[HEADER_SIZE]; + memcpy(&header[0], STATE_MAGIC_NUM, 8); + header[8] = SAVE_VERSION; + header[9] = NATIVE_ENDIAN_VALUE_LE_BE(0, SS_MSB_FIRST); + strncpy((char *)&header[0x0a], m_save.machine().system().name, 0x1c - 0x0a); + u32 sig = m_save.signature(); + *(u32 *)&header[0x1c] = little_endianize_int32(sig); + + // write the header + m_data.write((char *)header, sizeof(header)); + + // check for any errors + if (!m_data) + return STATERR_WRITE_ERROR; + + // call the pre-save functions + m_save.dispatch_presave(); + + // write all the data + for (auto &entry : m_save.m_entry_list) + { + u32 totalsize = entry->m_typesize * entry->m_typecount; + m_data.write((char *)entry->m_data, totalsize); + + // check for any errors + if (!m_data) + return STATERR_WRITE_ERROR; + } + + // final confirmation + m_valid = true; + m_time = m_save.machine().time(); + + return STATERR_NONE; +} + + +//------------------------------------------------- +// load - restore the machine state from the +// stream +//------------------------------------------------- + +save_error ram_state::load() +{ + // initialize + m_data.seekg(0); + + // if we have illegal registrations, return an error + if (m_save.m_illegal_regs > 0) + return STATERR_ILLEGAL_REGISTRATIONS; + + // read the header + u8 header[HEADER_SIZE]; + m_data.read((char *)header, sizeof(header)); + + // check for any errors + if (!m_data) + return STATERR_READ_ERROR; + + // verify the header and report an error if it doesn't match + u32 sig = m_save.signature(); + if (m_save.validate_header(header, m_save.machine().system().name, sig, nullptr, "Error: ") != STATERR_NONE) + return STATERR_INVALID_HEADER; + + // determine whether or not to flip the data when done + bool flip = NATIVE_ENDIAN_VALUE_LE_BE((header[9] & SS_MSB_FIRST) != 0, (header[9] & SS_MSB_FIRST) == 0); + + // read all the data, flipping if necessary + for (auto &entry : m_save.m_entry_list) + { + u32 totalsize = entry->m_typesize * entry->m_typecount; + m_data.read((char *)entry->m_data, totalsize); + + // check for any errors + if (!m_data) + return STATERR_READ_ERROR; + + // handle flipping + if (flip) + entry->flip_data(); + } + + // call the post-load functions + m_save.dispatch_postload(); + + return STATERR_NONE; +} + + +//------------------------------------------------- +// rewinder - constuctor +//------------------------------------------------- + +rewinder::rewinder(save_manager &save) + : m_save(save) + , m_enabled(save.machine().options().rewind()) + , m_capacity(save.machine().options().rewind_capacity()) +{ +} + + +//------------------------------------------------- +// check_size - shrink the state list if it is +// about to hit the capacity +//------------------------------------------------- + +void rewinder::check_size() +{ + // safety check that shouldn't be allowed to trigger + if (m_state_list.size() > m_capacity) + { + // drop all states beyond capacity + uint32_t count = m_state_list.size() - m_capacity; + m_state_list.erase(m_state_list.begin(), m_state_list.begin() + count); + } + + // check if we're about to hit capacity + if (m_state_list.size() == m_capacity) + { + // check the last state + ram_state *last = m_state_list.back().get(); + + // if we're not on top of the list, no need to move states around + if (!last->m_valid) + return; + + // we can now get the first state and invalidate it + std::unique_ptr first(std::move(m_state_list.front())); + first->m_valid = false; + + // move it to the end for future use + m_state_list.push_back(std::move(first)); + m_state_list.erase(m_state_list.begin()); + } +} + + +//------------------------------------------------- +// report_error - report rewind success or +// error type +//------------------------------------------------- + +void rewinder::report_error(save_error error, rewind_operation operation, int index) +{ + const char *const opname = (operation == rewind_operation::LOAD) ? "load" : "save"; + + switch (error) + { + // internal saveload failures + case STATERR_ILLEGAL_REGISTRATIONS: + m_save.machine().popmessage("Error: Unable to %s state due to illegal registrations. See error.log for details.", opname); + break; + + case STATERR_INVALID_HEADER: + m_save.machine().popmessage("Error: Unable to %s state due to an invalid header. Make sure the save state is correct for this machine.", opname); + break; + + case STATERR_READ_ERROR: + m_save.machine().popmessage("Error: Unable to %s state due to a read error.", opname); + break; + + case STATERR_WRITE_ERROR: + m_save.machine().popmessage("Error: Unable to %s state due to a write error.", opname); + break; + + // external saveload failures + case STATERR_NOT_FOUND: + if (operation == rewind_operation::LOAD) + m_save.machine().popmessage("No rewind state to load."); + break; + + // success + case STATERR_NONE: + { + const char *const warning = (m_save.machine().system().flags & MACHINE_SUPPORTS_SAVE) ? "" + : "\nWarning: Save states are not officially supported for this machine."; + + // figure out the qantity of valid states + int invalid = get_first_invalid_index(); + + // all states are valid + if (invalid == REWIND_INDEX_NONE) + invalid = m_state_list.size(); + + if (operation == rewind_operation::SAVE) + m_save.machine().popmessage("Rewind state %i captured.\nRewind state count: %i.%s", invalid - 1, invalid, warning); + else + m_save.machine().popmessage("Rewind state %i loaded.\nRewind state count: %i.%s", index, invalid, warning); + } + break; + + // something that shouldn't be allowed to happen + default: + m_save.machine().popmessage("Error: Unknown error during state %s.", opname); + break; + } +} + + +//------------------------------------------------- +// get_current_index - get the index of the +// state to assume as current +//------------------------------------------------- + +int rewinder::get_current_index() +{ + // nowhere to search + if (m_state_list.empty()) + return REWIND_INDEX_NONE; + + // fetch the current machine time + attotime curtime = m_save.machine().time(); + + // find the state at the current time, or at least the first one after + for (auto it = m_state_list.begin(); it < m_state_list.end(); ++it) + if (it->get()->m_time >= curtime) + return it - m_state_list.begin(); + + // all states are older + return REWIND_INDEX_NONE; +} + + +//------------------------------------------------- +// get_first_invalid_index - get the index of the +// first invalid state +//------------------------------------------------- + +int rewinder::get_first_invalid_index() +{ + for (auto it = m_state_list.begin(); it < m_state_list.end(); ++it) + if (!it->get()->m_valid) + return it - m_state_list.begin(); + + // all states are valid + return REWIND_INDEX_NONE; +} + + +//------------------------------------------------- +// invalidate - mark all the future states as +// invalid +//------------------------------------------------- + +int rewinder::invalidate() +{ + // fetch the current state index + int index = get_current_index(); + + // more invalid states may be farther back, account for them too + int invalid = get_first_invalid_index(); + + // roll back if we can + if (invalid != REWIND_INDEX_NONE && (index == REWIND_INDEX_NONE || invalid < index)) + index = invalid; + + if (index != REWIND_INDEX_NONE) + { + // if it's the last state in the list, skip further invalidation + if (++index >= m_state_list.size()) + return index; + + // invalidate all the future states, as the current input might have changed + for (auto it = m_state_list.begin() + index; it < m_state_list.end(); ++it) + it->get()->m_valid = false; + } + + // index of the first invalid state + return index; +} + + +//------------------------------------------------- +// capture - record a single state +//------------------------------------------------- + +void rewinder::capture() +{ + // fetch the current state index and invalidate the future states + int index = invalidate(); + + if (index == REWIND_INDEX_NONE) + { + // no current state, create one + std::unique_ptr state = std::make_unique(m_save); + save_error error = state->save(); + + // validate the state + if (error == STATERR_NONE) + { + // it's safe to append + m_state_list.push_back(std::move(state)); + } + else + { + // internal error, complain and evacuate + report_error(error, rewind_operation::SAVE); + return; + } + } + else + { + // update the existing state + ram_state *state = m_state_list.at(--index).get(); + save_error error = state->save(); + + // validate the state + if (error != STATERR_NONE) + { + // internal error, complain and evacuate + report_error(error, rewind_operation::SAVE); + return; + } + } + + // make sure we still fit in + check_size(); + + // success + report_error(STATERR_NONE, rewind_operation::SAVE); +} + + +//------------------------------------------------- +// step - single step back in time +//------------------------------------------------- + +void rewinder::step() +{ + // check presence of states + if (m_state_list.empty()) + { + // no states, complain and evacuate + report_error(STATERR_NOT_FOUND, rewind_operation::LOAD); + return; + } + + // fetch the current state index + int index = get_current_index(); + + // if there is room, retreat + if (index != REWIND_INDEX_FIRST) + { + // we may be on top of the list, when all states are older + if (index == REWIND_INDEX_NONE) + { + // use the last consecutively valid state, to ensure rewinder integrity + index = get_first_invalid_index(); + + if (index == REWIND_INDEX_NONE) + // all states are valid + index = m_state_list.size(); + else if (index == REWIND_INDEX_FIRST) + { + // no valid states, complain and evacuate + report_error(STATERR_NOT_FOUND, rewind_operation::LOAD); + return; + } + } + + // obtain the state pointer + ram_state *state = m_state_list.at(--index).get(); + + // try to load and report the result + report_error(state->load(), rewind_operation::LOAD, index); + return; + } + + // no valid states, complain + report_error(STATERR_NOT_FOUND, rewind_operation::LOAD); +} + + //------------------------------------------------- // state_entry - constructor //------------------------------------------------- state_entry::state_entry(void *data, const char *name, device_t *device, const char *module, const char *tag, int index, u8 size, u32 count) - : m_data(data), - m_name(name), - m_device(device), - m_module(module), - m_tag(tag), - m_index(index), - m_typesize(size), - m_typecount(count), - m_offset(0) + : m_data(data) + , m_name(name) + , m_device(device) + , m_module(module) + , m_tag(tag) + , m_index(index) + , m_typesize(size) + , m_typecount(count) + , m_offset(0) { } //------------------------------------------------- // flip_data - reverse the endianness of a -// block of data +// block of data //------------------------------------------------- void state_entry::flip_data() diff --git a/src/emu/save.h b/src/emu/save.h index 4f112796eaf..e5c8c2fdbbf 100644 --- a/src/emu/save.h +++ b/src/emu/save.h @@ -26,6 +26,7 @@ enum save_error { STATERR_NONE, + STATERR_NOT_FOUND, STATERR_ILLEGAL_REGISTRATIONS, STATERR_INVALID_HEADER, STATERR_READ_ERROR, @@ -79,18 +80,25 @@ public: u32 m_offset; // offset within the final structure }; +class ram_state; +class rewinder; + class save_manager { // type_checker is a set of templates to identify valid save types template struct type_checker { static const bool is_atom = false; static const bool is_pointer = false; }; template struct type_checker<_ItemType*> { static const bool is_atom = false; static const bool is_pointer = true; }; + friend class ram_state; + friend class rewinder; + public: // construction/destruction save_manager(running_machine &machine); // getters running_machine &machine() const { return m_machine; } + rewinder *rewind() { return m_rewind.get(); } int registration_count() const { return m_entry_list.size(); } bool registration_allowed() const { return m_reg_allowed; } @@ -166,19 +174,69 @@ private: // construction/destruction state_callback(save_prepost_delegate callback); - save_prepost_delegate m_func; // delegate + save_prepost_delegate m_func; // delegate }; // internal state - running_machine & m_machine; // reference to our machine - bool m_reg_allowed; // are registrations allowed? - int m_illegal_regs; // number of illegal registrations + running_machine & m_machine; // reference to our machine + std::unique_ptr m_rewind; // rewinder + bool m_reg_allowed; // are registrations allowed? + int m_illegal_regs; // number of illegal registrations - std::vector> m_entry_list; // list of registered entries + std::vector> m_entry_list; // list of registered entries + std::vector> m_ramstate_list; // list of ram states std::vector> m_presave_list; // list of pre-save functions std::vector> m_postload_list; // list of post-load functions }; +class ram_state +{ + save_manager & m_save; // reference to save_manager + util::vectorstream m_data; // save data buffer + +public: + bool m_valid; // can we load this state? + attotime m_time; // machine timestamp + + ram_state(save_manager &save); + static size_t get_size(save_manager &save); + save_error save(); + save_error load(); +}; + +class rewinder +{ + save_manager & m_save; // reference to save_manager + bool m_enabled; // enable rewind savestates + uint32_t m_capacity; // imposed limit of total states (1-500) + std::vector> m_state_list; // rewinder's own ram states + + // load/save management + enum class rewind_operation + { + SAVE, + LOAD + }; + + enum + { + REWIND_INDEX_NONE = -1, + REWIND_INDEX_FIRST = 0 + }; + + int get_current_index(); + int get_first_invalid_index(); + void check_size(); + void report_error(save_error type, rewind_operation operation, int index = REWIND_INDEX_FIRST); + +public: + rewinder(save_manager &save); + bool enabled() { return m_enabled; } + int invalidate(); + void capture(); + void step(); +}; + // template specializations to enumerate the fundamental atomic types you are allowed to save ALLOW_SAVE_TYPE_AND_ARRAY(char) diff --git a/src/frontend/mame/ui/submenu.cpp b/src/frontend/mame/ui/submenu.cpp index 367fb429a53..33632cb4150 100644 --- a/src/frontend/mame/ui/submenu.cpp +++ b/src/frontend/mame/ui/submenu.cpp @@ -63,6 +63,8 @@ std::vector const submenu::advanced_options = { { submenu::option_type::HEAD, __("State/Playback Options") }, { submenu::option_type::EMU, __("Automatic save/restore"), OPTION_AUTOSAVE }, + { submenu::option_type::EMU, __("Rewind"), OPTION_REWIND }, + { submenu::option_type::EMU, __("Rewind capacity"), OPTION_REWIND_CAPACITY }, { submenu::option_type::EMU, __("Bilinear snapshot"), OPTION_SNAPBILINEAR }, { submenu::option_type::EMU, __("Burn-in"), OPTION_BURNIN }, diff --git a/src/frontend/mame/ui/ui.cpp b/src/frontend/mame/ui/ui.cpp index 026bf0c34f7..df5089cb1c0 100644 --- a/src/frontend/mame/ui/ui.cpp +++ b/src/frontend/mame/ui/ui.cpp @@ -1200,10 +1200,15 @@ uint32_t mame_ui_manager::handler_ingame(render_container &container) // pause single step if (machine().ui_input().pressed(IPT_UI_PAUSE_SINGLE)) { + machine().rewind_capture(); set_single_step(true); machine().resume(); } + // rewind single step + if (machine().ui_input().pressed(IPT_UI_REWIND_SINGLE)) + machine().rewind_step(); + // handle a toggle cheats request if (machine().ui_input().pressed(IPT_UI_TOGGLE_CHEAT)) mame_machine_manager::instance()->cheat().set_enable(!mame_machine_manager::instance()->cheat().enabled()); -- cgit v1.2.3-70-g09d2 From a88483233d75ff8c1528445b3510b40424ac324b Mon Sep 17 00:00:00 2001 From: vadosnaprimer Date: Wed, 6 Dec 2017 18:48:21 +0300 Subject: icount was missing from the savestates When you load a state, icount (*icountptr) would remain whatever it was before loading, messing with the remaining cycles and with the amount of code executed per run() call. This introduced non-determinism and badly influenced usage of savestates while debugging. machine().time() would also return wrong values after that, since it adds remaining cycles. --- src/emu/diexec.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/emu/diexec.cpp b/src/emu/diexec.cpp index 0958108fe42..9af197ac5db 100644 --- a/src/emu/diexec.cpp +++ b/src/emu/diexec.cpp @@ -499,6 +499,7 @@ void device_execute_interface::interface_post_start() assert_always(m_icountptr != nullptr, "m_icountptr never initialized!"); // register for save states + device().save_pointer(NAME(m_icountptr), 1); device().save_item(NAME(m_suspend)); device().save_item(NAME(m_nextsuspend)); device().save_item(NAME(m_eatcycles)); -- cgit v1.2.3-70-g09d2 From 93ab0949c9dc09f573099dcb621ce43a867f0dcd Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 6 Dec 2017 18:02:58 +0100 Subject: zn.cpp: mostly switched to configured banking. nbajamex banking still to update. Very preliminary work on supporting save state. Will need more work in various devices (nw) --- src/mame/drivers/zn.cpp | 380 ++++++++++++++++++++++++------------------------ 1 file changed, 186 insertions(+), 194 deletions(-) diff --git a/src/mame/drivers/zn.cpp b/src/mame/drivers/zn.cpp index 2db94b3e55a..29bffc8bbcf 100644 --- a/src/mame/drivers/zn.cpp +++ b/src/mame/drivers/zn.cpp @@ -117,6 +117,10 @@ public: DECLARE_WRITE16_MEMBER(vt83c461_32_w); DECLARE_DRIVER_INIT(coh1000tb); DECLARE_DRIVER_INIT(nbajamex); + DECLARE_DRIVER_INIT(bam2); + DECLARE_DRIVER_INIT(jdredd); + DECLARE_DRIVER_INIT(coh1000w); + DECLARE_DRIVER_INIT(primrag2); DECLARE_MACHINE_RESET(coh1000c); DECLARE_MACHINE_RESET(glpracr); DECLARE_MACHINE_RESET(coh1000ta); @@ -521,12 +525,12 @@ READ16_MEMBER(zn_state::capcom_kickharness_r) WRITE8_MEMBER(zn_state::bank_coh1000c_w) { - membank( "bankedroms" )->set_base( memregion( "maskroms" )->base() + 0x400000 + ( data * 0x400000 ) ); + membank( "bankedroms" )->set_entry( data ); } WRITE8_MEMBER(zn_state::qsound_bankswitch_w) { - membank( "bank10" )->set_base( memregion( "audiocpu" )->base() + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) ); + membank( "soundbank" )->set_entry( data & 0x0f ); } INTERRUPT_GEN_MEMBER(zn_state::qsound_interrupt) @@ -554,7 +558,10 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1000c) { - membank("bankedroms")->set_base(memregion("maskroms")->base() + 0x400000 ); /* banked game rom */ + membank("bankedroms")->configure_entries(0, 16, memregion( "maskroms" )->base() + 0x400000, 0x400000 ); /* banked game rom */ + membank("bankedroms")->set_entry(0 ); + membank("soundbank")->configure_entries(0, 16, memregion("audiocpu")->base() + 0x8000, 0x4000 ); /* banked audio rom */ + membank("soundbank")->set_entry(0 ); } MACHINE_RESET_MEMBER(zn_state,glpracr) @@ -565,7 +572,7 @@ MACHINE_RESET_MEMBER(zn_state,glpracr) static ADDRESS_MAP_START( qsound_map, AS_PROGRAM, 8, zn_state ) AM_RANGE(0x0000, 0x7fff) AM_ROM - AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank10") /* banked (contains music data) */ + AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank") /* banked (contains music data) */ AM_RANGE(0xd000, 0xd002) AM_DEVWRITE("qsound", qsound_device, qsound_w) AM_RANGE(0xd003, 0xd003) AM_WRITE(qsound_bankswitch_w) AM_RANGE(0xd007, 0xd007) AM_DEVREAD("qsound", qsound_device, qsound_r) @@ -584,7 +591,7 @@ static MACHINE_CONFIG_DERIVED( coh1000c, zn1_1mb_vram ) MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(qsound_map) MCFG_CPU_IO_MAP(qsound_portmap) - MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.c) + MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.cpp) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000c) @@ -604,7 +611,7 @@ static MACHINE_CONFIG_DERIVED( coh1002c, zn1_2mb_vram ) MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(qsound_map) MCFG_CPU_IO_MAP(qsound_portmap) - MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.c) + MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.cpp) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000c) @@ -761,7 +768,7 @@ static MACHINE_CONFIG_DERIVED(coh3002c, zn2) MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(qsound_map) MCFG_CPU_IO_MAP(qsound_portmap) - MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.c) + MCFG_CPU_PERIODIC_INT_DRIVER(zn_state, qsound_interrupt, 250) // measured (cps2.cpp) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000c) @@ -996,12 +1003,12 @@ WRITE8_MEMBER(zn_state::bank_coh1000t_w) m_mb3773->write_line_ck((data & 0x20) >> 5); - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( ( data & 3 ) * 0x800000 ) ); + membank( "bankedroms" )->set_entry( data & 3 ); } WRITE8_MEMBER(zn_state::fx1a_sound_bankswitch_w) { - membank( "bank10" )->set_base( memregion( "audiocpu" )->base() + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) ); + membank( "soundbank" )->set_entry( ( data - 1 ) & 0x07 ); } static ADDRESS_MAP_START(coh1000ta_map, AS_PROGRAM, 32, zn_state) @@ -1015,11 +1022,15 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1000ta) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); + membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); + + membank( "soundbank" )->configure_entries( 0, 8, memregion( "audiocpu" )->base() + 0x4000, 0x4000 ); + membank( "soundbank" )->set_entry( 0 ); } static ADDRESS_MAP_START( fx1a_sound_map, AS_PROGRAM, 8, zn_state ) - AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank10") /* Fallthrough */ + AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("soundbank") /* Fallthrough */ AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ymsnd", ym2610_device, read, write) @@ -1080,11 +1091,14 @@ DRIVER_INIT_MEMBER(zn_state,coh1000tb) { m_fx1b_fram = std::make_unique(0x200); machine().device("fm1208s")->set_base(m_fx1b_fram.get(), 0x200); + + save_pointer(NAME(m_fx1b_fram.get()), 0x200); } MACHINE_RESET_MEMBER(zn_state,coh1000tb) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); /* banked game rom */ + membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED(coh1000tb, zn1_1mb_vram) @@ -1340,6 +1354,11 @@ WRITE16_MEMBER(zn_state::vt83c461_32_w) logerror( "unhandled 32 bit write %04x %04x %04x\n", offset, data, mem_mask ); } +DRIVER_INIT_MEMBER(zn_state,primrag2) +{ + save_item(NAME(m_vt83c461_latch)); +} + static ADDRESS_MAP_START(coh1000w_map, AS_PROGRAM, 32, zn_state) AM_RANGE(0x1f000000, 0x1f1fffff) AM_ROM AM_REGION("roms", 0) AM_RANGE(0x1f000000, 0x1f000003) AM_WRITENOP @@ -1514,7 +1533,7 @@ WRITE8_MEMBER(zn_state::coh1002e_bank_w) { znsecsel_w( space, offset, data, mem_mask ); - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( ( data & 3 ) * 0x800000 ) ); + membank( "bankedroms" )->set_entry( data & 3 ); } WRITE8_MEMBER(zn_state::coh1002e_sound_irq_w) @@ -1533,7 +1552,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002e) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); + membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); } static ADDRESS_MAP_START( psarc_snd_map, AS_PROGRAM, 16, zn_state ) @@ -1618,7 +1638,7 @@ WRITE16_MEMBER(zn_state::bam2_mcu_w) switch( offset ) { case 0: - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( ( data & 0xf ) * 0x400000 ) ); + membank( "bankedroms" )->set_entry( data & 0xf ); break; case 1: @@ -1666,9 +1686,15 @@ static ADDRESS_MAP_START(bam2_map, AS_PROGRAM, 32, zn_state) AM_IMPORT_FROM(zn_map) ADDRESS_MAP_END +DRIVER_INIT_MEMBER(zn_state,bam2) +{ + save_item(NAME(m_bam2_mcu_command)); +} + MACHINE_RESET_MEMBER(zn_state,bam2) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + 0x400000 ); + membank( "bankedroms" )->configure_entries( 0, 16, memregion( "bankedroms" )->base(), 0x400000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 1 ); } static MACHINE_CONFIG_DERIVED( bam2, zn1_2mb_vram ) @@ -1977,6 +2003,10 @@ DRIVER_INIT_MEMBER(zn_state,nbajamex) { m_nbajamex_sram = std::make_unique(0x80000); machine().device("71256")->set_base(m_nbajamex_sram.get(), 0x8000); + + save_pointer(NAME(m_nbajamex_sram.get()), 0x80000); + + save_item(NAME(m_nbajamex_rombank)); } @@ -1985,6 +2015,11 @@ MACHINE_RESET_MEMBER(zn_state,nbajamex) membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); } +DRIVER_INIT_MEMBER(zn_state,jdredd) +{ + save_item(NAME(m_jdredd_gun_mux)); +} + static ADDRESS_MAP_START(jdredd_map, AS_PROGRAM, 32, zn_state) AM_RANGE(0x1f000000, 0x1f1fffff) AM_ROM AM_REGION("roms", 0) AM_RANGE(0x1fbfff80, 0x1fbfff8f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0xffffffff) @@ -2148,7 +2183,7 @@ WRITE16_MEMBER(zn_state::coh1001l_latch_w) WRITE8_MEMBER(zn_state::coh1001l_bank_w) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( ( data & 3 ) * 0x800000 ) ); + membank( "bankedroms" )->set_entry( data & 3 ); } static ADDRESS_MAP_START(coh1001l_map, AS_PROGRAM, 32, zn_state) @@ -2161,7 +2196,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1001l) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); /* banked rom */ + membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); } static ADDRESS_MAP_START( atlus_snd_map, AS_PROGRAM, 16, zn_state ) @@ -2204,7 +2240,7 @@ Key: Mother KN01 WRITE8_MEMBER(zn_state::coh1002v_bank_w) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + ( data * 0x100000 ) ); + membank( "bankedroms" )->set_entry( data ); } static ADDRESS_MAP_START(coh1002v_map, AS_PROGRAM, 32, zn_state) @@ -2217,7 +2253,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002v) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); /* banked rom */ + membank( "bankedroms" )->configure_entries( 0, 24, memregion( "bankedroms" )->base(), 0x100000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED( coh1002v, zn1_2mb_vram ) @@ -2388,7 +2425,7 @@ Notes: WRITE8_MEMBER(zn_state::coh1002m_bank_w) { verboselog(1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + (data * 0x800000) ); + membank( "bankedroms" )->set_entry( data ); } static ADDRESS_MAP_START(coh1002m_map, AS_PROGRAM, 32, zn_state) @@ -2400,7 +2437,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002m) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); + membank( "bankedroms" )->configure_entries( 0, 6, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + membank( "bankedroms" )->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED( coh1002m, zn1_2mb_vram ) @@ -2742,7 +2780,7 @@ ROM_START( coh1000c ) ROM_REGION32_LE( 0x80000, "countryrom", ROMREGION_ERASE00 ) ROM_REGION32_LE( 0x2400000, "maskroms", ROMREGION_ERASE00 ) - ROM_REGION( 0x50000, "audiocpu", ROMREGION_ERASE00 ) + ROM_REGION( 0x40000, "audiocpu", ROMREGION_ERASE00 ) ROM_REGION( 0x400000, "qsound", ROMREGION_ERASE00 ) ROM_REGION( 0x8, "cat702_2", 0 ) ROM_COPY( "cat702_1", 0x0, 0x0, 0x8 ) ROM_END @@ -2760,9 +2798,8 @@ ROM_START( ts2 ) ROM_LOAD( "ts2-08m", 0x0800000, 0x400000, CRC(b1f7f115) SHA1(3f416d2aac07aa73a99593b5a21b047da60cea6a) ) ROM_LOAD( "ts2-10m.4k", 0x0c00000, 0x200000, CRC(ad90679a) SHA1(19dd30764f892ee7f89c78ccbccdaf4d6b0e6e09) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ts2_02.2e", 0x00000, 0x08000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ts2_02.2e", 0x00000, 0x20000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ts2-01m.3b", 0x0000000, 0x400000, CRC(d7a505e0) SHA1(f1b0cdea712101f695bd326eccd753eb79a07490) ) @@ -2786,9 +2823,8 @@ ROM_START( ts2a ) ROM_LOAD( "ts2-09m.3k", 0x0a00000, 0x200000, CRC(83f408de) SHA1(415787c4dca604dd5611e16936a0ffa981dedf78) ) ROM_LOAD( "ts2-10m.4k", 0x0c00000, 0x200000, CRC(ad90679a) SHA1(19dd30764f892ee7f89c78ccbccdaf4d6b0e6e09) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ts2_02.2e", 0x00000, 0x08000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ts2_02.2e", 0x00000, 0x20000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ts2-01m.3b", 0x0000000, 0x400000, CRC(d7a505e0) SHA1(f1b0cdea712101f695bd326eccd753eb79a07490) ) @@ -2810,9 +2846,8 @@ ROM_START( ts2j ) ROM_LOAD( "ts2-08m", 0x0800000, 0x400000, CRC(b1f7f115) SHA1(3f416d2aac07aa73a99593b5a21b047da60cea6a) ) ROM_LOAD( "ts2-10m.4k", 0x0c00000, 0x200000, CRC(ad90679a) SHA1(19dd30764f892ee7f89c78ccbccdaf4d6b0e6e09) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ts2_02.2e", 0x00000, 0x08000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ts2_02.2e", 0x00000, 0x20000, CRC(2f45c461) SHA1(513b6b9b5a2f7c567c30c958e0e13834cd9bd266) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ts2-01m.3b", 0x0000000, 0x400000, CRC(d7a505e0) SHA1(f1b0cdea712101f695bd326eccd753eb79a07490) ) @@ -2836,10 +2871,9 @@ ROM_START( starglad ) ROM_LOAD( "ps1-09m.3k", 0x1000000, 0x400000, CRC(bd894812) SHA1(9f0c3365e685a53ae793f4a256a6c177a843a424) ) ROM_LOAD( "ps1-10m.4k", 0x1400000, 0x400000, CRC(ff80c18a) SHA1(8d01717eed6ec1f508fe7c445da941fb84ef7d22) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ps1_02a.2e", 0x00000, 0x08000, CRC(b854df92) SHA1(ea71a613b5b19ec7e9c6e342e7743d320582a6bb) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "ps1_03a.3e", 0x28000, 0x20000, CRC(a2562fbb) SHA1(3de02a4aa7ea620961ca2a5c331f38134033db79) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ps1_02a.2e", 0x00000, 0x20000, CRC(b854df92) SHA1(ea71a613b5b19ec7e9c6e342e7743d320582a6bb) ) + ROM_LOAD( "ps1_03a.3e", 0x20000, 0x20000, CRC(a2562fbb) SHA1(3de02a4aa7ea620961ca2a5c331f38134033db79) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ps1-01m.3b", 0x0000000, 0x400000, CRC(0bfb17aa) SHA1(cf4482785a2a33ad814c8b1461c5bc8e8e027895) ) @@ -2863,10 +2897,9 @@ ROM_START( stargladj ) ROM_LOAD( "ps1-09m.3k", 0x1000000, 0x400000, CRC(bd894812) SHA1(9f0c3365e685a53ae793f4a256a6c177a843a424) ) ROM_LOAD( "ps1-10m.4k", 0x1400000, 0x400000, CRC(ff80c18a) SHA1(8d01717eed6ec1f508fe7c445da941fb84ef7d22) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ps1_02a.2e", 0x00000, 0x08000, CRC(b854df92) SHA1(ea71a613b5b19ec7e9c6e342e7743d320582a6bb) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "ps1_03a.3e", 0x28000, 0x20000, CRC(a2562fbb) SHA1(3de02a4aa7ea620961ca2a5c331f38134033db79) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ps1_02a.2e", 0x00000, 0x20000, CRC(b854df92) SHA1(ea71a613b5b19ec7e9c6e342e7743d320582a6bb) ) + ROM_LOAD( "ps1_03a.3e", 0x20000, 0x20000, CRC(a2562fbb) SHA1(3de02a4aa7ea620961ca2a5c331f38134033db79) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ps1-01m.3b", 0x0000000, 0x400000, CRC(0bfb17aa) SHA1(cf4482785a2a33ad814c8b1461c5bc8e8e027895) ) @@ -2903,7 +2936,7 @@ ROM_START( glpracr ) ROM_LOAD( "gra-07m.5h", 0x0800000, 0x400000, CRC(acaefe3a) SHA1(32d596b0f975e1558fa7929c3166d8dad40a1c80) ) /* Sockets 2.2E, 3.3E are not populated, pcb verified */ - ROM_REGION( 0x50000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for the audio CPU (+banks) */ + ROM_REGION( 0x40000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for the audio CPU (+banks) */ /* Socket 1.3B is not populated, pcb verified */ ROM_REGION( 0x400000, "qsound", ROMREGION_ERASE00 ) /* Q Sound Samples */ @@ -2925,7 +2958,7 @@ ROM_START( glpracrj ) ROM_LOAD( "gra-07m.5h", 0x0800000, 0x400000, CRC(acaefe3a) SHA1(32d596b0f975e1558fa7929c3166d8dad40a1c80) ) /* Sockets 2.2E, 3.3E are not populated, pcb verified */ - ROM_REGION( 0x50000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for the audio CPU (+banks) */ + ROM_REGION( 0x40000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for the audio CPU (+banks) */ /* Socket 1.3B is not populated, pcb verified */ ROM_REGION( 0x400000, "qsound", ROMREGION_ERASE00 ) /* Q Sound Samples */ @@ -2949,10 +2982,9 @@ ROM_START( sfex ) ROM_LOAD( "sfe-09m.3k", 0x1000000, 0x400000, CRC(62c424cc) SHA1(ea19c49b486473b150dbf8541286e225655496db) ) ROM_LOAD( "sfe-10m.4k", 0x1400000, 0x400000, CRC(83791a8b) SHA1(534969797640834ca692c11d0ce7c3a060fc7e4b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -2976,10 +3008,9 @@ ROM_START( sfexu ) ROM_LOAD( "sfe-09m.3k", 0x1000000, 0x400000, CRC(62c424cc) SHA1(ea19c49b486473b150dbf8541286e225655496db) ) ROM_LOAD( "sfe-10m.4k", 0x1400000, 0x400000, CRC(83791a8b) SHA1(534969797640834ca692c11d0ce7c3a060fc7e4b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3003,10 +3034,9 @@ ROM_START( sfexa ) ROM_LOAD( "sfe-09m.3k", 0x1000000, 0x400000, CRC(62c424cc) SHA1(ea19c49b486473b150dbf8541286e225655496db) ) ROM_LOAD( "sfe-10m.4k", 0x1400000, 0x400000, CRC(83791a8b) SHA1(534969797640834ca692c11d0ce7c3a060fc7e4b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3030,10 +3060,9 @@ ROM_START( sfexj ) ROM_LOAD( "sfe-09m.3k", 0x1000000, 0x400000, CRC(62c424cc) SHA1(ea19c49b486473b150dbf8541286e225655496db) ) ROM_LOAD( "sfe-10m.4k", 0x1400000, 0x400000, CRC(83791a8b) SHA1(534969797640834ca692c11d0ce7c3a060fc7e4b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3057,10 +3086,9 @@ ROM_START( sfexp ) ROM_LOAD( "sfp-09m.3k", 0x1000000, 0x400000, CRC(15f8b71e) SHA1(efb28fbe750f443550ee9718385355aae7e858c9) ) ROM_LOAD( "sfp-10m.4k", 0x1400000, 0x400000, CRC(c1ecf652) SHA1(616e14ff63d38272730c810b933a6b3412e2da17) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3084,10 +3112,9 @@ ROM_START( sfexpu1 ) ROM_LOAD( "sfp-09m.3k", 0x1000000, 0x400000, CRC(15f8b71e) SHA1(efb28fbe750f443550ee9718385355aae7e858c9) ) ROM_LOAD( "sfp-10m.4k", 0x1400000, 0x400000, CRC(c1ecf652) SHA1(616e14ff63d38272730c810b933a6b3412e2da17) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3111,10 +3138,9 @@ ROM_START( sfexpj ) ROM_LOAD( "sfp-09m.3k", 0x1000000, 0x400000, CRC(15f8b71e) SHA1(efb28fbe750f443550ee9718385355aae7e858c9) ) ROM_LOAD( "sfp-10m.4k", 0x1400000, 0x400000, CRC(c1ecf652) SHA1(616e14ff63d38272730c810b933a6b3412e2da17) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3138,10 +3164,9 @@ ROM_START( sfexpj1 ) ROM_LOAD( "sfp-09m.3k", 0x1000000, 0x400000, CRC(15f8b71e) SHA1(efb28fbe750f443550ee9718385355aae7e858c9) ) ROM_LOAD( "sfp-10m.4k", 0x1400000, 0x400000, CRC(c1ecf652) SHA1(616e14ff63d38272730c810b933a6b3412e2da17) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sfe_02.2e", 0x00000, 0x08000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sfe_03.3e", 0x28000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sfe_02.2e", 0x00000, 0x20000, CRC(1908475c) SHA1(99f68cff2d92f5697eec0846201f6fb317d5dc08) ) + ROM_LOAD( "sfe_03.3e", 0x20000, 0x20000, CRC(95c1e2e0) SHA1(383bbe9613798a3ac6944d18768280a840994e40) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sfe-01m.3b", 0x0000000, 0x400000, CRC(f5afff0d) SHA1(7f9ac32ba0a3d9c6fef367e36a92d47c9ac1feb3) ) @@ -3165,7 +3190,7 @@ ROM_START( coh3002c ) ROM_REGION32_LE( 0x80000, "countryrom", ROMREGION_ERASE00 ) ROM_REGION32_LE( 0x3000000, "maskroms", ROMREGION_ERASE00 ) - ROM_REGION( 0x50000, "audiocpu", ROMREGION_ERASE00 ) + ROM_REGION( 0x40000, "audiocpu", ROMREGION_ERASE00 ) ROM_REGION( 0x400000, "qsound", ROMREGION_ERASE00 ) ROM_REGION( 0x8, "cat702_2", 0 ) ROM_COPY( "cat702_1", 0x0, 0x0, 0x8 ) ROM_END @@ -3188,10 +3213,9 @@ ROM_START( rvschool ) ROM_LOAD( "jst-12m.6k", 0x1c00000, 0x400000, CRC(43bd2ddd) SHA1(7f2976e394362cb648f620e430b3bf11b71485a6) ) ROM_LOAD( "jst-13m.7k", 0x2000000, 0x400000, CRC(6b443235) SHA1(c764d8b742aa1c46bc8d37f36e864ef50a1ff4e4) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "jst_02.2e", 0x00000, 0x08000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "jst_03.3e", 0x28000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "jst_02.2e", 0x00000, 0x20000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) + ROM_LOAD( "jst_03.3e", 0x20000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "jst-01m.3b", 0x0000000, 0x400000, CRC(9a7c98f9) SHA1(764c6c4f41047e1f36d2dceac4aa9b943a9d529a) ) @@ -3218,10 +3242,9 @@ ROM_START( rvschoolu ) ROM_LOAD( "jst-12m.6k", 0x1c00000, 0x400000, CRC(43bd2ddd) SHA1(7f2976e394362cb648f620e430b3bf11b71485a6) ) ROM_LOAD( "jst-13m.7k", 0x2000000, 0x400000, CRC(6b443235) SHA1(c764d8b742aa1c46bc8d37f36e864ef50a1ff4e4) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "jst_02.2e", 0x00000, 0x08000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "jst_03.3e", 0x28000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "jst_02.2e", 0x00000, 0x20000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) + ROM_LOAD( "jst_03.3e", 0x20000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "jst-01m.3b", 0x0000000, 0x400000, CRC(9a7c98f9) SHA1(764c6c4f41047e1f36d2dceac4aa9b943a9d529a) ) @@ -3248,10 +3271,9 @@ ROM_START( rvschoola ) ROM_LOAD( "jst-12m.6k", 0x1c00000, 0x400000, CRC(43bd2ddd) SHA1(7f2976e394362cb648f620e430b3bf11b71485a6) ) ROM_LOAD( "jst-13m.7k", 0x2000000, 0x400000, CRC(6b443235) SHA1(c764d8b742aa1c46bc8d37f36e864ef50a1ff4e4) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "jst_02.2e", 0x00000, 0x08000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "jst_03.3e", 0x28000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "jst_02.2e", 0x00000, 0x20000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) + ROM_LOAD( "jst_03.3e", 0x20000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "jst-01m.3b", 0x0000000, 0x400000, CRC(9a7c98f9) SHA1(764c6c4f41047e1f36d2dceac4aa9b943a9d529a) ) @@ -3278,10 +3300,9 @@ ROM_START( jgakuen ) ROM_LOAD( "jst-12m.6k", 0x1c00000, 0x400000, CRC(43bd2ddd) SHA1(7f2976e394362cb648f620e430b3bf11b71485a6) ) ROM_LOAD( "jst-13m.7k", 0x2000000, 0x400000, CRC(6b443235) SHA1(c764d8b742aa1c46bc8d37f36e864ef50a1ff4e4) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "jst_02.2e", 0x00000, 0x08000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "jst_03.3e", 0x28000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "jst_02.2e", 0x00000, 0x20000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) + ROM_LOAD( "jst_03.3e", 0x20000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "jst-01m.3b", 0x0000000, 0x400000, CRC(9a7c98f9) SHA1(764c6c4f41047e1f36d2dceac4aa9b943a9d529a) ) @@ -3308,10 +3329,9 @@ ROM_START( jgakuen1 ) ROM_LOAD( "jst-12m.6k", 0x1c00000, 0x400000, CRC(43bd2ddd) SHA1(7f2976e394362cb648f620e430b3bf11b71485a6) ) ROM_LOAD( "jst-13m.7k", 0x2000000, 0x400000, CRC(6b443235) SHA1(c764d8b742aa1c46bc8d37f36e864ef50a1ff4e4) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "jst_02.2e", 0x00000, 0x08000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "jst_03.3e", 0x28000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "jst_02.2e", 0x00000, 0x20000, CRC(7809e2c3) SHA1(0216a665f7978bc8db3f7fdab038e1c7aa120844) ) + ROM_LOAD( "jst_03.3e", 0x20000, 0x20000, CRC(860ff24d) SHA1(eea72fa5eaf407a112a5b3daf60f7ac8ad191cc7) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "jst-01m.3b", 0x0000000, 0x400000, CRC(9a7c98f9) SHA1(764c6c4f41047e1f36d2dceac4aa9b943a9d529a) ) @@ -3340,9 +3360,8 @@ ROM_START( sfex2 ) ROM_LOAD( "ex2-08m.2k", 0x1800000, 0x800000, CRC(3194132e) SHA1(d1324fcf0a8528fc683791d6342697a7e08674f4) ) ROM_LOAD( "ex2-09m.3k", 0x2000000, 0x400000, CRC(075ae585) SHA1(6b88851db618fc3e96f1d740c46c1bc5be0ee21b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ex2_02.2e", 0x00000, 0x08000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ex2_02.2e", 0x00000, 0x20000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ex2-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3365,9 +3384,8 @@ ROM_START( sfex2u1 ) ROM_LOAD( "ex2-08m.2k", 0x1800000, 0x800000, CRC(3194132e) SHA1(d1324fcf0a8528fc683791d6342697a7e08674f4) ) ROM_LOAD( "ex2-09m.3k", 0x2000000, 0x400000, CRC(075ae585) SHA1(6b88851db618fc3e96f1d740c46c1bc5be0ee21b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ex2_02.2e", 0x00000, 0x08000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ex2_02.2e", 0x00000, 0x20000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ex2-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3390,9 +3408,8 @@ ROM_START( sfex2a ) ROM_LOAD( "ex2-08m.2k", 0x1800000, 0x800000, CRC(3194132e) SHA1(d1324fcf0a8528fc683791d6342697a7e08674f4) ) ROM_LOAD( "ex2-09m.3k", 0x2000000, 0x400000, CRC(075ae585) SHA1(6b88851db618fc3e96f1d740c46c1bc5be0ee21b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ex2_02.2e", 0x00000, 0x08000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ex2_02.2e", 0x00000, 0x20000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ex2-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3415,9 +3432,8 @@ ROM_START( sfex2h ) ROM_LOAD( "ex2-08m.2k", 0x1800000, 0x800000, CRC(3194132e) SHA1(d1324fcf0a8528fc683791d6342697a7e08674f4) ) ROM_LOAD( "ex2-09m.3k", 0x2000000, 0x400000, CRC(075ae585) SHA1(6b88851db618fc3e96f1d740c46c1bc5be0ee21b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ex2_02.2e", 0x00000, 0x08000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ex2_02.2e", 0x00000, 0x20000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ex2-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3440,9 +3456,8 @@ ROM_START( sfex2j ) ROM_LOAD( "ex2-08m.2k", 0x1800000, 0x800000, CRC(3194132e) SHA1(d1324fcf0a8528fc683791d6342697a7e08674f4) ) ROM_LOAD( "ex2-09m.3k", 0x2000000, 0x400000, CRC(075ae585) SHA1(6b88851db618fc3e96f1d740c46c1bc5be0ee21b) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ex2_02.2e", 0x00000, 0x08000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ex2_02.2e", 0x00000, 0x20000, CRC(9489875e) SHA1(1fc9985ff98232c63ea8d05a69f7d77cdf72919f) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ex2-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3465,10 +3480,9 @@ ROM_START( plsmaswd ) ROM_LOAD( "sg2-08m.2k", 0x1800000, 0x800000, CRC(9e169eee) SHA1(6141b1a7863fdfb200ca35d2893979a34dcc3f6c) ) ROM_LOAD( "sg2-09m.3k", 0x2000000, 0x400000, CRC(33f73d4c) SHA1(954695a43e77b58585409678bd87c76adac1d855) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sg2_02.2e", 0x00000, 0x08000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sg2_03.3e", 0x28000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sg2_02.2e", 0x00000, 0x20000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) + ROM_LOAD( "sg2_03.3e", 0x20000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sg2-01m.3a", 0x0000000, 0x400000, CRC(643ea27b) SHA1(40747432d5cfebac54d3824b6a6f26b5e7742fc1) ) @@ -3491,10 +3505,9 @@ ROM_START( plsmaswda ) ROM_LOAD( "sg2-08m.2k", 0x1800000, 0x800000, CRC(9e169eee) SHA1(6141b1a7863fdfb200ca35d2893979a34dcc3f6c) ) ROM_LOAD( "sg2-09m.3k", 0x2000000, 0x400000, CRC(33f73d4c) SHA1(954695a43e77b58585409678bd87c76adac1d855) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sg2_02.2e", 0x00000, 0x08000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sg2_03.3e", 0x28000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sg2_02.2e", 0x00000, 0x20000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) + ROM_LOAD( "sg2_03.3e", 0x20000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sg2-01m.3a", 0x0000000, 0x400000, CRC(643ea27b) SHA1(40747432d5cfebac54d3824b6a6f26b5e7742fc1) ) @@ -3517,10 +3530,9 @@ ROM_START( stargld2 ) ROM_LOAD( "sg2-08m.2k", 0x1800000, 0x800000, CRC(9e169eee) SHA1(6141b1a7863fdfb200ca35d2893979a34dcc3f6c) ) ROM_LOAD( "sg2-09m.3k", 0x2000000, 0x400000, CRC(33f73d4c) SHA1(954695a43e77b58585409678bd87c76adac1d855) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "sg2_02.2e", 0x00000, 0x08000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "sg2_03.3e", 0x28000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "sg2_02.2e", 0x00000, 0x20000, CRC(415ee138) SHA1(626083c8705f012552691c450f95401ddc88065b) ) + ROM_LOAD( "sg2_03.3e", 0x20000, 0x20000, CRC(43806735) SHA1(88d389bcc79cbd4fa1f4b62008e171a897e77652) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "sg2-01m.3a", 0x0000000, 0x400000, CRC(643ea27b) SHA1(40747432d5cfebac54d3824b6a6f26b5e7742fc1) ) @@ -3540,9 +3552,8 @@ ROM_START( tgmj ) ROM_LOAD( "ate-05m.3h", 0x0000000, 0x400000, CRC(50977f5a) SHA1(78c2b1965957ff1756c25b76e549f11fc0001153) ) ROM_LOAD( "ate-06m.4h", 0x0400000, 0x400000, CRC(05973f16) SHA1(c9262e8de14c4a9489f7050316012913c1caf0ff) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "ate_02.2e", 0x00000, 0x08000, CRC(f4f6e82f) SHA1(ad6c49197a60f456367c9f78353741fb847819a1) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "ate_02.2e", 0x00000, 0x20000, CRC(f4f6e82f) SHA1(ad6c49197a60f456367c9f78353741fb847819a1) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "ate-01m.3a", 0x0000000, 0x400000, CRC(a21c6521) SHA1(560e4855f6e00def5277bdd12064b49e55c3b46b) ) @@ -3566,10 +3577,9 @@ ROM_START( techromn ) ROM_LOAD( "kio-09m.3k", 0x2000000, 0x800000, CRC(a34f2119) SHA1(50fa992eba5324a173fcc0923227c13cad4f97e5) ) ROM_LOAD( "kio-10m.4k", 0x2800000, 0x800000, CRC(7400037a) SHA1(d58641e1d6bf1c6ca04f6c98d6809edaa7df75d3) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "kio_02.2e", 0x00000, 0x08000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "kio_03.3e", 0x28000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "kio_02.2e", 0x00000, 0x20000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) + ROM_LOAD( "kio_03.3e", 0x20000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "kio-01m.3a", 0x0000000, 0x400000, CRC(6dc5bd07) SHA1(e1755a48465f741691ea0fa1166cb2dc09210ed9) ) @@ -3593,10 +3603,9 @@ ROM_START( techromnu ) ROM_LOAD( "kio-09m.3k", 0x2000000, 0x800000, CRC(a34f2119) SHA1(50fa992eba5324a173fcc0923227c13cad4f97e5) ) ROM_LOAD( "kio-10m.4k", 0x2800000, 0x800000, CRC(7400037a) SHA1(d58641e1d6bf1c6ca04f6c98d6809edaa7df75d3) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "kio_02.2e", 0x00000, 0x08000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "kio_03.3e", 0x28000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "kio_02.2e", 0x00000, 0x20000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) + ROM_LOAD( "kio_03.3e", 0x20000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "kio-01m.3a", 0x0000000, 0x400000, CRC(6dc5bd07) SHA1(e1755a48465f741691ea0fa1166cb2dc09210ed9) ) @@ -3620,10 +3629,9 @@ ROM_START( kikaioh ) ROM_LOAD( "kio-09m.3k", 0x2000000, 0x800000, CRC(a34f2119) SHA1(50fa992eba5324a173fcc0923227c13cad4f97e5) ) ROM_LOAD( "kio-10m.4k", 0x2800000, 0x800000, CRC(7400037a) SHA1(d58641e1d6bf1c6ca04f6c98d6809edaa7df75d3) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "kio_02.2e", 0x00000, 0x08000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "kio_03.3e", 0x28000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "kio_02.2e", 0x00000, 0x20000, CRC(174309b3) SHA1(b35b9c3905d2fabaa8410f70f7b382e916c89733) ) + ROM_LOAD( "kio_03.3e", 0x20000, 0x20000, CRC(0b313ae5) SHA1(0ea39305ca30f376930e39b134fd1a52200624fa) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "kio-01m.3a", 0x0000000, 0x400000, CRC(6dc5bd07) SHA1(e1755a48465f741691ea0fa1166cb2dc09210ed9) ) @@ -3647,10 +3655,9 @@ ROM_START( sfex2p ) ROM_LOAD( "x2p-09m.3k", 0x2000000, 0x800000, CRC(344aa227) SHA1(69dc6f511939bf7fa25c2531ecf307a7565fe7a8) ) ROM_LOAD( "x2p-10m.4k", 0x2800000, 0x800000, CRC(2eef5931) SHA1(e5227529fb68eeb1b2f25813694173a75d906b52) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "x2p_02.2e", 0x00000, 0x08000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "x2p_03.3e", 0x28000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "x2p_02.2e", 0x00000, 0x20000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) + ROM_LOAD( "x2p_03.3e", 0x20000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "x2p-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3674,10 +3681,9 @@ ROM_START( sfex2pa ) ROM_LOAD( "x2p-09m.3k", 0x2000000, 0x800000, CRC(344aa227) SHA1(69dc6f511939bf7fa25c2531ecf307a7565fe7a8) ) ROM_LOAD( "x2p-10m.4k", 0x2800000, 0x800000, CRC(2eef5931) SHA1(e5227529fb68eeb1b2f25813694173a75d906b52) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "x2p_02.2e", 0x00000, 0x08000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "x2p_03.3e", 0x28000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "x2p_02.2e", 0x00000, 0x20000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) + ROM_LOAD( "x2p_03.3e", 0x20000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "x2p-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3701,10 +3707,9 @@ ROM_START( sfex2ph ) ROM_LOAD( "x2p-09m.3k", 0x2000000, 0x800000, CRC(344aa227) SHA1(69dc6f511939bf7fa25c2531ecf307a7565fe7a8) ) ROM_LOAD( "x2p-10m.4k", 0x2800000, 0x800000, CRC(2eef5931) SHA1(e5227529fb68eeb1b2f25813694173a75d906b52) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "x2p_02.2e", 0x00000, 0x08000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "x2p_03.3e", 0x28000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "x2p_02.2e", 0x00000, 0x20000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) + ROM_LOAD( "x2p_03.3e", 0x20000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "x2p-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3728,10 +3733,9 @@ ROM_START( sfex2pj ) ROM_LOAD( "x2p-09m.3k", 0x2000000, 0x800000, CRC(344aa227) SHA1(69dc6f511939bf7fa25c2531ecf307a7565fe7a8) ) ROM_LOAD( "x2p-10m.4k", 0x2800000, 0x800000, CRC(2eef5931) SHA1(e5227529fb68eeb1b2f25813694173a75d906b52) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "x2p_02.2e", 0x00000, 0x08000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) - ROM_CONTINUE( 0x10000, 0x18000 ) - ROM_LOAD( "x2p_03.3e", 0x28000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "x2p_02.2e", 0x00000, 0x20000, CRC(3705de5e) SHA1(847007ca271da64bf13ffbf496d4291429eee27a) ) + ROM_LOAD( "x2p_03.3e", 0x20000, 0x20000, CRC(6ae828f6) SHA1(41c54165e87b846a845da581f408b96979288158) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "x2p-01m.3a", 0x0000000, 0x400000, CRC(14a5bb0e) SHA1(dfe3c3a53bd4c58743d8039b5344d3afbe2a9c24) ) @@ -3755,9 +3759,8 @@ ROM_START( strider2 ) ROM_LOAD( "hr2-09m.3k", 0x2000000, 0x800000, CRC(cdd43e6b) SHA1(346a83deadecd56428276acefc2ce95249a49921) ) ROM_LOAD( "hr2-10m.4k", 0x2800000, 0x400000, CRC(d95b3f37) SHA1(b6566c1184718f6c0986d13060894c0fb400c201) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "hr2_02.2e", 0x00000, 0x08000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "hr2_02.2e", 0x00000, 0x20000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "hr2-01m.3a", 0x0000000, 0x200000, CRC(510a16d1) SHA1(05f10c2921a4d3b1fab4d0a4ea06351809bdbb07) ) @@ -3782,9 +3785,8 @@ ROM_START( strider2a ) ROM_LOAD( "hr2-09m.3k", 0x2000000, 0x800000, CRC(cdd43e6b) SHA1(346a83deadecd56428276acefc2ce95249a49921) ) ROM_LOAD( "hr2-10m.4k", 0x2800000, 0x400000, CRC(d95b3f37) SHA1(b6566c1184718f6c0986d13060894c0fb400c201) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "hr2_02.2e", 0x00000, 0x08000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "hr2_02.2e", 0x00000, 0x20000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "hr2-01m.3a", 0x0000000, 0x200000, CRC(510a16d1) SHA1(05f10c2921a4d3b1fab4d0a4ea06351809bdbb07) ) @@ -3809,9 +3811,8 @@ ROM_START( shiryu2 ) ROM_LOAD( "hr2-09m.3k", 0x2000000, 0x800000, CRC(cdd43e6b) SHA1(346a83deadecd56428276acefc2ce95249a49921) ) ROM_LOAD( "hr2-10m.4k", 0x2800000, 0x400000, CRC(d95b3f37) SHA1(b6566c1184718f6c0986d13060894c0fb400c201) ) - ROM_REGION( 0x50000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ - ROM_LOAD( "hr2_02.2e", 0x00000, 0x08000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_REGION( 0x40000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "hr2_02.2e", 0x00000, 0x20000, CRC(acd8d385) SHA1(5edb61c3d66d2d09a28a71db52eee3a9f7db8c9d) ) ROM_REGION( 0x400000, "qsound", 0 ) /* Q Sound Samples */ ROM_LOAD16_WORD_SWAP( "hr2-01m.3a", 0x0000000, 0x200000, CRC(510a16d1) SHA1(05f10c2921a4d3b1fab4d0a4ea06351809bdbb07) ) @@ -4393,9 +4394,8 @@ ROM_START( mgcldate ) ROM_LOAD( "e32-02.6", 0x0800000, 0x400000, CRC(61c8438c) SHA1(bdbe6079cc634c0cd6580f76619eb2944c9a31d9) ) ROM_LOAD( "e32-03.12", 0x0c00000, 0x200000, CRC(190d1618) SHA1(838a651d32752015baa7e8caea62fd739631b8be) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e32-07.22", 0x0000000, 0x004000, CRC(adf3feb5) SHA1(bae5bc3fad99a92a3492be1b775dab861007eb3b) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e32-07.22", 0x0000000, 0x020000, CRC(adf3feb5) SHA1(bae5bc3fad99a92a3492be1b775dab861007eb3b) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x400000, "ymsnd", 0 ) ROM_LOAD( "e32-04.15", 0x0000000, 0x400000, CRC(c72f9eea) SHA1(7ab8b412a8ed00a42016acb7d13d3b074155780a) ) @@ -4414,9 +4414,8 @@ ROM_START( mgcldtex ) ROM_LOAD( "e32-02.6", 0x0800000, 0x400000, CRC(61c8438c) SHA1(bdbe6079cc634c0cd6580f76619eb2944c9a31d9) ) ROM_LOAD( "e32-03.12", 0x0c00000, 0x200000, CRC(190d1618) SHA1(838a651d32752015baa7e8caea62fd739631b8be) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e32-10.22", 0x0000000, 0x004000, CRC(adf3feb5) SHA1(bae5bc3fad99a92a3492be1b775dab861007eb3b) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e32-10.22", 0x0000000, 0x020000, CRC(adf3feb5) SHA1(bae5bc3fad99a92a3492be1b775dab861007eb3b) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x400000, "ymsnd", 0 ) ROM_LOAD( "e32-04.15", 0x0000000, 0x400000, CRC(c72f9eea) SHA1(7ab8b412a8ed00a42016acb7d13d3b074155780a) ) @@ -4436,9 +4435,8 @@ ROM_START( psyforce ) ROM_LOAD( "e22-03.19", 0x0a00000, 0x200000, CRC(8372f839) SHA1(646b3919b6be63412c11850ec1524685abececc0) ) ROM_LOAD( "e22-04.21", 0x0c00000, 0x200000, CRC(397b71aa) SHA1(48743c362503c1d2dbeb3c8be4cb2aaaae015b88) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e22-07.22", 0x0000000, 0x004000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e22-07.22", 0x0000000, 0x020000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) )// 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e22-01.15", 0x000000, 0x200000, CRC(808b8340) SHA1(d8bde850dd9b5b71e94ea707d2d728754f907977) ) @@ -4457,9 +4455,8 @@ ROM_START( psyforcej ) ROM_LOAD( "e22-03.19", 0x0a00000, 0x200000, CRC(8372f839) SHA1(646b3919b6be63412c11850ec1524685abececc0) ) ROM_LOAD( "e22-04.21", 0x0c00000, 0x200000, CRC(397b71aa) SHA1(48743c362503c1d2dbeb3c8be4cb2aaaae015b88) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e22-07.22", 0x0000000, 0x004000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e22-07.22", 0x0000000, 0x020000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) )// 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e22-01.15", 0x000000, 0x200000, CRC(808b8340) SHA1(d8bde850dd9b5b71e94ea707d2d728754f907977) ) @@ -4478,9 +4475,8 @@ ROM_START( psyforcex ) ROM_LOAD( "e22-03.19", 0x0a00000, 0x200000, CRC(8372f839) SHA1(646b3919b6be63412c11850ec1524685abececc0) ) ROM_LOAD( "e22-04.21", 0x0c00000, 0x200000, CRC(397b71aa) SHA1(48743c362503c1d2dbeb3c8be4cb2aaaae015b88) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e22-07.22", 0x0000000, 0x004000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e22-07.22", 0x0000000, 0x020000, CRC(739af589) SHA1(dbb4d1c6d824a99ccf27168e2c21644e19811523) )// 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e22-01.15", 0x000000, 0x200000, CRC(808b8340) SHA1(d8bde850dd9b5b71e94ea707d2d728754f907977) ) @@ -4576,9 +4572,8 @@ ROM_START( sfchamp ) ROM_LOAD( "e18-04.19", 0x0a00000, 0x200000, CRC(fc3731da) SHA1(58948aad8d7bb7a8449d2bf12e9d5e6d7b4426b5) ) ROM_LOAD( "e18-05.21", 0x0c00000, 0x200000, CRC(2e984c50) SHA1(6d8255e38c67d68bf489c9885663ed2edf148188) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e18-09.22", 0x0000000, 0x004000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e18-09.22", 0x0000000, 0x020000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e18-01.15", 0x0000000, 0x200000, CRC(dbd1408c) SHA1(ef81064f2f95e5ae25eb1f10d1e78f27f9e294f5) ) @@ -4598,9 +4593,8 @@ ROM_START( sfchampo ) ROM_LOAD( "e18-04.19", 0x0a00000, 0x200000, CRC(fc3731da) SHA1(58948aad8d7bb7a8449d2bf12e9d5e6d7b4426b5) ) ROM_LOAD( "e18-05.21", 0x0c00000, 0x200000, CRC(2e984c50) SHA1(6d8255e38c67d68bf489c9885663ed2edf148188) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e18-09.22", 0x0000000, 0x004000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e18-09.22", 0x0000000, 0x020000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e18-01.15", 0x0000000, 0x200000, CRC(dbd1408c) SHA1(ef81064f2f95e5ae25eb1f10d1e78f27f9e294f5) ) @@ -4620,9 +4614,8 @@ ROM_START( sfchampu ) ROM_LOAD( "e18-04.19", 0x0a00000, 0x200000, CRC(fc3731da) SHA1(58948aad8d7bb7a8449d2bf12e9d5e6d7b4426b5) ) ROM_LOAD( "e18-05.21", 0x0c00000, 0x200000, CRC(2e984c50) SHA1(6d8255e38c67d68bf489c9885663ed2edf148188) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e18-09.22", 0x0000000, 0x004000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e18-09.22", 0x0000000, 0x020000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e18-01.15", 0x0000000, 0x200000, CRC(dbd1408c) SHA1(ef81064f2f95e5ae25eb1f10d1e78f27f9e294f5) ) @@ -4642,9 +4635,8 @@ ROM_START( sfchampj ) ROM_LOAD( "e18-04.19", 0x0a00000, 0x200000, CRC(fc3731da) SHA1(58948aad8d7bb7a8449d2bf12e9d5e6d7b4426b5) ) ROM_LOAD( "e18-05.21", 0x0c00000, 0x200000, CRC(2e984c50) SHA1(6d8255e38c67d68bf489c9885663ed2edf148188) ) - ROM_REGION( 0x2c000, "audiocpu", 0 ) /* 64k for Z80 code */ - ROM_LOAD( "e18-09.22", 0x0000000, 0x004000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) - ROM_CONTINUE( 0x0010000, 0x01c000 ) /* banked stuff */ + ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for Z80 code */ + ROM_LOAD( "e18-09.22", 0x0000000, 0x020000, CRC(bb5a5319) SHA1(0bb700cafc157d3af663cc9bebb8167487ff2852) ) // 0x4000 - 0x20000 banked ROM_REGION( 0x200000, "ymsnd", 0 ) ROM_LOAD( "e18-01.15", 0x0000000, 0x200000, CRC(dbd1408c) SHA1(ef81064f2f95e5ae25eb1f10d1e78f27f9e294f5) ) @@ -5185,15 +5177,15 @@ GAME( 1999, strider2a, strider2, coh3002c, zn, zn_state, 0, ROT0, "Capc GAME( 1999, shiryu2, strider2, coh3002c, zn, zn_state, 0, ROT0, "Capcom", "Strider Hiryu 2 (Japan 991213)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* Atari */ -GAME( 1996, coh1000w, 0, coh1000w, zn, zn_state, 0, ROT0, "Atari", "Atari PSX", MACHINE_IS_BIOS_ROOT ) -GAME( 1996, primrag2, coh1000w, coh1000w, primrag2, zn_state, 0, ROT0, "Atari", "Primal Rage 2 (Ver 0.36a)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // watchdog reset at startup +GAME( 1996, coh1000w, 0, coh1000w, zn, zn_state, 0, ROT0, "Atari", "Atari PSX", MACHINE_IS_BIOS_ROOT ) +GAME( 1996, primrag2, coh1000w, coh1000w, primrag2, zn_state, primrag2, ROT0, "Atari", "Primal Rage 2 (Ver 0.36a)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // watchdog reset at startup /* Acclaim */ GAME( 1995, coh1000a, 0, coh1000a, zn, zn_state, 0, ROT0, "Acclaim", "Acclaim PSX", MACHINE_IS_BIOS_ROOT ) GAME( 1996, nbajamex, coh1000a, nbajamex, nbajamex, zn_state, nbajamex, ROT0, "Acclaim", "NBA Jam Extreme (ver. 1.10I)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, nbajamexa, nbajamex, nbajamex, nbajamex, zn_state, nbajamex, ROT0, "Acclaim", "NBA Jam Extreme (ver. 1.04)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1996, jdredd, coh1000a, jdredd, jdredd, zn_state, 0, ROT0, "Acclaim", "Judge Dredd (Rev C Dec. 17 1997)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1996, jdreddb, jdredd, jdredd, jdredd, zn_state, 0, ROT0, "Acclaim", "Judge Dredd (Rev B Nov. 26 1997)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1996, jdredd, coh1000a, jdredd, jdredd, zn_state, jdredd, ROT0, "Acclaim", "Judge Dredd (Rev C Dec. 17 1997)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1996, jdreddb, jdredd, jdredd, jdredd, zn_state, jdredd, ROT0, "Acclaim", "Judge Dredd (Rev B Nov. 26 1997)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* Tecmo */ GAME( 1997, coh1002m, 0, coh1002m, zn, zn_state, 0, ROT0, "Tecmo", "TPS", MACHINE_IS_BIOS_ROOT ) @@ -5263,7 +5255,7 @@ GAME( 2000, brvbladea, brvblade, coh1002e, znt, zn_state, 0, ROT270, "Ei GAME( 2000, brvbladej, brvblade, coh1002e, znt, zn_state, 0, ROT270, "Eighting / Raizing", "Brave Blade (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* Bust a Move 2 uses the PSARC95 bios and ET series security but the top board is completely different */ -GAME( 1999, bam2, coh1002e, bam2, zn, zn_state, 0, ROT0, "Metro / Enix / Namco", "Bust a Move 2 - Dance Tengoku Mix (Japanese ROM ver. 1999/07/17 10:00:00)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) +GAME( 1999, bam2, coh1002e, bam2, zn, zn_state, bam2, ROT0, "Metro / Enix / Namco", "Bust a Move 2 - Dance Tengoku Mix (Japanese ROM ver. 1999/07/17 10:00:00)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* Atlus */ GAME( 1996, coh1001l, 0, coh1001l, zn, zn_state, 0, ROT0, "Atlus", "Atlus PSX", MACHINE_IS_BIOS_ROOT ) -- cgit v1.2.3-70-g09d2 From 753495e696281e24b38b0eb2be0c392b0595eeff Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 6 Dec 2017 20:01:34 +0000 Subject: dumped Internal rom from an Oversea (English) region "Oriental Legend 2" cartridge confirming only the region byte changes in that case. [Jeremy Romine, Peter Wilhelmsen, Morten Shearman Kirkegaard] Other regions, including Japan single PCB need confirming to see if there are further changes in those cases or not. As the Oversea version ignores the Card Reader MCU we can mark it as working, so New Working Machines Oriental Legend 2 (Oversea) [David Haywood, MetalliC, Jeremy Romine, Peter Wilhelmsen, Morten Shearman Kirkegaard] --- src/mame/drivers/pgm2.cpp | 89 ++++++++++++++++++++++++++++++++++++++--------- src/mame/mame.lst | 3 ++ 2 files changed, 76 insertions(+), 16 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index c4d4cecb7e8..d52725558b4 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -58,6 +58,20 @@ - Debug/Cheat mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be more unknown debug features. works for both currently dumped games (orleg2, kov2nl) + + Holographic Stickers + + The IGS036 CPUs have holographic stickers on them, there is a number printed on each sticker but it doesn't seem connected to the + game code / revision contained within, it might just be to mark the date the board was produced as it seems to coincide with the + design of the hologram. For reference the ones being used for dumping are + + Dodonpachi Daioujou Tamashi (China) - W10 + King of Fighter 98 UMH (China) - C11 + Knights of Valour 2 (China) - V21 + Knights of Valour 3 (China) - V21 + Oriental Legend 2 (Oversea) - V21 + Oriental Legend 2 (China) - A8 + */ #include "includes/pgm2.h" @@ -361,38 +375,77 @@ MACHINE_CONFIG_END ROM_REGION( 0x10000, "sram", 0 ) \ ROM_LOAD( "xyj2_nvram", 0x00000000, 0x10000, CRC(ccccc71c) SHA1(585b5ccbf89dd28d8532da785d7c8af12f31c6d6) ) -#define ORLEG2_PROGRAM_104 \ +/* + External program revisions are CONFIRMED to be the same between regions, even if the label changes (localized game title + country specific extension code) + + Confirmed country codes used on labels + FA = Oversea + CN = China + JP = Japan + TW = Taiwan + +*/ + +#define ORLEG2_PROGRAM_104(prefix, extension) \ ROM_REGION( 0x1000000, "user1", 0 ) \ - ROM_LOAD( "xyj2_v104cn.u7", 0x00000000, 0x0800000, CRC(7c24a4f5) SHA1(3cd9f9264ef2aad0869afdf096e88eb8d74b2570) ) + ROM_LOAD( #prefix "_v104" #extension ".u7", 0x000000, 0x800000, CRC(7c24a4f5) SHA1(3cd9f9264ef2aad0869afdf096e88eb8d74b2570) ) -#define ORLEG2_PROGRAM_103 \ +#define ORLEG2_PROGRAM_103(prefix, extension) \ ROM_REGION( 0x1000000, "user1", 0 ) \ - ROM_LOAD( "xyj2_v103cn.u7", 0x000000, 0x800000, CRC(21c1fae8) SHA1(36eeb7a5e8dc8ee7c834f3ff1173c28cf6c2f1a3) ) + ROM_LOAD( #prefix "_v103" #extension ".u7", 0x000000, 0x800000, CRC(21c1fae8) SHA1(36eeb7a5e8dc8ee7c834f3ff1173c28cf6c2f1a3) ) -#define ORLEG2_PROGRAM_101 \ +#define ORLEG2_PROGRAM_101(prefix, extension) \ ROM_REGION( 0x1000000, "user1", 0 ) \ - ROM_LOAD( "xyj2_v101cn.u7", 0x000000, 0x800000, CRC(45805b53) SHA1(f2a8399c821b75fadc53e914f6f318707e70787c) ) + ROM_LOAD( #prefix "_v101" #extension ".u7", 0x000000, 0x800000, CRC(45805b53) SHA1(f2a8399c821b75fadc53e914f6f318707e70787c) ) + +/* + Internal ROMs for CHINA and OVERSEA are confirmed to differ by just the region byte, other regions not yet verified. + label is a localized version of the game title and the country code (see above) + For OVERSEA this is "O/L2", but we omit the / due to naming rules + For the CHINA version this uses the Chinese characters +*/ #define ORLEG2_INTERNAL_CHINA \ ROM_REGION( 0x04000, "maincpu", 0 ) \ - /* Offset 3cb8 of the internal rom controls the region, however only China is dumped at the moment. Overseas (English) external ROM is confirmed to match (with FA rom label extensions) but th Internal rom might differ by more than the region byte so needs dumping */ \ - ROM_LOAD( "xyj2_igs036_china.rom", 0x00000000, 0x0004000, CRC(bcce7641) SHA1(c3b5cf6e9f6eae09b6785314777a52b34c3c7657) ) + ROM_LOAD( "xyj2_cn.igs036", 0x00000000, 0x0004000, CRC(bcce7641) SHA1(c3b5cf6e9f6eae09b6785314777a52b34c3c7657) ) + +#define ORLEG2_INTERNAL_OVERSEAS \ + ROM_REGION( 0x04000, "maincpu", 0 ) \ + ROM_LOAD( "ol2_fa.igs036", 0x00000000, 0x0004000, CRC(cc4d398a) SHA1(c50bcc81f02cd5aa8ad157d73209dc53bdedc023) ) ROM_START( orleg2 ) - ORLEG2_INTERNAL_CHINA - ORLEG2_PROGRAM_104 + ORLEG2_INTERNAL_OVERSEAS + ORLEG2_PROGRAM_104(ol2,fa) ORLEG2_VIDEO_SOUND_ROMS ROM_END ROM_START( orleg2_103 ) - ORLEG2_INTERNAL_CHINA - ORLEG2_PROGRAM_103 + ORLEG2_INTERNAL_OVERSEAS + ORLEG2_PROGRAM_103(ol2,fa) ORLEG2_VIDEO_SOUND_ROMS ROM_END ROM_START( orleg2_101 ) + ORLEG2_INTERNAL_OVERSEAS + ORLEG2_PROGRAM_101(ol2,fa) + ORLEG2_VIDEO_SOUND_ROMS +ROM_END + +ROM_START( orleg2_104cn ) + ORLEG2_INTERNAL_CHINA + ORLEG2_PROGRAM_104(xyj2,cn) + ORLEG2_VIDEO_SOUND_ROMS +ROM_END + +ROM_START( orleg2_103cn ) + ORLEG2_INTERNAL_CHINA + ORLEG2_PROGRAM_103(xyj2,cn) + ORLEG2_VIDEO_SOUND_ROMS +ROM_END + +ROM_START( orleg2_101cn ) ORLEG2_INTERNAL_CHINA - ORLEG2_PROGRAM_101 + ORLEG2_PROGRAM_101(xyj2,cn) ORLEG2_VIDEO_SOUND_ROMS ROM_END @@ -796,9 +849,13 @@ DRIVER_INIT_MEMBER(pgm2_state,kof98umh) /* PGM2 */ // Oriental Legend 2 - should be a V102 and V100 too -GAME( 2007, orleg2, 0, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V104, China)", MACHINE_NOT_WORKING ) -GAME( 2007, orleg2_103, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, China)", MACHINE_NOT_WORKING ) -GAME( 2007, orleg2_101, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, China)", MACHINE_NOT_WORKING ) +GAME( 2007, orleg2, 0, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V104, Oversea)", 0 ) /* Overseas sets of OL2 do not use the card reader */ +GAME( 2007, orleg2_103, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, Oversea)", 0 ) +GAME( 2007, orleg2_101, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, Oversea)", 0 ) + +GAME( 2007, orleg2_104cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V104, China)", MACHINE_NOT_WORKING ) +GAME( 2007, orleg2_103cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, China)", MACHINE_NOT_WORKING ) +GAME( 2007, orleg2_101cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, China)", MACHINE_NOT_WORKING ) // Knights of Valour 2 New Legend GAME( 2008, kov2nl, 0, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V302, China)", MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 13514d85eee..d60e4454791 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -31297,6 +31297,9 @@ kov3_100 // orleg2 // (c) 2007 orleg2_103 // orleg2_101 // +orleg2_104cn // +orleg2_103cn // +orleg2_101cn // kof98umh // (c) 2009 @source:pgm3.cpp -- cgit v1.2.3-70-g09d2 From 6a47d8ccc7b6dd1fd69bd23918f35da666cab055 Mon Sep 17 00:00:00 2001 From: vadosnaprimer Date: Wed, 6 Dec 2017 23:28:46 +0300 Subject: explain the rewind command in debughlp fix a typo in the stateload description --- src/emu/debug/debughlp.cpp | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/emu/debug/debughlp.cpp b/src/emu/debug/debughlp.cpp index 2848f970003..3a34030a59f 100644 --- a/src/emu/debug/debughlp.cpp +++ b/src/emu/debug/debughlp.cpp @@ -94,6 +94,7 @@ static const help_item static_help_list[] = " pcatmemd
[,] -- query which PC wrote to a given data memory address for the current CPU\n" " pcatmemi
[,] -- query which PC wrote to a given I/O memory address for the current CPU\n" " (Note: you can also query this info by right clicking in a memory window\n" + " rewind[rw] -- go back in time by loading the most recent rewind state" " statesave[ss] -- save a state file for the current driver\n" " stateload[sl] -- load a state file for the current driver\n" " snap [] -- save a screen snapshot.\n" @@ -454,6 +455,19 @@ static const help_item static_help_list[] = "pcatmem 400000\n" " Print which PC wrote this CPU's memory location 0x400000.\n" }, + { + "rewind[rw]", + "\n" + " rewind[rw]" + "\n" + "The rewind command loads the most recent RAM-based state. Rewind states, when enabled, are " + "saved when \"step\", \"over\", or \"out\" command gets executed, storing the machine state as " + "of the moment before actually steping. Consecutively loading rewind states can work like " + "reverse execution. Depending on which steps forward were taken previously, the bahavior can " + "be similar to GDB's \"reverse-stepi\" or \"reverse-next\". All output for this command is " + "currently echoed into the running machine window. Previous memory and PC tracking statistics " + "are cleared, actual reverse execution does not occur.\n" + }, { "statesave[ss]", "\n" @@ -472,7 +486,7 @@ static const help_item static_help_list[] = { "stateload[sl]", "\n" - " stateload[ss] \n" + " stateload[sl] \n" "\n" "The stateload command retrieves a save state from disk. " "The given state file gets read from the standard state directory (sta), and gets .sta to it - " -- cgit v1.2.3-70-g09d2 From 5d51e9110027e4aff1f9d3f109cee4278a0847e8 Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Wed, 6 Dec 2017 21:51:16 +0100 Subject: no help = no hyperstone drc, nw --- scripts/src/cpu.lua | 6 +- src/devices/cpu/e132xs/e132xs.cpp | 77 - src/devices/cpu/e132xs/e132xs.h | 179 --- src/devices/cpu/e132xs/e132xsdrc.cpp | 983 ------------ src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 2438 ------------------------------ src/devices/cpu/e132xs/e132xsfe.cpp | 1303 ---------------- src/devices/cpu/e132xs/e132xsfe.h | 34 - 7 files changed, 1 insertion(+), 5019 deletions(-) delete mode 100644 src/devices/cpu/e132xs/e132xsdrc.cpp delete mode 100644 src/devices/cpu/e132xs/e132xsdrc_ops.hxx delete mode 100644 src/devices/cpu/e132xs/e132xsfe.cpp delete mode 100644 src/devices/cpu/e132xs/e132xsfe.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 69d70d8b237..97c0ee7e384 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -13,7 +13,7 @@ -- Dynamic recompiler objects -------------------------------------------------- -if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null or CPUS["E1"]~=null) then +if (CPUS["SH"]~=null or CPUS["MIPS"]~=null or CPUS["POWERPC"]~=null or CPUS["RSP"]~=null or CPUS["ARM7"]~=null or CPUS["ADSP21062"]~=null or CPUS["MB86235"]~=null) then files { MAME_DIR .. "src/devices/cpu/drcbec.cpp", MAME_DIR .. "src/devices/cpu/drcbec.h", @@ -808,10 +808,6 @@ if (CPUS["E1"]~=null) then files { MAME_DIR .. "src/devices/cpu/e132xs/e132xs.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xs.h", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.cpp", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.h", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc.cpp", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc_ops.hxx", MAME_DIR .. "src/devices/cpu/e132xs/32xsdefs.h", MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.hxx", } diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 7f3d8c2efcc..3793e351b73 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -144,7 +144,6 @@ #include "emu.h" #include "e132xs.h" -#include "e132xsfe.h" #include "debugger.h" @@ -153,9 +152,6 @@ //#define VERBOSE 1 #include "logmacro.h" -/* size of the execution code cache */ -#define CACHE_SIZE (32 * 1024 * 1024) - //************************************************************************** // INTERNAL ADDRESS MAP //************************************************************************** @@ -203,27 +199,6 @@ hyperstone_device::hyperstone_device(const machine_config &mconfig, const char * , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map) , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15) , m_icount(0) - , m_cache(CACHE_SIZE + sizeof(hyperstone_device)) - , m_drcuml(nullptr) - , m_drcfe(nullptr) - , m_drcoptions(0) - , m_cache_dirty(0) - , m_entry(nullptr) - , m_nocode(nullptr) - , m_out_of_cycles(nullptr) - , m_drc_arg0(0) - , m_drc_arg1(0) - , m_drc_arg2(0) - , m_drc_arg3(0) - , m_mem_read8(nullptr) - , m_mem_write8(nullptr) - , m_mem_read16(nullptr) - , m_mem_write16(nullptr) - , m_mem_read32(nullptr) - , m_mem_write32(nullptr) - , m_io_read32(nullptr) - , m_io_write32(nullptr) - , m_enable_drc(false) { } @@ -1017,12 +992,6 @@ void hyperstone_device::device_start() void hyperstone_device::init(int scale_mask) { -#if ENABLE_E132XS_DRC - m_enable_drc = allow_drc(); -#else - m_enable_drc = false; -#endif - memset(m_global_regs, 0, sizeof(uint32_t) * 32); memset(m_local_regs, 0, sizeof(uint32_t) * 64); m_op = 0; @@ -1057,38 +1026,6 @@ void hyperstone_device::init(int scale_mask) m_fl_lut[i] = (i ? i : 16); } - uint32_t umlflags = 0; - m_drcuml = std::make_unique(*this, m_cache, umlflags, 1, 32, 1); - - // add UML symbols- - m_drcuml->symbol_add(&m_global_regs[0], sizeof(uint32_t), "pc"); - m_drcuml->symbol_add(&m_global_regs[1], sizeof(uint32_t), "sr"); - m_drcuml->symbol_add(&m_icount, sizeof(m_icount), "icount"); - - char buf[4]; - for (int i=0; i < 32; i++) - { - sprintf(buf, "g%d", i); - m_drcuml->symbol_add(&m_global_regs[i], sizeof(uint32_t), buf); - } - - for (int i=0; i < 64; i++) - { - sprintf(buf, "l%d", i); - m_drcuml->symbol_add(&m_local_regs[i], sizeof(uint32_t), buf); - } - - m_drcuml->symbol_add(&m_drc_arg0, sizeof(uint32_t), "arg0"); - m_drcuml->symbol_add(&m_drc_arg1, sizeof(uint32_t), "arg1"); - m_drcuml->symbol_add(&m_drc_arg2, sizeof(uint32_t), "arg2"); - m_drcuml->symbol_add(&m_drc_arg3, sizeof(uint32_t), "arg3"); - - /* initialize the front-end helper */ - m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); - - /* mark the cache dirty so it is updated on next execute */ - m_cache_dirty = true; - // register our state for the debugger state_add(STATE_GENPC, "GENPC", m_global_regs[0]).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_global_regs[0]).noshow(); @@ -1347,14 +1284,6 @@ void hyperstone_device::device_reset() void hyperstone_device::device_stop() { - if (m_drcfe != nullptr) - { - m_drcfe = nullptr; - } - if (m_drcuml != nullptr) - { - m_drcuml = nullptr; - } } @@ -1521,12 +1450,6 @@ void hyperstone_device::hyperstone_do() void hyperstone_device::execute_run() { - if (m_enable_drc) - { - execute_run_drc(); - return; - } - if (m_intblock < 0) m_intblock = 0; diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 73e2fe74e77..4ccc09de6ff 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -5,9 +5,6 @@ #pragma once -#include "cpu/drcfe.h" -#include "cpu/drcuml.h" -#include "cpu/drcumlsh.h" #include "32xsdasm.h" /* @@ -26,32 +23,6 @@ -/*************************************************************************** - CONSTANTS -***************************************************************************/ - -/* map variables */ -#define MAPVAR_PC M0 -#define MAPVAR_CYCLES M1 - -/* compilation boundaries -- how far back/forward does the analysis extend? */ -#define COMPILE_BACKWARDS_BYTES 128 -#define COMPILE_FORWARDS_BYTES 512 -#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4)) -#define COMPILE_MAX_SEQUENCE 64 - -/* exit codes */ -#define EXECUTE_OUT_OF_CYCLES 0 -#define EXECUTE_MISSING_CODE 1 -#define EXECUTE_UNMAPPED_CODE 2 -#define EXECUTE_RESET_CACHE 3 - -#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */ - -#define SINGLE_INSTRUCTION_MODE (1) - -#define ENABLE_E132XS_DRC (0) - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -374,156 +345,6 @@ private: void hyperstone_reserved(); void hyperstone_do(); - - drc_cache m_cache; - std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; - uint32_t m_drcoptions; - uint8_t m_cache_dirty; - - uml::parameter m_regmap[16]; - - uml::code_handle *m_entry; - uml::code_handle *m_nocode; - uml::code_handle *m_out_of_cycles; - - uint32_t m_drc_arg0; - uint32_t m_drc_arg1; - uint32_t m_drc_arg2; - uint32_t m_drc_arg3; - uint32_t m_branch_dest; - - uml::code_handle *m_mem_read8; - uml::code_handle *m_mem_write8; - uml::code_handle *m_mem_read16; - uml::code_handle *m_mem_write16; - uml::code_handle *m_mem_read32; - uml::code_handle *m_mem_write32; - uml::code_handle *m_io_read32; - uml::code_handle *m_io_write32; - uml::code_handle *m_exception[EXCEPTION_COUNT]; - - bool m_enable_drc; - - /* internal compiler state */ - struct compiler_state - { - uint32_t m_cycles; /* accumulated cycles */ - uint8_t m_checkints; /* need to check interrupts before next instruction */ - uml::code_label m_labelnum; /* index for local labels */ - }; - - void execute_run_drc(); - void flush_drc_cache(); - void code_flush_cache(); - void code_compile_block(offs_t pc); - //void load_fast_iregs(drcuml_block *block); - //void save_fast_iregs(drcuml_block *block); - void static_generate_entry_point(); - void static_generate_nocode_handler(); - void static_generate_out_of_cycles(); - void static_generate_exception(uint32_t exception, const char *name); - void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr); - void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param); - void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); - void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); - bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - void generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno); - void generate_check_delay_pc(drcuml_block *block); - void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc); - void generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc); - void generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc); - - void generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - void generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); - void generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); - void generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr); - void generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - template void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - void generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - template void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - void generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - - void generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); }; // device type definition diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp deleted file mode 100644 index 8f0d44fad1d..00000000000 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ /dev/null @@ -1,983 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz - -#include "emu.h" -#include "e132xs.h" -#include "e132xsfe.h" -#include "32xsdefs.h" - -using namespace uml; - -#define DRC_PC mem(m_global_regs) -#define DRC_SR mem(&m_global_regs[1]) - -void hyperstone_device::execute_run_drc() -{ - drcuml_state *drcuml = m_drcuml.get(); - int execute_result; - - /* reset the cache if dirty */ - if (m_cache_dirty) - { - code_flush_cache(); - m_cache_dirty = false; - } - - - /* execute */ - do - { - /* run as much as we can */ - execute_result = drcuml->execute(*m_entry); - - /* if we need to recompile, do it */ - if (execute_result == EXECUTE_MISSING_CODE) - { - code_compile_block(m_global_regs[0]); - } - else if (execute_result == EXECUTE_UNMAPPED_CODE) - { - fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_global_regs[0]); - } - else if (execute_result == EXECUTE_RESET_CACHE) - { - code_flush_cache(); - } - } while (execute_result != EXECUTE_OUT_OF_CYCLES); -} - - -/*************************************************************************** - C FUNCTION CALLBACKS -***************************************************************************/ - -/*------------------------------------------------- - cfunc_unimplemented - handler for - unimplemented opcdes --------------------------------------------------*/ - -inline void hyperstone_device::ccfunc_unimplemented() -{ - fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_drc_arg0); -} - -inline void hyperstone_device::ccfunc_print() -{ - printf("%c: %08X\n", (char)m_drc_arg0, m_drc_arg1); -} - -static void cfunc_unimplemented(void *param) -{ - ((hyperstone_device *)param)->ccfunc_unimplemented(); -} - -static void cfunc_adjust_timer_interrupt(void *param) -{ - ((hyperstone_device *)param)->adjust_timer_interrupt(); -} - -static void cfunc_compute_tr(void *param) -{ - ((hyperstone_device *)param)->compute_tr(); -} - -static void cfunc_update_timer_prescale(void *param) -{ - ((hyperstone_device *)param)->update_timer_prescale(); -} - -#if 0 -static void cfunc_print(void *param) -{ - ((hyperstone_device *)param)->ccfunc_print(); -} -#endif - -/*------------------------------------------------- - ccfunc_total_cycles - compute the total number - of cycles executed so far --------------------------------------------------*/ - -void hyperstone_device::ccfunc_total_cycles() -{ - m_numcycles = total_cycles(); -} - -static void cfunc_total_cycles(void *param) -{ - ((hyperstone_device *)param)->ccfunc_total_cycles(); -} - -/*************************************************************************** - CACHE MANAGEMENT -***************************************************************************/ - -/*------------------------------------------------- - flush_drc_cache - outward-facing accessor to - code_flush_cache --------------------------------------------------*/ - -void hyperstone_device::flush_drc_cache() -{ - if (!m_enable_drc) - return; - m_cache_dirty = true; -} - -/*------------------------------------------------- - code_flush_cache - flush the cache and - regenerate static code --------------------------------------------------*/ - -void hyperstone_device::code_flush_cache() -{ - /* empty the transient cache contents */ - m_drcuml->reset(); - - try - { - /* generate the entry point and out-of-cycles handlers */ - static_generate_entry_point(); - static_generate_nocode_handler(); - static_generate_out_of_cycles(); - - static_generate_exception(EXCEPTION_IO2, "io2"); - static_generate_exception(EXCEPTION_IO1, "io1"); - static_generate_exception(EXCEPTION_INT4, "int4"); - static_generate_exception(EXCEPTION_INT3, "int3"); - static_generate_exception(EXCEPTION_INT2, "int2"); - static_generate_exception(EXCEPTION_INT1, "int1"); - static_generate_exception(EXCEPTION_IO3, "io3"); - static_generate_exception(EXCEPTION_TIMER, "timer"); - static_generate_exception(EXCEPTION_RESERVED1, "reserved1"); - static_generate_exception(EXCEPTION_TRACE, "trace"); - static_generate_exception(EXCEPTION_PARITY_ERROR, "parity_error"); - static_generate_exception(EXCEPTION_EXTENDED_OVERFLOW, "extended_overflow"); - static_generate_exception(EXCEPTION_RANGE_ERROR, "range_error"); - static_generate_exception(EXCEPTION_RESERVED2, "reserved2"); - static_generate_exception(EXCEPTION_RESET, "reset"); - static_generate_exception(EXCEPTION_ERROR_ENTRY, "error_entry"); - - /* add subroutines for memory accesses */ - static_generate_memory_accessor(1, false, false, "read8", m_mem_read8); - static_generate_memory_accessor(1, true, false, "write8", m_mem_write8); - static_generate_memory_accessor(2, false, false, "read16", m_mem_read16); - static_generate_memory_accessor(2, true, false, "write16", m_mem_write16); - static_generate_memory_accessor(4, false, false, "read32", m_mem_read32); - static_generate_memory_accessor(4, true, false, "write32", m_mem_write32); - static_generate_memory_accessor(4, false, true, "ioread32", m_io_read32); - static_generate_memory_accessor(4, true, true, "iowrite32", m_io_write32); - } - - catch (drcuml_block::abort_compilation &) - { - fatalerror("Unable to generate static E132XS code\n"); fflush(stdout); - } -} - -/* Return the entry point for a determinated trap */ -void hyperstone_device::generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno) -{ - int no_mem3; - UML_MOV(block, I0, trapno); - UML_CMP(block, mem(&m_trap_entry), 0xffffff00); - UML_JMPc(block, uml::COND_NE, no_mem3 = label++); - UML_SUB(block, I0, 63, I0); - - UML_LABEL(block, no_mem3); - UML_SHL(block, I0, I0, 2); - UML_OR(block, I0, I0, mem(&m_trap_entry)); -} - -/*------------------------------------------------- - code_compile_block - compile a block of the - given mode at the specified pc --------------------------------------------------*/ - -void hyperstone_device::code_compile_block(offs_t pc) -{ - drcuml_state *drcuml = m_drcuml.get(); - compiler_state compiler = { 0 }; - const opcode_desc *seqhead, *seqlast; - const opcode_desc *desclist; - int override = false; - drcuml_block *block; - - g_profiler.start(PROFILER_DRC_COMPILE); - - /* get a description of this sequence */ - desclist = m_drcfe->describe_code(pc); - - bool succeeded = false; - while (!succeeded) - { - try - { - /* start the block */ - block = drcuml->begin_block(4096); - - /* loop until we get through all instruction sequences */ - for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) - { - const opcode_desc *curdesc; - uint32_t nextpc; - - /* add a code log entry */ - if (drcuml->logging()) - block->append_comment("-------------------------"); - - /* determine the last instruction in this sequence */ - for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) - break; - assert(seqlast != nullptr); - - /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ - if (override || !drcuml->hash_exists(0, seqhead->pc)) - UML_HASH(block, 0, seqhead->pc); - - /* if we already have a hash, and this is the first sequence, assume that we */ - /* are recompiling due to being out of sync and allow future overrides */ - else if (seqhead == desclist) - { - override = true; - UML_HASH(block, 0, seqhead->pc); - } - - /* otherwise, redispatch to that fixed PC and skip the rest of the processing */ - else - { - UML_LABEL(block, seqhead->pc | 0x80000000); - UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); - continue; - } - - /* validate this code block if we're not pointing into ROM */ - if (m_program->get_write_ptr(seqhead->physpc) != nullptr) - generate_checksum_block(block, &compiler, seqhead, seqlast); - - /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) - UML_LABEL(block, seqhead->pc | 0x80000000); - - /* iterate over instructions in the sequence and compile them */ - for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) - { - generate_sequence_instruction(block, &compiler, curdesc); - } - - /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) - nextpc = pc; - - /* otherwise we just go to the next instruction */ - else - { - nextpc = seqlast->pc + seqlast->length; - } - - /* count off cycles and go there */ - generate_update_cycles(block, &compiler, nextpc); // - - /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ - if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) - { - UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp ,nextpc,nocode - } - } - - /* end the sequence */ - block->end(); - g_profiler.stop(); - succeeded = true; - } - catch (drcuml_block::abort_compilation &) - { - code_flush_cache(); - } - } -} - -/*************************************************************************** - STATIC CODEGEN -***************************************************************************/ - -/*------------------------------------------------- - epc - compute the exception PC from a - descriptor --------------------------------------------------*/ - -static inline uint32_t epc(const opcode_desc *desc) -{ - return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc; -} - - -/*------------------------------------------------- - alloc_handle - allocate a handle if not - already allocated --------------------------------------------------*/ - -static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name) -{ - if (*handleptr == nullptr) - *handleptr = drcuml->handle_alloc(name); -} - - - -/*------------------------------------------------- - static_generate_exception - generate an - exception handler --------------------------------------------------*/ - -void hyperstone_device::static_generate_exception(uint32_t exception, const char *name) -{ - code_handle *&exception_handle = m_exception[exception]; - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block = drcuml->begin_block(1024); - - /* add a global entry for this */ - alloc_handle(drcuml, &exception_handle, name); - UML_HANDLE(block, *exception_handle); - - uml::code_label label = 1; - generate_get_trap_addr(block, label, exception); - UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); - UML_ROLAND(block, I2, DRC_SR, 11, 0xf); - UML_TEST(block, I2, 0xf); - UML_MOVc(block, uml::COND_Z, I2, 16); - UML_ADD(block, I1, I1, I2); - - UML_AND(block, DRC_SR, DRC_SR, 0xffe7ffff); - UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); - - UML_MOV(block, I4, DRC_SR); - UML_ROLINS(block, DRC_SR, 2, 21, 0x01e00000); - UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); - - UML_AND(block, I3, I1, 0x3f); - UML_AND(block, I1, DRC_PC, ~1); - UML_ROLAND(block, I2, DRC_SR, 14, 1); - UML_OR(block, I1, I1, I2); - UML_STORE(block, (void *)m_local_regs, I3, I1, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I3, I3, 1); - UML_AND(block, I3, I3, 0x3f); - UML_STORE(block, (void *)m_local_regs, I3, I4, SIZE_DWORD, SCALE_x4); - - UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK)); - UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK)); - - UML_MOV(block, DRC_PC, I0); - UML_SUB(block, mem(&m_icount), mem(&m_icount), 2); - UML_EXHc(block, COND_S, *m_out_of_cycles, 0); - - UML_HASHJMP(block, 0, I0, *m_nocode);// hashjmp ,i0,nocode - - block->end(); -} - - - -/*------------------------------------------------- - generate_entry_point - generate a - static entry point --------------------------------------------------*/ - -void hyperstone_device::static_generate_entry_point() -{ - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block; - - /* begin generating */ - block = drcuml->begin_block(20); - - /* forward references */ - alloc_handle(drcuml, &m_nocode, "nocode"); - - alloc_handle(drcuml, &m_entry, "entry"); - UML_HANDLE(block, *m_entry); - - /* load fast integer registers */ - //load_fast_iregs(block); - - /* generate a hash jump via the current mode and PC */ - UML_HASHJMP(block, 0, mem(&m_global_regs[0]), *m_nocode); - block->end(); -} - - -/*------------------------------------------------- - static_generate_nocode_handler - generate an - exception handler for "out of code" --------------------------------------------------*/ - -void hyperstone_device::static_generate_nocode_handler() -{ - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block; - - /* begin generating */ - block = drcuml->begin_block(10); - - /* generate a hash jump via the current mode and PC */ - alloc_handle(drcuml, &m_nocode, "nocode"); - UML_HANDLE(block, *m_nocode); - UML_GETEXP(block, I0); - UML_MOV(block, mem(&PC), I0); - //save_fast_iregs(block); - UML_EXIT(block, EXECUTE_MISSING_CODE); - - block->end(); -} - - -/*------------------------------------------------- - static_generate_out_of_cycles - generate an - out of cycles exception handler --------------------------------------------------*/ - -void hyperstone_device::static_generate_out_of_cycles() -{ - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block; - - /* begin generating */ - block = drcuml->begin_block(10); - - /* generate a hash jump via the current mode and PC */ - alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles"); - UML_HANDLE(block, *m_out_of_cycles); - UML_GETEXP(block, I0); - UML_MOV(block, mem(&m_global_regs[0]), I0); - //save_fast_iregs(block); - UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); - - block->end(); -} - -/*------------------------------------------------------------------ - static_generate_memory_accessor -------------------------------------------------------------------*/ - -void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, code_handle *&handleptr) -{ - /* on entry, address is in I0; data for writes is in I1 */ - /* on exit, read result is in I1 */ - /* routine trashes I0-I1 */ - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block; - - /* begin generating */ - block = drcuml->begin_block(1024); - - /* add a global entry for this */ - alloc_handle(drcuml, &handleptr, name); - UML_HANDLE(block, *handleptr); - - // write: - switch (size) - { - case 1: - if (iswrite) - UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); - else - UML_READ(block, I1, I0, SIZE_BYTE, SPACE_PROGRAM); - break; - - case 2: - if (iswrite) - UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); - else - UML_READ(block, I1, I0, SIZE_WORD, SPACE_PROGRAM); - break; - - case 4: - if (iswrite) - UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); - else - UML_READ(block, I1, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM); - break; - } - UML_RET(block); - - block->end(); -} - - - -/*************************************************************************** - CODE GENERATION -***************************************************************************/ - -/*------------------------------------------------- - generate_update_cycles - generate code to - subtract cycles from the icount and generate - an exception if out --------------------------------------------------*/ - -void hyperstone_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param) -{ - /* account for cycles */ - if (compiler->m_cycles > 0) - { - UML_SUB(block, mem(&m_icount), mem(&m_icount), MAPVAR_CYCLES); - UML_MAPVAR(block, MAPVAR_CYCLES, 0); - UML_EXHc(block, COND_S, *m_out_of_cycles, param); - } - compiler->m_cycles = 0; -} - -/*------------------------------------------------- - generate_checksum_block - generate code to - validate a sequence of opcodes --------------------------------------------------*/ - -void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast) -{ - const opcode_desc *curdesc; - if (m_drcuml->logging()) - { - block->append_comment("[Validation for %08X]", seqhead->pc); - } - /* loose verify or single instruction: just compare and fail */ - if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr) - { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) - { - uint32_t sum = seqhead->opptr.w[0]; - void *base = m_direct->read_ptr(seqhead->physpc); - UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); - - if (seqhead->delay.first() != nullptr && seqhead->physpc != seqhead->delay.first()->physpc) - { - base = m_direct->read_ptr(seqhead->delay.first()->physpc); - assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); - UML_ADD(block, I0, I0, I1); - - sum += seqhead->delay.first()->opptr.w[0]; - } - - UML_CMP(block, I0, sum); - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); - } - } - else /* full verification; sum up everything */ - { - void *base = m_direct->read_ptr(seqhead->physpc); - UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); - uint32_t sum = seqhead->opptr.w[0]; - for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) - { - base = m_direct->read_ptr(curdesc->physpc); - assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); - UML_ADD(block, I0, I0, I1); - sum += curdesc->opptr.w[0]; - - if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) - { - base = m_direct->read_ptr(curdesc->delay.first()->physpc); - assert(base != nullptr); - UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); - UML_ADD(block, I0, I0, I1); - - sum += curdesc->delay.first()->opptr.w[0]; - } - } - UML_CMP(block, I0, sum); - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); - } -} - - -/*------------------------------------------------- - log_add_disasm_comment - add a comment - including disassembly of a MIPS instruction --------------------------------------------------*/ - -void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op) -{ - if (m_drcuml->logging()) - { - block->append_comment("%08X: %08x", pc, op); - } -} - - -/*------------------------------------------------------------------ - generate_delay_slot_and_branch -------------------------------------------------------------------*/ - -void hyperstone_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - compiler_state compiler_temp = *compiler; - - /* fetch the target register if dynamic, in case it is modified by the delay slot */ - if (desc->targetpc == BRANCH_TARGET_DYNAMIC) - { - UML_MOV(block, mem(&m_branch_dest), DRC_PC); - } - - if (desc->delayslots) - { - /* compile the delay slot using temporary compiler state */ - assert(desc->delay.first() != nullptr); - generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); // - UML_MOV(block, mem(&m_branch_dest), DRC_PC); - } - - /* update the cycles and jump through the hash table to the target */ - if (desc->targetpc != BRANCH_TARGET_DYNAMIC) - { - generate_update_cycles(block, &compiler_temp, desc->targetpc); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) - UML_JMP(block, desc->targetpc | 0x80000000); - else - UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); - } - else - { - generate_update_cycles(block, &compiler_temp, mem(&m_branch_dest)); - UML_HASHJMP(block, 0, mem(&m_branch_dest), *m_nocode); - } - - /* update the label */ - compiler->m_labelnum = compiler_temp.m_labelnum; - - /* reset the mapvar to the current cycles */ - UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); -} - - -/*------------------------------------------------- - generate_sequence_instruction - generate code - for a single instruction in a sequence --------------------------------------------------*/ - -void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - offs_t expc; - - /* add an entry for the log */ - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); - - /* set the PC map variable */ - expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc; - UML_MAPVAR(block, MAPVAR_PC, expc); - - /* accumulate total cycles */ - compiler->m_cycles += desc->cycles; - - /* update the icount map variable */ - UML_MAPVAR(block, MAPVAR_CYCLES, compiler->m_cycles); - - /* if we are debugging, call the debugger */ - if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) - { - UML_MOV(block, DRC_PC, desc->pc); - //save_fast_iregs(block); - UML_DEBUG(block, desc->pc); - } - - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) - { - /* compile the instruction */ - if (!generate_opcode(block, compiler, desc)) - { - UML_MOV(block, DRC_PC, desc->pc); - UML_MOV(block, mem(&m_drc_arg0), desc->opptr.w[0]); - UML_CALLC(block, cfunc_unimplemented, this); - } - } -} - -#include "e132xsdrc_ops.hxx" - -bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint32_t op = (uint32_t)desc->opptr.w[0]; - - UML_MOV(block, I0, op); - UML_AND(block, I7, DRC_SR, H_MASK); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_MOV(block, mem(&m_instruction_length), (1 << 19)); - - switch (op >> 8) - { - case 0x00: generate_chk(block, compiler, desc); break; - case 0x01: generate_chk(block, compiler, desc); break; - case 0x02: generate_chk(block, compiler, desc); break; - case 0x03: generate_chk(block, compiler, desc); break; - case 0x04: generate_movd(block, compiler, desc); break; - case 0x05: generate_movd(block, compiler, desc); break; - case 0x06: generate_movd(block, compiler, desc); break; - case 0x07: generate_movd(block, compiler, desc); break; - case 0x08: generate_divsu(block, compiler, desc); break; - case 0x09: generate_divsu(block, compiler, desc); break; - case 0x0a: generate_divsu(block, compiler, desc); break; - case 0x0b: generate_divsu(block, compiler, desc); break; - case 0x0c: generate_divsu(block, compiler, desc); break; - case 0x0d: generate_divsu(block, compiler, desc); break; - case 0x0e: generate_divsu(block, compiler, desc); break; - case 0x0f: generate_divsu(block, compiler, desc); break; - case 0x10: generate_xm(block, compiler, desc); break; - case 0x11: generate_xm(block, compiler, desc); break; - case 0x12: generate_xm(block, compiler, desc); break; - case 0x13: generate_xm(block, compiler, desc); break; - case 0x14: generate_mask(block, compiler, desc); break; - case 0x15: generate_mask(block, compiler, desc); break; - case 0x16: generate_mask(block, compiler, desc); break; - case 0x17: generate_mask(block, compiler, desc); break; - case 0x18: generate_sum(block, compiler, desc); break; - case 0x19: generate_sum(block, compiler, desc); break; - case 0x1a: generate_sum(block, compiler, desc); break; - case 0x1b: generate_sum(block, compiler, desc); break; - case 0x1c: generate_sums(block, compiler, desc); break; - case 0x1d: generate_sums(block, compiler, desc); break; - case 0x1e: generate_sums(block, compiler, desc); break; - case 0x1f: generate_sums(block, compiler, desc); break; - case 0x20: generate_cmp(block, compiler, desc); break; - case 0x21: generate_cmp(block, compiler, desc); break; - case 0x22: generate_cmp(block, compiler, desc); break; - case 0x23: generate_cmp(block, compiler, desc); break; - case 0x24: generate_mov(block, compiler, desc); break; - case 0x25: generate_mov(block, compiler, desc); break; - case 0x26: generate_mov(block, compiler, desc); break; - case 0x27: generate_mov(block, compiler, desc); break; - case 0x28: generate_add(block, compiler, desc); break; - case 0x29: generate_add(block, compiler, desc); break; - case 0x2a: generate_add(block, compiler, desc); break; - case 0x2b: generate_add(block, compiler, desc); break; - case 0x2c: generate_adds(block, compiler, desc); break; - case 0x2d: generate_adds(block, compiler, desc); break; - case 0x2e: generate_adds(block, compiler, desc); break; - case 0x2f: generate_adds(block, compiler, desc); break; - case 0x30: generate_cmpb(block, compiler, desc); break; - case 0x31: generate_cmpb(block, compiler, desc); break; - case 0x32: generate_cmpb(block, compiler, desc); break; - case 0x33: generate_cmpb(block, compiler, desc); break; - case 0x34: generate_andn(block, compiler, desc); break; - case 0x35: generate_andn(block, compiler, desc); break; - case 0x36: generate_andn(block, compiler, desc); break; - case 0x37: generate_andn(block, compiler, desc); break; - case 0x38: generate_or(block, compiler, desc); break; - case 0x39: generate_or(block, compiler, desc); break; - case 0x3a: generate_or(block, compiler, desc); break; - case 0x3b: generate_or(block, compiler, desc); break; - case 0x3c: generate_xor(block, compiler, desc); break; - case 0x3d: generate_xor(block, compiler, desc); break; - case 0x3e: generate_xor(block, compiler, desc); break; - case 0x3f: generate_xor(block, compiler, desc); break; - case 0x40: generate_subc(block, compiler, desc); break; - case 0x41: generate_subc(block, compiler, desc); break; - case 0x42: generate_subc(block, compiler, desc); break; - case 0x43: generate_subc(block, compiler, desc); break; - case 0x44: generate_not(block, compiler, desc); break; - case 0x45: generate_not(block, compiler, desc); break; - case 0x46: generate_not(block, compiler, desc); break; - case 0x47: generate_not(block, compiler, desc); break; - case 0x48: generate_sub(block, compiler, desc); break; - case 0x49: generate_sub(block, compiler, desc); break; - case 0x4a: generate_sub(block, compiler, desc); break; - case 0x4b: generate_sub(block, compiler, desc); break; - case 0x4c: generate_subs(block, compiler, desc); break; - case 0x4d: generate_subs(block, compiler, desc); break; - case 0x4e: generate_subs(block, compiler, desc); break; - case 0x4f: generate_subs(block, compiler, desc); break; - case 0x50: generate_addc(block, compiler, desc); break; - case 0x51: generate_addc(block, compiler, desc); break; - case 0x52: generate_addc(block, compiler, desc); break; - case 0x53: generate_addc(block, compiler, desc); break; - case 0x54: generate_and(block, compiler, desc); break; - case 0x55: generate_and(block, compiler, desc); break; - case 0x56: generate_and(block, compiler, desc); break; - case 0x57: generate_and(block, compiler, desc); break; - case 0x58: generate_neg(block, compiler, desc); break; - case 0x59: generate_neg(block, compiler, desc); break; - case 0x5a: generate_neg(block, compiler, desc); break; - case 0x5b: generate_neg(block, compiler, desc); break; - case 0x5c: generate_negs(block, compiler, desc); break; - case 0x5d: generate_negs(block, compiler, desc); break; - case 0x5e: generate_negs(block, compiler, desc); break; - case 0x5f: generate_negs(block, compiler, desc); break; - case 0x60: generate_cmpi(block, compiler, desc); break; - case 0x61: generate_cmpi(block, compiler, desc); break; - case 0x62: generate_cmpi(block, compiler, desc); break; - case 0x63: generate_cmpi(block, compiler, desc); break; - case 0x64: generate_movi(block, compiler, desc); break; - case 0x65: generate_movi(block, compiler, desc); break; - case 0x66: generate_movi(block, compiler, desc); break; - case 0x67: generate_movi(block, compiler, desc); break; - case 0x68: generate_addi(block, compiler, desc); break; - case 0x69: generate_addi(block, compiler, desc); break; - case 0x6a: generate_addi(block, compiler, desc); break; - case 0x6b: generate_addi(block, compiler, desc); break; - case 0x6c: generate_addsi(block, compiler, desc); break; - case 0x6d: generate_addsi(block, compiler, desc); break; - case 0x6e: generate_addsi(block, compiler, desc); break; - case 0x6f: generate_addsi(block, compiler, desc); break; - case 0x70: generate_cmpbi(block, compiler, desc); break; - case 0x71: generate_cmpbi(block, compiler, desc); break; - case 0x72: generate_cmpbi(block, compiler, desc); break; - case 0x73: generate_cmpbi(block, compiler, desc); break; - case 0x74: generate_andni(block, compiler, desc); break; - case 0x75: generate_andni(block, compiler, desc); break; - case 0x76: generate_andni(block, compiler, desc); break; - case 0x77: generate_andni(block, compiler, desc); break; - case 0x78: generate_ori(block, compiler, desc); break; - case 0x79: generate_ori(block, compiler, desc); break; - case 0x7a: generate_ori(block, compiler, desc); break; - case 0x7b: generate_ori(block, compiler, desc); break; - case 0x7c: generate_xori(block, compiler, desc); break; - case 0x7d: generate_xori(block, compiler, desc); break; - case 0x7e: generate_xori(block, compiler, desc); break; - case 0x7f: generate_xori(block, compiler, desc); break; - case 0x80: generate_shrdi(block, compiler, desc); break; - case 0x81: generate_shrdi(block, compiler, desc); break; - case 0x82: generate_shrd(block, compiler, desc); break; - case 0x83: generate_shr(block, compiler, desc); break; - case 0x84: generate_sardi(block, compiler, desc); break; - case 0x85: generate_sardi(block, compiler, desc); break; - case 0x86: generate_sard(block, compiler, desc); break; - case 0x87: generate_sar(block, compiler, desc); break; - case 0x88: generate_shldi(block, compiler, desc); break; - case 0x89: generate_shldi(block, compiler, desc); break; - case 0x8a: generate_shld(block, compiler, desc); break; - case 0x8b: generate_shl(block, compiler, desc); break; - case 0x8c: generate_reserved(block, compiler, desc); break; - case 0x8d: generate_reserved(block, compiler, desc); break; - case 0x8e: generate_testlz(block, compiler, desc); break; - case 0x8f: generate_rol(block, compiler, desc); break; - case 0x90: generate_ldxx1(block, compiler, desc); break; - case 0x91: generate_ldxx1(block, compiler, desc); break; - case 0x92: generate_ldxx1(block, compiler, desc); break; - case 0x93: generate_ldxx1(block, compiler, desc); break; - case 0x94: generate_ldxx2(block, compiler, desc); break; - case 0x95: generate_ldxx2(block, compiler, desc); break; - case 0x96: generate_ldxx2(block, compiler, desc); break; - case 0x97: generate_ldxx2(block, compiler, desc); break; - case 0x98: generate_stxx1(block, compiler, desc); break; - case 0x99: generate_stxx1(block, compiler, desc); break; - case 0x9a: generate_stxx1(block, compiler, desc); break; - case 0x9b: generate_stxx1(block, compiler, desc); break; - case 0x9c: generate_stxx2(block, compiler, desc); break; - case 0x9d: generate_stxx2(block, compiler, desc); break; - case 0x9e: generate_stxx2(block, compiler, desc); break; - case 0x9f: generate_stxx2(block, compiler, desc); break; - case 0xa0: generate_shri(block, compiler, desc); break; - case 0xa1: generate_shri(block, compiler, desc); break; - case 0xa2: generate_shri(block, compiler, desc); break; - case 0xa3: generate_shri(block, compiler, desc); break; - case 0xa4: generate_sari(block, compiler, desc); break; - case 0xa5: generate_sari(block, compiler, desc); break; - case 0xa6: generate_sari(block, compiler, desc); break; - case 0xa7: generate_sari(block, compiler, desc); break; - case 0xa8: generate_shli(block, compiler, desc); break; - case 0xa9: generate_shli(block, compiler, desc); break; - case 0xaa: generate_shli(block, compiler, desc); break; - case 0xab: generate_shli(block, compiler, desc); break; - case 0xac: generate_reserved(block, compiler, desc); break; - case 0xad: generate_reserved(block, compiler, desc); break; - case 0xae: generate_reserved(block, compiler, desc); break; - case 0xaf: generate_reserved(block, compiler, desc); break; - case 0xb0: generate_mulsu(block, compiler, desc); break; - case 0xb1: generate_mulsu(block, compiler, desc); break; - case 0xb2: generate_mulsu(block, compiler, desc); break; - case 0xb3: generate_mulsu(block, compiler, desc); break; - case 0xb4: generate_mulsu(block, compiler, desc); break; - case 0xb5: generate_mulsu(block, compiler, desc); break; - case 0xb6: generate_mulsu(block, compiler, desc); break; - case 0xb7: generate_mulsu(block, compiler, desc); break; - case 0xb8: generate_set(block, compiler, desc); break; - case 0xb9: generate_set(block, compiler, desc); break; - case 0xba: generate_set(block, compiler, desc); break; - case 0xbb: generate_set(block, compiler, desc); break; - case 0xbc: generate_mul(block, compiler, desc); break; - case 0xbd: generate_mul(block, compiler, desc); break; - case 0xbe: generate_mul(block, compiler, desc); break; - case 0xbf: generate_mul(block, compiler, desc); break; - case 0xc0: generate_software(block, compiler, desc); break; // fadd - case 0xc1: generate_software(block, compiler, desc); break; // faddd - case 0xc2: generate_software(block, compiler, desc); break; // fsub - case 0xc3: generate_software(block, compiler, desc); break; // fsubd - case 0xc4: generate_software(block, compiler, desc); break; // fmul - case 0xc5: generate_software(block, compiler, desc); break; // fmuld - case 0xc6: generate_software(block, compiler, desc); break; // fdiv - case 0xc7: generate_software(block, compiler, desc); break; // fdivd - case 0xc8: generate_software(block, compiler, desc); break; // fcmp - case 0xc9: generate_software(block, compiler, desc); break; // fcmpd - case 0xca: generate_software(block, compiler, desc); break; // fcmpu - case 0xcb: generate_software(block, compiler, desc); break; // fcmpud - case 0xcc: generate_software(block, compiler, desc); break; // fcvt - case 0xcd: generate_software(block, compiler, desc); break; // fcvtd - case 0xce: generate_extend(block, compiler, desc); break; - case 0xcf: generate_do(block, compiler, desc); break; - case 0xd0: generate_ldwr(block, compiler, desc); break; - case 0xd1: generate_ldwr(block, compiler, desc); break; - case 0xd2: generate_lddr(block, compiler, desc); break; - case 0xd3: generate_lddr(block, compiler, desc); break; - case 0xd4: generate_ldwp(block, compiler, desc); break; - case 0xd5: generate_ldwp(block, compiler, desc); break; - case 0xd6: generate_lddp(block, compiler, desc); break; - case 0xd7: generate_lddp(block, compiler, desc); break; - case 0xd8: generate_stwr(block, compiler, desc); break; - case 0xd9: generate_stwr(block, compiler, desc); break; - case 0xda: generate_stdr(block, compiler, desc); break; - case 0xdb: generate_stdr(block, compiler, desc); break; - case 0xdc: generate_stwp(block, compiler, desc); break; - case 0xdd: generate_stwp(block, compiler, desc); break; - case 0xde: generate_stdp(block, compiler, desc); break; - case 0xdf: generate_stdp(block, compiler, desc); break; - case 0xe0: generate_db(block, compiler, desc); break; - case 0xe1: generate_db(block, compiler, desc); break; - case 0xe2: generate_db(block, compiler, desc); break; - case 0xe3: generate_db(block, compiler, desc); break; - case 0xe4: generate_db(block, compiler, desc); break; - case 0xe5: generate_db(block, compiler, desc); break; - case 0xe6: generate_db(block, compiler, desc); break; - case 0xe7: generate_db(block, compiler, desc); break; - case 0xe8: generate_db(block, compiler, desc); break; - case 0xe9: generate_db(block, compiler, desc); break; - case 0xea: generate_db(block, compiler, desc); break; - case 0xeb: generate_db(block, compiler, desc); break; - case 0xec: generate_dbr(block, compiler, desc); break; - case 0xed: generate_frame(block, compiler, desc); break; - case 0xee: generate_call(block, compiler, desc); break; - case 0xef: generate_call(block, compiler, desc); break; - case 0xf0: generate_b(block, compiler, desc); break; - case 0xf1: generate_b(block, compiler, desc); break; - case 0xf2: generate_b(block, compiler, desc); break; - case 0xf3: generate_b(block, compiler, desc); break; - case 0xf4: generate_b(block, compiler, desc); break; - case 0xf5: generate_b(block, compiler, desc); break; - case 0xf6: generate_b(block, compiler, desc); break; - case 0xf7: generate_b(block, compiler, desc); break; - case 0xf8: generate_b(block, compiler, desc); break; - case 0xf9: generate_b(block, compiler, desc); break; - case 0xfa: generate_b(block, compiler, desc); break; - case 0xfb: generate_b(block, compiler, desc); break; - case 0xfc: generate_br(block, compiler, desc); break; - case 0xfd: generate_trap_op(block, compiler, desc); break; - case 0xfe: generate_trap_op(block, compiler, desc); break; - case 0xff: generate_trap_op(block, compiler, desc); break; - } - - UML_AND(block, DRC_SR, DRC_SR, ~ILC_MASK); - UML_OR(block, DRC_SR, DRC_SR, mem(&m_instruction_length)); - - int done; - UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK)); - UML_CMP(block, I0, (T_MASK | P_MASK)); - UML_JMPc(block, uml::COND_NE, done = compiler->m_labelnum++); - UML_TEST(block, mem(&m_delay_slot), 1); - UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0); - - UML_LABEL(block, done); - UML_XOR(block, DRC_SR, DRC_SR, I7); - - return true; -} \ No newline at end of file diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx deleted file mode 100644 index 45677280d2d..00000000000 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ /dev/null @@ -1,2438 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz - -#include "e132xs.h" - -constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER); - -void hyperstone_device::generate_check_delay_pc(drcuml_block *block) -{ - /* if PC is used in a delay instruction, the delayed PC should be used */ - UML_TEST(block, mem(&m_delay_slot), 1); - UML_MOVc(block, uml::COND_NZ, DRC_PC, mem(&m_delay_pc)); - UML_MOVc(block, uml::COND_NZ, mem(&m_delay_slot), 0); -} - -void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t imm_1 = READ_OP(desc->pc + 2); - - if (imm_1 & 0x8000) - { - const uint16_t imm_2 = READ_OP(desc->pc + 4); - - uint32_t imm = imm_2; - imm |= ((imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - imm |= 0xc0000000; - - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - UML_MOV(block, I1, imm); - } - else - { - uint32_t imm = imm_1 & 0x3fff; - - if (imm_1 & 0x4000) - imm |= 0xffffc000; - - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_MOV(block, I1, imm); - } -} - -void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - - switch (op & 0xf) - { - case 0: - UML_MOV(block, I1, 16); - return; - case 1: - { - uint32_t extra_u = (READ_OP(desc->pc + 2) << 16) | READ_OP(desc->pc + 4); - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - UML_MOV(block, I1, extra_u); - return; - } - case 2: - { - uint32_t extra_u = READ_OP(desc->pc + 2); - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_MOV(block, I1, extra_u); - return; - } - case 3: - { - uint32_t extra_u = 0xffff0000 | READ_OP(desc->pc + 2); - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_MOV(block, I1, extra_u); - return; - } - default: - UML_MOV(block, I1, s_immediate_values[op & 0xf]); - return; - } -} - -void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - - static const uint32_t lengths[16] = { 1<<19, 3<<19, 2<<19, 2<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19 }; - static const uint32_t offsets[16] = { 0, 4, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - const uint8_t nybble = op & 0x0f; - - UML_MOV(block, mem(&m_instruction_length), lengths[nybble]); - UML_ADD(block, DRC_PC, DRC_PC, offsets[nybble]); -} - -void hyperstone_device::generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - - int32_t offset; - if (op & 0x80) - { - uint16_t next = READ_OP(desc->pc + 2); - - offset = (op & 0x7f) << 16; - offset |= (next & 0xfffe); - - if (next & 1) - offset |= 0xff800000; - - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - } - else - { - offset = op & 0x7e; - - if (op & 1) - offset |= 0xffffff80; - } - - UML_MOV(block, I1, offset); -} - -void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - - if (op & 0x80) - { - UML_ADD(block, DRC_PC, DRC_PC, 2); - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - } -} - -void hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - // Expects register index in I4, value in I5, clobbers I6 - int extended; - UML_CMP(block, I4, 16); - UML_JMPc(block, uml::COND_AE, extended = compiler->m_labelnum++); - - int generic_store, set_sr, done; - UML_CMP(block, I4, 1); - UML_JMPc(block, uml::COND_A, generic_store = compiler->m_labelnum++); - UML_JMPc(block, uml::COND_E, set_sr = compiler->m_labelnum++); - UML_AND(block, DRC_PC, I5, ~1); - generate_delay_slot_and_branch(block, compiler, desc); - UML_JMP(block, done = compiler->m_labelnum++); - - UML_LABEL(block, set_sr); - UML_ROLINS(block, DRC_SR, I5, 0, 0x0000ffff); - UML_AND(block, DRC_SR, DRC_SR, ~0x40); - UML_TEST(block, mem(&m_intblock), ~0); - UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); - UML_JMP(block, done); - - UML_LABEL(block, generic_store); - UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); - UML_JMP(block, done); - - int above_bcr; - UML_LABEL(block, extended); - UML_CMP(block, I4, 17); - UML_JMPc(block, uml::COND_BE, generic_store); - UML_CMP(block, I4, BCR_REGISTER); - UML_JMPc(block, uml::COND_A, above_bcr = compiler->m_labelnum++); - UML_JMPc(block, uml::COND_E, generic_store); - - // SP or UB - UML_AND(block, I5, I5, ~3); - UML_JMP(block, generic_store); - - int set_tpr, set_tcr, set_tr, set_fcr; - UML_LABEL(block, above_bcr); - UML_CMP(block, I4, TCR_REGISTER); - UML_JMPc(block, uml::COND_B, set_tpr = compiler->m_labelnum++); - UML_JMPc(block, uml::COND_E, set_tcr = compiler->m_labelnum++); - // Above TCR - UML_CMP(block, I4, WCR_REGISTER); - UML_JMPc(block, uml::COND_B, set_tr = compiler->m_labelnum++); - UML_JMPc(block, uml::COND_E, generic_store); // WCR - // Above WCR - UML_CMP(block, I4, FCR_REGISTER); - UML_JMPc(block, uml::COND_B, done); // ISR - read only - UML_JMPc(block, uml::COND_E, set_fcr = compiler->m_labelnum++); - UML_CMP(block, I4, MCR_REGISTER); - UML_JMPc(block, uml::COND_A, generic_store); // regs 28..31 - // Set MCR - UML_ROLAND(block, I6, I5, 20, 0x7); - UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4); - UML_MOV(block, mem(&m_trap_entry), I6); - UML_JMP(block, generic_store); - - int skip_compute_tr; - UML_LABEL(block, set_tpr); - UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); - UML_TEST(block, I5, 0x80000000); - UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler->m_labelnum++); - UML_CALLC(block, cfunc_compute_tr, this); - UML_CALLC(block, cfunc_update_timer_prescale, this); - UML_LABEL(block, skip_compute_tr); - UML_CALLC(block, cfunc_adjust_timer_interrupt, this); - UML_JMP(block, done); - - UML_LABEL(block, set_tcr); - UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); - UML_CMP(block, I6, I5); - UML_JMPc(block, uml::COND_E, done); - UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); - UML_CALLC(block, cfunc_adjust_timer_interrupt, this); - UML_CMP(block, mem(&m_intblock), 1); - UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); - UML_JMP(block, done); - - UML_LABEL(block, set_tr); - UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); - UML_MOV(block, mem(&m_tr_base_value), I5); - UML_CALLC(block, cfunc_total_cycles, this); - UML_DMOV(block, mem(&m_tr_base_cycles), mem(&m_numcycles)); - UML_CALLC(block, cfunc_adjust_timer_interrupt, this); - UML_JMP(block, done); - - int skip_adjust_timer; - UML_LABEL(block, set_fcr); - UML_LOAD(block, I6, (void *)m_global_regs, I4, SIZE_DWORD, SCALE_x4); - UML_XOR(block, I6, I6, I5); - UML_TEST(block, I6, 0x80000000); - UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler->m_labelnum++); - UML_CALLC(block, cfunc_adjust_timer_interrupt, this); - UML_LABEL(block, skip_adjust_timer); - UML_STORE(block, (void *)m_global_regs, I4, I5, SIZE_DWORD, SCALE_x4); - UML_CMP(block, mem(&m_intblock), 1); - UML_MOVc(block, uml::COND_L, mem(&m_intblock), 1); - // Fall through to done - - UML_LABEL(block, done); -} - -void hyperstone_device::generate_trap(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) -{ - printf("Unimplemented: generate_trap (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - -void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) -{ - printf("Unimplemented: generate_int (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - -void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr) -{ - printf("Unimplemented: generate_exception (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - -void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_software (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_chk (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - generate_check_delay_pc(block); - - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t srcf_code = src_code + 1; - const uint32_t dst_code = (op & 0xf0) >> 4; - const uint32_t dstf_code = dst_code + 1; - - int done = compiler->m_labelnum++; - if (DST_GLOBAL && (dst_code == PC_REGISTER)) - { - if (SRC_GLOBAL && src_code < 2) - { - printf("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc); - return; - } - - UML_AND(block, I1, DRC_SR, (S_MASK | L_MASK)); - if (SRC_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - UML_LOAD(block, I3, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I5, DRC_SR, 7, 0x7f); - UML_ADD(block, I3, I5, src_code); - UML_AND(block, I4, I3, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - - UML_ADD(block, I6, I5, srcf_code); - UML_AND(block, I5, I6, 0x3f); - UML_LOAD(block, I3, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_PC, I2, ~1); - - UML_AND(block, DRC_SR, I3, 0xffe3ffff); - UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK); - - UML_TEST(block, mem(&m_intblock), ~0); - UML_MOVc(block, uml::COND_Z, mem(&m_intblock), 1); - - UML_MOV(block, mem(&m_instruction_length), 0); - - int no_exception; - UML_AND(block, I2, DRC_SR, (S_MASK | L_MASK)); - UML_AND(block, I3, I1, I2); - UML_TEST(block, I3, S_MASK); - UML_JMPc(block, uml::COND_NZ, no_exception = compiler->m_labelnum++); // If S is set and unchanged, there won't be an exception. - - UML_XOR(block, I3, I1, I2); - UML_AND(block, I4, I3, I2); - UML_TEST(block, I4, S_MASK); - UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If S is newly set, it's a privilege error. - - UML_TEST(block, I3, L_MASK); - UML_JMPc(block, uml::COND_Z, no_exception); // If L is unchanged, there won't be an exception. - UML_TEST(block, I1, L_MASK); - UML_JMPc(block, uml::COND_NZ, no_exception); // If L was previously set, there won't be an exception. - UML_TEST(block, I2, S_MASK); - UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If L is newly set and we are not in Supervisor mode, it's a privilege error. - - int diff_in_range; - UML_LABEL(block, no_exception); - UML_MOV(block, I0, mem(&SP)); - UML_ROLAND(block, I1, I0, 30, 0x7f); - UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); - UML_SUB(block, I3, I2, I1); - UML_CMP(block, I3, -64); - UML_JMPc(block, uml::COND_L, done); - UML_CMP(block, I3, 64); - UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); - UML_OR(block, I3, I3, 0x80); - UML_SEXT(block, I3, I3, SIZE_BYTE); - UML_LABEL(block, diff_in_range); - - int pop_next, done_ret; - UML_LABEL(block, pop_next = compiler->m_labelnum++); - UML_CMP(block, I3, 0); - UML_JMPc(block, uml::COND_GE, done_ret = compiler->m_labelnum++); - UML_SUB(block, I0, I0, 4); - UML_CALLH(block, *m_mem_read32); - UML_ROLAND(block, I2, I0, 30, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I3, I3, 1); - UML_TEST(block, I3, ~0); - UML_JMP(block, pop_next); - - UML_LABEL(block, done_ret); - generate_delay_slot_and_branch(block, compiler, desc); - } - else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR - { - UML_OR(block, DRC_SR, DRC_SR, Z_MASK); - UML_AND(block, DRC_SR, DRC_SR, ~N_MASK); - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, 0); - generate_set_global_register(block, compiler, desc); - UML_MOV(block, I4, dstf_code); - UML_MOV(block, I5, 0); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I0, I0, dst_code); - UML_AND(block, I0, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I0, I0, 1); - UML_AND(block, I0, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I0, 0, SIZE_DWORD, SCALE_x4); - } - } - else // Rd doesn't denote PC and Rs doesn't denote SR - { - if (!SRC_GLOBAL || !DST_GLOBAL) - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - } - - if (SRC_GLOBAL) - { - UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - UML_LOAD(block, I1, (void *)m_global_regs, srcf_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I0, I3, src_code); - UML_AND(block, I0, I0, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I1, I3, srcf_code); - UML_AND(block, I1, I1, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); - - UML_OR(block, I2, I0, I1); - UML_TEST(block, I2, ~0); - UML_SETc(block, uml::COND_Z, I2); - UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK); - - UML_TEST(block, I0, 0x80000000); - UML_SETc(block, uml::COND_NZ, I2); - UML_ROLINS(block, DRC_SR, I2, N_SHIFT, N_MASK); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, I0); - generate_set_global_register(block, compiler, desc); - UML_MOV(block, I4, dstf_code); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I0, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I2, I3, dstf_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - } - - UML_LABEL(block, done); -} - - -template -void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_divsu (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - const uint32_t next = READ_OP(desc->pc + 2); - const uint8_t sub_type = (next & 0x7000) >> 12; - - uint32_t extra_u = next & 0xfff; - if (next & 0x8000) - { - extra_u = ((extra_u & 0xfff) << 16) | READ_OP(desc->pc + 4); - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - } - else - { - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - } - - UML_MOV(block, I1, extra_u); - - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_AND(block, I0, DRC_SR, C_MASK); - else - UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - if ((SRC_GLOBAL && (src_code == SR_REGISTER)) || (DST_GLOBAL && (dst_code < 2))) - { - return; - } - - if (sub_type < 4) - { - UML_CMP(block, I0, I1); - int skip, done; - if (SRC_GLOBAL && (src_code == PC_REGISTER)) - { - UML_JMPc(block, uml::COND_B, skip = compiler->m_labelnum++); - UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0); - UML_JMP(block, done = compiler->m_labelnum++); - } - else - { - UML_JMPc(block, uml::COND_BE, skip = compiler->m_labelnum++); - UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0); - UML_JMP(block, done = compiler->m_labelnum++); - } - - UML_LABEL(block, skip); - UML_SHL(block, I5, I0, sub_type); - - UML_LABEL(block, done); - } - else - { - UML_SHL(block, I5, I0, sub_type - 4); - } - - if (DST_GLOBAL) - { - UML_STORE(block, (void *)m_global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I6, I3, dst_code); - UML_AND(block, I4, I6, 0x3f); - UML_STORE(block, (void *)m_local_regs, I6, I5, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_decode_const(block, compiler, desc); - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, I1, I2, I1); - - int skip_mask; - UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); - UML_TEST(block, I1, ~0); - UML_JMPc(block, uml::COND_NZ, skip_mask = compiler->m_labelnum++); - UML_OR(block, DRC_SR, DRC_SR, Z_MASK); - UML_LABEL(block, skip_mask); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, I2); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I0, I3, dst_code); - UML_AND(block, I0, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_decode_const(block, compiler, desc); - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - } - - if (SRC_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_DADD(block, I5, I1, I2); - - UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); - UML_DTEST(block, I5, 0x100000000U); - UML_SETc(block, uml::COND_NZ, I6); - UML_ROLINS(block, DRC_SR, I6, C_SHIFT, C_MASK); - - UML_XOR(block, I1, I5, I2); - UML_XOR(block, I6, I5, I1); - UML_AND(block, I1, I1, I6); - UML_TEST(block, I1, 0x80000000); - UML_ROLINS(block, DRC_SR, I1, 4, V_MASK); - - UML_TEST(block, I5, ~0); - UML_SETc(block, uml::COND_Z, I6); - UML_ROLINS(block, DRC_SR, I6, Z_SHIFT, Z_MASK); - - UML_ROLINS(block, DRC_SR, I5, 3, N_MASK); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I0, I3, dst_code); - UML_AND(block, I2, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_sums (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_AND(block, I0, DRC_SR, C_MASK); - else - UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - if (DST_GLOBAL) - { - UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - UML_DSUB(block, I2, I1, I0); // tmp - - UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK | V_MASK | C_MASK)); - UML_XOR(block, I4, I1, I2); - UML_XOR(block, I5, I1, I0); - UML_AND(block, I6, I4, I5); - UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); - - UML_CMP(block, I1, I0); - UML_SETc(block, uml::COND_B, I3); - UML_ROLINS(block, DRC_SR, I3, C_SHIFT, C_MASK); - - UML_CMP(block, I1, I0); - UML_SETc(block, uml::COND_E, I4); - UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK); - - UML_CMP(block, I1, I0); - UML_SETc(block, uml::COND_L, I5); - UML_ROLINS(block, DRC_SR, I5, N_SHIFT, N_MASK); -} - - -template -void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - int no_exception; - UML_TEST(block, DRC_SR, H_MASK); - UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); - UML_TEST(block, DRC_SR, S_MASK); - UML_JMPc(block, uml::COND_NZ, no_exception); - UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); - UML_LABEL(block, no_exception); - } - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - UML_TEST(block, DRC_SR, H_MASK); - UML_MOVc(block, uml::COND_NZ, I1, 16 + src_code); - UML_MOVc(block, uml::COND_Z, I1, src_code); - UML_LOAD(block, I5, (void *)m_global_regs, I1, SIZE_DWORD, SCALE_x4); - UML_SHL(block, I2, 1, I1); - UML_TEST(block, I2, WRITE_ONLY_REGMASK); - UML_MOVc(block, uml::COND_NZ, I5, 0); - } - else - { - UML_ADD(block, I2, I1, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_LOAD(block, I5, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); - UML_TEST(block, I3, ~0); - UML_SETc(block, uml::COND_Z, I2); - UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK); - UML_ROLINS(block, DRC_SR, I5, 3, N_MASK); - - if (DST_GLOBAL) - { - UML_TEST(block, DRC_SR, H_MASK); - UML_MOVc(block, uml::COND_NZ, I4, 16 + dst_code); - UML_MOVc(block, uml::COND_Z, I4, dst_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I1, dst_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - if (DST_GLOBAL) - { - UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - UML_DADD(block, I2, I0, I1); - - UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); - - UML_DTEST(block, I2, 0x100000000U); - UML_SETc(block, uml::COND_NZ, I4); - UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); - - UML_XOR(block, I4, I0, I2); - UML_XOR(block, I5, I1, I2); - UML_AND(block, I6, I4, I5); - UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); - - UML_ADD(block, I2, I0, I1); - - UML_TEST(block, I2, ~0); - UML_SETc(block, uml::COND_Z, I4); - UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); - UML_ROLINS(block, DRC_SR, I2, 3, N_MASK); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, I2); - generate_set_global_register(block, compiler, desc); - - if (dst_code == 0) - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - } - else - { - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_adds (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_cmpb (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_subc (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - generate_check_delay_pc(block); - - if (!SRC_GLOBAL || !DST_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - UML_DMOV(block, I0, 0); - UML_DMOV(block, I1, 0); - - if (SRC_GLOBAL) - { - UML_LOAD(block, I0, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - if (DST_GLOBAL) - { - UML_LOAD(block, I1, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - } - - UML_DSUB(block, I2, I1, I0); - - UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); - - UML_DTEST(block, I2, 0x100000000U); - UML_SETc(block, uml::COND_NZ, I4); - UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); - - UML_XOR(block, I4, I0, I2); - UML_XOR(block, I5, I1, I2); - UML_AND(block, I6, I4, I5); - UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); - - UML_SUB(block, I2, I1, I0); - - UML_TEST(block, I2, ~0); - UML_SETc(block, uml::COND_Z, I4); - UML_ROLINS(block, DRC_SR, I4, 0, Z_MASK); - UML_ROLINS(block, DRC_SR, I2, 3, N_MASK); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, I2); - generate_set_global_register(block, compiler, desc); - - if (dst_code == 0) - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - } - else - { - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_subs (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_addc (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_neg (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_negs (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_and (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_andn (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_or (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_xor (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_not (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - - if (IMM_LONG) - { - generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 - } - else - { - UML_AND(block, I1, I0, 0xf); - } - - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I3, dst_code); - UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK | C_MASK)); - UML_DSUB(block, I0, I2, I1); - - int no_v; - UML_XOR(block, I0, I0, I2); - UML_XOR(block, I3, I1, I2); - UML_AND(block, I0, I0, I3); - UML_TEST(block, I0, 0x80000000); - UML_JMPc(block, uml::COND_Z, no_v = compiler->m_labelnum++); - UML_OR(block, DRC_SR, DRC_SR, V_MASK); - UML_LABEL(block, no_v); - - int no_n; - UML_MOV(block, I3, 0); - UML_CMP(block, I2, I1); - UML_MOVc(block, uml::COND_E, I3, Z_MASK); - UML_MOVc(block, uml::COND_B, I3, C_MASK); - UML_JMPc(block, uml::COND_GE, no_n = compiler->m_labelnum++); - UML_OR(block, I3, I3, N_MASK); - UML_LABEL(block, no_n); - UML_OR(block, DRC_SR, DRC_SR, I3); - - UML_CMP(block, I2, I1); - -} - - -template -void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - const uint32_t src_code = op & 0xf; - - if (IMM_LONG) - generate_decode_immediate_s(block, compiler, desc); - else - UML_MOV(block, I1, src_code); - - generate_check_delay_pc(block); - - int done, no_exception; - if (DST_GLOBAL) - { - UML_TEST(block, DRC_SR, H_MASK); - UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++); - UML_TEST(block, DRC_SR, S_MASK); - UML_JMPc(block, uml::COND_NZ, no_exception); - UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); - UML_JMP(block, done = compiler->m_labelnum++); - UML_LABEL(block, no_exception); - } - - UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK)); - - int no_z; - UML_TEST(block, I1, ~0); - UML_JMPc(block, uml::COND_NZ, no_z = compiler->m_labelnum++); - UML_OR(block, DRC_SR, DRC_SR, Z_MASK); - UML_LABEL(block, no_z); - - int no_n; - UML_TEST(block, I1, 0x80000000); - UML_JMPc(block, uml::COND_Z, no_n = compiler->m_labelnum++); - UML_OR(block, DRC_SR, DRC_SR, N_MASK); - UML_LABEL(block, no_n); - -#if MISSIONCRAFT_FLAGS - UML_AND(block, DRC_SR, DRC_SR, ~V_MASK); -#endif - - if (DST_GLOBAL) - { - UML_TEST(block, DRC_SR, H_MASK); - UML_MOVc(block, uml::COND_NZ, I4, dst_code + 16); - UML_MOVc(block, uml::COND_Z, I4, dst_code); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - - UML_TEST(block, op, 0xf0); - UML_JMPc(block, uml::COND_NZ, done); - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - generate_delay_slot_and_branch(block, compiler, desc); - - UML_LABEL(block, done); - } - else - { - UML_ROLAND(block, I2, DRC_SR, 7, 0x7f); - UML_ADD(block, I0, I2, dst_code); - UML_AND(block, I0, I0, 0x3f); - UML_STORE(block, (void *)m_local_regs, I0, I1, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - const uint32_t src_code = op & 0xf; - - if (IMM_LONG) - generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 - else - UML_MOV(block, I1, src_code); - - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); - } - - if (!(op & 0x10f)) - { - UML_TEST(block, DRC_SR, Z_MASK); - UML_SETc(block, uml::COND_Z, I4); - UML_AND(block, I5, I2, 1); - UML_OR(block, I6, I4, I5); - UML_AND(block, I1, DRC_SR, I6); - } - - UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK)); - - UML_DADD(block, I0, I1, I2); - - UML_DTEST(block, I2, 0x100000000U); - UML_SETc(block, uml::COND_NZ, I4); - UML_ROLINS(block, DRC_SR, I4, 0, C_MASK); - - UML_XOR(block, I4, I2, I0); - UML_XOR(block, I5, I1, I0); - UML_AND(block, I6, I4, I5); - UML_ROLINS(block, DRC_SR, I6, 4, V_MASK); - - UML_ADD(block, I0, I1, I2); - - UML_TEST(block, I0, ~0); - UML_SETc(block, uml::COND_Z, I4); - UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK); - UML_ROLINS(block, DRC_SR, I0, 3, N_MASK); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - UML_MOV(block, I5, I0); - generate_set_global_register(block, compiler, desc); - - if (dst_code == 0) - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - } - else - { - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I0, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_addsi (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - - if (!IMM_LONG) - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); - } - - const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f); - if (n) - { - if (n == 31) - { - if (IMM_LONG) - { - generate_ignore_immediate_s(block, desc); - generate_check_delay_pc(block); - } - UML_MOV(block, I1, 0x7fffffff); - } - else - { - if (IMM_LONG) - { - generate_decode_immediate_s(block, compiler, desc); - generate_check_delay_pc(block); - } - else - { - UML_MOV(block, I1, op & 0xf); - } - } - - UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); - UML_TEST(block, I2, I1); - UML_SETc(block, uml::COND_Z, I3); - UML_ROLINS(block, DRC_SR, I3, Z_SHIFT, Z_MASK); - } - else - { - if (IMM_LONG) - { - generate_ignore_immediate_s(block, desc); - generate_check_delay_pc(block); - } - - int or_mask, done; - UML_TEST(block, I2, 0xff000000); - UML_JMPc(block, uml::COND_Z, or_mask = compiler->m_labelnum++); - UML_TEST(block, I2, 0x00ff0000); - UML_JMPc(block, uml::COND_Z, or_mask); - UML_TEST(block, I2, 0x0000ff00); - UML_JMPc(block, uml::COND_Z, or_mask); - UML_TEST(block, I2, 0x000000ff); - UML_JMPc(block, uml::COND_Z, or_mask); - UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); - UML_JMP(block, done = compiler->m_labelnum++); - - UML_LABEL(block, or_mask); - UML_OR(block, DRC_SR, DRC_SR, Z_MASK); - - UML_LABEL(block, done); - } -} - - -template -void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - - if (IMM_LONG) - { - generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 - } - else - { - UML_AND(block, I1, I0, 0xf); - } - - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I3, dst_code); - UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); - UML_XOR(block, I1, I1, ~0); - UML_AND(block, I5, I2, I1); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I4, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - const uint32_t dst_code = (op & 0xf0) >> 4; - - if (IMM_LONG) - { - generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32 - } - else - { - UML_AND(block, I1, I0, 0xf); - } - - generate_check_delay_pc(block); - - if (DST_GLOBAL) - { - UML_LOAD(block, I2, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I3, dst_code); - UML_LOAD(block, I2, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK); - UML_OR(block, I5, I2, I1); - - if (DST_GLOBAL) - { - UML_MOV(block, I4, dst_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I4, I3, dst_code); - UML_AND(block, I4, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I4, I5, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_xori (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shrdi (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shrd (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shr (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shri (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_sardi (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_sard (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_sar (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_sari (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shldi (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shld (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shl (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_shli (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_testlz (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_rol (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - uint16_t next_1 = READ_OP(desc->pc + 2); - const uint16_t sub_type = (next_1 & 0x3000) >> 12; - - uint32_t extra_s; - if (next_1 & 0x8000) - { - const uint16_t next_2 = READ_OP(desc->pc + 4); - - extra_s = next_2; - extra_s |= ((next_1 & 0xfff) << 16); - - if (next_1 & 0x4000) - extra_s |= 0xf0000000; - - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - } - else - { - extra_s = next_1 & 0xfff; - - if (next_1 & 0x4000) - extra_s |= 0xfffff000; - - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - } - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t srcf_code = src_code + 1; - const uint32_t dst_code = (op & 0xf0) >> 4; - - if (!DST_GLOBAL || !SRC_GLOBAL) - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (DST_GLOBAL) - { - if (dst_code == SR_REGISTER) - { - UML_MOV(block, I6, extra_s); - } - else - { - UML_LOAD(block, I4, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - } - else - { - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I5, I2, 0x3f); - UML_LOAD(block, I4, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I6, I4, extra_s); - - switch (sub_type) - { - case 0: // LDBS.A - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_mem_read8); - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - UML_SEXT(block, I5, I1, SIZE_BYTE); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - - case 1: // LDBU.A - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_mem_read8); - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - - case 2: - UML_AND(block, I6, I6, ~1); - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_mem_read16); - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - if (extra_s & 1) // LDHS.A - UML_SEXT(block, I5, I1, SIZE_WORD); - else // LDHU.A - UML_MOV(block, I5, I1); - - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - if (extra_s & 1) - { - UML_SEXT(block, I5, I1, SIZE_WORD); - UML_STORE(block, (void *)m_local_regs, I2, I5, SIZE_DWORD, SCALE_x4); - } - else - { - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - } - break; - - case 3: - { - uint32_t switch_val = extra_s & 3; - UML_AND(block, I6, I6, ~3); - switch (switch_val) - { - case 0: // LDW.A/D - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_mem_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, src_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - case 1: // LDD.A - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_mem_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, src_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I0, I6, 4); - UML_CALLH(block, *m_mem_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, srcf_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, srcf_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - case 2: // LDW.IOA - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_io_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, src_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - - case 3: // LDD.IOA - UML_MOV(block, I0, I6); - UML_CALLH(block, *m_io_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, src_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I0, I6, 4); - UML_CALLH(block, *m_io_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I5, I1); - UML_MOV(block, I4, srcf_code); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, srcf_code); - UML_AND(block, I2, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I1, SIZE_DWORD, SCALE_x4); - } - break; - } - break; - } - } -} - - -template -void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_ldxx2 (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - uint16_t next_1 = READ_OP(desc->pc + 2); - const uint16_t sub_type = (next_1 & 0x3000) >> 12; - - uint32_t extra_s; - if (next_1 & 0x8000) - { - const uint16_t next_2 = READ_OP(desc->pc + 4); - - extra_s = next_2; - extra_s |= ((next_1 & 0xfff) << 16); - - if (next_1 & 0x4000) - extra_s |= 0xf0000000; - - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - } - else - { - extra_s = next_1 & 0xfff; - - if (next_1 & 0x4000) - extra_s |= 0xfffff000; - - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - } - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (DST_GLOBAL) - { - UML_LOAD(block, I0, (void *)m_global_regs, dst_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I1, I3, dst_code); - UML_AND(block, I1, I1, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); - } - - if (SRC_GLOBAL) - { - UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I1, I3, src_code); - UML_AND(block, I1, I1, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); - } - - switch (sub_type) - { - case 0: // STBS.D - case 1: // STBU.D - // TODO: missing trap on range error for STBS.D - UML_ADD(block, I0, I0, extra_s); - UML_CALLH(block, *m_mem_write8); - break; - - case 2: // STHS.D, STHU.D - // TODO: missing trap on range error with STHS.D - UML_ADD(block, I0, I0, extra_s); - UML_CALLH(block, *m_mem_write16); - break; - - case 3: - switch (extra_s & 3) - { - case 0: // STW.D - UML_ADD(block, I0, I0, extra_s & ~3); - UML_CALLH(block, *m_mem_write32); - break; - case 1: // STD.D - { - UML_ADD(block, I0, I0, extra_s & ~1); - UML_CALLH(block, *m_mem_write32); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_MOV(block, I1, 0); - else - UML_LOAD(block, I1, (void *)m_global_regs, src_code + 1, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I1, I3, src_code + 1); - UML_AND(block, I1, I1, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I0, I0, 4); - UML_CALLH(block, *m_mem_write32); - break; - } - case 2: // STW.IOD - UML_ADD(block, I0, I0, extra_s & ~3); - UML_CALLH(block, *m_io_write32); - break; - case 3: // STD.IOD - { - UML_ADD(block, I0, I0, extra_s & ~1); - UML_CALLH(block, *m_io_write32); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_MOV(block, I1, 0); - else - UML_LOAD(block, I1, (void *)m_global_regs, src_code + 1, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I1, I3, src_code + 1); - UML_AND(block, I1, I1, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I1, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I0, I0, 4); - UML_CALLH(block, *m_io_write32); - break; - } - } - break; - } -} - - -template -void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_stxx2 (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_mulsu (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_mul (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_set (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - UML_ADD(block, I2, I3, dst_code); - UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - UML_CALLH(block, *m_mem_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I4, I2, 0x3f); - UML_STORE(block, (void *)m_local_regs, I4, I1, SIZE_DWORD, SCALE_x4); - } -} - - -template -void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_lddr (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I1, I0, dst_code); - UML_AND(block, I2, I1, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - - UML_ADD(block, I3, I0, 4); - UML_CALLH(block, *m_mem_read32); - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I1, I0, dst_code); - UML_AND(block, I2, I1, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I3, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I4, I0, src_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I1, SIZE_DWORD, SCALE_x4); - - if (src_code != dst_code) - { - UML_ADD(block, I4, I0, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I3, SIZE_DWORD, SCALE_x4); - } - } -} - - -template -void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I1, I0, dst_code); - UML_AND(block, I2, I1, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - - UML_ADD(block, I3, I0, 8); - UML_CALLH(block, *m_mem_read32); - UML_MOV(block, I2, I1); // I2: dreg[0] - UML_ADD(block, I0, I0, 4); - UML_CALLH(block, *m_mem_read32); // I1: dreg[4] - - if (SRC_GLOBAL) - { - UML_MOV(block, I4, src_code); - UML_MOV(block, I5, I2); - generate_set_global_register(block, compiler, desc); - UML_MOV(block, I4, src_code + 1); - UML_MOV(block, I5, I1); - generate_set_global_register(block, compiler, desc); - - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I1, I0, dst_code); - UML_AND(block, I2, I1, 0x3f); - UML_STORE(block, (void *)m_local_regs, I2, I3, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ROLAND(block, I0, DRC_SR, 7, 0x7f); - UML_ADD(block, I4, I0, src_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I2, SIZE_DWORD, SCALE_x4); - UML_ADD(block, I4, I0, src_code + 1); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I1, SIZE_DWORD, SCALE_x4); - - if (src_code != dst_code && (src_code + 1) != dst_code) - { - UML_ADD(block, I4, I0, dst_code); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, I3, SIZE_DWORD, SCALE_x4); - } - } -} - - -template -void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_MOV(block, I1, 0); - else - UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I2, I2, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - UML_CALLH(block, *m_mem_write32); -} - - -template -void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_stdr (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - const uint32_t dst_code = (op & 0xf0) >> 4; - - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_MOV(block, I1, 0); - else - UML_LOAD(block, I1, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I2, I3, src_code); - UML_AND(block, I0, I2, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I0, SIZE_DWORD, SCALE_x4); - } - - UML_ADD(block, I2, I3, dst_code); - UML_AND(block, I4, I2, 0x3f); - UML_LOAD(block, I0, (void *)m_local_regs, I4, SIZE_DWORD, SCALE_x4); - UML_CALLH(block, *m_mem_write32); - UML_ADD(block, I2, I0, 4); - UML_STORE(block, (void *)m_local_regs, I4, I2, SIZE_DWORD, SCALE_x4); -} - - -template -void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_stdp (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -template -void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; - - int done = compiler->m_labelnum++; - uml::condition_t condition = COND_SET ? uml::COND_Z : uml::COND_NZ; - - int skip; - UML_TEST(block, DRC_SR, condition_masks[CONDITION]); - UML_JMPc(block, condition, skip = compiler->m_labelnum++); - generate_br(block, compiler, desc); - - UML_JMP(block, done); - - UML_LABEL(block, skip); - generate_ignore_pcrel(block, desc); - generate_check_delay_pc(block); - - UML_LABEL(block, done); -} - - -void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - generate_decode_pcrel(block, desc); - generate_check_delay_pc(block); - - UML_ADD(block, DRC_PC, DRC_PC, I1); - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - - generate_delay_slot_and_branch(block, compiler, desc); - // TODO: correct cycle count -} - - -template -void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK }; - int skip_jump = compiler->m_labelnum++; - int done = compiler->m_labelnum++; - - UML_TEST(block, DRC_SR, condition_masks[CONDITION]); - if (COND_SET) - UML_JMPc(block, uml::COND_Z, skip_jump); - else - UML_JMPc(block, uml::COND_NZ, skip_jump); - - generate_dbr(block, compiler, desc); - UML_JMP(block, done); - - UML_LABEL(block, skip_jump); - generate_ignore_pcrel(block, desc); - generate_check_delay_pc(block); - - UML_LABEL(block, done); -} - - -void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - generate_decode_pcrel(block, desc); - generate_check_delay_pc(block); - - UML_MOV(block, mem(&m_delay_slot), 1); - UML_ADD(block, mem(&m_delay_pc), DRC_PC, I1); - UML_MOV(block, mem(&m_intblock), 3); - generate_delay_slot_and_branch(block, compiler, desc); -} - - -void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - const uint16_t op = desc->opptr.w[0]; - - generate_check_delay_pc(block); - - UML_ROLAND(block, I1, DRC_SR, 7, 0x7f); - UML_SUB(block, I1, I1, op & 0xf); - UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); // SET_FP(GET_FP - SRC_CODE) - UML_ROLINS(block, DRC_SR, op, 17, 0x01e00000); // SET_FL(DST_CODE) - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); // SET_M(0) - - UML_MOV(block, I0, mem(&SP)); - UML_ADD(block, I1, I1, (op & 0xf0) >> 4); - UML_ROLAND(block, I2, I0, 30, 0x7f); - UML_ADD(block, I2, I2, (64 - 10)); - UML_SUB(block, I3, I2, I1); - UML_SEXT(block, I3, I3, SIZE_BYTE); // difference = ((SP & 0x1fc) >> 2) + (64 - 10) - ((GET_FP - SRC_CODE) + GET_FL) - - int diff_in_range, done; - UML_CMP(block, I3, -64); - UML_JMPc(block, uml::COND_L, done = compiler->m_labelnum++); - UML_CMP(block, I3, 64); - UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++); - UML_OR(block, I3, I3, 0xffffff80); - UML_LABEL(block, diff_in_range); - - UML_CMP(block, I0, mem(&UB)); - UML_SETc(block, uml::COND_AE, I4); - UML_CMP(block, I3, 0); - UML_JMPc(block, uml::COND_GE, done); - - int push_next; - UML_LABEL(block, push_next = compiler->m_labelnum++); - UML_ROLAND(block, I2, I0, 30, 0x3f); - UML_LOAD(block, I1, (void *)m_local_regs, I2, SIZE_DWORD, SCALE_x4); - UML_CALLH(block, *m_mem_write32); - UML_ADD(block, I0, I0, 4); - UML_ADD(block, I3, I3, 1); - - UML_TEST(block, I3, ~0); - UML_JMPc(block, uml::COND_NZ, push_next); - - UML_MOV(block, mem(&SP), I0); - - UML_TEST(block, I4, ~0); - UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_FRAME_ERROR], 0); - - UML_LABEL(block, done); -} - -template -void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - uint16_t op = desc->opptr.w[0]; - uint16_t imm_1 = READ_OP(desc->pc + 2); - - int32_t extra_s = 0; - - if (imm_1 & 0x8000) - { - uint16_t imm_2 = READ_OP(desc->pc + 4); - - extra_s = imm_2; - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - extra_s |= 0xc0000000; - - UML_MOV(block, mem(&m_instruction_length), (3<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 4); - } - else - { - extra_s = imm_1 & 0x3fff; - - if (imm_1 & 0x4000) - extra_s |= 0xffffc000; - - UML_MOV(block, mem(&m_instruction_length), (2<<19)); - UML_ADD(block, DRC_PC, DRC_PC, 2); - } - - UML_MOV(block, I1, extra_s); - - generate_check_delay_pc(block); - - const uint32_t src_code = op & 0xf; - uint32_t dst_code = (op & 0xf0) >> 4; - - if (!dst_code) - dst_code = 16; - - UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); - - if (SRC_GLOBAL) - { - if (src_code == SR_REGISTER) - UML_MOV(block, I2, 0); - else - UML_LOAD(block, I2, (void *)m_global_regs, src_code, SIZE_DWORD, SCALE_x4); - } - else - { - UML_ADD(block, I4, I3, src_code); - UML_AND(block, I5, I4, 0x3f); - UML_LOAD(block, I2, (void *)m_local_regs, I5, SIZE_DWORD, SCALE_x4); - } - - UML_AND(block, I4, DRC_PC, ~1); - UML_ROLINS(block, I4, DRC_SR, 32-S_SHIFT, 1); - - UML_ADD(block, I1, I3, dst_code); - UML_AND(block, I6, I1, 0x3f); - UML_STORE(block, (void *)m_local_regs, I6, I4, SIZE_DWORD, SCALE_x4); - - UML_ADD(block, I4, I6, 1); - UML_AND(block, I5, I4, 0x3f); - UML_STORE(block, (void *)m_local_regs, I5, DRC_SR, SIZE_DWORD, SCALE_x4); - - UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); - UML_ROLINS(block, DRC_SR, 6, 21, 0x01e00000); - UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - - UML_ADD(block, DRC_PC, I2, extra_s & ~1); - - UML_MOV(block, mem(&m_intblock), 2); - - generate_delay_slot_and_branch(block, compiler, desc); - //TODO: add interrupt locks, errors, .... -} - - - -void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_trap_op (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - -void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_extend (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - - -void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_reserved (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - -void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) -{ - printf("Unimplemented: generate_do (%08x)\n", desc->pc); - fflush(stdout); - fatalerror(" "); -} - diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp deleted file mode 100644 index 33f57434e1b..00000000000 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ /dev/null @@ -1,1303 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -/*************************************************************************** - - e132xsfe.cpp - - Front end for Hyperstone recompiler - -***************************************************************************/ - -#include "emu.h" -#include "e132xsfe.h" -#include "32xsdefs.h" - -#define FE_FP ((m_cpu->m_global_regs[1] & 0xfe000000) >> 25) -#define FE_FL (m_cpu->m_fl_lut[((m_cpu->m_global_regs[1] >> 21) & 0xf)]) -#define DST_CODE ((op & 0xf0) >> 4) -#define SRC_CODE (op & 0x0f) -#define SR_CODE (1 << 1) - -/*************************************************************************** - INSTRUCTION PARSERS -***************************************************************************/ - -e132xs_frontend::e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*e132xs, window_start, window_end, max_sequence) - , m_cpu(e132xs) -{ -} - -inline uint32_t e132xs_frontend::imm_length(opcode_desc &desc, uint16_t op) -{ - uint8_t nybble = op & 0x0f; - switch (nybble) - { - case 0: - default: - return 2; - case 1: - return 6; - case 2: - case 3: - return 4; - } -} - -inline uint16_t e132xs_frontend::read_word(opcode_desc &desc) -{ - return m_cpu->m_direct->read_word(desc.physpc, m_cpu->m_opcodexor); -} - -inline uint16_t e132xs_frontend::read_imm1(opcode_desc &desc) -{ - return m_cpu->m_direct->read_word(desc.physpc + 2, m_cpu->m_opcodexor); -} - -inline uint16_t e132xs_frontend::read_imm2(opcode_desc &desc) -{ - return m_cpu->m_direct->read_word(desc.physpc + 4, m_cpu->m_opcodexor); -} - -inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) -{ - const uint16_t imm1 = read_imm1(desc); - uint32_t extra_s; - if (imm1 & 0x8000) - { - extra_s = read_imm2(desc); - extra_s |= ((imm1 & 0xfff) << 16); - - if (imm1 & 0x4000) - extra_s |= 0xf0000000; - } - else - { - extra_s = imm1 & 0xfff; - - if (imm1 & 0x4000) - extra_s |= 0xfffff000; - } - return extra_s; -} - -inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op) -{ - static const int32_t immediate_values[16] = - { - 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000), - -8, -7, -6, -5, -4, -3, -2, -1 - }; - - uint8_t nybble = op & 0xf; - switch (nybble) - { - case 0: - return 16; - case 1: - return (read_imm1(desc) << 16) | read_imm2(desc); - case 2: - return read_imm1(desc); - case 3: - return 0xffff0000 | read_imm1(desc); - default: - return immediate_values[nybble]; - } -} - -inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) -{ - if (op & 0x80) - { - uint16_t next = read_imm1(desc); - - desc.length = 4; - - int32_t offset = (op & 0x7f) << 16; - offset |= (next & 0xfffe); - - if (next & 1) - offset |= 0xff800000; - - return offset; - } - else - { - int32_t offset = op & 0x7e; - if (op & 1) - offset |= 0xffffff80; - return offset; - } -} - -inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) -{ - const uint16_t imm_1 = read_imm1(desc); - int32_t extra_s = 0; - if (imm_1 & 0x8000) - { - desc.length = 6; - extra_s = read_imm2(desc); - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - extra_s |= 0xc0000000; - } - else - { - desc.length = 4; - extra_s = imm_1 & 0x3fff; - if (imm_1 & 0x4000) - extra_s |= 0xffffc000; - } - return extra_s; -} - - -/*------------------------------------------------- - describe - build a description of a single - instruction --------------------------------------------------*/ - -bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) -{ - uint16_t op = desc.opptr.w[0] = read_word(desc); - - /* most instructions are 2 bytes and a single cycle */ - desc.length = 2; - desc.cycles = m_cpu->m_clock_cycles_1; - - const uint32_t fp = FE_FP; - const uint32_t gdst_code = DST_CODE; - const uint32_t gdstf_code = gdst_code + 1; - const uint32_t gsrc_code = SRC_CODE; - const uint32_t gsrcf_code = gsrc_code + 1; - const uint32_t ldst_code = (gdst_code + fp) & 0x1f; - const uint32_t ldstf_code = (gdstf_code + fp) & 0x1f; - const uint32_t lsrc_code = (gsrc_code + fp) & 0x1f; - const uint32_t lsrcf_code = (gsrcf_code + fp) & 0x1f; - const uint32_t ldst_group = 1 + (((DST_CODE + fp) & 0x20) >> 5); - const uint32_t ldstf_group = 1 + (((DST_CODE + fp + 1) & 0x20) >> 5); - const uint32_t lsrc_group = 1 + (((SRC_CODE + fp) & 0x20) >> 5); - const uint32_t lsrcf_group = 1 + ((SRC_CODE + fp + 1) >> 5); - - switch (op >> 8) - { - case 0x00: // chk global,global - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x01: // chk global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x02: // chk local,global - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x03: // chk local,local - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x04: // movd global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - if (gdst_code == 0) - { - desc.regout[1] = 0xffffffff; - desc.regout[2] = 0xffffffff; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; - } - else - { - desc.cycles = m_cpu->m_clock_cycles_2; - } - desc.regout[0] |= SR_CODE; - break; - case 0x05: // movd global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[lsrcf_group] |= 1 << lsrcf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - if (gdst_code == 0) - { - desc.regout[1] = 0xffffffff; - desc.regout[2] = 0xffffffff; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; - } - else - { - desc.cycles = m_cpu->m_clock_cycles_2; - } - desc.regout[0] |= SR_CODE; - break; - case 0x06: // movd local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_2; - break; - case 0x07: // movd local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[lsrcf_group] |= 1 << lsrcf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_2; - break; - case 0x08: // divu global,global - case 0x0c: // divs global,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gdstf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 36 << m_cpu->m_clck_scale; - break; - case 0x09: // divu global,local - case 0x0d: // divs global,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gdstf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 36 << m_cpu->m_clck_scale; - break; - case 0x0a: // divu local,global - case 0x0e: // divs local,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[ldstf_group] |= 1 << ldstf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 36 << m_cpu->m_clck_scale; - break; - case 0x0b: // divu local,local - case 0x0f: // divs local,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[ldstf_group] |= 1 << ldstf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 36 << m_cpu->m_clck_scale; - break; - case 0x10: // xm global,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x11: // xm global,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x12: // xm local,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x13: // xm local,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x14: // mask global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x15: // mask global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x16: // mask local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x17: // mask local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x18: // sum global,global - case 0x1c: // sums global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x19: // sum global,local - case 0x1d: // sums global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x1a: // sum local,global - case 0x1e: // sums local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x1b: // sum local,local - case 0x1f: // sums local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x20: // cmp global,global - case 0x30: // cmpb global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x21: // cmp global,local - case 0x31: // cmpb global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x22: // cmp local,global - case 0x32: // cmpb local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x23: // cmp local,local - case 0x33: // cmpb local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x24: // mov global,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << (gsrc_code + 16); - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x25: // mov global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x26: // mov local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << (gsrc_code + 16); - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x27: // mov local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x28: // add global,global - case 0x2c: // adds global,global - case 0x48: // sub global,global - case 0x4c: // subs global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs - break; - case 0x29: // add global,local - case 0x2d: // adds global,local - case 0x49: // sub global,local - case 0x4d: // subs global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs - break; - case 0x2a: // add local,global - case 0x2e: // adds local,global - case 0x4a: // sub local,global - case 0x4e: // subs local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs - break; - case 0x2b: // add local,local - case 0x2f: // adds local,local - case 0x4b: // sub local,local - case 0x4f: // subs local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs - break; - case 0x34: // andn global,global - case 0x38: // or global,global - case 0x3c: // xor global,global - case 0x54: // and global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x35: // andn global,local - case 0x39: // or global,local - case 0x3d: // xor global,local - case 0x55: // and global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x36: // andn local,global - case 0x3a: // or local,global - case 0x3e: // xor local,global - case 0x56: // and local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x37: // andn local,local - case 0x3b: // or local,local - case 0x3f: // xor local,local - case 0x57: // and local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x40: // subc global,global - case 0x50: // addc global,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x41: // subc global,local - case 0x51: // addc global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x42: // subc local,global - case 0x52: // addc local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x43: // subc local,local - case 0x53: // addc local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x44: // not global,global - case 0x58: // neg global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x45: // not global,local - case 0x59: // neg global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x46: // not local,global - case 0x5a: // neg local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x47: // not local,local - case 0x5b: // neg local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x5c: // negs global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x5d: // negs global,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x5e: // negs local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x5f: // negs local,local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - break; - case 0x60: // cmpi global,simm - case 0x70: // cmpbi global,simm - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x61: // cmpi global,limm - case 0x71: // cmpbi global,limm - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - break; - case 0x62: // cmpi local,simm - case 0x72: // cmpbi local,simm - desc.regin[0] |= SR_CODE; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x63: // cmpi local,limm - case 0x73: // cmpbi local,limm - desc.regin[0] |= SR_CODE; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - break; - case 0x64: // movi global,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << (gdst_code + 16); - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = op & 0xf; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x65: // movi global,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << (gdst_code + 16); - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = read_limm(desc, op); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x66: // movi local,simm - desc.regin[0] |= SR_CODE; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x67: // movi local,limm - desc.regin[0] |= SR_CODE; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - break; - case 0x68: // addi global,simm - case 0x6c: // addsi global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x69: // addi global,limm - case 0x6d: // addsi global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x6a: // addi local,simm - case 0x6e: // addsi local,simm - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi - break; - case 0x6b: // addi local,limm - case 0x6f: // addsi local,limm - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi - break; - case 0x74: // andni global,simm - case 0x78: // ori global,simm - case 0x7c: // xori global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x75: // andni global,limm - case 0x79: // ori global,limm - case 0x7d: // xori global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - case 0x76: // andni local,simm - case 0x7a: // ori local,simm - case 0x7e: // xori local,simm - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x77: // andni local,limm - case 0x7b: // ori local,limm - case 0x7f: // xori local,limm - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.length = imm_length(desc, op); - break; - case 0x80: case 0x81: // shrdi - case 0x84: case 0x85: // sardi - case 0x88: case 0x89: // shldi - desc.regin[0] |= SR_CODE; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_2; - break; - case 0x82: // shrd - case 0x86: // sard - case 0x8a: // shld - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_2; - break; - case 0x83: // shr - case 0x87: // sar - case 0x8b: // shl - case 0x8f: // rol - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0x8c: case 0x8d: // reserved - return false; - case 0x8e: // testlz - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - break; - case 0x90: // ldxx1 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - } - case 0x91: // ldxx1 global,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - } - case 0x92: // ldxx1 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - break; - } - case 0x93: // ldxx1 local,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - break; - } - case 0x94: // ldxx2 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - } - case 0x95: // ldxx2 global,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - } - break; - } - case 0x96: // ldxx2 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - break; - } - case 0x97: // ldxx2 local,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; - break; - } - case 0x98: // stxx1 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x99: // stxx1 global,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9a: // stxx1 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9b: // stxx1 local,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9c: // stxx2 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; - desc.regout[0] |= 1 << gdst_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9d: // stxx2 global,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; - desc.regout[0] |= 1 << gdst_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9e: // stxx2 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0x9f: // stxx2 local,local - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - if ((imm1 & 0x3000) == 3 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code; - desc.regout[ldst_group] |= 1 << ldst_code; - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - } - case 0xa0: // shri global (lo n) - case 0xa1: // shri global (hi n) - case 0xa4: // sari global (lo n) - case 0xa5: // sari global (hi n) - case 0xa8: // shli global (lo n) - case 0xa9: // shli global (hi n) - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - break; - case 0xa2: // shri local (lo n) - case 0xa3: // shri local (hi n) - case 0xa6: // sari local (lo n) - case 0xa7: // sari local (hi n) - case 0xaa: // shli local (lo n) - case 0xab: // shli local (hi n) - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - break; - case 0xac: case 0xad: case 0xae: case 0xaf: // reserved - return false; - case 0xb0: // mulu global,global - case 0xb4: // muls global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_4; - break; - case 0xb1: // mulu global,local - case 0xb5: // muls global,local - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_4; - break; - case 0xb2: // mulu local,global - case 0xb6: // muls local,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_4; - break; - case 0xb3: // mulu local,local - case 0xb7: // muls local,local - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.regout[0] |= SR_CODE; - desc.cycles = m_cpu->m_clock_cycles_4; - break; - case 0xb8: // set global (lo n) - case 0xb9: // set global (hi n) - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - break; - case 0xba: // set local (lo n) - case 0xbb: // set local (hi n) - desc.regout[ldst_group] |= 1 << ldst_code; - break; - case 0xbc: // mul global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 3 << m_cpu->m_clck_scale; - break; - case 0xbd: // muls global,local - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 3 << m_cpu->m_clck_scale; - break; - case 0xbe: // muls local,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 3 << m_cpu->m_clck_scale; - break; - case 0xbf: // mulu local,local - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= SR_CODE; - desc.cycles = 3 << m_cpu->m_clck_scale; - break; - case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software - case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software - case 0xc8: case 0xc9: case 0xca: case 0xcb: // software - case 0xcc: case 0xcd: // software - { - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[lsrcf_group] |= 1 << lsrcf_code; - - const uint32_t reg = FE_FP + FE_FL; - desc.regout[1 + (((reg + 0) & 0x20) >> 5)] |= 1 << ((reg + 0) & 0x1f); - desc.regout[1 + (((reg + 1) & 0x20) >> 5)] |= 1 << ((reg + 1) & 0x1f); - desc.regout[1 + (((reg + 2) & 0x20) >> 5)] |= 1 << ((reg + 2) & 0x1f); - desc.regout[1 + (((reg + 3) & 0x20) >> 5)] |= 1 << ((reg + 3) & 0x1f); - desc.regout[1 + (((reg + 4) & 0x20) >> 5)] |= 1 << ((reg + 4) & 0x1f); - - desc.regout[0] |= SR_CODE; - - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - break; - } - case 0xce: // extend - 4 bytes - desc.regin[0] |= SR_CODE; - desc.regin[0] |= (3 << 14); // global regs 14, 15 - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= (3 << 14); // global regs 14, 15 - break; - case 0xcf: // do - return false; - case 0xd0: // ldwr global - case 0xd4: // ldwp global - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= 1 << gsrc_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_READS_MEMORY; - break; - case 0xd1: // ldwr local - case 0xd5: // ldwp local - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_READS_MEMORY; - break; - case 0xd2: // lddr global - case 0xd6: // lddp global - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gsrcf_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_READS_MEMORY; - break; - case 0xd3: // lddr local - case 0xd7: // lddp local - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regout[lsrc_group] |= 1 << lsrc_code; - desc.regout[lsrcf_group] |= 1 << lsrcf_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_READS_MEMORY; - break; - case 0xd8: // stwr global - case 0xdc: // stwp global - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[0] |= 1 << gsrc_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - case 0xd9: // stwr local - case 0xdd: // stwp local - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - case 0xda: // stdr global - case 0xde: // stdp global - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - case 0xdb: // stdr local - case 0xdf: // stdp local - desc.regin[0] |= SR_CODE; - desc.regin[ldst_group] |= 1 << ldst_code; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regin[lsrcf_group] |= 1 << lsrcf_code; - if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code; - desc.flags |= OPFLAG_WRITES_MEMORY; - break; - case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel) - case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) - case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) - desc.regin[0] |= SR_CODE; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; - desc.delayslots = 1; - break; - case 0xec: // dbr - could be 4 bytes (pcrel) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - desc.delayslots = 1; - break; - case 0xed: // frame - desc.regin[0] |= SR_CODE; - desc.regin[1] = 0xffffffff; - desc.regin[2] = 0xffffffff; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE; - break; - case 0xee: // call global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - break; - case 0xef: // call local - desc.regin[0] |= SR_CODE; - desc.regin[lsrc_group] |= 1 << lsrc_code; - desc.regout[ldst_group] |= 1 << ldst_code; - desc.regout[ldstf_group] |= 1 << ldstf_code; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - break; - case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne - case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht - case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt - decode_pcrel(desc, op); - desc.regin[0] |= SR_CODE; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; - break; - case 0xfc: // br - desc.targetpc = (desc.pc + 2) + decode_pcrel(desc, op); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - break; - case 0xfd: case 0xfe: case 0xff: // trap - desc.regin[0] |= SR_CODE; - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; - break; - } - return true; -} diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h deleted file mode 100644 index 7463fd964d0..00000000000 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ /dev/null @@ -1,34 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -#ifndef MAME_CPU_E132XS_E132XSFE_H -#define MAME_CPU_E132XS_E132XSFE_H - -#pragma once - -#include "e132xs.h" -#include "cpu/drcfe.h" - -class e132xs_frontend : public drc_frontend -{ -public: - e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - void flush(); - -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; - -private: - inline uint32_t imm_length(opcode_desc &desc, uint16_t op); - inline uint16_t read_word(opcode_desc &desc); - inline uint16_t read_imm1(opcode_desc &desc); - inline uint16_t read_imm2(opcode_desc &desc); - inline uint32_t read_ldstxx_imm(opcode_desc &desc); - inline uint32_t read_limm(opcode_desc &desc, uint16_t op); - inline int32_t decode_pcrel(opcode_desc &desc, uint16_t op); - inline int32_t decode_call(opcode_desc &desc); - - hyperstone_device *m_cpu; -}; - -#endif /* MAME_CPU_E132XS_E132XSFE_H */ -- cgit v1.2.3-70-g09d2 From 036e4cfc181978b8aaad63c873bf2ad431d10932 Mon Sep 17 00:00:00 2001 From: andreasnaive Date: Wed, 6 Dec 2017 22:08:34 +0100 Subject: igs036crypt.cpp: Updates to support kof98umh. [Andreas Naive] --- src/mame/machine/igs036crypt.cpp | 106 ++++++++++++++++++++------------------- 1 file changed, 55 insertions(+), 51 deletions(-) diff --git a/src/mame/machine/igs036crypt.cpp b/src/mame/machine/igs036crypt.cpp index cc88b85273e..574f4345ebd 100644 --- a/src/mame/machine/igs036crypt.cpp +++ b/src/mame/machine/igs036crypt.cpp @@ -16,14 +16,17 @@ The scheme works on 16-bits words and is probably designed to depend on 24 bits lowest bits of the address, and the other 16 as the highest bits the address. The address-based XOR is thought to be comprised of 16 one-bit XOR controlled -by a certain combination of one or two of the highest address bits (but only -15 of them are observed, probably due to the fact that no game uses more than -2^22 of the 2^24 address space). Every one of the one-bit XORs affects a different bit -of the word. The game key acts by masking on/off those XORs for every combination -of the lowest address bits. Thus, a complete key can be described by 256 16-bits values. -This use of the key is pretty similar to the one found in previous instantiations of +by a certain combination of one or two of the highest address bits. Every one of +the one-bit XORs affects a different bit of the word. The game key is comprised of +256 8-bits values provided by the internal ARM, and acts by masking on/off those XORs; +every 8-bit value in the key affect those words whose address match the index modulus 256; +every bit in a given key byte, affects two positions of the correponding 16-bits +encrypted words, in conjunction with the lowest bits of the address. +This use of the key is similar to the one found in previous instantiations of IGS circuits. +TO-DO (2017-12-06): change the current implementation to match the real keys. + What is new in the IGS036 is the use of an obfuscation working this way: 1) The highest bits of the address are split in 4 groups, every of which controls @@ -39,12 +42,11 @@ three by inverting (when active itself) the activation/deactivation patterns of the other three. 5) The lowest bits of the address control a further rotation(independent on the highest bits of the address). -6) Besides, a global bitswap is present (which can be considered either part of the -obfuscation or of the encryption, as is done in the interface between both). +6) Finally, a global bitswap is applied. All the associated boolean functions are clearly of low complexity, so it should be expected that the hardware is calculating them that way rather than using -lookup tables or otherwise. It must be stressed that this obfuscation is done +lookup tables or otherwise. It should be stressed that this obfuscation is done system-wide without dependence on the game keys. On a different note, the unused tail of the ROMs are pattern-filled and, more interestingly, @@ -56,6 +58,7 @@ driver 20-bytes value position in the ROM orleg2o $763984-$763997 orleg2 $76C77C-$76C78F kov3 $718040-$718053 +kof98umh $E50E60-$E50E73 TO-DO: complete the table with the 20-bytes values @@ -107,7 +110,7 @@ uint16_t igs036_decryptor::deobfuscate(uint16_t cipherword, int word_address)con int igs036_decryptor::rotation(int address)const { const int group15[] = {15,11, 7, 5}; // 15 is a guess - const int group14[] = {14, 9, 3, 2}; // 14 is a guess + const int group14[] = {14, 9, 3, 2}; const int group13[] = {13,10, 6, 1}; const int group12[] = {12, 8, 4, 0}; @@ -169,7 +172,7 @@ uint16_t igs036_decryptor::rol(uint16_t num, int shift)const const uint16_t igs036_decryptor::triggers[16][2] = { {0x0001, 0x0000}, {0x0008, 0x0008}, {0x0002, 0x0000}, {0x0004, 0x0004}, {0x0100, 0x0000}, {0x0200, 0x0000}, {0x0400, 0x0000}, {0x0800, 0x0800}, - {0x1001, 0x0001}, {0x2002, 0x2000}, {0x4004, 0x4000}, {0x8008, 0x0000}, // (the one at index #10 is a guess; his effect is not observed in any game) + {0x1001, 0x0001}, {0x2002, 0x2000}, {0x4004, 0x4000}, {0x8008, 0x0000}, {0x0010, 0x0010}, {0x0020, 0x0020}, {0x0040, 0x0000}, {0x0081, 0x0081} }; @@ -217,7 +220,7 @@ int (*igs036_decryptor::rot_enabling[16][4])(int) = { {nor_34 , bit_7 , not_7 , cOne }, {bit_3 , not_3 , bit_3 , not_3 }, {cZero , cOne , cOne , cZero }, - {unknown, unknown, unknown, unknown}, + {bit_4 , not_4 , bit_4 , not_4 }, {unknown, unknown, unknown, unknown}, }; @@ -233,7 +236,7 @@ int (*igs036_decryptor::rot_direction[4][8])(int) = { // The keys below have been obtained by an automatic process // exploiting the simple XOR scheme used by the system. Overall, the process, // while simple, seems to be pretty robust, so few errors should be expected, -// if any. The only exception is DDPDOJ (see below). +// if any. The exceptions are DDPDOJ & KOF98UMH (see below). const uint16_t orleg2_key[0x100] = { 0x8100, 0x9202, 0x3000, 0x1200, 0x0100, 0x0800, 0x2100, 0xab05, @@ -445,10 +448,10 @@ const uint16_t kov2_key[0x100] = { 0xd0d0, 0x8383, 0x4260, 0xd1f1, 0x023e, 0x4a5e, 0x0230, 0xcbcd, }; -// DDPDOJ caused lots of problems to the automatic recovery process, -// so it have needed a good amount of manual examination. It is much -// more probable for this key to still contain errors than for the -// other ones. +// DDPDOJ & KOF98UMH caused lots of problems to the automatic recovery +// process, so they have needed a good amount of manual examination. +// It is much more probable for these keys to still contain errors +// than for the other ones. const uint16_t ddpdoj_key[0x100] = { 0xb102, 0x8802, 0x0000, 0x9101, 0x2004, 0xa105, 0x0000, 0x8905, @@ -488,39 +491,40 @@ const uint16_t ddpdoj_key[0x100] = { 0x103a, 0xc9e9, 0x1118, 0x1111, 0x404e, 0x8898, 0x0024, 0x0020, }; -// WRONG - const uint16_t kof98umh_key[0x100] = { - 0x9202, 0x0000, 0x0220, 0x3b01, 0x2004, 0x00a0, 0x0000, 0x0905, - 0x830a, 0x8000, 0x8228, 0xa20a, 0x8206, 0x0000, 0x0020, 0x8808, - 0x9212, 0x0800, 0x0000, 0x0301, 0x0020, 0x0a02, 0x0000, 0x0105, - 0x020a, 0x0000, 0x0000, 0x1111, 0x021a, 0x0121, 0x0000, 0x8111, - 0x8020, 0x0802, 0xb120, 0xb901, 0x8326, 0x0800, 0x0000, 0xa101, - 0x922a, 0x0000, 0x1200, 0x9022, 0x0128, 0x0800, 0x0020, 0xaa0c, - 0x0202, 0x0800, 0x8000, 0x1b31, 0x8024, 0x8804, 0x0000, 0x8111, - 0x8120, 0x8000, 0x0080, 0x9030, 0x032e, 0x083c, 0x0000, 0x893d, - 0xe342, 0x0800, 0x0120, 0x7b41, 0xa000, 0x00a0, 0x0000, 0x4141, - 0x130a, 0x0000, 0x8320, 0xdb49, 0x010c, 0x0000, 0x0020, 0xc84c, - 0x0202, 0x0000, 0x0000, 0x1911, 0x0014, 0x0b13, 0x0000, 0x8a10, - 0x434a, 0x0020, 0x0000, 0x5250, 0xc050, 0x0034, 0x0000, 0xc355, - 0x7242, 0x0002, 0x9000, 0xcb61, 0x8120, 0x0020, 0x0000, 0x0921, - 0x4068, 0x0000, 0x6068, 0x922a, 0xc36e, 0x0020, 0x0020, 0x280c, - 0x0322, 0x0800, 0x8020, 0x9810, 0xc060, 0x4b73, 0x0000, 0x4870, - 0xd050, 0x0020, 0x0000, 0x1b39, 0xc26e, 0x0121, 0x0000, 0x4375, - 0x2202, 0x0000, 0x0120, 0xb0a0, 0x2202, 0x2020, 0x2000, 0x8280, - 0x838a, 0x0080, 0x81a0, 0xb082, 0x2004, 0x0000, 0x0020, 0xa385, - 0x8080, 0x0080, 0x0000, 0x9191, 0x80a0, 0x0004, 0x0000, 0x8280, - 0x9098, 0x0020, 0x0080, 0x0808, 0x030e, 0x0337, 0x0000, 0x8290, - 0xb382, 0x0002, 0x0000, 0x1220, 0x2004, 0x0000, 0x0080, 0x2301, - 0x81a8, 0x0000, 0x0228, 0x1121, 0x230a, 0x2000, 0x0000, 0x80a0, - 0x1232, 0x0020, 0x0020, 0x9b91, 0x0114, 0x8185, 0x0080, 0x0010, - 0x82aa, 0x0000, 0x0080, 0x98b8, 0x0226, 0x0a2e, 0x0000, 0x80b4, - 0x1100, 0x0000, 0xa1a0, 0xf2e0, 0x6144, 0x0020, 0x0000, 0x4145, - 0x1108, 0x0000, 0xb280, 0x9a8a, 0xa084, 0x0000, 0x0020, 0x4044, - 0x9190, 0x0000, 0x0000, 0x0a00, 0x4266, 0x0814, 0x0080, 0x8b91, - 0x434a, 0x00a0, 0x0080, 0x0808, 0x4352, 0x83a3, 0x0000, 0xc3c5, - 0x3302, 0x0002, 0xd1c0, 0xf3c1, 0xa080, 0x00a0, 0x0000, 0x0b25, - 0x0128, 0x0000, 0xb288, 0x3b09, 0x200c, 0x2000, 0x0020, 0xeac8, - 0xd1f0, 0x0000, 0x0020, 0x83a1, 0xc3f2, 0xc8d0, 0x0000, 0x8b91, - 0x5272, 0x0080, 0x0000, 0x0b29, 0x4376, 0x0828, 0x0000, 0x8ab8, + 0x9202, 0x8f03, 0x0200, 0x3f01, 0x2404, 0x8901, 0x2000, 0x0d05, + 0x870a, 0xae0a, 0x8608, 0xaa08, 0x8606, 0x2606, 0x850c, 0x8808, + 0x9212, 0x9810, 0x8400, 0x0701, 0x0000, 0x0a02, 0x0714, 0x0505, + 0x060a, 0x1313, 0x8600, 0x1511, 0x021a, 0x0101, 0x8018, 0x8111, + 0x8420, 0x9020, 0xb100, 0xbd01, 0x8726, 0x8c24, 0xa404, 0xa101, + 0x922a, 0x1929, 0x1620, 0x9020, 0x0128, 0x2c0c, 0x250c, 0xae0c, + 0x0202, 0x9b13, 0x9730, 0x1b31, 0x8404, 0x8c04, 0x8310, 0x8111, + 0x8120, 0x9939, 0x9038, 0x9030, 0x072e, 0x0c1c, 0x8624, 0x8d3d, + + 0xe342, 0xa901, 0x0100, 0x7b41, 0xa000, 0x8901, 0xa604, 0x4141, + 0x130a, 0x7242, 0x8300, 0xdf49, 0x050c, 0x4545, 0x444c, 0xcc4c, + 0x0602, 0x1410, 0x4740, 0x1911, 0x0414, 0x0b13, 0xc454, 0x8a10, + 0x474a, 0xc040, 0x4348, 0x5250, 0xc050, 0x0414, 0xc444, 0xc755, + 0x7242, 0xec40, 0x9020, 0xcf61, 0x8120, 0xe040, 0x2404, 0x0921, + 0x4468, 0x3000, 0x6048, 0x9a28, 0xc76e, 0x0222, 0xe644, 0x2c0c, + 0x0722, 0x1b13, 0x8220, 0x9810, 0xc040, 0x4b73, 0x4664, 0x4870, + 0xd050, 0x0f0b, 0x1530, 0x1b39, 0xc66e, 0x0101, 0x8108, 0x4775, + + 0x2202, 0x8181, 0x0500, 0xb080, 0x2202, 0x2303, 0x2404, 0x8280, + 0x838a, 0xba8a, 0x8580, 0xb080, 0x2404, 0x8181, 0x2404, 0xa785, + 0x8480, 0x8981, 0x9790, 0x9191, 0x8080, 0x0404, 0x0100, 0x8280, + 0x9498, 0x1e1a, 0x8688, 0x0c08, 0x070e, 0x0717, 0x050c, 0x8290, + 0xb382, 0x3000, 0x0020, 0x1620, 0x2404, 0x0323, 0x80a0, 0x2301, + 0x81a8, 0x98a8, 0x0228, 0x1121, 0x230a, 0xa585, 0x85ac, 0x80a0, + 0x1632, 0x84a0, 0x1630, 0x9b91, 0x0514, 0x8585, 0x0130, 0x0010, + 0x82aa, 0x1511, 0x90b0, 0x9cb8, 0x0626, 0x0e0e, 0x0128, 0x84b4, + + 0x1500, 0x9181, 0xa180, 0xfac0, 0x6544, 0x0800, 0x6644, 0x4545, + 0x1508, 0x7242, 0xb680, 0x9e88, 0xa484, 0xe6c6, 0x6148, 0x4444, + 0x9590, 0x1511, 0x4440, 0x0e00, 0x4646, 0x0c14, 0xc7d4, 0x8b91, + 0x434a, 0x8c88, 0xd5d0, 0x0c08, 0x4352, 0x8383, 0x4350, 0xc7c5, + 0x3702, 0xdce0, 0xd1e0, 0xf3c1, 0xa080, 0xefc7, 0x6140, 0x0f25, + 0x0128, 0x90a0, 0xb688, 0x3f09, 0x240c, 0x2303, 0x6040, 0xeac8, + 0xd1f0, 0x5450, 0xd3f0, 0x83a1, 0xc3f2, 0xc8d0, 0x4574, 0x8b91, + 0x5672, 0x9b9b, 0x0628, 0x0b29, 0x4776, 0x0808, 0x0504, 0x8ab8, }; -- cgit v1.2.3-70-g09d2 From 86a678807b1961607d354c90e7d0f724fca3e2af Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 6 Dec 2017 22:13:36 +0000 Subject: pgm2: kof98umh - add sprite mask decode xors (nw) --- src/mame/drivers/pgm2.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index d52725558b4..df4f674fd22 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -836,8 +836,8 @@ DRIVER_INIT_MEMBER(pgm2_state,kof98umh) { uint16_t *src = (uint16_t *)memregion("sprites_mask")->base(); - iga_u12_decode(src, 0x08000000, 0x1e96); // wrong - iga_u16_decode(src, 0x08000000, 0x869c); // wrong + iga_u12_decode(src, 0x08000000, 0x21df); + iga_u16_decode(src, 0x08000000, 0x8692); src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x20000000); -- cgit v1.2.3-70-g09d2 From ff7410929df6588c712e10b76167d8cf04c16ce4 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 6 Dec 2017 17:37:59 -0500 Subject: ticket.cpp: Eliminate legacy read method (nw) --- src/mame/drivers/capbowl.cpp | 4 ++-- src/mame/drivers/subsino2.cpp | 2 +- src/mame/machine/ticket.cpp | 14 +------------- src/mame/machine/ticket.h | 1 - 4 files changed, 4 insertions(+), 17 deletions(-) diff --git a/src/mame/drivers/capbowl.cpp b/src/mame/drivers/capbowl.cpp index ed82dc96aff..4df238be4f8 100644 --- a/src/mame/drivers/capbowl.cpp +++ b/src/mame/drivers/capbowl.cpp @@ -350,8 +350,8 @@ static MACHINE_CONFIG_START( capbowl ) MCFG_SOUND_ADD("ymsnd", YM2203, MASTER_CLOCK/2) MCFG_YM2203_IRQ_HANDLER(INPUTLINE("audiocpu", M6809_FIRQ_LINE)) - MCFG_AY8910_PORT_A_READ_CB(DEVREAD8("ticket", ticket_dispenser_device, read)) - MCFG_AY8910_PORT_B_WRITE_CB(DEVWRITE8("ticket", ticket_dispenser_device, write)) /* Also a status LED. See memory map above */ + MCFG_AY8910_PORT_A_READ_CB(DEVREADLINE("ticket", ticket_dispenser_device, line_r)) MCFG_DEVCB_BIT(7) + MCFG_AY8910_PORT_B_WRITE_CB(DEVWRITELINE("ticket", ticket_dispenser_device, motor_w)) MCFG_DEVCB_BIT(7) /* Also a status LED. See memory map above */ MCFG_SOUND_ROUTE(0, "speaker", 0.07) MCFG_SOUND_ROUTE(1, "speaker", 0.07) MCFG_SOUND_ROUTE(2, "speaker", 0.07) diff --git a/src/mame/drivers/subsino2.cpp b/src/mame/drivers/subsino2.cpp index 02ea918099b..6c851623618 100644 --- a/src/mame/drivers/subsino2.cpp +++ b/src/mame/drivers/subsino2.cpp @@ -873,7 +873,7 @@ READ16_MEMBER(subsino2_state::bishjan_input_r) return (res << 8) | // high byte ioport("SYSTEM")->read() | // low byte - (machine().device("hopper")->read(space, 0) ? 0x00 : 0x04) // bit 2: hopper sensor + (machine().device("hopper")->line_r() ? 0x00 : 0x04) // bit 2: hopper sensor ; } diff --git a/src/mame/machine/ticket.cpp b/src/mame/machine/ticket.cpp index bb7c4481f98..ab0cda56ace 100644 --- a/src/mame/machine/ticket.cpp +++ b/src/mame/machine/ticket.cpp @@ -99,19 +99,7 @@ void ticket_dispenser_device::static_set_senses(device_t &device, uint8_t motor_ //************************************************************************** //------------------------------------------------- -// read - read the status line via the active bit -// (legacy method) -//------------------------------------------------- - -READ8_MEMBER( ticket_dispenser_device::read ) -{ - LOG(("%s: Ticket Status Read = %02X\n", machine().describe_context(), m_status)); - return m_status; -} - - -//------------------------------------------------- -// line_r - read the status line as a proper line +// line_r - read the status line //------------------------------------------------- READ_LINE_MEMBER( ticket_dispenser_device::line_r ) diff --git a/src/mame/machine/ticket.h b/src/mame/machine/ticket.h index 929085fe5b9..769e4c83f01 100644 --- a/src/mame/machine/ticket.h +++ b/src/mame/machine/ticket.h @@ -67,7 +67,6 @@ public: static void static_set_senses(device_t &device, uint8_t motor_sense, uint8_t status_sense, bool hopper_type); // read/write handlers - DECLARE_READ8_MEMBER( read ); DECLARE_READ_LINE_MEMBER( line_r ); DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE_LINE_MEMBER( motor_w ); -- cgit v1.2.3-70-g09d2 From 97528fb0d9fc53dc4a05e4c054a8a096b395c48b Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 6 Dec 2017 19:52:41 -0500 Subject: ticket.cpp: Eliminate legacy write method and "active bit" nonsense (nw) --- src/mame/drivers/aristmk5.cpp | 4 ++-- src/mame/drivers/astrcorp.cpp | 30 +++++++++++++++++------------- src/mame/drivers/big10.cpp | 2 +- src/mame/drivers/bmcpokr.cpp | 6 +++--- src/mame/drivers/champbwl.cpp | 10 ++++++---- src/mame/drivers/cischeat.cpp | 2 +- src/mame/drivers/dcheese.cpp | 4 +++- src/mame/drivers/funtech.cpp | 2 +- src/mame/drivers/gei.cpp | 4 ++-- src/mame/drivers/goldstar.cpp | 2 +- src/mame/drivers/igs017.cpp | 2 +- src/mame/drivers/itech32.cpp | 15 +++++++-------- src/mame/drivers/itech8.cpp | 8 ++++---- src/mame/drivers/kurukuru.cpp | 8 ++++---- src/mame/drivers/lethalj.cpp | 26 +++++++++++++------------- src/mame/drivers/mgavegas.cpp | 4 +--- src/mame/drivers/midas.cpp | 14 +++++++++----- src/mame/drivers/mjsenpu.cpp | 2 +- src/mame/drivers/playmark.cpp | 15 ++++++--------- src/mame/drivers/seta.cpp | 2 +- src/mame/drivers/seta2.cpp | 2 +- src/mame/drivers/sigmab98.cpp | 18 ++++++++++++------ src/mame/drivers/subsino.cpp | 2 +- src/mame/drivers/subsino2.cpp | 10 ++++++---- src/mame/drivers/tickee.cpp | 6 ++++-- src/mame/drivers/toaplan2.cpp | 2 +- src/mame/drivers/tonton.cpp | 11 ++++++++--- src/mame/drivers/wacky_gator.cpp | 2 +- src/mame/drivers/williams.cpp | 2 +- src/mame/drivers/xtheball.cpp | 4 +++- src/mame/includes/itech32.h | 3 +++ src/mame/includes/playmark.h | 7 ++++++- src/mame/machine/ticket.cpp | 35 +++++++++++------------------------ src/mame/machine/ticket.h | 12 +++++------- 34 files changed, 147 insertions(+), 131 deletions(-) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index e1d054a5b50..377088e535a 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -706,7 +706,7 @@ READ8_MEMBER(aristmk5_state::eeprom_r) WRITE8_MEMBER(aristmk5_state::hopper_w) { - m_hopper->write(space, 0, (data & 0x02) ? 0x80 : 0); + m_hopper->motor_w(BIT(data, 1)); m_hopper_test = BIT(data, 2); } @@ -741,7 +741,7 @@ WRITE8_MEMBER(aristmk5_state::eeprom_w) WRITE8_MEMBER(aristmk5_state::eeprom_usa_w) { eeprom_w(space, offset, data, mem_mask); - m_hopper->write(space, 0, (data & 0x04) ? 0x80 : 0); + m_hopper->motor_w(BIT(data, 2)); } READ8_MEMBER(aristmk5_state::ldor_r) diff --git a/src/mame/drivers/astrcorp.cpp b/src/mame/drivers/astrcorp.cpp index addf0b57921..680600f8997 100644 --- a/src/mame/drivers/astrcorp.cpp +++ b/src/mame/drivers/astrcorp.cpp @@ -57,6 +57,8 @@ public: m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), m_palette(*this, "palette"), + m_hopper(*this, "hopper"), + m_ticket(*this, "ticket"), m_spriteram(*this, "spriteram") { } @@ -66,6 +68,8 @@ public: required_device m_gfxdecode; required_device m_screen; required_device m_palette; + optional_device m_hopper; + optional_device m_ticket; // memory pointers required_shared_ptr m_spriteram; @@ -263,23 +267,23 @@ WRITE16_MEMBER(astrocorp_state::skilldrp_outputs_w) if (ACCESSING_BITS_0_7) { - machine().bookkeeping().coin_counter_w(0, (data & 0x0001)); // key in | - machine().bookkeeping().coin_counter_w(0, (data & 0x0002)); // coin in |- manual shows 1 in- and 1 out- counter - machine().bookkeeping().coin_counter_w(1, (data & 0x0004)); // key out | - machine().device("hopper")->write(space, 0, (data & 0x0008)<<4); // hopper motor? - // (data & 0x0010) // hopper? - output().set_led_value(0, (data & 0x0020)); // error lamp (coin/hopper jam: "call attendant") - machine().device("ticket")->write(space, 0, data & 0x0080); // ticket motor? + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); // key in | + machine().bookkeeping().coin_counter_w(0, BIT(data, 1)); // coin in |- manual shows 1 in- and 1 out- counter + machine().bookkeeping().coin_counter_w(1, BIT(data, 2)); // key out | + m_hopper->motor_w(BIT(data, 3)); // hopper motor? + // BIT(data, 4) // hopper? + output().set_led_value(0, BIT(data, 5)); // error lamp (coin/hopper jam: "call attendant") + m_ticket->motor_w(BIT(data, 7)); // ticket motor? } if (ACCESSING_BITS_8_15) { // lamps: - output().set_led_value(1, (data & 0x0100)); // select - output().set_led_value(2, (data & 0x0400)); // take - output().set_led_value(3, (data & 0x0800)); // bet - output().set_led_value(4, (data & 0x1000)); // start - output().set_led_value(5, (data & 0x4000)); // win / test - output().set_led_value(6, (data & 0x8000)); // ticket? + output().set_led_value(1, BIT(data, 8)); // select + output().set_led_value(2, BIT(data, 10)); // take + output().set_led_value(3, BIT(data, 11)); // bet + output().set_led_value(4, BIT(data, 12)); // start + output().set_led_value(5, BIT(data, 14)); // win / test + output().set_led_value(6, BIT(data, 15)); // ticket? } // popmessage("%04X",data); diff --git a/src/mame/drivers/big10.cpp b/src/mame/drivers/big10.cpp index 230ff204f7d..e52df91acfb 100644 --- a/src/mame/drivers/big10.cpp +++ b/src/mame/drivers/big10.cpp @@ -97,7 +97,7 @@ public: WRITE8_MEMBER(big10_state::mux_w) { m_mux_data = ~data; - m_hopper->write(space, 0, (data & 0x40) << 1); + m_hopper->motor_w(BIT(data, 6)); machine().output().set_lamp_value(1, BIT(~data, 7)); // maybe a coin counter? } diff --git a/src/mame/drivers/bmcpokr.cpp b/src/mame/drivers/bmcpokr.cpp index 4a0a644c07c..ea5d9a8e4a6 100644 --- a/src/mame/drivers/bmcpokr.cpp +++ b/src/mame/drivers/bmcpokr.cpp @@ -329,9 +329,9 @@ WRITE16_MEMBER(bmcpokr_state::mux_w) COMBINE_DATA(&m_mux); if (ACCESSING_BITS_0_7) { - m_hopper->write(space, 0, (data & 0x0001) ? 0x80 : 0x00); // hopper motor - machine().bookkeeping().coin_counter_w(1, data & 0x0002); // coin-in / key-in - machine().bookkeeping().coin_counter_w(2, data & 0x0004); // pay-out + m_hopper->motor_w(BIT(data, 0)); // hopper motor + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); // coin-in / key-in + machine().bookkeeping().coin_counter_w(2, BIT(data, 2)); // pay-out // data & 0x0060 // DSW mux // data & 0x0080 // ? always on } diff --git a/src/mame/drivers/champbwl.cpp b/src/mame/drivers/champbwl.cpp index e0795918195..94c8e54429f 100644 --- a/src/mame/drivers/champbwl.cpp +++ b/src/mame/drivers/champbwl.cpp @@ -170,6 +170,7 @@ public: m_seta001(*this, "spritegen"), m_palette(*this, "palette"), m_x1(*this, "x1snd"), + m_hopper(*this, "hopper"), m_fakex(*this, "FAKEX"), m_fakey(*this, "FAKEY") { } @@ -179,6 +180,7 @@ public: required_device m_seta001; required_device m_palette; required_device m_x1; + optional_device m_hopper; optional_ioport m_fakex; optional_ioport m_fakey; @@ -271,11 +273,11 @@ ADDRESS_MAP_END WRITE8_MEMBER(champbwl_state::doraemon_outputs_w) { - machine().bookkeeping().coin_counter_w(0, data & 1); // coin in counter - machine().bookkeeping().coin_counter_w(1, data & 2); // gift out counter + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); // coin in counter + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); // gift out counter - machine().bookkeeping().coin_lockout_w(0, ~data & 8); // coin lockout - machine().device("hopper")->write(space, 0, (data & 0x04) ? 0x00 : 0x80); // gift out motor + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 3)); // coin lockout + m_hopper->motor_w(BIT(~data, 2)); // gift out motor membank("bank1")->set_entry((data & 0x30) >> 4); diff --git a/src/mame/drivers/cischeat.cpp b/src/mame/drivers/cischeat.cpp index 8fe886141c7..392a8c397e7 100644 --- a/src/mame/drivers/cischeat.cpp +++ b/src/mame/drivers/cischeat.cpp @@ -692,7 +692,7 @@ WRITE16_MEMBER(cischeat_state::captflag_leds_w) output().set_led_value(1, data & 0x2000); // select int power = (data & 0x1000); - m_captflag_hopper->write(space, 0, power ? 0x80 : 0x00); // prize motor + m_captflag_hopper->motor_w(power ? 1 : 0); // prize motor if (!power) m_captflag_hopper->reset(); } diff --git a/src/mame/drivers/dcheese.cpp b/src/mame/drivers/dcheese.cpp index b31ee921a25..adc477ee864 100644 --- a/src/mame/drivers/dcheese.cpp +++ b/src/mame/drivers/dcheese.cpp @@ -119,7 +119,6 @@ WRITE16_MEMBER(dcheese_state::eeprom_control_w) if (ACCESSING_BITS_0_7) { ioport("EEPROMOUT")->write(data, 0xff); - machine().device("ticket")->write(space, 0, (data & 1) << 7); } } @@ -257,6 +256,7 @@ static INPUT_PORTS_START( dcheese ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START( "EEPROMOUT" ) + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, motor_w) PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, di_write) PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, clk_write) PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write) @@ -305,6 +305,7 @@ static INPUT_PORTS_START( lottof2 ) PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START( "EEPROMOUT" ) + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, motor_w) PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, di_write) PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, clk_write) PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write) @@ -355,6 +356,7 @@ static INPUT_PORTS_START( fredmem ) PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START( "EEPROMOUT" ) + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, motor_w) PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, di_write) PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, clk_write) PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, cs_write) diff --git a/src/mame/drivers/funtech.cpp b/src/mame/drivers/funtech.cpp index 1ecd23625dd..e780b38df9f 100644 --- a/src/mame/drivers/funtech.cpp +++ b/src/mame/drivers/funtech.cpp @@ -280,7 +280,7 @@ WRITE8_MEMBER(fun_tech_corp_state::funtech_coins_w) if (data & 0x01) printf("funtech_coins_w %02x\n", data); // 80 = hopper motor? - m_hopper->write(space, 0, data & 0x80); + m_hopper->motor_w(BIT(data, 7)); // 40 = ? sometimes diff --git a/src/mame/drivers/gei.cpp b/src/mame/drivers/gei.cpp index 28c2ffbc11e..87186cd4c6b 100644 --- a/src/mame/drivers/gei.cpp +++ b/src/mame/drivers/gei.cpp @@ -212,8 +212,8 @@ WRITE8_MEMBER(gei_state::sound_w) output().set_led_value(9, BIT(data, 3)); /* bit 5 - ticket out in trivia games */ - if (m_ticket != nullptr) - m_ticket->write(machine().dummy_space(), 0, (data & 0x20) << 2); + if (m_ticket.found()) + m_ticket->motor_w(BIT(data, 5)); /* bit 6 enables NMI */ m_nmi_mask = data & 0x40; diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp index 358bbd6f7be..046830f919f 100644 --- a/src/mame/drivers/goldstar.cpp +++ b/src/mame/drivers/goldstar.cpp @@ -1144,7 +1144,7 @@ WRITE8_MEMBER(unkch_state::coincount_w) */ - m_ticket_dispenser->write(space, offset, data & 0x80); + m_ticket_dispenser->motor_w(BIT(data, 7)); machine().bookkeeping().coin_counter_w(0, data & 0x04); /* Credit counter */ machine().bookkeeping().coin_counter_w(1, data & 0x08); /* Key In counter */ diff --git a/src/mame/drivers/igs017.cpp b/src/mame/drivers/igs017.cpp index 976d5d4fb0a..f88b3511c7e 100644 --- a/src/mame/drivers/igs017.cpp +++ b/src/mame/drivers/igs017.cpp @@ -1337,7 +1337,7 @@ WRITE16_MEMBER(igs017_state::mgcs_magic_w) // ---- ---0 Hopper Motor m_input_select = data & 0xff; - m_hopperdev->write(space, 0, (data & 0x0001) ? 0x80 : 0x00); + m_hopperdev->motor_w(BIT(data, 0)); if (igs029_irq) { diff --git a/src/mame/drivers/itech32.cpp b/src/mame/drivers/itech32.cpp index f2033c0dedd..505d4751d03 100644 --- a/src/mame/drivers/itech32.cpp +++ b/src/mame/drivers/itech32.cpp @@ -359,7 +359,6 @@ Notes: #include "cpu/tms32031/tms32031.h" #include "machine/6522via.h" #include "machine/nvram.h" -#include "machine/ticket.h" #include "machine/timekpr.h" #include "machine/watchdog.h" #include "sound/es5506.h" @@ -739,11 +738,11 @@ WRITE8_MEMBER(itech32_state::drivedge_portb_out) /* bit 4 controls the ticket dispenser */ /* bit 5 controls the coin counter */ /* bit 6 controls the diagnostic sound LED */ - output().set_led_value(1, data & 0x01); - output().set_led_value(2, data & 0x02); - output().set_led_value(3, data & 0x04); - machine().device("ticket")->write(machine().dummy_space(), 0, (data & 0x10) << 3); - machine().bookkeeping().coin_counter_w(0, (data & 0x20) >> 5); + output().set_led_value(1, BIT(data, 0)); + output().set_led_value(2, BIT(data, 1)); + output().set_led_value(3, BIT(data, 2)); + m_ticket->motor_w(BIT(data, 4)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 5)); } @@ -760,8 +759,8 @@ WRITE8_MEMBER(itech32_state::pia_portb_out) /* bit 4 controls the ticket dispenser */ /* bit 5 controls the coin counter */ /* bit 6 controls the diagnostic sound LED */ - machine().device("ticket")->write(machine().dummy_space(), 0, (data & 0x10) << 3); - machine().bookkeeping().coin_counter_w(0, (data & 0x20) >> 5); + m_ticket->motor_w(BIT(data, 4)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 5)); } diff --git a/src/mame/drivers/itech8.cpp b/src/mame/drivers/itech8.cpp index 646d3a34f63..d88579c3b80 100644 --- a/src/mame/drivers/itech8.cpp +++ b/src/mame/drivers/itech8.cpp @@ -748,8 +748,8 @@ WRITE8_MEMBER(itech8_state::pia_portb_out) /* bit 5 controls the coin counter */ /* bit 6 controls the diagnostic sound LED */ m_pia_portb_data = data; - m_ticket->write(space, 0, (data & 0x10) << 3); - machine().bookkeeping().coin_counter_w(0, (data & 0x20) >> 5); + m_ticket->motor_w(BIT(data, 4)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 5)); } @@ -762,8 +762,8 @@ WRITE8_MEMBER(itech8_state::ym2203_portb_out) /* bit 6 controls the diagnostic sound LED */ /* bit 7 controls the ticket dispenser */ m_pia_portb_data = data; - m_ticket->write(machine().dummy_space(), 0, data & 0x80); - machine().bookkeeping().coin_counter_w(0, (data & 0x20) >> 5); + m_ticket->motor_w(BIT(data, 7)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 5)); } diff --git a/src/mame/drivers/kurukuru.cpp b/src/mame/drivers/kurukuru.cpp index c77f1f20b4c..d9c774e9b76 100644 --- a/src/mame/drivers/kurukuru.cpp +++ b/src/mame/drivers/kurukuru.cpp @@ -491,10 +491,10 @@ WRITE8_MEMBER(kurukuru_state::kurukuru_out_latch_w) 07 | Not connected | unused */ - machine().bookkeeping().coin_counter_w(0, data & 0x01); /* Coin Counter 1 */ - machine().bookkeeping().coin_counter_w(1, data & 0x20); /* Coin Counter 2 */ - machine().bookkeeping().coin_lockout_global_w(data & 0x40); /* Coin Lock */ - m_hopper->write(space, 0, (data & 0x40) ? 0x80 : 0); /* Hopper Motor */ + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 5)); + //machine().bookkeeping().coin_lockout_global_w(BIT(data, 6)); + m_hopper->motor_w(BIT(data, 6)); if (data & 0x9e) logerror("kurukuru_out_latch_w %02X @ %04X\n", data, space.device().safe_pc()); diff --git a/src/mame/drivers/lethalj.cpp b/src/mame/drivers/lethalj.cpp index 46d4f812ada..5d233730c9f 100644 --- a/src/mame/drivers/lethalj.cpp +++ b/src/mame/drivers/lethalj.cpp @@ -176,29 +176,29 @@ CUSTOM_INPUT_MEMBER(lethalj_state::cclownz_paddle) WRITE16_MEMBER(lethalj_state::ripribit_control_w) { - machine().bookkeeping().coin_counter_w(0, data & 1); - m_ticket->write(space, 0, ((data >> 1) & 1) << 7); - output().set_lamp_value(0, (data >> 2) & 1); + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + m_ticket->motor_w(BIT(data, 1)); + output().set_lamp_value(0, BIT(data, 2)); } WRITE16_MEMBER(lethalj_state::cfarm_control_w) { - m_ticket->write(space, 0, ((data >> 0) & 1) << 7); - output().set_lamp_value(0, (data >> 2) & 1); - output().set_lamp_value(1, (data >> 3) & 1); - output().set_lamp_value(2, (data >> 4) & 1); - machine().bookkeeping().coin_counter_w(0, (data >> 7) & 1); + m_ticket->motor_w(BIT(data, 0)); + output().set_lamp_value(0, BIT(data, 2)); + output().set_lamp_value(1, BIT(data, 3)); + output().set_lamp_value(2, BIT(data, 4)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 7)); } WRITE16_MEMBER(lethalj_state::cclownz_control_w) { - m_ticket->write(space, 0, ((data >> 0) & 1) << 7); - output().set_lamp_value(0, (data >> 2) & 1); - output().set_lamp_value(1, (data >> 4) & 1); - output().set_lamp_value(2, (data >> 5) & 1); - machine().bookkeeping().coin_counter_w(0, (data >> 6) & 1); + m_ticket->motor_w(BIT(data, 0)); + output().set_lamp_value(0, BIT(data, 2)); + output().set_lamp_value(1, BIT(data, 4)); + output().set_lamp_value(2, BIT(data, 5)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); } diff --git a/src/mame/drivers/mgavegas.cpp b/src/mame/drivers/mgavegas.cpp index 5f773e736b7..17025cb4b38 100644 --- a/src/mame/drivers/mgavegas.cpp +++ b/src/mame/drivers/mgavegas.cpp @@ -357,7 +357,6 @@ WRITE8_MEMBER(mgavegas_state::csoki_w) WRITE8_MEMBER(mgavegas_state::cso1_w) { - int hopper_data = 0x00; if (LOG_CSO1) logerror("write to CSO1 data = %02X\n",data); @@ -372,8 +371,7 @@ WRITE8_MEMBER(mgavegas_state::cso1_w) update_custom(); - hopper_data=(m_hop&0x01)<<7; - m_ticket->write(machine().dummy_space(), 0, hopper_data); + m_ticket->motor_w(m_hop); } WRITE8_MEMBER(mgavegas_state::cso2_w) diff --git a/src/mame/drivers/midas.cpp b/src/mame/drivers/midas.cpp index bb4139bb056..983e233dfb2 100644 --- a/src/mame/drivers/midas.cpp +++ b/src/mame/drivers/midas.cpp @@ -72,6 +72,8 @@ public: m_palette(*this, "palette"), m_sprgen(*this, "spritegen"), m_screen(*this, "screen"), + m_prize(*this, "prize%u", 1), + m_ticket(*this, "ticket"), m_zoomram(*this, "zoomtable") { } @@ -96,6 +98,8 @@ public: required_device m_palette; required_device m_sprgen; required_device m_screen; + optional_device_array m_prize; + optional_device m_ticket; required_shared_ptr m_zoomram; DECLARE_WRITE_LINE_MEMBER(screen_vblank_midas); @@ -237,8 +241,8 @@ WRITE16_MEMBER(midas_state::hammer_coin_w) { if (ACCESSING_BITS_0_7) { - machine().bookkeeping().coin_counter_w(0, data & 0x0001); - machine().bookkeeping().coin_counter_w(1, data & 0x0002); + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); } #ifdef MAME_DEBUG // popmessage("coin %04X", data); @@ -249,9 +253,9 @@ WRITE16_MEMBER(midas_state::hammer_motor_w) { if (ACCESSING_BITS_0_7) { - machine().device("prize1")->write(space, 0, (data & 0x0001) << 7); - machine().device("prize2")->write(space, 0, (data & 0x0002) << 6); - machine().device("ticket")->write(space, 0, (data & 0x0010) << 3); + m_prize[0]->motor_w(BIT(data, 0)); + m_prize[1]->motor_w(BIT(data, 1)); + m_ticket->motor_w(BIT(data, 4)); // data & 0x0080 ? } #ifdef MAME_DEBUG diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 3e423d318cf..c8bd3515590 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -158,7 +158,7 @@ WRITE8_MEMBER(mjsenpu_state::control_w) // bits 0x08 is used in the alt payout / hopper mode (see dipswitches) // 0x04 seem to be hopper/ticket related? different ones get used depending on the dips - m_hopper->write(space, 0, data & 0x04); + m_hopper->motor_w(data & 0x04); // bit 0x02 could be coin counter? machine().bookkeeping().coin_counter_w(0, data & 0x02 ); diff --git a/src/mame/drivers/playmark.cpp b/src/mame/drivers/playmark.cpp index 567965d00d1..7055e563d39 100644 --- a/src/mame/drivers/playmark.cpp +++ b/src/mame/drivers/playmark.cpp @@ -65,11 +65,8 @@ TODO: #include "cpu/m68000/m68000.h" #include "cpu/pic16c5x/pic16c5x.h" -#include "machine/eepromser.h" #include "machine/nvram.h" -#include "machine/ticket.h" #include "screen.h" -#include "sound/okim6295.h" #include "speaker.h" @@ -118,14 +115,14 @@ WRITE16_MEMBER(playmark_state::hotmind_coin_eeprom_w) if ((m_dispenser_latch & 0x80) == 0) m_dispenser_latch = 0; if (data & 0x10) { m_dispenser_latch |= ((data & 0x10) | 0x80); - machine().device("token")->write(space, 0, 0x80); + m_token->motor_w(1); } } else { m_dispenser_latch &= 0x7f; - machine().device("token")->write(space, 0, (m_dispenser_latch & 0x10) ? 0x80 : 0); + m_token->motor_w(BIT(m_dispenser_latch, 4)); } - machine().device("ticket")->write(space, 0, (data & 0x08) ? 0x80 : 0); + m_ticket->motor_w(BIT(data, 3)); machine().bookkeeping().coin_counter_w(0, data & 0x20); /* Coin In counter - transistor driven */ machine().bookkeeping().coin_counter_w(1, data & 0x40); /* Token/Ticket Out counter - transistor driven */ @@ -146,14 +143,14 @@ WRITE16_MEMBER(playmark_state::luckboomh_dispenser_w) if ((m_dispenser_latch & 0x80) == 0) m_dispenser_latch = 0; if (data & 0x10) { m_dispenser_latch |= ((data & 0x10) | 0x80); - machine().device("token")->write(space, 0, 0x80); + m_token->motor_w(1); } } else { m_dispenser_latch &= 0x7f; - machine().device("token")->write(space, 0, (m_dispenser_latch & 0x10) ? 0x80 : 0); + m_token->motor_w(BIT(m_dispenser_latch, 4)); } - machine().device("ticket")->write(space, 0, (data & 0x08) ? 0x80 : 0); + m_ticket->motor_w(BIT(data, 3)); machine().bookkeeping().coin_counter_w(0, data & 0x20); /* Coin In counter - transistor driven */ machine().bookkeeping().coin_counter_w(1, data & 0x40); /* Token/Ticket Out counter - transistor driven */ diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp index a18d62feeb3..3cab3c0194e 100644 --- a/src/mame/drivers/seta.cpp +++ b/src/mame/drivers/seta.cpp @@ -2445,7 +2445,7 @@ WRITE8_MEMBER(setaroul_state::pay_w) machine().bookkeeping().coin_counter_w(1, data & 0x20); // note in (meter 1 in input test, touch '2') // data & 0x40 // hopper lock-out (lock.o in input test, touch '8') // data & 0x80 // hopper motor (hop.h in input test, touch '0') - m_hopper->write(space, 0,(!(data & 0x40) && (data & 0x80)) ? 0x80 : 0x00); + m_hopper->motor_w((!(data & 0x40) && (data & 0x80)) ? 1 : 0); show_outputs(); } diff --git a/src/mame/drivers/seta2.cpp b/src/mame/drivers/seta2.cpp index 9bab6a5eaab..7da05a4fe57 100644 --- a/src/mame/drivers/seta2.cpp +++ b/src/mame/drivers/seta2.cpp @@ -424,7 +424,7 @@ WRITE16_MEMBER(seta2_state::reelquak_leds_w) } if (ACCESSING_BITS_8_15) { - machine().device("ticket")->write(space, 0, (data & 0x0100) >> 1); // ticket dispenser + machine().device("ticket")->motor_w(BIT(data, 8)); // ticket dispenser } // popmessage("LED %04X", data); diff --git a/src/mame/drivers/sigmab98.cpp b/src/mame/drivers/sigmab98.cpp index c26dcf49347..5f8259a8c2e 100644 --- a/src/mame/drivers/sigmab98.cpp +++ b/src/mame/drivers/sigmab98.cpp @@ -139,7 +139,10 @@ public: m_eeprom(*this, "eeprom"), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), - m_palette(*this, "palette") + m_palette(*this, "palette"), + m_hopper(*this, "hopper"), + m_hopper_small(*this, "hopper_small"), + m_hopper_large(*this, "hopper_large") { } required_device m_maincpu; @@ -154,6 +157,9 @@ public: std::vector m_paletteram; required_device m_screen; required_device m_palette; + optional_device m_hopper; + optional_device m_hopper_small; + optional_device m_hopper_large; std::unique_ptr m_sprite_bitmap; @@ -901,7 +907,7 @@ WRITE8_MEMBER(sigmab98_state::c6_w) // 02 hopper motor on (active low)? WRITE8_MEMBER(sigmab98_state::c8_w) { - machine().device("hopper")->write(space, 0, (!(data & 0x02) && (data & 0x01)) ? 0x00 : 0x80); + m_hopper->motor_w((!(data & 0x02) && (data & 0x01)) ? 0 : 1); m_c8 = data; show_outputs(); @@ -1216,7 +1222,7 @@ WRITE8_MEMBER(sigmab98_state::sammymdl_leds_w) // 01 hopper motor on (active low)? WRITE8_MEMBER(sigmab98_state::sammymdl_hopper_w) { - machine().device("hopper")->write(space, 0, (!(data & 0x01) && (data & 0x02)) ? 0x00 : 0x80); + m_hopper->motor_w((!(data & 0x01) && (data & 0x02)) ? 0 : 1); m_out[2] = data; show_3_outputs(); @@ -1226,7 +1232,7 @@ READ8_MEMBER(sigmab98_state::sammymdl_coin_hopper_r) { uint8_t ret = ioport("COIN")->read(); -// if ( !machine().device("hopper")->read(0) ) +// if ( !m_hopper->read(0) ) // ret &= ~0x01; return ret; @@ -1541,8 +1547,8 @@ WRITE8_MEMBER(sigmab98_state::gocowboy_leds_w) // 10 hopper enable? // 20 hopper motor on (active low)? - machine().device("hopper_small")->write(space, 0, (!(data & 0x20) && (data & 0x10)) ? 0x00 : 0x80); - machine().device("hopper_large")->write(space, 0, (!(data & 0x80) && (data & 0x40)) ? 0x00 : 0x80); + m_hopper_small->motor_w((!(data & 0x20) && (data & 0x10)) ? 0 : 1); + m_hopper_large->motor_w((!(data & 0x80) && (data & 0x40)) ? 0 : 1); m_out[1] = data; show_3_outputs(); diff --git a/src/mame/drivers/subsino.cpp b/src/mame/drivers/subsino.cpp index 4de5cf8ea5e..f76bc13a099 100644 --- a/src/mame/drivers/subsino.cpp +++ b/src/mame/drivers/subsino.cpp @@ -680,7 +680,7 @@ WRITE8_MEMBER(subsino_state::subsino_out_a_w) machine().bookkeeping().coin_counter_w(2, data & 0x10 ); /* keyout */ machine().bookkeeping().coin_counter_w(3, data & 0x20 ); /* payout */ - m_hopper->write(space, 0, (data & 0x0020) ? 0x80 : 0); // hopper motor + m_hopper->motor_w(BIT(data, 5)); // hopper motor // popmessage("Out A %02x",data); } diff --git a/src/mame/drivers/subsino2.cpp b/src/mame/drivers/subsino2.cpp index 6c851623618..03ce8617aa3 100644 --- a/src/mame/drivers/subsino2.cpp +++ b/src/mame/drivers/subsino2.cpp @@ -93,7 +93,8 @@ public: m_oki(*this, "oki"), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), - m_palette(*this, "palette") { } + m_palette(*this, "palette"), + m_hopper(*this, "hopper") { } layer_t m_layers[2]; uint8_t m_ss9601_byte_lo; @@ -180,6 +181,7 @@ public: required_device m_gfxdecode; required_device m_screen; required_device m_palette; + optional_device m_hopper; private: inline void ss9601_get_tile_info(layer_t *l, tile_data &tileinfo, tilemap_memory_index tile_index); @@ -886,9 +888,9 @@ WRITE16_MEMBER(subsino2_state::bishjan_outputs_w) case 0: if (ACCESSING_BITS_0_7) { - // coin out data & 0x01; - machine().device("hopper")->write(space, 0, (data & 0x0002) ? 0x80 : 0); // hopper - machine().bookkeeping().coin_counter_w(0, data & 0x0010 ); + // coin out BIT(data, 0) + m_hopper->motor_w(BIT(data, 1)); // hopper + machine().bookkeeping().coin_counter_w(0, BIT(data, 4)); } break; } diff --git a/src/mame/drivers/tickee.cpp b/src/mame/drivers/tickee.cpp index b4c4a60ed92..b5abef3de74 100644 --- a/src/mame/drivers/tickee.cpp +++ b/src/mame/drivers/tickee.cpp @@ -49,6 +49,7 @@ public: m_oki(*this, "oki"), m_screen(*this, "screen"), m_tlc34076(*this, "tlc34076"), + m_ticket(*this, "ticket%u", 1), m_vram(*this, "vram"), m_control(*this, "control") { } @@ -56,6 +57,7 @@ public: optional_device m_oki; required_device m_screen; required_device m_tlc34076; + optional_device_array m_ticket; required_shared_ptr m_vram; optional_shared_ptr m_control; @@ -336,8 +338,8 @@ WRITE16_MEMBER(tickee_state::tickee_control_w) if (offset == 3) { - machine().device("ticket1")->write(space, 0, (data & 8) << 4); - machine().device("ticket2")->write(space, 0, (data & 4) << 5); + m_ticket[0]->motor_w(BIT(data, 3)); + m_ticket[1]->motor_w(BIT(data, 2)); } if (olddata != m_control[offset]) diff --git a/src/mame/drivers/toaplan2.cpp b/src/mame/drivers/toaplan2.cpp index c849dfd3f60..e9e9d56cffa 100644 --- a/src/mame/drivers/toaplan2.cpp +++ b/src/mame/drivers/toaplan2.cpp @@ -596,7 +596,7 @@ WRITE8_MEMBER(toaplan2_state::pwrkick_coin_w) machine().bookkeeping().coin_counter_w(0, (data & 2) >> 1 ); // medal machine().bookkeeping().coin_counter_w(1, (data & 8) >> 3 ); // 10 yen machine().bookkeeping().coin_counter_w(2, (data & 1) ); // 100 yen - m_hopper->write(space, 0, data & 0x80); + m_hopper->motor_w(BIT(data, 7)); } WRITE8_MEMBER(toaplan2_state::pwrkick_coin_lockout_w) diff --git a/src/mame/drivers/tonton.cpp b/src/mame/drivers/tonton.cpp index b21cd11c0de..d0b6373ed78 100644 --- a/src/mame/drivers/tonton.cpp +++ b/src/mame/drivers/tonton.cpp @@ -43,6 +43,7 @@ public: required_device m_v9938; DECLARE_WRITE8_MEMBER(tonton_outport_w); + DECLARE_WRITE8_MEMBER(hopper_w); DECLARE_WRITE8_MEMBER(ay_aout_w); DECLARE_WRITE8_MEMBER(ay_bout_w); virtual void machine_start() override; @@ -67,7 +68,6 @@ WRITE8_MEMBER(tonton_state::tonton_outport_w) { machine().bookkeeping().coin_counter_w(offset, data & 0x01); machine().bookkeeping().coin_lockout_global_w(data & 0x02); /* Coin Lock */ - m_hopper->write(space, 0, (data & 0x02)); /* Hopper Motor */ // if(data & 0xfe) // logerror("%02x %02x\n",data,offset); @@ -75,6 +75,11 @@ WRITE8_MEMBER(tonton_state::tonton_outport_w) logerror("tonton_outport_w %02X @ %04X\n", data, space.device().safe_pc()); } +WRITE8_MEMBER(tonton_state::hopper_w) +{ + m_hopper->motor_w(BIT(data, 1)); +} + /************************************************* * Memory Map * @@ -91,7 +96,7 @@ static ADDRESS_MAP_START( tonton_io, AS_IO, 8, tonton_state ) AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_RANGE(0x00, 0x00) AM_WRITE(tonton_outport_w) AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") - AM_RANGE(0x01, 0x01) AM_WRITENOP // write the same to outport 00h + AM_RANGE(0x01, 0x01) AM_WRITE(hopper_w) AM_RANGE(0x02, 0x02) AM_READ_PORT("DSW1") AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW2") AM_RANGE(0x88, 0x8b) AM_DEVREADWRITE( "v9938", v9938_device, read, write ) @@ -225,7 +230,7 @@ static MACHINE_CONFIG_START( tonton ) MCFG_V99X8_INTERRUPT_CALLBACK(INPUTLINE("maincpu", 0)) MCFG_V99X8_SCREEN_ADD_NTSC("screen", "v9938", MAIN_CLOCK) - MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(HOPPER_PULSE), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_LOW ) + MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(HOPPER_PULSE), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") diff --git a/src/mame/drivers/wacky_gator.cpp b/src/mame/drivers/wacky_gator.cpp index 45fc413448f..1922c4b5bb2 100644 --- a/src/mame/drivers/wacky_gator.cpp +++ b/src/mame/drivers/wacky_gator.cpp @@ -109,7 +109,7 @@ WRITE8_MEMBER(wackygtr_state::status_lamps_w) set_lamps(0, data & 0x3f); machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); - m_ticket->write(space, 0, data & 0x80); + m_ticket->motor_w(BIT(data, 7)); } WRITE8_MEMBER(wackygtr_state::sample_ctrl_w) diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index 2368d868229..b3e40bbdb90 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -1542,7 +1542,7 @@ static MACHINE_CONFIG_DERIVED( lottofun, williams ) /* pia */ MCFG_DEVICE_MODIFY("pia_0") - MCFG_PIA_WRITEPB_HANDLER(DEVWRITE8("ticket", ticket_dispenser_device, write)) + MCFG_PIA_WRITEPB_HANDLER(DEVWRITELINE("ticket", ticket_dispenser_device, motor_w)) MCFG_DEVCB_BIT(7) MCFG_PIA_CA2_HANDLER(WRITELINE(williams_state, lottofun_coin_lock_w)) MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(70), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH) diff --git a/src/mame/drivers/xtheball.cpp b/src/mame/drivers/xtheball.cpp index e0551653dc0..4a740162463 100644 --- a/src/mame/drivers/xtheball.cpp +++ b/src/mame/drivers/xtheball.cpp @@ -28,6 +28,7 @@ public: m_maincpu(*this, "maincpu"), m_watchdog(*this, "watchdog"), m_tlc34076(*this, "tlc34076"), + m_ticket(*this, "ticket"), m_vram_bg(*this, "vrabg"), m_vram_fg(*this, "vrafg"), m_analog_x(*this, "ANALOGX"), @@ -36,6 +37,7 @@ public: required_device m_maincpu; required_device m_watchdog; required_device m_tlc34076; + required_device m_ticket; required_shared_ptr m_vram_bg; required_shared_ptr m_vram_fg; @@ -158,7 +160,7 @@ WRITE16_MEMBER(xtheball_state::bit_controls_w) switch (offset) { case 7: - machine().device("ticket")->write(space, 0, data << 7); + m_ticket->motor_w(data & 1); break; case 8: diff --git a/src/mame/includes/itech32.h b/src/mame/includes/itech32.h index 7256954e37f..0e86083fc20 100644 --- a/src/mame/includes/itech32.h +++ b/src/mame/includes/itech32.h @@ -8,6 +8,7 @@ **************************************************************************/ #include "machine/nvram.h" +#include "machine/ticket.h" #include "screen.h" #define VIDEO_CLOCK XTAL_8MHz /* video (pixel) clock */ @@ -28,6 +29,7 @@ public: m_dsp2(*this, "dsp2"), m_screen(*this, "screen"), m_palette(*this, "palette"), + m_ticket(*this, "ticket"), m_main_ram(*this, "main_ram", 0), m_nvram(*this, "nvram", 0), m_video(*this, "video", 0), @@ -44,6 +46,7 @@ public: optional_device m_dsp2; required_device m_screen; required_device m_palette; + required_device m_ticket; optional_shared_ptr m_main_ram; optional_shared_ptr m_nvram; diff --git a/src/mame/includes/playmark.h b/src/mame/includes/playmark.h index ddc7409140f..1ced417116a 100644 --- a/src/mame/includes/playmark.h +++ b/src/mame/includes/playmark.h @@ -2,6 +2,7 @@ // copyright-holders:Nicola Salmoria, Pierpaolo Prazzoli, Quench #include "sound/okim6295.h" #include "machine/eepromser.h" +#include "machine/ticket.h" #include "cpu/pic16c5x/pic16c5x.h" class playmark_state : public driver_device @@ -21,7 +22,9 @@ public: m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette") { } + m_palette(*this, "palette"), + m_ticket(*this, "ticket"), + m_token(*this, "token") { } /* memory pointers */ optional_shared_ptr m_bgvideoram; @@ -116,4 +119,6 @@ public: optional_device m_audiocpu; required_device m_gfxdecode; required_device m_palette; + optional_device m_ticket; + optional_device m_token; }; diff --git a/src/mame/machine/ticket.cpp b/src/mame/machine/ticket.cpp index ab0cda56ace..2180d4fd17e 100644 --- a/src/mame/machine/ticket.cpp +++ b/src/mame/machine/ticket.cpp @@ -44,7 +44,6 @@ ticket_dispenser_device::ticket_dispenser_device(const machine_config &mconfig, m_status_sense(TICKET_STATUS_ACTIVE_LOW), m_period(attotime::from_msec(100)), m_hopper_type(false), - m_active_bit(0x80), m_motoron(0), m_ticketdispensed(0), m_ticketnotdispensed(0), @@ -109,20 +108,19 @@ READ_LINE_MEMBER( ticket_dispenser_device::line_r ) //------------------------------------------------- -// write - write the control line via the active -// bit (legacy method) +// motor_w - write the control line //------------------------------------------------- -WRITE8_MEMBER( ticket_dispenser_device::write ) +WRITE_LINE_MEMBER( ticket_dispenser_device::motor_w ) { // On an activate signal, start dispensing! - if ((data & m_active_bit) == m_motoron) + if (bool(state) == m_motoron) { if (!m_power) { LOG(("%s: Ticket Power On\n", machine().describe_context())); m_timer->adjust(m_period); - m_power = 1; + m_power = true; m_status = m_ticketnotdispensed; } } @@ -136,21 +134,11 @@ WRITE8_MEMBER( ticket_dispenser_device::write ) m_timer->adjust(attotime::never); machine().output().set_led_value(2, 0); } - m_power = 0; + m_power = false; } } } -//------------------------------------------------- -// motor_w - write the control line as a proper -// line -//------------------------------------------------- - -WRITE_LINE_MEMBER( ticket_dispenser_device::motor_w ) -{ - write(machine().dummy_space(), 0, state ? m_active_bit : 0); -} - //************************************************************************** // DEVICE INTERFACE @@ -162,10 +150,9 @@ WRITE_LINE_MEMBER( ticket_dispenser_device::motor_w ) void ticket_dispenser_device::device_start() { - m_active_bit = 0x80; - m_motoron = (m_motor_sense == TICKET_MOTOR_ACTIVE_HIGH) ? m_active_bit : 0; - m_ticketdispensed = (m_status_sense == TICKET_STATUS_ACTIVE_HIGH) ? m_active_bit : 0; - m_ticketnotdispensed = m_ticketdispensed ^ m_active_bit; + m_motoron = (m_motor_sense == TICKET_MOTOR_ACTIVE_HIGH); + m_ticketdispensed = (m_status_sense == TICKET_STATUS_ACTIVE_HIGH); + m_ticketnotdispensed = !m_ticketdispensed; m_timer = timer_alloc(); @@ -181,7 +168,7 @@ void ticket_dispenser_device::device_start() void ticket_dispenser_device::device_reset() { m_status = m_ticketnotdispensed; - m_power = 0x00; + m_power = false; } @@ -194,13 +181,13 @@ void ticket_dispenser_device::device_timer(emu_timer &timer, device_timer_id id, // if we still have power, keep toggling ticket states if (m_power) { - m_status ^= m_active_bit; + m_status = !m_status; LOG(("Ticket Status Changed to %02X\n", m_status)); m_timer->adjust(m_period); } else if (m_hopper_type) { - m_status ^= m_active_bit; + m_status = !m_status; LOG(("%s: Ticket Power Off\n", machine().describe_context())); m_timer->adjust(attotime::never); machine().output().set_led_value(2, 0); diff --git a/src/mame/machine/ticket.h b/src/mame/machine/ticket.h index 769e4c83f01..cef52442159 100644 --- a/src/mame/machine/ticket.h +++ b/src/mame/machine/ticket.h @@ -68,7 +68,6 @@ public: // read/write handlers DECLARE_READ_LINE_MEMBER( line_r ); - DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE_LINE_MEMBER( motor_w ); protected: @@ -84,13 +83,12 @@ protected: bool m_hopper_type; // active state - uint8_t m_active_bit; - uint8_t m_motoron; - uint8_t m_ticketdispensed; - uint8_t m_ticketnotdispensed; + bool m_motoron; + bool m_ticketdispensed; + bool m_ticketnotdispensed; - uint8_t m_status; - uint8_t m_power; + bool m_status; + bool m_power; emu_timer *m_timer; }; -- cgit v1.2.3-70-g09d2 From 46edbee6ed30c8a6cb16acb5c833d467117917c4 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Thu, 7 Dec 2017 10:52:38 +1100 Subject: fix MT06785 --- src/frontend/mame/ui/filesel.cpp | 141 +++++++++++++++++-------------------- src/frontend/mame/ui/filesel.h | 44 ++++++++---- src/osd/modules/file/posixdir.cpp | 1 + src/osd/modules/file/posixfile.cpp | 2 +- 4 files changed, 95 insertions(+), 93 deletions(-) diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp index 256834c5de1..3477fa416b1 100644 --- a/src/frontend/mame/ui/filesel.cpp +++ b/src/frontend/mame/ui/filesel.cpp @@ -47,14 +47,14 @@ namespace ui { menu_file_selector::menu_file_selector(mame_ui_manager &mui, render_container &container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool has_empty, bool has_softlist, bool has_create, menu_file_selector::result &result) : menu(mui, container) + , m_image(image) , m_current_directory(current_directory) , m_current_file(current_file) + , m_has_empty(has_empty) + , m_has_softlist(has_softlist) + , m_has_create(has_create) , m_result(result) { - m_image = image; - m_has_empty = has_empty; - m_has_softlist = has_softlist; - m_has_create = has_create; } @@ -176,7 +176,9 @@ int menu_file_selector::compare_entries(const file_selector_entry *e1, const fil //------------------------------------------------- menu_file_selector::file_selector_entry &menu_file_selector::append_entry( - file_selector_entry_type entry_type, const std::string &entry_basename, const std::string &entry_fullpath) + file_selector_entry_type entry_type, + const std::string &entry_basename, + const std::string &entry_fullpath) { return append_entry(entry_type, std::string(entry_basename), std::string(entry_fullpath)); } @@ -188,7 +190,9 @@ menu_file_selector::file_selector_entry &menu_file_selector::append_entry( //------------------------------------------------- menu_file_selector::file_selector_entry &menu_file_selector::append_entry( - file_selector_entry_type entry_type, std::string &&entry_basename, std::string &&entry_fullpath) + file_selector_entry_type entry_type, + std::string &&entry_basename, + std::string &&entry_fullpath) { // allocate a new entry file_selector_entry entry; @@ -197,47 +201,41 @@ menu_file_selector::file_selector_entry &menu_file_selector::append_entry( entry.fullpath = std::move(entry_fullpath); // find the end of the list - m_entrylist.emplace_back(std::move(entry)); - return m_entrylist[m_entrylist.size() - 1]; + return *m_entrylist.emplace(m_entrylist.end(), std::move(entry)); } //------------------------------------------------- -// append_entry_menu_item - appends +// append_dirent_entry - appends // a menu item for a file selector entry //------------------------------------------------- menu_file_selector::file_selector_entry *menu_file_selector::append_dirent_entry(const osd::directory::entry *dirent) { - std::string buffer; file_selector_entry_type entry_type; - file_selector_entry *entry; - - switch(dirent->type) + switch (dirent->type) { - case osd::directory::entry::entry_type::FILE: - entry_type = SELECTOR_ENTRY_TYPE_FILE; - break; + case osd::directory::entry::entry_type::FILE: + entry_type = SELECTOR_ENTRY_TYPE_FILE; + break; - case osd::directory::entry::entry_type::DIR: - entry_type = SELECTOR_ENTRY_TYPE_DIRECTORY; - break; + case osd::directory::entry::entry_type::DIR: + entry_type = SELECTOR_ENTRY_TYPE_DIRECTORY; + break; - default: - // exceptional case; do not add a menu item - return nullptr; + default: + // exceptional case; do not add a menu item + return nullptr; } // determine the full path - buffer = util::zippath_combine(m_current_directory, dirent->name); + std::string buffer = util::zippath_combine(m_current_directory, dirent->name); // create the file selector entry - entry = &append_entry( - entry_type, - dirent->name, - std::move(buffer)); - - return entry; + return &append_entry( + entry_type, + dirent->name, + std::move(buffer)); } @@ -290,64 +288,51 @@ void menu_file_selector::append_entry_menu_item(const file_selector_entry *entry void menu_file_selector::populate(float &customtop, float &custombottom) { - util::zippath_directory *directory = nullptr; - osd_file::error err; - const osd::directory::entry *dirent; - const file_selector_entry *entry; const file_selector_entry *selected_entry = nullptr; - int i; - const char *volume_name; - uint8_t first; - // open the directory - err = util::zippath_opendir(m_current_directory, &directory); // clear out the menu entries m_entrylist.clear(); + // open the directory + util::zippath_directory *directory = nullptr; + osd_file::error const err = util::zippath_opendir(m_current_directory, &directory); + + // add the "[empty slot]" entry if available if (m_has_empty) - { - // add the "[empty slot]" entry append_entry(SELECTOR_ENTRY_TYPE_EMPTY, "", ""); - } + // add the "[create]" entry if (m_has_create && !util::zippath_is_zip(directory)) - { - // add the "[create]" entry append_entry(SELECTOR_ENTRY_TYPE_CREATE, "", ""); - } + // add and select the "[software list]" entry if available if (m_has_softlist) - { - // add the "[software list]" entry - entry = &append_entry(SELECTOR_ENTRY_TYPE_SOFTWARE_LIST, "", ""); - selected_entry = entry; - } + selected_entry = &append_entry(SELECTOR_ENTRY_TYPE_SOFTWARE_LIST, "", ""); // add the drives - i = 0; - while((volume_name = osd_get_volume_name(i))!=nullptr) - { - append_entry(SELECTOR_ENTRY_TYPE_DRIVE, - volume_name, volume_name); - i++; - } + int i = 0; + for (char const *volume_name = osd_get_volume_name(i); volume_name; volume_name = osd_get_volume_name(++i)) + append_entry(SELECTOR_ENTRY_TYPE_DRIVE, volume_name, volume_name); // mark first filename entry - first = m_entrylist.size() + 1; + std::size_t const first = m_entrylist.size() + 1; // build the menu for each item - if (err == osd_file::error::NONE) + if (osd_file::error::NONE != err) + { + osd_printf_verbose("menu_file_selector::populate: error opening directory '%s' (%d)\n", m_current_directory.c_str(), int(err)); + } + else { - while((dirent = util::zippath_readdir(directory)) != nullptr) + for (osd::directory::entry const *dirent = util::zippath_readdir(directory); dirent; dirent = util::zippath_readdir(directory)) { // append a dirent entry - entry = append_dirent_entry(dirent); - - if (entry != nullptr) + file_selector_entry const *entry = append_dirent_entry(dirent); + if (entry) { // set the selected item to be the first non-parent directory or file - if ((selected_entry == nullptr) && strcmp(dirent->name, "..")) + if (!selected_entry && strcmp(dirent->name, "..")) selected_entry = entry; // do we have to select this file? @@ -356,29 +341,31 @@ void menu_file_selector::populate(float &customtop, float &custombottom) } } } + if (directory) + util::zippath_closedir(directory); // sort the menu entries - const std::collate& coll = std::use_facet>(std::locale()); - std::sort(m_entrylist.begin()+first, m_entrylist.end(), [&coll](file_selector_entry const &x, file_selector_entry const &y) - { - std::wstring xstr = wstring_from_utf8(x.basename); - std::wstring ystr = wstring_from_utf8(y.basename); - return coll.compare(xstr.data(), xstr.data()+xstr.size(), ystr.data(), ystr.data()+ystr.size()) < 0; - } ); + const std::collate &coll = std::use_facet>(std::locale()); + std::sort( + m_entrylist.begin() + first, + m_entrylist.end(), + [&coll] (file_selector_entry const &x, file_selector_entry const &y) + { + std::wstring const xstr = wstring_from_utf8(x.basename); + std::wstring const ystr = wstring_from_utf8(y.basename); + return coll.compare(xstr.data(), xstr.data()+xstr.size(), ystr.data(), ystr.data()+ystr.size()) < 0; + }); // append all of the menu entries - for (auto &entry : m_entrylist) + for (file_selector_entry const &entry : m_entrylist) append_entry_menu_item(&entry); // set the selection (if we have one) - if (selected_entry != nullptr) - set_selection((void *) selected_entry); + if (selected_entry) + set_selection((void *)selected_entry); // set up custom render proc customtop = ui().get_line_height() + 3.0f * UI_BOX_TB_BORDER; - - if (directory != nullptr) - util::zippath_closedir(directory); } @@ -426,7 +413,7 @@ void menu_file_selector::handle() if (err != osd_file::error::NONE) { // this path is problematic; present the user with an error and bail - ui().popup_time(1, "Error accessing %s", entry->fullpath); + ui().popup_time(1, _("Error accessing %s"), entry->fullpath); break; } m_current_directory.assign(entry->fullpath); diff --git a/src/frontend/mame/ui/filesel.h b/src/frontend/mame/ui/filesel.h index 6e1759588dd..2aec3a77da1 100644 --- a/src/frontend/mame/ui/filesel.h +++ b/src/frontend/mame/ui/filesel.h @@ -16,6 +16,7 @@ #include "ui/menu.h" namespace ui { + // ======================> menu_file_selector class menu_file_selector : public menu @@ -30,7 +31,16 @@ public: FILE }; - menu_file_selector(mame_ui_manager &mui, render_container &container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool has_empty, bool has_softlist, bool has_create, result &result); + menu_file_selector( + mame_ui_manager &mui, + render_container &container, + device_image_interface *image, + std::string ¤t_directory, + std::string ¤t_file, + bool has_empty, + bool has_softlist, + bool has_create, + result &result); virtual ~menu_file_selector() override; protected: @@ -50,7 +60,7 @@ private: struct file_selector_entry { - file_selector_entry() {} + file_selector_entry() { } file_selector_entry(file_selector_entry &&) = default; file_selector_entry &operator=(file_selector_entry &&) = default; file_selector_entry_type type; @@ -59,16 +69,16 @@ private: }; // internal state - device_image_interface * m_image; - std::string & m_current_directory; - std::string & m_current_file; - bool m_has_empty; - bool m_has_softlist; - bool m_has_create; - result & m_result; + device_image_interface *const m_image; + std::string & m_current_directory; + std::string & m_current_file; + bool const m_has_empty; + bool const m_has_softlist; + bool const m_has_create; + result & m_result; std::vector m_entrylist; - std::string m_hover_directory; - std::string m_filename; + std::string m_hover_directory; + std::string m_filename; virtual void populate(float &customtop, float &custombottom) override; virtual void handle() override; @@ -95,16 +105,20 @@ public: WRITE_OTHER, WRITE_DIFF }; - menu_select_rw(mame_ui_manager &mui, render_container &container, - bool can_in_place, result &result); + menu_select_rw( + mame_ui_manager &mui, + render_container &container, + bool can_in_place, + result &result); virtual ~menu_select_rw() override; - virtual void populate(float &customtop, float &custombottom) override; - virtual void handle() override; static void *itemref_from_result(result result); static result result_from_itemref(void *itemref); private: + virtual void populate(float &customtop, float &custombottom) override; + virtual void handle() override; + // internal state bool m_can_in_place; result & m_result; diff --git a/src/osd/modules/file/posixdir.cpp b/src/osd/modules/file/posixdir.cpp index 113c5068963..be18239ebf5 100644 --- a/src/osd/modules/file/posixdir.cpp +++ b/src/osd/modules/file/posixdir.cpp @@ -158,6 +158,7 @@ const osd::directory::entry *posix_directory::read() case DT_REG: m_entry.type = entry::entry_type::FILE; break; + case DT_UNKNOWN: case DT_LNK: if (stat_err) m_entry.type = entry::entry_type::OTHER; diff --git a/src/osd/modules/file/posixfile.cpp b/src/osd/modules/file/posixfile.cpp index 3cc122342dd..967202eb61c 100644 --- a/src/osd/modules/file/posixfile.cpp +++ b/src/osd/modules/file/posixfile.cpp @@ -446,7 +446,7 @@ bool osd_is_absolute_path(std::string const &path) if (!path.empty() && is_path_separator(path[0])) return true; #if !defined(WIN32) - else if (!path.empty() && (path[0] == '.')) + else if (!path.empty() && (path[0] == '.') && (!path[1] || is_path_separator(path[1]))) // FIXME: why is this even here? foo/./bar is a valid way to refer to foo/bar return true; #elif !defined(UNDER_CE) else if ((path.length() > 1) && (path[1] == ':')) -- cgit v1.2.3-70-g09d2 From 76bd4b9b3f5d8ea288307657f11fb82ae8d61a7f Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 7 Dec 2017 02:44:50 +0100 Subject: New working machines ----------- Gakken Invader 2000 [hap, Sean Riddle] --- src/devices/cpu/tms1000/tms1100.cpp | 2 +- src/mame/drivers/hh_hmcs40.cpp | 124 +++++++++++++-------------- src/mame/drivers/hh_melps4.cpp | 8 +- src/mame/drivers/hh_sm510.cpp | 12 +-- src/mame/drivers/hh_tms1k.cpp | 165 ++++++++++++++++++++++++++++++++++-- src/mame/drivers/hh_ucom4.cpp | 78 ++++++++--------- src/mame/mame.lst | 1 + 7 files changed, 271 insertions(+), 119 deletions(-) diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp index 8f329a3c725..9f654009bbe 100644 --- a/src/devices/cpu/tms1000/tms1100.cpp +++ b/src/devices/cpu/tms1000/tms1100.cpp @@ -18,7 +18,7 @@ DEFINE_DEVICE_TYPE(TMS1100, tms1100_cpu_device, "tms1100", "TMS1100") // 28-pin DIP, 11 R pins DEFINE_DEVICE_TYPE(TMS1170, tms1170_cpu_device, "tms1170", "TMS1170") // high voltage version DEFINE_DEVICE_TYPE(TMS1300, tms1300_cpu_device, "tms1300", "TMS1300") // 40-pin DIP, 16 R pins -DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version +DEFINE_DEVICE_TYPE(TMS1370, tms1370_cpu_device, "tms1370", "TMS1370") // high voltage version, also seen in 28-pin package(some O/R pins unavailable) // internal memory maps diff --git a/src/mame/drivers/hh_hmcs40.cpp b/src/mame/drivers/hh_hmcs40.cpp index 3888a877904..8d6dddefe55 100644 --- a/src/mame/drivers/hh_hmcs40.cpp +++ b/src/mame/drivers/hh_hmcs40.cpp @@ -85,7 +85,7 @@ On MAME they will show with full brightness, see eg. building explosions. Currently there's a workaround in place. - bzaxxon 3D effect is difficult to simulate - - improve SVGs of bzaxxon, bpengo, bbtime + - improve/redo SVGs of: bzaxxon, bpengo, bbtime ***************************************************************************/ @@ -370,7 +370,7 @@ public: WRITE8_MEMBER(bambball_state::plate_w) { - // R1x-R3x(,D0-D3): vfd matrix plate + // R1x-R3x(,D0-D3): vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -387,7 +387,7 @@ WRITE16_MEMBER(bambball_state::grid_w) // D7-D10: input mux m_inp_mux = data >> 7 & 0xf; - // D7-D15: vfd matrix grid + // D7-D15: vfd grid m_grid = data >> 7 & 0x1ff; // D0-D3: more plates (update display there) @@ -491,7 +491,7 @@ void bmboxing_state::prepare_display() WRITE8_MEMBER(bmboxing_state::plate_w) { - // R1x-R3x: vfd matrix plate + // R1x-R3x: vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -505,7 +505,7 @@ WRITE16_MEMBER(bmboxing_state::grid_w) // D9-D12: input mux m_inp_mux = data >> 9 & 0xf; - // D4-D12: vfd matrix grid + // D4-D12: vfd grid m_grid = data >> 4 & 0x1ff; prepare_display(); } @@ -630,7 +630,7 @@ void bfriskyt_state::prepare_display() WRITE8_MEMBER(bfriskyt_state::plate_w) { - // R0x-R3x: vfd matrix plate + // R0x-R3x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -649,7 +649,7 @@ WRITE16_MEMBER(bfriskyt_state::grid_w) update_int1(); } - // D8-D15: vfd matrix grid + // D8-D15: vfd grid m_grid = data >> 8 & 0xff; // D0-D5: more plates @@ -750,7 +750,7 @@ public: WRITE8_MEMBER(packmon_state::plate_w) { - // R0x-R3x(,D0-D3): vfd matrix plate + // R0x-R3x(,D0-D3): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -768,7 +768,7 @@ WRITE16_MEMBER(packmon_state::grid_w) // D11-D15: input mux m_inp_mux = data >> 11 & 0x1f; - // D6-D15: vfd matrix grid + // D6-D15: vfd grid m_grid = data >> 6 & 0x3ff; // D0-D3: plate 9-12 (update display there) @@ -872,7 +872,7 @@ void msthawk_state::prepare_display() WRITE8_MEMBER(msthawk_state::plate_w) { - // R0x-R3x: vfd matrix plate + // R0x-R3x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -891,7 +891,7 @@ WRITE16_MEMBER(msthawk_state::grid_w) update_int0(); } - // D6-D15: vfd matrix grid + // D6-D15: vfd grid m_grid = data >> 6 & 0x3ff; // D0-D4: more plates @@ -992,7 +992,7 @@ public: WRITE8_MEMBER(bzaxxon_state::plate_w) { - // R0x-R3x(,D0-D2): vfd matrix plate + // R0x-R3x(,D0-D2): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1015,7 +1015,7 @@ WRITE16_MEMBER(bzaxxon_state::grid_w) update_int1(); } - // D5-D15: vfd matrix grid + // D5-D15: vfd grid m_grid = data >> 5 & 0x7ff; // D0-D2: plate 7-9 (update display there) @@ -1112,7 +1112,7 @@ public: WRITE8_MEMBER(zackman_state::plate_w) { - // R0x-R6x(,D0,D1): vfd matrix plate + // R0x-R6x(,D0,D1): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1135,7 +1135,7 @@ WRITE16_MEMBER(zackman_state::grid_w) update_int0(); } - // D8-D15: vfd matrix grid + // D8-D15: vfd grid m_grid = data >> 8 & 0xff; // D0,D1: plate 12,13 (update display there) @@ -1239,7 +1239,7 @@ void bpengo_state::prepare_display() WRITE8_MEMBER(bpengo_state::plate_w) { - // R0x-R6x: vfd matrix plate + // R0x-R6x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1258,7 +1258,7 @@ WRITE16_MEMBER(bpengo_state::grid_w) update_int0(); } - // D0-D7: vfd matrix grid + // D0-D7: vfd grid m_grid = data & 0xff; prepare_display(); } @@ -1367,7 +1367,7 @@ void bbtime_state::prepare_display() WRITE8_MEMBER(bbtime_state::plate_w) { - // R0x-R6x: vfd matrix plate + // R0x-R6x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1386,7 +1386,7 @@ WRITE16_MEMBER(bbtime_state::grid_w) update_int0(); } - // D4-D9: vfd matrix grid + // D4-D9: vfd grid m_grid = data >> 4 & 0x3f; prepare_display(); } @@ -1480,7 +1480,7 @@ public: WRITE8_MEMBER(bdoramon_state::plate_w) { - // R0x-R3x(,D0-D3): vfd matrix plate + // R0x-R3x(,D0-D3): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1495,7 +1495,7 @@ WRITE16_MEMBER(bdoramon_state::grid_w) // D7: speaker out m_speaker->level_w(data >> 7 & 1); - // D8-D15: vfd matrix grid + // D8-D15: vfd grid m_grid = data >> 8 & 0xff; // D0-D3: plate 15-18 (update display there) @@ -1579,7 +1579,7 @@ public: WRITE8_MEMBER(bultrman_state::plate_w) { - // R0x-R3x(,D0-D2): vfd matrix plate + // R0x-R3x(,D0-D2): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1594,7 +1594,7 @@ WRITE16_MEMBER(bultrman_state::grid_w) // D7: speaker out m_speaker->level_w(data >> 7 & 1); - // D8-D15: vfd matrix grid + // D8-D15: vfd grid m_grid = data >> 8 & 0xff; // D0-D2: plate 15-17 (update display there) @@ -1678,7 +1678,7 @@ void machiman_state::prepare_display() WRITE8_MEMBER(machiman_state::plate_w) { - // R0x-R3x,R6012: vfd matrix plate + // R0x-R3x,R6012: vfd plate int shift = (offset == hmcs40_cpu_device::PORT_R6X) ? 16 : offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1689,7 +1689,7 @@ WRITE16_MEMBER(machiman_state::grid_w) // D13: speaker out m_speaker->level_w(data >> 13 & 1); - // D0-D4: vfd matrix grid + // D0-D4: vfd grid m_grid = data & 0x1f; prepare_display(); } @@ -1771,7 +1771,7 @@ public: WRITE8_MEMBER(pairmtch_state::plate_w) { - // R2x,R3x,R6x: vfd matrix plate + // R2x,R3x,R6x: vfd plate int shift = (offset == hmcs40_cpu_device::PORT_R6X) ? 8 : (offset-2) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); display_matrix(12, 6, m_plate, m_grid); @@ -1788,7 +1788,7 @@ WRITE16_MEMBER(pairmtch_state::grid_w) // D10,D15: input mux m_inp_mux = (data >> 10 & 1) | (data >> 14 & 2); - // D0-D5: vfd matrix grid + // D0-D5: vfd grid m_grid = data & 0x3f; display_matrix(12, 6, m_plate, m_grid); } @@ -1919,7 +1919,7 @@ public: WRITE8_MEMBER(alnattck_state::plate_w) { - // R0x-R3x(,D0-D3): vfd matrix plate + // R0x-R3x(,D0-D3): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1936,7 +1936,7 @@ WRITE16_MEMBER(alnattck_state::grid_w) // D7-D13: input mux m_inp_mux = data >> 7 & 0x7f; - // D6-D15: vfd matrix grid + // D6-D15: vfd grid m_grid = data >> 6 & 0x3ff; // D0-D3: plate 16-19 (update display there) @@ -2064,7 +2064,7 @@ WRITE8_MEMBER(cdkong_state::plate_w) m_r[offset] = data; speaker_decay_reset(); - // R0x-R6x: vfd matrix plate + // R0x-R6x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2075,7 +2075,7 @@ WRITE16_MEMBER(cdkong_state::grid_w) // D3: speaker out m_speaker->level_w(data >> 3 & 1); - // D4-D14: vfd matrix grid + // D4-D14: vfd grid m_grid = data >> 4 & 0x7ff; prepare_display(); } @@ -2183,7 +2183,7 @@ WRITE8_MEMBER(cgalaxn_state::grid_w) if (offset == hmcs40_cpu_device::PORT_R1X) m_inp_mux = data & 3; - // R1x-R3x: vfd matrix grid + // R1x-R3x: vfd grid int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2196,7 +2196,7 @@ WRITE16_MEMBER(cgalaxn_state::plate_w) // D1: start alien attack whine sound effect (edge triggered) - // D2-D15: vfd matrix plate + // D2-D15: vfd plate m_plate = (m_plate & 0x4000) | (data >> 2 & 0x3fff); prepare_display(); } @@ -2302,7 +2302,7 @@ public: WRITE8_MEMBER(cpacman_state::plate_w) { - // R1x-R6x(,D1,D2): vfd matrix plate + // R1x-R6x(,D1,D2): vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -2320,7 +2320,7 @@ WRITE16_MEMBER(cpacman_state::grid_w) // D13-D15: input mux m_inp_mux = data >> 13 & 7; - // D5-D15: vfd matrix grid + // D5-D15: vfd grid m_grid = data >> 5 & 0x7ff; // D1,D2: plate 8,14 (update display there) @@ -2419,7 +2419,7 @@ public: WRITE8_MEMBER(cmspacmn_state::plate_w) { - // R1x-R6x(,D0,D1): vfd matrix plate + // R1x-R6x(,D0,D1): vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -2437,7 +2437,7 @@ WRITE16_MEMBER(cmspacmn_state::grid_w) // D13-D15: input mux m_inp_mux = data >> 13 & 7; - // D5-D15: vfd matrix grid + // D5-D15: vfd grid m_grid = data >> 5 & 0x7ff; // D0,D1: more plates (update display there) @@ -2550,7 +2550,7 @@ void sag_state::prepare_display() WRITE8_MEMBER(sag_state::plate_w) { - // R0x-R3x: vfd matrix plate + // R0x-R3x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2564,7 +2564,7 @@ WRITE16_MEMBER(sag_state::grid_w) // D2-D7: input mux m_inp_mux = data >> 2 & 0x3f; - // D1-D12: vfd matrix grid + // D1-D12: vfd grid m_grid = data >> 1 & 0xfff; prepare_display(); } @@ -2683,14 +2683,14 @@ WRITE16_MEMBER(egalaxn2_state::grid_w) // D1-D4: input mux m_inp_mux = data >> 1 & 0xf; - // D1-D15: vfd matrix grid + // D1-D15: vfd grid m_grid = data >> 1 & 0x7fff; prepare_display(); } WRITE8_MEMBER(egalaxn2_state::plate_w) { - // R1x-R6x: vfd matrix plate + // R1x-R6x: vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2879,7 +2879,7 @@ WRITE8_MEMBER(eturtles_state::plate_w) { m_r[offset] = data; - // R0x-R6x: vfd matrix plate + // R0x-R6x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2897,7 +2897,7 @@ WRITE16_MEMBER(eturtles_state::grid_w) update_int(); } - // D1-D15: vfd matrix grid + // D1-D15: vfd grid m_grid = data >> 1 & 0x7fff; prepare_display(); } @@ -3161,7 +3161,7 @@ public: WRITE8_MEMBER(ghalien_state::plate_w) { - // R0x-R3x(,D10-D13): vfd matrix plate + // R0x-R3x(,D10-D13): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -3179,7 +3179,7 @@ WRITE16_MEMBER(ghalien_state::grid_w) // D0-D6: input mux m_inp_mux = data & 0x7f; - // D0-D9: vfd matrix grid + // D0-D9: vfd grid m_grid = data & 0x3ff; // D10-D13: more plates (update display there) @@ -3280,7 +3280,7 @@ public: WRITE8_MEMBER(gckong_state::plate_w) { - // R0x-R3x(,D0,D1): vfd matrix plate + // R0x-R3x(,D0,D1): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -3303,7 +3303,7 @@ WRITE16_MEMBER(gckong_state::grid_w) update_int1(); } - // D5-D15: vfd matrix grid + // D5-D15: vfd grid m_grid = data >> 5 & 0x7ff; // D0,D1: more plates (update display there) @@ -3403,7 +3403,7 @@ public: WRITE8_MEMBER(gdigdug_state::plate_w) { - // R0x-R6x(,D0-D3): vfd matrix plate + // R0x-R6x(,D0-D3): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -3425,7 +3425,7 @@ WRITE16_MEMBER(gdigdug_state::grid_w) update_int1(); } - // D7-D15: vfd matrix grid + // D7-D15: vfd grid m_grid = data >> 7 & 0x1ff; // D0-D3: more plates (update display there) @@ -3534,7 +3534,7 @@ void mwcbaseb_state::prepare_display() WRITE8_MEMBER(mwcbaseb_state::plate_w) { - // R1x-R3x,R6x: vfd matrix plate + // R1x-R3x,R6x: vfd plate int shift = (offset == hmcs40_cpu_device::PORT_R6X) ? 12 : (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -3545,7 +3545,7 @@ WRITE16_MEMBER(mwcbaseb_state::grid_w) // D9-D15: input mux m_inp_mux = data >> 9 & 0x7f; - // D0-D7: vfd matrix grid + // D0-D7: vfd grid m_grid = data & 0xff; prepare_display(); } @@ -3683,7 +3683,7 @@ public: WRITE8_MEMBER(pbqbert_state::plate_w) { - // R0x-R6x(,D8): vfd matrix plate + // R0x-R6x(,D8): vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -3697,7 +3697,7 @@ WRITE16_MEMBER(pbqbert_state::grid_w) // D14: speaker out m_speaker->level_w(data >> 14 & 1); - // D0-D7: vfd matrix grid + // D0-D7: vfd grid m_grid = data & 0xff; // D8: plate 25 (update display there) @@ -3783,7 +3783,7 @@ void kingman_state::prepare_display() WRITE8_MEMBER(kingman_state::plate_w) { - // R0x-R3x: vfd matrix plate + // R0x-R3x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -3802,7 +3802,7 @@ WRITE16_MEMBER(kingman_state::grid_w) update_int0(); } - // D7-D15: vfd matrix grid + // D7-D15: vfd grid m_grid = data >> 7 & 0x1ff; // D0-D4: more plates @@ -3904,7 +3904,7 @@ void tmtron_state::prepare_display() WRITE8_MEMBER(tmtron_state::plate_w) { - // R0x-R3x: vfd matrix plate + // R0x-R3x: vfd plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -3923,7 +3923,7 @@ WRITE16_MEMBER(tmtron_state::grid_w) update_int1(); } - // D6-D15: vfd matrix grid + // D6-D15: vfd grid m_grid = data >> 6 & 0x3ff; // D0-D3,D5: more plates @@ -4018,7 +4018,7 @@ public: WRITE8_MEMBER(vinvader_state::plate_w) { - // R1x-R3x(,D4-D6): vfd matrix plate + // R1x-R3x(,D4-D6): vfd plate int shift = (offset - hmcs40_cpu_device::PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -4032,7 +4032,7 @@ WRITE16_MEMBER(vinvader_state::grid_w) // D0: speaker out m_speaker->level_w(data & 1); - // D7-D15: vfd matrix grid + // D7-D15: vfd grid m_grid = data >> 7 & 0x1ff; // D4-D6: more plates (update display there) @@ -4147,7 +4147,7 @@ ROM_START( bzaxxon ) ROM_CONTINUE( 0x1e80, 0x0100 ) ROM_REGION( 521080, "svg", 0) - ROM_LOAD( "bzaxxon.svg", 0, 521080, CRC(f4fbb2de) SHA1(83db400e67d91ae4bfee3e8568ae9df94ebede19) ) + ROM_LOAD( "bzaxxon.svg", 0, 521080, BAD_DUMP CRC(f4fbb2de) SHA1(83db400e67d91ae4bfee3e8568ae9df94ebede19) ) ROM_END @@ -4167,7 +4167,7 @@ ROM_START( bpengo ) ROM_CONTINUE( 0x1e80, 0x0100 ) ROM_REGION( 744461, "svg", 0) - ROM_LOAD( "bpengo.svg", 0, 744461, CRC(2b9abaa5) SHA1(c70a6ac1fa757fdd3ababfe6e00573ef1410c1eb) ) + ROM_LOAD( "bpengo.svg", 0, 744461, BAD_DUMP CRC(2b9abaa5) SHA1(c70a6ac1fa757fdd3ababfe6e00573ef1410c1eb) ) ROM_END @@ -4177,7 +4177,7 @@ ROM_START( bbtime ) ROM_CONTINUE( 0x1e80, 0x0100 ) ROM_REGION( 461605, "svg", 0) - ROM_LOAD( "bbtime.svg", 0, 461605, CRC(5b335271) SHA1(46c45b711358e8397ae707668aecead9e341ab8a) ) + ROM_LOAD( "bbtime.svg", 0, 461605, BAD_DUMP CRC(5b335271) SHA1(46c45b711358e8397ae707668aecead9e341ab8a) ) ROM_END diff --git a/src/mame/drivers/hh_melps4.cpp b/src/mame/drivers/hh_melps4.cpp index f233dc064d7..f5028008831 100644 --- a/src/mame/drivers/hh_melps4.cpp +++ b/src/mame/drivers/hh_melps4.cpp @@ -246,7 +246,7 @@ WRITE8_MEMBER(cfrogger_state::plate_w) if (offset == MELPS4_PORTF) m_inp_mux = data & 3; - // Sx,Fx,Gx: vfd matrix plate + // Sx,Fx,Gx: vfd plate int mask = (offset == MELPS4_PORTS) ? 0xff : 0xf; // port S is 8-bit int shift = (offset == MELPS4_PORTS) ? 0 : (offset + 1) * 4; m_plate = (m_plate & ~(mask << shift)) | (data << shift); @@ -255,7 +255,7 @@ WRITE8_MEMBER(cfrogger_state::plate_w) WRITE16_MEMBER(cfrogger_state::grid_w) { - // D0-D11: vfd matrix grid + // D0-D11: vfd grid m_grid = data; prepare_display(); } @@ -362,7 +362,7 @@ WRITE8_MEMBER(gjungler_state::plate_w) if (offset == MELPS4_PORTG) m_inp_mux = data & 3; - // Sx,Fx,Gx,U: vfd matrix plate + // Sx,Fx,Gx,U: vfd plate int mask = (offset == MELPS4_PORTS) ? 0xff : 0xf; // port S is 8-bit int shift = (offset == MELPS4_PORTS) ? 0 : (offset + 1) * 4; m_plate = (m_plate & ~(mask << shift)) | (data << shift); @@ -371,7 +371,7 @@ WRITE8_MEMBER(gjungler_state::plate_w) WRITE16_MEMBER(gjungler_state::grid_w) { - // D0-D11: vfd matrix grid + // D0-D11: vfd grid m_grid = data; prepare_display(); } diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index c7637b3653e..6ee872aa1d6 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -11,7 +11,7 @@ MAME external artwork is recommended for the backgrounds inlays. TODO: - - improve LCD segments in SVGs for: gnw_mc25, gnw_eg26, exospace + - improve/redo SVGs of: gnw_mc25, gnw_eg26, exospace - confirm gnw_mc25/gnw_eg26 rom (dumped from Soviet clone, but pretty confident that it's same) ***************************************************************************/ @@ -2677,7 +2677,7 @@ ROM_START( gnw_mc25 ) ROM_LOAD( "mc-25", 0x0000, 0x0740, BAD_DUMP CRC(cb820c32) SHA1(7e94fc255f32db725d5aa9e196088e490c1a1443) ) // dumped from Soviet clone ROM_REGION( 102453, "svg", 0) - ROM_LOAD( "gnw_mc25.svg", 0, 102453, CRC(88cc7c49) SHA1(c000d51d1b99750116b97f9bafc0314ea506366d) ) + ROM_LOAD( "gnw_mc25.svg", 0, 102453, BAD_DUMP CRC(88cc7c49) SHA1(c000d51d1b99750116b97f9bafc0314ea506366d) ) ROM_END ROM_START( gnw_eg26 ) @@ -2685,7 +2685,7 @@ ROM_START( gnw_eg26 ) ROM_LOAD( "eg-26", 0x0000, 0x0740, BAD_DUMP CRC(cb820c32) SHA1(7e94fc255f32db725d5aa9e196088e490c1a1443) ) // dumped from Soviet clone ROM_REGION( 102848, "svg", 0) - ROM_LOAD( "gnw_eg26.svg", 0, 102848, CRC(742c2605) SHA1(984d430ad2ff47ad7a3f9b25b7d3f3d51b10cca5) ) + ROM_LOAD( "gnw_eg26.svg", 0, 102848, BAD_DUMP CRC(742c2605) SHA1(984d430ad2ff47ad7a3f9b25b7d3f3d51b10cca5) ) ROM_END ROM_START( nupogodi ) @@ -2701,7 +2701,7 @@ ROM_START( exospace ) ROM_LOAD( "exospace.bin", 0x0000, 0x0740, CRC(553e2b09) SHA1(2b74f8437b881fbb62b61f25435a5bfc66872a9a) ) ROM_REGION( 66790, "svg", 0) - ROM_LOAD( "exospace.svg", 0, 66790, CRC(df31043a) SHA1(2d8caf42894df699e469652e5f448beaebbcc1ae) ) + ROM_LOAD( "exospace.svg", 0, 66790, BAD_DUMP CRC(df31043a) SHA1(2d8caf42894df699e469652e5f448beaebbcc1ae) ) ROM_END @@ -2811,8 +2811,8 @@ ROM_START( taltbeast ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "m88", 0x0000, 0x1000, CRC(1b3d15e7) SHA1(78371230dff872d6c07eefdbc4856c2a3336eb61) ) - ROM_REGION( 668221, "svg", 0) - ROM_LOAD( "taltbeast.svg", 0, 668221, CRC(9b41b5b9) SHA1(4c520f917572894a2f0ab92efbd344c6bc6deccc) ) + ROM_REGION( 667887, "svg", 0) + ROM_LOAD( "taltbeast.svg", 0, 667887, CRC(1ca9bbf1) SHA1(be844dddee4a95f70ea2adf875d3ee6cda2a6633) ) ROM_END diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index 89c6af6bd94..be2a9f5bf23 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -53,10 +53,10 @@ @MP1312 TMS1100 1983, Gakken FX-Micom R-165/Tandy Radio Shack Science Fair Microcomputer Trainer *MP1359 TMS1100? 1985, Capsela CRC2000 @MP1525 TMS1170 1980, Coleco Head to Head Baseball - *MP1604 TMS1370 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 + @MP1604 TMS1370 1982, Gakken Invader 2000/Tandy Cosmic Fire Away 3000 @MP1801 TMS1700 1981, Tiger Ditto/Tandy Pocket Repeat (model 60-2152) @MP2105 TMS1370 1979, Gakken/Entex Poker (6005) - @MP2139 TMS1370 1982, Gakken Galaxy Invader 1000/Tandy Cosmic 1000 Fire Away + @MP2139 TMS1370 1981, Gakken Galaxy Invader 1000/Tandy Cosmic 1000 Fire Away @MP2726 TMS1040 1979, Tomy Break Up *MP2788 TMS1040? 1980, Bandai Flight Time (? note: VFD-capable) @MP3005 TMS1730 1989, Tiger Copy Cat (model 7-522) @@ -4398,8 +4398,8 @@ WRITE16_MEMBER(ginv1000_state::write_r) // R8,R15: input mux m_inp_mux = (data >> 8 & 1) | (data >> 14 & 2); - // R1-R10: VFD matrix grid - // R11-R14: VFD matrix plate + // R1-R10: VFD grid + // R11-R14: VFD plate m_grid = data >> 1 & 0x3ff; m_plate = (m_plate & 0xff) | (data >> 3 & 0xf00); prepare_display(); @@ -4407,14 +4407,14 @@ WRITE16_MEMBER(ginv1000_state::write_r) WRITE16_MEMBER(ginv1000_state::write_o) { - // O0-O7: VFD matrix plate + // O0-O7: VFD plate m_plate = (m_plate & ~0xff) | data; prepare_display(); } READ8_MEMBER(ginv1000_state::read_k) { - // K: multiplexed inputs (K8 is fire button) + // K1,K2: multiplexed inputs (K8 is fire button) return m_inp_matrix[2]->read() | read_inputs(2); } @@ -4464,6 +4464,142 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Gakken Invader 2000 + * TMS1370(28 pins) MP1604 (die label 1370A MP1604) + * TMS1024 I/O expander + * cyan/red/green VFD display, 1-bit sound + + known releases: + - World: Invader 2000 + - USA(1): Galaxy Invader 10000, published by CGL + - USA(2): Cosmic 3000 Fire Away, published by Tandy + +***************************************************************************/ + +class ginv2000_state : public hh_tms1k_state +{ +public: + ginv2000_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_tms1k_state(mconfig, type, tag), + m_expander(*this, "expander") + { } + + required_device m_expander; + DECLARE_WRITE8_MEMBER(expander_w); + + void prepare_display(); + virtual DECLARE_WRITE16_MEMBER(write_r); + virtual DECLARE_WRITE16_MEMBER(write_o); + virtual DECLARE_READ8_MEMBER(read_k); + +protected: + virtual void machine_reset() override; +}; + +// handlers + +void ginv2000_state::prepare_display() +{ + display_matrix(16, 10, m_plate, m_grid); +} + +WRITE8_MEMBER(ginv2000_state::expander_w) +{ + // TMS1024 port 4-7: VFD plate + int shift = (offset - tms1024_device::PORT4) * 4; + m_plate = (m_plate & ~(0xf << shift)) | (data << shift); + prepare_display(); +} + +WRITE16_MEMBER(ginv2000_state::write_r) +{ + // R0: speaker out + m_speaker->level_w(data & 1); + + // R11,R12: input mux + m_inp_mux = data >> 11 & 3; + + // R11,R12: TMS1024 S1,S0 (S2 forced high) + // R13: TMS1024 STD + m_expander->write_s(space, 0, (data >> 12 & 1) | (data >> 10 & 2) | 4); + m_expander->write_std(data >> 13 & 1); + + // R1-R10: VFD grid + m_grid = data >> 1 & 0x3ff; + prepare_display(); +} + +WRITE16_MEMBER(ginv2000_state::write_o) +{ + // O4-O7: TMS1024 H1-H4 + m_expander->write_h(space, 0, data >> 4 & 0xf); +} + +READ8_MEMBER(ginv2000_state::read_k) +{ + // K1,K2: multiplexed inputs (K8 is fire button) + return m_inp_matrix[2]->read() | read_inputs(2); +} + + +// config + +static INPUT_PORTS_START( ginv2000 ) + PORT_START("IN.0") // R11 + PORT_CONFNAME( 0x03, 0x01, DEF_STR( Difficulty ) ) + PORT_CONFSETTING( 0x01, "1" ) + PORT_CONFSETTING( 0x02, "2" ) + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // R12 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // K8 + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) +INPUT_PORTS_END + +void ginv2000_state::machine_reset() +{ + hh_tms1k_state::machine_reset(); + m_expander->write_ms(1); // Vss +} + +static MACHINE_CONFIG_START( ginv2000 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", TMS1370, 425000) // approximation - RC osc. R=36K, C=47pF + MCFG_TMS1XXX_READ_K_CB(READ8(ginv2000_state, read_k)) + MCFG_TMS1XXX_WRITE_R_CB(WRITE16(ginv2000_state, write_r)) + MCFG_TMS1XXX_WRITE_O_CB(WRITE16(ginv2000_state, write_o)) + + MCFG_DEVICE_ADD("expander", TMS1024, 0) + MCFG_TMS1025_WRITE_PORT_CB(PORT4, WRITE8(ginv2000_state, expander_w)) + MCFG_TMS1025_WRITE_PORT_CB(PORT5, WRITE8(ginv2000_state, expander_w)) + MCFG_TMS1025_WRITE_PORT_CB(PORT6, WRITE8(ginv2000_state, expander_w)) + MCFG_TMS1025_WRITE_PORT_CB(PORT7, WRITE8(ginv2000_state, expander_w)) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(364, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 364-1, 0, 1080-1) + MCFG_DEFAULT_LAYOUT(layout_svg) + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Gakken FX-Micom R-165 @@ -9335,6 +9471,20 @@ ROM_START( ginv1000 ) ROM_END +ROM_START( ginv2000 ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD( "mp1604", 0x0000, 0x0800, CRC(f1646d0b) SHA1(65601931d81e3eef7bf22a08de5a146910ce8137) ) + + ROM_REGION( 867, "maincpu:mpla", 0 ) + ROM_LOAD( "tms1100_common2_micro.pla", 0, 867, CRC(7cc90264) SHA1(c6e1cf1ffb178061da9e31858514f7cd94e86990) ) + ROM_REGION( 365, "maincpu:opla", 0 ) + ROM_LOAD( "tms1100_ginv2000_output.pla", 0, 365, CRC(520bb003) SHA1(1640ae54f8dcc257e0ad0cbe0281b38fcbd8da35) ) + + ROM_REGION( 374443, "svg", 0) + ROM_LOAD( "ginv2000.svg", 0, 374443, CRC(a4ce1e6d) SHA1(57d9ff05d634a8d495b9d544a2a959790cd10b6b) ) +ROM_END + + ROM_START( fxmcr165 ) ROM_REGION( 0x0800, "maincpu", 0 ) ROM_LOAD( "mp1312", 0x0000, 0x0800, CRC(6efc8bcc) SHA1(ced8a02b472a3178073691d3dccc0f19f57428fd) ) @@ -9809,7 +9959,8 @@ CONS( 1979, f3in1, 0, 0, f3in1, f3in1, f3in1_state, 0, CONS( 1979, gpoker, 0, 0, gpoker, gpoker, gpoker_state, 0, "Gakken", "Poker (Gakken, 1979 version)", MACHINE_SUPPORTS_SAVE ) CONS( 1980, gjackpot, 0, 0, gjackpot, gjackpot, gjackpot_state, 0, "Gakken", "Jackpot: Gin Rummy & Black Jack", MACHINE_SUPPORTS_SAVE ) -CONS( 1982, ginv1000, 0, 0, ginv1000, ginv1000, ginv1000_state, 0, "Gakken", "Galaxy Invader 1000", MACHINE_SUPPORTS_SAVE ) +CONS( 1981, ginv1000, 0, 0, ginv1000, ginv1000, ginv1000_state, 0, "Gakken", "Galaxy Invader 1000", MACHINE_SUPPORTS_SAVE ) +CONS( 1982, ginv2000, 0, 0, ginv2000, ginv2000, ginv2000_state, 0, "Gakken", "Invader 2000", MACHINE_SUPPORTS_SAVE ) COMP( 1983, fxmcr165, 0, 0, fxmcr165, fxmcr165, fxmcr165_state, 0, "Gakken", "FX-Micom R-165", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) CONS( 1979, elecdet, 0, 0, elecdet, elecdet, elecdet_state, 0, "Ideal", "Electronic Detective", MACHINE_SUPPORTS_SAVE ) // *** diff --git a/src/mame/drivers/hh_ucom4.cpp b/src/mame/drivers/hh_ucom4.cpp index 11a92566f36..bad818daab8 100644 --- a/src/mame/drivers/hh_ucom4.cpp +++ b/src/mame/drivers/hh_ucom4.cpp @@ -288,7 +288,7 @@ void ufombs_state::prepare_display() WRITE8_MEMBER(ufombs_state::grid_w) { - // F,G,H0: vfd matrix grid + // F,G,H0: vfd grid int shift = (offset - NEC_UCOM4_PORTF) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -296,7 +296,7 @@ WRITE8_MEMBER(ufombs_state::grid_w) WRITE8_MEMBER(ufombs_state::plate_w) { - // C,D012,I: vfd matrix plate + // C,D012,I: vfd plate int shift = (offset == NEC_UCOM4_PORTI) ? 8 : (offset - NEC_UCOM4_PORTC) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -400,7 +400,7 @@ void ssfball_state::prepare_display() WRITE8_MEMBER(ssfball_state::grid_w) { - // C,D(,E3): vfd matrix grid 0-7(,8) + // C,D(,E3): vfd grid 0-7(,8) int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -410,7 +410,7 @@ WRITE8_MEMBER(ssfball_state::plate_w) { m_port[offset] = data; - // E,F,G,H,I(not all!): vfd matrix plate + // E,F,G,H,I(not all!): vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -418,7 +418,7 @@ WRITE8_MEMBER(ssfball_state::plate_w) m_inp_mux = (m_port[NEC_UCOM4_PORTF] >> 3 & 1) | (m_port[NEC_UCOM4_PORTG] >> 2 & 2); m_speaker->level_w(m_inp_mux); - // E3: vfd matrix grid 8 + // E3: vfd grid 8 if (offset == NEC_UCOM4_PORTE) grid_w(space, offset, data >> 3 & 1); else @@ -548,7 +548,7 @@ WRITE8_MEMBER(bmsoccer_state::grid_w) if (offset == NEC_UCOM4_PORTC) m_inp_mux = data & 3; - // C,D(,E3): vfd matrix grid + // C,D(,E3): vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -560,7 +560,7 @@ WRITE8_MEMBER(bmsoccer_state::plate_w) if (offset == NEC_UCOM4_PORTG) m_speaker->level_w(data >> 3 & 1); - // E012,F012,G012,H,I: vfd matrix plate + // E012,F012,G012,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -668,7 +668,7 @@ void bmsafari_state::prepare_display() WRITE8_MEMBER(bmsafari_state::grid_w) { - // C,D(,E3): vfd matrix grid + // C,D(,E3): vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -676,7 +676,7 @@ WRITE8_MEMBER(bmsafari_state::grid_w) WRITE8_MEMBER(bmsafari_state::plate_w) { - // E012,H,I: vfd matrix plate + // E012,H,I: vfd plate int shift = (offset == NEC_UCOM4_PORTE) ? 8 : (offset - NEC_UCOM4_PORTH) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -777,14 +777,14 @@ void splasfgt_state::prepare_display() WRITE8_MEMBER(splasfgt_state::grid_w) { - // G,H,I0: vfd matrix grid + // G,H,I0: vfd grid int shift = (offset - NEC_UCOM4_PORTG) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); // G(grid 0-3): input mux m_inp_mux = m_grid & 0xf; - // I2: vfd matrix plate 6 + // I2: vfd plate 6 if (offset == NEC_UCOM4_PORTI) plate_w(space, 4 + NEC_UCOM4_PORTC, data >> 2 & 1); else @@ -797,7 +797,7 @@ WRITE8_MEMBER(splasfgt_state::plate_w) if (offset == NEC_UCOM4_PORTF) m_speaker->level_w(data & 3); - // C,D,E,F23(,I2): vfd matrix plate + // C,D,E,F23(,I2): vfd plate int shift = (offset - NEC_UCOM4_PORTC) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -934,7 +934,7 @@ WRITE8_MEMBER(bcclimbr_state::grid_w) if (offset == NEC_UCOM4_PORTI) m_speaker->level_w(data >> 2 & 1); - // H,I01: vfd matrix grid + // H,I01: vfd grid int shift = (offset - NEC_UCOM4_PORTH) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -942,7 +942,7 @@ WRITE8_MEMBER(bcclimbr_state::grid_w) WRITE8_MEMBER(bcclimbr_state::plate_w) { - // C,D,E,F: vfd matrix plate + // C,D,E,F: vfd plate int shift = (offset - NEC_UCOM4_PORTC) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1152,7 +1152,7 @@ WRITE8_MEMBER(invspace_state::grid_w) if (offset == NEC_UCOM4_PORTI) m_speaker->level_w(data & 1); - // C,D,I1: vfd matrix grid + // C,D,I1: vfd grid int shift = (offset == NEC_UCOM4_PORTI) ? 8 : (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1160,7 +1160,7 @@ WRITE8_MEMBER(invspace_state::grid_w) WRITE8_MEMBER(invspace_state::plate_w) { - // E,F,G,H123: vfd matrix plate + // E,F,G,H123: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1253,7 +1253,7 @@ WRITE8_MEMBER(efball_state::grid_w) if (offset == NEC_UCOM4_PORTH) m_speaker->level_w(data >> 2 & 1); - // F,G,H01: vfd matrix grid + // F,G,H01: vfd grid int shift = (offset - NEC_UCOM4_PORTF) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1261,7 +1261,7 @@ WRITE8_MEMBER(efball_state::grid_w) WRITE8_MEMBER(efball_state::plate_w) { - // D,E,I: vfd matrix plate + // D,E,I: vfd plate int shift = (offset == NEC_UCOM4_PORTI) ? 8 : (offset - NEC_UCOM4_PORTD) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1367,7 +1367,7 @@ WRITE8_MEMBER(galaxy2_state::grid_w) if (offset == NEC_UCOM4_PORTE) m_speaker->level_w(data >> 3 & 1); - // C,D,E01: vfd matrix grid + // C,D,E01: vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1375,7 +1375,7 @@ WRITE8_MEMBER(galaxy2_state::grid_w) WRITE8_MEMBER(galaxy2_state::plate_w) { - // F,G,H,I: vfd matrix plate + // F,G,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTF) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1474,7 +1474,7 @@ void astrocmd_state::prepare_display() WRITE8_MEMBER(astrocmd_state::grid_w) { - // C,D(,E3): vfd matrix grid + // C,D(,E3): vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1482,7 +1482,7 @@ WRITE8_MEMBER(astrocmd_state::grid_w) WRITE8_MEMBER(astrocmd_state::plate_w) { - // E01,F,G,H,I: vfd matrix plate + // E01,F,G,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -1491,7 +1491,7 @@ WRITE8_MEMBER(astrocmd_state::plate_w) // E2: speaker out m_speaker->level_w(data >> 2 & 1); - // E3: vfd matrix grid 8 + // E3: vfd grid 8 grid_w(space, offset, data >> 3 & 1); } else @@ -1576,7 +1576,7 @@ public: WRITE8_MEMBER(edracula_state::grid_w) { - // C,D: vfd matrix grid + // C,D: vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); display_matrix(18, 8, m_plate, m_grid); @@ -1588,7 +1588,7 @@ WRITE8_MEMBER(edracula_state::plate_w) if (offset == NEC_UCOM4_PORTI) m_speaker->level_w(data >> 2 & 1); - // E,F,G,H,I01: vfd matrix plate + // E,F,G,H,I01: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); display_matrix(18, 8, m_plate, m_grid); @@ -1753,7 +1753,7 @@ void mvbfree_state::prepare_display() WRITE8_MEMBER(mvbfree_state::grid_w) { - // E23,F,G,H: vfd matrix grid + // E23,F,G,H: vfd grid int shift = (offset - NEC_UCOM4_PORTE) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); @@ -1766,7 +1766,7 @@ WRITE8_MEMBER(mvbfree_state::grid_w) WRITE8_MEMBER(mvbfree_state::plate_w) { - // C,D(,E01): vfd matrix plate + // C,D(,E01): vfd plate int shift = (offset - NEC_UCOM4_PORTC) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1978,7 +1978,7 @@ WRITE8_MEMBER(tccombat_state::grid_w) if (offset == NEC_UCOM4_PORTI) m_speaker->level_w(data >> 1 & 1); - // C,D,I0: vfd matrix grid + // C,D,I0: vfd grid int shift = (offset == NEC_UCOM4_PORTI) ? 8 : (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -1986,7 +1986,7 @@ WRITE8_MEMBER(tccombat_state::grid_w) WRITE8_MEMBER(tccombat_state::plate_w) { - // E,F123,G,H: vfd matrix plate + // E,F123,G,H: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2074,7 +2074,7 @@ protected: WRITE8_MEMBER(tmtennis_state::grid_w) { - // G,H,I: vfd matrix grid + // G,H,I: vfd grid int shift = (offset - NEC_UCOM4_PORTG) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); display_matrix(12, 12, m_plate, m_grid); @@ -2082,7 +2082,7 @@ WRITE8_MEMBER(tmtennis_state::grid_w) WRITE8_MEMBER(tmtennis_state::plate_w) { - // C,D,F: vfd matrix plate + // C,D,F: vfd plate int shift = (offset == NEC_UCOM4_PORTF) ? 8 : (offset - NEC_UCOM4_PORTC) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); display_matrix(12, 12, m_plate, m_grid); @@ -2236,7 +2236,7 @@ void tmpacman_state::prepare_display() WRITE8_MEMBER(tmpacman_state::grid_w) { - // C,D: vfd matrix grid + // C,D: vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2248,7 +2248,7 @@ WRITE8_MEMBER(tmpacman_state::plate_w) if (offset == NEC_UCOM4_PORTE) m_speaker->level_w(data >> 1 & 1); - // E023,F,G,H,I: vfd matrix plate + // E023,F,G,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2344,7 +2344,7 @@ WRITE8_MEMBER(tmscramb_state::grid_w) if (offset == NEC_UCOM4_PORTI) m_speaker->level_w(data >> 2 & 1); - // C,D,I01: vfd matrix grid + // C,D,I01: vfd grid int shift = (offset == NEC_UCOM4_PORTI) ? 8 : (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2352,7 +2352,7 @@ WRITE8_MEMBER(tmscramb_state::grid_w) WRITE8_MEMBER(tmscramb_state::plate_w) { - // E,F,G,H: vfd matrix plate + // E,F,G,H: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2443,7 +2443,7 @@ void tcaveman_state::prepare_display() WRITE8_MEMBER(tcaveman_state::grid_w) { - // C,D: vfd matrix grid + // C,D: vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2455,7 +2455,7 @@ WRITE8_MEMBER(tcaveman_state::plate_w) if (offset == NEC_UCOM4_PORTE) m_speaker->level_w(data >> 3 & 1); - // E012,F,G,H,I: vfd matrix plate + // E012,F,G,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); prepare_display(); @@ -2537,7 +2537,7 @@ WRITE8_MEMBER(alnchase_state::output_w) { if (offset <= NEC_UCOM4_PORTE) { - // C,D,E0: vfd matrix grid + // C,D,E0: vfd grid int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); @@ -2552,7 +2552,7 @@ WRITE8_MEMBER(alnchase_state::output_w) if (offset >= NEC_UCOM4_PORTE) { - // E23,F,G,H,I: vfd matrix plate + // E23,F,G,H,I: vfd plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = ((m_plate << 2 & ~(0xf << shift)) | (data << shift)) >> 2; } diff --git a/src/mame/mame.lst b/src/mame/mame.lst index d60e4454791..485c5582acc 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14756,6 +14756,7 @@ f2pbball // Fonas f3in1 // Fonas fxmcr165 // Gakken ginv1000 // Gakken +ginv2000 // Gakken gjackpot // Gakken gpoker // Gakken h2hbaseb // Coleco -- cgit v1.2.3-70-g09d2 From 9f7efce3d6afdecbf783bc9f5c3fb6c603d1c049 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 6 Dec 2017 21:41:35 -0500 Subject: Fix build (nw) --- src/frontend/mame/ui/filesel.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp index 3477fa416b1..c64dcc5001e 100644 --- a/src/frontend/mame/ui/filesel.cpp +++ b/src/frontend/mame/ui/filesel.cpp @@ -55,6 +55,7 @@ menu_file_selector::menu_file_selector(mame_ui_manager &mui, render_container &c , m_has_create(has_create) , m_result(result) { + (void)m_image; } -- cgit v1.2.3-70-g09d2 From ab9396830799f43d10b9cb463a3df3a12f727656 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 6 Dec 2017 21:51:46 -0500 Subject: Fix watchpoint hit message for address-shifted processors (nw) --- src/emu/debug/debugcpu.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index 38b21a8bd7f..17c26191186 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -2790,14 +2790,14 @@ void debugger_cpu::watchpoint_check(address_space& space, int type, offs_t addre if (type & WATCHPOINT_WRITE) { - buffer = string_format("Stopped at watchpoint %X writing %s to %08X (PC=%X)", wp->index(), sizes[size], space.byte_to_address(address), pc); + buffer = string_format("Stopped at watchpoint %X writing %s to %08X (PC=%X)", wp->index(), sizes[size], address, pc); if (value_to_write >> 32) buffer.append(string_format(" (data=%X%08X)", u32(value_to_write >> 32), u32(value_to_write))); else buffer.append(string_format(" (data=%X)", u32(value_to_write))); } else - buffer = string_format("Stopped at watchpoint %X reading %s from %08X (PC=%X)", wp->index(), sizes[size], space.byte_to_address(address), pc); + buffer = string_format("Stopped at watchpoint %X reading %s from %08X (PC=%X)", wp->index(), sizes[size], address, pc); m_machine.debugger().console().printf("%s\n", buffer.c_str()); space.device().debug()->compute_debug_flags(); } -- cgit v1.2.3-70-g09d2 From 90f59a5f33ab965db9653e3786e6049f4b8a7bc0 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 6 Dec 2017 23:04:29 -0500 Subject: xtheball: Add addressable latches (nw) --- src/devices/cpu/tms34010/34010gfx.hxx | 4 +- src/mame/drivers/xtheball.cpp | 98 ++++++++++++----------------------- 2 files changed, 34 insertions(+), 68 deletions(-) diff --git a/src/devices/cpu/tms34010/34010gfx.hxx b/src/devices/cpu/tms34010/34010gfx.hxx index 410b2d3a06a..eaab6863913 100644 --- a/src/devices/cpu/tms34010/34010gfx.hxx +++ b/src/devices/cpu/tms34010/34010gfx.hxx @@ -207,7 +207,7 @@ int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partia /* Shift register handling */ void tms340x0_device::memory_w(address_space &space, offs_t offset,uint16_t data) { - logerror("memory_w %08x %04x\n", offset << 3, data); + //logerror("memory_w %08x %04x\n", offset << 3, data); if((offset << 3) == 0x02005010 && data == 0x0000) { machine().debug_break(); // abort(); @@ -222,7 +222,7 @@ uint16_t tms340x0_device::memory_r(address_space &space, offs_t offset) void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,uint16_t data) { - logerror("shiftreg_w %08x %04x\n", offset << 3, data); + //logerror("shiftreg_w %08x %04x\n", offset << 3, data); if (!m_from_shiftreg_cb.isnull()) m_from_shiftreg_cb(space, offset, &m_shiftreg[0]); else diff --git a/src/mame/drivers/xtheball.cpp b/src/mame/drivers/xtheball.cpp index 4a740162463..56209fdd64d 100644 --- a/src/mame/drivers/xtheball.cpp +++ b/src/mame/drivers/xtheball.cpp @@ -10,6 +10,7 @@ #include "emu.h" #include "cpu/tms34010/tms34010.h" +#include "machine/74259.h" #include "machine/ticket.h" #include "machine/nvram.h" #include "machine/watchdog.h" @@ -42,12 +43,13 @@ public: required_shared_ptr m_vram_bg; required_shared_ptr m_vram_fg; + bool m_foreground_mode; + required_ioport m_analog_x; required_ioport m_analog_y; - uint8_t m_bitvals[32]; - - DECLARE_WRITE16_MEMBER(bit_controls_w); + DECLARE_WRITE_LINE_MEMBER(start_lamp_w); + DECLARE_WRITE_LINE_MEMBER(foreground_mode_w); DECLARE_READ16_MEMBER(analogx_r); DECLARE_READ16_MEMBER(analogy_watchdog_r); @@ -61,7 +63,7 @@ public: void xtheball_state::machine_start() { - save_item(NAME(m_bitvals)); + save_item(NAME(m_foreground_mode)); } /************************************* @@ -78,8 +80,8 @@ TMS340X0_SCANLINE_RGB32_CB_MEMBER(xtheball_state::scanline_update) int coladdr = params->coladdr; int x; - /* bit value 0x13 controls which foreground mode to use */ - if (!m_bitvals[0x13]) + /* bit stored at 3040130 controls which foreground mode to use */ + if (!m_foreground_mode) { /* mode 0: foreground is the same as background */ uint16_t *srcfg = &m_vram_fg[(params->rowaddr << 8) & 0xff00]; @@ -148,65 +150,14 @@ TMS340X0_FROM_SHIFTREG_CB_MEMBER(xtheball_state::from_shiftreg) * *************************************/ -WRITE16_MEMBER(xtheball_state::bit_controls_w) +WRITE_LINE_MEMBER(xtheball_state::start_lamp_w) { - uint8_t *bitvals = m_bitvals; - if (ACCESSING_BITS_0_7) - { - if (bitvals[offset] != (data & 1)) - { - logerror("%08x:bit_controls_w(%x,%d)\n", space.device().safe_pc(), offset, data & 1); - - switch (offset) - { - case 7: - m_ticket->motor_w(data & 1); - break; - - case 8: - output().set_led_value(0, data & 1); - break; - } - } - bitvals[offset] = data & 1; - } -// popmessage("%d%d%d%d-%d%d%d%d--%d%d%d%d-%d%d%d%d", -/* - bitvals[0], - bitvals[1], - bitvals[2], - bitvals[3], - bitvals[4], // meter - bitvals[5], - bitvals[6], // tickets - bitvals[7], // tickets - bitvals[8], // start lamp - bitvals[9], // lamp - bitvals[10], // lamp - bitvals[11], // lamp - bitvals[12], // lamp - bitvals[13], // lamp - bitvals[14], // lamp - bitvals[15] // lamp -*/ -/* bitvals[16], - bitvals[17], - bitvals[18], - bitvals[19], // video foreground control - bitvals[20], - bitvals[21], - bitvals[22], - bitvals[23], - bitvals[24], - bitvals[25], - bitvals[26], - bitvals[27], - bitvals[28], - bitvals[29], - bitvals[30], - bitvals[31] -*/ -// ); + output().set_led_value(0, state); +} + +WRITE_LINE_MEMBER(xtheball_state::foreground_mode_w) +{ + m_foreground_mode = state; } @@ -243,8 +194,10 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, xtheball_state ) AM_RANGE(0x01000000, 0x010fffff) AM_RAM AM_SHARE("vrabg") AM_RANGE(0x02000000, 0x020fffff) AM_RAM AM_SHARE("vrafg") AM_RANGE(0x03000000, 0x030000ff) AM_DEVREADWRITE8("tlc34076", tlc34076_device, read, write, 0x00ff) - AM_RANGE(0x03040000, 0x030401ff) AM_WRITE(bit_controls_w) + AM_RANGE(0x03020000, 0x0302005f) AM_UNMAP // looks like a CRTC of some sort + AM_RANGE(0x03040000, 0x0304007f) AM_DEVWRITE8("latch1", ls259_device, write_d0, 0x00ff) AM_RANGE(0x03040080, 0x0304008f) AM_READ_PORT("DSW") + AM_RANGE(0x03040080, 0x030400ff) AM_DEVWRITE8("latch2", ls259_device, write_d0, 0x00ff) AM_RANGE(0x03040100, 0x0304010f) AM_READ(analogx_r) AM_RANGE(0x03040110, 0x0304011f) AM_READ_PORT("COIN1") AM_RANGE(0x03040130, 0x0304013f) AM_READ_PORT("SERVICE2") @@ -252,7 +205,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, xtheball_state ) AM_RANGE(0x03040150, 0x0304015f) AM_READ_PORT("BUTTON1") AM_RANGE(0x03040160, 0x0304016f) AM_READ_PORT("SERVICE") AM_RANGE(0x03040170, 0x0304017f) AM_READ_PORT("SERVICE1") - AM_RANGE(0x03040180, 0x0304018f) AM_READ(analogy_watchdog_r) + AM_RANGE(0x03040100, 0x0304017f) AM_DEVWRITE8("latch3", ls259_device, write_d0, 0x00ff) + AM_RANGE(0x03040180, 0x0304018f) AM_READ(analogy_watchdog_r) AM_WRITENOP AM_RANGE(0x03060000, 0x0306000f) AM_DEVWRITE8("dac", dac_byte_interface, write, 0xff00) AM_RANGE(0x04000000, 0x057fffff) AM_ROM AM_REGION("user2", 0) AM_RANGE(0xc0000000, 0xc00001ff) AM_DEVREADWRITE("maincpu", tms34010_device, io_register_r, io_register_w) @@ -353,6 +307,18 @@ static MACHINE_CONFIG_START( xtheball ) MCFG_NVRAM_ADD_1FILL("nvram") + MCFG_DEVICE_ADD("latch1", LS259, 0) // exact type uncertain + MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("ticket", ticket_dispenser_device, motor_w)) + // Q4 = meter, Q6 = tickets, Q7 = tickets? + + MCFG_DEVICE_ADD("latch2", LS259, 0) // exact type uncertain + MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(xtheball_state, start_lamp_w)) + // Q0 = start lamp, Q1-Q7 = more lamps? + + MCFG_DEVICE_ADD("latch3", LS259, 0) // exact type uncertain + MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(xtheball_state, foreground_mode_w)) + // Q3 = video foreground control? + MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH) MCFG_WATCHDOG_ADD("watchdog") -- cgit v1.2.3-70-g09d2 From d6601f04833115b0dfc10d24de62c27a30a2931c Mon Sep 17 00:00:00 2001 From: smf- Date: Thu, 7 Dec 2017 10:54:46 +0000 Subject: RF5C400: State save the external memory registers. Move static variable into device state. Fix the commented out osd_printf_debug. Fix "always values". Added skeleton for reading and writing channel register 0x0F (which is used by the beatmania IIDX games). [smf] --- src/devices/sound/rf5c400.cpp | 65 ++++++++++++++++++++++++++++++++----------- src/devices/sound/rf5c400.h | 1 + 2 files changed, 49 insertions(+), 17 deletions(-) diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index c4bf56bc1b0..6c047935399 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -155,6 +155,10 @@ void rf5c400_device::device_start() chan.env_scale = 1.0; } + save_item(NAME(m_rf5c400_status)); + save_item(NAME(m_ext_mem_address)); + save_item(NAME(m_ext_mem_data)); + for (int i = 0; i < ARRAY_LENGTH(m_channels); i++) { save_item(NAME(m_channels[i].startH), i); @@ -314,28 +318,50 @@ void rf5c400_device::rom_bank_updated() /*****************************************************************************/ -static uint16_t rf5c400_status = 0; // a static one of these for all instances of the chip? how does that work? READ16_MEMBER( rf5c400_device::rf5c400_r ) { - switch(offset) + if (offset < 0x400) { - case 0x00: + //osd_printf_debug("%s:rf5c400_r: %08X, %08X\n", machine().describe_context().c_str(), offset, mem_mask); + + switch(offset) { - return rf5c400_status; + case 0x00: + { + return m_rf5c400_status; + } + + case 0x04: // unknown read + { + return 0; + } + + case 0x13: // memory read + { + return read_word(m_ext_mem_address<<1); + } + + default: + { + //osd_printf_debug("%s:rf5c400_r: %08X, %08X\n", machine().describe_context().c_str(), offset, mem_mask); + return 0; + } } + } + else + { + //int ch = (offset >> 5) & 0x1f; + int reg = (offset & 0x1f); - case 0x04: + switch (reg) { + case 0x0F: // unknown read return 0; - } - case 0x13: // memory read - { - return read_word(m_ext_mem_address<<1); + default: + return 0; } } - - return 0; } WRITE16_MEMBER( rf5c400_device::rf5c400_w ) @@ -346,7 +372,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) { case 0x00: { - rf5c400_status = data; + m_rf5c400_status = data; break; } @@ -432,11 +458,11 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) default: { - //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context(), data, offset, mem_mask); + //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context().c_str(), data, offset, mem_mask); break; } } - //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X at %08X\n", machine().describe_context(), data, offset, mem_mask); + //osd_printf_debug("%s:rf5c400_w: %08X, %08X, %08X\n", machine().describe_context().c_str(), data, offset, mem_mask); } else { @@ -505,12 +531,12 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) } case 0x0A: // relative to env attack ? { - // always 0x0100 + // always 0x0100/0x140 break; } case 0x0B: // relative to env decay ? { - // always 0x0100 + // always 0x0100/0x140/0x180 break; } case 0x0C: // env decay @@ -522,7 +548,7 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) } case 0x0D: // relative to env release ? { - // always 0x0100 + // always 0x0100/0x140 break; } case 0x0E: // env release @@ -531,6 +557,11 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w ) channel->release = data; break; } + case 0x0F: // unknown write + { + // always 0x0000 + break; + } case 0x10: // resonance, cutoff freq. { // bit 15-12: resonance diff --git a/src/devices/sound/rf5c400.h b/src/devices/sound/rf5c400.h index 3c365f76e3a..4d681db3a94 100644 --- a/src/devices/sound/rf5c400.h +++ b/src/devices/sound/rf5c400.h @@ -98,6 +98,7 @@ private: rf5c400_channel m_channels[32]; + uint16_t m_rf5c400_status; uint32_t m_ext_mem_address; uint16_t m_ext_mem_data; }; -- cgit v1.2.3-70-g09d2 From 491fbd7e5b3e7bda934039159f1a0b876cae756d Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 7 Dec 2017 10:23:00 +0100 Subject: chqflag.cpp: notes and demotion to IMPERFECT_COLORS / UNEMULATED_PROTECTION (nw) --- src/mame/drivers/chqflag.cpp | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/chqflag.cpp b/src/mame/drivers/chqflag.cpp index 23fa7862807..5068b2311cb 100644 --- a/src/mame/drivers/chqflag.cpp +++ b/src/mame/drivers/chqflag.cpp @@ -5,9 +5,14 @@ Chequered Flag / Checkered Flag (GX717) (c) Konami 1988 Notes: - - 007232 volume & panning control is almost certainly wrong. - - Needs HW tests or side-by-side tests to determine if the protection - is 100% ok now; + - 007232 volume & panning control is almost certainly wrong; + - 051733 opponent cars have wrong RNG colors compared to references; + - 051733 opponent car-to-car collisions direction are wrong, according + to reference orange car should shift to the left instead (current emulation + makes them to wall crash most of the time instead); + - needs proper shadow/highlight factor values for sprites and tilemap; + - compared to references, emulation is a bit slower (around 2/3 seconds + behind on a full lap of stage 2); 2008-07 Dip locations and recommended settings verified with manual @@ -456,5 +461,5 @@ ROM_END // YEAR, NAME, PARENT, MACHINE, INPUT, STATE, INIT, MONITOR, COMPANY, FULLNAME, FLAGS, LAYOUT -GAMEL( 1988, chqflag, 0, chqflag, chqflag, chqflag_state, 0, ROT90, "Konami", "Chequered Flag", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_chqflag ) -GAMEL( 1988, chqflagj, chqflag, chqflag, chqflagj, chqflag_state, 0, ROT90, "Konami", "Chequered Flag (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_chqflag ) +GAMEL( 1988, chqflag, 0, chqflag, chqflag, chqflag_state, 0, ROT90, "Konami", "Chequered Flag", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_chqflag ) +GAMEL( 1988, chqflagj, chqflag, chqflag, chqflagj, chqflag_state, 0, ROT90, "Konami", "Chequered Flag (Japan)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_chqflag ) -- cgit v1.2.3-70-g09d2 From 0e523317175340d886f7e3b45690d9b4694568ad Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 7 Dec 2017 12:34:51 +0100 Subject: archimds.cpp: clean this one (nw) --- src/mame/machine/archimds.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/machine/archimds.cpp b/src/mame/machine/archimds.cpp index 8868f485f1a..f6d2c73ae81 100644 --- a/src/mame/machine/archimds.cpp +++ b/src/mame/machine/archimds.cpp @@ -982,7 +982,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w) for(i=0;i<0x100;i+=0x10) { b = ((val & 0x700) >> 8) | ((i & 0x80) >> 4); - g = ((val & 0x030) >> 4) | ((i & 0x20) >> 3) | ((i & 0x40) >> 3); + g = ((val & 0x030) >> 4) | ((i & 0x60) >> 3); r = ((val & 0x007) >> 0) | ((i & 0x10) >> 1); m_palette->set_pen_color((reg >> 2) + 0x100 + i, pal4bit(r), pal4bit(g), pal4bit(b) ); -- cgit v1.2.3-70-g09d2 From 6e0e4b0f832a696a4e18f806e7b8a21680276fe9 Mon Sep 17 00:00:00 2001 From: smf- Date: Thu, 7 Dec 2017 13:03:57 +0000 Subject: save PPC for rewind in debugger. (nw) --- src/devices/cpu/m6502/m6502.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 2cbded54949..39975d6127b 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -64,6 +64,7 @@ void m6502_device::init() save_item(NAME(PC)); save_item(NAME(NPC)); + save_item(NAME(PPC)); save_item(NAME(A)); save_item(NAME(X)); save_item(NAME(Y)); -- cgit v1.2.3-70-g09d2 From ece4f6d11421dd2637f806ac60f78bdda02e1961 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Thu, 7 Dec 2017 14:26:38 +0100 Subject: Yes another memory window fix (nw) --- src/emu/debug/dvmemory.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/emu/debug/dvmemory.cpp b/src/emu/debug/dvmemory.cpp index fbfd990470f..13297dbe7b9 100644 --- a/src/emu/debug/dvmemory.cpp +++ b/src/emu/debug/dvmemory.cpp @@ -936,13 +936,14 @@ void debug_view_memory::set_data_format(int format) return; pos = begin_update_and_get_cursor_pos(); + const debug_view_memory_source &source = downcast(*m_source); if ((format <= 8) && (m_data_format <= 8)) { - const debug_view_memory_source &source = downcast(*m_source); pos.m_address += (pos.m_shift / 8) ^ ((source.m_endianness == ENDIANNESS_LITTLE) ? 0 : (m_bytes_per_chunk - 1)); pos.m_shift %= 8; m_bytes_per_chunk = format; + m_steps_per_chunk = source.m_space ? source.m_space->byte_to_address(m_bytes_per_chunk) : m_bytes_per_chunk; m_chunks_per_row = m_bytes_per_row / format; if (m_chunks_per_row < 1) m_chunks_per_row = 1; @@ -975,6 +976,7 @@ void debug_view_memory::set_data_format(int format) } } m_chunks_per_row = m_bytes_per_row / m_bytes_per_chunk; + m_steps_per_chunk = source.m_space ? source.m_space->byte_to_address(m_bytes_per_chunk) : m_bytes_per_chunk; pos.m_shift = 0; pos.m_address -= pos.m_address % m_bytes_per_chunk; } -- cgit v1.2.3-70-g09d2 From 6bec01265d403bac70c740e0c3a69c51b3073ba9 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Fri, 8 Dec 2017 00:42:01 +1100 Subject: (nw) fixed typo, and rewind off by default. --- src/emu/debug/debughlp.cpp | 2 +- src/emu/emuopts.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/emu/debug/debughlp.cpp b/src/emu/debug/debughlp.cpp index 3a34030a59f..f25d52b3ae7 100644 --- a/src/emu/debug/debughlp.cpp +++ b/src/emu/debug/debughlp.cpp @@ -462,7 +462,7 @@ static const help_item static_help_list[] = "\n" "The rewind command loads the most recent RAM-based state. Rewind states, when enabled, are " "saved when \"step\", \"over\", or \"out\" command gets executed, storing the machine state as " - "of the moment before actually steping. Consecutively loading rewind states can work like " + "of the moment before actually stepping. Consecutively loading rewind states can work like " "reverse execution. Depending on which steps forward were taken previously, the bahavior can " "be similar to GDB's \"reverse-stepi\" or \"reverse-next\". All output for this command is " "currently echoed into the running machine window. Previous memory and PC tracking statistics " diff --git a/src/emu/emuopts.cpp b/src/emu/emuopts.cpp index 12e674718d9..4fd91155fd2 100644 --- a/src/emu/emuopts.cpp +++ b/src/emu/emuopts.cpp @@ -62,7 +62,7 @@ const options_entry emu_options::s_option_entries[] = { nullptr, nullptr, OPTION_HEADER, "CORE STATE/PLAYBACK OPTIONS" }, { OPTION_STATE, nullptr, OPTION_STRING, "saved state to load" }, { OPTION_AUTOSAVE, "0", OPTION_BOOLEAN, "enable automatic restore at startup, and automatic save at exit time" }, - { OPTION_REWIND, "1", OPTION_BOOLEAN, "enable rewind savestates" }, + { OPTION_REWIND, "0", OPTION_BOOLEAN, "enable rewind savestates" }, { OPTION_REWIND_CAPACITY "(1-500)", "100", OPTION_INTEGER, "quantity of states rewind buffer can contain" }, { OPTION_PLAYBACK ";pb", nullptr, OPTION_STRING, "playback an input file" }, { OPTION_RECORD ";rec", nullptr, OPTION_STRING, "record an input file" }, -- cgit v1.2.3-70-g09d2 From 3379072a5d44c61d421c00c9098babd62045afd8 Mon Sep 17 00:00:00 2001 From: smf- Date: Thu, 7 Dec 2017 14:18:50 +0000 Subject: Fix MAME lockup if you step and PlayStation based game twice then rewind twice (nw) --- src/emu/diexec.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/emu/diexec.cpp b/src/emu/diexec.cpp index 9af197ac5db..d84f3b8f4be 100644 --- a/src/emu/diexec.cpp +++ b/src/emu/diexec.cpp @@ -500,6 +500,8 @@ void device_execute_interface::interface_post_start() // register for save states device().save_pointer(NAME(m_icountptr), 1); + device().save_item(NAME(m_cycles_running)); + device().save_item(NAME(m_cycles_stolen)); device().save_item(NAME(m_suspend)); device().save_item(NAME(m_nextsuspend)); device().save_item(NAME(m_eatcycles)); -- cgit v1.2.3-70-g09d2 From fc710e0786b30208189a6234d45b98e9b75026e7 Mon Sep 17 00:00:00 2001 From: smf- Date: Thu, 7 Dec 2017 14:37:39 +0000 Subject: don't lie (nw) --- src/emu/debug/debugcmd.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp index dd0c918ae6e..1b48be30e1f 100644 --- a/src/emu/debug/debugcmd.cpp +++ b/src/emu/debug/debugcmd.cpp @@ -1646,6 +1646,12 @@ void debugger_commands::execute_stateload(int ref, const std::vector ¶ms) { + if (!m_machine.save().rewind()->enabled()) + { + m_console.printf("Rewind not enabled\n"); + return; + } + m_machine.rewind_step(); // clear all PC & memory tracks -- cgit v1.2.3-70-g09d2 From b2d1b433d1ef85984c8ce3e94f33628b07ef974c Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 09:50:01 -0500 Subject: New machines marked as NOT_WORKING ---------------------------------- Pitch Hitter - Baseball Challenge [unknown] --- scripts/target/mame/arcade.lua | 1 + src/mame/arcade.flt | 1 + src/mame/drivers/nsg6809.cpp | 89 ++++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 ++ 4 files changed, 94 insertions(+) create mode 100644 src/mame/drivers/nsg6809.cpp diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 14acc5ef40a..7d0902de2bd 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -4651,6 +4651,7 @@ files { MAME_DIR .. "src/mame/includes/norautp.h", MAME_DIR .. "src/mame/audio/norautp.cpp", MAME_DIR .. "src/mame/drivers/notechan.cpp", + MAME_DIR .. "src/mame/drivers/nsg6809.cpp", MAME_DIR .. "src/mame/drivers/nsmpoker.cpp", MAME_DIR .. "src/mame/drivers/oneshot.cpp", MAME_DIR .. "src/mame/includes/oneshot.h", diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index 8d4b6247395..453f87a2b92 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -830,6 +830,7 @@ nmk16.cpp norautp.cpp notechan.cpp nova2001.cpp +nsg6809.cpp nsm.cpp nsmpoker.cpp nss.cpp diff --git a/src/mame/drivers/nsg6809.cpp b/src/mame/drivers/nsg6809.cpp new file mode 100644 index 00000000000..b489c604a37 --- /dev/null +++ b/src/mame/drivers/nsg6809.cpp @@ -0,0 +1,89 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*************************************************************************** + + Skeleton driver for National Sports Games' 6809-based mechanical games: + + * Pitch Hitter + * Super Shot (undumped) + + Partial memory map for "Universal Game PCB" in Super Shot schematics: + + 2K SRAM 8K SRAM + JP5-A JP6-B JP7-B JP5-B JP6-A JP7-A + + *AUX3 $6000-$7FFF $6000-$7FFF + *AUX2 $2000-$3FFF $2000-$27FF + *AUX1 $4000-$5FFF $4000-$5FFF + *ASIC $1000-$17FF $3000-$37FF + *VIA $0800-$0FFF $2800-$2FFF + *SRAM $0000-$07FF $0000-$1FFF + DEADMAN $1E00-$1FFF $3E00-$3FFF + *IN-D $1E00-$1FFF $3E00-$3FFF + *OUT-C $1C00-$1DFF $3C00-$3DFF + *IN-C $1C00-$1DFF $3C00-$3DFF + *OUT-B $1A00-$1BFF $3A00-$3BFF + *IN-B $1A00-$1BFF $3A00-$3BFF + *OUT-A $1800-$19FF $3800-$39FF + *IN-A $1800-$19FF $3800-$39FF + +***************************************************************************/ + +#include "emu.h" +#include "cpu/m6809/m6809.h" +#include "machine/6522via.h" +#include "machine/mos6551.h" +#include "machine/watchdog.h" + + +class nsg6809_state : public driver_device +{ +public: + nsg6809_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") {} + + required_device m_maincpu; +}; + + +static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, nsg6809_state ) + AM_RANGE(0x0000, 0x1fff) AM_RAM + AM_RANGE(0x2800, 0x280f) AM_DEVREADWRITE("via", via6522_device, read, write) + AM_RANGE(0x3000, 0x3003) AM_DEVREADWRITE("acia", mos6551_device, read, write) + AM_RANGE(0x3e00, 0x3e00) AM_DEVWRITE("deadman", watchdog_timer_device, reset_w) + AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("maincpu", 0) +ADDRESS_MAP_END + +static INPUT_PORTS_START( pitchhit ) +INPUT_PORTS_END + +static MACHINE_CONFIG_START( pitchhit ) + MCFG_CPU_ADD("maincpu", M6809, XTAL_4MHz / 4) + MCFG_CPU_PROGRAM_MAP(main_map) + + MCFG_DEVICE_ADD("via", VIA6522, XTAL_4MHz / 4) + + MCFG_DEVICE_ADD("acia", MOS6551, 0) + MCFG_MOS6551_XTAL(XTAL_1_8432MHz) + + MCFG_WATCHDOG_ADD("deadman") +MACHINE_CONFIG_END + + +/* + +Pitch Hitter Eprom 27c256 by National Sports Games (aka Skeeball) +location U-14 + +IC label "PH101C" and "CK# $A790" + +*/ + +ROM_START( pitchhit ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "PH101C__CK_A790.U14", 0x0000, 0x8000, CRC(1d306ab7) SHA1(13faf7c6dca8e5482672b2d09a99616896c4ae55) ) +ROM_END + + +GAME(1993, pitchhit, 0, pitchhit, pitchhit, nsg6809_state, 0, ROT0, "National Sports Games", "Pitch Hitter - Baseball Challenge", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 485c5582acc..11c8bde3372 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -29935,6 +29935,9 @@ diablo68 // nocto // npresto // +@source:nsg6809.cpp +pitchhit // + @source:nsm.cpp firebird // -- cgit v1.2.3-70-g09d2 From 0976b0d93478dc0f285777d7f507ac13abe7bb00 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 10:23:14 -0500 Subject: nsg6809.cpp: Note (nw) --- src/mame/drivers/nsg6809.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/nsg6809.cpp b/src/mame/drivers/nsg6809.cpp index b489c604a37..e40d2a472a3 100644 --- a/src/mame/drivers/nsg6809.cpp +++ b/src/mame/drivers/nsg6809.cpp @@ -7,7 +7,7 @@ * Pitch Hitter * Super Shot (undumped) - Partial memory map for "Universal Game PCB" in Super Shot schematics: + Memory map for "Universal Game PCB" in Super Shot schematics: 2K SRAM 8K SRAM JP5-A JP6-B JP7-B JP5-B JP6-A JP7-A @@ -27,6 +27,8 @@ *OUT-A $1800-$19FF $3800-$39FF *IN-A $1800-$19FF $3800-$39FF + "ASIC" is a rather odd thing to call a 6551... + ***************************************************************************/ #include "emu.h" -- cgit v1.2.3-70-g09d2 From 7cf148300dace48ea2e6bc52e673647ea33ba4ce Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 7 Dec 2017 18:53:17 +0100 Subject: williams audio: lower adpcm volume (nw) http://mametesters.org/view.php?id=6780 --- src/mame/audio/williams.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/audio/williams.cpp b/src/mame/audio/williams.cpp index a61e4c28696..473dfe4ea96 100644 --- a/src/mame/audio/williams.cpp +++ b/src/mame/audio/williams.cpp @@ -759,7 +759,7 @@ MACHINE_CONFIG_MEMBER( williams_adpcm_sound_device::device_add_mconfig ) MCFG_OKIM6295_ADD("oki", ADPCM_MASTER_CLOCK/8, PIN7_HIGH) // clock frequency & pin 7 not verified MCFG_DEVICE_ADDRESS_MAP(0, williams_adpcm_oki_map) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.5) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.15) MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From 33e49080e2be819a1f1e88b43ac549e196aac781 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Thu, 7 Dec 2017 18:01:28 +0000 Subject: aristmk5 layout updates [Heihachi_73] (#2901) --- src/mame/drivers/aristmk5.cpp | 279 ++++++++++++----- src/mame/layout/bumblbug.lay | 265 ++++++++++++++++ src/mame/layout/cashchamu.lay | 670 ++++++++++++++++++++++++++++++++++++++++ src/mame/layout/checkma5.lay | 17 +- src/mame/layout/dolphntrceb.lay | 670 ++++++++++++++++++++++++++++++++++++++++ src/mame/layout/swhr2u.lay | 267 ++++++++++++++++ src/mame/layout/yukongl5.lay | 551 +++++++++++++++++++++++++++++++++ src/mame/layout/yukongld.lay | 551 --------------------------------- 8 files changed, 2642 insertions(+), 628 deletions(-) create mode 100644 src/mame/layout/bumblbug.lay create mode 100644 src/mame/layout/cashchamu.lay create mode 100644 src/mame/layout/dolphntrceb.lay create mode 100644 src/mame/layout/swhr2u.lay create mode 100644 src/mame/layout/yukongl5.lay delete mode 100644 src/mame/layout/yukongld.lay diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 377088e535a..28b55596557 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -10,8 +10,11 @@ There are threads that say when running in VGA mode an original AA will play music etc. at half the expected speed, so it is likely that the way the timers work differs in this mode (25Hz instead of 50?) - - Sounds are being output as bleeps and bloops in the older games and New Zealand/touchscreen games - - Games occasionally give a coin diverter fault when inserting coins, mainly with US region games + - Sounds are being output as bleeps and bloops in the older games and New Zealand/touchscreen games. + - Games occasionally give a coin diverter fault when inserting coins, mainly with US region games. + - Early US games will lock up completely if a hand pay is performed, requiring a complete memory reset. + To avoid this until the issue has been fixed, change the hopper and jackpot limits to a very large number + such as 999999 so large wins will be paid via the hopper. Games where the music/sound works do not have this problem. - Venezuelan games give a note acceptor error on boot even if the note acceptor is disabled in the options - qnilebr (actually the 0301718V BIOS itself) won't accept coins on boot until the jackpot reset key is toggled (bug or not?) - Later style games (e.g. with the newer music format) from NSW/ACT and Venezuela lock up (hang) after 50 spins @@ -30,8 +33,8 @@ Casino game EPROMs are loaded in U8/U12 and beyond. Casino games (except qnilebr), as well as games from Queensland and Victoria, require a comms protocol to be emulated, - otherwise they will remain in a disabled state and will not coin up. - As of MAME 0.185, only New Zealand (0700474V) and Brazil (0301718V) BIOSes are dumped. + otherwise they will remain in a disabled state and cannot be played. + Only New Zealand (0700474V) and Brazilian (0301718V) casino BIOSes have been dumped so far. The Brazilian casino BIOS does not use comms, therefore qnilebr is playable. By swapping u7/u11 with the other casino games (goldpyrb/jungjuic/penpir2), these games also become playable. @@ -50,7 +53,8 @@ Other games replace the cards with animations, for example the double up game in Prize Fight bets on which boxer will knock out the other, likewise in Sumo Spins one sumo wrestler will ring-out the other. In both Prize Fight and Sumo Spins the two opponents are wearing either red or black just like the cards they replaced. - The gamble option is not available in the Brazilian casino BIOS. + The gamble feature is not available if a win coincides with a jackpot pay such as a Hyperlink feature. + The gamble option is also not available in the Brazilian casino BIOS. On US machines which do not require set chips, dip switch DSW2-1 enables or disables the double up feature. On US games which do require set chips, the gamble option is in the set chips, if the regional jurisdiction allows for it to be enabled. @@ -58,12 +62,13 @@ Regional button layout differences: US games have the payline buttons on the top row, the player selects the number of lines to be played first before choosing the bet multiplier to spin. + Some US games can have the bet and play line buttons reversed in the set chip options, which creates the same similar button layout as non-US games. Non-US games have the bet buttons on the top row, the player selects the bet multiplier first before selecting the amount of lines to play. An exception to the non-US layout applies if the game only has one payline, for example wamazona. In this case, the bottom row is used for the bet multipliers. Some non-US games default to 1 credit per line when there are zero credits in the machine so that a player does not accidentally bet higher than intended. Some games can be set up to multiple bet and line configurations. Usually this applies to the US set chip games, - however some Australian games also have this option, such as baddog, marmagic, trojhors and tritreat. + however some non-US games also have this option, such as baddog, marmagic, trojhors and tritreat. Multiple button panels are supported as artwork files and can be toggled in MAME's Video Options menu. Some early games such as swhr2a have an option to have either music or coin sounds to be played during a win. @@ -85,19 +90,20 @@ Penguin Pucks(?) - Arctic/Antarctic theme, based on Cash Express. Official name is unknown, this name is found in the strings next to the Penguin Pays game title in pengpuck. Maximillions - Game show style theme, stylized as Maximillion$. A similar game for the US market is Millioniser, stylized as Millioni$er. Scorchin' Fortune - Sports car/racing theme, based on Cash Express. - Born To Be Wild - Motorcycle theme, based on Cash Express, later recycled on MK6 hardware as Thunder Heart (not to be confused with the game itself). + Born To Be Wild - Motorcycle theme, based on Cash Express, later recycled on MK6 hardware as Thunderheart (not to be confused with the game itself, Thunder Heart). Note: The Hyperlink jackpot feature trigger is won at random and is predetermined the instant the player has started a game. Pressing the buttons to stop the Hyperlink reels is only a visual effect with no skill involved, likewise touching the icons to reveal the characters in Maximillions. The jackpot level won (e.g. Grand, Major, Minor or Mini) is also predetermined at the start of the game. - Most Hyperlink games have a set of four eight-digit, 7-segment LEDs installed in the topbox for displaying the progressive jackpots. + Most Hyperlink games have a set of four eight-digit, seven-segment LEDs installed in the topbox for displaying the progressive jackpots. The Grand and Major jackpot displays are larger than the Minor and Mini jackpot displays. There is a discrepancy with some game names between the ROMs and the artwork or even official documents: For example, swhr2 is called Sweethearts II inside the ROM, however on the artwork it is called Sweet Hearts II. Mountain Money displays "MOONSHINE MONEY" when a win with the wild Moonshine occurs. The game itself is not called Moonshine Money. Chicken displays "Chicken Run Feature Completed" at the end of the feature. The game itself is not called Chicken Run. + Thunder Heart is named Thunderheart on the artwork, as well as on the later Hyperlink jackpot games. Some games also have completely different artwork (using the same theme and paytable) but use the same ROMs for another game. Examples are: Heart Throb = Sweethearts II (Heart Throb confirmed as using 0200004V EPROMs) @@ -111,9 +117,9 @@ How to set up the games from scratch: - Standard NSW/ACT games: + Standard NSW/ACT games and variants: - Step 1: Audit key in (F2), open main door (M), and press Collect (A) and the fourth line button (G) together to clear the memory. + Step 1: Audit key in (F2), open the main door (M) and press Collect (A) and the fourth line button (G) together to clear the memory. Note: On 3-payline games, press Collect (A) and Bet 1 Credit (E) to clear the memory. Optionally, the main door can be closed from this point on (press M again). @@ -153,17 +159,67 @@ Step 3: Set everything up as above, open the Security Cage/Logic Door (L), and save the machine options (which now has its own spot on the menu instead of a dedicated button). Close the Security Cage (L) and turn off the Audit key (F2) and the game should be ready to accept credits. - New Zealand machines are usually identical to Australian games except that they normally use NZ $2.00 coins in place of AU $1.00 coins. CCCE comms is not used on New Zealand machines. + New Zealand machines are usually identical to Australian games except that they normally use NZ $2.00 coins in place of AU $1.00 coins, and have smaller but more frequent payouts due to local laws. CCCE comms is not used on New Zealand machines. Brazil [e.g. qnilebr]: This game is similar to the NSW/ACT games however it requires a four-digit setup code before it can be initialized. - By default, this number is 4856. + By default, this number is 4856. After the game has accepted this code, press Collect (A) and Play 7 Lines (G) at the same time to clear the memory. -After the game has accepted this code, press Collect (A) and Play 7 Lines (G) at the same time to clear the memory. - TODO (MK-5 specific): + USA platform, games without set chips: + + Step 1: Set up the DIP switches to the desired values. + + DIP Switch Bank 1 (DSW1) is comprised of coin/credit values. + + The first four switches control the coin (token) type: + 0000 = $0.05 (5 cents/nickels) + 1000 = $0.10 (10 cents/dimes) + 0100 = $0.25 (25 cents/quarters) + 1100 = $0.50 (50 cents/half dollars) + 0010 = $1.00 (dollar coins) + 1010 = $5.00 + 0110 = $10.00 + 1110 = $50.00 + xxx1 = $100.00 (any value with the fourth switch set is $100.00) + + The fifth through eighth switches control the machine's denomination: + 0000 = $0.01 (e.g. a 1 cent machine) + 1000 = $0.02 + 0100 = $0.05 + 1100 = $0.10 + 0010 = $0.25 + 1010 = $0.50 + 0110 = $1.00 + 1110 = $5.00 + 0001 = $10.00 + 1001 = $50.00 + x101 = $100.00 + xx11 = $100.00 + + Note that not all combinations are valid e.g. they must be evenly divisible and a token cannot be less than the machine's denomination. + + DIP switch settings are normally only read once by the machine on start-up. To visibly change DIP settings you need to reset the machine (F3) or perform a memory clear from the main menu (see Step 2 below). + + Each machine has its own DIP switch options concerning DIP Switch Bank 2 (DSW2), however the gamble feature is universally the first switch. + Per-game DIP switch information is available in the Operator Setup -> Dip Switch Settings menu. + Once a machine has been set up, the DIP switches are ignored from then on, even if they have been changed. + + Step 2: Audit key in, enter Operator Setup -> Machine Options and set up the machine to the applicable standards. + To save the settings, open the Logic Door (L), press the Bet 1 Credit button (S), close the Logic Door and exit the menu (or press F2 for a shortcut to the main menu). + + Step 3: The machine will now need a memory reset. From the main menu, open the Main Door (M) and press Cashout (A) and the fourth line button (T) together to clear the memory. + After closing the Main Door (M) and keying out (F2), the menu should close and the game should be ready to coin up. + + Hint: If you need to change the DIP switches after a game has been set up, use a set chip to clear the memory (press Cashout+Service (A+S) once the set chip has loaded, and then go back to game mode). + To switch between game mode and set chips, you need to reset the machine (F3) as it is technically swapping the ROMs on the board. + Performing a memory reset will not erase the machine options, but it will cause a memory error which will allow you to set up anything else. + Using the Clear All Memory option from the set chip menu (assuming 4.04.xx) will erase everything however. + + + TODO (MK5 specific): - Fix remaining errors - Layouts for various configurations - Bill acceptor @@ -335,6 +391,7 @@ After the game has accepted this code, press Collect (A) and Play 7 Lines (G) at // Non-US button layouts Bet buttons Lines Gamble Other #include "aristmk5.lh" // 1, 2, 3, 5, 10 20 suits TW/SF #include "baddog.lh" // Video Poker +#include "bumblbug.lh" // 1, 2, 3, 5, 10 9 red/black TW/SF #include "cashcatnz.lh" // 1, 2, 3, 4, 5 9 suits TW/SF, 7L or Autoplay #include "cashcham.lh" // 1, 5, 10, 20, 25 20 suits #include "cashchama.lh" // 1, 2, 3, 4, 5 20 suits @@ -389,17 +446,21 @@ After the game has accepted this code, press Collect (A) and Play 7 Lines (G) at #include "wildbill.lh" // 1, 2, 3 3 suits #include "wtiger.lh" // 1, 2, 3, 5, 10 20 suits Classic Buy Feature #include "wizways.lh" // 1, 2, 5, 10, 20 243 suits -#include "yukongld.lh" // multiple configs 20 suits TW/SF - -#include "aristmk5_us.lh" // 1, 2, 3, 5, 10 9 red/black (all US games only have red/black) -#include "aristmk5_us_200.lh" // 1,2,3,5,10 20 -#include "bparty.lh" // 20 lines, multiple layouts -#include "cuckoou.lh" // 9 lines, multiple layouts -#include "dolphntrce.lh" // 20 lines, multiple layouts -#include "magimaska.lh" // 9 lines, multiple layouts -#include "pengpuck.lh" // 20 lines, multiple layouts -#include "qnilecea.lh" // 9 lines, multiple layouts -#include "wnpost.lh" // 1, 2, 3, 5, 10 5 +#include "yukongl5.lh" // multiple configs 20 suits TW/SF + +// US button layouts Lines Bet buttons Max bets Other +#include "aristmk5_us.lh" // 9 1, 2, 3, 5, 10 +#include "aristmk5_us_200.lh" // 20 1, 2, 3, 5, 10 +#include "bparty.lh" // 20 multiple 3, 5, 10, 20, 25, 50 +#include "cuckoou.lh" // 9 multiple 3, 5, 10, 20, 25, 50 +#include "cashchamu.lh" // 20 multiple 3, 5, 10, 20, 25, 50 Different layout on 3 credit setup +#include "dolphntrce.lh" // 20 multiple 5, 10, 25, 50 +#include "dolphntrceb.lh" // 20 multiple 3, 5, 10, 20, 25, 50 Different bets to bparty, cashchamu and pengpuck +#include "magimaska.lh" // 9 multiple 5, 10, 20 +#include "pengpuck.lh" // 20 multiple 3, 5, 10, 20, 25, 50 Slightly different layout to dolphntrceb +#include "qnilecea.lh" // 9 multiple 3, 5, 10, 20, 25, 50 Same bet buttons as dolphntrceb but with 9 lines +#include "swhr2u.lh" // 5 1, 2, 3, 4, 5 +#include "wnpost.lh" // 5 1, 2, 3, 5, 10 #define MASTER_CLOCK XTAL_72MHz /* confirmed */ @@ -1168,6 +1229,15 @@ static INPUT_PORTS_START(cashchamnz) PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) PORT_NAME("Play 15 Lines / Autoplay") INPUT_PORTS_END +static INPUT_PORTS_START(cashcatnz) + PORT_INCLUDE(aristmk5_9) + + PORT_MODIFY("P1") + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) PORT_NAME("Play 7 Lines / Autoplay") + PORT_BIT(0x00001000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) PORT_NAME("Bet 4 Credits / Club") + PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_NAME("Bet 5 Credits / Spade") +INPUT_PORTS_END + static INPUT_PORTS_START(incasunnz) PORT_INCLUDE(cashchamnz) @@ -1443,6 +1513,13 @@ static INPUT_PORTS_START(swhr2) PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_NAME("Bet 10 Credits") INPUT_PORTS_END +static INPUT_PORTS_START(bumblbug) + PORT_INCLUDE(swhr2) + + PORT_MODIFY("P1") + PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_K) PORT_NAME("Take Win / Start Feature") +INPUT_PORTS_END + static INPUT_PORTS_START(toutangonl) PORT_INCLUDE(swhr2) @@ -1715,6 +1792,20 @@ static INPUT_PORTS_START(dolphntrce) PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) PORT_NAME("Play 15 Lines / Start Feature") INPUT_PORTS_END +static INPUT_PORTS_START(swhr2u) + PORT_INCLUDE(aristmk5_usa) + + PORT_MODIFY("P1") + PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_NAME("Bet 5 Credits / Black") + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) PORT_NAME("Bet 4 Credits") + + PORT_MODIFY("P2") + PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_NAME("Play 2 Lines") + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_NAME("Play 3 Lines") + PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) PORT_NAME("Play 4 Lines") + PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_NAME("Play 5 Lines") +INPUT_PORTS_END + static INPUT_PORTS_START(wnpost) PORT_INCLUDE(aristmk5_usa) @@ -2106,6 +2197,7 @@ ROM_END // BHG1508 / MV4124/1 / 5,10,25,50 Credit Multiplier / 20 Line Multiline // ADONIS / Export / B - 31/07/01 +// Requires set chips 4.04.xx ROM_START( adonisu ) ARISTOCRAT_MK5_BIOS /* @@ -2272,7 +2364,7 @@ ROM_START( bootsctnu ) 0x000000-0x0941ab is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0xdf68cecf Calculated Checksum 0xdf68cecf (OK) - 0x0941ac-0x328187 is the non-Checksummed range (suspicious endpoint) + 0x0941ac-0x328187 is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) @@ -2325,9 +2417,10 @@ ROM_START( bootsctnub ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0f47a7 is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0xae44f291 Calculated Checksum 0xae44f291 (OK) + 0x0f47a8-0x3a0b5b is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ahg1547.u7", 0x000000, 0x80000, CRC(5ded48cb) SHA1(3335a9dc6758dd8b225258ab2cb01cf4e9c02dd2) ) @@ -2471,21 +2564,23 @@ ROM_END // 593 / 10 Credit Multiplier / 9 Line Multiline // Bumble Bugs / Export / D - 05/07/97 // All devices are 27c4002 instead of 27c4096 -// Marked as CHG047999 and 87,006% -// Variation (% and NO):87,006% 99 +// Marked as CHG047999 and 87.006% +// Variation (% and NO): 87.006% 99 // No required set chip version // No required touch screen ROM_START( bumblbugua ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d08 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0b1f47 is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0xa23f49f6 Calculated Checksum 0xa23f49f6 (OK) + 0x0b1f48-0x183c1f is the non-Checksummed range still containing data but NOT covered by Checksum + 0x0b1f48-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - ROM_LOAD32_WORD( "chg047999.u7", 0x000000, 0x80000, CRC(7e9be2d0) SHA1(84293a391e9797afc904bb3be05367361ae8d4c7) ) // 87,006% 99 - ROM_LOAD32_WORD( "chg047999.u11", 0x000002, 0x80000, CRC(efd350ac) SHA1(19975b4d2b55b65542a7ff38fa035fd516bd6e2e) ) // 87,006% 99 + ROM_LOAD32_WORD( "chg047999.u7", 0x000000, 0x80000, CRC(7e9be2d0) SHA1(84293a391e9797afc904bb3be05367361ae8d4c7) ) // 87.006% + ROM_LOAD32_WORD( "chg047999.u11", 0x000002, 0x80000, CRC(efd350ac) SHA1(19975b4d2b55b65542a7ff38fa035fd516bd6e2e) ) // 87.006% ROM_LOAD32_WORD( "chg047999.u8", 0x100000, 0x80000, CRC(e0c01d01) SHA1(9153129fd348a97da7cccf002e5d03e4b4db9264) ) // base ROM_LOAD32_WORD( "chg047999.u12", 0x100002, 0x80000, CRC(7dbb634b) SHA1(f7a752240989032af142f4cd6e4260a12a5b4c0a) ) // base @@ -2589,14 +2684,7 @@ ROM_END ROM_START( cashcatnz ) ARISTOCRAT_MK5_BIOS ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) - /* - Checksum code found at 0x000adc - 0x000000-0x04477f is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) - Expected Checksum 0x19143954 - Calculated Checksum 0x19143954 (OK) - 0x044780-0x1c713b is the non-Checksummed range still containing data but NOT covered by Checksum - 0x044780-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included - */ + // checksum code not found (uses different startup sequence) ROM_LOAD32_WORD( "0300863v.u7", 0x000000, 0x80000, CRC(de0f0202) SHA1(994f6c47b1e2e0e133853dc69b189752104486e4) ) ROM_LOAD32_WORD( "0300863v.u11", 0x000002, 0x80000, CRC(e60e8bd1) SHA1(ffaa7be8968047b9ee54a117d273a14cbca41028) ) ROM_LOAD32_WORD( "0300863v.u8", 0x100000, 0x80000, CRC(37d41d35) SHA1(c959b787383d6f91d20e18f37a38a965407a9ff0) ) @@ -2676,6 +2764,7 @@ ROM_END // 603(a) / 3,5,10,25,50 Credit Multiplier / 20 Line Multiline // Cash Chameleon 100cm / Export / B - 06/12/96 // Marked as DHG4078. +// Game requires set chip version: 4.00.xx ROM_START( cashchamu ) ARISTOCRAT_MK5_BIOS /* @@ -2950,6 +3039,7 @@ ROM_END // CUCKOO / Export C / 02/02/00 // ROM says '9-20 Line Multiline', but game only has 9 Lines // All devices are 27c4002 instead of 27c4096 +// Requires set chips 4.01.xx ROM_START( cuckoou ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS /* @@ -3192,6 +3282,7 @@ ROM_END // Dolphin Treasure / Export / D - 22/12/99 // Hyperlink game, but can also run standalone without progressive jackpot // ROM says '9 & 20 Line Multiline' but game only has 20 lines with a 5, 10, 25 or 50 credit multiplier +// Requires set chips 4.04.xx ROM_START( dolphntrce ) ARISTOCRAT_MK5_BIOS /* @@ -3221,6 +3312,7 @@ ROM_END // Dolphin Treasure / Export / D - 22/12/99 // Hyperlink game, but can also run standalone without progressive jackpot // ROM says '9 & 20 Line Multiline' but game only has 9 lines with a 5, 10 or 20 credit multiplier +// Requires set chips 4.04.xx ROM_START( dolphntrcea ) ARISTOCRAT_MK5_BIOS /* @@ -3250,6 +3342,7 @@ ROM_END // Dolphin Treasure / Export / D - 22/12/99 // Hyperlink game, but can also run standalone without progressive jackpot // ROM says '9 & 20 Line Multiline' but game only has 20 lines +// Requires set chips 4.04.xx ROM_START( dolphntrceb ) ARISTOCRAT_MK5_BIOS /* @@ -3628,9 +3721,8 @@ ROM_START( genmagi ) ROM_END -// MV4112/2 5,10,25,50 Credit Multiplier / 20 Line Multiline -// Green Lizard [Reel Game] / Export A - 05/01/01 -// Game Eprom: AHG1623 +// AHG1623 / MV4112/2 / 5,10,25,50 Credit Multiplier / 20 Line Multiline +// Green Lizard [Reel Game] / Export / A - 05/01/01 // Requires set chip version: 4.04.xx // Variation (% and NO): // Doesn't requires touch screen @@ -3638,9 +3730,10 @@ ROM_START( glizardu ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0f19bf is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0x36907c47 Calculated Checksum 0x36907c47 (OK) + 0x0f19c0-0x3b1443 is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ahg1623.u7", 0x000000, 0x80000, CRC(bee526f8) SHA1(32227a6655393a966af3ab698388146f0b752c67) ) // game @@ -3796,7 +3889,12 @@ ROM_END ROM_START( honeypot ) ARISTOCRAT_MK5_BIOS /* - Checksum code needs to be done + Checksum code found at 0x000bb8 + 0x000000-0x06f02b is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) + Expected Checksum 0x38355dbb + Calculated Checksum 0x38355dbb (OK) + 0x06f02c-0x281a27 is the non-Checksummed range still containing data but NOT covered by Checksum + 0x06f02c-0x2fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "03j00241.u7", 0x000000, 0x80000, CRC(9c0c3a68) SHA1(39e8be61ea8e47fcb8006868518d9de464dc63da) ) @@ -3884,6 +3982,7 @@ ROM_END // CHG1458 / MV4130/3 / 20 Line Multiline / 5, 10, 25, 50 Credit Multiplier // Inca Sun / Export / A - 05/09/00 +// Requires set chips 4.03.xx ROM_START( incasunu ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS /* @@ -3922,13 +4021,15 @@ ROM_END // DHG1577 / MV4130/3 / 20 Line Multiline / 5, 10, 25, 50 Credit Multiplier // Inca Sun / Export / A - 05/09/00 // Same strings as incasunu but different version +// Requires set chips 4.04.xx ROM_START( incasunua ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 - Checksum is stored in 0x000020-0x000027 + 0x000000-0x0ec3a7 is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0x24e1ed00 Calculated Checksum 0x24e1ed00 (OK) + 0x0ec3a8-0x2ecf4b is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "dhg1577.u7", 0x000000, 0x80000, CRC(e31e3c81) SHA1(56b00aae1b9385686530e089cad05308e0c0751d) ) @@ -4113,10 +4214,15 @@ ROM_END // CHG1573 / MV4137 / 5,10,25,50 Credit Multiplier / 20 Line Multiline // Koala Mint / Export / A - 12/09/01 +// Requires set chips 4.04.xx ROM_START( koalamnt ) ARISTOCRAT_MK5_BIOS /* - Checksum code needs redoing with repaired dump + Checksum code found at 0x000d18 + 0x000000-0x0ec32b is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) + Expected Checksum 0x5e570341 + Calculated Checksum 0x5e570341 (OK) + 0x0ec32c-0x34ebdf is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "chg1573.u7", 0x000000, 0x80000, CRC(6e3ec3ae) SHA1(057650b8d89e93bcbaacf06e6487264fe19a1aa0) ) @@ -4219,13 +4325,16 @@ ROM_END // AHG1513 / MV4134 / 5,10,25,50 Credit Multiplier / 20 Line Multiline // Loco Loot / Export / A - 30/07/01 +// Requires set chips 4.04.xx ROM_START( locolootu ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0e94fb is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0xbd28f614 Calculated Checksum 0xbd28f614 (OK) + 0x0e94fc-0x170993 is the non-Checksummed range still containing data but NOT covered by Checksum + 0x0e94fc-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x80000, CRC(16854250) SHA1(a3b6e112dcce38310ca13eb9e9851901ee213fcf) ) @@ -4298,8 +4407,8 @@ ROM_START( mgarden ) ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ahg121199.u7", 0x000000, 0x80000, CRC(12b9aaf2) SHA1(1cc86a0c8daefc1e5b5a4ff710319a85f573f526) ) ROM_LOAD32_WORD( "ahg121199.u11", 0x000002, 0x80000, CRC(b6095f2c) SHA1(d36ceaa0e6545f594f6a50ddfa71d84ca7128f3b) ) - ROM_LOAD32_WORD( "ahg121199.u8", 0x100000, 0x80000, CRC(a315ca28) SHA1(0309789362a945d592ee2eda912e4fc2e6ea5be6) ) // confirmed good - ROM_LOAD32_WORD( "ahg121199.u12", 0x100002, 0x80000, CRC(4b252c2c) SHA1(8be41fb2b8f8d2829c18ea123a02f3e61c136206) ) // confirmed good + ROM_LOAD32_WORD( "ahg121199.u8", 0x100000, 0x80000, CRC(a315ca28) SHA1(0309789362a945d592ee2eda912e4fc2e6ea5be6) ) + ROM_LOAD32_WORD( "ahg121199.u12", 0x100002, 0x80000, CRC(4b252c2c) SHA1(8be41fb2b8f8d2829c18ea123a02f3e61c136206) ) ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) @@ -4309,6 +4418,7 @@ ROM_END // AHG1549 / MV4115_1 / 5, 10, 25, 50 Credit Multiplier / 20 Line Multiline // Magic Mask / Export / A - 09/05/2000 +// Requires set chips 4.04.xx // Touchscreen game ROM_START( magimask ) ARISTOCRAT_MK5_BIOS @@ -4334,6 +4444,7 @@ ROM_END // AHG1548 / MV4115 / 5,10,20 Credit Multiplier / 9 Line Multiline // Magic Mask / Export / A - 09/05/2000 +// Requires set chips 4.04.xx // Touchscreen game ROM_START( magimaska ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS @@ -4373,6 +4484,7 @@ ROM_END // Magic Mask / Export / A - 09/05/2000 // Same strings as magimaska but different version // All devices are 27c4002 instead of 27c4096 +// Requires set chips 4.03.xx // Touchscreen game ROM_START( magimaskb ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS @@ -4503,6 +4615,7 @@ ROM_END // Margarita Magic / NSW/ACT / A - 07/07/2000 // EHG1558 / 9 playlines // ROM has NSW/ACT strings but it is for US platform +// Requires set chips 4.04.xx ROM_START( marmagicu ) ARISTOCRAT_MK5_BIOS /* @@ -4534,6 +4647,7 @@ ROM_END // The playlines are 1, 5, 10, 15 and 20 // For 20 credit per line the max bet is 400 // ROM has NSW/ACT strings but it is for US platform +// Requires set chips 4.04.xx ROM_START( marmagicua ) ARISTOCRAT_MK5_BIOS /* @@ -4990,6 +5104,7 @@ ROM_END // Party Gras / Export / A - 10/11/2001 // All devices are 27c4002 instead of 27c4096 // ROM says '9/20 Line Multiline' but game only has 9 lines +// Requires set chips 4.04.xx // Touchscreen game ROM_START( partygrs ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS @@ -5027,6 +5142,7 @@ ROM_END // BHG1284 / MV4115/3 / 20 Line Multiline / 3,5,10,20,25,50 Credit Multiplier // Party Gras / Export / B - 06/02/2001 +// Requires set chips 4.01.xx // Touchscreen game ROM_START( partygrsa ) ARISTOCRAT_MK5_BIOS @@ -5254,9 +5370,11 @@ ROM_START( pengpayua ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS /* Checksum code found at 0x000d08 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0a898f is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0x93affe65 Calculated Checksum 0x93affe65 (OK) + 0x0a8990-0x1674cf is the non-Checksummed range still containing data but NOT covered by Checksum + 0x0a8990-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ohg041703.u7", 0x000000, 0x80000, CRC(48689db1) SHA1(6aa07a0e6dbf98a34cca31d5983ae9429f2254aa) ) @@ -5277,9 +5395,11 @@ ROM_START( pengpayub ) ARISTOCRAT_MK5_BIOS_HAVE_EEPROMS /* Checksum code found at 0x000d08 - Checksum is stored at 0x000020-0x000027 + 0x000000-0x0a898f is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0x96aefc60 Calculated Checksum 0x96aefc60 (OK) + 0x0a8990-0x1674cf is the non-Checksummed range still containing data but NOT covered by Checksum + 0x0a8990-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ohg041702.u7", 0x000000, 0x80000, CRC(76b7641f) SHA1(8df2c46ec8e5ec5574f12878619593e7157df517) ) @@ -5295,6 +5415,7 @@ ROM_END // EHG1257 / MV4122/1 / 3,5,10,20,25,50 Credit Multiplier / 20 Line Multiline // PENGUIN PAYS / PENGUIN PUCKS / Export / C - 19/01/01 // Hyperlink version, but can also run standalone without progressive jackpot +// Requires set chips 4.03.xx ROM_START( pengpuck ) ARISTOCRAT_MK5_BIOS /* @@ -5648,6 +5769,7 @@ ROM_END // AHG1609 / MV4091/1 / 5,10,25,50 Credit Multiplier / 20 Line Multiline // QUEEN OF THE NILE / Export / A - 17/01/01 // Hyperlink version, but can also run standalone without progressive jackpot +// Requires set chips 4.04.xx ROM_START( qnilece ) ARISTOCRAT_MK5_BIOS /* @@ -5677,6 +5799,7 @@ ROM_END // QUEEN OF THE NILE / Export / F - 17/01/01 // ROM says '10 Credit Multiplier / 20 Line Multiline' but it is a 9 line game with 3,5,10,20,25,50 credit multipliers // Hyperlink version, but can also run standalone without progressive jackpot +// Requires set chips 4.04.xx ROM_START( qnilecea ) ARISTOCRAT_MK5_BIOS /* @@ -6133,12 +6256,15 @@ ROM_END // AHG1575 / MV4137 / 5,10,20 Credit Multiplier / 20 Line Multiline // Sweet Liberty Deluxe / Export / A - 11/02/01 +// Requires set chips 4.04.xx ROM_START( sldeluxe ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 + 0x000000-0x0ec207 is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0xa86cc13c Calculated Checksum 0xa86cc13c (OK) + 0x0ec208-0x31d6b3 is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "ahg1575.u7", 0x000000, 0x80000, CRC(5962d463) SHA1(d78c3be7a2aa6d03888e928a5498a65b00ad4135) ) @@ -6185,7 +6311,11 @@ ROM_END ROM_START( snowcat ) ARISTOCRAT_MK5_BIOS /* - Checksum code needs to be done + Checksum code found at 0x000b80 + 0x000000-0x0553db is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) + Expected Checksum 0xf2744b11 + Calculated Checksum 0xf2744b11 (OK) + 0x0553dc-0x0ea4a3 is the non-Checksummed range (unusual endpoint) */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "0100405v.u7", 0x000000, 0x80000, CRC(e52c01c2) SHA1(98acf33bbe0e4525a02b581eae7b7caf910f2b96) ) @@ -6653,13 +6783,16 @@ ROM_END // BHG1584 / MV4130/1 / 20 Line Multiline / 5, 10, 25, 50 Credit Multiplier // Unicorn Dreaming / Export / C - 10/17/01 +// Requires set chips 4.04.xx ROM_START( unicorndu ) ARISTOCRAT_MK5_BIOS /* Checksum code found at 0x000d18 - Checksum is stored in 0x000020-0x000027 + 0x000000-0x0ec547 is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) Expected Checksum 0x16dabc9e Calculated Checksum 0x16dabc9e (OK) + 0x0ec548-0x1ee2cb is the non-Checksummed range still containing data but NOT covered by Checksum + 0x0ec548-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included */ ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_LOAD32_WORD( "bhg1584.u7", 0x000000, 0x80000, CRC(1490354e) SHA1(9327f01067e4a7f7ce5b6db9373b9ad59533babf) ) @@ -7062,32 +7195,32 @@ ROM_END #define MACHINE_FLAGS MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND|MACHINE_IMPERFECT_GRAPHICS // YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS -GAME( 1995, aristmk5, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "MKV Set/Clear Chips (USA)", MACHINE_FLAGS|MACHINE_IS_BIOS_ROOT ) +GAMEL( 1995, aristmk5, 0, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "MKV Set/Clear Chips (USA)", MACHINE_FLAGS|MACHINE_IS_BIOS_ROOT, layout_aristmk5_us ) // Dates listed below are for the combination (reel layout), not release dates GAMEL( 1998, adonis, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0200751V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 602/9, A - 25/05/98, Rev 10 GAMEL( 1998, adonisa, adonis, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0100751V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 602/9, A - 25/05/98, Rev 9 GAMEL( 1999, adonisce, adonis, aristmk5, adonisce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis - Cash Express (0201005V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 602/9, C - 06/07/99, Rev 12 -GAMEL( 2001, adonisu, adonis, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (BHG1508, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4124/1, B - 31/07/01 -GAMEL( 2002, alchemst, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Alchemist (01J02046, Venezuela)", MACHINE_FLAGS, layout_yukongld ) // JB013/1, A - 22/01/02, Rev 17 +GAMEL( 2001, adonisu, adonis, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (BHG1508, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4124/1, B - 31/07/01 +GAMEL( 2002, alchemst, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Alchemist (01J02046, Venezuela)", MACHINE_FLAGS, layout_yukongl5 ) // JB013/1, A - 22/01/02, Rev 17 GAMEL( 2000, bparty, aristmk5, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bachelorette Party (BHG1248, US)", MACHINE_FLAGS, layout_bparty ) // MV4119/1, B - 25/08/2000 GAMEL( 1996, baddog, aristmk5, aristmk5, baddog, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bad Dog Poker (0200428V, NSW/ACT)", MACHINE_FLAGS, layout_baddog ) // 386/56, A - 17/12/96 GAMEL( 1998, bootsctn, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (0100812V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 616/1, B - 11/12/98, Rev 20 GAMEL( 1999, bootsctnu, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (GHG1012-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4098, A - 25/08/99 GAMEL( 1999, bootsctnua, bootsctn, aristmk5_usa, pengpuck, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (GHG1008-03, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4098/1, A - 27/07/99 -GAMEL( 1999, bootsctnub, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (AHG1547, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4098/1, B - 22/03/01 -GAMEL( 1996, bumblbug, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200510V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 3 +GAMEL( 2001, bootsctnub, bootsctn, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (AHG1547, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4098/1, B - 22/03/01 +GAMEL( 1996, bumblbug, aristmk5, aristmk5, bumblbug, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200510V, NSW/ACT)", MACHINE_FLAGS, layout_bumblbug ) // 593, D - 5/07/96, Rev 3 GAMEL( 1996, bumblbugql, bumblbug, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (0200456V, Queensland)", MACHINE_FLAGS, layout_swhr2 ) // 593, D - 5/07/96, Rev 1.0 GAMEL( 1997, bumblbugu, bumblbug, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (CHG0479-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 593, D - 05/07/97 GAMEL( 1997, bumblbugua, bumblbug, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (CHG0479-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 593, D - 05/07/97 GAMEL( 1995, buttdeli, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Butterfly Delight (0200143V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 571/4, A - 19/12/95, Rev 1.8.1.0 GAMEL( 1998, cashcat, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0100676V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 614/3, A - 03/04/98, Rev 7 GAMEL( 1997, cashcata, cashcat, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0100557V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 614/1, B - 01/12/97, Rev 7 -GAMEL( 1999, cashcatnz, cashcat, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0300863V, New Zealand)", MACHINE_FLAGS, layout_cashcatnz ) // MV4089, A - 4/1/99, Rev 26 +GAMEL( 1999, cashcatnz, cashcat, aristmk5, cashcatnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Cat (0300863V, New Zealand)", MACHINE_FLAGS, layout_cashcatnz ) // MV4089, A - 4/1/99, Rev 26 GAMEL( 1997, cashcham, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (0100438V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 603/1, C - 15/4/97, Rev 1.25.3.0 GAMEL( 1998, cashchama, cashcham, aristmk5, cashchama, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (0200437V, NSW/ACT)", MACHINE_FLAGS, layout_cashchama ) // 603(a), D - 18/02/98, Rev 3 GAMEL( 1998, cashchamnz, cashcham, aristmk5, cashchamnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (0300781V, New Zealand)", MACHINE_FLAGS, layout_cashchamnz ) // MV4067, A - 31/08/98, Rev 21 -GAMEL( 1996, cashchamu, cashcham, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (DHG4078-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 603(a), B - 06/12/96 +GAMEL( 1996, cashchamu, cashcham, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (DHG4078-99, US)", MACHINE_FLAGS, layout_cashchamu ) // 603(a), B - 06/12/96 GAMEL( 1997, cashcra5, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Crop (0300467V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 607, C - 14/07/97, Rev 6 GAMEL( 1998, chariotc, aristmk5, aristmk5, chariotc, aristmk5_state, aristmk5, ROT0, "Aristocrat", "The Chariot Challenge (0100787V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 630/1, A - 10/08/98, Rev 11 GAMEL( 1998, chariotcv, chariotc, aristmk5, chariotcv, aristmk5_state, aristmk5, ROT0, "Aristocrat", "The Chariot Challenge (04J00714, Venezuela)", MACHINE_FLAGS, layout_snowcat ) // 630, A - 10/08/98, Rev 12 @@ -7109,7 +7242,7 @@ GAMEL( 1996, dolphntrb, dolphntr, aristmk5, aristmk5_9, aristmk5_s GAMEL( 1996, dolphntru, dolphntr, aristmk5_usa, dolphntru, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (FHG4077-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 602/1, B - 06/12/96 GAMEL( 1999, dolphntrce, dolphntr, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure - Cash Express (AHG1607, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4090, D - 22/12/99 GAMEL( 1999, dolphntrcea, dolphntr, aristmk5_usa, dolphntru, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure - Cash Express (AHG1606, US)", MACHINE_FLAGS, layout_magimaska ) // MV4090, D - 22/12/99 -GAMEL( 1999, dolphntrceb, dolphntr, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure - Cash Express (AHG1519, US)", MACHINE_FLAGS, layout_pengpuck ) // MV4090, D - 22/12/99 +GAMEL( 1999, dolphntrceb, dolphntr, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure - Cash Express (AHG1519, US)", MACHINE_FLAGS, layout_dolphntrceb ) // MV4090, D - 22/12/99 GAMEL( 1997, drgneye, aristmk5, aristmk5, snowcat, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dragon's Eye (0100521V, NSW/ACT)", MACHINE_FLAGS, layout_snowcat ) // 610, A - 09/05/97, Rev 1.27 GAMEL( 1997, dreamwv, aristmk5, aristmk5_touch, dreamwv, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dream Weaver (0200586V, NSW/ACT)", MACHINE_FLAGS, layout_dreamwv ) // 606/2, A - 20/06/97, Rev 16 GAMEL( 2000, dynajack, aristmk5, aristmk5, dynajack, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dynamite Jack (01J00081, NSW/ACT)", MACHINE_FLAGS, layout_dynajack ) // JB004, A - 12/07/2000, Rev 17 @@ -7121,18 +7254,18 @@ GAMEL( 2000, fortellr, aristmk5, aristmk5, goldenra, aristmk5_s GAMEL( 1998, gambler, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "The Gambler (EHG0916-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4084/1, A - 30/10/98 GAMEL( 2001, geisha, aristmk5, aristmk5, geisha, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Geisha (0101408V, New Zealand)", MACHINE_FLAGS, layout_geisha ) // MV4127, A - 05/03/01, Rev 25 GAMEL( 1999, genmagi, aristmk5, aristmk5_touch, genmagi, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Genie Magic (0200894V, NSW/ACT)", MACHINE_FLAGS, layout_genmagi ) // 632/1, C - 15/02/99, Rev 20 -GAMEL( 2001, glizardu, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Green Lizard (AHG1623, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4112/2 - A - 05/01/01 +GAMEL( 2001, glizardu, aristmk5, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Green Lizard (AHG1623, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4112/2 - A - 05/01/01 GAMEL( 1998, gnomeatw, aristmk5, aristmk5, kgalah, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Gnome Around The World (0100767V, NSW/ACT)", MACHINE_FLAGS, layout_kgalah ) // 625, C - 18/12/98, Rev 16 GAMEL( 1997, goldpyr, aristmk5, aristmk5_usa, dolphntru, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (AHG1205-03, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4091, B - 13/05/97 -GAMEL( 1997, goldpyra, goldpyr, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (AHG1206-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 602/2, B - 13/05/97 +GAMEL( 1997, goldpyra, goldpyr, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (AHG1206-99, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // 602/2, B - 13/05/97 GAMEL( 1998, goldpyrb, goldpyr, aristmk5, goldpyrb, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (0100878V, Victoria)", MACHINE_FLAGS, layout_goldpyrb ) // 602/5, C - 19/06/98 GAMEL( 2000, goldenra, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Ra (0101164V, NSW/ACT)", MACHINE_FLAGS, layout_goldenra ) // 661, A - 10/04/00, Rev 15 -GAMEL( 2000, honeypot, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Honey Pot (03J00241, NSW/ACT)", MACHINE_FLAGS, layout_yukongld ) // JB008, A - 21/11/2000, Rev 17 +GAMEL( 2000, honeypot, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Honey Pot (03J00241, NSW/ACT)", MACHINE_FLAGS, layout_yukongl5 ) // JB008, A - 21/11/2000, Rev 17 GAMEL( 1999, incasun, aristmk5, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 1999, incasunsp, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT, Show Program)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 2000, incasunnz, incasun, aristmk5, incasunnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0101108V, New Zealand)", MACHINE_FLAGS, layout_incasunnz ) // MV4113, A - 6/3/00, Rev 25 GAMEL( 2000, incasunu, incasun, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (CHG1458, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130/3, A - 05/09/00 -GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130, A - 05/09/00 +GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130, A - 05/09/00 GAMEL( 1998, indrema5, aristmk5, aristmk5, indrema5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, NSW/ACT)", MACHINE_FLAGS, layout_indrema5 ) // 628/1, B - 15/12/98, Rev 7 GAMEL( 1996, jumpjoey, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jumpin' Joey (0100383V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 586/6, C - 13/11/96 GAMEL( 1996, jungjuic, aristmk5, aristmk5, jungjuic, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jungle Juice (0200240V, New Zealand)", MACHINE_FLAGS, layout_jungjuic ) // 566/3, F - 06/03/96 @@ -7144,7 +7277,7 @@ GAMEL( 1998, kookabuk, aristmk5, aristmk5, aristmk5, aristmk5_s GAMEL( 1997, locoloot, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100473V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 599/3, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1997, locoloota, locoloot, aristmk5, locoloota, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100472V, NSW/ACT)", MACHINE_FLAGS, layout_locoloota ) // 599/2, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1998, locolootnz, locoloot, aristmk5, cashchamnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0600725V, New Zealand)", MACHINE_FLAGS, layout_cashchamnz ) // MV4064, A - 8/7/98, Rev 24 -GAMEL( 2001, locolootu, locoloot, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4134, A - 30/07/01 +GAMEL( 2001, locolootu, locoloot, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (AHG1513, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4134, A - 30/07/01 GAMEL( 1997, lonewolf, aristmk5, aristmk5, wildbill, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lone Wolf (0100587V, NSW/ACT)", MACHINE_FLAGS, layout_wildbill ) // 621, A - 29/10/97, Rev 1.27.17.0 GAMEL( 1995, luckyclo, aristmk5, aristmk5, wcougar, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Lucky Clover (0300109V, NSW/ACT)", MACHINE_FLAGS, layout_wcougar ) // 570/6, A - 12/10/95 GAMEL( 2000, magimask, aristmk5, aristmk5_usa_touch, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (AHG1549, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4115_1, A - 09/05/00 @@ -7155,7 +7288,7 @@ GAMEL( 1997, magtcha5a, magtcha5, aristmk5_touch, dimtouch, aristmk5_s GAMEL( 1997, mammothm, aristmk5, aristmk5, kgalah, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mammoth Money (0100425V, NSW/ACT)", MACHINE_FLAGS, layout_kgalah ) // 595/5, D - 07/04/97, Rev 1.22.14.1 GAMEL( 2000, marmagic, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", MACHINE_FLAGS, layout_marmagic ) // JB005, A - 07/07/00, Rev 17 GAMEL( 2000, marmagicu, marmagic, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1558, US)", MACHINE_FLAGS, layout_aristmk5_us ) // US003, 07/07/2000 -GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // US003, A - 07/07/00 +GAMEL( 2000, marmagicua, marmagic, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (EHG1559, US)", MACHINE_FLAGS, layout_dolphntrce ) // US003, A - 07/07/00 GAMEL( 1997, mgarden, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Garden (AHG1211-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4033, B - 10/02/97 (alt title for enchanted forest?) GAMEL( 1996, minemine, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (0400115V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 559/2, D - 16/01/96, Rev 1.18.3.0 GAMEL( 1996, minemineu, minemine, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Mine, Mine, Mine (VHG0416-99, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 559/2, E - 14/02/96 @@ -7211,7 +7344,7 @@ GAMEL( 1997, retrsam, aristmk5, aristmk5, retrsam, aristmk5_s GAMEL( 1997, retrsama, retrsam, aristmk5, retrsam, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Return of the Samurai (0200549V, NSW/ACT)", MACHINE_FLAGS, layout_sbuk3 ) // 608, A - 17/04/97, Rev 1.26.25.3 GAMEL( 1997, retrsamb, retrsam, aristmk5, retrsamb, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Return of the Samurai (0200506V, NSW/ACT)", MACHINE_FLAGS, layout_retrsamb ) // 608, A - 17/04/97, Rev 1.26.25.3 GAMEL( 1997, rushrst, aristmk5, aristmk5, rushrst, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Rushin Rooster (0100534V, NSW/ACT)", MACHINE_FLAGS, layout_cashchama ) // 596/3, C - 25/06/97, Rev 1.27.2.3 -GAMEL( 2001, sldeluxe, aristmk5, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweet Liberty Deluxe (AHG1575, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4137, A - 11/02/01 +GAMEL( 2001, sldeluxe, aristmk5, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweet Liberty Deluxe (AHG1575, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4137, A - 11/02/01 GAMEL( 1998, slvrwolf, aristmk5, aristmk5, wamazona, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Silver Wolf (0100673V, NSW/ACT)", MACHINE_FLAGS, layout_wamazona ) // 621/2, A - 23/03/98, Rev 3 GAMEL( 1996, snowcat, aristmk5, aristmk5, snowcat, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Snow Cat (0100405V, NSW/ACT)", MACHINE_FLAGS, layout_snowcat ) // 599, B - 23/12/96, Rev 1.25.1.0 GAMEL( 1997, sumospin, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sumo Spins (0200606V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 622, A - 08/12/97, Rev 4 @@ -7219,7 +7352,7 @@ GAMEL( 1998, sbuk3, aristmk5, aristmk5, sbuk3, aristmk5_s GAMEL( 1998, sbuk3a, sbuk3, aristmk5, sbuk3, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Super Bucks III (0100711V, NSW/ACT)", MACHINE_FLAGS, layout_sbuk3 ) // 626, A - 22/04/98, Rev 7 GAMEL( 1995, swhr2, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweethearts II (0200465V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 577/1, C - 07/09/95, Rev 3 GAMEL( 1995, swhr2a, swhr2, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweethearts II (0200004V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 577/1, C - 07/09/95, Rev 1.1.3.0 -GAMEL( 1998, swhr2u, swhr2, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweethearts II (PHG0742-02, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4061, A - 29/06/98 +GAMEL( 1998, swhr2u, swhr2, aristmk5_usa, swhr2u, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweethearts II (PHG0742-02, US)", MACHINE_FLAGS, layout_swhr2u ) // MV4061, A - 29/06/98 GAMEL( 1995, swhr2v, swhr2, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweethearts II (01J01986, Venezuela)", MACHINE_FLAGS, layout_swhr2 ) // 577/1, C - 07/09/95, Rev 3 GAMEL( 1996, thor, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Thor (0200319V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 569/12, B - 14/08/96, Rev 1.23.7.0 GAMEL( 1996, thndh, aristmk5, aristmk5, snowcat, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Thunder Heart (0200333V, NSW/ACT)", MACHINE_FLAGS, layout_snowcat ) // 570/9, A - 14/08/96, Rev 1.23.6.0 @@ -7235,7 +7368,7 @@ GAMEL( 1997, trpdlghtu, trpdlght, aristmk5_usa, aristmk5_usa, aristmk5_s GAMEL( 1998, unicornd, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0100791V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 631/1 A, A - 31/08/98, Rev 12 GAMEL( 1998, unicornda, unicornd, aristmk5, aristmk5_9, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0100813V, NSW/ACT)", MACHINE_FLAGS, layout_dolphntrb ) // 631 A, A - 02/09/98, Rev 14 GAMEL( 2000, unicorndnz, unicornd, aristmk5, unicorndnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (0101228V, New Zealand)", MACHINE_FLAGS, layout_aristmk5 ) // MV4113/1, A - 05/04/2000, Rev 27 -GAMEL( 2001, unicorndu, unicornd, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (BHG1584, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4130/1, C - 10/17/01 +GAMEL( 2001, unicorndu, unicornd, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Unicorn Dreaming (BHG1584, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130/1, C - 10/17/01 GAMEL( 2002, venicea5, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Venice (02J02056, Venezuela)", MACHINE_FLAGS, layout_venicea5 ) // JB009/2, B - 11/07/02, Rev 17 GAMEL( 1996, wamazon, aristmk5, aristmk5, wamazon, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Amazon (0200507V, NSW/ACT)", MACHINE_FLAGS, layout_wamazon ) // 506/8, A - 10/10/96, Rev 3 GAMEL( 1996, wamazona, wamazon, aristmk5, wamazona, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Amazon (0200285V, NSW/ACT)", MACHINE_FLAGS, layout_wamazona ) // 506/6, A - 7/5/96, Rev 1.22.8.0 @@ -7249,11 +7382,11 @@ GAMEL( 1996, wizways, aristmk5, aristmk5, wizways, aristmk5_s GAMEL( 1997, wnpost, aristmk5, aristmk5_usa, wnpost, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Winning Post (RHG0418-04, US)", MACHINE_FLAGS, layout_wnpost ) // 541/2, G - 11/02/97 GAMEL( 1999, wthing, aristmk5, aristmk5, retrsam, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Thing (0101158V, NSW/ACT)", MACHINE_FLAGS, layout_sbuk3 ) // 608/4, B - 14/12/99, Rev 8 GAMEL( 1999, wtiger, aristmk5, aristmk5, wtiger, aristmk5_state, aristmk5, ROT0, "Aristocrat", "White Tiger Classic (0200954V, NSW/ACT)", MACHINE_FLAGS, layout_wtiger ) // 638/1, B - 08/07/99, Rev 13 -GAMEL( 2000, yukongl5, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Yukon Gold (03J00191, NSW/ACT)", MACHINE_FLAGS, layout_yukongld ) // JB005/1, A - 30/10/2000, Rev 17 +GAMEL( 2000, yukongl5, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Yukon Gold (03J00191, NSW/ACT)", MACHINE_FLAGS, layout_yukongl5 ) // JB005/1, A - 30/10/2000, Rev 17 // the following parent sets are known bad dumps, and do not boot (confirmed) GAMEL( 1996, blackpnt, aristmk5, aristmk5, wildbill, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Black Panther (0200818V, Victoria)", MACHINE_FLAGS, layout_wildbill ) // 594/1, A - 30/07/96 -GAMEL( 1996, canrose, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Canyon Rose (AHG1463, US)", MACHINE_FLAGS, layout_aristmk5_us ) // 603(a), B - 06/12/96 (same as Cash Chameleon) +GAMEL( 1996, canrose, aristmk5, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Canyon Rose (AHG1463, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // 603(a), B - 06/12/96 (same as Cash Chameleon) GAMEL( 2000, diamdest, aristmk5, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Diamond Destiny (AHG1533, US)", MACHINE_FLAGS, layout_aristmk5_us_200 ) // MV4115_5, A - 09/05/2000 (same as Magic Mask) GAMEL( 2001, fortfvr, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Fortune Fever (BHG1566, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4122/2, A - 13/05/01 GAMEL( 1996, jumpbean, aristmk5, aristmk5, swhr2, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Jumping Beans (0100161V, NSW/ACT)", MACHINE_FLAGS, layout_swhr2 ) // 586/2, A - 25/01/96 diff --git a/src/mame/layout/bumblbug.lay b/src/mame/layout/bumblbug.lay new file mode 100644 index 00000000000..76c326b286e --- /dev/null +++ b/src/mame/layout/bumblbug.lay @@ -0,0 +1,265 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/cashchamu.lay b/src/mame/layout/cashchamu.lay new file mode 100644 index 00000000000..3833294760c --- /dev/null +++ b/src/mame/layout/cashchamu.lay @@ -0,0 +1,670 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/checkma5.lay b/src/mame/layout/checkma5.lay index c009876e4a1..5a828a19d1c 100644 --- a/src/mame/layout/checkma5.lay +++ b/src/mame/layout/checkma5.lay @@ -179,6 +179,19 @@ + + + + + + + + + + + + + @@ -326,11 +339,9 @@ - @@ -393,11 +404,9 @@ - diff --git a/src/mame/layout/dolphntrceb.lay b/src/mame/layout/dolphntrceb.lay new file mode 100644 index 00000000000..f32544395cc --- /dev/null +++ b/src/mame/layout/dolphntrceb.lay @@ -0,0 +1,670 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/swhr2u.lay b/src/mame/layout/swhr2u.lay new file mode 100644 index 00000000000..e2a9cde26c6 --- /dev/null +++ b/src/mame/layout/swhr2u.lay @@ -0,0 +1,267 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/yukongl5.lay b/src/mame/layout/yukongl5.lay new file mode 100644 index 00000000000..16c007f004b --- /dev/null +++ b/src/mame/layout/yukongl5.lay @@ -0,0 +1,551 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/yukongld.lay b/src/mame/layout/yukongld.lay deleted file mode 100644 index 16c007f004b..00000000000 --- a/src/mame/layout/yukongld.lay +++ /dev/null @@ -1,551 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- cgit v1.2.3-70-g09d2 From 85080516c18405501fe23b997c95ceb1633523e1 Mon Sep 17 00:00:00 2001 From: r09 Date: Thu, 7 Dec 2017 23:23:22 +0100 Subject: fmtowns: fixed mouse cursor moving on its own in Data West games --- src/mame/drivers/fmtowns.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mame/drivers/fmtowns.cpp b/src/mame/drivers/fmtowns.cpp index 7d20aba1d41..2a831e969b2 100644 --- a/src/mame/drivers/fmtowns.cpp +++ b/src/mame/drivers/fmtowns.cpp @@ -985,6 +985,7 @@ READ8_MEMBER(towns_state::towns_padport_r) break; case MOUSE_START: case MOUSE_SYNC: + break; default: if(m_towns_mouse_output < MOUSE_Y_LOW) ret |= 0x0f; @@ -1072,6 +1073,7 @@ READ8_MEMBER(towns_state::towns_padport_r) break; case MOUSE_START: case MOUSE_SYNC: + break; default: if(m_towns_mouse_output < MOUSE_Y_LOW) ret |= 0x0f; -- cgit v1.2.3-70-g09d2 From 22cf205a18dbac109b11f0088a1a17a88e7c51e1 Mon Sep 17 00:00:00 2001 From: mahlemiut Date: Fri, 8 Dec 2017 11:40:43 +1300 Subject: attache816: enabled MCFG_QUANTUM_PERFECT_CPU on the 8086, fixes deadlock when writing to the RAM disk. --- src/mame/drivers/attache.cpp | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/src/mame/drivers/attache.cpp b/src/mame/drivers/attache.cpp index ca68ba5c3ec..f81ff6d120c 100644 --- a/src/mame/drivers/attache.cpp +++ b/src/mame/drivers/attache.cpp @@ -800,16 +800,14 @@ WRITE_LINE_MEMBER( attache_state::fdc_dack_w ) WRITE8_MEMBER(attache816_state::x86_comms_w) { m_comms_val = data; + m_ppi->pc6_w(1); m_z80_rx_ready = false; - machine().scheduler().synchronize(); - logerror("x86 writes %02x to comms\n",data); } READ8_MEMBER(attache816_state::x86_comms_r) { m_z80_tx_ready = false; - logerror("x86 reads %02x from comms\n",m_comms_val); - machine().scheduler().synchronize(); + m_ppi->pc4_w(1); return m_comms_val; } @@ -850,19 +848,14 @@ READ8_MEMBER(attache816_state::z80_comms_r) { m_z80_rx_ready = true; m_ppi->pc6_w(0); - logerror("z80 reads %02x from comms\n",m_comms_val); - machine().scheduler().synchronize(); return m_comms_val; } WRITE8_MEMBER(attache816_state::z80_comms_w) { m_comms_val = data; - logerror("z80 writes %02x to comms\n",data); m_z80_tx_ready = true; m_ppi->pc4_w(0); - machine().scheduler().synchronize(); -// m_ppi->write(space,0,data); } // Z80 comms status @@ -1171,6 +1164,7 @@ static MACHINE_CONFIG_START( attache816 ) MCFG_CPU_ADD("extcpu",I8086,XTAL_24MHz / 3) MCFG_CPU_PROGRAM_MAP(attache_x86_map) MCFG_CPU_IO_MAP(attache_x86_io) + MCFG_QUANTUM_PERFECT_CPU("extcpu") MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green()) MCFG_SCREEN_REFRESH_RATE(60) -- cgit v1.2.3-70-g09d2 From 46b9a9be46fb563669f6d3e4441f82f266641342 Mon Sep 17 00:00:00 2001 From: andreasnaive Date: Fri, 8 Dec 2017 00:03:32 +0100 Subject: igs036crypt: The format of the key tables is now compatible with the real ones provided by the internal ARM. [Andreas Naive] --- src/mame/machine/igs036crypt.cpp | 446 ++++++++++++++------------------------- src/mame/machine/igs036crypt.h | 22 +- 2 files changed, 165 insertions(+), 303 deletions(-) diff --git a/src/mame/machine/igs036crypt.cpp b/src/mame/machine/igs036crypt.cpp index 574f4345ebd..b05c0c7c346 100644 --- a/src/mame/machine/igs036crypt.cpp +++ b/src/mame/machine/igs036crypt.cpp @@ -15,18 +15,15 @@ The scheme works on 16-bits words and is probably designed to depend on 24 bits (word-) address; in what follows, we will refer to the 8 lowest ones simply as the lowest bits of the address, and the other 16 as the highest bits the address. -The address-based XOR is thought to be comprised of 16 one-bit XOR controlled -by a certain combination of one or two of the highest address bits. Every one of -the one-bit XORs affects a different bit of the word. The game key is comprised of -256 8-bits values provided by the internal ARM, and acts by masking on/off those XORs; -every 8-bit value in the key affect those words whose address match the index modulus 256; -every bit in a given key byte, affects two positions of the correponding 16-bits -encrypted words, in conjunction with the lowest bits of the address. +The address-based XOR can be thought as 16 one-bit XORs against key bits +controlled by certain combinations of up to three address bits. The game key is +comprised of 256 8-bits values provided by the internal ARM; every 8-bit value +in the key is used on those words whose address match the index modulus 256; +in a given key byte, every bit affects two positions of the correponding 16-bits +encrypted words. This use of the key is similar to the one found in previous instantiations of IGS circuits. -TO-DO (2017-12-06): change the current implementation to match the real keys. - What is new in the IGS036 is the use of an obfuscation working this way: 1) The highest bits of the address are split in 4 groups, every of which controls @@ -64,7 +61,7 @@ TO-DO: complete the table with the 20-bytes values *****************************************************************************/ -igs036_decryptor::igs036_decryptor(const uint16_t* game_key) +igs036_decryptor::igs036_decryptor(const uint8_t* game_key) : key(game_key) { } @@ -87,14 +84,13 @@ uint16_t igs036_decryptor::decrypt(uint16_t cipherword, int word_address)const // key-dependent manipulation for (int i=0; i<16; ++i) { - if (BIT(key[word_address&0xff],i)) - { - if (((word_address>>8)&triggers[i][0]) == triggers[i][1]) - aux ^= (1< Date: Thu, 7 Dec 2017 18:32:47 -0500 Subject: nsg6809.cpp: Add IRQ (nw) --- src/mame/drivers/nsg6809.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mame/drivers/nsg6809.cpp b/src/mame/drivers/nsg6809.cpp index e40d2a472a3..ca5d9fbd95f 100644 --- a/src/mame/drivers/nsg6809.cpp +++ b/src/mame/drivers/nsg6809.cpp @@ -34,6 +34,7 @@ #include "emu.h" #include "cpu/m6809/m6809.h" #include "machine/6522via.h" +#include "machine/input_merger.h" #include "machine/mos6551.h" #include "machine/watchdog.h" @@ -65,11 +66,16 @@ static MACHINE_CONFIG_START( pitchhit ) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_DEVICE_ADD("via", VIA6522, XTAL_4MHz / 4) + MCFG_VIA6522_IRQ_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<0>)) MCFG_DEVICE_ADD("acia", MOS6551, 0) MCFG_MOS6551_XTAL(XTAL_1_8432MHz) + MCFG_MOS6551_IRQ_HANDLER(DEVWRITELINE("mainirq", input_merger_device, in_w<1>)) MCFG_WATCHDOG_ADD("deadman") + + MCFG_INPUT_MERGER_ANY_HIGH("mainirq") + MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE)) MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From cc626ab3194ab53136433f5aca6b6f0d07f7ac6c Mon Sep 17 00:00:00 2001 From: David Haywood Date: Thu, 7 Dec 2017 23:49:14 +0000 Subject: pgm2 : use uploaded tables for kov2nl / orleg2 [David Haywood] (#2906) pgm2 : use uploaded tables for kov2nl / orleg2 [David Haywood] --- src/mame/drivers/pgm2.cpp | 36 ++++++++++++++++++++++++++++++------ src/mame/includes/pgm2.h | 7 +++++++ src/mame/machine/igs036crypt.cpp | 38 -------------------------------------- src/mame/machine/igs036crypt.h | 2 -- 4 files changed, 37 insertions(+), 46 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index df4f674fd22..df5bdc9647c 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -90,6 +90,27 @@ READ32_MEMBER(pgm2_state::rtc_r) return machine().time().seconds(); } +READ8_MEMBER(pgm2_state::encryption_r) +{ + return m_encryption_table[offset]; +} + +WRITE8_MEMBER(pgm2_state::encryption_w) +{ + m_encryption_table[offset] = data; +} + +WRITE32_MEMBER(pgm2_state::encryption_do_w) +{ + if (m_has_decrypted == 0) + { + igs036_decryptor decrypter(m_encryption_table); + decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 1; + } +} + + INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) { m_arm_aic->set_irq(0x47); @@ -150,7 +171,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) // internal to IGS036? - various other writes down here on startup too - could be other standard ATMEL peripherals like the ARM_AIC mixed with custom bits AM_RANGE(0xffffec00, 0xffffec5f) AM_RAM - AM_RANGE(0xfffffc00, 0xfffffcff) AM_RAM // confirmed as encryption table for main program rom (see code at 3950) + AM_RANGE(0xfffffc00, 0xfffffcff) AM_READWRITE8(encryption_r,encryption_w, 0xffffffff) // confirmed as encryption table for main program rom (see code at 3950) AM_RANGE(0xfffff000, 0xfffff14b) AM_DEVICE("arm_aic", arm_aic_device, regs_map) @@ -159,7 +180,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READ(rtc_r) -// AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(table_done_w) // after uploading encryption? table might actually send it or enable external ROM? + AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(encryption_do_w) // after uploading encryption? table might actually send it or enable external ROM? AM_RANGE(0xfffffa0c, 0xfffffa0f) AM_READ(unk_startup_r) ADDRESS_MAP_END @@ -266,6 +287,8 @@ WRITE_LINE_MEMBER(pgm2_state::irq) void pgm2_state::machine_start() { + save_item(NAME(m_encryption_table)); + save_item(NAME(m_has_decrypted)); } void pgm2_state::machine_reset() @@ -751,8 +774,7 @@ DRIVER_INIT_MEMBER(pgm2_state,orleg2) src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x4000000); - igs036_decryptor decrypter(orleg2_key); - decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 0; machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020114, 0x20020117, read32_delegate(FUNC(pgm2_state::orleg2_speedup_r),this)); } @@ -767,8 +789,7 @@ DRIVER_INIT_MEMBER(pgm2_state,kov2nl) src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x4000000); - igs036_decryptor decrypter(kov2_key); - decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 0; machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020470, 0x20020473, read32_delegate(FUNC(pgm2_state::kov2nl_speedup_r), this)); } @@ -785,6 +806,7 @@ DRIVER_INIT_MEMBER(pgm2_state,ddpdojh) igs036_decryptor decrypter(ddpdoj_key); decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 1; } DRIVER_INIT_MEMBER(pgm2_state,kov3) @@ -799,6 +821,7 @@ DRIVER_INIT_MEMBER(pgm2_state,kov3) igs036_decryptor decrypter(kov3_key); decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 1; } void pgm2_state::decrypt_kov3_module(uint32_t addrxor, uint16_t dataxor) @@ -844,6 +867,7 @@ DRIVER_INIT_MEMBER(pgm2_state,kof98umh) igs036_decryptor decrypter(kof98umh_key); decrypter.decrypter_rom(memregion("user1")); + m_has_decrypted = 1; } /* PGM2 */ diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 1488486b250..5858e02a764 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -49,6 +49,10 @@ public: DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); + DECLARE_READ8_MEMBER(encryption_r); + DECLARE_WRITE8_MEMBER(encryption_w); + DECLARE_WRITE32_MEMBER(encryption_do_w); + DECLARE_DRIVER_INIT(kov2nl); DECLARE_DRIVER_INIT(orleg2); DECLARE_DRIVER_INIT(ddpdojh); @@ -91,6 +95,9 @@ private: uint32_t m_sprites_mask_mask; uint32_t m_sprites_colour_mask; + + uint8_t m_encryption_table[0x100]; + int m_has_decrypted; // so we only do it once. // devices required_device m_maincpu; diff --git a/src/mame/machine/igs036crypt.cpp b/src/mame/machine/igs036crypt.cpp index b05c0c7c346..4f70e6fdcf6 100644 --- a/src/mame/machine/igs036crypt.cpp +++ b/src/mame/machine/igs036crypt.cpp @@ -234,25 +234,6 @@ int (*igs036_decryptor::rot_direction[4][8])(int) = { // while simple, seems to be pretty robust, so few errors should be expected, // if any. The exceptions are DDPDOJ & KOF98UMH (see below). -const uint8_t orleg2_key[0x100] = { - 0x93, 0x88, 0x22, 0x08, 0x03, 0x02, 0x23, 0xa5, 0x01, 0xa0, 0x11, 0x88, 0x8d, 0xa5, 0x26, 0x09, - 0x82, 0x01, 0x01, 0x01, 0x97, 0x08, 0x94, 0x8c, 0x99, 0x0b, 0x99, 0x01, 0x0b, 0x98, 0x09, 0x19, - 0x91, 0xa8, 0xa0, 0x8b, 0x80, 0x04, 0x22, 0x09, 0xaa, 0x1a, 0x81, 0x23, 0x21, 0x83, 0x8c, 0x2c, - 0x11, 0x81, 0x31, 0xa9, 0x93, 0xa2, 0x01, 0x3e, 0x91, 0xb0, 0x3b, 0x0b, 0x03, 0x07, 0x93, 0x26, - 0xf1, 0x9b, 0xe3, 0x1a, 0x67, 0x2e, 0x84, 0x4e, 0xb9, 0xc1, 0x0a, 0xb8, 0xce, 0xee, 0x07, 0x0c, - 0x00, 0xc1, 0xc2, 0xd1, 0x43, 0xdd, 0x51, 0x1b, 0x48, 0xc3, 0x09, 0xda, 0xc8, 0xc3, 0x59, 0x83, - 0x30, 0x22, 0xf1, 0x3b, 0x05, 0x2d, 0x41, 0x89, 0x2a, 0xa1, 0x42, 0xe2, 0x41, 0xa1, 0xa7, 0xe8, - 0xf3, 0xd9, 0xb1, 0x53, 0x36, 0xd2, 0x15, 0x3a, 0xca, 0xbb, 0xca, 0x09, 0x3f, 0x54, 0x71, 0x40, - 0xb0, 0xa8, 0x10, 0x38, 0x83, 0x8a, 0x82, 0x02, 0x09, 0x83, 0x32, 0x3a, 0xad, 0x05, 0x84, 0xa8, - 0x81, 0x88, 0x02, 0x9a, 0x14, 0x99, 0x84, 0x03, 0x99, 0x10, 0x8b, 0x0a, 0x12, 0x11, 0x82, 0x85, - 0x03, 0x12, 0x30, 0xba, 0x87, 0xac, 0xa1, 0xa0, 0x1b, 0x0a, 0xa2, 0x0a, 0x2a, 0x01, 0x2b, 0x24, - 0xa0, 0x82, 0x01, 0xb2, 0xa5, 0x25, 0xb2, 0x1d, 0x3a, 0x83, 0x88, 0x98, 0xbf, 0x1a, 0x09, 0x22, - 0xf3, 0xb3, 0xc3, 0xca, 0x63, 0x48, 0xc4, 0x6d, 0xa2, 0x6b, 0x5a, 0xbb, 0x24, 0xee, 0x4f, 0x64, - 0xc2, 0x80, 0x01, 0xc3, 0x81, 0xde, 0x94, 0x82, 0xda, 0x98, 0x98, 0x8a, 0x59, 0x10, 0x58, 0xcf, - 0xa2, 0xa8, 0xd3, 0x8a, 0xa6, 0x41, 0x83, 0xe0, 0x68, 0x49, 0x61, 0x19, 0x00, 0x63, 0x49, 0x80, - 0xb0, 0x39, 0xb3, 0x09, 0x91, 0x61, 0x55, 0x89, 0x20, 0x9a, 0x00, 0x3a, 0x80, 0x0a, 0xfa, 0x5c, -}; - const uint8_t m312cn_key[0x100] = { 0x01, 0x09, 0x02, 0xab, 0x23, 0x20, 0xa2, 0x03, 0x10, 0x9b, 0xba, 0x33, 0x04, 0x2e, 0x27, 0x23, 0x92, 0x11, 0x13, 0x93, 0x13, 0x86, 0x83, 0x02, 0x18, 0x8a, 0x8b, 0x9a, 0x10, 0x0f, 0x13, 0x83, @@ -329,25 +310,6 @@ const uint8_t kov3_key[0x100] = { 0x10, 0x09, 0xe0, 0x39, 0x02, 0xfe, 0x47, 0x44, 0x2a, 0x51, 0x21, 0x49, 0x04, 0x1d, 0x2d, 0xed, }; -const uint8_t kov2_key[0x100] = { - 0x02, 0x2b, 0x81, 0x1b, 0xa3, 0x86, 0x83, 0x2a, 0x1b, 0x0b, 0xa0, 0xbb, 0x8b, 0x05, 0x26, 0x0d, - 0x12, 0x81, 0x92, 0x83, 0x11, 0x96, 0x90, 0x80, 0x91, 0x10, 0x92, 0x81, 0x0b, 0x12, 0x94, 0x1c, - 0x30, 0x9b, 0x20, 0xab, 0x83, 0xac, 0x03, 0x0d, 0xa3, 0x2a, 0xa9, 0x01, 0xa0, 0x82, 0x29, 0xa8, - 0x82, 0x3b, 0x80, 0x08, 0x26, 0x2c, 0x27, 0x94, 0x33, 0x23, 0xab, 0x01, 0x8d, 0x91, 0xb5, 0xbf, - 0x50, 0xaa, 0xf2, 0x03, 0xe7, 0x4c, 0x61, 0xc7, 0xf0, 0x73, 0xf3, 0x20, 0xe7, 0x60, 0x45, 0xa1, - 0x11, 0x12, 0xc0, 0x51, 0xc2, 0xc4, 0x15, 0xd5, 0xd9, 0x80, 0x10, 0xc0, 0x10, 0xc7, 0xc3, 0xc8, - 0x33, 0x5b, 0xb2, 0x93, 0xc5, 0x2d, 0xe5, 0xe1, 0x91, 0x43, 0xa0, 0x89, 0x4b, 0x05, 0x0a, 0x44, - 0x53, 0x82, 0x52, 0xaa, 0x24, 0xb9, 0x12, 0x5b, 0x18, 0x10, 0xd8, 0xda, 0x42, 0x6d, 0xc9, 0xd0, - 0x22, 0xb8, 0x33, 0x10, 0x24, 0xa0, 0x84, 0x23, 0x20, 0x19, 0x81, 0x89, 0x0a, 0x0a, 0x24, 0x02, - 0x83, 0x0a, 0x90, 0x11, 0x94, 0x0c, 0x05, 0x8c, 0x90, 0x1b, 0x9b, 0x82, 0x9d, 0x9b, 0x1c, 0x1d, - 0x23, 0x32, 0x02, 0x9a, 0x86, 0x05, 0xa5, 0x26, 0x28, 0x2b, 0x39, 0x98, 0xae, 0xae, 0x2a, 0xaa, - 0x23, 0x83, 0x01, 0x98, 0x81, 0x0d, 0xa6, 0xb2, 0x99, 0x01, 0xb3, 0x01, 0x07, 0x09, 0x88, 0x02, - 0x83, 0xf0, 0x32, 0x09, 0xc2, 0x6c, 0x21, 0xa1, 0x90, 0xb3, 0x31, 0x51, 0xed, 0xaf, 0x45, 0xc5, - 0x02, 0xd1, 0xd3, 0xc0, 0x15, 0xcc, 0x42, 0xd4, 0x03, 0x59, 0x19, 0x93, 0x9a, 0x8e, 0x14, 0x04, - 0x42, 0x08, 0xf0, 0x88, 0xe0, 0x65, 0xa3, 0x4c, 0xe2, 0xe2, 0xb1, 0xb1, 0x20, 0x03, 0xc8, 0x41, - 0xf3, 0x80, 0x93, 0x40, 0x57, 0x69, 0xa1, 0x5b, 0xea, 0xb9, 0x58, 0xcb, 0x04, 0x64, 0x08, 0xf5, -}; - // DDPDOJ & KOF98UMH caused lots of problems to the automatic recovery // process, so they have needed a good amount of manual examination. // It is much more probable for these keys to still contain errors diff --git a/src/mame/machine/igs036crypt.h b/src/mame/machine/igs036crypt.h index a39bb48ab27..8ccb0c6af78 100644 --- a/src/mame/machine/igs036crypt.h +++ b/src/mame/machine/igs036crypt.h @@ -25,12 +25,10 @@ private: int rot_group(int address, const int* group)const; }; -extern const uint8_t orleg2_key[0x100]; extern const uint8_t m312cn_key[0x100]; extern const uint8_t cjddzsp_key[0x100]; extern const uint8_t cjdh2_key[0x100]; extern const uint8_t kov3_key[0x100]; -extern const uint8_t kov2_key[0x100]; extern const uint8_t ddpdoj_key[0x100]; extern const uint8_t kof98umh_key[0x100]; -- cgit v1.2.3-70-g09d2 From a1e8040bbd2e86a5a1375212763d13a4893ded2e Mon Sep 17 00:00:00 2001 From: Scott Stone Date: Thu, 7 Dec 2017 18:51:59 -0500 Subject: Fix DTD validation errors in ibm5150.xml and ibm5170.xml (nw) --- hash/ibm5150.xml | 2 +- hash/ibm5170.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml index 86d0fa9e3c1..8e4831dade9 100644 --- a/hash/ibm5150.xml +++ b/hash/ibm5150.xml @@ -8260,9 +8260,9 @@ has been replaced with an all-zero block. --> A Nightmare on Elm Street 1989 + Monarch Software - Monarch Software diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml index c3baaf7b65a..254e18be9fb 100644 --- a/hash/ibm5170.xml +++ b/hash/ibm5170.xml @@ -9439,9 +9439,9 @@ WarCraft - Orcs & Humans 1994 + Interplay - Interplay -- cgit v1.2.3-70-g09d2 From 0e6b5e19192d3d5008fb57d08d1b187aafc7b83f Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 19:29:08 -0500 Subject: applix: Derive clocks from main XTAL (nw) --- src/mame/drivers/applix.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/applix.cpp b/src/mame/drivers/applix.cpp index 9247a63fc29..0b27a843b49 100644 --- a/src/mame/drivers/applix.cpp +++ b/src/mame/drivers/applix.cpp @@ -835,7 +835,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(applix_state::cass_timer) static MACHINE_CONFIG_START( applix ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68000, 7500000) + MCFG_CPU_ADD("maincpu", M68000, XTAL_30MHz / 4) // MC68000-P10 @ 7.5 MHz MCFG_CPU_PROGRAM_MAP(applix_mem) MCFG_CPU_ADD("subcpu", Z80, XTAL_16MHz / 2) // Z80H MCFG_CPU_PROGRAM_MAP(subcpu_mem) @@ -866,13 +866,13 @@ static MACHINE_CONFIG_START( applix ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) /* Devices */ - MCFG_MC6845_ADD("crtc", MC6845, "screen", 1875000) // 6545 + MCFG_MC6845_ADD("crtc", MC6845, "screen", XTAL_30MHz / 16) // MC6545 @ 1.875 MHz MCFG_MC6845_SHOW_BORDER_AREA(false) MCFG_MC6845_CHAR_WIDTH(8) MCFG_MC6845_UPDATE_ROW_CB(applix_state, crtc_update_row) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(applix_state, vsync_w)) - MCFG_DEVICE_ADD("via6522", VIA6522, 0) + MCFG_DEVICE_ADD("via6522", VIA6522, XTAL_30MHz / 4 / 10) // VIA uses 68000 E clock MCFG_VIA6522_READPB_HANDLER(READ8(applix_state, applix_pb_r)) // in CB1 kbd clk // in CA2 vsync -- cgit v1.2.3-70-g09d2 From ac27acc2b71c7659c7ae55f9a95ab267feaaff5c Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 19:44:44 -0500 Subject: beezer: Sound section has its own XTAL (nw) --- src/mame/drivers/beezer.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/beezer.cpp b/src/mame/drivers/beezer.cpp index 324c40c82b4..fd93de38b6b 100644 --- a/src/mame/drivers/beezer.cpp +++ b/src/mame/drivers/beezer.cpp @@ -451,7 +451,7 @@ void beezer_state::machine_reset() bankswitch_w(machine().dummy_space(), 0, 0); // start timer - m_timer_count->adjust(attotime::zero, 0, attotime::from_hz((XTAL_12MHz / 12) / 16)); + m_timer_count->adjust(attotime::zero, 0, attotime::from_hz((XTAL_4MHz / 4) / 16)); } @@ -473,7 +473,7 @@ static MACHINE_CONFIG_START( beezer ) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", beezer_state, scanline_cb, "screen", 0, 1) - MCFG_DEVICE_ADD("via_u6", VIA6522, 0) + MCFG_DEVICE_ADD("via_u6", VIA6522, XTAL_12MHz / 12) MCFG_VIA6522_READPA_HANDLER(READ8(beezer_state, via_system_pa_r)) MCFG_VIA6522_READPB_HANDLER(READ8(beezer_state, via_system_pb_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(beezer_state, via_system_pa_w)) @@ -497,13 +497,13 @@ static MACHINE_CONFIG_START( beezer ) MCFG_PALETTE_INIT_OWNER(beezer_state, beezer) // sound hardware - MCFG_CPU_ADD("audiocpu", M6809, XTAL_12MHz / 12) + MCFG_CPU_ADD("audiocpu", M6809, XTAL_4MHz / 4) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_INPUT_MERGER_ANY_HIGH("audio_irqs") MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("audiocpu", M6809_IRQ_LINE)) - MCFG_DEVICE_ADD("via_u18", VIA6522, 0) + MCFG_DEVICE_ADD("via_u18", VIA6522, XTAL_4MHz / 4) MCFG_VIA6522_READPA_HANDLER(READ8(beezer_state, via_audio_pa_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(beezer_state, via_audio_pa_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(beezer_state, via_audio_pb_w)) @@ -512,7 +512,7 @@ static MACHINE_CONFIG_START( beezer ) MCFG_VIA6522_CB2_HANDLER(WRITELINE(beezer_state, dmod_data_w)) MCFG_VIA6522_IRQ_HANDLER(DEVWRITELINE("audio_irqs", input_merger_device, in_w<0>)) - MCFG_DEVICE_ADD("ptm", PTM6840, XTAL_12MHz / 12) + MCFG_DEVICE_ADD("ptm", PTM6840, XTAL_4MHz / 4) MCFG_PTM6840_OUT0_CB(WRITELINE(beezer_state, ptm_out0_w)) MCFG_PTM6840_OUT1_CB(WRITELINE(beezer_state, ptm_out1_w)) MCFG_PTM6840_OUT2_CB(WRITELINE(beezer_state, ptm_out2_w)) -- cgit v1.2.3-70-g09d2 From a90412feaf71f8b46517131e32afbf7313528d19 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 20:36:44 -0500 Subject: microtan: Clock derived from XTAL value (nw) --- src/mame/drivers/microtan.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/microtan.cpp b/src/mame/drivers/microtan.cpp index 6bb45857199..d8fcf1f9bab 100644 --- a/src/mame/drivers/microtan.cpp +++ b/src/mame/drivers/microtan.cpp @@ -211,7 +211,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( microtan ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6502, 750000) // 750 kHz + MCFG_CPU_ADD("maincpu", M6502, XTAL_6MHz / 8) // 750 kHz MCFG_CPU_PROGRAM_MAP(microtan_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", microtan_state, microtan_interrupt) @@ -250,7 +250,7 @@ static MACHINE_CONFIG_START( microtan ) MCFG_MOS6551_XTAL(XTAL_1_8432MHz) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, XTAL_6MHz / 8) MCFG_VIA6522_READPA_HANDLER(READ8(microtan_state, via_0_in_a)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(microtan_state, via_0_out_a)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(microtan_state, via_0_out_b)) @@ -258,7 +258,7 @@ static MACHINE_CONFIG_START( microtan ) MCFG_VIA6522_CB2_HANDLER(WRITELINE(microtan_state, via_0_out_cb2)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(microtan_state, via_0_irq)) - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, XTAL_6MHz / 8) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(microtan_state, via_1_out_a)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(microtan_state, via_1_out_b)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(microtan_state, via_1_out_ca2)) -- cgit v1.2.3-70-g09d2 From e23e8c432fc9aeb7eda4a8b76b4b65c9ec7e5d93 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 20:51:28 -0500 Subject: via6522: Eliminate truly ancient hack to default clock to that of first CPU (nw) All VIAs in MAME now have properly configured clocks. --- src/devices/bus/vic20/exp.cpp | 1 + src/devices/bus/vic20/vic1112.cpp | 4 +-- src/devices/machine/6522via.cpp | 9 ------- src/mame/drivers/aim65.cpp | 4 +-- src/mame/drivers/aim65_40.cpp | 6 ++--- src/mame/drivers/aristmk4.cpp | 4 +-- src/mame/drivers/atarisy1.cpp | 2 +- src/mame/drivers/cops.cpp | 12 ++++----- src/mame/drivers/gameplan.cpp | 6 ++--- src/mame/drivers/goupil.cpp | 12 ++++----- src/mame/drivers/gts3.cpp | 4 +-- src/mame/drivers/gts3a.cpp | 4 +-- src/mame/drivers/lwriter.cpp | 2 +- src/mame/drivers/ssystem3.cpp | 2 +- src/mame/drivers/trvquest.cpp | 6 ++--- src/mame/drivers/vectrex.cpp | 6 ++--- src/mame/drivers/vic20.cpp | 51 ++++++++++++++++++++++++++------------- 17 files changed, 72 insertions(+), 63 deletions(-) diff --git a/src/devices/bus/vic20/exp.cpp b/src/devices/bus/vic20/exp.cpp index 535375536be..e70bda544bc 100644 --- a/src/devices/bus/vic20/exp.cpp +++ b/src/devices/bus/vic20/exp.cpp @@ -219,5 +219,6 @@ SLOT_INTERFACE_START( vic20_expansion_cards ) // the following need ROMs from the software list SLOT_INTERFACE_INTERNAL("standard", VIC20_STD) SLOT_INTERFACE_INTERNAL("ieee488", VIC1112) + MCFG_SLOT_OPTION_CLOCK("ieee488", DERIVED_CLOCK(1, 1)) SLOT_INTERFACE_INTERNAL("megacart", VIC20_MEGACART) SLOT_INTERFACE_END diff --git a/src/devices/bus/vic20/vic1112.cpp b/src/devices/bus/vic20/vic1112.cpp index a38bf02eb7f..25e6b6d6804 100644 --- a/src/devices/bus/vic20/vic1112.cpp +++ b/src/devices/bus/vic20/vic1112.cpp @@ -98,12 +98,12 @@ WRITE_LINE_MEMBER( vic1112_device::via1_irq_w ) //------------------------------------------------- MACHINE_CONFIG_MEMBER( vic1112_device::device_add_mconfig ) - MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 0) + MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, DERIVED_CLOCK(1, 1)) MCFG_VIA6522_READPB_HANDLER(READ8(vic1112_device, via0_pb_r)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic1112_device, via0_pb_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(vic1112_device, via0_irq_w)) - MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0) + MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, DERIVED_CLOCK(1, 1)) MCFG_VIA6522_READPB_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r)) MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8(IEEE488_TAG, ieee488_device, dio_w)) MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(IEEE488_TAG, ieee488_device, atn_w)) diff --git a/src/devices/machine/6522via.cpp b/src/devices/machine/6522via.cpp index ae1b7da0f61..a4ba3e58478 100644 --- a/src/devices/machine/6522via.cpp +++ b/src/devices/machine/6522via.cpp @@ -4,9 +4,6 @@ Rockwell 6522 VIA interface and emulation - This function emulates the functionality of up to 8 6522 - versatile interface adapters. - This is based on the M6821 emulation in MAME. To do: @@ -211,12 +208,6 @@ void via6522_device::device_start() m_shift_timer = timer_alloc(TIMER_SHIFT); m_shift_irq_timer = timer_alloc(TIMER_SHIFT_IRQ); - /* Default clock is from CPU1 */ - if (clock() == 0) - { - set_unscaled_clock(machine().firstcpu->clock()); - } - /* save state register */ save_item(NAME(m_in_a)); save_item(NAME(m_in_ca1)); diff --git a/src/mame/drivers/aim65.cpp b/src/mame/drivers/aim65.cpp index 17f9b005ddb..da7bfabb98b 100644 --- a/src/mame/drivers/aim65.cpp +++ b/src/mame/drivers/aim65.cpp @@ -206,7 +206,7 @@ static MACHINE_CONFIG_START( aim65 ) MCFG_MOS6530n_IN_PB_CB(READ8(aim65_state, aim65_riot_b_r)) MCFG_MOS6530n_IRQ_CB(INPUTLINE("maincpu", M6502_IRQ_LINE)) - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, AIM65_CLOCK) MCFG_VIA6522_READPB_HANDLER(READ8(aim65_state, aim65_pb_r)) // in CA1 printer ready? MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(aim65_state, aim65_pb_w)) @@ -215,7 +215,7 @@ static MACHINE_CONFIG_START( aim65 ) // out CB2 turn printer on MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6502_IRQ_LINE)) - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, AIM65_CLOCK) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6502_IRQ_LINE)) MCFG_DEVICE_ADD("pia6821", PIA6821, 0) diff --git a/src/mame/drivers/aim65_40.cpp b/src/mame/drivers/aim65_40.cpp index e1121a2f014..3837a0016a2 100644 --- a/src/mame/drivers/aim65_40.cpp +++ b/src/mame/drivers/aim65_40.cpp @@ -122,9 +122,9 @@ static MACHINE_CONFIG_START( aim65_40 ) /* sound hardware */ /* devices */ - MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 0) - MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0) - MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, 0) + MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 1000000) + MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 1000000) + MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, 1000000) MCFG_DEVICE_ADD(M6551_TAG, MOS6551, 0) MCFG_MOS6551_XTAL(XTAL_1_8432MHz) MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) diff --git a/src/mame/drivers/aristmk4.cpp b/src/mame/drivers/aristmk4.cpp index 1e12e519955..329b6fcb240 100644 --- a/src/mame/drivers/aristmk4.cpp +++ b/src/mame/drivers/aristmk4.cpp @@ -1747,7 +1747,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(aristmk4_state::aristmk4_pf) static MACHINE_CONFIG_START( aristmk4 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/8) // 1.5mhz + MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/8) // M68B09E @ 1.5 MHz MCFG_CPU_PROGRAM_MAP(aristmk4_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", aristmk4_state, irq0_line_hold) @@ -1772,7 +1772,7 @@ static MACHINE_CONFIG_START( aristmk4 ) MCFG_I8255_IN_PORTB_CB(READ8(aristmk4_state, pb1_r)) MCFG_I8255_IN_PORTC_CB(READ8(aristmk4_state, pc1_r)) - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) /* 1 MHz.(only 1 or 2 MHz.are valid) */ + MCFG_DEVICE_ADD("via6522_0", VIA6522, MAIN_CLOCK/8) // R65C22P2 MCFG_VIA6522_READPA_HANDLER(READ8(aristmk4_state, via_a_r)) MCFG_VIA6522_READPB_HANDLER(READ8(aristmk4_state, via_b_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(aristmk4_state, via_a_w)) diff --git a/src/mame/drivers/atarisy1.cpp b/src/mame/drivers/atarisy1.cpp index da07124c3dd..f015ea086b5 100644 --- a/src/mame/drivers/atarisy1.cpp +++ b/src/mame/drivers/atarisy1.cpp @@ -795,7 +795,7 @@ static MACHINE_CONFIG_START( atarisy1 ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, ATARI_CLOCK_14MHz/8) MCFG_VIA6522_READPA_HANDLER(READ8(atarisy1_state, via_pa_r)) MCFG_VIA6522_READPB_HANDLER(READ8(atarisy1_state, via_pb_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(atarisy1_state, via_pa_w)) diff --git a/src/mame/drivers/cops.cpp b/src/mame/drivers/cops.cpp index a8c44f360ea..e1238dc481f 100644 --- a/src/mame/drivers/cops.cpp +++ b/src/mame/drivers/cops.cpp @@ -915,7 +915,7 @@ DRIVER_INIT_MEMBER(cops_state,cops) static MACHINE_CONFIG_START( cops ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6502,MAIN_CLOCK/2) + MCFG_CPU_ADD("maincpu", M6502, MAIN_CLOCK/2) MCFG_CPU_PROGRAM_MAP(cops_map) /* video hardware */ @@ -923,15 +923,15 @@ static MACHINE_CONFIG_START( cops ) MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc") /* via */ - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, MAIN_CLOCK/2) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(cops_state, via1_irq)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(cops_state, via1_b_w)) MCFG_VIA6522_CB1_HANDLER(WRITE8(cops_state, via1_cb1_w)) - MCFG_DEVICE_ADD("via6522_2", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_2", VIA6522, MAIN_CLOCK/2) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(cops_state, via2_irq)) - MCFG_DEVICE_ADD("via6522_3", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_3", VIA6522, MAIN_CLOCK/2) MCFG_VIA6522_READPA_HANDLER(READ8(cops_state, cdrom_data_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(cops_state, cdrom_data_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(cops_state, cdrom_ctrl_w)) @@ -951,7 +951,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( revlatns ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6502,MAIN_CLOCK/2) + MCFG_CPU_ADD("maincpu", M6502, MAIN_CLOCK/2) MCFG_CPU_PROGRAM_MAP(revlatns_map) /* video hardware */ @@ -959,7 +959,7 @@ static MACHINE_CONFIG_START( revlatns ) MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc") /* via */ - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, MAIN_CLOCK/2) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(cops_state, via1_irq)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(cops_state, via1_b_w)) MCFG_VIA6522_CB1_HANDLER(WRITE8(cops_state, via1_cb1_w)) diff --git a/src/mame/drivers/gameplan.cpp b/src/mame/drivers/gameplan.cpp index 1460568edfa..4cf8aabac2a 100644 --- a/src/mame/drivers/gameplan.cpp +++ b/src/mame/drivers/gameplan.cpp @@ -986,18 +986,18 @@ static MACHINE_CONFIG_START( gameplan ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, GAMEPLAN_MAIN_CPU_CLOCK) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(gameplan_state, video_data_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(gameplan_state, gameplan_video_command_w)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(gameplan_state, video_command_trigger_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(gameplan_state, via_irq)) - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, GAMEPLAN_MAIN_CPU_CLOCK) MCFG_VIA6522_READPA_HANDLER(READ8(gameplan_state, io_port_r)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(gameplan_state, io_select_w)) MCFG_VIA6522_CB2_HANDLER(WRITELINE(gameplan_state, coin_w)) - MCFG_DEVICE_ADD("via6522_2", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_2", VIA6522, GAMEPLAN_MAIN_CPU_CLOCK) MCFG_VIA6522_READPB_HANDLER(DEVREAD8("soundlatch", generic_latch_8_device, read)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(gameplan_state, audio_cmd_w)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(gameplan_state, audio_trigger_w)) diff --git a/src/mame/drivers/goupil.cpp b/src/mame/drivers/goupil.cpp index 182f60f0458..647c409f5b9 100644 --- a/src/mame/drivers/goupil.cpp +++ b/src/mame/drivers/goupil.cpp @@ -552,15 +552,15 @@ static MACHINE_CONFIG_START( goupil_g1 ) MCFG_EF9364_PAGES_CNT(1); MCFG_TIMER_DRIVER_ADD_SCANLINE("goupil_sl", goupil_g1_state, goupil_scanline, "screen", 0, 10) - MCFG_DEVICE_ADD("m_via_video", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_video", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(goupil_g1_state, via_video_pba_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(goupil_g1_state, via_video_pbb_w)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(goupil_g1_state, via_video_ca2_w)) - MCFG_DEVICE_ADD("m_via_keyb", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_keyb", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE)) - MCFG_DEVICE_ADD("m_via_modem", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_modem", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE)) /* Floppy */ @@ -615,15 +615,15 @@ static MACHINE_CONFIG_START( goupil_g2 ) MCFG_MC6845_UPDATE_ROW_CB(goupil_g2_state, crtc_update_row) MCFG_MC6845_ADDR_CHANGED_CB(goupil_g2_state, crtc_update_addr_changed) - MCFG_DEVICE_ADD("m_via_video", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_video", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(goupil_g2_state, via_video_pba_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(goupil_g2_state, via_video_pbb_w)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(goupil_g2_state, via_video_ca2_w)) - MCFG_DEVICE_ADD("m_via_keyb", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_keyb", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE)) - MCFG_DEVICE_ADD("m_via_modem", VIA6522, 0) + MCFG_DEVICE_ADD("m_via_modem", VIA6522, CPU_CLOCK / 4) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE)) /* Floppy */ diff --git a/src/mame/drivers/gts3.cpp b/src/mame/drivers/gts3.cpp index 6a7262468e6..427912fd653 100644 --- a/src/mame/drivers/gts3.cpp +++ b/src/mame/drivers/gts3.cpp @@ -286,7 +286,7 @@ static MACHINE_CONFIG_START( gts3 ) /* Sound */ MCFG_FRAGMENT_ADD( genpin_audio ) - MCFG_DEVICE_ADD("u4", VIA6522, 0) + MCFG_DEVICE_ADD("u4", VIA6522, XTAL_4MHz / 2) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M65C02_IRQ_LINE)) MCFG_VIA6522_READPA_HANDLER(READ8(gts3_state, u4a_r)) MCFG_VIA6522_READPB_HANDLER(READ8(gts3_state, u4b_r)) @@ -294,7 +294,7 @@ static MACHINE_CONFIG_START( gts3 ) //MCFG_VIA6522_CA2_HANDLER(WRITELINE(gts3_state, u4ca2_w)) MCFG_VIA6522_CB2_HANDLER(WRITELINE(gts3_state, nmi_w)) - MCFG_DEVICE_ADD("u5", VIA6522, 0) + MCFG_DEVICE_ADD("u5", VIA6522, XTAL_4MHz / 2) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M65C02_IRQ_LINE)) //MCFG_VIA6522_READPA_HANDLER(READ8(gts3_state, u5a_r)) //MCFG_VIA6522_READPB_HANDLER(READ8(gts3_state, u5b_r)) diff --git a/src/mame/drivers/gts3a.cpp b/src/mame/drivers/gts3a.cpp index 8cbf012e168..bf2f4455e20 100644 --- a/src/mame/drivers/gts3a.cpp +++ b/src/mame/drivers/gts3a.cpp @@ -357,7 +357,7 @@ static MACHINE_CONFIG_START( gts3a ) /* Sound */ MCFG_FRAGMENT_ADD( genpin_audio ) - MCFG_DEVICE_ADD("u4", VIA6522, 0) + MCFG_DEVICE_ADD("u4", VIA6522, XTAL_4MHz / 2) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M65C02_IRQ_LINE)) MCFG_VIA6522_READPA_HANDLER(READ8(gts3a_state, u4a_r)) MCFG_VIA6522_READPB_HANDLER(READ8(gts3a_state, u4b_r)) @@ -365,7 +365,7 @@ static MACHINE_CONFIG_START( gts3a ) //MCFG_VIA6522_CA2_HANDLER(WRITELINE(gts3a_state, u4ca2_w)) MCFG_VIA6522_CB2_HANDLER(WRITELINE(gts3a_state, nmi_w)) - MCFG_DEVICE_ADD("u5", VIA6522, 0) + MCFG_DEVICE_ADD("u5", VIA6522, XTAL_4MHz / 2) MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M65C02_IRQ_LINE)) //MCFG_VIA6522_READPA_HANDLER(READ8(gts3a_state, u5a_r)) //MCFG_VIA6522_READPB_HANDLER(READ8(gts3a_state, u5b_r)) diff --git a/src/mame/drivers/lwriter.cpp b/src/mame/drivers/lwriter.cpp index 93cea41ba28..e69be51d853 100644 --- a/src/mame/drivers/lwriter.cpp +++ b/src/mame/drivers/lwriter.cpp @@ -376,7 +376,7 @@ static MACHINE_CONFIG_START( lwriter ) #if TPI MCFG_DEVICE_ADD("tpi", TPI6525, 0) #else - MCFG_DEVICE_ADD("via", VIA6522, 0) + MCFG_DEVICE_ADD("via", VIA6522, CPU_CLK/10) // 68000 E clock presumed MCFG_VIA6522_READPA_HANDLER(READ8(lwriter_state, via_pa_r)) MCFG_VIA6522_READPB_HANDLER(READ8(lwriter_state, via_pb_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(lwriter_state, via_pa_w)) diff --git a/src/mame/drivers/ssystem3.cpp b/src/mame/drivers/ssystem3.cpp index ad655d8bd01..f1f2a91409b 100644 --- a/src/mame/drivers/ssystem3.cpp +++ b/src/mame/drivers/ssystem3.cpp @@ -305,7 +305,7 @@ static MACHINE_CONFIG_START( ssystem3 ) MCFG_PALETTE_INIT_OWNER(ssystem3_state, ssystem3) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, 1000000) MCFG_VIA6522_READPA_HANDLER(READ8(ssystem3_state,ssystem3_via_read_a)) MCFG_VIA6522_READPB_HANDLER(READ8(ssystem3_state,ssystem3_via_read_b)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(ssystem3_state,ssystem3_via_write_a)) diff --git a/src/mame/drivers/trvquest.cpp b/src/mame/drivers/trvquest.cpp index 49c05ddde00..8e2079cdaf9 100644 --- a/src/mame/drivers/trvquest.cpp +++ b/src/mame/drivers/trvquest.cpp @@ -200,17 +200,17 @@ static MACHINE_CONFIG_START( trvquest ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, XTAL_6MHz/4) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(gameplan_state, video_data_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(gameplan_state, gameplan_video_command_w)) MCFG_VIA6522_CA2_HANDLER(WRITELINE(gameplan_state, video_command_trigger_w)) - MCFG_DEVICE_ADD("via6522_1", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_1", VIA6522, XTAL_6MHz/4) MCFG_VIA6522_READPA_HANDLER(IOPORT("IN0")) MCFG_VIA6522_READPB_HANDLER(IOPORT("IN1")) MCFG_VIA6522_CA2_HANDLER(WRITELINE(gameplan_state, trvquest_coin_w)) - MCFG_DEVICE_ADD("via6522_2", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_2", VIA6522, XTAL_6MHz/4) MCFG_VIA6522_READPA_HANDLER(IOPORT("UNK")) MCFG_VIA6522_READPB_HANDLER(IOPORT("DSW")) MCFG_VIA6522_CA2_HANDLER(WRITELINE(gameplan_state, trvquest_misc_w)) diff --git a/src/mame/drivers/vectrex.cpp b/src/mame/drivers/vectrex.cpp index 7b8adbec7a7..446d36edff6 100644 --- a/src/mame/drivers/vectrex.cpp +++ b/src/mame/drivers/vectrex.cpp @@ -97,7 +97,7 @@ SLOT_INTERFACE_END static MACHINE_CONFIG_START( vectrex ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_6MHz / 4) + MCFG_CPU_ADD("maincpu", M6809, XTAL_6MHz / 4) // 68A09 MCFG_CPU_PROGRAM_MAP(vectrex_map) /* video hardware */ @@ -114,13 +114,13 @@ static MACHINE_CONFIG_START( vectrex ) MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) - MCFG_SOUND_ADD("ay8912", AY8912, 1500000) + MCFG_SOUND_ADD("ay8912", AY8912, XTAL_6MHz / 4) MCFG_AY8910_PORT_A_READ_CB(IOPORT("BUTTONS")) MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(vectrex_state, vectrex_psg_port_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) /* via */ - MCFG_DEVICE_ADD("via6522_0", VIA6522, 0) + MCFG_DEVICE_ADD("via6522_0", VIA6522, XTAL_6MHz / 4) MCFG_VIA6522_READPA_HANDLER(READ8(vectrex_state, vectrex_via_pa_r)) MCFG_VIA6522_READPB_HANDLER(READ8(vectrex_state, vectrex_via_pb_r)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(vectrex_state, v_via_pa_w)) diff --git a/src/mame/drivers/vic20.cpp b/src/mame/drivers/vic20.cpp index 86db0c42385..2d5846e80c5 100644 --- a/src/mame/drivers/vic20.cpp +++ b/src/mame/drivers/vic20.cpp @@ -789,23 +789,6 @@ WRITE_LINE_MEMBER(vic20_state::write_user_cassette_switch) static MACHINE_CONFIG_START( vic20 ) // devices - MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0) - MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via1_pa_r)) - MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(vic20_state, via1_pa_w)) - MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via1_pb_w)) - MCFG_VIA6522_CB1_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_b)) - MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(PET_DATASSETTE_PORT_TAG, pet_datassette_port_device, motor_w)) - MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_m)) - MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_NMI_LINE)) - - MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, 0) - MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via2_pa_r)) - MCFG_VIA6522_READPB_HANDLER(READ8(vic20_state, via2_pb_r)) - MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via2_pb_w)) - MCFG_VIA6522_CA2_HANDLER(WRITELINE(vic20_state, via2_ca2_w)) - MCFG_VIA6522_CB2_HANDLER(WRITELINE(vic20_state, via2_cb2_w)) - MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_IRQ_LINE)) - MCFG_PET_DATASSETTE_PORT_ADD(PET_DATASSETTE_PORT_TAG, cbm_datassette_devices, "c1530", DEVWRITELINE(M6522_2_TAG, via6522_device, write_ca1)) MCFG_CBM_IEC_ADD("c1541") MCFG_CBM_IEC_BUS_SRQ_CALLBACK(DEVWRITELINE(M6522_2_TAG, via6522_device, write_cb1)) @@ -854,6 +837,23 @@ static MACHINE_CONFIG_DERIVED( ntsc, vic20 ) MCFG_CPU_PROGRAM_MAP(vic20_mem) MCFG_M6502_DISABLE_DIRECT() // address decoding is 100% dynamic, no RAM/ROM banks + MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, MOS6560_CLOCK) + MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via1_pa_r)) + MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(vic20_state, via1_pa_w)) + MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via1_pb_w)) + MCFG_VIA6522_CB1_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_b)) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(PET_DATASSETTE_PORT_TAG, pet_datassette_port_device, motor_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_m)) + MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_NMI_LINE)) + + MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, MOS6560_CLOCK) + MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via2_pa_r)) + MCFG_VIA6522_READPB_HANDLER(READ8(vic20_state, via2_pb_r)) + MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via2_pb_w)) + MCFG_VIA6522_CA2_HANDLER(WRITELINE(vic20_state, via2_ca2_w)) + MCFG_VIA6522_CB2_HANDLER(WRITELINE(vic20_state, via2_cb2_w)) + MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_IRQ_LINE)) + // video/sound hardware MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_MOS6560_ADD(M6560_TAG, SCREEN_TAG, MOS6560_CLOCK, vic_videoram_map, vic_colorram_map) @@ -884,6 +884,23 @@ static MACHINE_CONFIG_DERIVED( pal, vic20 ) MCFG_CPU_PROGRAM_MAP(vic20_mem) MCFG_M6502_DISABLE_DIRECT() // address decoding is 100% dynamic, no RAM/ROM banks + MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, MOS6561_CLOCK) + MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via1_pa_r)) + MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(vic20_state, via1_pa_w)) + MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via1_pb_w)) + MCFG_VIA6522_CB1_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_b)) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(PET_DATASSETTE_PORT_TAG, pet_datassette_port_device, motor_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(PET_USER_PORT_TAG, pet_user_port_device, write_m)) + MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_NMI_LINE)) + + MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, MOS6561_CLOCK) + MCFG_VIA6522_READPA_HANDLER(READ8(vic20_state, via2_pa_r)) + MCFG_VIA6522_READPB_HANDLER(READ8(vic20_state, via2_pb_r)) + MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic20_state, via2_pb_w)) + MCFG_VIA6522_CA2_HANDLER(WRITELINE(vic20_state, via2_ca2_w)) + MCFG_VIA6522_CB2_HANDLER(WRITELINE(vic20_state, via2_cb2_w)) + MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_TAG, M6502_IRQ_LINE)) + // video/sound hardware MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_MOS6561_ADD(M6560_TAG, SCREEN_TAG, MOS6561_CLOCK, vic_videoram_map, vic_colorram_map) -- cgit v1.2.3-70-g09d2 From f994c06ad7960a06883aa8ac6b9e5e5c44ed1fac Mon Sep 17 00:00:00 2001 From: briantro Date: Thu, 7 Dec 2017 20:00:14 -0600 Subject: gottlieb.cpp: Correct Krull rom labels (nw) --- src/mame/drivers/gottlieb.cpp | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mame/drivers/gottlieb.cpp b/src/mame/drivers/gottlieb.cpp index d86b95b3fec..df603359dab 100644 --- a/src/mame/drivers/gottlieb.cpp +++ b/src/mame/drivers/gottlieb.cpp @@ -2161,13 +2161,13 @@ ROM_END ROM_START( krull ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "ram2.bin", 0x1000, 0x1000, CRC(302feadf) SHA1(9d70de35e4f0490dc4e601070993ad146f250dea) ) - ROM_LOAD( "ram4.bin", 0x2000, 0x1000, CRC(79355a60) SHA1(57ad5c904b9ac4bf7c7d828bf755bbcbba6a4fd7) ) - ROM_LOAD( "rom4.bin", 0x6000, 0x2000, CRC(2b696394) SHA1(b18270f4ad97743f6ff8c4cbc93e523c77a8e794) ) - ROM_LOAD( "rom3.bin", 0x8000, 0x2000, CRC(14b0ee42) SHA1(276c4008a013806b3989c529f41cbc358ec49fd6) ) - ROM_LOAD( "rom2.bin", 0xa000, 0x2000, CRC(b5fad94a) SHA1(1bae895fbdd658cfb56c53cc2139282cc1e778de) ) - ROM_LOAD( "rom1.bin", 0xc000, 0x2000, CRC(1ad956a3) SHA1(f5b74b196fe1bd9ab48336e0051cbf29c650cfc1) ) - ROM_LOAD( "rom0.bin", 0xe000, 0x2000, CRC(a466afae) SHA1(d691cbb46e8c3b71f9b1688d7fcef36df82aa854) ) + ROM_LOAD( "gv-105_ram_2.c7", 0x1000, 0x1000, CRC(302feadf) SHA1(9d70de35e4f0490dc4e601070993ad146f250dea) ) + ROM_LOAD( "gv-105_ram_4.c9-10", 0x2000, 0x1000, CRC(79355a60) SHA1(57ad5c904b9ac4bf7c7d828bf755bbcbba6a4fd7) ) + ROM_LOAD( "gv-105_rom_4.c16", 0x6000, 0x2000, CRC(2b696394) SHA1(b18270f4ad97743f6ff8c4cbc93e523c77a8e794) ) + ROM_LOAD( "gv-105_rom_3.c14-15", 0x8000, 0x2000, CRC(14b0ee42) SHA1(276c4008a013806b3989c529f41cbc358ec49fd6) ) + ROM_LOAD( "gv-105_rom_2.c13-14", 0xa000, 0x2000, CRC(b5fad94a) SHA1(1bae895fbdd658cfb56c53cc2139282cc1e778de) ) + ROM_LOAD( "gv-105_rom_1.c12-13", 0xc000, 0x2000, CRC(1ad956a3) SHA1(f5b74b196fe1bd9ab48336e0051cbf29c650cfc1) ) + ROM_LOAD( "gv-105_rom_0.c11-12", 0xe000, 0x2000, CRC(a466afae) SHA1(d691cbb46e8c3b71f9b1688d7fcef36df82aa854) ) ROM_REGION( 0x10000, "r1sound:audiocpu", 0 ) ROM_LOAD( "snd1.bin", 0x6000, 0x1000, CRC(dd2b30b4) SHA1(f01cb64932493bf69d4fc75a7fa809ff6f6e4263) ) @@ -2177,10 +2177,10 @@ ROM_START( krull ) /* no ROMs; RAM is used instead */ ROM_REGION( 0x8000, "sprites", 0 ) - ROM_LOAD( "fg3.bin", 0x0000, 0x2000, CRC(82d77a45) SHA1(753476609c4bf4f0f0cd28d61fd8aef6967bda57) ) - ROM_LOAD( "fg2.bin", 0x2000, 0x2000, CRC(25a24317) SHA1(33d2c23a388b09c4a09b9893648c30fbd5482cc3) ) - ROM_LOAD( "fg1.bin", 0x4000, 0x2000, CRC(7e3ad7b0) SHA1(0de86e632e5a9e6c1ec82550b15dc25a17ab7066) ) - ROM_LOAD( "fg0.bin", 0x6000, 0x2000, CRC(7402dc19) SHA1(d6d1b8aca8e9ee3bdc57f4474d22b405963909ec) ) + ROM_LOAD( "gv-105_fg_3.k7-8", 0x0000, 0x2000, CRC(82d77a45) SHA1(753476609c4bf4f0f0cd28d61fd8aef6967bda57) ) + ROM_LOAD( "gv-105_fg_2.k6", 0x2000, 0x2000, CRC(25a24317) SHA1(33d2c23a388b09c4a09b9893648c30fbd5482cc3) ) + ROM_LOAD( "gv-105_fg_1.k5", 0x4000, 0x2000, CRC(7e3ad7b0) SHA1(0de86e632e5a9e6c1ec82550b15dc25a17ab7066) ) + ROM_LOAD( "gv-105_fg_0.k4", 0x6000, 0x2000, CRC(7402dc19) SHA1(d6d1b8aca8e9ee3bdc57f4474d22b405963909ec) ) ROM_END -- cgit v1.2.3-70-g09d2 From c9b172dcfe924dee3399931778a5b7e3a64d561f Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Fri, 8 Dec 2017 02:34:21 +0000 Subject: afighterh uses the same encryption as the parent, fix date c+p error too (nw) --- src/mame/drivers/segas16b.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index 8cea6b979a7..a5de4a65df9 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -4262,7 +4262,7 @@ ROM_START( afighterg ) // could be 16A ROM_END -ROM_START( afighterh ) // could be 16A +ROM_START( afighterh ) ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code ROM_LOAD16_BYTE( "epr10354.bin", 0x00001, 0x08000, CRC(6dad6dd1) SHA1(8cdd1c10d60cda09f888b2f03b7d4c76100b4ad0) ) // == encrypted 10169 (not perfect match) (same rev as 10160) ROM_LOAD16_BYTE( "epr10357.bin", 0x00000, 0x08000, CRC(69777a15) SHA1(26fcca4b5476596cec9a59f5445f0b24c9373a8b) ) @@ -4290,7 +4290,7 @@ ROM_START( afighterh ) // could be 16A ROM_LOAD( "epr10039.bin", 0x00000, 0x8000, CRC(b04757b0) SHA1(24bface5a23ed658675f414c9937bf9d7f7ed5ec) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-0018.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END @@ -9089,10 +9089,10 @@ GAME( 1987, aliensyn7, aliensyn, system16b_mc8123, aliensyn, segas16b_state, GAME( 1987, aliensyn3, aliensyn, system16b_fd1089a, aliensyn, segas16b_state,generic_5358_small, ROT0, "Sega", "Alien Syndrome (set 3, System 16B, FD1089A 317-0033)", 0 ) GAME( 1987, aliensynj, aliensyn, system16b_fd1089a, aliensynj,segas16b_state,generic_5358_small, ROT0, "Sega", "Alien Syndrome (set 6, Japan, new, System 16B, FD1089A 317-0033)", 0 ) -GAME( 1987, afightere, afighter, system16b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, unprotected, analog controls)", 0 ) -GAME( 1987, afighterf, afighter, system16b_fd1089a, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, analog controls)", MACHINE_NOT_WORKING ) // encrypted version of afightere -GAME( 1987, afighterg, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, set 1)", MACHINE_NOT_WORKING ) // same encryption as afighterf -GAME( 1987, afighterh, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, set 2)", MACHINE_NOT_WORKING ) // different encryption, same rev as afighterg +GAME( 1986, afightere, afighter, system16b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, unprotected, analog controls)", 0 ) +GAME( 1986, afighterf, afighter, system16b_fd1089a, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, analog controls)", MACHINE_NOT_WORKING ) // encrypted version of afightere +GAME( 1986, afighterg, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown)", MACHINE_NOT_WORKING ) // same encryption as afighterf +GAME( 1986, afighterh, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-0018)", 0 ) // same rev as afighterg GAME( 1988, altbeast, 0, system16b_i8751, altbeast, segas16b_state,generic_5521, ROT0, "Sega", "Altered Beast (set 8) (8751 317-0078)", 0 ) GAME( 1988, altbeastj, altbeast, system16b_i8751, altbeast, segas16b_state,altbeasj_5521, ROT0, "Sega", "Juuouki (set 7, Japan) (8751 317-0077)", 0 ) -- cgit v1.2.3-70-g09d2 From 691a565b64784e8fbcb7d5902d3f7c8262a430f5 Mon Sep 17 00:00:00 2001 From: EoceneMiacid Date: Fri, 8 Dec 2017 03:55:50 +0100 Subject: Added 'Sideline' (#2902) New working software list additions ----------------------------------- ibm5170_cdrom: Sideline [EoceneMiacid] --- hash/ibm5170_cdrom.xml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index ec6d0769861..4da58f24cc7 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -22,6 +22,19 @@ + + + Sideline + 1996 + EMAG Soft + + + + + + + + -- cgit v1.2.3-70-g09d2 From 608104c43f5fb7fc47958d61b7e2ea36cea0bdaf Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Thu, 7 Dec 2017 18:59:40 -0800 Subject: fix validation errors (nw) --- hash/ibm5170_cdrom.xml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 4da58f24cc7..9bf176e8c75 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -27,12 +27,12 @@ Sideline 1996 EMAG Soft - + - - + + -- cgit v1.2.3-70-g09d2 From 572791754da7fa5bb24bf2bb1eda1acd75b88226 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 7 Dec 2017 22:36:50 -0500 Subject: gts3a.cpp: Very minor note (nw) --- src/mame/drivers/gts3a.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/gts3a.cpp b/src/mame/drivers/gts3a.cpp index bf2f4455e20..2ef0a33691a 100644 --- a/src/mame/drivers/gts3a.cpp +++ b/src/mame/drivers/gts3a.cpp @@ -334,7 +334,7 @@ static MACHINE_CONFIG_START( gts3a ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", M65C02, XTAL_4MHz / 2) MCFG_CPU_PROGRAM_MAP(gts3a_map) - MCFG_NVRAM_ADD_0FILL("nvram") + MCFG_NVRAM_ADD_0FILL("nvram") // 6116LP + DS1210 MCFG_CPU_ADD("dmdcpu", M65C02, XTAL_3_579545MHz / 2) MCFG_CPU_PROGRAM_MAP(gts3a_dmd_map) -- cgit v1.2.3-70-g09d2 From 095afa85490016f0d5e96fcf3b007e2ea6ecd0d4 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 8 Dec 2017 08:26:00 +0100 Subject: zn.cpp: use optional_memory_bank (nw) --- src/mame/drivers/zn.cpp | 66 ++++++++++++++++++++++++++----------------------- 1 file changed, 35 insertions(+), 31 deletions(-) diff --git a/src/mame/drivers/zn.cpp b/src/mame/drivers/zn.cpp index 29bffc8bbcf..82057625afe 100644 --- a/src/mame/drivers/zn.cpp +++ b/src/mame/drivers/zn.cpp @@ -63,6 +63,8 @@ public: m_vt83c461(*this, "ide"), m_soundlatch(*this, "soundlatch"), m_soundlatch16(*this, "soundlatch16"), + m_bankedroms(*this, "bankedroms"), + m_soundbank(*this, "soundbank"), m_cat702_1_dataout(1), m_cat702_2_dataout(1), m_znmcu_dataout(1), @@ -173,6 +175,8 @@ private: optional_device m_vt83c461; optional_device m_soundlatch; optional_device m_soundlatch16; + optional_memory_bank m_bankedroms; + optional_memory_bank m_soundbank; int m_cat702_1_dataout; int m_cat702_2_dataout; @@ -525,12 +529,12 @@ READ16_MEMBER(zn_state::capcom_kickharness_r) WRITE8_MEMBER(zn_state::bank_coh1000c_w) { - membank( "bankedroms" )->set_entry( data ); + m_bankedroms->set_entry( data ); } WRITE8_MEMBER(zn_state::qsound_bankswitch_w) { - membank( "soundbank" )->set_entry( data & 0x0f ); + m_soundbank->set_entry( data & 0x0f ); } INTERRUPT_GEN_MEMBER(zn_state::qsound_interrupt) @@ -558,10 +562,10 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1000c) { - membank("bankedroms")->configure_entries(0, 16, memregion( "maskroms" )->base() + 0x400000, 0x400000 ); /* banked game rom */ - membank("bankedroms")->set_entry(0 ); - membank("soundbank")->configure_entries(0, 16, memregion("audiocpu")->base() + 0x8000, 0x4000 ); /* banked audio rom */ - membank("soundbank")->set_entry(0 ); + m_bankedroms->configure_entries(0, 16, memregion( "maskroms" )->base() + 0x400000, 0x400000 ); /* banked game rom */ + m_bankedroms->set_entry(0 ); + m_soundbank->configure_entries(0, 16, memregion("audiocpu")->base() + 0x8000, 0x4000 ); /* banked audio rom */ + m_soundbank->set_entry(0 ); } MACHINE_RESET_MEMBER(zn_state,glpracr) @@ -1003,12 +1007,12 @@ WRITE8_MEMBER(zn_state::bank_coh1000t_w) m_mb3773->write_line_ck((data & 0x20) >> 5); - membank( "bankedroms" )->set_entry( data & 3 ); + m_bankedroms->set_entry( data & 3 ); } WRITE8_MEMBER(zn_state::fx1a_sound_bankswitch_w) { - membank( "soundbank" )->set_entry( ( data - 1 ) & 0x07 ); + m_soundbank->set_entry( ( data - 1 ) & 0x07 ); } static ADDRESS_MAP_START(coh1000ta_map, AS_PROGRAM, 32, zn_state) @@ -1022,11 +1026,11 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1000ta) { - membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); - membank( "soundbank" )->configure_entries( 0, 8, memregion( "audiocpu" )->base() + 0x4000, 0x4000 ); - membank( "soundbank" )->set_entry( 0 ); + m_soundbank->configure_entries( 0, 8, memregion( "audiocpu" )->base() + 0x4000, 0x4000 ); + m_soundbank->set_entry( 0 ); } static ADDRESS_MAP_START( fx1a_sound_map, AS_PROGRAM, 8, zn_state ) @@ -1097,8 +1101,8 @@ DRIVER_INIT_MEMBER(zn_state,coh1000tb) MACHINE_RESET_MEMBER(zn_state,coh1000tb) { - membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED(coh1000tb, zn1_1mb_vram) @@ -1533,7 +1537,7 @@ WRITE8_MEMBER(zn_state::coh1002e_bank_w) { znsecsel_w( space, offset, data, mem_mask ); - membank( "bankedroms" )->set_entry( data & 3 ); + m_bankedroms->set_entry( data & 3 ); } WRITE8_MEMBER(zn_state::coh1002e_sound_irq_w) @@ -1552,8 +1556,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002e) { - membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); } static ADDRESS_MAP_START( psarc_snd_map, AS_PROGRAM, 16, zn_state ) @@ -1638,7 +1642,7 @@ WRITE16_MEMBER(zn_state::bam2_mcu_w) switch( offset ) { case 0: - membank( "bankedroms" )->set_entry( data & 0xf ); + m_bankedroms->set_entry( data & 0xf ); break; case 1: @@ -1693,8 +1697,8 @@ DRIVER_INIT_MEMBER(zn_state,bam2) MACHINE_RESET_MEMBER(zn_state,bam2) { - membank( "bankedroms" )->configure_entries( 0, 16, memregion( "bankedroms" )->base(), 0x400000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 1 ); + m_bankedroms->configure_entries( 0, 16, memregion( "bankedroms" )->base(), 0x400000 ); /* banked game rom */ + m_bankedroms->set_entry( 1 ); } static MACHINE_CONFIG_DERIVED( bam2, zn1_2mb_vram ) @@ -1939,7 +1943,7 @@ WRITE16_MEMBER(zn_state::nbajamex_bank_w) m_maincpu->space(AS_PROGRAM).install_read_bank(0x1f200000, 0x1f7fffff, "bankedroms2"); membank( "bankedroms2" )->set_base( memregion( "bankedroms" )->base() + bankbase1); } - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() + bankbase0); + m_bankedroms->set_base( memregion( "bankedroms" )->base() + bankbase0); } else if (offset == 1) { @@ -2012,7 +2016,7 @@ DRIVER_INIT_MEMBER(zn_state,nbajamex) MACHINE_RESET_MEMBER(zn_state,nbajamex) { - membank( "bankedroms" )->set_base( memregion( "bankedroms" )->base() ); + m_bankedroms->set_base( memregion( "bankedroms" )->base() ); } DRIVER_INIT_MEMBER(zn_state,jdredd) @@ -2183,7 +2187,7 @@ WRITE16_MEMBER(zn_state::coh1001l_latch_w) WRITE8_MEMBER(zn_state::coh1001l_bank_w) { - membank( "bankedroms" )->set_entry( data & 3 ); + m_bankedroms->set_entry( data & 3 ); } static ADDRESS_MAP_START(coh1001l_map, AS_PROGRAM, 32, zn_state) @@ -2196,8 +2200,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1001l) { - membank( "bankedroms" )->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 4, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); } static ADDRESS_MAP_START( atlus_snd_map, AS_PROGRAM, 16, zn_state ) @@ -2240,7 +2244,7 @@ Key: Mother KN01 WRITE8_MEMBER(zn_state::coh1002v_bank_w) { - membank( "bankedroms" )->set_entry( data ); + m_bankedroms->set_entry( data ); } static ADDRESS_MAP_START(coh1002v_map, AS_PROGRAM, 32, zn_state) @@ -2253,8 +2257,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002v) { - membank( "bankedroms" )->configure_entries( 0, 24, memregion( "bankedroms" )->base(), 0x100000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 24, memregion( "bankedroms" )->base(), 0x100000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED( coh1002v, zn1_2mb_vram ) @@ -2425,7 +2429,7 @@ Notes: WRITE8_MEMBER(zn_state::coh1002m_bank_w) { verboselog(1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - membank( "bankedroms" )->set_entry( data ); + m_bankedroms->set_entry( data ); } static ADDRESS_MAP_START(coh1002m_map, AS_PROGRAM, 32, zn_state) @@ -2437,8 +2441,8 @@ ADDRESS_MAP_END MACHINE_RESET_MEMBER(zn_state,coh1002m) { - membank( "bankedroms" )->configure_entries( 0, 6, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ - membank( "bankedroms" )->set_entry( 0 ); + m_bankedroms->configure_entries( 0, 6, memregion( "bankedroms" )->base(), 0x800000 ); /* banked game rom */ + m_bankedroms->set_entry( 0 ); } static MACHINE_CONFIG_DERIVED( coh1002m, zn1_2mb_vram ) -- cgit v1.2.3-70-g09d2 From e100e2f85b01afb6481386a00524706f3cfc28b7 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 8 Dec 2017 08:32:32 +0100 Subject: cps2.cpp: documented some different labels found on a sfa board. Hashes match. (nw) --- src/mame/drivers/cps2.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/cps2.cpp b/src/mame/drivers/cps2.cpp index 8998908d2df..6207ce66922 100644 --- a/src/mame/drivers/cps2.cpp +++ b/src/mame/drivers/cps2.cpp @@ -6232,9 +6232,9 @@ ROM_END ROM_START( sfa ) ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_WORD_SWAP( "sfze.03d", 0x000000, 0x80000, CRC(ebf2054d) SHA1(6e7b9e4202b86ab237ea5634c98b71b82d812ef2) ) - ROM_LOAD16_WORD_SWAP( "sfz.04b", 0x080000, 0x80000, CRC(8b73b0e5) SHA1(5318761f615c21395366b5333e75eaaa73ef2073) ) - ROM_LOAD16_WORD_SWAP( "sfz.05a", 0x100000, 0x80000, CRC(0810544d) SHA1(5f39bda3e7b16508eb58e5a2e0cc58c09cf428ce) ) - ROM_LOAD16_WORD_SWAP( "sfz.06", 0x180000, 0x80000, CRC(806e8f38) SHA1(b6d6912aa8f2f590335d7ff9a8214648e7131ebb) ) + ROM_LOAD16_WORD_SWAP( "sfz.04b", 0x080000, 0x80000, CRC(8b73b0e5) SHA1(5318761f615c21395366b5333e75eaaa73ef2073) ) // also found as sfze.04c, same hash + ROM_LOAD16_WORD_SWAP( "sfz.05a", 0x100000, 0x80000, CRC(0810544d) SHA1(5f39bda3e7b16508eb58e5a2e0cc58c09cf428ce) ) // also found as sfze.05b, same hash + ROM_LOAD16_WORD_SWAP( "sfz.06", 0x180000, 0x80000, CRC(806e8f38) SHA1(b6d6912aa8f2f590335d7ff9a8214648e7131ebb) ) // also found as sfze.06, same hash ROM_REGION( 0x1000000, "gfx", 0 ) ROM_FILL( 0x000000, 0x800000, 0x00 ) -- cgit v1.2.3-70-g09d2 From 369cc28f1398c1d0bccfce91873a7a800584c698 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Fri, 8 Dec 2017 12:19:21 +0000 Subject: pgm2: use sprite decryption keys uploaded by games where we have internal rom [MetalliC, David Haywood] --- src/mame/drivers/pgm2.cpp | 42 +++++++++++++++++++++++++++--------------- src/mame/includes/pgm2.h | 5 +++++ src/mame/video/pgm2.cpp | 2 ++ 3 files changed, 34 insertions(+), 15 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index df5bdc9647c..046e54a814d 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -100,6 +100,14 @@ WRITE8_MEMBER(pgm2_state::encryption_w) m_encryption_table[offset] = data; } +WRITE32_MEMBER(pgm2_state::sprite_encryption_w) +{ + COMBINE_DATA(&m_spritekey); + + if (!m_sprite_predecrypted) + m_realspritekey = BITSWAP32(m_spritekey ^ 0x90055555, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 19, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); +} + WRITE32_MEMBER(pgm2_state::encryption_do_w) { if (m_has_decrypted == 0) @@ -165,6 +173,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x30100000, 0x301000ff) AM_RAM // unknown mask 00ff00ff, seems to be banked with 0x30120030 too? AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll + AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs AM_RANGE(0x40000000, 0x40000003) AM_DEVREADWRITE8("ymz774", ymz774_device, read, write, 0xffffffff) @@ -289,10 +298,14 @@ void pgm2_state::machine_start() { save_item(NAME(m_encryption_table)); save_item(NAME(m_has_decrypted)); + save_item(NAME(m_spritekey)); + save_item(NAME(m_realspritekey)); } void pgm2_state::machine_reset() { + m_spritekey = 0; + m_realspritekey = 0; } static const gfx_layout tiles8x8_layout = @@ -763,34 +776,30 @@ READ32_MEMBER(pgm2_state::kov2nl_speedup_r) } - -DRIVER_INIT_MEMBER(pgm2_state,orleg2) +// for games with the internal ROMs fully dumped that provide the sprite key and program rom key at runtime +void pgm2_state::common_encryption_init() { uint16_t *src = (uint16_t *)memregion("sprites_mask")->base(); - iga_u12_decode(src, 0x2000000, 0x4761); - iga_u16_decode(src, 0x2000000, 0xc79f); + iga_u12_decode(src, memregion("sprites_mask")->bytes(), 0x0000); + iga_u16_decode(src, memregion("sprites_mask")->bytes(), 0x0000); + m_sprite_predecrypted = 0; src = (uint16_t *)memregion("sprites_colour")->base(); - sprite_colour_decode(src, 0x4000000); + sprite_colour_decode(src, memregion("sprites_colour")->bytes()); m_has_decrypted = 0; +} +DRIVER_INIT_MEMBER(pgm2_state,orleg2) +{ + common_encryption_init(); machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020114, 0x20020117, read32_delegate(FUNC(pgm2_state::orleg2_speedup_r),this)); } DRIVER_INIT_MEMBER(pgm2_state,kov2nl) { - uint16_t *src = (uint16_t *)memregion("sprites_mask")->base(); - - iga_u12_decode(src, 0x2000000, 0xa193); - iga_u16_decode(src, 0x2000000, 0xb780); - - src = (uint16_t *)memregion("sprites_colour")->base(); - sprite_colour_decode(src, 0x4000000); - - m_has_decrypted = 0; - + common_encryption_init(); machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20020470, 0x20020473, read32_delegate(FUNC(pgm2_state::kov2nl_speedup_r), this)); } @@ -800,6 +809,7 @@ DRIVER_INIT_MEMBER(pgm2_state,ddpdojh) iga_u12_decode(src, 0x1000000, 0x1e96); iga_u16_decode(src, 0x1000000, 0x869c); + m_sprite_predecrypted = 1; src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x2000000); @@ -815,6 +825,7 @@ DRIVER_INIT_MEMBER(pgm2_state,kov3) iga_u12_decode(src, 0x4000000, 0x956d); iga_u16_decode(src, 0x4000000, 0x3d17); + m_sprite_predecrypted = 1; src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x8000000); @@ -861,6 +872,7 @@ DRIVER_INIT_MEMBER(pgm2_state,kof98umh) iga_u12_decode(src, 0x08000000, 0x21df); iga_u16_decode(src, 0x08000000, 0x8692); + m_sprite_predecrypted = 1; src = (uint16_t *)memregion("sprites_colour")->base(); sprite_colour_decode(src, 0x20000000); diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 5858e02a764..3a9d445505e 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -52,6 +52,7 @@ public: DECLARE_READ8_MEMBER(encryption_r); DECLARE_WRITE8_MEMBER(encryption_w); DECLARE_WRITE32_MEMBER(encryption_do_w); + DECLARE_WRITE32_MEMBER(sprite_encryption_w); DECLARE_DRIVER_INIT(kov2nl); DECLARE_DRIVER_INIT(orleg2); @@ -96,8 +97,12 @@ private: uint32_t m_sprites_mask_mask; uint32_t m_sprites_colour_mask; + void common_encryption_init(); uint8_t m_encryption_table[0x100]; int m_has_decrypted; // so we only do it once. + uint32_t m_spritekey; + uint32_t m_realspritekey; + int m_sprite_predecrypted; // devices required_device m_maincpu; diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index c036d92080b..64ce9901cf7 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -98,6 +98,8 @@ inline void pgm2_state::draw_sprite_line(const rectangle &cliprect, int &mask_of maskdata |= m_sprites_mask[mask_offset + 2] << 8; maskdata |= m_sprites_mask[mask_offset + 3] << 0; + maskdata ^= m_realspritekey; + if (reverse) { mask_offset -= 4; -- cgit v1.2.3-70-g09d2 From 6d750184a2c6e9ef2dc673820d1d0db661e9f34e Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Fri, 8 Dec 2017 14:41:10 +0200 Subject: typo (nw) --- src/mame/drivers/pgm2.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 046e54a814d..3230a78d970 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -105,7 +105,7 @@ WRITE32_MEMBER(pgm2_state::sprite_encryption_w) COMBINE_DATA(&m_spritekey); if (!m_sprite_predecrypted) - m_realspritekey = BITSWAP32(m_spritekey ^ 0x90055555, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 19, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); + m_realspritekey = BITSWAP32(m_spritekey ^ 0x90055555, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); } WRITE32_MEMBER(pgm2_state::encryption_do_w) -- cgit v1.2.3-70-g09d2 From 4877f8d735fe2a7d2a01c2e6611690a857a9a824 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Fri, 8 Dec 2017 17:34:38 +0100 Subject: atarist: Fix out-of-bounds memory scribbling (nw) --- src/mame/includes/atarist.h | 1 + src/mame/video/atarist.cpp | 38 ++++++++++++++++++++++---------------- 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/src/mame/includes/atarist.h b/src/mame/includes/atarist.h index 0efd590c87f..180dfb4bc9b 100644 --- a/src/mame/includes/atarist.h +++ b/src/mame/includes/atarist.h @@ -203,6 +203,7 @@ public: inline pen_t shift_mode_2(); void shifter_tick(); inline void shifter_load(); + inline void draw_pixel(int x, int y, u32 pen); void glue_tick(); void set_screen_parameters(); void blitter_source(); diff --git a/src/mame/video/atarist.cpp b/src/mame/video/atarist.cpp index b897754b778..045a76a7a1d 100644 --- a/src/mame/video/atarist.cpp +++ b/src/mame/video/atarist.cpp @@ -193,6 +193,12 @@ inline void st_state::shifter_load() // glue_tick - //------------------------------------------------- +void st_state::draw_pixel(int x, int y, u32 pen) +{ + if(x < m_bitmap.width() && y < m_bitmap.height()) + m_bitmap.pix32(y, x) = pen; +} + void st_state::glue_tick() { int y = machine().first_screen()->vpos(); @@ -241,36 +247,36 @@ void st_state::glue_tick() { case 0: pen = shift_mode_0(); - m_bitmap.pix32(y, x) = pen; - m_bitmap.pix32(y, x+1) = pen; + draw_pixel(x, y, pen); + draw_pixel(x+1, y, pen); pen = shift_mode_0(); - m_bitmap.pix32(y, x+2) = pen; - m_bitmap.pix32(y, x+3) = pen; + draw_pixel(x+2, y, pen); + draw_pixel(x+3, y, pen); pen = shift_mode_0(); - m_bitmap.pix32(y, x+4) = pen; - m_bitmap.pix32(y, x+5) = pen; + draw_pixel(x+4, y, pen); + draw_pixel(x+5, y, pen); pen = shift_mode_0(); - m_bitmap.pix32(y, x+6) = pen; - m_bitmap.pix32(y, x+7) = pen; + draw_pixel(x+6, y, pen); + draw_pixel(x+7, y, pen); break; case 1: pen = shift_mode_1(); - m_bitmap.pix32(y, x) = pen; + draw_pixel(x, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+1) = pen; + draw_pixel(x+1, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+2) = pen; + draw_pixel(x+2, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+3) = pen; + draw_pixel(x+3, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+4) = pen; + draw_pixel(x+4, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+5) = pen; + draw_pixel(x+5, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+6) = pen; + draw_pixel(x+6, y, pen); pen = shift_mode_1(); - m_bitmap.pix32(y, x+7) = pen; + draw_pixel(x+7, y, pen); break; case 2: -- cgit v1.2.3-70-g09d2 From 20959911dbc6ef972c167c6f7f4112fa4c0a7eb4 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sat, 9 Dec 2017 08:41:05 +1100 Subject: MT 06683 --- src/mame/drivers/surpratk.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/surpratk.cpp b/src/mame/drivers/surpratk.cpp index 17a94814974..f444ba3788e 100644 --- a/src/mame/drivers/surpratk.cpp +++ b/src/mame/drivers/surpratk.cpp @@ -188,7 +188,7 @@ static MACHINE_CONFIG_START( surpratk ) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 ) + MCFG_SCREEN_VISIBLE_AREA(12*8, (64-14)*8-1, 2*8, 30*8-1 ) MCFG_SCREEN_UPDATE_DRIVER(surpratk_state, screen_update_surpratk) MCFG_SCREEN_PALETTE("palette") -- cgit v1.2.3-70-g09d2 From 2b4fe3cea0938d3de7f02e5c22c247e02eec06d6 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 8 Dec 2017 23:47:23 +0100 Subject: fidel6502: add note about eastbloc clone (nw) --- src/mame/drivers/fidel6502.cpp | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/src/mame/drivers/fidel6502.cpp b/src/mame/drivers/fidel6502.cpp index 46c144b0db0..45d7e0a7f90 100644 --- a/src/mame/drivers/fidel6502.cpp +++ b/src/mame/drivers/fidel6502.cpp @@ -351,6 +351,27 @@ CPU D6 to W: (model 6092, tied to VCC otherwise) - D2-D6: VCC - D7: TSI BUSY +------------------ +One interesting clone of The Excellence is the Computerchess Playmate-2. It was +produced in 1989 by SPS(Bulgaria) and RRR(Riga Radio Factory). The chess program +ROM is identical to Excellence EP12. All internal circuitry is the same, the only +difference is the capacitor driving the 555 for IRQ is 10nf instead of 22nf. + +What makes it unique is the addition of a chess clock. + +connector pinout from main pcb: +1) 5V +2) GND +3) 74HC259.pin9 (Q4) = Row LED driving +4) 74HC259.pin10 (Q5) = Column LED driving +5) 74HC259.pin12 (Q7) = Bat. Low signal +6) 74HC42.pin4 (Q3) = Col-D/Row-4 -> 'White Move' if D-LED blinks + +The extra board has a 7474, a К1016ХЛ1 (RTC, or MCU clock driver), a 4-digit +VFD display, and some buttons for controlling the clock. IRQ frequency is doubled +presumedly for using the blinking led as seconds counter. It only tracks player time, +not of the opponent. And it obviously doesn't show chessmove coordinates either. + ****************************************************************************** -- cgit v1.2.3-70-g09d2 From 86de1bea06a70d4ec6c0fb17078e0d95d25c9be6 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sat, 9 Dec 2017 10:16:04 +1100 Subject: (nw) overlooked a parameter --- src/mame/drivers/surpratk.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/surpratk.cpp b/src/mame/drivers/surpratk.cpp index f444ba3788e..2505a9faf6a 100644 --- a/src/mame/drivers/surpratk.cpp +++ b/src/mame/drivers/surpratk.cpp @@ -188,7 +188,7 @@ static MACHINE_CONFIG_START( surpratk ) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(12*8, (64-14)*8-1, 2*8, 30*8-1 ) + MCFG_SCREEN_VISIBLE_AREA(12*8, (64-12)*8-1, 2*8, 30*8-1 ) MCFG_SCREEN_UPDATE_DRIVER(surpratk_state, screen_update_surpratk) MCFG_SCREEN_PALETTE("palette") -- cgit v1.2.3-70-g09d2 From 13a70d311857594b48f581943a832190b468809a Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 8 Dec 2017 18:44:23 -0500 Subject: m6809: Start resolving the great device type/clock divider mix-up --- src/devices/cpu/m6809/m6809.cpp | 43 ++++++++++++++++++- src/devices/cpu/m6809/m6809.h | 41 +++++++++++++----- src/mame/audio/midway.cpp | 2 +- src/mame/audio/s11c_bg.cpp | 4 +- src/mame/audio/williams.cpp | 8 ++-- src/mame/audio/wpcsnd.cpp | 2 +- src/mame/drivers/a6809.cpp | 2 +- src/mame/drivers/ajax.cpp | 4 +- src/mame/drivers/aristmk4.cpp | 2 +- src/mame/drivers/balsente.cpp | 2 +- src/mame/drivers/baraduke.cpp | 2 +- src/mame/drivers/barni.cpp | 13 +++--- src/mame/drivers/beezer.cpp | 4 +- src/mame/drivers/byvid.cpp | 6 +-- src/mame/drivers/capbowl.cpp | 6 +-- src/mame/drivers/chinagat.cpp | 8 ++-- src/mame/drivers/contra.cpp | 2 +- src/mame/drivers/cswat.cpp | 2 +- src/mame/drivers/d400.cpp | 2 +- src/mame/drivers/d6809.cpp | 2 +- src/mame/drivers/ddragon.cpp | 8 ++-- src/mame/drivers/ddribble.cpp | 6 +-- src/mame/drivers/de_2.cpp | 93 ++++++++++++++-------------------------- src/mame/drivers/dec8.cpp | 16 +++---- src/mame/drivers/enmirage.cpp | 4 +- src/mame/drivers/esq1.cpp | 2 +- src/mame/drivers/exprraid.cpp | 2 +- src/mame/drivers/firefox.cpp | 2 +- src/mame/drivers/gaelco.cpp | 2 +- src/mame/drivers/gaplus.cpp | 8 ++-- src/mame/drivers/gimix.cpp | 2 +- src/mame/drivers/gladiatr.cpp | 6 +-- src/mame/drivers/gng.cpp | 2 +- src/mame/drivers/halleys.cpp | 2 +- src/mame/drivers/icecold.cpp | 2 +- src/mame/drivers/irobot.cpp | 2 +- src/mame/drivers/ironhors.cpp | 4 +- src/mame/drivers/mappy.cpp | 18 ++++---- src/mame/drivers/mikie.cpp | 2 +- src/mame/drivers/mkit09.cpp | 4 +- src/mame/drivers/namcos1.cpp | 8 ++-- src/mame/drivers/namcos2.cpp | 14 +++--- src/mame/drivers/namcos21.cpp | 6 +-- src/mame/drivers/namcos86.cpp | 4 +- src/mame/drivers/nsg6809.cpp | 2 +- src/mame/drivers/overdriv.cpp | 2 +- src/mame/drivers/pacland.cpp | 2 +- src/mame/drivers/pandoras.cpp | 4 +- src/mame/drivers/pegasus.cpp | 2 +- src/mame/drivers/poly.cpp | 2 +- src/mame/drivers/qix.cpp | 6 +-- src/mame/drivers/s11.cpp | 2 +- src/mame/drivers/s11a.cpp | 4 +- src/mame/drivers/s11b.cpp | 2 +- src/mame/drivers/skykid.cpp | 4 +- src/mame/drivers/sonson.cpp | 4 +- src/mame/drivers/sothello.cpp | 23 ++++------ src/mame/drivers/spdodgeb.cpp | 2 +- src/mame/drivers/spiders.cpp | 2 +- src/mame/drivers/spy.cpp | 4 +- src/mame/drivers/squale.cpp | 2 +- src/mame/drivers/srumbler.cpp | 2 +- src/mame/drivers/starwars.cpp | 4 +- src/mame/drivers/swtpc09.cpp | 4 +- src/mame/drivers/tavernie.cpp | 2 +- src/mame/drivers/thomson.cpp | 4 +- src/mame/drivers/toypop.cpp | 4 +- src/mame/drivers/tp84.cpp | 4 +- src/mame/drivers/trackfld.cpp | 4 +- src/mame/drivers/tutankhm.cpp | 2 +- src/mame/drivers/v6809.cpp | 7 +-- src/mame/drivers/vectrex.cpp | 2 +- src/mame/drivers/wacky_gator.cpp | 2 +- src/mame/drivers/white_mod.cpp | 2 +- src/mame/drivers/whitestar.cpp | 2 +- src/mame/drivers/wico.cpp | 6 +-- src/mame/drivers/williams.cpp | 4 +- src/mame/drivers/yiear.cpp | 2 +- src/mame/video/decodmd2.cpp | 4 +- src/mame/video/qix.cpp | 6 +-- 80 files changed, 264 insertions(+), 248 deletions(-) diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp index 42f64d5e5b2..521d4a113b7 100644 --- a/src/devices/cpu/m6809/m6809.cpp +++ b/src/devices/cpu/m6809/m6809.cpp @@ -77,6 +77,21 @@ March 2013 NPW: Removed unused jmp/jsr _slap functions from 6809ops.c, m6809_slapstick check moved into the opcode functions. +****************************************************************************** + + M6809 cycle timings are relative to a four-phase clock cycle defined by + the Q and E signals on pins 35 and 34. The Q clock must lead the E clock + by approximately half a cycle. On the MC6809E, Q and E are inputs, and + one 74LS74 wired as a two-stage Johnson counter is almost sufficient to + generate both (though E requires voltage levels above TTL). On the + MC6809, however, Q and E are output from an internal clock generator + which can be driven by a crystal oscillator connected to pins 38 and 39. + (The MC6809E reuses the same numbered pins for the unrelated TSC and LIC + functions.) The frequencies of Q and E on the MC6809 are that of the XTAL + divided by 4. MAME's emulation formerly assigned this internal clock + divider to the MC6809E and not to the MC6809; the confusion resulting + from this error is in the process of being straightened out. + *****************************************************************************/ #include "emu.h" @@ -104,8 +119,10 @@ March 2013 NPW: // DEVICE INTERFACE //************************************************************************** -DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "M6809") -DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "M6809E") +DEFINE_DEVICE_TYPE(MC6809, mc6809_device, "mc6809", "MC6809") +DEFINE_DEVICE_TYPE(MC6809E, mc6809e_device, "mc6809e", "MC6809E") +DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "MC6809 (legacy)") +DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "MC6809E (legacy)") //------------------------------------------------- @@ -577,6 +594,28 @@ void m6809_base_device::mi_default::write(uint16_t adr, uint8_t val) +//------------------------------------------------- +// mc6809_device +//------------------------------------------------- + +mc6809_device::mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6809_base_device(mconfig, tag, owner, clock, MC6809, 4) +{ +} + + + +//------------------------------------------------- +// mc6809e_device +//------------------------------------------------- + +mc6809e_device::mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6809_base_device(mconfig, tag, owner, clock, MC6809E, 1) +{ +} + + + //------------------------------------------------- // m6809_device //------------------------------------------------- diff --git a/src/devices/cpu/m6809/m6809.h b/src/devices/cpu/m6809/m6809.h index 759e37113a5..64d28a26316 100644 --- a/src/devices/cpu/m6809/m6809.h +++ b/src/devices/cpu/m6809/m6809.h @@ -19,6 +19,8 @@ //************************************************************************** // device type definition +DECLARE_DEVICE_TYPE(MC6809, mc6809_device) +DECLARE_DEVICE_TYPE(MC6809E, mc6809e_device) DECLARE_DEVICE_TYPE(M6809, m6809_device) DECLARE_DEVICE_TYPE(M6809E, m6809e_device) @@ -292,29 +294,48 @@ private: const char *inputnum_string(int inputnum); }; -// ======================> m6809_device +// ======================> mc6809_device -class m6809_device : public m6809_base_device +class mc6809_device : public m6809_base_device { public: // construction/destruction - m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; -// ======================> m6809e_device +// ======================> mc6809e_device -#define MCFG_M6809E_LIC_CB(_devcb) \ - devcb = &m6809e_device::set_lic_cb(*device, DEVCB_##_devcb); +// MC6809E has LIC line to indicate opcode/data fetch +#define MCFG_MC6809E_LIC_CB(_devcb) \ + devcb = &mc6809e_device::set_lic_cb(*device, DEVCB_##_devcb); -class m6809e_device : public m6809_base_device +class mc6809e_device : public m6809_base_device { public: // construction/destruction - m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // static configuration helpers - template static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast(device).m_lic_func.set_callback(object); } + template static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast(device).m_lic_func.set_callback(object); } +}; + +// ======================> m6809_device (LEGACY) + +class m6809_device : public m6809_base_device +{ +public: + // construction/destruction + m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +// ======================> m6809e_device (LEGACY) + +class m6809e_device : public m6809_base_device +{ +public: + // construction/destruction + m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; enum @@ -326,6 +347,4 @@ enum #define M6809_IRQ_LINE 0 /* IRQ line number */ #define M6809_FIRQ_LINE 1 /* FIRQ line number */ -/* M6809e has LIC line to indicate opcode/data fetch */ - #endif // MAME_CPU_M6809_M6809_H diff --git a/src/mame/audio/midway.cpp b/src/mame/audio/midway.cpp index 4752e177c72..0db7413b894 100644 --- a/src/mame/audio/midway.cpp +++ b/src/mame/audio/midway.cpp @@ -729,7 +729,7 @@ ADDRESS_MAP_END //------------------------------------------------- MACHINE_CONFIG_MEMBER(midway_turbo_cheap_squeak_device::device_add_mconfig) - MCFG_CPU_ADD("cpu", M6809E, TURBOCS_CLOCK) + MCFG_CPU_ADD("cpu", MC6809E, TURBOCS_CLOCK / 4) MCFG_CPU_PROGRAM_MAP(turbocs_map) MCFG_DEVICE_ADD("pia", PIA6821, 0) diff --git a/src/mame/audio/s11c_bg.cpp b/src/mame/audio/s11c_bg.cpp index 742bc4e8985..fb80c7ad1f0 100644 --- a/src/mame/audio/s11c_bg.cpp +++ b/src/mame/audio/s11c_bg.cpp @@ -57,11 +57,11 @@ void s11c_bg_device::data_w(uint8_t data) } MACHINE_CONFIG_MEMBER( s11c_bg_device::device_add_mconfig ) - MCFG_CPU_ADD("bgcpu", M6809E, XTAL_8MHz) // MC68B09E (note: schematics show this as 8mhz/2, but games crash very quickly with that speed?) + MCFG_CPU_ADD("bgcpu", MC6809E, XTAL_8MHz / 4) // MC68B09E MCFG_CPU_PROGRAM_MAP(s11c_bg_map) MCFG_QUANTUM_TIME(attotime::from_hz(50)) - MCFG_YM2151_ADD("ym2151", 3580000) + MCFG_YM2151_ADD("ym2151", XTAL_3_579545MHz) // "3.58 MHz" on schematics and parts list MCFG_YM2151_IRQ_HANDLER(WRITELINE(s11c_bg_device, ym2151_irq_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.25) diff --git a/src/mame/audio/williams.cpp b/src/mame/audio/williams.cpp index 473dfe4ea96..6633556d258 100644 --- a/src/mame/audio/williams.cpp +++ b/src/mame/audio/williams.cpp @@ -175,7 +175,7 @@ ADDRESS_MAP_END //------------------------------------------------- MACHINE_CONFIG_MEMBER( williams_cvsd_sound_device::device_add_mconfig ) - MCFG_CPU_ADD("cpu", M6809E, CVSD_MASTER_CLOCK) + MCFG_CPU_ADD("cpu", MC6809E, CVSD_MASTER_CLOCK / 4) MCFG_CPU_PROGRAM_MAP(williams_cvsd_map) MCFG_DEVICE_ADD("pia", PIA6821, 0) @@ -493,10 +493,10 @@ ADDRESS_MAP_END MACHINE_CONFIG_MEMBER( williams_narc_sound_device::device_add_mconfig ) - MCFG_CPU_ADD("cpu0", M6809E, NARC_MASTER_CLOCK) + MCFG_CPU_ADD("cpu0", MC6809E, NARC_MASTER_CLOCK / 4) MCFG_CPU_PROGRAM_MAP(williams_narc_master_map) - MCFG_CPU_ADD("cpu1", M6809E, NARC_MASTER_CLOCK) + MCFG_CPU_ADD("cpu1", MC6809E, NARC_MASTER_CLOCK / 4) MCFG_CPU_PROGRAM_MAP(williams_narc_slave_map) MCFG_YM2151_ADD("ym2151", NARC_FM_CLOCK) @@ -746,7 +746,7 @@ ADDRESS_MAP_END //------------------------------------------------- MACHINE_CONFIG_MEMBER( williams_adpcm_sound_device::device_add_mconfig ) - MCFG_CPU_ADD("cpu", M6809E, ADPCM_MASTER_CLOCK) + MCFG_CPU_ADD("cpu", MC6809E, ADPCM_MASTER_CLOCK / 4) MCFG_CPU_PROGRAM_MAP(williams_adpcm_map) MCFG_YM2151_ADD("ym2151", ADPCM_FM_CLOCK) diff --git a/src/mame/audio/wpcsnd.cpp b/src/mame/audio/wpcsnd.cpp index a9cbf40611e..f8ce84bae3d 100644 --- a/src/mame/audio/wpcsnd.cpp +++ b/src/mame/audio/wpcsnd.cpp @@ -67,7 +67,7 @@ uint8_t wpcsnd_device::data_r() } MACHINE_CONFIG_MEMBER( wpcsnd_device::device_add_mconfig ) - MCFG_CPU_ADD("bgcpu", M6809E, XTAL_8MHz) // MC68B09E + MCFG_CPU_ADD("bgcpu", MC6809E, XTAL_8MHz / 4) // MC68B09E MCFG_CPU_PROGRAM_MAP(wpcsnd_map) MCFG_QUANTUM_TIME(attotime::from_hz(50)) diff --git a/src/mame/drivers/a6809.cpp b/src/mame/drivers/a6809.cpp index 84cbcef2303..3e67a43aad6 100644 --- a/src/mame/drivers/a6809.cpp +++ b/src/mame/drivers/a6809.cpp @@ -222,7 +222,7 @@ void a6809_state::kbd_put(u8 data) static MACHINE_CONFIG_START( a6809 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6809E, XTAL_4MHz) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(a6809_mem) MCFG_CPU_IO_MAP(a6809_io) MCFG_MACHINE_RESET_OVERRIDE(a6809_state, a6809) diff --git a/src/mame/drivers/ajax.cpp b/src/mame/drivers/ajax.cpp index bd4db94f2be..f03b73e394e 100644 --- a/src/mame/drivers/ajax.cpp +++ b/src/mame/drivers/ajax.cpp @@ -17,7 +17,7 @@ #include "includes/konamipt.h" #include "cpu/z80/z80.h" -#include "cpu/m6809/m6809.h" +#include "cpu/m6809/hd6309.h" #include "cpu/m6809/konami.h" #include "sound/ym2151.h" #include "speaker.h" @@ -173,7 +173,7 @@ static MACHINE_CONFIG_START( ajax ) MCFG_CPU_ADD("maincpu", KONAMI, XTAL_24MHz/2/4) /* 052001 12/4 MHz*/ MCFG_CPU_PROGRAM_MAP(ajax_main_map) - MCFG_CPU_ADD("sub", M6809, 3000000) /* ? */ + MCFG_CPU_ADD("sub", HD6309, 3000000) /* ? */ MCFG_CPU_PROGRAM_MAP(ajax_sub_map) MCFG_CPU_ADD("audiocpu", Z80, 3579545) /* 3.58 MHz */ diff --git a/src/mame/drivers/aristmk4.cpp b/src/mame/drivers/aristmk4.cpp index 329b6fcb240..cd3527f08da 100644 --- a/src/mame/drivers/aristmk4.cpp +++ b/src/mame/drivers/aristmk4.cpp @@ -1747,7 +1747,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(aristmk4_state::aristmk4_pf) static MACHINE_CONFIG_START( aristmk4 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/8) // M68B09E @ 1.5 MHz + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK/8) // M68B09E @ 1.5 MHz MCFG_CPU_PROGRAM_MAP(aristmk4_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", aristmk4_state, irq0_line_hold) diff --git a/src/mame/drivers/balsente.cpp b/src/mame/drivers/balsente.cpp index 3ac9c893e11..04dcafcb0f0 100644 --- a/src/mame/drivers/balsente.cpp +++ b/src/mame/drivers/balsente.cpp @@ -1280,7 +1280,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( balsente ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_20MHz/16) /* xtal verified but not speed */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_20MHz/16) /* xtal verified but not speed */ MCFG_CPU_PROGRAM_MAP(cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", balsente_state, balsente_update_analog_inputs) diff --git a/src/mame/drivers/baraduke.cpp b/src/mame/drivers/baraduke.cpp index b09899c44b6..4c64a2efa9a 100644 --- a/src/mame/drivers/baraduke.cpp +++ b/src/mame/drivers/baraduke.cpp @@ -373,7 +373,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( baraduke ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_49_152MHz/32) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_49_152MHz/32) // 68A09E MCFG_CPU_PROGRAM_MAP(baraduke_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", baraduke_state, irq0_line_assert) diff --git a/src/mame/drivers/barni.cpp b/src/mame/drivers/barni.cpp index 05dad500f51..96a328cb671 100644 --- a/src/mame/drivers/barni.cpp +++ b/src/mame/drivers/barni.cpp @@ -7,11 +7,10 @@ /* Hardware: -CPU: 2 x M6809, optional M6802 (what for?) +CPU: 2 x 6809E, optional MC6802 which may replace second 6809E INT: IRQ on CPU 0, FIRQ on CPU 1 -IO: DMA (Direct Memory Access/Address) - 2x PIA 6821 - 1x VIS 6522 +IO: 2x PIA 6821 + 1x VIA 6522 DISPLAY: 5x6 digit 7 or 16 segment display SOUND: basically the same as Bally's Squalk & Talk -61 board but missing AY8912 synth chip */ @@ -58,13 +57,13 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( barni ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_4MHz / 4) MCFG_CPU_PROGRAM_MAP(maincpu_map) - MCFG_CPU_ADD("subcpu", M6809, 2000000) + MCFG_CPU_ADD("subcpu", MC6809E, XTAL_4MHz / 4) MCFG_CPU_PROGRAM_MAP(subcpu_map) - MCFG_CPU_ADD("audiocpu", M6802, 2000000) + MCFG_CPU_ADD("audiocpu", M6802, 4000000) // uses own XTAL, but what is the value? MCFG_CPU_PROGRAM_MAP(audiocpu_map) /* video hardware */ diff --git a/src/mame/drivers/beezer.cpp b/src/mame/drivers/beezer.cpp index fd93de38b6b..7d24112dce6 100644 --- a/src/mame/drivers/beezer.cpp +++ b/src/mame/drivers/beezer.cpp @@ -461,7 +461,7 @@ void beezer_state::machine_reset() static MACHINE_CONFIG_START( beezer ) // basic machine hardware - MCFG_CPU_ADD("maincpu", M6809, XTAL_12MHz / 12) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_12MHz / 3) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_DEVICE_ADD("sysbank", ADDRESS_MAP_BANK, 0) @@ -497,7 +497,7 @@ static MACHINE_CONFIG_START( beezer ) MCFG_PALETTE_INIT_OWNER(beezer_state, beezer) // sound hardware - MCFG_CPU_ADD("audiocpu", M6809, XTAL_4MHz / 4) + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_INPUT_MERGER_ANY_HIGH("audio_irqs") diff --git a/src/mame/drivers/byvid.cpp b/src/mame/drivers/byvid.cpp index 6fda61bd054..31a38ca364d 100644 --- a/src/mame/drivers/byvid.cpp +++ b/src/mame/drivers/byvid.cpp @@ -120,7 +120,7 @@ private: bool m_u11_timer; virtual void machine_reset() override; required_device m_maincpu; - required_device m_videocpu; + required_device m_videocpu; required_device m_audiocpu; required_device m_pia_u7; required_device m_pia_u10; @@ -746,7 +746,7 @@ static MACHINE_CONFIG_START( babypac ) MCFG_CPU_ADD("maincpu", M6800, XTAL_3_579545MHz/4) // no xtal, just 2 chips MCFG_CPU_PROGRAM_MAP(main_map) - MCFG_CPU_ADD("videocpu", M6809E, XTAL_3_579545MHz) + MCFG_CPU_ADD("videocpu", MC6809, XTAL_3_579545MHz) MCFG_CPU_PROGRAM_MAP(video_map) MCFG_CPU_ADD("audiocpu", M6803, XTAL_3_579545MHz) @@ -807,7 +807,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( granny, babypac ) MCFG_DEVICE_REMOVE("videocpu") - MCFG_CPU_ADD("videocpu", M6809E, XTAL_8MHz) //?? + MCFG_CPU_ADD("videocpu", MC6809, XTAL_8MHz) // MC68B09P (XTAL value hard to read) MCFG_CPU_PROGRAM_MAP(granny_map) MCFG_DEVICE_REMOVE("screen") diff --git a/src/mame/drivers/capbowl.cpp b/src/mame/drivers/capbowl.cpp index 4df238be4f8..891d66e0fef 100644 --- a/src/mame/drivers/capbowl.cpp +++ b/src/mame/drivers/capbowl.cpp @@ -316,14 +316,14 @@ void capbowl_state::machine_reset() static MACHINE_CONFIG_START( capbowl ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809E, MASTER_CLOCK) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK / 4) // MC68B09EP MCFG_CPU_PROGRAM_MAP(capbowl_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", capbowl_state, interrupt) MCFG_WATCHDOG_ADD("watchdog") MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6) * 15.5) // ~0.3s - MCFG_CPU_ADD("audiocpu", M6809E, MASTER_CLOCK) + MCFG_CPU_ADD("audiocpu", MC6809E, MASTER_CLOCK / 4) // MC68B09EP MCFG_CPU_PROGRAM_MAP(sound_map) // MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6) * 15.5) // TODO @@ -348,7 +348,7 @@ static MACHINE_CONFIG_START( capbowl ) MCFG_GENERIC_LATCH_8_ADD("soundlatch") - MCFG_SOUND_ADD("ymsnd", YM2203, MASTER_CLOCK/2) + MCFG_SOUND_ADD("ymsnd", YM2203, MASTER_CLOCK / 2) MCFG_YM2203_IRQ_HANDLER(INPUTLINE("audiocpu", M6809_FIRQ_LINE)) MCFG_AY8910_PORT_A_READ_CB(DEVREADLINE("ticket", ticket_dispenser_device, line_r)) MCFG_DEVCB_BIT(7) MCFG_AY8910_PORT_B_WRITE_CB(DEVWRITELINE("ticket", ticket_dispenser_device, motor_w)) MCFG_DEVCB_BIT(7) /* Also a status LED. See memory map above */ diff --git a/src/mame/drivers/chinagat.cpp b/src/mame/drivers/chinagat.cpp index 08ea5ffac11..03d5ee93858 100644 --- a/src/mame/drivers/chinagat.cpp +++ b/src/mame/drivers/chinagat.cpp @@ -590,11 +590,11 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( saiyugoub1 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */ + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */ MCFG_CPU_PROGRAM_MAP(main_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", chinagat_state, chinagat_scanline, "screen", 0, 1) - MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */ + MCFG_CPU_ADD("sub", MC6809E, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */ MCFG_CPU_PROGRAM_MAP(sub_map) MCFG_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */ @@ -646,11 +646,11 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( saiyugoub2 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */ + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */ MCFG_CPU_PROGRAM_MAP(main_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", chinagat_state, chinagat_scanline, "screen", 0, 1) - MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */ + MCFG_CPU_ADD("sub", MC6809E, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */ MCFG_CPU_PROGRAM_MAP(sub_map) MCFG_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */ diff --git a/src/mame/drivers/contra.cpp b/src/mame/drivers/contra.cpp index d9f9440ad7c..449bf162341 100644 --- a/src/mame/drivers/contra.cpp +++ b/src/mame/drivers/contra.cpp @@ -202,7 +202,7 @@ static MACHINE_CONFIG_START( contra ) MCFG_CPU_PROGRAM_MAP(contra_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", contra_state, contra_interrupt) - MCFG_CPU_ADD("audiocpu", M6809, XTAL_24MHz/8) /* 3000000? */ + MCFG_CPU_ADD("audiocpu", MC6809E, XTAL_24MHz/8) /* 3000000? */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* enough for the sound CPU to read all commands */ diff --git a/src/mame/drivers/cswat.cpp b/src/mame/drivers/cswat.cpp index de9db256c95..58d5874398c 100644 --- a/src/mame/drivers/cswat.cpp +++ b/src/mame/drivers/cswat.cpp @@ -256,7 +256,7 @@ void cswat_state::machine_start() static MACHINE_CONFIG_START( cswat ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809E, XTAL_18_432MHz/3/4) // HD68A09EP, 1.5MHz? + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_18_432MHz/3/4) // HD68A09EP, 1.5MHz? MCFG_CPU_PROGRAM_MAP(cswat_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", cswat_state, irq0_line_assert) MCFG_CPU_PERIODIC_INT_DRIVER(cswat_state, nmi_handler, 300) // ? diff --git a/src/mame/drivers/d400.cpp b/src/mame/drivers/d400.cpp index d3d943d8eb0..4cd972bab2f 100644 --- a/src/mame/drivers/d400.cpp +++ b/src/mame/drivers/d400.cpp @@ -38,7 +38,7 @@ static INPUT_PORTS_START( d461 ) INPUT_PORTS_END static MACHINE_CONFIG_START( d461 ) - MCFG_CPU_ADD("maincpu", M6809, 4'000'000) + MCFG_CPU_ADD("maincpu", MC6809E, 4'000'000) // HD68B09EP MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_DEVICE_ADD("novram", X2210, 0) diff --git a/src/mame/drivers/d6809.cpp b/src/mame/drivers/d6809.cpp index 8f3a08878c6..c3f05f44b22 100644 --- a/src/mame/drivers/d6809.cpp +++ b/src/mame/drivers/d6809.cpp @@ -149,7 +149,7 @@ void d6809_state::machine_reset() static MACHINE_CONFIG_START( d6809 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_14_7456MHz / 8) // MC68B09EP + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_14_7456MHz / 8) // MC68B09EP MCFG_CPU_PROGRAM_MAP(mem_map) MCFG_DEVICE_ADD("acia1", MOS6551, XTAL_14_7456MHz / 8) // uses Q clock diff --git a/src/mame/drivers/ddragon.cpp b/src/mame/drivers/ddragon.cpp index 39f15cc31b6..6af28a90358 100644 --- a/src/mame/drivers/ddragon.cpp +++ b/src/mame/drivers/ddragon.cpp @@ -946,7 +946,7 @@ static MACHINE_CONFIG_START( ddragon ) MCFG_CPU_ADD("sub", HD63701, MAIN_CLOCK / 2) /* 6 MHz / 4 internally */ MCFG_CPU_PROGRAM_MAP(sub_map) - MCFG_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MCFG_CPU_ADD("soundcpu", MC6809, MAIN_CLOCK / 2) /* 6 MHz / 4 internally */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* heavy interleaving to sync up sprite<->main CPUs */ @@ -1009,14 +1009,14 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( ddragon6809 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK / 8) /* 1.5 MHz */ MCFG_CPU_PROGRAM_MAP(ddragon_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ddragon_state, ddragon_scanline, "screen", 0, 1) - MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 1.5 Mhz */ + MCFG_CPU_ADD("sub", MC6809E, MAIN_CLOCK / 8) /* 1.5 Mhz */ MCFG_CPU_PROGRAM_MAP(sub_map) - MCFG_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MCFG_CPU_ADD("soundcpu", MC6809E, MAIN_CLOCK / 8) /* 1.5 MHz */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* heavy interleaving to sync up sprite<->main CPUs */ diff --git a/src/mame/drivers/ddribble.cpp b/src/mame/drivers/ddribble.cpp index 89e9e55e985..b1c62fd855b 100644 --- a/src/mame/drivers/ddribble.cpp +++ b/src/mame/drivers/ddribble.cpp @@ -259,15 +259,15 @@ void ddribble_state::machine_reset() static MACHINE_CONFIG_START( ddribble ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(cpu0_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", ddribble_state, ddribble_interrupt_0) - MCFG_CPU_ADD("cpu1", M6809, XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("cpu1", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", ddribble_state, ddribble_interrupt_1) - MCFG_CPU_ADD("cpu2", M6809, XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("cpu2", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(cpu2_map) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synch */ diff --git a/src/mame/drivers/de_2.cpp b/src/mame/drivers/de_2.cpp index 648cfdf89a4..c3e0dc5c1f5 100644 --- a/src/mame/drivers/de_2.cpp +++ b/src/mame/drivers/de_2.cpp @@ -3,8 +3,8 @@ /* DataEast/Sega Version 1 and 2 - Main CPU: 6808 @ 4MHz - Audio CPU: 68B09E @ 8MHz (internally divided by 4) + Main CPU: 6808 @ 4MHz (internally divided by 4) + Audio CPU: 68B09E @ 2MHz Audio: YM2151 @ 3.58MHz, MSM5205 @ 384kHz */ @@ -518,9 +518,26 @@ WRITE8_MEMBER(de_2_state::lamps_w) } +static MACHINE_CONFIG_START( de_bg_audio ) + /* sound CPU */ + MCFG_CPU_ADD("audiocpu", MC6809E, XTAL_8MHz / 4) // MC68B09E + MCFG_CPU_PROGRAM_MAP(de_2_audio_map) + + MCFG_SPEAKER_STANDARD_MONO("bg") + + MCFG_YM2151_ADD("ym2151", XTAL_3_579545MHz) + MCFG_YM2151_IRQ_HANDLER(WRITELINE(de_2_state, ym2151_irq_w)) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) + + MCFG_SOUND_ADD("msm5205", MSM5205, XTAL_384kHz) + MCFG_MSM5205_VCLK_CB(WRITELINE(de_2_state, msm5205_irq_w)) + MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) +MACHINE_CONFIG_END + static MACHINE_CONFIG_START( de_type1 ) /* basic machine hardware */ - MCFG_DECOCPU_TYPE1_ADD("decocpu",XTAL_8MHz / 2, ":maincpu") + MCFG_DECOCPU_TYPE1_ADD("decocpu", XTAL_8MHz / 2, ":maincpu") MCFG_DECOCPU_DISPLAY(READ8(de_2_state,display_r),WRITE8(de_2_state,display_w)) MCFG_DECOCPU_SOUNDLATCH(WRITE8(de_2_state,sound_w)) MCFG_DECOCPU_SWITCH(READ8(de_2_state,switch_r),WRITE8(de_2_state,switch_w)) @@ -530,25 +547,13 @@ static MACHINE_CONFIG_START( de_type1 ) /* Video */ MCFG_DEFAULT_LAYOUT(layout_de2) - MCFG_FRAGMENT_ADD( genpin_audio ) - - /* sound CPU */ - MCFG_CPU_ADD("audiocpu", M6809E, 8000000) // MC68B09E - MCFG_CPU_PROGRAM_MAP(de_2_audio_map) - - MCFG_SPEAKER_STANDARD_MONO("bg") - MCFG_YM2151_ADD("ym2151", 3580000) - MCFG_YM2151_IRQ_HANDLER(WRITELINE(de_2_state, ym2151_irq_w)) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) - MCFG_SOUND_ADD("msm5205", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(de_2_state, msm5205_irq_w)) - MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) + MCFG_FRAGMENT_ADD(genpin_audio) + MCFG_FRAGMENT_ADD(de_bg_audio) MACHINE_CONFIG_END static MACHINE_CONFIG_START( de_type2 ) /* basic machine hardware */ - MCFG_DECOCPU_TYPE2_ADD("decocpu",XTAL_8MHz / 2, ":maincpu") + MCFG_DECOCPU_TYPE2_ADD("decocpu", XTAL_8MHz / 2, ":maincpu") MCFG_DECOCPU_DISPLAY(READ8(de_2_state,display_r),WRITE8(de_2_state,display_w)) MCFG_DECOCPU_SOUNDLATCH(WRITE8(de_2_state,sound_w)) MCFG_DECOCPU_SWITCH(READ8(de_2_state,switch_r),WRITE8(de_2_state,switch_w)) @@ -558,25 +563,13 @@ static MACHINE_CONFIG_START( de_type2 ) /* Video */ MCFG_DEFAULT_LAYOUT(layout_de2) - MCFG_FRAGMENT_ADD( genpin_audio ) - - /* sound CPU */ - MCFG_CPU_ADD("audiocpu", M6809E, 8000000) // MC68B09E - MCFG_CPU_PROGRAM_MAP(de_2_audio_map) - - MCFG_SPEAKER_STANDARD_MONO("bg") - MCFG_YM2151_ADD("ym2151", 3580000) - MCFG_YM2151_IRQ_HANDLER(WRITELINE(de_2_state, ym2151_irq_w)) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) - MCFG_SOUND_ADD("msm5205", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(de_2_state, msm5205_irq_w)) - MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) + MCFG_FRAGMENT_ADD(genpin_audio) + MCFG_FRAGMENT_ADD(de_bg_audio) MACHINE_CONFIG_END static MACHINE_CONFIG_START( de_type2_alpha3 ) /* basic machine hardware */ - MCFG_DECOCPU_TYPE2_ADD("decocpu",XTAL_8MHz / 2, ":maincpu") + MCFG_DECOCPU_TYPE2_ADD("decocpu", XTAL_8MHz / 2, ":maincpu") MCFG_DECOCPU_DISPLAY(READ8(de_2_state,display_r),WRITE8(de_2_state,type2alpha3_display_w)) MCFG_DECOCPU_SOUNDLATCH(WRITE8(de_2_state,sound_w)) MCFG_DECOCPU_SWITCH(READ8(de_2_state,switch_r),WRITE8(de_2_state,switch_w)) @@ -586,25 +579,13 @@ static MACHINE_CONFIG_START( de_type2_alpha3 ) /* Video */ MCFG_DEFAULT_LAYOUT(layout_de2a3) - MCFG_FRAGMENT_ADD( genpin_audio ) - - /* sound CPU */ - MCFG_CPU_ADD("audiocpu", M6809E, 8000000) // MC68B09E - MCFG_CPU_PROGRAM_MAP(de_2_audio_map) - - MCFG_SPEAKER_STANDARD_MONO("bg") - MCFG_YM2151_ADD("ym2151", 3580000) - MCFG_YM2151_IRQ_HANDLER(WRITELINE(de_2_state, ym2151_irq_w)) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) - MCFG_SOUND_ADD("msm5205", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(de_2_state, msm5205_irq_w)) - MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) + MCFG_FRAGMENT_ADD(genpin_audio) + MCFG_FRAGMENT_ADD(de_bg_audio) MACHINE_CONFIG_END static MACHINE_CONFIG_START( de_type3 ) /* basic machine hardware */ - MCFG_DECOCPU_TYPE3_ADD("decocpu",XTAL_8MHz / 2, ":maincpu") + MCFG_DECOCPU_TYPE3_ADD("decocpu", XTAL_8MHz / 2, ":maincpu") MCFG_DECOCPU_DISPLAY(READ8(de_2_state,display_r),WRITE8(de_2_state,alpha3_display_w)) MCFG_DECOCPU_SOUNDLATCH(WRITE8(de_2_state,sound_w)) MCFG_DECOCPU_SWITCH(READ8(de_2_state,switch_r),WRITE8(de_2_state,switch_w)) @@ -614,20 +595,8 @@ static MACHINE_CONFIG_START( de_type3 ) /* Video */ MCFG_DEFAULT_LAYOUT(layout_de2a3) - MCFG_FRAGMENT_ADD( genpin_audio ) - - /* sound CPU */ - MCFG_CPU_ADD("audiocpu", M6809E, 8000000) // MC68B09E - MCFG_CPU_PROGRAM_MAP(de_2_audio_map) - - MCFG_SPEAKER_STANDARD_MONO("bg") - MCFG_YM2151_ADD("ym2151", 3580000) - MCFG_YM2151_IRQ_HANDLER(WRITELINE(de_2_state, ym2151_irq_w)) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) - MCFG_SOUND_ADD("msm5205", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(de_2_state, msm5205_irq_w)) - MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) + MCFG_FRAGMENT_ADD(genpin_audio) + MCFG_FRAGMENT_ADD(de_bg_audio) MACHINE_CONFIG_END diff --git a/src/mame/drivers/dec8.cpp b/src/mame/drivers/dec8.cpp index be1d52c24f3..986bcb68b2c 100644 --- a/src/mame/drivers/dec8.cpp +++ b/src/mame/drivers/dec8.cpp @@ -1957,10 +1957,10 @@ void dec8_state::machine_reset() static MACHINE_CONFIG_START( lastmisn ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(lastmisn_map) - MCFG_CPU_ADD("sub", M6809, 2000000) + MCFG_CPU_ADD("sub", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(lastmisn_sub_map) MCFG_CPU_ADD("audiocpu", M6502, 1500000) @@ -2010,10 +2010,10 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( shackled ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(shackled_map) - MCFG_CPU_ADD("sub", M6809, 2000000) + MCFG_CPU_ADD("sub", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(shackled_sub_map) MCFG_CPU_ADD("audiocpu", M6502, 1500000) @@ -2233,10 +2233,10 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( csilver ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_12MHz/8) /* verified on pcb */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_12MHz/8) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(csilver_map) - MCFG_CPU_ADD("sub", M6809, XTAL_12MHz/8) /* verified on pcb */ + MCFG_CPU_ADD("sub", MC6809E, XTAL_12MHz/8) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(csilver_sub_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", dec8_state, nmi_line_pulse) @@ -2350,7 +2350,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( srdarwin ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809,2000000) /* MC68A09EP */ + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) /* MC68A09EP */ MCFG_CPU_PROGRAM_MAP(srdarwin_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", dec8_state, nmi_line_pulse) @@ -2400,7 +2400,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( cobracom ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(cobra_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", dec8_state, nmi_line_pulse) diff --git a/src/mame/drivers/enmirage.cpp b/src/mame/drivers/enmirage.cpp index 1bec1447996..cd850283463 100644 --- a/src/mame/drivers/enmirage.cpp +++ b/src/mame/drivers/enmirage.cpp @@ -78,7 +78,7 @@ protected: virtual void machine_reset() override; virtual void video_start() override; - required_device m_maincpu; + required_device m_maincpu; required_device m_fdc; required_device m_via; @@ -208,7 +208,7 @@ WRITE8_MEMBER(enmirage_state::mirage_via_write_portb) } static MACHINE_CONFIG_START( mirage ) - MCFG_CPU_ADD("maincpu", M6809E, 4000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(mirage_map) MCFG_DEFAULT_LAYOUT( layout_mirage ) diff --git a/src/mame/drivers/esq1.cpp b/src/mame/drivers/esq1.cpp index 600341203e9..eb3aac72dbe 100644 --- a/src/mame/drivers/esq1.cpp +++ b/src/mame/drivers/esq1.cpp @@ -579,7 +579,7 @@ INPUT_CHANGED_MEMBER(esq1_state::key_stroke) } static MACHINE_CONFIG_START( esq1 ) - MCFG_CPU_ADD("maincpu", M6809E, 4000000) // how fast is it? + MCFG_CPU_ADD("maincpu", MC6809, XTAL_8MHz) // XTAL not directly attached to CPU MCFG_CPU_PROGRAM_MAP(esq1_map) MCFG_DEVICE_ADD("duart", SCN2681, XTAL_8MHz / 2) diff --git a/src/mame/drivers/exprraid.cpp b/src/mame/drivers/exprraid.cpp index 97ee4be9c18..14ae38946c9 100644 --- a/src/mame/drivers/exprraid.cpp +++ b/src/mame/drivers/exprraid.cpp @@ -494,7 +494,7 @@ static MACHINE_CONFIG_START( exprraid ) MCFG_CPU_PROGRAM_MAP(master_map) MCFG_CPU_IO_MAP(master_io_map) - MCFG_CPU_ADD("slave", M6809, XTAL_12MHz / 8) + MCFG_CPU_ADD("slave", MC6809, XTAL_12MHz / 2) // MC68B09P MCFG_CPU_PROGRAM_MAP(slave_map) /* IRQs are caused by the YM3526 */ diff --git a/src/mame/drivers/firefox.cpp b/src/mame/drivers/firefox.cpp index bbbd02e35ae..07ed8cf4b65 100644 --- a/src/mame/drivers/firefox.cpp +++ b/src/mame/drivers/firefox.cpp @@ -724,7 +724,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( firefox ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809E, MASTER_XTAL/2) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_XTAL/8) // 68B09E MCFG_CPU_PROGRAM_MAP(main_map) /* interrupts count starting at end of VBLANK, which is 44, so add 44 */ MCFG_TIMER_DRIVER_ADD_SCANLINE("32v", firefox_state, video_timer_callback, "screen", 96+44, 128) diff --git a/src/mame/drivers/gaelco.cpp b/src/mame/drivers/gaelco.cpp index a61d51e855e..305b9d85a70 100644 --- a/src/mame/drivers/gaelco.cpp +++ b/src/mame/drivers/gaelco.cpp @@ -507,7 +507,7 @@ static MACHINE_CONFIG_START( bigkarnk ) MCFG_CPU_PROGRAM_MAP(bigkarnk_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", gaelco_state, irq6_line_hold) - MCFG_CPU_ADD("audiocpu", M6809, 8867000/4) /* 68B09, 2.21675 MHz? */ + MCFG_CPU_ADD("audiocpu", MC6809E, 8867000/4) /* 68B09EP, 2.21675 MHz? */ MCFG_CPU_PROGRAM_MAP(bigkarnk_snd_map) MCFG_QUANTUM_TIME(attotime::from_hz(600)) diff --git a/src/mame/drivers/gaplus.cpp b/src/mame/drivers/gaplus.cpp index 4646a889490..b9f839e7f98 100644 --- a/src/mame/drivers/gaplus.cpp +++ b/src/mame/drivers/gaplus.cpp @@ -515,15 +515,15 @@ void gaplus_state::machine_start() static MACHINE_CONFIG_START( gaplus ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 24576000/16) /* 1.536 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_24_576MHz/16) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", gaplus_state, vblank_main_irq) - MCFG_CPU_ADD("sub", M6809, 24576000/16) /* 1.536 MHz */ + MCFG_CPU_ADD("sub", MC6809E, XTAL_24_576MHz/16) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", gaplus_state, vblank_sub_irq) - MCFG_CPU_ADD("sub2", M6809, 24576000/16) /* 1.536 MHz */ + MCFG_CPU_ADD("sub2", MC6809E, XTAL_24_576MHz/16) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(cpu3_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", gaplus_state, vblank_sub2_irq) @@ -571,7 +571,7 @@ static MACHINE_CONFIG_START( gaplus ) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_SOUND_ADD("namco", NAMCO_15XX, 24576000/1024) + MCFG_SOUND_ADD("namco", NAMCO_15XX, XTAL_24_576MHz/1024) MCFG_NAMCO_AUDIO_VOICES(8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) diff --git a/src/mame/drivers/gimix.cpp b/src/mame/drivers/gimix.cpp index 4467b925b56..be06ff87ecb 100644 --- a/src/mame/drivers/gimix.cpp +++ b/src/mame/drivers/gimix.cpp @@ -545,7 +545,7 @@ MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) static MACHINE_CONFIG_START( gimix ) // basic machine hardware - MCFG_CPU_ADD("maincpu", M6809E, XTAL_8MHz) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(gimix_mem) MCFG_CPU_IO_MAP(gimix_io) diff --git a/src/mame/drivers/gladiatr.cpp b/src/mame/drivers/gladiatr.cpp index 6f8e32b0e9e..fa20baf2184 100644 --- a/src/mame/drivers/gladiatr.cpp +++ b/src/mame/drivers/gladiatr.cpp @@ -141,7 +141,7 @@ Address Dir Data Name Description --------111----- W xxxxxxxx ADCS command to 6809 -Third CPU (6809) +Third CPU (HD6809) ---------------- Address Dir Data Name Description @@ -946,7 +946,7 @@ static MACHINE_CONFIG_START( ppking ) MCFG_CPU_IO_MAP(ppking_cpu2_io) MCFG_CPU_PERIODIC_INT_DRIVER(ppking_state, irq0_line_assert, 60) - MCFG_CPU_ADD("audiocpu", M6809, XTAL_12MHz/16) /* verified on pcb */ + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_12MHz/4) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(ppking_cpu3_map) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) @@ -1010,7 +1010,7 @@ static MACHINE_CONFIG_START( gladiatr ) MCFG_CPU_PROGRAM_MAP(cpu2_map) MCFG_CPU_IO_MAP(gladiatr_cpu2_io) - MCFG_CPU_ADD("audiocpu", M6809, XTAL_12MHz/16) /* verified on pcb */ + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_12MHz/4) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(gladiatr_cpu3_map) MCFG_MACHINE_RESET_OVERRIDE(gladiatr_state,gladiator) diff --git a/src/mame/drivers/gng.cpp b/src/mame/drivers/gng.cpp index 6dd73d4a42c..95c8874a3a7 100644 --- a/src/mame/drivers/gng.cpp +++ b/src/mame/drivers/gng.cpp @@ -357,7 +357,7 @@ void gng_state::machine_reset() static MACHINE_CONFIG_START( gng ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_12MHz/8) /* verified on pcb */ + MCFG_CPU_ADD("maincpu", MC6809, XTAL_12MHz/2) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(gng_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", gng_state, irq0_line_hold) diff --git a/src/mame/drivers/halleys.cpp b/src/mame/drivers/halleys.cpp index 63223fa0cff..75e1a646fea 100644 --- a/src/mame/drivers/halleys.cpp +++ b/src/mame/drivers/halleys.cpp @@ -1921,7 +1921,7 @@ void halleys_state::machine_reset() static MACHINE_CONFIG_START( halleys ) - MCFG_CPU_ADD("maincpu", M6809, XTAL_19_968MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_19_968MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(halleys_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", halleys_state, halleys_scanline, "screen", 0, 1) diff --git a/src/mame/drivers/icecold.cpp b/src/mame/drivers/icecold.cpp index 523be013c23..96b81561513 100644 --- a/src/mame/drivers/icecold.cpp +++ b/src/mame/drivers/icecold.cpp @@ -333,7 +333,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(icecold_state::icecold_motors_timer) static MACHINE_CONFIG_START( icecold ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_6MHz/4) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_6MHz/4) // 68A09E MCFG_CPU_PROGRAM_MAP(icecold_map) MCFG_DEVICE_ADD( "pia0", PIA6821, 0) diff --git a/src/mame/drivers/irobot.cpp b/src/mame/drivers/irobot.cpp index 8669ef200e7..6a297cb5a6e 100644 --- a/src/mame/drivers/irobot.cpp +++ b/src/mame/drivers/irobot.cpp @@ -301,7 +301,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( irobot ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/8) + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK/8) MCFG_CPU_PROGRAM_MAP(irobot_map) MCFG_NVRAM_ADD_0FILL("nvram") diff --git a/src/mame/drivers/ironhors.cpp b/src/mame/drivers/ironhors.cpp index ee36c03d9c2..40f17548c69 100644 --- a/src/mame/drivers/ironhors.cpp +++ b/src/mame/drivers/ironhors.cpp @@ -363,11 +363,11 @@ void ironhors_state::machine_reset() static MACHINE_CONFIG_START( ironhors ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809,18432000/6) /* 3.072 MHz??? mod by Shingo Suzuki 1999/10/15 */ + MCFG_CPU_ADD("maincpu", MC6809E, 18432000/6) /* 3.072 MHz??? mod by Shingo Suzuki 1999/10/15 */ MCFG_CPU_PROGRAM_MAP(master_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ironhors_state, irq, "screen", 0, 1) - MCFG_CPU_ADD("soundcpu",Z80,18432000/6) /* 3.072 MHz */ + MCFG_CPU_ADD("soundcpu", Z80, 18432000/6) /* 3.072 MHz */ MCFG_CPU_PROGRAM_MAP(slave_map) MCFG_CPU_IO_MAP(slave_io_map) diff --git a/src/mame/drivers/mappy.cpp b/src/mame/drivers/mappy.cpp index b5935bd983b..733266fe340 100644 --- a/src/mame/drivers/mappy.cpp +++ b/src/mame/drivers/mappy.cpp @@ -195,7 +195,7 @@ PCB Number: 22109611 (22109631) | 0773 1502 | | PAL GR1-3.3M | | 8148 VOL | - | 6809 8148 | + | 68A09EP 8148 | | | | GR1-4.1K | | --| @@ -217,7 +217,7 @@ PCB Number: 22109611 (22109631) | 5604 | | GR2-1.1B | | PAL 1603 DSWA | - | 6809 | + | 68A09EP | | 18.432MHz | |---------------------------------| @@ -1315,11 +1315,11 @@ void mappy_state::machine_start() static MACHINE_CONFIG_START( superpac_common ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, PIXEL_CLOCK/4) /* 1.536 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, PIXEL_CLOCK/4) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(superpac_cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, main_vblank_irq) // also update the custom I/O chips - MCFG_CPU_ADD("sub", M6809, PIXEL_CLOCK/4) /* 1.536 MHz */ + MCFG_CPU_ADD("sub", MC6809E, PIXEL_CLOCK/4) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(superpac_cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub_vblank_irq) @@ -1427,15 +1427,15 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( phozon ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, PIXEL_CLOCK/4) /* MAIN CPU */ + MCFG_CPU_ADD("maincpu", MC6809E, PIXEL_CLOCK/4) /* MAIN CPU */ MCFG_CPU_PROGRAM_MAP(phozon_cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, main_vblank_irq) // also update the custom I/O chips - MCFG_CPU_ADD("sub", M6809, PIXEL_CLOCK/4) /* SOUND CPU */ + MCFG_CPU_ADD("sub", MC6809E, PIXEL_CLOCK/4) /* SOUND CPU */ MCFG_CPU_PROGRAM_MAP(phozon_cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub_vblank_irq) - MCFG_CPU_ADD("sub2", M6809, PIXEL_CLOCK/4) /* SUB CPU */ + MCFG_CPU_ADD("sub2", MC6809E, PIXEL_CLOCK/4) /* SUB CPU */ MCFG_CPU_PROGRAM_MAP(phozon_cpu3_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub2_vblank_irq) @@ -1495,11 +1495,11 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( mappy_common ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, PIXEL_CLOCK/4) /* 1.536 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, PIXEL_CLOCK/4) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(mappy_cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, main_vblank_irq) // also update the custom I/O chips - MCFG_CPU_ADD("sub", M6809, PIXEL_CLOCK/4) /* 1.536 MHz */ + MCFG_CPU_ADD("sub", MC6809E, PIXEL_CLOCK/4) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(mappy_cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub_vblank_irq) diff --git a/src/mame/drivers/mikie.cpp b/src/mame/drivers/mikie.cpp index d0974d3508e..38118603465 100644 --- a/src/mame/drivers/mikie.cpp +++ b/src/mame/drivers/mikie.cpp @@ -259,7 +259,7 @@ INTERRUPT_GEN_MEMBER(mikie_state::vblank_irq) static MACHINE_CONFIG_START( mikie ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, OSC/12) // 9A (surface scratched) + MCFG_CPU_ADD("maincpu", MC6809E, OSC/12) // 9A (surface scratched) MCFG_CPU_PROGRAM_MAP(mikie_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mikie_state, vblank_irq) diff --git a/src/mame/drivers/mkit09.cpp b/src/mame/drivers/mkit09.cpp index b38fe364f34..c87a6aef112 100644 --- a/src/mame/drivers/mkit09.cpp +++ b/src/mame/drivers/mkit09.cpp @@ -191,7 +191,7 @@ WRITE8_MEMBER( mkit09_state::pb_w ) static MACHINE_CONFIG_START( mkit09 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6809E, XTAL_4MHz) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(mkit09_mem) MCFG_CPU_IO_MAP(mkit09_io) @@ -217,7 +217,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( mkit09a ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6809E, XTAL_4MHz) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(mkit09a_mem) MCFG_CPU_IO_MAP(mkit09_io) diff --git a/src/mame/drivers/namcos1.cpp b/src/mame/drivers/namcos1.cpp index 98c7e79c05c..e4669a3f24f 100644 --- a/src/mame/drivers/namcos1.cpp +++ b/src/mame/drivers/namcos1.cpp @@ -1015,19 +1015,19 @@ GFXDECODE_END static MACHINE_CONFIG_START( ns1 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809,XTAL_49_152MHz/32) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert) - MCFG_CPU_ADD("subcpu", M6809,XTAL_49_152MHz/32) + MCFG_CPU_ADD("subcpu", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(sub_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert) - MCFG_CPU_ADD("audiocpu", M6809,XTAL_49_152MHz/32) + MCFG_CPU_ADD("audiocpu", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert) - MCFG_CPU_ADD("mcu",HD63701,XTAL_49_152MHz/8) + MCFG_CPU_ADD("mcu", HD63701, XTAL_49_152MHz/8) MCFG_CPU_PROGRAM_MAP(mcu_map) MCFG_CPU_IO_MAP(mcu_port_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos1_state, irq0_line_assert) diff --git a/src/mame/drivers/namcos2.cpp b/src/mame/drivers/namcos2.cpp index 0b1e3264f74..043fe7c7bfc 100644 --- a/src/mame/drivers/namcos2.cpp +++ b/src/mame/drivers/namcos2.cpp @@ -1721,7 +1721,7 @@ static MACHINE_CONFIG_START( default ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_default_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -1798,7 +1798,7 @@ static MACHINE_CONFIG_START( gollygho ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_default_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -1848,7 +1848,7 @@ static MACHINE_CONFIG_START( finallap ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_finallap_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -1903,7 +1903,7 @@ static MACHINE_CONFIG_START( sgunner ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_sgunner_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -1955,7 +1955,7 @@ static MACHINE_CONFIG_START( sgunner2 ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_sgunner_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -2012,7 +2012,7 @@ static MACHINE_CONFIG_START( luckywld ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_luckywld_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) @@ -2067,7 +2067,7 @@ static MACHINE_CONFIG_START( metlhawk ) MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_CPU_PROGRAM_MAP(slave_metlhawk_am) - MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ + MCFG_CPU_ADD("audiocpu", MC6809E, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */ MCFG_CPU_PROGRAM_MAP(sound_default_am) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120) diff --git a/src/mame/drivers/namcos21.cpp b/src/mame/drivers/namcos21.cpp index 8c0e249eb63..234e436a57d 100644 --- a/src/mame/drivers/namcos21.cpp +++ b/src/mame/drivers/namcos21.cpp @@ -1889,7 +1889,7 @@ static MACHINE_CONFIG_START( namcos21 ) MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */ MCFG_CPU_PROGRAM_MAP(slave_map) - MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */ + MCFG_CPU_ADD("audiocpu", MC6809E, 3072000) /* Sound */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) @@ -1956,7 +1956,7 @@ static MACHINE_CONFIG_START( driveyes ) MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */ MCFG_CPU_PROGRAM_MAP(driveyes_slave_map) - MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */ + MCFG_CPU_ADD("audiocpu", MC6809E, 3072000) /* Sound */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) @@ -2016,7 +2016,7 @@ static MACHINE_CONFIG_START( winrun ) MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */ MCFG_CPU_PROGRAM_MAP(winrun_slave_map) - MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */ + MCFG_CPU_ADD("audiocpu", MC6809E, 3072000) /* Sound */ MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) MCFG_CPU_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) diff --git a/src/mame/drivers/namcos86.cpp b/src/mame/drivers/namcos86.cpp index 0f2f82b1b7d..c459f2af3bc 100644 --- a/src/mame/drivers/namcos86.cpp +++ b/src/mame/drivers/namcos86.cpp @@ -1050,11 +1050,11 @@ GFXDECODE_END static MACHINE_CONFIG_START( hopmappy ) /* basic machine hardware */ - MCFG_CPU_ADD("cpu1", M6809, XTAL_49_152MHz/32) + MCFG_CPU_ADD("cpu1", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos86_state, irq0_line_assert) - MCFG_CPU_ADD("cpu2", M6809, XTAL_49_152MHz/32) + MCFG_CPU_ADD("cpu2", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(hopmappy_cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos86_state, irq0_line_assert) diff --git a/src/mame/drivers/nsg6809.cpp b/src/mame/drivers/nsg6809.cpp index ca5d9fbd95f..8c35fe32daa 100644 --- a/src/mame/drivers/nsg6809.cpp +++ b/src/mame/drivers/nsg6809.cpp @@ -62,7 +62,7 @@ static INPUT_PORTS_START( pitchhit ) INPUT_PORTS_END static MACHINE_CONFIG_START( pitchhit ) - MCFG_CPU_ADD("maincpu", M6809, XTAL_4MHz / 4) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) // clock buffered through 74HC4060 MCFG_CPU_PROGRAM_MAP(main_map) MCFG_DEVICE_ADD("via", VIA6522, XTAL_4MHz / 4) diff --git a/src/mame/drivers/overdriv.cpp b/src/mame/drivers/overdriv.cpp index 29d8c152187..094afd7b69f 100644 --- a/src/mame/drivers/overdriv.cpp +++ b/src/mame/drivers/overdriv.cpp @@ -332,7 +332,7 @@ static MACHINE_CONFIG_START( overdriv ) /* IRQ 5 and 6 are generated by the main CPU. */ /* IRQ 5 is used only in test mode, to request the checksums of the gfx ROMs. */ - MCFG_CPU_ADD("audiocpu", M6809, XTAL_3_579545MHz) /* 1.789 MHz?? This might be the right speed, but ROM testing */ + MCFG_CPU_ADD("audiocpu", MC6809E, XTAL_3_579545MHz) /* 1.789 MHz?? This might be the right speed, but ROM testing */ MCFG_CPU_PROGRAM_MAP(overdriv_sound_map) /* takes a little too much (the counter wraps from 0000 to 9999). */ /* This might just mean that the video refresh rate is less than */ /* 60 fps, that's how I fixed it for now. */ diff --git a/src/mame/drivers/pacland.cpp b/src/mame/drivers/pacland.cpp index acd5b3ed015..92d77f5738e 100644 --- a/src/mame/drivers/pacland.cpp +++ b/src/mame/drivers/pacland.cpp @@ -429,7 +429,7 @@ INTERRUPT_GEN_MEMBER(pacland_state::mcu_vblank_irq) static MACHINE_CONFIG_START( pacland ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_49_152MHz/32) /* 1.536 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_49_152MHz/32) /* 1.536 MHz */ MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", pacland_state, main_vblank_irq) diff --git a/src/mame/drivers/pandoras.cpp b/src/mame/drivers/pandoras.cpp index 8a9fc121dfa..6ce65d76df4 100644 --- a/src/mame/drivers/pandoras.cpp +++ b/src/mame/drivers/pandoras.cpp @@ -308,11 +308,11 @@ READ8_MEMBER(pandoras_state::pandoras_portB_r) static MACHINE_CONFIG_START( pandoras ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/6) /* CPU A */ + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK/6) /* CPU A */ MCFG_CPU_PROGRAM_MAP(pandoras_master_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", pandoras_state, pandoras_master_interrupt) - MCFG_CPU_ADD("sub", M6809, MASTER_CLOCK/6) /* CPU B */ + MCFG_CPU_ADD("sub", MC6809E, MASTER_CLOCK/6) /* CPU B */ MCFG_CPU_PROGRAM_MAP(pandoras_slave_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", pandoras_state, pandoras_slave_interrupt) diff --git a/src/mame/drivers/pegasus.cpp b/src/mame/drivers/pegasus.cpp index 4d767d9e4b9..2ac3e43b3ff 100644 --- a/src/mame/drivers/pegasus.cpp +++ b/src/mame/drivers/pegasus.cpp @@ -480,7 +480,7 @@ DRIVER_INIT_MEMBER(pegasus_state, pegasus) static MACHINE_CONFIG_START( pegasus ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809E, XTAL_4MHz) // actually a 6809C - 4MHZ clock coming in, 1MHZ internally + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) // actually a 6809C - 4MHZ clock coming in, 1MHZ internally MCFG_CPU_PROGRAM_MAP(pegasus_mem) MCFG_TIMER_DRIVER_ADD_PERIODIC("pegasus_firq", pegasus_state, pegasus_firq, attotime::from_hz(400)) diff --git a/src/mame/drivers/poly.cpp b/src/mame/drivers/poly.cpp index eed42548906..6a8adcc1bb5 100644 --- a/src/mame/drivers/poly.cpp +++ b/src/mame/drivers/poly.cpp @@ -152,7 +152,7 @@ WRITE8_MEMBER(poly_state::baud_rate_w) static MACHINE_CONFIG_START( poly ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809E, XTAL_12_0576MHz / 3) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_12_0576MHz / 3) // nominally 4 MHz MCFG_CPU_PROGRAM_MAP(poly_mem) /* video hardware */ diff --git a/src/mame/drivers/qix.cpp b/src/mame/drivers/qix.cpp index 28dbbf459e8..3032ca89512 100644 --- a/src/mame/drivers/qix.cpp +++ b/src/mame/drivers/qix.cpp @@ -601,7 +601,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( qix_base ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK_OSC/4/4) /* 1.25 MHz */ + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CLOCK_OSC/4/4) /* 1.25 MHz */ MCFG_CPU_PROGRAM_MAP(main_map) /* high interleave needed to ensure correct text in service mode */ @@ -632,9 +632,9 @@ static MACHINE_CONFIG_DERIVED( qix, qix_base ) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( kram3, qix ) - MCFG_CPU_REPLACE("maincpu", M6809E, MAIN_CLOCK_OSC/4) /* 1.25 MHz */ + MCFG_CPU_MODIFY("maincpu") MCFG_CPU_PROGRAM_MAP(kram3_main_map) - MCFG_M6809E_LIC_CB(WRITELINE(qix_state,kram3_lic_maincpu_changed)) + MCFG_MC6809E_LIC_CB(WRITELINE(qix_state, kram3_lic_maincpu_changed)) MCFG_FRAGMENT_ADD(kram3_video) MACHINE_CONFIG_END diff --git a/src/mame/drivers/s11.cpp b/src/mame/drivers/s11.cpp index f574e3b9c71..8c299d7178f 100644 --- a/src/mame/drivers/s11.cpp +++ b/src/mame/drivers/s11.cpp @@ -463,7 +463,7 @@ static MACHINE_CONFIG_START( s11 ) MCFG_PIA_IRQB_HANDLER(INPUTLINE("audiocpu", M6808_IRQ_LINE)) /* Add the background music card */ - MCFG_CPU_ADD("bgcpu", M6809E, 8000000) // MC68B09E + MCFG_CPU_ADD("bgcpu", MC6809E, 8000000 / 4) // MC68B09E MCFG_CPU_PROGRAM_MAP(s11_bg_map) MCFG_SPEAKER_STANDARD_MONO("bg") diff --git a/src/mame/drivers/s11a.cpp b/src/mame/drivers/s11a.cpp index 48ba3c9d55b..3d761646231 100644 --- a/src/mame/drivers/s11a.cpp +++ b/src/mame/drivers/s11a.cpp @@ -254,11 +254,11 @@ static MACHINE_CONFIG_START( s11a ) MCFG_PIA_IRQB_HANDLER(INPUTLINE("audiocpu", M6802_IRQ_LINE)) /* Add the background music card */ - MCFG_CPU_ADD("bgcpu", M6809E, 8000000) // MC68B09E + MCFG_CPU_ADD("bgcpu", MC6809E, XTAL_8MHz / 4) // MC68B09E MCFG_CPU_PROGRAM_MAP(s11a_bg_map) MCFG_SPEAKER_STANDARD_MONO("bg") - MCFG_YM2151_ADD("ym2151", 3580000) + MCFG_YM2151_ADD("ym2151", XTAL_3_579545MHz) MCFG_YM2151_IRQ_HANDLER(WRITELINE(s11a_state, ym2151_irq_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "bg", 0.50) diff --git a/src/mame/drivers/s11b.cpp b/src/mame/drivers/s11b.cpp index c2807788671..c48ee63939b 100644 --- a/src/mame/drivers/s11b.cpp +++ b/src/mame/drivers/s11b.cpp @@ -329,7 +329,7 @@ static MACHINE_CONFIG_START( s11b ) MCFG_PIA_IRQB_HANDLER(INPUTLINE("audiocpu", M6802_IRQ_LINE)) /* Add the background music card */ - MCFG_CPU_ADD("bgcpu", M6809E, XTAL_8MHz) // MC68B09E (note: schematics show this as 8mhz/2, but games crash very quickly with that speed?) + MCFG_CPU_ADD("bgcpu", MC6809E, XTAL_8MHz / 4) // MC68B09E MCFG_CPU_PROGRAM_MAP(s11b_bg_map) MCFG_QUANTUM_TIME(attotime::from_hz(50)) diff --git a/src/mame/drivers/skykid.cpp b/src/mame/drivers/skykid.cpp index 5373dd50605..6f28a46a259 100644 --- a/src/mame/drivers/skykid.cpp +++ b/src/mame/drivers/skykid.cpp @@ -438,11 +438,11 @@ INTERRUPT_GEN_MEMBER(skykid_state::mcu_vblank_irq) static MACHINE_CONFIG_START( skykid ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809,49152000/32) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_49_152MHz/32) MCFG_CPU_PROGRAM_MAP(skykid_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", skykid_state, main_vblank_irq) - MCFG_CPU_ADD("mcu", HD63701,49152000/8) /* or compatible 6808 with extra instructions */ + MCFG_CPU_ADD("mcu", HD63701, XTAL_49_152MHz/8) /* or compatible 6808 with extra instructions */ MCFG_CPU_PROGRAM_MAP(mcu_map) MCFG_CPU_IO_MAP(mcu_port_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", skykid_state, mcu_vblank_irq) diff --git a/src/mame/drivers/sonson.cpp b/src/mame/drivers/sonson.cpp index 9c35e66cd07..f7cc802a1c2 100644 --- a/src/mame/drivers/sonson.cpp +++ b/src/mame/drivers/sonson.cpp @@ -226,11 +226,11 @@ GFXDECODE_END static MACHINE_CONFIG_START( sonson ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_12MHz/8) /* 1.5 MHz */ + MCFG_CPU_ADD("maincpu", MC6809, XTAL_12MHz/2) // HD68B09P (/4 internally) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", sonson_state, irq0_line_hold) - MCFG_CPU_ADD("audiocpu", M6809, XTAL_12MHz/8) /* 1.5 MHz */ + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_12MHz/2) // HD68B09P (/4 internally) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_PERIODIC_INT_DRIVER(sonson_state, irq0_line_hold, 4*60) /* FIRQs are triggered by the main CPU */ diff --git a/src/mame/drivers/sothello.cpp b/src/mame/drivers/sothello.cpp index ff48bcdb680..33b5b2e3af4 100644 --- a/src/mame/drivers/sothello.cpp +++ b/src/mame/drivers/sothello.cpp @@ -30,7 +30,7 @@ | | +---------------------------------------------------------------------------------+ -CPU : Z80A(x2) 68B09 +CPU : Z80A(x2) HD68B09P Sound: YM2203?(surface scratched) + M5205 OSC : 8.0000MHz(X1) 21.477 MHz(X2) 384kHz(X3) @@ -97,12 +97,7 @@ private: #define VDP_MEM 0x40000 -#define MAIN_CLOCK (XTAL_21_4772MHz) -#define MAINCPU_CLOCK (XTAL_21_4772MHz/6) -#define SOUNDCPU_CLOCK (XTAL_21_4772MHz/6) -#define YM_CLOCK (XTAL_21_4772MHz/12) -#define MSM_CLOCK (XTAL_384kHz) -#define SUBCPU_CLOCK (XTAL_8MHz/4) + /* main Z80 */ @@ -352,30 +347,30 @@ void sothello_state::machine_reset() static MACHINE_CONFIG_START( sothello ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", Z80, MAINCPU_CLOCK) + MCFG_CPU_ADD("maincpu", Z80, XTAL_21_4772MHz / 6) MCFG_CPU_PROGRAM_MAP(maincpu_mem_map) MCFG_CPU_IO_MAP(maincpu_io_map) - MCFG_CPU_ADD("soundcpu", Z80, SOUNDCPU_CLOCK) + MCFG_CPU_ADD("soundcpu", Z80, XTAL_21_4772MHz / 6) MCFG_CPU_PROGRAM_MAP(soundcpu_mem_map) MCFG_CPU_IO_MAP(soundcpu_io_map) - MCFG_CPU_ADD("subcpu", M6809, SUBCPU_CLOCK) + MCFG_CPU_ADD("subcpu", MC6809, XTAL_8MHz) // divided by 4 internally MCFG_CPU_PROGRAM_MAP(subcpu_mem_map) MCFG_QUANTUM_TIME(attotime::from_hz(600)) /* video hardware */ - MCFG_V9938_ADD("v9938", "screen", VDP_MEM, MAIN_CLOCK) + MCFG_V9938_ADD("v9938", "screen", VDP_MEM, XTAL_21_4772MHz) MCFG_V99X8_INTERRUPT_CALLBACK(INPUTLINE("maincpu", 0)) - MCFG_V99X8_SCREEN_ADD_NTSC("screen", "v9938", MAIN_CLOCK) + MCFG_V99X8_SCREEN_ADD_NTSC("screen", "v9938", XTAL_21_4772MHz) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_GENERIC_LATCH_8_ADD("soundlatch") - MCFG_SOUND_ADD("ymsnd", YM2203, YM_CLOCK) + MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_21_4772MHz / 12) MCFG_YM2203_IRQ_HANDLER(INPUTLINE("subcpu", 0)) MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSWA")) MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSWB")) @@ -386,7 +381,7 @@ static MACHINE_CONFIG_START( sothello ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) - MCFG_SOUND_ADD("msm", MSM5205, MSM_CLOCK) + MCFG_SOUND_ADD("msm", MSM5205, XTAL_384kHz) MCFG_MSM5205_VCLK_CB(WRITELINE(sothello_state, adpcm_int)) /* interrupt function */ MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* changed on the fly */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) diff --git a/src/mame/drivers/spdodgeb.cpp b/src/mame/drivers/spdodgeb.cpp index 3190bdc168d..a4591ce96a7 100644 --- a/src/mame/drivers/spdodgeb.cpp +++ b/src/mame/drivers/spdodgeb.cpp @@ -410,7 +410,7 @@ static MACHINE_CONFIG_START( spdodgeb ) MCFG_CPU_PROGRAM_MAP(spdodgeb_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", spdodgeb_state, interrupt, "screen", 0, 1) /* 1 IRQ every 8 visible scanlines, plus NMI for vblank */ - MCFG_CPU_ADD("audiocpu", M6809, XTAL_12MHz/6) /* 2MHz ? */ + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_12MHz/2) // HD68A09P (1.5MHz internally) MCFG_CPU_PROGRAM_MAP(spdodgeb_sound_map) /* video hardware */ diff --git a/src/mame/drivers/spiders.cpp b/src/mame/drivers/spiders.cpp index c28978e00fe..617c3afc1f8 100644 --- a/src/mame/drivers/spiders.cpp +++ b/src/mame/drivers/spiders.cpp @@ -539,7 +539,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( spiders ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2800000) + MCFG_CPU_ADD("maincpu", MC6809, 2800000) MCFG_CPU_PROGRAM_MAP(spiders_main_map) MCFG_CPU_PERIODIC_INT_DRIVER(spiders_state, update_pia_1, 25) diff --git a/src/mame/drivers/spy.cpp b/src/mame/drivers/spy.cpp index 87e27afd992..fccb56cd6dc 100644 --- a/src/mame/drivers/spy.cpp +++ b/src/mame/drivers/spy.cpp @@ -495,11 +495,11 @@ void spy_state::machine_reset() static MACHINE_CONFIG_START( spy ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 3000000) /* ? */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_24MHz / 8) // 3 MHz? (divided by 051961) MCFG_CPU_PROGRAM_MAP(spy_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", spy_state, spy_interrupt) - MCFG_CPU_ADD("audiocpu", Z80, 3579545) + MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) MCFG_CPU_PROGRAM_MAP(spy_sound_map) /* nmi by the sound chip */ MCFG_WATCHDOG_ADD("watchdog") diff --git a/src/mame/drivers/squale.cpp b/src/mame/drivers/squale.cpp index 76b2028ba34..3e37cfceb16 100644 --- a/src/mame/drivers/squale.cpp +++ b/src/mame/drivers/squale.cpp @@ -780,7 +780,7 @@ void squale_state::machine_reset() static MACHINE_CONFIG_START( squale ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6809E, CPU_CLOCK) // 12/2015 : Should be set to M6809 but it actually have the wrong clock divisor (1 instead of 4) and working 4 times too fast... + MCFG_CPU_ADD("maincpu", MC6809, CPU_CLOCK) MCFG_CPU_PROGRAM_MAP(squale_mem) MCFG_CPU_IO_MAP(squale_io) diff --git a/src/mame/drivers/srumbler.cpp b/src/mame/drivers/srumbler.cpp index b1350b3cfa9..8a8eff46f4d 100644 --- a/src/mame/drivers/srumbler.cpp +++ b/src/mame/drivers/srumbler.cpp @@ -246,7 +246,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( srumbler ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 1500000) /* 1.5 MHz (?) */ + MCFG_CPU_ADD("maincpu", MC6809, 6000000) /* HD68B09P at 6 MHz (?) */ MCFG_CPU_PROGRAM_MAP(srumbler_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", srumbler_state, interrupt, "screen", 0, 1) diff --git a/src/mame/drivers/starwars.cpp b/src/mame/drivers/starwars.cpp index 67ce17a2358..3166c409202 100644 --- a/src/mame/drivers/starwars.cpp +++ b/src/mame/drivers/starwars.cpp @@ -302,14 +302,14 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( starwars ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK / 8) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK / 8) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_PERIODIC_INT_DRIVER(starwars_state, irq0_line_assert, CLOCK_3KHZ / 12) MCFG_WATCHDOG_ADD("watchdog") MCFG_WATCHDOG_TIME_INIT(attotime::from_hz(CLOCK_3KHZ / 128)) - MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK / 8) + MCFG_CPU_ADD("audiocpu", MC6809E, MASTER_CLOCK / 8) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_DEVICE_ADD("riot", RIOT6532, MASTER_CLOCK / 8) diff --git a/src/mame/drivers/swtpc09.cpp b/src/mame/drivers/swtpc09.cpp index 2ef045486fa..4f94d66128c 100644 --- a/src/mame/drivers/swtpc09.cpp +++ b/src/mame/drivers/swtpc09.cpp @@ -161,7 +161,7 @@ SLOT_INTERFACE_END /* MPU09, MPID, MPS2 DMF2 */ static MACHINE_CONFIG_START( swtpc09_base ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 1000000) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(mp09_mem) MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0) @@ -232,7 +232,7 @@ MACHINE_CONFIG_END /* MPU09, MPID, MPS2 DMF3 */ static MACHINE_CONFIG_DERIVED( swtpc09d3, swtpc09_base ) MCFG_CPU_MODIFY("maincpu") - MCFG_CPU_CLOCK(2000000) + MCFG_CPU_CLOCK(XTAL_8MHz) MCFG_DEVICE_MODIFY("pia") MCFG_DEVICE_CLOCK(2000000) diff --git a/src/mame/drivers/tavernie.cpp b/src/mame/drivers/tavernie.cpp index afa3ca22b92..9a0f0477f1a 100644 --- a/src/mame/drivers/tavernie.cpp +++ b/src/mame/drivers/tavernie.cpp @@ -288,7 +288,7 @@ void tavernie_state::kbd_put(u8 data) static MACHINE_CONFIG_START( cpu09 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu",M6809E, XTAL_4MHz) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(cpu09_mem) MCFG_MACHINE_RESET_OVERRIDE(tavernie_state, cpu09) diff --git a/src/mame/drivers/thomson.cpp b/src/mame/drivers/thomson.cpp index 8b5e9086f6d..3195b00baff 100644 --- a/src/mame/drivers/thomson.cpp +++ b/src/mame/drivers/thomson.cpp @@ -623,8 +623,8 @@ static MACHINE_CONFIG_START( to7 ) MCFG_MACHINE_RESET_OVERRIDE( thomson_state, to7 ) /* cpu */ - MCFG_CPU_ADD ( "maincpu", M6809, 1000000 ) - MCFG_CPU_PROGRAM_MAP ( to7) + MCFG_CPU_ADD("maincpu", MC6809E, 1000000) + MCFG_CPU_PROGRAM_MAP(to7) MCFG_INPUT_MERGER_ANY_HIGH("mainirq") MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE)) diff --git a/src/mame/drivers/toypop.cpp b/src/mame/drivers/toypop.cpp index 285facb2257..20dbcc9b7ae 100644 --- a/src/mame/drivers/toypop.cpp +++ b/src/mame/drivers/toypop.cpp @@ -653,7 +653,7 @@ INTERRUPT_GEN_MEMBER(namcos16_state::slave_vblank_irq) } static MACHINE_CONFIG_START( liblrabl ) - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK/4) MCFG_CPU_PROGRAM_MAP(master_liblrabl_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos16_state, master_scanline, "screen", 0, 1) @@ -661,7 +661,7 @@ static MACHINE_CONFIG_START( liblrabl ) MCFG_CPU_PROGRAM_MAP(slave_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos16_state, slave_vblank_irq) - MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK/4) + MCFG_CPU_ADD("audiocpu", MC6809E, MASTER_CLOCK/4) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_CPU_PERIODIC_INT_DRIVER(namcos16_state, irq0_line_hold, 60) diff --git a/src/mame/drivers/tp84.cpp b/src/mame/drivers/tp84.cpp index ef213ea248a..b0cb4e71096 100644 --- a/src/mame/drivers/tp84.cpp +++ b/src/mame/drivers/tp84.cpp @@ -331,11 +331,11 @@ INTERRUPT_GEN_MEMBER(tp84_state::sub_vblank_irq) static MACHINE_CONFIG_START( tp84 ) /* basic machine hardware */ - MCFG_CPU_ADD("cpu1",M6809, XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("cpu1", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(tp84_cpu1_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", tp84_state, main_vblank_irq) - MCFG_CPU_ADD("sub", M6809, XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("sub", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(cpu2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", tp84_state, sub_vblank_irq) diff --git a/src/mame/drivers/trackfld.cpp b/src/mame/drivers/trackfld.cpp index 89f355859f2..462be54bfc8 100644 --- a/src/mame/drivers/trackfld.cpp +++ b/src/mame/drivers/trackfld.cpp @@ -963,7 +963,7 @@ INTERRUPT_GEN_MEMBER(trackfld_state::yieartf_timer_irq) static MACHINE_CONFIG_START( yieartf ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/6/2) /* a guess for now */ + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK/6/2) /* a guess for now */ MCFG_CPU_PROGRAM_MAP(yieartf_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", trackfld_state, vblank_irq) MCFG_CPU_PERIODIC_INT_DRIVER(trackfld_state, yieartf_timer_irq, 480) @@ -1047,7 +1047,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( mastkin, trackfld ) /* basic machine hardware */ - MCFG_CPU_REPLACE("maincpu", M6809, MASTER_CLOCK/6/2) /* a guess for now */ + MCFG_CPU_REPLACE("maincpu", MC6809E, MASTER_CLOCK/6/2) /* a guess for now */ MCFG_CPU_PROGRAM_MAP(mastkin_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", trackfld_state, vblank_irq) diff --git a/src/mame/drivers/tutankhm.cpp b/src/mame/drivers/tutankhm.cpp index 50507d7aba8..5bf8cd01d1f 100644 --- a/src/mame/drivers/tutankhm.cpp +++ b/src/mame/drivers/tutankhm.cpp @@ -225,7 +225,7 @@ MACHINE_RESET_MEMBER(tutankhm_state,tutankhm) static MACHINE_CONFIG_START( tutankhm ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_18_432MHz/12) /* 1.5 MHz ??? */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_18_432MHz/12) /* 1.5 MHz ??? */ MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", tutankhm_state, tutankhm_interrupt) diff --git a/src/mame/drivers/v6809.cpp b/src/mame/drivers/v6809.cpp index c9a27f1ea2f..c09bd486b81 100644 --- a/src/mame/drivers/v6809.cpp +++ b/src/mame/drivers/v6809.cpp @@ -127,10 +127,6 @@ static ADDRESS_MAP_START(v6809_mem, AS_PROGRAM, 8, v6809_state) AM_RANGE(0xf800, 0xffff) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START(v6809_io, AS_PROGRAM, 8, v6809_state) - AM_RANGE(0x0064, 0x0064) AM_WRITENOP -ADDRESS_MAP_END - /* Input ports */ static INPUT_PORTS_START( v6809 ) @@ -280,9 +276,8 @@ SLOT_INTERFACE_END static MACHINE_CONFIG_START( v6809 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_16MHz / 4) + MCFG_CPU_ADD("maincpu", MC6809, XTAL_16MHz / 4) // divided by 4 again internally MCFG_CPU_PROGRAM_MAP(v6809_mem) - MCFG_CPU_IO_MAP(v6809_io) MCFG_MACHINE_RESET_OVERRIDE(v6809_state, v6809) /* video hardware */ diff --git a/src/mame/drivers/vectrex.cpp b/src/mame/drivers/vectrex.cpp index 446d36edff6..e6cfc5927bc 100644 --- a/src/mame/drivers/vectrex.cpp +++ b/src/mame/drivers/vectrex.cpp @@ -97,7 +97,7 @@ SLOT_INTERFACE_END static MACHINE_CONFIG_START( vectrex ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_6MHz / 4) // 68A09 + MCFG_CPU_ADD("maincpu", MC6809, XTAL_6MHz) // 68A09 MCFG_CPU_PROGRAM_MAP(vectrex_map) /* video hardware */ diff --git a/src/mame/drivers/wacky_gator.cpp b/src/mame/drivers/wacky_gator.cpp index 1922c4b5bb2..ded61a8c7af 100644 --- a/src/mame/drivers/wacky_gator.cpp +++ b/src/mame/drivers/wacky_gator.cpp @@ -273,7 +273,7 @@ ADDRESS_MAP_END static MACHINE_CONFIG_START( wackygtr ) - MCFG_CPU_ADD("maincpu", M6809E, XTAL_3_579545MHz) // HD68B09P + MCFG_CPU_ADD("maincpu", MC6809, XTAL_3_579545MHz) // HD68B09P MCFG_CPU_PROGRAM_MAP(program_map) MCFG_CPU_PERIODIC_INT_DRIVER(wackygtr_state, irq0_line_assert, 50) // FIXME diff --git a/src/mame/drivers/white_mod.cpp b/src/mame/drivers/white_mod.cpp index e39d9801121..6722aaa2a45 100644 --- a/src/mame/drivers/white_mod.cpp +++ b/src/mame/drivers/white_mod.cpp @@ -45,7 +45,7 @@ DRIVER_INIT_MEMBER(whitestar_mod_state,whitestar_mod) static MACHINE_CONFIG_START( whitestar_mod ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(whitestar_mod_map) MACHINE_CONFIG_END diff --git a/src/mame/drivers/whitestar.cpp b/src/mame/drivers/whitestar.cpp index 2136791f2b0..f10b1317953 100644 --- a/src/mame/drivers/whitestar.cpp +++ b/src/mame/drivers/whitestar.cpp @@ -115,7 +115,7 @@ INTERRUPT_GEN_MEMBER(whitestar_state::whitestar_firq_interrupt) static MACHINE_CONFIG_START( whitestar ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, 2000000) MCFG_CPU_PROGRAM_MAP(whitestar_map) MCFG_CPU_PERIODIC_INT_DRIVER(whitestar_state, whitestar_firq_interrupt, 976) // value taken from PinMAME diff --git a/src/mame/drivers/wico.cpp b/src/mame/drivers/wico.cpp index 149c4d56a3d..98f66c27363 100644 --- a/src/mame/drivers/wico.cpp +++ b/src/mame/drivers/wico.cpp @@ -430,9 +430,9 @@ void wico_state::machine_reset() static MACHINE_CONFIG_START( wico ) /* basic machine hardware */ - MCFG_CPU_ADD("ccpu", M6809, 10000000 / 8) + MCFG_CPU_ADD("ccpu", MC6809E, XTAL_10MHz / 8) // MC68A09EP @ U51 MCFG_CPU_PROGRAM_MAP(ccpu_map) - MCFG_CPU_ADD("hcpu", M6809, 10000000 / 8) + MCFG_CPU_ADD("hcpu", MC6809E, XTAL_10MHz / 8) // MC68A09EP @ U24 MCFG_CPU_PROGRAM_MAP(hcpu_map) MCFG_TIMER_DRIVER_ADD_PERIODIC("irq", wico_state, irq_housekeeping, attotime::from_hz(120)) // zero crossing MCFG_TIMER_DRIVER_ADD_PERIODIC("firq", wico_state, firq_housekeeping, attotime::from_hz(750)) // time generator @@ -444,7 +444,7 @@ static MACHINE_CONFIG_START( wico ) /* Sound */ MCFG_FRAGMENT_ADD( genpin_audio ) MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_SOUND_ADD("sn76494", SN76494, 10000000 / 64) + MCFG_SOUND_ADD("sn76494", SN76494, XTAL_10MHz / 64) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) MACHINE_CONFIG_END diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index b3e40bbdb90..7f0a071dd53 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -1436,7 +1436,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( williams ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/3/4) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK/3/4) MCFG_CPU_PROGRAM_MAP(williams_map) MCFG_CPU_ADD("soundcpu", M6808, SOUND_CLOCK) // internal clock divider of 4, effective frequency is 894.886kHz @@ -1650,7 +1650,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( williams2 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/3/4) + MCFG_CPU_ADD("maincpu", MC6809E, MASTER_CLOCK/3/4) MCFG_CPU_PROGRAM_MAP(williams2_d000_ram_map) MCFG_CPU_ADD("soundcpu", M6808, MASTER_CLOCK/3) /* yes, this is different from the older games */ diff --git a/src/mame/drivers/yiear.cpp b/src/mame/drivers/yiear.cpp index b6c36d83338..94b76900587 100644 --- a/src/mame/drivers/yiear.cpp +++ b/src/mame/drivers/yiear.cpp @@ -281,7 +281,7 @@ void yiear_state::machine_reset() static MACHINE_CONFIG_START( yiear ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809,XTAL_18_432MHz/12) /* verified on pcb */ + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_18_432MHz/12) /* verified on pcb */ MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", yiear_state, yiear_vblank_interrupt) MCFG_CPU_PERIODIC_INT_DRIVER(yiear_state, yiear_nmi_interrupt, 480) /* music tempo (correct frequency unknown) */ diff --git a/src/mame/video/decodmd2.cpp b/src/mame/video/decodmd2.cpp index 05ba816709c..32310a4f9fd 100644 --- a/src/mame/video/decodmd2.cpp +++ b/src/mame/video/decodmd2.cpp @@ -4,7 +4,7 @@ * Data East Pinball Dot Matrix Display * * Type 2: 128x32 - * 68B09E @ 8MHz + * 68B09E @ 2MHz * 68B45 CRTC */ @@ -130,7 +130,7 @@ ADDRESS_MAP_END MACHINE_CONFIG_MEMBER( decodmd_type2_device::device_add_mconfig ) /* basic machine hardware */ - MCFG_CPU_ADD("dmdcpu", M6809E, XTAL_8MHz) + MCFG_CPU_ADD("dmdcpu", MC6809E, XTAL_8MHz / 4) MCFG_CPU_PROGRAM_MAP(decodmd2_map) MCFG_QUANTUM_TIME(attotime::from_hz(60)) diff --git a/src/mame/video/qix.cpp b/src/mame/video/qix.cpp index 7f62213aa08..c23022245a4 100644 --- a/src/mame/video/qix.cpp +++ b/src/mame/video/qix.cpp @@ -377,7 +377,7 @@ ADDRESS_MAP_END *************************************/ MACHINE_CONFIG_START( qix_video ) - MCFG_CPU_ADD("videocpu", M6809, MAIN_CLOCK_OSC/4/4) /* 1.25 MHz */ + MCFG_CPU_ADD("videocpu", MC6809E, MAIN_CLOCK_OSC/4/4) /* 1.25 MHz */ MCFG_CPU_PROGRAM_MAP(qix_video_map) MCFG_VIDEO_START_OVERRIDE(qix_state,qix) @@ -397,9 +397,9 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START( kram3_video ) - MCFG_CPU_REPLACE("videocpu", M6809E, MAIN_CLOCK_OSC/4) /* 1.25 MHz */ + MCFG_CPU_MODIFY("videocpu") MCFG_CPU_PROGRAM_MAP(kram3_video_map) - MCFG_M6809E_LIC_CB(WRITELINE(qix_state,kram3_lic_videocpu_changed)) + MCFG_MC6809E_LIC_CB(WRITELINE(qix_state, kram3_lic_videocpu_changed)) MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From 00c9b62a2405b6c4120564845694e90da1346d8b Mon Sep 17 00:00:00 2001 From: Sergey Svishchev Date: Sat, 9 Dec 2017 02:46:23 +0300 Subject: agat7: 840KB floppy HLE; minor fixes -> mark WORKING (#2912) * agat7: add port_char definitions to allow access from Lua, &c (nw) * agat7: adapt "apple2: Break up handlers for C000-C07F range" (nw) * agat7: timer and vblank interrupts (nw) * agat7: HLE of 840KB floppy controller, read-only (nw) * agat7: memory expansion wip (nw) * agat7: update todo list, mark partially WORKING --- scripts/src/bus.lua | 2 + scripts/src/formats.lua | 12 + scripts/target/mame/mess.lua | 1 + src/devices/bus/a2bus/agat7langcard.cpp | 19 +- src/devices/bus/a2bus/agat7langcard.h | 4 +- src/devices/bus/a2bus/agat7ram.cpp | 27 +- src/devices/bus/a2bus/agat7ram.h | 4 +- src/devices/bus/a2bus/agat840k_hle.cpp | 449 ++++++++++++++++++++++++++++++++ src/devices/bus/a2bus/agat840k_hle.h | 99 +++++++ src/lib/formats/agat840k_hle_dsk.cpp | 59 +++++ src/lib/formats/agat840k_hle_dsk.h | 17 ++ src/mame/drivers/agat.cpp | 340 ++++++++++++++---------- 12 files changed, 869 insertions(+), 164 deletions(-) create mode 100644 src/devices/bus/a2bus/agat840k_hle.cpp create mode 100644 src/devices/bus/a2bus/agat840k_hle.h create mode 100644 src/lib/formats/agat840k_hle_dsk.cpp create mode 100644 src/lib/formats/agat840k_hle_dsk.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 4dbf4fe0ad0..28f07a10d68 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -1787,6 +1787,8 @@ if (BUSES["A2BUS"]~=null) then MAME_DIR .. "src/devices/bus/a2bus/agat7langcard.h", MAME_DIR .. "src/devices/bus/a2bus/agat7ram.cpp", MAME_DIR .. "src/devices/bus/a2bus/agat7ram.h", + MAME_DIR .. "src/devices/bus/a2bus/agat840k_hle.cpp", + MAME_DIR .. "src/devices/bus/a2bus/agat840k_hle.h", MAME_DIR .. "src/devices/bus/a2bus/ssprite.cpp", MAME_DIR .. "src/devices/bus/a2bus/ssprite.h", MAME_DIR .. "src/devices/bus/a2bus/ssbapple.cpp", diff --git a/scripts/src/formats.lua b/scripts/src/formats.lua index 29a22b23ad0..6558ff859d2 100644 --- a/scripts/src/formats.lua +++ b/scripts/src/formats.lua @@ -185,6 +185,18 @@ if (FORMATS["AFS_DSK"]~=null or _OPTIONS["with-tools"]) then } end +-------------------------------------------------- +-- +--@src/lib/formats/agat840k_hle_dsk.h,FORMATS["AGAT840K_HLE_DSK"] = true +-------------------------------------------------- + +if (FORMATS["AGAT840K_HLE_DSK"]~=null or _OPTIONS["with-tools"]) then + files { + MAME_DIR.. "src/lib/formats/agat840k_hle_dsk.cpp", + MAME_DIR.. "src/lib/formats/agat840k_hle_dsk.h", + } +end + -------------------------------------------------- -- --@src/lib/formats/ami_dsk.h,FORMATS["AMI_DSK"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index 65c89bc15ce..ea2ee8ef9ec 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -775,6 +775,7 @@ FORMATS["ACORN_DSK"] = true FORMATS["ADAM_CAS"] = true FORMATS["ADAM_DSK"] = true FORMATS["AFS_DSK"] = true +FORMATS["AGAT840K_HLE_DSK"] = true FORMATS["AMI_DSK"] = true FORMATS["AP2_DSK"] = true FORMATS["APD_DSK"] = true diff --git a/src/devices/bus/a2bus/agat7langcard.cpp b/src/devices/bus/a2bus/agat7langcard.cpp index 9bb00b38c60..b4d2a168f38 100644 --- a/src/devices/bus/a2bus/agat7langcard.cpp +++ b/src/devices/bus/a2bus/agat7langcard.cpp @@ -10,6 +10,9 @@ #include "agat7langcard.h" +//#define VERBOSE 1 +#include "logmacro.h" + /*************************************************************************** PARAMETERS ***************************************************************************/ @@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7LANGCARD, a2bus_agat7langcard_device, "a7lang", "A a2bus_agat7langcard_device::a2bus_agat7langcard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_dxxx_bank(0), m_main_bank(0), m_csr(0) { } @@ -48,13 +51,13 @@ void a2bus_agat7langcard_device::device_start() // set_a2bus_device makes m_slot valid set_a2bus_device(); - memset(m_ram, 0, 32*1024); + memset(m_ram, 0, 32 * 1024); save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_dxxx_bank)); save_item(NAME(m_main_bank)); - save_item(NAME(m_last_offset)); + save_item(NAME(m_csr)); } void a2bus_agat7langcard_device::device_reset() @@ -62,7 +65,7 @@ void a2bus_agat7langcard_device::device_reset() m_inh_state = INH_NONE; m_dxxx_bank = 0; m_main_bank = 0; - m_last_offset = -1; + m_csr = 0; m_mode = 0; } @@ -70,7 +73,7 @@ void a2bus_agat7langcard_device::do_io(int offset) { int old_inh_state = m_inh_state; - m_last_offset = offset; + m_csr = offset & 0x7f; m_inh_state = INH_WRITE; m_dxxx_bank = 0; @@ -91,13 +94,11 @@ void a2bus_agat7langcard_device::do_io(int offset) recalc_slot_inh(); } -#if 1 - logerror("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n", + LOG("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n", offset, (m_inh_state & INH_READ) ? 'R' : 'x', (m_inh_state & INH_WRITE) ? 'W' : 'x', m_dxxx_bank, m_main_bank); -#endif } @@ -107,7 +108,7 @@ void a2bus_agat7langcard_device::do_io(int offset) uint8_t a2bus_agat7langcard_device::read_cnxx(address_space &space, uint8_t offset) { - return m_last_offset < 0 ? 0x80 : (0x80 | m_last_offset); + return (0x80 | m_csr); } diff --git a/src/devices/bus/a2bus/agat7langcard.h b/src/devices/bus/a2bus/agat7langcard.h index 13647abfb11..be3a650a222 100644 --- a/src/devices/bus/a2bus/agat7langcard.h +++ b/src/devices/bus/a2bus/agat7langcard.h @@ -47,11 +47,11 @@ private: void do_io(int offset); int m_inh_state; - int m_last_offset; int m_dxxx_bank; int m_main_bank; - uint8_t m_ram[32*1024]; + uint8_t m_ram[32 * 1024]; uint8_t m_mode; + uint8_t m_csr; }; // device type definition diff --git a/src/devices/bus/a2bus/agat7ram.cpp b/src/devices/bus/a2bus/agat7ram.cpp index dde0260db3f..51bbabb792c 100644 --- a/src/devices/bus/a2bus/agat7ram.cpp +++ b/src/devices/bus/a2bus/agat7ram.cpp @@ -10,6 +10,9 @@ #include "agat7ram.h" +//#define VERBOSE 1 +#include "logmacro.h" + /*************************************************************************** PARAMETERS ***************************************************************************/ @@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7RAM, a2bus_agat7ram_device, "a7ram", "Agat-7 32K R a2bus_agat7ram_device::a2bus_agat7ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_main_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_main_bank(0), m_csr(0) { } @@ -48,32 +51,32 @@ void a2bus_agat7ram_device::device_start() // set_a2bus_device makes m_slot valid set_a2bus_device(); - memset(m_ram, 0, 32*1024); + memset(m_ram, 0, 32 * 1024); save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_main_bank)); - save_item(NAME(m_last_offset)); + save_item(NAME(m_csr)); } void a2bus_agat7ram_device::device_reset() { m_inh_state = INH_NONE; m_main_bank = 0; - m_last_offset = -1; + m_csr = 0; } void a2bus_agat7ram_device::do_io(int offset) { int old_inh_state = m_inh_state; - m_last_offset = offset; + m_csr = offset & 0x7f; m_inh_state = INH_NONE; m_main_bank = 0; if (offset & 0x8) { - m_inh_state = INH_READ|INH_WRITE; + m_inh_state = INH_READ | INH_WRITE; } if (offset & 0x1) @@ -86,13 +89,11 @@ void a2bus_agat7ram_device::do_io(int offset) recalc_slot_inh(); } -#if 1 - logerror("RAM: (ofs %02x) new state %c%c main=%05x\n", + LOG("RAM: (ofs %02x) new state %c%c main=%05x\n", offset, (m_inh_state & INH_READ) ? 'R' : 'x', (m_inh_state & INH_WRITE) ? 'W' : 'x', m_main_bank); -#endif } @@ -102,7 +103,7 @@ void a2bus_agat7ram_device::do_io(int offset) uint8_t a2bus_agat7ram_device::read_cnxx(address_space &space, uint8_t offset) { - return m_last_offset < 0 ? 0 : (m_last_offset & 0x7f); + return m_csr; } @@ -125,12 +126,10 @@ uint8_t a2bus_agat7ram_device::read_inh_rom(address_space &space, uint16_t offse void a2bus_agat7ram_device::write_inh_rom(address_space &space, uint16_t offset, uint8_t data) { // are writes enabled? - if (!(m_inh_state & INH_WRITE)) + if ((m_inh_state & INH_WRITE) && !BIT(m_csr, 4)) { - return; + m_ram[(offset & 0x3fff) + m_main_bank] = data; } - - m_ram[(offset & 0x3fff) + m_main_bank] = data; } int a2bus_agat7ram_device::inh_type() diff --git a/src/devices/bus/a2bus/agat7ram.h b/src/devices/bus/a2bus/agat7ram.h index e30aaf7b94b..3476e738179 100644 --- a/src/devices/bus/a2bus/agat7ram.h +++ b/src/devices/bus/a2bus/agat7ram.h @@ -47,9 +47,9 @@ private: void do_io(int offset); int m_inh_state; - int m_last_offset; int m_main_bank; - uint8_t m_ram[32*1024]; + uint8_t m_ram[32 * 1024]; + uint8_t m_csr; }; // device type definition diff --git a/src/devices/bus/a2bus/agat840k_hle.cpp b/src/devices/bus/a2bus/agat840k_hle.cpp new file mode 100644 index 00000000000..a27d3d95ceb --- /dev/null +++ b/src/devices/bus/a2bus/agat840k_hle.cpp @@ -0,0 +1,449 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************* + + agat840k_hle.cpp + + High-level simulation of the Agat 840K floppy controller card + + http://agatcomp.ru/Reading/docs/es5323.txt + https://github.com/sintech/AGAT/blob/master/docs/agat-840k-format.txt + http://www.torlus.com/floppy/forum/viewtopic.php?f=19&t=1385 + +*********************************************************************/ + +#include "emu.h" +#include "imagedev/flopdrv.h" +#include "formats/agat840k_hle_dsk.h" +#include "agat840k_hle.h" + +//#define VERBOSE 1 +#include "logmacro.h" + + +/*************************************************************************** + PARAMETERS +***************************************************************************/ + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +DEFINE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device, "agat840k_hle", "Agat 840K floppy card") + +#define AGAT840K_ROM_REGION "agat840k_hle_rom" + + +ROM_START( agat840k_hle ) + ROM_REGION(0x100, AGAT840K_ROM_REGION, 0) + // "Zagorsk" variant + ROM_LOAD( "teac.rom", 0x0000, 0x0100, CRC(94266928) SHA1(5d369bad6cdd6a70b0bb16480eba69640de87a2e) ) +ROM_END + +//------------------------------------------------- +// device_add_mconfig - add device configuration +//------------------------------------------------- + +static const floppy_interface agat840k_hle_floppy_interface = +{ + FLOPPY_STANDARD_5_25_DSHD, + LEGACY_FLOPPY_OPTIONS_NAME(agat840k_hle), + "floppy_5_25" +}; + +MACHINE_CONFIG_MEMBER( a2bus_agat840k_hle_device::device_add_mconfig ) + MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) + MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface) + MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_0_w)) + MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) + MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface) + MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_1_w)) + + MCFG_DEVICE_ADD("d14", I8255, 0) + // PA not connected + MCFG_I8255_IN_PORTB_CB(READ8(a2bus_agat840k_hle_device, d14_i_b)) // status signals from drive + MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d14_o_c)) // control + + MCFG_DEVICE_ADD("d15", I8255, 0) + MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data +// MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data + MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c)) + MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c)) +MACHINE_CONFIG_END + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const tiny_rom_entry *a2bus_agat840k_hle_device::device_rom_region() const +{ + return ROM_NAME(agat840k_hle); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_a2bus_card_interface(mconfig, *this) + , m_d14(*this, "d14") + , m_d15(*this, "d15") + , m_rom(nullptr) +{ +} + +a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + a2bus_agat840k_hle_device(mconfig, A2BUS_AGAT840K_HLE, tag, owner, clock) +{ +} + +WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_0_w) +{ + index_callback(0, state); +} + +WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_1_w) +{ + index_callback(1, state); +} + +void a2bus_agat840k_hle_device::index_callback(int unit, int state) +{ + if (unit != m_unit) return; + + LOG("index: unit %d state %d (%s)\n", unit, state, m_seen_magic ? "MAGIC" : "magic"); + +#if 0 + if (!state && !m_seen_magic) + { + m_seen_magic = true; + m_count_read = 0; + m_count_write = 0; + m_d15->pc4_w(0); // latch data into port A + m_d15->pc4_w(1); + m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime)); + } +#endif +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void a2bus_agat840k_hle_device::device_start() +{ + // set_a2bus_device makes m_slot valid + set_a2bus_device(); + + m_rom = device().machine().root_device().memregion(this->subtag(AGAT840K_ROM_REGION).c_str())->base(); + + m_mxcs = MXCSR_SYNC; + + m_timer_wait = timer_alloc(TIMER_ID_WAIT); + m_timer_seek = timer_alloc(TIMER_ID_SEEK); + + m_seektime = 6000; // 6 ms, per es5323.txt + m_waittime = 32; // 16 bits x 2 us +} + +void a2bus_agat840k_hle_device::device_reset() +{ + u8 buf[256]; + + for (int i = 0; i < 2; i++) + { + legacy_floppy_image_device *img = floppy_image(i); + if (img) + { + img->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 0); + img->floppy_drive_set_rpm(300.); + img->floppy_drive_seek(-img->floppy_drive_get_current_track()); + } + } + m_floppy = floppy_image(0); + + // generate track images in memory, using default volume ID and gap padding bytes + int t = 0; + for (auto &elem : m_tracks) + { + elem = std::make_unique(6250); + + for (int i = 0; i < 13; i++) + { + elem[i] = 0xaa; + } + for (int j = 0; j < 21; j++) + { + int k, cksum = 0, s = (j * 1) % 21; + + m_floppy->floppy_drive_read_sector_data(t & 1, s, buf, 256); + +#define BAUX 22 +#define BLOB (256 + 19 + BAUX) + + for (k = 0; k < 256; k++) + { + if (cksum > 255) { cksum++; cksum &= 255; } + cksum += buf[k]; + elem[13 + (BLOB * j) + 17 + k] = buf[k]; + } + cksum &= 255; + + elem[13 + (BLOB * j) + 0] = 0xa4; + elem[13 + (BLOB * j) + 1] = 0x80ff; // desync + elem[13 + (BLOB * j) + 2] = 0x95; + elem[13 + (BLOB * j) + 3] = 0x6a; + elem[13 + (BLOB * j) + 4] = 0x40fe; // volume id + elem[13 + (BLOB * j) + 5] = t; + elem[13 + (BLOB * j) + 6] = s; + elem[13 + (BLOB * j) + 7] = 0x5a; + elem[13 + (BLOB * j) + 8] = 0xaa; + elem[13 + (BLOB * j) + 9] = 0xaa; + elem[13 + (BLOB * j) + 10] = 0xaa; + elem[13 + (BLOB * j) + 11] = 0xaa; + elem[13 + (BLOB * j) + 12] = 0xaa; + elem[13 + (BLOB * j) + 13] = 0xa4; + elem[13 + (BLOB * j) + 14] = 0x80ff; // desync + elem[13 + (BLOB * j) + 15] = 0x6a; + elem[13 + (BLOB * j) + 16] = 0x95; + elem[13 + (BLOB * j) + 17 + 256] = cksum + 0x2000; + elem[13 + (BLOB * j) + 17 + 257] = 0x5a; + + // gap3 + for (k = 0; k < BAUX; k++) + { + elem[13 + (BLOB * j) + 17 + 258 + k] = 0xaa; + } + } +#undef BAUX +#undef BLOB + + t++; + if ((t & 1) == 0) + { + m_floppy->floppy_drive_seek(1); + } + } + m_floppy->floppy_drive_seek(-m_floppy->floppy_drive_get_current_track()); + + m_mxcs |= MXCSR_SYNC; + m_mxcs &= ~MXCSR_TR; +} + +void a2bus_agat840k_hle_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_ID_WAIT: + { + m_count_read++; + m_count_read %= 6250; + m_d15->pc4_w(0); + m_d15->pc4_w(1); + if (BIT(m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read], 15)) + m_mxcs &= ~MXCSR_SYNC; + } + break; + + case TIMER_ID_SEEK: + m_floppy->floppy_stp_w(1); + m_floppy->floppy_stp_w(0); + break; + } +} + + +/*------------------------------------------------- + read_c0nx - called for reads from this card's c0nx space +-------------------------------------------------*/ + +uint8_t a2bus_agat840k_hle_device::read_c0nx(address_space &space, uint8_t offset) +{ + u8 data; + + switch (offset) + { + case 0: case 1: case 2: case 3: + data = m_d14->read(space, offset); + break; + + case 4: case 5: case 6: case 7: + data = m_d15->read(space, offset - 4); + break; + + default: + data = 0xff; + break; + } + + return data; +} + + +/*------------------------------------------------- + write_c0nx - called for writes to this card's c0nx space +-------------------------------------------------*/ + +void a2bus_agat840k_hle_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data) +{ + switch (offset) + { + case 0: case 1: case 2: case 3: + m_d14->write(space, offset, data); + break; + + case 4: case 5: case 6: case 7: + m_d15->write(space, offset - 4, data); + break; + + case 8: // write desync + break; + + case 9: // step + LOG("step at %11.6f\n", machine().time().as_double()); + m_seen_magic = false; + m_timer_wait->adjust(attotime::from_usec(m_seektime), 0, attotime::from_usec(m_waittime)); + m_floppy->floppy_stp_w(1); + m_floppy->floppy_stp_w(0); + break; + + case 10: // reset desync flipflop + m_mxcs |= MXCSR_SYNC; + break; + + default: + break; + } +} + +/*------------------------------------------------- + read_cnxx - called for reads from this card's c0nx space +-------------------------------------------------*/ + +uint8_t a2bus_agat840k_hle_device::read_cnxx(address_space &space, uint8_t offset) +{ + return m_rom[offset]; +} + +legacy_floppy_image_device *a2bus_agat840k_hle_device::floppy_image(int drive) +{ + const char *floppy_name = nullptr; + + switch (drive) + { + case 0: + floppy_name = FLOPPY_0; + break; + case 1: + floppy_name = FLOPPY_1; + break; + } + return subdevice(floppy_name); +} + +// all signals active low. write support not implemented; WPT is always active. +READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b) +{ + u8 data = 0x03; // one drive present, because drive select is broken + + m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1); + + data |= (m_floppy->floppy_index_r() << 4) ^ 0x10; +// data |= m_floppy->floppy_wpt_r() << 5; + data |= m_floppy->floppy_tk00_r() << 6; + data |= m_floppy->floppy_ready_r() << 7; + + LOG("status A: %s %s (t %d) %s %s\n", BIT(data, 7) ? "ready" : "READY", BIT(data, 6) ? "tk00" : "TK00", + m_floppy->floppy_drive_get_current_track(), + BIT(data, 5) ? "wpt" : "WPT", BIT(data, 4) ? "index" : "INDEX"); + + return data; +} + +/* + * b0 AH strong write precomp + * b1 -- NC + * b2 -- step direction (1 - inward, 0 - outward) + * b3 -- drive select (0 - drive 1, 1 - drive 2) + * b4 -- head select (0 - bottom, 1 - top) + * b5 AH write precomp off + * b6 AH write enable + * b7 AH motor on + * + * C0x2 + */ +WRITE8_MEMBER(a2bus_agat840k_hle_device::d14_o_c) +{ + // drive select is broken in legacy flopdrv.cpp -- floppy_get_drive + m_unit = BIT(data, 3); + m_floppy = floppy_image(m_unit); + if (m_unit) + m_floppy->floppy_ds1_w(m_unit != 1); + else + m_floppy->floppy_ds0_w(m_unit != 0); + + m_floppy->floppy_drtn_w(!BIT(data, 2)); + m_side = BIT(data, 4); + m_floppy->floppy_wtg_w(!BIT(data, 6)); + m_floppy->floppy_mon_w(!BIT(data, 7)); // tied to 'drive select', 'motor on' and 'head load' + + if (!BIT(data, 7)) + { + m_seen_magic = false; + m_timer_wait->adjust(attotime::never); + } + else + { + m_d15->pc4_w(0); + m_d15->pc4_w(1); + m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime)); + } + + LOG("D14 C <- %02X (unit %d side %d drtn %d wtg %d mon %d)\n", + data, m_unit, m_side, !BIT(data, 2), !BIT(data, 6), !BIT(data, 7)); +} + +// data are latched in by write to PC4 +READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a) +{ + u16 data = 0; + + data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read]; + LOG("sector data: %02x @ %4d (head %d track %2d)%s\n", data & 0xff, m_count_read, + m_side, m_floppy->floppy_drive_get_current_track(), + BIT(data, 14) ? " volume" : (BIT(data, 13) ? " cksum" : "")); + + return data & 0xff; +} + +// C0x6 +// +// b6 AL desync detected +// b7 AH read or write data ready +READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c) +{ + LOG("status B: @ %4d %s %s (%s)\n", m_count_read, + BIT(m_mxcs, 7) ? "ready" : "READY", BIT(m_mxcs, 6) ? "SYNC" : "sync", + m_seen_magic ? "MAGIC" : "magic"); + + return m_mxcs; +} + +// C0x7 +// +// b0 -- connected to b7, set if m_intr[PORT_B] +// b2 AH b7 = ready for write data +// b3 -- connected to b7, set if m_intr[PORT_A] +// b4 AH b7 = read data ready +WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c) +{ + if (BIT(data, 0) || BIT(data, 3)) + { + m_mxcs |= MXCSR_TR; + } + else + { + m_mxcs &= ~MXCSR_TR; + } +} diff --git a/src/devices/bus/a2bus/agat840k_hle.h b/src/devices/bus/a2bus/agat840k_hle.h new file mode 100644 index 00000000000..42a1f2cc8c4 --- /dev/null +++ b/src/devices/bus/a2bus/agat840k_hle.h @@ -0,0 +1,99 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************* + + agat840k_hle.h + + High-level simulation of the Agat 840K floppy controller card + +*********************************************************************/ + +#ifndef MAME_BUS_A2BUS_AGAT840K_HLE_H +#define MAME_BUS_A2BUS_AGAT840K_HLE_H + +#pragma once + +#include "a2bus.h" +#include "machine/i8255.h" + + +#define MXCSR_SYNC 0x40 +#define MXCSR_TR 0x80 + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class a2bus_agat840k_hle_device: + public device_t, + public device_a2bus_card_interface +{ +public: + // construction/destruction + a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + DECLARE_READ8_MEMBER(d14_i_b); + DECLARE_READ8_MEMBER(d15_i_a); + DECLARE_READ8_MEMBER(d15_i_c); + DECLARE_WRITE8_MEMBER(d14_o_c); + DECLARE_WRITE8_MEMBER(d15_o_b); + DECLARE_WRITE8_MEMBER(d15_o_c); + + DECLARE_WRITE_LINE_MEMBER(index_0_w); + DECLARE_WRITE_LINE_MEMBER(index_1_w); + + void index_callback(int unit, int state); + +protected: + // construction/destruction + a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + + // overrides of standard a2bus slot functions + virtual uint8_t read_c0nx(address_space &space, uint8_t offset) override; + virtual void write_c0nx(address_space &space, uint8_t offset, uint8_t data) override; + virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override; + + enum + { + TIMER_ID_WAIT = 0, + TIMER_ID_SEEK + }; + + required_device m_d14; + required_device m_d15; + +private: + legacy_floppy_image_device *floppy_image(int drive); + legacy_floppy_image_device *m_floppy; + bool m_side; + + std::unique_ptr m_tracks[160]; + int m_count_read; + int m_count_write; + bool m_seen_magic; + int m_current_track; + + u8 m_mxcs; + int m_unit; + int m_state; + + int m_seektime; + int m_waittime; + + emu_timer *m_timer_wait = nullptr; + emu_timer *m_timer_seek = nullptr; + + uint8_t *m_rom; +}; + +// device type definition +DECLARE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device) + +#endif // MAME_BUS_A2BUS_AGAT840K_HLE_H diff --git a/src/lib/formats/agat840k_hle_dsk.cpp b/src/lib/formats/agat840k_hle_dsk.cpp new file mode 100644 index 00000000000..52cdd4668be --- /dev/null +++ b/src/lib/formats/agat840k_hle_dsk.cpp @@ -0,0 +1,59 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************** + + formats/agat840k_hle_dsk.cpp + + Agat 840KB floppies -- high level simulation (sector-level images) + + http://agatcomp.ru/Reading/docs/es5323.txt + https://github.com/sintech/AGAT/blob/master/docs/agat-840k-format.txt + http://www.torlus.com/floppy/forum/viewtopic.php?f=19&t=1385 + +************************************************************************/ + +#include + +#include "formats/agat840k_hle_dsk.h" + + +static FLOPPY_IDENTIFY(agat840k_hle_dsk_identify) +{ + switch (floppy_image_size(floppy)) + { + case 860160: + *vote = 100; + break; + + case 860164: + case 860288: + *vote = 99; + break; + + default: + *vote = 0; + break; + } + + return FLOPPY_ERROR_SUCCESS; +} + +static FLOPPY_CONSTRUCT(agat840k_hle_dsk_construct) +{ + struct basicdsk_geometry geometry; + + memset(&geometry, 0, sizeof(geometry)); + geometry.heads = 2; + geometry.first_sector_id = 0; + geometry.sector_length = 256; + geometry.tracks = 80; + geometry.sectors = 21; + + return basicdsk_construct(floppy, &geometry); +} + +LEGACY_FLOPPY_OPTIONS_START(agat840k_hle) + LEGACY_FLOPPY_OPTION(agat840k_hle_dsk, "ds9,dsk,raw", "Agat 840K DSK image", + agat840k_hle_dsk_identify, agat840k_hle_dsk_construct, nullptr, nullptr) +LEGACY_FLOPPY_OPTIONS_END + diff --git a/src/lib/formats/agat840k_hle_dsk.h b/src/lib/formats/agat840k_hle_dsk.h new file mode 100644 index 00000000000..dad245e3335 --- /dev/null +++ b/src/lib/formats/agat840k_hle_dsk.h @@ -0,0 +1,17 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/********************************************************************* + + formats/agat840k_hle_dsk.h + +*********************************************************************/ + +#ifndef AGAT840K_HLE_DSK_H_ +#define AGAT840K_HLE_DSK_H_ + +#include "flopimg.h" +#include "formats/basicdsk.h" + +LEGACY_FLOPPY_OPTIONS_EXTERN(agat840k_hle); + +#endif /* AGAT840K_HLE_DSK_H_ */ diff --git a/src/mame/drivers/agat.cpp b/src/mame/drivers/agat.cpp index 62f111e7255..9299a474805 100644 --- a/src/mame/drivers/agat.cpp +++ b/src/mame/drivers/agat.cpp @@ -2,18 +2,51 @@ // copyright-holders:R. Belmont, Sergey Svishchev /*************************************************************************** - agat.c - Skeleton driver for Agat series of Soviet Apple II non-clones - - These are similar to Apple II (same bus architecture, keyboard and - floppy interface), but video controller is completely different. - - To do: - - native keyboards (at least two variants) - - 840K floppy controller (MFM encoding, but track layout is unique) - - agat7: 64K and 128K onboard memory configurations - - agat9 - - 3rd party slot devices + agat.cpp + + Driver for Agat series of Soviet Apple II non-clones + + These are similar to Apple II (same bus architecture, keyboard + and floppy interface), but native video controllers are different. + + agat7 supports Apple (40col, HGR and DHR) video modes with add-on + card; agat9 has built-in support for 40col and HGR. Palette in + Apple modes is different and pixel stretching is not done. + + To do (common): + - native keyboard (at least two variants) + - video: text modes use 7x8 character cell and 224x256 raster + - video: vertical raster splits (used at least by Rapira) + - what is the state of devices at init and reset? + - what do floating bus reads do? + - ignore debugger reads -- use side_effect_disabled() + - softlists + + To do (agat7): + - hw variant: 16 colors + - hw variant: 256-char chargen + - hw variant: 64K and 128K onboard memory + - "500hz" interrupt breakage + - what does write to C009 do? (basedos7.nib) + + To do (agat9): + - memory banking: what does write to C18x..C1Fx do? + - memory expansion boards + - apple2 video compat mode incl. language card emulation + - 840K floppy controller: low level emulation, AIM format support + - mouse via parallel port + - hw revisions and agat9a model (via http://agatcomp.ru/Images/case.shtml) + + Slot devices -- 1st party: + - agat7: apple2 video card (decimal 3.089.121) -- http://agatcomp.ru/Images/new_j121.shtml + - agat7: serial-parallel card (decimal 3.089.10)6 + - agat9: printer card (decimal 3.089.17)4 + + Slot devices -- 3rd party: + - Nippel Clock (uses mc146818) + - Nippel mouse -- http://agatcomp.ru/Images/new_mouse.shtml + - Sprite Card-93 (uses fd1793) + - others ************************************************************************/ @@ -27,6 +60,7 @@ #include "bus/a2bus/a2diskii.h" #include "bus/a2bus/agat7langcard.h" #include "bus/a2bus/agat7ram.h" +#include "bus/a2bus/agat840k_hle.h" #include "screen.h" #include "softlist.h" @@ -78,14 +112,12 @@ public: required_device m_upperbank; TIMER_DEVICE_CALLBACK_MEMBER(ay3600_repeat); - TIMER_DEVICE_CALLBACK_MEMBER(agat_timer); - TIMER_DEVICE_CALLBACK_MEMBER(agat_vblank); + TIMER_DEVICE_CALLBACK_MEMBER(timer_irq); + INTERRUPT_GEN_MEMBER(agat_vblank); virtual void machine_start() override; virtual void machine_reset() override; - DECLARE_READ8_MEMBER(c000_r); - DECLARE_WRITE8_MEMBER(c000_w); DECLARE_READ8_MEMBER(c080_r); DECLARE_WRITE8_MEMBER(c080_w); DECLARE_READ8_MEMBER(c100_r); @@ -106,6 +138,20 @@ public: DECLARE_WRITE8_MEMBER(agat7_membank_w); DECLARE_READ8_MEMBER(agat7_ram_r); DECLARE_WRITE8_MEMBER(agat7_ram_w); + DECLARE_READ8_MEMBER(keyb_data_r); + DECLARE_READ8_MEMBER(keyb_strobe_r); + DECLARE_WRITE8_MEMBER(keyb_strobe_w); + DECLARE_READ8_MEMBER(cassette_toggle_r); + DECLARE_WRITE8_MEMBER(cassette_toggle_w); + DECLARE_READ8_MEMBER(speaker_toggle_r); + DECLARE_WRITE8_MEMBER(speaker_toggle_w); + DECLARE_READ8_MEMBER(interrupts_on_r); + DECLARE_WRITE8_MEMBER(interrupts_on_w); + DECLARE_READ8_MEMBER(interrupts_off_r); + DECLARE_WRITE8_MEMBER(interrupts_off_w); + DECLARE_READ8_MEMBER(flags_r); + DECLARE_READ8_MEMBER(controller_strobe_r); + DECLARE_WRITE8_MEMBER(controller_strobe_w); private: int m_speaker_state; @@ -291,120 +337,123 @@ void agat7_state::machine_reset() /*************************************************************************** I/O ***************************************************************************/ -// most softswitches don't care about read vs write, so handle them here -void agat7_state::do_io(address_space &space, int offset) + +READ8_MEMBER(agat7_state::keyb_data_r) { - if (machine().side_effect_disabled()) - { - return; - } + return m_strobe ? (m_transchar | m_strobe) : 0; +} - switch (offset & 0xf0) - { - case 0x20: - m_cassette_state ^= 1; - m_cassette->output(m_cassette_state ? 1.0f : -1.0f); - break; +READ8_MEMBER(agat7_state::keyb_strobe_r) +{ + // reads any key down, clears strobe + uint8_t rv = m_transchar | (m_anykeydown ? 0x80 : 0x00); + if (!machine().side_effect_disabled()) + m_strobe = 0; + return rv; +} - case 0x30: - m_speaker_state ^= 1; - m_speaker->level_w(m_speaker_state); - break; +WRITE8_MEMBER(agat7_state::keyb_strobe_w) +{ + // clear keyboard latch + m_strobe = 0; +} - // XXX agat7: 0x4N -- enable timer interrupts, 0x5N -- disable (or vice versa depending on hw rev) - case 0x40: - m_agat7_interrupts = true; - break; +READ8_MEMBER(agat7_state::cassette_toggle_r) +{ + if (!machine().side_effect_disabled()) + cassette_toggle_w(space, offset, 0); + return read_floatingbus(); +} - case 0x50: - m_agat7_interrupts = false; +WRITE8_MEMBER(agat7_state::cassette_toggle_w) +{ + m_cassette_state ^= 1; + m_cassette->output(m_cassette_state ? 1.0f : -1.0f); +} - case 0x70: - m_joystick_x1_time = machine().time().as_double() + m_x_calibration * m_joy1x->read(); - m_joystick_y1_time = machine().time().as_double() + m_y_calibration * m_joy1y->read(); - m_joystick_x2_time = machine().time().as_double() + m_x_calibration * m_joy2x->read(); - m_joystick_y2_time = machine().time().as_double() + m_y_calibration * m_joy2y->read(); - break; - } +READ8_MEMBER(agat7_state::speaker_toggle_r) +{ + if (!machine().side_effect_disabled()) + speaker_toggle_w(space, offset, 0); + return read_floatingbus(); } -READ8_MEMBER(agat7_state::c000_r) +WRITE8_MEMBER(agat7_state::speaker_toggle_w) { - if (offset) - logerror("%s: c000_r %04X == %02X\n", machine().describe_context(), offset+0xc000, 0); - else if (m_strobe) - logerror("%s: c000_r %04X == %02X\n", machine().describe_context(), offset+0xc000, m_transchar | m_strobe); + m_speaker_state ^= 1; + m_speaker->level_w(m_speaker_state); +} - switch (offset) - { - // keyboard latch. NB: agat7 returns 0 if latch is clear, agat9 returns char code. - case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: - case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: - return m_strobe ? (m_transchar | m_strobe) : 0; +READ8_MEMBER(agat7_state::interrupts_on_r) +{ + if (!machine().side_effect_disabled()) + interrupts_on_w(space, offset, 0); + return read_floatingbus(); +} - case 0x10: // reads any key down, clears strobe - { - uint8_t rv = m_transchar | (m_anykeydown ? 0x80 : 0x00); - m_strobe = 0; - return rv; - } +WRITE8_MEMBER(agat7_state::interrupts_on_w) +{ + m_agat7_interrupts = true; +} - case 0x60: // cassette in - case 0x68: - return m_cassette->input() > 0.0 ? 0x80 : 0; +READ8_MEMBER(agat7_state::interrupts_off_r) +{ + if (!machine().side_effect_disabled()) + interrupts_off_w(space, offset, 0); + return read_floatingbus(); +} - case 0x61: // button 0 - case 0x69: - return (m_joybuttons->read() & 0x10) ? 0x80 : 0; +WRITE8_MEMBER(agat7_state::interrupts_off_w) +{ + m_agat7_interrupts = false; +} + +READ8_MEMBER(agat7_state::flags_r) +{ + switch (offset) + { + case 0: // cassette in + return m_cassette->input() > 0.0 ? 0x80 : 0; - case 0x62: // button 1 - case 0x6a: - return (m_joybuttons->read() & 0x20) ? 0x80 : 0; + case 1: // button 0 + return (m_joybuttons->read() & 0x10) ? 0x80 : 0; - case 0x63: // button 2 - case 0x6b: - return ((m_joybuttons->read() & 0x40) || (m_kbspecial->read() & 0x06)) ? 0 : 0x80; + case 2: // button 1 + return (m_joybuttons->read() & 0x20) ? 0x80 : 0; - case 0x64: // joy 1 X axis - case 0x6c: - return (space.machine().time().as_double() < m_joystick_x1_time) ? 0x80 : 0; + case 3: // button 2 + return ((m_joybuttons->read() & 0x40) || !(m_kbspecial->read() & 0x06)) ? 0x80 : 0; - case 0x65: // joy 1 Y axis - case 0x6d: - return (space.machine().time().as_double() < m_joystick_y1_time) ? 0x80 : 0; + case 4: // joy 1 X axis + return (space.machine().time().as_double() < m_joystick_x1_time) ? 0x80 : 0; - case 0x66: // joy 2 X axis - case 0x6e: - return (space.machine().time().as_double() < m_joystick_x2_time) ? 0x80 : 0; + case 5: // joy 1 Y axis + return (space.machine().time().as_double() < m_joystick_y1_time) ? 0x80 : 0; - case 0x67: // joy 2 Y axis - case 0x6f: - return (space.machine().time().as_double() < m_joystick_y2_time) ? 0x80 : 0; + case 6: // joy 2 X axis + return (space.machine().time().as_double() < m_joystick_x2_time) ? 0x80 : 0; - default: - do_io(space, offset); - break; + case 7: // joy 2 Y axis + return (space.machine().time().as_double() < m_joystick_y2_time) ? 0x80 : 0; } - return read_floatingbus(); + // this is never reached + return 0; } -WRITE8_MEMBER(agat7_state::c000_w) +READ8_MEMBER(agat7_state::controller_strobe_r) { - logerror("%s: c000_w %04X <- %02X\n", machine().describe_context(), offset + 0xc000, data); - - switch (offset) - { - // clear keyboard latch - case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: - case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: - m_strobe = 0; - break; + if (!machine().side_effect_disabled()) + controller_strobe_w(space, offset, 0); + return read_floatingbus(); +} - default: - do_io(space, offset); - break; - } +WRITE8_MEMBER(agat7_state::controller_strobe_w) +{ + m_joystick_x1_time = machine().time().as_double() + m_x_calibration * m_joy1x->read(); + m_joystick_y1_time = machine().time().as_double() + m_y_calibration * m_joy1y->read(); + m_joystick_x2_time = machine().time().as_double() + m_x_calibration * m_joy2x->read(); + m_joystick_y2_time = machine().time().as_double() + m_y_calibration * m_joy2y->read(); } READ8_MEMBER(agat7_state::c080_r) @@ -479,7 +528,7 @@ WRITE8_MEMBER(agat7_state::c100_w) m_cnxx_slot = slotnum; } - m_slotdevice[slotnum]->write_cnxx(space, offset&0xff, data); + m_slotdevice[slotnum]->write_cnxx(space, offset & 0xff, data); } } @@ -633,7 +682,14 @@ WRITE8_MEMBER(agat7_state::agat7_ram_w) static ADDRESS_MAP_START( agat7_map, AS_PROGRAM, 8, agat7_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0xbfff) AM_READWRITE(agat7_ram_r, agat7_ram_w) - AM_RANGE(0xc000, 0xc07f) AM_READWRITE(c000_r, c000_w) + AM_RANGE(0xc000, 0xc000) AM_MIRROR(0xf) AM_READ(keyb_data_r) AM_WRITENOP + AM_RANGE(0xc010, 0xc010) AM_MIRROR(0xf) AM_READWRITE(keyb_strobe_r, keyb_strobe_w) + AM_RANGE(0xc020, 0xc020) AM_MIRROR(0xf) AM_READWRITE(cassette_toggle_r, cassette_toggle_w) + AM_RANGE(0xc030, 0xc030) AM_MIRROR(0xf) AM_READWRITE(speaker_toggle_r, speaker_toggle_w) + AM_RANGE(0xc040, 0xc040) AM_MIRROR(0xf) AM_READWRITE(interrupts_on_r, interrupts_on_w) + AM_RANGE(0xc050, 0xc050) AM_MIRROR(0xf) AM_READWRITE(interrupts_off_r, interrupts_off_w) + AM_RANGE(0xc060, 0xc067) AM_MIRROR(0x8) AM_READ(flags_r) AM_WRITENOP + AM_RANGE(0xc070, 0xc070) AM_MIRROR(0xf) AM_READWRITE(controller_strobe_r, controller_strobe_w) AM_RANGE(0xc080, 0xc0ef) AM_READWRITE(c080_r, c080_w) AM_RANGE(0xc0f0, 0xc0ff) AM_READWRITE(agat7_membank_r, agat7_membank_w) AM_RANGE(0xc100, 0xc6ff) AM_READWRITE(c100_r, c100_w) @@ -725,20 +781,20 @@ static const uint8_t a2_key_remap[0x40][4] = { 0x1a,0x1a,0x1a,0x1a }, /* Down */ { 0x10,0x10,0x10,0x10 }, /* KP1 */ { 0x0d,0x0d,0x0d,0x0d }, /* Enter 31 */ - { 0x11,0x11,0x11,0x11 }, - { 0x12,0x12,0x12,0x12 }, - { 0x13,0x13,0x13,0x13 }, - { 0x14,0x14,0x14,0x14 }, - { 0x1c,0x1c,0x1c,0x1c }, - { 0x1d,0x1d,0x1d,0x1d }, - { 0x1e,0x1e,0x1e,0x1e }, - { 0x1f,0x1f,0x1f,0x1f }, - { 0x01,0x01,0x01,0x01 }, - { 0x02,0x02,0x02,0x02 }, - { 0x03,0x03,0x03,0x03 }, - { 0x04,0x04,0x04,0x04 }, - { 0x05,0x05,0x05,0x05 }, - { 0x06,0x06,0x06,0x06 }, + { 0x11,0x11,0x11,0x11 }, /* KP2 */ + { 0x12,0x12,0x12,0x12 }, /* KP3 */ + { 0x13,0x13,0x13,0x13 }, /* KP4 */ + { 0x14,0x14,0x14,0x14 }, /* KP5 */ + { 0x1c,0x1c,0x1c,0x1c }, /* KP6 */ + { 0x1d,0x1d,0x1d,0x1d }, /* KP7 */ + { 0x1e,0x1e,0x1e,0x1e }, /* KP8 */ + { 0x1f,0x1f,0x1f,0x1f }, /* KP9 */ + { 0x01,0x01,0x01,0x01 }, /* KP0 */ + { 0x02,0x02,0x02,0x02 }, /* KP. */ + { 0x03,0x03,0x03,0x03 }, /* KP= */ + { 0x04,0x04,0x04,0x04 }, /* PF1 */ + { 0x05,0x05,0x05,0x05 }, /* PF2 */ + { 0x06,0x06,0x06,0x06 }, /* PF3 */ }; WRITE_LINE_MEMBER(agat7_state::ay3600_data_ready_w) @@ -777,19 +833,28 @@ TIMER_DEVICE_CALLBACK_MEMBER(agat7_state::ay3600_repeat) } } -TIMER_DEVICE_CALLBACK_MEMBER(agat7_state::agat_timer) +INTERRUPT_GEN_MEMBER(agat7_state::agat_vblank) { if (m_agat7_interrupts) { - m_maincpu->set_input_line(M6502_IRQ_LINE, ASSERT_LINE); + m_maincpu->set_input_line(M6502_NMI_LINE, PULSE_LINE); } } -TIMER_DEVICE_CALLBACK_MEMBER(agat7_state::agat_vblank) +TIMER_DEVICE_CALLBACK_MEMBER(agat7_state::timer_irq) { if (m_agat7_interrupts) { - m_maincpu->set_input_line(M6502_NMI_LINE, ASSERT_LINE); + switch (param & 0x3f) + { + case 0: + m_maincpu->set_input_line(M6502_IRQ_LINE, CLEAR_LINE); + break; + + case 0x20: + m_maincpu->set_input_line(M6502_IRQ_LINE, ASSERT_LINE); + break; + } } } @@ -833,8 +898,8 @@ static INPUT_PORTS_START( agat7_joystick ) PORT_CODE_DEC(JOYCODE_Y_UP_SWITCH) PORT_CODE_INC(JOYCODE_Y_DOWN_SWITCH) PORT_START("joystick_buttons") - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(1) PORT_CODE(KEYCODE_0_PAD) PORT_CODE(JOYCODE_BUTTON1) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_PLAYER(1) PORT_CODE(KEYCODE_ENTER_PAD)PORT_CODE(JOYCODE_BUTTON2) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(1) PORT_CODE(KEYCODE_0_PAD) PORT_CODE(JOYCODE_BUTTON1) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_PLAYER(1) PORT_CODE(KEYCODE_ENTER_PAD)PORT_CODE(JOYCODE_BUTTON2) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(2) PORT_CODE(JOYCODE_BUTTON1) INPUT_PORTS_END @@ -879,7 +944,7 @@ static INPUT_PORTS_START( agat7_common ) PORT_BIT(0x040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('U') PORT_CHAR('u') PORT_BIT(0x080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('I') PORT_CHAR('i') PORT_BIT(0x100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('O') PORT_CHAR('o') - PORT_BIT(0x200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('@') + PORT_BIT(0x200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('p') PORT_START("X2") PORT_BIT(0x001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_CHAR('d') @@ -890,8 +955,8 @@ static INPUT_PORTS_START( agat7_common ) PORT_BIT(0x020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_CHAR('k') PORT_BIT(0x040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('L') PORT_CHAR('l') PORT_BIT(0x080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') - PORT_BIT(0x100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) - PORT_BIT(0x200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) + PORT_BIT(0x100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) + PORT_BIT(0x200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_START("X3") PORT_BIT(0x001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_CHAR('z') @@ -912,8 +977,8 @@ static INPUT_PORTS_START( agat7_common ) PORT_BIT(0x008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(27) PORT_BIT(0x010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_CHAR('a') PORT_BIT(0x020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') - PORT_BIT(0x040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) - PORT_BIT(0x080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) + PORT_BIT(0x040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) + PORT_BIT(0x080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_BIT(0x100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Num 1") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_BIT(0x200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) @@ -932,8 +997,8 @@ static INPUT_PORTS_START( agat7_common ) PORT_START("X6") PORT_BIT(0x001, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num =") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_BIT(0x002, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF1") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) - PORT_BIT(0x004, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF2") PORT_CODE(KEYCODE_ASTERISK) - PORT_BIT(0x008, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF3") PORT_CODE(KEYCODE_MINUS_PAD) + PORT_BIT(0x004, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF2") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) + PORT_BIT(0x008, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF3") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_BIT(0x010, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT(0x020, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT(0x040, IP_ACTIVE_HIGH, IPT_UNUSED) @@ -972,7 +1037,7 @@ static INPUT_PORTS_START( agat7_common ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Control") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RESET") PORT_CODE(KEYCODE_F12) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RESET") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12)) INPUT_PORTS_END static INPUT_PORTS_START(agat7) @@ -991,7 +1056,7 @@ static SLOT_INTERFACE_START(agat7_cards) SLOT_INTERFACE("a7lang", A2BUS_AGAT7LANGCARD) // Agat-7 RAM Language Card -- decimal 3.089.119 SLOT_INTERFACE("a7ram", A2BUS_AGAT7RAM) // Agat-7 32K RAM Card -- decimal 3.089.119-01, KR565RU6D chips SLOT_INTERFACE("a7fdc", A2BUS_AGAT7_FDC) // Disk II clone -- decimal 3.089.105 - // 840K floppy controller -- decimal 7.104.351 + SLOT_INTERFACE("a7fdc840", A2BUS_AGAT840K_HLE) // 840K floppy controller -- decimal 7.104.351 or 3.089.023? // Serial-parallel card -- decimal 3.089.106 // Printer card (agat9) -- decimal 3.089.174 @@ -1007,8 +1072,9 @@ SLOT_INTERFACE_END static MACHINE_CONFIG_START( agat7 ) MCFG_CPU_ADD("maincpu", M6502, XTAL_14_3MHz / 14) MCFG_CPU_PROGRAM_MAP(agat7_map) + MCFG_CPU_VBLANK_INT_DRIVER(A7_VIDEO_TAG ":a7screen", agat7_state, agat_vblank) - MCFG_TIMER_DRIVER_ADD_PERIODIC("agat7irq", agat7_state, agat_timer, attotime::from_hz(500)) + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", agat7_state, timer_irq, A7_VIDEO_TAG ":a7screen", 0, 1) MCFG_DEVICE_ADD(A7_VIDEO_TAG, AGAT7VIDEO, 0) @@ -1111,5 +1177,5 @@ ROM_START( agat9 ) ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS -COMP( 1983, agat7, apple2, 0, agat7, agat7, agat7_state, 0, "Agat", "Agat-7", MACHINE_NOT_WORKING) +COMP( 1983, agat7, apple2, 0, agat7, agat7, agat7_state, 0, "Agat", "Agat-7", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_CONTROLS) COMP( 1984, agat9, apple2, 0, agat7, agat7, agat7_state, 0, "Agat", "Agat-9", MACHINE_NOT_WORKING) -- cgit v1.2.3-70-g09d2 From 3175dca4f4e78b827dbe3a252944d708d0a15583 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sat, 9 Dec 2017 17:33:38 +1100 Subject: cleanup: (nw) * fix header #including itself * prefer things that can be scoped over #define * get some local constants out of global scope * tighten up scope and constness of a few locals --- src/devices/bus/a2bus/agat840k_hle.cpp | 24 ++++++++++++------------ src/devices/bus/a2bus/agat840k_hle.h | 14 +++++++++----- src/devices/video/dp8510.h | 1 - 3 files changed, 21 insertions(+), 18 deletions(-) diff --git a/src/devices/bus/a2bus/agat840k_hle.cpp b/src/devices/bus/a2bus/agat840k_hle.cpp index a27d3d95ceb..72217fbe464 100644 --- a/src/devices/bus/a2bus/agat840k_hle.cpp +++ b/src/devices/bus/a2bus/agat840k_hle.cpp @@ -13,10 +13,10 @@ *********************************************************************/ #include "emu.h" -#include "imagedev/flopdrv.h" -#include "formats/agat840k_hle_dsk.h" #include "agat840k_hle.h" +#include "formats/agat840k_hle_dsk.h" + //#define VERBOSE 1 #include "logmacro.h" @@ -175,14 +175,18 @@ void a2bus_agat840k_hle_device::device_reset() } for (int j = 0; j < 21; j++) { - int k, cksum = 0, s = (j * 1) % 21; + const int s = (j * 1) % 21; + int cksum = 0; m_floppy->floppy_drive_read_sector_data(t & 1, s, buf, 256); -#define BAUX 22 -#define BLOB (256 + 19 + BAUX) + enum + { + BAUX = 22, + BLOB = 256 + 19 + BAUX + }; - for (k = 0; k < 256; k++) + for (int k = 0; k < 256; k++) { if (cksum > 255) { cksum++; cksum &= 255; } cksum += buf[k]; @@ -211,13 +215,11 @@ void a2bus_agat840k_hle_device::device_reset() elem[13 + (BLOB * j) + 17 + 257] = 0x5a; // gap3 - for (k = 0; k < BAUX; k++) + for (int k = 0; k < BAUX; k++) { elem[13 + (BLOB * j) + 17 + 258 + k] = 0xaa; } } -#undef BAUX -#undef BLOB t++; if ((t & 1) == 0) @@ -407,9 +409,7 @@ WRITE8_MEMBER(a2bus_agat840k_hle_device::d14_o_c) // data are latched in by write to PC4 READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a) { - u16 data = 0; - - data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read]; + const u16 data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read]; LOG("sector data: %02x @ %4d (head %d track %2d)%s\n", data & 0xff, m_count_read, m_side, m_floppy->floppy_drive_get_current_track(), BIT(data, 14) ? " volume" : (BIT(data, 13) ? " cksum" : "")); diff --git a/src/devices/bus/a2bus/agat840k_hle.h b/src/devices/bus/a2bus/agat840k_hle.h index 42a1f2cc8c4..cab186c2c62 100644 --- a/src/devices/bus/a2bus/agat840k_hle.h +++ b/src/devices/bus/a2bus/agat840k_hle.h @@ -14,22 +14,26 @@ #pragma once #include "a2bus.h" +#include "imagedev/flopdrv.h" #include "machine/i8255.h" -#define MXCSR_SYNC 0x40 -#define MXCSR_TR 0x80 - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** class a2bus_agat840k_hle_device: - public device_t, - public device_a2bus_card_interface + public device_t, + public device_a2bus_card_interface { public: + enum : u8 + { + MXCSR_SYNC = 0x40, + MXCSR_TR = 0x80 + }; + // construction/destruction a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/video/dp8510.h b/src/devices/video/dp8510.h index 946dd0d8c15..04a0c2b1676 100644 --- a/src/devices/video/dp8510.h +++ b/src/devices/video/dp8510.h @@ -5,7 +5,6 @@ #pragma once -#include "video/dp8510.h" class dp8510_device : public device_t { -- cgit v1.2.3-70-g09d2 From a48bf8f6e47428ee174e29657e5abdcf34572128 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 9 Dec 2017 08:03:24 +0100 Subject: audio/midway.h, audio/williams.h: fixed validation (nw) --- src/mame/audio/midway.h | 2 +- src/mame/audio/williams.h | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mame/audio/midway.h b/src/mame/audio/midway.h index a7a867d6a25..1637c79d4ed 100644 --- a/src/mame/audio/midway.h +++ b/src/mame/audio/midway.h @@ -170,7 +170,7 @@ protected: private: // devices - required_device m_cpu; + required_device m_cpu; required_device m_pia; required_device m_dac; diff --git a/src/mame/audio/williams.h b/src/mame/audio/williams.h index b81d6ce8ae9..e2d564b462c 100644 --- a/src/mame/audio/williams.h +++ b/src/mame/audio/williams.h @@ -57,7 +57,7 @@ protected: private: // devices - required_device m_cpu; + required_device m_cpu; required_device m_pia; required_device m_hc55516; @@ -112,8 +112,8 @@ private: }; // devices - required_device m_cpu0; - required_device m_cpu1; + required_device m_cpu0; + required_device m_cpu1; required_device m_hc55516; // internal state @@ -161,7 +161,7 @@ protected: private: // devices - required_device m_cpu; + required_device m_cpu; // internal state uint8_t m_latch; -- cgit v1.2.3-70-g09d2 From 726746b16dc0eea063dcf9a3a059ae9859e00d01 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 9 Dec 2017 08:09:32 +0100 Subject: cps1.cpp: added yi22b.1a pal dump and confirmed lwio.12e dump for 1941j [caius, robotype] --- src/mame/drivers/cps1.cpp | 4 ++-- src/mame/video/cps1.cpp | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/cps1.cpp b/src/mame/drivers/cps1.cpp index e1034118975..e47eb632fec 100644 --- a/src/mame/drivers/cps1.cpp +++ b/src/mame/drivers/cps1.cpp @@ -5525,8 +5525,8 @@ ROM_START( 1941j ) ROM_LOAD( "sou1", 0x0000, 0x0117, CRC(84f4b2fe) SHA1(dcc9e86cc36316fe42eace02d6df75d08bc8bb6d) ) ROM_REGION( 0x0200, "bboardplds", 0 ) - ROM_LOAD( "yi22b.1a", 0x0000, 0x0117, NO_DUMP ) - ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required + ROM_LOAD( "yi22b.1a", 0x0000, 0x0117, CRC(b5cad2a0) SHA1(3b1232cf821617bc9819fa7b9b3f4e7fc66976f3) ) + ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) ROM_END /* B-Board 89624B-3 */ diff --git a/src/mame/video/cps1.cpp b/src/mame/video/cps1.cpp index 532360636d6..3a78c77d156 100644 --- a/src/mame/video/cps1.cpp +++ b/src/mame/video/cps1.cpp @@ -71,7 +71,7 @@ Final Fight (Japan 900613) 89625B-1 S2 1941: Counter Attack (World) 1990 89624B-3 YI24B IOB1 88622-C-5 CPS-B-05 DL-0411-10006 None 1941: Counter Attack (World 900227) 89624B-3 YI24B IOB1 88622-C-5 CPS-B-05 DL-0411-10006 None 1941: Counter Attack (USA 900227) 89624B-3 YI24B IOB1 88622-C-5 CPS-B-05 DL-0411-10006 None -1941: Counter Attack (Japan) 89625B-1 YI22B LWIO? 88622-C-5 CPS-B-05 DL-0411-10006 None +1941: Counter Attack (Japan) 89625B-1 YI22B LWIO 88622-C-5 CPS-B-05 DL-0411-10006 None Mercs (World 900302) 1990 89624B-3 O224B IOB1 90628-C-1 CPS-B-12 DL-0411-10007 C628 Mercs (USA 900302) 89624B-3 O224B IOB1 90628-C-1/2 CPS-B-12 DL-0411-10007 C628 @@ -1443,7 +1443,7 @@ static const struct CPS1config cps1_config_table[]= {"1941", CPS_B_05, mapper_YI24B }, {"1941r1", CPS_B_05, mapper_YI24B }, {"1941u", CPS_B_05, mapper_YI24B }, - {"1941j", CPS_B_05, mapper_YI24B }, // wrong, this set uses YI22B, still not dumped + {"1941j", CPS_B_05, mapper_YI24B }, // wrong, this set uses YI22B, dumped but equations still not added {"unsquad", CPS_B_11, mapper_AR24B }, {"area88", CPS_B_11, mapper_AR22B }, // equivalent to AR24B {"area88r", CPS_B_21_DEF, mapper_AR22B }, // wrong, this set uses ARA63B, still not dumped -- cgit v1.2.3-70-g09d2 From 147cffb3866334d6e0744c38dd84c47f67ef7138 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 9 Dec 2017 08:38:01 +0100 Subject: ironhors.cpp: measured clocks [Corrado Tomaselli] --- src/mame/drivers/ironhors.cpp | 15 +++++++++++-- src/mame/includes/ironhors.h | 51 ++++++++++++++++++++++++------------------- 2 files changed, 42 insertions(+), 24 deletions(-) diff --git a/src/mame/drivers/ironhors.cpp b/src/mame/drivers/ironhors.cpp index 40f17548c69..209bbe35b73 100644 --- a/src/mame/drivers/ironhors.cpp +++ b/src/mame/drivers/ironhors.cpp @@ -15,7 +15,6 @@ #include "cpu/m6809/m6809.h" #include "cpu/z80/z80.h" #include "sound/2203intf.h" -#include "sound/discrete.h" #include "screen.h" #include "speaker.h" @@ -49,7 +48,6 @@ WRITE8_MEMBER(ironhors_state::sh_irqtrigger_w) WRITE8_MEMBER(ironhors_state::filter_w) { - discrete_device *m_disc_ih = machine().device("disc_ih"); m_disc_ih->write(space, NODE_11, (data & 0x04) >> 2); m_disc_ih->write(space, NODE_12, (data & 0x02) >> 1); m_disc_ih->write(space, NODE_13, (data & 0x01) >> 0); @@ -360,6 +358,19 @@ void ironhors_state::machine_reset() m_spriterambank = 0; } +/* +clock measurements: +main Xtal is 18.432mhz + +Z80 runs at 3.072mhz + +M6809E runs at 1.532mhz ( NOT 3.072mhz) + +Vsync is 61hz + +These clocks make the emulation run too fast. Real hardware video: http://d.hatena.ne.jp/video/niconico/sm3842410 +*/ + static MACHINE_CONFIG_START( ironhors ) /* basic machine hardware */ diff --git a/src/mame/includes/ironhors.h b/src/mame/includes/ironhors.h index 72408c04d71..036eb257cd1 100644 --- a/src/mame/includes/ironhors.h +++ b/src/mame/includes/ironhors.h @@ -8,6 +8,7 @@ #include "machine/gen_latch.h" #include "machine/timer.h" +#include "sound/discrete.h" class ironhors_state : public driver_device { @@ -19,6 +20,7 @@ public: m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_soundlatch(*this, "soundlatch"), + m_disc_ih(*this, "disc_ih"), m_interrupt_enable(*this, "int_enable"), m_scroll(*this, "scroll"), m_colorram(*this, "colorram"), @@ -26,12 +28,37 @@ public: m_spriteram2(*this, "spriteram2"), m_spriteram(*this, "spriteram") { } + DECLARE_WRITE8_MEMBER(sh_irqtrigger_w); + DECLARE_WRITE8_MEMBER(videoram_w); + DECLARE_WRITE8_MEMBER(colorram_w); + DECLARE_WRITE8_MEMBER(charbank_w); + DECLARE_WRITE8_MEMBER(palettebank_w); + DECLARE_WRITE8_MEMBER(flipscreen_w); + DECLARE_WRITE8_MEMBER(filter_w); + DECLARE_READ8_MEMBER(farwest_soundlatch_r); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_farwest(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + TIMER_DEVICE_CALLBACK_MEMBER(irq); + TIMER_DEVICE_CALLBACK_MEMBER(farwest_irq); + + DECLARE_PALETTE_INIT(ironhors); + DECLARE_VIDEO_START(farwest); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void video_start() override; + +private: /* devices */ required_device m_maincpu; required_device m_soundcpu; required_device m_gfxdecode; required_device m_palette; required_device m_soundlatch; + required_device m_disc_ih; /* memory pointers */ required_shared_ptr m_interrupt_enable; @@ -47,29 +74,9 @@ public: int m_charbank; int m_spriterambank; - DECLARE_WRITE8_MEMBER(sh_irqtrigger_w); - DECLARE_WRITE8_MEMBER(videoram_w); - DECLARE_WRITE8_MEMBER(colorram_w); - DECLARE_WRITE8_MEMBER(charbank_w); - DECLARE_WRITE8_MEMBER(palettebank_w); - DECLARE_WRITE8_MEMBER(flipscreen_w); - DECLARE_WRITE8_MEMBER(filter_w); - DECLARE_READ8_MEMBER(farwest_soundlatch_r); - - TILE_GET_INFO_MEMBER(get_bg_tile_info); - TILE_GET_INFO_MEMBER(farwest_get_bg_tile_info); - - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void video_start() override; - DECLARE_PALETTE_INIT(ironhors); - DECLARE_VIDEO_START(farwest); - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_farwest(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); void farwest_draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); - TIMER_DEVICE_CALLBACK_MEMBER(irq); - TIMER_DEVICE_CALLBACK_MEMBER(farwest_irq); + TILE_GET_INFO_MEMBER(get_bg_tile_info); + TILE_GET_INFO_MEMBER(farwest_get_bg_tile_info); }; -- cgit v1.2.3-70-g09d2 From 01339444972e008dd2537acc42629efbdf7b9f12 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sat, 9 Dec 2017 22:42:50 +1100 Subject: TMS9995: fixed debugger do command (Thanks to Ryan Holtz) --- src/devices/cpu/tms9900/tms9995.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index 542f51f88ae..826932ceca6 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -349,10 +349,10 @@ void tms9995_device::device_reset() const char* tms9995_device::s_statename[20] = { - "PC ", "WP ", "ST ", "IR ", - "R0 ", "R1 ", "R2 ", "R3 ", - "R4 ", "R5 ", "R6 ", "R7 ", - "R8 ", "R9 ", "R10", "R11", + "PC", "WP", "ST", "IR", + "R0", "R1", "R2", "R3", + "R4", "R5", "R6", "R7", + "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15" }; -- cgit v1.2.3-70-g09d2 From 36fa2147af5ed97b4d834b1598c07679b02d4d1f Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 9 Dec 2017 15:09:01 +0200 Subject: pgm2: MCU HLE checkpoint (nw) --- src/mame/drivers/pgm2.cpp | 112 +++++++++++++++++++++++++++++++++++++--------- src/mame/includes/pgm2.h | 12 ++++- 2 files changed, 101 insertions(+), 23 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 3230a78d970..652f06acb63 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -53,7 +53,7 @@ codepath that would not exist in a real environment at the moment) Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests) - Debug features (require DIP SW1:8 On): + Debug features (require DIP SW1:8 On and SW1:1 Off): - QC TEST mode: hold P1 A+B during boot - Debug/Cheat mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be more unknown debug features. works for both currently dumped games (orleg2, kov2nl) @@ -126,10 +126,87 @@ INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2) { - int scanline = param; + m_arm_aic->set_irq(0x46); +} + +// "MPU" MCU HLE starts here +void pgm2_state::mcu_command(bool is_command) +{ + uint8_t cmd = m_mcu_regs[0] & 0xff; + if (is_command && cmd != 0xf6) + logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); + + if (is_command) + { + m_mcu_last_cmd = cmd; + switch (cmd) + { + case 0xf6: // get result + m_mcu_regs[3] = m_mcu_result0; + m_mcu_regs[4] = m_mcu_result1; + m_mcu_timer->adjust(attotime::from_msec(1)); + break; + case 0xe0: // command port test + m_mcu_result0 = m_mcu_regs[0]; + m_mcu_result1 = m_mcu_regs[1]; + m_mcu_timer->adjust(attotime::from_msec(30)); // such quite long delay is needed for debug codes check routine + break; + case 0xe1: // shared ram access (unimplemented) + { + // MCU access to RAM shared at 0x30100000, 2x banks, in the same time CPU and MCU access different banks + // where is offset ? +// uint8_t mode = m_mcu_regs[0] >> 16; // 0 - ???, 1 - read, 2 - write +// uint8_t data = m_mcu_regs[0] >> 24; + m_mcu_result0 = cmd; + m_mcu_result1 = 0; + m_mcu_timer->adjust(attotime::from_msec(1)); + } + break; + case 0xc0: // unknown / unimplemented, most of them probably IC Card RW related + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + m_mcu_result0 = cmd; + m_mcu_result1 = 0; + m_mcu_timer->adjust(attotime::from_msec(1)); + break; + default: + logerror("MCU unknown command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); + m_mcu_timer->adjust(attotime::from_msec(1)); + break; + } + m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F70000; // set "command accepted" status + } + else // next step + { + if (m_mcu_last_cmd && m_mcu_last_cmd != 0xf6) + { + m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F20000; // set "command done and return data" status + m_mcu_timer->adjust(attotime::from_msec(1)); + } + } +} + +READ32_MEMBER(pgm2_state::mcu_r) +{ + return m_mcu_regs[(offset >> 15) & 7]; +} - if(scanline == 0) - m_arm_aic->set_irq(0x46); +WRITE32_MEMBER(pgm2_state::mcu_w) +{ + int reg = (offset >> 15) & 7; + COMBINE_DATA(&m_mcu_regs[reg]); + + if (reg == 2 && m_mcu_regs[2]) // irq to mcu + mcu_command(true); + if (reg == 5 && m_mcu_regs[5]) // ack to mcu (written at the end of irq handler routine) + mcu_command(false); } static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) @@ -137,13 +214,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x02000000, 0x0200ffff) AM_RAM AM_SHARE("sram") // 'battery ram' (in CPU?) - // could be the card reader, looks a bit like a standard IGS MCU comms protocol going on here - AM_RANGE(0x03600000, 0x03600003) AM_WRITENOP - AM_RANGE(0x03620000, 0x03620003) AM_WRITENOP - AM_RANGE(0x03640000, 0x03640003) AM_WRITENOP - AM_RANGE(0x03660000, 0x03660003) AM_READ_PORT("UNK1") - AM_RANGE(0x03680000, 0x03680003) AM_READ_PORT("UNK2") - AM_RANGE(0x036a0000, 0x036a0003) AM_WRITENOP + AM_RANGE(0x03600000, 0x036bffff) AM_READWRITE(mcu_r, mcu_w) AM_RANGE(0x03900000, 0x03900003) AM_READ_PORT("INPUTS0") AM_RANGE(0x03a00000, 0x03a00003) AM_READ_PORT("INPUTS1") @@ -170,7 +241,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) what is the real size? */ AM_RANGE(0x300e0000, 0x300e03ff) AM_RAM AM_SHARE("lineram") AM_MIRROR(0x000fc00) - AM_RANGE(0x30100000, 0x301000ff) AM_RAM // unknown mask 00ff00ff, seems to be banked with 0x30120030 too? + AM_RANGE(0x30100000, 0x301000ff) AM_RAM // MCU shared RAM, access at even bytes only (8bit device at 16bit bus?), 2x banks switched via 0x30120032 register (16bit) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) @@ -189,19 +260,11 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0xfffffd28, 0xfffffd2b) AM_READ(rtc_r) - AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(encryption_do_w) // after uploading encryption? table might actually send it or enable external ROM? + AM_RANGE(0xfffffa08, 0xfffffa0b) AM_WRITE(encryption_do_w) // after uploading encryption? table might actually send it or enable external ROM? when read bits0-1 is ROM board status (0 if OK) AM_RANGE(0xfffffa0c, 0xfffffa0f) AM_READ(unk_startup_r) ADDRESS_MAP_END static INPUT_PORTS_START( pgm2 ) -// probably not inputs - PORT_START("UNK1") - PORT_BIT( 0xffffffff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - -// probably not inputs - PORT_START("UNK2") - PORT_BIT( 0xffffffff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - PORT_START("INPUTS0") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1) PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) @@ -300,12 +363,17 @@ void pgm2_state::machine_start() save_item(NAME(m_has_decrypted)); save_item(NAME(m_spritekey)); save_item(NAME(m_realspritekey)); + save_item(NAME(m_mcu_regs)); + save_item(NAME(m_mcu_result0)); + save_item(NAME(m_mcu_result1)); + save_item(NAME(m_mcu_last_cmd)); } void pgm2_state::machine_reset() { m_spritekey = 0; m_realspritekey = 0; + m_mcu_last_cmd = 0; } static const gfx_layout tiles8x8_layout = @@ -348,7 +416,7 @@ static MACHINE_CONFIG_START( pgm2 ) MCFG_CPU_PROGRAM_MAP(pgm2_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", pgm2_state, igs_interrupt) - MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pgm2_state, igs_interrupt2, "screen", 0, 1) + MCFG_TIMER_DRIVER_ADD("mcu_timer", pgm2_state, igs_interrupt2) MCFG_ARM_AIC_ADD("arm_aic") MCFG_IRQ_LINE_CB(WRITELINE(pgm2_state, irq)) diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 3a9d445505e..8e65d8af58a 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -38,13 +38,16 @@ public: m_sprites_colour(*this, "sprites_colour"), m_sp_palette(*this, "sp_palette"), m_bg_palette(*this, "bg_palette"), - m_tx_palette(*this, "tx_palette") + m_tx_palette(*this, "tx_palette"), + m_mcu_timer(*this, "mcu_timer") { } DECLARE_READ32_MEMBER(unk_startup_r); DECLARE_READ32_MEMBER(rtc_r); + DECLARE_READ32_MEMBER(mcu_r); DECLARE_WRITE32_MEMBER(fg_videoram_w); DECLARE_WRITE32_MEMBER(bg_videoram_w); + DECLARE_WRITE32_MEMBER(mcu_w); DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); @@ -104,6 +107,12 @@ private: uint32_t m_realspritekey; int m_sprite_predecrypted; + uint32_t m_mcu_regs[8]; + uint32_t m_mcu_result0; + uint32_t m_mcu_result1; + uint8_t m_mcu_last_cmd; + void mcu_command(bool is_command); + // devices required_device m_maincpu; required_device m_screen; @@ -122,6 +131,7 @@ private: required_device m_sp_palette; required_device m_bg_palette; required_device m_tx_palette; + required_device m_mcu_timer; }; #endif -- cgit v1.2.3-70-g09d2 From dcd5d90200d63ed93bfb08fb26a1d469b1fbf6a4 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 9 Dec 2017 14:34:38 +0100 Subject: new software list addition -------------------------- ibm5170_cdrom: Pompei AD LXXIX --- hash/ibm5170_cdrom.xml | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 9bf176e8c75..6d387cbd0a4 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -22,7 +22,20 @@ - + + + + + Pompei A.D. LXXIX + 1995 + Finson / Antinomia + + + + + + + Sideline 1996 -- cgit v1.2.3-70-g09d2 From 3bf1db4cc384449d5a1b95dfa2e4a0d7e93218ee Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 9 Dec 2017 14:40:33 +0100 Subject: cut by git (nw) --- hash/ibm5170_cdrom.xml | 1 + 1 file changed, 1 insertion(+) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 6d387cbd0a4..c9b26db7f38 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -31,6 +31,7 @@ Finson / Antinomia + -- cgit v1.2.3-70-g09d2 From d63f877e7cf1d7dc0cb559205bd657b5b80c2989 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 9 Dec 2017 11:18:10 -0500 Subject: ibm5170_cdrom.xml: Validation fix (nw) --- hash/ibm5170_cdrom.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index c9b26db7f38..75e72e34df4 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -30,8 +30,8 @@ 1995 Finson / Antinomia + - -- cgit v1.2.3-70-g09d2 From ef2238d40d1114ad3ac220542bf1a68a3e2f9976 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 9 Dec 2017 18:38:51 +0200 Subject: pgm2: a bit more ICRW, now it works like if MCU/RW alive but card is not inserted (nw) --- src/mame/drivers/pgm2.cpp | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 652f06acb63..ebf4028652f 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -139,17 +139,18 @@ void pgm2_state::mcu_command(bool is_command) if (is_command) { m_mcu_last_cmd = cmd; + uint8_t status = 0xf7; // "command accepted" status + int delay = 1; switch (cmd) { case 0xf6: // get result m_mcu_regs[3] = m_mcu_result0; m_mcu_regs[4] = m_mcu_result1; - m_mcu_timer->adjust(attotime::from_msec(1)); break; case 0xe0: // command port test m_mcu_result0 = m_mcu_regs[0]; m_mcu_result1 = m_mcu_regs[1]; - m_mcu_timer->adjust(attotime::from_msec(30)); // such quite long delay is needed for debug codes check routine + delay = 30; // such quite long delay is needed for debug codes check routine break; case 0xe1: // shared ram access (unimplemented) { @@ -159,10 +160,12 @@ void pgm2_state::mcu_command(bool is_command) // uint8_t data = m_mcu_regs[0] >> 24; m_mcu_result0 = cmd; m_mcu_result1 = 0; - m_mcu_timer->adjust(attotime::from_msec(1)); } break; - case 0xc0: // unknown / unimplemented, most of them probably IC Card RW related + // unknown / unimplemented, all C0-C9 commands is IC Card RW related + // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) # + case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card + status = 0xf4; case 0xc1: case 0xc2: case 0xc3: @@ -174,14 +177,14 @@ void pgm2_state::mcu_command(bool is_command) case 0xc9: m_mcu_result0 = cmd; m_mcu_result1 = 0; - m_mcu_timer->adjust(attotime::from_msec(1)); break; default: logerror("MCU unknown command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); - m_mcu_timer->adjust(attotime::from_msec(1)); + status = 0xf4; // error break; } - m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F70000; // set "command accepted" status + m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | (status << 16); + m_mcu_timer->adjust(attotime::from_msec(delay)); } else // next step { -- cgit v1.2.3-70-g09d2 From e4388838f44e0f7914fe1cac09e1769eb6282fd3 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sun, 10 Dec 2017 03:45:11 +1100 Subject: (nw) cortex : keyboard working --- src/mame/drivers/cortex.cpp | 107 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 83 insertions(+), 24 deletions(-) diff --git a/src/mame/drivers/cortex.cpp b/src/mame/drivers/cortex.cpp index c4e87619bd7..cc5f5daea2b 100644 --- a/src/mame/drivers/cortex.cpp +++ b/src/mame/drivers/cortex.cpp @@ -2,23 +2,39 @@ // copyright-holders:Robbbert /*************************************************************************** - Powertran Cortex - - 2012-04-20 Skeleton driver. - - ftp://ftp.whtech.com/Powertran Cortex/ - http://www.powertrancortex.com/index.html - - Uses Texas Instruments parts and similar to other TI computers. - It was designed by TI engineers, so it may perhaps be a clone - of another TI or the Geneve. - - Chips: - TMS9995 - CPU - TMS9929 - Video - TMS9911 - DMA to floppy - TMS9909 - Floppy Disk Controller - AY-5-2376 - Keyboard controller +Powertran Cortex + +2012-04-20 Skeleton driver. + +ftp://ftp.whtech.com/Powertran Cortex/ +http://www.powertrancortex.com/index.html + +Uses Texas Instruments parts and similar to other TI computers. +It was designed by TI engineers, so it may perhaps be a clone +of another TI or the Geneve. + +Chips: +TMS9995 - CPU +TMS9929 - Video +TMS9911 - DMA to floppy (not emulated) +TMS9909 - Floppy Disk Controller (not emulated) +TMS9902 - UART (x2) (not usable with rs232.h) +AY-5-2376 - Keyboard controller + +ToDo: +- All input causes an error message +- Screen corrupts when scrolling +- Unemulated devices +- Keyboard to use AY device +- Banking +- Memory manager device +- Various CRU I/O + +Note that the MAME implementation of CRU addresses is not the same as real +hardware. For writing, MAME uses the correct address (R12/2 + offset), with +the bit (0 or 1), being in 'data'. However, for reading, 8 CRU bits are +packed into a single address-byte (CRU 0 = bit 0, etc). So the address is +(R12/2 + offset) >> 3. ****************************************************************************/ @@ -27,6 +43,8 @@ #include "cpu/tms9900/tms9995.h" #include "machine/74259.h" #include "video/tms9928a.h" +//#include "machine/tms9902.h" +#include "machine/keyboard.h" class cortex_state : public driver_device { @@ -37,7 +55,14 @@ public: , m_p_ram(*this, "ram") { } + void kbd_put(u8 data); + DECLARE_WRITE_LINE_MEMBER(keyboard_ack_w); + DECLARE_READ8_MEMBER(pio_r); + DECLARE_READ8_MEMBER(keyboard_r); + private: + bool m_cru0005; + uint8_t m_term_data; virtual void machine_reset() override; required_device m_maincpu; required_shared_ptr m_p_ram; @@ -53,11 +78,13 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( io_map, AS_IO, 8, cortex_state ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0000, 0x000f) AM_MIRROR(0x0030) AM_DEVWRITE("control", ls259_device, write_a0) - //AM_RANGE(0x0000, 0x000f) AM_MIRROR(0x0020) AM_READ(pio_r) - //AM_RANGE(0x0010, 0x001f) AM_MIRROR(0x0020) AM_READ(keyboard_r) - //AM_RANGE(0x0080, 0x00bf) AM_READWRITE(rs232_r,rs232_w) - //AM_RANGE(0x0180, 0x01bf) AM_READWRITE(cass_r,cass_w) + AM_RANGE(0x0000, 0x0007) AM_MIRROR(0x18) AM_DEVWRITE("control", ls259_device, write_d0) + AM_RANGE(0x0000, 0x0000) AM_READ(pio_r) + AM_RANGE(0x0001, 0x0001) AM_READ(keyboard_r) + // read ranges are incorrect - should be 1/8th of current values. + //AM_RANGE(0x0080, 0x00bf) AM_DEVREADWRITE("uart1", tms9902_device, cruread, cruwrite) // RS232 + //AM_RANGE(0x0180, 0x01bf) AM_DEVREADWRITE("uart2", tms9902_device, cruread, cruwrite) // Cassette + //AM_RANGE(0x01c0, 0x01ff) // DMA controller - TMS9911 //AM_RANGE(0x0800, 0x080f) AM_WRITE(cent_data_w) //AM_RANGE(0x0810, 0x0811) AM_WRITE(cent_strobe_w) //AM_RANGE(0x0812, 0x0813) AM_READ(cent_stat_r) @@ -69,9 +96,35 @@ ADDRESS_MAP_END static INPUT_PORTS_START( cortex ) INPUT_PORTS_END +READ8_MEMBER( cortex_state::pio_r ) +{ + return (m_cru0005 ? 0x20 : 0) | 0xdf; +} + +READ8_MEMBER( cortex_state::keyboard_r ) +{ + return m_term_data; +} + +WRITE_LINE_MEMBER( cortex_state::keyboard_ack_w ) +{ + if (!state) + { + m_maincpu->set_input_line(INT_9995_INT4, CLEAR_LINE); + m_cru0005 = 1; + } +} + +void cortex_state::kbd_put(u8 data) +{ + m_term_data = data; + m_cru0005 = 0; + m_maincpu->set_input_line(INT_9995_INT4, ASSERT_LINE); +} void cortex_state::machine_reset() { + m_cru0005 = 1; uint8_t* ROM = memregion("maincpu")->base(); memcpy(m_p_ram, ROM, 0x6000); m_maincpu->ready_line(ASSERT_LINE); @@ -82,11 +135,11 @@ static MACHINE_CONFIG_START( cortex ) /* TMS9995 CPU @ 12.0 MHz */ // Standard variant, no overflow int // No lines connected yet - MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, mem_map, io_map) + MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, mem_map, io_map) MCFG_DEVICE_ADD("control", LS259, 0) // IC64 //MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cortex_state, basic_led_w)) - //MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cortex_state, keyboard_ack_w)) + MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cortex_state, keyboard_ack_w)) //MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cortex_state, ebus_int_ack_w)) //MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cortex_state, ebus_to_en_w)) //MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cortex_state, disk_size_w)) @@ -98,6 +151,12 @@ static MACHINE_CONFIG_START( cortex ) MCFG_TMS9928A_VRAM_SIZE(0x4000) MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" ) MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9928a_device, screen_update ) + + MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0) + MCFG_GENERIC_KEYBOARD_CB(PUT(cortex_state, kbd_put)) + + //MCFG_DEVICE_ADD("uart1", TMS9902, XTAL_12MHz / 4) + //MCFG_DEVICE_ADD("uart2", TMS9902, XTAL_12MHz / 4) MACHINE_CONFIG_END /* ROM definition */ -- cgit v1.2.3-70-g09d2 From 01a9e86279aae43097225e29c49ad46caf0b9b6c Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sun, 10 Dec 2017 03:47:25 +1100 Subject: (nw) evmbug : fixed keyboard --- src/mame/drivers/evmbug.cpp | 66 +++++++++++++++++++++++++++------------------ 1 file changed, 40 insertions(+), 26 deletions(-) diff --git a/src/mame/drivers/evmbug.cpp b/src/mame/drivers/evmbug.cpp index f93e2da9e2d..bc742bb35d9 100644 --- a/src/mame/drivers/evmbug.cpp +++ b/src/mame/drivers/evmbug.cpp @@ -2,17 +2,23 @@ // copyright-holders:Robbbert /*************************************************************************** - Stuart's Breadboard Project. TMS9995 evaluation kit TMAM6095. +Stuart's Breadboard Project. TMS9995 evaluation kit TMAM6095. - 2013-06-02 Skeleton driver. +2013-06-02 Skeleton driver. - http://www.avjd51.dsl.pipex.com/tms9995_eval_module/tms9995_eval_module.htm +http://www.stuartconner.me.uk/tms9995_eval_module/tms9995_eval_module.htm +It uses TMS9902 UART for comms, but our implementation of that chip is +not ready for rs232.h as yet. + +Press any key to get it started. All input to be in uppercase. Haven't found +any commands that work as yet. ****************************************************************************/ #include "emu.h" #include "cpu/tms9900/tms9995.h" +//#include "machine/tms9902.h" #include "machine/terminal.h" @@ -33,7 +39,9 @@ private: virtual void machine_reset() override; uint8_t m_term_data; uint8_t m_term_out; - required_device m_maincpu; + bool m_rin; + bool m_rbrl; + required_device m_maincpu; required_device m_terminal; }; @@ -44,8 +52,10 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( io_map, AS_IO, 8, evmbug_state ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0000, 0x0007) AM_WRITE(rs232_w) - AM_RANGE(0x0000, 0x0002) AM_READ(rs232_r) + //AM_RANGE(0x0000, 0x0003) AM_DEVREAD("uart1", tms9902_device, cruread) + //AM_RANGE(0x0000, 0x001f) AM_DEVWRITE("uart1", tms9902_device, cruwrite) + AM_RANGE(0x0000, 0x0003) AM_READ(rs232_r) + AM_RANGE(0x0000, 0x001f) AM_WRITE(rs232_w) ADDRESS_MAP_END /* Input ports */ @@ -54,60 +64,64 @@ INPUT_PORTS_END READ8_MEMBER( evmbug_state::rs232_r ) { - static uint8_t temp = 0; - temp^=0xff; - if (offset == 1) - return temp; - + if (offset == 0) + return m_term_data; + else if (offset == 2) + return (m_rbrl ? 0x20 : 0) | 0xc0; + else { - return 0xff;//(m_term_data) ? 0 : 0xff; + m_rin ^= 1; + return m_rin << 7; } - - uint8_t ret = m_term_data; - m_term_data = 0; - return ret; } WRITE8_MEMBER( evmbug_state::rs232_w ) { - if (offset == 0) - m_term_out = 0; + if (offset < 8) + { + if (offset == 0) + m_term_out = 0; - m_term_out |= (data << offset); + m_term_out |= (data << offset); - if (offset == 7) - m_terminal->write(space, 0, m_term_out & 0x7f); + if (offset == 7) + m_terminal->write(space, 0, m_term_out & 0x7f); + } + else + if (offset == 18) + m_rbrl = 0; } void evmbug_state::kbd_put(u8 data) { m_term_data = data; + m_rbrl = data ? 1 : 0; } void evmbug_state::machine_reset() { - m_term_data = 0; + m_rbrl = 0; // Disable auto wait state generation by raising the READY line on reset - static_cast(machine().device("maincpu"))->ready_line(ASSERT_LINE); + m_maincpu->ready_line(ASSERT_LINE); } static MACHINE_CONFIG_START( evmbug ) // basic machine hardware // TMS9995 CPU @ 12.0 MHz // We have no lines connected yet - MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, mem_map, io_map ) + MCFG_TMS99xx_ADD("maincpu", TMS9995, XTAL_12MHz, mem_map, io_map ) /* video hardware */ MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0) MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(evmbug_state, kbd_put)) + + //MCFG_DEVICE_ADD("uart1", TMS9902, XTAL_12MHz / 4) MACHINE_CONFIG_END /* ROM definition */ ROM_START( evmbug ) ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) -// ROM_LOAD( "u8.bin", 0x0000, 0x1000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f) ) -// ROM_LOAD( "u9.bin", 0x1000, 0x0800, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9) ) ROM_LOAD( "evmbug.bin", 0x0000, 0x8000, CRC(a239ec56) SHA1(65b500d7d0f897ce0c320cf3ec32ff4042774599) ) ROM_END -- cgit v1.2.3-70-g09d2 From 3d95a59de0dbe900ad234832dee50c5c41ae8c85 Mon Sep 17 00:00:00 2001 From: Robbbert Date: Sun, 10 Dec 2017 04:05:37 +1100 Subject: Cortex: System is usable although not complete. (this part not for whatsnew) It works if "big" uppercase is used, but not "small" uppercase. --- src/mame/drivers/cortex.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/cortex.cpp b/src/mame/drivers/cortex.cpp index cc5f5daea2b..8c31f35eeb9 100644 --- a/src/mame/drivers/cortex.cpp +++ b/src/mame/drivers/cortex.cpp @@ -21,8 +21,11 @@ TMS9909 - Floppy Disk Controller (not emulated) TMS9902 - UART (x2) (not usable with rs232.h) AY-5-2376 - Keyboard controller +All input to be in uppercase. Note that "lowercase" is just smaller uppercase, +and is not acceptable as input. + + ToDo: -- All input causes an error message - Screen corrupts when scrolling - Unemulated devices - Keyboard to use AY device -- cgit v1.2.3-70-g09d2 From 9f32751cc9175439e92ad74f57bdcd828f8d4314 Mon Sep 17 00:00:00 2001 From: EoceneMiacid Date: Sat, 9 Dec 2017 20:43:23 +0100 Subject: Added 'Prototype' to ibm5170_cdrom (#2903) New working software list additions ----------------------------------- ibm5170_cdrom: Prototype [EoceneMiacid] --- hash/ibm5170_cdrom.xml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 75e72e34df4..ecb0626cfe6 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -22,6 +22,19 @@ + + + Prototype + 1995 + Neo + + + + + + + + -- cgit v1.2.3-70-g09d2 From 6c7c1e8a67d2c718f501a27b432827dbf9c5afc0 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 9 Dec 2017 21:16:34 +0100 Subject: fidel68k: update notes for mach III (nw) --- src/mame/drivers/fidel68k.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index d2c94518b55..971b871821b 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -11,7 +11,6 @@ such as Arena(in editmode). TODO: - - fex68km3 addressmap RAM mirror? PCB has 2*32K RAM, emulated has 16K+64K - USART is not emulated - V9(68030 @ 32MHz) is faster than V10(68040 @ 25MHz) but it should be the other way around, culprit is unemulated cache? @@ -29,7 +28,7 @@ PCB label 510-1129A01 PCB has edge connector for module, but no external slot There's room for 2 SIMMs at U22 and U23. Unpopulated in Excel 68000, used for -128KB hashtable RAM in Mach II. Mach III has wire mods to U8/U9(2*32KB). +128KB hashtable RAM in Mach II. Mach III has wire mods to U8/U9(2*8KB + 2*32KB piggybacked). I/O is via TTL, overall very similar to EAG. -- cgit v1.2.3-70-g09d2 From 7c0d98451440e22cc5d1a0d4552b692a64a06096 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 9 Dec 2017 18:08:01 -0500 Subject: hd6309: Create HD6309E variant that fixes ajax regression (nw) --- src/devices/cpu/m6809/hd6309.cpp | 15 +++++++++++++-- src/devices/cpu/m6809/hd6309.h | 15 ++++++++++++++- src/mame/drivers/ajax.cpp | 2 +- 3 files changed, 28 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/m6809/hd6309.cpp b/src/devices/cpu/m6809/hd6309.cpp index 1b40d17e06f..0937a575542 100644 --- a/src/devices/cpu/m6809/hd6309.cpp +++ b/src/devices/cpu/m6809/hd6309.cpp @@ -126,19 +126,30 @@ March 2013 NPW: //************************************************************************** DEFINE_DEVICE_TYPE(HD6309, hd6309_device, "hd6309", "HD6309") +DEFINE_DEVICE_TYPE(HD6309E, hd6309e_device, "hd6309e", "HD6309E") //------------------------------------------------- // hd6309_device - constructor //------------------------------------------------- -hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - m6809_base_device(mconfig, tag, owner, clock, HD6309, 4), +hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider) : + m6809_base_device(mconfig, tag, owner, clock, type, divider), m_md(0), m_temp_im(0) { } +hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + hd6309_device(mconfig, tag, owner, clock, HD6309, 4) +{ +} + +hd6309e_device::hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + hd6309_device(mconfig, tag, owner, clock, HD6309E, 1) +{ +} + //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- diff --git a/src/devices/cpu/m6809/hd6309.h b/src/devices/cpu/m6809/hd6309.h index 8e209f9f7b2..26352b6fe57 100644 --- a/src/devices/cpu/m6809/hd6309.h +++ b/src/devices/cpu/m6809/hd6309.h @@ -20,8 +20,9 @@ // TYPE DEFINITIONS //************************************************************************** -// device type definition +// device type definitions DECLARE_DEVICE_TYPE(HD6309, hd6309_device) +DECLARE_DEVICE_TYPE(HD6309E, hd6309e_device) // ======================> hd6309_device @@ -32,6 +33,9 @@ public: hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + // delegating constructor + hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -138,6 +142,15 @@ enum HD6309_ZERO_WORD }; +// ======================> hd6309e_device + +class hd6309e_device : public hd6309_device +{ +public: + // construction/destruction + hd6309e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + #define HD6309_IRQ_LINE M6809_IRQ_LINE /* 0 - IRQ line number */ #define HD6309_FIRQ_LINE M6809_FIRQ_LINE /* 1 - FIRQ line number */ diff --git a/src/mame/drivers/ajax.cpp b/src/mame/drivers/ajax.cpp index f03b73e394e..7f5c449de89 100644 --- a/src/mame/drivers/ajax.cpp +++ b/src/mame/drivers/ajax.cpp @@ -173,7 +173,7 @@ static MACHINE_CONFIG_START( ajax ) MCFG_CPU_ADD("maincpu", KONAMI, XTAL_24MHz/2/4) /* 052001 12/4 MHz*/ MCFG_CPU_PROGRAM_MAP(ajax_main_map) - MCFG_CPU_ADD("sub", HD6309, 3000000) /* ? */ + MCFG_CPU_ADD("sub", HD6309E, 3000000) /* ? */ MCFG_CPU_PROGRAM_MAP(ajax_sub_map) MCFG_CPU_ADD("audiocpu", Z80, 3579545) /* 3.58 MHz */ -- cgit v1.2.3-70-g09d2 From e5d39e7ed96581162d5454aa4ea7d6b50949af21 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Sun, 10 Dec 2017 01:43:08 +0000 Subject: new WORKING machine Calcune (Japan, prototype) [David Haywood, ShouTime, gamez fan, Sacrilego, Paul Vining, Jeffrey Gray, Fabien Marsaud, Jarrod Wright, Darksoft, Rod_Wod, Steven Young, Sean Sutton, Surgeville, The Dumping Union] --- scripts/target/mame/arcade.lua | 1 + src/mame/drivers/calcune.cpp | 322 +++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 + 3 files changed, 326 insertions(+) create mode 100644 src/mame/drivers/calcune.cpp diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 7d0902de2bd..85342ebe188 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -3170,6 +3170,7 @@ files { MAME_DIR .. "src/mame/includes/megadrvb.h", MAME_DIR .. "src/mame/drivers/megaplay.cpp", MAME_DIR .. "src/mame/drivers/megatech.cpp", + MAME_DIR .. "src/mame/drivers/calcune.cpp", MAME_DIR .. "src/mame/drivers/model1.cpp", MAME_DIR .. "src/mame/includes/model1.h", MAME_DIR .. "src/mame/machine/model1.cpp", diff --git a/src/mame/drivers/calcune.cpp b/src/mame/drivers/calcune.cpp new file mode 100644 index 00000000000..fe57bb41aa8 --- /dev/null +++ b/src/mame/drivers/calcune.cpp @@ -0,0 +1,322 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" + +#include "cpu/m68000/m68000.h" +#include "cpu/z80/z80.h" +#include "sound/sn76496.h" +#include "sound/ymz280b.h" +#include "video/315_5313.h" +#include "machine/nvram.h" +#include "speaker.h" + +#define MASTER_CLOCK_NTSC 53693175 + +class calcune_state : public driver_device +{ +public: + calcune_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + vdp_state(0), + m_maincpu(*this, "maincpu"), + m_vdp(*this, "gen_vdp"), + m_vdp2(*this, "gen_vdp2"), + m_palette(*this, "palette") + { } + + WRITE_LINE_MEMBER(vdp_sndirqline_callback_genesis_z80); + WRITE_LINE_MEMBER(vdp_lv6irqline_callback_genesis_68k); + WRITE_LINE_MEMBER(vdp_lv4irqline_callback_genesis_68k); + + DECLARE_MACHINE_START(calcune); + DECLARE_MACHINE_RESET(calcune); + + IRQ_CALLBACK_MEMBER(genesis_int_callback); + + DECLARE_DRIVER_INIT(calcune); + + DECLARE_READ16_MEMBER(cal_700000_r); + DECLARE_WRITE16_MEMBER(cal_770000_w); + DECLARE_READ16_MEMBER(cal_vdp_r); + DECLARE_WRITE16_MEMBER(cal_vdp_w); + + uint32_t screen_update_calcune(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); +private: + int vdp_state; + + required_device m_maincpu; + required_device m_vdp; + required_device m_vdp2; + required_device m_palette; +}; + + +static INPUT_PORTS_START( calcune ) + PORT_START("710000") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SERVICE1 ) + PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_HIGH ) + PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_COIN1 ) + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_START2 ) + PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("720000") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0xffc0, IP_ACTIVE_HIGH, IPT_UNUSED ) +INPUT_PORTS_END + + +READ16_MEMBER(calcune_state::cal_700000_r) +{ + vdp_state = 0; + return 0; +} + +WRITE16_MEMBER(calcune_state::cal_770000_w) +{ + vdp_state = data; +} + +READ16_MEMBER(calcune_state::cal_vdp_r) +{ + if (!vdp_state) + return m_vdp->vdp_r(space, offset, mem_mask); + else + return m_vdp2->vdp_r(space, offset, mem_mask); +} + +WRITE16_MEMBER(calcune_state::cal_vdp_w) +{ + if (!vdp_state) + m_vdp->vdp_w(space, offset, data, mem_mask); + else + m_vdp2->vdp_w(space, offset, data, mem_mask); +} + +static ADDRESS_MAP_START( calcune_map, AS_PROGRAM, 16, calcune_state ) + AM_RANGE(0x000000, 0x1fffff) AM_ROM + + AM_RANGE(0x700000, 0x700001) AM_READ(cal_700000_r) + + AM_RANGE(0x710000, 0x710001) AM_READ_PORT("710000") + AM_RANGE(0x720000, 0x720001) AM_READ_PORT("720000") +// AM_RANGE(0x730000, 0x730001) possible Z80 control? + AM_RANGE(0x760000, 0x760003) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff00) + + AM_RANGE(0x770000, 0x770001) AM_WRITE(cal_770000_w) + + AM_RANGE(0xA14100, 0xA14101) AM_NOP // on startup, possible z80 control + + AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(cal_vdp_r, cal_vdp_w) + + AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE("nvram") // battery on PCB +ADDRESS_MAP_END + + +uint32_t calcune_state::screen_update_calcune(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + const pen_t *paldata = m_palette->pens(); + + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) + { + uint32_t *dst = &bitmap.pix32(y); + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) + { + int pix; + + pix = m_vdp2->m_render_line_raw[x] & 0x3f; + + switch (pix & 0xc0) + { + case 0x00: + dst[x] = paldata[pix + 0x0000 + 0xc0]; + break; + case 0x40: + case 0x80: + dst[x] = paldata[pix + 0x0040 + 0xc0]; + break; + case 0xc0: + dst[x] = paldata[pix + 0x0080 + 0xc0]; + break; + + } + + if (m_vdp->m_render_line_raw[x] & 0x100) + { + pix = m_vdp->m_render_line_raw[x] & 0x3f; + if (pix & 0xf) + { + switch (pix & 0xc0) + { + case 0x00: + dst[x] = paldata[pix + 0x0000]; + break; + case 0x40: + case 0x80: + dst[x] = paldata[pix + 0x0040]; + break; + case 0xc0: + dst[x] = paldata[pix + 0x0080]; + break; + } + } + } + } + } + + return 0; +} + +MACHINE_RESET_MEMBER(calcune_state,calcune) +{ + m_vdp->device_reset_old(); + m_vdp2->device_reset_old(); +} + + +IRQ_CALLBACK_MEMBER(calcune_state::genesis_int_callback) +{ + if (irqline==4) + { + m_vdp->vdp_clear_irq4_pending(); + } + + if (irqline==6) + { + m_vdp->vdp_clear_irq6_pending(); + } + + return (0x60+irqline*4)/4; // vector address +} + +WRITE_LINE_MEMBER(calcune_state::vdp_sndirqline_callback_genesis_z80) +{ +} + +WRITE_LINE_MEMBER(calcune_state::vdp_lv6irqline_callback_genesis_68k) +{ + // this looks odd but is the logic the Genesis code requires + if (state == ASSERT_LINE) + m_maincpu->set_input_line(6, HOLD_LINE); + else + m_maincpu->set_input_line(6, CLEAR_LINE); +} + +WRITE_LINE_MEMBER(calcune_state::vdp_lv4irqline_callback_genesis_68k) +{ + // this looks odd but is the logic the Genesis code requires + if (state == ASSERT_LINE) + m_maincpu->set_input_line(4, HOLD_LINE); + else + m_maincpu->set_input_line(4, CLEAR_LINE); +} + +MACHINE_START_MEMBER(calcune_state,calcune) +{ + m_vdp->stop_timers(); + m_vdp2->stop_timers(); +} + +static MACHINE_CONFIG_START( calcune ) + MCFG_CPU_ADD("maincpu", M68000, MASTER_CLOCK_NTSC / 7) /* 7.67 MHz */ + MCFG_CPU_PROGRAM_MAP(calcune_map) + MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(calcune_state,genesis_int_callback) + + MCFG_CPU_ADD("z80", Z80, MASTER_CLOCK_NTSC / 15) /* 3.58 MHz */ + MCFG_DEVICE_DISABLE() /* no code is ever uploaded for the Z80, so it's unused here even if it is present on the PCB */ + + MCFG_MACHINE_START_OVERRIDE(calcune_state,calcune) + MCFG_MACHINE_RESET_OVERRIDE(calcune_state,calcune) + + MCFG_SCREEN_ADD("megadriv", RASTER) + MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) // Vblank handled manually. + MCFG_SCREEN_SIZE(64*8, 620) + MCFG_SCREEN_VISIBLE_AREA(0, 40*8-1, 0, 28*8-1) + MCFG_SCREEN_UPDATE_DRIVER(calcune_state, screen_update_calcune) + + MCFG_DEVICE_ADD("gen_vdp", SEGA315_5313, 0) + MCFG_SEGA315_5313_IS_PAL(false) + MCFG_SEGA315_5313_SND_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_sndirqline_callback_genesis_z80)); + MCFG_SEGA315_5313_LV6_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv6irqline_callback_genesis_68k)); + MCFG_SEGA315_5313_LV4_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv4irqline_callback_genesis_68k)); + MCFG_SEGA315_5313_ALT_TIMING(1); + MCFG_SEGA315_5313_PAL_WRITE_BASE(0x0000); + MCFG_SEGA315_5313_PALETTE("palette") + + MCFG_DEVICE_ADD("gen_vdp2", SEGA315_5313, 0) + MCFG_SEGA315_5313_IS_PAL(false) +// are these not hooked up or should they OR with the other lines? +// MCFG_SEGA315_5313_SND_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_sndirqline_callback_genesis_z80)); +// MCFG_SEGA315_5313_LV6_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv6irqline_callback_genesis_68k)); +// MCFG_SEGA315_5313_LV4_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv4irqline_callback_genesis_68k)); + MCFG_SEGA315_5313_ALT_TIMING(1); + MCFG_SEGA315_5313_PAL_WRITE_BASE(0x0c0); + MCFG_SEGA315_5313_PALETTE("palette") + + MCFG_TIMER_DEVICE_ADD_SCANLINE("scantimer", "gen_vdp", sega315_5313_device, megadriv_scanline_timer_callback_alt_timing, "megadriv", 0, 1) + MCFG_TIMER_DEVICE_ADD_SCANLINE("scantimer2", "gen_vdp2", sega315_5313_device, megadriv_scanline_timer_callback_alt_timing, "megadriv", 0, 1) + + MCFG_PALETTE_ADD("palette", 0xc0*2) + + MCFG_NVRAM_ADD_0FILL("nvram") + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") + + MCFG_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz) + MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) + MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + + /* sound hardware - VDP */ + MCFG_SOUND_ADD("snsnd", SEGAPSG, MASTER_CLOCK_NTSC/15) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker",0.25) +MACHINE_CONFIG_END + +DRIVER_INIT_MEMBER(calcune_state,calcune) +{ + m_vdp->set_use_cram(1); + m_vdp->set_vdp_pal(false); + m_vdp->set_framerate(60); + m_vdp->set_total_scanlines(262); + + m_vdp2->set_use_cram(1); + m_vdp2->set_vdp_pal(false); + m_vdp2->set_framerate(60); + m_vdp2->set_total_scanlines(262); +} + +ROM_START( calcune ) + ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 Code - ROM check fails, but probably due to prototype status, not bad ROM */ + ROM_LOAD16_BYTE( "1.IC101.27C4001", 0x000001, 0x080000, CRC(2d25544c) SHA1(ef778cbf2aa4fcec43ce2dce9bcefb964f458c0a) ) + ROM_LOAD16_BYTE( "2.IC102.27C4001", 0x000000, 0x080000, CRC(09330dc9) SHA1(fd888a7469a6290cd372a4b1eed577c2444f0c80) ) + ROM_LOAD16_BYTE( "3.IC103.27C4001", 0x100001, 0x080000, CRC(736a356d) SHA1(372fa5989a67746efc439d76df1733cf70df57e7) ) + ROM_LOAD16_BYTE( "4.IC104.27C4001", 0x100000, 0x080000, CRC(0bec031a) SHA1(69b255743f20408b2f14bddf0b85c85a13f29615) ) + + ROM_REGION( 0x200000, "ymz", 0 ) + ROM_LOAD( "Sound1.1C.27C4001", 0x000000, 0x080000, CRC(5fb63e84) SHA1(6fad8e76162c81b2cfa4778effb81b78ed4fa299) ) + ROM_LOAD( "Sound2.2D.27C4001", 0x080000, 0x080000, CRC(8924c6cc) SHA1(c76e6cfcf92a2c2834de62d7136c69e6edda46cc) ) + ROM_LOAD( "Sound3.3A.27C4001", 0x100000, 0x080000, CRC(18cfa7f4) SHA1(201ea186eb3af9138db6699c9dcf527795f7c0db) ) + ROM_LOAD( "Sound4.4B.27C4001", 0x180000, 0x080000, CRC(61a8510b) SHA1(177e56c374aa5697545ede28140cb42b5a4b737b) ) +ROM_END + + + +GAME( 1996, calcune, 0, calcune, calcune, calcune_state, calcune, ROT0, "Yuvo", "Calcune (Japan, prototype)", 0 ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 11c8bde3372..11ce34f844a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -9194,6 +9194,9 @@ calchase // (c) 1999 The Game Room eggsplc // (c) 2002 The Game Room hostinv // (c) 1998 The Game Room +@source:calcune.cpp +calcune + @source:calomega.cpp comg074 // (c) 1981 Cal Omega Inc. comg076 // (c) 1981 Cal Omega Inc. -- cgit v1.2.3-70-g09d2 From 9ade546c3670bd0c5e32e875a7a5a5675e8e3da5 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 00:31:15 -0500 Subject: vectrex: Quick and dirty regression fix (nw) --- src/mame/video/vectrex.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mame/video/vectrex.cpp b/src/mame/video/vectrex.cpp index 50723ccc07e..d960743ae9e 100644 --- a/src/mame/video/vectrex.cpp +++ b/src/mame/video/vectrex.cpp @@ -91,7 +91,7 @@ WRITE8_MEMBER(vectrex_state::vectrex_via_w) case 9: m_via_timer2 = (m_via_timer2 & 0x00ff) | (data << 8); - period = (attotime::from_hz(m_maincpu->unscaled_clock()) * m_via_timer2); + period = m_maincpu->cycles_to_attotime(m_via_timer2); if (m_reset_refresh) m_refresh->adjust(period, 0, period); @@ -206,8 +206,8 @@ TIMER_CALLBACK_MEMBER(vectrex_state::update_signal) if (!m_ramp) { - length = m_maincpu->unscaled_clock() * INT_PER_CLOCK - * (machine().time() - m_vector_start_time).as_double(); + length = m_maincpu->clocks_to_cycles(m_maincpu->clock()) * INT_PER_CLOCK + * (machine().time() - m_vector_start_time).as_double()); m_x_int += length * (m_analog[A_X] + m_analog[A_ZR]); m_y_int += length * (m_analog[A_Y] + m_analog[A_ZR]); @@ -309,7 +309,7 @@ WRITE8_MEMBER(vectrex_state::v_via_pb_w) +(double)(m_pen_y - m_y_int) * (m_pen_y - m_y_int); d2 = b2 - ab * ab / a2; if (d2 < 2e10 && m_analog[A_Z] * m_blank > 0) - m_lp_t->adjust(attotime::from_double(ab / a2 / (m_maincpu->unscaled_clock() * INT_PER_CLOCK))); + m_lp_t->adjust(attotime::from_double(ab / a2 / (m_maincpu->clocks_to_cycles(m_maincpu->clock()) * INT_PER_CLOCK))); } } } -- cgit v1.2.3-70-g09d2 From 4131691800760bb1f3a1df7aa35a626617a5b532 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 10 Dec 2017 08:18:17 +0100 Subject: vectrex.cpp: fixed compile (nw) --- src/mame/video/vectrex.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/video/vectrex.cpp b/src/mame/video/vectrex.cpp index d960743ae9e..194d5fc1f2d 100644 --- a/src/mame/video/vectrex.cpp +++ b/src/mame/video/vectrex.cpp @@ -207,7 +207,7 @@ TIMER_CALLBACK_MEMBER(vectrex_state::update_signal) if (!m_ramp) { length = m_maincpu->clocks_to_cycles(m_maincpu->clock()) * INT_PER_CLOCK - * (machine().time() - m_vector_start_time).as_double()); + * (machine().time() - m_vector_start_time).as_double(); m_x_int += length * (m_analog[A_X] + m_analog[A_ZR]); m_y_int += length * (m_analog[A_Y] + m_analog[A_ZR]); -- cgit v1.2.3-70-g09d2 From 5565a37744a17d374f6f3074c357bea653fedb13 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 10 Dec 2017 09:01:38 +0100 Subject: new working clone --------------------------- Fantasy (Germany, set 2) [Corrado Tomaselli, The Dumping Union] --- src/mame/drivers/snk6502.cpp | 37 ++++++++++++++++++++++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/snk6502.cpp b/src/mame/drivers/snk6502.cpp index 4482b4a1e7d..2ae1ce7a377 100644 --- a/src/mame/drivers/snk6502.cpp +++ b/src/mame/drivers/snk6502.cpp @@ -1392,6 +1392,40 @@ ROM_START( fantasyg ) ROM_LOAD( "fs_f_11.bin", 0x5000, 0x0800, CRC(3a352e1f) SHA1(af880ce3daed0877d454421bd08c86ff71f6bf72) ) ROM_END +// SK-7A and SK-6 PCBs +ROM_START( fantasyg2 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "ts5.bin", 0x3000, 0x1000, CRC(6edca14e) SHA1(d9152e212f2b3cdb6e7968e4e7638454ea02c4a5) ) + ROM_LOAD( "fs1.bin", 0x4000, 0x1000, CRC(d99656e8) SHA1(6f5febaeca2ec167523f48361ae2395772bcef53) ) + ROM_LOAD( "ts2.bin", 0x5000, 0x1000, CRC(2db6ce28) SHA1(18cced543f27664b3eaddf103a41580a905ffae1) ) + ROM_LOAD( "ts3.bin", 0x6000, 0x1000, CRC(1a0aa7c5) SHA1(c8f34618ffc98c73db7067851de24f245b8988ad) ) + ROM_LOAD( "fs4.bin", 0x7000, 0x1000, CRC(c02ad442) SHA1(a90b2d04fc2e8b2dda634c18eafb88007eaedc67) ) + ROM_LOAD( "fs6.bin", 0x8000, 0x1000, CRC(e5b91bc2) SHA1(85515eb57c8040fc95a9c62706e1a504e6749f66) ) + ROM_RELOAD( 0xf000, 0x1000 ) /* for the reset and interrupt vectors */ + ROM_LOAD( "fs7.bin", 0x9000, 0x1000, CRC(cc18428e) SHA1(c7c0a031434cf9ce3c450b0c5dc2b154b08d19cf) ) + ROM_LOAD( "fs8.bin", 0xa000, 0x1000, CRC(371129fe) SHA1(c21759222aebcc9ea1292e367a41ac43a4dd3554) ) + ROM_LOAD( "fs9.bin", 0xb000, 0x1000, CRC(49574d4a) SHA1(37cae0df7e8705c300f684b3351b5bdba5e44ea2) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "fs10.bin", 0x0000, 0x1000, CRC(86a801c3) SHA1(c040b5807c25823072f7e8ceab57b95d4bed89fe) ) + ROM_LOAD( "fs11.bin", 0x1000, 0x1000, CRC(9dfff71c) SHA1(7a7c017170f2ea903a730a4e5ab69db379a4fc61) ) + + ROM_REGION( 0x0040, "proms", 0 ) + ROM_LOAD( "fantasy.ic7", 0x0000, 0x0020, CRC(361a5e99) SHA1(b9777ce658549c03971bd476482d5cc0be27d3a9) ) /* foreground colors */ + ROM_LOAD( "fantasy.ic6", 0x0020, 0x0020, CRC(33d974f7) SHA1(a6f6a531dec3f454b477bfdda8e213e9cad42748) ) /* background colors */ + + ROM_REGION( 0x1800, "snk6502", 0 ) /* sound ROMs */ + ROM_LOAD( "fs_b_51.bin", 0x0000, 0x0800, CRC(48094ec5) SHA1(7d6118133bc1eb8ebc5d8a95d10ef842daffef89) ) + ROM_LOAD( "fs_a_52.bin", 0x0800, 0x0800, CRC(1d0316e8) SHA1(6a3ab289b5fefef8663514bd1d5817c70fe58882) ) + ROM_LOAD( "fs_c_53.bin", 0x1000, 0x0800, CRC(49fd4ae8) SHA1(96ff1267c0ffab1e8a0769fa869516e2546ab640) ) + + ROM_REGION( 0x5800, "speech", 0 ) /* space for the speech ROMs (not supported) */ + //ROM_LOAD( "hd38882.bin", 0x0000, 0x4000, NO_DUMP ) /* HD38882 internal ROM */ + ROM_LOAD( "fs_d_7.bin", 0x4000, 0x0800, CRC(a7ef4cc6) SHA1(8df71cb18fcfe9a2f592f83bc01cf2314ae30e32) ) + ROM_LOAD( "fs_e_8.bin", 0x4800, 0x0800, CRC(19b8fb3e) SHA1(271c76f68866c28bc6755238a71970d5f7c81ecb) ) + ROM_LOAD( "fs_f_11.bin", 0x5000, 0x0800, CRC(3a352e1f) SHA1(af880ce3daed0877d454421bd08c86ff71f6bf72) ) +ROM_END + ROM_START( fantasyj ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "fs5jic12.bin", 0x3000, 0x1000, CRC(dd1eac89) SHA1(d63078d4666e3c6db0c9b3f8b45ef81606ed5a4f) ) @@ -1673,8 +1707,9 @@ GAME( 1981, satansatind, satansat, satansat, satansat, snk6502_state, 0, ROT90, GAME( 1981, vanguard, 0, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK", "Vanguard (SNK)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1981, vanguardc, vanguard, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK (Centuri license)", "Vanguard (Centuri)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1981, vanguardj, vanguard, vanguard, vanguard, snk6502_state, 0, ROT90, "SNK", "Vanguard (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1981, fantasyg, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? GAME( 1981, fantasyu, 0, fantasy, fantasyu, snk6502_state, 0, ROT90, "SNK (Rock-Ola license)", "Fantasy (US)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1981, fantasyg, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? +GAME( 1981, fantasyg2, fantasyu, fantasy, fantasy, snk6502_state, 0, ROT90, "SNK", "Fantasy (Germany, set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // bootleg? GAME( 1981, fantasyj, fantasyu, fantasy, fantasyu, snk6502_state, 0, ROT90, "SNK", "Fantasy (Japan)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1982, pballoon, 0, pballoon, pballoon, snk6502_state, 0, ROT90, "SNK", "Pioneer Balloon", MACHINE_SUPPORTS_SAVE ) GAME( 1982, pballoonr, pballoon, pballoon, pballoon, snk6502_state, 0, ROT90, "SNK (Rock-Ola license)", "Pioneer Balloon (Rock-Ola license)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 11c8bde3372..2b35ac7c7b9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34687,6 +34687,7 @@ worldwar // A6004 'WW' (c) 1987 @source:snk6502.cpp fantasyg // (c) 1981 SNK +fantasyg2 // (c) 1981 SNK fantasyj // (c) 1981 SNK fantasyu // (c) 1981 Rock-Ola nibbler // (c) 1982 Rock-ola (version 9) -- cgit v1.2.3-70-g09d2 From 3e4a6aecb7e1c874730242e99af7c892f0fd33f3 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Sun, 10 Dec 2017 08:27:45 +0000 Subject: remaining afighter sets use an FD1089B with the same key as the FD1089A (nw) (#2915) --- src/mame/drivers/segas16a.cpp | 8 ++++---- src/mame/drivers/segas16b.cpp | 10 +++++----- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp index 6650af776f7..3514bb5aa4b 100644 --- a/src/mame/drivers/segas16a.cpp +++ b/src/mame/drivers/segas16a.cpp @@ -2308,7 +2308,7 @@ ROM_START( afighterc ) ROM_LOAD( "epr-10284.12", 0x00000, 0x8000, CRC(8ff09116) SHA1(8b99b6d2499897cfbd037a7e7cf5bc53bce8a63a) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END ROM_START( afighterd ) @@ -2339,7 +2339,7 @@ ROM_START( afighterd ) ROM_LOAD( "epr-10284.12", 0x00000, 0x8000, CRC(8ff09116) SHA1(8b99b6d2499897cfbd037a7e7cf5bc53bce8a63a) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END //************************************************************************************************************************* @@ -3933,8 +3933,8 @@ GAME( 1988, aceattaca, aceattac, aceattaca_fd1094, aceattaca, segas16a GAME( 1986, afighter, 0, system16a_fd1089a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089A 317-0018)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, afightera, afighter, system16a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (unprotected)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, afighterb, afighter, system16a_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (unprotected, analog controls)", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, afighterc, afighter, system16a_fd1089a_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089A 317-unknown)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // encrypted version of afightera -GAME( 1986, afighterd, afighter, system16a_fd1089a_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (FD1089A 317-unknown, analog controls)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // encrypted version of afighterb +GAME( 1986, afighterc, afighter, system16a_fd1089b_no7751, afighter, segas16a_state, generic, ROT270, "Sega", "Action Fighter (FD1089B 317-unknown)", MACHINE_SUPPORTS_SAVE ) // encrypted version of afightera (maybe 317-0017) +GAME( 1986, afighterd, afighter, system16a_fd1089b_no7751, afighter_analog, afighter_16a_analog_state,generic, ROT270, "Sega", "Action Fighter (FD1089B 317-unknown, analog controls)", MACHINE_SUPPORTS_SAVE ) // encrypted version of afighterb GAME( 1986, alexkidd, 0, system16a, alexkidd, segas16a_state,generic, ROT0, "Sega", "Alex Kidd: The Lost Stars (set 2, unprotected)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, alexkidd1, alexkidd, system16a_fd1089a, alexkidd, segas16a_state,generic, ROT0, "Sega", "Alex Kidd: The Lost Stars (set 1, FD1089A 317-0021)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index a5de4a65df9..19aef83036c 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -4226,11 +4226,11 @@ ROM_START( afighterf ) ROM_LOAD( "epr10039.bin", 0x00000, 0x8000, CRC(b04757b0) SHA1(24bface5a23ed658675f414c9937bf9d7f7ed5ec) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END -ROM_START( afighterg ) // could be 16A +ROM_START( afighterg ) ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code ROM_LOAD16_BYTE( "epr10160.bin", 0x00001, 0x08000, CRC(86f020da) SHA1(e7ac4b70dc375d9e2491f1a90ae154699e7627a2) ) // == encrypted 10169 (not perfect match) (same rev as 10354) ROM_LOAD16_BYTE( "epr10163.bin", 0x00000, 0x08000, CRC(6d62eccd) SHA1(a400850f717a71a3e0059173d77f0bd067f1b520) ) @@ -4258,7 +4258,7 @@ ROM_START( afighterg ) // could be 16A ROM_LOAD( "epr10039.bin", 0x00000, 0x8000, CRC(b04757b0) SHA1(24bface5a23ed658675f414c9937bf9d7f7ed5ec) ) ROM_REGION( 0x2000, "maincpu:key", 0 ) // decryption key - ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "317-unknown.key", 0x0000, 0x2000, CRC(fee04be8) SHA1(c58d78299ef4cede517be823a8a8a90e46c6ba0d) ) ROM_END @@ -9090,8 +9090,8 @@ GAME( 1987, aliensyn3, aliensyn, system16b_fd1089a, aliensyn, segas16b_state, GAME( 1987, aliensynj, aliensyn, system16b_fd1089a, aliensynj,segas16b_state,generic_5358_small, ROT0, "Sega", "Alien Syndrome (set 6, Japan, new, System 16B, FD1089A 317-0033)", 0 ) GAME( 1986, afightere, afighter, system16b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, unprotected, analog controls)", 0 ) -GAME( 1986, afighterf, afighter, system16b_fd1089a, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown, analog controls)", MACHINE_NOT_WORKING ) // encrypted version of afightere -GAME( 1986, afighterg, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-unknown)", MACHINE_NOT_WORKING ) // same encryption as afighterf +GAME( 1986, afighterf, afighter, system16b_fd1089b, afighter_analog,afighter_16b_analog_state,generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089B 317-unknown, analog controls)", 0 ) // encrypted version of afightere +GAME( 1986, afighterg, afighter, system16b_fd1089b, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089B 317-unknown)", 0 ) // same encryption as afighterf GAME( 1986, afighterh, afighter, system16b_fd1089a, afighter, segas16b_state, generic_5358_small, ROT270, "Sega", "Action Fighter (System 16B, FD1089A 317-0018)", 0 ) // same rev as afighterg GAME( 1988, altbeast, 0, system16b_i8751, altbeast, segas16b_state,generic_5521, ROT0, "Sega", "Altered Beast (set 8) (8751 317-0078)", 0 ) -- cgit v1.2.3-70-g09d2 From 9cd0073c96dce6cea9c4518d985ddbdc8cc3e131 Mon Sep 17 00:00:00 2001 From: sjy96525 <1580594783@qq.com> Date: Sun, 10 Dec 2017 17:10:20 +0800 Subject: Correct Operation Thunder Hurricane year (nw) --- src/mame/drivers/gticlub.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/gticlub.cpp b/src/mame/drivers/gticlub.cpp index 8deb21c4696..985218b3126 100644 --- a/src/mame/drivers/gticlub.cpp +++ b/src/mame/drivers/gticlub.cpp @@ -1500,8 +1500,8 @@ GAME( 1996, gticlub, 0, gticlub, gticlub, gticlub_state, gticlub, R GAME( 1996, gticlubu, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver UAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1996, gticluba, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver AAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1996, gticlubj, gticlub, gticlub, gticlub, gticlub_state, gticlub, ROT0, "Konami", "GTI Club (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1996, thunderh, 0, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver EAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) -GAME( 1996, thunderhu, thunderh, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver UAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 1997, thunderh, 0, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver EAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +GAME( 1997, thunderhu, thunderh, thunderh, thunderh, gticlub_state, gticlub, ROT0, "Konami", "Operation Thunder Hurricane (ver UAA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) GAME( 1997, slrasslt, 0, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault (ver UAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // Based on Revised code GAME( 1997, slrassltj, slrasslt, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault Revised (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1997, slrassltj1, slrasslt, slrasslt, slrasslt, gticlub_state, gticlub, ROT0, "Konami", "Solar Assault (ver JAA)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -- cgit v1.2.3-70-g09d2 From fbaf7dd874a09709f9434a0469724ec0af6fcaac Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 10 Dec 2017 10:12:00 +0100 Subject: new not working clone ----------------------------------- Dangerous Curves (Ver 2.9 O) [Muddymusic, Porchy, The Dumping Union] --- src/mame/drivers/taitojc.cpp | 60 +++++++++++++++++++++++++++++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 60 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp index 124b5e007e8..542f0179bd0 100644 --- a/src/mame/drivers/taitojc.cpp +++ b/src/mame/drivers/taitojc.cpp @@ -1992,6 +1992,63 @@ ROM_START( landgearja ) /* Landing Gear Ver 3.0 J, is there an alternate set wit ROM_END ROM_START( dangcurv ) + ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ + ROM_LOAD32_BYTE( "e09_32-1.ic36", 0x000000, 0x80000, CRC(82c0af83) SHA1(307e2dd441116ffaad0d5783cd139bde8fc23460) ) + ROM_LOAD32_BYTE( "e09_33-1.ic37", 0x000001, 0x80000, CRC(be6eca0b) SHA1(edb4ad0d379132e64c1238191ab17bd4400f3322) ) + ROM_LOAD32_BYTE( "e09_34-1.ic38", 0x000002, 0x80000, CRC(553de745) SHA1(474e96c810fee8097059e201b95810b3235c6cad) ) + ROM_LOAD32_BYTE( "e09_35-1.ic39", 0x000003, 0x80000, CRC(a60273fd) SHA1(511191506f04320775787e294a59a94c07364006) ) + + ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */ + ROM_LOAD16_BYTE( "e09-27.ic30", 0x100001, 0x40000, CRC(6d54839c) SHA1(a28c9b0727128b82bb0fa71dc951e3f03ee45e1b) ) + ROM_LOAD16_BYTE( "e09-28.ic31", 0x100000, 0x40000, CRC(566d7d83) SHA1(92661ccb631f843bf704c50d54fae28f6b5b272b) ) + + ROM_REGION( 0x4000, "dsp", ROMREGION_ERASE00 ) /* TMS320C51 internal rom */ + ROM_LOAD16_WORD( "e07-11.ic29", 0x0000, 0x4000, NO_DUMP ) + + ROM_REGION( 0x010000, "sub", 0 ) /* MC68HC11M0 code */ + ROM_LOAD( "e09-29.ic65", 0x000000, 0x010000, CRC(80ac1428) SHA1(5a2a1e60a11ecdb8743c20ddacfb61f9fd00f01c) ) + + ROM_REGION( 0x1800000, "gfx1", 0 ) + ROM_LOAD32_WORD( "e09-05.ic9", 0x0800002, 0x200000, CRC(a948782f) SHA1(2a2b0d2955e036ddf424c54131435a20dbba3dd4) ) + ROM_LOAD32_WORD( "e09-13.ic22", 0x0800000, 0x200000, CRC(985859e2) SHA1(8af9a73eba2151a5ef60799682fe667663a42743) ) + ROM_LOAD32_WORD( "e09-06.ic10", 0x0c00002, 0x200000, CRC(218dcb5b) SHA1(72aedd2890e076540195d738c76ba446769c8e89) ) + ROM_LOAD32_WORD( "e09-14.ic23", 0x0c00000, 0x200000, CRC(6d123616) SHA1(01ac1e920f7c4a03adf365c8a7831b8385f0b78b) ) + ROM_LOAD32_WORD( "e09-07.ic11", 0x1000002, 0x200000, CRC(37fd7efc) SHA1(24a275d302ec8940479d15f1aeb96a288868bd41) ) + ROM_LOAD32_WORD( "e09-15.ic24", 0x1000000, 0x200000, CRC(0d773f3b) SHA1(f867a4d5956c2ebfa9858499d9716b4dc723d76b) ) + ROM_LOAD32_WORD( "e09-08.ic12", 0x1400002, 0x200000, CRC(5c080485) SHA1(c950cd00df5b6d2d0a119ba318fa8b0a3f471b29) ) + ROM_LOAD32_WORD( "e09-16.ic25", 0x1400000, 0x200000, CRC(35cb8346) SHA1(c2ecedd3c2a28213ef83e776f3007c974128189b) ) + + ROM_REGION( 0x1000000, "gfx2", 0 ) /* only accessible to the TMS */ + ROM_LOAD( "e09-01.ic5", 0x0000000, 0x200000, CRC(22a6a53d) SHA1(6efa89151cd5ec43ab9bfa9b92694eb0018dd227) ) + ROM_LOAD( "e09-02.ic6", 0x0200000, 0x200000, CRC(405e2969) SHA1(376b9dd548d876af6798553a6da5deed4de00b76) ) + ROM_LOAD( "e09-03.ic7", 0x0400000, 0x200000, CRC(15327754) SHA1(bf08ab80875b400700241a66715e229dae6752d1) ) + ROM_LOAD( "e09-04.ic8", 0x0600000, 0x200000, CRC(fd598d6e) SHA1(679d9d64a0cd031a6c8cb5e170b77fc5811b6d73) ) + ROM_LOAD( "e09-09.ic18", 0x0800000, 0x200000, CRC(a527b387) SHA1(790240b4dfcdf2bf70edb943ec7aeb2f0d8cdfa9) ) + ROM_LOAD( "e09-10.ic19", 0x0a00000, 0x200000, CRC(4de6253c) SHA1(33517c0895b7ee04f4a84074d0b7bf42b53d5816) ) + ROM_LOAD( "e09-11.ic20", 0x0c00000, 0x200000, CRC(18cc0ba7) SHA1(626929a501def6f1b8bd6a468786efb0b0dda9fa) ) + ROM_LOAD( "e09-12.ic21", 0x0e00000, 0x200000, CRC(3273e438) SHA1(e9581d52f5db1c1924a860464579332a2f23e713) ) + + ROM_REGION16_BE( 0x1000000, "ensoniq.0", ROMREGION_ERASE00 ) + ROM_LOAD16_BYTE( "e09-17.ic32", 0x000000, 0x200000, CRC(a8a6512e) SHA1(71bd3ccd65b731270b92da334b9fb99c28e267fe) ) + ROM_LOAD16_BYTE( "e09-18.ic33", 0x400000, 0x200000, CRC(bdf1f5eb) SHA1(a568a99a90e0afbcd26ddd320f515ed62cf0db1a) ) + ROM_LOAD16_BYTE( "e09-19.ic34", 0x800000, 0x200000, CRC(3626c7ed) SHA1(7535f0457b3d9fe1d54712a26322d6144b9e7de6) ) + ROM_LOAD16_BYTE( "e09-20.ic35", 0xc00000, 0x200000, CRC(9652a5c4) SHA1(2933e4e8e57ff618ce21721036d96347471c5539) ) + + ROM_REGION( 0x1000, "pals", 0 ) /* PALCE 16V8 (unused now) */ + ROM_LOAD( "e07-02.ic4", 0x0000, 0x0117, CRC(21b3b349) SHA1(2c468a355caeb541fc649842f228fdc14b01afad) ) + ROM_LOAD( "e07-03.ic50", 0x0000, 0x0117, CRC(af68d73a) SHA1(11c9a6eee715066dc06766cc89774081ffedab3b) ) + ROM_LOAD( "e07-04.ic115", 0x0000, 0x0117, CRC(98383e84) SHA1(446e7a38f933b55706de71884f764c512912f571) ) + ROM_LOAD( "e07-05.ic22", 0x0000, 0x0117, CRC(3fe21bb8) SHA1(744dcfef2b2dbb2aa4b69d47e03cec7881e4cd4b) ) + ROM_LOAD( "e07-06.ic37", 0x0000, 0x0117, CRC(5cbeb11c) SHA1(e8cb4898d1285b72ae7ce003bfac33897417bb91) ) + ROM_LOAD( "e07-07.ic49", 0x0000, 0x0117, CRC(8914317b) SHA1(8b782ff4f2783d8531d0d9abe0215ecc10cd1f49) ) + ROM_LOAD( "e07-08.ic65", 0x0000, 0x0117, CRC(1831ddf3) SHA1(96bc0eb4b49c6d646e91630bb174f75c5d29337a) ) + ROM_LOAD( "e07-09.ic82", 0x0000, 0x0117, CRC(6ab127fb) SHA1(9beb74436968854fedacea915587e8fdffaec6c8) ) + ROM_LOAD( "e07-10.ic116", 0x0000, 0x0117, CRC(24d7939c) SHA1(fd3d87471252805de01c7c0abd60e55669885de0) ) + ROM_LOAD( "e09-21.ic69", 0x0000, 0x0117, CRC(ab2c7402) SHA1(df8b63a67bf693f9023794ad4e787e3248d10b7e) ) + ROM_LOAD( "e09-22.ic73", 0x0000, 0x0117, CRC(d43972cc) SHA1(ed9454d1a225a5fb6fefc0ae1aebe2b439ed460f) ) +ROM_END + +ROM_START( dangcurvj ) ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ ROM_LOAD32_BYTE( "e09-23.ic36", 0x000000, 0x80000, CRC(b4cdadd6) SHA1(84bd1d055ff15afb5438cd5151abf78b0000cebc) ) ROM_LOAD32_BYTE( "e09-24.ic37", 0x000001, 0x80000, CRC(fb2fc795) SHA1(2f58d043ab9fc0269a5b6827009777cd7ab832fc) ) @@ -2036,7 +2093,8 @@ ROM_START( dangcurv ) ROM_END -GAME( 1995, dangcurv, 0, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.2 J)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.2 J 1995.07.20 17:45 +GAME( 1995, dangcurv, 0, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.9 O)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.9 O 1995.08.24 17:45 +GAME( 1995, dangcurvj, dangcurv, taitojc, dangcurv, taitojc_state, dangcurv, ROT0, "Taito", "Dangerous Curves (Ver 2.2 J)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_TIMING ) // DANGEROUS CURVES VER 2.2 J 1995.07.20 17:45 GAME( 1995, landgear, 0, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 4.2 O)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 4.2 O Feb 8 1996 09:46:22 GAME( 1995, landgearj, landgear, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 4.2 J)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 4.2 J Feb 8 1996 09:46:22 GAME( 1995, landgeara, landgear, taitojc, landgear, taitojc_state, taitojc, ROT0, "Taito", "Landing Gear (Ver 3.1 O)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING ) // LANDING GEAR VER 3.1 O Feb 8 1996 09:46:22 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 2b35ac7c7b9..3b691d48269 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -36117,6 +36117,7 @@ zooo // 2004.05 Zooo @source:taitojc.cpp dangcurv // 1995.?? E09 (c) 1995 Taito Corporation +dangcurvj // 1995.?? E09 (c) 1995 Taito Corporation dendego // 1997.03 E35 (c) 1996 Taito Corporation (Japan) - Ver 2.2 J dendego2 // 1998.03 E52 (c) 1998 Taito Corporation (Japan) - Ver 2.5 J dendego23k // 1998.08 E52 (c) 1998 Taito Corporation (Japan) - Ver 2.20 J -- cgit v1.2.3-70-g09d2 From 9dc526f1c6704c82f8a97e6fb7fb03a0d7fd1293 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sun, 10 Dec 2017 11:40:21 +0200 Subject: pgm2: mcu timing tweak to make kov2nl happy, hook shared ram (nw) --- src/mame/drivers/pgm2.cpp | 37 +++++++++++++++++++++++++++++++------ src/mame/includes/pgm2.h | 5 +++++ 2 files changed, 36 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index ebf4028652f..7a05637d6ec 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -124,6 +124,21 @@ INTERRUPT_GEN_MEMBER(pgm2_state::igs_interrupt) m_arm_aic->set_irq(0x47); } +WRITE16_MEMBER(pgm2_state::share_bank_w) +{ + COMBINE_DATA(&m_share_bank); +} + +READ8_MEMBER(pgm2_state::shareram_r) +{ + return m_shareram[offset + (m_share_bank & 1) * 128]; +} +WRITE8_MEMBER(pgm2_state::shareram_w) +{ + m_shareram[offset + (m_share_bank & 1) * 128] = data; +} + + TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2) { m_arm_aic->set_irq(0x46); @@ -146,6 +161,7 @@ void pgm2_state::mcu_command(bool is_command) case 0xf6: // get result m_mcu_regs[3] = m_mcu_result0; m_mcu_regs[4] = m_mcu_result1; + m_mcu_last_cmd = 0; break; case 0xe0: // command port test m_mcu_result0 = m_mcu_regs[0]; @@ -155,9 +171,13 @@ void pgm2_state::mcu_command(bool is_command) case 0xe1: // shared ram access (unimplemented) { // MCU access to RAM shared at 0x30100000, 2x banks, in the same time CPU and MCU access different banks - // where is offset ? -// uint8_t mode = m_mcu_regs[0] >> 16; // 0 - ???, 1 - read, 2 - write -// uint8_t data = m_mcu_regs[0] >> 24; + uint8_t mode = m_mcu_regs[0] >> 16; // 0 - ???, 1 - read, 2 - write + uint8_t data = m_mcu_regs[0] >> 24; + if (mode == 2) + { + // where is offset ? so far assume this command fill whole page + memset(&m_shareram[(~m_share_bank & 1) * 128], data, 128); + } m_mcu_result0 = cmd; m_mcu_result1 = 0; } @@ -188,10 +208,11 @@ void pgm2_state::mcu_command(bool is_command) } else // next step { - if (m_mcu_last_cmd && m_mcu_last_cmd != 0xf6) + if (m_mcu_last_cmd) { m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F20000; // set "command done and return data" status - m_mcu_timer->adjust(attotime::from_msec(1)); + m_mcu_timer->adjust(attotime::from_usec(100)); + m_mcu_last_cmd = 0; } } } @@ -244,9 +265,10 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) what is the real size? */ AM_RANGE(0x300e0000, 0x300e03ff) AM_RAM AM_SHARE("lineram") AM_MIRROR(0x000fc00) - AM_RANGE(0x30100000, 0x301000ff) AM_RAM // MCU shared RAM, access at even bytes only (8bit device at 16bit bus?), 2x banks switched via 0x30120032 register (16bit) + AM_RANGE(0x30100000, 0x301000ff) AM_READWRITE8(shareram_r, shareram_w, 0x00ff00ff) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll + AM_RANGE(0x30120030, 0x30120033) AM_WRITE16(share_bank_w, 0xffff0000) AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs @@ -370,6 +392,8 @@ void pgm2_state::machine_start() save_item(NAME(m_mcu_result0)); save_item(NAME(m_mcu_result1)); save_item(NAME(m_mcu_last_cmd)); + save_item(NAME(m_shareram)); + save_item(NAME(m_share_bank)); } void pgm2_state::machine_reset() @@ -377,6 +401,7 @@ void pgm2_state::machine_reset() m_spritekey = 0; m_realspritekey = 0; m_mcu_last_cmd = 0; + m_share_bank = 0; } static const gfx_layout tiles8x8_layout = diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 8e65d8af58a..7f912420bc3 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -48,6 +48,9 @@ public: DECLARE_WRITE32_MEMBER(fg_videoram_w); DECLARE_WRITE32_MEMBER(bg_videoram_w); DECLARE_WRITE32_MEMBER(mcu_w); + DECLARE_WRITE16_MEMBER(share_bank_w); + DECLARE_READ8_MEMBER(shareram_r); + DECLARE_WRITE8_MEMBER(shareram_w); DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); @@ -107,6 +110,8 @@ private: uint32_t m_realspritekey; int m_sprite_predecrypted; + uint8_t m_shareram[0x100]; + uint16_t m_share_bank; uint32_t m_mcu_regs[8]; uint32_t m_mcu_result0; uint32_t m_mcu_result1; -- cgit v1.2.3-70-g09d2 From 601d900b0f0533461cedb820c3823c3a6b3c01e5 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 10 Dec 2017 11:15:53 +0100 Subject: ironhors.cpp: added hsync measurement, removed wrong comment (nw) --- src/mame/drivers/ironhors.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/ironhors.cpp b/src/mame/drivers/ironhors.cpp index 209bbe35b73..29e7a6703fb 100644 --- a/src/mame/drivers/ironhors.cpp +++ b/src/mame/drivers/ironhors.cpp @@ -368,7 +368,9 @@ M6809E runs at 1.532mhz ( NOT 3.072mhz) Vsync is 61hz -These clocks make the emulation run too fast. Real hardware video: http://d.hatena.ne.jp/video/niconico/sm3842410 +Hsync is 15,56khz + +These clocks make the emulation run too fast. */ static MACHINE_CONFIG_START( ironhors ) -- cgit v1.2.3-70-g09d2 From 35ae26c6b4c1b599454f71532c85e9cf975c48fb Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 10 Dec 2017 11:46:04 +0100 Subject: new working machine --------------------------------- In Your Face (World, prototype) [ShouTime, Darksoft, Ryan Holtz, Surgeville, Sean Sutton, gamez fan, Smitdogg, The Dumping Union] --- src/mame/drivers/megasys1.cpp | 90 +++++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 91 insertions(+) diff --git a/src/mame/drivers/megasys1.cpp b/src/mame/drivers/megasys1.cpp index a86dc50fc0d..023c5708e0c 100644 --- a/src/mame/drivers/megasys1.cpp +++ b/src/mame/drivers/megasys1.cpp @@ -1106,6 +1106,49 @@ static INPUT_PORTS_START( kazan ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( inyourfa ) + PORT_INCLUDE( megasys1_generic ) + + PORT_START("DSW") + PORT_DIPNAME( 0x0003, 0x0003, "Game Time" ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x0002, "00:50" ) + PORT_DIPSETTING( 0x0001, "01:00" ) + PORT_DIPSETTING( 0x0003, "01:10" ) + PORT_DIPSETTING( 0x0000, "01:20" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0004, 0x0004, "SW1:3" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW1:4" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW1:5" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW1:6" ) + PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW1:7" ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2,3") + PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0200, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0700, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0300, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x0500, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x0100, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x0600, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) ) + PORT_DIPNAME( 0x3800, 0x3800, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:4,5,6") + PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x3800, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x1800, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x2800, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x3000, DEF_STR( 1C_5C ) ) + PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7") + PORT_DIPSETTING( 0x4000, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPNAME( 0x8000, 0x8000, "Freeze Screen (Cheat)") PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) +INPUT_PORTS_END + static INPUT_PORTS_START( jitsupro ) PORT_INCLUDE( hachoo ) @@ -2989,6 +3032,52 @@ ROM_START( iganinju ) ROM_LOAD( "iga.131", 0x0000, 0x0200, CRC(1d877538) SHA1(a5be0dc65dcfc36fbba10d1fddbe155e24b6122f) ) ROM_END +ROM_START( inyourfa ) + ROM_REGION( 0x60000, "maincpu", 0 ) /* Main CPU Code */ + ROM_LOAD16_BYTE( "02.27C1001", 0x000000, 0x020000, CRC(ae77e5b7) SHA1(222e1f4c3d82cdedb88ec524ea11500145bc8c87) ) + ROM_LOAD16_BYTE( "01.27C1001", 0x000001, 0x020000, CRC(e5ea92ef) SHA1(0afcaa1451572aee7486b76c21bdd4617d2b25d2) ) + ROM_LOAD16_BYTE( "03.27C512", 0x040000, 0x010000, CRC(a1efe9be) SHA1(3f49c337f0cd8634d0049c80631e32ea887d8fef) ) + ROM_LOAD16_BYTE( "04.27C512", 0x040001, 0x010000, CRC(f786cf3e) SHA1(83de4e679e34bbd2bdad62f2c3b707cf032942b5) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound CPU Code */ + ROM_LOAD16_BYTE( "05.27C512", 0x000000, 0x010000, CRC(1737ed64) SHA1(20be59c43d7975fcc5048f1ee9ed5af893bdef85) ) + ROM_LOAD16_BYTE( "06.27C512", 0x000001, 0x010000, CRC(9f12bcb9) SHA1(7c5faf6a295b2124e16823f50e57b234b6127a38) ) + + ROM_REGION( 0x1000, "mcu", 0 ) /* M50747 MCU Code */ + ROM_LOAD( "m50747", 0x0000, 0x1000, NO_DUMP ) + + ROM_REGION( 0x080000, "scroll0", 0 ) /* Scroll 0 */ + ROM_LOAD( "11.27C1001", 0x000000, 0x020000, CRC(451a1428) SHA1(c017ef4dd3dffd26a93f5b926d80fd5e7bd7dea1) ) + ROM_LOAD( "12.27C1001", 0x020000, 0x020000, CRC(9ead7432) SHA1(0690b640ebe9d1461f44040a33236705a303dc7e) ) + ROM_LOAD( "13.27C1001", 0x040000, 0x020000, CRC(7e39842a) SHA1(00a4c86e8ef6e8e20d8f01eccd7d37f46be5f904) ) + ROM_LOAD( "14.27C1001", 0x060000, 0x020000, CRC(a91a3569) SHA1(0e530cdc0cf5ff0db589fb644c2181d35701fb2e) ) + + ROM_REGION( 0x080000, "scroll1", 0 ) /* Scroll 1 */ + ROM_LOAD( "15.27C1001", 0x000000, 0x020000, CRC(420081b6) SHA1(02fedf7bc18a1b8f12b4e549a910801c0e315a32) ) + ROM_LOAD( "16.27C1001", 0x020000, 0x020000, CRC(87b1a582) SHA1(75a8762041cbd72fad821083ce9ea65474e4b2c8) ) + ROM_LOAD( "17.27C1001", 0x040000, 0x020000, CRC(00857146) SHA1(1a2e6ac6efbec4a825525933b92de933233ad3b2) ) + ROM_FILL ( 0x60000, 0x20000, 0xff )// 18? not populated? + + ROM_REGION( 0x020000, "scroll2", 0 ) /* Scroll 2 */ + ROM_LOAD( "19.27C1001", 0x000000, 0x020000, CRC(b82c94ec) SHA1(cf83355fb8941cf4332b764bb7de01d4c2aead21) ) + + ROM_REGION( 0x080000, "sprites", 0 ) /* Sprites */ + ROM_LOAD( "20.27C1001", 0x000000, 0x020000, CRC(4a322d18) SHA1(17a514e50da13bbcbecfbe186bc99c5383eefd38) ) + ROM_LOAD( "21.27C1001", 0x020000, 0x020000, CRC(7bb4b35d) SHA1(001ef590a5245126182ab7af54bc1c56012ab218) ) + ROM_LOAD( "22.27C1001", 0x040000, 0x020000, CRC(1dc040d2) SHA1(bda3a441a20f253b67ca646d71d3703a8c59e210) ) + ROM_LOAD( "23.27C1001", 0x060000, 0x020000, CRC(50478530) SHA1(a17b8fdba4fbcbb2d0b715d5cfb2192edbf5a457) ) + + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ + ROM_LOAD( "09.27C1001", 0x000000, 0x020000, CRC(27f4bfb4) SHA1(36c8c8b73f26d812711403135a8210af520efb66) ) + ROM_LOAD( "10.27C1001", 0x020000, 0x020000, CRC(cf5430ff) SHA1(8d0b1ab9c25312a65fa534a758f7f3ab01b3b593) ) + + ROM_REGION( 0x040000, "oki2", 0 ) /* Samples */ + ROM_LOAD( "07.27C1001", 0x000000, 0x020000, CRC(dc254c7c) SHA1(4daed57c5603bd021f9effb228a4d40b569f72d4) ) + ROM_LOAD( "08.27C1001", 0x020000, 0x020000, CRC(cadd4731) SHA1(1c4e7ea7064b9c6b2dfdf01fd64f37de6d50bdfa) ) // 11xxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x0200, "proms", 0 ) /* Priority PROM */ + ROM_LOAD( "kazan.14m", 0x0000, 0x0200, BAD_DUMP CRC(85b30ac4) SHA1(b03f577ceb0f26b67453ffa52ef61fea76a93184) ) // wasn't dumped, this is wrong, might need to be handcrafted +ROM_END /*************************************************************************** @@ -4734,6 +4823,7 @@ GAME( 1990, rittam, rodland, system_A, rodland, megasys1_state, rit GAME( 1990, rodlandjb,rodland, system_A, rodland, megasys1_state, rodlandjb,ROT0, "bootleg","Rod-Land (Japan bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, phantasm, avspirit, system_A, phantasm, megasys1_state, phantasm, ROT0, "Jaleco", "Phantasm (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, edfp, edf, system_A, edfp, megasys1_state, edfp, ROT0, "Jaleco", "E.D.F. : Earth Defense Force (Japan, prototype)", MACHINE_SUPPORTS_SAVE ) +GAME( 1991, inyourfa, 0, system_A, inyourfa, megasys1_state, iganinju, ROT0, "Jaleco", "In Your Face (World, prototype)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // priorities aren't correct GAME( 1992, soldam, 0, system_A_soldam, soldam, megasys1_state, soldam, ROT0, "Jaleco", "Soldam", MACHINE_SUPPORTS_SAVE ) GAME( 1992, soldamj, soldam, system_A_soldam, soldam, megasys1_state, soldamj, ROT0, "Jaleco", "Soldam (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 3b691d48269..ab1c501a5d9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20442,6 +20442,7 @@ edfp // (c) 1991 (Japan, Prototype) hachoo // (c) 1989 hayaosi1 // (c) 1993 iganinju // (c) 1988 (Japan) +inyourfa // (c) 1988 (Japan) jitsupro // (c) 1989 (Japan) kazan // (c) 1988 (World) kickoff // (c) 1988 (Japan) -- cgit v1.2.3-70-g09d2 From ed3bee03a737344890dbcd2a1ef40eddebe7aa3e Mon Sep 17 00:00:00 2001 From: "S.Z" Date: Sun, 10 Dec 2017 12:17:52 +0100 Subject: i386.cpp: correct pentium_smi (nw) In the poentium_smi() routine all calls to WRITE32 have the parameters swapped ! --- src/devices/cpu/i386/i386.cpp | 106 +++++++++++++++++++++--------------------- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 15379c18d7b..dd6d86928e2 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -3788,59 +3788,59 @@ void i386_device::pentium_smi() m_smi_latched = false; // save state - WRITE32(m_cr[4], smram_state+SMRAM_IP5_CR4); - WRITE32(m_sreg[ES].limit, smram_state+SMRAM_IP5_ESLIM); - WRITE32(m_sreg[ES].base, smram_state+SMRAM_IP5_ESBASE); - WRITE32(m_sreg[ES].flags, smram_state+SMRAM_IP5_ESACC); - WRITE32(m_sreg[CS].limit, smram_state+SMRAM_IP5_CSLIM); - WRITE32(m_sreg[CS].base, smram_state+SMRAM_IP5_CSBASE); - WRITE32(m_sreg[CS].flags, smram_state+SMRAM_IP5_CSACC); - WRITE32(m_sreg[SS].limit, smram_state+SMRAM_IP5_SSLIM); - WRITE32(m_sreg[SS].base, smram_state+SMRAM_IP5_SSBASE); - WRITE32(m_sreg[SS].flags, smram_state+SMRAM_IP5_SSACC); - WRITE32(m_sreg[DS].limit, smram_state+SMRAM_IP5_DSLIM); - WRITE32(m_sreg[DS].base, smram_state+SMRAM_IP5_DSBASE); - WRITE32(m_sreg[DS].flags, smram_state+SMRAM_IP5_DSACC); - WRITE32(m_sreg[FS].limit, smram_state+SMRAM_IP5_FSLIM); - WRITE32(m_sreg[FS].base, smram_state+SMRAM_IP5_FSBASE); - WRITE32(m_sreg[FS].flags, smram_state+SMRAM_IP5_FSACC); - WRITE32(m_sreg[GS].limit, smram_state+SMRAM_IP5_GSLIM); - WRITE32(m_sreg[GS].base, smram_state+SMRAM_IP5_GSBASE); - WRITE32(m_sreg[GS].flags, smram_state+SMRAM_IP5_GSACC); - WRITE32(m_ldtr.flags, smram_state+SMRAM_IP5_LDTACC); - WRITE32(m_ldtr.limit, smram_state+SMRAM_IP5_LDTLIM); - WRITE32(m_ldtr.base, smram_state+SMRAM_IP5_LDTBASE); - WRITE32(m_gdtr.limit, smram_state+SMRAM_IP5_GDTLIM); - WRITE32(m_gdtr.base, smram_state+SMRAM_IP5_GDTBASE); - WRITE32(m_idtr.limit, smram_state+SMRAM_IP5_IDTLIM); - WRITE32(m_idtr.base, smram_state+SMRAM_IP5_IDTBASE); - WRITE32(m_task.limit, smram_state+SMRAM_IP5_TRLIM); - WRITE32(m_task.base, smram_state+SMRAM_IP5_TRBASE); - WRITE32(m_task.flags, smram_state+SMRAM_IP5_TRACC); - - WRITE32(m_sreg[ES].selector, smram_state+SMRAM_ES); - WRITE32(m_sreg[CS].selector, smram_state+SMRAM_CS); - WRITE32(m_sreg[SS].selector, smram_state+SMRAM_SS); - WRITE32(m_sreg[DS].selector, smram_state+SMRAM_DS); - WRITE32(m_sreg[FS].selector, smram_state+SMRAM_FS); - WRITE32(m_sreg[GS].selector, smram_state+SMRAM_GS); - WRITE32(m_ldtr.segment, smram_state+SMRAM_LDTR); - WRITE32(m_task.segment, smram_state+SMRAM_TR); - - WRITE32(m_dr[7], smram_state+SMRAM_DR7); - WRITE32(m_dr[6], smram_state+SMRAM_DR6); - WRITE32(REG32(EAX), smram_state+SMRAM_EAX); - WRITE32(REG32(ECX), smram_state+SMRAM_ECX); - WRITE32(REG32(EDX), smram_state+SMRAM_EDX); - WRITE32(REG32(EBX), smram_state+SMRAM_EBX); - WRITE32(REG32(ESP), smram_state+SMRAM_ESP); - WRITE32(REG32(EBP), smram_state+SMRAM_EBP); - WRITE32(REG32(ESI), smram_state+SMRAM_ESI); - WRITE32(REG32(EDI), smram_state+SMRAM_EDI); - WRITE32(m_eip, smram_state+SMRAM_EIP); - WRITE32(old_flags, smram_state+SMRAM_EFLAGS); - WRITE32(m_cr[3], smram_state+SMRAM_CR3); - WRITE32(old_cr0, smram_state+SMRAM_CR0); + WRITE32(smram_state + SMRAM_IP5_CR4, m_cr[4]); + WRITE32(smram_state + SMRAM_IP5_ESLIM, m_sreg[ES].limit); + WRITE32(smram_state + SMRAM_IP5_ESBASE, m_sreg[ES].base); + WRITE32(smram_state + SMRAM_IP5_ESACC, m_sreg[ES].flags); + WRITE32(smram_state + SMRAM_IP5_CSLIM, m_sreg[CS].limit); + WRITE32(smram_state + SMRAM_IP5_CSBASE, m_sreg[CS].base); + WRITE32(smram_state + SMRAM_IP5_CSACC, m_sreg[CS].flags); + WRITE32(smram_state + SMRAM_IP5_SSLIM, m_sreg[SS].limit); + WRITE32(smram_state + SMRAM_IP5_SSBASE, m_sreg[SS].base); + WRITE32(smram_state + SMRAM_IP5_SSACC, m_sreg[SS].flags); + WRITE32(smram_state + SMRAM_IP5_DSLIM, m_sreg[DS].limit); + WRITE32(smram_state + SMRAM_IP5_DSBASE, m_sreg[DS].base); + WRITE32(smram_state + SMRAM_IP5_DSACC, m_sreg[DS].flags); + WRITE32(smram_state + SMRAM_IP5_FSLIM, m_sreg[FS].limit); + WRITE32(smram_state + SMRAM_IP5_FSBASE, m_sreg[FS].base); + WRITE32(smram_state + SMRAM_IP5_FSACC, m_sreg[FS].flags); + WRITE32(smram_state + SMRAM_IP5_GSLIM, m_sreg[GS].limit); + WRITE32(smram_state + SMRAM_IP5_GSBASE, m_sreg[GS].base); + WRITE32(smram_state + SMRAM_IP5_GSACC, m_sreg[GS].flags); + WRITE32(smram_state + SMRAM_IP5_LDTACC, m_ldtr.flags); + WRITE32(smram_state + SMRAM_IP5_LDTLIM, m_ldtr.limit); + WRITE32(smram_state + SMRAM_IP5_LDTBASE, m_ldtr.base); + WRITE32(smram_state + SMRAM_IP5_GDTLIM, m_gdtr.limit); + WRITE32(smram_state + SMRAM_IP5_GDTBASE, m_gdtr.base); + WRITE32(smram_state + SMRAM_IP5_IDTLIM, m_idtr.limit); + WRITE32(smram_state + SMRAM_IP5_IDTBASE, m_idtr.base); + WRITE32(smram_state + SMRAM_IP5_TRLIM, m_task.limit); + WRITE32(smram_state + SMRAM_IP5_TRBASE, m_task.base); + WRITE32(smram_state + SMRAM_IP5_TRACC, m_task.flags); + + WRITE32(smram_state + SMRAM_ES, m_sreg[ES].selector); + WRITE32(smram_state + SMRAM_CS, m_sreg[CS].selector); + WRITE32(smram_state + SMRAM_SS, m_sreg[SS].selector); + WRITE32(smram_state + SMRAM_DS, m_sreg[DS].selector); + WRITE32(smram_state + SMRAM_FS, m_sreg[FS].selector); + WRITE32(smram_state + SMRAM_GS, m_sreg[GS].selector); + WRITE32(smram_state + SMRAM_LDTR, m_ldtr.segment); + WRITE32(smram_state + SMRAM_TR, m_task.segment); + + WRITE32(smram_state + SMRAM_DR7, m_dr[7]); + WRITE32(smram_state + SMRAM_DR6, m_dr[6]); + WRITE32(smram_state + SMRAM_EAX, REG32(EAX)); + WRITE32(smram_state + SMRAM_ECX, REG32(ECX)); + WRITE32(smram_state + SMRAM_EDX, REG32(EDX)); + WRITE32(smram_state + SMRAM_EBX, REG32(EBX)); + WRITE32(smram_state + SMRAM_ESP, REG32(ESP)); + WRITE32(smram_state + SMRAM_EBP, REG32(EBP)); + WRITE32(smram_state + SMRAM_ESI, REG32(ESI)); + WRITE32(smram_state + SMRAM_EDI, REG32(EDI)); + WRITE32(smram_state + SMRAM_EIP, m_eip); + WRITE32(smram_state + SMRAM_EFLAGS, old_flags); + WRITE32(smram_state + SMRAM_CR3, m_cr[3]); + WRITE32(smram_state + SMRAM_CR0, old_cr0); m_sreg[DS].selector = m_sreg[ES].selector = m_sreg[FS].selector = m_sreg[GS].selector = m_sreg[SS].selector = 0; m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000; -- cgit v1.2.3-70-g09d2 From 7bf4395401d1af061d8342df5be3eee7006a83f7 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 08:52:34 -0500 Subject: m6809: Note (nw) --- src/devices/cpu/m6809/m6809.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp index 521d4a113b7..0521b745414 100644 --- a/src/devices/cpu/m6809/m6809.cpp +++ b/src/devices/cpu/m6809/m6809.cpp @@ -92,6 +92,15 @@ March 2013 NPW: divider to the MC6809E and not to the MC6809; the confusion resulting from this error is in the process of being straightened out. + Maximum clock ratings: + + Q & E EXTAL + MC6809(E) 1.0 MHz 4.0 MHz + MC68A09(E) 1.5 MHz 6.0 MHz + MC68B09(E) 2.0 MHz 8.0 MHz + HD63B09(E) 2.0 MHz 8.0 MHz + HD63C09(E) 3.0 MHz 12.0 MHz + *****************************************************************************/ #include "emu.h" -- cgit v1.2.3-70-g09d2 From c1a652b08379b4df5d17961d2121ae5075e5c0ed Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 09:02:38 -0500 Subject: Moderate overhaul of device_rom_interface (nw) - Allow endianness and data/address width to be altered during configuration - Raise memory_space_config from private to protected so it can be overridden - Make entire interface optional (as needed by one device to be added soon) - Use interface_post_load instead of explicitly registered delegate - Only call rom_bank_updated when bank actually changes - Remove prototypes for nonexistent functions --- src/emu/dirom.cpp | 20 ++++++++++++-------- src/emu/dirom.h | 16 +++++++--------- 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/src/emu/dirom.cpp b/src/emu/dirom.cpp index 3a0ed23692f..87461926cf6 100644 --- a/src/emu/dirom.cpp +++ b/src/emu/dirom.cpp @@ -4,7 +4,9 @@ device_rom_interface::device_rom_interface(const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian, u8 datawidth) : device_memory_interface(mconfig, device), m_rom_tag(device.basetag()), - m_rom_config("rom", endian, datawidth, addrwidth) + m_rom_config("rom", endian, datawidth, addrwidth), + m_bank(nullptr), + m_cur_bank(-1) { } @@ -42,12 +44,14 @@ void device_rom_interface::set_rom_bank(int bank) bank = bank % m_bank_count; } - m_cur_bank = bank; - m_bank->set_entry(bank); - rom_bank_updated(); + if (m_cur_bank != bank) { + m_cur_bank = bank; + m_bank->set_entry(bank); + rom_bank_updated(); + } } -void device_rom_interface::reset_bank() +void device_rom_interface::interface_post_load() { if(m_bank) m_bank->set_entry(m_cur_bank); @@ -85,12 +89,12 @@ void device_rom_interface::set_rom(const void *base, u32 size) void device_rom_interface::interface_pre_start() { + if(!has_space(0)) + return; + m_rom_direct = space().direct<0>(); - m_bank = nullptr; - m_cur_bank = -1; device().save_item(NAME(m_cur_bank)); device().save_item(NAME(m_bank_count)); - device().machine().save().register_postload(save_prepost_delegate(FUNC(device_rom_interface::reset_bank), this)); if(!has_configured_map(0)) { memory_region *reg = device().owner()->memregion(m_rom_tag); diff --git a/src/emu/dirom.h b/src/emu/dirom.h index 2ea7edca810..aae6a7f5097 100644 --- a/src/emu/dirom.h +++ b/src/emu/dirom.h @@ -38,24 +38,22 @@ public: protected: virtual void rom_bank_updated() = 0; + virtual space_config_vector memory_space_config() const override; + + void set_rom_endianness(endianness_t endian) { assert(!device().configured()); m_rom_config.m_endianness = endian; } + void set_rom_data_width(u8 width) { assert(!device().configured()); m_rom_config.m_data_width = width; } + void set_rom_addr_width(u8 width) { assert(!device().configured()); m_rom_config.m_addr_width = m_rom_config.m_logaddr_width = width; } private: const char *m_rom_tag; - const address_space_config m_rom_config; + address_space_config m_rom_config; direct_read_data<0> *m_rom_direct; memory_bank *m_bank; int m_cur_bank, m_bank_count; - virtual space_config_vector memory_space_config() const override; virtual void interface_pre_start() override; - - DECLARE_READ8_MEMBER(z8_r); - DECLARE_READ16_MEMBER(z16_r); - DECLARE_READ32_MEMBER(z32_r); - DECLARE_READ64_MEMBER(z64_r); - - void reset_bank(); + virtual void interface_post_load() override; }; #endif // MAME_EMU_DIROM_H -- cgit v1.2.3-70-g09d2 From 141f2364cc5896717ff5f81e49c65b1fd12d7cad Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 09:06:41 -0500 Subject: New generic ripple counter device --- scripts/src/machine.lua | 12 ++ scripts/target/mame/arcade.lua | 1 + scripts/target/mame/mess.lua | 1 + src/devices/bus/ss50/mpc.cpp | 42 ++----- src/devices/machine/ripple_counter.cpp | 202 +++++++++++++++++++++++++++++++++ src/devices/machine/ripple_counter.h | 92 +++++++++++++++ src/mame/drivers/mermaid.cpp | 52 +++++---- src/mame/includes/mermaid.h | 8 +- 8 files changed, 350 insertions(+), 60 deletions(-) create mode 100644 src/devices/machine/ripple_counter.cpp create mode 100644 src/devices/machine/ripple_counter.h diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index d254c010116..38017680f93 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2196,6 +2196,18 @@ if (MACHINES["RF5C296"]~=null) then } end +--------------------------------------------------- +-- +--@src/devices/machine/ripple_counter.h,MACHINES["RIPPLE_COUNTER"] = true +--------------------------------------------------- + +if (MACHINES["RIPPLE_COUNTER"]~=null) then + files { + MAME_DIR .. "src/devices/machine/ripple_counter.cpp", + MAME_DIR .. "src/devices/machine/ripple_counter.h", + } +end + --------------------------------------------------- -- --@src/devices/machine/roc10937.h,MACHINES["ROC10937"] = true diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 7d0902de2bd..1aa8b9d94b9 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -535,6 +535,7 @@ MACHINES["RA17XX"] = true --MACHINES["R64H156"] = true MACHINES["RF5C296"] = true --MACHINES["RIOT6532"] = true +MACHINES["RIPPLE_COUNTER"] = true MACHINES["ROC10937"] = true MACHINES["RP5C01"] = true MACHINES["RP5C15"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index ea2ee8ef9ec..03a80c4a6f0 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -524,6 +524,7 @@ MACHINES["PROM82S129"] = true MACHINES["R64H156"] = true MACHINES["RF5C296"] = true MACHINES["RIOT6532"] = true +MACHINES["RIPPLE_COUNTER"] = true MACHINES["ROC10937"] = true MACHINES["RP5C01"] = true MACHINES["RP5C15"] = true diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp index 7f587d6bb62..8a1ac577a5e 100644 --- a/src/devices/bus/ss50/mpc.cpp +++ b/src/devices/bus/ss50/mpc.cpp @@ -13,6 +13,7 @@ #include "bus/rs232/rs232.h" #include "machine/6821pia.h" #include "machine/input_merger.h" +#include "machine/ripple_counter.h" //************************************************************************** // TYPE DEFINITIONS @@ -29,10 +30,8 @@ public: ss50_card_interface(mconfig, *this), m_pia(*this, "pia"), m_loopback(*this, "loopback"), + m_counter(*this, "counter"), m_baud_jumper(*this, "BAUD"), - m_cd4024ae_count(0), - m_cd4024ae_clock(false), - m_cd4024ae_reset(true), m_count_select(false) { } @@ -53,17 +52,13 @@ private: DECLARE_WRITE_LINE_MEMBER(serial_input_w); DECLARE_WRITE_LINE_MEMBER(reader_control_w); DECLARE_READ_LINE_MEMBER(count_r); - DECLARE_WRITE_LINE_MEMBER(count_reset_w); DECLARE_WRITE_LINE_MEMBER(count_select_w); - DECLARE_WRITE_LINE_MEMBER(clock_input_w); required_device m_pia; required_device m_loopback; + required_device m_counter; required_ioport m_baud_jumper; - u8 m_cd4024ae_count; - bool m_cd4024ae_clock; - bool m_cd4024ae_reset; bool m_count_select; }; @@ -113,7 +108,7 @@ MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6) MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7) MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2) - MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(ss50_mpc_device, count_reset_w)) MCFG_DEVCB_BIT(0) + MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("counter", ripple_counter_device, reset_w)) MCFG_DEVCB_BIT(0) //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w)) @@ -126,6 +121,9 @@ MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig) MCFG_INPUT_MERGER_ANY_HIGH("loopback") MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>)) + + MCFG_DEVICE_ADD("counter", RIPPLE_COUNTER, 0) // CD4024AE (IC3) + MCFG_RIPPLE_COUNTER_STAGES(7) // only Q5 (÷32) and Q4 (÷16) are actually used MACHINE_CONFIG_END @@ -135,9 +133,6 @@ MACHINE_CONFIG_END void ss50_mpc_device::device_start() { - save_item(NAME(m_cd4024ae_count)); - save_item(NAME(m_cd4024ae_clock)); - save_item(NAME(m_cd4024ae_reset)); save_item(NAME(m_count_select)); } @@ -155,14 +150,7 @@ WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w) READ_LINE_MEMBER(ss50_mpc_device::count_r) { - return BIT(m_cd4024ae_count, m_count_select ? 4 : 3); -} - -WRITE_LINE_MEMBER(ss50_mpc_device::count_reset_w) -{ - m_cd4024ae_reset = bool(state); - if (state) - m_cd4024ae_count = 0; + return BIT(m_counter->count(), m_count_select ? 4 : 3); } WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) @@ -170,16 +158,6 @@ WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w) m_count_select = bool(state); } -WRITE_LINE_MEMBER(ss50_mpc_device::clock_input_w) -{ - if (m_cd4024ae_clock != bool(state)) - { - m_cd4024ae_clock = bool(state); - if (!state && !m_cd4024ae_reset) - m_cd4024ae_count++; - } -} - //------------------------------------------------- // register_read - read from a port register @@ -202,13 +180,13 @@ WRITE8_MEMBER(ss50_mpc_device::register_write) WRITE_LINE_MEMBER(ss50_mpc_device::f110_w) { if (m_baud_jumper->read()) - clock_input_w(state); + m_counter->clock_w(state); } WRITE_LINE_MEMBER(ss50_mpc_device::f300_w) { if (!m_baud_jumper->read()) - clock_input_w(state); + m_counter->clock_w(state); } diff --git a/src/devices/machine/ripple_counter.cpp b/src/devices/machine/ripple_counter.cpp new file mode 100644 index 00000000000..ae38d342d68 --- /dev/null +++ b/src/devices/machine/ripple_counter.cpp @@ -0,0 +1,202 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + + This device emulates basic ripple counter logic ICs with falling- + edge clocks and a synchronous reset inputs such as CD4040 and + 74LS393. + + The optional 8-bit ROM interface is intended to help stream ROM + data to sound chips that lack memory interfaces of their own + (e.g. MSM5205, TMS5110). + +**********************************************************************/ + +#include "emu.h" +#include "machine/ripple_counter.h" + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definition +DEFINE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device, "ripple_counter", "Generic ripple counter") + + +//************************************************************************** +// RIPPLE COUNTER DEVICE +//************************************************************************** + +//------------------------------------------------- +// ripple_counter_device - constructor +//------------------------------------------------- + +ripple_counter_device::ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, RIPPLE_COUNTER, tag, owner, clock), + device_rom_interface(mconfig, *this, 0, ENDIANNESS_LITTLE, 8), + m_count_out_cb(*this), + m_rom_out_cb(*this), + m_count_timer(nullptr), + m_count_mask(0), + m_count(1), + m_clk(false), + m_reset(false) +{ +} + + +//------------------------------------------------- +// static_set_stages - configure the number of +// stages used to count +//------------------------------------------------- + +void ripple_counter_device::static_set_stages(device_t &device, u8 stages) +{ + auto &dev = downcast(device); + dev.m_count_mask = (1U << stages) - 1; + dev.set_rom_addr_width(stages); +} + + +//------------------------------------------------- +// memory_space_config - return a description of +// any address spaces owned by this device +//------------------------------------------------- + +device_memory_interface::space_config_vector ripple_counter_device::memory_space_config() const +{ + if (m_rom_out_cb.isnull()) + return space_config_vector(); + else + return device_rom_interface::memory_space_config(); +} + + +//------------------------------------------------- +// device_validity_check - validate a device after +// the configuration has been constructed +//------------------------------------------------- + +void ripple_counter_device::device_validity_check(validity_checker &valid) const +{ + if (m_count_mask == 0) + osd_printf_error("No counting stages configured\n"); +} + + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void ripple_counter_device::device_resolve_objects() +{ + // resolve callbacks + m_count_out_cb.resolve_safe(); + m_rom_out_cb.resolve(); +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void ripple_counter_device::device_start() +{ + // initialize timers + m_count_timer = timer_alloc(TIMER_COUNT); + + // register internal state + save_item(NAME(m_count)); + save_item(NAME(m_clk)); + save_item(NAME(m_reset)); +} + + +//------------------------------------------------- +// device_clock_changed - called when the +// device clock is altered in any way +//------------------------------------------------- + +void ripple_counter_device::device_clock_changed() +{ + attotime freq = m_reset ? attotime::never : clocks_to_attotime(1); + m_count_timer->adjust(freq, 0, freq); +} + + +//------------------------------------------------- +// rom_bank_updated - called when the ROM bank +// is changed +//------------------------------------------------- + +void ripple_counter_device::rom_bank_updated() +{ + m_rom_out_cb(read_byte(m_count)); +} + + +//------------------------------------------------- +// set_count - update the count and associated +// outputs +//------------------------------------------------- + +void ripple_counter_device::set_count(u32 count) +{ + m_count = count; + m_count_out_cb(count); + if (!m_rom_out_cb.isnull()) + m_rom_out_cb(read_byte(count)); +} + + +//------------------------------------------------- +// clock_w - handle falling-edge clock input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::clock_w) +{ + if (m_clk != bool(state)) + { + m_clk = bool(state); + if (!state && !m_reset) + set_count((m_count + 1) & m_count_mask); + } +} + + +//------------------------------------------------- +// reset_w - handle active-high reset input +//------------------------------------------------- + +WRITE_LINE_MEMBER(ripple_counter_device::reset_w) +{ + if (m_reset != bool(state)) + { + m_reset = bool(state); + if (state && m_count != 0) + set_count(0); + + // stop or start the count timer as required + notify_clock_changed(); + } +} + + +//------------------------------------------------- +// device_timer - called whenever a device timer +// fires +//------------------------------------------------- + +void ripple_counter_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_COUNT: + set_count((m_count + 1) & m_count_mask); + break; + } +} diff --git a/src/devices/machine/ripple_counter.h b/src/devices/machine/ripple_counter.h new file mode 100644 index 00000000000..f9e997f3348 --- /dev/null +++ b/src/devices/machine/ripple_counter.h @@ -0,0 +1,92 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Generic binary ripple counter emulation + +**********************************************************************/ + +#ifndef MAME_MACHINE_RIPPLE_COUNTER_H +#define MAME_MACHINE_RIPPLE_COUNTER_H + +#pragma once + +//************************************************************************** +// CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_RIPPLE_COUNTER_STAGES(_stages) \ + ripple_counter_device::static_set_stages(*device, _stages); + +// output callbacks +#define MCFG_RIPPLE_COUNTER_COUNT_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_count_out_cb(*device, DEVCB_##_devcb); +#define MCFG_RIPPLE_COUNTER_ROM_OUT_CB(_devcb) \ + devcb = &ripple_counter_device::static_set_rom_out_cb(*device, DEVCB_##_devcb); + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> ripple_counter_device + +class ripple_counter_device : public device_t, public device_rom_interface +{ +public: + // construction/destruction + ripple_counter_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + // static configuration + static void static_set_stages(device_t &device, u8 stages); + template static devcb_base &static_set_count_out_cb(device_t &device, Object &&cb) + { return downcast(device).m_count_out_cb.set_callback(std::forward(cb)); } + template static devcb_base &static_set_rom_out_cb(device_t &device, Object &&cb) + { return downcast(device).m_rom_out_cb.set_callback(std::forward(cb)); } + + // control line handlers + DECLARE_WRITE_LINE_MEMBER(clock_w); + DECLARE_WRITE_LINE_MEMBER(reset_w); + + // getters + u32 count() const { return m_count; } + +protected: + // device-level overrides + virtual void device_validity_check(validity_checker &valid) const override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_clock_changed() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // device_rom_interface overrides + virtual space_config_vector memory_space_config() const override; + virtual void rom_bank_updated() override; + +private: + // internal helpers + void set_count(u32 count); + + // device callbacks + devcb_write32 m_count_out_cb; + devcb_write8 m_rom_out_cb; + + // device timers + enum + { + TIMER_COUNT + }; + emu_timer *m_count_timer; + + // configuration parameters + u32 m_count_mask; + + // running state + u32 m_count; + bool m_clk; + bool m_reset; +}; + +// device type definition +DECLARE_DEVICE_TYPE(RIPPLE_COUNTER, ripple_counter_device) + +#endif // MAME_MACHINE_RIPPLE_COUNTER_H diff --git a/src/mame/drivers/mermaid.cpp b/src/mame/drivers/mermaid.cpp index 2ab899f4d38..eaf4c46fc59 100644 --- a/src/mame/drivers/mermaid.cpp +++ b/src/mame/drivers/mermaid.cpp @@ -180,21 +180,22 @@ ADDRESS_MAP_END WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_lo_w) { m_adpcm_rom_sel = state | (m_adpcm_rom_sel & 2); + m_adpcm_counter->set_rom_bank(m_adpcm_rom_sel); } WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_hi_w) { m_adpcm_rom_sel = (state <<1) | (m_adpcm_rom_sel & 1); + m_adpcm_counter->set_rom_bank(m_adpcm_rom_sel); } WRITE_LINE_MEMBER(mermaid_state::rougien_sample_playback_w) { if (state) { - m_adpcm_pos = m_adpcm_rom_sel*0x1000; - m_adpcm_end = m_adpcm_pos+0x1000; m_adpcm_idle = 0; m_adpcm->reset_w(0); + m_adpcm_counter->reset_w(0); } } @@ -366,13 +367,10 @@ void mermaid_state::machine_start() save_item(NAME(m_rougien_gfxbank2)); save_item(NAME(m_ay8910_enable)); - save_item(NAME(m_adpcm_pos)); - save_item(NAME(m_adpcm_end)); save_item(NAME(m_adpcm_idle)); save_item(NAME(m_adpcm_data)); save_item(NAME(m_adpcm_trigger)); save_item(NAME(m_adpcm_rom_sel)); - save_item(NAME(m_adpcm_play_reg)); } void mermaid_state::machine_reset() @@ -387,33 +385,32 @@ void mermaid_state::machine_reset() m_adpcm_idle = 1; m_adpcm_rom_sel = 0; - m_adpcm_play_reg = 0; + m_adpcm->reset_w(1); + m_adpcm_counter->reset_w(1); + m_adpcm_trigger = 0; + m_adpcm_data = 0; } /* Similar to Jantotsu, apparently the HW has three ports that controls what kind of sample should be played. Every sample size is 0x1000. */ +WRITE8_MEMBER(mermaid_state::adpcm_data_w) +{ + m_adpcm_data = data; + m_adpcm->data_w(m_adpcm_trigger ? (data & 0x0f) : (data & 0xf0) >> 4); +} + WRITE_LINE_MEMBER(mermaid_state::rougien_adpcm_int) { -// popmessage("%08x",m_adpcm_pos); + if (!state) + return; - if (m_adpcm_pos >= m_adpcm_end || m_adpcm_idle) + m_adpcm_trigger ^= 1; + m_adpcm->data_w(m_adpcm_trigger ? (m_adpcm_data & 0x0f) : (m_adpcm_data & 0xf0) >> 4); + m_adpcm_counter->clock_w(m_adpcm_trigger); + if (m_adpcm_trigger == 0 && m_adpcm_counter->count() == 0) { - //m_adpcm_idle = 1; + m_adpcm_idle = 1; m_adpcm->reset_w(1); - m_adpcm_trigger = 0; - } - else - { - uint8_t *ROM = memregion("adpcm")->base(); - - m_adpcm_data = ((m_adpcm_trigger ? (ROM[m_adpcm_pos] & 0x0f) : (ROM[m_adpcm_pos] & 0xf0) >> 4)); - m_adpcm->data_w(m_adpcm_data & 0xf); - m_adpcm_trigger ^= 1; - if (m_adpcm_trigger == 0) - { - m_adpcm_pos++; - //if ((ROM[m_adpcm_pos] & 0xff) == 0x70) - // m_adpcm_idle = 1; - } + m_adpcm_counter->reset_w(1); } } @@ -483,9 +480,14 @@ static MACHINE_CONFIG_DERIVED( rougien, mermaid ) MCFG_PALETTE_INIT_OWNER(mermaid_state,rougien) MCFG_SOUND_ADD("adpcm", MSM5205, 384000) - MCFG_MSM5205_VCLK_CB(WRITELINE(mermaid_state, rougien_adpcm_int)) /* interrupt function */ + MCFG_MSM5205_VCK_CALLBACK(WRITELINE(mermaid_state, rougien_adpcm_int)) MCFG_MSM5205_PRESCALER_SELECTOR(S96_4B) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) + + MCFG_DEVICE_ADD("adpcm_counter", RIPPLE_COUNTER, 0) + MCFG_DEVICE_ROM("adpcm") + MCFG_RIPPLE_COUNTER_STAGES(12) + MCFG_RIPPLE_COUNTER_ROM_OUT_CB(WRITE8(mermaid_state, adpcm_data_w)) MACHINE_CONFIG_END /* ROMs */ diff --git a/src/mame/includes/mermaid.h b/src/mame/includes/mermaid.h index 6c7e5451aed..62b78871823 100644 --- a/src/mame/includes/mermaid.h +++ b/src/mame/includes/mermaid.h @@ -5,6 +5,8 @@ Mermaid *************************************************************************/ + +#include "machine/ripple_counter.h" #include "sound/msm5205.h" #include "sound/ay8910.h" #include "screen.h" @@ -22,6 +24,7 @@ public: m_colorram(*this, "colorram"), m_maincpu(*this, "maincpu"), m_adpcm(*this, "adpcm"), + m_adpcm_counter(*this, "adpcm_counter"), m_ay8910(*this, "ay%u", 1), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), @@ -51,18 +54,16 @@ public: int m_rougien_gfxbank2; /* sound-related */ - uint32_t m_adpcm_pos; - uint32_t m_adpcm_end; uint8_t m_adpcm_idle; int m_adpcm_data; uint8_t m_adpcm_trigger; uint8_t m_adpcm_rom_sel; - uint8_t m_adpcm_play_reg; bool m_ay8910_enable[2]; /* devices */ required_device m_maincpu; optional_device m_adpcm; + optional_device m_adpcm_counter; required_device_array m_ay8910; required_device m_gfxdecode; required_device m_screen; @@ -77,6 +78,7 @@ public: DECLARE_WRITE_LINE_MEMBER(rougien_sample_rom_lo_w); DECLARE_WRITE_LINE_MEMBER(rougien_sample_rom_hi_w); DECLARE_WRITE_LINE_MEMBER(rougien_sample_playback_w); + DECLARE_WRITE8_MEMBER(adpcm_data_w); DECLARE_WRITE8_MEMBER(mermaid_videoram2_w); DECLARE_WRITE8_MEMBER(mermaid_videoram_w); DECLARE_WRITE8_MEMBER(mermaid_colorram_w); -- cgit v1.2.3-70-g09d2 From ac049998b5bd6cf7667a997567eb34561926169f Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 09:24:56 -0500 Subject: sq80: Note why this doesn't work (nw) --- src/mame/drivers/esq1.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mame/drivers/esq1.cpp b/src/mame/drivers/esq1.cpp index eb3aac72dbe..9b975c7679a 100644 --- a/src/mame/drivers/esq1.cpp +++ b/src/mame/drivers/esq1.cpp @@ -57,6 +57,7 @@ TODO: - Keyboard - Analog filters and VCA on the back end of the 5503 - SQ-80 support (additional banking, FDC) + SQ-80 is totally broken now, jumping into unmapped memory NOTES: Commands from KPC are all 2 bytes -- cgit v1.2.3-70-g09d2 From 5c7660ee142c9711820511f488e0aa54f763cb5d Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sun, 10 Dec 2017 17:23:38 +0200 Subject: pgm2: actual ICRW simulation (nw) --- src/mame/drivers/pgm2.cpp | 65 +++++++++++++++++++++++++++++++++++++---------- src/mame/includes/pgm2.h | 2 ++ 2 files changed, 53 insertions(+), 14 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 7a05637d6ec..6937cdcc958 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -144,18 +144,34 @@ TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2) m_arm_aic->set_irq(0x46); } +static const uint8_t orleg2_china_card[32] = { + 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x10, 0x00, 0x00, 0x03, 0x00, 0x49, 0x47, 0x53, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +static const uint8_t kov2nl_china_card[32] = { + 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x06, 0x00, 0x00, 0x04, 0x00, 0x49, 0x47, 0x53, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + // "MPU" MCU HLE starts here +// TODO: make data cards using image_interface +// command delays is far not correct, might not work in other games +// command results probably either incorrect (except for explicit checked bytes) void pgm2_state::mcu_command(bool is_command) { uint8_t cmd = m_mcu_regs[0] & 0xff; - if (is_command && cmd != 0xf6) - logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); +// if (is_command && cmd != 0xf6) +// logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); if (is_command) { m_mcu_last_cmd = cmd; uint8_t status = 0xf7; // "command accepted" status int delay = 1; + + uint8_t arg1 = m_mcu_regs[0] >> 8; + uint8_t arg2 = m_mcu_regs[0] >> 16; + uint8_t arg3 = m_mcu_regs[0] >> 24; switch (cmd) { case 0xf6: // get result @@ -183,20 +199,36 @@ void pgm2_state::mcu_command(bool is_command) } break; // unknown / unimplemented, all C0-C9 commands is IC Card RW related - // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) # + // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card - status = 0xf4; - case 0xc1: - case 0xc2: - case 0xc3: - case 0xc4: - case 0xc5: - case 0xc6: - case 0xc7: - case 0xc8: - case 0xc9: + if (!m_have_card[arg1]) + status = 0xf4; + m_mcu_result0 = cmd; + break; + case 0xc1: // check ready/busy ? + m_mcu_result0 = cmd; + break; + case 0xc2: // read data to shared ram, args - offset, len + memcpy(&m_shareram[(~m_share_bank & 1) * 128], &m_card_data[arg1][arg2], arg3); + m_mcu_result0 = cmd; + break; + case 0xc3: // save data from shared ram, args - offset, len + memcpy(&m_card_data[arg1][arg2], &m_shareram[(~m_share_bank & 1) * 128], arg3); + m_mcu_result0 = cmd; + break; + case 0xc7: // get card ID?, no args, result1 expected to be fixed value for new card + m_mcu_result1 = 0xf81f0000; + m_mcu_result0 = cmd; + break; + case 0xc8: // write byte, args - offset, data byte + m_card_data[arg1][arg2] = arg3; + m_mcu_result0 = cmd; + break; + case 0xc4: // not used + case 0xc5: // set new password?, args - offset, data byte (offs 0 - always 7, 1-3 password) + case 0xc6: // not used + case 0xc9: // card authentication, args - 3 byte password, ('I','G','S' for new cards) m_mcu_result0 = cmd; - m_mcu_result1 = 0; break; default: logerror("MCU unknown command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); @@ -402,6 +434,11 @@ void pgm2_state::machine_reset() m_realspritekey = 0; m_mcu_last_cmd = 0; m_share_bank = 0; + + m_have_card[0] = true; + m_have_card[1] = m_have_card[2] = m_have_card[3] = false; + memcpy(m_card_data[0], orleg2_china_card, sizeof(orleg2_china_card)); +// memcpy(m_card_data[0], kov2nl_china_card, sizeof(kov2nl_china_card)); } static const gfx_layout tiles8x8_layout = diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 7f912420bc3..c25e0b91add 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -117,6 +117,8 @@ private: uint32_t m_mcu_result1; uint8_t m_mcu_last_cmd; void mcu_command(bool is_command); + uint8_t m_card_data[4][0x100]; + bool m_have_card[4]; // devices required_device m_maincpu; -- cgit v1.2.3-70-g09d2 From d0c1df31d54fea70ec3fb353ded5c8a5e9f42192 Mon Sep 17 00:00:00 2001 From: RalfVB Date: Sun, 10 Dec 2017 16:55:28 +0100 Subject: added several new entries --- hash/psx.xml | 224 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 224 insertions(+) diff --git a/hash/psx.xml b/hash/psx.xml index 05a84cbd878..4b482affe0e 100644 --- a/hash/psx.xml +++ b/hash/psx.xml @@ -42805,6 +42805,21 @@ The entries in this section are intended to replace the existing "low-grade" Jap + + + Fire Pro Wrestling G (Japan) (v1.1) + 2000 + Spike + + + + + + + + Gradius Gaiden (Japan) (v1.1) + 1997 + Konami + + + + + + + + Gunners Heaven (Japan) + 1995 + Media Vision + + + + + + + + Hokuto no Ken - Seikimatsu Kyuuseishu Densetsu (Japan) + 2000 + Bandai + + + + + + + + Jikkyou Oshaberi Parodius - Forever with Me (Japan) + 1996 + Konami + + + + + + + + Macross Digital Mission VF-X (Japan) + 1997 + Bandai + + + + + + + + + + Macross VF-X2 (Japan) + 1999 + Bandai + + + + + + + + Super Robot Taisen Alpha (Japan) (v1.1) + 2000 + Banpresto + + + + + + + + + + Super Robot Taisen Alpha Gaiden - Premium Edition (Japan) + 2001 + Banpresto + + + + + + + + + + Super Robot Taisen Alpha Gaiden - Shokai Genteiban (Japan) + 2001 + Banpresto + + + + + + + + + + Super Robot Taisen Complete Box (Japan) + 1999 + Banpresto + + + + + + + + + + + + + + + Super Robot Taisen F (Japan) + 1998 + Banpresto + + + + + + + + + + Super Robot Taisen F Kanketsuhen (Japan) + 1999 + Banpresto + + + + + + + + Zanac X Zanac (Japan) + 2001 + Compile + + + + + + + -- cgit v1.2.3-70-g09d2 From 99e69cefe704b5261e0640dba79f7556ce028337 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 11:15:20 -0500 Subject: Build fix (nw) --- src/mame/drivers/pgm2.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 6937cdcc958..f7e9dba632e 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -148,10 +148,12 @@ static const uint8_t orleg2_china_card[32] = { 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x10, 0x00, 0x00, 0x03, 0x00, 0x49, 0x47, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +#ifdef UNUSED_DEFINITION static const uint8_t kov2nl_china_card[32] = { 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x06, 0x00, 0x00, 0x04, 0x00, 0x49, 0x47, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +#endif // "MPU" MCU HLE starts here // TODO: make data cards using image_interface -- cgit v1.2.3-70-g09d2 From a6c4cdb7b3ea58bff1c4559ff8a82cb0fb554144 Mon Sep 17 00:00:00 2001 From: briantro Date: Sun, 10 Dec 2017 11:59:38 -0600 Subject: taitojc.cpp: minor doc update for the new Dangerous Curves set (nw) --- src/mame/drivers/taitojc.cpp | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp index 542f0179bd0..9fa681bfbde 100644 --- a/src/mame/drivers/taitojc.cpp +++ b/src/mame/drivers/taitojc.cpp @@ -1509,10 +1509,10 @@ ROM_END ROM_START( sidebs2ja ) /* Side by Side 2 Evoluzione Ver 2.4 J */ ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e38-23+.ic36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) /* Actual label E38-23* */ - ROM_LOAD32_BYTE( "e38-24+.ic37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) /* Actual label E38-24* */ - ROM_LOAD32_BYTE( "e38-25+.ic38", 0x000002, 0x80000, CRC(f1a8a4df) SHA1(e4cf75969fb0503df2290522194b097f5cb983a3) ) /* Actual label E38-25* */ - ROM_LOAD32_BYTE( "e38-26+.ic39", 0x000003, 0x80000, CRC(b550fbf2) SHA1(a0a461af7e71c6ad6468cfdee2bc7161ae31bbfb) ) /* Actual label E38-26* */ + ROM_LOAD32_BYTE( "e38-23+.ic36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) /* Actually labeled E38-23* */ + ROM_LOAD32_BYTE( "e38-24+.ic37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) /* Actually labeled E38-24* */ + ROM_LOAD32_BYTE( "e38-25+.ic38", 0x000002, 0x80000, CRC(f1a8a4df) SHA1(e4cf75969fb0503df2290522194b097f5cb983a3) ) /* Actually labeled E38-25* */ + ROM_LOAD32_BYTE( "e38-26+.ic39", 0x000003, 0x80000, CRC(b550fbf2) SHA1(a0a461af7e71c6ad6468cfdee2bc7161ae31bbfb) ) /* Actually labeled E38-26* */ ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "e38-19.ic30", 0x100001, 0x040000, CRC(3f50cb7b) SHA1(76af65c9b74ede843a3182f79cecda8c3e3febe6) ) @@ -1991,12 +1991,12 @@ ROM_START( landgearja ) /* Landing Gear Ver 3.0 J, is there an alternate set wit ROM_LOAD( "e17-32.ic96", 0x0000, 0x0bac, CRC(1d590ca3) SHA1(733e9e34642c1e03fd880fda198b98927c1bb81d) ) ROM_END -ROM_START( dangcurv ) +ROM_START( dangcurv ) /* Dangerous Curves Ver 2.9 O */ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ - ROM_LOAD32_BYTE( "e09_32-1.ic36", 0x000000, 0x80000, CRC(82c0af83) SHA1(307e2dd441116ffaad0d5783cd139bde8fc23460) ) - ROM_LOAD32_BYTE( "e09_33-1.ic37", 0x000001, 0x80000, CRC(be6eca0b) SHA1(edb4ad0d379132e64c1238191ab17bd4400f3322) ) - ROM_LOAD32_BYTE( "e09_34-1.ic38", 0x000002, 0x80000, CRC(553de745) SHA1(474e96c810fee8097059e201b95810b3235c6cad) ) - ROM_LOAD32_BYTE( "e09_35-1.ic39", 0x000003, 0x80000, CRC(a60273fd) SHA1(511191506f04320775787e294a59a94c07364006) ) + ROM_LOAD32_BYTE( "e09-32-1+.ic36", 0x000000, 0x80000, CRC(82c0af83) SHA1(307e2dd441116ffaad0d5783cd139bde8fc23460) ) /* Actually labeled E09 32-1* */ + ROM_LOAD32_BYTE( "e09-33-1+.ic37", 0x000001, 0x80000, CRC(be6eca0b) SHA1(edb4ad0d379132e64c1238191ab17bd4400f3322) ) /* Actually labeled E09 33-1* */ + ROM_LOAD32_BYTE( "e09-34-1+.ic38", 0x000002, 0x80000, CRC(553de745) SHA1(474e96c810fee8097059e201b95810b3235c6cad) ) /* Actually labeled E09 34-1* */ + ROM_LOAD32_BYTE( "e09-35-1+.ic39", 0x000003, 0x80000, CRC(a60273fd) SHA1(511191506f04320775787e294a59a94c07364006) ) /* Actually labeled E09 35-1* */ ROM_REGION( 0x180000, "taito_en:audiocpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "e09-27.ic30", 0x100001, 0x40000, CRC(6d54839c) SHA1(a28c9b0727128b82bb0fa71dc951e3f03ee45e1b) ) @@ -2048,7 +2048,7 @@ ROM_START( dangcurv ) ROM_LOAD( "e09-22.ic73", 0x0000, 0x0117, CRC(d43972cc) SHA1(ed9454d1a225a5fb6fefc0ae1aebe2b439ed460f) ) ROM_END -ROM_START( dangcurvj ) +ROM_START( dangcurvj ) /* Dangerous Curves Ver 2.2 J */ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68040 code */ ROM_LOAD32_BYTE( "e09-23.ic36", 0x000000, 0x80000, CRC(b4cdadd6) SHA1(84bd1d055ff15afb5438cd5151abf78b0000cebc) ) ROM_LOAD32_BYTE( "e09-24.ic37", 0x000001, 0x80000, CRC(fb2fc795) SHA1(2f58d043ab9fc0269a5b6827009777cd7ab832fc) ) -- cgit v1.2.3-70-g09d2 From 1927d5942ba487fe664c785c6319ed869ea4691b Mon Sep 17 00:00:00 2001 From: Ted Green Date: Sun, 10 Dec 2017 12:58:55 -0700 Subject: vrc5074: Don't try to save zero length vectors. (nw) --- src/devices/machine/vrc5074.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index 8471d631c47..9959a60f06e 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -236,7 +236,7 @@ void vrc5074_device::device_start() // Save states // m_sdram save_item(NAME(m_sdram[0])); - save_item(NAME(m_sdram[1])); + if (m_sdram_size[1]) save_item(NAME(m_sdram[1])); save_item(NAME(m_cpu_regs)); save_item(NAME(m_nile_irq_state)); save_item(NAME(m_sdram_addr)); -- cgit v1.2.3-70-g09d2 From 0306e6e11996495b5c0d5195dbbbac596bf9a78f Mon Sep 17 00:00:00 2001 From: Ted Green Date: Sun, 10 Dec 2017 12:59:40 -0700 Subject: vegas: Add wheel force control for initial calibration. (nw) --- src/mame/drivers/vegas.cpp | 47 ++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 43 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index 2bffc4526f1..acf6e55bf9f 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -344,6 +344,9 @@ public: optional_device m_uart2; optional_ioport_array<8> m_io_analog; int m_a2d_shift; + int8_t m_wheel_force; + int m_wheel_offset; + bool m_wheel_calibrated; uint8_t m_vblank_state; uint8_t m_cpuio_data[4]; uint8_t m_sio_reset_ctrl; @@ -402,6 +405,7 @@ public: DECLARE_READ32_MEMBER(unknown_r); DECLARE_READ8_MEMBER(parallel_r); DECLARE_WRITE8_MEMBER(parallel_w); + DECLARE_WRITE8_MEMBER(mpsreset_w); DECLARE_WRITE32_MEMBER(i40_w); DECLARE_CUSTOM_INPUT_MEMBER(i40_r); DECLARE_CUSTOM_INPUT_MEMBER(keypad_r); @@ -453,6 +457,7 @@ void vegas_state::machine_start() save_item(NAME(m_i40_data)); save_item(NAME(m_keypad_select)); save_item(NAME(m_gear)); + save_item(NAME(m_wheel_calibrated)); } @@ -472,6 +477,9 @@ void vegas_state::machine_reset() m_i40_data = 0; m_keypad_select = 0; m_gear = 1; + m_wheel_force = 0; + m_wheel_offset = 0; + m_wheel_calibrated = false; } /************************************* @@ -876,13 +884,34 @@ WRITE32_MEMBER( vegas_state::analog_port_w ) { uint32_t shift_data = data >> m_a2d_shift; int index = shift_data & 0x7; - m_pending_analog_read = (m_io_analog[index].read_safe(0)); + uint8_t currValue = m_io_analog[index].read_safe(0); + if (!m_wheel_calibrated && ((m_wheel_force > 20) || (m_wheel_force < -20))) { + if (m_wheel_force > 0 && m_wheel_offset < 128) + m_wheel_offset++; + else if (m_wheel_offset > -128) + m_wheel_offset--; + int tmpVal = int(currValue) + m_wheel_offset; + if (tmpVal < m_io_analog[index]->field(0xff)->minval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->minval(); + else if (tmpVal > m_io_analog[index]->field(0xff)->maxval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->maxval(); + else + m_pending_analog_read = tmpVal; + } + else { + m_pending_analog_read = currValue; + } + // Declare calibration finished as soon as non-middle value is detected, ie the user has turned the wheel + if (!m_wheel_calibrated && currValue != 0 && (currValue > (0x80 + 0x10) || currValue < (0x80 - 0x10))) { + m_wheel_calibrated = true; + //osd_printf_info("wheel calibration comlete wheel: %02x\n", currValue); + } + //logerror("analog_port_w: wheel_force: %i read: %i\n", m_wheel_force, m_pending_analog_read); //logerror("%08X: analog_port_w = %08X & %08X index = %d\n", machine().device("maincpu")->safe_pc(), data, mem_mask, index); if (m_sio_irq_enable & 0x02) { m_sio_irq_state |= 0x02; update_sio_irqs(); } - } @@ -948,6 +977,14 @@ WRITE8_MEMBER(vegas_state::parallel_w) logerror("%06X: parallel_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data); } +/************************************* +* MPS Reset +*************************************/ +WRITE8_MEMBER(vegas_state::mpsreset_w) +{ + logerror("%06X: mpsreset_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data); +} + /************************************* * Optical 49 Way Joystick I40 Board *************************************/ @@ -1008,19 +1045,21 @@ CUSTOM_INPUT_MEMBER(vegas_state::i40_r) *************************************/ WRITE32_MEMBER(vegas_state::wheel_board_w) { - //logerror("wheel_board_w: data = %08x\n", data); /* two writes in pairs. bit 11 high, bit 10 flag, flag off first, on second. arg remains the same. */ bool valid = (data & (1 << 11)); bool flag = (data & (1 << 10)); uint8_t op = (data >> 8) & 0x3; uint8_t arg = data & 0xff; + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); + if (valid && flag) { switch (op) { case 0x0: machine().output().set_value("wheel", arg); // target wheel angle. signed byte. + m_wheel_force = int8_t(~arg); break; case 0x1: @@ -1628,7 +1667,7 @@ static ADDRESS_MAP_START(vegas_cs8_map, AS_PROGRAM, 32, vegas_state) AM_RANGE(0x01000000, 0x0100001f) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial ttyS01 (TL16C552 CS0) AM_RANGE(0x01400000, 0x0140001f) AM_DEVREADWRITE8("uart2", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial ttyS02 (TL16C552 CS1) AM_RANGE(0x01800000, 0x0180001f) AM_READWRITE8(parallel_r, parallel_w, 0xff) // Parallel UART (TL16C552 CS2) - //AM_RANGE(0x01c00000, 0x0180001f) AM_READWRITE8(parallel_r, parallel_w, 0xff) // MPS Reset + AM_RANGE(0x01c00000, 0x01c00003) AM_WRITE8(mpsreset_w, 0xff) // MPS Reset ADDRESS_MAP_END /************************************* -- cgit v1.2.3-70-g09d2 From e733af5b0807dbf88ad32645f4c39210de99946c Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 15:32:24 -0500 Subject: Documentation update (nw) --- docs/source/techspecs/device_rom_interface.rst | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/docs/source/techspecs/device_rom_interface.rst b/docs/source/techspecs/device_rom_interface.rst index ab5eb18737b..8baf7fbb576 100644 --- a/docs/source/techspecs/device_rom_interface.rst +++ b/docs/source/techspecs/device_rom_interface.rst @@ -41,7 +41,16 @@ rom description for the system, it will be automatically picked up as the connected rom. An address map has priority over the region if present in the machine config. -| void **set_rom**\ (const void \*base, UINT32 size); +| void **set_rom_endianness**\ (endianness_t endian) +| void **set_rom_data_width**\ (u8 width) +| void **set_rom_addr_width**\ (u8 width) + +These methods, intended for generic devices with indefinite hardware +specifications, override the endianness, data bus width and address +bus width assigned through the constructor. They must be called from +within the device before **config_complete** time. + +| void **set_rom**\ (const void \*base, u32 size); At any time post- **interface_pre_start**, a memory block can be setup as the connected rom with that method. It overrides any @@ -76,3 +85,8 @@ Using that interface makes the device derive from **device_memory_interface**. If the device wants to actually use the memory interface for itself, remember that AS_0/AS_PROGRAM is used by the rom interface, and don't forget to upcall **memory_space_config**. + +For devices which have outputs that can be used to address ROMs but +only to forward the data to another device for processing, it may be +helpful to disable the interface when it is not required. This can be +done by overriding **memory_space_config** to return an empty vector. -- cgit v1.2.3-70-g09d2 From 412ef97d711a569d0cd4c29103e53b6416ea5a0b Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 15:32:59 -0500 Subject: No more UINT (nw) --- docs/source/techspecs/device_rom_interface.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/source/techspecs/device_rom_interface.rst b/docs/source/techspecs/device_rom_interface.rst index 8baf7fbb576..3a40590fc01 100644 --- a/docs/source/techspecs/device_rom_interface.rst +++ b/docs/source/techspecs/device_rom_interface.rst @@ -15,7 +15,7 @@ as rom. In the region/block cases, banking is automatically handled. 2. Setup -------- -| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, UINT8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, UINT8 datawidth = 8) +| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, u8 datawidth = 8) The constructor of the interface wants, in addition to the standard parameters, the address bus width of the dedicated bus. In addition @@ -60,10 +60,10 @@ times. 3. Rom access ------------- -| UINT8 **read_byte**\ (offs_t byteaddress) -| UINT16 **read_word**\ (offs_t byteaddress) -| UINT32 **read_dword**\ (offs_t byteaddress) -| UINT64 **read_qword**\ (offs_t byteaddress) +| u8 **read_byte**\ (offs_t byteaddress) +| u16 **read_word**\ (offs_t byteaddress) +| u32 **read_dword**\ (offs_t byteaddress) +| u64 **read_qword**\ (offs_t byteaddress) These methods provide read access to the connected rom. Out-of-bounds access results in standard unmapped read logerror messages. -- cgit v1.2.3-70-g09d2 From cc88c0cae5a8ad22535724388a01a9b3fe888922 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Sun, 10 Dec 2017 14:22:46 -0700 Subject: seattle: Add wheel force control for initial calibration. (nw) --- src/mame/drivers/seattle.cpp | 49 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 43 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp index 8fcb6b77a22..908f13282a1 100644 --- a/src/mame/drivers/seattle.cpp +++ b/src/mame/drivers/seattle.cpp @@ -279,7 +279,8 @@ public: m_cage(*this, "cage"), m_dcs(*this, "dcs"), m_ethernet(*this, "ethernet"), - m_ioasic(*this, "ioasic") + m_ioasic(*this, "ioasic"), + m_io_analog(*this, "AN%u", 0) {} required_device m_nvram; @@ -288,6 +289,7 @@ public: optional_device m_dcs; optional_device m_ethernet; required_device m_ioasic; + optional_ioport_array<8> m_io_analog; widget_data m_widget; uint32_t m_interrupt_enable; @@ -306,6 +308,9 @@ public: uint32_t m_output; uint8_t m_output_mode; uint32_t m_gear; + int8_t m_wheel_force; + int m_wheel_offset; + bool m_wheel_calibrated; DECLARE_READ32_MEMBER(interrupt_state_r); DECLARE_READ32_MEMBER(interrupt_state2_r); DECLARE_READ32_MEMBER(interrupt_config_r); @@ -399,6 +404,7 @@ void seattle_state::machine_start() save_item(NAME(m_output)); save_item(NAME(m_output_mode)); save_item(NAME(m_gear)); + save_item(NAME(m_wheel_calibrated)); } @@ -409,6 +415,9 @@ void seattle_state::machine_reset() m_interrupt_config = 0; m_interrupt_enable = 0; m_gear = 1; + m_wheel_force = 0; + m_wheel_offset = 0; + m_wheel_calibrated = false; /* reset either the DCS2 board or the CAGE board */ if (machine().device("dcs") != nullptr) { @@ -602,11 +611,31 @@ READ32_MEMBER(seattle_state::analog_port_r) WRITE32_MEMBER(seattle_state::analog_port_w) { - static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" }; - if (data < 8 || data > 15) logerror("%08X:Unexpected analog port select = %08X\n", space.device().safe_pc(), data); - m_pending_analog_read = ioport(portnames[data & 7])->read(); + int index = data & 7; + uint8_t currValue = m_io_analog[index].read_safe(0); + if (!m_wheel_calibrated && ((m_wheel_force > 20) || (m_wheel_force < -20))) { + if (m_wheel_force > 0 && m_wheel_offset < 128) + m_wheel_offset++; + else if (m_wheel_offset > -128) + m_wheel_offset--; + int tmpVal = int(currValue) + m_wheel_offset; + if (tmpVal < m_io_analog[index]->field(0xff)->minval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->minval(); + else if (tmpVal > m_io_analog[index]->field(0xff)->maxval()) + m_pending_analog_read = m_io_analog[index]->field(0xff)->maxval(); + else + m_pending_analog_read = tmpVal; + } + else { + m_pending_analog_read = currValue; + } + // Declare calibration finished as soon as non-middle value is detected, ie the user has turned the wheel + if (!m_wheel_calibrated && currValue != 0 && (currValue > (0x80 + 0x10) || currValue < (0x80 - 0x10))) { + m_wheel_calibrated = true; + //osd_printf_info("wheel calibration comlete wheel: %02x\n", currValue); + } } /************************************* @@ -628,6 +657,8 @@ WRITE32_MEMBER(seattle_state::wheel_board_w) { case 0x0: machine().output().set_value("wheel", arg); // target wheel angle. signed byte. + m_wheel_force = int8_t(arg); + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); break; case 0x4: @@ -725,15 +756,19 @@ WRITE32_MEMBER(seattle_state::carnevil_gun_w) READ32_MEMBER(seattle_state::ethernet_r) { + uint32_t data = 0; if (!(offset & 8)) - return m_ethernet->read(space, offset & 7, mem_mask & 0xffff); + data = m_ethernet->read(space, offset & 7, mem_mask & 0xffff); else - return m_ethernet->read(space, offset & 7, mem_mask & 0x00ff); + data = m_ethernet->read(space, offset & 7, mem_mask & 0x00ff); + //logerror("ethernet_r: @%08x=%08x mask: %08x\n", offset, data, mem_mask); + return data; } WRITE32_MEMBER(seattle_state::ethernet_w) { + //logerror("ethernet_w: @%08x=%08x mask: %08x\n", offset, data, mem_mask); if (!(offset & 8)) m_ethernet->write(space, offset & 7, data & 0xffff, mem_mask | 0xffff); else @@ -798,6 +833,8 @@ WRITE32_MEMBER(seattle_state::output_w) case 0x04: output().set_value("wheel", arg); // wheel motor delta. signed byte. + m_wheel_force = int8_t(~arg); + //logerror("wheel_board_w: data = %08x op: %02x arg: %02x\n", data, op, arg); break; case 0x05: -- cgit v1.2.3-70-g09d2 From 76dcc98b5363129ad480a6f236b9e8d12427b4ad Mon Sep 17 00:00:00 2001 From: Robbbert Date: Mon, 11 Dec 2017 09:06:12 +1100 Subject: (nw) cortex: added dips, fixed scrolling, added rombanking, added sound --- src/mame/drivers/cortex.cpp | 123 ++++++++++++++++++++++++++++++-------------- 1 file changed, 85 insertions(+), 38 deletions(-) diff --git a/src/mame/drivers/cortex.cpp b/src/mame/drivers/cortex.cpp index 8c31f35eeb9..6281b1e88aa 100644 --- a/src/mame/drivers/cortex.cpp +++ b/src/mame/drivers/cortex.cpp @@ -16,21 +16,24 @@ of another TI or the Geneve. Chips: TMS9995 - CPU TMS9929 - Video -TMS9911 - DMA to floppy (not emulated) -TMS9909 - Floppy Disk Controller (not emulated) -TMS9902 - UART (x2) (not usable with rs232.h) +TMS9911 - DMA to floppy (unemulated device) +TMS9909 - Floppy Disk Controller (unemulated device) +TMS9902 - UART (x2) (device not usable with rs232.h) AY-5-2376 - Keyboard controller All input to be in uppercase. Note that "lowercase" is just smaller uppercase, and is not acceptable as input. +There's no option in BASIC to produce sound. It will beep if an invalid key +(usually a control key) is pressed. + +To clear the screen press Ctrl L. ToDo: -- Screen corrupts when scrolling - Unemulated devices +- Cassette - Keyboard to use AY device -- Banking -- Memory manager device +- Memory mapping unit (74LS610) - Various CRU I/O Note that the MAME implementation of CRU addresses is not the same as real @@ -48,6 +51,8 @@ packed into a single address-byte (CRU 0 = bit 0, etc). So the address is #include "video/tms9928a.h" //#include "machine/tms9902.h" #include "machine/keyboard.h" +#include "sound/beep.h" +#include "speaker.h" class cortex_state : public driver_device { @@ -55,27 +60,34 @@ public: cortex_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_p_ram(*this, "ram") + , m_beep(*this, "beeper") + , m_io_dsw(*this, "DSW") { } void kbd_put(u8 data); DECLARE_WRITE_LINE_MEMBER(keyboard_ack_w); + DECLARE_WRITE_LINE_MEMBER(romsw_w); + DECLARE_WRITE_LINE_MEMBER(vdp_int_w); DECLARE_READ8_MEMBER(pio_r); DECLARE_READ8_MEMBER(keyboard_r); + DECLARE_DRIVER_INIT(init); private: - bool m_cru0005; + bool m_kbd_ack; + bool m_vdp_int; uint8_t m_term_data; virtual void machine_reset() override; required_device m_maincpu; - required_shared_ptr m_p_ram; + required_device m_beep; + required_ioport m_io_dsw; }; static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, cortex_state ) - AM_RANGE(0x0000, 0xefff) AM_RAM AM_SHARE("ram") + AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0") + AM_RANGE(0x8000, 0xefff) AM_RAM AM_RANGE(0xf100, 0xf11f) AM_RAM // memory mapping unit - AM_RANGE(0xf120, 0xf120) AM_DEVREADWRITE("tms9928a", tms9928a_device, vram_read, vram_write) - AM_RANGE(0xf121, 0xf121) AM_DEVREADWRITE("tms9928a", tms9928a_device, register_read, register_write) + AM_RANGE(0xf120, 0xf120) AM_DEVREADWRITE("crtc", tms9928a_device, vram_read, vram_write) + AM_RANGE(0xf121, 0xf121) AM_DEVREADWRITE("crtc", tms9928a_device, register_read, register_write) //AM_RANGE(0xf140, 0xf147) // fdc tms9909 ADDRESS_MAP_END @@ -84,24 +96,31 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, cortex_state ) AM_RANGE(0x0000, 0x0007) AM_MIRROR(0x18) AM_DEVWRITE("control", ls259_device, write_d0) AM_RANGE(0x0000, 0x0000) AM_READ(pio_r) AM_RANGE(0x0001, 0x0001) AM_READ(keyboard_r) - // read ranges are incorrect - should be 1/8th of current values. - //AM_RANGE(0x0080, 0x00bf) AM_DEVREADWRITE("uart1", tms9902_device, cruread, cruwrite) // RS232 - //AM_RANGE(0x0180, 0x01bf) AM_DEVREADWRITE("uart2", tms9902_device, cruread, cruwrite) // Cassette - //AM_RANGE(0x01c0, 0x01ff) // DMA controller - TMS9911 - //AM_RANGE(0x0800, 0x080f) AM_WRITE(cent_data_w) - //AM_RANGE(0x0810, 0x0811) AM_WRITE(cent_strobe_w) - //AM_RANGE(0x0812, 0x0813) AM_READ(cent_stat_r) - //AM_RANGE(0x1ee0, 0x1eef) AM_READWRITE(cpu_int_r,cpu_int_w) - //AM_RANGE(0x1fda, 0x1fdb) AM_READWRITE(cpu_int1_r,cpu_int1_w) + //AM_RANGE(0x0040, 0x005f) AM_DEVWRITE("uart1", tms9902_device, cruwrite) // RS232 (r12 = 80-bf) + //AM_RANGE(0x0008, 0x000b) AM_DEVREAD("uart1", tms9902_device, cruread) // RS232 + //AM_RANGE(0x00c0, 0x00df) AM_DEVWRITE("uart2", tms9902_device, cruwrite) // Cassette (r12 = 180-1bf) + //AM_RANGE(0x0018, 0x001b) AM_DEVREAD("uart2", tms9902_device, cruread) // Cassette + //AM_RANGE(0x00e0, 0x00ff) AM_WRITE("dma", tms9911_device, write) // r12 = 1c0-1fe + //AM_RANGE(0x001c, 0x001f) AM_READ("dma", tms9911_device, read) // if reading is needed + //AM_RANGE(0x0400, 0x0407) AM_WRITE(cent_data_w) // r12 = 800-80e + //AM_RANGE(0x0408, 0x0408) AM_WRITE(cent_strobe_w) // r12 = 810 + //AM_RANGE(0x0081, 0x0081) AM_READ(cent_stat_r) // CRU 409 (r12 = 812) ADDRESS_MAP_END /* Input ports */ static INPUT_PORTS_START( cortex ) + PORT_START("DSW") + PORT_DIPNAME( 0x04, 0x00, "DISK SIZE") + PORT_DIPSETTING( 0x04, "20cm") + PORT_DIPSETTING( 0x00, "13cm") + PORT_DIPNAME( 0x08, 0x08, "DISK DENSITY") + PORT_DIPSETTING( 0x08, "Double") + PORT_DIPSETTING( 0x00, "Single") INPUT_PORTS_END READ8_MEMBER( cortex_state::pio_r ) { - return (m_cru0005 ? 0x20 : 0) | 0xdf; + return (m_kbd_ack ? 0x20 : 0) | (m_vdp_int ? 0x40 : 0) | m_io_dsw->read() | 0x93; } READ8_MEMBER( cortex_state::keyboard_r ) @@ -114,25 +133,46 @@ WRITE_LINE_MEMBER( cortex_state::keyboard_ack_w ) if (!state) { m_maincpu->set_input_line(INT_9995_INT4, CLEAR_LINE); - m_cru0005 = 1; + m_kbd_ack = 1; } } +WRITE_LINE_MEMBER( cortex_state::romsw_w ) +{ + membank("bankr0")->set_entry(state ? 0 : 1); +} + +WRITE_LINE_MEMBER( cortex_state::vdp_int_w ) +{ + m_vdp_int = state ? 0 : 1; // change polarity to match mame +} + void cortex_state::kbd_put(u8 data) { m_term_data = data; - m_cru0005 = 0; + m_kbd_ack = 0; m_maincpu->set_input_line(INT_9995_INT4, ASSERT_LINE); } void cortex_state::machine_reset() { - m_cru0005 = 1; - uint8_t* ROM = memregion("maincpu")->base(); - memcpy(m_p_ram, ROM, 0x6000); + m_kbd_ack = 1; + m_vdp_int = 0; + m_beep->set_state(0); + membank("bankr0")->set_entry(1); // point at rom + membank("bankw0")->set_entry(0); // always write to ram m_maincpu->ready_line(ASSERT_LINE); } +DRIVER_INIT_MEMBER( cortex_state, init ) +{ + uint8_t *main = memregion("maincpu")->base(); + + membank("bankr0")->configure_entry(1, &main[0x10000]); + membank("bankr0")->configure_entry(0, &main[0x00000]); + membank("bankw0")->configure_entry(0, &main[0x00000]); +} + static MACHINE_CONFIG_START( cortex ) /* basic machine hardware */ /* TMS9995 CPU @ 12.0 MHz */ @@ -146,35 +186,42 @@ static MACHINE_CONFIG_START( cortex ) //MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cortex_state, ebus_int_ack_w)) //MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cortex_state, ebus_to_en_w)) //MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cortex_state, disk_size_w)) - //MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cortex_state, eprom_on_off_w)) - //MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cortex_state, bell_en_w)) + MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cortex_state, romsw_w)) + MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("beeper", beep_device, set_state)) /* video hardware */ - MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 ) + MCFG_DEVICE_ADD( "crtc", TMS9929A, XTAL_10_738635MHz / 2 ) + MCFG_TMS9928A_OUT_INT_LINE_CB(INPUTLINE("maincpu", INT_9995_INT1)) + MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(cortex_state, vdp_int_w)) MCFG_TMS9928A_VRAM_SIZE(0x4000) MCFG_TMS9928A_SCREEN_ADD_PAL( "screen" ) - MCFG_SCREEN_UPDATE_DEVICE( "tms9928a", tms9928a_device, screen_update ) + MCFG_SCREEN_UPDATE_DEVICE( "crtc", tms9928a_device, screen_update ) MCFG_DEVICE_ADD("keyboard", GENERIC_KEYBOARD, 0) MCFG_GENERIC_KEYBOARD_CB(PUT(cortex_state, kbd_put)) //MCFG_DEVICE_ADD("uart1", TMS9902, XTAL_12MHz / 4) //MCFG_DEVICE_ADD("uart2", TMS9902, XTAL_12MHz / 4) + + /* Sound */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("beeper", BEEP, 950) // guess + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.05) MACHINE_CONFIG_END /* ROM definition */ ROM_START( cortex ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + ROM_REGION( 0x18000, "maincpu", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS(0, "basic", "Cortex Bios") - ROMX_LOAD( "cortex.ic47", 0x0000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(1)) - ROMX_LOAD( "cortex.ic46", 0x2000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(1)) - ROMX_LOAD( "cortex.ic45", 0x4000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic47", 0x10000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic46", 0x12000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(1)) + ROMX_LOAD( "cortex.ic45", 0x14000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(1)) ROM_SYSTEM_BIOS(1, "forth", "FIG-Forth") - ROMX_LOAD( "forth.ic47", 0x0000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(2)) - ROMX_LOAD( "forth.ic46", 0x2000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(2)) + ROMX_LOAD( "forth.ic47", 0x10000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(2)) + ROMX_LOAD( "forth.ic46", 0x12000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(2)) ROM_END /* Driver */ // YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS -COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, 0, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) +COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, init, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING ) -- cgit v1.2.3-70-g09d2 From f0d5044758e6bd1c5ff37735854ff1514800db06 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 19:19:11 -0500 Subject: wpc_an: CPU type and clock determined (nw) --- src/mame/drivers/wpc_an.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/wpc_an.cpp b/src/mame/drivers/wpc_an.cpp index 636b35bbc12..9af1417157a 100644 --- a/src/mame/drivers/wpc_an.cpp +++ b/src/mame/drivers/wpc_an.cpp @@ -317,7 +317,7 @@ DRIVER_INIT_MEMBER(wpc_an_state,wpc_an) static MACHINE_CONFIG_START( wpc_an_base ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 2000000) + MCFG_CPU_ADD("maincpu", MC6809E, XTAL_8MHz / 4) // 68B09E MCFG_CPU_PROGRAM_MAP(wpc_an_map) MCFG_WMS_WPC_ADD("wpc") -- cgit v1.2.3-70-g09d2 From 3673bb580d1976d85a18ae83c04ebc11718f36a3 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 11 Dec 2017 01:39:29 +0100 Subject: New working machines ----------- The Shadow (Tiger handheld) [hap, Sean Riddle] Karnov (Tiger handheld) [hap, Sean Riddle] Battletoads (Tiger handheld) [hap, Sean Riddle] New working clones ------------------ Robin Hood (Tiger handheld) [hap, Sean Riddle] --- src/mame/drivers/hh_sm510.cpp | 340 +++++++++++++++++++++++++++++++++++++++++- src/mame/mame.lst | 4 + 2 files changed, 340 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index 6ee872aa1d6..9fc771ed7e3 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -1601,15 +1601,17 @@ MACHINE_CONFIG_END /*************************************************************************** - Tiger Gauntlet (model 7-778) + Tiger Gauntlet (model 7-778), Robin Hood (model 7-861) * Sharp SM510 under epoxy (die label CMS54C, KMS583) * lcd screen with custom segments, 1-bit sound - known releases: + known releases (Gauntlet): - World: Gauntlet - Japan: Gauntlet (published by Sega) - UK: Gauntlet (published by Grandstand) + Robin Hood is the same ROM, different LCD. + ***************************************************************************/ class tgaunt_state : public hh_sm510_state @@ -1667,6 +1669,13 @@ static INPUT_PORTS_START( tgaunt ) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") INPUT_PORTS_END +static INPUT_PORTS_START( trobhood ) + PORT_INCLUDE( tgaunt ) + + PORT_MODIFY("IN.3") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Money") +INPUT_PORTS_END + static MACHINE_CONFIG_START( tgaunt ) /* basic machine hardware */ @@ -1693,6 +1702,14 @@ static MACHINE_CONFIG_START( tgaunt ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( trobhood, tgaunt ) + + /* video hardware */ + MCFG_SCREEN_MODIFY("screen") + MCFG_SCREEN_SIZE(1468, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1468-1, 0, 1080-1) +MACHINE_CONFIG_END + @@ -1785,6 +1802,98 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Karnov (model 7-783) + * Sharp SM510 under epoxy (die label CMS54C, KMS582) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class tkarnov_state : public hh_sm510_state +{ +public: + tkarnov_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 6; + m_inp_fixed = 6; + } +}; + +// config + +static INPUT_PORTS_START( tkarnov ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Fire-Ball") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Boomerang") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shield") + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Max Score") + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tkarnov ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1477, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1477-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Batman (model 7-799) @@ -2148,6 +2257,98 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Battletoads (model 7-868) + * Sharp SM510 under epoxy (die label MB3) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class tbtoads_state : public hh_sm510_state +{ +public: + tbtoads_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 6; + m_inp_fixed = 6; + } +}; + +// config + +static INPUT_PORTS_START( tbtoads ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Attack Right") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Select") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Attack Left") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Score") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tbtoads ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1454, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1454-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Sonic The Hedgehog (model 78-513) @@ -2266,6 +2467,98 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger The Shadow (model 78-559) + * Sharp SM510 under epoxy (die label MJ5) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class tshadow_state : public hh_sm510_state +{ +public: + tshadow_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 6; + m_inp_fixed = 6; + } +}; + +// config + +static INPUT_PORTS_START( tshadow ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Punch") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shadow") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Kick") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tshadow ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1484, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1484-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Batman Forever - Double Dose of Doom (model 78-572) @@ -2779,6 +3072,14 @@ ROM_START( tgaunt ) ROM_LOAD( "tgaunt.svg", 0, 713020, CRC(1f65ae21) SHA1(57ca33d073d1096a7fc17f2bdac940868d1ae651) ) ROM_END +ROM_START( trobhood ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "583", 0x0000, 0x1000, CRC(598d8156) SHA1(9f776e8b9b4321e8118481e6b1304f8a38f9932e) ) + + ROM_REGION( 704892, "svg", 0) + ROM_LOAD( "trobhood.svg", 0, 704892, CRC(291fd8db) SHA1(1de6bd0e203f16c44f7d661e44863a1a919f3da9) ) +ROM_END + ROM_START( tddragon ) ROM_REGION( 0x1000, "maincpu", 0 ) @@ -2789,6 +3090,15 @@ ROM_START( tddragon ) ROM_END +ROM_START( tkarnov ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "582", 0x0000, 0x1000, CRC(cee85bdd) SHA1(143e39524f1dea523e0575f327ed189343cc87f5) ) + + ROM_REGION( 527360, "svg", 0) + ROM_LOAD( "tkarnov.svg", 0, 527360, CRC(ee918299) SHA1(2d8ccf7650ec9b71fcdbdf3f5228e17dca990216) ) +ROM_END + + ROM_START( tbatman ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "597", 0x0000, 0x1000, CRC(8b7acc97) SHA1(fe811675dc5c5ef9f6f969685c933926c8b9e868) ) @@ -2825,6 +3135,15 @@ ROM_START( tswampt ) ROM_END +ROM_START( tbtoads ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "mb3", 0x0000, 0x1000, CRC(8fa4c55a) SHA1(2be97e63dfed51313e180d7388dd431058db5a51) ) + + ROM_REGION( 694523, "svg", 0) + ROM_LOAD( "tbtoads.svg", 0, 694523, CRC(9a5c3ac5) SHA1(569e8ecd6dee75842e23eebf17611cef8d06ccf5) ) +ROM_END + + ROM_START( tsonic ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "n71.program", 0x0000, 0x1000, CRC(44cafd68) SHA1(bf8d0ab88d153fabc688ffec19959209ca79c3db) ) @@ -2837,6 +3156,15 @@ ROM_START( tsonic ) ROM_END +ROM_START( tshadow ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "mj5", 0x0000, 0x1000, CRC(09822d73) SHA1(30cae8b783a4f388193aee248fa18c6c1042e0ec) ) + + ROM_REGION( 946450, "svg", 0) + ROM_LOAD( "tshadow.svg", 0, 946450, CRC(5cab680a) SHA1(8f8f660c08fc56287362b11c183655047fbd91ca) ) +ROM_END + + ROM_START( tbatfor ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "mk3", 0x0000, 0x1000, CRC(9993c382) SHA1(0c89e21024315ce7c086af5390c60f5766028c4f) ) @@ -2892,13 +3220,17 @@ CONS( 1983, gnw_ml102, 0, 0, ml102, ml102, ml102_state, 0, "N CONS( 1984, gnw_bx301, 0, 0, bx301, bx301, bx301_state, 0, "Nintendo", "Game & Watch: Boxing", MACHINE_SUPPORTS_SAVE ) -CONS( 1988, tgaunt, 0, 0, tgaunt, tgaunt, tgaunt_state, 0, "Tiger Electronics (licensed from Tengen)", "Gauntlet (handheld)", MACHINE_SUPPORTS_SAVE ) -CONS( 1988, tddragon, 0, 0, tddragon, tddragon, tddragon_state, 0, "Tiger Electronics (licensed from Tradewest/Technos)", "Double Dragon (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, tgaunt, 0, 0, tgaunt, tgaunt, tgaunt_state, 0, "Tiger Electronics (licensed from Tengen)", "Gauntlet (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1991, trobhood, tgaunt, 0, trobhood, trobhood, tgaunt_state, 0, "Tiger Electronics", "Robin Hood (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, tddragon, 0, 0, tddragon, tddragon, tddragon_state, 0, "Tiger Electronics (licensed from Technos/Tradewest)", "Double Dragon (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, tkarnov, 0, 0, tkarnov, tkarnov, tkarnov_state, 0, "Tiger Electronics (licensed from Data East)", "Karnov (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1989, tbatman, 0, 0, tbatman, tbatman, tbatman_state, 0, "Tiger Electronics", "Batman (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, tsharr2, 0, 0, tsharr2, tsharr2, tsharr2_state, 0, "Tiger Electronics (licensed from Sega)", "Space Harrier II (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tswampt, 0, 0, tswampt, tswampt, tswampt_state, 0, "Tiger Electronics", "Swamp Thing (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1991, tbtoads, 0, 0, tbtoads, tbtoads, tbtoads_state, 0, "Tiger Electronics (licensed from Rare/Tradewest)", "Battletoads (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1992, tsonic, 0, 0, tsonic, tsonic, tsonic_state, 0, "Tiger Electronics (licensed from Sega)", "Sonic The Hedgehog (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1994, tshadow, 0, 0, tshadow, tshadow, tshadow_state, 0, "Tiger Electronics", "The Shadow (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1995, tbatfor, 0, 0, tbatfor, tbatfor, tbatfor_state, 0, "Tiger Electronics", "Batman Forever - Double Dose of Doom", MACHINE_SUPPORTS_SAVE ) CONS( 1995, tjdredd, 0, 0, tjdredd, tjdredd, tjdredd_state, 0, "Tiger Electronics", "Judge Dredd (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1996, tsjam, 0, 0, tsjam, tsjam, tsjam_state, 0, "Tiger Electronics", "Space Jam (handheld)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index ab1c501a5d9..466fa797377 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14712,9 +14712,13 @@ nupogodi // Elektronika taltbeast // Tiger tbatfor // Tiger tbatman // Tiger +tbtoads // Tiger tddragon // Tiger tgaunt // Tiger tjdredd // Tiger +tkarnov // Tiger +trobhood // Tiger +tshadow // Tiger tsharr2 // Tiger tsjam // Tiger tsonic // Tiger -- cgit v1.2.3-70-g09d2 From 2dcd31e2a13b499e9ad9ce7e1aa3ecc2055db973 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 20:00:10 -0500 Subject: decobsmt: CPU type (nw) --- src/mame/audio/decobsmt.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/audio/decobsmt.cpp b/src/mame/audio/decobsmt.cpp index 4f44be9987a..42839716bee 100644 --- a/src/mame/audio/decobsmt.cpp +++ b/src/mame/audio/decobsmt.cpp @@ -47,12 +47,12 @@ DEFINE_DEVICE_TYPE(DECOBSMT, decobsmt_device, "decobsmt", "Data East/Sega/Stern //------------------------------------------------- MACHINE_CONFIG_MEMBER( decobsmt_device::device_add_mconfig ) - MCFG_CPU_ADD(M6809_TAG, M6809, (3579580/2)) + MCFG_CPU_ADD(M6809_TAG, MC6809E, (3579580/2)) // 68B09E U6 (FIXME: clock probably wrong) MCFG_CPU_PROGRAM_MAP(decobsmt_map) MCFG_CPU_PERIODIC_INT_DRIVER(decobsmt_device, decobsmt_firq_interrupt, 489) /* Fixed FIRQ of 489Hz as measured on real (pinball) machine */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") - MCFG_BSMT2000_ADD(BSMT_TAG, 24000000) + MCFG_BSMT2000_ADD(BSMT_TAG, XTAL_24MHz) MCFG_DEVICE_ADDRESS_MAP(0, bsmt_map) MCFG_BSMT2000_READY_CALLBACK(decobsmt_device, bsmt_ready_callback) MCFG_SOUND_ROUTE(0, "lspeaker", 2.0) -- cgit v1.2.3-70-g09d2 From 8ec86af0a5bb88f8a35adeb07e5add5b3cda161b Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 10 Dec 2017 20:07:40 -0500 Subject: decobsmt: 2 MHz is OK (nw) --- src/mame/audio/decobsmt.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/audio/decobsmt.cpp b/src/mame/audio/decobsmt.cpp index 42839716bee..577243581bb 100644 --- a/src/mame/audio/decobsmt.cpp +++ b/src/mame/audio/decobsmt.cpp @@ -47,7 +47,7 @@ DEFINE_DEVICE_TYPE(DECOBSMT, decobsmt_device, "decobsmt", "Data East/Sega/Stern //------------------------------------------------- MACHINE_CONFIG_MEMBER( decobsmt_device::device_add_mconfig ) - MCFG_CPU_ADD(M6809_TAG, MC6809E, (3579580/2)) // 68B09E U6 (FIXME: clock probably wrong) + MCFG_CPU_ADD(M6809_TAG, MC6809E, XTAL_24MHz / 12) // 68B09E U6 (E & Q = 2 MHz according to manual) MCFG_CPU_PROGRAM_MAP(decobsmt_map) MCFG_CPU_PERIODIC_INT_DRIVER(decobsmt_device, decobsmt_firq_interrupt, 489) /* Fixed FIRQ of 489Hz as measured on real (pinball) machine */ -- cgit v1.2.3-70-g09d2 From 47960fc1a305cd0a42939c6435fb6e07b8706ea9 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 11 Dec 2017 03:21:46 +0100 Subject: New working software list additions ----------------------------------- ti95_cart: Mathematics Library [unknown] ti95_cart: Statistics Library [unknown] --- hash/ti95_cart.xml | 41 +++++++++++++++++++++++++++++++++++++++++ src/mame/drivers/ti74.cpp | 2 +- 2 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 hash/ti95_cart.xml diff --git a/hash/ti95_cart.xml b/hash/ti95_cart.xml new file mode 100644 index 00000000000..9170dd1ea66 --- /dev/null +++ b/hash/ti95_cart.xml @@ -0,0 +1,41 @@ + + + + + + + + + + Mathematics Library + 1986 + Texas Instruments + + + + + + + + + Statistics Library + 1986 + Texas Instruments + + + + + + + + diff --git a/src/mame/drivers/ti74.cpp b/src/mame/drivers/ti74.cpp index 180ef4d8f0a..23fa326b0ea 100644 --- a/src/mame/drivers/ti74.cpp +++ b/src/mame/drivers/ti74.cpp @@ -572,7 +572,7 @@ static MACHINE_CONFIG_START( ti95 ) MCFG_GENERIC_EXTENSIONS("bin,rom,256") MCFG_GENERIC_LOAD(ti74_state, ti74_cartridge) - //MCFG_SOFTWARE_LIST_ADD("cart_list", "ti95_cart") + MCFG_SOFTWARE_LIST_ADD("cart_list", "ti95_cart") MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From 0a8d742f5807d93ba6b293f24212952bb7835471 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Mon, 11 Dec 2017 03:16:31 -0300 Subject: New WORKING clones -------------------- Slot (unknown bootleg?) [Alessandro Ghirardi, Lorenzo Fongaro] --- src/mame/drivers/murogmbl.cpp | 179 +++++++++++++++++++++++++++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 178 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/murogmbl.cpp b/src/mame/drivers/murogmbl.cpp index b94bb13b192..6b5fd170e6a 100644 --- a/src/mame/drivers/murogmbl.cpp +++ b/src/mame/drivers/murogmbl.cpp @@ -1,6 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Roberto Zandona' -/* Unknown - Poker (morugem +/* Unknown - Poker (morugem bootleg) + Unknown - Slot driver by Roberto Zandona' thanks to Angelo Salese for some precious advice @@ -65,6 +66,27 @@ public: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); }; +class slotunbl_state : public driver_device +{ +public: + slotunbl_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_gfxdecode(*this, "gfxdecode"), + m_palette(*this, "palette"), + m_video(*this, "video") { } + + required_device m_maincpu; + required_device m_gfxdecode; + required_device m_palette; + + required_shared_ptr m_video; + + virtual void video_start() override; + DECLARE_PALETTE_INIT(slotunbl); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); +}; PALETTE_INIT_MEMBER(murogmbl_state, murogmbl) { @@ -92,8 +114,34 @@ PALETTE_INIT_MEMBER(murogmbl_state, murogmbl) } } +PALETTE_INIT_MEMBER(slotunbl_state, slotunbl) +{ + const uint8_t *color_prom = memregion("proms")->base(); + int bit0, bit1, bit2 , r, g, b; + int i; + + for (i = 0; i < 0x20; ++i) + { + bit0 = (color_prom[0] >> 0) & 0x01; + bit1 = (color_prom[0] >> 1) & 0x01; + bit2 = (color_prom[0] >> 2) & 0x01; + r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = (color_prom[0] >> 3) & 0x01; + bit1 = (color_prom[0] >> 4) & 0x01; + bit2 = (color_prom[0] >> 5) & 0x01; + g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = 0; + bit1 = (color_prom[0] >> 6) & 0x01; + bit2 = (color_prom[0] >> 7) & 0x01; + b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + + palette.set_pen_color(i, rgb_t(r, g, b)); + color_prom++; + } +} + static ADDRESS_MAP_START( murogmbl_map, AS_PROGRAM, 8, murogmbl_state ) - AM_RANGE(0x0000, 0x1fff) AM_ROM + AM_RANGE(0x0000, 0x1fFf) AM_ROM AM_RANGE(0x4000, 0x43ff) AM_RAM AM_RANGE(0x4800, 0x4bff) AM_RAM AM_RANGE(0x5800, 0x5bff) AM_RAM AM_SHARE("video") @@ -104,10 +152,26 @@ static ADDRESS_MAP_START( murogmbl_map, AS_PROGRAM, 8, murogmbl_state ) AM_RANGE(0x7800, 0x7800) AM_READNOP AM_DEVWRITE("dac", dac_byte_interface, write) /* read is always discarded */ ADDRESS_MAP_END +static ADDRESS_MAP_START( slotunbl_map, AS_PROGRAM, 8, slotunbl_state ) + AM_RANGE(0x0000, 0x1fFf) AM_ROM + AM_RANGE(0x4000, 0x43ff) AM_RAM + AM_RANGE(0x4800, 0x4fff) AM_RAM + AM_RANGE(0x5000, 0x53ff) AM_RAM AM_SHARE("video") +// AM_RANGE(0x5400, 0x5fff) AM_RAM + AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") + AM_RANGE(0x6800, 0x6800) AM_READ_PORT("DSW") + AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN1") + AM_RANGE(0x7800, 0x7800) AM_READNOP AM_DEVWRITE("dac", dac_byte_interface, write) /* read is always discarded */ +ADDRESS_MAP_END + void murogmbl_state::video_start() { } +void slotunbl_state::video_start() +{ +} + uint32_t murogmbl_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { gfx_element *gfx = m_gfxdecode->gfx(0); @@ -128,6 +192,26 @@ uint32_t murogmbl_state::screen_update(screen_device &screen, bitmap_ind16 &bitm return 0; } +uint32_t slotunbl_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + gfx_element *gfx = m_gfxdecode->gfx(0); + int count = 0; + + int y, x; + + for (y = 0; y < 32; y++) + { + for (x = 0; x < 32; x++) + { + int tile = m_video[count]; + gfx->opaque(bitmap,cliprect, tile, 0, 0, 0, x * 8, y * 8); + + count++; + } + } + return 0; +} + static INPUT_PORTS_START( murogmbl ) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_CANCEL ) PORT_NAME("Clear") @@ -176,6 +260,54 @@ static INPUT_PORTS_START( murogmbl ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( slotunbl ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_CANCEL ) PORT_NAME("Clear") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_BET ) PORT_NAME("Replay") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_DEAL ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_POKER_HOLD5 ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Coin clear") PORT_CODE(KEYCODE_S) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_NAME("Coin 1") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_NAME("Coin 2") + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_HOLD1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_POKER_HOLD2 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_POKER_HOLD3 ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_POKER_HOLD4 ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + + PORT_START("DSW") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coin_B ) ) + PORT_DIPSETTING( 0x08, "10 credits" ) + PORT_DIPSETTING( 0x00, "5 credits" ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) +INPUT_PORTS_END + static const gfx_layout layout8x8x2 = { 8,8, @@ -193,6 +325,10 @@ static GFXDECODE_START( murogmbl ) GFXDECODE_ENTRY( "gfx1", 0, layout8x8x2, 0x0, 1 ) GFXDECODE_END +static GFXDECODE_START( slotunbl ) + GFXDECODE_ENTRY( "gfx1", 0, layout8x8x2, 0x0, 1 ) +GFXDECODE_END + static MACHINE_CONFIG_START( murogmbl ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", Z80, 1000000) /* Z80? */ @@ -219,8 +355,32 @@ static MACHINE_CONFIG_START( murogmbl ) MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END +static MACHINE_CONFIG_START( slotunbl ) + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", Z80, 1000000) /* Z80? */ + MCFG_CPU_PROGRAM_MAP(slotunbl_map) + + MCFG_GFXDECODE_ADD("gfxdecode", "palette", slotunbl) + /* video hardware */ + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) + MCFG_SCREEN_SIZE(64*8, 32*8) + MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) + MCFG_SCREEN_UPDATE_DRIVER(slotunbl_state, screen_update) + MCFG_SCREEN_PALETTE("palette") + + MCFG_PALETTE_ADD("palette", 0x100) + MCFG_PALETTE_INIT_OWNER(slotunbl_state, slotunbl) + + MCFG_SPEAKER_STANDARD_MONO("speaker") + MCFG_SOUND_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // unknown DAC + MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) + MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT) +MACHINE_CONFIG_END + ROM_START(murogmbl) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("2532.5e", 0x0000, 0x1000, CRC(093d4560) SHA1(d5401b5f7a2ebe5099fefc5b09f8710886e243b2) ) @@ -234,4 +394,19 @@ ROM_START(murogmbl) ROM_LOAD( "74s288.a8", 0x0000, 0x0020, CRC(fc35201c) SHA1(4549e228c48992e0d10957f029b89a547392e72b) ) ROM_END +ROM_START(slotunbl) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD("2532.e7", 0x0000, 0x1000, CRC(031929a7) SHA1(a140e1450b6196bbe9f130e7f3b7cfe2f876b86d) ) + ROM_LOAD("2532.e7", 0x1000, 0x1000, CRC(031929a7) SHA1(a140e1450b6196bbe9f130e7f3b7cfe2f876b86d) ) + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD("2516.d3", 0x0000, 0x0800, CRC(708764d8) SHA1(f914ae3318558c2530f007a427ec98a529984bb4) ) + ROM_LOAD("2516.d4", 0x0800, 0x0800, CRC(2cffb600) SHA1(d7c8ea6395e9cba43b9fe0cb9ddf45b96c442544) ) + + ROM_REGION( 0x0020, "proms", 0 ) + ROM_LOAD( "74s288.a8", 0x0000, 0x0020, NO_DUMP ) +ROM_END + GAME( 1982, murogmbl, murogem, murogmbl, murogmbl, murogmbl_state, 0, ROT0, "bootleg?", "Muroge Monaco (bootleg?)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) + +GAME( 1982, slotunbl, 0, slotunbl, slotunbl, slotunbl_state, 0, ROT0, "bootleg?", "Slot (unknown bootleg?)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 466fa797377..812b478211d 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -28313,6 +28313,7 @@ murogemb // ??? @source:murogmbl.cpp murogmbl // ??? +slotunbl // ??? @source:mustache.cpp mustache // (c) 1987 March -- cgit v1.2.3-70-g09d2 From a3aa47e8e13f083fb0fd0fac6cd2a56b4a3f517b Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 01:17:09 -0500 Subject: bfcobra: Another 6809 identified (nw) --- src/mame/drivers/bfcobra.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/bfcobra.cpp b/src/mame/drivers/bfcobra.cpp index 7af75c64ae9..66b3481dad3 100644 --- a/src/mame/drivers/bfcobra.cpp +++ b/src/mame/drivers/bfcobra.cpp @@ -92,7 +92,7 @@ Defines */ #define Z80_XTAL 5910000 /* Unconfirmed */ -#define M6809_XTAL 1000000 +#define M6809_XTAL 4000000 /* Unconfirmed */ @@ -1633,7 +1633,7 @@ static MACHINE_CONFIG_START( bfcobra ) MCFG_CPU_IO_MAP(z80_io_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", bfcobra_state, vblank_gen) - MCFG_CPU_ADD("audiocpu", M6809, M6809_XTAL) + MCFG_CPU_ADD("audiocpu", MC6809, M6809_XTAL) // MC6809P MCFG_CPU_PROGRAM_MAP(m6809_prog_map) MCFG_CPU_PERIODIC_INT_DRIVER(bfcobra_state, timer_irq, 1000) -- cgit v1.2.3-70-g09d2 From 44eb87e338f11247092d745c7942a1e40ad484ea Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 01:18:50 -0500 Subject: bfcobra: Bad clocks, argh (nw) --- src/mame/drivers/bfcobra.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/bfcobra.cpp b/src/mame/drivers/bfcobra.cpp index 66b3481dad3..a182d6567f6 100644 --- a/src/mame/drivers/bfcobra.cpp +++ b/src/mame/drivers/bfcobra.cpp @@ -1655,7 +1655,7 @@ static MACHINE_CONFIG_START( bfcobra ) MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_SOUND_ADD("aysnd", AY8910, M6809_XTAL) + MCFG_SOUND_ADD("aysnd", AY8910, M6809_XTAL / 4) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20) MCFG_SOUND_ADD("upd", UPD7759, UPD7759_STANDARD_CLOCK) -- cgit v1.2.3-70-g09d2 From 05a9ab23c139b9137993d4fe5bb16e00065dfed8 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 02:43:07 -0500 Subject: mpu4.cpp: Proper CPU type and XTAL value (nw) --- src/emu/drivers/xtal.h | 1 + src/mame/includes/mpu4.h | 2 +- src/mame/machine/mpu4.cpp | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h index 8c9fb948510..14ef6e9528b 100644 --- a/src/emu/drivers/xtal.h +++ b/src/emu/drivers/xtal.h @@ -100,6 +100,7 @@ enum XTAL_6MHz = 6000000, /* American Poker II, Taito SJ System */ XTAL_6_144MHz = 6144000, /* Used on Alpha Denshi early 80's games sound board, Casio FP-200 and Namco Universal System 16 */ XTAL_6_5MHz = 6500000, /* Jupiter Ace */ + XTAL_6_88MHz = 6880000, /* Barcrest MPU4 */ XTAL_6_9MHz = 6900000, /* BBN BitGraph CPU */ XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */ XTAL_7_15909MHz = 7159090, /* Blood Bros (2x NTSC subcarrier) */ diff --git a/src/mame/includes/mpu4.h b/src/mame/includes/mpu4.h index ac8e8747ad3..ec7a0396b78 100644 --- a/src/mame/includes/mpu4.h +++ b/src/mame/includes/mpu4.h @@ -16,7 +16,7 @@ #include "machine/meters.h" -#define MPU4_MASTER_CLOCK (6880000) +#define MPU4_MASTER_CLOCK XTAL_6_88MHz #define VIDEO_MASTER_CLOCK XTAL_10MHz diff --git a/src/mame/machine/mpu4.cpp b/src/mame/machine/mpu4.cpp index d6718c4b4c3..838feffd8fe 100644 --- a/src/mame/machine/mpu4.cpp +++ b/src/mame/machine/mpu4.cpp @@ -3087,7 +3087,7 @@ MACHINE_CONFIG_START( mpu4base ) MCFG_MACHINE_START_OVERRIDE(mpu4_state,mod2 ) MCFG_MACHINE_RESET_OVERRIDE(mpu4_state,mpu4) - MCFG_CPU_ADD("maincpu", M6809, MPU4_MASTER_CLOCK/4) + MCFG_CPU_ADD("maincpu", MC6809, MPU4_MASTER_CLOCK) // MC68B09P MCFG_CPU_PROGRAM_MAP(mpu4_memmap) MCFG_FRAGMENT_ADD(mpu4_common) -- cgit v1.2.3-70-g09d2 From 60847519361ca7dbd2b10ee584cb07d5732bc51f Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 02:43:32 -0500 Subject: Add BITSWAP4 and BITSWAP12 for future use (nw) --- src/emu/emucore.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/emu/emucore.h b/src/emu/emucore.h index 1782ac8726d..212bf31c849 100644 --- a/src/emu/emucore.h +++ b/src/emu/emucore.h @@ -263,7 +263,9 @@ template T bitswap(T val, U... b) } // explicit versions that check number of bit position arguments +template constexpr T BITSWAP4(T val, U... b) { return bitswap<4U>(val, b...); } template constexpr T BITSWAP8(T val, U... b) { return bitswap<8U>(val, b...); } +template constexpr T BITSWAP12(T val, U... b) { return bitswap<12U>(val, b...); } template constexpr T BITSWAP16(T val, U... b) { return bitswap<16U>(val, b...); } template constexpr T BITSWAP24(T val, U... b) { return bitswap<24U>(val, b...); } template constexpr T BITSWAP32(T val, U... b) { return bitswap<32U>(val, b...); } -- cgit v1.2.3-70-g09d2 From 96a05cd2fcb3239c5ffa3ebc02d448048b1bf1b8 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 02:44:00 -0500 Subject: jpmmps.cpp: Add LS259 and correct clocks (nw) --- src/mame/drivers/jpmmps.cpp | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/src/mame/drivers/jpmmps.cpp b/src/mame/drivers/jpmmps.cpp index 1f4609a5223..be18b9c96ba 100644 --- a/src/mame/drivers/jpmmps.cpp +++ b/src/mame/drivers/jpmmps.cpp @@ -33,6 +33,7 @@ #include "cpu/tms9900/tms9995.h" #include "sound/sn76496.h" +#include "machine/74259.h" #include "machine/i8255.h" #include "machine/tms9902.h" #include "machine/meters.h" @@ -185,15 +186,7 @@ static ADDRESS_MAP_START( jpmmps_io_map, AS_IO, 8, jpmmps_state ) // AM_RANGE(0x0027, 0x0027) // uart2 int AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE("tms9902_ic10", tms9902_device, cruread, cruwrite) - -// AM_RANGE(0x0060, 0x0060) // watchdog -// AM_RANGE(0x0061, 0x0061) // ram en -// AM_RANGE(0x0062, 0x0062) // alarm -// AM_RANGE(0x0063, 0x0063) // nmi en -// AM_RANGE(0x0064, 0x0064) // reel en -// AM_RANGE(0x0065, 0x0065) // io en -// AM_RANGE(0x0066, 0x0066) // bb -// AM_RANGE(0x0067, 0x0067) // diagnostic led + AM_RANGE(0x0060, 0x0067) AM_DEVWRITE("mainlatch", ls259_device, write_d0) ADDRESS_MAP_END @@ -232,10 +225,10 @@ WRITE8_MEMBER(jpmmps_state::jpmmps_ic22_portc_w) } -// these are wrong -#define MAIN_CLOCK 2000000 -#define SOUND_CLOCK 2000000 -#define DUART_CLOCK 2000000 +// BCLKOUT (used by peripherals) is normally TMS9995 CLKOUT; however, MPS1 allows an external CLK DMA to be selected instead +#define MAIN_CLOCK XTAL_6MHz +#define SOUND_CLOCK (MAIN_CLOCK / 4) +#define DUART_CLOCK (MAIN_CLOCK / 4) void jpmmps_state::machine_reset() @@ -249,6 +242,18 @@ static MACHINE_CONFIG_START( jpmmps ) // CPU TMS9995, standard variant; no line connections MCFG_TMS99xx_ADD("maincpu", TMS9995, MAIN_CLOCK, jpmmps_map, jpmmps_io_map) + MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC10 + MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP) // watchdog + MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // ram en + MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // alarm + MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP) // nmi en + //MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("reelmcu", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT // reel en + MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // io en + MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP) // bb + MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // diagnostic led + + //MCFG_CPU_ADD("reelmcu", TMS7041, XTAL_5MHz) + MCFG_DEVICE_ADD("ppi8255_ic26", I8255, 0) // Port B 0 is coin lockout MCFG_I8255_OUT_PORTC_CB(WRITE8(jpmmps_state, jpmmps_meters_w)) -- cgit v1.2.3-70-g09d2 From caed83833cb582c6b041f14873ec366f8b013c21 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Mon, 11 Dec 2017 15:11:26 +0000 Subject: pgm2: memcard reader now uses image_device stuff, cards can be inserted / removed and get saved [Metallic, David Haywood] promoted China set of Oriental Legend 2 to working promoted Knights of Valour 2 New Legend to working as each game/region requires a valid default card in order to save said cards are part of romset. (there's probably a cleaner way to do the device finder stuff but I forgot and can't find reference) --- scripts/target/mame/arcade.lua | 2 + src/mame/drivers/pgm2.cpp | 89 +++++++++++++++++++++----------------- src/mame/includes/pgm2.h | 18 ++++++-- src/mame/machine/pgm2_memcard.cpp | 91 +++++++++++++++++++++++++++++++++++++++ src/mame/machine/pgm2_memcard.h | 67 ++++++++++++++++++++++++++++ 5 files changed, 224 insertions(+), 43 deletions(-) create mode 100644 src/mame/machine/pgm2_memcard.cpp create mode 100644 src/mame/machine/pgm2_memcard.h diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index f0af50fd870..9a5fed7b765 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -1950,6 +1950,8 @@ files { MAME_DIR .. "src/mame/drivers/pgm2.cpp", MAME_DIR .. "src/mame/video/pgm2.cpp", MAME_DIR .. "src/mame/includes/pgm2.h", + MAME_DIR .. "src/mame/machine/pgm2_memcard.cpp", + MAME_DIR .. "src/mame/machine/pgm2_memcard.h", MAME_DIR .. "src/mame/drivers/pgm3.cpp", MAME_DIR .. "src/mame/drivers/spoker.cpp", MAME_DIR .. "src/mame/machine/igs036crypt.cpp", diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index f7e9dba632e..794de03f295 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -144,26 +144,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2) m_arm_aic->set_irq(0x46); } -static const uint8_t orleg2_china_card[32] = { - 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x10, 0x00, 0x00, 0x03, 0x00, 0x49, 0x47, 0x53, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; -#ifdef UNUSED_DEFINITION -static const uint8_t kov2nl_china_card[32] = { - 0xA2, 0x13, 0x10, 0x91, 0x05, 0x0C, 0x81, 0x15, 0x06, 0x00, 0x00, 0x04, 0x00, 0x49, 0x47, 0x53, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xD2, 0x76, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; -#endif - // "MPU" MCU HLE starts here -// TODO: make data cards using image_interface -// command delays is far not correct, might not work in other games -// command results probably either incorrect (except for explicit checked bytes) -void pgm2_state::mcu_command(bool is_command) +// command delays are far from correct, might not work in other games +// command results probably incorrect (except for explicit checked bytes) +void pgm2_state::mcu_command(address_space &space, bool is_command) { uint8_t cmd = m_mcu_regs[0] & 0xff; -// if (is_command && cmd != 0xf6) -// logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); + // if (is_command && cmd != 0xf6) + // logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); if (is_command) { @@ -199,11 +187,11 @@ void pgm2_state::mcu_command(bool is_command) m_mcu_result0 = cmd; m_mcu_result1 = 0; } - break; - // unknown / unimplemented, all C0-C9 commands is IC Card RW related - // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) + break; + // unknown / unimplemented, all C0-C9 commands is IC Card RW related + // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card - if (!m_have_card[arg1]) + if (m_memcard_device[arg1 & 3]->present() == -1) status = 0xf4; m_mcu_result0 = cmd; break; @@ -211,11 +199,20 @@ void pgm2_state::mcu_command(bool is_command) m_mcu_result0 = cmd; break; case 0xc2: // read data to shared ram, args - offset, len - memcpy(&m_shareram[(~m_share_bank & 1) * 128], &m_card_data[arg1][arg2], arg3); + for (int i = 0; i < arg3; i++) + { + if (m_memcard_device[arg1 & 3]->present() != -1) + m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard_device[arg1 & 3]->read(space, arg2 + i); + } + m_mcu_result0 = cmd; break; case 0xc3: // save data from shared ram, args - offset, len - memcpy(&m_card_data[arg1][arg2], &m_shareram[(~m_share_bank & 1) * 128], arg3); + for (int i = 0; i < arg3; i++) + { + if (m_memcard_device[arg1 & 3]->present() != -1) + m_memcard_device[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]); + } m_mcu_result0 = cmd; break; case 0xc7: // get card ID?, no args, result1 expected to be fixed value for new card @@ -223,7 +220,9 @@ void pgm2_state::mcu_command(bool is_command) m_mcu_result0 = cmd; break; case 0xc8: // write byte, args - offset, data byte - m_card_data[arg1][arg2] = arg3; + if (m_memcard_device[arg1 & 3]->present() != -1) + m_memcard_device[arg1 & 3]->write(space, arg2, arg3); + m_mcu_result0 = cmd; break; case 0xc4: // not used @@ -262,9 +261,9 @@ WRITE32_MEMBER(pgm2_state::mcu_w) COMBINE_DATA(&m_mcu_regs[reg]); if (reg == 2 && m_mcu_regs[2]) // irq to mcu - mcu_command(true); + mcu_command(space, true); if (reg == 5 && m_mcu_regs[5]) // ack to mcu (written at the end of irq handler routine) - mcu_command(false); + mcu_command(space, false); } static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) @@ -428,6 +427,11 @@ void pgm2_state::machine_start() save_item(NAME(m_mcu_last_cmd)); save_item(NAME(m_shareram)); save_item(NAME(m_share_bank)); + + m_memcard_device[0] = m_memcard0; + m_memcard_device[1] = m_memcard1; + m_memcard_device[2] = m_memcard2; + m_memcard_device[3] = m_memcard3; } void pgm2_state::machine_reset() @@ -436,11 +440,6 @@ void pgm2_state::machine_reset() m_realspritekey = 0; m_mcu_last_cmd = 0; m_share_bank = 0; - - m_have_card[0] = true; - m_have_card[1] = m_have_card[2] = m_have_card[3] = false; - memcpy(m_card_data[0], orleg2_china_card, sizeof(orleg2_china_card)); -// memcpy(m_card_data[0], kov2nl_china_card, sizeof(kov2nl_china_card)); } static const gfx_layout tiles8x8_layout = @@ -516,6 +515,13 @@ static MACHINE_CONFIG_START( pgm2 ) MCFG_YMZ774_ADD("ymz774", 16384000) // is clock correct ? MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + + MCFG_PGM2_MEMCARD_ADD("memcard_p1") + MCFG_PGM2_MEMCARD_ADD("memcard_p2") + MCFG_PGM2_MEMCARD_ADD("memcard_p3") + MCFG_PGM2_MEMCARD_ADD("memcard_p4") + + MACHINE_CONFIG_END /* using macros for the video / sound roms because the locations never change between sets, and @@ -578,7 +584,9 @@ MACHINE_CONFIG_END #define ORLEG2_INTERNAL_CHINA \ ROM_REGION( 0x04000, "maincpu", 0 ) \ - ROM_LOAD( "xyj2_cn.igs036", 0x00000000, 0x0004000, CRC(bcce7641) SHA1(c3b5cf6e9f6eae09b6785314777a52b34c3c7657) ) + ROM_LOAD( "xyj2_cn.igs036", 0x00000000, 0x0004000, CRC(bcce7641) SHA1(c3b5cf6e9f6eae09b6785314777a52b34c3c7657) ) \ + ROM_REGION( 0x100, "default_card", 0 ) \ + ROM_LOAD( "blank_orleg2_china_card.pg2", 0x000, 0x100, CRC(099156f0) SHA1(a621c9772a98719c657bba3a1bf235487eb78615) ) #define ORLEG2_INTERNAL_OVERSEAS \ ROM_REGION( 0x04000, "maincpu", 0 ) \ @@ -658,7 +666,10 @@ ROM_END #define KOV2NL_INTERNAL_CHINA \ ROM_REGION( 0x04000, "maincpu", 0 ) \ - ROM_LOAD( "gsyx_igs036_china.rom", 0x00000000, 0x0004000, CRC(e09fe4ce) SHA1(c0cac64ef8727cbe79d503ec4df66ddb6f2c925e) ) + ROM_LOAD( "gsyx_igs036_china.rom", 0x00000000, 0x0004000, CRC(e09fe4ce) SHA1(c0cac64ef8727cbe79d503ec4df66ddb6f2c925e) ) \ + ROM_REGION( 0x100, "default_card", 0 ) \ + ROM_LOAD( "blank_kov2nl_china_card.pg2", 0x000, 0x100, CRC(91786244) SHA1(ac0ce11b46c19ffe21f6b94bc83ef061f547b591) ) + ROM_START( kov2nl ) KOV2NL_INTERNAL_CHINA @@ -1024,14 +1035,14 @@ GAME( 2007, orleg2, 0, pgm2, pgm2, pgm2_state, orleg2, GAME( 2007, orleg2_103, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, Oversea)", 0 ) GAME( 2007, orleg2_101, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, Oversea)", 0 ) -GAME( 2007, orleg2_104cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V104, China)", MACHINE_NOT_WORKING ) -GAME( 2007, orleg2_103cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, China)", MACHINE_NOT_WORKING ) -GAME( 2007, orleg2_101cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, China)", MACHINE_NOT_WORKING ) +GAME( 2007, orleg2_104cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V104, China)", 0 ) +GAME( 2007, orleg2_103cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V103, China)", 0 ) +GAME( 2007, orleg2_101cn, orleg2, pgm2, pgm2, pgm2_state, orleg2, ROT0, "IGS", "Oriental Legend 2 (V101, China)", 0 ) // Knights of Valour 2 New Legend -GAME( 2008, kov2nl, 0, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V302, China)", MACHINE_NOT_WORKING ) -GAME( 2008, kov2nl_301, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V301, China)", MACHINE_NOT_WORKING ) -GAME( 2008, kov2nl_300, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V300, China)", MACHINE_NOT_WORKING ) // was dumped from a Taiwan board tho +GAME( 2008, kov2nl, 0, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V302, China)", 0 ) +GAME( 2008, kov2nl_301, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V301, China)", 0 ) +GAME( 2008, kov2nl_300, kov2nl, pgm2, pgm2, pgm2_state, kov2nl, ROT0, "IGS", "Knights of Valour 2 New Legend (V300, China)", 0 ) // was dumped from a Taiwan board tho // Dodonpachi Daioujou Tamashii - should be a V200 too GAME( 2010, ddpdojh, 0, pgm2, pgm2, pgm2_state, ddpdojh, ROT270, "IGS", "Dodonpachi Daioujou Tamashii (V201, China)", MACHINE_NOT_WORKING ) diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index c25e0b91add..c31ee657c4a 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -16,6 +16,7 @@ #include "machine/nvram.h" #include "machine/timer.h" #include "machine/atmel_arm_aic.h" +#include "machine/pgm2_memcard.h" class pgm2_state : public driver_device { @@ -39,7 +40,11 @@ public: m_sp_palette(*this, "sp_palette"), m_bg_palette(*this, "bg_palette"), m_tx_palette(*this, "tx_palette"), - m_mcu_timer(*this, "mcu_timer") + m_mcu_timer(*this, "mcu_timer"), + m_memcard0(*this, "memcard_p1"), + m_memcard1(*this, "memcard_p2"), + m_memcard2(*this, "memcard_p3"), + m_memcard3(*this, "memcard_p4") { } DECLARE_READ32_MEMBER(unk_startup_r); @@ -116,9 +121,7 @@ private: uint32_t m_mcu_result0; uint32_t m_mcu_result1; uint8_t m_mcu_last_cmd; - void mcu_command(bool is_command); - uint8_t m_card_data[4][0x100]; - bool m_have_card[4]; + void mcu_command(address_space &space, bool is_command); // devices required_device m_maincpu; @@ -139,6 +142,13 @@ private: required_device m_bg_palette; required_device m_tx_palette; required_device m_mcu_timer; + + optional_device m_memcard0; + optional_device m_memcard1; + optional_device m_memcard2; + optional_device m_memcard3; + pgm2_memcard_device *m_memcard_device[4]; + }; #endif diff --git a/src/mame/machine/pgm2_memcard.cpp b/src/mame/machine/pgm2_memcard.cpp new file mode 100644 index 00000000000..73755409294 --- /dev/null +++ b/src/mame/machine/pgm2_memcard.cpp @@ -0,0 +1,91 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood, Miodrag Milanovic +/********************************************************************* + + pgm2_memcard.cpp + + PGM2 Memory card functions. + (based on ng_memcard.cpp) + +*********************************************************************/ + +#include "emu.h" +#include "emuopts.h" + +#include "pgm2_memcard.h" + + +// device type definition +DEFINE_DEVICE_TYPE(PGM2_MEMCARD, pgm2_memcard_device, "pgm2_memcard", "PGM2 Memory Card") + +//------------------------------------------------- +// pgm2_memcard_device - constructor +//------------------------------------------------- + +pgm2_memcard_device::pgm2_memcard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PGM2_MEMCARD, tag, owner, clock) + , device_image_interface(mconfig, *this) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void pgm2_memcard_device::device_start() +{ + save_item(NAME(m_memcard_data)); +} + +/*------------------------------------------------- + memcard_insert - insert an existing memory card + with the given index +-------------------------------------------------*/ + +image_init_result pgm2_memcard_device::call_load() +{ + if(length() != 0x100) + return image_init_result::FAIL; + + fseek(0, SEEK_SET); + size_t ret = fread(m_memcard_data, 0x100); + if(ret != 0x100) + return image_init_result::FAIL; + + return image_init_result::PASS; +} + +void pgm2_memcard_device::call_unload() +{ + fseek(0, SEEK_SET); + fwrite(m_memcard_data, 0x100); +} + +image_init_result pgm2_memcard_device::call_create(int format_type, util::option_resolution *format_options) +{ + // cards must contain valid defaults for each game / region or they don't work? + memory_region *rgn = memregion("^default_card"); + + if (!rgn) + return image_init_result::FAIL; + + memcpy(m_memcard_data, rgn->base(), 0x100); + + size_t ret = fwrite(m_memcard_data, 0x100); + if(ret != 0x100) + return image_init_result::FAIL; + + return image_init_result::PASS; +} + + +READ8_MEMBER(pgm2_memcard_device::read) +{ + return m_memcard_data[offset]; +} + +WRITE8_MEMBER(pgm2_memcard_device::write) +{ + m_memcard_data[offset] = data; +} diff --git a/src/mame/machine/pgm2_memcard.h b/src/mame/machine/pgm2_memcard.h new file mode 100644 index 00000000000..0aa4d2adb04 --- /dev/null +++ b/src/mame/machine/pgm2_memcard.h @@ -0,0 +1,67 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood, Miodrag Milanovic +/********************************************************************* + + pgm2_memcard.h + + PGM2 Memory card functions. + (based on ng_memcard.h) + +*********************************************************************/ +#ifndef MAME_MACHINE_PGM2_MEMCARD_H +#define MAME_MACHINE_PGM2_MEMCARD_H + +#pragma once + + +//************************************************************************** +// INTERFACE CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_PGM2_MEMCARD_ADD(_tag) \ + MCFG_DEVICE_ADD(_tag, PGM2_MEMCARD, 0) + +/*************************************************************************** + FUNCTION PROTOTYPES +***************************************************************************/ + +// ======================> pgm2_memcard_device + +class pgm2_memcard_device : public device_t, + public device_image_interface +{ +public: + // construction/destruction + pgm2_memcard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual iodevice_t image_type() const override { return IO_MEMCARD; } + + virtual bool is_readable() const override { return true; } + virtual bool is_writeable() const override { return true; } + virtual bool is_creatable() const override { return true; } + virtual bool must_be_loaded() const override { return false; } + virtual bool is_reset_on_load() const override { return false; } + virtual const char *file_extensions() const override { return "pg2,bin,mem"; } + + virtual image_init_result call_load() override; + virtual void call_unload() override; + virtual image_init_result call_create(int format_type, util::option_resolution *format_options) override; + + // device-level overrides + virtual void device_start() override; + + DECLARE_READ8_MEMBER(read); + DECLARE_WRITE8_MEMBER(write); + + /* returns the index of the current memory card, or -1 if none */ + int present() { return is_loaded() ? 0 : -1; } +private: + uint8_t m_memcard_data[0x100]; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(PGM2_MEMCARD, pgm2_memcard_device) + + +#endif // MAME_MACHINE_PGM2_MEMCARD_H -- cgit v1.2.3-70-g09d2 From e275beed79d6e4e24c877e004e003df1eaea06e6 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 11 Dec 2017 16:51:01 +0100 Subject: stlforce.cpp: corrected OKI clock for twinbrat and clones [caius] --- src/mame/drivers/stlforce.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/stlforce.cpp b/src/mame/drivers/stlforce.cpp index 1a4874f5715..418bdd09607 100644 --- a/src/mame/drivers/stlforce.cpp +++ b/src/mame/drivers/stlforce.cpp @@ -224,12 +224,13 @@ static MACHINE_CONFIG_DERIVED( twinbrat, stlforce ) /* basic machine hardware */ MCFG_CPU_MODIFY("maincpu") - MCFG_CPU_CLOCK(14745600) + MCFG_CPU_CLOCK(XTAL_14_7456MHz) MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_VISIBLE_AREA(3*8, 45*8-1, 0*8, 30*8-1) MCFG_DEVICE_MODIFY("oki") + MCFG_DEVICE_CLOCK(XTAL_30MHz / 32) // verified on 2 PCBs MCFG_DEVICE_ADDRESS_MAP(0, twinbrat_oki_map) MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From 151db37cda2376563404bfc43103d39c0f25ec49 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Mon, 11 Dec 2017 15:57:21 +0000 Subject: igs036 seems to be derived from a 946 type core based on using MPU not MMU, change it to be such. --- src/devices/cpu/arm7/arm7.cpp | 38 ++++++++++++++++++-------------------- src/devices/cpu/arm7/arm7.h | 16 +++++++--------- 2 files changed, 25 insertions(+), 29 deletions(-) diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp index 7a3a7ba30db..19530ed9e66 100644 --- a/src/devices/cpu/arm7/arm7.cpp +++ b/src/devices/cpu/arm7/arm7.cpp @@ -148,14 +148,16 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char } -arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE), + + +arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : arm9_cpu_device(mconfig, type, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE), cp15_control(0x78) { m_copro_id = ARM9_COPRO_ID_MFR_ARM - | ARM9_COPRO_ID_ARCH_V5TE - | ARM9_COPRO_ID_PART_ARM946 - | ARM9_COPRO_ID_STEP_ARM946_A0; + | ARM9_COPRO_ID_ARCH_V5TE + | ARM9_COPRO_ID_PART_ARM946 + | ARM9_COPRO_ID_STEP_ARM946_A0; memset(ITCM, 0, 0x8000); memset(DTCM, 0, 0x4000); @@ -169,6 +171,17 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const ch cp15_itcm_reg = cp15_dtcm_reg = 0; } +arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : arm946es_cpu_device(mconfig, ARM946ES, tag, owner, clock) +{ +} + +// unknown configuration, but uses MPU not MMU, so closer to ARM946ES +igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : arm946es_cpu_device(mconfig, IGS036, tag, owner, clock) +{ +} + pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE) { @@ -189,13 +202,6 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char * | ARM9_COPRO_ID_STEP_SA1110_A0; } -// unknown configuration -igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : arm9_cpu_device(mconfig, IGS036, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE) -{ -} - - device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const { return space_config_vector { @@ -1459,14 +1465,6 @@ uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr) return m_program->read_byte(addr); } -WRITE32_MEMBER(igs036_cpu_device::arm7_rt_w_callback) -{ - arm7_cpu_device::arm7_rt_w_callback(space, offset, data, mem_mask); - /* disable the MMU for now, it doesn't seem to set up valid mappings - so could be entirely different here */ - COPRO_CTRL &= ~COPRO_CTRL_MMU_EN; -} - void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn) { uint8_t cpn = (insn >> 8) & 0xF; diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h index f6eecc4e4e1..a0711fed9ec 100644 --- a/src/devices/cpu/arm7/arm7.h +++ b/src/devices/cpu/arm7/arm7.h @@ -614,6 +614,7 @@ class arm946es_cpu_device : public arm9_cpu_device public: // construction/destruction arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); // 946E-S has Protection Unit instead of ARM MMU so CP15 is quite different virtual DECLARE_READ32_MEMBER( arm7_rt_r_callback ) override; @@ -635,6 +636,12 @@ private: void RefreshDTCM(); }; +class igs036_cpu_device : public arm946es_cpu_device +{ +public: + // construction/destruction + igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; class pxa255_cpu_device : public arm7_cpu_device { @@ -651,15 +658,6 @@ public: sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; -class igs036_cpu_device : public arm9_cpu_device -{ -public: - // construction/destruction - igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override; -}; - - DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device) DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device) DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device) -- cgit v1.2.3-70-g09d2 From fcac2b20153c47589992946fa3d834bad59b170a Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 11 Dec 2017 16:58:45 +0100 Subject: New machines marked as NOT_WORKING ---------------------------------- Shuriken Boy [rod_wod, The Dumping Union] --- src/mame/drivers/konmedal.cpp | 102 ++++++++++++++++++++++++++++++++++++------ src/mame/mame.lst | 3 +- 2 files changed, 90 insertions(+), 15 deletions(-) diff --git a/src/mame/drivers/konmedal.cpp b/src/mame/drivers/konmedal.cpp index a79997e6686..56192816639 100644 --- a/src/mame/drivers/konmedal.cpp +++ b/src/mame/drivers/konmedal.cpp @@ -47,13 +47,8 @@ public: m_oki(*this, "oki") { } - required_device m_maincpu; - required_device m_k056832; - required_device m_palette; - optional_device m_ymz; - optional_device m_oki; - DECLARE_PALETTE_INIT(konmedal); + DECLARE_MACHINE_START(shuriboy); READ8_MEMBER(vram_r); WRITE8_MEMBER(vram_w); @@ -65,16 +60,24 @@ public: return 0xff; } -private: - u8 m_control, m_control2; + uint32_t screen_update_konmedal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_shuriboy(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + INTERRUPT_GEN_MEMBER(konmedal_interrupt); + K056832_CB_MEMBER(tile_callback); -public: +protected: virtual void machine_start() override; virtual void machine_reset() override; virtual void video_start() override; - uint32_t screen_update_konmedal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(konmedal_interrupt); - K056832_CB_MEMBER(tile_callback); + +private: + required_device m_maincpu; + optional_device m_k056832; + required_device m_palette; + optional_device m_ymz; + optional_device m_oki; + + u8 m_control, m_control2; }; WRITE8_MEMBER(konmedal_state::control2_w) @@ -154,6 +157,11 @@ uint32_t konmedal_state::screen_update_konmedal(screen_device &screen, bitmap_in return 0; } +uint32_t konmedal_state::screen_update_shuriboy(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + return 0; +} + PALETTE_INIT_MEMBER(konmedal_state, konmedal) { int i; @@ -223,6 +231,10 @@ static ADDRESS_MAP_START( ddboy_main, AS_PROGRAM, 8, konmedal_state ) AM_RANGE(0xe000, 0xffff) AM_READWRITE(vram_r, vram_w) ADDRESS_MAP_END +static ADDRESS_MAP_START( shuriboy_main, AS_PROGRAM, 8, konmedal_state ) + AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("maincpu", 0) +ADDRESS_MAP_END + static INPUT_PORTS_START( konmedal ) PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x00, "Coin Slot 1" ) PORT_DIPLOCATION("SW1:1,2,3") @@ -306,6 +318,11 @@ void konmedal_state::machine_start() membank("bank1")->set_entry(4); } +MACHINE_START_MEMBER(konmedal_state, shuriboy) +{ + +} + void konmedal_state::machine_reset() { } @@ -378,6 +395,48 @@ static MACHINE_CONFIG_START( ddboy ) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.45) MACHINE_CONFIG_END +/* +Shuriken Boy +While being a Z80 medal game, it runs on fairly different hardware. It might merit a new driver when emulation will be fleshed out. + +PCB: Konami PWB 452039A +Main CPU: Z80B +OSC: 24.000 MHz +Custom video chips: 051962 + 052109 +Sound chips: NEC UPD7759C + 051649 +Other custom chip: 051550 +Dips: 2 x 8 dips bank +*/ + +static MACHINE_CONFIG_START( shuriboy ) + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz / 3) // divisor unknown + MCFG_CPU_PROGRAM_MAP(shuriboy_main) + + /* video hardware */ + MCFG_SCREEN_ADD("screen", RASTER) // everything not verified, just a placeholder + MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) + MCFG_SCREEN_SIZE(64*8, 32*8) + MCFG_SCREEN_VISIBLE_AREA(80, 400-1, 16, 240-1) + MCFG_SCREEN_UPDATE_DRIVER(konmedal_state, screen_update_shuriboy) + MCFG_SCREEN_PALETTE("palette") + + MCFG_PALETTE_ADD("palette", 8192) // not verified + + // 051962 + 052109 + + MCFG_MACHINE_START_OVERRIDE(konmedal_state, shuriboy) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + + MCFG_K051649_ADD("k051649", XTAL_24MHz / 12) // divisor unknown + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.45) + + // upd7759c +MACHINE_CONFIG_END + ROM_START( tsukande ) ROM_REGION( 0x20000, "maincpu", 0 ) /* main program */ ROM_LOAD( "441-d02.4g", 0x000000, 0x020000, CRC(6ed17227) SHA1(4e3f5219cbf6f42c60df38a99f3009fe49f78fc1) ) @@ -419,5 +478,20 @@ ROM_START( ddboy ) ROM_LOAD( "342_a10.82s129.14g", 0x000300, 0x000100, CRC(1fa443f9) SHA1(84b0a36a4e49bf75bda1871bf52090ee5a75cd03) ) ROM_END -GAME( 1995, tsukande, 0, tsukande, konmedal, konmedal_state, 0, ROT0, "Konami", "Tsukande Toru Chicchi", MACHINE_NOT_WORKING) -GAME( 1995, ddboy, 0, ddboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Dam Dam Boy", MACHINE_NOT_WORKING) +ROM_START( shuriboy ) + ROM_REGION( 0x10000, "maincpu", 0 ) /* main program */ + ROM_LOAD( "gs-341-b01.13g", 0x000000, 0x010000, CRC(3c0f36b6) SHA1(1d3838f45969228a8b2054cd5baf8892db68b644) ) + + ROM_REGION( 0x40000, "gfx1", 0 ) /* tilemaps */ + ROM_LOAD32_BYTE( "341-A03.2H", 0x000002, 0x010000, CRC(8e9e9835) SHA1(f8dc4579f238d91c0aef59167be7e5de87dc4ba7) ) + ROM_LOAD32_BYTE( "341-A04.4H", 0x000003, 0x010000, CRC(ac82d67b) SHA1(65869adfbb67cf10c92e50239fd747fc5ad4714d) ) + ROM_LOAD32_BYTE( "341-A05.5H", 0x000000, 0x010000, CRC(31403832) SHA1(d13c54d3768a0c2d60a3751db8980199f60db243) ) + ROM_LOAD32_BYTE( "341-A06.7H", 0x000001, 0x010000, CRC(361e26eb) SHA1(7b5ad6a6067afb3350d85a3f2026e4d685429e20) ) + + ROM_REGION( 0x200000, "upd", 0 ) + ROM_LOAD( "341-A02.13C", 0x000000, 0x020000, CRC(e1f5c8f1) SHA1(323a078720e09a7326e82cb623b6c90e2674e800) ) +ROM_END + +GAME( 1995, tsukande, 0, tsukande, konmedal, konmedal_state, 0, ROT0, "Konami", "Tsukande Toru Chicchi", MACHINE_NOT_WORKING) +GAME( 1995, ddboy, 0, ddboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Dam Dam Boy", MACHINE_NOT_WORKING) +GAME( 1993, shuriboy, 0, shuriboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Suriken Boy", MACHINE_IS_SKELETON) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 53d258d5acc..af9102f9d06 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -17374,8 +17374,9 @@ whiterus // White Russia konin // @source:konmedal.cpp -tsukande ddboy +shuriboy +tsukande @source:kontest.cpp kontest // GX800 (c) 198? (Japan) -- cgit v1.2.3-70-g09d2 From e460b8b73bc295433f323790ac3c2f263fbfcbda Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 11 Dec 2017 17:01:34 +0100 Subject: new working clone added ---------------------------------- Attack (Defender bootleg) [ARPA, Recreativas.org, The Dumping Union] --- src/mame/drivers/pacman.cpp | 2 +- src/mame/drivers/williams.cpp | 33 +++++++++++++++++++++++++++++++-- src/mame/mame.lst | 1 + 3 files changed, 33 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp index 4475c90fecd..40a4c1a120d 100644 --- a/src/mame/drivers/pacman.cpp +++ b/src/mame/drivers/pacman.cpp @@ -7324,7 +7324,7 @@ GAME( 1981, crush5, crush, crush4, crush4, pacman_state, 0, ROT GAME( 1981, maketrax, crush, maketrax, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, maketrxb, crush, maketrax, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, korosuke, crush, maketrax, korosuke, pacman_state, korosuke, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Korosuke Roller (Japan)", MACHINE_SUPPORTS_SAVE ) // ADK considers it a sequel? -GAME( 1981, crushrlf, crush, pacman, maketrax, pacman_state, 0, ROT90, "bootleg", "Crush Roller (Famaresa PCB)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, crushrlf, crush, pacman, maketrax, pacman_state, 0, ROT90, "bootleg", "Crush Roller (Famare SA PCB)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, crushbl, crush, pacman, maketrax, pacman_state, 0, ROT90, "bootleg", "Crush Roller (bootleg set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, crushbl2, crush, maketrax, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, crushbl3, crush, maketrax, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 3)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index 7f0a071dd53..9f56fc9bf86 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -2003,6 +2003,36 @@ ROM_START( defence ) ROM_LOAD( "defcmnda.snd", 0xf800, 0x0800, CRC(f122d9c9) SHA1(70092fc354a2efbe7365be922fa36309b50d5c6f) ) ROM_END +// The dumps of ROMs 1, 2, 3 were bad, but the dumper observed that using the defenderb ROMs the emulation behaves identically to the PCB. +// A redump is definitely needed: +// 1.bin [1/2] wb01.bin [1/2] IDENTICAL +// 2.bin [1/2] defeng02.bin [1/2] IDENTICAL +// 1.bin [2/2] wb01.bin [1/2] IDENTICAL +// 2.bin [2/2] defeng02.bin [1/2] IDENTICAL +// 3ojo.bin [2/2] wb03.bin [1/2] IDENTICAL +// 3ojo.bin [1/2] defend.11 2.197266% +// For now we use the defenderb ones. +// PCBs: FAMARESA 590-001, 590-002, 590-003, 590-004 +ROM_START( attackf ) + ROM_REGION( 0x19000, "maincpu", 0 ) + ROM_LOAD( "1.bin", 0x0d000, 0x1000, BAD_DUMP CRC(0ee1019d) SHA1(a76247e825b8267abfd195c12f96348fe10d4cbc) ) + ROM_LOAD( "2.bin", 0x0e000, 0x1000, BAD_DUMP CRC(d184ab6b) SHA1(ed61a95b04f6162aedba8a72bc46005b77283955) ) + ROM_LOAD( "3ojo.bin", 0x0f000, 0x1000, BAD_DUMP CRC(a732d649) SHA1(b681882c02c5870ad613edc77255969a5f796422) ) + ROM_LOAD( "9.bin", 0x10000, 0x0800, CRC(f57caa62) SHA1(c8c91b96fd3bc98eddcc1503159050dae5755001) ) + ROM_LOAD( "12.bin", 0x10800, 0x0800, CRC(eb73d8a1) SHA1(f26007839a9eff6c7f77768da150fa26b8c96643) ) + ROM_LOAD( "8.bin", 0x11000, 0x0800, CRC(17f7abde) SHA1(6959ed471687174a3fdc3f980ca7bd993b23d54f) ) + ROM_LOAD( "11.bin", 0x11800, 0x0800, CRC(5ca4e860) SHA1(031188c009b8fca92703a0cc0c2bb44976212ae9) ) + ROM_LOAD( "7.bin", 0x12000, 0x0800, CRC(545c3326) SHA1(98199df5206c261061b0108c68ab9128fa0779eb) ) + ROM_LOAD( "10.bin", 0x12800, 0x0800, CRC(3940d731) SHA1(c867efa48e3ed6a6c3ddcd519aba1fe0a1712400) ) + ROM_LOAD( "6.bin", 0x16000, 0x0800, CRC(3af34c05) SHA1(71f3ced06a373fa4805c856bd9fc97760787a920) ) + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "13.bin", 0xf800, 0x0800, CRC(fefd5b48) SHA1(ceb0d18483f0691978c604db94417e6941ad7ff2) ) + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "decoder.1", 0x0000, 0x0200, CRC(8dd98da5) SHA1(da979604f7a2aa8b5a6d4a5debd2e80f77569e35) ) // not dumped from this PCB, believed to match +ROM_END + ROM_START( mayday ) ROM_REGION( 0x19000, "maincpu", 0 ) ROM_LOAD( "ic03-3.bin", 0x0d000, 0x1000, CRC(a1ff6e62) SHA1(c3c60ce94c6bdc4b07e45f386eff9a4aa4816953) ) @@ -2051,8 +2081,6 @@ ROM_START( maydayb ) ROM_LOAD( "rom8-sos.bin",0x1800, 0x0800, CRC(6a9b383f) SHA1(10e71a3bb9492b6c34ff06760dd55c442611ca75) ) // FIXED BITS (xxxxxx1x) ROM_END - - ROM_START( batlzone ) ROM_REGION( 0x19000, "maincpu", 0 ) ROM_LOAD( "43-2732.rom.bin", 0x0d000, 0x1000, CRC(244334f8) SHA1(ac625a1858c372db6a748ef8aa504569aef6cad7) ) @@ -3184,6 +3212,7 @@ GAME( 1980, zero2, defender, defender, defender, williams_state, defn GAME( 1980, defcmnd, defender, defender, defender, williams_state, defender, ROT0, "bootleg", "Defense Command (Defender bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, defence, defender, defender, defender, williams_state, defender, ROT0, "bootleg (Outer Limits)", "Defence Command (Defender bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, startrkd, defender, defender, defender, williams_state, defender, ROT0, "bootleg", "Star Trek (Defender bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, attackf, defender, defender, defender, williams_state, defender, ROT0, "bootleg (Famare SA)", "Attack (Defender bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, mayday, 0, defender, mayday, williams_state, mayday, ROT0, "Hoei", "Mayday (set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) // \ original by Hoei, which one of these 3 sets is bootleg/licensed/original is unknown GAME( 1980, maydaya, mayday, defender, mayday, williams_state, mayday, ROT0, "Hoei", "Mayday (set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) // > these games have an unemulated protection chip of some sort which is hacked around in /machine/williams.cpp "mayday_protection_r" function diff --git a/src/mame/mame.lst b/src/mame/mame.lst index af9102f9d06..fa40c36305d 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -38280,6 +38280,7 @@ wildpkr // 199?, TAB Austria. @source:williams.cpp alienar // (c) 1985 Duncan Brown alienaru // (c) 1985 Duncan Brown +attackf // Famare SA bootleg batlzone // bootleg? blaster // (c) 1983 blasterkit // (c) 1983 -- cgit v1.2.3-70-g09d2 From 6f9da75cf9faea35d4765102b0ee7c348ba26785 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 11 Dec 2017 17:04:48 +0100 Subject: new working clone added --------------------------------------- Galaxian Growing Galaxip / Galaxian Nave Creciente (Recreativos Covadonga Spanish bootleg) [ARPA, Recreativas.org, The Dumping Union] --- src/mame/drivers/galaxian.cpp | 15 +++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 16 insertions(+) diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index 32f37ae13da..eb23347aa9b 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -7590,6 +7590,20 @@ ROM_START( galaxrfgg ) ROM_LOAD( "gxrf.6l", 0x0000, 0x0020, CRC(992350e5) SHA1(e901b1abd11cc0f02dd6d87b429d8997f762c15d) ) ROM_END +ROM_START( galaxrcgg ) + ROM_REGION( 0x4000, "maincpu", 0 ) + ROM_LOAD( "7f.bin", 0x0000, 0x1000, CRC(c06eeb10) SHA1(cf1006a7ff02fe8b04a096d802fb8d8937dd913d) ) + ROM_LOAD( "7j.bin", 0x1000, 0x1000, CRC(182ff334) SHA1(11e84aa887679e3fa977f00dd0b57a7df8ca7d88) ) + ROM_LOAD( "7l.bin", 0x2000, 0x1000, CRC(420dbbf6) SHA1(678563afd091528ef358a8deaae4ac3cee62e8f4) ) + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD( "1hj.bin", 0x0000, 0x0800, CRC(23e627ff) SHA1(11f8f50fcaa29f757f27d77ea2b977f65dc87e38) ) + ROM_LOAD( "1kl.bin", 0x0800, 0x0800, CRC(0dbcee5b) SHA1(b169c6e539a583a99e1e3ef5982d4c1ab395551f) ) + + ROM_REGION( 0x0020, "proms", 0 ) // not dumped from this board, supposed to be the same + ROM_LOAD( "gxrf.6l", 0x0000, 0x0020, CRC(992350e5) SHA1(e901b1abd11cc0f02dd6d87b429d8997f762c15d) ) +ROM_END + ROM_START( astrians ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "astrians.7h", 0x0000, 0x0800, CRC(21eba3d0) SHA1(d07f141d785c86faca8c40af034c26f2789e9346) ) @@ -11953,6 +11967,7 @@ GAME( 1979, galaxbsf2, galaxian, galaxian, galaxian, galaxian_state, galax GAME( 1979, galaxianbl2, galaxian, galaxian, galaxianbl, galaxian_state, galaxian, ROT90, "bootleg", "Galaxian (bootleg, set 4)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, galaxrf, galaxian, galaxian, galaxrf, galaxian_state, galaxian, ROT90, "bootleg (Recreativos Franco S.A.)", "Galaxian (Recreativos Franco S.A. Spanish bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, galaxrfgg, galaxian, galaxian, galaxrf, galaxian_state, galaxian, ROT90, "bootleg (Recreativos Franco S.A.)", "Galaxian Growing Galaxip / Galaxian Nave Creciente (Recreativos Franco S.A. Spanish bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, galaxrcgg, galaxian, galaxian, galaxrf, galaxian_state, galaxian, ROT90, "bootleg (Recreativos Covadonga)", "Galaxian Growing Galaxip / Galaxian Nave Creciente (Recreativos Covadonga Spanish bootleg)", MACHINE_SUPPORTS_SAVE ) // these have the extra 'linescroll effect' title screens, like Moon Alien 2 but made out of a random tile, they lack an energy bar. GAME( 1979, moonaln, galaxian, galaxian, superg, galaxian_state, galaxian, ROT90, "Namco / Nichibutsu (Karateco license?)", "Moon Alien", MACHINE_SUPPORTS_SAVE ) // or bootleg? diff --git a/src/mame/mame.lst b/src/mame/mame.lst index fa40c36305d..b2dcae07c6e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -13118,6 +13118,7 @@ galaxiani // (c) Irem galaxianm // (c) Midway galaxianmo // (c) Midway galaxiant // (c) Taito +galaxrcgg // bootleg (Recreativos Covadonga) galaxrf // bootleg (Recreativos Franco) galaxrfgg // bootleg (Recreativos Franco) galemp // (c) Taito do Brasil -- cgit v1.2.3-70-g09d2 From 869185e70ba7823e67fef4439e2d51d8ce5b1797 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 11 Dec 2017 18:53:05 +0200 Subject: ibm5170_cdrom.xml: Added Alien Incident (no credit). --- hash/ibm5170_cdrom.xml | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index ecb0626cfe6..c565d2cae75 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -303,4 +303,31 @@ + + + Alien Incident (Eng, Fre, Ger, Fin) (v1.30) + 1996 + Gametek + + + + + + + + -- cgit v1.2.3-70-g09d2 From 84c968e516373d8e5eb8162036b90658e2342c43 Mon Sep 17 00:00:00 2001 From: smf- Date: Mon, 11 Dec 2017 18:34:33 +0000 Subject: move ULA struct out of global namespace (nw) --- src/mame/drivers/accomm.cpp | 60 +++++++++++++++++++++++--------------------- src/mame/includes/electron.h | 59 +++++++++++++++++++++---------------------- 2 files changed, 60 insertions(+), 59 deletions(-) diff --git a/src/mame/drivers/accomm.cpp b/src/mame/drivers/accomm.cpp index 4012236b50e..263feb6cba7 100644 --- a/src/mame/drivers/accomm.cpp +++ b/src/mame/drivers/accomm.cpp @@ -39,35 +39,6 @@ #define INT_SET 0x100 #define INT_CLEAR 0x200 -/* ULA context */ - -struct ULA -{ - uint8_t interrupt_status; - uint8_t interrupt_control; - uint8_t rompage; - uint16_t screen_start; - uint16_t screen_base; - int screen_size; - uint16_t screen_addr; - uint8_t *vram; - int current_pal[16]; - int communication_mode; - int screen_mode; - int shiftlock_mode; - int capslock_mode; -// int scanline; - /* tape reading related */ - uint32_t tape_value; - int tape_steps; - int bit_count; - int high_tone_set; - int start_bit; - int stop_bit; - int tape_running; - uint8_t tape_byte; -}; - class accomm_state : public driver_device { public: @@ -125,6 +96,37 @@ protected: private: bool m_ch00rom_enabled; + + /* ULA context */ + + struct ULA + { + uint8_t interrupt_status; + uint8_t interrupt_control; + uint8_t rompage; + uint16_t screen_start; + uint16_t screen_base; + int screen_size; + uint16_t screen_addr; + uint8_t *vram; + int current_pal[16]; + int communication_mode; + int screen_mode; + int shiftlock_mode; + int capslock_mode; + // int scanline; + /* tape reading related */ + uint32_t tape_value; + int tape_steps; + int bit_count; + int high_tone_set; + int start_bit; + int stop_bit; + int tape_running; + uint8_t tape_byte; + }; + + ULA m_ula; int m_map4[256]; int m_map16[256]; diff --git a/src/mame/includes/electron.h b/src/mame/includes/electron.h index f0f92d3dd77..6782f660e82 100644 --- a/src/mame/includes/electron.h +++ b/src/mame/includes/electron.h @@ -30,36 +30,6 @@ #define INT_SET 0x100 #define INT_CLEAR 0x200 -/* ULA context */ - -struct ULA -{ - uint8_t interrupt_status; - uint8_t interrupt_control; - uint8_t rompage; - uint16_t screen_start; - uint16_t screen_base; - int screen_size; - uint16_t screen_addr; - uint8_t *vram; - int current_pal[16]; - int communication_mode; - int screen_mode; - int cassette_motor_mode; - int capslock_mode; -// int scanline; - /* tape reading related */ - uint32_t tape_value; - int tape_steps; - int bit_count; - int high_tone_set; - int start_bit; - int stop_bit; - int tape_running; - uint8_t tape_byte; -}; - - class electron_state : public driver_device { public: @@ -80,6 +50,35 @@ public: m_ram(*this, RAM_TAG) { } + /* ULA context */ + + struct ULA + { + uint8_t interrupt_status; + uint8_t interrupt_control; + uint8_t rompage; + uint16_t screen_start; + uint16_t screen_base; + int screen_size; + uint16_t screen_addr; + uint8_t *vram; + int current_pal[16]; + int communication_mode; + int screen_mode; + int cassette_motor_mode; + int capslock_mode; + // int scanline; + /* tape reading related */ + uint32_t tape_value; + int tape_steps; + int bit_count; + int high_tone_set; + int start_bit; + int stop_bit; + int tape_running; + uint8_t tape_byte; + }; + ULA m_ula; emu_timer *m_tape_timer; int m_map4[256]; -- cgit v1.2.3-70-g09d2 From 7ee8bf47074822afda37ff893d965f39dc4ea16a Mon Sep 17 00:00:00 2001 From: smf- Date: Mon, 11 Dec 2017 18:36:09 +0000 Subject: only define LSL, LSR, ROL & ROR when building the cpu core (nw) --- src/devices/cpu/arm7/arm7core.h | 5 ----- src/devices/cpu/arm7/arm7help.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h index 9ae499ae109..c33bdee9dd2 100644 --- a/src/devices/cpu/arm7/arm7core.h +++ b/src/devices/cpu/arm7/arm7core.h @@ -470,11 +470,6 @@ enum COND_NV /* 0 never */ }; -#define LSL(v, s) ((v) << (s)) -#define LSR(v, s) ((v) >> (s)) -#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s)))) -#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s)))) - /* Convenience Macros */ #define R15 m_r[eR15] #define SPSR 17 // SPSR is always the 18th register in our 0 based array sRegisterTable[][18] diff --git a/src/devices/cpu/arm7/arm7help.h b/src/devices/cpu/arm7/arm7help.h index 4b0b4f21c8a..c006bfbf1af 100644 --- a/src/devices/cpu/arm7/arm7help.h +++ b/src/devices/cpu/arm7/arm7help.h @@ -166,3 +166,8 @@ #define WRITE32(addr,data) arm7_cpu_write32(addr,data) #define PTR_READ32 &arm7_cpu_read32 #define PTR_WRITE32 &arm7_cpu_write32 + +#define LSL(v, s) ((v) << (s)) +#define LSR(v, s) ((v) >> (s)) +#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s)))) +#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s)))) -- cgit v1.2.3-70-g09d2 From 166bc6add8abb1966aaef7f430b2e2698f361d70 Mon Sep 17 00:00:00 2001 From: smf- Date: Mon, 11 Dec 2017 20:33:53 +0000 Subject: move enums out of global namespace to avoid LTO conflict (nw) --- src/mame/includes/mac.h | 180 ++++++++++++++++++++++----------------------- src/mame/includes/macpci.h | 91 ++++++++++++----------- src/mame/machine/mac.cpp | 2 +- 3 files changed, 136 insertions(+), 137 deletions(-) diff --git a/src/mame/includes/mac.h b/src/mame/includes/mac.h index 6c3cb4f9e41..9a8baeb4380 100644 --- a/src/mame/includes/mac.h +++ b/src/mame/includes/mac.h @@ -48,96 +48,6 @@ #define ADB_IS_PM_VIA2_CLASS (m_model >= MODEL_MAC_PB140 && m_model <= MODEL_MAC_PBDUO_270c) #define ADB_IS_PM_CLASS ((m_model >= MODEL_MAC_PORTABLE && m_model <= MODEL_MAC_PB100) || (m_model >= MODEL_MAC_PB140 && m_model <= MODEL_MAC_PBDUO_270c)) -/* for Egret and CUDA streaming MCU commands, command types */ -enum mac_streaming_t -{ - MCU_STREAMING_NONE = 0, - MCU_STREAMING_PRAMRD, - MCU_STREAMING_PRAMWR, - MCU_STREAMING_WRAMRD, - MCU_STREAMING_WRAMWR -}; - -enum -{ - RBV_TYPE_RBV = 0, - RBV_TYPE_V8, - RBV_TYPE_SONORA, - RBV_TYPE_DAFB -}; - -/* tells which model is being emulated (set by macxxx_init) */ -enum model_t -{ - MODEL_MAC_128K512K, // 68000 machines - MODEL_MAC_512KE, - MODEL_MAC_PLUS, - MODEL_MAC_SE, - MODEL_MAC_CLASSIC, - - MODEL_MAC_PORTABLE, // Portable/PB100 are sort of hybrid classic and Mac IIs - MODEL_MAC_PB100, - - MODEL_MAC_II, // Mac II class 68020/030 machines - MODEL_MAC_II_FDHD, - MODEL_MAC_IIX, - MODEL_MAC_IICX, - MODEL_MAC_IICI, - MODEL_MAC_IISI, - MODEL_MAC_IIVX, - MODEL_MAC_IIVI, - MODEL_MAC_IIFX, - MODEL_MAC_SE30, - - MODEL_MAC_LC, // LC class 68030 machines, generally using a V8 or compatible gate array - MODEL_MAC_LC_II, - MODEL_MAC_LC_III, - MODEL_MAC_LC_III_PLUS, - MODEL_MAC_CLASSIC_II, - MODEL_MAC_COLOR_CLASSIC, - - MODEL_MAC_LC_475, // LC III clones with Cuda instead of Egret and 68LC040 on most models - MODEL_MAC_LC_520, - MODEL_MAC_LC_550, - MODEL_MAC_TV, - MODEL_MAC_LC_575, - MODEL_MAC_LC_580, - - MODEL_MAC_PB140, // 68030 PowerBooks. 140/145/145B/170 all have the same machine ID - MODEL_MAC_PB160, // 160/180/165 all have the same machine ID too - MODEL_MAC_PB165c, - MODEL_MAC_PB180c, - MODEL_MAC_PB150, // 150 is fairly radically different from the other 1x0s - - MODEL_MAC_PBDUO_210, // 68030 PowerBook Duos - MODEL_MAC_PBDUO_230, - MODEL_MAC_PBDUO_250, - MODEL_MAC_PBDUO_270c, - - MODEL_MAC_QUADRA_700, // 68(LC)040 desktops - MODEL_MAC_QUADRA_610, - MODEL_MAC_QUADRA_650, - MODEL_MAC_QUADRA_800, - MODEL_MAC_QUADRA_900, - MODEL_MAC_QUADRA_950, - MODEL_MAC_QUADRA_660AV, - MODEL_MAC_QUADRA_840AV, - MODEL_MAC_QUADRA_605, - MODEL_MAC_QUADRA_630, - - MODEL_MAC_PB550c, // 68(LC)040 PowerBooks - MODEL_MAC_PB520, - MODEL_MAC_PB520c, - MODEL_MAC_PB540, - MODEL_MAC_PB540c, - MODEL_MAC_PB190, - MODEL_MAC_PB190cs, - - MODEL_MAC_POWERMAC_6100, // NuBus PowerMacs - MODEL_MAC_POWERMAC_7100, - MODEL_MAC_POWERMAC_8100 -}; - // video parameters for classic Macs #define MAC_H_VIS (512) #define MAC_V_VIS (342) @@ -206,6 +116,96 @@ public: virtual void machine_start() override; virtual void machine_reset() override; + /* for Egret and CUDA streaming MCU commands, command types */ + enum mac_streaming_t + { + MCU_STREAMING_NONE = 0, + MCU_STREAMING_PRAMRD, + MCU_STREAMING_PRAMWR, + MCU_STREAMING_WRAMRD, + MCU_STREAMING_WRAMWR + }; + + enum + { + RBV_TYPE_RBV = 0, + RBV_TYPE_V8, + RBV_TYPE_SONORA, + RBV_TYPE_DAFB + }; + + /* tells which model is being emulated (set by macxxx_init) */ + enum model_t + { + MODEL_MAC_128K512K, // 68000 machines + MODEL_MAC_512KE, + MODEL_MAC_PLUS, + MODEL_MAC_SE, + MODEL_MAC_CLASSIC, + + MODEL_MAC_PORTABLE, // Portable/PB100 are sort of hybrid classic and Mac IIs + MODEL_MAC_PB100, + + MODEL_MAC_II, // Mac II class 68020/030 machines + MODEL_MAC_II_FDHD, + MODEL_MAC_IIX, + MODEL_MAC_IICX, + MODEL_MAC_IICI, + MODEL_MAC_IISI, + MODEL_MAC_IIVX, + MODEL_MAC_IIVI, + MODEL_MAC_IIFX, + MODEL_MAC_SE30, + + MODEL_MAC_LC, // LC class 68030 machines, generally using a V8 or compatible gate array + MODEL_MAC_LC_II, + MODEL_MAC_LC_III, + MODEL_MAC_LC_III_PLUS, + MODEL_MAC_CLASSIC_II, + MODEL_MAC_COLOR_CLASSIC, + + MODEL_MAC_LC_475, // LC III clones with Cuda instead of Egret and 68LC040 on most models + MODEL_MAC_LC_520, + MODEL_MAC_LC_550, + MODEL_MAC_TV, + MODEL_MAC_LC_575, + MODEL_MAC_LC_580, + + MODEL_MAC_PB140, // 68030 PowerBooks. 140/145/145B/170 all have the same machine ID + MODEL_MAC_PB160, // 160/180/165 all have the same machine ID too + MODEL_MAC_PB165c, + MODEL_MAC_PB180c, + MODEL_MAC_PB150, // 150 is fairly radically different from the other 1x0s + + MODEL_MAC_PBDUO_210, // 68030 PowerBook Duos + MODEL_MAC_PBDUO_230, + MODEL_MAC_PBDUO_250, + MODEL_MAC_PBDUO_270c, + + MODEL_MAC_QUADRA_700, // 68(LC)040 desktops + MODEL_MAC_QUADRA_610, + MODEL_MAC_QUADRA_650, + MODEL_MAC_QUADRA_800, + MODEL_MAC_QUADRA_900, + MODEL_MAC_QUADRA_950, + MODEL_MAC_QUADRA_660AV, + MODEL_MAC_QUADRA_840AV, + MODEL_MAC_QUADRA_605, + MODEL_MAC_QUADRA_630, + + MODEL_MAC_PB550c, // 68(LC)040 PowerBooks + MODEL_MAC_PB520, + MODEL_MAC_PB520c, + MODEL_MAC_PB540, + MODEL_MAC_PB540c, + MODEL_MAC_PB190, + MODEL_MAC_PB190cs, + + MODEL_MAC_POWERMAC_6100, // NuBus PowerMacs + MODEL_MAC_POWERMAC_7100, + MODEL_MAC_POWERMAC_8100 + }; + model_t m_model; uint32_t m_overlay; diff --git a/src/mame/includes/macpci.h b/src/mame/includes/macpci.h index 52ecba8773a..08c93a93c7e 100644 --- a/src/mame/includes/macpci.h +++ b/src/mame/includes/macpci.h @@ -25,52 +25,6 @@ #define MAC_539X_1_TAG "539x_1" #define MAC_539X_2_TAG "539x_2" -/* tells which model is being emulated (set by macxxx_init) */ -enum model_t -{ - PCIMODEL_MAC_PM5200, - PCIMODEL_MAC_PM6200, - PCIMODEL_MAC_PM5300, - PCIMODEL_MAC_PM7200, - PCIMODEL_MAC_PM7500, - PCIMODEL_MAC_PM8500, - PCIMODEL_MAC_PM9500, - PCIMODEL_MAC_PM7215, - PCIMODEL_MAC_PM5260, - PCIMODEL_MAC_PM5400, - PCIMODEL_MAC_PM7600, - PCIMODEL_MAC_PM8200, - PCIMODEL_MAC_PM6300, - PCIMODEL_MAC_PM6400, - PCIMODEL_MAC_PM4400, - PCIMODEL_MAC_PM5500, - PCIMODEL_MAC_PM7220, - PCIMODEL_MAC_PM7300, - PCIMODEL_MAC_PM6500, - PCIMODEL_MAC_PM8600, - PCIMODEL_MAC_PM9600, - - PCIMODEL_MAC_20TH, - - PCIMODEL_MAC_G3_GOSSAMER, - PCIMODEL_MAC_G3_ALLINONE, - - PCIMODEL_MAC_PB5x0PPC, - PCIMODEL_MAC_PB1400, - PCIMODEL_MAC_PB2300, - PCIMODEL_MAC_PB2400, - PCIMODEL_MAC_PB3400, - PCIMODEL_MAC_PB5300, - - PCIMODEL_MAC_PBG3KANGA, - PCIMODEL_MAC_PBG3WALLST1, - PCIMODEL_MAC_PBG3WALLST2, - - PCIMODEL_MAC_PIPPIN // Apple/Bandai Pippin - -}; - - /* Mac driver data */ class macpci_state : public driver_device @@ -98,6 +52,51 @@ public: virtual void machine_start() override; virtual void machine_reset() override; + /* tells which model is being emulated (set by macxxx_init) */ + enum model_t + { + PCIMODEL_MAC_PM5200, + PCIMODEL_MAC_PM6200, + PCIMODEL_MAC_PM5300, + PCIMODEL_MAC_PM7200, + PCIMODEL_MAC_PM7500, + PCIMODEL_MAC_PM8500, + PCIMODEL_MAC_PM9500, + PCIMODEL_MAC_PM7215, + PCIMODEL_MAC_PM5260, + PCIMODEL_MAC_PM5400, + PCIMODEL_MAC_PM7600, + PCIMODEL_MAC_PM8200, + PCIMODEL_MAC_PM6300, + PCIMODEL_MAC_PM6400, + PCIMODEL_MAC_PM4400, + PCIMODEL_MAC_PM5500, + PCIMODEL_MAC_PM7220, + PCIMODEL_MAC_PM7300, + PCIMODEL_MAC_PM6500, + PCIMODEL_MAC_PM8600, + PCIMODEL_MAC_PM9600, + + PCIMODEL_MAC_20TH, + + PCIMODEL_MAC_G3_GOSSAMER, + PCIMODEL_MAC_G3_ALLINONE, + + PCIMODEL_MAC_PB5x0PPC, + PCIMODEL_MAC_PB1400, + PCIMODEL_MAC_PB2300, + PCIMODEL_MAC_PB2400, + PCIMODEL_MAC_PB3400, + PCIMODEL_MAC_PB5300, + + PCIMODEL_MAC_PBG3KANGA, + PCIMODEL_MAC_PBG3WALLST1, + PCIMODEL_MAC_PBG3WALLST2, + + PCIMODEL_MAC_PIPPIN // Apple/Bandai Pippin + + }; + model_t m_model; // 60.15 Hz timer for RBV/V8/Sonora/Eagle/VASP/etc. diff --git a/src/mame/machine/mac.cpp b/src/mame/machine/mac.cpp index 57a9bed5901..ea1f5f3f1c2 100644 --- a/src/mame/machine/mac.cpp +++ b/src/mame/machine/mac.cpp @@ -127,7 +127,7 @@ void mac_fdc_set_enable_lines(device_t *device, int enable_mask) { mac_state *mac = device->machine().driver_data(); - if (mac->m_model != MODEL_MAC_SE) + if (mac->m_model != mac_state::MODEL_MAC_SE) { sony_set_enable_lines(device, enable_mask); } -- cgit v1.2.3-70-g09d2 From 58ecdb8203658e6b35f787768723c407bbd40e30 Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Mon, 11 Dec 2017 12:45:31 -0800 Subject: fix typo (nw) --- src/mame/drivers/konmedal.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/konmedal.cpp b/src/mame/drivers/konmedal.cpp index 56192816639..65751aec191 100644 --- a/src/mame/drivers/konmedal.cpp +++ b/src/mame/drivers/konmedal.cpp @@ -494,4 +494,4 @@ ROM_END GAME( 1995, tsukande, 0, tsukande, konmedal, konmedal_state, 0, ROT0, "Konami", "Tsukande Toru Chicchi", MACHINE_NOT_WORKING) GAME( 1995, ddboy, 0, ddboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Dam Dam Boy", MACHINE_NOT_WORKING) -GAME( 1993, shuriboy, 0, shuriboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Suriken Boy", MACHINE_IS_SKELETON) +GAME( 1993, shuriboy, 0, shuriboy, konmedal, konmedal_state, 0, ROT0, "Konami", "Shuriken Boy", MACHINE_IS_SKELETON) -- cgit v1.2.3-70-g09d2 From 3070c7e38631df1680bbd69550d877bfb79d94aa Mon Sep 17 00:00:00 2001 From: smf- Date: Mon, 11 Dec 2017 21:37:48 +0000 Subject: moved enum into class, machine_type_t conflicts with apple2.h but that is much harder to fix (nw) --- src/mame/includes/bbc.h | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/src/mame/includes/bbc.h b/src/mame/includes/bbc.h index 7fdc56713b4..071e731f640 100644 --- a/src/mame/includes/bbc.h +++ b/src/mame/includes/bbc.h @@ -43,23 +43,6 @@ #define RS232_TAG "rs232" -enum machine_type_t -{ - MODELA, - MODELB, - BPLUS, - MASTER, - COMPACT -}; - -enum monitor_type_t -{ - COLOUR = 0, - BLACKWHITE = 1, - GREEN = 2, - AMBER = 3 -}; - class bbc_state : public driver_device { public: @@ -111,6 +94,23 @@ public: m_bbcconfig(*this, "BBCCONFIG") { } + enum machine_type_t + { + MODELA, + MODELB, + BPLUS, + MASTER, + COMPACT + }; + + enum monitor_type_t + { + COLOUR = 0, + BLACKWHITE = 1, + GREEN = 2, + AMBER = 3 + }; + DECLARE_FLOPPY_FORMATS(floppy_formats_bbc); DECLARE_FLOPPY_FORMATS(floppy_formats_bbcm); DECLARE_FLOPPY_FORMATS(floppy_formats_bbcmc); -- cgit v1.2.3-70-g09d2 From 8b23bc7b9b238a043d54635ac2ebee2838f413fd Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Mon, 11 Dec 2017 23:43:45 +0200 Subject: pgm2: ICRW sim improvements [MetalliC, Lord Nightmare] --- src/mame/drivers/pgm2.cpp | 77 ++++++++++++++++++++++++++++----------- src/mame/machine/pgm2_memcard.cpp | 62 ++++++++++++++++++++++++++++--- src/mame/machine/pgm2_memcard.h | 8 ++++ 3 files changed, 121 insertions(+), 26 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 794de03f295..785b6953a2c 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -46,11 +46,7 @@ Identify which regions each game was released in and either dump alt. internal ROMs for each region, or create them until that can be done. properly implement RTC (integrated into the CPU) - Memory Card system (there's an MCU on the motherboard that will need simulating or dumping somehow) Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.) - Simplify IGS036 encryption based on tables in internal roms - Fix ARM? bug that means Oriental Legend 2 needs a patch (might also be that it needs the card reader, and is running a - codepath that would not exist in a real environment at the moment) Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests) Debug features (require DIP SW1:8 On and SW1:1 Off): @@ -188,47 +184,86 @@ void pgm2_state::mcu_command(address_space &space, bool is_command) m_mcu_result1 = 0; } break; - // unknown / unimplemented, all C0-C9 commands is IC Card RW related - // (m_mcu_regs[0] >> 8) & 0xff - target RW unit (player) + // C0-C9 commands is IC Card RW comms case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card if (m_memcard_device[arg1 & 3]->present() == -1) status = 0xf4; m_mcu_result0 = cmd; break; case 0xc1: // check ready/busy ? + if (m_memcard_device[arg1 & 3]->present() == -1) + status = 0xf4; m_mcu_result0 = cmd; break; - case 0xc2: // read data to shared ram, args - offset, len + case 0xc2: // read data to shared ram for (int i = 0; i < arg3; i++) { if (m_memcard_device[arg1 & 3]->present() != -1) m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard_device[arg1 & 3]->read(space, arg2 + i); + else + status = 0xf4; } - m_mcu_result0 = cmd; break; - case 0xc3: // save data from shared ram, args - offset, len + case 0xc3: // save data from shared ram for (int i = 0; i < arg3; i++) { if (m_memcard_device[arg1 & 3]->present() != -1) m_memcard_device[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]); + else + status = 0xf4; } m_mcu_result0 = cmd; break; - case 0xc7: // get card ID?, no args, result1 expected to be fixed value for new card - m_mcu_result1 = 0xf81f0000; + case 0xc4: // presumable read security mem (password only?) + if (m_memcard_device[arg1 & 3]->present() != -1) + { + m_mcu_result1 = m_memcard_device[arg1 & 3]->read_sec(space, 1) | + (m_memcard_device[arg1 & 3]->read_sec(space, 2) << 8) | + (m_memcard_device[arg1 & 3]->read_sec(space, 3) << 16); + } + else + status = 0xf4; m_mcu_result0 = cmd; break; - case 0xc8: // write byte, args - offset, data byte + case 0xc5: // write security mem + if (m_memcard_device[arg1 & 3]->present() != -1) + m_memcard_device[arg1 & 3]->write_sec(space, arg2 & 3, arg3); + else + status = 0xf4; + m_mcu_result0 = cmd; + break; + case 0xc6: // presumable write protection mem + if (m_memcard_device[arg1 & 3]->present() != -1) + m_memcard_device[arg1 & 3]->write_prot(space, arg2 & 3, arg3); + else + status = 0xf4; + m_mcu_result0 = cmd; + break; + case 0xc7: // read protection mem + if (m_memcard_device[arg1 & 3]->present() != -1) + { + m_mcu_result1 = m_memcard_device[arg1 & 3]->read_prot(space, 0) | + (m_memcard_device[arg1 & 3]->read_prot(space, 1) << 8) | + (m_memcard_device[arg1 & 3]->read_prot(space, 2) << 16) | + (m_memcard_device[arg1 & 3]->read_prot(space, 3) << 24); + } + else + status = 0xf4; + m_mcu_result0 = cmd; + break; + case 0xc8: // write data mem if (m_memcard_device[arg1 & 3]->present() != -1) m_memcard_device[arg1 & 3]->write(space, arg2, arg3); - + else + status = 0xf4; m_mcu_result0 = cmd; break; - case 0xc4: // not used - case 0xc5: // set new password?, args - offset, data byte (offs 0 - always 7, 1-3 password) - case 0xc6: // not used - case 0xc9: // card authentication, args - 3 byte password, ('I','G','S' for new cards) + case 0xc9: // card authentication + if (m_memcard_device[arg1 & 3]->present() != -1) + m_memcard_device[arg1 & 3]->auth(arg2, arg3, m_mcu_regs[1] & 0xff); + else + status = 0xf4; m_mcu_result0 = cmd; break; default: @@ -585,8 +620,8 @@ MACHINE_CONFIG_END #define ORLEG2_INTERNAL_CHINA \ ROM_REGION( 0x04000, "maincpu", 0 ) \ ROM_LOAD( "xyj2_cn.igs036", 0x00000000, 0x0004000, CRC(bcce7641) SHA1(c3b5cf6e9f6eae09b6785314777a52b34c3c7657) ) \ - ROM_REGION( 0x100, "default_card", 0 ) \ - ROM_LOAD( "blank_orleg2_china_card.pg2", 0x000, 0x100, CRC(099156f0) SHA1(a621c9772a98719c657bba3a1bf235487eb78615) ) + ROM_REGION( 0x108, "default_card", 0 ) \ + ROM_LOAD( "blank_orleg2_china_card.pg2", 0x000, 0x108, CRC(dc29556f) SHA1(2335cc7af25d4dd9763c6944d3f0eb50276de80a) ) #define ORLEG2_INTERNAL_OVERSEAS \ ROM_REGION( 0x04000, "maincpu", 0 ) \ @@ -667,8 +702,8 @@ ROM_END #define KOV2NL_INTERNAL_CHINA \ ROM_REGION( 0x04000, "maincpu", 0 ) \ ROM_LOAD( "gsyx_igs036_china.rom", 0x00000000, 0x0004000, CRC(e09fe4ce) SHA1(c0cac64ef8727cbe79d503ec4df66ddb6f2c925e) ) \ - ROM_REGION( 0x100, "default_card", 0 ) \ - ROM_LOAD( "blank_kov2nl_china_card.pg2", 0x000, 0x100, CRC(91786244) SHA1(ac0ce11b46c19ffe21f6b94bc83ef061f547b591) ) + ROM_REGION( 0x108, "default_card", 0 ) \ + ROM_LOAD( "blank_kov2nl_china_card.pg2", 0x000, 0x108, CRC(02842ae8) SHA1(a6cda633b09a706039a79b73db2c258094826f85) ) ROM_START( kov2nl ) diff --git a/src/mame/machine/pgm2_memcard.cpp b/src/mame/machine/pgm2_memcard.cpp index 73755409294..549a8e5aa79 100644 --- a/src/mame/machine/pgm2_memcard.cpp +++ b/src/mame/machine/pgm2_memcard.cpp @@ -5,7 +5,7 @@ pgm2_memcard.cpp PGM2 Memory card functions. - (based on ng_memcard.cpp) + Presumable Siemens SLE 4442 or compatible. *********************************************************************/ @@ -45,25 +45,36 @@ void pgm2_memcard_device::device_start() image_init_result pgm2_memcard_device::call_load() { - if(length() != 0x100) + authenticated = false; + if(length() != 0x108) return image_init_result::FAIL; fseek(0, SEEK_SET); size_t ret = fread(m_memcard_data, 0x100); if(ret != 0x100) return image_init_result::FAIL; + ret = fread(m_protection_data, 4); + if (ret != 4) + return image_init_result::FAIL; + ret = fread(m_security_data, 4); + if (ret != 4) + return image_init_result::FAIL; return image_init_result::PASS; } void pgm2_memcard_device::call_unload() { + authenticated = false; fseek(0, SEEK_SET); fwrite(m_memcard_data, 0x100); + fwrite(m_protection_data, 4); + fwrite(m_security_data, 4); } image_init_result pgm2_memcard_device::call_create(int format_type, util::option_resolution *format_options) { + authenticated = false; // cards must contain valid defaults for each game / region or they don't work? memory_region *rgn = memregion("^default_card"); @@ -71,14 +82,28 @@ image_init_result pgm2_memcard_device::call_create(int format_type, util::option return image_init_result::FAIL; memcpy(m_memcard_data, rgn->base(), 0x100); + memcpy(m_protection_data, rgn->base() + 0x100, 4); + memcpy(m_security_data, rgn->base() + 0x104, 4); - size_t ret = fwrite(m_memcard_data, 0x100); - if(ret != 0x100) + size_t ret = fwrite(rgn->base(), 0x108); + if(ret != 0x108) return image_init_result::FAIL; return image_init_result::PASS; } +void pgm2_memcard_device::auth(uint8_t p1, uint8_t p2, uint8_t p3) +{ + if (m_security_data[0] & 3) + { + if (m_security_data[1] == p1 && m_security_data[2] == p2 && m_security_data[3] == p3) + authenticated = true; + else { + m_security_data[0] >>= 1; // hacky + logerror("Wrong IC Card password !!!"); + } + } +} READ8_MEMBER(pgm2_memcard_device::read) { @@ -87,5 +112,32 @@ READ8_MEMBER(pgm2_memcard_device::read) WRITE8_MEMBER(pgm2_memcard_device::write) { - m_memcard_data[offset] = data; + if (authenticated && (offset >= 0x20 || (m_protection_data[offset>>3] & (1 <<(offset & 7))))) + { + m_memcard_data[offset] = data; + } +} + +READ8_MEMBER(pgm2_memcard_device::read_prot) +{ + return m_protection_data[offset]; +} + +WRITE8_MEMBER(pgm2_memcard_device::write_prot) +{ + if (authenticated) + m_protection_data[offset] &= data; +} + +READ8_MEMBER(pgm2_memcard_device::read_sec) +{ + if (!authenticated) + return 0xff; // guess + return m_security_data[offset]; +} + +WRITE8_MEMBER(pgm2_memcard_device::write_sec) +{ + if (authenticated) + m_security_data[offset] = data; } diff --git a/src/mame/machine/pgm2_memcard.h b/src/mame/machine/pgm2_memcard.h index 0aa4d2adb04..175abe2d4fb 100644 --- a/src/mame/machine/pgm2_memcard.h +++ b/src/mame/machine/pgm2_memcard.h @@ -52,11 +52,19 @@ public: DECLARE_READ8_MEMBER(read); DECLARE_WRITE8_MEMBER(write); + DECLARE_READ8_MEMBER(read_prot); + DECLARE_WRITE8_MEMBER(write_prot); + DECLARE_READ8_MEMBER(read_sec); + DECLARE_WRITE8_MEMBER(write_sec); + void auth(uint8_t p1, uint8_t p2, uint8_t p3); /* returns the index of the current memory card, or -1 if none */ int present() { return is_loaded() ? 0 : -1; } private: uint8_t m_memcard_data[0x100]; + uint8_t m_protection_data[4]; + uint8_t m_security_data[4]; + bool authenticated; }; -- cgit v1.2.3-70-g09d2 From 2ecd09a0b4237370a634e2d819dc9664646f9dc6 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Mon, 11 Dec 2017 23:59:36 +0200 Subject: typo (nw) --- src/mame/machine/pgm2_memcard.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/machine/pgm2_memcard.cpp b/src/mame/machine/pgm2_memcard.cpp index 549a8e5aa79..243cfe80855 100644 --- a/src/mame/machine/pgm2_memcard.cpp +++ b/src/mame/machine/pgm2_memcard.cpp @@ -94,7 +94,7 @@ image_init_result pgm2_memcard_device::call_create(int format_type, util::option void pgm2_memcard_device::auth(uint8_t p1, uint8_t p2, uint8_t p3) { - if (m_security_data[0] & 3) + if (m_security_data[0] & 7) { if (m_security_data[1] == p1 && m_security_data[2] == p2 && m_security_data[3] == p3) authenticated = true; -- cgit v1.2.3-70-g09d2 From dbca4d64f25c473b5a722c8db6c6324b6a67c87f Mon Sep 17 00:00:00 2001 From: Luca Elia Date: Mon, 11 Dec 2017 19:51:15 +0100 Subject: New working machines -------------------- TelePachi Fever Lion (V1.0) [Rod_Wod, Hammy, The Dumping Union] --- src/mame/drivers/seta2.cpp | 316 ++++++++++++++++++++++++++++++++++++++++----- src/mame/includes/seta2.h | 23 +++- src/mame/mame.lst | 1 + src/mame/video/seta2.cpp | 7 + 4 files changed, 306 insertions(+), 41 deletions(-) diff --git a/src/mame/drivers/seta2.cpp b/src/mame/drivers/seta2.cpp index 7da05a4fe57..855c83de125 100644 --- a/src/mame/drivers/seta2.cpp +++ b/src/mame/drivers/seta2.cpp @@ -28,12 +28,13 @@ Ordered by Board Year Game By ------------------------------------------------------------------------------------------- P-FG01-1 1995 Guardians / Denjin Makai II Banpresto P0-113A 1994 Mobile Suit Gundam EX Revue Banpresto +P0-121A ; 2MP1-E00 (Ss) 1996 TelePachi Fever Lion Sunsoft P0-123A 1996 Wakakusamonogatari Mahjong Yonshimai Maboroshi Ware P0-125A ; KE (Namco) 1996 Kosodate Quiz My Angel Namco P0-130B ; M-133 (Namco) 1997 Star Audition Namco P0-136A ; KL (Namco) 1997 Kosodate Quiz My Angel 2 Namco P-FG-02 1997 Reel'N Quake -P-FG-03 Endless Riches E.N.Tiger +P-FG-03 ???? Endless Riches E.N.Tiger P0-140B 2000 Funcube Namco P0-140B 2000 Namco Stars Namco P0-142A 1999 Puzzle De Bowling MOSS / Nihon System @@ -424,7 +425,7 @@ WRITE16_MEMBER(seta2_state::reelquak_leds_w) } if (ACCESSING_BITS_8_15) { - machine().device("ticket")->motor_w(BIT(data, 8)); // ticket dispenser + m_dispenser->motor_w(BIT(data, 8)); // ticket dispenser } // popmessage("LED %04X", data); @@ -625,6 +626,79 @@ static ADDRESS_MAP_START( staraudi_map, AS_PROGRAM, 16, staraudi_state ) ADDRESS_MAP_END +/*************************************************************************** + TelePachi Fever Lion +***************************************************************************/ + +WRITE16_MEMBER(seta2_state::telpacfl_lamp1_w) +{ + if (ACCESSING_BITS_0_7) + { + output().set_lamp_value(0, data & 0x0001 ); // + output().set_lamp_value(1, data & 0x0002 ); // + output().set_lamp_value(2, data & 0x0004 ); // + output().set_lamp_value(3, data & 0x0008 ); // + output().set_lamp_value(4, data & 0x0010 ); // + output().set_lamp_value(5, data & 0x0020 ); // + output().set_lamp_value(6, data & 0x0040 ); // + output().set_lamp_value(7, data & 0x0080 ); // + } + +// popmessage("LAMP1 %04X", data); +} + +WRITE16_MEMBER(seta2_state::telpacfl_lamp2_w) +{ + if (ACCESSING_BITS_0_7) + { + output().set_lamp_value( 8, data & 0x0001 ); // on/off lamp (throughout) + output().set_lamp_value( 9, data & 0x0002 ); // bet lamp + output().set_lamp_value(10, data & 0x0004 ); // payout lamp + m_dispenser->motor_w( data & 0x0008 ); // coin out motor + machine().bookkeeping().coin_counter_w(0, data & 0x0010); // coin out counter + // data & 0x0020 ); // on credit increase + } + +// popmessage("LAMP2 %04X", data); +} + +WRITE16_MEMBER(seta2_state::telpacfl_lockout_w) +{ + if (ACCESSING_BITS_0_7) + { + machine().bookkeeping().coin_counter_w(1, data & 0x0002); // 100yen in + machine().bookkeeping().coin_lockout_w(0, ~data & 0x0004); // coin blocker + machine().bookkeeping().coin_lockout_w(1, ~data & 0x0008); // 100yen blocker + // bits 0x30 ? + } + +// popmessage("LOCK %04X", data); +} + +static ADDRESS_MAP_START( telpacfl_map, AS_PROGRAM, 16, seta2_state ) + AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM + AM_RANGE(0x200000, 0x20ffff) AM_RAM // RAM + AM_RANGE(0x300000, 0x303fff) AM_RAM AM_SHARE("nvram") // NVRAM (Battery Backed) + AM_RANGE(0x600000, 0x600001) AM_READ_PORT("DSW1") // DSW 1 + AM_RANGE(0x600002, 0x600003) AM_READ_PORT("DSW2") // DSW 2 + AM_RANGE(0x700000, 0x700001) AM_READ_PORT("COIN") // Coin + AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P1") // P1 + Dispenser + AM_RANGE(0x700004, 0x700005) AM_READ_PORT("SERVICE") // Service + AM_RANGE(0x700006, 0x700007) AM_READ_PORT("UNKNOWN") // (unused?) + AM_RANGE(0x700008, 0x700009) AM_WRITE(telpacfl_lamp1_w) // Lamps + AM_RANGE(0x70000c, 0x70000d) AM_WRITE(telpacfl_lamp2_w) // "" + AM_RANGE(0x800000, 0x800001) AM_WRITE(telpacfl_lockout_w) // Coin Blockers + AM_RANGE(0x900000, 0x903fff) AM_DEVREADWRITE("x1snd", x1_010_device, word_r, word_w) // Sound + AM_RANGE(0xb00000, 0xb3ffff) AM_RAM AM_SHARE("spriteram") // Sprites + AM_RANGE(0xb40000, 0xb4ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // Palette + AM_RANGE(0xb60000, 0xb6003f) AM_WRITE(vregs_w) AM_SHARE("vregs") // Video Registers + AM_RANGE(0xd00006, 0xd00007) AM_DEVREAD("watchdog", watchdog_timer_device, reset16_r) +// AM_RANGE(0xe00000, 0xe00001) AM_WRITE + AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(sound_bank_w) // Samples Banks + AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers +ADDRESS_MAP_END + + /*************************************************************************** Funcube series ***************************************************************************/ @@ -1707,7 +1781,7 @@ static INPUT_PORTS_START( reelquak ) PORT_DIPSETTING( 0x0040, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x0000, "1 Coin/10 Credits" ) - PORT_START("DSW2") // $400302.w PORT_START("DSW2") // $400302.w + PORT_START("DSW2") // $400302.w PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1") // used PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) @@ -1744,7 +1818,7 @@ static INPUT_PORTS_START( reelquak ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("TICKET") // $400003.b - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) // ticket sensor + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("dispenser", ticket_dispenser_device, line_r) // ticket sensor PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Knock Down") // knock down @@ -2033,6 +2107,113 @@ static INPUT_PORTS_START( trophyh ) INPUT_PORTS_END +/*************************************************************************** + TelePachi Fever Lion +***************************************************************************/ + +static INPUT_PORTS_START( telpacfl ) + PORT_START("DSW1") // $600001.b ($200020.b) + PORT_DIPNAME( 0x0001, 0x0001, "Clear NVRAM" ) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, "Use Medal Sensor" ) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING( 0x0000, DEF_STR( No ) ) + PORT_DIPSETTING( 0x0002, DEF_STR( Yes ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3") // used + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0008, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") // read but unsed? + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, "Force Hopper?" ) PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, "Freeze Screen" ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("DSW2") // $600003.b ($200021.b) + PORT_DIPNAME( 0x000f, 0x000f, "Bonus Multiplier? (Low Hex Digit)" ) PORT_DIPLOCATION("SW2:1,2,3,4") + PORT_DIPSETTING( 0x000f, "0" ) + PORT_DIPSETTING( 0x000e, "1" ) + PORT_DIPSETTING( 0x000d, "2" ) + PORT_DIPSETTING( 0x000c, "3" ) + PORT_DIPSETTING( 0x000b, "4" ) + PORT_DIPSETTING( 0x000a, "5" ) + PORT_DIPSETTING( 0x0009, "6" ) + PORT_DIPSETTING( 0x0008, "7" ) + PORT_DIPSETTING( 0x0007, "8" ) + PORT_DIPSETTING( 0x0006, "9" ) + PORT_DIPSETTING( 0x0005, "A" ) + PORT_DIPSETTING( 0x0004, "B" ) + PORT_DIPSETTING( 0x0003, "C" ) + PORT_DIPSETTING( 0x0002, "D" ) + PORT_DIPSETTING( 0x0001, "E" ) + PORT_DIPSETTING( 0x0000, "F" ) + PORT_DIPNAME( 0x0070, 0x0070, "Bonus Multiplier? (High Hex Digit)" ) PORT_DIPLOCATION("SW2:5,6,7") + PORT_DIPSETTING( 0x0070, "0" ) + PORT_DIPSETTING( 0x0060, "1" ) + PORT_DIPSETTING( 0x0050, "2" ) + PORT_DIPSETTING( 0x0040, "3" ) + PORT_DIPSETTING( 0x0030, "4" ) + PORT_DIPSETTING( 0x0020, "5" ) + PORT_DIPSETTING( 0x0010, "6" ) + PORT_DIPSETTING( 0x0000, "7" ) + PORT_DIPNAME( 0x0080, 0x0080, "Use Bonus Multiplier?" ) PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING( 0x0080, DEF_STR( No ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) ) + + PORT_START("COIN") // $700000.w + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_OTHER ) // coin1 connection + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset") // reset switch (clear errors, play sound in sound test) + PORT_BIT( 0x0008, IP_ACTIVE_HIGH,IPT_OTHER ) // empty switch (out of medals error when low i.e. メダル切れ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_OTHER ) // coin2 connection + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_OTHER ) // coin3 connection + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_OTHER ) // coin4 connection + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // pay out switch + + PORT_START("P1") // $700002.w + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet") // bet switch (converts credits into balls) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) // door switch + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("dispenser", ticket_dispenser_device, line_r) // coin out switch (medals jam error when stuck i.e. メダルづまり) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0080, IP_ACTIVE_HIGH,IPT_BUTTON2 ) PORT_NAME("Stop") // stop switch (active high) + + PORT_START("SERVICE") // $700004.w + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin in switch + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // 100yen in switch + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service switch (next item in service mode) + PORT_SERVICE_NO_TOGGLE(0x0008, IP_ACTIVE_LOW ) // test switch + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_OTHER ) // (freezes the game if high, eventually triggering the watchdog) + + PORT_START("UNKNOWN") // $700006.w + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) // - + + PORT_START("KNOB") // $fffd0a (parallel port read) + PORT_BIT( 0xff, 0x00, IPT_PADDLE ) PORT_MINMAX(0,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(15) PORT_CENTERDELTA(0) PORT_CODE_DEC(KEYCODE_LEFT) PORT_CODE_INC(KEYCODE_RIGHT) +INPUT_PORTS_END + + /*************************************************************************** Funcube series ***************************************************************************/ @@ -2444,7 +2625,7 @@ static MACHINE_CONFIG_DERIVED( reelquak, seta2 ) MCFG_TMP68301_OUT_PARALLEL_CB(WRITE16(seta2_state, reelquak_leds_w)) MCFG_NVRAM_ADD_0FILL("nvram") - MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW) + MCFG_TICKET_DISPENSER_ADD("dispenser", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW) // video hardware MCFG_SCREEN_MODIFY("screen") @@ -2486,6 +2667,25 @@ static MACHINE_CONFIG_DERIVED( staraudi, seta2 ) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( telpacfl, seta2 ) + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_PROGRAM_MAP(telpacfl_map) + + MCFG_DEVICE_MODIFY("tmp68301") + MCFG_TMP68301_IN_PARALLEL_CB(IOPORT("KNOB")) + + MCFG_EEPROM_SERIAL_93C46_ADD("eeprom") // not hooked up, seems unused + + MCFG_NVRAM_ADD_0FILL("nvram") + MCFG_HOPPER_ADD("dispenser", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW) + + // video hardware + MCFG_SCREEN_MODIFY("screen") + MCFG_SCREEN_VISIBLE_AREA(0x0, 0x180-1, 0xff, 0x1ef-1) + MCFG_VIDEO_START_OVERRIDE(seta2_state,xoffset1) +MACHINE_CONFIG_END + + /*************************************************************************** Funcube series ***************************************************************************/ @@ -3398,8 +3598,8 @@ Reel'N Quake! is also known to be available on the P-FG-03 PCB which is ROM_START( reelquak ) ROM_REGION( 0x100000, "maincpu", 0 ) // TMP68301 Code - ROM_LOAD16_BYTE( "rq_ver1.05.u2", 0x00000, 0x80000, CRC(7740d7a4) SHA1(21c28db5d4d7eea5a2506cb51b58533eba28c2cb) ) /* Should be KF00x002, x = revision */ - ROM_LOAD16_BYTE( "rq_ver1.05.u3", 0x00001, 0x80000, CRC(8c78889e) SHA1(584ba123e9caafdbddc96a4d9b2b6f6994fa84b0) ) /* Should be KF00x004, x = revision */ + ROM_LOAD16_BYTE( "rq_ver1.05.u2", 0x00000, 0x80000, CRC(7740d7a4) SHA1(21c28db5d4d7eea5a2506cb51b58533eba28c2cb) ) // Should be KF00x002, x = revision + ROM_LOAD16_BYTE( "rq_ver1.05.u3", 0x00001, 0x80000, CRC(8c78889e) SHA1(584ba123e9caafdbddc96a4d9b2b6f6994fa84b0) ) // Should be KF00x004, x = revision ROM_REGION( 0x800000, "sprites", 0 ) // Sprites ROM_LOAD( "kf-001-005_t42.u16", 0x000000, 0x200000, CRC(25e07d5c) SHA1(dd0818611f39be25dc6f0c737da4e79c6c0f9659) ) @@ -3879,32 +4079,78 @@ ROM_START( trophyh ) /* V1.0 is currently the only known version */ ROM_LOAD( "as1105m01.u18", 0x100000, 0x400000, CRC(633d0df8) SHA1(3401c424f5c207ef438a9269e0c0e7d482771fed) ) ROM_END +/*************************************************************************** + + TelePachi Fever Lion + (C) 1996 Sunsoft + + PCB: Sunsoft 2MP1-E00 (P0-121A, serial 0503), similar to Reel'N Quake. + + CPU: Toshiba TMP68301AF-16 (100 Pin PQFP @ U1) + Video: Allumer X1-020 9426HK003 (@ U9 - Same as DX-101?) + NEC DX-102 (52 Pin PQFP @ U8) + Allumer X1-007 505100 (SDIP42 @ U110 - Feeds RGB DACs) + Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) +Inputs: Allumer X1-004 546100 (SDIP52) + OSC: 50.0000 MHz (@ X1) & 32.5304 MHz (@ X2) + Other: 8 Position Dipswitch x 2 (@ DSW1, DSW2) + Push Button + Battery (@ BT1) + 93C46 EEPROM (@ U101) + Jamma Connector + GALs - labeled "KC-001C", "KC-002C" (@ U51, U52) + +***************************************************************************/ + +ROM_START( telpacfl ) + ROM_REGION( 0x100000, "maincpu", 0 ) // TMP68301 Code + ROM_LOAD16_BYTE( "mp3_prgeven__u2_v1.0.u2", 0x000000, 0x080000, CRC(9ab450c5) SHA1(57d9118df8a444e295cbda453a7c3238bd672ddd) ) + ROM_LOAD16_BYTE( "mp3_prgodd__u3_v1.0.u3", 0x000001, 0x080000, CRC(2a324139) SHA1(1812a7a8a2c4e222a1e5c7cb6d39cf7bf7f037db) ) + // Empty sockets: 27C4001 TBL EVEN (@ U4) & 27C4001 TBL ODD (@ U5) + + ROM_REGION( 0x800000, "sprites", ROMREGION_ERASE00 ) // Sprites + ROM_LOAD( "mp3_cg-0__u16_v1.0.u16", 0x000000, 0x200000, CRC(9d8453ba) SHA1(d97240ce68d6e64527930e919710764a7b669cdf) ) + ROM_LOAD( "mp3_cg-1__u15_v1.0.u15", 0x200000, 0x200000, CRC(8ab83f38) SHA1(5ebc682b80d0d97025a97824a899946712e7acd4) ) + ROM_LOAD( "mp3_cg-2__u21_v1.0.u21", 0x400000, 0x200000, BAD_DUMP CRC(54dc430b) SHA1(a2e55866249d01f6f2f2dd998421baf9fe0c6972) ) // physically damaged eprom + ROM_FILL ( 0x400000, 0x200000, 0 ) // wipe out the bad rom + // Empty sockets: 23C16000 (@ U17-20, U22-23) + + ROM_REGION( 0x200000, "x1snd", 0 ) // Samples + // Leave 1MB empty (addressable by the chip) + ROM_LOAD( "mp3_sound0__u111_v1.0.u111", 0x100000, 0x080000, CRC(711c915e) SHA1(d654a0c158cf54aab5faca913583c5620388aa46) ) + ROM_LOAD( "mp3_sound1__u112_v1.0.u112", 0x180000, 0x080000, CRC(27fd83cd) SHA1(d0261b2c5354ea17061e71bcea747d70efc18a49) ) + + ROM_REGION( 0x117 * 2, "plds", 0 ) + ROM_LOAD( "kc-001c.u51", 0x000, 0x117, NO_DUMP ) + ROM_LOAD( "kc-002c.u52", 0x117, 0x117, NO_DUMP ) +ROM_END -GAME( 1994, gundamex, 0, gundamex, gundamex, seta2_state, 0, ROT0, "Banpresto", "Mobile Suit Gundam EX Revue", 0 ) -GAME( 1995, grdians, 0, grdians, grdians, seta2_state, 0, ROT0, "Winkysoft (Banpresto license)", "Guardians / Denjin Makai II", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1996, mj4simai, 0, mj4simai, mj4simai, seta2_state, 0, ROT0, "Maboroshi Ware", "Wakakusamonogatari Mahjong Yonshimai (Japan)", MACHINE_NO_COCKTAIL ) -GAME( 1996, myangel, 0, myangel, myangel, seta2_state, 0, ROT0, "MOSS / Namco", "Kosodate Quiz My Angel (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1997, myangel2, 0, myangel2, myangel2, seta2_state, 0, ROT0, "MOSS / Namco", "Kosodate Quiz My Angel 2 (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1997, reelquak, 0, reelquak, reelquak, seta2_state, 0, ROT0, "", "Reel'N Quake! (Version 1.05)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 199?, endrichs, 0, reelquak, endrichs, seta2_state, 0, ROT0, "E.N.Tiger", "Endless Riches (Ver 1.20)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1997, staraudi, 0, staraudi, staraudi, staraudi_state, 0, ROT0, "Namco", "Star Audition", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) -GAME( 1999, pzlbowl, 0, pzlbowl, pzlbowl, seta2_state, 0, ROT0, "MOSS / Nihon System", "Puzzle De Bowling (Japan)", MACHINE_NO_COCKTAIL ) -GAME( 2000, penbros, 0, penbros, penbros, seta2_state, 0, ROT0, "Subsino", "Penguin Brothers (Japan)", MACHINE_NO_COCKTAIL ) -GAME( 2000, penbrosk, penbros, penbrosk, penbros, seta2_state, 0, ROT0, "bootleg", "Penguin Brothers (Japan, bootleg)", MACHINE_NO_COCKTAIL | MACHINE_NOT_WORKING ) -GAME( 2000, namcostr, 0, namcostr, funcube, seta2_state, 0, ROT0, "Namco", "Namco Stars", MACHINE_NO_COCKTAIL | MACHINE_NOT_WORKING ) -GAME( 2000, deerhunt, 0, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.3", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, deerhunta, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.2", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, deerhuntb, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, deerhuntc, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V3", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, deerhuntd, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V2", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, deerhunte, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V1", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2001, turkhunt, 0, samshoot, turkhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Turkey Hunting USA V1.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2001, wschamp, 0, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V2.00", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2001, wschampa, wschamp, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V1.01", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2001, wschampb, wschamp, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V1.00", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2002, trophyh, 0, samshoot, trophyh, seta2_state, 0, ROT0, "Sammy USA Corporation", "Trophy Hunting - Bear & Moose V1.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2000, funcube, 0, funcube, funcube, seta2_state, funcube, ROT0, "Namco", "Funcube (v1.5)", MACHINE_NO_COCKTAIL ) -GAME( 2001, funcube2, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 2 (v1.1)", MACHINE_NO_COCKTAIL ) -GAME( 2001, funcube3, 0, funcube3, funcube, seta2_state, funcube3, ROT0, "Namco", "Funcube 3 (v1.1)", MACHINE_NO_COCKTAIL ) -GAME( 2001, funcube4, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 4 (v1.0)", MACHINE_NO_COCKTAIL ) -GAME( 2002, funcube5, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 5 (v1.0)", MACHINE_NO_COCKTAIL ) +GAME( 1994, gundamex, 0, gundamex, gundamex, seta2_state, 0, ROT0, "Banpresto", "Mobile Suit Gundam EX Revue", 0 ) +GAME( 1995, grdians, 0, grdians, grdians, seta2_state, 0, ROT0, "Winkysoft (Banpresto license)", "Guardians / Denjin Makai II", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, mj4simai, 0, mj4simai, mj4simai, seta2_state, 0, ROT0, "Maboroshi Ware", "Wakakusamonogatari Mahjong Yonshimai (Japan)", MACHINE_NO_COCKTAIL ) +GAME( 1996, myangel, 0, myangel, myangel, seta2_state, 0, ROT0, "MOSS / Namco", "Kosodate Quiz My Angel (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1997, myangel2, 0, myangel2, myangel2, seta2_state, 0, ROT0, "MOSS / Namco", "Kosodate Quiz My Angel 2 (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, telpacfl, 0, telpacfl, telpacfl, seta2_state, 0, ROT270, "Sunsoft", "TelePachi Fever Lion (V1.0)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1997, reelquak, 0, reelquak, reelquak, seta2_state, 0, ROT0, "", "Reel'N Quake! (Version 1.05)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 199?, endrichs, 0, reelquak, endrichs, seta2_state, 0, ROT0, "E.N.Tiger", "Endless Riches (Ver 1.20)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1997, staraudi, 0, staraudi, staraudi, staraudi_state, 0, ROT0, "Namco", "Star Audition", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1999, pzlbowl, 0, pzlbowl, pzlbowl, seta2_state, 0, ROT0, "MOSS / Nihon System", "Puzzle De Bowling (Japan)", MACHINE_NO_COCKTAIL ) +GAME( 2000, penbros, 0, penbros, penbros, seta2_state, 0, ROT0, "Subsino", "Penguin Brothers (Japan)", MACHINE_NO_COCKTAIL ) +GAME( 2000, penbrosk, penbros, penbrosk, penbros, seta2_state, 0, ROT0, "bootleg", "Penguin Brothers (Japan, bootleg)", MACHINE_NO_COCKTAIL | MACHINE_NOT_WORKING ) +GAME( 2000, namcostr, 0, namcostr, funcube, seta2_state, 0, ROT0, "Namco", "Namco Stars", MACHINE_NO_COCKTAIL | MACHINE_NOT_WORKING ) +GAME( 2000, deerhunt, 0, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.3", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, deerhunta, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.2", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, deerhuntb, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V4.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, deerhuntc, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V3", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, deerhuntd, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V2", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, deerhunte, deerhunt, samshoot, deerhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Deer Hunting USA V1", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2001, turkhunt, 0, samshoot, turkhunt, seta2_state, 0, ROT0, "Sammy USA Corporation", "Turkey Hunting USA V1.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2001, wschamp, 0, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V2.00", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2001, wschampa, wschamp, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V1.01", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2001, wschampb, wschamp, samshoot, wschamp, seta2_state, 0, ROT0, "Sammy USA Corporation", "Wing Shooting Championship V1.00", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2002, trophyh, 0, samshoot, trophyh, seta2_state, 0, ROT0, "Sammy USA Corporation", "Trophy Hunting - Bear & Moose V1.0", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, funcube, 0, funcube, funcube, seta2_state, funcube, ROT0, "Namco", "Funcube (v1.5)", MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube2, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 2 (v1.1)", MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube3, 0, funcube3, funcube, seta2_state, funcube3, ROT0, "Namco", "Funcube 3 (v1.1)", MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube4, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 4 (v1.0)", MACHINE_NO_COCKTAIL ) +GAME( 2002, funcube5, 0, funcube2, funcube, seta2_state, funcube2, ROT0, "Namco", "Funcube 5 (v1.0)", MACHINE_NO_COCKTAIL ) diff --git a/src/mame/includes/seta2.h b/src/mame/includes/seta2.h index 549073be754..be759c2efcb 100644 --- a/src/mame/includes/seta2.h +++ b/src/mame/includes/seta2.h @@ -9,6 +9,7 @@ #include "machine/tmp68301.h" #include "machine/eepromser.h" #include "machine/intelfsh.h" +#include "machine/ticket.h" #include "machine/timer.h" #include "machine/upd4992.h" #include "sound/okim9810.h" @@ -21,14 +22,17 @@ public: seta2_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this,"maincpu"), + m_gfxdecode(*this, "gfxdecode"), + m_screen(*this, "screen"), + m_palette(*this, "palette"), + m_tmp68301(*this, "tmp68301"), m_oki(*this, "oki"), m_eeprom(*this, "eeprom"), m_flash(*this, "flash"), m_rtc(*this, "rtc"), - m_gfxdecode(*this, "gfxdecode"), - m_screen(*this, "screen"), - m_palette(*this, "palette"), + m_dispenser(*this, "dispenser"), + m_nvram(*this, "nvram"), m_spriteram(*this, "spriteram", 0), m_tileram(*this, "tileram", 0), @@ -38,14 +42,16 @@ public: { } required_device m_maincpu; + required_device m_gfxdecode; + required_device m_screen; + required_device m_palette; + optional_device m_tmp68301; optional_device m_oki; optional_device m_eeprom; optional_device m_flash; optional_device m_rtc; - required_device m_gfxdecode; - required_device m_screen; - required_device m_palette; + optional_device m_dispenser; optional_shared_ptr m_nvram; optional_shared_ptr m_spriteram; @@ -84,6 +90,10 @@ public: DECLARE_WRITE16_MEMBER(samshoot_coin_w); + DECLARE_WRITE16_MEMBER(telpacfl_lamp1_w); + DECLARE_WRITE16_MEMBER(telpacfl_lamp2_w); + DECLARE_WRITE16_MEMBER(telpacfl_lockout_w); + DECLARE_READ16_MEMBER(gundamex_eeprom_r); DECLARE_WRITE16_MEMBER(gundamex_eeprom_w); @@ -107,6 +117,7 @@ public: virtual void video_start() override; DECLARE_VIDEO_START(yoffset); DECLARE_VIDEO_START(xoffset); + DECLARE_VIDEO_START(xoffset1); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(screen_vblank); diff --git a/src/mame/mame.lst b/src/mame/mame.lst index b2dcae07c6e..071d29e4218 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34070,6 +34070,7 @@ penbros // (c) 2000 Subsino penbrosk // bootleg pzlbowl // (c) 1999 Nihon System / Moss reelquak // (c) 1997 +telpacfl // (c) 1996 Sunsoft trophyh // (c) 2002 Sammy USA Corporation turkhunt // (c) 2001 Sammy USA Corporation wschamp // (c) 2001 Sammy USA Corporation diff --git a/src/mame/video/seta2.cpp b/src/mame/video/seta2.cpp index 60c9ff5bac6..6e1c43bc351 100644 --- a/src/mame/video/seta2.cpp +++ b/src/mame/video/seta2.cpp @@ -464,6 +464,13 @@ VIDEO_START_MEMBER(seta2_state,xoffset) m_xoffset = 0x200; } +VIDEO_START_MEMBER(seta2_state,xoffset1) +{ + video_start(); + + m_xoffset = 0x1; +} + VIDEO_START_MEMBER(seta2_state,yoffset) { video_start(); -- cgit v1.2.3-70-g09d2 From cbfd13c0778a8255c6c875ae514e706b2dbda8be Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 19:05:02 -0500 Subject: Add XTAL values for various Japanese PCs and MCFG_SCREEN_RAW_PARAMS for fm7 (nw) --- src/emu/drivers/xtal.h | 4 ++++ src/mame/drivers/fm7.cpp | 33 +++++++++------------------------ 2 files changed, 13 insertions(+), 24 deletions(-) diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h index 14ef6e9528b..fabe5b44f21 100644 --- a/src/emu/drivers/xtal.h +++ b/src/emu/drivers/xtal.h @@ -176,6 +176,7 @@ enum XTAL_15_92MHz = 15920000, /* HP Integral PC */ XTAL_15_9744MHz = 15974400, /* Osborne 1 (9600 * 52 * 32) */ XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */ + XTAL_16_128MHz = 16128000, /* Fujitsu FM-7 */ XTAL_16_384MHz = 16384000, XTAL_16_4MHz = 16400000, /* MS 6102 */ XTAL_16_5888MHz = 16588800, /* SM 7238 */ @@ -203,6 +204,7 @@ enum XTAL_20_079MHz = 20790000, /* Blockade-hardware Gremlin games */ XTAL_20_625MHz = 20625000, /* SM 7238 */ XTAL_21MHz = 21000000, /* Lock-On pixel clock */ + XTAL_21_0526MHz = 21052600, /* NEC PC-98xx pixel clock */ XTAL_21_3MHz = 21300000, XTAL_21_4772MHz = 21477272, /* BMC bowling, some Data East 90's games, Vtech Socrates; (6x NTSC subcarrier) */ XTAL_22MHz = 22000000, @@ -246,6 +248,7 @@ enum XTAL_30_4761MHz = 30476100, /* Taito JC */ XTAL_30_8MHz = 30800000, /* 15IE-00-013 */ XTAL_31_684MHz = 31684000, /* TeleVideo TVI-955 132-column display clock */ + XTAL_31_9488MHz = 31948800, /* NEC PC-88xx, PC-98xx */ XTAL_32MHz = 32000000, XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs (close to 9x NTSC subcarrier which is 32.215905Mhz*/ XTAL_32_5304MHz = 32530400, /* Seta 2 */ @@ -260,6 +263,7 @@ enum XTAL_39_3216MHz = 39321600, /* Sun 2/120 */ XTAL_40MHz = 40000000, XTAL_42MHz = 42000000, /* BMC A-00211 - Popo Bear */ + XTAL_42_1052MHz = 42105200, /* NEC PC-88xx */ XTAL_42_9545MHz = 42954545, /* CPS3 (12x NTSC subcarrier)*/ XTAL_43_320MHz = 43320000, /* DEC VT420 */ XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */ diff --git a/src/mame/drivers/fm7.cpp b/src/mame/drivers/fm7.cpp index 99e7c8e86ab..b35f9fbb9df 100644 --- a/src/mame/drivers/fm7.cpp +++ b/src/mame/drivers/fm7.cpp @@ -2057,12 +2057,12 @@ MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000) static MACHINE_CONFIG_START( fm7 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, XTAL_2MHz) + MCFG_CPU_ADD("maincpu", MC6809, 8000000) MCFG_CPU_PROGRAM_MAP(fm7_mem) MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(fm7_state,fm7_irq_ack) MCFG_QUANTUM_PERFECT_CPU("maincpu") - MCFG_CPU_ADD("sub", M6809, XTAL_2MHz) + MCFG_CPU_ADD("sub", MC6809, 8000000) MCFG_CPU_PROGRAM_MAP(fm7_sub_mem) MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(fm7_state,fm7_sub_irq_ack) MCFG_QUANTUM_PERFECT_CPU("sub") @@ -2079,10 +2079,7 @@ static MACHINE_CONFIG_START( fm7 ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) + MCFG_SCREEN_RAW_PARAMS(XTAL_16_128MHz, 1024, 0, 640, 262, 0, 200) // H = 15.75 KHz, V = 60.1145 Hz MCFG_SCREEN_UPDATE_DRIVER(fm7_state, screen_update_fm7) MCFG_PALETTE_ADD_3BIT_BRG("palette") @@ -2115,12 +2112,12 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( fm8 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, 1200000) // 1.2MHz 68A09 + MCFG_CPU_ADD("maincpu", MC6809, 4800000) // 1.2MHz 68A09 MCFG_CPU_PROGRAM_MAP(fm8_mem) MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(fm7_state,fm7_irq_ack) MCFG_QUANTUM_PERFECT_CPU("maincpu") - MCFG_CPU_ADD("sub", M6809, XTAL_1MHz) + MCFG_CPU_ADD("sub", MC6809, 4000000) MCFG_CPU_PROGRAM_MAP(fm7_sub_mem) MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(fm7_state,fm7_sub_irq_ack) MCFG_QUANTUM_PERFECT_CPU("sub") @@ -2135,10 +2132,7 @@ static MACHINE_CONFIG_START( fm8 ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) + MCFG_SCREEN_RAW_PARAMS(XTAL_16_128MHz, 1024, 0, 640, 262, 0, 200) MCFG_SCREEN_UPDATE_DRIVER(fm7_state, screen_update_fm7) MCFG_PALETTE_ADD_3BIT_BRG("palette") @@ -2208,10 +2202,7 @@ static MACHINE_CONFIG_START( fm77av ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) + MCFG_SCREEN_RAW_PARAMS(16128000, 1024, 0, 640, 262, 0, 200) MCFG_SCREEN_UPDATE_DRIVER(fm7_state, screen_update_fm7) MCFG_PALETTE_ADD_3BIT_BRG("palette") @@ -2286,10 +2277,7 @@ static MACHINE_CONFIG_START( fm11 ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) + MCFG_SCREEN_RAW_PARAMS(16128000, 1024, 0, 640, 262, 0, 200) MCFG_SCREEN_UPDATE_DRIVER(fm7_state, screen_update_fm7) MCFG_PALETTE_ADD_3BIT_BRG("palette") @@ -2337,10 +2325,7 @@ static MACHINE_CONFIG_START( fm16beta ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) + MCFG_SCREEN_RAW_PARAMS(16128000, 1024, 0, 640, 262, 0, 200) MCFG_SCREEN_UPDATE_DRIVER(fm7_state, screen_update_fm7) MCFG_PALETTE_ADD_3BIT_BRG("palette") -- cgit v1.2.3-70-g09d2 From f240bab65a84d446c893d3cd135976da25a73f6e Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 20:45:44 -0500 Subject: tek440x.cpp: Fix that pesky clock (nw) --- src/mame/drivers/tek440x.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/tek440x.cpp b/src/mame/drivers/tek440x.cpp index 4096b6ca375..6ce52ea8655 100644 --- a/src/mame/drivers/tek440x.cpp +++ b/src/mame/drivers/tek440x.cpp @@ -188,7 +188,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( tek4404 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68010, 16666666) + MCFG_CPU_ADD("maincpu", M68010, XTAL_40MHz / 4) // MC68010L10 MCFG_CPU_PROGRAM_MAP(maincpu_map) MCFG_CPU_ADD("fdccpu", M6502, 1000000) @@ -209,7 +209,7 @@ static MACHINE_CONFIG_START( tek4404 ) MCFG_MOS6551_XTAL(XTAL_1_8432MHz) MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) - MCFG_DEVICE_ADD("timer", AM9513, 16666666 / 10) // from CPU E output + MCFG_DEVICE_ADD("timer", AM9513, XTAL_40MHz / 4 / 10) // from CPU E output MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr) MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aica", mos6551_device, write_rxd)) -- cgit v1.2.3-70-g09d2 From a545e65efc90681e786128bb17b68f8f5c666ddf Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 21:51:50 -0500 Subject: exidy440.cpp: Correct 6809 types (nw) --- src/mame/audio/exidy440.cpp | 10 +++++----- src/mame/drivers/exidy440.cpp | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mame/audio/exidy440.cpp b/src/mame/audio/exidy440.cpp index ec0894613ad..d625f75f717 100644 --- a/src/mame/audio/exidy440.cpp +++ b/src/mame/audio/exidy440.cpp @@ -20,9 +20,9 @@ #define FADE_TO_ZERO 1 -#define EXIDY440_AUDIO_CLOCK (XTAL_12_9792MHz / 16) -#define EXIDY440_MC3418_CLOCK (EXIDY440_AUDIO_CLOCK / 16) -#define EXIDY440_MC3417_CLOCK (EXIDY440_AUDIO_CLOCK / 32) +#define EXIDY440_AUDIO_CLOCK (XTAL_12_9792MHz / 4) +#define EXIDY440_MC3418_CLOCK (EXIDY440_AUDIO_CLOCK / 4 / 16) +#define EXIDY440_MC3417_CLOCK (EXIDY440_AUDIO_CLOCK / 4 / 32) /* internal caching */ @@ -875,13 +875,13 @@ ADDRESS_MAP_END MACHINE_CONFIG_START( exidy440_audio ) - MCFG_CPU_ADD("audiocpu", M6809, EXIDY440_AUDIO_CLOCK) + MCFG_CPU_ADD("audiocpu", MC6809, EXIDY440_AUDIO_CLOCK) MCFG_CPU_PROGRAM_MAP(exidy440_audio_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", driver_device, irq0_line_assert) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") - MCFG_SOUND_ADD("custom", EXIDY440, EXIDY440_AUDIO_CLOCK/16) + MCFG_SOUND_ADD("custom", EXIDY440, EXIDY440_MC3418_CLOCK) MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) diff --git a/src/mame/drivers/exidy440.cpp b/src/mame/drivers/exidy440.cpp index 7b6ff76b66a..9132234065f 100644 --- a/src/mame/drivers/exidy440.cpp +++ b/src/mame/drivers/exidy440.cpp @@ -995,7 +995,7 @@ INPUT_PORTS_END static MACHINE_CONFIG_START( exidy440 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CPU_CLOCK) + MCFG_CPU_ADD("maincpu", MC6809E, MAIN_CPU_CLOCK) MCFG_CPU_PROGRAM_MAP(exidy440_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", exidy440_state, exidy440_vblank_interrupt) -- cgit v1.2.3-70-g09d2 From 1ce75991b2e27d6fa65d97a8662c5efc2ba7b00f Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 22:05:01 -0500 Subject: A few more to MC6809 (nw) --- src/mame/drivers/itech32.cpp | 2 +- src/mame/drivers/itech8.cpp | 14 +++++++------- src/mame/drivers/mpu12wbk.cpp | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mame/drivers/itech32.cpp b/src/mame/drivers/itech32.cpp index 505d4751d03..70b234a9326 100644 --- a/src/mame/drivers/itech32.cpp +++ b/src/mame/drivers/itech32.cpp @@ -1678,7 +1678,7 @@ static MACHINE_CONFIG_START( timekill ) MCFG_CPU_PROGRAM_MAP(timekill_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", itech32_state, generate_int1) - MCFG_CPU_ADD("soundcpu", M6809, SOUND_CLOCK/8) + MCFG_CPU_ADD("soundcpu", MC6809, SOUND_CLOCK/2) MCFG_CPU_PROGRAM_MAP(sound_map) MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", itech32_state, nvram_init) diff --git a/src/mame/drivers/itech8.cpp b/src/mame/drivers/itech8.cpp index d88579c3b80..e20d83eef9e 100644 --- a/src/mame/drivers/itech8.cpp +++ b/src/mame/drivers/itech8.cpp @@ -536,7 +536,7 @@ void itech8_state::update_interrupts(int periodic, int tms34061, int blitter) if (blitter != -1) m_blitter_int = blitter; /* handle the 6809 case */ - if (main_cpu_type == M6809 || main_cpu_type == HD6309) + if (main_cpu_type == MC6809 || main_cpu_type == HD6309) { /* just modify lines that have changed */ if (periodic != -1) m_maincpu->set_input_line(INPUT_LINE_NMI, periodic ? ASSERT_LINE : CLEAR_LINE); @@ -625,7 +625,7 @@ void itech8_state::machine_reset() device_type main_cpu_type = m_maincpu->type(); /* make sure bank 0 is selected */ - if (main_cpu_type == M6809 || main_cpu_type == HD6309) + if (main_cpu_type == MC6809 || main_cpu_type == HD6309) { membank("bank1")->set_entry(0); m_maincpu->reset(); @@ -1668,7 +1668,7 @@ WRITE_LINE_MEMBER(itech8_state::generate_tms34061_interrupt) static MACHINE_CONFIG_START( itech8_core_lo ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, CLOCK_8MHz/4) + MCFG_CPU_ADD("maincpu", MC6809, CLOCK_8MHz) MCFG_CPU_PROGRAM_MAP(tmslo_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", itech8_state, generate_nmi) @@ -1710,7 +1710,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( itech8_sound_ym2203 ) /* basic machine hardware */ - MCFG_CPU_ADD("soundcpu", M6809, CLOCK_8MHz/4) + MCFG_CPU_ADD("soundcpu", MC6809, CLOCK_8MHz) MCFG_CPU_PROGRAM_MAP(sound2203_map) /* sound hardware */ @@ -1730,7 +1730,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( itech8_sound_ym2608b ) /* basic machine hardware */ - MCFG_CPU_ADD("soundcpu", M6809, CLOCK_8MHz/4) + MCFG_CPU_ADD("soundcpu", MC6809, CLOCK_8MHz) MCFG_CPU_PROGRAM_MAP(sound2608b_map) /* sound hardware */ @@ -1744,7 +1744,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( itech8_sound_ym3812 ) /* basic machine hardware */ - MCFG_CPU_ADD("soundcpu", M6809, CLOCK_8MHz/4) + MCFG_CPU_ADD("soundcpu", MC6809, CLOCK_8MHz) MCFG_CPU_PROGRAM_MAP(sound3812_map) MCFG_DEVICE_ADD("pia", PIA6821, 0) @@ -1765,7 +1765,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( itech8_sound_ym3812_external ) /* basic machine hardware */ - MCFG_CPU_ADD("soundcpu", M6809, CLOCK_8MHz/4) + MCFG_CPU_ADD("soundcpu", MC6809, CLOCK_8MHz) MCFG_CPU_PROGRAM_MAP(sound3812_external_map) /* sound hardware */ diff --git a/src/mame/drivers/mpu12wbk.cpp b/src/mame/drivers/mpu12wbk.cpp index 1addccedda6..21ebe65a1ca 100644 --- a/src/mame/drivers/mpu12wbk.cpp +++ b/src/mame/drivers/mpu12wbk.cpp @@ -486,7 +486,7 @@ GFXDECODE_END static MACHINE_CONFIG_START( mpu12wbk ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/2) /* guess */ + MCFG_CPU_ADD("maincpu", MC6809, MASTER_CLOCK) MCFG_CPU_PROGRAM_MAP(mpu12wbk_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", mpu12wbk_state, nmi_line_pulse) -- cgit v1.2.3-70-g09d2 From 44c12416f2261c416929967fa49666ffd3c2a5a2 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 11 Dec 2017 22:54:51 -0500 Subject: maygay1b.cpp: Correct 6809 type and clock, maybe (nw) --- src/mame/drivers/maygay1b.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/maygay1b.cpp b/src/mame/drivers/maygay1b.cpp index e8d95836dcf..143de6d02df 100644 --- a/src/mame/drivers/maygay1b.cpp +++ b/src/mame/drivers/maygay1b.cpp @@ -769,7 +769,7 @@ ADDRESS_MAP_END MACHINE_CONFIG_START( maygay_m1 ) - MCFG_CPU_ADD("maincpu", M6809, M1_MASTER_CLOCK/2) + MCFG_CPU_ADD("maincpu", MC6809, M1_MASTER_CLOCK/2) // claimed to be 4 MHz MCFG_CPU_PROGRAM_MAP(m1_memmap) MCFG_CPU_ADD("mcu", I80C51, 2000000) // EP840034.A-P-80C51AVW -- cgit v1.2.3-70-g09d2 From bfc2eda1dab80d8274983a8b557ce7af1e3dc0cd Mon Sep 17 00:00:00 2001 From: sjy96525 <1580594783@qq.com> Date: Tue, 12 Dec 2017 13:51:05 +0800 Subject: Add calcune.cpp to arcade.flt (nw) --- src/mame/arcade.flt | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index 453f87a2b92..c0a2ca37c62 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -172,6 +172,7 @@ bzone.cpp cabal.cpp cabaret.cpp calchase.cpp +calcune.cpp calomega.cpp calorie.cpp canyon.cpp -- cgit v1.2.3-70-g09d2 From fa4997dd187c68d447a414cc1220d270a5e70364 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Tue, 12 Dec 2017 07:54:21 +0100 Subject: taitotz.cpp: corrected batlgear year, thanks to sjy96525 (nw) --- src/mame/drivers/taitotz.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/taitotz.cpp b/src/mame/drivers/taitotz.cpp index 7a04f0da8e0..ae4bedc7ca1 100644 --- a/src/mame/drivers/taitotz.cpp +++ b/src/mame/drivers/taitotz.cpp @@ -2949,9 +2949,9 @@ ROM_START( styphp ) ROM_END GAME( 1999, taitotz, 0, taitotz, taitotz, taitotz_state, 0, ROT0, "Taito", "Type Zero BIOS", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_IS_BIOS_ROOT) +GAME( 1998, batlgear, taitotz, taitotz, batlgr2, taitotz_state, batlgear, ROT0, "Taito", "Battle Gear (Ver 2.40 A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) GAME( 1999, landhigh, taitotz, landhigh, landhigh, taitotz_state, landhigh, ROT0, "Taito", "Landing High Japan (Ver 2.01 OK)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) GAME( 1999, landhigha, landhigh, landhigh, landhigh, taitotz_state, landhigha,ROT0, "Taito", "Landing High Japan (Ver 2.02 O)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 1999, batlgear, taitotz, taitotz, batlgr2, taitotz_state, batlgear, ROT0, "Taito", "Battle Gear (Ver 2.40 A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) GAME( 1999, pwrshovl, taitotz, taitotz, pwrshovl, taitotz_state, pwrshovl, ROT0, "Taito", "Power Shovel ni Norou!! - Power Shovel Simulator (v2.07J)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // 1999/8/5 19:13:35 GAME( 1999, pwrshovla, pwrshovl, taitotz, pwrshovl, taitotz_state, pwrshovl, ROT0, "Taito", "Power Shovel ni Norou!! - Power Shovel Simulator (v2.07J, alt)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // seem to be some differences in drive content, but identifies as the same revision, is it just user data changes?? GAME( 2000, batlgr2, taitotz, taitotz, batlgr2, taitotz_state, batlgr2, ROT0, "Taito", "Battle Gear 2 (v2.04J)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -- cgit v1.2.3-70-g09d2 From 0dc02e58a8f08f54d1eec4151f5d719d5dda4b79 Mon Sep 17 00:00:00 2001 From: Alex Marshall Date: Tue, 12 Dec 2017 00:58:19 -0800 Subject: Fix Batrider's audio CPU clock. Was doing a repair today that required me to hook up a different clock source to the YM2151, so we tried to use the Z80's clock. Turns out, it's not at all 4MHz, so it was wrong. We put the 32MHz oscillator and the Z80 clock on an oscilloscope and determined the Z80 clock was divided by 6 instead of 8. So instead we divided the 68k's clock by 4 and got 4MHz, so the 68k is indeed 16MHz. --- src/mame/drivers/toaplan2.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/toaplan2.cpp b/src/mame/drivers/toaplan2.cpp index e9e9d56cffa..85c9dcb81b9 100644 --- a/src/mame/drivers/toaplan2.cpp +++ b/src/mame/drivers/toaplan2.cpp @@ -4069,10 +4069,10 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_START( batrider ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /* 16MHz , 32MHz Oscillator */ + MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /* 16MHz , 32MHz Oscillator (verified) */ MCFG_CPU_PROGRAM_MAP(batrider_68k_mem) - MCFG_CPU_ADD("audiocpu", Z80, XTAL_32MHz/8) /* 4MHz , 32MHz Oscillator */ + MCFG_CPU_ADD("audiocpu", Z80, XTAL_32MHz/6) /* 5.333MHz , 32MHz Oscillator (verified) */ MCFG_CPU_PROGRAM_MAP(batrider_sound_z80_mem) MCFG_CPU_IO_MAP(batrider_sound_z80_port) @@ -4109,7 +4109,7 @@ static MACHINE_CONFIG_START( batrider ) MCFG_GENERIC_LATCH_8_ADD("soundlatch3") MCFG_GENERIC_LATCH_8_ADD("soundlatch4") - MCFG_YM2151_ADD("ymsnd", XTAL_32MHz/8) + MCFG_YM2151_ADD("ymsnd", XTAL_32MHz/8) /* 4MHz , 32MHz Oscillator (verified) */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MCFG_OKIM6295_ADD("oki1", XTAL_32MHz/10, PIN7_HIGH) -- cgit v1.2.3-70-g09d2 From 21490be86e8193cce1599e5c6d026ba8955802f7 Mon Sep 17 00:00:00 2001 From: rfka01 Date: Tue, 12 Dec 2017 16:56:07 +0100 Subject: alphatp3: Two distinct ROM sets. (#2918) * alphatp3: Two distinct ROM sets. * alphatp3: removed redundant ROM loading, alphatp2: Two complete P2 ROM sets * alphatp2: info and correct floppy format for P2 * alphatpx: Floppy drives info, P30/P40 info --- src/mame/drivers/alphatpx.cpp | 76 +++++++++++++++++++++++++++++++------------ 1 file changed, 55 insertions(+), 21 deletions(-) diff --git a/src/mame/drivers/alphatpx.cpp b/src/mame/drivers/alphatpx.cpp index fcb3d9de838..67e8751628b 100644 --- a/src/mame/drivers/alphatpx.cpp +++ b/src/mame/drivers/alphatpx.cpp @@ -25,15 +25,18 @@ P1 Upper 32K 0x4000 - 0x400a reserved 0x4010 - 0xc000 32K RAM +1x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drive P2, P2S Upper 48K 0x4000 - 0x400a reserved 0x4010 - 0xfff 48K RAM +P2: 2x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives P2 U, paging via An adapter with RAM at 0x0000 and 0x3fff and the banking logic (see above) is added to the the standard 48K memory card. 16K memory card +P2S, P2U: 2x 320K, double sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives P3, P4 0x0000 - 0x0fff ROM monitor (MOS) @@ -42,13 +45,16 @@ P3, P4 0x1c00 - 0x2fff free 0x3000 - 0x3fff video memory 0x4000 - 0xffff RAM - +P3: 2x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drives +P4: 1x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drive, 1x harddisk 360 tracks, 4 heads, 17 sectors/track, 512 bytes/sector P2 U and P3 support regular CP/M use with a full 64K RAM complement. Still, the video RAM is at 0x3000 and 0x3ffff even for these machines, and from what I've read they also use the routine present in the ROM monitor, the MOS. That means, that in order to update the video RAM and probably other I/O the lower 16K (page 0) are constantly paged in and paged out. - This is accomplished by writing 2FH to port 0x78 in order to switch in the ROM (and assorted, see below) area and by writing 63H to port 0x78 in order to swap the full 64K RAM back in. + +P30 and P40 were P3 and P4's with an additional 8088 card (some with an extra graphics extension) to support MS-DOS. + ***************************************************************************/ #include "emu.h" @@ -323,10 +329,13 @@ INPUT_PORTS_END // FLOPPY //************************************************************************** -static SLOT_INTERFACE_START( alphatp3_floppies ) +static SLOT_INTERFACE_START( alphatp3_floppies ) // two BASF 2471 drives SLOT_INTERFACE("525qd", FLOPPY_525_QD) SLOT_INTERFACE_END +static SLOT_INTERFACE_START( alphatp2_floppies ) // two BASF 6106 drives + SLOT_INTERFACE("525ssdd", FLOPPY_525_SSDD) +SLOT_INTERFACE_END //************************************************************************** // VIDEO @@ -558,6 +567,12 @@ static MACHINE_CONFIG_START( alphatp3 ) MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatp3_floppies, "525qd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED (alphatp2, alphatp3) + MCFG_DEVICE_REMOVE("fdc:0") + MCFG_DEVICE_REMOVE("fdc:1") + MCFG_FLOPPY_DRIVE_ADD("fdc:0", alphatp2_floppies, "525ssdd", floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatp2_floppies, "525ssdd", floppy_image_device::default_floppy_formats) +MACHINE_CONFIG_END //************************************************************************** // ROM DEFINITIONS @@ -566,40 +581,59 @@ MACHINE_CONFIG_END // Alphatronic P2 ROM_START( alphatp2 ) // P2 ROM space 0x1800 ROM_REGION(0x1800, "boot", 0) - ROM_SYSTEM_BIOS(0, "p2_es", "p2_es") - ROMX_LOAD("caap_p2_es.bin", 0x0000, 0x1800, CRC(FBA85CD3) SHA1(E82482AF6D39F892B88868677572898945E02581), ROM_BIOS(1) ) // P2 SPANIEN - ROM_SYSTEM_BIOS(1, "p2_sks", "p2_sks") - ROMX_LOAD("mos3-p2_sks.bin", 0x0000, 0x1800, CRC(C045AADB) SHA1(1478530894E1DA53CC96DDB765DD1E03FF3ADEF1), ROM_BIOS(2) ) // P2 sks - ROM_SYSTEM_BIOS(2, "p2_ta", "p2_ta") - ROMX_LOAD("prom2p00.bin", 0x0000, 0x0800, CRC(c98d2982) SHA1(11e98ae441b7a9c8dfd22795f8208667959f1d1c), ROM_BIOS(3) ) // P2 TA - ROMX_LOAD("prom2p01.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(3) ) - ROMX_LOAD("prom2p02.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(3) ) + ROM_SYSTEM_BIOS(0, "caap94-96", "caap94-96") + ROM_SYSTEM_BIOS(1, "caap04-06", "caap04-06") + ROM_SYSTEM_BIOS(2, "p2_es", "p2_es") + ROM_SYSTEM_BIOS(3, "p2_sks", "p2_sks") + ROM_SYSTEM_BIOS(4, "p2_ta", "p2_ta") + + ROMX_LOAD("caap_96_00_5a.bin", 0x0000, 0x0800, CRC(cb137796) SHA1(876bd0762faffc7b74093922d8fbf1c72ec70060), ROM_BIOS(1) ) // earlier P2, three 16K RAM boards + ROMX_LOAD("caap_05_02_12.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(1) ) + ROMX_LOAD("caap_94_01_50.bin", 0x1000, 0x0800, CRC(fda8d4a4) SHA1(fa91e6e8504e7f84cf69d86f72826ad5405fd82d), ROM_BIOS(1) ) + + ROMX_LOAD("prom2p00.bin", 0x0000, 0x0800, CRC(c98d2982) SHA1(11e98ae441b7a9c8dfd22795f8208667959f1d1c), ROM_BIOS(2) ) // later P2, one 48K RAM board + ROMX_LOAD("prom2p01.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(2) ) + ROMX_LOAD("prom2p02.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(2) ) + + ROMX_LOAD("caap_p2_es.bin", 0x0000, 0x1800, CRC(FBA85CD3) SHA1(E82482AF6D39F892B88868677572898945E02581), ROM_BIOS(3) ) // P2 Spain + + ROMX_LOAD("mos3-p2_sks.bin", 0x0000, 0x1800, CRC(C045AADB) SHA1(1478530894E1DA53CC96DDB765DD1E03FF3ADEF1), ROM_BIOS(4) ) // P2 sks + + ROMX_LOAD("prom2p00.bin", 0x0000, 0x0800, CRC(c98d2982) SHA1(11e98ae441b7a9c8dfd22795f8208667959f1d1c), ROM_BIOS(5) ) // P2 TA + ROMX_LOAD("prom2p01.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(5) ) + ROMX_LOAD("prom2p02.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(5) ) ROM_REGION(0x400, "kbdmcu", 0) - ROM_LOAD("p3_keyboard_8278.bin", 0x000, 0x400, CRC(5DB00D85) SHA1(0DC8E274A5AECE261EF60494901601C0D8B1EB51)) // borrowed from rfka01 machine #2 until we have a proper dump from a P2 + ROM_LOAD("p2_keyboard_ip8041a_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51)) // same across all dumped P2 and P3 machines ROM_REGION(0x800, "gfx", 0) - ROM_LOAD("cajp08_01_15.bin", 0x000, 0x800, CRC(4ed11dac) SHA1(9db9b8e0edf471faaddbb5521d6223121146bab8)) // borrowed from rfka01 machine #1 until we have a proper dump from a P2 + ROMX_LOAD("cajp_97_00_5a.bin", 0x000, 0x800, CRC(aa5eab85) SHA1(2718924f5520e7e9aad635786847e78e3096b285), ROM_BIOS(1)) + ROMX_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d), ROM_BIOS(2)) + ROMX_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d), ROM_BIOS(3)) + ROMX_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d), ROM_BIOS(4)) + ROMX_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d), ROM_BIOS(5)) ROM_END // Alphatronic P3 ROM_START( alphatp3 ) ROM_REGION(0x1800, "boot", 0) // P3 ROM space 0x1000 - ROM_LOAD("caap36_02_19.bin", 0x0000, 0x1000, CRC(23df6666) SHA1(5ea04cd299dec9951425eb91ecceb4818c4c6378)) // identical between rfka01 #1 and #2 - + ROM_SYSTEM_BIOS(0, "gx347", "gx347") // earlier P3, seperate 48K and 16K RAM boards + ROM_SYSTEM_BIOS(1, "lb352", "lb352") // later P3, one 64K RAM board + + ROM_LOAD("caap36_02_19.bin", 0x0000, 0x1000, CRC(23df6666) SHA1(5ea04cd299dec9951425eb91ecceb4818c4c6378) ) // identical between earlier and later P3 + // BIOS names taken from CPU card labels ROM_REGION(0x400, "kbdmcu", 0) -// ROM_LOAD("p3_keyboard_mab8041a.bin", 0x000, 0x400, CRC(4fd60dc1) SHA1(165f0c5afdef37385d06cf5caeae8422536de7fc)) // rfka01 machine #1 - ROM_LOAD("p3_keyboard_8278.bin", 0x000, 0x400, CRC(5DB00D85) SHA1(0DC8E274A5AECE261EF60494901601C0D8B1EB51)) // rfka01 machine #2 + ROM_LOAD("p3_keyboard_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51) ) ROM_REGION(0x800, "gfx", 0) - // ROM_LOAD("cajp08_00_15.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d)) // rfka01 machine #2 - ROM_LOAD("cajp08_01_15.bin", 0x000, 0x800, CRC(4ed11dac) SHA1(9db9b8e0edf471faaddbb5521d6223121146bab8)) // rfka01 machine #1 + ROMX_LOAD("cajp08_00_15.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d), ROM_BIOS(1) ) + ROMX_LOAD("cajp08_01_15.bin", 0x000, 0x800, CRC(4ed11dac) SHA1(9db9b8e0edf471faaddbb5521d6223121146bab8), ROM_BIOS(2) ) ROM_END // Alphatronic P30 ROM_START( alphatp30 ) // P30 add-on card with 8088 needs to be emulated to boot DOS ROM_REGION(0x1800, "boot", 0) - ROM_LOAD("hasl17.07.84.bin", 0x0000, 0x1000, CRC(6A91701B) SHA1(8A4F925D0FABAB37852A54D04E06DEB2AEAA349C)) // netmercer EPRom P30 ...wait for INT6.5 or INT5.5 with RIM to write char in hsync or hsync GAP-time !! + ROM_LOAD("hasl17.07.84.bin", 0x0000, 0x1000, CRC(6A91701B) SHA1(8A4F925D0FABAB37852A54D04E06DEB2AEAA349C)) // netmercer Eprom P30 ...wait for INT6.5 or INT5.5 with RIM to write char in hsync or hsync GAP-time !! ROM_REGION(0x400, "kbdmcu", 0) ROM_LOAD("p3_keyboard_8278.bin", 0x000, 0x400, CRC(5DB00D85) SHA1(0DC8E274A5AECE261EF60494901601C0D8B1EB51)) // borrowed from rfka01 machine #2 @@ -616,6 +650,6 @@ ROM_END //************************************************************************** // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 198?, alphatp2, alphatp3, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 198?, alphatp2, alphatp3, 0, alphatp2, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 1982, alphatp3, 0, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P3", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 198?, alphatp30, alphatp3, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P30",MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -- cgit v1.2.3-70-g09d2 From 4637ec82dceb40ef454751fe02c2188aa06ccf29 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Tue, 12 Dec 2017 18:25:05 +0200 Subject: pgm2 gpu registers notes (nw) --- src/mame/drivers/pgm2.cpp | 19 +++++++++++++++++++ src/mame/machine/pgm2_memcard.cpp | 10 ++++++++-- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 785b6953a2c..2d4756ce59e 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -68,6 +68,25 @@ Oriental Legend 2 (Oversea) - V21 Oriental Legend 2 (China) - A8 + GPU registers, located at 301200xx, 16bit access. + 00 - bg scroll x + 02 - bg scroll y + 04 - zoom something, 0F-7F, default 1F + 06 - zoom something, 0F-7F, default 1F + 08 - fg? scroll x + 0a - fg? scroll y + 0e - sprite related, set to 1 at sprite hw init + 10 - sprite related, orleg2 - 0x13, kov2nl - 0x14 + 14 - sprite enable ? set to 0 before spriteram update, to 1 after + 16 - enable access to vrams/palettes/etc ? (bitmask) + 18 - vblank ack + 1a - ? 0 at init + 1c - sprite related, orleg2 - 5, kov2nl - 7 + 1e - sprite related, set to 2 at sprite hw init + 32 - shared RAM bank + 34, 36 - sprite related, set to 0 at sprite hw init, some unused xor feature ? + 38, 3a - sprite mask xor key + */ #include "includes/pgm2.h" diff --git a/src/mame/machine/pgm2_memcard.cpp b/src/mame/machine/pgm2_memcard.cpp index 243cfe80855..e8fee19f474 100644 --- a/src/mame/machine/pgm2_memcard.cpp +++ b/src/mame/machine/pgm2_memcard.cpp @@ -96,11 +96,17 @@ void pgm2_memcard_device::auth(uint8_t p1, uint8_t p2, uint8_t p3) { if (m_security_data[0] & 7) { - if (m_security_data[1] == p1 && m_security_data[2] == p2 && m_security_data[3] == p3) + if (m_security_data[1] == p1 && m_security_data[2] == p2 && m_security_data[3] == p3) { authenticated = true; + m_security_data[0] = 7; + } else { + authenticated = false; m_security_data[0] >>= 1; // hacky - logerror("Wrong IC Card password !!!"); + if (m_security_data[0] & 7) + popmessage("Wrong IC Card password !!!\n"); + else + popmessage("Wrong IC Card password, card was locked!!!\n"); } } } -- cgit v1.2.3-70-g09d2 From 4522ace94fbdbc4ea84a9f9731522a1b478c3fc2 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Tue, 12 Dec 2017 18:56:16 +0200 Subject: pgm2: kov3 card data future use, make notes less misinforming (nw) --- src/mame/drivers/pgm2.cpp | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 2d4756ce59e..4f8168637f6 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -75,16 +75,16 @@ 06 - zoom something, 0F-7F, default 1F 08 - fg? scroll x 0a - fg? scroll y - 0e - sprite related, set to 1 at sprite hw init - 10 - sprite related, orleg2 - 0x13, kov2nl - 0x14 + 0e - ? 1 at init (sprite related?) + 10 - ? orleg2 - 0x13, kov2nl - 0x14 at init (sprite related?) 14 - sprite enable ? set to 0 before spriteram update, to 1 after 16 - enable access to vrams/palettes/etc ? (bitmask) 18 - vblank ack 1a - ? 0 at init - 1c - sprite related, orleg2 - 5, kov2nl - 7 - 1e - sprite related, set to 2 at sprite hw init + 1c - ? orleg2 - 5, kov2nl - 7 at init (sprite related?) + 1e - ? 2 at init (sprite related?) 32 - shared RAM bank - 34, 36 - sprite related, set to 0 at sprite hw init, some unused xor feature ? + 34, 36 - ? 0 at init, some unused xor feature ? 38, 3a - sprite mask xor key */ @@ -806,6 +806,9 @@ ROM_START( kov3 ) ROM_REGION( 0x04000, "maincpu", 0 ) ROM_LOAD( "kov3_igs036.rom", 0x00000000, 0x0004000, NO_DUMP ) // CRC(c7d33764) SHA1(5cd48f876e637d60391d39ac6e40bf243300cc75) + ROM_REGION( 0x108, "default_card", 0 ) + ROM_LOAD( "blank_kov3_china_card.pg2", 0x000, 0x108, CRC(bd5a968f) SHA1(b9045eb70e02afda7810431c592208053d863980) ) + ROM_REGION( 0x1000000, "user1", 0 ) ROM_LOAD( "kov3_v104cn_raw.bin", 0x00000000, 0x0800000, CRC(1b5cbd24) SHA1(6471d4842a08f404420dea2bd1c8b88798c80fd5) ) -- cgit v1.2.3-70-g09d2 From b75dfb6f7cc54d22e83594a1d4b3bbad3ca57bea Mon Sep 17 00:00:00 2001 From: AJR Date: Tue, 12 Dec 2017 12:32:09 -0500 Subject: calcune: A few hardware notes (nw) --- src/mame/drivers/calcune.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/mame/drivers/calcune.cpp b/src/mame/drivers/calcune.cpp index fe57bb41aa8..0d034777231 100644 --- a/src/mame/drivers/calcune.cpp +++ b/src/mame/drivers/calcune.cpp @@ -1,5 +1,17 @@ // license:BSD-3-Clause // copyright-holders:David Haywood +/*************************************************************************** + + Calcune (Japan, prototype) + + CPUs are HD68HC000CP8 and TMP84C00AU-6 QFP types. Other ICs include two + Sega 315-5560-02 VDPs and a YMZ280B-F for sound. + + Oscillators: 53.693MHz (OSC1), 16.9444 (XL1), 14.318 (XL3). + + Printed on board: "VDP LICENSE FROM SEGA, MANUFACTURED BY ADO." + +***************************************************************************/ #include "emu.h" -- cgit v1.2.3-70-g09d2 From 13292ccb4e441da06361cd5412fbdd8da363d7a0 Mon Sep 17 00:00:00 2001 From: AJR Date: Tue, 12 Dec 2017 13:04:25 -0500 Subject: mermaid.cpp: Don't break games not using ADPCM (nw) --- src/mame/drivers/mermaid.cpp | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/mermaid.cpp b/src/mame/drivers/mermaid.cpp index eaf4c46fc59..dfc7754812d 100644 --- a/src/mame/drivers/mermaid.cpp +++ b/src/mame/drivers/mermaid.cpp @@ -383,12 +383,15 @@ void mermaid_state::machine_reset() m_rougien_gfxbank1 = 0; m_rougien_gfxbank2 = 0; - m_adpcm_idle = 1; - m_adpcm_rom_sel = 0; - m_adpcm->reset_w(1); - m_adpcm_counter->reset_w(1); - m_adpcm_trigger = 0; - m_adpcm_data = 0; + if (m_adpcm.found()) + { + m_adpcm_idle = 1; + m_adpcm_rom_sel = 0; + m_adpcm->reset_w(1); + m_adpcm_counter->reset_w(1); + m_adpcm_trigger = 0; + m_adpcm_data = 0; + } } /* Similar to Jantotsu, apparently the HW has three ports that controls what kind of sample should be played. Every sample size is 0x1000. */ -- cgit v1.2.3-70-g09d2 From 83623277aae5e7183cf9909b094e4293845c601c Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 12 Dec 2017 21:05:29 +0100 Subject: New working clones ------------------ Fidelity Designer Mach IV Master 2325 [hap, yoyo_chessboard] --- src/mame/drivers/fidel68k.cpp | 77 +++++++++++++++++++++++++++++-------------- src/mame/mame.lst | 1 + 2 files changed, 54 insertions(+), 24 deletions(-) diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 971b871821b..6ebd5e43d03 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -45,6 +45,9 @@ PCB label 510.1134A02 ROM address/data lines are scrambled, presumed for easy placement on PCB and not for obfuscation. I/O is nearly the same as Designer Display on 6502 hardware. +Designer Mach IV Master 2325 uses a M68EC020 at 20MHz and has more RAM: +32KB(4*P5164-70) + 512KB(TC518512PL-80). The ROM is not scrambled. + ****************************************************************************** @@ -202,9 +205,9 @@ public: DECLARE_WRITE8_MEMBER(fex68k_mux_w); // Designer Master - DECLARE_WRITE8_MEMBER(fdes2265_control_w); - DECLARE_READ8_MEMBER(fdes2265_input_r); - DECLARE_WRITE8_MEMBER(fdes2265_lcd_w); + DECLARE_WRITE8_MEMBER(fdes68k_control_w); + DECLARE_READ8_MEMBER(fdes68k_input_r); + DECLARE_WRITE8_MEMBER(fdes68k_lcd_w); DECLARE_DRIVER_INIT(fdes2265); // EAG(6114/6117) @@ -241,7 +244,7 @@ WRITE8_MEMBER(fidel68k_state::fex68k_mux_w) Designer Master ******************************************************************************/ -WRITE8_MEMBER(fidel68k_state::fdes2265_control_w) +WRITE8_MEMBER(fidel68k_state::fdes68k_control_w) { u8 q3_old = m_led_select & 8; @@ -272,13 +275,13 @@ WRITE8_MEMBER(fidel68k_state::fdes2265_control_w) display_update(); } -READ8_MEMBER(fidel68k_state::fdes2265_input_r) +READ8_MEMBER(fidel68k_state::fdes68k_input_r) { // a1-a3,d7(d15): multiplexed inputs (active low) return (read_inputs(9) >> offset & 1) ? 0 : 0x80; } -WRITE8_MEMBER(fidel68k_state::fdes2265_lcd_w) +WRITE8_MEMBER(fidel68k_state::fdes68k_lcd_w) { // a1-a3,d0-d3: 4*74259 to lcd digit segments u32 mask = BITSWAP8(1 << offset,3,7,6,0,1,2,4,5); @@ -392,11 +395,21 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( fdes2265_map, AS_PROGRAM, 16, fidel68k_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x000000, 0x00ffff) AM_ROM - AM_RANGE(0x000000, 0x00000f) AM_WRITE8(fdes2265_lcd_w, 0x00ff) + AM_RANGE(0x000000, 0x00000f) AM_WRITE8(fdes68k_lcd_w, 0x00ff) AM_RANGE(0x044000, 0x047fff) AM_RAM AM_RANGE(0x100000, 0x10ffff) AM_RAM - AM_RANGE(0x140000, 0x14000f) AM_READ8(fdes2265_input_r, 0xff00) - AM_RANGE(0x140000, 0x14000f) AM_WRITE8(fdes2265_control_w, 0x00ff) + AM_RANGE(0x140000, 0x14000f) AM_READ8(fdes68k_input_r, 0xff00) + AM_RANGE(0x140000, 0x14000f) AM_WRITE8(fdes68k_control_w, 0x00ff) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( fdes2325_map, AS_PROGRAM, 32, fidel68k_state ) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x000000, 0x00ffff) AM_ROM + AM_RANGE(0x300000, 0x37ffff) AM_RAM + AM_RANGE(0x500000, 0x507fff) AM_RAM + AM_RANGE(0x100000, 0x10000f) AM_WRITE8(fdes68k_lcd_w, 0x00ff00ff) + AM_RANGE(0x140000, 0x14000f) AM_WRITE8(fdes68k_control_w, 0x00ff00ff) + AM_RANGE(0x180000, 0x18000f) AM_READ8(fdes68k_input_r, 0xff00ff00) ADDRESS_MAP_END @@ -468,7 +481,7 @@ static INPUT_PORTS_START( fex68k ) INPUT_PORTS_END -static INPUT_PORTS_START( fdes ) +static INPUT_PORTS_START( fdes68k ) PORT_INCLUDE( fidel_cb_buttons ) PORT_START("IN.8") @@ -565,6 +578,13 @@ static MACHINE_CONFIG_START( fdes2265 ) MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( fdes2325, fdes2265 ) + + /* basic machine hardware */ + MCFG_CPU_REPLACE("maincpu", M68EC020, XTAL_20MHz) // MC68EC020RP25 + MCFG_CPU_PROGRAM_MAP(fdes2325_map) +MACHINE_CONFIG_END + static MACHINE_CONFIG_START( eag ) /* basic machine hardware */ @@ -661,6 +681,14 @@ ROM_START( fdes2265 ) // model 6113, PCB label 510.1134A02 ROM_LOAD16_BYTE("13o_blue.ic10", 0x00001, 0x08000, CRC(81ce7ab2) SHA1(f01a70bcf2fbfe66c7a77d3c4437d897e5cc682d) ) // " ROM_END +ROM_START( fdes2325 ) // model 6129, PCB label 510.1149A01 + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD("61_24_white.ic10", 0x00000, 0x10000, CRC(f74157e1) SHA1(87f3f2d584e292f81593e053240d022cc477834d) ) // 27c512 + + ROM_REGION( 0x100, "pals", 0 ) + ROM_LOAD("101-1097a01.ic19", 0x000, 0x100, NO_DUMP ) // PALCE16V8Q-25PC +ROM_END + ROM_START( feagv2 ) // from a V2 board ROM_REGION16_BE( 0x20000, "maincpu", 0 ) @@ -714,17 +742,18 @@ ROM_END Drivers ******************************************************************************/ -// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS -CONS( 1987, fex68k, 0, 0, fex68k, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1988, fex68km2, fex68k, 0, fex68km2, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach II (rev. C+)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1988, fex68km3, fex68k, 0, fex68km3, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach III", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) - -CONS( 1989, fdes2265, 0, 0, fdes2265, fdes, fidel68k_state, fdes2265, "Fidelity Electronics", "Designer Mach III Master 2265", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) - -CONS( 1989, feagv2, 0, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1989, feagv2a, feagv2, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1990, feagv7, feagv2, 0, eagv7, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1990, feagv7a, feagv2, 0, eagv7, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1990, feagv9, feagv2, 0, eagv9, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-9)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1990, feagv10, feagv2, 0, eagv10, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-10)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_TIMING ) -CONS( 2002, feagv11, feagv2, 0, eagv11, eag, fidel68k_state, 0, "hack (Wilfried Bucke)", "Elite Avant Garde (model 6117-11)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_TIMING ) +// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS +CONS( 1987, fex68k, 0, 0, fex68k, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1988, fex68km2, fex68k, 0, fex68km2, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach II (rev. C+)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1988, fex68km3, fex68k, 0, fex68km3, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach III", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) + +CONS( 1989, fdes2265, 0, 0, fdes2265, fdes68k, fidel68k_state, fdes2265, "Fidelity Electronics", "Designer Mach III Master 2265", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1991, fdes2325, fdes2265, 0, fdes2325, fdes68k, fidel68k_state, 0, "Fidelity Electronics", "Designer Mach IV Master 2325", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) + +CONS( 1989, feagv2, 0, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1989, feagv2a, feagv2, 0, eag, eag, fidel68k_state, eag, "Fidelity Electronics", "Elite Avant Garde (model 6114-2/3/4, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1990, feagv7, feagv2, 0, eagv7, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1990, feagv7a, feagv2, 0, eagv7, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-7, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1990, feagv9, feagv2, 0, eagv9, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-9)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1990, feagv10, feagv2, 0, eagv10, eag, fidel68k_state, 0, "Fidelity Electronics", "Elite Avant Garde (model 6117-10)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_TIMING ) +CONS( 2002, feagv11, feagv2, 0, eagv11, eag, fidel68k_state, 0, "hack (Wilfried Bucke)", "Elite Avant Garde (model 6117-11)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_TIMING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 071d29e4218..2b672fbacb9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -12612,6 +12612,7 @@ super9ccsp // * Spanish @source:fidel68k.cpp fdes2265 // +fdes2325 // feagv10 // feagv11 // feagv2 // -- cgit v1.2.3-70-g09d2 From f9ce368faa019a5051fb85e7e688141cd975a330 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 12 Dec 2017 21:35:05 +0100 Subject: small changes to fdesdis_68k layouts (nw) --- src/mame/drivers/fidel68k.cpp | 7 +- src/mame/layout/fidel_desdis_68k.lay | 459 --------------------------------- src/mame/layout/fidel_desdis_68kg.lay | 463 ++++++++++++++++++++++++++++++++++ src/mame/layout/fidel_desdis_68kr.lay | 458 +++++++++++++++++++++++++++++++++ 4 files changed, 926 insertions(+), 461 deletions(-) delete mode 100644 src/mame/layout/fidel_desdis_68k.lay create mode 100644 src/mame/layout/fidel_desdis_68kg.lay create mode 100644 src/mame/layout/fidel_desdis_68kr.lay diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 6ebd5e43d03..744cf6c2eed 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -183,7 +183,8 @@ B0000x-xxxxxx: see V7, -800000 #include "speaker.h" // internal artwork -#include "fidel_desdis_68k.lh" // clickable +#include "fidel_desdis_68kg.lh" // clickable +#include "fidel_desdis_68kr.lh" // clickable #include "fidel_ex_68k.lh" // clickable #include "fidel_eag_68k.lh" // clickable @@ -569,7 +570,7 @@ static MACHINE_CONFIG_START( fdes2265 ) MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", fidel68k_state, irq_off, attotime::from_hz(597)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1)) - MCFG_DEFAULT_LAYOUT(layout_fidel_desdis_68k) + MCFG_DEFAULT_LAYOUT(layout_fidel_desdis_68kr) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("speaker") @@ -583,6 +584,8 @@ static MACHINE_CONFIG_DERIVED( fdes2325, fdes2265 ) /* basic machine hardware */ MCFG_CPU_REPLACE("maincpu", M68EC020, XTAL_20MHz) // MC68EC020RP25 MCFG_CPU_PROGRAM_MAP(fdes2325_map) + + MCFG_DEFAULT_LAYOUT(layout_fidel_desdis_68kg) MACHINE_CONFIG_END static MACHINE_CONFIG_START( eag ) diff --git a/src/mame/layout/fidel_desdis_68k.lay b/src/mame/layout/fidel_desdis_68k.lay deleted file mode 100644 index 84b93b034fc..00000000000 --- a/src/mame/layout/fidel_desdis_68k.lay +++ /dev/null @@ -1,459 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/src/mame/layout/fidel_desdis_68kg.lay b/src/mame/layout/fidel_desdis_68kg.lay new file mode 100644 index 00000000000..e3f2d8cdc9b --- /dev/null +++ b/src/mame/layout/fidel_desdis_68kg.lay @@ -0,0 +1,463 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/fidel_desdis_68kr.lay b/src/mame/layout/fidel_desdis_68kr.lay new file mode 100644 index 00000000000..d07f864435a --- /dev/null +++ b/src/mame/layout/fidel_desdis_68kr.lay @@ -0,0 +1,458 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3-70-g09d2 From e6cd405fdebec748d06a900e10fa5a227faa0fb6 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Tue, 12 Dec 2017 14:15:11 -0700 Subject: smc91c9x: WIP Fixed loopback and added proper MMU handling. (nw) --- src/devices/machine/smc91c9x.cpp | 388 ++++++++++++++++++++++----------------- src/devices/machine/smc91c9x.h | 37 ++-- 2 files changed, 244 insertions(+), 181 deletions(-) diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index b94f7a29d1f..ae3a312ae2b 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -15,7 +15,8 @@ #include "emu.h" #include "smc91c9x.h" - +// Needed for netdev_count??? +#include "osdnet.h" /*************************************************************************** @@ -120,17 +121,23 @@ smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type void smc91c9x_device::device_start() { + // TX timer + m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::send_frame), this)); + m_irq_handler.resolve_safe(); /* register ide states */ save_item(NAME(m_reg)); save_item(NAME(m_regmask)); save_item(NAME(m_irq_state)); - save_item(NAME(m_alloc_count)); - save_item(NAME(m_rx)); - save_item(NAME(m_tx)); + save_item(NAME(m_buffer)); save_item(NAME(m_sent)); save_item(NAME(m_recd)); + save_item(NAME(m_alloc_rx)); + save_item(NAME(m_alloc_tx)); + // TODO: Need to save these + //save_item(NAME(m_comp_rx)); + //save_item(NAME(m_comp_tx)); } //------------------------------------------------- @@ -141,37 +148,13 @@ void smc91c9x_device::device_reset() { std::fill(std::begin(m_reg), std::end(m_reg), 0); - std::fill(std::begin(m_rx), std::end(m_rx), 0); - std::fill(std::begin(m_tx), std::end(m_tx), 0); - std::fill(std::begin(m_regmask), std::end(m_regmask), 0); m_irq_state = 0; - m_alloc_count = 0; - rx_fifo_out = 0; - rx_fifo_in = 0; - - tx_fifo_out = 0; - tx_fifo_in = 0; m_sent = 0; m_recd = 0; - osd_list_network_adapters(); - - unsigned char const *const mac = (const unsigned char *)get_mac(); - - if (VERBOSE & LOG_GENERAL) - { - logerror("MAC : "); - for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) - logerror("%.2X", mac[i]); - - logerror("\n"); - } - - set_promisc(true); - m_reg[EREG_TCR] = 0x0000; m_regmask[EREG_TCR] = 0x3d87; m_reg[EREG_EPH_STATUS] = 0x0000; m_regmask[EREG_EPH_STATUS] = 0x0000; m_reg[EREG_RCR] = 0x0000; m_regmask[EREG_RCR] = 0xc307; @@ -188,11 +171,6 @@ void smc91c9x_device::device_reset() m_reg[EREG_IA2_3] = 0x12F7; m_regmask[EREG_IA2_3] = 0xffff; m_reg[EREG_IA4_5] = 0x5634; m_regmask[EREG_IA4_5] = 0xffff; - // Interface MAC - m_reg[EREG_IA0_1] = mac[0] | (mac[1]<<8); - m_reg[EREG_IA2_3] = mac[2] | (mac[3]<<8); - m_reg[EREG_IA4_5] = mac[4] | (mac[5]<<8); - m_reg[EREG_GENERAL_PURP] = 0x0000; m_regmask[EREG_GENERAL_PURP] = 0xffff; m_reg[EREG_CONTROL] = 0x0100; m_regmask[EREG_CONTROL] = 0x68e7; @@ -209,12 +187,51 @@ void smc91c9x_device::device_reset() m_reg[EREG_MT4_5] = 0x0000; m_regmask[EREG_MT4_5] = 0xffff; m_reg[EREG_MT6_7] = 0x0000; m_regmask[EREG_MT6_7] = 0xffff; m_reg[EREG_MGMT] = 0x3030; m_regmask[EREG_MGMT] = 0x0f0f; - m_reg[EREG_REVISION] = 0x3340; m_regmask[EREG_REVISION] = 0x0000; + m_reg[EREG_REVISION] = 0x3345; m_regmask[EREG_REVISION] = 0x0000; m_reg[EREG_ERCV] = 0x331f; m_regmask[EREG_ERCV] = 0x009f; update_ethernet_irq(); + m_tx_timer->reset(); + + // Setup real network if enabled + if (netdev_count()) { + osd_list_network_adapters(); + unsigned char const *const mac = (const unsigned char *)get_mac(); + if (VERBOSE & LOG_GENERAL) + { + logerror("MAC : "); + for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) + logerror("%.2X", mac[i]); + + logerror("\n"); + } + + set_promisc(true); + // Interface MAC + m_reg[EREG_IA0_1] = mac[0] | (mac[1] << 8); + m_reg[EREG_IA2_3] = mac[2] | (mac[3] << 8); + m_reg[EREG_IA4_5] = mac[4] | (mac[5] << 8); + } + + // Reset MMU + mmu_reset(); } +void smc91c9x_device::mmu_reset() +{ + // Reset MMU allocations + m_alloc_rx = 0; + m_alloc_tx = 0; + // Reset completion FIFOs + while (!m_comp_tx.empty()) + m_comp_tx.pop(); + while (!m_comp_rx.empty()) + m_comp_rx.pop(); + + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); +} DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller") @@ -230,18 +247,38 @@ smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag, { } +bool smc91c9x_device::alloc_req(const int tx, int &packet_num) +{ + u32 curr_alloc = m_alloc_rx | m_alloc_tx; + + for (int index = 0; index < ETHER_BUFFERS; index++) { + if (!(curr_alloc & (1 << index))) { + packet_num = index; + if (tx) { + m_alloc_tx |= 1 << index; + } else { + m_alloc_rx |= 1 << index; + } + return true; + } + } + + return false; +} + +void smc91c9x_device::alloc_release(const int packet_num) +{ + int clear_mask = ~(1 << packet_num); + m_alloc_tx &= clear_mask; + m_alloc_rx &= clear_mask; +} + void smc91c9x_device::clear_tx_fifo() { - tx_fifo_in = 0; - tx_fifo_out = 0; - std::fill(std::begin(m_tx), std::end(m_tx), 0); } void smc91c9x_device::clear_rx_fifo() { - rx_fifo_in = 0; - rx_fifo_out = 0; - std::fill(std::begin(m_rx), std::end(m_rx), 0); } int smc91c9x_device::is_broadcast(uint8_t mac_address[]) @@ -268,22 +305,14 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) // wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01 int i; - uint8_t local_address[ETHERNET_ADDR_SIZE]; LOG("\n"); - local_address[0] = (m_reg[EREG_IA0_1]>>0) & 0xFF; - local_address[1] = (m_reg[EREG_IA0_1]>>8) & 0xFF; - local_address[2] = (m_reg[EREG_IA2_3]>>0) & 0xFF; - local_address[3] = (m_reg[EREG_IA2_3]>>8) & 0xFF; - local_address[4] = (m_reg[EREG_IA4_5]>>0) & 0xFF; - local_address[5] = (m_reg[EREG_IA4_5]>>8) & 0xFF; - if (VERBOSE & LOG_GENERAL) { for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) { - logerror("%.2X",local_address[i]); + logerror("%.2X", ((u8 *)&m_reg[EREG_IA0_1])[i]); } logerror("="); for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ ) @@ -300,7 +329,7 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) return 2; } - if (memcmp(mac_address, local_address, ETHERNET_ADDR_SIZE) == 0) + if (memcmp(mac_address, &m_reg[EREG_IA0_1], ETHERNET_ADDR_SIZE) == 0) { LOG(" -- Address Match\n"); return 1; @@ -335,7 +364,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) logerror(" - IsForMe %d - %d/0x%x bytes\n", isforme, length, length); } - if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0100) ) + if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0102) ) { LOG("\n"); @@ -345,13 +374,18 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) /* signal a receive */ + // Try to request a packet number + int packet_num; + if (!alloc_req(0, packet_num)) { + logerror("recv_cb: Couldn't allocate a recieve packet\n"); + return; + } + /* compute the packet length */ if ( ( length < ( ETHER_BUFFER_SIZE - ( 2+2+2 ) ) ) ) { - uint8_t *const packet = &m_rx[ ( rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) * ETHER_BUFFER_SIZE]; - - std::fill_n(packet, ETHER_BUFFER_SIZE, 0); + uint8_t *const packet = &m_buffer[ packet_num * ETHER_BUFFER_SIZE]; int dst = 0; @@ -384,17 +418,15 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) packet[dst++] = 0x40 | 0x00; // Control } - dst += 2; + //dst += 2; dst &= 0x7FF; packet[2] = (dst&0xFF); packet[3] = (dst) >> 8; - m_reg[EREG_INTERRUPT] |= EINT_RCV; - m_reg[EREG_FIFO_PORTS] &= ~0x8000; - - rx_fifo_in = (rx_fifo_in + 1) & ( ETHER_RX_BUFFERS - 1 ); + // Push packet number to rx completion fifo + m_comp_rx.push(packet_num); } else { @@ -416,12 +448,31 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) void smc91c9x_device::update_ethernet_irq() { + // Check tx completion fifo empty + if (m_comp_tx.empty()) { + m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; + } + else { + m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY; + } + // Check rx completion fifo empty + if (m_comp_rx.empty()) + m_reg[EREG_INTERRUPT] &= ~EINT_RCV; + else + m_reg[EREG_INTERRUPT] |= EINT_RCV; + uint8_t const mask = m_reg[EREG_INTERRUPT] >> 8; uint8_t const state = m_reg[EREG_INTERRUPT] & 0xff; + /* update the IRQ state */ - m_irq_state = ((mask & state) != 0); - m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); + uint8_t new_state = mask & state; + if (m_irq_state ^ new_state) + { + logerror("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state); + m_irq_state = new_state; + m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE); + } } @@ -440,29 +491,19 @@ void smc91c9x_device::update_stats() send_frame - push a frame to the interface -------------------------------------------------*/ -int smc91c9x_device::send_frame() +TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) { - bool const is_broadcast = (m_tx[4] == 0xff && m_tx[5] == 0xff && m_tx[6] == 0xff && - m_tx[7] == 0xff && m_tx[8] == 0xff && m_tx[9] == 0xff); + const int packet_num = m_comp_tx.front(); + uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE]; - tx_fifo_in = ( tx_fifo_in + 1 ) & ( ETHER_TX_BUFFERS - 1 ); - - uint8_t *const tx_buffer = &m_tx[(tx_fifo_out & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE]; - tx_fifo_out = ((tx_fifo_out + 1)& (ETHER_TX_BUFFERS-1)); - - /* update the EPH register and stuff it in the first transmit word */ + /* update the EPH register */ m_reg[EREG_EPH_STATUS] = 0x0001; - if (is_broadcast) + if (is_broadcast(&tx_buffer[4])) m_reg[EREG_EPH_STATUS] |= 0x0040; - tx_buffer[0] = m_reg[EREG_EPH_STATUS]; - tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; - - /* signal a transmit interrupt and mark the transmit buffer empty */ + // signal a transmit interrupt m_reg[EREG_INTERRUPT] |= EINT_TX; - m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; - m_reg[EREG_FIFO_PORTS] |= 0x0080; m_sent++; update_stats(); @@ -483,31 +524,63 @@ int smc91c9x_device::send_frame() logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len); } - if ( buffer_len > 4 ) + if (buffer_len > 4) { - // odd or even sized frame ? - if (tx_buffer[buffer_len-1] & 0x20) - buffer_len--; - else - buffer_len -= 2; + if (m_link_unconnected) + { + // Set lost carrier + if (m_reg[EREG_TCR] & 0x0400) + { + m_reg[EREG_EPH_STATUS] |= 0x400; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } + + // Set signal quality error + if (m_reg[EREG_TCR] & 0x1000) + { + m_reg[EREG_EPH_STATUS] |= 0x20; + // Clear Tx Enable on error + m_reg[EREG_TCR] &= ~0x1; + } - if (!(m_reg[EREG_TCR] & 0x2002)) + // signal a no transmit + m_reg[EREG_INTERRUPT] &= ~EINT_TX; + // Set a ethernet phy status interrupt + m_reg[EREG_INTERRUPT] |= EINT_EPH; + + // Flush fifos. + clear_tx_fifo(); + clear_rx_fifo(); + } + else { - // No loopback... Send the frame - if ( !send(&tx_buffer[4], buffer_len-4) ) + // odd or even sized frame ? + if (tx_buffer[buffer_len - 1] & 0x20) + buffer_len--; + else + buffer_len -= 2; + + // Send the frame + if (!send(&tx_buffer[4], buffer_len - 4)) { // FIXME: failed to send the Ethernet packet //logerror("failed to send Ethernet packet\n"); //LOG(this,("read_command_port(): !!! failed to send Ethernet packet")); } - } - else - { - // TODO loopback mode : Push the frame to the RX FIFO. + + // Loopback if loopback is set or fduplx is set + // TODO: Figure out correct size + // TODO: Check for addtional filter options for FDUPLX mode + if ((m_reg[EREG_TCR] & 0x2002) || (m_reg[EREG_TCR] & 0x0800)) + recv_cb(&tx_buffer[4], buffer_len - 2); } } + // Update status in the transmit word + tx_buffer[0] = m_reg[EREG_EPH_STATUS]; + tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8; - return 0; + update_ethernet_irq(); } /*------------------------------------------------- @@ -524,10 +597,20 @@ void smc91c9x_device::process_command(uint16_t data) case ECMD_ALLOCATE: LOG(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7)); - m_reg[EREG_PNR_ARR] &= ~0xff00; - m_reg[EREG_PNR_ARR] |= (m_alloc_count++ & 0x7F) << 8; - m_reg[EREG_INTERRUPT] |= 0x0008; - update_ethernet_irq(); + { + int packet_num; + if (alloc_req(1, packet_num)) { + // Set ARR register + m_reg[EREG_PNR_ARR] &= ~0xff00; + m_reg[EREG_PNR_ARR] |= packet_num << 8; + m_reg[EREG_INTERRUPT] |= EINT_ALLOC; + + update_ethernet_irq(); + } + else { + logerror("ECMD_ALLOCATE: Couldn't allocate TX memory\n"); + } + } break; case ECMD_RESET_MMU: @@ -539,33 +622,24 @@ void smc91c9x_device::process_command(uint16_t data) */ LOG(" RESET MMU\n"); - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); + mmu_reset(); break; case ECMD_REMOVE_TOPFRAME_TX: LOG(" REMOVE FRAME FROM TX FIFO\n"); + m_comp_tx.pop(); + // TODO: Should we clear TX_INT? break; + case ECMD_REMOVE_RELEASE_TOPFRAME_RX: + LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", m_comp_rx.front()); + // Release memory allocation + alloc_release(m_comp_rx.front()); + // Fall through case ECMD_REMOVE_TOPFRAME_RX: LOG(" REMOVE FRAME FROM RX FIFO\n"); - - case ECMD_REMOVE_RELEASE_TOPFRAME_RX: - LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (RXI=%d RXO=%d)\n", rx_fifo_in & (ETHER_RX_BUFFERS - 1), rx_fifo_out & (ETHER_RX_BUFFERS - 1)); - - m_reg[EREG_INTERRUPT] &= ~EINT_RCV; - - if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) - rx_fifo_out = ( (rx_fifo_out + 1) & ( ETHER_RX_BUFFERS - 1 ) ); - - if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) ) - { - m_reg[EREG_INTERRUPT] |= EINT_RCV; - m_reg[EREG_FIFO_PORTS] &= ~0x8000; - } - else - m_reg[EREG_FIFO_PORTS] |= 0x8000; + // remove entry from rx queue + m_comp_rx.pop(); update_ethernet_irq(); m_recd++; @@ -573,49 +647,23 @@ void smc91c9x_device::process_command(uint16_t data) break; case ECMD_RELEASE_PACKET: - LOG(" RELEASE SPECIFIC PACKET\n"); + { + const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; + alloc_release(packet_number); + LOG(" RELEASE SPECIFIC PACKET %d\n", packet_number); + } break; case ECMD_ENQUEUE_PACKET: LOG(" ENQUEUE TX PACKET\n"); - if ( m_link_unconnected ) + if (m_reg[EREG_TCR] & 0x0001) // TX EN ? { - // Set lost carrier - if ( m_reg[EREG_TCR] & 0x0400 ) - { - m_reg[EREG_EPH_STATUS] |= 0x400; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // Set signal quality error - if ( m_reg[EREG_TCR] & 0x1000 ) - { - m_reg[EREG_EPH_STATUS] |= 0x20; - // Clear Tx Enable on error - m_reg[EREG_TCR] &= ~0x1; - } - - // signal a no transmit - m_reg[EREG_INTERRUPT] &= ~EINT_TX; - // Set a ethernet phy status interrupt - m_reg[EREG_INTERRUPT] |= EINT_EPH; - - // Flush fifos. - clear_tx_fifo(); - clear_rx_fifo(); - } - else - { - if ( m_reg[EREG_TCR] & 0x0001 ) // TX EN ? - { - send_frame(); - } + const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; + // Push packet number tx completion fifo + m_comp_tx.push(packet_number); + m_tx_timer->adjust(attotime::from_usec(10)); } - - update_ethernet_irq(); - break; case ECMD_RESET_FIFOS: @@ -666,6 +714,19 @@ READ16_MEMBER( smc91c9x_device::read ) } break; + case EREG_FIFO_PORTS: + result = 0; + if (!m_comp_tx.empty()) + result |= m_comp_tx.front(); + else + result |= 0x80; + if (!m_comp_rx.empty()) + result |= m_comp_rx.front() << 8; + else + result |= 0x80 << 8; + break; + + case EREG_DATA_0: /* data register */ case EREG_DATA_1: /* data register */ { @@ -673,13 +734,9 @@ READ16_MEMBER( smc91c9x_device::read ) int addr = m_reg[EREG_POINTER] & 0x7ff; if ( m_reg[EREG_POINTER] & 0x8000 ) - { - buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; - } + buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; else - { - buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; - } + buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; result = buffer[addr++]; if ( ACCESSING_BITS_8_15 ) @@ -799,15 +856,12 @@ WRITE16_MEMBER( smc91c9x_device::write ) uint8_t *buffer; int addr = m_reg[EREG_POINTER] & 0x7ff; - if ( m_reg[EREG_POINTER] & 0x8000 ) - { - buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE]; - } + if (m_reg[EREG_POINTER] & 0x8000) + buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE]; else - { - buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];; - } + buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];; + // TODO: Should be checking if incr is set buffer[addr++] = data; if ( ACCESSING_BITS_8_15 ) buffer[addr++] = data >> 8; @@ -817,10 +871,12 @@ WRITE16_MEMBER( smc91c9x_device::write ) } case EREG_INTERRUPT: - m_reg[EREG_INTERRUPT] &= ~(data & 0x56); - // Need to clear tx int here for vegas cartfury - if ( m_reg[EREG_FIFO_PORTS] & 0x0080 ) + // Pop tx fifo packet from completion fifo if clear tx int is set + if (m_reg[EREG_INTERRUPT] & data & EINT_TX) { + m_comp_tx.pop(); m_reg[EREG_INTERRUPT] &= ~EINT_TX; + } + m_reg[EREG_INTERRUPT] &= ~(data & 0x56); update_ethernet_irq(); break; } diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h index 9ff6229d466..16bcfc85ece 100644 --- a/src/devices/machine/smc91c9x.h +++ b/src/devices/machine/smc91c9x.h @@ -11,6 +11,8 @@ #ifndef MAME_MACHINE_SMC91C9X_H #define MAME_MACHINE_SMC91C9X_H +#include + /*************************************************************************** TYPE DEFINITIONS ***************************************************************************/ @@ -22,8 +24,10 @@ public: DECLARE_READ16_MEMBER( read ); DECLARE_WRITE16_MEMBER( write ); + TIMER_CALLBACK_MEMBER(send_frame); virtual void recv_cb(uint8_t *data, int length) override; + void set_link_connected(bool connected) { m_link_unconnected = !connected; }; protected: smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -34,10 +38,22 @@ protected: private: static constexpr unsigned ETHER_BUFFER_SIZE = 2048; - static constexpr unsigned ETHER_RX_BUFFERS = 16; - static constexpr unsigned ETHER_TX_BUFFERS = 16; + // TODO: 96 device is larger + static constexpr unsigned ETHER_BUFFERS = 16; static constexpr unsigned ETHERNET_ADDR_SIZE = 6; + // mmu + // The bits in these vectors indicate a packet has been allocated + u32 m_alloc_rx, m_alloc_tx; + std::queue m_comp_tx, m_comp_rx; + // Requests a packet allocation and returns true + // and sets the packet number if successful + bool alloc_req(const int tx, int &packet_num); + // Releases an allocation + void alloc_release(const int packet_num); + // Resets the MMU + void mmu_reset(); + // internal state devcb_write_line m_irq_handler; @@ -51,22 +67,15 @@ private: /* IRQ information */ uint8_t m_irq_state; - /* allocate information */ - uint8_t m_alloc_count; - - /* transmit/receive FIFOs */ - uint32_t rx_fifo_out; - uint32_t rx_fifo_in; - uint8_t m_rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS]; - - uint32_t tx_fifo_out; - uint32_t tx_fifo_in; - uint8_t m_tx[ETHER_BUFFER_SIZE * ETHER_TX_BUFFERS]; + // Main memory + uint8_t m_buffer[ETHER_BUFFER_SIZE * ETHER_BUFFERS]; /* counters */ uint32_t m_sent; uint32_t m_recd; + emu_timer* m_tx_timer; + int ethernet_packet_is_for_me(const uint8_t mac_address[]); int is_broadcast(uint8_t mac_address[]); @@ -77,8 +86,6 @@ private: void clear_tx_fifo(); void clear_rx_fifo(); - int send_frame(); - }; -- cgit v1.2.3-70-g09d2 From dc3dbc2580aadfdb78e29b1549d872d43559d410 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Tue, 12 Dec 2017 14:25:01 -0700 Subject: Game promoted to WORKING San Francisco Rush: The Rock --- src/mame/drivers/seattle.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp index 908f13282a1..9f1dc9df308 100644 --- a/src/mame/drivers/seattle.cpp +++ b/src/mame/drivers/seattle.cpp @@ -2632,7 +2632,7 @@ GAME( 1996, mace, 0, mace, mace, seattle_state, mace, GAME( 1997, macea, mace, mace, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a)", MACHINE_SUPPORTS_SAVE ) GAMEL( 1996, sfrush, 0, sfrush, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush (boot rom L 1.0)", MACHINE_SUPPORTS_SAVE, layout_sfrush ) GAMEL( 1996, sfrusha, sfrush, sfrush, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush (boot rom L 1.06A)", MACHINE_SUPPORTS_SAVE, layout_sfrush ) -GAMEL( 1996, sfrushrk, 0, sfrushrk, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock (boot rom L 1.0, GUTS Oct 6 1997 / MAIN Oct 16 1997)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE, layout_sfrush ) +GAMEL( 1996, sfrushrk, 0, sfrushrk, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock (boot rom L 1.0, GUTS Oct 6 1997 / MAIN Oct 16 1997)", MACHINE_SUPPORTS_SAVE, layout_sfrush ) GAMEL( 1996, sfrushrkw, sfrushrk, sfrushrkw, sfrush, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock (Wavenet, boot rom L 1.38, GUTS Aug 19 1997 / MAIN Aug 19 1997)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE, layout_sfrush ) GAMEL( 1996, sfrushrkwo, sfrushrk, sfrushrkw, sfrush, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock (Wavenet, boot rom L 1.38, GUTS Aug 6 1997 / MAIN Aug 5 1997)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE, layout_sfrush ) GAMEL( 1998, calspeed, 0, calspeed, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a Apr 17 1998, GUTS 1.25 Apr 17 1998 / MAIN Apr 17 1998)", MACHINE_SUPPORTS_SAVE, layout_calspeed ) -- cgit v1.2.3-70-g09d2 From 9f9310b44dd084dbf7cbd3c307b6b12e9cc356e8 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 12 Dec 2017 22:48:25 +0100 Subject: fidel68k: smal updates (nw) --- src/mame/drivers/fidel68k.cpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 744cf6c2eed..32a89371e7c 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -45,8 +45,12 @@ PCB label 510.1134A02 ROM address/data lines are scrambled, presumed for easy placement on PCB and not for obfuscation. I/O is nearly the same as Designer Display on 6502 hardware. -Designer Mach IV Master 2325 uses a M68EC020 at 20MHz and has more RAM: -32KB(4*P5164-70) + 512KB(TC518512PL-80). The ROM is not scrambled. +Designer Mach IV Master 2325 (model 6129) +----------------------------------------- +32KB(4*P5164-70) + 512KB(TC518512PL-80) RAM, 64KB ROM(TMS 27C512-120JL) +MC68EC020RP25 CPU, 20MHz XTAL +PCB label 510.1149A01 +It has a green "Shift" led instead of red, and ROM is not scrambled. ****************************************************************************** @@ -406,11 +410,11 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( fdes2325_map, AS_PROGRAM, 32, fidel68k_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x000000, 0x00ffff) AM_ROM - AM_RANGE(0x300000, 0x37ffff) AM_RAM - AM_RANGE(0x500000, 0x507fff) AM_RAM AM_RANGE(0x100000, 0x10000f) AM_WRITE8(fdes68k_lcd_w, 0x00ff00ff) AM_RANGE(0x140000, 0x14000f) AM_WRITE8(fdes68k_control_w, 0x00ff00ff) AM_RANGE(0x180000, 0x18000f) AM_READ8(fdes68k_input_r, 0xff00ff00) + AM_RANGE(0x300000, 0x37ffff) AM_RAM + AM_RANGE(0x500000, 0x507fff) AM_RAM ADDRESS_MAP_END @@ -686,7 +690,7 @@ ROM_END ROM_START( fdes2325 ) // model 6129, PCB label 510.1149A01 ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD("61_24_white.ic10", 0x00000, 0x10000, CRC(f74157e1) SHA1(87f3f2d584e292f81593e053240d022cc477834d) ) // 27c512 + ROM_LOAD("61_29_white.ic10", 0x00000, 0x10000, CRC(f74157e1) SHA1(87f3f2d584e292f81593e053240d022cc477834d) ) // 27c512 ROM_REGION( 0x100, "pals", 0 ) ROM_LOAD("101-1097a01.ic19", 0x000, 0x100, NO_DUMP ) // PALCE16V8Q-25PC @@ -748,7 +752,7 @@ ROM_END // YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS CONS( 1987, fex68k, 0, 0, fex68k, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) CONS( 1988, fex68km2, fex68k, 0, fex68km2, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach II (rev. C+)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -CONS( 1988, fex68km3, fex68k, 0, fex68km3, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach III", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) +CONS( 1988, fex68km3, fex68k, 0, fex68km3, fex68k, fidel68k_state, 0, "Fidelity Electronics", "Excel 68000 Mach III Master", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) CONS( 1989, fdes2265, 0, 0, fdes2265, fdes68k, fidel68k_state, fdes2265, "Fidelity Electronics", "Designer Mach III Master 2265", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) CONS( 1991, fdes2325, fdes2265, 0, fdes2325, fdes68k, fidel68k_state, 0, "Fidelity Electronics", "Designer Mach IV Master 2325", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS ) -- cgit v1.2.3-70-g09d2 From d7ab1ee20a5895f60aacef7396ad5eb8e1cf2eaf Mon Sep 17 00:00:00 2001 From: Ted Green Date: Tue, 12 Dec 2017 16:18:57 -0700 Subject: smc91c9x: Switch from queue to vector for save state support. (nw) --- src/devices/machine/smc91c9x.cpp | 26 ++++++++++++++------------ src/devices/machine/smc91c9x.h | 4 +--- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index ae3a312ae2b..1ff8872b8d0 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -126,6 +126,10 @@ void smc91c9x_device::device_start() m_irq_handler.resolve_safe(); + // Set completion queues to max size to save properly + m_comp_rx.resize(ETHER_BUFFERS); + m_comp_tx.resize(ETHER_BUFFERS); + /* register ide states */ save_item(NAME(m_reg)); save_item(NAME(m_regmask)); @@ -135,9 +139,8 @@ void smc91c9x_device::device_start() save_item(NAME(m_recd)); save_item(NAME(m_alloc_rx)); save_item(NAME(m_alloc_tx)); - // TODO: Need to save these - //save_item(NAME(m_comp_rx)); - //save_item(NAME(m_comp_tx)); + save_item(NAME(m_comp_rx)); + save_item(NAME(m_comp_tx)); } //------------------------------------------------- @@ -222,11 +225,10 @@ void smc91c9x_device::mmu_reset() // Reset MMU allocations m_alloc_rx = 0; m_alloc_tx = 0; + // Reset completion FIFOs - while (!m_comp_tx.empty()) - m_comp_tx.pop(); - while (!m_comp_rx.empty()) - m_comp_rx.pop(); + m_comp_tx.clear(); + m_comp_rx.clear(); // Flush fifos. clear_tx_fifo(); @@ -426,7 +428,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) packet[3] = (dst) >> 8; // Push packet number to rx completion fifo - m_comp_rx.push(packet_num); + m_comp_rx.push_back(packet_num); } else { @@ -627,7 +629,7 @@ void smc91c9x_device::process_command(uint16_t data) case ECMD_REMOVE_TOPFRAME_TX: LOG(" REMOVE FRAME FROM TX FIFO\n"); - m_comp_tx.pop(); + m_comp_tx.erase(m_comp_tx.begin()); // TODO: Should we clear TX_INT? break; @@ -639,7 +641,7 @@ void smc91c9x_device::process_command(uint16_t data) case ECMD_REMOVE_TOPFRAME_RX: LOG(" REMOVE FRAME FROM RX FIFO\n"); // remove entry from rx queue - m_comp_rx.pop(); + m_comp_rx.erase(m_comp_rx.begin()); update_ethernet_irq(); m_recd++; @@ -661,7 +663,7 @@ void smc91c9x_device::process_command(uint16_t data) { const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; // Push packet number tx completion fifo - m_comp_tx.push(packet_number); + m_comp_tx.push_back(packet_number); m_tx_timer->adjust(attotime::from_usec(10)); } break; @@ -873,7 +875,7 @@ WRITE16_MEMBER( smc91c9x_device::write ) case EREG_INTERRUPT: // Pop tx fifo packet from completion fifo if clear tx int is set if (m_reg[EREG_INTERRUPT] & data & EINT_TX) { - m_comp_tx.pop(); + m_comp_tx.erase(m_comp_tx.begin()); m_reg[EREG_INTERRUPT] &= ~EINT_TX; } m_reg[EREG_INTERRUPT] &= ~(data & 0x56); diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h index 16bcfc85ece..9f9cf1558e0 100644 --- a/src/devices/machine/smc91c9x.h +++ b/src/devices/machine/smc91c9x.h @@ -11,8 +11,6 @@ #ifndef MAME_MACHINE_SMC91C9X_H #define MAME_MACHINE_SMC91C9X_H -#include - /*************************************************************************** TYPE DEFINITIONS ***************************************************************************/ @@ -45,7 +43,7 @@ private: // mmu // The bits in these vectors indicate a packet has been allocated u32 m_alloc_rx, m_alloc_tx; - std::queue m_comp_tx, m_comp_rx; + std::vector m_comp_tx, m_comp_rx; // Requests a packet allocation and returns true // and sets the packet number if successful bool alloc_req(const int tx, int &packet_num); -- cgit v1.2.3-70-g09d2 From 389367924655647132decff27daf6c9aab2619d7 Mon Sep 17 00:00:00 2001 From: AJR Date: Tue, 12 Dec 2017 22:29:11 -0500 Subject: sigmab52.cpp: 6809 types (nw) --- src/mame/drivers/sigmab52.cpp | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/src/mame/drivers/sigmab52.cpp b/src/mame/drivers/sigmab52.cpp index f3a3cf3c69d..521cb260376 100644 --- a/src/mame/drivers/sigmab52.cpp +++ b/src/mame/drivers/sigmab52.cpp @@ -23,7 +23,7 @@ CPU: - - 2x MC68B09CP ; 6809 CPU @ 2 MHz, from Motorola. + - 2x MC68B09P ; 6809 CPU @ 2 MHz, from Motorola. - 1x HD63484P8 @ 8MHz ; Advanced CRT controller (ACRTC), from Hitachi Semiconductor. RAM devices: @@ -110,6 +110,7 @@ TODO: + - Verify clocks. - Improve memory map. - Layout. - Bill validator. @@ -132,10 +133,6 @@ #include "sigmab52.lh" -#define MAIN_CLOCK XTAL_18MHz -#define SEC_CLOCK XTAL_8MHz -#define AUX_CLOCK XTAL_3_579545MHz - class sigmab52_state : public driver_device { public: @@ -578,16 +575,16 @@ void sigmab52_state::machine_reset() static MACHINE_CONFIG_START( jwildb52 ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK/9) /* 2 MHz */ + MCFG_CPU_ADD("maincpu", MC6809, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(jwildb52_map) - MCFG_CPU_ADD("audiocpu", M6809, MAIN_CLOCK/9) /* 2 MHz */ + MCFG_CPU_ADD("audiocpu", MC6809, XTAL_8MHz) MCFG_CPU_PROGRAM_MAP(sound_prog_map) - MCFG_DEVICE_ADD("6840ptm_1", PTM6840, MAIN_CLOCK/9) // FIXME + MCFG_DEVICE_ADD("6840ptm_1", PTM6840, XTAL_8MHz/4) // FIXME MCFG_PTM6840_IRQ_CB(INPUTLINE("maincpu", M6809_IRQ_LINE)) - MCFG_DEVICE_ADD("6840ptm_2", PTM6840, MAIN_CLOCK/18) // FIXME + MCFG_DEVICE_ADD("6840ptm_2", PTM6840, XTAL_8MHz/8) // FIXME MCFG_PTM6840_IRQ_CB(WRITELINE(sigmab52_state, ptm2_irq)) MCFG_NVRAM_ADD_NO_FILL("nvram") @@ -600,7 +597,7 @@ static MACHINE_CONFIG_START( jwildb52 ) MCFG_SCREEN_UPDATE_DEVICE("hd63484", hd63484_device, update_screen) MCFG_SCREEN_PALETTE("palette") - MCFG_HD63484_ADD("hd63484", SEC_CLOCK, jwildb52_hd63484_map) + MCFG_HD63484_ADD("hd63484", XTAL_8MHz, jwildb52_hd63484_map) MCFG_PALETTE_ADD("palette", 16) @@ -609,7 +606,7 @@ static MACHINE_CONFIG_START( jwildb52 ) MCFG_GENERIC_LATCH_8_ADD("soundlatch") - MCFG_SOUND_ADD("ymsnd", YM3812, AUX_CLOCK) + MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_3_579545MHz) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_CONFIG_END -- cgit v1.2.3-70-g09d2 From ee4edebf51e231522d9adee618b03b44c7bc891c Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Wed, 13 Dec 2017 00:33:36 -0300 Subject: New machines marked as NOT_WORKING ---------------------------------- Honkey Tonk - Cash Express (BHG1455, US) [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 29 +++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 30 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 28b55596557..0ee57291c4f 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -3910,6 +3910,34 @@ ROM_START( honeypot ) ROM_END +// BHG1455 / MV4122/3 / 5, 10, 20 Credit Multiplier / 9 Line Multiline +// HONKY TONK - CASH EXPRESS / Export / A - 07/08/01 +// Requires set chip version: 4.04.xx +// Variation (% and NO) +// No requires touch screen +// The game shares reel graphics with Boot Scootin', but background is different and doesn't seems that is a clone. +ROM_START( hnktonku ) + ARISTOCRAT_MK5_BIOS + /* + Checksum code found at 0x000d18 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0x576a26b7 + Calculated Checksum 0x576a26b7 (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "bhg1455.u7", 0x000000, 0x80000, CRC(ef25e5a1) SHA1(00d7dcb852cc2ccb61c5af15108f8c374419527f) ) + ROM_LOAD32_WORD( "bhg1455.u11", 0x000002, 0x80000, CRC(737bd8c8) SHA1(0863ed66ca28ab47945d1c6012740bc559c79b0d) ) + ROM_LOAD32_WORD( "bhg1455.u8", 0x100000, 0x80000, CRC(822f408e) SHA1(c31d046a48f28de9d8b90676851c4ea5f30cc732) ) + ROM_LOAD32_WORD( "bhg1455.u12", 0x100002, 0x80000, CRC(520f051e) SHA1(c3d5058f753e72852e37dcd94c34a4caabdff161) ) + ROM_LOAD32_WORD( "bhg1455.u9", 0x200000, 0x80000, CRC(9c928891) SHA1(7fc4f38b9c06d4d5b27d246fffee3a1fd527d6ad) ) + ROM_LOAD32_WORD( "bhg1455.u13", 0x200002, 0x80000, CRC(18dd37fe) SHA1(432a4959886fad4f4a55de31b7cc42c51d7f2792) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + + // 0100872V / 631/3 B / 25 Credit Multiplier / 20 Line Multiline // INCA SUN / NSW/ACT / B- 03/05/99 ROM_START( incasun ) @@ -7261,6 +7289,7 @@ GAMEL( 1997, goldpyra, goldpyr, aristmk5_usa, bootsctnua, aristmk5_s GAMEL( 1998, goldpyrb, goldpyr, aristmk5, goldpyrb, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (0100878V, Victoria)", MACHINE_FLAGS, layout_goldpyrb ) // 602/5, C - 19/06/98 GAMEL( 2000, goldenra, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Ra (0101164V, NSW/ACT)", MACHINE_FLAGS, layout_goldenra ) // 661, A - 10/04/00, Rev 15 GAMEL( 2000, honeypot, aristmk5, aristmk5, goldenra, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Honey Pot (03J00241, NSW/ACT)", MACHINE_FLAGS, layout_yukongl5 ) // JB008, A - 21/11/2000, Rev 17 +GAMEL( 2001, hnktonku, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Honkey Tonk - Cash Express (BHG1455, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4122/3, A - 07/08/01 GAMEL( 1999, incasun, aristmk5, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 1999, incasunsp, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT, Show Program)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 2000, incasunnz, incasun, aristmk5, incasunnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0101108V, New Zealand)", MACHINE_FLAGS, layout_incasunnz ) // MV4113, A - 6/3/00, Rev 25 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 2b672fbacb9..e78815e192e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1504,6 +1504,7 @@ goldpyra // (c) 1997 goldpyrb // (c) 1998 goldenra // (c) 2000 honeypot // (c) 2000 +hnktonku // (c) 2001 incasun // (c) 1999 incasunsp // (c) 1999 incasunnz // (c) 2000 -- cgit v1.2.3-70-g09d2 From 57dae7a28e45333013c1d611be865d57321b605c Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Wed, 13 Dec 2017 02:14:07 -0300 Subject: New clones marked as NOT_WORKING -------------------------------- Inca Sun (01J01946, Venezuela) [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 22 ++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 23 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 0ee57291c4f..e485d530040 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -4008,6 +4008,27 @@ ROM_START( incasunnz ) ROM_END +// 01J01946 / 631/3 B / 25 Credit Multiplier / 20 Line Multiline +// INCA SUN / VENEZUELA / B - 03/05/99 +ROM_START( incasunv ) + ARISTOCRAT_MK5_BIOS + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + /* + Checksum code at 0x000c10 ?? + */ + ROM_LOAD32_WORD( "01j01946.u7", 0x000000, 0x80000, CRC(c6bdbc96) SHA1(ee83b6b4aaa9538ca04f136a4523fd520a24a878) ) + ROM_LOAD32_WORD( "01j01946.u11", 0x000002, 0x80000, CRC(15be6a5d) SHA1(000218c13e1e3fccdc0565e496a1fd13cb32f6b1) ) + ROM_LOAD32_WORD( "01j01946.u8", 0x100000, 0x80000, CRC(e26bd9c7) SHA1(e5facaa85c4c72d070b1d5000b80a333122c4fbc) ) + ROM_LOAD32_WORD( "01j01946.u12", 0x100002, 0x80000, CRC(a9941a3b) SHA1(14868686aa0aa3d966ffbaef2593a11a57a43b05) ) + ROM_LOAD32_WORD( "01j01946.u9", 0x200000, 0x80000, CRC(90e5a52b) SHA1(b2c334126128f9569846655d78f1641a36aec739) ) + ROM_LOAD32_WORD( "01j01946.u13", 0x200002, 0x80000, CRC(0efdd830) SHA1(de0be1cd3f691299f48d7a184df6bb59fef22de2) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + + // CHG1458 / MV4130/3 / 20 Line Multiline / 5, 10, 25, 50 Credit Multiplier // Inca Sun / Export / A - 05/09/00 // Requires set chips 4.03.xx @@ -7293,6 +7314,7 @@ GAMEL( 2001, hnktonku, aristmk5, aristmk5_usa, aristmk5_usa, aristmk5_s GAMEL( 1999, incasun, aristmk5, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 1999, incasunsp, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0100872V, NSW/ACT, Show Program)", MACHINE_FLAGS, layout_incasun ) // 631/3 B, B - 03/05/99, Rev 15 GAMEL( 2000, incasunnz, incasun, aristmk5, incasunnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (0101108V, New Zealand)", MACHINE_FLAGS, layout_incasunnz ) // MV4113, A - 6/3/00, Rev 25 +GAMEL( 1999, incasunv, incasun, aristmk5, incasun, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (01J01946, Venezuela)", MACHINE_FLAGS, layout_incasun ) // 631/3, B - 03/05/99 GAMEL( 2000, incasunu, incasun, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (CHG1458, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130/3, A - 05/09/00 GAMEL( 2000, incasunua, incasun, aristmk5_usa, bootsctnua, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Inca Sun (DHG1577, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4130, A - 05/09/00 GAMEL( 1998, indrema5, aristmk5, aristmk5, indrema5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, NSW/ACT)", MACHINE_FLAGS, layout_indrema5 ) // 628/1, B - 15/12/98, Rev 7 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e78815e192e..c0813c0b6a7 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1508,6 +1508,7 @@ hnktonku // (c) 2001 incasun // (c) 1999 incasunsp // (c) 1999 incasunnz // (c) 2000 +incasunv // (c) 1999 incasunu // (c) 2000 incasunua // (c) 2000 indrema5 // (c) 1998 -- cgit v1.2.3-70-g09d2 From 00e5b6b11779ea07ff61cce110395c015c159253 Mon Sep 17 00:00:00 2001 From: RobertoFresca Date: Wed, 13 Dec 2017 03:01:22 -0300 Subject: New machines marked as NOT_WORKING ---------------------------------- Keep Your Hat On (BHG1204, US) [Roberto Fresca] --- src/mame/drivers/aristmk5.cpp | 30 ++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 31 insertions(+) diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index e485d530040..f1bcc30570a 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -4313,6 +4313,35 @@ ROM_START( kookabuk ) ROM_END +// BHG1204 / MV4114/1 / 3,5,10,20,25,50 Credit Multiplier / 20 Line Multiline +// KEEP YOUR HAT ON / Export / B - 08/05/2000 +// Requires set chip version: 4.01.xx +// Variation (% and NO) +// Requires touch screen +ROM_START( kyhatonu ) + ARISTOCRAT_MK5_BIOS + /* + Checksum code found at 0x000d18 + Checksum is stored at 0x000020-0x000027 + Expected Checksum 0x57cc5e5a + Calculated Checksum 0x57cc5e5a (OK) + */ + ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) + ROM_LOAD32_WORD( "bhg1204.u7", 0x000000, 0x80000, CRC(bc365ca9) SHA1(f5bb4fc0b2eaed1274b21bc4762b6914ce621d8a) ) + ROM_LOAD32_WORD( "bhg1204.u11", 0x000002, 0x80000, CRC(14376c1e) SHA1(616549215f35c4f5a8c4243f84290dd8b3fae5df) ) + ROM_LOAD32_WORD( "bhg1204.u8", 0x100000, 0x80000, CRC(29081b50) SHA1(0c3990b11c9e249829babc0631840e982a387709) ) + ROM_LOAD32_WORD( "bhg1204.u12", 0x100002, 0x80000, CRC(aba9029c) SHA1(2fe65670cf1ec7a5caab770ad9af6ad3af070e53) ) + ROM_LOAD32_WORD( "bhg1204.u9", 0x200000, 0x80000, CRC(45a025db) SHA1(ea1f64a6c0272bb84ebdb0975f2d8198b8b5550a) ) + ROM_LOAD32_WORD( "bhg1204.u13", 0x200002, 0x80000, CRC(fd4b24c4) SHA1(97db7899c61050c7580af67177c7fe2c8b6116aa) ) + ROM_LOAD32_WORD( "bhg1204.u10", 0x300000, 0x80000, CRC(164ac0dd) SHA1(f6168ab76455ad29df6a4a43eea65d8c644d295a) ) + ROM_LOAD32_WORD( "bhg1204.u14", 0x300002, 0x80000, CRC(490a9eb5) SHA1(30df13960614f82deac5426ff754885ffb429603) ) + + ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ + ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) +ROM_END + + // 0100473V / 599/3 / 25 Credit Multiplier / 20 Line Multiline // Loco Loot / Local / C - 17/06/97 ROM_START( locoloot ) @@ -7325,6 +7354,7 @@ GAMEL( 1995, kgalaha, kgalah, aristmk5, kgalah, aristmk5_s GAMEL( 1994, kgbirda5, aristmk5, aristmk5, kgbirda5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "K.G. Bird (0200024V, NSW/ACT)", MACHINE_FLAGS, layout_kgbirda5 ) // 540/3, D - 10/10/94 GAMEL( 2001, koalamnt, aristmk5, aristmk5_usa, dolphntrce, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Koala Mint (CHG1573, US)", MACHINE_FLAGS, layout_dolphntrce ) // MV4137, A - 12/09/01 GAMEL( 1998, kookabuk, aristmk5, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Kooka Bucks (0100677V, NSW/ACT)", MACHINE_FLAGS, layout_aristmk5 ) // 661, A - 03/04/98, Rev 5 +GAMEL( 2000, kyhatonu, aristmk5, aristmk5_usa_touch, aristmk5_usa, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Keep Your Hat On (BHG1204, US)", MACHINE_FLAGS, layout_aristmk5_us ) // MV4114/1, B - 08/05/2000 GAMEL( 1997, locoloot, aristmk5, aristmk5, cashcham, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100473V, NSW/ACT)", MACHINE_FLAGS, layout_cashcham ) // 599/3, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1997, locoloota, locoloot, aristmk5, locoloota, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0100472V, NSW/ACT)", MACHINE_FLAGS, layout_locoloota ) // 599/2, C - 17/06/97, Rev 1.26.13.0 GAMEL( 1998, locolootnz, locoloot, aristmk5, cashchamnz, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Loco Loot (0600725V, New Zealand)", MACHINE_FLAGS, layout_cashchamnz ) // MV4064, A - 8/7/98, Rev 24 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index c0813c0b6a7..c9e5dcfa4f2 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1520,6 +1520,7 @@ kgalaha // (c) 1995 kgbirda5 // (c) 1994 koalamnt // (c) 2001 kookabuk // (c) 1998 +kyhatonu // (c) 2000 locoloot // (c) 1997 locoloota // (c) 1997 locolootnz // (c) 1998 -- cgit v1.2.3-70-g09d2 From 353ea7ea7154368da0b53c5a25b11f25de71a17e Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 13 Dec 2017 07:20:05 +0100 Subject: play_2.cpp: updated cop402 ROM for zira [PinMAME] --- src/mame/drivers/play_2.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/play_2.cpp b/src/mame/drivers/play_2.cpp index e89ca5063db..a63f90002aa 100644 --- a/src/mame/drivers/play_2.cpp +++ b/src/mame/drivers/play_2.cpp @@ -474,8 +474,8 @@ ROM_START(zira) ROM_LOAD("zira_u8.bin", 0x0000, 0x0800, CRC(53f8bf17) SHA1(5eb74f27bc65374a85dd44bbc8f6142488c226a2)) ROM_LOAD("zira_u9.bin", 0x0800, 0x0800, CRC(d50a2419) SHA1(81b157f579a433389506817b1b6e02afaa2cf0d5)) - ROM_REGION(0x800, "cop402", 0) // according to the schematic this is a 2716 with a size of 0x800 - ROM_LOAD("zira.snd", 0x0000, 0x0400, CRC(c8a54854) SHA1(6c0367dcb2a11f0478c44b4e2115c1cb1e8052f3)) + ROM_REGION(0x800, "cop402", 0) // according to the schematic this is a 2716 with a size of 0x800; according to PinMAME it contains the same code twice + ROM_LOAD("zira.snd", 0x0000, 0x0800, CRC(008cb743) SHA1(8e9677f08189638d669b265bb6943275a08ec8b4)) ROM_END /*------------------------------------------------------------------- -- cgit v1.2.3-70-g09d2 From b0a9c20788a081d1253034ec0dbf277123144f92 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 13 Dec 2017 17:20:49 +1100 Subject: Revert "Add BITSWAP4 and BITSWAP12 for future use (nw)" This reverts commit 60847519361ca7dbd2b10ee584cb07d5732bc51f. This is pointless pollution of the global namespace when you can call bitswap<4>(...) or bitswap<12>(...) directly. The existing BITSWAP8, BITSWAP16, etc. were just kept for compatibility with code written before we had variadic templates available. --- src/emu/emucore.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/emu/emucore.h b/src/emu/emucore.h index 212bf31c849..1782ac8726d 100644 --- a/src/emu/emucore.h +++ b/src/emu/emucore.h @@ -263,9 +263,7 @@ template T bitswap(T val, U... b) } // explicit versions that check number of bit position arguments -template constexpr T BITSWAP4(T val, U... b) { return bitswap<4U>(val, b...); } template constexpr T BITSWAP8(T val, U... b) { return bitswap<8U>(val, b...); } -template constexpr T BITSWAP12(T val, U... b) { return bitswap<12U>(val, b...); } template constexpr T BITSWAP16(T val, U... b) { return bitswap<16U>(val, b...); } template constexpr T BITSWAP24(T val, U... b) { return bitswap<24U>(val, b...); } template constexpr T BITSWAP32(T val, U... b) { return bitswap<32U>(val, b...); } -- cgit v1.2.3-70-g09d2 From bb524ec858e142a497767fd3f1605f43bea7cca9 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 13 Dec 2017 17:24:57 +1100 Subject: protect trampoline constructors (nw) --- src/devices/cpu/arm7/arm7.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h index a0711fed9ec..23df9469073 100644 --- a/src/devices/cpu/arm7/arm7.h +++ b/src/devices/cpu/arm7/arm7.h @@ -614,7 +614,6 @@ class arm946es_cpu_device : public arm9_cpu_device public: // construction/destruction arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); // 946E-S has Protection Unit instead of ARM MMU so CP15 is quite different virtual DECLARE_READ32_MEMBER( arm7_rt_r_callback ) override; @@ -627,6 +626,9 @@ public: virtual uint32_t arm7_cpu_read16(uint32_t addr) override; virtual uint8_t arm7_cpu_read8(uint32_t addr) override; +protected: + arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + private: uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size; uint32_t cp15_itcm_end, cp15_dtcm_end, cp15_itcm_reg, cp15_dtcm_reg; -- cgit v1.2.3-70-g09d2 From 9bf81912d3e6c7a59b83ebbbdab72189d1c3cc75 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 13 Dec 2017 17:32:17 +1100 Subject: get rid of legacy BITSWAP* (nw) --- src/devices/bus/c64/silverrock.cpp | 4 +- src/devices/bus/c64/stardos.cpp | 2 +- src/devices/bus/c64/vizastar.cpp | 4 +- src/devices/bus/c64/vw64.cpp | 4 +- src/devices/bus/c64/warp_speed.cpp | 4 +- src/devices/bus/cbmiec/c1541.cpp | 2 +- src/devices/bus/chanf/rom.cpp | 2 +- src/devices/bus/gameboy/mbc.cpp | 16 +-- src/devices/bus/msx_cart/dooly.cpp | 2 +- src/devices/bus/neogeo/boot_kof10th.cpp | 2 +- src/devices/bus/neogeo/prot_cmc.cpp | 6 +- src/devices/bus/neogeo/prot_cthd.cpp | 4 +- src/devices/bus/neogeo/prot_kof2k3bl.cpp | 4 +- src/devices/bus/neogeo/prot_misc.cpp | 28 ++--- src/devices/bus/neogeo/prot_pcm2.cpp | 2 +- src/devices/bus/neogeo/prot_pvc.cpp | 30 +++--- src/devices/bus/neogeo/prot_sma.cpp | 30 +++--- src/devices/bus/neogeo/sbp.cpp | 2 +- src/devices/bus/nes/jy.cpp | 2 +- src/devices/bus/nes/mmc3_clones.cpp | 2 +- src/devices/bus/nes/waixing.cpp | 4 +- src/devices/bus/nubus/nubus_spec8.cpp | 2 +- src/devices/bus/nubus/pds30_procolor816.cpp | 2 +- src/devices/bus/s100/wunderbus.cpp | 2 +- src/devices/bus/saturn/sat_slot.cpp | 2 +- src/devices/bus/sega8/rom.cpp | 2 +- src/devices/bus/snes/rom.cpp | 6 +- src/devices/bus/snes_ctrl/pachinko.cpp | 2 +- src/devices/bus/vcs/dpc.cpp | 4 +- src/devices/cpu/hmcs40/hmcs40.cpp | 2 +- src/devices/cpu/hmcs40/hmcs40d.cpp | 2 +- src/devices/cpu/hmcs40/hmcs40op.cpp | 4 +- src/devices/cpu/tms1000/tms0970.cpp | 2 +- src/devices/cpu/tms1000/tms0980.cpp | 4 +- src/devices/cpu/tms1000/tms1k_base.cpp | 2 +- src/devices/cpu/tms1000/tp0320.cpp | 2 +- src/devices/cpu/upd7725/upd7725.cpp | 4 +- src/devices/machine/eepromser.cpp | 12 +-- src/devices/machine/ldpr8210.cpp | 2 +- src/devices/machine/roc10937.cpp | 2 +- src/devices/machine/sdlc.cpp | 2 +- src/devices/machine/stvcd.cpp | 2 +- src/devices/machine/tms6100.cpp | 2 +- src/devices/machine/z80sio.cpp | 2 +- src/devices/sound/astrocde.cpp | 2 +- src/devices/sound/tms5110.cpp | 2 +- src/devices/video/ef9340_1.cpp | 2 +- src/emu/emucore.h | 11 +- src/mame/audio/seibu.cpp | 14 +-- src/mame/drivers/24cdjuke.cpp | 2 +- src/mame/drivers/39in1.cpp | 4 +- src/mame/drivers/4enraya.cpp | 2 +- src/mame/drivers/8080bw.cpp | 4 +- src/mame/drivers/acesp.cpp | 14 +-- src/mame/drivers/aerofgt.cpp | 2 +- src/mame/drivers/airraid.cpp | 4 +- src/mame/drivers/alesis.cpp | 2 +- src/mame/drivers/altos5.cpp | 4 +- src/mame/drivers/amaticmg.cpp | 2 +- src/mame/drivers/ampoker2.cpp | 2 +- src/mame/drivers/apc.cpp | 4 +- src/mame/drivers/apple2e.cpp | 2 +- src/mame/drivers/aquarium.cpp | 4 +- src/mame/drivers/arkanoid.cpp | 4 +- src/mame/drivers/arsystems.cpp | 2 +- src/mame/drivers/astrof.cpp | 2 +- src/mame/drivers/atarisy2.cpp | 2 +- src/mame/drivers/atvtrack.cpp | 6 +- src/mame/drivers/backfire.cpp | 2 +- src/mame/drivers/berzerk.cpp | 2 +- src/mame/drivers/beta.cpp | 2 +- src/mame/drivers/bfm_sc4.cpp | 2 +- src/mame/drivers/bigbord2.cpp | 2 +- src/mame/drivers/bking.cpp | 2 +- src/mame/drivers/blktiger.cpp | 2 +- src/mame/drivers/bloodbro.cpp | 2 +- src/mame/drivers/bob85.cpp | 2 +- src/mame/drivers/boogwing.cpp | 4 +- src/mame/drivers/bublbobl.cpp | 4 +- src/mame/drivers/by35.cpp | 2 +- src/mame/drivers/cabal.cpp | 4 +- src/mame/drivers/camplynx.cpp | 4 +- src/mame/drivers/cave.cpp | 6 +- src/mame/drivers/cd2650.cpp | 2 +- src/mame/drivers/centiped.cpp | 2 +- src/mame/drivers/chessmst.cpp | 2 +- src/mame/drivers/chesstrv.cpp | 2 +- src/mame/drivers/chsuper.cpp | 6 +- src/mame/drivers/cninja.cpp | 16 +-- src/mame/drivers/cntsteer.cpp | 2 +- src/mame/drivers/coinmstr.cpp | 4 +- src/mame/drivers/coolpool.cpp | 4 +- src/mame/drivers/cops.cpp | 6 +- src/mame/drivers/cvs.cpp | 4 +- src/mame/drivers/cybertnk.cpp | 2 +- src/mame/drivers/dambustr.cpp | 8 +- src/mame/drivers/darkmist.cpp | 22 ++-- src/mame/drivers/datum.cpp | 4 +- src/mame/drivers/dblewing.cpp | 4 +- src/mame/drivers/ddragon.cpp | 12 +-- src/mame/drivers/de_2.cpp | 14 +-- src/mame/drivers/de_3.cpp | 10 +- src/mame/drivers/deco156.cpp | 2 +- src/mame/drivers/deco32.cpp | 6 +- src/mame/drivers/deco_mlc.cpp | 6 +- src/mame/drivers/decocass.cpp | 2 +- src/mame/drivers/didact.cpp | 2 +- src/mame/drivers/dietgo.cpp | 4 +- src/mame/drivers/digel804.cpp | 2 +- src/mame/drivers/divebomb.cpp | 2 +- src/mame/drivers/dkong.cpp | 6 +- src/mame/drivers/dreambal.cpp | 4 +- src/mame/drivers/dynax.cpp | 16 +-- src/mame/drivers/eacc.cpp | 2 +- src/mame/drivers/ecoinf3.cpp | 2 +- src/mame/drivers/ecoinfr.cpp | 4 +- src/mame/drivers/elwro800.cpp | 2 +- src/mame/drivers/enigma2.cpp | 4 +- src/mame/drivers/epos.cpp | 8 +- src/mame/drivers/et3400.cpp | 2 +- src/mame/drivers/ettrivia.cpp | 2 +- src/mame/drivers/eva.cpp | 2 +- src/mame/drivers/excali64.cpp | 2 +- src/mame/drivers/expro02.cpp | 4 +- src/mame/drivers/fgoal.cpp | 4 +- src/mame/drivers/fidel6502.cpp | 10 +- src/mame/drivers/fidel68k.cpp | 8 +- src/mame/drivers/fidelz80.cpp | 8 +- src/mame/drivers/forte2.cpp | 4 +- src/mame/drivers/fp1100.cpp | 2 +- src/mame/drivers/fp200.cpp | 2 +- src/mame/drivers/funkyjet.cpp | 4 +- src/mame/drivers/funworld.cpp | 30 +++--- src/mame/drivers/gaiden.cpp | 8 +- src/mame/drivers/galaga.cpp | 4 +- src/mame/drivers/galaxian.cpp | 20 ++-- src/mame/drivers/gladiatr.cpp | 4 +- src/mame/drivers/goldnpkr.cpp | 2 +- src/mame/drivers/goldstar.cpp | 162 ++++++++++++++-------------- src/mame/drivers/gts3.cpp | 2 +- src/mame/drivers/gts3a.cpp | 2 +- src/mame/drivers/gts80.cpp | 2 +- src/mame/drivers/gts80a.cpp | 2 +- src/mame/drivers/gts80b.cpp | 2 +- src/mame/drivers/h8.cpp | 2 +- src/mame/drivers/halleys.cpp | 4 +- src/mame/drivers/hankin.cpp | 2 +- src/mame/drivers/hh_amis2k.cpp | 2 +- src/mame/drivers/hh_cop400.cpp | 2 +- src/mame/drivers/hh_hmcs40.cpp | 102 +++++++++--------- src/mame/drivers/hh_melps4.cpp | 8 +- src/mame/drivers/hh_pic16.cpp | 2 +- src/mame/drivers/hh_tms1k.cpp | 22 ++-- src/mame/drivers/hh_ucom4.cpp | 50 ++++----- src/mame/drivers/hnayayoi.cpp | 2 +- src/mame/drivers/hprot1.cpp | 2 +- src/mame/drivers/hshavoc.cpp | 10 +- src/mame/drivers/igs011.cpp | 12 +-- src/mame/drivers/igs017.cpp | 42 ++++---- src/mame/drivers/igs_m027.cpp | 2 +- src/mame/drivers/igspoker.cpp | 2 +- src/mame/drivers/inder.cpp | 2 +- src/mame/drivers/jack.cpp | 8 +- src/mame/drivers/jclub2.cpp | 2 +- src/mame/drivers/jongkyo.cpp | 2 +- src/mame/drivers/jp.cpp | 2 +- src/mame/drivers/k28.cpp | 2 +- src/mame/drivers/kaneko16.cpp | 8 +- src/mame/drivers/kas89.cpp | 4 +- src/mame/drivers/kingdrby.cpp | 2 +- src/mame/drivers/kurukuru.cpp | 2 +- src/mame/drivers/lasso.cpp | 2 +- src/mame/drivers/lbeach.cpp | 2 +- src/mame/drivers/lc80.cpp | 2 +- src/mame/drivers/legionna.cpp | 2 +- src/mame/drivers/lemmings.cpp | 4 +- src/mame/drivers/looping.cpp | 2 +- src/mame/drivers/ltcasino.cpp | 2 +- src/mame/drivers/ltd.cpp | 2 +- src/mame/drivers/m90.cpp | 8 +- src/mame/drivers/madalien.cpp | 4 +- src/mame/drivers/mcr3.cpp | 2 +- src/mame/drivers/meadows.cpp | 2 +- src/mame/drivers/megadrvb.cpp | 12 +-- src/mame/drivers/megasys1.cpp | 8 +- src/mame/drivers/mephisto_montec.cpp | 4 +- src/mame/drivers/merit.cpp | 6 +- src/mame/drivers/metlfrzr.cpp | 4 +- src/mame/drivers/metro.cpp | 6 +- src/mame/drivers/minicom.cpp | 2 +- src/mame/drivers/mirax.cpp | 6 +- src/mame/drivers/missb2.cpp | 4 +- src/mame/drivers/missile.cpp | 4 +- src/mame/drivers/mk1.cpp | 8 +- src/mame/drivers/mkit09.cpp | 2 +- src/mame/drivers/monzagp.cpp | 6 +- src/mame/drivers/mpf1.cpp | 2 +- src/mame/drivers/multfish.cpp | 14 +-- src/mame/drivers/multi16.cpp | 2 +- src/mame/drivers/multigam.cpp | 8 +- src/mame/drivers/mustache.cpp | 10 +- src/mame/drivers/mw8080bw.cpp | 2 +- src/mame/drivers/namcona1.cpp | 2 +- src/mame/drivers/namcos10.cpp | 2 +- src/mame/drivers/nbmj8688.cpp | 6 +- src/mame/drivers/nbmj8891.cpp | 16 +-- src/mame/drivers/nbmj8900.cpp | 4 +- src/mame/drivers/neopcb.cpp | 14 +-- src/mame/drivers/newbrain.cpp | 2 +- src/mame/drivers/niyanpai.cpp | 4 +- src/mame/drivers/nmk16.cpp | 2 +- src/mame/drivers/notetaker.cpp | 20 ++-- src/mame/drivers/novag6502.cpp | 2 +- src/mame/drivers/nsm.cpp | 2 +- src/mame/drivers/nss.cpp | 2 +- src/mame/drivers/nycaptor.cpp | 4 +- src/mame/drivers/ojankohs.cpp | 4 +- src/mame/drivers/omegrace.cpp | 2 +- src/mame/drivers/pacman.cpp | 24 ++--- src/mame/drivers/panicr.cpp | 12 +-- src/mame/drivers/pbaction.cpp | 2 +- src/mame/drivers/pc88va.cpp | 4 +- src/mame/drivers/pc9801.cpp | 12 +-- src/mame/drivers/pegasus.cpp | 4 +- src/mame/drivers/pengadvb.cpp | 4 +- src/mame/drivers/pet.cpp | 12 +-- src/mame/drivers/pgm2.cpp | 8 +- src/mame/drivers/piggypas.cpp | 2 +- src/mame/drivers/pingpong.cpp | 6 +- src/mame/drivers/pirates.cpp | 32 +++--- src/mame/drivers/playch10.cpp | 4 +- src/mame/drivers/pntnpuzl.cpp | 4 +- src/mame/drivers/poly880.cpp | 2 +- src/mame/drivers/popeye.cpp | 4 +- src/mame/drivers/popobear.cpp | 2 +- src/mame/drivers/puckpkmn.cpp | 2 +- src/mame/drivers/pve500.cpp | 2 +- src/mame/drivers/qix.cpp | 10 +- src/mame/drivers/r2dx_v33.cpp | 2 +- src/mame/drivers/raiden.cpp | 4 +- src/mame/drivers/rainbow.cpp | 8 +- src/mame/drivers/risc2500.cpp | 4 +- src/mame/drivers/rohga.cpp | 8 +- src/mame/drivers/royalmah.cpp | 6 +- src/mame/drivers/s11.cpp | 8 +- src/mame/drivers/s11b.cpp | 16 +-- src/mame/drivers/sc1.cpp | 2 +- src/mame/drivers/sc2.cpp | 2 +- src/mame/drivers/scregg.cpp | 2 +- src/mame/drivers/sdk85.cpp | 2 +- src/mame/drivers/segag80r.cpp | 4 +- src/mame/drivers/segaorun.cpp | 10 +- src/mame/drivers/segas16b.cpp | 44 ++++---- src/mame/drivers/segaufo.cpp | 2 +- src/mame/drivers/seicross.cpp | 2 +- src/mame/drivers/selz80.cpp | 2 +- src/mame/drivers/sfbonus.cpp | 16 +-- src/mame/drivers/sfkick.cpp | 2 +- src/mame/drivers/simpl156.cpp | 2 +- src/mame/drivers/skimaxx.cpp | 2 +- src/mame/drivers/skyarmy.cpp | 4 +- src/mame/drivers/snesb.cpp | 52 ++++----- src/mame/drivers/snookr10.cpp | 6 +- src/mame/drivers/snowbros.cpp | 10 +- src/mame/drivers/sothello.cpp | 2 +- src/mame/drivers/speedbal.cpp | 4 +- src/mame/drivers/sshangha.cpp | 8 +- src/mame/drivers/statriv2.cpp | 2 +- src/mame/drivers/stv.cpp | 12 +-- src/mame/drivers/suna8.cpp | 34 +++--- src/mame/drivers/superqix.cpp | 8 +- src/mame/drivers/supertnk.cpp | 2 +- src/mame/drivers/supracan.cpp | 2 +- src/mame/drivers/system16.cpp | 2 +- src/mame/drivers/taito_l.cpp | 2 +- src/mame/drivers/tcl.cpp | 2 +- src/mame/drivers/tec1.cpp | 2 +- src/mame/drivers/techno.cpp | 4 +- src/mame/drivers/ticalc1x.cpp | 12 +-- src/mame/drivers/tispeak.cpp | 8 +- src/mame/drivers/tispellb.cpp | 4 +- src/mame/drivers/tmnt.cpp | 6 +- src/mame/drivers/toaplan2.cpp | 8 +- src/mame/drivers/toki.cpp | 6 +- src/mame/drivers/trackfld.cpp | 6 +- src/mame/drivers/travrusa.cpp | 6 +- src/mame/drivers/tsispch.cpp | 8 +- src/mame/drivers/twins.cpp | 6 +- src/mame/drivers/vaportra.cpp | 2 +- src/mame/drivers/vboy.cpp | 2 +- src/mame/drivers/vcs80.cpp | 2 +- src/mame/drivers/vega.cpp | 6 +- src/mame/drivers/vt240.cpp | 8 +- src/mame/drivers/wallc.cpp | 6 +- src/mame/drivers/wecleman.cpp | 4 +- src/mame/drivers/wico.cpp | 2 +- src/mame/drivers/williams.cpp | 2 +- src/mame/drivers/wink.cpp | 10 +- src/mame/drivers/wiz.cpp | 2 +- src/mame/drivers/wpc_an.cpp | 4 +- src/mame/drivers/z100.cpp | 4 +- src/mame/drivers/zapcomputer.cpp | 2 +- src/mame/etc/fd1094dp.cpp | 34 +++--- src/mame/machine/315-5881_crypt.cpp | 6 +- src/mame/machine/awboard.cpp | 4 +- src/mame/machine/bfm_bd1.cpp | 2 +- src/mame/machine/bfm_bda.cpp | 2 +- src/mame/machine/cps2crypt.cpp | 4 +- src/mame/machine/deco102.cpp | 2 +- src/mame/machine/deco146.cpp | 4 +- src/mame/machine/deco156.cpp | 8 +- src/mame/machine/deco222.cpp | 8 +- src/mame/machine/decocpu6.cpp | 4 +- src/mame/machine/decocpu7.cpp | 4 +- src/mame/machine/decocrpt.cpp | 2 +- src/mame/machine/epos.cpp | 2 +- src/mame/machine/fd1089.cpp | 28 ++--- src/mame/machine/fd1094.cpp | 32 +++--- src/mame/machine/gaelcrpt.cpp | 10 +- src/mame/machine/gb.cpp | 4 +- src/mame/machine/igs025.cpp | 4 +- src/mame/machine/igs036crypt.cpp | 2 +- src/mame/machine/jalcrpt.cpp | 20 ++-- src/mame/machine/jumpshot.cpp | 2 +- src/mame/machine/kaneko_calc3.cpp | 16 +-- src/mame/machine/m24_z8000.cpp | 8 +- src/mame/machine/mbee.cpp | 8 +- src/mame/machine/mc8123.cpp | 78 +++++++------- src/mame/machine/megacd.cpp | 8 +- src/mame/machine/mexico86.cpp | 4 +- src/mame/machine/mpu4.cpp | 14 +-- src/mame/machine/pacplus.cpp | 2 +- src/mame/machine/pgmprot_igs027a_type1.cpp | 12 +-- src/mame/machine/pgmprot_igs027a_type3.cpp | 2 +- src/mame/machine/pgmprot_orlegend.cpp | 2 +- src/mame/machine/r2crypt.cpp | 4 +- src/mame/machine/scramble.cpp | 30 +++--- src/mame/machine/segacrp2_device.cpp | 4 +- src/mame/machine/segas32.cpp | 2 +- src/mame/machine/seibuspi.cpp | 4 +- src/mame/machine/subsino.cpp | 64 +++++------ src/mame/machine/trs80m2kb.cpp | 2 +- src/mame/machine/xevious.cpp | 2 +- src/mame/video/agat7.cpp | 4 +- src/mame/video/alesis.cpp | 10 +- src/mame/video/apple2.cpp | 4 +- src/mame/video/aussiebyte.cpp | 2 +- src/mame/video/champbas.cpp | 2 +- src/mame/video/cvs.cpp | 2 +- src/mame/video/decocass.cpp | 2 +- src/mame/video/dynax.cpp | 26 ++--- src/mame/video/gsword.cpp | 2 +- src/mame/video/hanaawas.cpp | 2 +- src/mame/video/igs017_igs031.cpp | 4 +- src/mame/video/irobot.cpp | 2 +- src/mame/video/kan_pand.cpp | 4 +- src/mame/video/kingobox.cpp | 2 +- src/mame/video/ladybug.cpp | 4 +- src/mame/video/mbee.cpp | 2 +- src/mame/video/mz700.cpp | 2 +- src/mame/video/naughtyb.cpp | 2 +- src/mame/video/nmk16.cpp | 4 +- src/mame/video/pc9801.cpp | 4 +- src/mame/video/pingpong.cpp | 2 +- src/mame/video/redclash.cpp | 4 +- src/mame/video/retofinv.cpp | 4 +- src/mame/video/segaic16.cpp | 2 +- src/mame/video/seibu_crtc.cpp | 4 +- src/mame/video/seibuspi.cpp | 2 +- src/mame/video/snookr10.cpp | 8 +- src/mame/video/splash.cpp | 39 ++++--- src/mame/video/thepit.cpp | 4 +- src/mame/video/tia.cpp | 8 +- src/mame/video/tx1.cpp | 2 +- src/mame/video/xevious.cpp | 2 +- 375 files changed, 1295 insertions(+), 1305 deletions(-) diff --git a/src/devices/bus/c64/silverrock.cpp b/src/devices/bus/c64/silverrock.cpp index 2260b82738a..a34f21d17a7 100644 --- a/src/devices/bus/c64/silverrock.cpp +++ b/src/devices/bus/c64/silverrock.cpp @@ -37,10 +37,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4) + bitswap<16>(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,5,4,0,1,2,3) + bitswap<8>(_data,7,6,5,4,0,1,2,3) diff --git a/src/devices/bus/c64/stardos.cpp b/src/devices/bus/c64/stardos.cpp index ce3d19f0b9b..c8e47d300e8 100644 --- a/src/devices/bus/c64/stardos.cpp +++ b/src/devices/bus/c64/stardos.cpp @@ -142,7 +142,7 @@ uint8_t c64_stardos_cartridge_device::c64_cd_r(address_space &space, offs_t offs { if (!roml || !romh) { - // TODO BITSWAP8(7,6,5,4,3,1,2,0) ? + // TODO bitswap<8>(7,6,5,4,3,1,2,0) ? data = m_roml[offset & 0x3fff]; } else if (!io1) diff --git a/src/devices/bus/c64/vizastar.cpp b/src/devices/bus/c64/vizastar.cpp index 03043e7de93..444ff656b68 100644 --- a/src/devices/bus/c64/vizastar.cpp +++ b/src/devices/bus/c64/vizastar.cpp @@ -36,10 +36,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1) + bitswap<16>(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,0,5,1,4,2,3) + bitswap<8>(_data,7,6,0,5,1,4,2,3) diff --git a/src/devices/bus/c64/vw64.cpp b/src/devices/bus/c64/vw64.cpp index f6ed996765a..ea0d3c3dac2 100644 --- a/src/devices/bus/c64/vw64.cpp +++ b/src/devices/bus/c64/vw64.cpp @@ -40,10 +40,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0) + bitswap<16>(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,0,5,1,4,2,3) + bitswap<8>(_data,7,6,0,5,1,4,2,3) // 74LS122 tW=0.45*R*C = 1.1844s diff --git a/src/devices/bus/c64/warp_speed.cpp b/src/devices/bus/c64/warp_speed.cpp index e9098dadb44..3c266e3618d 100644 --- a/src/devices/bus/c64/warp_speed.cpp +++ b/src/devices/bus/c64/warp_speed.cpp @@ -38,10 +38,10 @@ //************************************************************************** #define UNSCRAMBLE_ADDRESS(_offset) \ - BITSWAP16(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0) + bitswap<16>(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0) #define UNSCRAMBLE_DATA(_data) \ - BITSWAP8(_data,7,6,5,0,1,4,2,3) + bitswap<8>(_data,7,6,5,0,1,4,2,3) diff --git a/src/devices/bus/cbmiec/c1541.cpp b/src/devices/bus/cbmiec/c1541.cpp index 4d0f9748966..427cebe1e31 100644 --- a/src/devices/bus/cbmiec/c1541.cpp +++ b/src/devices/bus/cbmiec/c1541.cpp @@ -1071,7 +1071,7 @@ void fsd2_device::device_start() for (offs_t offset = 0; offset < 0x4000; offset++) { - uint8_t data = BITSWAP8(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0); + uint8_t data = bitswap<8>(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0); rom[offset] = data; } diff --git a/src/devices/bus/chanf/rom.cpp b/src/devices/bus/chanf/rom.cpp index 3dc509a29d9..a3a213ba7ed 100644 --- a/src/devices/bus/chanf/rom.cpp +++ b/src/devices/bus/chanf/rom.cpp @@ -192,7 +192,7 @@ void chanf_rom_device::common_write_2102(uint32_t offset, uint8_t data) m_latch[1] = data; // all bits but 2,3 come from this write, but they are shuffled // notice that data is 8bits, so when swapping bit8 & bit9 are always 0! - m_addr_latch = (m_addr_latch & 0x0c) | (BITSWAP16((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0)); + m_addr_latch = (m_addr_latch & 0x0c) | (bitswap<16>((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0)); } } diff --git a/src/devices/bus/gameboy/mbc.cpp b/src/devices/bus/gameboy/mbc.cpp index de71f483779..4a48d896a94 100644 --- a/src/devices/bus/gameboy/mbc.cpp +++ b/src/devices/bus/gameboy/mbc.cpp @@ -1057,26 +1057,26 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank) switch (m_sintax_mode & 0x0f) { case 0x0d: - data = BITSWAP8(data, 1,0,7,6,5,4,3,2); + data = bitswap<8>(data, 1,0,7,6,5,4,3,2); break; case 0x09: - //data = BITSWAP8(data, 3,2,5,4,0,1,6,7); // Monkey..no - data = BITSWAP8(data, 4,5,2,3,0,1,6,7); + //data = bitswap<8>(data, 3,2,5,4,0,1,6,7); // Monkey..no + data = bitswap<8>(data, 4,5,2,3,0,1,6,7); break; case 0x00: // 0x10=lion 0x00 hmmmmm // 1 and 0 unconfirmed - data = BITSWAP8(data, 7,0,5,6,3,4,1,2); + data = bitswap<8>(data, 7,0,5,6,3,4,1,2); break; case 0x01: - data = BITSWAP8(data, 0,1,6,7,4,5,2,3); + data = bitswap<8>(data, 0,1,6,7,4,5,2,3); break; case 0x05: - data = BITSWAP8(data, 7,6,1,0,3,2,5,4); // Not 100% on this one + data = bitswap<8>(data, 7,6,1,0,3,2,5,4); // Not 100% on this one break; case 0x07: - data = BITSWAP8(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed + data = bitswap<8>(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed break; case 0x0b: - data = BITSWAP8(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed + data = bitswap<8>(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed break; } m_latch_bank2 = (m_latch_bank2 & 0x100) | data; diff --git a/src/devices/bus/msx_cart/dooly.cpp b/src/devices/bus/msx_cart/dooly.cpp index 389e0c3da77..d1d3ad9ff39 100644 --- a/src/devices/bus/msx_cart/dooly.cpp +++ b/src/devices/bus/msx_cart/dooly.cpp @@ -45,7 +45,7 @@ READ8_MEMBER(msx_cart_dooly_device::read_cart) switch (m_prot) { case 0x04: - data = BITSWAP8(data, 7, 6, 5, 4, 3, 1, 0, 2); + data = bitswap<8>(data, 7, 6, 5, 4, 3, 1, 0, 2); break; } return data; diff --git a/src/devices/bus/neogeo/boot_kof10th.cpp b/src/devices/bus/neogeo/boot_kof10th.cpp index 6f31cf6717a..167692f986d 100644 --- a/src/devices/bus/neogeo/boot_kof10th.cpp +++ b/src/devices/bus/neogeo/boot_kof10th.cpp @@ -102,7 +102,7 @@ WRITE16_MEMBER(neogeo_kof10th_cart_device::protection_w) if (!m_cart_ram[0xffe]) COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A else - m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly + m_fixed[offset] = bitswap<8>(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly } else if (offset >= 0xfe000/2) { diff --git a/src/devices/bus/neogeo/prot_cmc.cpp b/src/devices/bus/neogeo/prot_cmc.cpp index 336bb543a21..77591827f54 100644 --- a/src/devices/bus/neogeo/prot_cmc.cpp +++ b/src/devices/bus/neogeo/prot_cmc.cpp @@ -689,15 +689,15 @@ int cmc_prot_device::m1_address_scramble(int address, uint16_t key) int block = (address >> 16) & 7; int aux = address & 0xffff; - aux ^= BITSWAP16(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5); - aux = BITSWAP16(aux, + aux ^= bitswap<16>(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5); + aux = bitswap<16>(aux, p1[block][15], p1[block][14], p1[block][13], p1[block][12], p1[block][11], p1[block][10], p1[block][9], p1[block][8], p1[block][7], p1[block][6], p1[block][5], p1[block][4], p1[block][3], p1[block][2], p1[block][1], p1[block][0]); aux ^= m1_address_0_7_xor[(aux >> 8) & 0xff]; aux ^= m1_address_8_15_xor[aux & 0xff] << 8; - aux = BITSWAP16(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0); + aux = bitswap<16>(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0); return (block << 16) | aux; } diff --git a/src/devices/bus/neogeo/prot_cthd.cpp b/src/devices/bus/neogeo/prot_cthd.cpp index dd641e64537..d2c427d6ac7 100644 --- a/src/devices/bus/neogeo/prot_cthd.cpp +++ b/src/devices/bus/neogeo/prot_cthd.cpp @@ -189,7 +189,7 @@ void cthd_prot_device::ct2k3sp_sx_decrypt( uint8_t* fixedrom, uint32_t fixedrom_ for (int i = 0; i < rom_size; i++) { - int ofst = BITSWAP24((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3, + int ofst = bitswap<24>((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3, 0, 1, 4, 2, 13, 14, 16, 15, 5, 6, 11, 10, 9, 8, 7, 12 ); ofst += (i >> 17) << 17; @@ -275,7 +275,7 @@ void cthd_prot_device::patch_ct2k3sa(uint8_t* cpurom, uint32_t cpurom_size) /* Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg) */ -#define MATRIMBLZ80(i) (i ^ (BITSWAP8(i & 0x3,4,3,1,2,0,7,6,5) << 8)) +#define MATRIMBLZ80(i) (i ^ (bitswap<8>(i & 0x3,4,3,1,2,0,7,6,5) << 8)) void cthd_prot_device::matrimbl_decrypt(uint8_t* sprrom, uint32_t sprrom_size, uint8_t* audiorom, uint32_t audiorom_size) { diff --git a/src/devices/bus/neogeo/prot_kof2k3bl.cpp b/src/devices/bus/neogeo/prot_kof2k3bl.cpp index 5afe9a0e548..456f164c042 100644 --- a/src/devices/bus/neogeo/prot_kof2k3bl.cpp +++ b/src/devices/bus/neogeo/prot_kof2k3bl.cpp @@ -102,7 +102,7 @@ void kof2k3bl_prot_device::pl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size) { memcpy(&tmp[0], &rom16[i], 0x100000); for (int j = 0; j < 0x100000/2; j++) - rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)]; + rom16[i+j] = tmp[bitswap<24>(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)]; } /* patched by Altera protection chip on PCB */ @@ -124,7 +124,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size) uint8_t *buf = cpurom + 0xd0610; for (int i = 0; i < 0x2000 / 2; i++) { - int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5); + int ofst = (i & 0xff00) + bitswap<8>((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5); memcpy(&rom[i * 2], &buf[ofst * 2], 2); } diff --git a/src/devices/bus/neogeo/prot_misc.cpp b/src/devices/bus/neogeo/prot_misc.cpp index 54b9c5b8792..47150bbabee 100644 --- a/src/devices/bus/neogeo/prot_misc.cpp +++ b/src/devices/bus/neogeo/prot_misc.cpp @@ -77,7 +77,7 @@ void neoboot_prot_device::sx_decrypt(uint8_t* fixed, uint32_t fixed_size, int va else if (value == 2) { for (int i = 0; i < sx_size; i++) - rom[i] = BITSWAP8(rom[i], 7, 6, 0, 4, 3, 2, 1, 5); + rom[i] = bitswap<8>(rom[i], 7, 6, 0, 4, 3, 2, 1, 5); } } @@ -139,7 +139,7 @@ void neoboot_prot_device::kf2k5uni_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s { for (int j = 0; j < 0x80; j += 2) { - int ofst = BITSWAP8(j, 0, 3, 4, 5, 6, 1, 2, 7); + int ofst = bitswap<8>(j, 0, 3, 4, 5, 6, 1, 2, 7); memcpy(&dst[j], src + i + ofst, 2); } memcpy(src + i, &dst[0], 0x80); @@ -154,7 +154,7 @@ void neoboot_prot_device::kf2k5uni_sx_decrypt(uint8_t* fixedrom, uint32_t fixedr uint8_t *srom = fixedrom; for (int i = 0; i < 0x20000; i++) - srom[i] = BITSWAP8(srom[i], 4, 5, 6, 7, 0, 1, 2, 3); + srom[i] = bitswap<8>(srom[i], 4, 5, 6, 7, 0, 1, 2, 3); } void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audiorom_size) @@ -162,7 +162,7 @@ void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audior uint8_t *mrom = audiorom; for (int i = 0; i < 0x30000; i++) - mrom[i] = BITSWAP8(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3); + mrom[i] = bitswap<8>(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3); } @@ -187,7 +187,7 @@ void neoboot_prot_device::lans2004_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr { uint8_t *rom = ymsndrom; for (int i = 0; i < 0xA00000; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); } void neoboot_prot_device::lans2004_decrypt_68k(uint8_t* cpurom, uint32_t cpurom_size) @@ -239,7 +239,7 @@ void neoboot_prot_device::samsho5b_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s for (int i = 0; i < px_size / 2; i++) { - int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2); + int ofst = bitswap<8>((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2); ofst += (i & 0xfffff00); ofst ^= 0x060005; @@ -259,7 +259,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr uint8_t *rom = ymsndrom; for (int i = 0; i < vx_size; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7); } @@ -381,7 +381,7 @@ void neoboot_prot_device::svcboot_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4); + int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4); ofst += (i & 0xffff00); memcpy(&src[i * 2], &dst[ofst * 2], 0x02); } @@ -410,7 +410,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(uint8_t* sprrom, uint32_t sprrom_si int bit1 = bitswap4_tbl[idx][1]; int bit2 = bitswap4_tbl[idx][2]; int bit3 = bitswap4_tbl[idx][3]; - int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0); + int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0); ofst += (i & 0xfffff00); memcpy(&src[i * 0x80], &dst[ofst * 0x80], 0x80); } @@ -429,7 +429,7 @@ void neoboot_prot_device::svcplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si memcpy(&dst[0], src, size); for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02, + int ofst = bitswap<24>((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12); ofst ^= 0x0f0007; @@ -478,7 +478,7 @@ void neoboot_prot_device::svcsplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s memcpy(&dst[0], src, size); for (int i = 0; i < size / 2; i++) { - int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, + int ofst = bitswap<16>((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e); ofst += (i & 0x078000); @@ -524,7 +524,7 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(uint8_t *src, int size) for (int j = 0; j < 0x200; j++) { int n = (j & 0x38) >> 3; - int ofst = BITSWAP16(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]); + int ofst = bitswap<16>(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]); memcpy(src + i + ofst * 128, &dst[j * 128], 128); } } @@ -544,7 +544,7 @@ void neoboot_prot_device::kf2k2mp_decrypt(uint8_t* cpurom, uint32_t cpurom_size) { for (int j = 0; j < 0x80 / 2; j++) { - int ofst = BITSWAP8( j, 6, 7, 2, 3, 4, 5, 0, 1 ); + int ofst = bitswap<8>( j, 6, 7, 2, 3, 4, 5, 0, 1 ); memcpy(dst + j * 2, src + i + ofst * 2, 2); } memcpy(src + i, dst, 0x80); @@ -580,7 +580,7 @@ void neoboot_prot_device::kof10th_decrypt(uint8_t* cpurom, uint32_t cpurom_size) for (int i = 0; i < 0x900000; i++) { - int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0); + int j = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0); src[j] = dst[i]; } diff --git a/src/devices/bus/neogeo/prot_pcm2.cpp b/src/devices/bus/neogeo/prot_pcm2.cpp index 80fa21eafe0..82f3175eb8b 100644 --- a/src/devices/bus/neogeo/prot_pcm2.cpp +++ b/src/devices/bus/neogeo/prot_pcm2.cpp @@ -82,7 +82,7 @@ void pcm2_prot_device::swap(uint8_t* ymrom, uint32_t ymsize, int value) for (int i = 0; i < 0x1000000; i++) { - j = BITSWAP24(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16); + j = bitswap<24>(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16); j ^= addrs[value][1]; d = ((i + addrs[value][0]) & 0xffffff); src[j] = buf[d] ^ xordata[value][j & 0x7]; diff --git a/src/devices/bus/neogeo/prot_pvc.cpp b/src/devices/bus/neogeo/prot_pvc.cpp index 99c70142222..8e290596576 100644 --- a/src/devices/bus/neogeo/prot_pvc.cpp +++ b/src/devices/bus/neogeo/prot_pvc.cpp @@ -112,7 +112,7 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x0800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } @@ -120,12 +120,12 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size) memcpy(&buf[0], rom, rom_size); for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x800000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (BITSWAP8(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (bitswap<8>(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12); memcpy(&rom[i], &buf[ofst], 0x100); } @@ -151,7 +151,7 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x0800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } @@ -159,13 +159,13 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size) memcpy(&buf[0], rom, rom_size); for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1); memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x800000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&rom[i], &buf[ofst], 0x100); } memcpy(&buf[0], rom, rom_size ); @@ -189,20 +189,20 @@ void pvc_prot_device::kf2k3pcb_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); @@ -230,20 +230,20 @@ void pvc_prot_device::kof2003_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); @@ -271,19 +271,19 @@ void pvc_prot_device::kof2003h_decrypt_68k(uint8_t* rom, uint32_t size) for (int i = 0x100000; i < 0x800000; i += 4) { uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8; - rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); + rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0); rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff; rom[BYTE_XOR_LE(i+2)] = rom16 >> 8; } for (int i = 0; i < 0x0100000 / 0x10000; i++) { - int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); + int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2); memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000); } for (int i = 0x100000; i < 0x900000; i += 0x100) { - int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (BITSWAP8(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12); + int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (bitswap<8>(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12); memcpy(&buf[i], &rom[ofst], 0x100); } memcpy(&rom[0x000000], &buf[0x000000], 0x100000); diff --git a/src/devices/bus/neogeo/prot_sma.cpp b/src/devices/bus/neogeo/prot_sma.cpp index 1b6e2322cd9..bfd15ab208a 100644 --- a/src/devices/bus/neogeo/prot_sma.cpp +++ b/src/devices/bus/neogeo/prot_sma.cpp @@ -398,7 +398,7 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15); + rom[i] = bitswap<16>(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15); // swap address lines for the banked part for (int i = 0; i < 0x600000/2; i += 0x800/2) @@ -406,13 +406,13 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base) uint16_t buffer[0x800/2]; memcpy(buffer, &rom[i], 0x800); for (int j = 0; j < 0x800/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)]; } // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x700000/2 + BITSWAP24(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)]; + rom[i] = rom[0x700000/2 + bitswap<24>(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)]; } @@ -423,12 +423,12 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7); + rom[i] = bitswap<16>(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x710000/2 + BITSWAP24(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)]; + rom[i] = rom[0x710000/2 + bitswap<24>(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -437,7 +437,7 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base) uint16_t buffer[0x8000/2]; memcpy(buffer, &rom[i], 0x8000); for (int j = 0; j < 0x8000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)]; } } @@ -449,12 +449,12 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6); + rom[i] = bitswap<16>(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x7f8000/2 + BITSWAP24(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)]; + rom[i] = rom[0x7f8000/2 + bitswap<24>(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -463,7 +463,7 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base) uint16_t buffer[0x8000/2]; memcpy(buffer, &rom[i], 0x8000); for (int j = 0; j < 0x8000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)]; } } @@ -475,12 +475,12 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6); + rom[i] = bitswap<16>(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6); // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x5d0000/2 + BITSWAP24(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)]; + rom[i] = rom[0x5d0000/2 + bitswap<24>(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)]; // swap address lines for the banked part rom = (uint16_t *)(base + 0x100000); @@ -489,7 +489,7 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base) uint16_t buffer[0x10000/2]; memcpy(buffer, &rom[i], 0x10000); for (int j = 0; j < 0x10000/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)]; } } @@ -501,7 +501,7 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base) // swap data lines on the whole ROMs for (int i = 0; i < 0x800000/2; i++) - rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4); + rom[i] = bitswap<16>(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4); // swap address lines for the banked part for (int i = 0; i < 0x63a000/2; i += 0x800/2) @@ -509,11 +509,11 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base) uint16_t buffer[0x800/2]; memcpy(buffer, &rom[i], 0x800); for (int j = 0; j < 0x800/2; j++) - rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)]; + rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)]; } // swap address lines & relocate fixed part rom = (uint16_t *)base; for (int i = 0; i < 0x0c0000/2; i++) - rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)]; + rom[i] = rom[0x73a000/2 + bitswap<24>(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)]; } diff --git a/src/devices/bus/neogeo/sbp.cpp b/src/devices/bus/neogeo/sbp.cpp index f5c25a2210a..6b6920cb5e8 100644 --- a/src/devices/bus/neogeo/sbp.cpp +++ b/src/devices/bus/neogeo/sbp.cpp @@ -36,7 +36,7 @@ READ16_MEMBER( neogeo_sbp_cart_device::protection_r ) { uint16_t* rom = (get_rom_size()) ? get_rom_base() : get_region_rom_base(); uint16_t origdata = rom[offset + (0x200/2)]; - uint16_t data = BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4); + uint16_t data = bitswap<16>(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4); int realoffset = 0x200 + (offset * 2); logerror("sbp_lowerrom_r offset %08x data %04x\n", realoffset, data); diff --git a/src/devices/bus/nes/jy.cpp b/src/devices/bus/nes/jy.cpp index 38a30848859..191892ef544 100644 --- a/src/devices/bus/nes/jy.cpp +++ b/src/devices/bus/nes/jy.cpp @@ -296,7 +296,7 @@ READ8_MEMBER(nes_jy_typea_device::read_m) inline uint8_t nes_jy_typea_device::unscramble(uint8_t bank) { - return BITSWAP8(bank & 0x7f,7,0,1,2,3,4,5,6); + return bitswap<8>(bank & 0x7f,7,0,1,2,3,4,5,6); } void nes_jy_typea_device::update_prg() diff --git a/src/devices/bus/nes/mmc3_clones.cpp b/src/devices/bus/nes/mmc3_clones.cpp index 5d776c5d86c..5c578c0fcbd 100644 --- a/src/devices/bus/nes/mmc3_clones.cpp +++ b/src/devices/bus/nes/mmc3_clones.cpp @@ -2565,7 +2565,7 @@ void nes_a9746_device::pcb_reset() void nes_a9746_device::update_banks(uint8_t value) { - uint8_t bank = BITSWAP8(value & 0x3c,7,6,0,1,2,3,4,5); + uint8_t bank = bitswap<8>(value & 0x3c,7,6,0,1,2,3,4,5); switch (m_reg[0]) { diff --git a/src/devices/bus/nes/waixing.cpp b/src/devices/bus/nes/waixing.cpp index f4d9c338f48..7e95102c029 100644 --- a/src/devices/bus/nes/waixing.cpp +++ b/src/devices/bus/nes/waixing.cpp @@ -929,7 +929,7 @@ READ8_MEMBER(nes_waixing_sh2_device::chr_r) void nes_waixing_sec_device::prg_cb(int start, int bank) { if (m_reg) - bank = BITSWAP8(bank & 0x1f,7,6,5,2,1,3,4,0); + bank = bitswap<8>(bank & 0x1f,7,6,5,2,1,3,4,0); prg8_x(start, bank); } @@ -937,7 +937,7 @@ void nes_waixing_sec_device::prg_cb(int start, int bank) void nes_waixing_sec_device::chr_cb(int start, int bank, int source) { if (m_reg) - bank = BITSWAP8(bank, 5,4,2,6,7,3,1,0); + bank = bitswap<8>(bank, 5,4,2,6,7,3,1,0); chr1_x(start, bank, source); } diff --git a/src/devices/bus/nubus/nubus_spec8.cpp b/src/devices/bus/nubus/nubus_spec8.cpp index a8289667de6..1cc905670a6 100644 --- a/src/devices/bus/nubus/nubus_spec8.cpp +++ b/src/devices/bus/nubus/nubus_spec8.cpp @@ -257,7 +257,7 @@ WRITE32_MEMBER( nubus_spec8s3_device::spec8s3_w ) if (m_count == 3) { - int actual_color = BITSWAP8(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7); + int actual_color = bitswap<8>(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7); // printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() ); m_palette[actual_color] = rgb_t(m_colors[0], m_colors[1], m_colors[2]); diff --git a/src/devices/bus/nubus/pds30_procolor816.cpp b/src/devices/bus/nubus/pds30_procolor816.cpp index 366eb8eb1b3..869e91986c0 100644 --- a/src/devices/bus/nubus/pds30_procolor816.cpp +++ b/src/devices/bus/nubus/pds30_procolor816.cpp @@ -272,7 +272,7 @@ WRITE32_MEMBER( nubus_procolor816_device::procolor816_w ) if (mem_mask == 0x00ff0000) { // printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc()); - m_clutoffs = BITSWAP8((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7); + m_clutoffs = bitswap<8>((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7); } else if (mem_mask == 0x000000ff) { diff --git a/src/devices/bus/s100/wunderbus.cpp b/src/devices/bus/s100/wunderbus.cpp index e0eec1b3b4f..1bd7df7cb2a 100644 --- a/src/devices/bus/s100/wunderbus.cpp +++ b/src/devices/bus/s100/wunderbus.cpp @@ -345,7 +345,7 @@ uint8_t s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset) */ - data = BITSWAP8(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc; + data = bitswap<8>(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc; break; case 2: // R.T. Clock IN/RESET CLK. Int. diff --git a/src/devices/bus/saturn/sat_slot.cpp b/src/devices/bus/saturn/sat_slot.cpp index 13f69c8ba92..defdd4d025b 100644 --- a/src/devices/bus/saturn/sat_slot.cpp +++ b/src/devices/bus/saturn/sat_slot.cpp @@ -156,7 +156,7 @@ image_init_result sat_cart_slot_device::call_load() // fix endianness.... for (int i = 0; i < len/4; i ++) - ROM[i] = BITSWAP32(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24); + ROM[i] = bitswap<32>(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24); // { // uint8_t tempa = ROM[i+0]; // uint8_t tempb = ROM[i+1]; diff --git a/src/devices/bus/sega8/rom.cpp b/src/devices/bus/sega8/rom.cpp index 9006cc1f013..e3fa290489c 100644 --- a/src/devices/bus/sega8/rom.cpp +++ b/src/devices/bus/sega8/rom.cpp @@ -871,7 +871,7 @@ READ8_MEMBER(sega8_janggun_device::read_cart) if (m_rom_bank_base[bank] < 0x80) return m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)]; else - return BITSWAP8(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7); } diff --git a/src/devices/bus/snes/rom.cpp b/src/devices/bus/snes/rom.cpp index 628ab1a212d..bae27f21fad 100644 --- a/src/devices/bus/snes/rom.cpp +++ b/src/devices/bus/snes/rom.cpp @@ -291,7 +291,7 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write ) // Address range for read/write depends on the game (check snes.xml) READ8_MEMBER( sns_rom_pokemon_device::chip_read ) { - return BITSWAP8(m_latch,0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch,0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_pokemon_device::chip_write ) @@ -488,7 +488,7 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write ) READ8_MEMBER( sns_rom_banana_device::chip_read ) { - return BITSWAP8(m_latch[0xf],0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_banana_device::chip_write ) @@ -499,7 +499,7 @@ WRITE8_MEMBER( sns_rom_banana_device::chip_write ) READ8_MEMBER( sns_rom_bugs_device::chip_read ) { - return BITSWAP8(m_latch[offset & 0xff],0,6,7,1,2,3,4,5); + return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5); } WRITE8_MEMBER( sns_rom_bugs_device::chip_write ) diff --git a/src/devices/bus/snes_ctrl/pachinko.cpp b/src/devices/bus/snes_ctrl/pachinko.cpp index 44d81066d83..010385e6459 100644 --- a/src/devices/bus/snes_ctrl/pachinko.cpp +++ b/src/devices/bus/snes_ctrl/pachinko.cpp @@ -83,7 +83,7 @@ void snes_pachinko_device::device_reset() void snes_pachinko_device::port_poll() { - uint8_t dial = BITSWAP8(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0); + uint8_t dial = bitswap<8>(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0); m_latch = m_button->read() | (dial << 25) | 0xee7000; // add ID } diff --git a/src/devices/bus/vcs/dpc.cpp b/src/devices/bus/vcs/dpc.cpp index f15e426fec7..bcddc3e96ae 100644 --- a/src/devices/bus/vcs/dpc.cpp +++ b/src/devices/bus/vcs/dpc.cpp @@ -160,10 +160,10 @@ READ8_MEMBER(dpc_device::read) data = m_df[data_fetcher].flag ? display_data : 0x00; break; case 0x18: // display data AND'd w/flag, nibbles swapped - data = m_df[data_fetcher].flag ? BITSWAP8(display_data,3,2,1,0,7,6,5,4) : 0x00; + data = m_df[data_fetcher].flag ? bitswap<8>(display_data,3,2,1,0,7,6,5,4) : 0x00; break; case 0x20: // display data AND'd w/flag, byte reversed - data = m_df[data_fetcher].flag ? BITSWAP8(display_data,0,1,2,3,4,5,6,7) : 0x00; + data = m_df[data_fetcher].flag ? bitswap<8>(display_data,0,1,2,3,4,5,6,7) : 0x00; break; case 0x28: // display data AND'd w/flag, rotated right data = m_df[data_fetcher].flag ? (display_data >> 1) : 0x00; diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp index a80c067aaeb..fa874022938 100644 --- a/src/devices/cpu/hmcs40/hmcs40.cpp +++ b/src/devices/cpu/hmcs40/hmcs40.cpp @@ -620,7 +620,7 @@ void hmcs40_cpu_device::execute_run() debugger_instruction_hook(this, m_pc); m_icount--; m_op = m_program->read_word(m_pc) & 0x3ff; - m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR) + m_i = bitswap<8>(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR) increment_pc(); // handle opcode diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp index 48ae33ccfaa..96e4b6399ea 100644 --- a/src/devices/cpu/hmcs40/hmcs40d.cpp +++ b/src/devices/cpu/hmcs40/hmcs40d.cpp @@ -181,7 +181,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d // reverse bits if (bits < 0) { - param = BITSWAP8(param,0,1,2,3,4,5,6,7); + param = bitswap<8>(param,0,1,2,3,4,5,6,7); param >>= (8 + bits); bits = -bits; } diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp index 2078d5e765b..1886768bc8d 100644 --- a/src/devices/cpu/hmcs40/hmcs40op.cpp +++ b/src/devices/cpu/hmcs40/hmcs40op.cpp @@ -669,13 +669,13 @@ void hmcs40_cpu_device::op_p() if (o & 0x100) { // B3 B2 B1 B0 A0 A1 A2 A3 - m_a = BITSWAP8(o,7,6,5,4,0,1,2,3) & 0xf; + m_a = bitswap<8>(o,7,6,5,4,0,1,2,3) & 0xf; m_b = o >> 4 & 0xf; } if (o & 0x200) { // R20 R21 R22 R23 R30 R31 R32 R33 - o = BITSWAP8(o,0,1,2,3,4,5,6,7); + o = bitswap<8>(o,0,1,2,3,4,5,6,7); write_r(2, o & 0xf); write_r(3, o >> 4 & 0xf); } diff --git a/src/devices/cpu/tms1000/tms0970.cpp b/src/devices/cpu/tms1000/tms0970.cpp index 503f95def3e..2ba98ae38a2 100644 --- a/src/devices/cpu/tms1000/tms0970.cpp +++ b/src/devices/cpu/tms1000/tms0970.cpp @@ -110,7 +110,7 @@ void tms0970_cpu_device::device_reset() if (imask & 0x40 && (imask & 0x20) == 0) msel = (op & 0xf) | (op >> 1 & 0x10); - msel = BITSWAP8(msel,7,6,5,0,1,2,3,4); // lines are reversed + msel = bitswap<8>(msel,7,6,5,0,1,2,3,4); // lines are reversed u32 mmask = m_mpla->read(msel); mmask ^= 0x09fe; // invert active-negative diff --git a/src/devices/cpu/tms1000/tms0980.cpp b/src/devices/cpu/tms1000/tms0980.cpp index 622d8ca5be4..4ca31ad4330 100644 --- a/src/devices/cpu/tms1000/tms0980.cpp +++ b/src/devices/cpu/tms1000/tms0980.cpp @@ -110,7 +110,7 @@ u32 tms0980_cpu_device::decode_fixed(u16 op) u32 tms0980_cpu_device::decode_micro(u8 sel) { u32 decode = 0; - sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed + sel = bitswap<8>(sel,7,6,0,1,2,3,4,5); // lines are reversed u32 mask = m_mpla->read(sel); mask ^= 0x43fc3; // invert active-negative @@ -175,7 +175,7 @@ void tms0980_cpu_device::read_opcode() { debugger_instruction_hook(this, m_rom_address); m_opcode = m_program->read_word(m_rom_address) & 0x1ff; - m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes + m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes m_fixed = m_fixed_decode[m_opcode]; m_micro = read_micro(); diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp index bfbf6eab8af..eaac999b2ce 100644 --- a/src/devices/cpu/tms1000/tms1k_base.cpp +++ b/src/devices/cpu/tms1000/tms1k_base.cpp @@ -294,7 +294,7 @@ void tms1k_base_device::read_opcode() { debugger_instruction_hook(this, m_rom_address); m_opcode = m_program->read_byte(m_rom_address); - m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes + m_c4 = bitswap<8>(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes m_fixed = m_fixed_decode[m_opcode]; m_micro = m_micro_decode[m_opcode]; diff --git a/src/devices/cpu/tms1000/tp0320.cpp b/src/devices/cpu/tms1000/tp0320.cpp index 64ebdb3365a..8f10c9f2b62 100644 --- a/src/devices/cpu/tms1000/tp0320.cpp +++ b/src/devices/cpu/tms1000/tp0320.cpp @@ -67,7 +67,7 @@ u32 tp0320_cpu_device::decode_micro(u8 sel) { u32 decode = 0; - sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed + sel = bitswap<8>(sel,7,6,0,1,2,3,4,5); // lines are reversed u32 mask = m_mpla->read(sel); mask ^= 0x0bff0; // invert active-negative diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp index 716fa45ccf9..c805c5bbc14 100644 --- a/src/devices/cpu/upd7725/upd7725.cpp +++ b/src/devices/cpu/upd7725/upd7725.cpp @@ -398,7 +398,7 @@ void necdsp_device::exec_op(uint32_t opcode) { case 9: regs.idb = regs.dr; break; case 10: regs.idb = regs.sr; break; case 11: regs.idb = regs.si; break; //MSB = first bit in from serial, 'natural' SI register order - case 12: regs.idb = BITSWAP16(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order + case 12: regs.idb = bitswap<16>(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order case 13: regs.idb = regs.k; break; case 14: regs.idb = regs.l; break; case 15: regs.idb = dataRAM[regs.dp]; break; @@ -586,7 +586,7 @@ void necdsp_device::exec_ld(uint32_t opcode) { m_out_p0_cb(regs.sr.p0); m_out_p1_cb(regs.sr.p1); break; - case 8: regs.so = BITSWAP16(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left + case 8: regs.so = bitswap<16>(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left case 10: regs.k = id; break; case 11: regs.k = id; regs.l = m_data->read_word(regs.rp); break; diff --git a/src/devices/machine/eepromser.cpp b/src/devices/machine/eepromser.cpp index 5e6e08a6a2b..d97ea318407 100644 --- a/src/devices/machine/eepromser.cpp +++ b/src/devices/machine/eepromser.cpp @@ -1007,9 +1007,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) if (bit_index % m_data_bits == 0 && (bit_index == 0 || m_streaming_enabled)){ m_shift_register=m_ram_data[m_address]; - //m_shift_register=BITSWAP16(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); - //m_shift_register=BITSWAP16(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); - m_shift_register= BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=bitswap<16>(m_shift_register,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); + //m_shift_register=bitswap<16>(m_shift_register,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8); + m_shift_register= bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_shift_register=m_shift_register<<16; @@ -1046,9 +1046,9 @@ void eeprom_serial_x24c44_device::handle_event(eeprom_event event) m_shift_register = (m_shift_register << 1) | m_di_state; if (++m_bits_accum == m_data_bits) { - //m_shift_register=BITSWAP16(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); - //m_shift_register=BITSWAP16(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); - m_shift_register=BITSWAP16(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + //m_shift_register=bitswap<16>(m_shift_register, 0, 1, 2, 3, 4, 5,6,7, 8, 9,10,11,12,13,14,15); + //m_shift_register=bitswap<16>(m_shift_register, 7, 6, 5, 4, 3, 2,1,0,15,14,13,12,11,10, 9, 8); + m_shift_register=bitswap<16>(m_shift_register,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); m_ram_data[m_address]=m_shift_register; LOG1("write to RAM addr=%02X data=%04X\n",m_address,m_shift_register); diff --git a/src/devices/machine/ldpr8210.cpp b/src/devices/machine/ldpr8210.cpp index 8e1b879d16d..39bb12f97ba 100644 --- a/src/devices/machine/ldpr8210.cpp +++ b/src/devices/machine/ldpr8210.cpp @@ -236,7 +236,7 @@ void pioneer_pr8210_device::control_w(uint8_t data) { // data is stored to the PIA in bit-reverse order uint8_t newcommand = (m_accumulator >> 2) & 0x1f; - m_pia.porta = BITSWAP8(newcommand, 0,1,2,3,4,5,6,7); + m_pia.porta = bitswap<8>(newcommand, 0,1,2,3,4,5,6,7); // the MCU logic requires a 0 to execute many commands; however, nobody // consistently sends a 0, whereas they do tend to send duplicate commands... diff --git a/src/devices/machine/roc10937.cpp b/src/devices/machine/roc10937.cpp index 05d332106bb..966d28c38c9 100644 --- a/src/devices/machine/roc10937.cpp +++ b/src/devices/machine/roc10937.cpp @@ -180,7 +180,7 @@ void rocvfd_device::device_reset() /////////////////////////////////////////////////////////////////////////// uint32_t rocvfd_device::set_display(uint32_t segin) { - return BITSWAP32(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); + return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); } diff --git a/src/devices/machine/sdlc.cpp b/src/devices/machine/sdlc.cpp index e3cc8cc99ed..870f8aba4e3 100644 --- a/src/devices/machine/sdlc.cpp +++ b/src/devices/machine/sdlc.cpp @@ -282,7 +282,7 @@ void sdlc_logger_device::log_frame(bool partial) const fcs |= std::uint16_t(m_buffer[frame_bytes - 1]) << (8 - residual_bits); if (residual_bits) fcs |= (std::uint16_t(m_buffer[frame_bytes]) & ((1U << residual_bits) - 1U)) << (16 - residual_bits); - fcs = ~BITSWAP16(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); + fcs = ~bitswap<16>(fcs, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); util::stream_format(msg, " FCS=%04X", fcs); if (!is_frame_check_good()) util::stream_format(msg, " (expected %04X)", m_expected_fcs); diff --git a/src/devices/machine/stvcd.cpp b/src/devices/machine/stvcd.cpp index 87b3b9e344c..e3b0cefb6d8 100644 --- a/src/devices/machine/stvcd.cpp +++ b/src/devices/machine/stvcd.cpp @@ -100,7 +100,7 @@ int saturn_state::get_track_index(uint32_t fad) int saturn_state::sega_cdrom_get_adr_control(cdrom_file *file, int track) { - return BITSWAP8(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); + return bitswap<8>(cdrom_get_adr_control(file, cur_track),3,2,1,0,7,6,5,4); } void saturn_state::cr_standard_return(uint16_t cur_status) diff --git a/src/devices/machine/tms6100.cpp b/src/devices/machine/tms6100.cpp index d2fb40cef36..0728a511e8d 100644 --- a/src/devices/machine/tms6100.cpp +++ b/src/devices/machine/tms6100.cpp @@ -182,7 +182,7 @@ void tms6100_device::handle_command(u8 cmd) // M58819S reads serial data reversed if (m_reverse_bits) - m_sa = BITSWAP8(m_sa,0,1,2,3,4,5,6,7); + m_sa = bitswap<8>(m_sa,0,1,2,3,4,5,6,7); } else { diff --git a/src/devices/machine/z80sio.cpp b/src/devices/machine/z80sio.cpp index ddf951161b4..efe83ac2486 100644 --- a/src/devices/machine/z80sio.cpp +++ b/src/devices/machine/z80sio.cpp @@ -1128,7 +1128,7 @@ void z80sio_channel::sync_tx_sr_empty() LOGTX("%s() Channel %c Transmit FCS '%04x' m_wr5:%02x\n", FUNCNAME, 'A' + m_index, m_tx_crc, m_wr5); // just for fun, SDLC sends the FCS inverted in reverse bit order - uint16_t const fcs(BITSWAP16(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); + uint16_t const fcs(bitswap<16>(m_tx_crc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); tx_setup(((m_wr4 & WR4_SYNC_MODE_MASK) == WR4_SYNC_MODE_SDLC) ? ~fcs : fcs, 16, 0, false, true); // set the underrun flag so it will send sync next time diff --git a/src/devices/sound/astrocde.cpp b/src/devices/sound/astrocde.cpp index 1e8349bbd9d..36b0f76601a 100644 --- a/src/devices/sound/astrocde.cpp +++ b/src/devices/sound/astrocde.cpp @@ -87,7 +87,7 @@ void astrocade_device::device_start() /* generate a bitswap table for the noise */ for (i = 0; i < 256; i++) - m_bitswap[i] = BITSWAP8(i, 0,1,2,3,4,5,6,7); + m_bitswap[i] = bitswap<8>(i, 0,1,2,3,4,5,6,7); /* allocate a stream for output */ m_stream = stream_alloc(0, 1, clock()); diff --git a/src/devices/sound/tms5110.cpp b/src/devices/sound/tms5110.cpp index 5f7ee0bddb0..b7bef7f741e 100644 --- a/src/devices/sound/tms5110.cpp +++ b/src/devices/sound/tms5110.cpp @@ -1345,7 +1345,7 @@ void tmsprom_device::device_timer(emu_timer &timer, device_timer_id id, int para if (ctrl & (1 << m_reset_bit)) m_address = 0; - m_ctl_cb((offs_t)0, BITSWAP8(ctrl,0,0,0,0,m_ctl8_bit, + m_ctl_cb((offs_t)0, bitswap<8>(ctrl,0,0,0,0,m_ctl8_bit, m_ctl4_bit,m_ctl2_bit,m_ctl1_bit)); m_pdc_cb((ctrl >> m_pdc_bit) & 0x01); diff --git a/src/devices/video/ef9340_1.cpp b/src/devices/video/ef9340_1.cpp index 484cc67cfbf..54c6f651dac 100644 --- a/src/devices/video/ef9340_1.cpp +++ b/src/devices/video/ef9340_1.cpp @@ -213,7 +213,7 @@ void ef9340_1_device::ef9341_write( uint8_t command, uint8_t b, uint8_t data ) if ( b >= 0xa0 ) { - m_ef934x_ext_char_ram[ ( ( a & 0x80 ) << 3 ) | external_chargen_address( b, slice ) ] = BITSWAP8(m_ef9341.TA,0,1,2,3,4,5,6,7); + m_ef934x_ext_char_ram[ ( ( a & 0x80 ) << 3 ) | external_chargen_address( b, slice ) ] = bitswap<8>(m_ef9341.TA,0,1,2,3,4,5,6,7); } // Increment slice number diff --git a/src/emu/emucore.h b/src/emu/emucore.h index 1782ac8726d..b6d1e7b3154 100644 --- a/src/emu/emucore.h +++ b/src/emu/emucore.h @@ -255,6 +255,7 @@ template constexpr T bitswap(T val, U b, return (BIT(val, b) << sizeof...(c)) | bitswap(val, c...); } +// explicit version that checks number of bit position arguments template T bitswap(T val, U... b) { static_assert(sizeof...(b) == B, "wrong number of bits"); @@ -262,16 +263,6 @@ template T bitswap(T val, U... b) return bitswap(val, b...); } -// explicit versions that check number of bit position arguments -template constexpr T BITSWAP8(T val, U... b) { return bitswap<8U>(val, b...); } -template constexpr T BITSWAP16(T val, U... b) { return bitswap<16U>(val, b...); } -template constexpr T BITSWAP24(T val, U... b) { return bitswap<24U>(val, b...); } -template constexpr T BITSWAP32(T val, U... b) { return bitswap<32U>(val, b...); } -template constexpr T BITSWAP40(T val, U... b) { return bitswap<40U>(val, b...); } -template constexpr T BITSWAP48(T val, U... b) { return bitswap<48U>(val, b...); } -template constexpr T BITSWAP56(T val, U... b) { return bitswap<56U>(val, b...); } -template constexpr T BITSWAP64(T val, U... b) { return bitswap<64U>(val, b...); } - //************************************************************************** diff --git a/src/mame/audio/seibu.cpp b/src/mame/audio/seibu.cpp index a7336ef80fd..8a13fd94f5b 100644 --- a/src/mame/audio/seibu.cpp +++ b/src/mame/audio/seibu.cpp @@ -337,8 +337,8 @@ READ8_MEMBER(sei80bu_device::data_r) if ( BIT(a,13) & ~BIT(a,6) & BIT(a,4)) src ^= 0x02; if (~BIT(a,11) & BIT(a,9) & BIT(a,2)) src ^= 0x01; - if (BIT(a,13) & BIT(a,4)) src = BITSWAP8(src,7,6,5,4,3,2,0,1); - if (BIT(a, 8) & BIT(a,4)) src = BITSWAP8(src,7,6,5,4,2,3,1,0); + if (BIT(a,13) & BIT(a,4)) src = bitswap<8>(src,7,6,5,4,3,2,0,1); + if (BIT(a, 8) & BIT(a,4)) src = bitswap<8>(src,7,6,5,4,2,3,1,0); return src; } @@ -357,10 +357,10 @@ READ8_MEMBER(sei80bu_device::opcode_r) if ( BIT(a,13) & ~BIT(a,6) & BIT(a,4)) src ^= 0x02; if (~BIT(a,11) & BIT(a,9) & BIT(a,2)) src ^= 0x01; - if (BIT(a,13) & BIT(a,4)) src = BITSWAP8(src,7,6,5,4,3,2,0,1); - if (BIT(a, 8) & BIT(a,4)) src = BITSWAP8(src,7,6,5,4,2,3,1,0); - if (BIT(a,12) & BIT(a,9)) src = BITSWAP8(src,7,6,4,5,3,2,1,0); - if (BIT(a,11) & ~BIT(a,6)) src = BITSWAP8(src,6,7,5,4,3,2,1,0); + if (BIT(a,13) & BIT(a,4)) src = bitswap<8>(src,7,6,5,4,3,2,0,1); + if (BIT(a, 8) & BIT(a,4)) src = bitswap<8>(src,7,6,5,4,2,3,1,0); + if (BIT(a,12) & BIT(a,9)) src = bitswap<8>(src,7,6,4,5,3,2,1,0); + if (BIT(a,11) & ~BIT(a,6)) src = bitswap<8>(src,6,7,5,4,3,2,1,0); return src; } @@ -410,7 +410,7 @@ void seibu_adpcm_device::decrypt() { for (int i = 0; i < m_base.length(); i++) { - m_base[i] = BITSWAP8(m_base[i], 7, 5, 3, 1, 6, 4, 2, 0); + m_base[i] = bitswap<8>(m_base[i], 7, 5, 3, 1, 6, 4, 2, 0); } } diff --git a/src/mame/drivers/24cdjuke.cpp b/src/mame/drivers/24cdjuke.cpp index 4d1cd57249a..2d06f447b89 100644 --- a/src/mame/drivers/24cdjuke.cpp +++ b/src/mame/drivers/24cdjuke.cpp @@ -116,7 +116,7 @@ WRITE8_MEMBER(midcoin24cdjuke_state::digit_w) { uint16_t char_data = m_charset[((data & 0x60) << 1) | (data & 0x1f)]; - char_data = BITSWAP16(char_data, 13,11,9,15,14,10,12,8,7,6,5,4,3,2,1,0); + char_data = bitswap<16>(char_data, 13,11,9,15,14,10,12,8,7,6,5,4,3,2,1,0); output().set_digit_value(offset, char_data ^ 0xffff); } diff --git a/src/mame/drivers/39in1.cpp b/src/mame/drivers/39in1.cpp index 45e24a02733..532b59d40bd 100644 --- a/src/mame/drivers/39in1.cpp +++ b/src/mame/drivers/39in1.cpp @@ -1550,7 +1550,7 @@ void _39in1_state::machine_start() for (i = 0; i < 0x80000; i += 2) { - ROM[i] = BITSWAP8(ROM[i],7,2,5,6,0,3,1,4) ^ BITSWAP8((i>>3)&0xf, 3,2,4,1,4,4,0,4) ^ 0x90; + ROM[i] = bitswap<8>(ROM[i],7,2,5,6,0,3,1,4) ^ bitswap<8>((i>>3)&0xf, 3,2,4,1,4,4,0,4) ^ 0x90; } pxa255_start(); @@ -1565,7 +1565,7 @@ MACHINE_START_MEMBER(_39in1_state,60in1) { if ((i%2)==0) { - ROM[i] = BITSWAP8(ROM[i],5,1,4,2,0,7,6,3)^BITSWAP8(i, 6,0,4,13,0,5,3,11); + ROM[i] = bitswap<8>(ROM[i],5,1,4,2,0,7,6,3)^bitswap<8>(i, 6,0,4,13,0,5,3,11); } } diff --git a/src/mame/drivers/4enraya.cpp b/src/mame/drivers/4enraya.cpp index b165007c8c5..8d6d41a0143 100644 --- a/src/mame/drivers/4enraya.cpp +++ b/src/mame/drivers/4enraya.cpp @@ -636,7 +636,7 @@ DRIVER_INIT_MEMBER(_4enraya_state, unkpacg) // descramble rom uint8_t *rom = memregion("maincpu")->base(); for (int i = 0x8000; i < 0xa000; i++) - rom[i] = BITSWAP8(rom[i], 7,6,5,4,3,2,0,1); + rom[i] = bitswap<8>(rom[i], 7,6,5,4,3,2,0,1); } diff --git a/src/mame/drivers/8080bw.cpp b/src/mame/drivers/8080bw.cpp index 8e2255093d8..294be4b972d 100644 --- a/src/mame/drivers/8080bw.cpp +++ b/src/mame/drivers/8080bw.cpp @@ -3284,7 +3284,7 @@ DRIVER_INIT_MEMBER(_8080bw_state,attackfc) // swap a8/a9 for (int i = 0; i < len; i++) - buffer[BITSWAP16(i, 15,14,13,12,11,10,8,9, 7,6,5,4,3,2,1,0)] = rom[i]; + buffer[bitswap<16>(i, 15,14,13,12,11,10,8,9, 7,6,5,4,3,2,1,0)] = rom[i]; memcpy(rom, &buffer[0], len); } @@ -3419,7 +3419,7 @@ DRIVER_INIT_MEMBER(_8080bw_state,invmulti) // decrypt rom for (int i = 0; i < len; i++) - dest[i] = BITSWAP8(src[(i & 0x100ff) | (BITSWAP8(i >> 8 & 0xff, 7,3,4,5,0,6,1,2) << 8)],0,6,5,7,4,3,1,2); + dest[i] = bitswap<8>(src[(i & 0x100ff) | (bitswap<8>(i >> 8 & 0xff, 7,3,4,5,0,6,1,2) << 8)],0,6,5,7,4,3,1,2); membank("bank1")->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000); membank("bank1")->set_entry(0); diff --git a/src/mame/drivers/acesp.cpp b/src/mame/drivers/acesp.cpp index c74324aea51..b69928b45e3 100644 --- a/src/mame/drivers/acesp.cpp +++ b/src/mame/drivers/acesp.cpp @@ -3856,13 +3856,13 @@ static void descramble_crystal( uint8_t* region, int start, int end, uint8_t ext switch (i & 0x58) { case 0x00: // same as 0x08 - case 0x08: x = BITSWAP8( x^0xca , 3,2,1,0,7,4,6,5 ); break; - case 0x10: x = BITSWAP8( x^0x30 , 3,0,4,6,1,5,7,2 ); break; - case 0x18: x = BITSWAP8( x^0x89 , 4,1,2,5,7,0,6,3 ); break; - case 0x40: x = BITSWAP8( x^0x14 , 6,1,4,3,2,5,0,7 ); break; - case 0x48: x = BITSWAP8( x^0x40 , 1,0,3,2,5,4,7,6 ); break; - case 0x50: x = BITSWAP8( x^0xcb , 3,2,1,0,7,6,5,4 ); break; - case 0x58: x = BITSWAP8( x^0xc0 , 2,3,6,0,5,1,7,4 ); break; + case 0x08: x = bitswap<8>( x^0xca , 3,2,1,0,7,4,6,5 ); break; + case 0x10: x = bitswap<8>( x^0x30 , 3,0,4,6,1,5,7,2 ); break; + case 0x18: x = bitswap<8>( x^0x89 , 4,1,2,5,7,0,6,3 ); break; + case 0x40: x = bitswap<8>( x^0x14 , 6,1,4,3,2,5,0,7 ); break; + case 0x48: x = bitswap<8>( x^0x40 , 1,0,3,2,5,4,7,6 ); break; + case 0x50: x = bitswap<8>( x^0xcb , 3,2,1,0,7,6,5,4 ); break; + case 0x58: x = bitswap<8>( x^0xc0 , 2,3,6,0,5,1,7,4 ); break; } region[i] = x ^ extra_xor; } diff --git a/src/mame/drivers/aerofgt.cpp b/src/mame/drivers/aerofgt.cpp index d6f4e54072a..47cd3a501e3 100644 --- a/src/mame/drivers/aerofgt.cpp +++ b/src/mame/drivers/aerofgt.cpp @@ -3027,7 +3027,7 @@ DRIVER_INIT_MEMBER(aerofgt_state, kickball) uint8_t *src = memregion( "gfx2" )->base(); for (int i = 0;i < 0x80000;i++) { - src[i] = BITSWAP8(src[i], 7, 5, 6, 4, 3, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 5, 6, 4, 3, 2, 1, 0); } } diff --git a/src/mame/drivers/airraid.cpp b/src/mame/drivers/airraid.cpp index 018e149dcc4..8a85510ad8e 100644 --- a/src/mame/drivers/airraid.cpp +++ b/src/mame/drivers/airraid.cpp @@ -601,14 +601,14 @@ DRIVER_INIT_MEMBER(airraid_state,cshootere) m_decrypted_opcodes[A] ^= 0x02; if (BIT(A,9) || !BIT(A,5) || BIT(A,3)) - m_decrypted_opcodes[A] = BITSWAP8(m_decrypted_opcodes[A],7,6,1,4,3,2,5,0); + m_decrypted_opcodes[A] = bitswap<8>(m_decrypted_opcodes[A],7,6,1,4,3,2,5,0); /* decode the data */ if (BIT(A,5)) rom[A] ^= 0x40; if (BIT(A,9) || !BIT(A,5)) - rom[A] = BITSWAP8(rom[A],7,6,1,4,3,2,5,0); + rom[A] = bitswap<8>(rom[A],7,6,1,4,3,2,5,0); } DRIVER_INIT_CALL(cshooter); diff --git a/src/mame/drivers/alesis.cpp b/src/mame/drivers/alesis.cpp index 4a18d1fd05e..c7e9fc91bf5 100644 --- a/src/mame/drivers/alesis.cpp +++ b/src/mame/drivers/alesis.cpp @@ -472,7 +472,7 @@ DRIVER_INIT_MEMBER(alesis_state,hr16) uint8_t *orig = memregion("user1")->base(); for (i = 0; i < 0x8000; i++) { - ROM[BITSWAP16(i,15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7)] = orig[i]; + ROM[bitswap<16>(i,15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7)] = orig[i]; } } diff --git a/src/mame/drivers/altos5.cpp b/src/mame/drivers/altos5.cpp index df6ccb18d75..08fcdf9b45c 100644 --- a/src/mame/drivers/altos5.cpp +++ b/src/mame/drivers/altos5.cpp @@ -126,9 +126,9 @@ void altos5_state::setup_banks(uint8_t source) // WPRT | template | dma bank / cpu bank if (source == 1) // use DMA banks only if BUSACK is asserted - offs = ((BITSWAP8(m_port09, 0, 0, 0, 5, 1, 2, 7, 6) << 4) & 0x1f0) ^ 0x100; + offs = ((bitswap<8>(m_port09, 0, 0, 0, 5, 1, 2, 7, 6) << 4) & 0x1f0) ^ 0x100; else - offs = ((BITSWAP8(m_port09, 0, 0, 0, 5, 1, 2, 4, 3) << 4) & 0x1f0) ^ 0x100; + offs = ((bitswap<8>(m_port09, 0, 0, 0, 5, 1, 2, 4, 3) << 4) & 0x1f0) ^ 0x100; temp = offs; if ((source == 2) || (temp != m_curr_bank)) diff --git a/src/mame/drivers/amaticmg.cpp b/src/mame/drivers/amaticmg.cpp index d2cf7a98511..bbf0e691862 100644 --- a/src/mame/drivers/amaticmg.cpp +++ b/src/mame/drivers/amaticmg.cpp @@ -1055,7 +1055,7 @@ void amaticmg_state::encf(uint8_t ciphertext, int address, uint8_t &plaintext, i int aux = address & 0xfff; aux = aux ^ (aux>>6); aux = ((aux<<6) | (aux>>6)) & 0xfff; - uint8_t aux2 = BITSWAP8(aux, 9,10,4,1,6,0,7,3); + uint8_t aux2 = bitswap<8>(aux, 9,10,4,1,6,0,7,3); aux2 ^= aux2>>4; aux2 = (aux2<<4) | (aux2>>4); ciphertext ^= ciphertext<<4; diff --git a/src/mame/drivers/ampoker2.cpp b/src/mame/drivers/ampoker2.cpp index e5da31eb8ed..f698d41b99a 100644 --- a/src/mame/drivers/ampoker2.cpp +++ b/src/mame/drivers/ampoker2.cpp @@ -1392,7 +1392,7 @@ DRIVER_INIT_MEMBER(ampoker2_state, rabbitpk) for (i = start; i < size; i++) { - rom[i] = BITSWAP8(rom[i], 1, 2, 5, 4, 3, 0, 7, 6) ^ dec_base[(i >> 2) & 0x1f]; + rom[i] = bitswap<8>(rom[i], 1, 2, 5, 4, 3, 0, 7, 6) ^ dec_base[(i >> 2) & 0x1f]; } } diff --git a/src/mame/drivers/apc.cpp b/src/mame/drivers/apc.cpp index 98952ae0cdb..a57bea333b5 100644 --- a/src/mame/drivers/apc.cpp +++ b/src/mame/drivers/apc.cpp @@ -394,12 +394,12 @@ CH3_EXA == 0X3E ; CH-3 extended address (W) READ8_MEMBER(apc_state::apc_dma_r) { - return m_dmac->read(space, BITSWAP8(offset,7,6,5,4,2,1,0,3), 0xff); + return m_dmac->read(space, bitswap<8>(offset,7,6,5,4,2,1,0,3), 0xff); } WRITE8_MEMBER(apc_state::apc_dma_w) { - m_dmac->write(space, BITSWAP8(offset,7,6,5,4,2,1,0,3), data, 0xff); + m_dmac->write(space, bitswap<8>(offset,7,6,5,4,2,1,0,3), data, 0xff); } WRITE8_MEMBER(apc_state::apc_irq_ack_w) diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp index dcfde97b251..cd97f6e4a0d 100644 --- a/src/mame/drivers/apple2e.cpp +++ b/src/mame/drivers/apple2e.cpp @@ -743,7 +743,7 @@ void apple2e_state::machine_start() // let's do that in the modern MAME way for (int i=0; i<0x040000; i++) { - m_cec_remap[i] = BITSWAP8(m_cec_ptr[i], 0, 1, 2, 3, 4, 5, 6, 7); + m_cec_remap[i] = bitswap<8>(m_cec_ptr[i], 0, 1, 2, 3, 4, 5, 6, 7); } // remap cec gfx1 rom diff --git a/src/mame/drivers/aquarium.cpp b/src/mame/drivers/aquarium.cpp index c4278c1346d..91d8032cdb2 100644 --- a/src/mame/drivers/aquarium.cpp +++ b/src/mame/drivers/aquarium.cpp @@ -68,7 +68,7 @@ WRITE8_MEMBER(aquarium_state::aquarium_watchdog_w) WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w) { // uses bits ---x --xx - data = BITSWAP8(data, 7, 6, 5, 2, 3, 1, 4, 0); + data = bitswap<8>(data, 7, 6, 5, 2, 3, 1, 4, 0); //printf("aquarium bank %04x %04x\n", data, mem_mask); // aquarium bank 0003 00ff - correct (title) 011 @@ -82,7 +82,7 @@ WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w) uint8_t aquarium_state::aquarium_snd_bitswap( uint8_t scrambled_data ) { - return BITSWAP8(scrambled_data, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(scrambled_data, 0, 1, 2, 3, 4, 5, 6, 7); } READ8_MEMBER(aquarium_state::aquarium_oki_r) diff --git a/src/mame/drivers/arkanoid.cpp b/src/mame/drivers/arkanoid.cpp index c4c7ae8e251..eb6ed5af8af 100644 --- a/src/mame/drivers/arkanoid.cpp +++ b/src/mame/drivers/arkanoid.cpp @@ -2116,12 +2116,12 @@ DRIVER_INIT_MEMBER(arkanoid_state,block2) int srctile; // combine these into a single swap.. - srctile = BITSWAP16(tile,15,14,13,12, + srctile = bitswap<16>(tile,15,14,13,12, 11,10,9,8, 7,5,6,3, 1,2,4,0); - srctile = BITSWAP16(srctile,15,14,13,12, + srctile = bitswap<16>(srctile,15,14,13,12, 11,9,10,5, 7,6,8,4, 3,2,1,0); diff --git a/src/mame/drivers/arsystems.cpp b/src/mame/drivers/arsystems.cpp index 986b4aaadd5..9bc03bdf0e7 100644 --- a/src/mame/drivers/arsystems.cpp +++ b/src/mame/drivers/arsystems.cpp @@ -896,7 +896,7 @@ void arcadia_amiga_state::generic_decode(const char *tag, int bit7, int bit6, in /* only the low byte of ROMs are encrypted in these games */ for (i = 0; i < 0x20000/2; i++) - rom[i] = BITSWAP16(rom[i], 15,14,13,12,11,10,9,8, bit7,bit6,bit5,bit4,bit3,bit2,bit1,bit0); + rom[i] = bitswap<16>(rom[i], 15,14,13,12,11,10,9,8, bit7,bit6,bit5,bit4,bit3,bit2,bit1,bit0); #if 0 { diff --git a/src/mame/drivers/astrof.cpp b/src/mame/drivers/astrof.cpp index 5573fca56a8..18d6789e4b9 100644 --- a/src/mame/drivers/astrof.cpp +++ b/src/mame/drivers/astrof.cpp @@ -453,7 +453,7 @@ READ8_MEMBER(astrof_state::afire_coin_prot_r) READ8_MEMBER(astrof_state::tomahawk_protection_r) { /* flip the byte */ - return BITSWAP8(*m_tomahawk_protection, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(*m_tomahawk_protection, 0, 1, 2, 3, 4, 5, 6, 7); } diff --git a/src/mame/drivers/atarisy2.cpp b/src/mame/drivers/atarisy2.cpp index 4739ae4e358..c33db51c5e8 100644 --- a/src/mame/drivers/atarisy2.cpp +++ b/src/mame/drivers/atarisy2.cpp @@ -296,7 +296,7 @@ WRITE16_MEMBER(atarisy2_state::bankselect_w) };*/ int banknumber = ((data >> 10) & 0x3f) ^ 0x03; - banknumber = BITSWAP16(banknumber, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 1, 0, 3, 2); + banknumber = bitswap<16>(banknumber, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 1, 0, 3, 2); if (offset) m_rombank2->set_entry(banknumber); diff --git a/src/mame/drivers/atvtrack.cpp b/src/mame/drivers/atvtrack.cpp index 7a971b669f0..4592a980750 100644 --- a/src/mame/drivers/atvtrack.cpp +++ b/src/mame/drivers/atvtrack.cpp @@ -438,7 +438,7 @@ void get_altera10ke_eab(u8* dst, u8 *pof, int eab) for (u32 bit = 0; bit < 4096; bit++) { - u32 tbit = BITSWAP16(bit, 15, 14, 13, 12, + u32 tbit = bitswap<16>(bit, 15, 14, 13, 12, 9, 8, 7, 6, 5, 4, 3, 11, 10, 2, 1, 0); @@ -471,8 +471,8 @@ void atvtrack_state::machine_reset() { u16 lword = tdata[i * 2 + 512] | (tdata[i * 2 + 513] << 8); u16 hword = tdata[i * 2] | (tdata[i * 2 + 1] << 8); - lword = BITSWAP16(lword, 7, 9, 0, 10, 3, 11, 4, 12, 2, 15, 1, 13, 6, 8, 5, 14); - hword = BITSWAP16(hword, 5, 10, 7, 9, 6, 13, 3, 15, 2, 11, 1, 8, 0, 12, 4, 14); + lword = bitswap<16>(lword, 7, 9, 0, 10, 3, 11, 4, 12, 2, 15, 1, 13, 6, 8, 5, 14); + hword = bitswap<16>(hword, 5, 10, 7, 9, 6, 13, 3, 15, 2, 11, 1, 8, 0, 12, 4, 14); dst[i * 4 + 0] = lword & 0xff; dst[i * 4 + 1] = lword >> 8; dst[i * 4 + 2] = hword & 0xff; diff --git a/src/mame/drivers/backfire.cpp b/src/mame/drivers/backfire.cpp index 4999e338d2f..6a56f803821 100644 --- a/src/mame/drivers/backfire.cpp +++ b/src/mame/drivers/backfire.cpp @@ -687,7 +687,7 @@ void backfire_state::descramble_sound() { uint32_t addr; - addr = BITSWAP24 (x,23,22,21,0, 20, + addr = bitswap<24> (x,23,22,21,0, 20, 19,18,17,16, 15,14,13,12, 11,10,9, 8, diff --git a/src/mame/drivers/berzerk.cpp b/src/mame/drivers/berzerk.cpp index c87689ad36b..d0d19c69151 100644 --- a/src/mame/drivers/berzerk.cpp +++ b/src/mame/drivers/berzerk.cpp @@ -392,7 +392,7 @@ WRITE8_MEMBER(berzerk_state::magicram_w) uint8_t shift_flop_output = (((uint16_t)m_last_shift_data << 8) | data) >> (m_magicram_control & 0x07); if (m_magicram_control & 0x08) - shift_flop_output = BITSWAP8(shift_flop_output, 0, 1, 2, 3, 4, 5, 6, 7); + shift_flop_output = bitswap<8>(shift_flop_output, 0, 1, 2, 3, 4, 5, 6, 7); /* collision detection - AND gate output goes to the K pin of the flip-flop, while J is LO, therefore, it only resets, never sets */ diff --git a/src/mame/drivers/beta.cpp b/src/mame/drivers/beta.cpp index 61c417a5269..4d397507861 100644 --- a/src/mame/drivers/beta.cpp +++ b/src/mame/drivers/beta.cpp @@ -217,7 +217,7 @@ WRITE8_MEMBER( beta_state::riot_pa_w ) // logerror("PA %02x\n", data); /* display */ - m_segment = BITSWAP8(data, 7, 3, 4, 1, 0, 2, 5, 6) & 0x7f; + m_segment = bitswap<8>(data, 7, 3, 4, 1, 0, 2, 5, 6) & 0x7f; m_led_refresh_timer->adjust(attotime::from_usec(70)); /* EPROM data */ diff --git a/src/mame/drivers/bfm_sc4.cpp b/src/mame/drivers/bfm_sc4.cpp index 89e174d597c..8147019b82a 100644 --- a/src/mame/drivers/bfm_sc4.cpp +++ b/src/mame/drivers/bfm_sc4.cpp @@ -493,7 +493,7 @@ WRITE8_MEMBER(bfm_sc45_state::mux_output2_w) } else { - uint8_t bf7segdata = BITSWAP8(data,0,7,6,5,4,3,2,1); + uint8_t bf7segdata = bitswap<8>(data,0,7,6,5,4,3,2,1); output().set_digit_value(offset, bf7segdata); } } diff --git a/src/mame/drivers/bigbord2.cpp b/src/mame/drivers/bigbord2.cpp index 6a474cbc740..8486bdfda8d 100644 --- a/src/mame/drivers/bigbord2.cpp +++ b/src/mame/drivers/bigbord2.cpp @@ -482,7 +482,7 @@ u8 bigbord2_state::crt8002(u8 ac_ra, u8 ac_chr, u8 ac_attr, uint16_t ac_cnt, boo } break; case 1: // external mode - gfx = BITSWAP8(ac_chr, 0,1,2,3,4,5,6,7); + gfx = bitswap<8>(ac_chr, 0,1,2,3,4,5,6,7); break; case 2: // thin gfx break; diff --git a/src/mame/drivers/bking.cpp b/src/mame/drivers/bking.cpp index 3b0bc074f84..b29f06c7e67 100644 --- a/src/mame/drivers/bking.cpp +++ b/src/mame/drivers/bking.cpp @@ -42,7 +42,7 @@ WRITE8_MEMBER(bking_state::bking_sndnmi_enable_w) WRITE8_MEMBER(bking_state::bking_soundlatch_w) { - m_soundlatch->write(space, offset, BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7)); + m_soundlatch->write(space, offset, bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7)); } WRITE8_MEMBER(bking_state::bking3_addr_l_w) diff --git a/src/mame/drivers/blktiger.cpp b/src/mame/drivers/blktiger.cpp index 5911e0a29e3..5e358627f87 100644 --- a/src/mame/drivers/blktiger.cpp +++ b/src/mame/drivers/blktiger.cpp @@ -608,7 +608,7 @@ DRIVER_INIT_MEMBER(blktiger_state,blktigerb3) { int addr; - addr = BITSWAP16(i, 15,14,13,12,11,10,9,8, 3,4,5,6, 7,2,1,0); + addr = bitswap<16>(i, 15,14,13,12,11,10,9,8, 3,4,5,6, 7,2,1,0); buffer[i] = src[addr]; } diff --git a/src/mame/drivers/bloodbro.cpp b/src/mame/drivers/bloodbro.cpp index b9660c759c7..867c4acc3f6 100644 --- a/src/mame/drivers/bloodbro.cpp +++ b/src/mame/drivers/bloodbro.cpp @@ -860,7 +860,7 @@ DRIVER_INIT_MEMBER(bloodbro_state,weststry) { /* sprite roms ws25 and ws26 have 2 bits swapped there is also an address swap but that is currently handled in the video implementation */ - sprites[i] = BITSWAP8(sprites[i],7,6,4,5,3,2,1,0); + sprites[i] = bitswap<8>(sprites[i],7,6,4,5,3,2,1,0); } m_weststry_opl_irq = false; diff --git a/src/mame/drivers/bob85.cpp b/src/mame/drivers/bob85.cpp index b2e3fb24504..c3447df2c36 100644 --- a/src/mame/drivers/bob85.cpp +++ b/src/mame/drivers/bob85.cpp @@ -137,7 +137,7 @@ READ8_MEMBER(bob85_state::bob85_keyboard_r) WRITE8_MEMBER(bob85_state::bob85_7seg_w) { - output().set_digit_value(offset, BITSWAP8( data,3,2,1,0,7,6,5,4 )); + output().set_digit_value(offset, bitswap<8>( data,3,2,1,0,7,6,5,4 )); } static ADDRESS_MAP_START( bob85_mem, AS_PROGRAM, 8, bob85_state ) diff --git a/src/mame/drivers/boogwing.cpp b/src/mame/drivers/boogwing.cpp index f176751b3aa..de64ad315c5 100644 --- a/src/mame/drivers/boogwing.cpp +++ b/src/mame/drivers/boogwing.cpp @@ -97,7 +97,7 @@ READ16_MEMBER( boogwing_state::boogwing_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -106,7 +106,7 @@ READ16_MEMBER( boogwing_state::boogwing_protection_region_0_104_r ) WRITE16_MEMBER( boogwing_state::boogwing_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/bublbobl.cpp b/src/mame/drivers/bublbobl.cpp index 516e058f9e2..cf0fa1f06c9 100644 --- a/src/mame/drivers/bublbobl.cpp +++ b/src/mame/drivers/bublbobl.cpp @@ -2007,10 +2007,10 @@ DRIVER_INIT_MEMBER(bublbobl_state,dland) int i; uint8_t* src = memregion("gfx1")->base(); for (i = 0; i < 0x40000; i++) - src[i] = BITSWAP8(src[i],7,6,5,4,0,1,2,3); + src[i] = bitswap<8>(src[i],7,6,5,4,0,1,2,3); for (i = 0x40000; i < 0x80000; i++) - src[i] = BITSWAP8(src[i],7,4,5,6,3,0,1,2); + src[i] = bitswap<8>(src[i],7,4,5,6,3,0,1,2); DRIVER_INIT_CALL(common); } diff --git a/src/mame/drivers/by35.cpp b/src/mame/drivers/by35.cpp index 974b279cbee..61c582e9a6b 100644 --- a/src/mame/drivers/by35.cpp +++ b/src/mame/drivers/by35.cpp @@ -885,7 +885,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( by35_state::timer_as2888 ) { m_snd_sel = m_snd_prom[offs]; // logerror("SndSel read %02x from PROM addr %02x\n",m_snd_sel, offs ); - m_snd_sel = BITSWAP8(m_snd_sel,0,1,2,3,4,5,6,7); + m_snd_sel = bitswap<8>(m_snd_sel,0,1,2,3,4,5,6,7); m_snd_tone_gen = m_snd_sel; // logerror("SndSel=%02x, Tone=%02x, Div=%02x\n",m_snd_sel, m_snd_tone_gen, m_snd_div); diff --git a/src/mame/drivers/cabal.cpp b/src/mame/drivers/cabal.cpp index c16319c0dcb..a51f0376d79 100644 --- a/src/mame/drivers/cabal.cpp +++ b/src/mame/drivers/cabal.cpp @@ -156,12 +156,12 @@ ADDRESS_MAP_END READ8_MEMBER(cabal_state::cabalbl_snd2_r) { - return BITSWAP8(m_sound_command2, 7,2,4,5,3,6,1,0); + return bitswap<8>(m_sound_command2, 7,2,4,5,3,6,1,0); } READ8_MEMBER(cabal_state::cabalbl_snd1_r) { - return BITSWAP8(m_sound_command1, 7,2,4,5,3,6,1,0); + return bitswap<8>(m_sound_command1, 7,2,4,5,3,6,1,0); } WRITE8_MEMBER(cabal_state::cabalbl_coin_w) diff --git a/src/mame/drivers/camplynx.cpp b/src/mame/drivers/camplynx.cpp index 0424213c486..f0c76d77eab 100644 --- a/src/mame/drivers/camplynx.cpp +++ b/src/mame/drivers/camplynx.cpp @@ -319,9 +319,9 @@ d0 = read from bank 4 */ m_bankdata = data; data ^= 0x8c; // make all lines active high // do writes - m_wbyte = BITSWAP8(data, 0, 0, 0, 0, 4, 5, 6, 7) & 0x0f; // rearrange to 1,2,3,4 + m_wbyte = bitswap<8>(data, 0, 0, 0, 0, 4, 5, 6, 7) & 0x0f; // rearrange to 1,2,3,4 // do reads - uint8_t rbyte = BITSWAP8(data, 0, 0, 0, 0, 0, 1, 2, 3) & 0x0f; // rearrange to 0,1,2,4 + uint8_t rbyte = bitswap<8>(data, 0, 0, 0, 0, 0, 1, 2, 3) & 0x0f; // rearrange to 0,1,2,4 if (BIT(rbyte, 1)) rbyte &= 0x07; // remove 4 if 1 selected (AND gate in IC82) //printf("%s:%X:%X:%X\n", machine().describe_context(), data, rbyte, m_wbyte); diff --git a/src/mame/drivers/cave.cpp b/src/mame/drivers/cave.cpp index 7734583a4c2..babec0ab71b 100644 --- a/src/mame/drivers/cave.cpp +++ b/src/mame/drivers/cave.cpp @@ -5200,7 +5200,7 @@ DRIVER_INIT_MEMBER(cave_state,mazinger) { int i; for (i = 0; i < len; i++) - buffer[i ^ 0xdf88] = src[BITSWAP24(i,23,22,21,20,19,9,7,3,15,4,17,14,18,2,16,5,11,8,6,13,1,10,12,0)]; + buffer[i ^ 0xdf88] = src[bitswap<24>(i,23,22,21,20,19,9,7,3,15,4,17,14,18,2,16,5,11,8,6,13,1,10,12,0)]; memcpy(src, &buffer[0], len); } @@ -5262,7 +5262,7 @@ DRIVER_INIT_MEMBER(cave_state,pwrinst2j) { for(i = 0; i < len/2; i++) { - j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7, 2,4,6,1,5,3, 0); + j = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7, 2,4,6,1,5,3, 0); if(((j & 6) == 0) || ((j & 6) == 6)) j ^= 6; buffer[j ^ 7] = (src[i] >> 4) | (src[i] << 4); @@ -5315,7 +5315,7 @@ DRIVER_INIT_MEMBER(cave_state,sailormn) { int i; for (i = 0; i < len; i++) - buffer[i ^ 0x950c4] = src[BITSWAP24(i,23,22,21,20,15,10,12,6,11,1,13,3,16,17,2,5,14,7,18,8,4,19,9,0)]; + buffer[i ^ 0x950c4] = src[bitswap<24>(i,23,22,21,20,15,10,12,6,11,1,13,3,16,17,2,5,14,7,18,8,4,19,9,0)]; memcpy(src, &buffer[0], len); } diff --git a/src/mame/drivers/cd2650.cpp b/src/mame/drivers/cd2650.cpp index 95ffe911d2c..86aaffb4fba 100644 --- a/src/mame/drivers/cd2650.cpp +++ b/src/mame/drivers/cd2650.cpp @@ -167,7 +167,7 @@ uint32_t cd2650_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap chr = m_p_videoram[mem] & 0x3f; - gfx = m_p_chargen[(BITSWAP8(chr,7,6,2,1,0,3,4,5)<<3) | ra]; + gfx = m_p_chargen[(bitswap<8>(chr,7,6,2,1,0,3,4,5)<<3) | ra]; } /* Display a scanline of a character */ diff --git a/src/mame/drivers/centiped.cpp b/src/mame/drivers/centiped.cpp index e02caf468e6..65cde93824d 100644 --- a/src/mame/drivers/centiped.cpp +++ b/src/mame/drivers/centiped.cpp @@ -2233,7 +2233,7 @@ DRIVER_INIT_MEMBER(centiped_state,multiped) // descramble rom and put in maincpu region for (int i = 0; i < 0x10000; i++) - dest[0x10000 + (i ^ (~i << 4 & 0x1000) ^ (~i >> 3 & 0x400))] = BITSWAP8(src[BITSWAP16(i,15,14,13,1,8,11,4,7,10,5,6,9,12,0,3,2)],0,2,1,3,4,5,6,7); + dest[0x10000 + (i ^ (~i << 4 & 0x1000) ^ (~i >> 3 & 0x400))] = bitswap<8>(src[bitswap<16>(i,15,14,13,1,8,11,4,7,10,5,6,9,12,0,3,2)],0,2,1,3,4,5,6,7); // (this can be removed when prg bankswitch is implemented) memmove(dest+0x0000, dest+0x10000, 0x8000); diff --git a/src/mame/drivers/chessmst.cpp b/src/mame/drivers/chessmst.cpp index 84e21b1e24b..6dddf2ce6e6 100644 --- a/src/mame/drivers/chessmst.cpp +++ b/src/mame/drivers/chessmst.cpp @@ -253,7 +253,7 @@ void chessmst_state::update_display() for(int i=0; i<4; i++) { if (BIT(m_digit_matrix, i)) - output().set_indexed_value("digit", i, BITSWAP16(m_digit, 3,5,12,10,14,1,2,13,8,6,11,15,7,9,4,0) | (m_digit_dot << 16)); + output().set_indexed_value("digit", i, bitswap<16>(m_digit, 3,5,12,10,14,1,2,13,8,6,11,15,7,9,4,0) | (m_digit_dot << 16)); } } diff --git a/src/mame/drivers/chesstrv.cpp b/src/mame/drivers/chesstrv.cpp index 0e0434ace56..29bfdcab7e6 100644 --- a/src/mame/drivers/chesstrv.cpp +++ b/src/mame/drivers/chesstrv.cpp @@ -64,7 +64,7 @@ WRITE8_MEMBER( chesstrv_state::ram_w ) WRITE8_MEMBER( chesstrv_state::display_w ) { - uint8_t seg_data = BITSWAP8(data,0,1,2,3,4,5,6,7); + uint8_t seg_data = bitswap<8>(data,0,1,2,3,4,5,6,7); if(!(m_matrix & 0x01)) output().set_digit_value( 3, seg_data ); diff --git a/src/mame/drivers/chsuper.cpp b/src/mame/drivers/chsuper.cpp index 801d490ff8e..6934ba074fd 100644 --- a/src/mame/drivers/chsuper.cpp +++ b/src/mame/drivers/chsuper.cpp @@ -528,9 +528,9 @@ DRIVER_INIT_MEMBER(chsuper_state,chmpnum) j = i ^ (m_tilexor << 5); - j = BITSWAP24(j,23,22,21,20,19,18,17,13, 15,14,16,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); - j = BITSWAP24(j,23,22,21,20,19,18,17,14, 15,16,13,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); - j = BITSWAP24(j,23,22,21,20,19,18,17,15, 16,14,13,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); + j = bitswap<24>(j,23,22,21,20,19,18,17,13, 15,14,16,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); + j = bitswap<24>(j,23,22,21,20,19,18,17,14, 15,16,13,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); + j = bitswap<24>(j,23,22,21,20,19,18,17,15, 16,14,13,12, 11,10,9,8, 7,6,5,4, 3,2,1,0); buffer[j] = rom[i]; } diff --git a/src/mame/drivers/cninja.cpp b/src/mame/drivers/cninja.cpp index 64614342aff..2a5b9608726 100644 --- a/src/mame/drivers/cninja.cpp +++ b/src/mame/drivers/cninja.cpp @@ -85,7 +85,7 @@ WRITE16_MEMBER(cninja_state::cninja_pf34_control_w) READ16_MEMBER( cninja_state::cninja_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -94,7 +94,7 @@ READ16_MEMBER( cninja_state::cninja_protection_region_0_104_r ) WRITE16_MEMBER( cninja_state::cninja_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -167,7 +167,7 @@ ADDRESS_MAP_END READ16_MEMBER( cninja_state::sshangha_protection_region_8_146_r ) { int real_address = 0x1a0000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -176,7 +176,7 @@ READ16_MEMBER( cninja_state::sshangha_protection_region_8_146_r ) WRITE16_MEMBER( cninja_state::sshangha_protection_region_8_146_w ) { int real_address = 0x1a0000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -186,7 +186,7 @@ READ16_MEMBER( cninja_state::sshangha_protection_region_6_146_r ) // uint16_t realdat = deco16_60_prot_r(space,offset&0x3ff,mem_mask); int real_address = 0x198000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); @@ -203,7 +203,7 @@ WRITE16_MEMBER( cninja_state::sshangha_protection_region_6_146_w ) int real_address = 0x198000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -273,7 +273,7 @@ ADDRESS_MAP_END READ16_MEMBER( cninja_state::mutantf_protection_region_0_146_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -282,7 +282,7 @@ READ16_MEMBER( cninja_state::mutantf_protection_region_0_146_r ) WRITE16_MEMBER( cninja_state::mutantf_protection_region_0_146_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/cntsteer.cpp b/src/mame/drivers/cntsteer.cpp index 20e63ae41df..79a317231a5 100644 --- a/src/mame/drivers/cntsteer.cpp +++ b/src/mame/drivers/cntsteer.cpp @@ -488,7 +488,7 @@ WRITE8_MEMBER(cntsteer_state::cntsteer_background_w) /* checks area 0x2000-0x2fff with this address config. */ READ8_MEMBER(cntsteer_state::cntsteer_background_mirror_r) { - return m_videoram2[BITSWAP16(offset,15,14,13,12,5,4,3,2,1,0,11,10,9,8,7,6)]; + return m_videoram2[bitswap<16>(offset,15,14,13,12,5,4,3,2,1,0,11,10,9,8,7,6)]; } /************************************* diff --git a/src/mame/drivers/coinmstr.cpp b/src/mame/drivers/coinmstr.cpp index b95ad8d7058..8f1d297392f 100644 --- a/src/mame/drivers/coinmstr.cpp +++ b/src/mame/drivers/coinmstr.cpp @@ -1540,8 +1540,8 @@ DRIVER_INIT_MEMBER(coinmstr_state,coinmstr) for(i = 0; i < length; i++) { - int adr = BITSWAP24(i, 23,22,21,20,19,18,17,16,15, 14,8,7,2,5,12,10,9,11,13,3,6,0,1,4); - rom[i] = BITSWAP8(buf[adr],3,2,4,1,5,0,6,7); + int adr = bitswap<24>(i, 23,22,21,20,19,18,17,16,15, 14,8,7,2,5,12,10,9,11,13,3,6,0,1,4); + rom[i] = bitswap<8>(buf[adr],3,2,4,1,5,0,6,7); } } diff --git a/src/mame/drivers/coolpool.cpp b/src/mame/drivers/coolpool.cpp index 80cab473371..ab09d052777 100644 --- a/src/mame/drivers/coolpool.cpp +++ b/src/mame/drivers/coolpool.cpp @@ -1145,13 +1145,13 @@ DRIVER_INIT_MEMBER(coolpool_state,9ballsht) hi = rom[a] >> 8; lo = rom[a] & 0xff; - nhi = BITSWAP8(hi,5,2,0,7,6,4,3,1) ^ 0x29; + nhi = bitswap<8>(hi,5,2,0,7,6,4,3,1) ^ 0x29; if (hi & 0x01) nhi ^= 0x03; if (hi & 0x10) nhi ^= 0xc1; if (hi & 0x20) nhi ^= 0x40; if (hi & 0x40) nhi ^= 0x12; - nlo = BITSWAP8(lo,5,3,4,6,7,1,2,0) ^ 0x80; + nlo = bitswap<8>(lo,5,3,4,6,7,1,2,0) ^ 0x80; if ((lo & 0x02) && (lo & 0x04)) nlo ^= 0x01; if (lo & 0x04) nlo ^= 0x0c; if (lo & 0x08) nlo ^= 0x10; diff --git a/src/mame/drivers/cops.cpp b/src/mame/drivers/cops.cpp index e1238dc481f..7a2af7b71e0 100644 --- a/src/mame/drivers/cops.cpp +++ b/src/mame/drivers/cops.cpp @@ -200,7 +200,7 @@ uint32_t cops_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, WRITE8_MEMBER(cops_state::cdrom_data_w) { const char *regs[4] = { "CMD", "PARAM", "WRITE", "CTRL" }; - m_cdrom_data = BITSWAP8(data,0,1,2,3,4,5,6,7); + m_cdrom_data = bitswap<8>(data,0,1,2,3,4,5,6,7); uint8_t reg = ((m_cdrom_ctrl & 4) >> 1) | ((m_cdrom_ctrl & 8) >> 3); if (LOG_CDROM) logerror("%s:cdrom_data_w(reg = %s, data = %02x)\n", machine().describe_context(), regs[reg & 0x03], m_cdrom_data); } @@ -647,7 +647,7 @@ WRITE8_MEMBER(cops_state::io1_w) { sprintf(output_name, "digit%d", i); display_data = m_lcd_data_l | (m_lcd_data_h << 8); - display_data = BITSWAP16(display_data, 4, 5, 12, 1, 0, 11, 10, 6, 7, 2, 9, 3, 15, 8, 14, 13); + display_data = bitswap<16>(display_data, 4, 5, 12, 1, 0, 11, 10, 6, 7, 2, 9, 3, 15, 8, 14, 13); output().set_value(output_name, display_data); } } @@ -757,7 +757,7 @@ WRITE_LINE_MEMBER(cops_state::via1_irq) WRITE8_MEMBER(cops_state::via1_b_w) { - m_sn_data = BITSWAP8(data,0,1,2,3,4,5,6,7); + m_sn_data = bitswap<8>(data,0,1,2,3,4,5,6,7); if (m_sn_cb1) { m_sn->write(space,0,m_sn_data); diff --git a/src/mame/drivers/cvs.cpp b/src/mame/drivers/cvs.cpp index 8581b6b4a36..2c65f6b02a2 100644 --- a/src/mame/drivers/cvs.cpp +++ b/src/mame/drivers/cvs.cpp @@ -1572,7 +1572,7 @@ DRIVER_INIT_MEMBER(cvs_state,hunchbaka) /* data lines D2 and D5 swapped */ for (offs = 0; offs < 0x7400; offs++) - ROM[offs] = BITSWAP8(ROM[offs],7,6,2,4,3,5,1,0); + ROM[offs] = bitswap<8>(ROM[offs],7,6,2,4,3,5,1,0); } @@ -1638,7 +1638,7 @@ DRIVER_INIT_MEMBER(cvs_state,raiders) /* data lines D1 and D6 swapped */ for (offs = 0; offs < 0x7400; offs++) - ROM[offs] = BITSWAP8(ROM[offs],7,1,5,4,3,2,6,0); + ROM[offs] = bitswap<8>(ROM[offs],7,1,5,4,3,2,6,0); /* patch out protection */ ROM[0x010a] = 0xc0; diff --git a/src/mame/drivers/cybertnk.cpp b/src/mame/drivers/cybertnk.cpp index 27893cc5a88..666695fac32 100644 --- a/src/mame/drivers/cybertnk.cpp +++ b/src/mame/drivers/cybertnk.cpp @@ -982,7 +982,7 @@ DRIVER_INIT_MEMBER(cybertnk_state,cybertnk) // reorder the data to simplify sprite drawing // we draw 8 pixels at a time, each each nibble contains a pixel, however the original order of 32-bits (8 pixels) // is along the lines of 04 15 26 37 which is awkward to use - spr[x] = BITSWAP32(spr[x], 27,26,25,24, 19,18,17,16, 11,10,9,8, 3,2,1,0, 31,30,29,28, 23,22,21,20, 15,14,13,12, 7,6,5,4 ); + spr[x] = bitswap<32>(spr[x], 27,26,25,24, 19,18,17,16, 11,10,9,8, 3,2,1,0, 31,30,29,28, 23,22,21,20, 15,14,13,12, 7,6,5,4 ); } } diff --git a/src/mame/drivers/dambustr.cpp b/src/mame/drivers/dambustr.cpp index 90351597714..ca7c0047e6a 100644 --- a/src/mame/drivers/dambustr.cpp +++ b/src/mame/drivers/dambustr.cpp @@ -220,7 +220,7 @@ DRIVER_INIT_MEMBER(dambustr_state,dambustr) // Bit swap addresses for(i=0; i<4096*4; i++) { - rom[i] = usr[BITSWAP16(i,15,14,13,12, 4,10,9,8,7,6,5,3,11,2,1,0)]; + rom[i] = usr[bitswap<16>(i,15,14,13,12, 4,10,9,8,7,6,5,3,11,2,1,0)]; }; // Swap program ROMs @@ -233,9 +233,9 @@ DRIVER_INIT_MEMBER(dambustr_state,dambustr) // Bit swap in $1000-$1fff and $4000-$5fff for(i=0; i<0x1000; i++) { - rom[0x1000+i] = BITSWAP8(rom[0x1000+i],7,6,5,1,3,2,4,0); - rom[0x4000+i] = BITSWAP8(rom[0x4000+i],7,6,5,1,3,2,4,0); - rom[0x5000+i] = BITSWAP8(rom[0x5000+i],7,6,5,1,3,2,4,0); + rom[0x1000+i] = bitswap<8>(rom[0x1000+i],7,6,5,1,3,2,4,0); + rom[0x4000+i] = bitswap<8>(rom[0x4000+i],7,6,5,1,3,2,4,0); + rom[0x5000+i] = bitswap<8>(rom[0x5000+i],7,6,5,1,3,2,4,0); }; // Swap graphics ROMs diff --git a/src/mame/drivers/darkmist.cpp b/src/mame/drivers/darkmist.cpp index de4202807d2..3329aae6f7b 100644 --- a/src/mame/drivers/darkmist.cpp +++ b/src/mame/drivers/darkmist.cpp @@ -336,7 +336,7 @@ void darkmist_state::decrypt_fgbgtiles(uint8_t* rom, int size) w1 = (rom[i + 0*size/2] << 8) + rom[i + 1*size/2]; - w1 = BITSWAP16(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); + w1 = bitswap<16>(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); buf[i + 0*size/2] = w1 >> 8; buf[i + 1*size/2] = w1 & 0xff; @@ -345,7 +345,7 @@ void darkmist_state::decrypt_fgbgtiles(uint8_t* rom, int size) /* address lines */ for (int i = 0;i < size;i++) { - rom[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13, 5,4,3,2, 12,11,10,9,8, 1,0, 7,6)]; + rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13, 5,4,3,2, 12,11,10,9,8, 1,0, 7,6)]; } } @@ -368,7 +368,7 @@ void darkmist_state::decrypt_gfx() w1 = (rom[i + 0*size/2] << 8) + rom[i + 1*size/2]; - w1 = BITSWAP16(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); + w1 = bitswap<16>(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); buf[i + 0*size/2] = w1 >> 8; buf[i + 1*size/2] = w1 & 0xff; @@ -377,7 +377,7 @@ void darkmist_state::decrypt_gfx() /* address lines */ for (i = 0;i < size;i++) { - rom[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12, 3,2,1, 11,10,9,8, 0, 7,6,5,4)]; + rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12, 3,2,1, 11,10,9,8, 0, 7,6,5,4)]; } decrypt_fgbgtiles(memregion("bg_gfx")->base(), memregion("bg_gfx")->bytes()); @@ -394,7 +394,7 @@ void darkmist_state::decrypt_gfx() w1 = (rom[i + 0*size/2] << 8) + rom[i + 1*size/2]; - w1 = BITSWAP16(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); + w1 = bitswap<16>(w1, 9,14,7,2, 6,8,3,15, 10,13,5,12, 0,11,4,1); buf[i + 0*size/2] = w1 >> 8; buf[i + 1*size/2] = w1 & 0xff; @@ -403,7 +403,7 @@ void darkmist_state::decrypt_gfx() /* address lines */ for (i = 0;i < size;i++) { - rom[i] = buf[BITSWAP24(i, 23,22,21,20,19,18,17,16,15,14, 12,11,10,9,8, 5,4,3, 13, 7,6, 1,0, 2)]; + rom[i] = buf[bitswap<24>(i, 23,22,21,20,19,18,17,16,15,14, 12,11,10,9,8, 5,4,3, 13, 7,6, 1,0, 2)]; } } @@ -412,7 +412,7 @@ void darkmist_state::decrypt_snd() uint8_t *ROM = memregion("t5182_z80")->base(); for (int i = 0x0000; i < 0x8000; i++) - ROM[i] = BITSWAP8(ROM[i], 7, 1, 2, 3, 4, 5, 6, 0); + ROM[i] = bitswap<8>(ROM[i], 7, 1, 2, 3, 4, 5, 6, 0); } DRIVER_INIT_MEMBER(darkmist_state,darkmist) @@ -441,8 +441,8 @@ DRIVER_INIT_MEMBER(darkmist_state,darkmist) if((i & 0x220) != 0x200) { - p = BITSWAP8(p, 7,6,5,2,3,4,1,0); - d = BITSWAP8(d, 7,6,5,2,3,4,1,0); + p = bitswap<8>(p, 7,6,5,2,3,4,1,0); + d = bitswap<8>(d, 7,6,5,2,3,4,1,0); } ROM[i] = d; @@ -458,7 +458,7 @@ DRIVER_INIT_MEMBER(darkmist_state,darkmist) for(i=0;i(i,23,22,21,20,19,18,17,16,7,6,5,4,3,15,14,13,12,9,8,2,1,11,10, 0)]; } @@ -467,7 +467,7 @@ DRIVER_INIT_MEMBER(darkmist_state,darkmist) memcpy( &buffer[0], ROM, len ); for(i=0;i(i,23,22,21,20,19,18,17,16,15 ,6,5,4,3,12,11,10,9,14,13,2,1,8,7 ,0 )]; } } diff --git a/src/mame/drivers/datum.cpp b/src/mame/drivers/datum.cpp index 4525617cc4c..cdeafa1f3d9 100644 --- a/src/mame/drivers/datum.cpp +++ b/src/mame/drivers/datum.cpp @@ -161,7 +161,7 @@ WRITE8_MEMBER( datum_state::pa_w ) data ^= 0xff; if (m_keydata > 3) { - output().set_digit_value(m_keydata, BITSWAP8(data & 0x7f, 7, 0, 5, 6, 4, 2, 1, 3)); + output().set_digit_value(m_keydata, bitswap<8>(data & 0x7f, 7, 0, 5, 6, 4, 2, 1, 3)); m_keydata = 0; } @@ -171,7 +171,7 @@ WRITE8_MEMBER( datum_state::pa_w ) // select keyboard row, select a digit WRITE8_MEMBER( datum_state::pb_w ) { - m_keydata = BITSWAP8(data, 7, 6, 5, 4, 0, 1, 2, 3) & 15; + m_keydata = bitswap<8>(data, 7, 6, 5, 4, 0, 1, 2, 3) & 15; return; } diff --git a/src/mame/drivers/dblewing.cpp b/src/mame/drivers/dblewing.cpp index bf8a806d051..8ca06f27bb5 100644 --- a/src/mame/drivers/dblewing.cpp +++ b/src/mame/drivers/dblewing.cpp @@ -148,7 +148,7 @@ uint32_t dblewing_state::screen_update_dblewing(screen_device &screen, bitmap_in READ16_MEMBER( dblewing_state::wf_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -157,7 +157,7 @@ READ16_MEMBER( dblewing_state::wf_protection_region_0_104_r ) WRITE16_MEMBER( dblewing_state::wf_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/ddragon.cpp b/src/mame/drivers/ddragon.cpp index 6af28a90358..9aad91084b6 100644 --- a/src/mame/drivers/ddragon.cpp +++ b/src/mame/drivers/ddragon.cpp @@ -231,7 +231,7 @@ WRITE8_MEMBER(darktowr_state::darktowr_mcu_bank_w) if (offset == 0x1400 || offset == 0) { - uint8_t const value(BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7)); + uint8_t const value(bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7)); m_mcu->pb_w(space, 0, value); logerror("MCU PORT 1 -> %04x (from %04x)\n", value, data); } @@ -2116,27 +2116,27 @@ DRIVER_INIT_MEMBER(toffy_state, toffy) rom = memregion("maincpu")->base(); length = memregion("maincpu")->bytes(); for (i = 0; i < length; i++) - rom[i] = BITSWAP8(rom[i], 6,7,5,4,3,2,1,0); + rom[i] = bitswap<8>(rom[i], 6,7,5,4,3,2,1,0); /* and the fg gfx ... */ rom = memregion("gfx1")->base(); length = memregion("gfx1")->bytes(); for (i = 0; i < length; i++) - rom[i] = BITSWAP8(rom[i], 7,6,5,3,4,2,1,0); + rom[i] = bitswap<8>(rom[i], 7,6,5,3,4,2,1,0); /* and the sprites gfx */ rom = memregion("gfx2")->base(); length = memregion("gfx2")->bytes(); for (i = 0; i < length; i++) - rom[i] = BITSWAP8(rom[i], 7,6,5,4,3,2,0,1); + rom[i] = bitswap<8>(rom[i], 7,6,5,4,3,2,0,1); /* and the bg gfx */ rom = memregion("gfx3")->base(); length = memregion("gfx3")->bytes(); for (i = 0; i < length / 2; i++) { - rom[i + 0*length/2] = BITSWAP8(rom[i + 0*length/2], 7,6,1,4,3,2,5,0); - rom[i + 1*length/2] = BITSWAP8(rom[i + 1*length/2], 7,6,2,4,3,5,1,0); + rom[i + 0*length/2] = bitswap<8>(rom[i + 0*length/2], 7,6,1,4,3,2,5,0); + rom[i + 1*length/2] = bitswap<8>(rom[i + 1*length/2], 7,6,2,4,3,5,1,0); } /* should the sound rom be bitswapped too? */ diff --git a/src/mame/drivers/de_2.cpp b/src/mame/drivers/de_2.cpp index c3e0dc5c1f5..1a458e877fa 100644 --- a/src/mame/drivers/de_2.cpp +++ b/src/mame/drivers/de_2.cpp @@ -288,7 +288,7 @@ WRITE8_MEMBER( de_2_state::dig1_w ) m_segment2 |= 0x30000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } @@ -299,7 +299,7 @@ WRITE8_MEMBER( de_2_state::type2alpha3_dig1_w ) m_segment2 |= 0x20000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } @@ -310,7 +310,7 @@ WRITE8_MEMBER( de_2_state::alpha3_dig1_w ) m_segment2 |= 0x20000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } @@ -332,7 +332,7 @@ WRITE8_MEMBER( de_2_state::pia2c_pa_w ) m_segment1 |= 0x10000; if ((m_segment1 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment1 |= 0x40000; } } @@ -343,7 +343,7 @@ WRITE8_MEMBER( de_2_state::pia2c_pb_w ) m_segment1 |= 0x20000; if ((m_segment1 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment1 |= 0x40000; } } @@ -383,7 +383,7 @@ WRITE8_MEMBER( de_2_state::type2alpha3_pia34_pa_w ) m_segment2 |= 0x10000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } @@ -394,7 +394,7 @@ WRITE8_MEMBER( de_2_state::alpha3_pia34_pa_w ) m_segment2 |= 0x10000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } diff --git a/src/mame/drivers/de_3.cpp b/src/mame/drivers/de_3.cpp index 4086fab7d20..1101e44e18c 100644 --- a/src/mame/drivers/de_3.cpp +++ b/src/mame/drivers/de_3.cpp @@ -211,9 +211,9 @@ WRITE8_MEMBER( de_3_state::dig1_w ) // if ((m_segment2 & 0x70000) == 0x30000) // { // if(m_is_alpha3) // Alphanumeric type 2 uses 7 segment LEDs on the bottom row, type 3 uses 14 segment LEDs -// output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); +// output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); // else -// output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); +// output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 11, 15, 12, 10, 8, 14, 13, 9, 7, 6, 5, 4, 3, 2, 1, 0)); // m_segment2 |= 0x40000; // } } @@ -246,7 +246,7 @@ WRITE8_MEMBER( de_3_state::pia2c_pa_w ) // m_segment1 |= 0x10000; // if ((m_segment1 & 0x70000) == 0x30000) // { -// output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); +// output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); // m_segment1 |= 0x40000; // } } @@ -278,7 +278,7 @@ WRITE8_MEMBER( de_3_state::pia2c_pb_w ) // m_segment1 |= 0x20000; // if ((m_segment1 & 0x70000) == 0x30000) // { -// output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); +// output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); // m_segment1 |= 0x40000; // } } @@ -312,7 +312,7 @@ WRITE8_MEMBER( de_3_state::pia34_pa_w ) // m_segment2 |= 0x10000; // if ((m_segment2 & 0x70000) == 0x30000) // { -// output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); +// output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); // m_segment2 |= 0x40000; // } } diff --git a/src/mame/drivers/deco156.cpp b/src/mame/drivers/deco156.cpp index 3cb1cddf1dd..7464130722c 100644 --- a/src/mame/drivers/deco156.cpp +++ b/src/mame/drivers/deco156.cpp @@ -647,7 +647,7 @@ void deco156_state::descramble_sound( const char *tag ) { uint32_t addr; - addr = BITSWAP24 (x,23,22,21,0, 20, + addr = bitswap<24> (x,23,22,21,0, 20, 19,18,17,16, 15,14,13,12, 11,10,9, 8, diff --git a/src/mame/drivers/deco32.cpp b/src/mame/drivers/deco32.cpp index c0f59bd8bdb..a561781860e 100644 --- a/src/mame/drivers/deco32.cpp +++ b/src/mame/drivers/deco32.cpp @@ -670,7 +670,7 @@ ADDRESS_MAP_END READ16_MEMBER( deco32_state::ioprot_r ) { offs_t real_address = 0 + (offset *2); - offs_t deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + offs_t deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; return m_ioprot->read_data( deco146_addr, mem_mask, cs ); @@ -679,7 +679,7 @@ READ16_MEMBER( deco32_state::ioprot_r ) WRITE16_MEMBER( deco32_state::ioprot_w ) { offs_t real_address = 0 + (offset *2); - offs_t deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + offs_t deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_ioprot->write_data( space, deco146_addr, data, mem_mask, cs ); @@ -760,7 +760,7 @@ WRITE_LINE_MEMBER( nslasher_state::tattass_sound_irq_w ) { uint8_t data = m_ioprot->soundlatch_r(machine().dummy_space(), 0); // Swap bits 0 and 3 to correct for design error from BSMT schematic - data = BITSWAP8(data, 7, 6, 5, 4, 0, 2, 1, 3); + data = bitswap<8>(data, 7, 6, 5, 4, 0, 2, 1, 3); m_decobsmt->bsmt_comms_w(machine().dummy_space(), 0, data); } } diff --git a/src/mame/drivers/deco_mlc.cpp b/src/mame/drivers/deco_mlc.cpp index f828fa999ef..3a6051e097b 100644 --- a/src/mame/drivers/deco_mlc.cpp +++ b/src/mame/drivers/deco_mlc.cpp @@ -273,7 +273,7 @@ WRITE32_MEMBER( deco_mlc_state::mlc_spriteram_w ) READ16_MEMBER( deco_mlc_state::sh96_protection_region_0_146_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -282,7 +282,7 @@ READ16_MEMBER( deco_mlc_state::sh96_protection_region_0_146_r ) WRITE16_MEMBER( deco_mlc_state::sh96_protection_region_0_146_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -887,7 +887,7 @@ void deco_mlc_state::descramble_sound( ) { uint32_t addr; - addr = BITSWAP24 (x,23,22,21,0, 20, + addr = bitswap<24> (x,23,22,21,0, 20, 19,18,17,16, 15,14,13,12, 11,10,9, 8, diff --git a/src/mame/drivers/decocass.cpp b/src/mame/drivers/decocass.cpp index dbe3192353c..dbed82ba253 100644 --- a/src/mame/drivers/decocass.cpp +++ b/src/mame/drivers/decocass.cpp @@ -945,7 +945,7 @@ PALETTE_INIT_MEMBER(decocass_state, decocass) for (i = 0; i < 32; i++) { palette.set_pen_indirect(i, i); - palette.set_pen_indirect(32+i, BITSWAP8(i, 7, 6, 5, 4, 3, 1, 2, 0)); + palette.set_pen_indirect(32+i, bitswap<8>(i, 7, 6, 5, 4, 3, 1, 2, 0)); } } diff --git a/src/mame/drivers/didact.cpp b/src/mame/drivers/didact.cpp index 7258d24df52..917350d8bd7 100644 --- a/src/mame/drivers/didact.cpp +++ b/src/mame/drivers/didact.cpp @@ -268,7 +268,7 @@ WRITE8_MEMBER( md6802_state::pia2_kbB_w ) // LOG("--->%s(%02x)\n", FUNCNAME, data); /* Store the segment pattern but do not lit up the digit here, done by pulling the correct cathode low on Port A */ - m_segments = BITSWAP8(data, 0, 4, 5, 3, 2, 1, 7, 6); + m_segments = bitswap<8>(data, 0, 4, 5, 3, 2, 1, 7, 6); } WRITE_LINE_MEMBER( md6802_state::pia2_ca2_w ) diff --git a/src/mame/drivers/dietgo.cpp b/src/mame/drivers/dietgo.cpp index 8321a56ccd7..fb71b277e68 100644 --- a/src/mame/drivers/dietgo.cpp +++ b/src/mame/drivers/dietgo.cpp @@ -37,7 +37,7 @@ PAL16R6A 11H READ16_MEMBER( dietgo_state::dietgo_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -46,7 +46,7 @@ READ16_MEMBER( dietgo_state::dietgo_protection_region_0_104_r ) WRITE16_MEMBER( dietgo_state::dietgo_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/digel804.cpp b/src/mame/drivers/digel804.cpp index 95378832eec..cd52cf43741 100644 --- a/src/mame/drivers/digel804.cpp +++ b/src/mame/drivers/digel804.cpp @@ -315,7 +315,7 @@ READ8_MEMBER( digel804_state::ip46 ) // keypad read logerror("Digel804: returning %02X for port 46 keypad read\n", kbd); #endif - return BITSWAP8(kbd,7,6,5,4,1,0,3,2); // verified from schematics + return bitswap<8>(kbd,7,6,5,4,1,0,3,2); // verified from schematics } WRITE8_MEMBER( digel804_state::op46 ) diff --git a/src/mame/drivers/divebomb.cpp b/src/mame/drivers/divebomb.cpp index bb1bcfd65e1..0668f081a11 100644 --- a/src/mame/drivers/divebomb.cpp +++ b/src/mame/drivers/divebomb.cpp @@ -251,7 +251,7 @@ ADDRESS_MAP_END WRITE8_MEMBER(divebomb_state::rozcpu_bank_w) { - uint32_t bank = BITSWAP8(data, 4, 5, 6, 7, 3, 2, 1, 0) >> 4; + uint32_t bank = bitswap<8>(data, 4, 5, 6, 7, 3, 2, 1, 0) >> 4; m_bank1->set_entry(bank); if (data & 0x0f) diff --git a/src/mame/drivers/dkong.cpp b/src/mame/drivers/dkong.cpp index 06348358273..53e95b3cffd 100644 --- a/src/mame/drivers/dkong.cpp +++ b/src/mame/drivers/dkong.cpp @@ -1655,8 +1655,8 @@ void dkong_state::braze_decrypt_rom(uint8_t *dest) { oldbyte = ROM[mem]; - newmem = ((BITSWAP8((mem >> 8),7,2,3,1,0,6,4,5))<<8) | (mem & 0xff); - newbyte = BITSWAP8(oldbyte, 1,4,5,7,6,0,3,2); + newmem = ((bitswap<8>((mem >> 8),7,2,3,1,0,6,4,5))<<8) | (mem & 0xff); + newbyte = bitswap<8>(oldbyte, 1,4,5,7,6,0,3,2); dest[newmem] = newbyte; } @@ -3248,7 +3248,7 @@ void dkong_state::drakton_decrypt_rom(uint8_t mod, int offs, int *bs) PAL10H8 driven by the counter. */ newbyte = (oldbyte & mod) | (~oldbyte & ~mod); - newbyte = BITSWAP8(newbyte, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]); + newbyte = bitswap<8>(newbyte, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]); ROM[mem + offs] = newbyte; } diff --git a/src/mame/drivers/dreambal.cpp b/src/mame/drivers/dreambal.cpp index 3e0e5714571..ef4899e0096 100644 --- a/src/mame/drivers/dreambal.cpp +++ b/src/mame/drivers/dreambal.cpp @@ -96,7 +96,7 @@ uint32_t dreambal_state::screen_update_dreambal(screen_device &screen, bitmap_in READ16_MEMBER( dreambal_state::dreambal_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -105,7 +105,7 @@ READ16_MEMBER( dreambal_state::dreambal_protection_region_0_104_r ) WRITE16_MEMBER( dreambal_state::dreambal_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/dynax.cpp b/src/mame/drivers/dynax.cpp index dc4ec3aef85..6d06ce33efe 100644 --- a/src/mame/drivers/dynax.cpp +++ b/src/mame/drivers/dynax.cpp @@ -317,9 +317,9 @@ void dynax_state::hnoridur_palette_update(offs_t offset) { int x = (m_palette_ram[256 * m_palbank + offset] << 8) + m_palette_ram[256 * m_palbank + offset + 16 * 256]; /* The bits are in reverse order! */ - int r = BITSWAP8((x >> 0) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); - int g = BITSWAP8((x >> 5) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); - int b = BITSWAP8((x >> 10) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int r = bitswap<8>((x >> 0) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int g = bitswap<8>((x >> 5) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int b = bitswap<8>((x >> 10) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); m_palette->set_pen_color(256 * m_palbank + offset, pal5bit(r), pal5bit(g), pal5bit(b)); } @@ -5345,7 +5345,7 @@ DRIVER_INIT_MEMBER(dynax_state,blktouch) for (i = 0; i < 0x90000; i++) { - src[i] = BITSWAP8(src[i], 7, 6, 5, 3, 4, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 6, 5, 3, 4, 2, 1, 0); } @@ -5353,7 +5353,7 @@ DRIVER_INIT_MEMBER(dynax_state,blktouch) for (i = 0; i < 0xc0000; i++) { - src[i] = BITSWAP8(src[i], 7, 6, 5, 3, 4, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 6, 5, 3, 4, 2, 1, 0); } } @@ -5387,7 +5387,7 @@ DRIVER_INIT_MEMBER(dynax_state,maya) std::vector rom(0xc0000); memcpy(&rom[0], gfx, 0xc0000); for (i = 0; i < 0xc0000; i++) - gfx[i] = rom[BITSWAP24(i, 23, 22, 21, 20, 19, 18, 14, 15, 16, 17, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)]; + gfx[i] = rom[bitswap<24>(i, 23, 22, 21, 20, 19, 18, 14, 15, 16, 17, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)]; } } @@ -5404,7 +5404,7 @@ DRIVER_INIT_MEMBER(dynax_state,mayac) std::vector rom(0xc0000); memcpy(&rom[0], gfx, 0xc0000); for (i = 0; i < 0xc0000; i++) - gfx[i] = rom[BITSWAP24(i, 23, 22, 21, 20, 19, 18, 17, 14, 16, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)]; + gfx[i] = rom[bitswap<24>(i, 23, 22, 21, 20, 19, 18, 17, 14, 16, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)]; } } @@ -6324,7 +6324,7 @@ DRIVER_INIT_MEMBER(dynax_state,mjelct3) memcpy(&rom1[0], rom, size); for (i = 0; i < size; i++) - rom[i] = BITSWAP8(rom1[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8, 1,6,5,4,3,2,7, 0)], 7,6, 1,4,3,2,5,0); + rom[i] = bitswap<8>(rom1[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8, 1,6,5,4,3,2,7, 0)], 7,6, 1,4,3,2,5,0); } DRIVER_INIT_MEMBER(dynax_state,mjelct3a) diff --git a/src/mame/drivers/eacc.cpp b/src/mame/drivers/eacc.cpp index ee95ce8c8e1..416d4fe79ad 100644 --- a/src/mame/drivers/eacc.cpp +++ b/src/mame/drivers/eacc.cpp @@ -218,7 +218,7 @@ WRITE8_MEMBER( eacc_state::eacc_segment_w ) { for (i = 3; i < 7; i++) if (BIT(m_digit, i)) - output().set_digit_value(i, BITSWAP8(data, 7, 0, 1, 4, 5, 6, 2, 3)); + output().set_digit_value(i, bitswap<8>(data, 7, 0, 1, 4, 5, 6, 2, 3)); } } } diff --git a/src/mame/drivers/ecoinf3.cpp b/src/mame/drivers/ecoinf3.cpp index 65de23155e8..2a990dc2f3d 100644 --- a/src/mame/drivers/ecoinf3.cpp +++ b/src/mame/drivers/ecoinf3.cpp @@ -351,7 +351,7 @@ static const uint16_t ecoin_charset[]= static uint32_t set_display(uint32_t segin) { - return BITSWAP32(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); + return bitswap<32>(segin, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,11,9,15,13,12,8,10,14,7,6,5,4,3,2,1,0); } void ecoinf3_state::update_display() diff --git a/src/mame/drivers/ecoinfr.cpp b/src/mame/drivers/ecoinfr.cpp index c92704d99dc..c72a1260f24 100644 --- a/src/mame/drivers/ecoinfr.cpp +++ b/src/mame/drivers/ecoinfr.cpp @@ -323,7 +323,7 @@ WRITE8_MEMBER(ecoinfr_state::ec_port0d_out_cred_data_w) { if (m_credsel!=0xff) { - uint8_t bf7segdata = BITSWAP8(data,7,0,1,2,3,4,5,6); + uint8_t bf7segdata = bitswap<8>(data,7,0,1,2,3,4,5,6); output().set_digit_value(m_credsel+8, bf7segdata); } } @@ -336,7 +336,7 @@ WRITE8_MEMBER(ecoinfr_state::ec_port0f_out_bank_segdata_w) { if (m_banksel!=0xff) { - uint8_t bf7segdata = BITSWAP8(data,7,0,1,2,3,4,5,6); + uint8_t bf7segdata = bitswap<8>(data,7,0,1,2,3,4,5,6); output().set_digit_value(m_banksel, bf7segdata); } } diff --git a/src/mame/drivers/elwro800.cpp b/src/mame/drivers/elwro800.cpp index db006dce814..43e2cc8adc9 100644 --- a/src/mame/drivers/elwro800.cpp +++ b/src/mame/drivers/elwro800.cpp @@ -129,7 +129,7 @@ void elwro800_state::elwro800jr_mmu_w(uint8_t data) uint8_t cs; uint8_t ls175; - ls175 = BITSWAP8(data, 7, 6, 5, 4, 4, 5, 7, 6) & 0x0f; + ls175 = bitswap<8>(data, 7, 6, 5, 4, 4, 5, 7, 6) & 0x0f; cs = prom[((0x0000 >> 10) | (ls175 << 6)) & 0x1ff]; if (!BIT(cs,0)) diff --git a/src/mame/drivers/enigma2.cpp b/src/mame/drivers/enigma2.cpp index 7d979fed997..910adbadc02 100644 --- a/src/mame/drivers/enigma2.cpp +++ b/src/mame/drivers/enigma2.cpp @@ -401,7 +401,7 @@ WRITE8_MEMBER(enigma2_state::sound_data_w) READ8_MEMBER(enigma2_state::sound_latch_r) { - return BITSWAP8(m_sound_latch,0,1,2,3,4,5,6,7); + return bitswap<8>(m_sound_latch,0,1,2,3,4,5,6,7); } @@ -700,7 +700,7 @@ DRIVER_INIT_MEMBER(enigma2_state,enigma2) for(i = 0; i < 0x2000; i++) { - rom[i] = BITSWAP8(rom[i],4,5,6,0,7,1,3,2); + rom[i] = bitswap<8>(rom[i],4,5,6,0,7,1,3,2); } } diff --git a/src/mame/drivers/epos.cpp b/src/mame/drivers/epos.cpp index 7b8a0c24c1d..8f95c060b1d 100644 --- a/src/mame/drivers/epos.cpp +++ b/src/mame/drivers/epos.cpp @@ -740,19 +740,19 @@ DRIVER_INIT_MEMBER(epos_state,dealer) /* Key 0 */ for (A = 0; A < 0x8000; A++) - rom[A] = BITSWAP8(rom[A] ^ 0xbd, 2,6,4,0,5,7,1,3 ); + rom[A] = bitswap<8>(rom[A] ^ 0xbd, 2,6,4,0,5,7,1,3 ); /* Key 1 */ for (A = 0; A < 0x8000; A++) - rom[A + 0x10000] = BITSWAP8(rom[A], 7,5,4,6,3,2,1,0 ); + rom[A + 0x10000] = bitswap<8>(rom[A], 7,5,4,6,3,2,1,0 ); /* Key 2 */ for (A = 0; A < 0x8000; A++) - rom[A + 0x20000] = BITSWAP8(rom[A] ^ 1, 7,6,5,4,3,0,2,1 ); + rom[A + 0x20000] = bitswap<8>(rom[A] ^ 1, 7,6,5,4,3,0,2,1 ); /* Key 3 */ for (A = 0; A < 0x8000; A++) - rom[A + 0x30000] = BITSWAP8(rom[A] ^ 1, 7,5,4,6,3,0,2,1 ); + rom[A + 0x30000] = bitswap<8>(rom[A] ^ 1, 7,5,4,6,3,0,2,1 ); /* there is not enough data to determine key 3. diff --git a/src/mame/drivers/et3400.cpp b/src/mame/drivers/et3400.cpp index e3d140c5c63..5d3553fa765 100644 --- a/src/mame/drivers/et3400.cpp +++ b/src/mame/drivers/et3400.cpp @@ -92,7 +92,7 @@ template WRITE8_MEMBER(et3400_state::led_w) { /* This computer sets each segment, one at a time. */ - uint8_t segdata = BITSWAP8(~data, 7, 0, 1, 2, 3, 4, 5, 6); + uint8_t segdata = bitswap<8>(~data, 7, 0, 1, 2, 3, 4, 5, 6); output().set_digit_value(digit, segdata); } diff --git a/src/mame/drivers/ettrivia.cpp b/src/mame/drivers/ettrivia.cpp index 494242b06f6..cc80a38ee3b 100644 --- a/src/mame/drivers/ettrivia.cpp +++ b/src/mame/drivers/ettrivia.cpp @@ -262,7 +262,7 @@ PALETTE_INIT_MEMBER(ettrivia_state, ettrivia) bit1 = (color_prom[i+0x100] >> 1) & 0x01; b = combine_2_weights(weights, bit0, bit1); - palette.set_pen_color(BITSWAP8(i,5,7,6,2,1,0,4,3), rgb_t(r, g, b)); + palette.set_pen_color(bitswap<8>(i,5,7,6,2,1,0,4,3), rgb_t(r, g, b)); } } diff --git a/src/mame/drivers/eva.cpp b/src/mame/drivers/eva.cpp index fe290ddaf8c..c7681d980c5 100644 --- a/src/mame/drivers/eva.cpp +++ b/src/mame/drivers/eva.cpp @@ -123,7 +123,7 @@ WRITE16_MEMBER(eva_state::eva11_write_o) READ8_MEMBER(eva_state::eva11_read_k) { // K84: TMS5100 CTL81(O30) - u8 ctl = BITSWAP8(m_tms5100->ctl_r(space, 0),7,6,5,4,3,0,1,2) & 0xc; + u8 ctl = bitswap<8>(m_tms5100->ctl_r(space, 0),7,6,5,4,3,0,1,2) & 0xc; // TODO: sensors diff --git a/src/mame/drivers/excali64.cpp b/src/mame/drivers/excali64.cpp index a9bc490617b..c538655f2d8 100644 --- a/src/mame/drivers/excali64.cpp +++ b/src/mame/drivers/excali64.cpp @@ -524,7 +524,7 @@ MC6845_UPDATE_ROW( excali64_state::update_row ) if (h > 5) h = 0; // keep us in bounds // hires definition - pixels are opposite order to characters - gfx = BITSWAP8(m_p_hiresram[(h << 12) | (chr<<4) | ra], 0, 1, 2, 3, 4, 5, 6, 7); + gfx = bitswap<8>(m_p_hiresram[(h << 12) | (chr<<4) | ra], 0, 1, 2, 3, 4, 5, 6, 7); } else gfx = m_p_chargen[(chr<<4) | ra]; // normal character diff --git a/src/mame/drivers/expro02.cpp b/src/mame/drivers/expro02.cpp index 0ff353a8d9c..5b909c257af 100644 --- a/src/mame/drivers/expro02.cpp +++ b/src/mame/drivers/expro02.cpp @@ -1797,7 +1797,7 @@ DRIVER_INIT_MEMBER(expro02_state,expro02) offset = x; // swap bits around to simplify further processing - offset = BITSWAP24(offset, 23, 22, 21, 20, 19, 18, 15, 9, 10, 8, 7, 12, 13, 16, 17, 6, 5, 4, 3, 14, 11, 2, 1, 0); + offset = bitswap<24>(offset, 23, 22, 21, 20, 19, 18, 15, 9, 10, 8, 7, 12, 13, 16, 17, 6, 5, 4, 3, 14, 11, 2, 1, 0); // invert 8 bits offset ^= 0x0528f; @@ -1809,7 +1809,7 @@ DRIVER_INIT_MEMBER(expro02_state,expro02) offset = (offset & ~0x1fe00) | ((offset - 0x09600) & 0x1fe00); // reverse the initial bitswap - offset = BITSWAP24(offset, 23, 22, 21, 20, 19, 18, 9, 10, 17, 4, 11, 12, 3, 15, 16, 14, 13, 8, 7, 6, 5, 2, 1, 0); + offset = bitswap<24>(offset, 23, 22, 21, 20, 19, 18, 9, 10, 17, 4, 11, 12, 3, 15, 16, 14, 13, 8, 7, 6, 5, 2, 1, 0); // swap nibbles to use the same gfxdecode dst[x] = (src[offset] << 4 & 0xF0F0F0F0) | (src[offset] >> 4 & 0x0F0F0F0F); diff --git a/src/mame/drivers/fgoal.cpp b/src/mame/drivers/fgoal.cpp index 6545b82484b..70a654ef039 100644 --- a/src/mame/drivers/fgoal.cpp +++ b/src/mame/drivers/fgoal.cpp @@ -171,14 +171,14 @@ READ8_MEMBER(fgoal_state::shifter_r) { uint8_t v = m_mb14241->shift_result_r(space, 0); - return BITSWAP8(v, 7, 6, 5, 4, 3, 2, 1, 0); + return bitswap<8>(v, 7, 6, 5, 4, 3, 2, 1, 0); } READ8_MEMBER(fgoal_state::shifter_reverse_r) { uint8_t v = m_mb14241->shift_result_r(space, 0); - return BITSWAP8(v, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(v, 0, 1, 2, 3, 4, 5, 6, 7); } diff --git a/src/mame/drivers/fidel6502.cpp b/src/mame/drivers/fidel6502.cpp index 45d7e0a7f90..47cb3612e95 100644 --- a/src/mame/drivers/fidel6502.cpp +++ b/src/mame/drivers/fidel6502.cpp @@ -581,7 +581,7 @@ WRITE8_MEMBER(fidel6502_state::csc_pia0_pa_w) m_speech->data_w(space, 0, data & 0x3f); // d0-d7: data for the 4 7seg leds, bits are ABFGHCDE (H is extra led) - m_7seg_data = BITSWAP8(data,0,1,5,6,7,2,3,4); + m_7seg_data = bitswap<8>(data,0,1,5,6,7,2,3,4); csc_prepare_display(); } @@ -687,7 +687,7 @@ WRITE8_MEMBER(fidel6502_state::eas_segment_w) { // a0-a2,d7: digit segment m_7seg_data = (data & 0x80) >> offset; - m_7seg_data = BITSWAP8(m_7seg_data,7,6,4,5,0,2,1,3); + m_7seg_data = bitswap<8>(m_7seg_data,7,6,4,5,0,2,1,3); eas_prepare_display(); } @@ -912,11 +912,11 @@ WRITE8_MEMBER(fidel6502_state::fexcel_ttl_w) m_dac->write(BIT(sel, 9)); // 74259 Q4-Q7,Q2,Q1: digit/led select (active low) - u8 led_sel = ~BITSWAP8(m_led_select,0,3,1,2,7,6,5,4) & 0x3f; + u8 led_sel = ~bitswap<8>(m_led_select,0,3,1,2,7,6,5,4) & 0x3f; // a0-a2,d1: digit segment data (model 6093) m_7seg_data = (m_7seg_data & ~mask) | ((data & 2) ? mask : 0); - u8 seg_data = BITSWAP8(m_7seg_data,0,1,3,2,7,5,6,4); + u8 seg_data = bitswap<8>(m_7seg_data,0,1,3,2,7,5,6,4); // update display: 4 7seg leds, 2*8 chessboard leds for (int i = 0; i < 6; i++) @@ -1009,7 +1009,7 @@ WRITE8_MEMBER(fidel6502_state::fdesdis_control_w) WRITE8_MEMBER(fidel6502_state::fdesdis_lcd_w) { // a0-a2,d0-d3: 4*74259 to lcd digit segments - u32 mask = BITSWAP8(1 << offset,3,7,6,0,1,2,4,5); + u32 mask = bitswap<8>(1 << offset,3,7,6,0,1,2,4,5); for (int i = 0; i < 4; i++) { m_7seg_data = (m_7seg_data & ~mask) | ((data >> i & 1) ? 0 : mask); diff --git a/src/mame/drivers/fidel68k.cpp b/src/mame/drivers/fidel68k.cpp index 32a89371e7c..f8017727bab 100644 --- a/src/mame/drivers/fidel68k.cpp +++ b/src/mame/drivers/fidel68k.cpp @@ -289,7 +289,7 @@ READ8_MEMBER(fidel68k_state::fdes68k_input_r) WRITE8_MEMBER(fidel68k_state::fdes68k_lcd_w) { // a1-a3,d0-d3: 4*74259 to lcd digit segments - u32 mask = BITSWAP8(1 << offset,3,7,6,0,1,2,4,5); + u32 mask = bitswap<8>(1 << offset,3,7,6,0,1,2,4,5); for (int i = 0; i < 4; i++) { m_7seg_data = (m_7seg_data & ~mask) | ((data >> i & 1) ? mask : 0); @@ -304,13 +304,13 @@ DRIVER_INIT_MEMBER(fidel68k_state, fdes2265) // descramble data lines for (int i = 0; i < len; i++) - rom[i] = BITSWAP16(rom[i], 15,14,8,13,9,12,10,11, 3,4,5,7,6,0,1,2); + rom[i] = bitswap<16>(rom[i], 15,14,8,13,9,12,10,11, 3,4,5,7,6,0,1,2); // descramble address lines std::vector buf(len); memcpy(&buf[0], rom, len*2); for (int i = 0; i < len; i++) - rom[i] = buf[BITSWAP24(i, 23,22,21,20,19,18,17,16, 15,14,13,12,11,8,10,9, 7,6,5,4,3,2,1,0)]; + rom[i] = buf[bitswap<24>(i, 23,22,21,20,19,18,17,16, 15,14,13,12,11,8,10,9, 7,6,5,4,3,2,1,0)]; } @@ -325,7 +325,7 @@ void fidel68k_state::eag_prepare_display() { // Excel 68000: 4*7seg leds, 8*8 chessboard leds // EAG: 8*7seg leds(2 panels), (8+1)*8 chessboard leds - u8 seg_data = BITSWAP8(m_7seg_data,0,1,3,2,7,5,6,4); + u8 seg_data = bitswap<8>(m_7seg_data,0,1,3,2,7,5,6,4); set_display_segmask(0x1ff, 0x7f); display_matrix(16, 9, m_led_data << 8 | seg_data, m_inp_mux); } diff --git a/src/mame/drivers/fidelz80.cpp b/src/mame/drivers/fidelz80.cpp index 2ce5b29dcfd..9c788b95989 100644 --- a/src/mame/drivers/fidelz80.cpp +++ b/src/mame/drivers/fidelz80.cpp @@ -798,7 +798,7 @@ MACHINE_START_MEMBER(fidelz80_state,vcc) WRITE8_MEMBER(fidelz80_state::vcc_ppi_porta_w) { // d0-d6: digit segment data, bits are xABCDEFG - m_7seg_data = BITSWAP8(data,7,0,1,2,3,4,5,6); + m_7seg_data = bitswap<8>(data,7,0,1,2,3,4,5,6); vcc_prepare_display(); // d0-d5: TSI C0-C5 @@ -860,7 +860,7 @@ WRITE8_MEMBER(fidelz80_state::cc10_ppi_porta_w) } // d0-d6: digit segment data (same as VCC) - m_7seg_data = BITSWAP8(data,7,0,1,2,3,4,5,6); + m_7seg_data = bitswap<8>(data,7,0,1,2,3,4,5,6); vcc_prepare_display(); } @@ -943,7 +943,7 @@ WRITE8_MEMBER(fidelz80_state::vsc_ppi_porta_w) m_speech->data_w(space, 0, data & 0x3f); // d0-d7: data for the 4 7seg leds, bits are HGCBAFED (H is extra led) - m_7seg_data = BITSWAP8(data,7,6,2,1,0,5,4,3); + m_7seg_data = bitswap<8>(data,7,6,2,1,0,5,4,3); vsc_prepare_display(); } @@ -1010,7 +1010,7 @@ WRITE8_MEMBER(fidelz80_state::vsc_pio_portb_w) void fidelz80_state::vbrc_prepare_display() { // 14seg led segments, d15 is extra led, d14 is unused (tone on prototype?) - u16 outdata = BITSWAP16(m_7seg_data,12,13,1,6,5,2,0,7,15,11,10,14,4,3,9,8); + u16 outdata = bitswap<16>(m_7seg_data,12,13,1,6,5,2,0,7,15,11,10,14,4,3,9,8); set_display_segmask(0xff, 0x3fff); display_matrix(16, 8, outdata, m_led_select); } diff --git a/src/mame/drivers/forte2.cpp b/src/mame/drivers/forte2.cpp index c4292dc3a49..bbf52182675 100644 --- a/src/mame/drivers/forte2.cpp +++ b/src/mame/drivers/forte2.cpp @@ -147,7 +147,7 @@ DRIVER_INIT_MEMBER(forte2_state,pesadelo) // data swap for (int i = 0; i < memsize; i++) { - mem[i] = BITSWAP8(mem[i],3,5,6,7,0,4,2,1); + mem[i] = bitswap<8>(mem[i],3,5,6,7,0,4,2,1); } // address line swap @@ -155,7 +155,7 @@ DRIVER_INIT_MEMBER(forte2_state,pesadelo) memcpy(&buf[0], mem, memsize); for (int i = 0; i < memsize; i++) { - mem[BITSWAP16(i,11,9,8,13,14,15,12,7,6,5,4,3,2,1,0,10)] = buf[i]; + mem[bitswap<16>(i,11,9,8,13,14,15,12,7,6,5,4,3,2,1,0,10)] = buf[i]; } } diff --git a/src/mame/drivers/fp1100.cpp b/src/mame/drivers/fp1100.cpp index 90512cec76b..e841528204a 100644 --- a/src/mame/drivers/fp1100.cpp +++ b/src/mame/drivers/fp1100.cpp @@ -246,7 +246,7 @@ d7 - 1=display area; 0=cursor */ WRITE8_MEMBER( fp1100_state::colour_control_w ) { - data = BITSWAP8(data, 7, 4, 6, 5, 3, 0, 2, 1); // change BRG to RGB + data = bitswap<8>(data, 7, 4, 6, 5, 3, 0, 2, 1); // change BRG to RGB m_col_border = data & 7; diff --git a/src/mame/drivers/fp200.cpp b/src/mame/drivers/fp200.cpp index 20c85836f26..798d6b3ccae 100644 --- a/src/mame/drivers/fp200.cpp +++ b/src/mame/drivers/fp200.cpp @@ -554,7 +554,7 @@ void fp200_state::machine_start() for(int i=0;i<0x800;i++) { - m_chargen[i] = raw_gfx[BITSWAP16(i,15,14,13,12,11,6,5,4,3,10,9,8,7,2,1,0)]; + m_chargen[i] = raw_gfx[bitswap<16>(i,15,14,13,12,11,6,5,4,3,10,9,8,7,2,1,0)]; } } diff --git a/src/mame/drivers/funkyjet.cpp b/src/mame/drivers/funkyjet.cpp index c453650e867..ef3a853e4f6 100644 --- a/src/mame/drivers/funkyjet.cpp +++ b/src/mame/drivers/funkyjet.cpp @@ -110,7 +110,7 @@ READ16_MEMBER( funkyjet_state::funkyjet_protection_region_0_146_r ) // uint16_t realdat = deco16_146_funkyjet_prot_r(space,offset&0x3ff,mem_mask); int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, /* note, same bitswap as fghthist */ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, /* note, same bitswap as fghthist */ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); @@ -125,7 +125,7 @@ WRITE16_MEMBER( funkyjet_state::funkyjet_protection_region_0_146_w ) // deco16_146_funkyjet_prot_w(space,offset&0x3ff,data,mem_mask); int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, /* note, same bitswap as fghthist */ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, /* note, same bitswap as fghthist */ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/funworld.cpp b/src/mame/drivers/funworld.cpp index 93874b820c4..23418f8fb80 100644 --- a/src/mame/drivers/funworld.cpp +++ b/src/mame/drivers/funworld.cpp @@ -6463,7 +6463,7 @@ DRIVER_INIT_MEMBER(funworld_state, saloon) for (i = start; i < size; i++) { - rom[i] = BITSWAP8(rom[i], 7, 6, 5, 4, 3, 0, 1, 2); + rom[i] = bitswap<8>(rom[i], 7, 6, 5, 4, 3, 0, 1, 2); } { @@ -6475,7 +6475,7 @@ DRIVER_INIT_MEMBER(funworld_state, saloon) for (i = start; i < size; i++) { - a = ((i & 0xff00) | BITSWAP8(i & 0xff, 2, 0, 1, 3, 4, 5, 6, 7)); + a = ((i & 0xff00) | bitswap<8>(i & 0xff, 2, 0, 1, 3, 4, 5, 6, 7)); rom[a] = buffer[i]; } } @@ -6493,7 +6493,7 @@ DRIVER_INIT_MEMBER(funworld_state, saloon) for (i = startg; i < sizeg; i++) { - a = BITSWAP16(i, 15, 14, 13, 12, 11, 6, 7, 5, 8, 4, 10, 3, 9, 0, 1, 2); + a = bitswap<16>(i, 15, 14, 13, 12, 11, 6, 7, 5, 8, 4, 10, 3, 9, 0, 1, 2); gfxrom[a] = buffer[i]; } } @@ -6507,7 +6507,7 @@ DRIVER_INIT_MEMBER(funworld_state, saloon) for (i = startp; i < sizep; i++) { - prom[i] = BITSWAP8(prom[i], 2, 3, 5, 4, 6, 7, 1, 0); + prom[i] = bitswap<8>(prom[i], 2, 3, 5, 4, 6, 7, 1, 0); } { @@ -6519,7 +6519,7 @@ DRIVER_INIT_MEMBER(funworld_state, saloon) for (i = startp; i < sizep; i++) { - a = BITSWAP16(i, 15, 14, 13, 12, 11, 10, 9, 4, 8, 7, 6, 5, 2, 0, 1, 3); + a = bitswap<16>(i, 15, 14, 13, 12, 11, 10, 9, 4, 8, 7, 6, 5, 2, 0, 1, 3); prom[a] = buffer[i]; } } @@ -6545,7 +6545,7 @@ DRIVER_INIT_MEMBER(funworld_state, multiwin) ROM[x] = ROM[x] ^ 0x91; uint8_t code; - ROM[x] = BITSWAP8(ROM[x],5,6,7,2,3,0,1,4); + ROM[x] = bitswap<8>(ROM[x],5,6,7,2,3,0,1,4); code = ROM[x]; @@ -6577,7 +6577,7 @@ DRIVER_INIT_MEMBER(funworld_state, royalcdc) uint8_t code; // this seems correct for the data, plaintext decrypts fine - ROM[x] = BITSWAP8(ROM[x],2,6,7,4,3,1,5,0); + ROM[x] = bitswap<8>(ROM[x],2,6,7,4,3,1,5,0); // the code uses different encryption, there are conflicts here // so it's probably address based @@ -6642,7 +6642,7 @@ DRIVER_INIT_MEMBER(funworld_state, dino4) for (i = start; i < size; i++) { - rom[i] = BITSWAP8(rom[i], 7, 6, 5, 4, 3, 1, 2, 0); + rom[i] = bitswap<8>(rom[i], 7, 6, 5, 4, 3, 1, 2, 0); } { @@ -6654,7 +6654,7 @@ DRIVER_INIT_MEMBER(funworld_state, dino4) for (i = start; i < size; i++) { - a = BITSWAP16(i, 15, 13, 14, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); + a = bitswap<16>(i, 15, 13, 14, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); rom[a] = buffer[i]; } } @@ -6672,7 +6672,7 @@ DRIVER_INIT_MEMBER(funworld_state, dino4) for (i = startg; i < sizeg; i++) { - a = BITSWAP16(i, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); + a = bitswap<16>(i, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); gfxrom[a] = buffer[i]; } } @@ -6702,7 +6702,7 @@ DRIVER_INIT_MEMBER(funworld_state, ctunk) for (i = start; i < size; i++) { - rom[i] = BITSWAP8(rom[i], 5, 6, 7, 3, 4, 0, 1, 2); + rom[i] = bitswap<8>(rom[i], 5, 6, 7, 3, 4, 0, 1, 2); } //buffer = std::make_unique(size); @@ -6746,7 +6746,7 @@ static void decrypt_rcdino4(uint8_t *rom, int size, uint8_t *gfxrom, int sizeg, for (i = start; i < size; i++) { - rom[i] = BITSWAP8(rom[i], 7, 6, 5, 4, 3, 1, 2, 0); + rom[i] = bitswap<8>(rom[i], 7, 6, 5, 4, 3, 1, 2, 0); } { @@ -6758,7 +6758,7 @@ static void decrypt_rcdino4(uint8_t *rom, int size, uint8_t *gfxrom, int sizeg, for (i = start; i < size; i++) { - a = BITSWAP16(i, 15, 13, 14, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); + a = bitswap<16>(i, 15, 13, 14, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); rom[a] = buffer[i]; } @@ -6776,7 +6776,7 @@ static void decrypt_rcdino4(uint8_t *rom, int size, uint8_t *gfxrom, int sizeg, for (i = startg; i < sizeg; i++) { - a = BITSWAP16(i, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); + a = bitswap<16>(i, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); gfxrom[a] = buffer[i]; } } @@ -6787,7 +6787,7 @@ static void decrypt_rcdino4(uint8_t *rom, int size, uint8_t *gfxrom, int sizeg, for (x = 0x0000; x < 0x10000; x++) { - src[x] = BITSWAP8(src[x], 7, 6, 4, 5, 3, 2, 1, 0); + src[x] = bitswap<8>(src[x], 7, 6, 4, 5, 3, 2, 1, 0); src[x] = src[x] ^ 0x81; } diff --git a/src/mame/drivers/gaiden.cpp b/src/mame/drivers/gaiden.cpp index 52a9b9d8149..3435e630598 100644 --- a/src/mame/drivers/gaiden.cpp +++ b/src/mame/drivers/gaiden.cpp @@ -1621,7 +1621,7 @@ void gaiden_state::descramble_drgnbowl(int descramble_cpu) memcpy(&buffer[0], ROM, size); for( i = 0; i < size; i++ ) { - ROM[i] = buffer[BITSWAP24(i,23,22,21,20, + ROM[i] = buffer[bitswap<24>(i,23,22,21,20, 19,18,17,15, 16,14,13,12, 11,10, 9, 8, @@ -1638,7 +1638,7 @@ void gaiden_state::descramble_drgnbowl(int descramble_cpu) memcpy(&buffer[0],ROM,size); for( i = 0; i < size; i++ ) { - ROM[i] = buffer[BITSWAP24(i,23,22,21,20, + ROM[i] = buffer[bitswap<24>(i,23,22,21,20, 19,18,16,17, 15,14,13, 4, 3,12,11,10, @@ -1672,7 +1672,7 @@ void gaiden_state::descramble_mastninj_gfx(uint8_t* src) int i; for (i = 0;i < len; i++) { - buffer[i] = src[BITSWAP24(i, + buffer[i] = src[bitswap<24>(i, 23,22,21,20, 19,18,17,16, 15,5,14,13,12, @@ -1688,7 +1688,7 @@ void gaiden_state::descramble_mastninj_gfx(uint8_t* src) int i; for (i = 0; i < len; i++) { - buffer[i] = src[BITSWAP24(i, + buffer[i] = src[bitswap<24>(i, 23,22,21,20, 19,18,17,16, 15,6,14,13,12, diff --git a/src/mame/drivers/galaga.cpp b/src/mame/drivers/galaga.cpp index 463a0131641..b90d89a8119 100644 --- a/src/mame/drivers/galaga.cpp +++ b/src/mame/drivers/galaga.cpp @@ -3442,14 +3442,14 @@ DRIVER_INIT_MEMBER(xevious_state,xevios) rom = memregion("gfx3")->base(); for (A = 0x5000;A < 0x7000;A++) { - rom[A] = BITSWAP8(rom[A],1,3,5,7,0,2,4,6); + rom[A] = bitswap<8>(rom[A],1,3,5,7,0,2,4,6); } /* convert one of tile map ROMs to the format used by Xevious */ rom = memregion("gfx4")->base(); for (A = 0x0000;A < 0x1000;A++) { - rom[A] = BITSWAP8(rom[A],3,7,5,1,2,6,4,0); + rom[A] = bitswap<8>(rom[A],3,7,5,1,2,6,4,0); } DRIVER_INIT_CALL(xevious); diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index eb23347aa9b..ca36d3144bd 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -1017,7 +1017,7 @@ void galaxian_state::monsterz_set_latch() { // read from a rom (which one?? "a-3e.k3" from audiocpu ($2700-$2fff) looks very suspicious) uint8_t *rom = memregion("audiocpu")->base(); - m_protection_result = rom[0x2000 | (m_protection_state & 0x1fff)]; // probably needs a BITSWAP8 + m_protection_result = rom[0x2000 | (m_protection_state & 0x1fff)]; // probably needs a bitswap<8> // and an irq on the main z80 afterwards m_maincpu->set_input_line(0, HOLD_LINE ); @@ -1096,7 +1096,7 @@ READ8_MEMBER(galaxian_state::frogger_sound_timer_r) { /* same as regular Konami sound but with bits 3,5 swapped */ uint8_t konami_value = konami_sound_timer_r(space, 0); - return BITSWAP8(konami_value, 7,6,3,4,5,2,1,0); + return bitswap<8>(konami_value, 7,6,3,4,5,2,1,0); } @@ -2096,13 +2096,13 @@ READ8_MEMBER(galaxian_state::froggeram_ppi8255_r) uint8_t result = 0xff; if (offset & 0x0100) result &= m_ppi8255[0]->read(space, offset & 3); if (offset & 0x0200) result &= m_ppi8255[1]->read(space, offset & 3); - return BITSWAP8(result, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(result, 0, 1, 2, 3, 4, 5, 6, 7); } WRITE8_MEMBER(galaxian_state::froggeram_ppi8255_w) { // same as theend, but accesses are scrambled - data = BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + data = bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); if (offset & 0x0100) m_ppi8255[0]->write(space, offset & 3, data); if (offset & 0x0200) m_ppi8255[1]->write(space, offset & 3, data); } @@ -6352,7 +6352,7 @@ void galaxian_state::decode_mooncrst(int length, uint8_t *dest) uint8_t res = data; if (BIT(data,1)) res ^= 0x40; if (BIT(data,5)) res ^= 0x04; - if ((offs & 1) == 0) res = BITSWAP8(res,7,2,5,4,3,6,1,0); + if ((offs & 1) == 0) res = bitswap<8>(res,7,2,5,4,3,6,1,0); dest[offs] = res; } } @@ -6437,7 +6437,7 @@ void galaxian_state::decode_dingoe() /* Swap bit0 with bit4 */ if (offs & 0x02) - data = BITSWAP8(data, 7,6,5,0,3,2,1,4); + data = bitswap<8>(data, 7,6,5,0,3,2,1,4); rombase[offs] = data; } } @@ -6450,7 +6450,7 @@ void galaxian_state::decode_frogger_sound() /* the first ROM of the sound CPU has data lines D0 and D1 swapped */ for (offs = 0; offs < 0x800; offs++) - rombase[offs] = BITSWAP8(rombase[offs], 7,6,5,4,3,2,0,1); + rombase[offs] = bitswap<8>(rombase[offs], 7,6,5,4,3,2,0,1); } // froggermc has a bigger first ROM of the sound CPU, thus a different decode @@ -6461,7 +6461,7 @@ void galaxian_state::decode_froggermc_sound() /* the first ROM of the sound CPU has data lines D0 and D1 swapped */ for (offs = 0; offs < 0x1000; offs++) - rombase[offs] = BITSWAP8(rombase[offs], 7,6,5,4,3,2,0,1); + rombase[offs] = bitswap<8>(rombase[offs], 7,6,5,4,3,2,0,1); } @@ -6472,7 +6472,7 @@ void galaxian_state::decode_frogger_gfx() /* the 2nd gfx ROM has data lines D0 and D1 swapped */ for (offs = 0x0800; offs < 0x1000; offs++) - rombase[offs] = BITSWAP8(rombase[offs], 7,6,5,4,3,2,0,1); + rombase[offs] = bitswap<8>(rombase[offs], 7,6,5,4,3,2,0,1); } @@ -6557,7 +6557,7 @@ void galaxian_state::decode_victoryc() if (i & 0x04) src[i] ^= 0x40; if (i & 0x01) src[i] ^= 0x08; - src[i] = BITSWAP8(src[i], 6, 3, 5, 4, 2, 7, 1, 0); + src[i] = bitswap<8>(src[i], 6, 3, 5, 4, 2, 7, 1, 0); } } diff --git a/src/mame/drivers/gladiatr.cpp b/src/mame/drivers/gladiatr.cpp index fa20baf2184..e77bcdd8560 100644 --- a/src/mame/drivers/gladiatr.cpp +++ b/src/mame/drivers/gladiatr.cpp @@ -299,7 +299,7 @@ READ8_MEMBER(gladiatr_state::cctl_p2_r) READ8_MEMBER(gladiatr_state::ucpu_p2_r) { - return BITSWAP8(m_dsw1->read(), 0,1,2,3,4,5,6,7); + return bitswap<8>(m_dsw1->read(), 0,1,2,3,4,5,6,7); } WRITE8_MEMBER(gladiatr_state::ccpu_p2_w) @@ -356,7 +356,7 @@ WRITE8_MEMBER(gladiatr_state::csnd_p1_w) READ8_MEMBER(gladiatr_state::csnd_p2_r) { - return BITSWAP8(m_dsw2->read(), 2,3,4,5,6,7,1,0); + return bitswap<8>(m_dsw2->read(), 2,3,4,5,6,7,1,0); } diff --git a/src/mame/drivers/goldnpkr.cpp b/src/mame/drivers/goldnpkr.cpp index a17b44474cb..ae900522393 100644 --- a/src/mame/drivers/goldnpkr.cpp +++ b/src/mame/drivers/goldnpkr.cpp @@ -11042,7 +11042,7 @@ DRIVER_INIT_MEMBER(goldnpkr_state, flcnw) for (i = start; i < size; i++) { ROM[i] = ROM[i] ^ 0xa0; - ROM[i] = BITSWAP8(ROM[i], 7, 6, 3, 4, 5, 2, 1, 0); + ROM[i] = bitswap<8>(ROM[i], 7, 6, 3, 4, 5, 2, 1, 0); } } diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp index 046830f919f..5d56ee2cd97 100644 --- a/src/mame/drivers/goldstar.cpp +++ b/src/mame/drivers/goldstar.cpp @@ -11967,7 +11967,7 @@ DRIVER_INIT_MEMBER(wingco_state, magoddsc) if ((A & 4) == 4) ROM[A] ^= 0x01; - ROM[A] = BITSWAP8(ROM[A], 3,6,5,4,7,2,1,0); + ROM[A] = bitswap<8>(ROM[A], 3,6,5,4,7,2,1,0); } } @@ -13361,10 +13361,10 @@ DRIVER_INIT_MEMBER(cmaster_state, fb2010) switch(i & 0x22) { - case 0x00: x = BITSWAP8(x^0x4c^0xff, 0,4,7,6,5,1,3,2); break; - case 0x02: x = BITSWAP8(x^0xc0^0xff, 7,6,0,5,3,2,1,4); break; // 67053214 - case 0x20: x = BITSWAP8(x^0x6b^0xff, 4,3,2,7,5,6,0,1); break; - case 0x22: x = BITSWAP8(x^0x23^0xff, 0,6,1,3,4,5,2,7); break; + case 0x00: x = bitswap<8>(x^0x4c^0xff, 0,4,7,6,5,1,3,2); break; + case 0x02: x = bitswap<8>(x^0xc0^0xff, 7,6,0,5,3,2,1,4); break; // 67053214 + case 0x20: x = bitswap<8>(x^0x6b^0xff, 4,3,2,7,5,6,0,1); break; + case 0x22: x = bitswap<8>(x^0x23^0xff, 0,6,1,3,4,5,2,7); break; } ROM[i] = x; @@ -15373,9 +15373,9 @@ uint8_t cb3_state::cb3_decrypt(uint8_t cipherText, uint16_t address) idx = BIT(cipherText, 1) | (BIT(address,0) << 1) | (BIT(address, 4) << 2); if (rotation[idx] == 0) - output = BITSWAP8(cipherText, 5, 6, 3, 4, 7, 2, 1, 0); // rotates bit #3, #5 and #7 in one direction... + output = bitswap<8>(cipherText, 5, 6, 3, 4, 7, 2, 1, 0); // rotates bit #3, #5 and #7 in one direction... else - output = BITSWAP8(cipherText, 3, 6, 7, 4, 5, 2, 1, 0); // ... or in the other + output = bitswap<8>(cipherText, 3, 6, 7, 4, 5, 2, 1, 0); // ... or in the other return output ^ sbox[idx]; } @@ -15437,7 +15437,7 @@ DRIVER_INIT_MEMBER(cb3_state, chrygld) for (A = 0; A < 0x10000; A++) { uint8_t dat = ROM[A]; - dat = BITSWAP8(dat, 5, 6, 3, 4, 7, 2, 1, 0); + dat = bitswap<8>(dat, 5, 6, 3, 4, 7, 2, 1, 0); ROM[A] = dat; } @@ -15494,14 +15494,14 @@ DRIVER_INIT_MEMBER(cmaster_state, nfb96sea) uint8_t x = ROM[i]; switch(i & 7) { - case 0: x = BITSWAP8(x ^ 0x80, 1, 6, 7, 4, 5, 2, 3, 0); break; - case 1: x = BITSWAP8(x ^ 0xa0, 5, 6, 3, 4, 1, 2, 7, 0); break; - case 2: x = BITSWAP8(x ^ 0x02, 5, 6, 3, 4, 1, 2, 7, 0); break; - case 3: x = BITSWAP8(x ^ 0xa0, 3, 6, 1, 4, 7, 2, 5, 0); break; - case 4: x = BITSWAP8(x ^ 0x82, 3, 6, 1, 4, 7, 2, 5, 0); break; - case 5: x = BITSWAP8(x ^ 0x02, 1, 6, 7, 4, 5, 2, 3, 0); break; - case 6: x = BITSWAP8(x ^ 0x08, 3, 6, 1, 4, 7, 2, 5, 0); break; - case 7: x = BITSWAP8(x ^ 0x80, 5, 6, 3, 4, 1, 2, 7, 0); break; + case 0: x = bitswap<8>(x ^ 0x80, 1, 6, 7, 4, 5, 2, 3, 0); break; + case 1: x = bitswap<8>(x ^ 0xa0, 5, 6, 3, 4, 1, 2, 7, 0); break; + case 2: x = bitswap<8>(x ^ 0x02, 5, 6, 3, 4, 1, 2, 7, 0); break; + case 3: x = bitswap<8>(x ^ 0xa0, 3, 6, 1, 4, 7, 2, 5, 0); break; + case 4: x = bitswap<8>(x ^ 0x82, 3, 6, 1, 4, 7, 2, 5, 0); break; + case 5: x = bitswap<8>(x ^ 0x02, 1, 6, 7, 4, 5, 2, 3, 0); break; + case 6: x = bitswap<8>(x ^ 0x08, 3, 6, 1, 4, 7, 2, 5, 0); break; + case 7: x = bitswap<8>(x ^ 0x80, 5, 6, 3, 4, 1, 2, 7, 0); break; } ROM[i] = x; @@ -15518,10 +15518,10 @@ DRIVER_INIT_MEMBER(cmaster_state, schery97) uint8_t x = ROM[i]; switch(i & 0x12) { - case 0x00: x = BITSWAP8(x ^ 0x3e, 1, 0, 7, 6, 5, 4, 3, 2); break; - case 0x02: x = BITSWAP8(x ^ 0x4d, 0, 7, 6, 5, 4, 3, 2, 1); break; - case 0x10: x = BITSWAP8(x ^ 0x24, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 0x12: x = BITSWAP8(x ^ 0xbb, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x00: x = bitswap<8>(x ^ 0x3e, 1, 0, 7, 6, 5, 4, 3, 2); break; + case 0x02: x = bitswap<8>(x ^ 0x4d, 0, 7, 6, 5, 4, 3, 2, 1); break; + case 0x10: x = bitswap<8>(x ^ 0x24, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 0x12: x = bitswap<8>(x ^ 0xbb, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; @@ -15540,10 +15540,10 @@ DRIVER_INIT_MEMBER(cmaster_state, schery97a) uint8_t x = ROM[i]; switch(i & 6) { - case 0: x = BITSWAP8(x ^ 0xb9, 4, 0, 6, 7, 3, 1, 5, 2); break; - case 2: x = BITSWAP8(x ^ 0x8f, 6, 7, 4, 0, 3, 2, 1, 5); break; - case 4: x = BITSWAP8(x ^ 0xd2, 3, 4, 0, 2, 5, 6, 1, 7); break; - case 6: x = BITSWAP8(x ^ 0xd1, 6, 0, 2, 1, 4, 5, 3, 7); break; + case 0: x = bitswap<8>(x ^ 0xb9, 4, 0, 6, 7, 3, 1, 5, 2); break; + case 2: x = bitswap<8>(x ^ 0x8f, 6, 7, 4, 0, 3, 2, 1, 5); break; + case 4: x = bitswap<8>(x ^ 0xd2, 3, 4, 0, 2, 5, 6, 1, 7); break; + case 6: x = bitswap<8>(x ^ 0xd1, 6, 0, 2, 1, 4, 5, 3, 7); break; } ROM[i] = x; @@ -15563,10 +15563,10 @@ DRIVER_INIT_MEMBER(cmaster_state, skill98) uint8_t x = ROM[i]; switch(i & 0x12) { - case 0x00: x = BITSWAP8(x ^ 0x21, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 0x02: x = BITSWAP8(x ^ 0x45, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 0x10: x = BITSWAP8(x ^ 0x23, 4, 3, 2, 1, 0, 7, 6, 5); break; - case 0x12: x = BITSWAP8(x ^ 0x5b, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x00: x = bitswap<8>(x ^ 0x21, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 0x02: x = bitswap<8>(x ^ 0x45, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 0x10: x = bitswap<8>(x ^ 0x23, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x12: x = bitswap<8>(x ^ 0x5b, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; @@ -15585,10 +15585,10 @@ DRIVER_INIT_MEMBER(cmaster_state, nfb96_c1) switch(i & 0x12) { - case 0x00: x = BITSWAP8(x ^ 0xf5, 6, 4, 3, 7, 0, 1, 5, 2); break; - case 0x02: x = BITSWAP8(x ^ 0xe6, 4, 6, 3, 0, 7, 2, 1, 5); break; - case 0x10: x = BITSWAP8(x ^ 0x34, 0, 3, 5, 2, 4, 6, 1, 7); break; - case 0x12: x = BITSWAP8(x ^ 0xc6, 2, 0, 4, 1, 6, 5, 3, 7); break; + case 0x00: x = bitswap<8>(x ^ 0xf5, 6, 4, 3, 7, 0, 1, 5, 2); break; + case 0x02: x = bitswap<8>(x ^ 0xe6, 4, 6, 3, 0, 7, 2, 1, 5); break; + case 0x10: x = bitswap<8>(x ^ 0x34, 0, 3, 5, 2, 4, 6, 1, 7); break; + case 0x12: x = bitswap<8>(x ^ 0xc6, 2, 0, 4, 1, 6, 5, 3, 7); break; } ROM[i] = x; } @@ -15606,10 +15606,10 @@ DRIVER_INIT_MEMBER(cmaster_state, nfb96_c2) switch(i & 0x22) { - case 0x00: x = BITSWAP8(x ^ 0x5f, 6, 4, 3, 7, 0, 5, 2, 1); break; - case 0x02: x = BITSWAP8(x ^ 0xe7, 4, 6, 3, 0, 7, 5, 1, 2); break; - case 0x20: x = BITSWAP8(x ^ 0x18, 0, 3, 5, 2, 4, 7, 1, 6); break; - case 0x22: x = BITSWAP8(x ^ 0x74, 2, 0, 4, 1, 6, 7, 3, 5); break; + case 0x00: x = bitswap<8>(x ^ 0x5f, 6, 4, 3, 7, 0, 5, 2, 1); break; + case 0x02: x = bitswap<8>(x ^ 0xe7, 4, 6, 3, 0, 7, 5, 1, 2); break; + case 0x20: x = bitswap<8>(x ^ 0x18, 0, 3, 5, 2, 4, 7, 1, 6); break; + case 0x22: x = bitswap<8>(x ^ 0x74, 2, 0, 4, 1, 6, 7, 3, 5); break; } ROM[i] = x; @@ -15627,10 +15627,10 @@ DRIVER_INIT_MEMBER(cmaster_state, nfb96_d) switch(i & 5) { - case 0: x = BITSWAP8(x ^ 0x6a, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 1: x = BITSWAP8(x ^ 0xcc, 0, 7, 6, 5, 4, 3, 2, 1); break; - case 4: x = BITSWAP8(x ^ 0x8f, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 5: x = BITSWAP8(x ^ 0x93, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0: x = bitswap<8>(x ^ 0x6a, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 1: x = bitswap<8>(x ^ 0xcc, 0, 7, 6, 5, 4, 3, 2, 1); break; + case 4: x = bitswap<8>(x ^ 0x8f, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 5: x = bitswap<8>(x ^ 0x93, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; } @@ -15654,10 +15654,10 @@ DRIVER_INIT_MEMBER(cmaster_state, nfb96_dk) switch(i & 5) { - case 0: x = BITSWAP8(x ^ 0xce, 1, 0, 7, 6, 5, 4, 3, 2); break; - case 1: x = BITSWAP8(x ^ 0x9e, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 4: x = BITSWAP8(x ^ 0xc3, 0, 7, 6, 5, 4, 3, 2, 1); break; - case 5: x = BITSWAP8(x ^ 0xdb, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0: x = bitswap<8>(x ^ 0xce, 1, 0, 7, 6, 5, 4, 3, 2); break; + case 1: x = bitswap<8>(x ^ 0x9e, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 4: x = bitswap<8>(x ^ 0xc3, 0, 7, 6, 5, 4, 3, 2, 1); break; + case 5: x = bitswap<8>(x ^ 0xdb, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; } @@ -15675,10 +15675,10 @@ DRIVER_INIT_MEMBER(cmaster_state, rp35) switch(i & 3) { - case 0: x = BITSWAP8(x ^ 0x2a, 0, 7, 6, 5, 4, 3, 2, 1); break; - case 1: x = BITSWAP8(x ^ 0x1c, 4, 3, 2, 1, 0, 7, 6, 5); break; - case 2: x = BITSWAP8(x ^ 0x4f, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 3: x = BITSWAP8(x ^ 0x23, 1, 0, 7, 6, 5, 4, 3, 2); break; + case 0: x = bitswap<8>(x ^ 0x2a, 0, 7, 6, 5, 4, 3, 2, 1); break; + case 1: x = bitswap<8>(x ^ 0x1c, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 2: x = bitswap<8>(x ^ 0x4f, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 3: x = bitswap<8>(x ^ 0x23, 1, 0, 7, 6, 5, 4, 3, 2); break; } ROM[i] = x; } @@ -15697,10 +15697,10 @@ DRIVER_INIT_MEMBER(cmaster_state, rp36) switch(i & 5) { - case 0: x = BITSWAP8(x ^ 0xee, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 1: x = BITSWAP8(x ^ 0x9f, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 4: x = BITSWAP8(x ^ 0xc7, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 5: x = BITSWAP8(x ^ 0xc3, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 0: x = bitswap<8>(x ^ 0xee, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 1: x = bitswap<8>(x ^ 0x9f, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 4: x = bitswap<8>(x ^ 0xc7, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 5: x = bitswap<8>(x ^ 0xc3, 3, 2, 1, 0, 7, 6, 5, 4); break; } ROM[i] = x; @@ -15719,10 +15719,10 @@ DRIVER_INIT_MEMBER(cmaster_state, rp36c3) switch(i & 0xa) { - case 0x0: x = BITSWAP8(x ^ 0xfd, 6, 4, 0, 7, 3, 1, 5, 2); break; - case 0x2: x = BITSWAP8(x ^ 0xee, 4, 6, 7, 0, 3, 2, 1, 5); break; - case 0x8: x = BITSWAP8(x ^ 0x2c, 0, 3, 4, 2, 5, 6, 1, 7); break; - case 0xa: x = BITSWAP8(x ^ 0xd6, 2, 0, 6, 1, 4, 5, 3, 7); break; + case 0x0: x = bitswap<8>(x ^ 0xfd, 6, 4, 0, 7, 3, 1, 5, 2); break; + case 0x2: x = bitswap<8>(x ^ 0xee, 4, 6, 7, 0, 3, 2, 1, 5); break; + case 0x8: x = bitswap<8>(x ^ 0x2c, 0, 3, 4, 2, 5, 6, 1, 7); break; + case 0xa: x = bitswap<8>(x ^ 0xd6, 2, 0, 6, 1, 4, 5, 3, 7); break; } ROM[i] = x; @@ -15741,10 +15741,10 @@ DRIVER_INIT_MEMBER(cmaster_state, rp96sub) // 95 33 95 33 70 6C 70 6C... XORs s switch(i & 5) { - case 0: x = BITSWAP8(x ^ 0x6a, 7, 6, 5, 4, 3, 2, 1, 0); break; - case 1: x = BITSWAP8(x ^ 0xcc, 7, 6, 5, 4, 3, 2, 1, 0); break; - case 4: x = BITSWAP8(x ^ 0x8f, 7, 6, 5, 4, 3, 2, 1, 0); break; - case 5: x = BITSWAP8(x ^ 0x93, 7, 6, 5, 4, 3, 2, 1, 0); break; + case 0: x = bitswap<8>(x ^ 0x6a, 7, 6, 5, 4, 3, 2, 1, 0); break; + case 1: x = bitswap<8>(x ^ 0xcc, 7, 6, 5, 4, 3, 2, 1, 0); break; + case 4: x = bitswap<8>(x ^ 0x8f, 7, 6, 5, 4, 3, 2, 1, 0); break; + case 5: x = bitswap<8>(x ^ 0x93, 7, 6, 5, 4, 3, 2, 1, 0); break; } ROM[i] = x; @@ -15764,10 +15764,10 @@ DRIVER_INIT_MEMBER(cmaster_state, po33) switch(i & 0x14) { - case 0x00: x = BITSWAP8(x ^ 0xde, 2, 1, 0, 7, 6, 5, 4, 3); break; - case 0x04: x = BITSWAP8(x ^ 0x3c, 0, 7, 6, 5, 4, 3, 2, 1); break; - case 0x10: x = BITSWAP8(x ^ 0x2f, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 0x14: x = BITSWAP8(x ^ 0x5b, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x00: x = bitswap<8>(x ^ 0xde, 2, 1, 0, 7, 6, 5, 4, 3); break; + case 0x04: x = bitswap<8>(x ^ 0x3c, 0, 7, 6, 5, 4, 3, 2, 1); break; + case 0x10: x = bitswap<8>(x ^ 0x2f, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 0x14: x = bitswap<8>(x ^ 0x5b, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; @@ -15787,10 +15787,10 @@ DRIVER_INIT_MEMBER(cmaster_state, match133) switch(i & 0x12) { - case 0x00: x = BITSWAP8(x ^ 0xde, 3, 2, 1, 0, 7, 6, 5, 4); break; - case 0x02: x = BITSWAP8(x ^ 0x3d, 1, 0, 7, 6, 5, 4, 3, 2); break; - case 0x10: x = BITSWAP8(x ^ 0x2f, 4, 3, 2, 1, 0, 7, 6, 5); break; - case 0x12: x = BITSWAP8(x ^ 0x5c, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x00: x = bitswap<8>(x ^ 0xde, 3, 2, 1, 0, 7, 6, 5, 4); break; + case 0x02: x = bitswap<8>(x ^ 0x3d, 1, 0, 7, 6, 5, 4, 3, 2); break; + case 0x10: x = bitswap<8>(x ^ 0x2f, 4, 3, 2, 1, 0, 7, 6, 5); break; + case 0x12: x = bitswap<8>(x ^ 0x5c, 4, 3, 2, 1, 0, 7, 6, 5); break; } ROM[i] = x; @@ -15884,17 +15884,17 @@ DRIVER_INIT_MEMBER(goldstar_state, super9) uint8_t *src = memregion("gfx1")->base(); for (i = 0; i < 0x20000; i++) { -// src[i] = BITSWAP8(src[i], 7, 4, 2, 1, 6, 5, 3, 0); -// src[i] = BITSWAP8(src[i], 7, 3, 2, 6, 1, 5, 4, 0); - src[i] = BITSWAP8(src[i], 7, 3, 2, 6, 5, 1, 4, 0); +// src[i] = bitswap<8>(src[i], 7, 4, 2, 1, 6, 5, 3, 0); +// src[i] = bitswap<8>(src[i], 7, 3, 2, 6, 1, 5, 4, 0); + src[i] = bitswap<8>(src[i], 7, 3, 2, 6, 5, 1, 4, 0); } uint8_t *src2 = memregion("gfx2")->base(); for (i = 0; i < 0x8000; i++) { -// src2[i] = BITSWAP8(src2[i], 7, 4, 2, 1, 6, 5, 3, 0); -// src2[i] = BITSWAP8(src2[i], 7, 3, 2, 6, 1, 5, 4, 0); - src2[i] = BITSWAP8(src2[i], 3, 7, 6, 2, 5, 1, 0, 4); // endianess +// src2[i] = bitswap<8>(src2[i], 7, 4, 2, 1, 6, 5, 3, 0); +// src2[i] = bitswap<8>(src2[i], 7, 3, 2, 6, 1, 5, 4, 0); + src2[i] = bitswap<8>(src2[i], 3, 7, 6, 2, 5, 1, 0, 4); // endianess } } @@ -15909,7 +15909,7 @@ DRIVER_INIT_MEMBER(cb3_state, cb3e) for (i = 0; i < 0x10000; i++) { uint8_t dat = ROM[i]; - dat = BITSWAP8(dat, 5, 6, 3, 4, 7, 2, 1, 0); + dat = bitswap<8>(dat, 5, 6, 3, 4, 7, 2, 1, 0); ROM[i] = dat; } @@ -15918,14 +15918,14 @@ DRIVER_INIT_MEMBER(cb3_state, cb3e) uint8_t *src = memregion("gfx1")->base(); for (i = 0; i < 0x20000; i++) { - src[i] = BITSWAP8(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK + src[i] = bitswap<8>(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK } /* bank 2 graphics */ uint8_t *src2 = memregion("gfx2")->base(); for (i = 0; i < 0x8000; i++) { - src2[i] = BITSWAP8(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK + src2[i] = bitswap<8>(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK } } @@ -15936,14 +15936,14 @@ DRIVER_INIT_MEMBER(goldstar_state, wcherry) uint8_t *src = memregion("gfx1")->base(); for (i = 0; i < 0x20000; i++) { - src[i] = BITSWAP8(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK + src[i] = bitswap<8>(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK } /* bank 2 graphics */ uint8_t *src2 = memregion("gfx2")->base(); for (i = 0; i < 0x8000; i++) { - src2[i] = BITSWAP8(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK + src2[i] = bitswap<8>(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK } } @@ -15961,14 +15961,14 @@ DRIVER_INIT_MEMBER(wingco_state, flaming7) uint8_t *src = memregion("gfx1")->base(); for (i = 0; i < 0x20000; i++) { - src[i] = BITSWAP8(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK + src[i] = bitswap<8>(src[i], 4, 3, 2, 5, 1, 6, 0, 7); // OK } /* bank 2 graphics */ uint8_t *src2 = memregion("gfx2")->base(); for (i = 0; i < 0x8000; i++) { - src2[i] = BITSWAP8(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK + src2[i] = bitswap<8>(src2[i], 3, 4, 2, 5, 1, 6, 0, 7); // OK } /* Patch to bypass the iButton electronic serial number check. diff --git a/src/mame/drivers/gts3.cpp b/src/mame/drivers/gts3.cpp index 427912fd653..67af5c9348f 100644 --- a/src/mame/drivers/gts3.cpp +++ b/src/mame/drivers/gts3.cpp @@ -220,7 +220,7 @@ WRITE8_MEMBER( gts3_state::segbank_w ) uint32_t seg1,seg2; m_segment[offset] = data; seg1 = m_segment[offset&2] | (m_segment[offset|1] << 8); - seg2 = BITSWAP32(seg1,16,16,16,16,16,16,16,16,16,16,16,16,16,16,15,14,9,7,13,11,10,6,8,12,5,4,3,3,2,1,0,0); + seg2 = bitswap<32>(seg1,16,16,16,16,16,16,16,16,16,16,16,16,16,16,15,14,9,7,13,11,10,6,8,12,5,4,3,3,2,1,0,0); output().set_digit_value(m_digit+(BIT(offset, 1) ? 0 : 20), seg2); } diff --git a/src/mame/drivers/gts3a.cpp b/src/mame/drivers/gts3a.cpp index 2ef0a33691a..f59c551155e 100644 --- a/src/mame/drivers/gts3a.cpp +++ b/src/mame/drivers/gts3a.cpp @@ -232,7 +232,7 @@ WRITE8_MEMBER( gts3a_state::segbank_w ) uint32_t seg1,seg2; m_segment[offset] = data; seg1 = m_segment[offset&2] | (m_segment[offset|1] << 8); - seg2 = BITSWAP32(seg1,16,16,16,16,16,16,16,16,16,16,16,16,16,16,15,14,9,7,13,11,10,6,8,12,5,4,3,3,2,1,0,0); + seg2 = bitswap<32>(seg1,16,16,16,16,16,16,16,16,16,16,16,16,16,16,15,14,9,7,13,11,10,6,8,12,5,4,3,3,2,1,0,0); output().set_digit_value(m_digit+(BIT(offset, 1) ? 0 : 20), seg2); } diff --git a/src/mame/drivers/gts80.cpp b/src/mame/drivers/gts80.cpp index e5b3d813570..9e3db98e589 100644 --- a/src/mame/drivers/gts80.cpp +++ b/src/mame/drivers/gts80.cpp @@ -295,7 +295,7 @@ WRITE8_MEMBER( gts80_state::port2a_w ) m_port2 = data; static const uint8_t patterns[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7c,0x07,0x7f,0x67,0x58,0x4c,0x62,0x69,0x78,0 }; // 7448 uint16_t seg1 = (uint16_t)patterns[m_segment & 15]; - uint16_t seg2 = BITSWAP16(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); + uint16_t seg2 = bitswap<16>(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); switch (data & 0x70) { case 0x10: // player 1&2 diff --git a/src/mame/drivers/gts80a.cpp b/src/mame/drivers/gts80a.cpp index 28656075ca2..584e822afcd 100644 --- a/src/mame/drivers/gts80a.cpp +++ b/src/mame/drivers/gts80a.cpp @@ -286,7 +286,7 @@ WRITE8_MEMBER( gts80a_state::port2a_w ) m_port2 = data; static const uint8_t patterns[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7c,0x07,0x7f,0x67,0x58,0x4c,0x62,0x69,0x78,0 }; // 7448 uint16_t seg1 = (uint16_t)patterns[m_segment & 15]; - uint16_t seg2 = BITSWAP16(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); + uint16_t seg2 = bitswap<16>(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); switch (data & 0x70) { case 0x10: // player 1&2 diff --git a/src/mame/drivers/gts80b.cpp b/src/mame/drivers/gts80b.cpp index e6bcb349895..ef0d713c403 100644 --- a/src/mame/drivers/gts80b.cpp +++ b/src/mame/drivers/gts80b.cpp @@ -338,7 +338,7 @@ WRITE8_MEMBER( gts80b_state::port2b_w ) else { // display a character segment = patterns[m_dispcmd & 0x7f]; // ignore blank/inverse bit - segment = BITSWAP16(segment, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 3, 2, 1, 0, 0); + segment = bitswap<16>(segment, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 3, 2, 1, 0, 0); output().set_digit_value(m_digit[i]+i*20, segment); m_digit[i]++; // auto-increment pointer if (m_digit[i] > 19) m_digit[i] = 0; // check for overflow diff --git a/src/mame/drivers/h8.cpp b/src/mame/drivers/h8.cpp index 0d645cdfaa1..d2a28e54356 100644 --- a/src/mame/drivers/h8.cpp +++ b/src/mame/drivers/h8.cpp @@ -170,7 +170,7 @@ WRITE8_MEMBER( h8_state::portf1_w ) //d1 segment a //d0 segment g - m_segment = 0xff ^ BITSWAP8(data, 7, 0, 6, 5, 4, 3, 2, 1); + m_segment = 0xff ^ bitswap<8>(data, 7, 0, 6, 5, 4, 3, 2, 1); if (m_digit) output().set_digit_value(m_digit, m_segment); } diff --git a/src/mame/drivers/halleys.cpp b/src/mame/drivers/halleys.cpp index 75e1a646fea..6c677e85a62 100644 --- a/src/mame/drivers/halleys.cpp +++ b/src/mame/drivers/halleys.cpp @@ -2154,8 +2154,8 @@ void halleys_state::init_common() for (i=0; i<0x10000; i++) { - addr = BITSWAP16(i,15,14,13,12,11,10,1,0,4,5,6,3,7,8,9,2); - buf[i] = BITSWAP8(rom[addr],0,7,6,5,1,4,2,3); + addr = bitswap<16>(i,15,14,13,12,11,10,1,0,4,5,6,3,7,8,9,2); + buf[i] = bitswap<8>(rom[addr],0,7,6,5,1,4,2,3); } memcpy(rom, buf, 0x10000); diff --git a/src/mame/drivers/hankin.cpp b/src/mame/drivers/hankin.cpp index cb46a01686a..26eb97e7049 100644 --- a/src/mame/drivers/hankin.cpp +++ b/src/mame/drivers/hankin.cpp @@ -283,7 +283,7 @@ WRITE8_MEMBER( hankin_state::ic10_a_w ) for (i = 0; i < 5; i++) { seg1 = patterns[m_segment[i]]; - seg2 = BITSWAP16(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); + seg2 = bitswap<16>(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0); output().set_digit_value(i*10+m_digit, seg2); } } diff --git a/src/mame/drivers/hh_amis2k.cpp b/src/mame/drivers/hh_amis2k.cpp index 0639bf2cc55..b6ce7c7f61d 100644 --- a/src/mame/drivers/hh_amis2k.cpp +++ b/src/mame/drivers/hh_amis2k.cpp @@ -140,7 +140,7 @@ void wildfire_state::display_update() if (m_display_cache[i] != active_state[i]) { if (index_is_7segled(i)) - output().set_digit_value(i, BITSWAP8(active_state[i],7,0,1,2,3,4,5,6) & 0x7f); + output().set_digit_value(i, bitswap<8>(active_state[i],7,0,1,2,3,4,5,6) & 0x7f); for (int j = 0; j < 8; j++) output().set_lamp_value(i*10 + j, active_state[i] >> j & 1); diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp index 8f533e913f9..27762e37a82 100644 --- a/src/mame/drivers/hh_cop400.cpp +++ b/src/mame/drivers/hh_cop400.cpp @@ -486,7 +486,7 @@ void einvaderc_state::prepare_display() set_display_segmask(7, 0x7f); // update display - u8 l = BITSWAP8(m_l,7,6,0,1,2,3,4,5); + u8 l = bitswap<8>(m_l,7,6,0,1,2,3,4,5); u16 grid = (m_d | m_g << 4 | m_sk << 8 | m_so << 9) ^ 0x0ff; display_matrix(8, 10, l, grid); } diff --git a/src/mame/drivers/hh_hmcs40.cpp b/src/mame/drivers/hh_hmcs40.cpp index 8d6dddefe55..5f70d409338 100644 --- a/src/mame/drivers/hh_hmcs40.cpp +++ b/src/mame/drivers/hh_hmcs40.cpp @@ -375,7 +375,7 @@ WRITE8_MEMBER(bambball_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 plate = BITSWAP16(m_plate,13,8,4,12,9,10,14,1,7,0,15,11,6,3,5,2); + u16 plate = bitswap<16>(m_plate,13,8,4,12,9,10,14,1,7,0,15,11,6,3,5,2); display_matrix(16, 9, plate, m_grid); } @@ -484,8 +484,8 @@ public: void bmboxing_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); - u32 plate = BITSWAP16(m_plate,15,14,13,12,1,2,0,3,11,4,10,7,5,6,9,8); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); + u32 plate = bitswap<16>(m_plate,15,14,13,12,1,2,0,3,11,4,10,7,5,6,9,8); display_matrix(12, 9, plate, grid); } @@ -623,8 +623,8 @@ public: void bfriskyt_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP24(m_plate,23,22,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7); + u32 plate = bitswap<24>(m_plate,23,22,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21); display_matrix(22, 8, plate, grid); } @@ -755,8 +755,8 @@ WRITE8_MEMBER(packmon_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); - u32 plate = BITSWAP24(m_plate,23,22,21,20,0,1,2,3,4,5,6,19,18,17,16,15,14,13,12,11,10,9,8,7); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); + u32 plate = bitswap<24>(m_plate,23,22,21,20,0,1,2,3,4,5,6,19,18,17,16,15,14,13,12,11,10,9,8,7); display_matrix(20, 10, plate, grid); } @@ -865,8 +865,8 @@ public: void msthawk_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); - u32 plate = BITSWAP24(m_plate,23,22,21,19,20,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); + u32 plate = bitswap<24>(m_plate,23,22,21,19,20,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); display_matrix(21, 10, plate, grid); } @@ -997,8 +997,8 @@ WRITE8_MEMBER(bzaxxon_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,6,7,8,9,10,5,4,3,2,1,0); - u32 plate = BITSWAP24(m_plate,23,22,21,20,5,7,0,1,2,3,4,6,19,16,17,18,15,14,13,12,10,8,9,11) | 0x800; + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,6,7,8,9,10,5,4,3,2,1,0); + u32 plate = bitswap<24>(m_plate,23,22,21,20,5,7,0,1,2,3,4,6,19,16,17,18,15,14,13,12,10,8,9,11) | 0x800; display_matrix(20, 11, plate, grid); } @@ -1117,8 +1117,8 @@ WRITE8_MEMBER(zackman_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP32(m_plate,31,30,27,0,1,2,3,4,5,6,7,8,9,10,11,24,25,26,29,28,23,22,21,20,19,18,17,16,15,14,13,12); + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); + u32 plate = bitswap<32>(m_plate,31,30,27,0,1,2,3,4,5,6,7,8,9,10,11,24,25,26,29,28,23,22,21,20,19,18,17,16,15,14,13,12); display_matrix(29, 8, plate, grid); } @@ -1232,8 +1232,8 @@ public: void bpengo_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP32(m_plate,31,30,29,28,23,22,21,16,17,18,19,20,27,26,25,24,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); + u32 plate = bitswap<32>(m_plate,31,30,29,28,23,22,21,16,17,18,19,20,27,26,25,24,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); display_matrix(25, 8, plate, grid); } @@ -1360,8 +1360,8 @@ public: void bbtime_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,7,6,0,1,2,3,4,5); - u32 plate = BITSWAP32(m_plate,31,30,29,28,25,24,26,27,22,23,15,14,12,11,10,8,7,6,4,1,5,9,13,3,2,16,17,18,19,20,0,21) | 0x1; + u8 grid = bitswap<8>(m_grid,7,6,0,1,2,3,4,5); + u32 plate = bitswap<32>(m_plate,31,30,29,28,25,24,26,27,22,23,15,14,12,11,10,8,7,6,4,1,5,9,13,3,2,16,17,18,19,20,0,21) | 0x1; display_matrix(28, 6, plate, grid); } @@ -1485,8 +1485,8 @@ WRITE8_MEMBER(bdoramon_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,7,6); - u32 plate = BITSWAP24(m_plate,23,22,21,20,11,19,18,17,16,15,14,13,12,10,9,8,7,6,5,4,3,2,1,0); + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,7,6); + u32 plate = bitswap<24>(m_plate,23,22,21,20,11,19,18,17,16,15,14,13,12,10,9,8,7,6,5,4,3,2,1,0); display_matrix(19, 8, plate, grid); } @@ -1584,8 +1584,8 @@ WRITE8_MEMBER(bultrman_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,0,18,17,16,15,14,13,12,3,11,10,9,8,7,6,5,4,1,2); + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,0,18,17,16,15,14,13,12,3,11,10,9,8,7,6,5,4,1,2); display_matrix(18, 8, plate, grid); } @@ -1672,7 +1672,7 @@ public: void machiman_state::prepare_display() { - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18); display_matrix(19, 5, plate, m_grid); } @@ -1802,7 +1802,7 @@ READ8_MEMBER(pairmtch_state::input_r) WRITE8_MEMBER(pairmtch_state::sound_w) { // R5x: soundlatch (to audiocpu R2x) - m_soundlatch->write(space, 0, BITSWAP8(data,7,6,5,4,0,1,2,3)); + m_soundlatch->write(space, 0, bitswap<8>(data,7,6,5,4,0,1,2,3)); } @@ -1811,7 +1811,7 @@ WRITE8_MEMBER(pairmtch_state::sound_w) WRITE8_MEMBER(pairmtch_state::sound2_w) { // R2x: soundlatch (to maincpu R5x) - m_soundlatch2->write(space, 0, BITSWAP8(data,7,6,5,4,0,1,2,3)); + m_soundlatch2->write(space, 0, bitswap<8>(data,7,6,5,4,0,1,2,3)); } WRITE16_MEMBER(pairmtch_state::speaker_w) @@ -1924,7 +1924,7 @@ WRITE8_MEMBER(alnattck_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,17,16,11,9,8,10,7,2,0,1,3,4,5,6,12,13,14,15); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,18,17,16,11,9,8,10,7,2,0,1,3,4,5,6,12,13,14,15); display_matrix(20, 10, plate, m_grid); } @@ -2054,7 +2054,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cdkong_state::speaker_decay_sim) void cdkong_state::prepare_display() { - u32 plate = BITSWAP32(m_plate,31,30,29,24,0,16,8,1,23,17,9,2,18,10,25,27,26,3,15,27,11,11,14,22,6,13,21,5,19,12,20,4) | 0x800800; + u32 plate = bitswap<32>(m_plate,31,30,29,24,0,16,8,1,23,17,9,2,18,10,25,27,26,3,15,27,11,11,14,22,6,13,21,5,19,12,20,4) | 0x800800; display_matrix(29, 11, plate, m_grid); } @@ -2172,8 +2172,8 @@ public: void cgalaxn_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,1,2,0,11,10,9,8,7,6,5,4,3); - u16 plate = BITSWAP16(m_plate,15,14,6,5,4,3,2,1,7,8,9,10,11,0,12,13); + u16 grid = bitswap<16>(m_grid,15,14,13,12,1,2,0,11,10,9,8,7,6,5,4,3); + u16 plate = bitswap<16>(m_plate,15,14,6,5,4,3,2,1,7,8,9,10,11,0,12,13); display_matrix(15, 12, plate, grid); } @@ -2307,8 +2307,8 @@ WRITE8_MEMBER(cpacman_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,0,1,2,3,4,5,6,7,8,9,10); - u32 plate = BITSWAP32(m_plate,31,30,29,28,27,0,1,2,3,8,9,10,11,16,17,18,19,25,26,23,22,21,20,24,15,14,13,12,4,5,6,7); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,0,1,2,3,4,5,6,7,8,9,10); + u32 plate = bitswap<32>(m_plate,31,30,29,28,27,0,1,2,3,8,9,10,11,16,17,18,19,25,26,23,22,21,20,24,15,14,13,12,4,5,6,7); display_matrix(27, 11, plate, grid); } @@ -2424,8 +2424,8 @@ WRITE8_MEMBER(cmspacmn_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,11,10,9,8,7,6,5,4,3,2,1,0,1); - u64 plate = BIT(m_plate,15)<<32 | BITSWAP32(m_plate,14,13,12,4,5,6,7,24,23,25,22,21,20,13,24,3,19,14,12,11,24,2,10,8,7,25,0,9,1,18,17,16) | 0x1004080; + u16 grid = bitswap<16>(m_grid,15,14,13,11,10,9,8,7,6,5,4,3,2,1,0,1); + u64 plate = BIT(m_plate,15)<<32 | bitswap<32>(m_plate,14,13,12,4,5,6,7,24,23,25,22,21,20,13,24,3,19,14,12,11,24,2,10,8,7,25,0,9,1,18,17,16) | 0x1004080; display_matrix(33, 12, plate, grid); } @@ -2540,7 +2540,7 @@ void sag_state::prepare_display() // grid 8-11 are 7segs set_display_segmask(0xf00, 0x7f); - u8 seg = BITSWAP8(m_plate,3,4,5,6,7,8,9,10); + u8 seg = bitswap<8>(m_plate,3,4,5,6,7,8,9,10); for (int y = 8; y < 12; y++) m_display_state[y] = (m_grid >> y & 1) ? seg : 0; @@ -2670,8 +2670,8 @@ public: void egalaxn2_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14); - u32 plate = BITSWAP24(m_plate,23,22,21,20,15,14,13,12,7,6,5,4,3,2,1,0,19,18,17,16,11,10,9,8); + u16 grid = bitswap<16>(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14); + u32 plate = bitswap<24>(m_plate,23,22,21,20,15,14,13,12,7,6,5,4,3,2,1,0,19,18,17,16,11,10,9,8); display_matrix(24, 15, plate, grid); } @@ -2870,8 +2870,8 @@ protected: void eturtles_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,1,14,13,12,11,10,9,8,7,6,5,4,3,2,0); - u32 plate = BITSWAP32(m_plate,31,30,11,12,18,19,16,17,22,15,20,21,27,26,23,25,24,2,3,1,0,6,4,5,10,9,2,8,7,14,1,13); + u16 grid = bitswap<16>(m_grid,15,1,14,13,12,11,10,9,8,7,6,5,4,3,2,0); + u32 plate = bitswap<32>(m_plate,31,30,11,12,18,19,16,17,22,15,20,21,27,26,23,25,24,2,3,1,0,6,4,5,10,9,2,8,7,14,1,13); display_matrix(30, 15, plate | (grid >> 5 & 8), grid); // grid 8 also forces plate 3 high } @@ -3049,8 +3049,8 @@ public: void estargte_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,0,14,13,12,11,10,9,8,7,6,5,4,3,2,1); - u32 plate = BITSWAP32(m_plate,31,30,29,15,17,19,21,23,25,27,26,24,3,22,20,18,16,14,12,10,8,6,4,2,0,1,3,5,7,9,11,13); + u16 grid = bitswap<16>(m_grid,15,0,14,13,12,11,10,9,8,7,6,5,4,3,2,1); + u32 plate = bitswap<32>(m_plate,31,30,29,15,17,19,21,23,25,27,26,24,3,22,20,18,16,14,12,10,8,6,4,2,0,1,3,5,7,9,11,13); display_matrix(29, 14, plate, grid); } @@ -3166,8 +3166,8 @@ WRITE8_MEMBER(ghalien_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); - u32 plate = BITSWAP24(m_plate,23,22,21,20,14,12,10,8,9,13,15,2,0,1,3,11,7,5,4,6,19,17,16,18); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); + u32 plate = bitswap<24>(m_plate,23,22,21,20,14,12,10,8,9,13,15,2,0,1,3,11,7,5,4,6,19,17,16,18); display_matrix(20, 10, plate, grid); } @@ -3285,8 +3285,8 @@ WRITE8_MEMBER(gckong_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,0,1,2,3,4,5,6,7,8,9,10); - u32 plate = BITSWAP32(m_plate,31,30,29,28,27,26,25,6,7,8,12,13,14,15,16,17,18,17,16,12,11,10,9,8,7,6,5,4,3,2,1,0) | 0x8000; + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,0,1,2,3,4,5,6,7,8,9,10); + u32 plate = bitswap<32>(m_plate,31,30,29,28,27,26,25,6,7,8,12,13,14,15,16,17,18,17,16,12,11,10,9,8,7,6,5,4,3,2,1,0) | 0x8000; display_matrix(32, 11, plate, grid); } @@ -3408,7 +3408,7 @@ WRITE8_MEMBER(gdigdug_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u32 plate = BITSWAP32(m_plate,30,31,0,1,2,3,4,5,6,7,20,21,22,27,26,25,28,29,24,23,15,14,13,12,8,9,10,11,19,18,17,16); + u32 plate = bitswap<32>(m_plate,30,31,0,1,2,3,4,5,6,7,20,21,22,27,26,25,28,29,24,23,15,14,13,12,8,9,10,11,19,18,17,16); display_matrix(32, 9, plate, m_grid); } @@ -3528,7 +3528,7 @@ public: void mwcbaseb_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); display_matrix(16, 8, m_plate, grid); } @@ -3688,7 +3688,7 @@ WRITE8_MEMBER(pbqbert_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u32 plate = BITSWAP32(m_plate,31,30,24,25,26,27,28,15,14,29,13,12,11,10,9,8,7,6,5,4,3,2,1,0,16,17,18,19,20,21,22,23) | 0x400000; + u32 plate = bitswap<32>(m_plate,31,30,24,25,26,27,28,15,14,29,13,12,11,10,9,8,7,6,5,4,3,2,1,0,16,17,18,19,20,21,22,23) | 0x400000; display_matrix(30, 8, plate, m_grid); } @@ -3776,8 +3776,8 @@ public: void kingman_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); - u32 plate = BITSWAP24(m_plate,23,6,7,5,4,3,2,1,0,13,12,20,19,18,17,16,10,11,9,8,14,15,13,12); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); + u32 plate = bitswap<24>(m_plate,23,6,7,5,4,3,2,1,0,13,12,20,19,18,17,16,10,11,9,8,14,15,13,12); display_matrix(23, 9, plate, grid); } @@ -3897,8 +3897,8 @@ public: void tmtron_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,1,2,3,4,5,6,7,8,9,0); - u32 plate = BITSWAP24(m_plate,23,5,2,21,1,6,7,9,10,11,21,0,19,3,4,8,3,18,17,16,12,13,14,15); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,1,2,3,4,5,6,7,8,9,0); + u32 plate = bitswap<24>(m_plate,23,5,2,21,1,6,7,9,10,11,21,0,19,3,4,8,3,18,17,16,12,13,14,15); display_matrix(23, 10, plate, grid); } @@ -4023,7 +4023,7 @@ WRITE8_MEMBER(vinvader_state::plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - u16 plate = BITSWAP16(m_plate,15,11,7,3,10,6,14,2,9,5,13,1,8,4,12,0); + u16 plate = bitswap<16>(m_plate,15,11,7,3,10,6,14,2,9,5,13,1,8,4,12,0); display_matrix(12, 9, plate, m_grid); } diff --git a/src/mame/drivers/hh_melps4.cpp b/src/mame/drivers/hh_melps4.cpp index f5028008831..9dbdd384e1c 100644 --- a/src/mame/drivers/hh_melps4.cpp +++ b/src/mame/drivers/hh_melps4.cpp @@ -235,8 +235,8 @@ public: void cfrogger_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,0,1,2,3,4,5,6,7,8,9,10,11); - u16 plate = BITSWAP16(m_plate,12,4,13,5,14,6,15,7,3,11,2,10,1,9,0,8); + u16 grid = bitswap<16>(m_grid,15,14,13,12,0,1,2,3,4,5,6,7,8,9,10,11); + u16 plate = bitswap<16>(m_plate,12,4,13,5,14,6,15,7,3,11,2,10,1,9,0,8); display_matrix(16, 12, plate, grid); } @@ -351,8 +351,8 @@ public: void gjungler_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,7,6,5,4,3,2,0,1); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,8,9,10,11,13,16,15,14,13,12,7,0,6,1,5,2,4,3) | 0x2000; + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,8,7,6,5,4,3,2,0,1); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,18,8,9,10,11,13,16,15,14,13,12,7,0,6,1,5,2,4,3) | 0x2000; display_matrix(18, 12, plate, grid); } diff --git a/src/mame/drivers/hh_pic16.cpp b/src/mame/drivers/hh_pic16.cpp index ca8e2a946aa..d7e03652bfa 100644 --- a/src/mame/drivers/hh_pic16.cpp +++ b/src/mame/drivers/hh_pic16.cpp @@ -1395,7 +1395,7 @@ WRITE8_MEMBER(uspbball_state::write_a) WRITE8_MEMBER(uspbball_state::write_b) { // B: digit segment data - m_b = BITSWAP8(data,0,1,2,3,4,5,6,7); + m_b = bitswap<8>(data,0,1,2,3,4,5,6,7); prepare_display(); } diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index be2a9f5bf23..3511785a6cc 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -1775,7 +1775,7 @@ DEVICE_IMAGE_LOAD_MEMBER(quizwizc_state, cartridge) // get cartridge pinout K1 to R connections std::string pinout(image.get_feature("pinout")); m_pinout = std::stoul(pinout, nullptr, 2) & 0xe7; - m_pinout = BITSWAP8(m_pinout,4,3,7,5,2,1,6,0) << 4; + m_pinout = bitswap<8>(m_pinout,4,3,7,5,2,1,6,0) << 4; return image_init_result::PASS; } @@ -1807,7 +1807,7 @@ WRITE16_MEMBER(quizwizc_state::write_r) WRITE16_MEMBER(quizwizc_state::write_o) { // O0-O7: led/digit segment data - m_o = BITSWAP8(data,7,0,1,2,3,4,5,6); + m_o = bitswap<8>(data,7,0,1,2,3,4,5,6); prepare_display(); } @@ -3894,7 +3894,7 @@ WRITE16_MEMBER(f2pbball_state::write_r) WRITE16_MEMBER(f2pbball_state::write_o) { // O0-O7: led state - m_o = BITSWAP8(data,0,7,6,5,4,3,2,1); + m_o = bitswap<8>(data,0,7,6,5,4,3,2,1); prepare_display(); } @@ -4133,7 +4133,7 @@ protected: void gpoker_state::prepare_display() { set_display_segmask(0x7ff, 0x20ff); // 7seg + bottom-right diagonal - u16 segs = BITSWAP16(m_o, 15,14,7,12,11,10,9,8,6,6,5,4,3,2,1,0) & 0x20ff; + u16 segs = bitswap<16>(m_o, 15,14,7,12,11,10,9,8,6,6,5,4,3,2,1,0) & 0x20ff; display_matrix(14, 11, segs | (m_r >> 3 & 0xf00), m_r & 0x7ff); } @@ -4385,8 +4385,8 @@ public: void ginv1000_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,9,8,7); - u16 plate = BITSWAP16(m_plate,15,14,13,12,3,4,7,8,9,10,11,2,6,5,1,0); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,9,8,7); + u16 plate = bitswap<16>(m_plate,15,14,13,12,3,4,7,8,9,10,11,2,6,5,1,0); display_matrix(12, 10, plate, grid); } @@ -4637,7 +4637,7 @@ void fxmcr165_state::prepare_display() { // 7seg digit from O0-O6 m_display_segmask[0] = 0x7f; - m_display_state[0] = BITSWAP8(m_o,7,2,6,5,4,3,1,0) & 0x7f; + m_display_state[0] = bitswap<8>(m_o,7,2,6,5,4,3,1,0) & 0x7f; // leds from R4-R10 m_display_state[1] = m_r >> 4 & 0x7f; @@ -4774,7 +4774,7 @@ WRITE16_MEMBER(elecdet_state::write_r) // R0-R6: select digit set_display_segmask(0x7f, 0x7f); - display_matrix(7, 7, BITSWAP8(m_o,7,5,2,1,4,0,6,3), data); + display_matrix(7, 7, bitswap<8>(m_o,7,5,2,1,4,0,6,3), data); } WRITE16_MEMBER(elecdet_state::write_o) @@ -5332,7 +5332,7 @@ WRITE32_MEMBER(horseran_state::lcd_output_w) // col5-11 and col13-19 are 7segs for (int i = 0; i < 2; i++) - m_display_state[3 + (offset << 1 | i)] = BITSWAP8(data >> (4+8*i),7,3,5,2,0,1,4,6) & 0x7f; + m_display_state[3 + (offset << 1 | i)] = bitswap<8>(data >> (4+8*i),7,3,5,2,0,1,4,6) & 0x7f; set_display_segmask(0x3f<<3, 0x7f); set_display_size(24, 3+6); @@ -6519,7 +6519,7 @@ void mbdtower_state::prepare_display() // update current state if (~m_r & 0x10) { - u8 o = BITSWAP8(m_o,7,0,4,3,2,1,6,5) & 0x7f; + u8 o = bitswap<8>(m_o,7,0,4,3,2,1,6,5) & 0x7f; m_display_state[2] = (m_o & 0x80) ? o : 0; m_display_state[1] = (m_o & 0x80) ? 0 : o; m_display_state[0] = (m_r >> 8 & 1) | (m_r >> 4 & 0xe); @@ -7090,7 +7090,7 @@ WRITE16_MEMBER(stopthief_state::write_r) { // R0-R2: select digit set_display_segmask(7, 0x7f); - display_matrix(7, 3, BITSWAP8(m_o,3,5,2,1,4,0,6,7) & 0x7f, data & 7); + display_matrix(7, 3, bitswap<8>(m_o,3,5,2,1,4,0,6,7) & 0x7f, data & 7); // R3-R8(tied together): speaker out int level = 0; diff --git a/src/mame/drivers/hh_ucom4.cpp b/src/mame/drivers/hh_ucom4.cpp index bad818daab8..79293b89db2 100644 --- a/src/mame/drivers/hh_ucom4.cpp +++ b/src/mame/drivers/hh_ucom4.cpp @@ -281,8 +281,8 @@ public: void ufombs_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,3,2,1,0,4,5,6,7,8); - u16 plate = BITSWAP16(m_plate,15,14,13,12,11,7,10,6,9,5,8,4,0,1,2,3); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,3,2,1,0,4,5,6,7,8); + u16 plate = bitswap<16>(m_plate,15,14,13,12,11,7,10,6,9,5,8,4,0,1,2,3); display_matrix(10, 9, plate, grid); } @@ -394,7 +394,7 @@ public: void ssfball_state::prepare_display() { - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,10,9,8,0,1,2,4,5,6); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,10,9,8,0,1,2,4,5,6); display_matrix(16, 9, plate, m_grid); } @@ -538,7 +538,7 @@ public: void bmsoccer_state::prepare_display() { - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,8,4,0,9,5,1,10,6,2); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,8,4,0,9,5,1,10,6,2); display_matrix(16, 9, plate, m_grid); } @@ -661,8 +661,8 @@ public: void bmsafari_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); - u16 plate = BITSWAP16(m_plate,15,14,13,12,11,7,10,2,9,5,8,4,0,1,6,3); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,0,1,2,3,4,5,6,7,8); + u16 plate = bitswap<16>(m_plate,15,14,13,12,11,7,10,2,9,5,8,4,0,1,6,3); display_matrix(10, 9, plate, grid); } @@ -771,7 +771,7 @@ public: void splasfgt_state::prepare_display() { - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,17,13,1,0,8,6,0,10,11,14,15,16,9,5,7,4,2,3); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,18,17,13,1,0,8,6,0,10,11,14,15,16,9,5,7,4,2,3); display_matrix(16, 9, plate, m_grid); } @@ -923,8 +923,8 @@ public: void bcclimbr_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,7,6,0,1,2,3,4,5); - u32 plate = BITSWAP24(m_plate,23,22,21,20,16,17,18,19,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); + u8 grid = bitswap<8>(m_grid,7,6,0,1,2,3,4,5); + u32 plate = bitswap<24>(m_plate,23,22,21,20,16,17,18,19,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0); display_matrix(20, 6, plate, grid); } @@ -1141,8 +1141,8 @@ public: void invspace_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,8,9,7,6,5,4,3,2,1,0); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,9,14,13,8,15,11,10,7,11,3,2,6,10,1,5,9,0,4,8); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,8,9,7,6,5,4,3,2,1,0); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,9,14,13,8,15,11,10,7,11,3,2,6,10,1,5,9,0,4,8); display_matrix(19, 9, plate, grid); } @@ -1243,7 +1243,7 @@ public: void efball_state::prepare_display() { - u16 plate = BITSWAP16(m_plate,15,14,13,12,11,4,3,0,2,1,6,10,9,5,8,7); + u16 plate = bitswap<16>(m_plate,15,14,13,12,11,4,3,0,2,1,6,10,9,5,8,7); display_matrix(11, 10, plate, m_grid); } @@ -1356,8 +1356,8 @@ public: void galaxy2_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); - u16 plate = BITSWAP16(m_plate,15,3,2,6,1,5,4,0,11,10,7,12,14,13,8,9); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); + u16 plate = bitswap<16>(m_plate,15,3,2,6,1,5,4,0,11,10,7,12,14,13,8,9); display_matrix(15, 10, plate, grid); } @@ -1467,8 +1467,8 @@ public: void astrocmd_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,4,5,6,7,0,1,2,3); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,3,2,12,13,14,15,16,17,18,0,1,4,8,5,9,7,11,6,10); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,8,4,5,6,7,0,1,2,3); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,3,2,12,13,14,15,16,17,18,0,1,4,8,5,9,7,11,6,10); display_matrix(17, 9, plate, grid); } @@ -1746,8 +1746,8 @@ public: void mvbfree_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); - u16 plate = BITSWAP16(m_plate,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); + u16 grid = bitswap<16>(m_grid,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); + u16 plate = bitswap<16>(m_plate,15,14,13,12,11,10,0,1,2,3,4,5,6,7,8,9); display_matrix(10, 14, plate, grid); } @@ -1967,8 +1967,8 @@ public: void tccombat_state::prepare_display() { - u16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,3,2,1,0,7,6,5,4); - u32 plate = BITSWAP24(m_plate,23,22,21,20,11,15,3,10,14,2,9,13,1,0,12,8,15,1,5,0,3,7,2,6); + u16 grid = bitswap<16>(m_grid,15,14,13,12,11,10,9,8,3,2,1,0,7,6,5,4); + u32 plate = bitswap<24>(m_plate,23,22,21,20,11,15,3,10,14,2,9,13,1,0,12,8,15,1,5,0,3,7,2,6); display_matrix(20, 9, plate, grid); } @@ -2229,8 +2229,8 @@ public: void tmpacman_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,16,17,18,11,10,9,8,0,2,3,1,4,5,6,7,12,13,14,15) | 0x100; + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,16,17,18,11,10,9,8,0,2,3,1,4,5,6,7,12,13,14,15) | 0x100; display_matrix(19, 8, plate, grid); } @@ -2334,7 +2334,7 @@ public: void tmscramb_state::prepare_display() { - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,17,3,15,2,14,1,13,16,0,12,8,4,9,5,10,6,11,7) | 0x400; + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,18,17,3,15,2,14,1,13,16,0,12,8,4,9,5,10,6,11,7) | 0x400; display_matrix(17, 10, plate, m_grid); } @@ -2436,8 +2436,8 @@ public: void tcaveman_state::prepare_display() { - u8 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); - u32 plate = BITSWAP24(m_plate,23,22,21,20,19,10,11,5,6,7,8,0,9,2,18,17,16,3,15,14,13,12,4,1) | 0x40; + u8 grid = bitswap<8>(m_grid,0,1,2,3,4,5,6,7); + u32 plate = bitswap<24>(m_plate,23,22,21,20,19,10,11,5,6,7,8,0,9,2,18,17,16,3,15,14,13,12,4,1) | 0x40; display_matrix(19, 8, plate, grid); } diff --git a/src/mame/drivers/hnayayoi.cpp b/src/mame/drivers/hnayayoi.cpp index 12bc4ec803e..01d847956ac 100644 --- a/src/mame/drivers/hnayayoi.cpp +++ b/src/mame/drivers/hnayayoi.cpp @@ -694,7 +694,7 @@ DRIVER_INIT_MEMBER(hnayayoi_state,hnfubuki) /* swap data bits 0 and 1 */ for (i = 0; i < len; i++) { - rom[i] = BITSWAP8(rom[i],7,6,5,4,3,2,0,1); + rom[i] = bitswap<8>(rom[i],7,6,5,4,3,2,0,1); } } diff --git a/src/mame/drivers/hprot1.cpp b/src/mame/drivers/hprot1.cpp index 56d9913e638..03bac45704c 100644 --- a/src/mame/drivers/hprot1.cpp +++ b/src/mame/drivers/hprot1.cpp @@ -100,7 +100,7 @@ DRIVER_INIT_MEMBER( hprot1_state, hprot1 ) bitswapped_ROM[i] = ROM[i]; for(i=0x0000;i<0x10000;i++) - ROM[BITSWAP16(i, 15, 14, 13, 12, 11, 10, 9, 8, 3, 2, 1, 0, 4, 5, 6, 7)] = bitswapped_ROM[i]; + ROM[bitswap<16>(i, 15, 14, 13, 12, 11, 10, 9, 8, 3, 2, 1, 0, 4, 5, 6, 7)] = bitswapped_ROM[i]; } //A4 = display RS diff --git a/src/mame/drivers/hshavoc.cpp b/src/mame/drivers/hshavoc.cpp index 4a9e6213155..ae7d7ade2af 100644 --- a/src/mame/drivers/hshavoc.cpp +++ b/src/mame/drivers/hshavoc.cpp @@ -131,7 +131,7 @@ DRIVER_INIT_MEMBER(md_boot_state,hshavoc) for (x = 0; x < rom_size / 2; x++) { - src[x] = BITSWAP16(src[x], + src[x] = bitswap<16>(src[x], 7, 15,6, 14, 5, 2, 1, 10, 13,4, 12,3, @@ -152,7 +152,7 @@ DRIVER_INIT_MEMBER(md_boot_state,hshavoc) if (src[x] & 0x0100) src[x] ^= 0x0004; - src[x] = BITSWAP16(src[x], 15,14,13,12, + src[x] = bitswap<16>(src[x], 15,14,13,12, 11,9, 10,8, 7, 6, 5, 4, 3, 2, 1, 0 ); @@ -162,13 +162,13 @@ DRIVER_INIT_MEMBER(md_boot_state,hshavoc) /* START e? from e80000 to end you need THIS ALONE to match the genesis rom */ for (x = rom_size / 2; x < 0x100000 / 2; x++) { - src[x] = BITSWAP16(src[x], + src[x] = bitswap<16>(src[x], 7, 15,6, 14, 5, 2, 1, 10, 13,4, 12,3, 11,0, 8, 9 ); - src[x] = BITSWAP16(src[x], + src[x] = bitswap<16>(src[x], 15,14,13,12, 11,10,9, 2, 7, 6, 5, 4, @@ -192,7 +192,7 @@ DRIVER_INIT_MEMBER(md_boot_state,hshavoc) { src[x] ^= 0x0107; //? seems conditional.. - src[x] = BITSWAP16(src[x], + src[x] = bitswap<16>(src[x], 15,13,14,12, 11,10,9, 0, 8, 6, 5, 4, diff --git a/src/mame/drivers/igs011.cpp b/src/mame/drivers/igs011.cpp index 5e4ae3856fd..dd9ead31478 100644 --- a/src/mame/drivers/igs011.cpp +++ b/src/mame/drivers/igs011.cpp @@ -827,7 +827,7 @@ void igs011_state::lhb2_decrypt() if ((i & 0x3080) != 0x3080 && (i & 0x3090) != 0x3010) x ^= 0x0020; - j = BITSWAP24(i, 23,22,21,20,19,18,17,16,15,14,13, 8, 11,10, 9, 2, 7,6,5,4,3, 12, 1,0); + j = bitswap<24>(i, 23,22,21,20,19,18,17,16,15,14,13, 8, 11,10, 9, 2, 7,6,5,4,3, 12, 1,0); result_data[j] = x; } @@ -849,7 +849,7 @@ void igs011_state::nkishusp_decrypt() uint16_t x = src[i]; // lhb2 address scrambling - j = BITSWAP24(i, 23,22,21,20,19,18,17,16,15,14,13, 8, 11,10, 9, 2, 7,6,5,4,3, 12, 1,0); + j = bitswap<24>(i, 23,22,21,20,19,18,17,16,15,14,13, 8, 11,10, 9, 2, 7,6,5,4,3, 12, 1,0); // ryukobou xor: @@ -1047,7 +1047,7 @@ void igs011_state::lhb2_gfx_decrypt() std::vector result_data(rom_size); for (i=0; i(i, 23,22,21,20, 19, 17,16,15, 13,12, 10,9,8,7,6,5,4, 2,1, 3, 11, 14, 18, 0)]; memcpy(src,&result_data[0],rom_size); } @@ -1060,7 +1060,7 @@ void igs011_state::drgnwrld_gfx_decrypt() std::vector result_data(rom_size); for (i=0; i(i, 23,22,21,20,19,18,17,16,15, 12, 13, 14, 11,10,9,8,7,6,5,4,3,2,1,0)]; memcpy(src,&result_data[0],rom_size); } @@ -1742,7 +1742,7 @@ READ16_MEMBER(igs011_state::lhb2_igs003_r) break; case 0x03: - return BITSWAP16(m_igs003_prot_hold, 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; + return bitswap<16>(m_igs003_prot_hold, 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; // Protection: // 0544FE: 20 21 22 24 25 26 27 28 2A 2B 2C 2D 2E 30 31 32 33 34 @@ -2010,7 +2010,7 @@ READ16_MEMBER(igs011_state::vbowl_igs003_r) case 0x01: return ioport("IN1")->read(); case 0x03: - return BITSWAP16(m_igs003_prot_hold, 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; + return bitswap<16>(m_igs003_prot_hold, 14,11,8,6,4,3,1,0, 5,2,9,7,10,13,12,15) & 0xff; case 0x20: return 0x49; case 0x21: return 0x47; diff --git a/src/mame/drivers/igs017.cpp b/src/mame/drivers/igs017.cpp index f88b3511c7e..f71cb186a5e 100644 --- a/src/mame/drivers/igs017.cpp +++ b/src/mame/drivers/igs017.cpp @@ -225,24 +225,24 @@ uint16_t igs017_state::mgcs_palette_bitswap(uint16_t bgr) { bgr = ((bgr & 0xff00) >> 8) | ((bgr & 0x00ff) << 8); - return BITSWAP16(bgr, 7, 8, 9, 2, 14, 3, 13, 15, 12, 11, 10, 0, 1, 4, 5, 6); + return bitswap<16>(bgr, 7, 8, 9, 2, 14, 3, 13, 15, 12, 11, 10, 0, 1, 4, 5, 6); } uint16_t igs017_state::lhzb2a_palette_bitswap(uint16_t bgr) { // bgr = ((bgr & 0xff00) >> 8) | ((bgr & 0x00ff) << 8); - return BITSWAP16(bgr, 15,9,13,12,11,5,4,8,7,6,0,14,3,2,1,10); + return bitswap<16>(bgr, 15,9,13,12,11,5,4,8,7,6,0,14,3,2,1,10); } uint16_t igs017_state::tjsb_palette_bitswap(uint16_t bgr) { // bitswap - return BITSWAP16(bgr, 15,12,3,6,10,5,4,2,9,13,8,7,11,1,0,14); + return bitswap<16>(bgr, 15,12,3,6,10,5,4,2,9,13,8,7,11,1,0,14); } uint16_t igs017_state::slqz2_palette_bitswap(uint16_t bgr) { - return BITSWAP16(bgr, 15,14,9,4,11,10,12,3,7,6,5,8,13,2,1,0); + return bitswap<16>(bgr, 15,14,9,4,11,10,12,3,7,6,5,8,13,2,1,0); } @@ -297,7 +297,7 @@ void igs017_state::decrypt_program_rom(int mask, int a7, int a6, int a5, int a4, // address lines swap for (i = 0;i < length;i++) { - int addr = (i & ~0xff) | BITSWAP8(i,a7,a6,a5,a4,a3,a2,a1,a0); + int addr = (i & ~0xff) | bitswap<8>(i,a7,a6,a5,a4,a3,a2,a1,a0); rom[i] = tmp[addr]; } @@ -363,7 +363,7 @@ void igs017_state::tjsb_decrypt_sprites() memcpy(tmp.get(), rom, length); for (i = 0; i < length; i++) { - addr = (i & ~0xff) | BITSWAP8(i,7,6,5,2,1,4,3,0); + addr = (i & ~0xff) | bitswap<8>(i,7,6,5,2,1,4,3,0); rom[i] = tmp[addr]; } @@ -371,7 +371,7 @@ void igs017_state::tjsb_decrypt_sprites() for (i = 0; i < length; i += 2) { uint16_t data = (rom[i+1] << 8) | rom[i+0]; // x-22222-11111-00000 - data = BITSWAP16(data, 15, 14,13,12,11,10, 9,1,7,6,5, 4,3,2,8,0); + data = bitswap<16>(data, 15, 14,13,12,11,10, 9,1,7,6,5, 4,3,2,8,0); rom[i+0] = data; rom[i+1] = data >> 8; } @@ -447,8 +447,8 @@ void igs017_state::mgcs_decrypt_tiles() memcpy(&tmp[0],rom,length); for (i = 0;i < length;i++) { - int addr = (i & ~0xffff) | BITSWAP16(i,15,14,13,12,11,10,6,7,8,9,5,4,3,2,1,0); - rom[i^1] = BITSWAP8(tmp[addr],0,1,2,3,4,5,6,7); + int addr = (i & ~0xffff) | bitswap<16>(i,15,14,13,12,11,10,6,7,8,9,5,4,3,2,1,0); + rom[i^1] = bitswap<8>(tmp[addr],0,1,2,3,4,5,6,7); } } @@ -463,10 +463,10 @@ void igs017_state::mgcs_flip_sprites() uint16_t pixels = (rom[i+1] << 8) | rom[i+0]; // flip bits - pixels = BITSWAP16(pixels,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); + pixels = bitswap<16>(pixels,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15); // flip pixels - pixels = BITSWAP16(pixels,15, 0,1,2,3,4, 5,6,7,8,9, 10,11,12,13,14); + pixels = bitswap<16>(pixels,15, 0,1,2,3,4, 5,6,7,8,9, 10,11,12,13,14); rom[i+0] = pixels; rom[i+1] = pixels >> 8; @@ -507,8 +507,8 @@ void igs017_state::tarzan_decrypt_tiles() memcpy(&tmp[0],rom,length); for (i = 0;i < length;i++) { - int addr = (i & ~0xffff) | BITSWAP16(i,15,14,13,12,11,7,8,6,10,9,5,4,3,2,1,0); - rom[i] = BITSWAP8(tmp[addr],0,1,2,3,4,5,6,7); + int addr = (i & ~0xffff) | bitswap<16>(i,15,14,13,12,11,7,8,6,10,9,5,4,3,2,1,0); + rom[i] = bitswap<8>(tmp[addr],0,1,2,3,4,5,6,7); } } @@ -765,7 +765,7 @@ void igs017_state::lhzb2_decrypt_tiles() memcpy(&tmp[0], rom, length); for (i = 0; i < length; i++) { - addr = (i & ~0xffffff) | BITSWAP24(i,23,22,21,20,19,18,17,1,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,0); + addr = (i & ~0xffffff) | bitswap<24>(i,23,22,21,20,19,18,17,1,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,0); rom[i] = tmp[addr]; } } @@ -781,7 +781,7 @@ void igs017_state::lhzb2_decrypt_sprites() memcpy(tmp.get(), rom, length); for (i = 0; i < length; i++) { - addr = (i & ~0xffff) | BITSWAP16(i,15,14,13,6,7,10,9,8,11,12,5,4,3,2,1,0); + addr = (i & ~0xffff) | bitswap<16>(i,15,14,13,6,7,10,9,8,11,12,5,4,3,2,1,0); rom[i] = tmp[addr]; } @@ -789,7 +789,7 @@ void igs017_state::lhzb2_decrypt_sprites() for (i = 0;i < length;i+=2) { uint16_t data = (rom[i+1] << 8) | rom[i+0]; // x-22222-11111-00000 - data = BITSWAP16(data, 15, 7,6,5,4,3, 2,1,0,14,13, 12,11,10,9,8); + data = bitswap<16>(data, 15, 7,6,5,4,3, 2,1,0,14,13, 12,11,10,9,8); rom[i+0] = data; rom[i+1] = data >> 8; } @@ -989,7 +989,7 @@ void igs017_state::slqz2_decrypt_tiles() memcpy(&tmp[0],rom,length); for (i = 0;i < length;i++) { - int addr = (i & ~0xff) | BITSWAP8(i,7,4,5,6,3,2,1,0); + int addr = (i & ~0xff) | bitswap<8>(i,7,4,5,6,3,2,1,0); rom[i] = tmp[addr]; } } @@ -1096,9 +1096,9 @@ void igs017_state::spkrform_decrypt_sprites() for (i = 0; i < length; i++) { if (i & 0x80000) - addr = (i & ~0xff) | BITSWAP8(i,7,6,3,4,5,2,1,0); + addr = (i & ~0xff) | bitswap<8>(i,7,6,3,4,5,2,1,0); else - addr = (i & ~0xffff) | BITSWAP16(i,15,14,13,12,11,10, 4, 8,7,6,5, 9,3,2,1,0); + addr = (i & ~0xffff) | bitswap<16>(i,15,14,13,12,11,10, 4, 8,7,6,5, 9,3,2,1,0); rom[i] = tmp[addr]; } @@ -1412,7 +1412,7 @@ READ16_MEMBER(igs017_state::mgcs_magic_r) case 0x01: { - uint16_t ret = BITSWAP8( (BITSWAP8(m_scramble_data, 0,1,2,3,4,5,6,7) + 1) & 3, 4,5,6,7, 0,1,2,3); + uint16_t ret = bitswap<8>( (bitswap<8>(m_scramble_data, 0,1,2,3,4,5,6,7) + 1) & 3, 4,5,6,7, 0,1,2,3); logerror("%s: reading %02x from igs_magic = %02x\n", machine().describe_context(), ret, m_igs_magic[0]); return ret; } @@ -1627,7 +1627,7 @@ READ16_MEMBER(igs017_state::mgdha_magic_r) return ioport("BUTTONS")->read(); case 0x02: - return BITSWAP8(ioport("DSW2")->read(), 0,1,2,3,4,5,6,7); + return bitswap<8>(ioport("DSW2")->read(), 0,1,2,3,4,5,6,7); case 0x03: { diff --git a/src/mame/drivers/igs_m027.cpp b/src/mame/drivers/igs_m027.cpp index a2389ee2a6a..d3932cfb485 100644 --- a/src/mame/drivers/igs_m027.cpp +++ b/src/mame/drivers/igs_m027.cpp @@ -212,7 +212,7 @@ void igs_m027_state::sdwx_gfx_decrypt() std::vector result_data(rom_size); for (i=0; i(i, 23,22,21,20,19,18,17,16,15,14,13,12,11,8,7,6,10,9,5,4,3,2,1,0)]; for (i=0; i(A,15,14,13,12,11,10,9,8,7,6,5,4,3,0,1,2); rom[A] = tmp[addr]; } } diff --git a/src/mame/drivers/inder.cpp b/src/mame/drivers/inder.cpp index ae429be67d7..230c3c4cc25 100644 --- a/src/mame/drivers/inder.cpp +++ b/src/mame/drivers/inder.cpp @@ -1121,7 +1121,7 @@ WRITE8_MEMBER( inder_state::sw_w ) WRITE8_MEMBER( inder_state::sn_w ) { - m_sn->write(space, 0, BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7)); + m_sn->write(space, 0, bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7)); } WRITE8_MEMBER( inder_state::sndcmd_lapbylap_w ) diff --git a/src/mame/drivers/jack.cpp b/src/mame/drivers/jack.cpp index eccc17deb26..9bcf5b51ea5 100644 --- a/src/mame/drivers/jack.cpp +++ b/src/mame/drivers/jack.cpp @@ -1590,16 +1590,16 @@ DRIVER_INIT_MEMBER(jack_state,striv) if (A & 0x1000) { if (A & 4) - ROM[A] = BITSWAP8(data,7,2,5,1,3,6,4,0) ^ 1; + ROM[A] = bitswap<8>(data,7,2,5,1,3,6,4,0) ^ 1; else - ROM[A] = BITSWAP8(data,0,2,5,1,3,6,4,7) ^ 0x81; + ROM[A] = bitswap<8>(data,0,2,5,1,3,6,4,7) ^ 0x81; } else { if (A & 4) - ROM[A] = BITSWAP8(data,7,2,5,1,3,6,4,0) ^ 1; + ROM[A] = bitswap<8>(data,7,2,5,1,3,6,4,0) ^ 1; else - ROM[A] = BITSWAP8(data,0,2,5,1,3,6,4,7); + ROM[A] = bitswap<8>(data,0,2,5,1,3,6,4,7); } } diff --git a/src/mame/drivers/jclub2.cpp b/src/mame/drivers/jclub2.cpp index 7ee386c5b59..096d73fbf49 100644 --- a/src/mame/drivers/jclub2.cpp +++ b/src/mame/drivers/jclub2.cpp @@ -1499,7 +1499,7 @@ DRIVER_INIT_MEMBER(darkhors_state,darkhors) std::vector temp(len); for (int i = 0; i < len; i++) - temp[i] = eeprom[BITSWAP8(i,7,5,4,3,2,1,0,6)]; + temp[i] = eeprom[bitswap<8>(i,7,5,4,3,2,1,0,6)]; memcpy(eeprom, &temp[0], len); } diff --git a/src/mame/drivers/jongkyo.cpp b/src/mame/drivers/jongkyo.cpp index 6e0eb848ba5..082da98218e 100644 --- a/src/mame/drivers/jongkyo.cpp +++ b/src/mame/drivers/jongkyo.cpp @@ -564,7 +564,7 @@ DRIVER_INIT_MEMBER(jongkyo_state,jongkyo) /* first of all, do a simple bitswap */ for (int i = 0x6000; i < 0x8c00; ++i) { - rom[i] = BITSWAP8(rom[i], 7,6,5,3,4,2,1,0); + rom[i] = bitswap<8>(rom[i], 7,6,5,3,4,2,1,0); } uint8_t *opcodes = auto_alloc_array(machine(), uint8_t, 0x6c00+0x400*8); diff --git a/src/mame/drivers/jp.cpp b/src/mame/drivers/jp.cpp index 821f220e71f..d66d3ba3477 100644 --- a/src/mame/drivers/jp.cpp +++ b/src/mame/drivers/jp.cpp @@ -256,7 +256,7 @@ void jp_state::update_display() if (t == 8) { // ball number segment = m_disp_data >> 6; - output().set_digit_value(94, BITSWAP8(segment, 0, 1, 2, 3, 4, 5, 6, 7) ^ 0xff); + output().set_digit_value(94, bitswap<8>(segment, 0, 1, 2, 3, 4, 5, 6, 7) ^ 0xff); } else if (t < 8) { // main displays diff --git a/src/mame/drivers/k28.cpp b/src/mame/drivers/k28.cpp index c78a73c7f81..965bf62f0b3 100644 --- a/src/mame/drivers/k28.cpp +++ b/src/mame/drivers/k28.cpp @@ -337,7 +337,7 @@ WRITE_LINE_MEMBER(k28_state::mcu_prog_w) // output 0-15: digit segment data u16 seg_data = (u16)(m_vfd_shiftreg >> 19); - seg_data = BITSWAP16(seg_data,0,1,13,9,10,12,14,8,3,4,5,2,15,11,6,7); + seg_data = bitswap<16>(seg_data,0,1,13,9,10,12,14,8,3,4,5,2,15,11,6,7); // output 16-24: digit select u16 digit_sel = (u16)(m_vfd_shiftreg >> 10) & 0x1ff; diff --git a/src/mame/drivers/kaneko16.cpp b/src/mame/drivers/kaneko16.cpp index a39e9728918..7e535c74755 100644 --- a/src/mame/drivers/kaneko16.cpp +++ b/src/mame/drivers/kaneko16.cpp @@ -278,14 +278,14 @@ WRITE16_MEMBER(kaneko16_berlwall_state::berlwall_oki_w) READ16_MEMBER(kaneko16_berlwall_state::berlwall_spriteram_r) { - offset = BITSWAP16(offset, 15, 14, 13, 12, 2, 11, 10, 9, 8, 7, 6, 5, 4, 3, 1, 0); + offset = bitswap<16>(offset, 15, 14, 13, 12, 2, 11, 10, 9, 8, 7, 6, 5, 4, 3, 1, 0); offset ^= 0x800; return m_spriteram[offset]; } WRITE16_MEMBER(kaneko16_berlwall_state::berlwall_spriteram_w) { - offset = BITSWAP16(offset, 15, 14, 13, 12, 2, 11, 10, 9, 8, 7, 6, 5, 4, 3, 1, 0); + offset = bitswap<16>(offset, 15, 14, 13, 12, 2, 11, 10, 9, 8, 7, 6, 5, 4, 3, 1, 0); offset ^= 0x800; COMBINE_DATA(&m_spriteram[offset]); } @@ -294,7 +294,7 @@ READ16_MEMBER(kaneko16_berlwall_state::berlwall_spriteregs_r) { if (offset & 0x4) return 0; - offset = BITSWAP8(offset, 7, 6, 5, 2, 4, 3, 1, 0); + offset = bitswap<8>(offset, 7, 6, 5, 2, 4, 3, 1, 0); return m_kaneko_spr->kaneko16_sprites_regs_r(space, offset, mem_mask); } @@ -302,7 +302,7 @@ WRITE16_MEMBER(kaneko16_berlwall_state::berlwall_spriteregs_w) { if (offset & 0x4) return; - offset = BITSWAP8(offset, 7, 6, 5, 2, 4, 3, 1, 0); + offset = bitswap<8>(offset, 7, 6, 5, 2, 4, 3, 1, 0); m_kaneko_spr->kaneko16_sprites_regs_w(space, offset, data, mem_mask); } diff --git a/src/mame/drivers/kas89.cpp b/src/mame/drivers/kas89.cpp index d2a067c118f..cf1bddcac47 100644 --- a/src/mame/drivers/kas89.cpp +++ b/src/mame/drivers/kas89.cpp @@ -841,7 +841,7 @@ DRIVER_INIT_MEMBER(kas89_state,kas89) /* Unscrambling data lines */ for ( i = 0; i < memsize; i++ ) { - mem[i] = BITSWAP8(mem[i], 3, 1, 0, 5, 6, 4, 7, 2); + mem[i] = bitswap<8>(mem[i], 3, 1, 0, 5, 6, 4, 7, 2); } /* Unscrambling address lines */ @@ -849,7 +849,7 @@ DRIVER_INIT_MEMBER(kas89_state,kas89) memcpy(&buf[0], mem, memsize); for ( i = 0; i < memsize; i++ ) { - mem[BITSWAP16(i, 15, 14, 5, 6, 3, 0, 12, 1, 9, 13, 4, 7, 10, 8, 2, 11)] = buf[i]; + mem[bitswap<16>(i, 15, 14, 5, 6, 3, 0, 12, 1, 9, 13, 4, 7, 10, 8, 2, 11)] = buf[i]; } } diff --git a/src/mame/drivers/kingdrby.cpp b/src/mame/drivers/kingdrby.cpp index 90f87d7b628..36f94ac3055 100644 --- a/src/mame/drivers/kingdrby.cpp +++ b/src/mame/drivers/kingdrby.cpp @@ -904,7 +904,7 @@ PALETTE_INIT_MEMBER(kingdrby_state,kingdrbb) for(i = 0; i < 0x200; i++) { /* this set has an extra address line shuffle applied on the prom */ - prom[i] = raw_prom[BITSWAP16(i, 15,14,13,12,11,10,9,8,7,6,5,0,1,2,3,4)+0x1000]; + prom[i] = raw_prom[bitswap<16>(i, 15,14,13,12,11,10,9,8,7,6,5,0,1,2,3,4)+0x1000]; } for(i = 0; i < 0x200; i++) diff --git a/src/mame/drivers/kurukuru.cpp b/src/mame/drivers/kurukuru.cpp index d9c774e9b76..1494be17b4c 100644 --- a/src/mame/drivers/kurukuru.cpp +++ b/src/mame/drivers/kurukuru.cpp @@ -604,7 +604,7 @@ WRITE8_MEMBER(kurukuru_state::kurukuru_adpcm_reset_w) bit 2 = S2 bit 3 = S1 */ - m_adpcm->playmode_w(BITSWAP8((data>>1), 7,6,5,4,3,0,1,2)); + m_adpcm->playmode_w(bitswap<8>((data>>1), 7,6,5,4,3,0,1,2)); m_adpcm->reset_w(data & 1); } diff --git a/src/mame/drivers/lasso.cpp b/src/mame/drivers/lasso.cpp index c391fdcc18d..2cf4d92ba2a 100644 --- a/src/mame/drivers/lasso.cpp +++ b/src/mame/drivers/lasso.cpp @@ -64,7 +64,7 @@ READ8_MEMBER(lasso_state::sound_status_r) WRITE8_MEMBER(lasso_state::sound_select_w) { - uint8_t to_write = BITSWAP8(*m_chip_data, 0, 1, 2, 3, 4, 5, 6, 7); + uint8_t to_write = bitswap<8>(*m_chip_data, 0, 1, 2, 3, 4, 5, 6, 7); if (~data & 0x01) /* chip #0 */ m_sn_1->write(space, 0, to_write); diff --git a/src/mame/drivers/lbeach.cpp b/src/mame/drivers/lbeach.cpp index fd9e89deb9f..2ecda224a5a 100644 --- a/src/mame/drivers/lbeach.cpp +++ b/src/mame/drivers/lbeach.cpp @@ -202,7 +202,7 @@ WRITE8_MEMBER(lbeach_state::lbeach_fg_vram_w) READ8_MEMBER(lbeach_state::lbeach_in1_r) { // d6,7(steering wheel) need to be swapped - return BITSWAP8(ioport("IN1")->read(),6,7,5,4,3,2,1,0); + return bitswap<8>(ioport("IN1")->read(),6,7,5,4,3,2,1,0); } READ8_MEMBER(lbeach_state::lbeach_in2_r) diff --git a/src/mame/drivers/lc80.cpp b/src/mame/drivers/lc80.cpp index ca64d778460..10335127097 100644 --- a/src/mame/drivers/lc80.cpp +++ b/src/mame/drivers/lc80.cpp @@ -164,7 +164,7 @@ WRITE8_MEMBER( lc80_state::pio1_pa_w ) */ - m_segment = BITSWAP8(~data, 4, 3, 1, 6, 7, 5, 0, 2); + m_segment = bitswap<8>(~data, 4, 3, 1, 6, 7, 5, 0, 2); update_display(); } diff --git a/src/mame/drivers/legionna.cpp b/src/mame/drivers/legionna.cpp index 21936a8ed6b..e8646105192 100644 --- a/src/mame/drivers/legionna.cpp +++ b/src/mame/drivers/legionna.cpp @@ -1054,7 +1054,7 @@ void legionna_state::descramble_legionnaire_gfx(uint8_t* src) int i; for (i = 0;i < len; i++) { - buffer[i] = src[BITSWAP24(i, + buffer[i] = src[bitswap<24>(i, 23,22,21,20, 19,18,17,16, 6,5,15,14,13,12, diff --git a/src/mame/drivers/lemmings.cpp b/src/mame/drivers/lemmings.cpp index 900a4649a1f..023acc82e7c 100644 --- a/src/mame/drivers/lemmings.cpp +++ b/src/mame/drivers/lemmings.cpp @@ -51,7 +51,7 @@ READ16_MEMBER(lemmings_state::lemmings_trackball_r) READ16_MEMBER( lemmings_state::lem_protection_region_0_146_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -60,7 +60,7 @@ READ16_MEMBER( lemmings_state::lem_protection_region_0_146_r ) WRITE16_MEMBER( lemmings_state::lem_protection_region_0_146_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/looping.cpp b/src/mame/drivers/looping.cpp index 9f0e58c0e4a..610e063c384 100644 --- a/src/mame/drivers/looping.cpp +++ b/src/mame/drivers/looping.cpp @@ -913,7 +913,7 @@ DRIVER_INIT_MEMBER(looping_state,looping) /* bitswap the TMS9995 ROMs */ for (i = 0; i < length; i++) - rom[i] = BITSWAP8(rom[i], 0,1,2,3,4,5,6,7); + rom[i] = bitswap<8>(rom[i], 0,1,2,3,4,5,6,7); /* install protection handlers */ m_maincpu->space(AS_PROGRAM).install_read_handler(0x7000, 0x7007, read8_delegate(FUNC(looping_state::protection_r), this)); diff --git a/src/mame/drivers/ltcasino.cpp b/src/mame/drivers/ltcasino.cpp index 05df8f26cd7..37035b365e8 100644 --- a/src/mame/drivers/ltcasino.cpp +++ b/src/mame/drivers/ltcasino.cpp @@ -723,7 +723,7 @@ DRIVER_INIT_MEMBER(ltcasino_state,mv4in1) int i; uint8_t *rom = memregion("maincpu")->base(); for(i=0;i<0x10000;i++) - rom[i]=BITSWAP8(rom[i],7,6,5,4,3,1,2,0); + rom[i]=bitswap<8>(rom[i],7,6,5,4,3,1,2,0); } diff --git a/src/mame/drivers/ltd.cpp b/src/mame/drivers/ltd.cpp index 83c848d8958..f8b14c62515 100644 --- a/src/mame/drivers/ltd.cpp +++ b/src/mame/drivers/ltd.cpp @@ -306,7 +306,7 @@ WRITE8_MEMBER( ltd_state::port1_w ) if (m_port2 & 0x10) { uint8_t row = m_digit & 15; - uint8_t segment = BITSWAP8(data, 7, 0, 1, 2, 3, 4, 5, 6); + uint8_t segment = bitswap<8>(data, 7, 0, 1, 2, 3, 4, 5, 6); switch (m_counter) { diff --git a/src/mame/drivers/m90.cpp b/src/mame/drivers/m90.cpp index b121752189a..2ed7cb6e896 100644 --- a/src/mame/drivers/m90.cpp +++ b/src/mame/drivers/m90.cpp @@ -1248,10 +1248,10 @@ DRIVER_INIT_MEMBER(m90_state,bomblord) for (int i = 0; i < 0x100000 / 2; i += 4) { - ROM[i+0]=BITSWAP16(ROM[i+0],0xc,0x8,0xd,0xe,0xf,0xb,0xa,0x9,0x6,0x4,0x7,0x3,0x1,0x2,0x0,0x5); - ROM[i+1]=BITSWAP16(ROM[i+1],0xc,0xb,0xd,0xa,0xe,0x9,0xf,0x8,0x0,0x6,0x1,0x5,0x3,0x4,0x2,0x7); - ROM[i+2]=BITSWAP16(ROM[i+2],0xd,0x9,0xc,0x8,0xe,0xf,0xa,0xb,0x4,0x7,0x3,0x2,0x5,0x6,0x1,0x0); - ROM[i+3]=BITSWAP16(ROM[i+3],0xe,0xd,0xf,0x8,0xb,0xa,0x9,0xc,0x6,0x3,0x7,0x5,0x0,0x1,0x4,0x2); + ROM[i+0]=bitswap<16>(ROM[i+0],0xc,0x8,0xd,0xe,0xf,0xb,0xa,0x9,0x6,0x4,0x7,0x3,0x1,0x2,0x0,0x5); + ROM[i+1]=bitswap<16>(ROM[i+1],0xc,0xb,0xd,0xa,0xe,0x9,0xf,0x8,0x0,0x6,0x1,0x5,0x3,0x4,0x2,0x7); + ROM[i+2]=bitswap<16>(ROM[i+2],0xd,0x9,0xc,0x8,0xe,0xf,0xa,0xb,0x4,0x7,0x3,0x2,0x5,0x6,0x1,0x0); + ROM[i+3]=bitswap<16>(ROM[i+3],0xe,0xd,0xf,0x8,0xb,0xa,0x9,0xc,0x6,0x3,0x7,0x5,0x0,0x1,0x4,0x2); } } diff --git a/src/mame/drivers/madalien.cpp b/src/mame/drivers/madalien.cpp index 7ca8b8299c8..497830f4e04 100644 --- a/src/mame/drivers/madalien.cpp +++ b/src/mame/drivers/madalien.cpp @@ -43,11 +43,11 @@ READ8_MEMBER(madalien_state::shift_r) READ8_MEMBER(madalien_state::shift_rev_r) { uint8_t hi = *m_shift_hi ^ 0x07; - uint8_t lo = BITSWAP8(*m_shift_lo,0,1,2,3,4,5,6,7); + uint8_t lo = bitswap<8>(*m_shift_lo,0,1,2,3,4,5,6,7); uint8_t ret = shift_common(hi, lo); - return BITSWAP8(ret,7,0,1,2,3,4,5,6) & 0x7f; + return bitswap<8>(ret,7,0,1,2,3,4,5,6) & 0x7f; } diff --git a/src/mame/drivers/mcr3.cpp b/src/mame/drivers/mcr3.cpp index ba1aba9366a..b1d42fcde32 100644 --- a/src/mame/drivers/mcr3.cpp +++ b/src/mame/drivers/mcr3.cpp @@ -268,7 +268,7 @@ WRITE8_MEMBER(mcr3_state::maxrpm_op6_w) /* when both the write and the enable are low, it's a write to the ADC0844 */ if (!(data & 0x40) && !(data & 0x20)) - m_maxrpm_adc->write(space, 0, BITSWAP8(m_maxrpm_adc_control, 7, 6, 5, 4, 2, 3, 1, 0)); + m_maxrpm_adc->write(space, 0, bitswap<8>(m_maxrpm_adc_control, 7, 6, 5, 4, 2, 3, 1, 0)); /* low 5 bits control the turbo CS */ m_turbo_cheap_squeak->write(space, offset, data); diff --git a/src/mame/drivers/meadows.cpp b/src/mame/drivers/meadows.cpp index 5ae137b4ac0..39242ae9745 100644 --- a/src/mame/drivers/meadows.cpp +++ b/src/mame/drivers/meadows.cpp @@ -141,7 +141,7 @@ READ8_MEMBER(meadows_state::hsync_chain_r) { uint8_t val = m_screen->hpos(); - return BITSWAP8(val,0,1,2,3,4,5,6,7); + return bitswap<8>(val,0,1,2,3,4,5,6,7); } diff --git a/src/mame/drivers/megadrvb.cpp b/src/mame/drivers/megadrvb.cpp index 22dfbbe709d..d0cbc41cb92 100644 --- a/src/mame/drivers/megadrvb.cpp +++ b/src/mame/drivers/megadrvb.cpp @@ -812,12 +812,12 @@ DRIVER_INIT_MEMBER(md_boot_state,mk3mdb) if (x & 0x80000) { rom[x] = rom[x] ^ 0xff; - rom[x] = BITSWAP8(rom[x], 0,3,2,5,4,6,7,1); + rom[x] = bitswap<8>(rom[x], 0,3,2,5,4,6,7,1); } else { rom[x] = rom[x] ^ 0xff; - rom[x] = BITSWAP8(rom[x], 4,0,7,1,3,6,2,5); + rom[x] = bitswap<8>(rom[x], 4,0,7,1,3,6,2,5); } } @@ -826,11 +826,11 @@ DRIVER_INIT_MEMBER(md_boot_state,mk3mdb) if (x & 0x80000) { rom[x] = rom[x] ^ 0xff; - rom[x] = BITSWAP8(rom[x], 2,7,5,4,1,0,3,6); + rom[x] = bitswap<8>(rom[x], 2,7,5,4,1,0,3,6); } else { - rom[x] = BITSWAP8(rom[x], 6,1,4,2,7,0,3,5); + rom[x] = bitswap<8>(rom[x], 6,1,4,2,7,0,3,5); } } @@ -874,12 +874,12 @@ DRIVER_INIT_MEMBER(md_boot_state,srmdb) for (int x = 0x00001; x < 0x40000; x += 2) { - rom[x] = BITSWAP8(rom[x] ^ 0xff, 5,1,6,2,4,3,7,0); + rom[x] = bitswap<8>(rom[x] ^ 0xff, 5,1,6,2,4,3,7,0); } for (int x = 0x40001; x < 0x80000; x += 2) { - rom[x] = BITSWAP8(rom[x] ^ 0x00, 2,6,1,5,0,7,3,4); + rom[x] = bitswap<8>(rom[x] ^ 0x00, 2,6,1,5,0,7,3,4); } // boot vectors don't seem to be valid, so they are patched... diff --git a/src/mame/drivers/megasys1.cpp b/src/mame/drivers/megasys1.cpp index 023c5708e0c..06828858c53 100644 --- a/src/mame/drivers/megasys1.cpp +++ b/src/mame/drivers/megasys1.cpp @@ -4329,7 +4329,7 @@ void megasys1_state::jitsupro_gfx_unmangle(const char *region) /* data lines swap: 76543210 -> 43576210 */ for (i = 0;i < size;i++) - rom[i] = BITSWAP8(rom[i],0x4,0x3,0x5,0x7,0x6,0x2,0x1,0x0); + rom[i] = bitswap<8>(rom[i],0x4,0x3,0x5,0x7,0x6,0x2,0x1,0x0); std::vector buffer(size); @@ -4339,7 +4339,7 @@ void megasys1_state::jitsupro_gfx_unmangle(const char *region) for (i = 0;i < size;i++) { int a = (i & ~0xffff) | - BITSWAP16(i,0xf,0xe,0x8,0xc,0xb,0x3,0x9,0xd,0x7,0x6,0x5,0x4,0xa,0x2,0x1,0x0); + bitswap<16>(i,0xf,0xe,0x8,0xc,0xb,0x3,0x9,0xd,0x7,0x6,0x5,0x4,0xa,0x2,0x1,0x0); rom[i] = buffer[a]; } @@ -4353,7 +4353,7 @@ void megasys1_state::stdragona_gfx_unmangle(const char *region) /* data lines swap: 76543210 -> 37564210 */ for (i = 0;i < size;i++) - rom[i] = BITSWAP8(rom[i],3,7,5,6,4,2,1,0); + rom[i] = bitswap<8>(rom[i],3,7,5,6,4,2,1,0); std::vector buffer(size); @@ -4363,7 +4363,7 @@ void megasys1_state::stdragona_gfx_unmangle(const char *region) for (i = 0;i < size;i++) { int a = (i & ~0xffff) | - BITSWAP16(i,0xf,0xe,0x3,0xc,0xb,0xd,0x9,0xa,0x7,0x6,0x5,0x4,0x8,0x2,0x1,0x0); + bitswap<16>(i,0xf,0xe,0x3,0xc,0xb,0xd,0x9,0xa,0x7,0x6,0x5,0x4,0x8,0x2,0x1,0x0); rom[i] = buffer[a]; } diff --git a/src/mame/drivers/mephisto_montec.cpp b/src/mame/drivers/mephisto_montec.cpp index b01caadf534..c0db9fa5826 100644 --- a/src/mame/drivers/mephisto_montec.cpp +++ b/src/mame/drivers/mephisto_montec.cpp @@ -162,8 +162,8 @@ WRITE8_MEMBER(mephisto_montec_state::montec_lcd_clk_w) if (m_display.shift == 8) { - if (m_lcd_mux & 0x01) output().set_digit_value(0 + m_display.pos, BITSWAP8(m_display.data, 0,3,2,7,6,5,4,1)); - if (m_lcd_mux & 0x02) output().set_digit_value(4 + m_display.pos, BITSWAP8(m_display.data, 0,3,2,7,6,5,4,1)); + if (m_lcd_mux & 0x01) output().set_digit_value(0 + m_display.pos, bitswap<8>(m_display.data, 0,3,2,7,6,5,4,1)); + if (m_lcd_mux & 0x02) output().set_digit_value(4 + m_display.pos, bitswap<8>(m_display.data, 0,3,2,7,6,5,4,1)); m_display.shift = 0; m_display.pos = (m_display.pos + 1) & 3; diff --git a/src/mame/drivers/merit.cpp b/src/mame/drivers/merit.cpp index e360fc2df53..8195deb8cc1 100644 --- a/src/mame/drivers/merit.cpp +++ b/src/mame/drivers/merit.cpp @@ -204,20 +204,20 @@ READ8_MEMBER(merit_state::questions_r) WRITE8_MEMBER(merit_state::low_offset_w) { offset = (offset & 0xf0) | ((offset - m_decryption_key) & 0x0f); - offset = BITSWAP8(offset,7,6,5,4,0,1,2,3); + offset = bitswap<8>(offset,7,6,5,4,0,1,2,3); m_question_address = (m_question_address & 0xffff00) | offset; } WRITE8_MEMBER(merit_state::med_offset_w) { offset = (offset & 0xf0) | ((offset - m_decryption_key) & 0x0f); - offset = BITSWAP8(offset,7,6,5,4,0,1,2,3); + offset = bitswap<8>(offset,7,6,5,4,0,1,2,3); m_question_address = (m_question_address & 0xff00ff) | (offset << 8); } WRITE8_MEMBER(merit_state::high_offset_w) { - offset = BITSWAP8(offset,7,6,5,4,0,1,2,3); + offset = bitswap<8>(offset,7,6,5,4,0,1,2,3); m_question_address = (m_question_address & 0x00ffff) | (offset << 16); } diff --git a/src/mame/drivers/metlfrzr.cpp b/src/mame/drivers/metlfrzr.cpp index 9a0acea3669..f57c531e613 100644 --- a/src/mame/drivers/metlfrzr.cpp +++ b/src/mame/drivers/metlfrzr.cpp @@ -449,14 +449,14 @@ DRIVER_INIT_MEMBER(metlfrzr_state, metlfrzr) m_decrypted_opcodes[A] ^= 0x02; if (BIT(A,9) || !BIT(A,5) || BIT(A,3)) - m_decrypted_opcodes[A] = BITSWAP8(m_decrypted_opcodes[A],7,6,1,4,3,2,5,0); + m_decrypted_opcodes[A] = bitswap<8>(m_decrypted_opcodes[A],7,6,1,4,3,2,5,0); /* decode the data */ if (BIT(A,5)) rom[A] ^= 0x40; if (BIT(A,9) || !BIT(A,5)) - rom[A] = BITSWAP8(rom[A],7,6,1,4,3,2,5,0); + rom[A] = bitswap<8>(rom[A],7,6,1,4,3,2,5,0); } } diff --git a/src/mame/drivers/metro.cpp b/src/mame/drivers/metro.cpp index 87a6edb0c77..0b1220e0ab8 100644 --- a/src/mame/drivers/metro.cpp +++ b/src/mame/drivers/metro.cpp @@ -5535,7 +5535,7 @@ DRIVER_INIT_MEMBER(metro_state,balcube) for (unsigned i = 0; i < len; i+=2) { - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); } metro_common(); @@ -5552,11 +5552,11 @@ DRIVER_INIT_MEMBER(metro_state,dharmak) { uint8_t dat; dat = src[i + 1]; - dat = BITSWAP8(dat, 7,3,2,4, 5,6,1,0); + dat = bitswap<8>(dat, 7,3,2,4, 5,6,1,0); src[i + 1] = dat; dat = src[i + 3]; - dat = BITSWAP8(dat, 7,2,5,4, 3,6,1,0); + dat = bitswap<8>(dat, 7,2,5,4, 3,6,1,0); src[i + 3] = dat; } diff --git a/src/mame/drivers/minicom.cpp b/src/mame/drivers/minicom.cpp index e094f8dffba..cdc3766b5d3 100644 --- a/src/mame/drivers/minicom.cpp +++ b/src/mame/drivers/minicom.cpp @@ -212,7 +212,7 @@ WRITE8_MEMBER(minicom_state::minicom_io_w) if (BIT(changed,4) || BIT(changed,5)) { - output().set_digit_value(m_digit_index, BITSWAP16(m_display_data, 9, 1, 3, 11, 12, 4, 2, 10, 14, 6, 7, 5, 0, 15, 13, 8) & 0x3FFF); + output().set_digit_value(m_digit_index, bitswap<16>(m_display_data, 9, 1, 3, 11, 12, 4, 2, 10, 14, 6, 7, 5, 0, 15, 13, 8) & 0x3FFF); } m_p[offset]=data; } diff --git a/src/mame/drivers/mirax.cpp b/src/mame/drivers/mirax.cpp index 8c110a8120b..dd359f388a5 100644 --- a/src/mame/drivers/mirax.cpp +++ b/src/mame/drivers/mirax.cpp @@ -583,13 +583,13 @@ DRIVER_INIT_MEMBER(mirax_state,mirax) int i; for(i=0x0000;i<0x4000;i++) - ROM[BITSWAP16(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (BITSWAP8(DATA[i], 1, 3, 7, 0, 5, 6, 4, 2) ^ 0xff); + ROM[bitswap<16>(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (bitswap<8>(DATA[i], 1, 3, 7, 0, 5, 6, 4, 2) ^ 0xff); for(i=0x4000;i<0x8000;i++) - ROM[BITSWAP16(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (BITSWAP8(DATA[i], 2, 1, 0, 6, 7, 5, 3, 4) ^ 0xff); + ROM[bitswap<16>(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (bitswap<8>(DATA[i], 2, 1, 0, 6, 7, 5, 3, 4) ^ 0xff); for(i=0x8000;i<0xc000;i++) - ROM[BITSWAP16(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (BITSWAP8(DATA[i], 1, 3, 7, 0, 5, 6, 4, 2) ^ 0xff); + ROM[bitswap<16>(i, 15,14,13,12,11,10,9, 5,7,6,8, 4,3,2,1,0)] = (bitswap<8>(DATA[i], 1, 3, 7, 0, 5, 6, 4, 2) ^ 0xff); } GAME( 1985, mirax, 0, mirax, mirax, mirax_state, mirax, ROT90, "Current Technologies", "Mirax (set 1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/missb2.cpp b/src/mame/drivers/missb2.cpp index 751ade7f286..32c7b6e5e1b 100644 --- a/src/mame/drivers/missb2.cpp +++ b/src/mame/drivers/missb2.cpp @@ -164,12 +164,12 @@ WRITE8_MEMBER(missb2_state::missb2_bg_bank_w) WRITE8_MEMBER(missb2_state::missb2_oki_w) { - m_oki->write_command(BITSWAP8(data, 7,5,6,4,3,1,2,0)); + m_oki->write_command(bitswap<8>(data, 7,5,6,4,3,1,2,0)); } READ8_MEMBER(missb2_state::missb2_oki_r) { - return BITSWAP8(m_oki->read_status(), 7,5,6,4,3,1,2,0); + return bitswap<8>(m_oki->read_status(), 7,5,6,4,3,1,2,0); } /* Memory Maps */ diff --git a/src/mame/drivers/missile.cpp b/src/mame/drivers/missile.cpp index 3b84b23e051..cf5cd3a8784 100644 --- a/src/mame/drivers/missile.cpp +++ b/src/mame/drivers/missile.cpp @@ -1466,8 +1466,8 @@ DRIVER_INIT_MEMBER(missile_state,missilem) // decrypt rom and put in maincpu region (result looks correct, but is untested) for (int i = 0; i < 0x10000; i++) { - int a = BITSWAP16(i, 15,2,3,0,8,9,7,5,1,4,6,14,13,12,10,11); - int d = BITSWAP8(src[a], 3,2,4,5,6,1,7,0); + int a = bitswap<16>(i, 15,2,3,0,8,9,7,5,1,4,6,14,13,12,10,11); + int d = bitswap<8>(src[a], 3,2,4,5,6,1,7,0); a = i; a ^= (~a >> 1 & 0x400); diff --git a/src/mame/drivers/mk1.cpp b/src/mame/drivers/mk1.cpp index d2e41371c6f..ccad87ff1c0 100644 --- a/src/mame/drivers/mk1.cpp +++ b/src/mame/drivers/mk1.cpp @@ -99,10 +99,10 @@ WRITE8_MEMBER( mk1_state::mk1_f8_w ) /* 0 is high and allows also input */ m_f8[offset] = data; - if ( ! ( m_f8[1] & 1 ) ) m_led[0] = BITSWAP8( m_f8[0],2,1,3,4,5,6,7,0 ); - if ( ! ( m_f8[1] & 2 ) ) m_led[1] = BITSWAP8( m_f8[0],2,1,3,4,5,6,7,0 ); - if ( ! ( m_f8[1] & 4 ) ) m_led[2] = BITSWAP8( m_f8[0],2,1,3,4,5,6,7,0 ); - if ( ! ( m_f8[1] & 8 ) ) m_led[3] = BITSWAP8( m_f8[0],2,1,3,4,5,6,7,0 ); + if ( ! ( m_f8[1] & 1 ) ) m_led[0] = bitswap<8>( m_f8[0],2,1,3,4,5,6,7,0 ); + if ( ! ( m_f8[1] & 2 ) ) m_led[1] = bitswap<8>( m_f8[0],2,1,3,4,5,6,7,0 ); + if ( ! ( m_f8[1] & 4 ) ) m_led[2] = bitswap<8>( m_f8[0],2,1,3,4,5,6,7,0 ); + if ( ! ( m_f8[1] & 8 ) ) m_led[3] = bitswap<8>( m_f8[0],2,1,3,4,5,6,7,0 ); } static ADDRESS_MAP_START( mk1_mem, AS_PROGRAM, 8, mk1_state ) diff --git a/src/mame/drivers/mkit09.cpp b/src/mame/drivers/mkit09.cpp index c87a6aef112..949553467dc 100644 --- a/src/mame/drivers/mkit09.cpp +++ b/src/mame/drivers/mkit09.cpp @@ -173,7 +173,7 @@ WRITE8_MEMBER( mkit09_state::pa_w ) data ^= 0xff; if (m_keydata > 3) { - output().set_digit_value(m_keydata, BITSWAP8(data, 7, 0, 5, 6, 4, 2, 1, 3)); + output().set_digit_value(m_keydata, bitswap<8>(data, 7, 0, 5, 6, 4, 2, 1, 3)); m_keydata = 0; } diff --git a/src/mame/drivers/monzagp.cpp b/src/mame/drivers/monzagp.cpp index f3ad86581e9..2418948ce26 100644 --- a/src/mame/drivers/monzagp.cpp +++ b/src/mame/drivers/monzagp.cpp @@ -235,7 +235,7 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 bitmap.pix16(y, x) = color; // collisions - uint8_t coll_prom_addr = BITSWAP8(tile_idx, 7, 6, 5, 4, 2, 0, 1, 3); + uint8_t coll_prom_addr = bitswap<8>(tile_idx, 7, 6, 5, 4, 2, 0, 1, 3); uint8_t collisions = collisions_prom[((mycar && othercars) ? 0 : 0x80) | (inv ? 0x40 : 0) | (coll_prom_addr << 2) | (mycar ? 0 : 0x02) | (tile_color & 0x01)]; m_collisions_ff |= ((m_collisions_clk ^ collisions) & collisions); m_collisions_clk = collisions; @@ -299,7 +299,7 @@ READ8_MEMBER(monzagp_state::port_r) } if (!(m_p1 & 0x40)) // digits { - data = m_score_ram[BITSWAP8(offset, 3,2,1,0,7,6,5,4)]; + data = m_score_ram[bitswap<8>(offset, 3,2,1,0,7,6,5,4)]; //printf("ext 6 r P1:%02x P2:%02x %02x\n", m_p1, m_p2, offset); } if (!(m_p1 & 0x80)) @@ -350,7 +350,7 @@ WRITE8_MEMBER(monzagp_state::port_w) if (!(m_p1 & 0x40)) // digits { //printf("ext 6 w P1:%02x P2:%02x, %02x = %02x\n", m_p1, m_p2, offset, data); - offs_t ram_offset = BITSWAP8(offset, 3,2,1,0,7,6,5,4); + offs_t ram_offset = bitswap<8>(offset, 3,2,1,0,7,6,5,4); m_score_ram[ram_offset] = data & 0x0f; if ((ram_offset & 0x07) == 0) diff --git a/src/mame/drivers/mpf1.cpp b/src/mame/drivers/mpf1.cpp index 44a610eeb74..ca03e5a893c 100644 --- a/src/mame/drivers/mpf1.cpp +++ b/src/mame/drivers/mpf1.cpp @@ -276,7 +276,7 @@ READ8_MEMBER( mpf1_state::ppi_pa_r ) WRITE8_MEMBER( mpf1_state::ppi_pb_w ) { /* swap bits around for the mame 7-segment emulation */ - uint8_t led_data = BITSWAP8(data, 6, 1, 2, 0, 7, 5, 4, 3); + uint8_t led_data = bitswap<8>(data, 6, 1, 2, 0, 7, 5, 4, 3); /* timer to update segments */ m_led_refresh_timer->adjust(attotime::from_usec(70), led_data); diff --git a/src/mame/drivers/multfish.cpp b/src/mame/drivers/multfish.cpp index a19bcf08ce0..2d17657197d 100644 --- a/src/mame/drivers/multfish.cpp +++ b/src/mame/drivers/multfish.cpp @@ -275,12 +275,12 @@ WRITE8_MEMBER(igrosoft_gamble_state::igrosoft_gamble_vid_w) case 1: coldat ^= m_xor_palette; coldat ^= ((coldat&0x2) >>1) | ((coldat&0x80) >>3) ; - coldat = BITSWAP16(coldat,10,15,5,13,8,12,11,2,0,4,7,14,9,3,1,6); + coldat = bitswap<16>(coldat,10,15,5,13,8,12,11,2,0,4,7,14,9,3,1,6); break; case 2: coldat ^= m_xor_palette; coldat ^= ((coldat&0x0001) <<1) ^ ((coldat&0x0010) <<1) ^ ((coldat&0x0010) <<2) ^ ((coldat&0x0020) <<1) ^ ((coldat&0x0080) >>1); - coldat = BITSWAP16(coldat,4,10,13,14,8,11,15,12,2,6,5,0,7,3,1,9); + coldat = bitswap<16>(coldat,4,10,13,14,8,11,15,12,2,6,5,0,7,3,1,9); break; case 3: // WRONG @@ -463,7 +463,7 @@ A12 <-> A13 for (j = 0; j < (igrosoft_gamble_ROM_SIZE/0x40); j++) { - jscr = BITSWAP16(j,15,14,13,4,3,2,0,1,6,7,5,12,11,10,8,9); + jscr = bitswap<16>(j,15,14,13,4,3,2,0,1,6,7,5,12,11,10,8,9); memcpy(&temprom[j*0x40],&igrosoft_gamble_gfx[romoffset+(jscr*0x40)],0x40); } @@ -477,7 +477,7 @@ static inline void rom_decodel(uint8_t *romptr, uint8_t *tmprom, uint8_t xor_dat for (i = 0; i < igrosoft_gamble_ROM_SIZE; i++) { - jscr = BITSWAP24(i,23,22,21,20,19,17,14,18,16,15,12,13,11,9,6,10,8,7,4,5,3,2,1,0) ^ xor_add ^ 8; + jscr = bitswap<24>(i,23,22,21,20,19,17,14,18,16,15,12,13,11,9,6,10,8,7,4,5,3,2,1,0) ^ xor_add ^ 8; tmprom[i] = romptr[jscr] ^ xor_data; } memcpy(romptr,tmprom,igrosoft_gamble_ROM_SIZE); @@ -488,7 +488,7 @@ static inline void rom_decodeh(uint8_t *romptr, uint8_t *tmprom, uint8_t xor_dat for (i = 0; i < igrosoft_gamble_ROM_SIZE; i++) { - jscr = BITSWAP24(i,23,22,21,20,19,17,14,18,16,15,12,13,11,9,6,10,8,7,4,5,2,3,1,0) ^ xor_add; + jscr = bitswap<24>(i,23,22,21,20,19,17,14,18,16,15,12,13,11,9,6,10,8,7,4,5,2,3,1,0) ^ xor_add; tmprom[i] = romptr[jscr] ^ xor_data; } memcpy(romptr,tmprom,igrosoft_gamble_ROM_SIZE); @@ -516,7 +516,7 @@ static inline void roment_decodel(uint8_t *romptr, uint8_t *tmprom, uint8_t xor_ for (i = 0; i < igrosoft_gamble_ROM_SIZE; i++) { - jscr = BITSWAP24(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,3,2,1,0) ^ xor_add ^ 8; + jscr = bitswap<24>(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,3,2,1,0) ^ xor_add ^ 8; tmprom[i] = romptr[jscr] ^ xor_data; } memcpy(romptr,tmprom,igrosoft_gamble_ROM_SIZE); @@ -527,7 +527,7 @@ static inline void roment_decodeh(uint8_t *romptr, uint8_t *tmprom, uint8_t xor_ for (i = 0; i < igrosoft_gamble_ROM_SIZE; i++) { - jscr = BITSWAP24(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,2,3,1,0) ^ xor_add; + jscr = bitswap<24>(i,23,22,21,20,19,16,18,17,14,15,12,13,11,8,10,9,6,7,4,5,2,3,1,0) ^ xor_add; tmprom[i] = romptr[jscr] ^ xor_data; } memcpy(romptr,tmprom,igrosoft_gamble_ROM_SIZE); diff --git a/src/mame/drivers/multi16.cpp b/src/mame/drivers/multi16.cpp index 0e90f79d5da..5fddd89b9a0 100644 --- a/src/mame/drivers/multi16.cpp +++ b/src/mame/drivers/multi16.cpp @@ -76,7 +76,7 @@ uint32_t multi16_state::screen_update_multi16(screen_device &screen, bitmap_ind1 { for(xi=0;xi<16;xi++) { - int dot = (BITSWAP16(m_p_vram[count],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8) >> (15-xi)) & 0x1; + int dot = (bitswap<16>(m_p_vram[count],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8) >> (15-xi)) & 0x1; if(screen.visible_area().contains(x*16+xi, y)) bitmap.pix16(y, x*16+xi) = m_palette->pen(dot); diff --git a/src/mame/drivers/multigam.cpp b/src/mame/drivers/multigam.cpp index b157777e246..34a36ab29f5 100644 --- a/src/mame/drivers/multigam.cpp +++ b/src/mame/drivers/multigam.cpp @@ -1433,7 +1433,7 @@ DRIVER_INIT_MEMBER(multigam_state,multigmt) memcpy(&buf[0], rom, size); for (i = 0; i < size; i++) { - addr = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,8,11,12,10,9,7,6,5,4,3,2,1,0); + addr = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,8,11,12,10,9,7,6,5,4,3,2,1,0); rom[i] = buf[addr]; } @@ -1442,7 +1442,7 @@ DRIVER_INIT_MEMBER(multigam_state,multigmt) memcpy(&buf[0], rom, size); for (i = 0; i < size; i++) { - addr = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,8,11,12,10,9,7,6,5,4,3,2,1,0); + addr = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,8,11,12,10,9,7,6,5,4,3,2,1,0); rom[i] = buf[addr]; } rom = memregion("gfx1")->base(); @@ -1450,8 +1450,8 @@ DRIVER_INIT_MEMBER(multigam_state,multigmt) memcpy(&buf[0], rom, size); for (i = 0; i < size; i++) { - addr = BITSWAP24(i,23,22,21,20,19,18,17,15,16,11,10,12,13,14,8,9,1,3,5,7,6,4,2,0); - rom[i] = BITSWAP8(buf[addr], 4, 7, 3, 2, 5, 1, 6, 0); + addr = bitswap<24>(i,23,22,21,20,19,18,17,15,16,11,10,12,13,14,8,9,1,3,5,7,6,4,2,0); + rom[i] = bitswap<8>(buf[addr], 4, 7, 3, 2, 5, 1, 6, 0); } multigam_switch_prg_rom(space, 0x0, 0x01); diff --git a/src/mame/drivers/mustache.cpp b/src/mame/drivers/mustache.cpp index 5e99fdc8072..6caa21a1f7a 100644 --- a/src/mame/drivers/mustache.cpp +++ b/src/mame/drivers/mustache.cpp @@ -280,10 +280,10 @@ DRIVER_INIT_MEMBER(mustache_state,mustache) { uint16_t w; - buf[i] = BITSWAP8(gfx1[i], 0,5,2,6,4,1,7,3); + buf[i] = bitswap<8>(gfx1[i], 0,5,2,6,4,1,7,3); w = (gfx1[i+G1] << 8) | gfx1[i+G1*2]; - w = BITSWAP16(w, 14,1,13,5,9,2,10,6, 3,8,4,15,0,11,12,7); + w = bitswap<16>(w, 14,1,13,5,9,2,10,6, 3,8,4,15,0,11,12,7); buf[i+G1] = w >> 8; buf[i+G1*2] = w & 0xff; @@ -291,7 +291,7 @@ DRIVER_INIT_MEMBER(mustache_state,mustache) /* BG address lines */ for (i = 0; i < 3*G1; i++) - gfx1[i] = buf[BITSWAP16(i,15,14,13,2,1,0,12,11,10,9,8,7,6,5,4,3)]; + gfx1[i] = buf[bitswap<16>(i,15,14,13,2,1,0,12,11,10,9,8,7,6,5,4,3)]; /* SPR data lines */ for (i=0;i(w, 5,7,11,4,15,10,3,14, 9,2,13,8,1,12,0,6 ); buf[i] = w >> 8; buf[i+G2] = w & 0xff; @@ -307,7 +307,7 @@ DRIVER_INIT_MEMBER(mustache_state,mustache) /* SPR address lines */ for (i = 0; i < 2*G2; i++) - gfx2[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,12,11,10,9,8,7,6,5,4,13,14,3,2,1,0)]; + gfx2[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,12,11,10,9,8,7,6,5,4,13,14,3,2,1,0)]; } diff --git a/src/mame/drivers/mw8080bw.cpp b/src/mame/drivers/mw8080bw.cpp index d39836e29ad..75d8c8cf7b6 100644 --- a/src/mame/drivers/mw8080bw.cpp +++ b/src/mame/drivers/mw8080bw.cpp @@ -179,7 +179,7 @@ READ8_MEMBER(mw8080bw_state::mw8080bw_shift_result_rev_r) { uint8_t ret = m_mb14241->shift_result_r(space, 0); - return BITSWAP8(ret,0,1,2,3,4,5,6,7); + return bitswap<8>(ret,0,1,2,3,4,5,6,7); } diff --git a/src/mame/drivers/namcona1.cpp b/src/mame/drivers/namcona1.cpp index 43a5f1dcccb..617d6f880f3 100644 --- a/src/mame/drivers/namcona1.cpp +++ b/src/mame/drivers/namcona1.cpp @@ -268,7 +268,7 @@ READ16_MEMBER(namcona1_state::custom_key_r) if( offset==3 ) { uint16_t res; - res = BITSWAP16(m_keyval, 22,26,31,23,18,20,16,30,24,21,25,19,17,29,28,27); + res = bitswap<16>(m_keyval, 22,26,31,23,18,20,16,30,24,21,25,19,17,29,28,27); m_keyval >>= 1; // printf("popcount(%08X) = %d\n", m_keyval & 0x58000c00, population_count_32(m_keyval & 0x58000c00)); diff --git a/src/mame/drivers/namcos10.cpp b/src/mame/drivers/namcos10.cpp index be218dfd3be..4eae0f46de9 100644 --- a/src/mame/drivers/namcos10.cpp +++ b/src/mame/drivers/namcos10.cpp @@ -789,7 +789,7 @@ static void decrypt_bios( running_machine &machine, const char *regionName, int for( int i = 0; i < len; i++ ) { - BIOS[ i ] = BITSWAP16( BIOS[ i ] ^ 0xaaaa, + BIOS[ i ] = bitswap<16>( BIOS[ i ] ^ 0xaaaa, b15, b14, b13, b12, b11, b10, b9, b8, b7, b6, b5, b4, b3, b2, b1, b0 ); } } diff --git a/src/mame/drivers/nbmj8688.cpp b/src/mame/drivers/nbmj8688.cpp index 46b3a3736ed..16cd0b48db3 100644 --- a/src/mame/drivers/nbmj8688.cpp +++ b/src/mame/drivers/nbmj8688.cpp @@ -59,7 +59,7 @@ DRIVER_INIT_MEMBER(nbmj8688_state,mjcamera) the checksum. */ for (i = 0;i < 0x10000;i++) { - rom[i] = BITSWAP8(prot[i],1,6,0,4,2,3,5,7); + rom[i] = bitswap<8>(prot[i],1,6,0,4,2,3,5,7); } } @@ -99,7 +99,7 @@ DRIVER_INIT_MEMBER(nbmj8688_state,idhimitu) the checksum. */ for (i = 0;i < 0x10000;i++) { - rom[i] = BITSWAP8(prot[i + 0x10000],4,6,2,1,7,0,3,5); + rom[i] = bitswap<8>(prot[i + 0x10000],4,6,2,1,7,0,3,5); } } @@ -116,7 +116,7 @@ DRIVER_INIT_MEMBER(nbmj8688_state,kaguya2) the checksum. */ for (i = 0;i < 0x10000;i++) { - rom[i] = BITSWAP8(prot[i],1,6,0,4,2,3,5,7); + rom[i] = bitswap<8>(prot[i],1,6,0,4,2,3,5,7); } } diff --git a/src/mame/drivers/nbmj8891.cpp b/src/mame/drivers/nbmj8891.cpp index 0addb1efefb..6b7ddd3bdec 100644 --- a/src/mame/drivers/nbmj8891.cpp +++ b/src/mame/drivers/nbmj8891.cpp @@ -64,7 +64,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,gionbana) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1); + prot[i] = bitswap<8>(prot[i],2,7,3,5,0,6,4,1); } } @@ -81,7 +81,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,omotesnd) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1); + prot[i] = bitswap<8>(prot[i],2,7,3,5,0,6,4,1); } #endif @@ -114,7 +114,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,telmahjn) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i + 0x20000],7,0,4,1,5,2,6,3); + prot[i] = bitswap<8>(prot[i + 0x20000],7,0,4,1,5,2,6,3); } } @@ -130,7 +130,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,mgmen89) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],5,6,1,0,7,3,2,4); + prot[i] = bitswap<8>(prot[i],5,6,1,0,7,3,2,4); } } @@ -150,7 +150,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,mjfocus) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i + 0x20000],7,0,4,1,5,2,6,3); + prot[i] = bitswap<8>(prot[i + 0x20000],7,0,4,1,5,2,6,3); } } @@ -190,7 +190,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,mjnanpas) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i + 0x20000],0,5,2,3,6,7,1,4); + prot[i] = bitswap<8>(prot[i + 0x20000],0,5,2,3,6,7,1,4); } #endif } @@ -207,7 +207,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,pairsnb) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],5,6,1,0,7,3,2,4); + prot[i] = bitswap<8>(prot[i],5,6,1,0,7,3,2,4); } } @@ -223,7 +223,7 @@ DRIVER_INIT_MEMBER(nbmj8891_state,pairsten) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i + 0x20000],5,6,0,4,3,7,1,2); + prot[i] = bitswap<8>(prot[i + 0x20000],5,6,0,4,3,7,1,2); } } diff --git a/src/mame/drivers/nbmj8900.cpp b/src/mame/drivers/nbmj8900.cpp index ae72ebbf2fb..47604a51cb3 100644 --- a/src/mame/drivers/nbmj8900.cpp +++ b/src/mame/drivers/nbmj8900.cpp @@ -49,7 +49,7 @@ DRIVER_INIT_MEMBER(nbmj8900_state,ohpaipee) for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1); + prot[i] = bitswap<8>(prot[i],2,7,3,5,0,6,4,1); } #else unsigned char *ROM = memregion("maincpu")->base(); @@ -77,7 +77,7 @@ DRIVER_INIT_MEMBER(nbmj8900_state,togenkyo) the checksum. */ for (i = 0;i < 0x20000;i++) { - prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1); + prot[i] = bitswap<8>(prot[i],2,7,3,5,0,6,4,1); } #else unsigned char *ROM = memregion("maincpu")->base(); diff --git a/src/mame/drivers/neopcb.cpp b/src/mame/drivers/neopcb.cpp index ae05d6209f0..ca7c8a084b2 100644 --- a/src/mame/drivers/neopcb.cpp +++ b/src/mame/drivers/neopcb.cpp @@ -250,7 +250,7 @@ void neopcb_state::svcpcb_gfx_decrypt() for (int i = 0; i < rom_size; i += 4) { uint32_t rom32 = rom[i] | rom[i+1]<<8 | rom[i+2]<<16 | rom[i+3]<<24; - rom32 = BITSWAP32(rom32, 0x09, 0x0d, 0x13, 0x00, 0x17, 0x0f, 0x03, 0x05, 0x04, 0x0c, 0x11, 0x1e, 0x12, 0x15, 0x0b, 0x06, 0x1b, 0x0a, 0x1a, 0x1c, 0x14, 0x02, 0x0e, 0x1d, 0x18, 0x08, 0x01, 0x10, 0x19, 0x1f, 0x07, 0x16); + rom32 = bitswap<32>(rom32, 0x09, 0x0d, 0x13, 0x00, 0x17, 0x0f, 0x03, 0x05, 0x04, 0x0c, 0x11, 0x1e, 0x12, 0x15, 0x0b, 0x06, 0x1b, 0x0a, 0x1a, 0x1c, 0x14, 0x02, 0x0e, 0x1d, 0x18, 0x08, 0x01, 0x10, 0x19, 0x1f, 0x07, 0x16); buf[i] = rom32 & 0xff; buf[i+1] = (rom32>>8) & 0xff; buf[i+2] = (rom32>>16) & 0xff; @@ -259,7 +259,7 @@ void neopcb_state::svcpcb_gfx_decrypt() for (int i = 0; i < rom_size / 4; i++) { - int ofst = BITSWAP24((i & 0x1fffff), 0x17, 0x16, 0x15, 0x04, 0x0b, 0x0e, 0x08, 0x0c, 0x10, 0x00, 0x0a, 0x13, 0x03, 0x06, 0x02, 0x07, 0x0d, 0x01, 0x11, 0x09, 0x14, 0x0f, 0x12, 0x05); + int ofst = bitswap<24>((i & 0x1fffff), 0x17, 0x16, 0x15, 0x04, 0x0b, 0x0e, 0x08, 0x0c, 0x10, 0x00, 0x0a, 0x13, 0x03, 0x06, 0x02, 0x07, 0x0d, 0x01, 0x11, 0x09, 0x14, 0x0f, 0x12, 0x05); ofst ^= 0x0c8923; ofst += (i & 0xffe00000); memcpy(&rom[i * 4], &buf[ofst * 4], 0x04); @@ -274,7 +274,7 @@ void neopcb_state::svcpcb_s1data_decrypt() size_t s1_size = memregion("fixed")->bytes(); for (int i = 0; i < s1_size; i++) // Decrypt S - s1[i] = BITSWAP8(s1[i] ^ 0xd2, 4, 0, 7, 2, 5, 1, 6, 3); + s1[i] = bitswap<8>(s1[i] ^ 0xd2, 4, 0, 7, 2, 5, 1, 6, 3); } @@ -294,7 +294,7 @@ void neopcb_state::kf2k3pcb_gfx_decrypt() for (int i = 0; i < rom_size; i +=4) { uint32_t rom32 = rom[i] | rom[i+1]<<8 | rom[i+2]<<16 | rom[i+3]<<24; - rom32 = BITSWAP32(rom32, 0x09, 0x0d, 0x13, 0x00, 0x17, 0x0f, 0x03, 0x05, 0x04, 0x0c, 0x11, 0x1e, 0x12, 0x15, 0x0b, 0x06, 0x1b, 0x0a, 0x1a, 0x1c, 0x14, 0x02, 0x0e, 0x1d, 0x18, 0x08, 0x01, 0x10, 0x19, 0x1f, 0x07, 0x16); + rom32 = bitswap<32>(rom32, 0x09, 0x0d, 0x13, 0x00, 0x17, 0x0f, 0x03, 0x05, 0x04, 0x0c, 0x11, 0x1e, 0x12, 0x15, 0x0b, 0x06, 0x1b, 0x0a, 0x1a, 0x1c, 0x14, 0x02, 0x0e, 0x1d, 0x18, 0x08, 0x01, 0x10, 0x19, 0x1f, 0x07, 0x16); buf[i] = rom32 & 0xff; buf[i+1] = (rom32>>8) & 0xff; buf[i+2] = (rom32>>16) & 0xff; @@ -303,7 +303,7 @@ void neopcb_state::kf2k3pcb_gfx_decrypt() for (int i = 0; i < rom_size; i+=4) { - int ofst = BITSWAP24((i & 0x7fffff), 0x17, 0x15, 0x0a, 0x14, 0x13, 0x16, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00); + int ofst = bitswap<24>((i & 0x7fffff), 0x17, 0x15, 0x0a, 0x14, 0x13, 0x16, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00); ofst ^= 0x000000; ofst += (i & 0xff800000); memcpy(&rom[ofst], &buf[i], 0x04); @@ -333,7 +333,7 @@ void neopcb_state::kf2k3pcb_decrypt_s1data() dst = memregion("fixed")->base(); for (int i = 0; i < tx_size; i++) - dst[i] = BITSWAP8(dst[i] ^ 0xd2, 4, 0, 7, 2, 5, 1, 6, 3); + dst[i] = bitswap<8>(dst[i] ^ 0xd2, 4, 0, 7, 2, 5, 1, 6, 3); } @@ -498,7 +498,7 @@ DRIVER_INIT_MEMBER(neopcb_state, kf2k3pcb) // incorrect uint8_t* rom = memregion("audiocpu")->base(); for (int i = 0; i < 0x90000; i++) - rom[i] = BITSWAP8(rom[i], 5, 6, 1, 4, 3, 0, 7, 2); + rom[i] = bitswap<8>(rom[i], 5, 6, 1, 4, 3, 0, 7, 2); kf2k3pcb_gfx_decrypt(); m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2003_GFX_KEY); diff --git a/src/mame/drivers/newbrain.cpp b/src/mame/drivers/newbrain.cpp index c4ebd73867a..b70ad8c064b 100644 --- a/src/mame/drivers/newbrain.cpp +++ b/src/mame/drivers/newbrain.cpp @@ -514,7 +514,7 @@ WRITE8_MEMBER( newbrain_state::cop_d_w ) // COP to VFD serial format, bits 15..0 // A B J I x H G2 C x F G1 E K L M D - uint16_t value = BITSWAP16(m_402_q, 11, 7, 1, 13, 10, 3, 2, 12, 9, 5, 6, 4, 0, 8, 14, 15) & 0x3fff; + uint16_t value = bitswap<16>(m_402_q, 11, 7, 1, 13, 10, 3, 2, 12, 9, 5, 6, 4, 0, 8, 14, 15) & 0x3fff; output().set_digit_value(m_405_q & 0x0f, value); if (LOG_VFD) logerror("%s %s vfd segment %u 402.Q %04x data %04x\n", machine().time().as_string(), machine().describe_context(), m_405_q & 0x0f, m_402_q, value); diff --git a/src/mame/drivers/niyanpai.cpp b/src/mame/drivers/niyanpai.cpp index 043b83e347e..214ff58b00b 100644 --- a/src/mame/drivers/niyanpai.cpp +++ b/src/mame/drivers/niyanpai.cpp @@ -66,8 +66,8 @@ READ16_MEMBER(niyanpai_state::dipsw_r) uint8_t dipsw_a = ioport("DSWA")->read(); uint8_t dipsw_b = ioport("DSWB")->read(); - dipsw_a = BITSWAP8(dipsw_a,0,1,2,3,4,5,6,7); - dipsw_b = BITSWAP8(dipsw_b,0,1,2,3,4,5,6,7); + dipsw_a = bitswap<8>(dipsw_a,0,1,2,3,4,5,6,7); + dipsw_b = bitswap<8>(dipsw_b,0,1,2,3,4,5,6,7); return ((dipsw_a << 8) | dipsw_b); } diff --git a/src/mame/drivers/nmk16.cpp b/src/mame/drivers/nmk16.cpp index 21e6786440f..17820f09700 100644 --- a/src/mame/drivers/nmk16.cpp +++ b/src/mame/drivers/nmk16.cpp @@ -5383,7 +5383,7 @@ static void decryptcode( running_machine &machine, int a23, int a22, int a21, in memcpy( &buffer[0], RAM, size ); for( i = 0; i < size; i++ ) { - RAM[ i ] = buffer[ BITSWAP24( i, a23, a22, a21, a20, a19, a18, a17, a16, a15, a14, a13, a12, + RAM[ i ] = buffer[ bitswap<24>( i, a23, a22, a21, a20, a19, a18, a17, a16, a15, a14, a13, a12, a11, a10, a9, a8, a7, a6, a5, a4, a3, a2, a1, a0 ) ]; } } diff --git a/src/mame/drivers/notetaker.cpp b/src/mame/drivers/notetaker.cpp index ab50d57df1a..1a27b24b70e 100644 --- a/src/mame/drivers/notetaker.cpp +++ b/src/mame/drivers/notetaker.cpp @@ -922,16 +922,16 @@ DRIVER_INIT_MEMBER(notetaker_state,notetakr) uint16_t *temppointer; uint16_t wordtemp; uint16_t addrtemp; - // leave the src pointer alone, since we've only used a 0x1000 long address space - romdst += 0x7f800; // set the dest pointer to 0xff000 (>>1 because 16 bits data) - for (int i = 0; i < 0x800; i++) - { - wordtemp = BITSWAP16(*romsrc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); // data bus is completely reversed - addrtemp = BITSWAP16(i, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10); // address bus is completely reversed; 11-15 should always be zero - temppointer = romdst+(addrtemp&0x7FF); - *temppointer = wordtemp; - romsrc++; - } + // leave the src pointer alone, since we've only used a 0x1000 long address space + romdst += 0x7f800; // set the dest pointer to 0xff000 (>>1 because 16 bits data) + for (int i = 0; i < 0x800; i++) + { + wordtemp = bitswap<16>(*romsrc, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); // data bus is completely reversed + addrtemp = bitswap<11>(i, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10); // address bus is completely reversed; 11-15 should always be zero + temppointer = romdst+(addrtemp&0x7FF); + *temppointer = wordtemp; + romsrc++; + } } /* ROM definition */ diff --git a/src/mame/drivers/novag6502.cpp b/src/mame/drivers/novag6502.cpp index a1a82d1286a..03957ed2d1e 100644 --- a/src/mame/drivers/novag6502.cpp +++ b/src/mame/drivers/novag6502.cpp @@ -349,7 +349,7 @@ WRITE64_MEMBER(novag6502_state::cforte_lcd_output_w) for (int i = 0; i < 4; i++) m_display_state[dig+3] |= ((rowdata[i] >> (2*dig) & 3) << (2*i)); - m_display_state[dig+3] = BITSWAP8(m_display_state[dig+3],7,2,0,4,6,5,3,1); + m_display_state[dig+3] = bitswap<8>(m_display_state[dig+3],7,2,0,4,6,5,3,1); } cforte_prepare_display(); diff --git a/src/mame/drivers/nsm.cpp b/src/mame/drivers/nsm.cpp index bda6dae5913..cdf8cba7645 100644 --- a/src/mame/drivers/nsm.cpp +++ b/src/mame/drivers/nsm.cpp @@ -106,7 +106,7 @@ WRITE8_MEMBER( nsm_state::cru_w ) for (j = 0; j < 5; j++) { segments = m_cru_data[8-j]^0xff; - output().set_digit_value(j * 10 + i, BITSWAP16(segments, 8, 8, 8, 8, 8, 8, 0, 0, 1, 1, 2, 3, 4, 5, 6, 7)); + output().set_digit_value(j * 10 + i, bitswap<16>(segments, 8, 8, 8, 8, 8, 8, 0, 0, 1, 1, 2, 3, 4, 5, 6, 7)); } } } diff --git a/src/mame/drivers/nss.cpp b/src/mame/drivers/nss.cpp index b96ed39cc6e..57ce1816ca7 100644 --- a/src/mame/drivers/nss.cpp +++ b/src/mame/drivers/nss.cpp @@ -1064,7 +1064,7 @@ DRIVER_INIT_MEMBER(nss_state,nss) uint8_t *PROM = memregion("rp5h01")->base(); for (int i = 0; i < 0x10; i++) - PROM[i] = BITSWAP8(PROM[i],0,1,2,3,4,5,6,7) ^ 0xff; + PROM[i] = bitswap<8>(PROM[i],0,1,2,3,4,5,6,7) ^ 0xff; DRIVER_INIT_CALL(snes); } diff --git a/src/mame/drivers/nycaptor.cpp b/src/mame/drivers/nycaptor.cpp index 4a54583ab07..e285499589b 100644 --- a/src/mame/drivers/nycaptor.cpp +++ b/src/mame/drivers/nycaptor.cpp @@ -1287,7 +1287,7 @@ DRIVER_INIT_MEMBER(nycaptor_state,bronx) uint8_t *rom = memregion("maincpu")->base(); for (i = 0; i < 0x20000; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); m_gametype = 1; } @@ -1298,7 +1298,7 @@ DRIVER_INIT_MEMBER(nycaptor_state,colt) uint8_t *rom = memregion("maincpu")->base(); for (i = 0; i < 0x20000; i++) - rom[i] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); m_gametype = 2; } diff --git a/src/mame/drivers/ojankohs.cpp b/src/mame/drivers/ojankohs.cpp index 389e43d64c3..c3b5be359e3 100644 --- a/src/mame/drivers/ojankohs.cpp +++ b/src/mame/drivers/ojankohs.cpp @@ -604,13 +604,13 @@ READ8_MEMBER( ojankohs_state::ojankoc_keymatrix_p2_r ) READ8_MEMBER( ojankohs_state::ojankohs_dipsw1_r ) { uint8_t data = m_dsw1->read(); - return BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); } READ8_MEMBER( ojankohs_state::ojankohs_dipsw2_r ) { uint8_t data = m_dsw2->read(); - return BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + return bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); } READ8_MEMBER( ojankohs_state::ccasino_dipsw3_r ) diff --git a/src/mame/drivers/omegrace.cpp b/src/mame/drivers/omegrace.cpp index 14377dd571d..5236b4059d5 100644 --- a/src/mame/drivers/omegrace.cpp +++ b/src/mame/drivers/omegrace.cpp @@ -620,7 +620,7 @@ DRIVER_INIT_MEMBER(omegrace_state,omegrace) * in a consistent way to the decoder, we swap the bits * here. */ for (i=0; i(prom[i],7,6,5,4,1,0,3,2); } diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp index 40a4c1a120d..c5968040644 100644 --- a/src/mame/drivers/pacman.cpp +++ b/src/mame/drivers/pacman.cpp @@ -6914,12 +6914,12 @@ void pacman_state::eyes_decode(uint8_t *data) for (j = 0; j < 8; j++) { - swapbuffer[j] = data[BITSWAP16(j,15,14,13,12,11,10,9,8,7,6,5,4,3,0,1,2)]; + swapbuffer[j] = data[bitswap<16>(j,15,14,13,12,11,10,9,8,7,6,5,4,3,0,1,2)]; } for (j = 0; j < 8; j++) { - data[j] = BITSWAP8(swapbuffer[j],7,4,5,6,3,2,1,0); + data[j] = bitswap<8>(swapbuffer[j],7,4,5,6,3,2,1,0); } } @@ -6934,7 +6934,7 @@ DRIVER_INIT_MEMBER(pacman_state,eyes) RAM = memregion("maincpu")->base(); for (i = 0; i < 0x4000; i++) { - RAM[i] = BITSWAP8(RAM[i],7,6,3,4,5,2,1,0); + RAM[i] = bitswap<8>(RAM[i],7,6,3,4,5,2,1,0); } @@ -6949,10 +6949,10 @@ DRIVER_INIT_MEMBER(pacman_state,eyes) #define BITSWAP12(val,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \ - BITSWAP16(val,15,14,13,12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) + bitswap<16>(val,15,14,13,12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) #define BITSWAP11(val,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \ - BITSWAP16(val,15,14,13,12,11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) + bitswap<16>(val,15,14,13,12,11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) void pacman_state::mspacman_install_patches(uint8_t *ROM) { @@ -7025,13 +7025,13 @@ DRIVER_INIT_MEMBER(pacman_state,mspacman) DROM[0x0000+i] = ROM[0x0000+i]; /* pacman.6e */ DROM[0x1000+i] = ROM[0x1000+i]; /* pacman.6f */ DROM[0x2000+i] = ROM[0x2000+i]; /* pacman.6h */ - DROM[0x3000+i] = BITSWAP8(ROM[0xb000+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt u7 */ + DROM[0x3000+i] = bitswap<8>(ROM[0xb000+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt u7 */ } for (i = 0; i < 0x800; i++) { - DROM[0x8000+i] = BITSWAP8(ROM[0x8000+BITSWAP11(i, 8,7,5,9,10,6,3,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt u5 */ - DROM[0x8800+i] = BITSWAP8(ROM[0x9800+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt half of u6 */ - DROM[0x9000+i] = BITSWAP8(ROM[0x9000+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt half of u6 */ + DROM[0x8000+i] = bitswap<8>(ROM[0x8000+BITSWAP11(i, 8,7,5,9,10,6,3,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt u5 */ + DROM[0x8800+i] = bitswap<8>(ROM[0x9800+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt half of u6 */ + DROM[0x9000+i] = bitswap<8>(ROM[0x9000+BITSWAP12(i,11,3,7,9,10,8,6,5,4,2,1,0)],0,4,5,7,6,3,2,1); /* decrypt half of u6 */ DROM[0x9800+i] = ROM[0x1800+i]; /* mirror of pacman.6f high */ } for (i = 0; i < 0x1000; i++) @@ -7102,7 +7102,7 @@ DRIVER_INIT_MEMBER(pacman_state,8bpm) /* Data lines D0 and D6 swapped */ for( i = 0; i < 0x8000; i++ ) { - ROM[i] = BITSWAP8(ROM[i],7,0,5,4,3,2,1,6); + ROM[i] = bitswap<8>(ROM[i],7,0,5,4,3,2,1,6); } membank("bank1")->set_base(&ROM[0 * 0x2000]); @@ -7119,7 +7119,7 @@ DRIVER_INIT_MEMBER(pacman_state,porky) /* Data lines D0 and D4 swapped */ for(i = 0; i < 0x10000; i++) { - ROM[i] = BITSWAP8(ROM[i],7,6,5,0,3,2,1,4); + ROM[i] = bitswap<8>(ROM[i],7,6,5,0,3,2,1,4); } membank("bank1")->configure_entries(0, 2, &ROM[0 * 0x2000], 0x8000); @@ -7185,7 +7185,7 @@ DRIVER_INIT_MEMBER(pacman_state,superabc) // descramble gfx for (int i = 0; i < 0x10000; i++) - dest[i] = src[BITSWAP24(i,23,22,21,20,19,18,17, 12,13,14,16,15, 11,10,9,8,7,6,5,4,3,2,1,0)]; + dest[i] = src[bitswap<24>(i,23,22,21,20,19,18,17, 12,13,14,16,15, 11,10,9,8,7,6,5,4,3,2,1,0)]; } READ8_MEMBER(pacman_state::cannonbp_protection_r) diff --git a/src/mame/drivers/panicr.cpp b/src/mame/drivers/panicr.cpp index a3558fc91c3..c78b3511522 100644 --- a/src/mame/drivers/panicr.cpp +++ b/src/mame/drivers/panicr.cpp @@ -733,7 +733,7 @@ DRIVER_INIT_MEMBER(panicr_state,panicr) w1 = (rom[i + 0*size/2] << 8) + rom[i + 1*size/2]; - w1 = BITSWAP16(w1, 9,12,7,3, 8,13,6,2, 11,14,1,5, 10,15,4,0); + w1 = bitswap<16>(w1, 9,12,7,3, 8,13,6,2, 11,14,1,5, 10,15,4,0); buf[i + 0*size/2] = w1 >> 8; buf[i + 1*size/2] = w1 & 0xff; @@ -742,7 +742,7 @@ DRIVER_INIT_MEMBER(panicr_state,panicr) // text address lines for (i = 0;i < size;i++) { - rom[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6, 2,3,1,0,5,4)]; + rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6, 2,3,1,0,5,4)]; } @@ -757,8 +757,8 @@ DRIVER_INIT_MEMBER(panicr_state,panicr) w1 = (rom[i + 0*size/4] << 8) + rom[i + 3*size/4]; w2 = (rom[i + 1*size/4] << 8) + rom[i + 2*size/4]; - w1 = BITSWAP16(w1, 14,12,11,9, 3,2,1,0, 10,15,13,8, 7,6,5,4); - w2 = BITSWAP16(w2, 3,13,15,4, 12,2,5,11, 14,6,1,10, 8,7,9,0); + w1 = bitswap<16>(w1, 14,12,11,9, 3,2,1,0, 10,15,13,8, 7,6,5,4); + w2 = bitswap<16>(w2, 3,13,15,4, 12,2,5,11, 14,6,1,10, 8,7,9,0); buf[i + 0*size/4] = w1 >> 8; buf[i + 1*size/4] = w1 & 0xff; @@ -769,7 +769,7 @@ DRIVER_INIT_MEMBER(panicr_state,panicr) // tiles address lines for (i = 0;i < size;i++) { - rom[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12, 5,4,3,2, 11,10,9,8,7,6, 0,1)]; + rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12, 5,4,3,2, 11,10,9,8,7,6, 0,1)]; } @@ -784,7 +784,7 @@ DRIVER_INIT_MEMBER(panicr_state,panicr) w1 = (rom[i + 0*size/2] << 8) + rom[i + 1*size/2]; - w1 = BITSWAP16(w1, 11,5,7,12, 4,10,13,3, 6,14,9,2, 0,15,1,8); + w1 = bitswap<16>(w1, 11,5,7,12, 4,10,13,3, 6,14,9,2, 0,15,1,8); buf[i + 0*size/2] = w1 >> 8; diff --git a/src/mame/drivers/pbaction.cpp b/src/mame/drivers/pbaction.cpp index 37416270468..20e3944aff3 100644 --- a/src/mame/drivers/pbaction.cpp +++ b/src/mame/drivers/pbaction.cpp @@ -494,7 +494,7 @@ DRIVER_INIT_MEMBER(pbaction_state,pbactio3) /* first of all, do a simple bitswap */ for (i = 0; i < 0xc000; i++) { - rom[i] = BITSWAP8(rom[i], 7,6,5,4,1,2,3,0); + rom[i] = bitswap<8>(rom[i], 7,6,5,4,1,2,3,0); } /* install a protection (?) workaround */ diff --git a/src/mame/drivers/pc88va.cpp b/src/mame/drivers/pc88va.cpp index 57d5ebe0795..fc941af9405 100644 --- a/src/mame/drivers/pc88va.cpp +++ b/src/mame/drivers/pc88va.cpp @@ -254,7 +254,7 @@ void pc88va_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) { for(x_s=0;x_s<16;x_s++) { - pen = (BITSWAP16(tvram[(spda+spr_count) / 2],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8) >> (15-x_s)) & 1; + pen = (bitswap<16>(tvram[(spda+spr_count) / 2],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8) >> (15-x_s)) & 1; pen = pen & 1 ? fg_col : (bc) ? 8 : -1; @@ -281,7 +281,7 @@ void pc88va_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) { for(x_s=0;x_s<2;x_s++) { - pen = (BITSWAP16(tvram[(spda+spr_count) / 2],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8)) >> (16-(x_s*8)) & 0xf; + pen = (bitswap<16>(tvram[(spda+spr_count) / 2],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8)) >> (16-(x_s*8)) & 0xf; //if(bc != -1) //transparent pen bitmap.pix32(yp+y_i, xp+x_i+(x_s)) = m_palette->pen(pen); diff --git a/src/mame/drivers/pc9801.cpp b/src/mame/drivers/pc9801.cpp index 036cccbd006..124824bfe0e 100644 --- a/src/mame/drivers/pc9801.cpp +++ b/src/mame/drivers/pc9801.cpp @@ -855,7 +855,7 @@ WRITE8_MEMBER(pc9801_state::grcg_w) else if(offset == 7) { // logerror("%02x GRCG TILE %02x\n",data,m_grcg.tile_index); - m_grcg.tile[m_grcg.tile_index] = BITSWAP8(data,0,1,2,3,4,5,6,7); + m_grcg.tile[m_grcg.tile_index] = bitswap<8>(data,0,1,2,3,4,5,6,7); m_grcg.tile_index ++; m_grcg.tile_index &= 3; return; @@ -1061,24 +1061,24 @@ WRITE8_MEMBER(pc9801_state::pic_w) READ16_MEMBER(pc9801_state::grcg_gvram_r) { uint16_t ret = upd7220_grcg_r(space, (offset + 0x4000) | (m_vram_bank << 16), mem_mask); - return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + return bitswap<16>(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); } WRITE16_MEMBER(pc9801_state::grcg_gvram_w) { - data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + data = bitswap<16>(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); upd7220_grcg_w(space, (offset + 0x4000) | (m_vram_bank << 16), data, mem_mask); } READ16_MEMBER(pc9801_state::grcg_gvram0_r) { uint16_t ret = upd7220_grcg_r(space, offset | (m_vram_bank << 16), mem_mask); - return BITSWAP16(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + return bitswap<16>(ret,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); } WRITE16_MEMBER(pc9801_state::grcg_gvram0_w) { - data = BITSWAP16(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + data = bitswap<16>(data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); upd7220_grcg_w(space, offset | (m_vram_bank << 16), data, mem_mask); } @@ -2889,7 +2889,7 @@ DRIVER_INIT_MEMBER(pc9801_state,pc9801_kanji) { for(j=0;j<0x20;j++) { - pcg_tile = BITSWAP16(i,15,14,13,12,11,7,6,5,10,9,8,4,3,2,1,0) << 5; + pcg_tile = bitswap<16>(i,15,14,13,12,11,7,6,5,10,9,8,4,3,2,1,0) << 5; kanji[j+(i << 5)] = raw_kanji[j+pcg_tile]; } } diff --git a/src/mame/drivers/pegasus.cpp b/src/mame/drivers/pegasus.cpp index 2ac3e43b3ff..1e214f8375f 100644 --- a/src/mame/drivers/pegasus.cpp +++ b/src/mame/drivers/pegasus.cpp @@ -405,8 +405,8 @@ void pegasus_state::pegasus_decrypt_rom(uint8_t *ROM) for (int i = 0; i < 0x1000; i++) { b = ROM[i]; - j = BITSWAP16(i, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 7); - b = BITSWAP8(b, 3, 2, 1, 0, 7, 6, 5, 4); + j = bitswap<16>(i, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 7); + b = bitswap<8>(b, 3, 2, 1, 0, 7, 6, 5, 4); temp_copy[j & 0xfff] = b; } memcpy(ROM, &temp_copy[0], 0x1000); diff --git a/src/mame/drivers/pengadvb.cpp b/src/mame/drivers/pengadvb.cpp index f10f8c72359..f24999f4e7a 100644 --- a/src/mame/drivers/pengadvb.cpp +++ b/src/mame/drivers/pengadvb.cpp @@ -293,7 +293,7 @@ void pengadvb_state::pengadvb_decrypt(const char* region) // data lines swap for (int i = 0; i < memsize; i++) { - mem[i] = BITSWAP8(mem[i],7,6,5,3,4,2,1,0); + mem[i] = bitswap<8>(mem[i],7,6,5,3,4,2,1,0); } // address line swap @@ -301,7 +301,7 @@ void pengadvb_state::pengadvb_decrypt(const char* region) memcpy(&buf[0], mem, memsize); for (int i = 0; i < memsize; i++) { - mem[i] = buf[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,5,11,10,9,8,7,6,12,4,3,2,1,0)]; + mem[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,5,11,10,9,8,7,6,12,4,3,2,1,0)]; } } diff --git a/src/mame/drivers/pet.cpp b/src/mame/drivers/pet.cpp index 85824fd066f..3f6a2835f42 100644 --- a/src/mame/drivers/pet.cpp +++ b/src/mame/drivers/pet.cpp @@ -635,10 +635,10 @@ void cbm8296_state::read_pla1_eprom(offs_t offset, int phi2, int brw, int noscre // PLA-EPROM adapter by Joachim Nemetz (Jogi) uint32_t input = (offset & 0xff00) | phi2 << 7 | brw << 6 | noscreen << 5 | noio << 4 | ramsela << 3 | ramsel9 << 2 | ramon << 1 | norom; - input = BITSWAP16(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15); + input = bitswap<16>(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15); uint8_t data = m_ue6_rom->base()[input]; - data = BITSWAP8(data,7,0,1,2,3,4,5,6); + data = bitswap<8>(data,7,0,1,2,3,4,5,6); cswff = BIT(data, 0); cs9 = BIT(data, 1); @@ -657,7 +657,7 @@ void cbm8296_state::read_pla1_eprom(offs_t offset, int phi2, int brw, int noscre void cbm8296_state::read_pla2(offs_t offset, int phi2, int brw, int casena1, int &endra, int &noscreen, int &casena2, int &fa15) { - uint32_t input = BITSWAP8(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1; + uint32_t input = bitswap<8>(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1; uint32_t data = m_pla2->read(input); endra = BIT(data, 4); @@ -670,11 +670,11 @@ void cbm8296_state::read_pla2_eprom(offs_t offset, int phi2, int brw, int casena { // PLA-EPROM adapter by Joachim Nemetz (Jogi) - uint32_t input = BITSWAP8(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1; - input = BITSWAP16(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15); + uint32_t input = bitswap<8>(m_cr, 0,1,2,3,4,5,6,7) << 8 | ((offset >> 8) & 0xf8) | brw << 2 | phi2 << 1 | casena1; + input = bitswap<16>(input,13,8,9,7,12,14,11,10,6,5,4,3,2,1,0,15); uint8_t data = m_ue5_rom->base()[input]; - data = BITSWAP8(data,7,0,1,2,3,4,5,6); + data = bitswap<8>(data,7,0,1,2,3,4,5,6); endra = BIT(data, 4); noscreen = BIT(data, 5); diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 4f8168637f6..cc53cce7b50 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -120,7 +120,7 @@ WRITE32_MEMBER(pgm2_state::sprite_encryption_w) COMBINE_DATA(&m_spritekey); if (!m_sprite_predecrypted) - m_realspritekey = BITSWAP32(m_spritekey ^ 0x90055555, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); + m_realspritekey = bitswap<32>(m_spritekey ^ 0x90055555, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31); } WRITE32_MEMBER(pgm2_state::encryption_do_w) @@ -899,7 +899,7 @@ static void iga_u16_decode(uint16_t *rom, int len, int ixor) if ( (i>>1) & 0x000400) x ^= 0x8000; rom[i] ^= x; - rom[i] = BITSWAP16(rom[i], 8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + rom[i] = bitswap<16>(rom[i], 8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); } } @@ -924,7 +924,7 @@ static void iga_u12_decode(uint16_t* rom, int len, int ixor) if ( (i>>1) & 0x000400) x ^= 0x0000; rom[i] ^= x; - rom[i] = BITSWAP16(rom[i], 8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); + rom[i] = bitswap<16>(rom[i], 8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); } } @@ -934,7 +934,7 @@ static void sprite_colour_decode(uint16_t* rom, int len) for (i = 0; i < len / 2; i++) { - rom[i] = BITSWAP16(rom[i], 15, 14, /* unused - 6bpp */ + rom[i] = bitswap<16>(rom[i], 15, 14, /* unused - 6bpp */ 13, 12, 11, 5, 4, 3, 7, 6, /* unused - 6bpp */ diff --git a/src/mame/drivers/piggypas.cpp b/src/mame/drivers/piggypas.cpp index 121150f25a7..ff2468638ba 100644 --- a/src/mame/drivers/piggypas.cpp +++ b/src/mame/drivers/piggypas.cpp @@ -59,7 +59,7 @@ WRITE8_MEMBER(piggypas_state::ctrl_w) WRITE8_MEMBER(piggypas_state::mcs51_tx_callback) { // Serial output driver is UCN5833A - output().set_digit_value(m_digit_idx++, BITSWAP8(data,7,6,4,3,2,1,0,5) & 0x7f); + output().set_digit_value(m_digit_idx++, bitswap<8>(data,7,6,4,3,2,1,0,5) & 0x7f); } static ADDRESS_MAP_START( piggypas_map, AS_PROGRAM, 8, piggypas_state ) diff --git a/src/mame/drivers/pingpong.cpp b/src/mame/drivers/pingpong.cpp index d8e1ee47aea..0393f1f0105 100644 --- a/src/mame/drivers/pingpong.cpp +++ b/src/mame/drivers/pingpong.cpp @@ -568,7 +568,7 @@ DRIVER_INIT_MEMBER(pingpong_state,merlinmm) /* decrypt program code */ for( i = 0; i < 0x4000; i++ ) - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); } DRIVER_INIT_MEMBER(pingpong_state,cashquiz) @@ -579,12 +579,12 @@ DRIVER_INIT_MEMBER(pingpong_state,cashquiz) /* decrypt program code */ ROM = memregion("maincpu")->base(); for( i = 0; i < 0x4000; i++ ) - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); /* decrypt questions */ ROM = memregion("user1")->base(); for( i = 0; i < 0x40000; i++ ) - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); /* questions banking handlers */ m_maincpu->space(AS_PROGRAM).install_write_handler(0x4000, 0x4000, write8_delegate(FUNC(pingpong_state::cashquiz_question_bank_high_w),this)); diff --git a/src/mame/drivers/pirates.cpp b/src/mame/drivers/pirates.cpp index 54f83d68175..0fa3ca0d9fe 100644 --- a/src/mame/drivers/pirates.cpp +++ b/src/mame/drivers/pirates.cpp @@ -365,11 +365,11 @@ void pirates_state::decrypt_68k() int adrl, adrr; uint8_t vl, vr; - adrl = BITSWAP24(i,23,22,21,20,19,18,4,8,3,14,2,15,17,0,9,13,10,5,16,7,12,6,1,11); - vl = BITSWAP8(buf[adrl], 4,2,7,1,6,5,0,3); + adrl = bitswap<24>(i,23,22,21,20,19,18,4,8,3,14,2,15,17,0,9,13,10,5,16,7,12,6,1,11); + vl = bitswap<8>(buf[adrl], 4,2,7,1,6,5,0,3); - adrr = BITSWAP24(i,23,22,21,20,19,18,4,10,1,11,12,5,9,17,14,0,13,6,15,8,3,16,7,2); - vr = BITSWAP8(buf[adrr]>>8, 1,4,7,0,3,5,6,2); + adrr = bitswap<24>(i,23,22,21,20,19,18,4,10,1,11,12,5,9,17,14,0,13,6,15,8,3,16,7,2); + vr = bitswap<8>(buf[adrr]>>8, 1,4,7,0,3,5,6,2); rom[i] = (vr<<8) | vl; } @@ -390,11 +390,11 @@ void pirates_state::decrypt_p() for (i=0; i(i,23,22,21,20,19,18,10,2,5,9,7,13,16,14,11,4,1,6,12,17,3,0,15,8); + rom[adr+0*(rom_size/4)] = bitswap<8>(buf[i+0*(rom_size/4)], 2,3,4,0,7,5,1,6); + rom[adr+1*(rom_size/4)] = bitswap<8>(buf[i+1*(rom_size/4)], 4,2,7,1,6,5,0,3); + rom[adr+2*(rom_size/4)] = bitswap<8>(buf[i+2*(rom_size/4)], 1,4,7,0,3,5,6,2); + rom[adr+3*(rom_size/4)] = bitswap<8>(buf[i+3*(rom_size/4)], 2,3,4,0,7,5,1,6); } } @@ -413,11 +413,11 @@ void pirates_state::decrypt_s() for (i=0; i(i,23,22,21,20,19,18,17,5,12,14,8,3,0,7,9,16,4,2,6,11,13,1,10,15); + rom[adr+0*(rom_size/4)] = bitswap<8>(buf[i+0*(rom_size/4)], 4,2,7,1,6,5,0,3); + rom[adr+1*(rom_size/4)] = bitswap<8>(buf[i+1*(rom_size/4)], 1,4,7,0,3,5,6,2); + rom[adr+2*(rom_size/4)] = bitswap<8>(buf[i+2*(rom_size/4)], 2,3,4,0,7,5,1,6); + rom[adr+3*(rom_size/4)] = bitswap<8>(buf[i+3*(rom_size/4)], 4,2,7,1,6,5,0,3); } } @@ -437,8 +437,8 @@ void pirates_state::decrypt_oki() for (i=0; i(i,23,22,21,20,19,10,16,13,8,4,7,11,14,17,12,6,2,0,5,18,15,3,1,9); + rom[adr] = bitswap<8>(buf[i], 2,3,4,0,7,5,1,6); } } diff --git a/src/mame/drivers/playch10.cpp b/src/mame/drivers/playch10.cpp index 2116729f35b..3d7ae0183b1 100644 --- a/src/mame/drivers/playch10.cpp +++ b/src/mame/drivers/playch10.cpp @@ -1677,7 +1677,7 @@ DRIVER_INIT_MEMBER(playch10_state,virus) uint32_t len = memregion("rp5h01")->bytes(); for (int i = 0; i < len; i++) { - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); ROM[i] ^= 0xff; } @@ -1691,7 +1691,7 @@ DRIVER_INIT_MEMBER(playch10_state,ttoon) uint32_t len = memregion("rp5h01")->bytes(); for (int i = 0; i < len; i++) { - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); ROM[i] ^= 0xff; } diff --git a/src/mame/drivers/pntnpuzl.cpp b/src/mame/drivers/pntnpuzl.cpp index a58618a2326..aaf8177a95a 100644 --- a/src/mame/drivers/pntnpuzl.cpp +++ b/src/mame/drivers/pntnpuzl.cpp @@ -220,8 +220,8 @@ READ16_MEMBER(pntnpuzl_state::pntnpuzl_280014_r) if (ioport("IN0")->read() & 0x10) { m_touchscr[0] = 0x1b; - m_touchscr[2] = BITSWAP8(ioport("TOUCHX")->read(),0,1,2,3,4,5,6,7); - m_touchscr[4] = BITSWAP8(ioport("TOUCHY")->read(),0,1,2,3,4,5,6,7); + m_touchscr[2] = bitswap<8>(ioport("TOUCHX")->read(),0,1,2,3,4,5,6,7); + m_touchscr[4] = bitswap<8>(ioport("TOUCHY")->read(),0,1,2,3,4,5,6,7); } else m_touchscr[0] = 0; diff --git a/src/mame/drivers/poly880.cpp b/src/mame/drivers/poly880.cpp index d3297d0cd15..cddaf752477 100644 --- a/src/mame/drivers/poly880.cpp +++ b/src/mame/drivers/poly880.cpp @@ -160,7 +160,7 @@ WRITE8_MEMBER( poly880_state::pio1_pa_w ) */ - m_segment = BITSWAP8(data, 3, 4, 6, 0, 1, 2, 7, 5); + m_segment = bitswap<8>(data, 3, 4, 6, 0, 1, 2, 7, 5); update_display(); } diff --git a/src/mame/drivers/popeye.cpp b/src/mame/drivers/popeye.cpp index 7b1acd6a166..cdbd3c35bf7 100644 --- a/src/mame/drivers/popeye.cpp +++ b/src/mame/drivers/popeye.cpp @@ -760,7 +760,7 @@ DRIVER_INIT_MEMBER(popeye_state,skyskipr) std::vector buffer(len); int i; for (i = 0;i < len; i++) - buffer[i] = BITSWAP8(rom[BITSWAP16(i,15,14,13,12,11,10,8,7,0,1,2,4,5,9,3,6) ^ 0xfc],3,4,2,5,1,6,0,7); + buffer[i] = bitswap<8>(rom[bitswap<16>(i,15,14,13,12,11,10,8,7,0,1,2,4,5,9,3,6) ^ 0xfc],3,4,2,5,1,6,0,7); memcpy(rom,&buffer[0],len); } @@ -779,7 +779,7 @@ DRIVER_INIT_MEMBER(popeye_state,popeye) std::vector buffer(len); int i; for (i = 0;i < len; i++) - buffer[i] = BITSWAP8(rom[BITSWAP16(i,15,14,13,12,11,10,8,7,6,3,9,5,4,2,1,0) ^ 0x3f],3,4,2,5,1,6,0,7); + buffer[i] = bitswap<8>(rom[bitswap<16>(i,15,14,13,12,11,10,8,7,6,3,9,5,4,2,1,0) ^ 0x3f],3,4,2,5,1,6,0,7); memcpy(rom,&buffer[0],len); } diff --git a/src/mame/drivers/popobear.cpp b/src/mame/drivers/popobear.cpp index ab897bf5ee7..27983bdc3fa 100644 --- a/src/mame/drivers/popobear.cpp +++ b/src/mame/drivers/popobear.cpp @@ -139,7 +139,7 @@ WRITE16_MEMBER(popobear_state::vram_w) COMBINE_DATA(&m_vram[offset]); // the graphic data for the tiles is in a strange order, rearrange it so that we can use it as tiles.. - int swapped_offset = BITSWAP32(offset, /* unused bits */ 31,30,29,28,27,26,25,24,23,22,21,20,19, /* end unused bits */ + int swapped_offset = bitswap<32>(offset, /* unused bits */ 31,30,29,28,27,26,25,24,23,22,21,20,19, /* end unused bits */ 18,17,16,15,14,13,12, diff --git a/src/mame/drivers/puckpkmn.cpp b/src/mame/drivers/puckpkmn.cpp index 28d46aa27b0..3fe426789bc 100644 --- a/src/mame/drivers/puckpkmn.cpp +++ b/src/mame/drivers/puckpkmn.cpp @@ -382,7 +382,7 @@ DRIVER_INIT_MEMBER(md_boot_state,puckpkmn) int i; for (i = 0; i < len; i++) - rom[i] = BITSWAP8(rom[i],1,4,2,0,7,5,3,6); + rom[i] = bitswap<8>(rom[i],1,4,2,0,7,5,3,6); DRIVER_INIT_CALL(megadriv); } diff --git a/src/mame/drivers/pve500.cpp b/src/mame/drivers/pve500.cpp index 5979c5f7b89..08b28bd9f70 100644 --- a/src/mame/drivers/pve500.cpp +++ b/src/mame/drivers/pve500.cpp @@ -325,7 +325,7 @@ WRITE8_MEMBER(pve500_state::io_sel_w) io_SEL = data; for (int i=0; i<4; i++){ if (BIT(io_SEL, i)){ - LD_data[i] = 0x7F & BITSWAP8(io_LD ^ 0xFF, 7, 0, 1, 2, 3, 4, 5, 6); + LD_data[i] = 0x7F & bitswap<8>(io_LD ^ 0xFF, 7, 0, 1, 2, 3, 4, 5, 6); } } } diff --git a/src/mame/drivers/qix.cpp b/src/mame/drivers/qix.cpp index 3032ca89512..eea7cf401aa 100644 --- a/src/mame/drivers/qix.cpp +++ b/src/mame/drivers/qix.cpp @@ -1312,10 +1312,10 @@ int qix_state::kram3_permut1(int idx, int value) switch (idx) { default: - case 0: return BITSWAP8(value, 7,6,5,4, 3,2,1,0); - case 1: return BITSWAP8(value, 7,6,5,4, 0,3,2,1); - case 2: return BITSWAP8(value, 7,6,5,4, 1,0,3,2); - case 3: return BITSWAP8(value, 7,6,5,4, 2,3,0,1); + case 0: return bitswap<8>(value, 7,6,5,4, 3,2,1,0); + case 1: return bitswap<8>(value, 7,6,5,4, 0,3,2,1); + case 2: return bitswap<8>(value, 7,6,5,4, 1,0,3,2); + case 3: return bitswap<8>(value, 7,6,5,4, 2,3,0,1); } } @@ -1335,7 +1335,7 @@ int qix_state::kram3_permut2(int tbl_index, int idx, const uint8_t *xor_table) xorval ^= 0x02; if (idx == 3) - xorval = BITSWAP8(xorval, 7,6,5,4, 0,2,3,1); + xorval = bitswap<8>(xorval, 7,6,5,4, 0,2,3,1); return xorval; } diff --git a/src/mame/drivers/r2dx_v33.cpp b/src/mame/drivers/r2dx_v33.cpp index 4c22095739c..4370adbd99e 100644 --- a/src/mame/drivers/r2dx_v33.cpp +++ b/src/mame/drivers/r2dx_v33.cpp @@ -903,7 +903,7 @@ DRIVER_INIT_MEMBER(r2dx_v33_state,zerotm2k) std::vector buffer(len); int i; for (i = 0; i < len; i ++) - buffer[i] = src[BITSWAP32(i,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,5,6,4,3,2,1,0)]; + buffer[i] = src[bitswap<32>(i,31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,5,6,4,3,2,1,0)]; memcpy(src, &buffer[0], len); } diff --git a/src/mame/drivers/raiden.cpp b/src/mame/drivers/raiden.cpp index e775b8d73a7..88196786470 100644 --- a/src/mame/drivers/raiden.cpp +++ b/src/mame/drivers/raiden.cpp @@ -741,7 +741,7 @@ void raiden_state::common_decrypt() static const uint16_t xor_table[] = { 0x200e,0x0006,0x000a,0x0002,0x240e,0x000e,0x04c2,0x00c2,0x008c,0x0004,0x0088,0x0000,0x048c,0x000c,0x04c0,0x00c0 }; uint16_t data = RAM[0xc0000/2 + i]; data ^= xor_table[i & 0x0f]; - data = BITSWAP16(data, 15,14,10,12,11,13,9,8,3,2,5,4,7,1,6,0); + data = bitswap<16>(data, 15,14,10,12,11,13,9,8,3,2,5,4,7,1,6,0); RAM[0xc0000/2 + i] = data; } @@ -752,7 +752,7 @@ void raiden_state::common_decrypt() static const uint16_t xor_table[] = { 0x0080,0x0080,0x0244,0x0288,0x0288,0x0288,0x1041,0x1009 }; uint16_t data = RAM[0xc0000/2 + i]; data ^= xor_table[i & 0x07]; - data = BITSWAP16(data, 15,14,13,9,11,10,12,8,2,0,5,4,7,3,1,6); + data = bitswap<16>(data, 15,14,13,9,11,10,12,8,2,0,5,4,7,3,1,6); RAM[0xc0000/2 + i] = data; } } diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp index b8f94aaafcf..2ee85a262c3 100644 --- a/src/mame/drivers/rainbow.cpp +++ b/src/mame/drivers/rainbow.cpp @@ -2863,7 +2863,7 @@ WRITE16_MEMBER(rainbow_state::vram_w) if(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR) // VT240 : if(SELECT_VECTOR_PATTERN_REGISTER) { - chr = BITSWAP8(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx); + chr = bitswap<8>(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx); chr |= (chr << 8); if(m_patcnt-- == 0) { @@ -3121,7 +3121,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w) // -------------------- WRITE BUFFER USED IN WORD MODE ONLY ! // "OUTPUT WRITE BUFFER IS THE INVERSE OF THE INPUT" (quote from 4-3 of the PDF) // BITSWAP SEEMS NECESSARY (see digits in DOODLE)... ! - m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); m_GDC_write_buffer_index &= 0xf; // write up to 16 bytes to port 52h. break; @@ -3149,10 +3149,10 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w) // There is no specific order for the WRITE_MASK (according to txt/code samples in DEC's PDF). // NOTE: LOW <-> HI JUXTAPOSITION! case 4: // 54h Write Mask LOW - m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF ); + m_GDC_WRITE_MASK = ( bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF ); break; case 5: // 55h Write Mask HIGH - m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); break; } // switch diff --git a/src/mame/drivers/risc2500.cpp b/src/mame/drivers/risc2500.cpp index 56049cf2147..2a8ca42b5db 100644 --- a/src/mame/drivers/risc2500.cpp +++ b/src/mame/drivers/risc2500.cpp @@ -77,7 +77,7 @@ uint32_t risc2500_state::screen_update(screen_device &screen, bitmap_ind16 &bitm // 12 characters 5 x 7 for(int x=0; x<5; x++) { - uint8_t gfx = BITSWAP8(m_vram[c*5 + x], 6,5,0,1,2,3,4,7); + uint8_t gfx = bitswap<8>(m_vram[c*5 + x], 6,5,0,1,2,3,4,7); for(int y=0; y<7; y++) bitmap.pix16(y, 71 - (c*6 + x)) = (gfx >> (y + 1)) & 1; @@ -86,7 +86,7 @@ uint32_t risc2500_state::screen_update(screen_device &screen, bitmap_ind16 &bitm // LCD digits and symbols int data_addr = 0x40 + c * 5; uint16_t data = ((m_vram[data_addr + 1] & 0x3) << 5) | ((m_vram[data_addr + 2] & 0x7) << 2) | (m_vram[data_addr + 4] & 0x3); - data = BITSWAP8(data, 7,3,0,1,4,6,5,2) | ((m_vram[data_addr - 1] & 0x04) ? 0x80 : 0); + data = bitswap<8>(data, 7,3,0,1,4,6,5,2) | ((m_vram[data_addr - 1] & 0x04) ? 0x80 : 0); output().set_digit_value(c, data); output().set_indexed_value("sym", c, BIT(m_vram[data_addr + 1], 2)); diff --git a/src/mame/drivers/rohga.cpp b/src/mame/drivers/rohga.cpp index 84389cc6c94..b58023bcf38 100644 --- a/src/mame/drivers/rohga.cpp +++ b/src/mame/drivers/rohga.cpp @@ -171,7 +171,7 @@ ADDRESS_MAP_END READ16_MEMBER( rohga_state::wf_protection_region_0_104_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco104->read_data( deco146_addr, mem_mask, cs ); return data; @@ -180,7 +180,7 @@ READ16_MEMBER( rohga_state::wf_protection_region_0_104_r ) WRITE16_MEMBER( rohga_state::wf_protection_region_0_104_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco104->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -221,7 +221,7 @@ ADDRESS_MAP_END READ16_MEMBER( rohga_state::nb_protection_region_0_146_r ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -230,7 +230,7 @@ READ16_MEMBER( rohga_state::nb_protection_region_0_146_r ) WRITE16_MEMBER( rohga_state::nb_protection_region_0_146_w ) { int real_address = 0 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/royalmah.cpp b/src/mame/drivers/royalmah.cpp index f78d744dc00..684b97e21e7 100644 --- a/src/mame/drivers/royalmah.cpp +++ b/src/mame/drivers/royalmah.cpp @@ -312,9 +312,9 @@ PALETTE_INIT_MEMBER(royalmah_state,mjderngr) uint16_t data = (prom[i] << 8) | prom[i + 0x200]; /* the bits are in reverse order */ - uint8_t r = BITSWAP8((data >> 0) & 0x1f,7,6,5,0,1,2,3,4 ); - uint8_t g = BITSWAP8((data >> 5) & 0x1f,7,6,5,0,1,2,3,4 ); - uint8_t b = BITSWAP8((data >> 10) & 0x1f,7,6,5,0,1,2,3,4 ); + uint8_t r = bitswap<8>((data >> 0) & 0x1f,7,6,5,0,1,2,3,4 ); + uint8_t g = bitswap<8>((data >> 5) & 0x1f,7,6,5,0,1,2,3,4 ); + uint8_t b = bitswap<8>((data >> 10) & 0x1f,7,6,5,0,1,2,3,4 ); palette.set_pen_color(i, pal5bit(r), pal5bit(g), pal5bit(b)); } diff --git a/src/mame/drivers/s11.cpp b/src/mame/drivers/s11.cpp index 8c299d7178f..0f9948eff13 100644 --- a/src/mame/drivers/s11.cpp +++ b/src/mame/drivers/s11.cpp @@ -242,7 +242,7 @@ WRITE8_MEMBER( s11_state::dig1_w ) m_segment2 |= 0x20000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } @@ -266,7 +266,7 @@ WRITE8_MEMBER( s11_state::pia2c_pa_w ) m_segment1 |= 0x10000; if ((m_segment1 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment1 |= 0x40000; } } @@ -277,7 +277,7 @@ WRITE8_MEMBER( s11_state::pia2c_pb_w ) m_segment1 |= 0x20000; if ((m_segment1 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe, BITSWAP16(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe, bitswap<16>(m_segment1, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment1 |= 0x40000; } } @@ -300,7 +300,7 @@ WRITE8_MEMBER( s11_state::pia34_pa_w ) m_segment2 |= 0x10000; if ((m_segment2 & 0x70000) == 0x30000) { - output().set_digit_value(m_strobe+16, BITSWAP16(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_strobe+16, bitswap<16>(m_segment2, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); m_segment2 |= 0x40000; } } diff --git a/src/mame/drivers/s11b.cpp b/src/mame/drivers/s11b.cpp index c48ee63939b..08e8fe0d2ba 100644 --- a/src/mame/drivers/s11b.cpp +++ b/src/mame/drivers/s11b.cpp @@ -177,9 +177,9 @@ WRITE8_MEMBER( s11b_state::dig1_w ) if((seg & 0x70000) == 0x30000) { if(m_invert) - output().set_digit_value(get_strobe()+16, BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe()+16, bitswap<16>(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); else - output().set_digit_value(get_strobe()+16, BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe()+16, bitswap<16>(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); seg |= 0x40000; } set_segment2(seg); @@ -193,9 +193,9 @@ WRITE8_MEMBER( s11b_state::pia2c_pa_w ) if((seg & 0x70000) == 0x30000) { if(m_invert) - output().set_digit_value(get_strobe(), BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe(), bitswap<16>(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); else - output().set_digit_value(get_strobe(), BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe(), bitswap<16>(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); seg |= 0x40000; } set_segment1(seg); @@ -209,9 +209,9 @@ WRITE8_MEMBER( s11b_state::pia2c_pb_w ) if((seg & 0x70000) == 0x30000) { if(m_invert) - output().set_digit_value(get_strobe(), BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe(), bitswap<16>(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); else - output().set_digit_value(get_strobe(), BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe(), bitswap<16>(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); seg |= 0x40000; } set_segment1(seg); @@ -225,9 +225,9 @@ WRITE8_MEMBER( s11b_state::pia34_pa_w ) if((seg & 0x70000) == 0x30000) { if(m_invert) - output().set_digit_value(get_strobe()+16, BITSWAP16(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe()+16, bitswap<16>(~seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); else - output().set_digit_value(get_strobe()+16, BITSWAP16(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(get_strobe()+16, bitswap<16>(seg, 7, 15, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); seg |= 0x40000; } set_segment2(seg); diff --git a/src/mame/drivers/sc1.cpp b/src/mame/drivers/sc1.cpp index 223c6329c18..2e92685917f 100644 --- a/src/mame/drivers/sc1.cpp +++ b/src/mame/drivers/sc1.cpp @@ -72,7 +72,7 @@ public: WRITE8_MEMBER( sc1_state::pio_port_a_w ) { - uint8_t digit = BITSWAP8( data,3,4,6,0,1,2,7,5 ); + uint8_t digit = bitswap<8>( data,3,4,6,0,1,2,7,5 ); if (m_matrix & 0x04) output().set_digit_value(3, digit & 0x7f); diff --git a/src/mame/drivers/sc2.cpp b/src/mame/drivers/sc2.cpp index 0dc458c6bff..0bbff5767da 100644 --- a/src/mame/drivers/sc2.cpp +++ b/src/mame/drivers/sc2.cpp @@ -118,7 +118,7 @@ void sc2_state::machine_reset() void sc2_state::sc2_update_display() { - uint8_t digit_data = BITSWAP8( m_digit_data,7,0,1,2,3,4,5,6 ) & 0x7f; + uint8_t digit_data = bitswap<8>( m_digit_data,7,0,1,2,3,4,5,6 ) & 0x7f; if (!BIT(m_led_selected, 0)) { diff --git a/src/mame/drivers/scregg.cpp b/src/mame/drivers/scregg.cpp index 778c6cbf639..30e7c0a6275 100644 --- a/src/mame/drivers/scregg.cpp +++ b/src/mame/drivers/scregg.cpp @@ -419,7 +419,7 @@ DRIVER_INIT_MEMBER(scregg_state,rockduck) for (x = 0x2000; x < 0x6000; x++) { - src[x] = BITSWAP8(src[x],2,0,3,6,1,4,7,5); + src[x] = bitswap<8>(src[x],2,0,3,6,1,4,7,5); } } diff --git a/src/mame/drivers/sdk85.cpp b/src/mame/drivers/sdk85.cpp index 8c89e634075..9c1f4948bd7 100644 --- a/src/mame/drivers/sdk85.cpp +++ b/src/mame/drivers/sdk85.cpp @@ -132,7 +132,7 @@ WRITE8_MEMBER( sdk85_state::scanlines_w ) WRITE8_MEMBER( sdk85_state::digit_w ) { if (m_digit < 6) - output().set_digit_value(m_digit, BITSWAP8(data, 3, 2, 1, 0, 7, 6, 5, 4)^0xff); + output().set_digit_value(m_digit, bitswap<8>(data, 3, 2, 1, 0, 7, 6, 5, 4)^0xff); } READ8_MEMBER( sdk85_state::kbd_r ) diff --git a/src/mame/drivers/segag80r.cpp b/src/mame/drivers/segag80r.cpp index 5622b9e2bcd..079a86fa008 100644 --- a/src/mame/drivers/segag80r.cpp +++ b/src/mame/drivers/segag80r.cpp @@ -317,11 +317,11 @@ WRITE8_MEMBER(segag80r_state::sindbadm_misc_w) /* the data lines are flipped */ WRITE8_MEMBER(segag80r_state::sindbadm_sn1_SN76496_w) { - m_sn1->write(space, offset, BITSWAP8(data, 0,1,2,3,4,5,6,7)); + m_sn1->write(space, offset, bitswap<8>(data, 0,1,2,3,4,5,6,7)); } WRITE8_MEMBER(segag80r_state::sindbadm_sn2_SN76496_w) { - m_sn2->write(space, offset, BITSWAP8(data, 0,1,2,3,4,5,6,7)); + m_sn2->write(space, offset, bitswap<8>(data, 0,1,2,3,4,5,6,7)); } diff --git a/src/mame/drivers/segaorun.cpp b/src/mame/drivers/segaorun.cpp index fcd8de73381..f6a59e4a640 100644 --- a/src/mame/drivers/segaorun.cpp +++ b/src/mame/drivers/segaorun.cpp @@ -2964,13 +2964,13 @@ DRIVER_INIT_MEMBER(segaorun_state,outrunb) uint16_t *word = (uint16_t *)memregion("maincpu")->base(); uint32_t length = memregion("maincpu")->bytes() / 2; for (uint32_t i = 0; i < length; i++) - word[i] = BITSWAP16(word[i], 15,14,11,12,13,10,9,8,6,7,5,4,3,2,1,0); + word[i] = bitswap<16>(word[i], 15,14,11,12,13,10,9,8,6,7,5,4,3,2,1,0); // sub CPU: swap bits 14,15 and 2,3 word = (uint16_t *)memregion("subcpu")->base(); length = memregion("subcpu")->bytes() / 2; for (uint32_t i = 0; i < length; i++) - word[i] = BITSWAP16(word[i], 14,15,13,12,11,10,9,8,7,6,5,4,2,3,1,0); + word[i] = bitswap<16>(word[i], 14,15,13,12,11,10,9,8,7,6,5,4,2,3,1,0); // road gfx // rom a-2.bin: swap bits 6,7 @@ -2979,15 +2979,15 @@ DRIVER_INIT_MEMBER(segaorun_state,outrunb) length = memregion("gfx3")->bytes() / 2; for (uint32_t i = 0; i < length; i++) { - byte[i] = BITSWAP8(byte[i], 6,7,5,4,3,2,1,0); - byte[i+length] = BITSWAP8(byte[i+length], 7,5,6,4,3,2,1,0); + byte[i] = bitswap<8>(byte[i], 6,7,5,4,3,2,1,0); + byte[i+length] = bitswap<8>(byte[i+length], 7,5,6,4,3,2,1,0); } // Z80 code: swap bits 5,6 byte = memregion("soundcpu")->base(); length = memregion("soundcpu")->bytes(); for (uint32_t i = 0; i < length; i++) - byte[i] = BITSWAP8(byte[i], 7,5,6,4,3,2,1,0); + byte[i] = bitswap<8>(byte[i], 7,5,6,4,3,2,1,0); } DRIVER_INIT_MEMBER(segaorun_state,shangon) diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index 19aef83036c..4e0ec52c7f7 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -3829,7 +3829,7 @@ void segas16b_state::tilemap_16b_fpointbl_fill_latch(int i, uint16_t* latched_pa else if (i == 1) { // 6661 vs 1666 - latched_pageselect[i] = BITSWAP16(m_bootleg_page[3] ,3, 2, 1, 0 , 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 ) ; + latched_pageselect[i] = bitswap<16>(m_bootleg_page[3] ,3, 2, 1, 0 , 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 ) ; latched_yscroll[i] = m_bootleg_scroll[0x10/2]+2; latched_xscroll[i] = -m_bootleg_scroll[0x18/2]-1; } @@ -9021,7 +9021,7 @@ DRIVER_INIT_MEMBER(segas16b_state, fpointbla) for (int i = 0;i < 0x10000;i++) { - m_decrypted_opcodes[i] = BITSWAP16(rom[i], 8,9,10,11,12,13,14,15, 0, 1, 2, 3, 4, 5, 6, 7); + m_decrypted_opcodes[i] = bitswap<16>(rom[i], 8,9,10,11,12,13,14,15, 0, 1, 2, 3, 4, 5, 6, 7); } } @@ -9372,14 +9372,14 @@ WRITE16_MEMBER( isgsm_state::data_w ) // 8-bit rotation - used by bloxeed switch (m_data_type & 0xe0) { - case 0x00: data = BITSWAP8(data,0,7,6,5,4,3,2,1); break; - case 0x20: data = BITSWAP8(data,7,6,5,4,3,2,1,0); break; - case 0x40: data = BITSWAP8(data,6,5,4,3,2,1,0,7); break; - case 0x60: data = BITSWAP8(data,5,4,3,2,1,0,7,6); break; - case 0x80: data = BITSWAP8(data,4,3,2,1,0,7,6,5); break; - case 0xa0: data = BITSWAP8(data,3,2,1,0,7,6,5,4); break; - case 0xc0: data = BITSWAP8(data,2,1,0,7,6,5,4,3); break; - case 0xe0: data = BITSWAP8(data,1,0,7,6,5,4,3,2); break; + case 0x00: data = bitswap<8>(data,0,7,6,5,4,3,2,1); break; + case 0x20: data = bitswap<8>(data,7,6,5,4,3,2,1,0); break; + case 0x40: data = bitswap<8>(data,6,5,4,3,2,1,0,7); break; + case 0x60: data = bitswap<8>(data,5,4,3,2,1,0,7,6); break; + case 0x80: data = bitswap<8>(data,4,3,2,1,0,7,6,5); break; + case 0xa0: data = bitswap<8>(data,3,2,1,0,7,6,5,4); break; + case 0xc0: data = bitswap<8>(data,2,1,0,7,6,5,4,3); break; + case 0xe0: data = bitswap<8>(data,1,0,7,6,5,4,3,2); break; } } @@ -9455,14 +9455,14 @@ WRITE16_MEMBER( isgsm_state::data_w ) // 8-bit rotation - used by tetris switch (m_data_type & 0xe0) { - case 0x00: byte = BITSWAP8(byte,0,7,6,5,4,3,2,1); break; - case 0x20: byte = BITSWAP8(byte,7,6,5,4,3,2,1,0); break; - case 0x40: byte = BITSWAP8(byte,6,5,4,3,2,1,0,7); break; - case 0x60: byte = BITSWAP8(byte,5,4,3,2,1,0,7,6); break; - case 0x80: byte = BITSWAP8(byte,4,3,2,1,0,7,6,5); break; - case 0xa0: byte = BITSWAP8(byte,3,2,1,0,7,6,5,4); break; - case 0xc0: byte = BITSWAP8(byte,2,1,0,7,6,5,4,3); break; - case 0xe0: byte = BITSWAP8(byte,1,0,7,6,5,4,3,2); break; + case 0x00: byte = bitswap<8>(byte,0,7,6,5,4,3,2,1); break; + case 0x20: byte = bitswap<8>(byte,7,6,5,4,3,2,1,0); break; + case 0x40: byte = bitswap<8>(byte,6,5,4,3,2,1,0,7); break; + case 0x60: byte = bitswap<8>(byte,5,4,3,2,1,0,7,6); break; + case 0x80: byte = bitswap<8>(byte,4,3,2,1,0,7,6,5); break; + case 0xa0: byte = bitswap<8>(byte,3,2,1,0,7,6,5,4); break; + case 0xc0: byte = bitswap<8>(byte,2,1,0,7,6,5,4,3); break; + case 0xe0: byte = bitswap<8>(byte,1,0,7,6,5,4,3,2); break; } } @@ -9510,7 +9510,7 @@ WRITE16_MEMBER( isgsm_state::cart_security_high_w ) uint32_t isgsm_state::shinfz_security(uint32_t input) { - return BITSWAP32(input, 19, 20, 25, 26, 15, 0, 16, 2, 8, 9, 13, 14, 31, 21, 7, 18, 11, 30, 22, 17, 3, 4, 12, 28, 29, 5, 27, 10, 23, 24, 1, 6); + return bitswap<32>(input, 19, 20, 25, 26, 15, 0, 16, 2, 8, 9, 13, 14, 31, 21, 7, 18, 11, 30, 22, 17, 3, 4, 12, 28, 29, 5, 27, 10, 23, 24, 1, 6); } uint32_t isgsm_state::tetrbx_security(uint32_t input) @@ -9734,7 +9734,7 @@ DRIVER_INIT_MEMBER(isgsm_state,isgsm) std::vector temp(0x20000/2); uint16_t *rom = (uint16_t *)memregion("bios")->base(); for (int addr = 0; addr < 0x20000/2; addr++) - temp[addr ^ 0x4127] = BITSWAP16(rom[addr], 6, 14, 4, 2, 12, 10, 8, 0, 1, 9, 11, 13, 3, 5, 7, 15); + temp[addr ^ 0x4127] = bitswap<16>(rom[addr], 6, 14, 4, 2, 12, 10, 8, 0, 1, 9, 11, 13, 3, 5, 7, 15); memcpy(rom, &temp[0], 0x20000); } @@ -9745,7 +9745,7 @@ DRIVER_INIT_MEMBER(isgsm_state,shinfz) std::vector temp(0x200000/2); uint16_t *rom = (uint16_t *)memregion("gamecart_rgn")->base(); for (int addr = 0; addr < 0x200000/2; addr++) - temp[addr ^ 0x68956] = BITSWAP16(rom[addr], 8, 4, 12, 3, 6, 7, 1, 0, 15, 11, 5, 14, 10, 2, 9, 13); + temp[addr ^ 0x68956] = bitswap<16>(rom[addr], 8, 4, 12, 3, 6, 7, 1, 0, 15, 11, 5, 14, 10, 2, 9, 13); memcpy(rom, &temp[0], 0x200000); m_read_xor = 0x66; @@ -9759,7 +9759,7 @@ DRIVER_INIT_MEMBER(isgsm_state,tetrbx) std::vector temp(0x80000/2); uint16_t *rom = (uint16_t *)memregion("gamecart_rgn")->base(); for (int addr = 0; addr < 0x80000/2; addr++) - temp[addr ^ 0x2A6E6] = BITSWAP16(rom[addr], 4, 0, 12, 5, 7, 3, 1, 14, 10, 11, 9, 6, 15, 2, 13, 8); + temp[addr ^ 0x2A6E6] = bitswap<16>(rom[addr], 4, 0, 12, 5, 7, 3, 1, 14, 10, 11, 9, 6, 15, 2, 13, 8); memcpy(rom, &temp[0], 0x80000); m_read_xor = 0x73; diff --git a/src/mame/drivers/segaufo.cpp b/src/mame/drivers/segaufo.cpp index f88c656f852..5d421cc57d2 100644 --- a/src/mame/drivers/segaufo.cpp +++ b/src/mame/drivers/segaufo.cpp @@ -375,7 +375,7 @@ WRITE8_MEMBER(ufo_state::ex_stepper_w) { // stepper motor sequence is: 6 c 9 3 6 c 9 3.. // which means d0 and d3 are swapped when compared with UFO board hardware - stepper_w(space, offset, BITSWAP8(data,4,6,5,7,0,2,1,3)); + stepper_w(space, offset, bitswap<8>(data,4,6,5,7,0,2,1,3)); } WRITE8_MEMBER(ufo_state::ex_cp_lamps_w) diff --git a/src/mame/drivers/seicross.cpp b/src/mame/drivers/seicross.cpp index 9090f174012..a6caf035189 100644 --- a/src/mame/drivers/seicross.cpp +++ b/src/mame/drivers/seicross.cpp @@ -628,7 +628,7 @@ DRIVER_INIT_MEMBER(seicross_state,friskytb) // this code is in ROM 6.3h, maps to MCU at dxxx for (int i = 0; i < 0x7800; i++) { - m_decrypted_opcodes[i] = BITSWAP8(ROM[i], 6, 7, 5, 4, 3, 2, 0, 1); + m_decrypted_opcodes[i] = bitswap<8>(ROM[i], 6, 7, 5, 4, 3, 2, 0, 1); } } diff --git a/src/mame/drivers/selz80.cpp b/src/mame/drivers/selz80.cpp index 2016a75db8e..86443fed04d 100644 --- a/src/mame/drivers/selz80.cpp +++ b/src/mame/drivers/selz80.cpp @@ -185,7 +185,7 @@ WRITE8_MEMBER( selz80_state::scanlines_w ) WRITE8_MEMBER( selz80_state::digit_w ) { - output().set_digit_value(m_digit, BITSWAP8(data, 3, 2, 1, 0, 7, 6, 5, 4)); + output().set_digit_value(m_digit, bitswap<8>(data, 3, 2, 1, 0, 7, 6, 5, 4)); } READ8_MEMBER( selz80_state::kbd_r ) diff --git a/src/mame/drivers/sfbonus.cpp b/src/mame/drivers/sfbonus.cpp index 0ae11cd1b0e..f0f6854c677 100644 --- a/src/mame/drivers/sfbonus.cpp +++ b/src/mame/drivers/sfbonus.cpp @@ -5896,14 +5896,14 @@ void sfbonus_state::sfbonus_bitswap( switch(i & 7) { - case 0: x = BITSWAP8(x^xor0, b00,b01,b02,b03,b04,b05,b06,b07); break; - case 1: x = BITSWAP8(x^xor1, b10,b11,b12,b13,b14,b15,b16,b17); break; - case 2: x = BITSWAP8(x^xor2, b20,b21,b22,b23,b24,b25,b26,b27); break; - case 3: x = BITSWAP8(x^xor3, b30,b31,b32,b33,b34,b35,b36,b37); break; - case 4: x = BITSWAP8(x^xor4, b40,b41,b42,b43,b44,b45,b46,b47); break; - case 5: x = BITSWAP8(x^xor5, b50,b51,b52,b53,b54,b55,b56,b57); break; - case 6: x = BITSWAP8(x^xor6, b60,b61,b62,b63,b64,b65,b66,b67); break; - case 7: x = BITSWAP8(x^xor7, b70,b71,b72,b73,b74,b75,b76,b77); break; + case 0: x = bitswap<8>(x^xor0, b00,b01,b02,b03,b04,b05,b06,b07); break; + case 1: x = bitswap<8>(x^xor1, b10,b11,b12,b13,b14,b15,b16,b17); break; + case 2: x = bitswap<8>(x^xor2, b20,b21,b22,b23,b24,b25,b26,b27); break; + case 3: x = bitswap<8>(x^xor3, b30,b31,b32,b33,b34,b35,b36,b37); break; + case 4: x = bitswap<8>(x^xor4, b40,b41,b42,b43,b44,b45,b46,b47); break; + case 5: x = bitswap<8>(x^xor5, b50,b51,b52,b53,b54,b55,b56,b57); break; + case 6: x = bitswap<8>(x^xor6, b60,b61,b62,b63,b64,b65,b66,b67); break; + case 7: x = bitswap<8>(x^xor7, b70,b71,b72,b73,b74,b75,b76,b77); break; } ROM[i] = x; diff --git a/src/mame/drivers/sfkick.cpp b/src/mame/drivers/sfkick.cpp index 26e12a70051..fda6f6bd190 100644 --- a/src/mame/drivers/sfkick.cpp +++ b/src/mame/drivers/sfkick.cpp @@ -237,7 +237,7 @@ READ8_MEMBER(sfkick_state::ppi_port_b_r) { case 0: return m_in0->read(); case 1: return m_in1->read(); - case 2: return BITSWAP8(m_dial->read(),4,5,6,7,3,2,1,0); + case 2: return bitswap<8>(m_dial->read(),4,5,6,7,3,2,1,0); case 3: return m_dsw1->read(); case 4: return m_dsw2->read(); } diff --git a/src/mame/drivers/simpl156.cpp b/src/mame/drivers/simpl156.cpp index b8229342162..4abff40457a 100644 --- a/src/mame/drivers/simpl156.cpp +++ b/src/mame/drivers/simpl156.cpp @@ -1048,7 +1048,7 @@ DRIVER_INIT_MEMBER(simpl156_state,simpl156) { uint32_t addr; - addr = BITSWAP24 (x,23,22,21,0, 20, + addr = bitswap<24> (x,23,22,21,0, 20, 19,18,17,16, 15,14,13,12, 11,10,9, 8, diff --git a/src/mame/drivers/skimaxx.cpp b/src/mame/drivers/skimaxx.cpp index 3c621dc4329..89cdd79900f 100644 --- a/src/mame/drivers/skimaxx.cpp +++ b/src/mame/drivers/skimaxx.cpp @@ -296,7 +296,7 @@ WRITE32_MEMBER(skimaxx_state::skimaxx_sub_ctrl_w) */ READ32_MEMBER(skimaxx_state::skimaxx_analog_r) { - return BITSWAP8(ioport(offset ? "Y" : "X")->read(), 0,1,2,3,4,5,6,7); + return bitswap<8>(ioport(offset ? "Y" : "X")->read(), 0,1,2,3,4,5,6,7); } /************************************* diff --git a/src/mame/drivers/skyarmy.cpp b/src/mame/drivers/skyarmy.cpp index fa494e4b695..0f73cb76649 100644 --- a/src/mame/drivers/skyarmy.cpp +++ b/src/mame/drivers/skyarmy.cpp @@ -93,7 +93,7 @@ WRITE_LINE_MEMBER(skyarmy_state::flip_screen_y_w) TILE_GET_INFO_MEMBER(skyarmy_state::get_tile_info) { int code = m_videoram[tile_index]; - int attr = BITSWAP8(m_colorram[tile_index], 7, 6, 5, 4, 3, 0, 1, 2) & 7; + int attr = bitswap<8>(m_colorram[tile_index], 7, 6, 5, 4, 3, 0, 1, 2) & 7; SET_TILE_INFO_MEMBER(0, code, attr, 0); } @@ -158,7 +158,7 @@ uint32_t skyarmy_state::screen_update(screen_device &screen, bitmap_ind16 &bitma for (offs = 0 ; offs < 0x40; offs+=4) { - pal = BITSWAP8(m_spriteram[offs+2], 7, 6, 5, 4, 3, 0, 1, 2) & 7; + pal = bitswap<8>(m_spriteram[offs+2], 7, 6, 5, 4, 3, 0, 1, 2) & 7; sx = m_spriteram[offs+3]; sy = 240-(m_spriteram[offs]+1); diff --git a/src/mame/drivers/snesb.cpp b/src/mame/drivers/snesb.cpp index 22957062134..5b5461421cd 100644 --- a/src/mame/drivers/snesb.cpp +++ b/src/mame/drivers/snesb.cpp @@ -745,7 +745,7 @@ DRIVER_INIT_MEMBER(snesb_state,kinstb) for (i = 0; i < 0x400000; i++) { - rom[i] = BITSWAP8(rom[i], 5, 0, 6, 1, 7, 4, 3, 2); + rom[i] = bitswap<8>(rom[i], 5, 0, 6, 1, 7, 4, 3, 2); } m_shared_ram = std::make_unique(0x100); @@ -775,23 +775,23 @@ DRIVER_INIT_MEMBER(snesb_state,ffight2b) if (i < 0x10000) /* 0x00000 - 0x0ffff */ { - rom[i] = BITSWAP8(rom[i],3,1,6,4,7,0,2,5); + rom[i] = bitswap<8>(rom[i],3,1,6,4,7,0,2,5); } else if (i < 0x20000) /* 0x10000 - 0x1ffff */ { - rom[i] = BITSWAP8(rom[i],3,7,0,5,1,6,2,4); + rom[i] = bitswap<8>(rom[i],3,7,0,5,1,6,2,4); } else if (i < 0x30000) /* 0x20000 - 0x2ffff */ { - rom[i] = BITSWAP8(rom[i],1,7,6,4,5,2,3,0); + rom[i] = bitswap<8>(rom[i],1,7,6,4,5,2,3,0); } else if (i < 0x40000) /* 0x30000 - 0x3ffff */ { - rom[i] = BITSWAP8(rom[i],0,3,2,5,4,6,7,1); + rom[i] = bitswap<8>(rom[i],0,3,2,5,4,6,7,1); } else if (i < 0x150000) { - rom[i] = BITSWAP8(rom[i],6,4,0,5,1,3,2,7); + rom[i] = bitswap<8>(rom[i],6,4,0,5,1,3,2,7); } } @@ -816,11 +816,11 @@ DRIVER_INIT_MEMBER(snesb_state,iron) { if(i < 0x80000) { - rom[i] = BITSWAP8(rom[i]^0xff,2,7,1,6,3,0,5,4); + rom[i] = bitswap<8>(rom[i]^0xff,2,7,1,6,3,0,5,4); } else { - rom[i] = BITSWAP8(rom[i],6,3,0,5,1,4,7,2); + rom[i] = bitswap<8>(rom[i],6,3,0,5,1,4,7,2); } } @@ -842,12 +842,12 @@ DRIVER_INIT_MEMBER(snesb_state,denseib) rom[i] = rom[i] ^ 0xff; switch (i >> 16) { - case 0x00: rom[i] = BITSWAP8(rom[i],1,7,0,6,3,4,5,2); break; - case 0x01: rom[i] = BITSWAP8(rom[i],3,4,7,2,0,6,5,1); break; - case 0x02: rom[i] = BITSWAP8(rom[i],5,4,2,1,7,0,6,3); break; - case 0x03: rom[i] = BITSWAP8(rom[i],0,1,3,7,2,6,5,4); break; + case 0x00: rom[i] = bitswap<8>(rom[i],1,7,0,6,3,4,5,2); break; + case 0x01: rom[i] = bitswap<8>(rom[i],3,4,7,2,0,6,5,1); break; + case 0x02: rom[i] = bitswap<8>(rom[i],5,4,2,1,7,0,6,3); break; + case 0x03: rom[i] = bitswap<8>(rom[i],0,1,3,7,2,6,5,4); break; - default: rom[i] = BITSWAP8(rom[i],4,5,1,0,2,3,7,6); break; + default: rom[i] = bitswap<8>(rom[i],4,5,1,0,2,3,7,6); break; } } @@ -872,15 +872,15 @@ DRIVER_INIT_MEMBER(snesb_state,legendsb) u8 val = rom[i] ^ 0xff; if (i < 0x10000) - rom[i] = BITSWAP8(val,6,5,4,2,1,0,3,7); // 0x00000 - 0x0ffff + rom[i] = bitswap<8>(val,6,5,4,2,1,0,3,7); // 0x00000 - 0x0ffff else if (i < 0x20000) - rom[i] = BITSWAP8(val,6,1,3,5,2,0,7,4); // 0x10000 - 0x1ffff + rom[i] = bitswap<8>(val,6,1,3,5,2,0,7,4); // 0x10000 - 0x1ffff else if (i < 0x30000) - rom[i] = BITSWAP8(val,2,6,3,0,4,5,7,1); // 0x20000 - 0x2ffff + rom[i] = bitswap<8>(val,2,6,3,0,4,5,7,1); // 0x20000 - 0x2ffff else if (i < 0x40000) - rom[i] = BITSWAP8(val,5,4,2,7,0,3,6,1); // 0x30000 - 0x3ffff + rom[i] = bitswap<8>(val,5,4,2,7,0,3,6,1); // 0x30000 - 0x3ffff else - rom[i] = BITSWAP8(val,3,6,0,5,1,4,7,2); // 0x40000 - 0xfffff + rom[i] = bitswap<8>(val,3,6,0,5,1,4,7,2); // 0x40000 - 0xfffff } // boot vector @@ -926,19 +926,19 @@ DRIVER_INIT_MEMBER(snesb_state,sblast2b) if (newAddress < 0x10000) { - plainText = BITSWAP8(plainText, 6,3,5,4,2,0,7,1) ^ 0xff; + plainText = bitswap<8>(plainText, 6,3,5,4,2,0,7,1) ^ 0xff; } else if (newAddress < 0x20000) { - plainText = BITSWAP8(plainText, 4,0,7,6,3,1,2,5) ^ 0xff; + plainText = bitswap<8>(plainText, 4,0,7,6,3,1,2,5) ^ 0xff; } else if (newAddress < 0x30000) { - plainText = BITSWAP8(plainText, 5,7,6,1,4,3,0,2); + plainText = bitswap<8>(plainText, 5,7,6,1,4,3,0,2); } else if (newAddress < 0x40000) { - plainText = BITSWAP8(plainText, 3,1,2,0,5,6,4,7) ^ 0xff; + plainText = bitswap<8>(plainText, 3,1,2,0,5,6,4,7) ^ 0xff; } dst[newAddress] = plainText; } @@ -996,19 +996,19 @@ DRIVER_INIT_MEMBER(snesb_state,endless) dst[i] = data_high[src[j]>>4] | data_low[src[j]&0xf]; if (i >= 0x00000 && i < 0x10000) { - dst[i] = BITSWAP8(dst[i],2,3,4,1,7,0,6,5); + dst[i] = bitswap<8>(dst[i],2,3,4,1,7,0,6,5); } if (i >= 0x10000 && i < 0x20000) { - dst[i] = BITSWAP8(dst[i],1,5,6,0,2,4,7,3) ^ 0xff; + dst[i] = bitswap<8>(dst[i],1,5,6,0,2,4,7,3) ^ 0xff; } if (i >= 0x20000 && i < 0x30000) { - dst[i] = BITSWAP8(dst[i],3,0,1,6,4,5,2,7); + dst[i] = bitswap<8>(dst[i],3,0,1,6,4,5,2,7); } if (i >= 0x30000 && i < 0x40000) { - dst[i] = BITSWAP8(dst[i],0,4,2,3,5,6,7,1) ^ 0xff; + dst[i] = bitswap<8>(dst[i],0,4,2,3,5,6,7,1) ^ 0xff; } } diff --git a/src/mame/drivers/snookr10.cpp b/src/mame/drivers/snookr10.cpp index 64a44c3dc01..44e618fef70 100644 --- a/src/mame/drivers/snookr10.cpp +++ b/src/mame/drivers/snookr10.cpp @@ -209,7 +209,7 @@ digit #3 +-------+ swapped digits 1 & 2 | | +-------+------+ - tile_offset = BITSWAP16((tile_offset & 0xfff),15,14,13,12, 8,9,10,11, 0,1,2,3, 4,5,6,7) + tile_offset = bitswap<16>((tile_offset & 0xfff),15,14,13,12, 8,9,10,11, 0,1,2,3, 4,5,6,7) | | | | | | | | || | | | inverted inverted|inverted bitorder bitorder|bitorder @@ -243,7 +243,7 @@ 1st nibble inverted bitorder | | | | - color_index = BITSWAP8(color_index,4,5,6,7,2,3,0,1) + color_index = bitswap<8>(color_index,4,5,6,7,2,3,0,1) <-> <-> 2nd nibble swappeed pairs @@ -437,7 +437,7 @@ So, the algorithm to properly decrypt the color codes is the following one: - color_index = BITSWAP8(color_index,7,5,6,4,3,2,1,0) + color_index = bitswap<8>(color_index,7,5,6,4,3,2,1,0) | | swapped diff --git a/src/mame/drivers/snowbros.cpp b/src/mame/drivers/snowbros.cpp index e5e65171cbb..464800fad8f 100644 --- a/src/mame/drivers/snowbros.cpp +++ b/src/mame/drivers/snowbros.cpp @@ -2782,7 +2782,7 @@ DRIVER_INIT_MEMBER(snowbros_state,4in1boot) std::vector buffer(len); int i; for (i = 0;i < len; i++) - if (i&1) buffer[i] = BITSWAP8(src[i],6,7,5,4,3,2,1,0); + if (i&1) buffer[i] = bitswap<8>(src[i],6,7,5,4,3,2,1,0); else buffer[i] = src[i]; memcpy(src,&buffer[0],len); @@ -2812,7 +2812,7 @@ DRIVER_INIT_MEMBER(snowbros_state,snowbro3) std::vector buffer(len); int i; for (i = 0;i < len; i++) - buffer[i] = src[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,3,4,1,2,0)]; + buffer[i] = src[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,3,4,1,2,0)]; memcpy(src,&buffer[0],len); } @@ -2856,7 +2856,7 @@ DRIVER_INIT_MEMBER(snowbros_state,toto) for (int i = 0; i < len; i++) { - src[i] = BITSWAP8(src[i], 7, 6, 5, 3, 4, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 6, 5, 3, 4, 2, 1, 0); } src = memregion("gfx1")->base(); @@ -2864,7 +2864,7 @@ DRIVER_INIT_MEMBER(snowbros_state,toto) for (int i = 0; i < len; i++) { - src[i] = BITSWAP8(src[i], 7, 6, 5, 3, 4, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 6, 5, 3, 4, 2, 1, 0); } src = memregion("soundcpu")->base(); @@ -2872,7 +2872,7 @@ DRIVER_INIT_MEMBER(snowbros_state,toto) for (int i = 0; i < len; i++) { - src[i] = BITSWAP8(src[i], 7, 6, 5, 3, 4, 2, 1, 0); + src[i] = bitswap<8>(src[i], 7, 6, 5, 3, 4, 2, 1, 0); } // protection? (just return 0x07) diff --git a/src/mame/drivers/sothello.cpp b/src/mame/drivers/sothello.cpp index 33b5b2e3af4..28d1e676f80 100644 --- a/src/mame/drivers/sothello.cpp +++ b/src/mame/drivers/sothello.cpp @@ -193,7 +193,7 @@ WRITE8_MEMBER(sothello_state::msm_cfg_w) bit 2 = S2 1 bit 3 = S1 2 */ - m_msm->playmode_w(BITSWAP8((data>>1), 7,6,5,4,3,0,1,2)); + m_msm->playmode_w(bitswap<8>((data>>1), 7,6,5,4,3,0,1,2)); m_msm->reset_w(data & 1); } diff --git a/src/mame/drivers/speedbal.cpp b/src/mame/drivers/speedbal.cpp index cc4d2c493ae..c20cfe8dbac 100644 --- a/src/mame/drivers/speedbal.cpp +++ b/src/mame/drivers/speedbal.cpp @@ -301,7 +301,7 @@ DRIVER_INIT_MEMBER(speedbal_state,speedbal) for (int i=0;i<0x200;i++) { - int j = BITSWAP16(i, 15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7); + int j = bitswap<16>(i, 15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7); memcpy(&temp[i*128], rom+j*128, 128); } @@ -380,7 +380,7 @@ DRIVER_INIT_MEMBER(speedbal_state,musicbal) int bswIdx = xorMask & 3; // ... and the bitswap // only bits #0, #1, #2 & #7 are affected - rom[i] = BITSWAP8(rom[i], swapTable[bswIdx][3], 6,5,4,3, swapTable[bswIdx][2], swapTable[bswIdx][1], swapTable[bswIdx][0]) ^ xorTable[addIdx]; + rom[i] = bitswap<8>(rom[i], swapTable[bswIdx][3], 6,5,4,3, swapTable[bswIdx][2], swapTable[bswIdx][1], swapTable[bswIdx][0]) ^ xorTable[addIdx]; } DRIVER_INIT_CALL(speedbal); diff --git a/src/mame/drivers/sshangha.cpp b/src/mame/drivers/sshangha.cpp index cf3769b8aa9..82079a606b6 100644 --- a/src/mame/drivers/sshangha.cpp +++ b/src/mame/drivers/sshangha.cpp @@ -136,7 +136,7 @@ WRITE16_MEMBER(sshangha_state::paletteram16_xbgr_word_be_tilehigh_w) READ16_MEMBER( sshangha_state::sshangha_protection_region_d_146_r ) { int real_address = 0x3f4000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -145,7 +145,7 @@ READ16_MEMBER( sshangha_state::sshangha_protection_region_d_146_r ) WRITE16_MEMBER( sshangha_state::sshangha_protection_region_d_146_w ) { int real_address = 0x3f4000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } @@ -153,7 +153,7 @@ WRITE16_MEMBER( sshangha_state::sshangha_protection_region_d_146_w ) READ16_MEMBER( sshangha_state::sshangha_protection_region_8_146_r ) { int real_address = 0x3e0000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; uint16_t data = m_deco146->read_data( deco146_addr, mem_mask, cs ); return data; @@ -162,7 +162,7 @@ READ16_MEMBER( sshangha_state::sshangha_protection_region_8_146_r ) WRITE16_MEMBER( sshangha_state::sshangha_protection_region_8_146_w ) { int real_address = 0x3e0000 + (offset *2); - int deco146_addr = BITSWAP32(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; + int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff; uint8_t cs = 0; m_deco146->write_data( space, deco146_addr, data, mem_mask, cs ); } diff --git a/src/mame/drivers/statriv2.cpp b/src/mame/drivers/statriv2.cpp index 01d9fb118a3..fb8ac5c9188 100644 --- a/src/mame/drivers/statriv2.cpp +++ b/src/mame/drivers/statriv2.cpp @@ -1576,7 +1576,7 @@ DRIVER_INIT_MEMBER(statriv2_state, addr_lmhe) uint32_t address; for (address = 0; address < length; address++) - qrom[address] ^= BITSWAP8(address, 4,3,3,2,2,1,1,0); + qrom[address] ^= bitswap<8>(address, 4,3,3,2,2,1,1,0); DRIVER_INIT_CALL(addr_lmh); } diff --git a/src/mame/drivers/stv.cpp b/src/mame/drivers/stv.cpp index 192cbb18320..5d779197bd4 100644 --- a/src/mame/drivers/stv.cpp +++ b/src/mame/drivers/stv.cpp @@ -172,7 +172,7 @@ READ8_MEMBER(stv_state::critcrsh_ioga_r) case 0x01: case 0x03: res = ioport(lgnames[offset >> 1])->read(); - res = BITSWAP8(res, 2, 3, 0, 1, 6, 7, 5, 4) & 0xf3; + res = bitswap<8>(res, 2, 3, 0, 1, 6, 7, 5, 4) & 0xf3; res |= (ioport("PORTC")->read() & 0x10) ? 0x0 : 0x4; // x/y hit latch actually break; default: res = stv_ioga_r(space,offset); break; @@ -1897,11 +1897,11 @@ DRIVER_INIT_MEMBER(stv_state,sanjeon) { src[x] = src[x]^0xff; - src[x] = BITSWAP8(src[x],7,2,5,1, 3,6,4,0); - src[x] = BITSWAP8(src[x],4,6,5,7, 3,2,1,0); - src[x] = BITSWAP8(src[x],7,6,5,4, 2,3,1,0); - src[x] = BITSWAP8(src[x],7,0,5,4, 3,2,1,6); - src[x] = BITSWAP8(src[x],3,6,5,4, 7,2,1,0); + src[x] = bitswap<8>(src[x],7,2,5,1, 3,6,4,0); + src[x] = bitswap<8>(src[x],4,6,5,7, 3,2,1,0); + src[x] = bitswap<8>(src[x],7,6,5,4, 2,3,1,0); + src[x] = bitswap<8>(src[x],7,0,5,4, 3,2,1,6); + src[x] = bitswap<8>(src[x],3,6,5,4, 7,2,1,0); } diff --git a/src/mame/drivers/suna8.cpp b/src/mame/drivers/suna8.cpp index 3652152451e..0d580f9f19e 100644 --- a/src/mame/drivers/suna8.cpp +++ b/src/mame/drivers/suna8.cpp @@ -76,7 +76,7 @@ DRIVER_INIT_MEMBER(suna8_state,hardhead) int table = ((i & 0x0c00) >> 10) | ((i & 0x4000) >> 12); if (swaptable[table]) - rom[i] = BITSWAP8(rom[i], 7,6,5,3,4,2,1,0) ^ 0x58; + rom[i] = bitswap<8>(rom[i], 7,6,5,3,4,2,1,0) ^ 0x58; } m_bank0d->set_base(memregion("maincpu")->base()); @@ -118,15 +118,15 @@ uint8_t *suna8_state::brickzn_decrypt() if (data_swap) { - x = BITSWAP8(x, 7,6,5,4,3,2,0,1); - RAM[i] = BITSWAP8(x, 7,2,3,4,5,6,1,0) ^ 0x10; + x = bitswap<8>(x, 7,6,5,4,3,2,0,1); + RAM[i] = bitswap<8>(x, 7,2,3,4,5,6,1,0) ^ 0x10; } if (opcode_swap) x ^= 0x80; if (opcode_swap || data_swap) - x = BITSWAP8(x, 7,2,3,4,5,6,1,0) ^ 0x10; + x = bitswap<8>(x, 7,2,3,4,5,6,1,0) ^ 0x10; decrypt[i] = x; @@ -255,7 +255,7 @@ rom13: 0?, 1y, 2n, 3n ?,?,?,? (palettes) int addr = i; if (swaptable[(i & 0xff000) >> 12]) - addr = (addr & 0xf0000) | BITSWAP16(addr, 15,14,13,12,11,10,9,8,6,7,5,4,3,2,1,0); + addr = (addr & 0xf0000) | bitswap<16>(addr, 15,14,13,12,11,10,9,8,6,7,5,4,3,2,1,0); RAM[i] = decrypt[addr]; } @@ -277,9 +277,9 @@ rom13: 0?, 1y, 2n, 3n ?,?,?,? (palettes) x = RAM[i]; - x = BITSWAP8(x, 7,6,5,3,4,2,1,0) ^ 0x41 ^ xortable[table]; + x = bitswap<8>(x, 7,6,5,3,4,2,1,0) ^ 0x41 ^ xortable[table]; if (swaptable[table]) - x = BITSWAP8(x, 5,6,7,4,3,2,1,0); + x = bitswap<8>(x, 5,6,7,4,3,2,1,0); decrypt[i] = x; } @@ -290,7 +290,7 @@ rom13: 0?, 1y, 2n, 3n ?,?,?,? (palettes) static const uint8_t swaptable[8] = { 1,1,0,1,0,1,1,0 }; if (swaptable[(i & 0x7000) >> 12]) - RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x41; + RAM[i] = bitswap<8>(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x41; } m_bank1->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x4000); @@ -335,7 +335,7 @@ DRIVER_INIT_MEMBER(suna8_state,starfigh) int addr = i; if (swaptable[(i & 0xff000) >> 12]) - addr = BITSWAP24(addr, 23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,6,7,5,4,3,2,1,0); + addr = bitswap<24>(addr, 23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,6,7,5,4,3,2,1,0); RAM[i] = decrypt[addr]; } @@ -357,9 +357,9 @@ DRIVER_INIT_MEMBER(suna8_state,starfigh) x = RAM[i]; - x = BITSWAP8(x, 5,6,7,3,4,2,1,0) ^ 0x45 ^ xortable[table]; + x = bitswap<8>(x, 5,6,7,3,4,2,1,0) ^ 0x45 ^ xortable[table]; if (swaptable[table]) - x = BITSWAP8(x, 5,6,7,4,3,2,1,0) ^ 0x04; + x = bitswap<8>(x, 5,6,7,4,3,2,1,0) ^ 0x04; decrypt[i] = x; } @@ -370,7 +370,7 @@ DRIVER_INIT_MEMBER(suna8_state,starfigh) static const uint8_t swaptable[8] = { 1,1,0,1,0,1,1,0 }; if (swaptable[(i & 0x7000) >> 12]) - RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x45; + RAM[i] = bitswap<8>(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x45; } @@ -420,7 +420,7 @@ DRIVER_INIT_MEMBER(suna8_state,sparkman) int addr = i; if (swaptable[(i & 0xff000) >> 12]) - addr = BITSWAP24(addr, 23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,7,8,6,5,4,3,2,1,0); + addr = bitswap<24>(addr, 23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,7,8,6,5,4,3,2,1,0); RAM[i] = decrypt[addr]; } @@ -442,9 +442,9 @@ DRIVER_INIT_MEMBER(suna8_state,sparkman) x = RAM[i]; - x = BITSWAP8(x, 5,6,7,3,4,2,1,0) ^ 0x44 ^ xortable[table]; + x = bitswap<8>(x, 5,6,7,3,4,2,1,0) ^ 0x44 ^ xortable[table]; if (swaptable[table]) - x = BITSWAP8(x, 5,6,7,4,3,2,1,0) ^ 0x04; + x = bitswap<8>(x, 5,6,7,4,3,2,1,0) ^ 0x04; decrypt[i] = x; } @@ -455,7 +455,7 @@ DRIVER_INIT_MEMBER(suna8_state,sparkman) static const uint8_t swaptable[8] = { 1,1,1,0,1,1,0,1 }; if (swaptable[(i & 0x7000) >> 12]) - RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x44; + RAM[i] = bitswap<8>(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x44; } // !!!!!! PATCHES !!!!!! @@ -785,7 +785,7 @@ WRITE8_MEMBER(suna8_state::brickzn_multi_w) 56 coin in OK? 70 monster hit NO? 58? */ - uint8_t remap = (m_remap_sound ? BITSWAP8(data, 7,6,3,4,5,2,1,0) : data); + uint8_t remap = (m_remap_sound ? bitswap<8>(data, 7,6,3,4,5,2,1,0) : data); m_soundlatch->write(space, 0, remap); diff --git a/src/mame/drivers/superqix.cpp b/src/mame/drivers/superqix.cpp index 68e2598cbd3..3808243b2d8 100644 --- a/src/mame/drivers/superqix.cpp +++ b/src/mame/drivers/superqix.cpp @@ -423,7 +423,7 @@ READ8_MEMBER(superqix_state_base::nmi_ack_r) READ8_MEMBER(superqix_state::bootleg_in0_r) { - return BITSWAP8(ioport("DSW1")->read(), 0,1,2,3,4,5,6,7); + return bitswap<8>(ioport("DSW1")->read(), 0,1,2,3,4,5,6,7); } WRITE8_MEMBER(superqix_state::bootleg_flipscreen_w) @@ -1727,7 +1727,7 @@ DRIVER_INIT_MEMBER(superqix_state_base, perestro) memcpy(temp,&src[i],16); for (j = 0;j < 16;j++) { - src[i+j] = temp[BITSWAP8(j,7,6,5,4,3,2,0,1)]; + src[i+j] = temp[bitswap<8>(j,7,6,5,4,3,2,0,1)]; } } @@ -1738,7 +1738,7 @@ DRIVER_INIT_MEMBER(superqix_state_base, perestro) memcpy(temp,&src[i],16); for (j = 0;j < 16;j++) { - src[i+j] = temp[BITSWAP8(j,7,6,5,4,0,1,2,3)]; + src[i+j] = temp[bitswap<8>(j,7,6,5,4,0,1,2,3)]; } } @@ -1749,7 +1749,7 @@ DRIVER_INIT_MEMBER(superqix_state_base, perestro) memcpy(temp,&src[i],16); for (j = 0;j < 16;j++) { - src[i+j] = temp[BITSWAP8(j,7,6,5,4,1,0,3,2)]; + src[i+j] = temp[bitswap<8>(j,7,6,5,4,1,0,3,2)]; } } } diff --git a/src/mame/drivers/supertnk.cpp b/src/mame/drivers/supertnk.cpp index 729b9d52a32..f1bb64dda51 100644 --- a/src/mame/drivers/supertnk.cpp +++ b/src/mame/drivers/supertnk.cpp @@ -489,7 +489,7 @@ DRIVER_INIT_MEMBER(supertnk_state,supertnk) for (offs = 0; offs < len; offs++) { - rom[offs] = BITSWAP8(rom[offs],0,1,2,3,4,5,6,7); + rom[offs] = bitswap<8>(rom[offs],0,1,2,3,4,5,6,7); } } diff --git a/src/mame/drivers/supracan.cpp b/src/mame/drivers/supracan.cpp index 99014c2c1ab..8d33114b3be 100644 --- a/src/mame/drivers/supracan.cpp +++ b/src/mame/drivers/supracan.cpp @@ -1093,7 +1093,7 @@ WRITE16_MEMBER( supracan_state::supracan_pram_w ) // swap address around so that 64x64 tile can be decoded as 8x8 tiles.. void supracan_state::write_swapped_byte( int offset, uint8_t byte ) { - int swapped_offset = BITSWAP32(offset, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,2,1,0,6,5,4,3); + int swapped_offset = bitswap<32>(offset, 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,2,1,0,6,5,4,3); m_vram_addr_swapped[swapped_offset] = byte; } diff --git a/src/mame/drivers/system16.cpp b/src/mame/drivers/system16.cpp index 61320395e2d..a28dfe8717a 100644 --- a/src/mame/drivers/system16.cpp +++ b/src/mame/drivers/system16.cpp @@ -3947,7 +3947,7 @@ DRIVER_INIT_MEMBER(segas1x_bootleg_state,beautyb) { rom[x] = rom[x] ^ 0x2400; - if (x & 8) rom[x] = BITSWAP16(rom[x],15,14,10,12, 11,13,9,8, + if (x & 8) rom[x] = bitswap<16>(rom[x],15,14,10,12, 11,13,9,8, 7,6,5,4, 3,2,1,0 ); } diff --git a/src/mame/drivers/taito_l.cpp b/src/mame/drivers/taito_l.cpp index 526f35a2b6b..c8a92b41c96 100644 --- a/src/mame/drivers/taito_l.cpp +++ b/src/mame/drivers/taito_l.cpp @@ -2443,7 +2443,7 @@ DRIVER_INIT_MEMBER(taitol_1cpu_state, plottinga) { u8 tab[256]; for (unsigned i = 0; i < sizeof(tab); i++) - tab[i] = BITSWAP8(i, 0, 1, 2, 3, 4, 5, 6, 7); + tab[i] = bitswap<8>(i, 0, 1, 2, 3, 4, 5, 6, 7); for (unsigned i = 0; i < m_main_prg.length(); i++) m_main_prg[i] = tab[m_main_prg[i]]; diff --git a/src/mame/drivers/tcl.cpp b/src/mame/drivers/tcl.cpp index e97a409d942..d0fed6c6e3a 100644 --- a/src/mame/drivers/tcl.cpp +++ b/src/mame/drivers/tcl.cpp @@ -166,7 +166,7 @@ ROM_START( tcl ) ROM_LOAD( "tcl_pr3.9e", 0x200, 0x100, CRC(50ec383b) SHA1(ae95b92bd3946b40134bcdc22708d5c6b0f4c23e) ) ROM_END -#define ROL(x,n) (BITSWAP8((x),(7+8-n)&7,(6+8-n)&7,(5+8-n)&7,(4+8-n)&7,(3+8-n)&7,(2+8-n)&7,(1+8-n)&7,(0+8-n)&7)) +#define ROL(x,n) (bitswap<8>((x),(7+8-n)&7,(6+8-n)&7,(5+8-n)&7,(4+8-n)&7,(3+8-n)&7,(2+8-n)&7,(1+8-n)&7,(0+8-n)&7)) #define WRITEDEST( n ) \ dest[idx]=n; \ diff --git a/src/mame/drivers/tec1.cpp b/src/mame/drivers/tec1.cpp index 1425c2b85db..2a914bd4f1d 100644 --- a/src/mame/drivers/tec1.cpp +++ b/src/mame/drivers/tec1.cpp @@ -145,7 +145,7 @@ WRITE8_MEMBER( tec1_state::tec1_segment_w ) d1 segment f d0 segment a */ - m_segment = BITSWAP8(data, 4, 2, 1, 6, 7, 5, 3, 0); + m_segment = bitswap<8>(data, 4, 2, 1, 6, 7, 5, 3, 0); } WRITE8_MEMBER( tec1_state::tec1_digit_w ) diff --git a/src/mame/drivers/techno.cpp b/src/mame/drivers/techno.cpp index eba5c5ef94b..e2b245a6cfd 100644 --- a/src/mame/drivers/techno.cpp +++ b/src/mame/drivers/techno.cpp @@ -90,12 +90,12 @@ ADDRESS_MAP_END WRITE16_MEMBER( techno_state::disp1_w ) { - output().set_digit_value(m_digit, BITSWAP16(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_digit, bitswap<16>(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0)); } WRITE16_MEMBER( techno_state::disp2_w ) { - output().set_digit_value(m_digit+30, BITSWAP16(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(m_digit+30, bitswap<16>(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0)); } WRITE16_MEMBER( techno_state::sound_w ) diff --git a/src/mame/drivers/ticalc1x.cpp b/src/mame/drivers/ticalc1x.cpp index 5e058597450..00b78aaee1b 100644 --- a/src/mame/drivers/ticalc1x.cpp +++ b/src/mame/drivers/ticalc1x.cpp @@ -98,7 +98,7 @@ WRITE16_MEMBER(cmulti8_state::write_r) WRITE16_MEMBER(cmulti8_state::write_o) { // O0-O7: digit segments - m_o = BITSWAP8(data,0,4,5,6,7,1,2,3); + m_o = bitswap<8>(data,0,4,5,6,7,1,2,3); prepare_display(); } @@ -719,7 +719,7 @@ WRITE16_MEMBER(ti1000_state::write_o) // O0-O3,O5(?): input mux // O0-O7: digit segments m_inp_mux = (data & 0xf) | (data >> 1 & 0x10); - m_o = BITSWAP8(data,7,4,3,2,1,0,6,5); + m_o = bitswap<8>(data,7,4,3,2,1,0,6,5); } READ8_MEMBER(ti1000_state::read_k) @@ -984,7 +984,7 @@ public: WRITE16_MEMBER(lilprof78_state::write_r) { // update leds state - u8 seg = BITSWAP8(m_o,7,4,3,2,1,0,6,5) & 0x7f; + u8 seg = bitswap<8>(m_o,7,4,3,2,1,0,6,5) & 0x7f; u16 r = (data & 7) | (data << 1 & 0x1f0); set_display_segmask(0x1ff, 0x7f); display_matrix(7, 9, seg, r, false); @@ -993,7 +993,7 @@ WRITE16_MEMBER(lilprof78_state::write_r) m_display_state[3] = (r != 0 && m_o & 0x80) ? 0x41 : 0; // 6th digit is a custom 7seg for math symbols (see wizatron_state write_r) - m_display_state[6] = BITSWAP8(m_display_state[6],7,6,1,4,2,3,5,0); + m_display_state[6] = bitswap<8>(m_display_state[6],7,6,1,4,2,3,5,0); display_update(); } @@ -1108,7 +1108,7 @@ WRITE16_MEMBER(dataman_state::write_r) WRITE16_MEMBER(dataman_state::write_o) { // O0-O6: digit segments A-G - m_o = BITSWAP8(data,7,1,6,5,4,3,2,0) & 0x7f; + m_o = bitswap<8>(data,7,1,6,5,4,3,2,0) & 0x7f; prepare_display(); } @@ -1297,7 +1297,7 @@ WRITE16_MEMBER(ti30_state::write_o) // O0-O2,O4-O7: input mux // O0-O7: digit segments m_inp_mux = (data & 7) | (data >> 1 & 0x78); - m_o = BITSWAP8(data,7,5,2,1,4,0,6,3); + m_o = bitswap<8>(data,7,5,2,1,4,0,6,3); } READ8_MEMBER(ti30_state::read_k) diff --git a/src/mame/drivers/tispeak.cpp b/src/mame/drivers/tispeak.cpp index 3fc841eabe3..f71601cbfdb 100644 --- a/src/mame/drivers/tispeak.cpp +++ b/src/mame/drivers/tispeak.cpp @@ -585,7 +585,7 @@ WRITE16_MEMBER(tispeak_state::snspell_write_o) // reorder opla to led14seg, plus DP as d14 and AP as d15: // note: lantutor and snread VFD has an accent triangle instead of DP, and no AP // E,D,C,G,B,A,I,M,L,K,N,J,[AP],H,F,[DP] (sidenote: TI KLMN = MAME MLNK) - m_plate = BITSWAP16(data,12,15,10,7,8,9,11,6,13,3,14,0,1,2,4,5); + m_plate = bitswap<16>(data,12,15,10,7,8,9,11,6,13,3,14,0,1,2,4,5); prepare_display(); } @@ -602,7 +602,7 @@ WRITE16_MEMBER(tispeak_state::snmath_write_o) { // reorder opla to led14seg, plus DP as d14 and CT as d15: // [DP],D,C,H,F,B,I,M,L,K,N,J,[CT],E,G,A (sidenote: TI KLMN = MAME MLNK) - m_plate = BITSWAP16(data,12,0,10,7,8,9,11,6,3,14,4,13,1,2,5,15); + m_plate = bitswap<16>(data,12,0,10,7,8,9,11,6,3,14,4,13,1,2,5,15); prepare_display(); } @@ -636,7 +636,7 @@ WRITE16_MEMBER(tispeak_state::snspellc_write_r) WRITE16_MEMBER(tispeak_state::snspellc_write_o) { // O3210: TMS5100 CTL8124 - m_o = BITSWAP8(data,7,6,5,4,3,0,1,2); + m_o = bitswap<8>(data,7,6,5,4,3,0,1,2); m_tms5100->ctl_w(space, 0, m_o & 0xf); } @@ -689,7 +689,7 @@ void tispeak_state::k28_prepare_display(u8 old, u8 data) WRITE16_MEMBER(tispeak_state::k28_write_r) { // R1234: TMS5100 CTL8421 - m_tms5100->ctl_w(space, 0, BITSWAP8(data,0,0,0,0,1,2,3,4) & 0xf); + m_tms5100->ctl_w(space, 0, bitswap<8>(data,0,0,0,0,1,2,3,4) & 0xf); // R0: TMS5100 PDC pin m_tms5100->pdc_w(data & 1); diff --git a/src/mame/drivers/tispellb.cpp b/src/mame/drivers/tispellb.cpp index a34da8e9603..b2eca5f3cd4 100644 --- a/src/mame/drivers/tispellb.cpp +++ b/src/mame/drivers/tispellb.cpp @@ -150,7 +150,7 @@ void tispellb_state::prepare_display() WRITE16_MEMBER(tispellb_state::main_write_o) { // reorder opla to led14seg, plus DP as d14 and AP as d15, same as snspell - m_plate = BITSWAP16(data,12,15,10,7,8,9,11,6,13,3,14,0,1,2,4,5); + m_plate = bitswap<16>(data,12,15,10,7,8,9,11,6,13,3,14,0,1,2,4,5); prepare_display(); } @@ -199,7 +199,7 @@ WRITE16_MEMBER(tispellb_state::sub_write_o) READ8_MEMBER(tispellb_state::rev1_ctl_r) { // main CTL3210 <- sub O6043 - return BITSWAP8(m_sub_o,7,5,2,1,6,0,4,3) & 0xf; + return bitswap<8>(m_sub_o,7,5,2,1,6,0,4,3) & 0xf; } WRITE16_MEMBER(tispellb_state::sub_write_r) diff --git a/src/mame/drivers/tmnt.cpp b/src/mame/drivers/tmnt.cpp index e351f646682..282073276e3 100644 --- a/src/mame/drivers/tmnt.cpp +++ b/src/mame/drivers/tmnt.cpp @@ -4098,7 +4098,7 @@ static void chunky_to_planar(memory_region *rgn) for (int i = 0; i < len; i++) { uint32_t data = little_endianize_int32(ROM[i]); - data = BITSWAP32(data,31,27,23,19,15,11,7,3,30,26,22,18,14,10,6,2,29,25,21,17,13,9,5,1,28,24,20,16,12,8,4,0); + data = bitswap<32>(data,31,27,23,19,15,11,7,3,30,26,22,18,14,10,6,2,29,25,21,17,13,9,5,1,28,24,20,16,12,8,4,0); ROM[i] = little_endianize_int32(data); } } @@ -4120,9 +4120,9 @@ DRIVER_INIT_MEMBER(tmnt_state, mia) int B = A & 0x3ff00; if ((A & 0x3c000) == 0x3c000) - B |= BITSWAP8(A,7,6,4,2,1,0,5,3); + B |= bitswap<8>(A,7,6,4,2,1,0,5,3); else - B |= BITSWAP8(A,6,4,2,1,0,7,5,3); + B |= bitswap<8>(A,6,4,2,1,0,7,5,3); gfxdata[A] = temp[B]; } diff --git a/src/mame/drivers/toaplan2.cpp b/src/mame/drivers/toaplan2.cpp index 85c9dcb81b9..11128be90ef 100644 --- a/src/mame/drivers/toaplan2.cpp +++ b/src/mame/drivers/toaplan2.cpp @@ -473,10 +473,10 @@ DRIVER_INIT_MEMBER(toaplan2_state,pipibibsbl) for (int i = 0; i < (0x040000/2); i += 4) { - ROM[i+0] = BITSWAP16(ROM[i+0],0x1,0x5,0x6,0x7,0x8,0x2,0x0,0x9,0xe,0xd,0x4,0x3,0xf,0xa,0xb,0xc); - ROM[i+1] = BITSWAP16(ROM[i+1],0x5,0x3,0x1,0xf,0xd,0xb,0x9,0x0,0x2,0x4,0x6,0x8,0xa,0xc,0xe,0x7); - ROM[i+2] = BITSWAP16(ROM[i+2],0xc,0xd,0xe,0xf,0x8,0x9,0xa,0xb,0x3,0x2,0x1,0x0,0x7,0x6,0x5,0x4); - ROM[i+3] = BITSWAP16(ROM[i+3],0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf,0x3,0x2,0x1,0x0,0x7,0x6,0x5,0x4); + ROM[i+0] = bitswap<16>(ROM[i+0],0x1,0x5,0x6,0x7,0x8,0x2,0x0,0x9,0xe,0xd,0x4,0x3,0xf,0xa,0xb,0xc); + ROM[i+1] = bitswap<16>(ROM[i+1],0x5,0x3,0x1,0xf,0xd,0xb,0x9,0x0,0x2,0x4,0x6,0x8,0xa,0xc,0xe,0x7); + ROM[i+2] = bitswap<16>(ROM[i+2],0xc,0xd,0xe,0xf,0x8,0x9,0xa,0xb,0x3,0x2,0x1,0x0,0x7,0x6,0x5,0x4); + ROM[i+3] = bitswap<16>(ROM[i+3],0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf,0x3,0x2,0x1,0x0,0x7,0x6,0x5,0x4); } } diff --git a/src/mame/drivers/toki.cpp b/src/mame/drivers/toki.cpp index 31e6ccd013c..5d82724f2e3 100644 --- a/src/mame/drivers/toki.cpp +++ b/src/mame/drivers/toki.cpp @@ -959,7 +959,7 @@ DRIVER_INIT_MEMBER(toki_state,toki) memcpy(&buffer[0],ROM,0x20000); for( i = 0; i < 0x20000; i++ ) { - ROM[i] = buffer[BITSWAP24(i,23,22,21,20,19,18,17,16,13,14,15,12,11,10,9,8,7,6,5,4,3,2,1,0)]; + ROM[i] = buffer[bitswap<24>(i,23,22,21,20,19,18,17,16,13,14,15,12,11,10,9,8,7,6,5,4,3,2,1,0)]; } } @@ -1014,7 +1014,7 @@ DRIVER_INIT_MEMBER(toki_state,jujuba) for (i = 0; i < 0x60000/2; i++) { - prgrom[i] = BITSWAP16(prgrom[i],15,12,13,14, + prgrom[i] = bitswap<16>(prgrom[i],15,12,13,14, 11,10, 9, 8, 7, 6, 5, 3, 4, 2, 1, 0); @@ -1029,7 +1029,7 @@ DRIVER_INIT_MEMBER(toki_state,jujuba) memcpy(&buffer[0],ROM,0x20000); for( i = 0; i < 0x20000; i++ ) { - ROM[i] = buffer[BITSWAP24(i,23,22,21,20,19,18,17,16,13,14,15,12,11,10,9,8,7,6,5,4,3,2,1,0)]; + ROM[i] = buffer[bitswap<24>(i,23,22,21,20,19,18,17,16,13,14,15,12,11,10,9,8,7,6,5,4,3,2,1,0)]; } } } diff --git a/src/mame/drivers/trackfld.cpp b/src/mame/drivers/trackfld.cpp index 462be54bfc8..36cdc4f07c4 100644 --- a/src/mame/drivers/trackfld.cpp +++ b/src/mame/drivers/trackfld.cpp @@ -1574,7 +1574,7 @@ DRIVER_INIT_MEMBER(trackfld_state, trackfldnz) /* decrypt program rom */ for (i = 0x6000; i < 0x10000; i++) - ROM[i] = BITSWAP8(ROM[i], 6, 7, 5, 4, 3, 2, 1, 0); + ROM[i] = bitswap<8>(ROM[i], 6, 7, 5, 4, 3, 2, 1, 0); } DRIVER_INIT_MEMBER(trackfld_state,atlantol) @@ -1627,13 +1627,13 @@ DRIVER_INIT_MEMBER(trackfld_state,wizzquiz) /* decrypt program rom */ for (i = 0; i < 0x2000; i++) - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); ROM = memregion("user1")->base(); /* decrypt questions roms */ for (i = 0; i < 0x40000; i++) - ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7); + ROM[i] = bitswap<8>(ROM[i],0,1,2,3,4,5,6,7); membank("bank1")->configure_entries(0, 8, ROM, 0x8000); } diff --git a/src/mame/drivers/travrusa.cpp b/src/mame/drivers/travrusa.cpp index 19f2bd3e96b..cb068c27f03 100644 --- a/src/mame/drivers/travrusa.cpp +++ b/src/mame/drivers/travrusa.cpp @@ -587,8 +587,8 @@ DRIVER_INIT_MEMBER(travrusa_state,motorace) /* The first CPU ROM has the address and data lines scrambled */ for (A = 0; A < 0x2000; A++) { - j = BITSWAP16(A,15,14,13,9,7,5,3,1,12,10,8,6,4,2,0,11); - rom[j] = BITSWAP8(buffer[A],2,7,4,1,6,3,0,5); + j = bitswap<16>(A,15,14,13,9,7,5,3,1,12,10,8,6,4,2,0,11); + rom[j] = bitswap<8>(buffer[A],2,7,4,1,6,3,0,5); } } @@ -599,7 +599,7 @@ DRIVER_INIT_MEMBER(travrusa_state,shtridra) /* D3/D4 and D5/D6 swapped */ for (A = 0; A < 0x2000; A++) - rom[A] = BITSWAP8(rom[A],7,5,6,3,4,2,1,0); + rom[A] = bitswap<8>(rom[A],7,5,6,3,4,2,1,0); } READ8_MEMBER(travrusa_state::shtridrb_port11_r) diff --git a/src/mame/drivers/tsispch.cpp b/src/mame/drivers/tsispch.cpp index d118f933ae7..ac131b6956d 100644 --- a/src/mame/drivers/tsispch.cpp +++ b/src/mame/drivers/tsispch.cpp @@ -270,19 +270,19 @@ DRIVER_INIT_MEMBER(tsispch_state,prose2k) uint16_t byte23t; for (int i = 0; i < 0x600; i+= 3) { - byte1t = BITSWAP8(dspsrc[0+i], 0, 1, 2, 3, 4, 5, 6, 7); + byte1t = bitswap<8>(dspsrc[0+i], 0, 1, 2, 3, 4, 5, 6, 7); // here's where things get disgusting: if the first byte was an OP or RT, do the following: if ((byte1t&0x80) == 0x00) // op or rt instruction { - byte23t = BITSWAP16( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 10, 15, 11, 12, 13, 14, 0, 1, 2, 3, 4, 5, 6, 7); + byte23t = bitswap<16>( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 10, 15, 11, 12, 13, 14, 0, 1, 2, 3, 4, 5, 6, 7); } else if ((byte1t&0xC0) == 0x80) // jp instruction { - byte23t = BITSWAP16( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 15, 15, 15, 10, 11, 12, 13, 14, 0, 1, 2, 3, 6, 7); + byte23t = bitswap<16>( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 15, 15, 15, 10, 11, 12, 13, 14, 0, 1, 2, 3, 6, 7); } else // ld instruction { - byte23t = BITSWAP16( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 10, 11, 12, 13, 14, 0, 1, 2, 3, 3, 4, 5, 6, 7); + byte23t = bitswap<16>( (((uint16_t)dspsrc[1+i]<<8)|dspsrc[2+i]), 8, 9, 10, 11, 12, 13, 14, 0, 1, 2, 3, 3, 4, 5, 6, 7); } *dspprg = byte1t<<24 | byte23t<<8; diff --git a/src/mame/drivers/twins.cpp b/src/mame/drivers/twins.cpp index 2f8dc45249f..66d96567f0b 100644 --- a/src/mame/drivers/twins.cpp +++ b/src/mame/drivers/twins.cpp @@ -154,13 +154,13 @@ WRITE16_MEMBER(twins_state::twins_pal_w) dat = m_paletteram[m_paloff]; r = dat & 0x1f; - r = BITSWAP8(r,7,6,5,0,1,2,3,4); + r = bitswap<8>(r,7,6,5,0,1,2,3,4); g = (dat>>5) & 0x1f; - g = BITSWAP8(g,7,6,5,0,1,2,3,4); + g = bitswap<8>(g,7,6,5,0,1,2,3,4); b = (dat>>10) & 0x1f; - b = BITSWAP8(b,7,6,5,0,1,2,3,4); + b = bitswap<8>(b,7,6,5,0,1,2,3,4); m_palette->set_pen_color(m_paloff, pal5bit(r),pal5bit(g),pal5bit(b)); diff --git a/src/mame/drivers/vaportra.cpp b/src/mame/drivers/vaportra.cpp index 97b54521db3..2fee7ce3501 100644 --- a/src/mame/drivers/vaportra.cpp +++ b/src/mame/drivers/vaportra.cpp @@ -864,7 +864,7 @@ DRIVER_INIT_MEMBER(vaportra_state,vaportra) uint8_t *RAM = memregion("maincpu")->base(); for (int i = 0x00000; i < 0x80000; i++) - RAM[i] = BITSWAP8(RAM[i],0,6,5,4,3,2,1,7); + RAM[i] = bitswap<8>(RAM[i],0,6,5,4,3,2,1,7); } /******************************************************************************/ diff --git a/src/mame/drivers/vboy.cpp b/src/mame/drivers/vboy.cpp index de760174e13..3aabbdaa6df 100644 --- a/src/mame/drivers/vboy.cpp +++ b/src/mame/drivers/vboy.cpp @@ -62,7 +62,7 @@ m_font[((woffs) + 0x4000)] = dat; /* normal */ \ m_font[((woffs) + 0x8000) ^ 7] = dat; /* flip y */ \ m_font[((woffs) + 0xc000) ^ 7] = dat; /* flip y */ \ - dat = BITSWAP16(dat,1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14); \ + dat = bitswap<16>(dat,1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14); \ m_font[((woffs) + 0x10000)] = dat; /* flip x */ \ m_font[((woffs) + 0x14000)] = dat; /* flip x */ \ m_font[((woffs) + 0x18000) ^ 7] = dat; /* flip x+y */ \ diff --git a/src/mame/drivers/vcs80.cpp b/src/mame/drivers/vcs80.cpp index 2fbbcf7fa48..701887f9e91 100644 --- a/src/mame/drivers/vcs80.cpp +++ b/src/mame/drivers/vcs80.cpp @@ -178,7 +178,7 @@ WRITE8_MEMBER( vcs80_state::pio_pb_w ) */ - uint8_t led_data = BITSWAP8(data & 0x7f, 7, 5, 6, 4, 3, 2, 1, 0); + uint8_t led_data = bitswap<8>(data & 0x7f, 7, 5, 6, 4, 3, 2, 1, 0); int digit = m_keylatch; /* skip middle digit */ diff --git a/src/mame/drivers/vega.cpp b/src/mame/drivers/vega.cpp index 5f0b3bd8991..fe0fa326fb1 100644 --- a/src/mame/drivers/vega.cpp +++ b/src/mame/drivers/vega.cpp @@ -506,7 +506,7 @@ void vega_state::draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const int flip=BIT(id,5); - int num=(BITSWAP8( ((id>>2) &7), 7,6,5,4,3,0,1,2 )); + int num=(bitswap<8>( ((id>>2) &7), 7,6,5,4,3,0,1,2 )); int bank=id&3; @@ -556,7 +556,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit for(x=0;x<40;++x) { int character=m_txt_ram[idx]; - //int color=BITSWAP8(color_lookup[character],7,6,5,4,0,1,2,3)>>1; + //int color=bitswap<8>(color_lookup[character],7,6,5,4,0,1,2,3)>>1; int color=color_lookup[character]&0xf; /* bit 0 - unknown @@ -565,7 +565,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit bit 3 - red */ - color=BITSWAP8(color,7,6,5,4,0,1,2,3)&0x7; + color=bitswap<8>(color,7,6,5,4,0,1,2,3)&0x7; color^=0xf; diff --git a/src/mame/drivers/vt240.cpp b/src/mame/drivers/vt240.cpp index 6e088eac2f7..c9f5e21aeae 100644 --- a/src/mame/drivers/vt240.cpp +++ b/src/mame/drivers/vt240.cpp @@ -338,7 +338,7 @@ READ8_MEMBER(vt240_state::char_buf_r) WRITE8_MEMBER(vt240_state::char_buf_w) { - m_char_buf[m_char_idx++] = BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + m_char_buf[m_char_idx++] = bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); m_char_idx &= 0xf; } @@ -370,7 +370,7 @@ WRITE8_MEMBER(vt240_state::vom_w) if(!BIT(m_reg0, 2)) { m_vom[offset] = data; - data = ~BITSWAP8(data, 1, 0, 3, 2, 5, 4, 7, 6); + data = ~bitswap<8>(data, 1, 0, 3, 2, 5, 4, 7, 6); m_palette->set_pen_color(offset, pal2bit(data >> 6), pal2bit(data >> 6), pal2bit(data >> 6)); m_palette->set_pen_color((offset + 16), pal2bit(data >> 0), pal2bit(data >> 2), pal2bit(data >> 4)); } @@ -410,7 +410,7 @@ WRITE16_MEMBER(vt240_state::vram_w) { if(BIT(m_reg0, 6)) { - chr = BITSWAP8(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx); + chr = bitswap<8>(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx); if(m_patcnt-- == 0) { m_patcnt = m_patmult; @@ -494,7 +494,7 @@ WRITE16_MEMBER(vt240_state::vram_w) WRITE8_MEMBER(vt240_state::mask_w) { - m_mask = BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); + m_mask = bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); } READ8_MEMBER(vt240_state::nvr_store_r) diff --git a/src/mame/drivers/wallc.cpp b/src/mame/drivers/wallc.cpp index 99576cc3165..7aadabad847 100644 --- a/src/mame/drivers/wallc.cpp +++ b/src/mame/drivers/wallc.cpp @@ -438,7 +438,7 @@ DRIVER_INIT_MEMBER(wallc_state, wallc) for (i=0; i<0x2000*2; i++) { c = ROM[ i ] ^ 0x55 ^ 0xff; /* NOTE: this can be shortened but now it fully reflects what the bigger module really does */ - c = BITSWAP8(c, 4,2,6,0,7,1,3,5); /* also swapped inside of the bigger module */ + c = bitswap<8>(c, 4,2,6,0,7,1,3,5); /* also swapped inside of the bigger module */ ROM[ i ] = c; } } @@ -455,12 +455,12 @@ DRIVER_INIT_MEMBER(wallc_state, wallca) if(i & 0x100) { c = ROM[ i ] ^ 0x4a; - c = BITSWAP8(c, 4,7,1,3,2,0,5,6); + c = bitswap<8>(c, 4,7,1,3,2,0,5,6); } else { c = ROM[ i ] ^ 0xa5; - c = BITSWAP8(c, 0,2,3,6,1,5,7,4); + c = bitswap<8>(c, 0,2,3,6,1,5,7,4); } ROM[ i ] = c; diff --git a/src/mame/drivers/wecleman.cpp b/src/mame/drivers/wecleman.cpp index b16c15053ed..46cb033f29f 100644 --- a/src/mame/drivers/wecleman.cpp +++ b/src/mame/drivers/wecleman.cpp @@ -1386,7 +1386,7 @@ void wecleman_state::bitswap(uint8_t *src,size_t len,int _14,int _13,int _12,int for (i = 0;i < len;i++) { src[i] = - buffer[BITSWAP24(i,23,22,21,_14,_13,_12,_11,_10,_f,_e,_d,_c,_b,_a,_9,_8,_7,_6,_5,_4,_3,_2,_1,_0)]; + buffer[::bitswap<24>(i,23,22,21,_14,_13,_12,_11,_10,_f,_e,_d,_c,_b,_a,_9,_8,_7,_6,_5,_4,_3,_2,_1,_0)]; } } @@ -1412,7 +1412,7 @@ DRIVER_INIT_MEMBER(wecleman_state,wecleman) /* TODO: could be wrong, colors have to be fixed. */ /* The only certain thing is that 87 must convert to f0 */ /* otherwise stray lines appear, made of pens 7 & 8 */ - RAM[i] = BITSWAP8(RAM[i],7,0,1,2,3,4,5,6); + RAM[i] = ::bitswap<8>(RAM[i],7,0,1,2,3,4,5,6); } bitswap(memregion("gfx1")->base(), memregion("gfx1")->bytes(), diff --git a/src/mame/drivers/wico.cpp b/src/mame/drivers/wico.cpp index 98f66c27363..b7362edd9cc 100644 --- a/src/mame/drivers/wico.cpp +++ b/src/mame/drivers/wico.cpp @@ -385,7 +385,7 @@ READ8_MEMBER( wico_state::lampst_r ) j = m_shared_ram[0x7f9 + i]; else j = 0; - output().set_digit_value(i * 10 + (m_shared_ram[0x96] & 7), BITSWAP16(j, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(i * 10 + (m_shared_ram[0x96] & 7), bitswap<16>(j, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0)); } return 0xff; } diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index 9f56fc9bf86..4e5bcd76e76 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -3047,7 +3047,7 @@ DRIVER_INIT_MEMBER(williams_state,defndjeu) /* apply simple decryption by swapping bits 0 and 7 */ for (i = 0xd000; i < 0x19000; i++) - rom[i] = BITSWAP8(rom[i],0,6,5,4,3,2,1,7); + rom[i] = bitswap<8>(rom[i],0,6,5,4,3,2,1,7); } diff --git a/src/mame/drivers/wink.cpp b/src/mame/drivers/wink.cpp index 6ea8c59db63..af611ebee0c 100644 --- a/src/mame/drivers/wink.cpp +++ b/src/mame/drivers/wink.cpp @@ -437,19 +437,19 @@ DRIVER_INIT_MEMBER(wink_state,wink) memcpy(&buffer[0],ROM,0x8000); for (i = 0x0000; i <= 0x1fff; i++) - ROM[i] = buffer[BITSWAP16(i,15,14,13, 11,12, 7, 9, 8,10, 6, 4, 5, 1, 2, 3, 0)]; + ROM[i] = buffer[bitswap<16>(i,15,14,13, 11,12, 7, 9, 8,10, 6, 4, 5, 1, 2, 3, 0)]; for (i = 0x2000; i <= 0x3fff; i++) - ROM[i] = buffer[BITSWAP16(i,15,14,13, 10, 7,12, 9, 8,11, 6, 3, 1, 5, 2, 4, 0)]; + ROM[i] = buffer[bitswap<16>(i,15,14,13, 10, 7,12, 9, 8,11, 6, 3, 1, 5, 2, 4, 0)]; for (i = 0x4000; i <= 0x5fff; i++) - ROM[i] = buffer[BITSWAP16(i,15,14,13, 7,10,11, 9, 8,12, 6, 1, 3, 4, 2, 5, 0)]; + ROM[i] = buffer[bitswap<16>(i,15,14,13, 7,10,11, 9, 8,12, 6, 1, 3, 4, 2, 5, 0)]; for (i = 0x6000; i <= 0x7fff; i++) - ROM[i] = buffer[BITSWAP16(i,15,14,13, 11,12, 7, 9, 8,10, 6, 4, 5, 1, 2, 3, 0)]; + ROM[i] = buffer[bitswap<16>(i,15,14,13, 11,12, 7, 9, 8,10, 6, 4, 5, 1, 2, 3, 0)]; for (i = 0; i < 0x8000; i++) - ROM[i] += BITSWAP8(i & 0xff, 7,5,3,1,6,4,2,0); + ROM[i] += bitswap<8>(i & 0xff, 7,5,3,1,6,4,2,0); } GAME( 1985, wink, 0, wink, wink, wink_state, wink, ROT0, "Midcoin", "Wink (set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/wiz.cpp b/src/mame/drivers/wiz.cpp index 9cb19c8cab0..256b9bb885a 100644 --- a/src/mame/drivers/wiz.cpp +++ b/src/mame/drivers/wiz.cpp @@ -1155,7 +1155,7 @@ DRIVER_INIT_MEMBER(wiz_state,stinger) /* decode the opcodes */ tbl = swap_xor_table[row]; - m_decrypted_opcodes[a] = BITSWAP8(src, tbl[0], 6, tbl[1], 4, tbl[2], 2, 1, 0) ^ tbl[3]; + m_decrypted_opcodes[a] = bitswap<8>(src, tbl[0], 6, tbl[1], 4, tbl[2], 2, 1, 0) ^ tbl[3]; } } } diff --git a/src/mame/drivers/wpc_an.cpp b/src/mame/drivers/wpc_an.cpp index 9af1417157a..3d2475be108 100644 --- a/src/mame/drivers/wpc_an.cpp +++ b/src/mame/drivers/wpc_an.cpp @@ -199,8 +199,8 @@ void wpc_an_state::device_timer(emu_timer &timer, device_timer_id id, int param, // update LED segments for(x=0;x<16;x++) { - output().set_digit_value(x,BITSWAP16(m_wpc->get_alphanumeric(x), 15, 7, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); - output().set_digit_value(x+16,BITSWAP16(m_wpc->get_alphanumeric(20+x), 15, 7, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(x,bitswap<16>(m_wpc->get_alphanumeric(x), 15, 7, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); + output().set_digit_value(x+16,bitswap<16>(m_wpc->get_alphanumeric(20+x), 15, 7, 12, 10, 8, 14, 13, 9, 11, 6, 5, 4, 3, 2, 1, 0)); } m_wpc->reset_alphanumeric(); m_vblank_count++; diff --git a/src/mame/drivers/z100.cpp b/src/mame/drivers/z100.cpp index 5042eeaa6e6..622fe87d98a 100644 --- a/src/mame/drivers/z100.cpp +++ b/src/mame/drivers/z100.cpp @@ -616,9 +616,9 @@ WRITE8_MEMBER( z100_state::video_pia_A_w ) */ m_vram_enable = ((data & 0x80) >> 7) ^ 1; - m_gbank = BITSWAP8(((data & 0x70) >> 4) ^ 0x7,7,6,5,4,3,1,0,2); + m_gbank = bitswap<8>(((data & 0x70) >> 4) ^ 0x7,7,6,5,4,3,1,0,2); m_flash = ((data & 8) >> 3) ^ 1; - m_display_mask = BITSWAP8((data & 7) ^ 7,7,6,5,4,3,1,0,2); + m_display_mask = bitswap<8>((data & 7) ^ 7,7,6,5,4,3,1,0,2); } WRITE8_MEMBER( z100_state::video_pia_B_w ) diff --git a/src/mame/drivers/zapcomputer.cpp b/src/mame/drivers/zapcomputer.cpp index 455531b56e9..4987095d1b9 100644 --- a/src/mame/drivers/zapcomputer.cpp +++ b/src/mame/drivers/zapcomputer.cpp @@ -63,7 +63,7 @@ uint8_t zapcomp_state::decode7seg(uint8_t data) // Bit order for the FAIRCHILD FND-70 // 7-SEGMENT LCD: . g f e d c b a - return BITSWAP8(patterns[data & 0x0F], 7, 3, 4, 2, 1, 0, 6, 5); + return bitswap<8>(patterns[data & 0x0F], 7, 3, 4, 2, 1, 0, 6, 5); } WRITE8_MEMBER( zapcomp_state::display_7seg_w ) diff --git a/src/mame/etc/fd1094dp.cpp b/src/mame/etc/fd1094dp.cpp index 34074d787e2..ffaf2e187e9 100644 --- a/src/mame/etc/fd1094dp.cpp +++ b/src/mame/etc/fd1094dp.cpp @@ -21,7 +21,7 @@ char srcpath[250],dstfilename[250]; #define BIT(x,n) (((x)>>(n))&1) -#define BITSWAP16(val,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \ +#define bitswap<16>(val,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \ ((BIT(val,B15) << 15) | \ (BIT(val,B14) << 14) | \ (BIT(val,B13) << 13) | \ @@ -265,7 +265,7 @@ static int parametric_decode(int val,int mainkey,int key_F,int gkey1,int gkey2,i if ((val & 0xe000) == 0x0000) - val = BITSWAP16(val, 12,15,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); + val = bitswap<16>(val, 12,15,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); else { if (val & 0x8000) @@ -274,9 +274,9 @@ static int parametric_decode(int val,int mainkey,int key_F,int gkey1,int gkey2,i if (~val & 0x0004) val ^= 0x0022; // 5,1 if (!key_1b) if (~val & 0x1000) val ^= 0x0848; // 11,6,3 if (!global_swap2) if (!key_0c) val ^= 0x4101; // 14,8,0 - if (!key_2b) val = BITSWAP16(val, 15,14,13, 9,11,10,12, 8, 2, 6, 5, 4, 3, 7, 1, 0); // 12,9,7,2 + if (!key_2b) val = bitswap<16>(val, 15,14,13, 9,11,10,12, 8, 2, 6, 5, 4, 3, 7, 1, 0); // 12,9,7,2 - val = 0x6561 ^ BITSWAP16(val, 15, 9,10,13, 3,12, 0,14, 6, 5, 2,11, 8, 1, 4, 7); + val = 0x6561 ^ bitswap<16>(val, 15, 9,10,13, 3,12, 0,14, 6, 5, 2,11, 8, 1, 4, 7); } if (val & 0x4000) { @@ -284,9 +284,9 @@ static int parametric_decode(int val,int mainkey,int key_F,int gkey1,int gkey2,i if (!key_3a) if (val & 0x0004) val ^= 0x0202; // 9,1 if (!key_6a) if (val & 0x0400) val ^= 0x0004; // 2 if (!key_5b) if (!key_0b) val ^= 0x08a1; // 11,7,5,0 - if (!global_swap0b) val = BITSWAP16(val, 15,14,10,12,11,13, 9, 4, 7, 6, 5, 8, 3, 2, 1, 0); // 13,10,8,4 + if (!global_swap0b) val = bitswap<16>(val, 15,14,10,12,11,13, 9, 4, 7, 6, 5, 8, 3, 2, 1, 0); // 13,10,8,4 - val = 0x3523 ^ BITSWAP16(val, 13,14, 7, 0, 8, 6, 4, 2, 1,15, 3,11,12,10, 5, 9); + val = 0x3523 ^ bitswap<16>(val, 13,14, 7, 0, 8, 6, 4, 2, 1,15, 3,11,12,10, 5, 9); } if (val & 0x2000) { @@ -295,22 +295,22 @@ static int parametric_decode(int val,int mainkey,int key_F,int gkey1,int gkey2,i if (!key_7a) if (val & 0x0001) val ^= 0x110a; // 12,8,3,1 if (!key_4b) if (!key_0a) val ^= 0x0040; // 6 if (!global_swap0a) if (!key_6b) val ^= 0x0404; // 10,2 - if (!key_5b) val = BITSWAP16(val, 0,14,13,12,15,10, 9, 8, 7, 6,11, 4, 3, 2, 1, 5); // 15,11,5,0 + if (!key_5b) val = bitswap<16>(val, 0,14,13,12,15,10, 9, 8, 7, 6,11, 4, 3, 2, 1, 5); // 15,11,5,0 - val = 0x99a5 ^ BITSWAP16(val, 10, 2,13, 7, 8, 0, 3,14, 6,15, 1,11, 9, 4, 5,12); + val = 0x99a5 ^ bitswap<16>(val, 10, 2,13, 7, 8, 0, 3,14, 6,15, 1,11, 9, 4, 5,12); } - val = 0x87ff ^ BITSWAP16(val, 5,15,13,14, 6, 0, 9,10, 4,11, 1, 2,12, 3, 7, 8); + val = 0x87ff ^ bitswap<16>(val, 5,15,13,14, 6, 0, 9,10, 4,11, 1, 2,12, 3, 7, 8); - if (!global_swap4) val = BITSWAP16(val, 6,14,13,12,11,10, 9, 5, 7,15, 8, 4, 3, 2, 1, 0); // 15-6, 8-5 - if (!global_swap3) val = BITSWAP16(val, 15,12,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 12-13-14 - if (!global_swap2) val = BITSWAP16(val, 15,14,13,12,11, 2, 9, 8,10, 6, 5, 4, 3, 0, 1, 7); // 10-2-0-7 - if (!key_3b) val = BITSWAP16(val, 15,14,13,12,11,10, 4, 8, 7, 6, 5, 9, 1, 2, 3, 0); // 9-4, 3-1 + if (!global_swap4) val = bitswap<16>(val, 6,14,13,12,11,10, 9, 5, 7,15, 8, 4, 3, 2, 1, 0); // 15-6, 8-5 + if (!global_swap3) val = bitswap<16>(val, 15,12,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 12-13-14 + if (!global_swap2) val = bitswap<16>(val, 15,14,13,12,11, 2, 9, 8,10, 6, 5, 4, 3, 0, 1, 7); // 10-2-0-7 + if (!key_3b) val = bitswap<16>(val, 15,14,13,12,11,10, 4, 8, 7, 6, 5, 9, 1, 2, 3, 0); // 9-4, 3-1 - if (!key_2a) val = BITSWAP16(val, 15,12,13,14,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 14-12 - if (!global_swap1) val = BITSWAP16(val, 15,14,13,12, 9, 8,11,10, 7, 6, 5, 4, 3, 2, 1, 0); // 11...8 - if (!key_5a) val = BITSWAP16(val, 15,14,13,12,11,10, 9, 8, 4, 5, 7, 6, 3, 2, 1, 0); // 7...4 - if (!global_swap0a) val = BITSWAP16(val, 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 0, 3, 2, 1); // 3...0 + if (!key_2a) val = bitswap<16>(val, 15,12,13,14,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 14-12 + if (!global_swap1) val = bitswap<16>(val, 15,14,13,12, 9, 8,11,10, 7, 6, 5, 4, 3, 2, 1, 0); // 11...8 + if (!key_5a) val = bitswap<16>(val, 15,14,13,12,11,10, 9, 8, 4, 5, 7, 6, 3, 2, 1, 0); // 7...4 + if (!global_swap0a) val = bitswap<16>(val, 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 0, 3, 2, 1); // 3...0 } return final_decrypt(val,key_F); diff --git a/src/mame/machine/315-5881_crypt.cpp b/src/mame/machine/315-5881_crypt.cpp index 275c5614442..2d3144a7134 100644 --- a/src/mame/machine/315-5881_crypt.cpp +++ b/src/mame/machine/315-5881_crypt.cpp @@ -617,7 +617,7 @@ uint16_t sega_315_5881_crypt_device::block_decrypt(uint32_t game_key, uint16_t s // First Feistel Network - aux = BITSWAP16(counter, 5, 12, 14, 13, 9, 3, 6, 4, 8, 1, 15, 11, 0, 7, 10, 2); + aux = bitswap<16>(counter, 5, 12, 14, 13, 9, 3, 6, 4, 8, 1, 15, 11, 0, 7, 10, 2); // 1st round B = aux >> 8; @@ -647,7 +647,7 @@ uint16_t sega_315_5881_crypt_device::block_decrypt(uint32_t game_key, uint16_t s // Second Feistel Network - aux = BITSWAP16(data, 14, 3, 8, 12, 13, 7, 15, 4, 6, 2, 9, 5, 11, 0, 1, 10); + aux = bitswap<16>(data, 14, 3, 8, 12, 13, 7, 15, 4, 6, 2, 9, 5, 11, 0, 1, 10); // 1st round B = aux >> 8; @@ -664,7 +664,7 @@ uint16_t sega_315_5881_crypt_device::block_decrypt(uint32_t game_key, uint16_t s aux = (B << 8) | A; - aux = BITSWAP16(aux, 15, 7, 6, 14, 13, 12, 5, 4, 3, 2, 11, 10, 9, 1, 0, 8); + aux = bitswap<16>(aux, 15, 7, 6, 14, 13, 12, 5, 4, 3, 2, 11, 10, 9, 1, 0, 8); return aux; } diff --git a/src/mame/machine/awboard.cpp b/src/mame/machine/awboard.cpp index ddc49a3cfa0..e03f11d22c0 100644 --- a/src/mame/machine/awboard.cpp +++ b/src/mame/machine/awboard.cpp @@ -241,10 +241,10 @@ uint16_t aw_rom_board::decrypt(uint16_t cipherText, uint32_t address, const uint const int* pbox = permutation_table[key>>18]; const sbox_set* ss = &sboxes_table[(key>>16)&3]; - aux = BITSWAP16(cipherText, + aux = bitswap<16>(cipherText, pbox[15],pbox[14],pbox[13],pbox[12],pbox[11],pbox[10],pbox[9],pbox[8], pbox[7],pbox[6],pbox[5],pbox[4],pbox[3],pbox[2],pbox[1],pbox[0]); - aux = aux ^ BITSWAP16(address, 13,5,2, 14,10,9,4, 15,11,6,1, 12,8,7,3,0); + aux = aux ^ bitswap<16>(address, 13,5,2, 14,10,9,4, 15,11,6,1, 12,8,7,3,0); b0 = aux&0x1f; b1 = (aux>>5)&0xf; diff --git a/src/mame/machine/bfm_bd1.cpp b/src/mame/machine/bfm_bd1.cpp index b9abdaa0deb..10d18618fa0 100644 --- a/src/mame/machine/bfm_bd1.cpp +++ b/src/mame/machine/bfm_bd1.cpp @@ -164,7 +164,7 @@ void bfm_bd1_device::device_reset() uint16_t bfm_bd1_device::set_display(uint16_t segin) { - return BITSWAP16(segin,8,12,11,7,6,4,10,3,14,15,0,13,9,5,1,2); + return bitswap<16>(segin,8,12,11,7,6,4,10,3,14,15,0,13,9,5,1,2); } void bfm_bd1_device::device_post_load() diff --git a/src/mame/machine/bfm_bda.cpp b/src/mame/machine/bfm_bda.cpp index 263db3a7a0c..6d2794b7dd1 100644 --- a/src/mame/machine/bfm_bda.cpp +++ b/src/mame/machine/bfm_bda.cpp @@ -146,7 +146,7 @@ void bfm_bda_device::device_reset() uint16_t bfm_bda_device::set_display(uint16_t segin) { - return BITSWAP16(segin,8,12,11,7,6,4,10,3,14,15,0,13,9,5,1,2); + return bitswap<16>(segin,8,12,11,7,6,4,10,3,14,15,0,13,9,5,1,2); } void bfm_bda_device::device_post_load() diff --git a/src/mame/machine/cps2crypt.cpp b/src/mame/machine/cps2crypt.cpp index ceccdea6b5b..96d94a20f47 100644 --- a/src/mame/machine/cps2crypt.cpp +++ b/src/mame/machine/cps2crypt.cpp @@ -557,8 +557,8 @@ static uint16_t feistel(uint16_t val, const int *bitsA, const int *bitsB, const struct optimised_sbox* boxes1, const struct optimised_sbox* boxes2, const struct optimised_sbox* boxes3, const struct optimised_sbox* boxes4, uint32_t key1, uint32_t key2, uint32_t key3, uint32_t key4) { - uint8_t l = BITSWAP8(val, bitsB[7],bitsB[6],bitsB[5],bitsB[4],bitsB[3],bitsB[2],bitsB[1],bitsB[0]); - uint8_t r = BITSWAP8(val, bitsA[7],bitsA[6],bitsA[5],bitsA[4],bitsA[3],bitsA[2],bitsA[1],bitsA[0]); + uint8_t l = bitswap<8>(val, bitsB[7],bitsB[6],bitsB[5],bitsB[4],bitsB[3],bitsB[2],bitsB[1],bitsB[0]); + uint8_t r = bitswap<8>(val, bitsA[7],bitsA[6],bitsA[5],bitsA[4],bitsA[3],bitsA[2],bitsA[1],bitsA[0]); l ^= fn(r, boxes1, key1); r ^= fn(l, boxes2, key2); diff --git a/src/mame/machine/deco102.cpp b/src/mame/machine/deco102.cpp index 210ee3f6afa..0c643c529aa 100644 --- a/src/mame/machine/deco102.cpp +++ b/src/mame/machine/deco102.cpp @@ -44,7 +44,7 @@ static uint16_t decrypt(uint16_t data, int address, int select_xor) xorval = xors[j]; // decrypt - return xorval ^ BITSWAP16(data, + return xorval ^ bitswap<16>(data, bs[0],bs[1],bs[2],bs[3],bs[4],bs[5],bs[6],bs[7], bs[8],bs[9],bs[10],bs[11],bs[12],bs[13],bs[14],bs[15]); } diff --git a/src/mame/machine/deco146.cpp b/src/mame/machine/deco146.cpp index 05bc061ce3e..fd15795691a 100644 --- a/src/mame/machine/deco146.cpp +++ b/src/mame/machine/deco146.cpp @@ -1142,7 +1142,7 @@ inline uint16_t reorder(uint16_t input, uint8_t const *weights) void deco_146_base_device::write_data(address_space &space, uint16_t address, uint16_t data, uint16_t mem_mask, uint8_t &csflags) { - address = BITSWAP16(address>>1, 15,14,13,12,11,10, m_external_addrswap[9],m_external_addrswap[8] ,m_external_addrswap[7],m_external_addrswap[6],m_external_addrswap[5],m_external_addrswap[4],m_external_addrswap[3],m_external_addrswap[2],m_external_addrswap[1],m_external_addrswap[0]) << 1; + address = bitswap<16>(address>>1, 15,14,13,12,11,10, m_external_addrswap[9],m_external_addrswap[8] ,m_external_addrswap[7],m_external_addrswap[6],m_external_addrswap[5],m_external_addrswap[4],m_external_addrswap[3],m_external_addrswap[2],m_external_addrswap[1],m_external_addrswap[0]) << 1; csflags = 0; int upper_addr_bits = (address & 0x7800) >> 11; @@ -1268,7 +1268,7 @@ void deco_146_base_device::write_protport(address_space &space, uint16_t address uint16_t deco_146_base_device::read_data(uint16_t address, uint16_t mem_mask, uint8_t &csflags) { - address = BITSWAP16(address>>1, 15,14,13,12,11,10, m_external_addrswap[9],m_external_addrswap[8] ,m_external_addrswap[7],m_external_addrswap[6],m_external_addrswap[5],m_external_addrswap[4],m_external_addrswap[3],m_external_addrswap[2],m_external_addrswap[1],m_external_addrswap[0]) << 1; + address = bitswap<16>(address>>1, 15,14,13,12,11,10, m_external_addrswap[9],m_external_addrswap[8] ,m_external_addrswap[7],m_external_addrswap[6],m_external_addrswap[5],m_external_addrswap[4],m_external_addrswap[3],m_external_addrswap[2],m_external_addrswap[1],m_external_addrswap[0]) << 1; uint16_t retdata = 0; csflags = 0; diff --git a/src/mame/machine/deco156.cpp b/src/mame/machine/deco156.cpp index 3258c55a66d..d763611d517 100644 --- a/src/mame/machine/deco156.cpp +++ b/src/mame/machine/deco156.cpp @@ -87,7 +87,7 @@ static void decrypt(uint32_t *src, uint32_t *dst, int length) switch (a & 3) { case 0: - dword = BITSWAP32( dword ^ 0xec63197a, + dword = bitswap<32>( dword ^ 0xec63197a, 1, 4, 7, 28, 22, 18, 20, 9, 16, 10, 30, 2, 31, 24, 19, 29, 6, 21, 23, 11, 12, 13, 5, 0, @@ -95,7 +95,7 @@ static void decrypt(uint32_t *src, uint32_t *dst, int length) break; case 1: - dword = BITSWAP32( dword ^ 0x58a5a55f, + dword = bitswap<32>( dword ^ 0x58a5a55f, 14, 23, 28, 29, 6, 24, 10, 1, 5, 16, 7, 2, 30, 8, 18, 3, 31, 22, 25, 20, 17, 0, 19, 27, @@ -103,7 +103,7 @@ static void decrypt(uint32_t *src, uint32_t *dst, int length) break; case 2: - dword = BITSWAP32( dword ^ 0xe3a65f16, + dword = bitswap<32>( dword ^ 0xe3a65f16, 19, 30, 21, 4, 2, 18, 15, 1, 12, 25, 8, 0, 24, 20, 17, 23, 22, 26, 28, 16, 9, 27, 6, 11, @@ -111,7 +111,7 @@ static void decrypt(uint32_t *src, uint32_t *dst, int length) break; case 3: - dword = BITSWAP32( dword ^ 0x28d93783, + dword = bitswap<32>( dword ^ 0x28d93783, 30, 6, 15, 0, 31, 18, 26, 22, 14, 23, 19, 17, 10, 8, 11, 20, 1, 28, 2, 4, 9, 24, 25, 27, diff --git a/src/mame/machine/deco222.cpp b/src/mame/machine/deco222.cpp index 5be4df0bb60..1371f8087b4 100644 --- a/src/mame/machine/deco222.cpp +++ b/src/mame/machine/deco222.cpp @@ -31,7 +31,7 @@ void deco_222_device::device_reset() uint8_t deco_222_device::mi_decrypt::read_sync(uint16_t adr) { - return BITSWAP8(direct->read_byte(adr) ,7,5,6,4,3,2,1,0); + return bitswap<8>(direct->read_byte(adr) ,7,5,6,4,3,2,1,0); } util::disasm_interface *deco_222_device::create_disassembler() @@ -46,7 +46,7 @@ u32 deco_222_device::disassembler::interface_flags() const u8 deco_222_device::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode ? BITSWAP8(value,7,5,6,4,3,2,1,0) : value; + return opcode ? bitswap<8>(value,7,5,6,4,3,2,1,0) : value; } deco_c10707_device::deco_c10707_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : @@ -68,7 +68,7 @@ void deco_c10707_device::device_reset() uint8_t deco_c10707_device::mi_decrypt::read_sync(uint16_t adr) { - return BITSWAP8(direct->read_byte(adr) ,7,5,6,4,3,2,1,0); + return bitswap<8>(direct->read_byte(adr) ,7,5,6,4,3,2,1,0); } util::disasm_interface *deco_c10707_device::create_disassembler() @@ -83,5 +83,5 @@ u32 deco_c10707_device::disassembler::interface_flags() const u8 deco_c10707_device::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode ? BITSWAP8(value,7,5,6,4,3,2,1,0) : value; + return opcode ? bitswap<8>(value,7,5,6,4,3,2,1,0) : value; } diff --git a/src/mame/machine/decocpu6.cpp b/src/mame/machine/decocpu6.cpp index 9e068e73adb..f583887188f 100644 --- a/src/mame/machine/decocpu6.cpp +++ b/src/mame/machine/decocpu6.cpp @@ -31,7 +31,7 @@ void deco_cpu6_device::device_reset() uint8_t deco_cpu6_device::mi_decrypt::read_sync(uint16_t adr) { if (adr&1) - return BITSWAP8(direct->read_byte(adr),6,4,7,5,3,2,1,0); + return bitswap<8>(direct->read_byte(adr),6,4,7,5,3,2,1,0); else return direct->read_byte(adr); } @@ -48,5 +48,5 @@ u32 deco_cpu6_device::disassembler::interface_flags() const u8 deco_cpu6_device::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode && (pc & 1) ? BITSWAP8(value,6,4,7,5,3,2,1,0) : value; + return opcode && (pc & 1) ? bitswap<8>(value,6,4,7,5,3,2,1,0) : value; } diff --git a/src/mame/machine/decocpu7.cpp b/src/mame/machine/decocpu7.cpp index 50144063bb4..dd0031ff7b8 100644 --- a/src/mame/machine/decocpu7.cpp +++ b/src/mame/machine/decocpu7.cpp @@ -30,7 +30,7 @@ uint8_t deco_cpu7_device::mi_decrypt::read_sync(uint16_t adr) if(had_written) { had_written = false; if((adr & 0x0104) == 0x0104) - res = BITSWAP8(res, 6,5,3,4,2,7,1,0); + res = bitswap<8>(res, 6,5,3,4,2,7,1,0); } return res; } @@ -57,5 +57,5 @@ u32 deco_cpu7_device::disassembler::interface_flags() const u8 deco_cpu7_device::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode && mintf->had_written && ((pc & 0x104) == 0x104) ? BITSWAP8(value,6,5,3,4,2,7,1,0) : value; + return opcode && mintf->had_written && ((pc & 0x104) == 0x104) ? bitswap<8>(value,6,5,3,4,2,7,1,0) : value; } diff --git a/src/mame/machine/decocrpt.cpp b/src/mame/machine/decocrpt.cpp index dda584c2d76..ad5e212414b 100644 --- a/src/mame/machine/decocrpt.cpp +++ b/src/mame/machine/decocrpt.cpp @@ -622,7 +622,7 @@ static void deco_decrypt(running_machine &machine,const char *rgntag,const uint8 if (remap_only) rom[i] = buffer[addr]; else - rom[i] = BITSWAP16(buffer[addr] ^ xor_masks[xor_table[addr & 0x7ff]], + rom[i] = bitswap<16>(buffer[addr] ^ xor_masks[xor_table[addr & 0x7ff]], swap_patterns[pat][0], swap_patterns[pat][1], swap_patterns[pat][2], diff --git a/src/mame/machine/epos.cpp b/src/mame/machine/epos.cpp index 3ead45d89be..da7f5f12326 100644 --- a/src/mame/machine/epos.cpp +++ b/src/mame/machine/epos.cpp @@ -36,7 +36,7 @@ static void epos_decrypt_rom(uint8_t *ROM, uint8_t invert, int offset, int *bs) { for (int mem = 0; mem < 0x4000; mem++ ) { - ROM[mem + offset] = BITSWAP8(ROM[mem] ^ invert, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]); + ROM[mem + offset] = bitswap<8>(ROM[mem] ^ invert, bs[0], bs[1], bs[2], bs[3], bs[4], bs[5], bs[6], bs[7]); } } diff --git a/src/mame/machine/fd1089.cpp b/src/mame/machine/fd1089.cpp index e364581916c..15938db5773 100644 --- a/src/mame/machine/fd1089.cpp +++ b/src/mame/machine/fd1089.cpp @@ -290,10 +290,10 @@ uint8_t fd1089_base_device::rearrange_key(uint8_t table, bool opcode) if (BIT(table,6)) table ^= (1<<7); - table = BITSWAP8(table,1,0,6,4,3,5,2,7); + table = bitswap<8>(table,1,0,6,4,3,5,2,7); if (BIT(table,6)) - table = BITSWAP8(table,7,6,2,4,5,3,1,0); + table = bitswap<8>(table,7,6,2,4,5,3,1,0); } else { @@ -307,10 +307,10 @@ uint8_t fd1089_base_device::rearrange_key(uint8_t table, bool opcode) if (BIT(~table,7)) table ^= (1<<6); - table = BITSWAP8(table,5,6,7,4,2,3,1,0); + table = bitswap<8>(table,5,6,7,4,2,3,1,0); if (BIT(table,6)) - table = BITSWAP8(table,7,6,5,3,2,4,1,0); + table = bitswap<8>(table,7,6,5,3,2,4,1,0); } if (BIT(table,6)) @@ -342,7 +342,7 @@ uint8_t fd1089a_device::decode(uint8_t val, uint8_t key, bool opcode) uint8_t table = rearrange_key(key, opcode); const decrypt_parameters &p = s_addr_params[table >> 4]; - val = BITSWAP8(val, p.s7,p.s6,p.s5,p.s4,p.s3,p.s2,p.s1,p.s0) ^ p.xorval; + val = bitswap<8>(val, p.s7,p.s6,p.s5,p.s4,p.s3,p.s2,p.s1,p.s0) ^ p.xorval; if (BIT(table,3)) val ^= 0x01; if (BIT(table,0)) val ^= 0xb1; @@ -369,20 +369,20 @@ uint8_t fd1089a_device::decode(uint8_t val, uint8_t key, bool opcode) { if (BIT(val,0)) val ^= 0xc0; if (BIT(~val,6) ^ BIT(val,4)) - val = BITSWAP8(val, 7,6,5,4,1,0,2,3); + val = bitswap<8>(val, 7,6,5,4,1,0,2,3); } else { if (BIT(~val,6) ^ BIT(val,4)) - val = BITSWAP8(val, 7,6,5,4,0,1,3,2); + val = bitswap<8>(val, 7,6,5,4,0,1,3,2); } if (BIT(~val,6)) - val = BITSWAP8(val, 7,6,5,4,2,3,0,1); + val = bitswap<8>(val, 7,6,5,4,2,3,0,1); const decrypt_parameters &q = s_data_params_a[family]; val ^= q.xorval; - val = BITSWAP8(val, q.s7,q.s6,q.s5,q.s4,q.s3,q.s2,q.s1,q.s0); + val = bitswap<8>(val, q.s7,q.s6,q.s5,q.s4,q.s3,q.s2,q.s1,q.s0); return val; } @@ -402,7 +402,7 @@ uint8_t fd1089b_device::decode(uint8_t val, uint8_t key, bool opcode) uint8_t table = rearrange_key(key, opcode); const decrypt_parameters &p = s_addr_params[table >> 4]; - val = BITSWAP8(val, p.s7,p.s6,p.s5,p.s4,p.s3,p.s2,p.s1,p.s0) ^ p.xorval; + val = bitswap<8>(val, p.s7,p.s6,p.s5,p.s4,p.s3,p.s2,p.s1,p.s0) ^ p.xorval; if (BIT(table,3)) val ^= 0x01; if (BIT(table,0)) val ^= 0xb1; @@ -429,17 +429,17 @@ uint8_t fd1089b_device::decode(uint8_t val, uint8_t key, bool opcode) if (BIT(table,2)) { - val = BITSWAP8(val, 7,6,5,4,1,0,3,2); + val = bitswap<8>(val, 7,6,5,4,1,0,3,2); if (BIT(table,0) ^ BIT(table,1)) - val = BITSWAP8(val, 7,6,5,4,0,1,3,2); + val = bitswap<8>(val, 7,6,5,4,0,1,3,2); } else { - val = BITSWAP8(val, 7,6,5,4,3,2,0,1); + val = bitswap<8>(val, 7,6,5,4,3,2,0,1); if (BIT(table,0) ^ BIT(table,1)) - val = BITSWAP8(val, 7,6,5,4,1,0,2,3); + val = bitswap<8>(val, 7,6,5,4,1,0,2,3); } return val; diff --git a/src/mame/machine/fd1094.cpp b/src/mame/machine/fd1094.cpp index ed8dfe87617..20d33cec87a 100644 --- a/src/mame/machine/fd1094.cpp +++ b/src/mame/machine/fd1094.cpp @@ -815,7 +815,7 @@ uint16_t fd1094_device::decrypt_one(offs_t address, uint16_t val, const uint8_t if (val & 0x8000) // block invariant: val & 0x8000 != 0 { - val = BITSWAP16(val, 15, 9,10,13, 3,12, 0,14, 6, 5, 2,11, 8, 1, 4, 7); + val = bitswap<16>(val, 15, 9,10,13, 3,12, 0,14, 6, 5, 2,11, 8, 1, 4, 7); if (!global_xor1) if (~val & 0x0800) val ^= 0x3002; // 1,12,13 if (true) if (~val & 0x0020) val ^= 0x0044; // 2,6 @@ -823,12 +823,12 @@ uint16_t fd1094_device::decrypt_one(offs_t address, uint16_t val, const uint8_t if (!global_swap2) if (!key_0c) val ^= 0x0308; // 3,8,9 val ^= 0x6561; - if (!key_2b) val = BITSWAP16(val,15,10,13,12,11,14,9,8,7,6,0,4,3,2,1,5); // 0-5, 10-14 + if (!key_2b) val = bitswap<16>(val,15,10,13,12,11,14,9,8,7,6,0,4,3,2,1,5); // 0-5, 10-14 } if (val & 0x4000) // block invariant: val & 0x4000 != 0 { - val = BITSWAP16(val, 13,14, 7, 0, 8, 6, 4, 2, 1,15, 3,11,12,10, 5, 9); + val = bitswap<16>(val, 13,14, 7, 0, 8, 6, 4, 2, 1,15, 3,11,12,10, 5, 9); if (!global_xor0) if (val & 0x0010) val ^= 0x0468; // 3,5,6,10 if (!key_3a) if (val & 0x0100) val ^= 0x0081; // 0,7 @@ -836,12 +836,12 @@ uint16_t fd1094_device::decrypt_one(offs_t address, uint16_t val, const uint8_t if (!key_5b) if (!key_0b) val ^= 0x3012; // 1,4,12,13 val ^= 0x3523; - if (!global_swap0b) val = BITSWAP16(val, 2,14,13,12, 9,10,11, 8, 7, 6, 5, 4, 3,15, 1, 0); // 2-15, 9-11 + if (!global_swap0b) val = bitswap<16>(val, 2,14,13,12, 9,10,11, 8, 7, 6, 5, 4, 3,15, 1, 0); // 2-15, 9-11 } if (val & 0x2000) // block invariant: val & 0x2000 != 0 { - val = BITSWAP16(val, 10, 2,13, 7, 8, 0, 3,14, 6,15, 1,11, 9, 4, 5,12); + val = bitswap<16>(val, 10, 2,13, 7, 8, 0, 3,14, 6,15, 1,11, 9, 4, 5,12); if (!key_4a) if (val & 0x0800) val ^= 0x010c; // 2,3,8 if (!key_1a) if (val & 0x0080) val ^= 0x1000; // 12 @@ -850,27 +850,27 @@ uint16_t fd1094_device::decrypt_one(offs_t address, uint16_t val, const uint8_t if (!global_swap0a) if (!key_6b) val ^= 0xc000; // 14,15 val ^= 0x99a5; - if (!key_5b) val = BITSWAP16(val,15,14,13,12,11, 1, 9, 8, 7,10, 5, 6, 3, 2, 4, 0); // 1,4,6,10 + if (!key_5b) val = bitswap<16>(val,15,14,13,12,11, 1, 9, 8, 7,10, 5, 6, 3, 2, 4, 0); // 1,4,6,10 } if (val & 0xe000) // block invariant: val & 0xe000 != 0 { - val = BITSWAP16(val,15,13,14, 5, 6, 0, 9,10, 4,11, 1, 2,12, 3, 7, 8); + val = bitswap<16>(val,15,13,14, 5, 6, 0, 9,10, 4,11, 1, 2,12, 3, 7, 8); val ^= 0x17ff; - if (!global_swap4) val = BITSWAP16(val, 15,14,13, 6,11,10, 9, 5, 7,12, 8, 4, 3, 2, 1, 0); // 5-8, 6-12 - if (!global_swap3) val = BITSWAP16(val, 13,15,14,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 15-14-13 - if (!global_swap2) val = BITSWAP16(val, 15,14,13,12,11, 2, 9, 8,10, 6, 5, 4, 3, 0, 1, 7); // 10-2-0-7 - if (!key_3b) val = BITSWAP16(val, 15,14,13,12,11,10, 4, 8, 7, 6, 5, 9, 1, 2, 3, 0); // 9-4, 3-1 - if (!key_2a) val = BITSWAP16(val, 13,14,15,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 13-15 + if (!global_swap4) val = bitswap<16>(val, 15,14,13, 6,11,10, 9, 5, 7,12, 8, 4, 3, 2, 1, 0); // 5-8, 6-12 + if (!global_swap3) val = bitswap<16>(val, 13,15,14,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 15-14-13 + if (!global_swap2) val = bitswap<16>(val, 15,14,13,12,11, 2, 9, 8,10, 6, 5, 4, 3, 0, 1, 7); // 10-2-0-7 + if (!key_3b) val = bitswap<16>(val, 15,14,13,12,11,10, 4, 8, 7, 6, 5, 9, 1, 2, 3, 0); // 9-4, 3-1 + if (!key_2a) val = bitswap<16>(val, 13,14,15,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); // 13-15 - if (!global_swap1) val = BITSWAP16(val, 15,14,13,12, 9, 8,11,10, 7, 6, 5, 4, 3, 2, 1, 0); // 11...8 - if (!key_5a) val = BITSWAP16(val, 15,14,13,12,11,10, 9, 8, 4, 5, 7, 6, 3, 2, 1, 0); // 7...4 - if (!global_swap0a) val = BITSWAP16(val, 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 0, 3, 2, 1); // 3...0 + if (!global_swap1) val = bitswap<16>(val, 15,14,13,12, 9, 8,11,10, 7, 6, 5, 4, 3, 2, 1, 0); // 11...8 + if (!key_5a) val = bitswap<16>(val, 15,14,13,12,11,10, 9, 8, 4, 5, 7, 6, 3, 2, 1, 0); // 7...4 + if (!global_swap0a) val = bitswap<16>(val, 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 0, 3, 2, 1); // 3...0 } - val = BITSWAP16(val, 12,15,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); + val = bitswap<16>(val, 12,15,14,13,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); if ((val & 0xb080) == 0x8000) val ^= 0x4000; if ((val & 0xf000) == 0xc000) val ^= 0x0080; diff --git a/src/mame/machine/gaelcrpt.cpp b/src/mame/machine/gaelcrpt.cpp index 2dbe0f1153f..32166390e02 100644 --- a/src/mame/machine/gaelcrpt.cpp +++ b/src/mame/machine/gaelcrpt.cpp @@ -20,10 +20,10 @@ static int decrypt(int const param1, int const param2, int const enc_prev_word, switch (swap) { - case 0: res = BITSWAP16(enc_word, 1, 2, 0,14,12,15, 4, 8,13, 7, 3, 6,11, 5,10, 9); break; - case 1: res = BITSWAP16(enc_word, 14,10, 4,15, 1, 6,12,11, 8, 0, 9,13, 7, 3, 5, 2); break; - case 2: res = BITSWAP16(enc_word, 2,13,15, 1,12, 8,14, 4, 6, 0, 9, 5,10, 7, 3,11); break; - case 3: res = BITSWAP16(enc_word, 3, 8, 1,13,14, 4,15, 0,10, 2, 7,12, 6,11, 9, 5); break; + case 0: res = bitswap<16>(enc_word, 1, 2, 0,14,12,15, 4, 8,13, 7, 3, 6,11, 5,10, 9); break; + case 1: res = bitswap<16>(enc_word, 14,10, 4,15, 1, 6,12,11, 8, 0, 9,13, 7, 3, 5, 2); break; + case 2: res = bitswap<16>(enc_word, 2,13,15, 1,12, 8,14, 4, 6, 0, 9, 5,10, 7, 3,11); break; + case 3: res = bitswap<16>(enc_word, 3, 8, 1,13,14, 4,15, 0,10, 2, 7,12, 6,11, 9, 5); break; } res ^= param2; @@ -117,7 +117,7 @@ static int decrypt(int const param1, int const param2, int const enc_prev_word, res ^= (param1 << 6) | (param1 << 11); - return BITSWAP16(res, 2,6,0,11,14,12,7,10,5,4,8,3,9,1,13,15); + return bitswap<16>(res, 2,6,0,11,14,12,7,10,5,4,8,3,9,1,13,15); } diff --git a/src/mame/machine/gb.cpp b/src/mame/machine/gb.cpp index 0cc70ba6a17..5c4ff891b7a 100644 --- a/src/mame/machine/gb.cpp +++ b/src/mame/machine/gb.cpp @@ -723,14 +723,14 @@ READ8_MEMBER(megaduck_state::megaduck_video_r) data = m_ppu->video_r(space, offset); if (offset) return data; - return BITSWAP8(data,7,0,5,4,6,3,2,1); + return bitswap<8>(data,7,0,5,4,6,3,2,1); } WRITE8_MEMBER(megaduck_state::megaduck_video_w) { if (!offset) { - data = BITSWAP8(data,7,3,5,4,2,1,0,6); + data = bitswap<8>(data,7,3,5,4,2,1,0,6); } if ((offset & 0x0C) && ((offset & 0x0C) ^ 0x0C)) { diff --git a/src/mame/machine/igs025.cpp b/src/mame/machine/igs025.cpp index c1e1b3d83e9..81affda9c95 100644 --- a/src/mame/machine/igs025.cpp +++ b/src/mame/machine/igs025.cpp @@ -254,7 +254,7 @@ READ16_MEMBER(igs025_device::killbld_igs025_prot_r) switch (m_kb_cmd) { case 0x00: - return BITSWAP8((m_kb_swap + 1) & 0x7f, 0, 1, 2, 3, 4, 5, 6, 7); // drgw3 + return bitswap<8>((m_kb_swap + 1) & 0x7f, 0, 1, 2, 3, 4, 5, 6, 7); // drgw3 case 0x01: return m_kb_reg & 0x7f; @@ -282,7 +282,7 @@ READ16_MEMBER(igs025_device::killbld_igs025_prot_r) return 0x3f00 | ((m_kb_game_id >> 24) & 0xff); default: // >= 5 - return 0x3f00 | BITSWAP8(m_kb_prot_hold, 5, 2, 9, 7, 10, 13, 12, 15); + return 0x3f00 | bitswap<8>(m_kb_prot_hold, 5, 2, 9, 7, 10, 13, 12, 15); } } diff --git a/src/mame/machine/igs036crypt.cpp b/src/mame/machine/igs036crypt.cpp index 4f70e6fdcf6..ee427748084 100644 --- a/src/mame/machine/igs036crypt.cpp +++ b/src/mame/machine/igs036crypt.cpp @@ -98,7 +98,7 @@ uint16_t igs036_decryptor::deobfuscate(uint16_t cipherword, int word_address)con // key-independent manipulation int shift = rotation(word_address); int aux = rol(cipherword, shift); - aux = BITSWAP16(aux, 10,9,8,7,0,15,6,5, 14,13,4,3,12,11,2,1); + aux = bitswap<16>(aux, 10,9,8,7,0,15,6,5, 14,13,4,3,12,11,2,1); return aux; } diff --git a/src/mame/machine/jalcrpt.cpp b/src/mame/machine/jalcrpt.cpp index 45c92d90ce4..9db6afabee1 100644 --- a/src/mame/machine/jalcrpt.cpp +++ b/src/mame/machine/jalcrpt.cpp @@ -19,9 +19,9 @@ void phantasm_rom_decode(running_machine &machine, const char *region) // [0] def0 189a bc56 7234 // [1] fdb9 7531 eca8 6420 // [2] 0123 4567 ba98 fedc -#define BITSWAP_0 BITSWAP16(x,0xd,0xe,0xf,0x0,0x1,0x8,0x9,0xa,0xb,0xc,0x5,0x6,0x7,0x2,0x3,0x4) -#define BITSWAP_1 BITSWAP16(x,0xf,0xd,0xb,0x9,0x7,0x5,0x3,0x1,0xe,0xc,0xa,0x8,0x6,0x4,0x2,0x0) -#define BITSWAP_2 BITSWAP16(x,0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc) +#define BITSWAP_0 bitswap<16>(x,0xd,0xe,0xf,0x0,0x1,0x8,0x9,0xa,0xb,0xc,0x5,0x6,0x7,0x2,0x3,0x4) +#define BITSWAP_1 bitswap<16>(x,0xf,0xd,0xb,0x9,0x7,0x5,0x3,0x1,0xe,0xc,0xa,0x8,0x6,0x4,0x2,0x0) +#define BITSWAP_2 bitswap<16>(x,0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc) if (i < 0x08000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x10000/2) { y = BITSWAP_2; } @@ -54,9 +54,9 @@ void astyanax_rom_decode(running_machine &machine, const char *region) // [1] fdb9 7531 8ace 0246 // [2] 4567 0123 ba98 fedc -#define BITSWAP_0 BITSWAP16(x,0xd,0xe,0xf,0x0,0xa,0x9,0x8,0x1,0x6,0x5,0xc,0xb,0x7,0x2,0x3,0x4) -#define BITSWAP_1 BITSWAP16(x,0xf,0xd,0xb,0x9,0x7,0x5,0x3,0x1,0x8,0xa,0xc,0xe,0x0,0x2,0x4,0x6) -#define BITSWAP_2 BITSWAP16(x,0x4,0x5,0x6,0x7,0x0,0x1,0x2,0x3,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc) +#define BITSWAP_0 bitswap<16>(x,0xd,0xe,0xf,0x0,0xa,0x9,0x8,0x1,0x6,0x5,0xc,0xb,0x7,0x2,0x3,0x4) +#define BITSWAP_1 bitswap<16>(x,0xf,0xd,0xb,0x9,0x7,0x5,0x3,0x1,0x8,0xa,0xc,0xe,0x0,0x2,0x4,0x6) +#define BITSWAP_2 bitswap<16>(x,0x4,0x5,0x6,0x7,0x0,0x1,0x2,0x3,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc) if (i < 0x08000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x10000/2) { y = BITSWAP_2; } @@ -86,10 +86,10 @@ void rodland_rom_decode(running_machine &machine, const char *region) // [0] d0a9 6ebf 5c72 3814 [1] 4567 0123 ba98 fedc // [2] fdb9 ce07 5318 a246 [3] 4512 ed3b a967 08fc -#define BITSWAP_0 BITSWAP16(x,0xd,0x0,0xa,0x9,0x6,0xe,0xb,0xf,0x5,0xc,0x7,0x2,0x3,0x8,0x1,0x4); -#define BITSWAP_1 BITSWAP16(x,0x4,0x5,0x6,0x7,0x0,0x1,0x2,0x3,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc); -#define BITSWAP_2 BITSWAP16(x,0xf,0xd,0xb,0x9,0xc,0xe,0x0,0x7,0x5,0x3,0x1,0x8,0xa,0x2,0x4,0x6); -#define BITSWAP_3 BITSWAP16(x,0x4,0x5,0x1,0x2,0xe,0xd,0x3,0xb,0xa,0x9,0x6,0x7,0x0,0x8,0xf,0xc); +#define BITSWAP_0 bitswap<16>(x,0xd,0x0,0xa,0x9,0x6,0xe,0xb,0xf,0x5,0xc,0x7,0x2,0x3,0x8,0x1,0x4); +#define BITSWAP_1 bitswap<16>(x,0x4,0x5,0x6,0x7,0x0,0x1,0x2,0x3,0xb,0xa,0x9,0x8,0xf,0xe,0xd,0xc); +#define BITSWAP_2 bitswap<16>(x,0xf,0xd,0xb,0x9,0xc,0xe,0x0,0x7,0x5,0x3,0x1,0x8,0xa,0x2,0x4,0x6); +#define BITSWAP_3 bitswap<16>(x,0x4,0x5,0x1,0x2,0xe,0xd,0x3,0xb,0xa,0x9,0x6,0x7,0x0,0x8,0xf,0xc); if (i < 0x08000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x10000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_2;} else {y = BITSWAP_3;} } diff --git a/src/mame/machine/jumpshot.cpp b/src/mame/machine/jumpshot.cpp index 5cf9cb711a4..ef569cf041d 100644 --- a/src/mame/machine/jumpshot.cpp +++ b/src/mame/machine/jumpshot.cpp @@ -37,7 +37,7 @@ uint8_t pacman_state::jumpshot_decrypt(int addr, uint8_t e) method ^= 1; tbl = swap_xor_table[method]; - return BITSWAP8(e,tbl[0],tbl[1],tbl[2],tbl[3],tbl[4],tbl[5],tbl[6],tbl[7]) ^ tbl[8]; + return bitswap<8>(e,tbl[0],tbl[1],tbl[2],tbl[3],tbl[4],tbl[5],tbl[6],tbl[7]) ^ tbl[8]; } diff --git a/src/mame/machine/kaneko_calc3.cpp b/src/mame/machine/kaneko_calc3.cpp index 13ab946a72b..78aa0702d9a 100644 --- a/src/mame/machine/kaneko_calc3.cpp +++ b/src/mame/machine/kaneko_calc3.cpp @@ -1224,14 +1224,14 @@ uint8_t kaneko_calc3_device::shift_bits(uint8_t dat, int bits) { bits &=0x7; - if (bits==0) return BITSWAP8(dat, 7,6,5,4,3,2,1,0); - if (bits==1) return BITSWAP8(dat, 6,5,4,3,2,1,0,7); - if (bits==2) return BITSWAP8(dat, 5,4,3,2,1,0,7,6); - if (bits==3) return BITSWAP8(dat, 4,3,2,1,0,7,6,5); - if (bits==4) return BITSWAP8(dat, 3,2,1,0,7,6,5,4); - if (bits==5) return BITSWAP8(dat, 2,1,0,7,6,5,4,3); - if (bits==6) return BITSWAP8(dat, 1,0,7,6,5,4,3,2); - if (bits==7) return BITSWAP8(dat, 0,7,6,5,4,3,2,1); + if (bits==0) return bitswap<8>(dat, 7,6,5,4,3,2,1,0); + if (bits==1) return bitswap<8>(dat, 6,5,4,3,2,1,0,7); + if (bits==2) return bitswap<8>(dat, 5,4,3,2,1,0,7,6); + if (bits==3) return bitswap<8>(dat, 4,3,2,1,0,7,6,5); + if (bits==4) return bitswap<8>(dat, 3,2,1,0,7,6,5,4); + if (bits==5) return bitswap<8>(dat, 2,1,0,7,6,5,4,3); + if (bits==6) return bitswap<8>(dat, 1,0,7,6,5,4,3,2); + if (bits==7) return bitswap<8>(dat, 0,7,6,5,4,3,2,1); return dat; } diff --git a/src/mame/machine/m24_z8000.cpp b/src/mame/machine/m24_z8000.cpp index 4d253afb1e2..50a38b480ed 100644 --- a/src/mame/machine/m24_z8000.cpp +++ b/src/mame/machine/m24_z8000.cpp @@ -101,7 +101,7 @@ READ16_MEMBER(m24_z8000_device::pmem_r) return 0; offset = (offset & 0x3fff) | (hostseg << 14); if((hostseg >= 40) && (hostseg <= 47)) - offset = (offset & 0xf0000) | BITSWAP16(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); // move A6/A7 so CGA framebuffer appears linear + offset = (offset & 0xf0000) | bitswap<16>(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); // move A6/A7 so CGA framebuffer appears linear ret = m_maincpu->space(AS_PROGRAM).read_word(offset, (mem_mask << 8) | (mem_mask >> 8)); return (ret << 8) | (ret >> 8); } @@ -116,7 +116,7 @@ WRITE16_MEMBER(m24_z8000_device::pmem_w) return; offset = (offset & 0x3fff) | (hostseg << 14); if((hostseg >= 40) && (hostseg <= 47)) - offset = (offset & 0xf0000) | BITSWAP16(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); + offset = (offset & 0xf0000) | bitswap<16>(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); m_maincpu->space(AS_PROGRAM).write_word(offset, data, (mem_mask << 8) | (mem_mask >> 8)); } @@ -136,7 +136,7 @@ READ16_MEMBER(m24_z8000_device::dmem_r) return 0; offset = (offset & 0x3fff) | (hostseg << 14); if((hostseg >= 40) && (hostseg <= 47)) - offset = (offset & 0xf0000) | BITSWAP16(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); + offset = (offset & 0xf0000) | bitswap<16>(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); ret = m_maincpu->space(AS_PROGRAM).read_word(offset, (mem_mask << 8) | (mem_mask >> 8)); return (ret << 8) | (ret >> 8); } @@ -151,7 +151,7 @@ WRITE16_MEMBER(m24_z8000_device::dmem_w) return; offset = (offset & 0x3fff) | (hostseg << 14); if((hostseg >= 40) && (hostseg <= 47)) - offset = (offset & 0xf0000) | BITSWAP16(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); + offset = (offset & 0xf0000) | bitswap<16>(offset,15,7,6,14,13,12,11,10,9,8,5,4,3,2,1,0); m_maincpu->space(AS_PROGRAM).write_word(offset, data, (mem_mask << 8) | (mem_mask >> 8)); } diff --git a/src/mame/machine/mbee.cpp b/src/mame/machine/mbee.cpp index 0fd17f6c88e..2a9335c0780 100644 --- a/src/mame/machine/mbee.cpp +++ b/src/mame/machine/mbee.cpp @@ -279,7 +279,7 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask) data &= 0x3f; // (bits 0-5 are referred to as S0-S5) address_space &mem = m_maincpu->space(AS_PROGRAM); uint8_t *prom = memregion("pals")->base(); - uint8_t b_data = BITSWAP8(data, 7,5,3,2,4,6,1,0) & 0x3b; // arrange data bits to S0,S1,-,S4,S2,S3 + uint8_t b_data = bitswap<8>(data, 7,5,3,2,4,6,1,0) & 0x3b; // arrange data bits to S0,S1,-,S4,S2,S3 uint8_t b_bank, b_byte, b_byte_t, b_addr, p_bank = 1; uint16_t b_vid; char banktag[10]; @@ -291,11 +291,11 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask) for (b_bank = 0; b_bank < 16; b_bank++) { b_vid = b_bank << 12; - b_addr = BITSWAP8(b_bank, 7,4,5,3,1,2,6,0) & 0x1f; // arrange address bits to A12,-,A14,A13,A15 + b_addr = bitswap<8>(b_bank, 7,4,5,3,1,2,6,0) & 0x1f; // arrange address bits to A12,-,A14,A13,A15 // Calculate read-bank b_byte_t = prom[b_addr | (b_data << 8) | 0x82]; // read-bank (RDS and MREQ are low, RFSH is high) - b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used + b_byte = bitswap<8>(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used if (first_time || (b_byte != m_bank_array[p_bank])) { @@ -327,7 +327,7 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask) // Calculate write-bank b_byte_t = prom[b_addr | (b_data << 8) | 0xc0]; // write-bank (XWR and MREQ are low, RFSH is high) - b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used + b_byte = bitswap<8>(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used if (first_time || (b_byte != m_bank_array[p_bank])) { diff --git a/src/mame/machine/mc8123.cpp b/src/mame/machine/mc8123.cpp index 8a4ff955299..bb446f89992 100644 --- a/src/mame/machine/mc8123.cpp +++ b/src/mame/machine/mc8123.cpp @@ -102,10 +102,10 @@ template constexpr u8 BITS(T b, U... c) { return (u8 u8 mc8123_device::decrypt_type0(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,7,5,3,1,2,0,6,4); - if (swap == 1) val = BITSWAP8(val,5,3,7,2,1,0,4,6); - if (swap == 2) val = BITSWAP8(val,0,3,4,6,7,1,5,2); - if (swap == 3) val = BITSWAP8(val,0,7,3,2,6,4,1,5); + if (swap == 0) val = bitswap<8>(val,7,5,3,1,2,0,6,4); + if (swap == 1) val = bitswap<8>(val,5,3,7,2,1,0,4,6); + if (swap == 2) val = bitswap<8>(val,0,3,4,6,7,1,5,2); + if (swap == 3) val = bitswap<8>(val,0,7,3,2,6,4,1,5); if (BIT(param,3) && BIT(val,7)) val ^= BITS(5,3,0); @@ -126,7 +126,7 @@ u8 mc8123_device::decrypt_type0(u8 val, u8 param, unsigned swap) if (BIT(param,1)) val ^= BITS(7,6); if (BIT(param,0)) val ^= BITS(5,0); - if (BIT(param,0)) val = BITSWAP8(val,7,6,5,1,4,3,2,0); + if (BIT(param,0)) val = bitswap<8>(val,7,6,5,1,4,3,2,0); return val; } @@ -134,12 +134,12 @@ u8 mc8123_device::decrypt_type0(u8 val, u8 param, unsigned swap) u8 mc8123_device::decrypt_type1a(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,4,2,6,5,3,7,1,0); - if (swap == 1) val = BITSWAP8(val,6,0,5,4,3,2,1,7); - if (swap == 2) val = BITSWAP8(val,2,3,6,1,4,0,7,5); - if (swap == 3) val = BITSWAP8(val,6,5,1,3,2,7,0,4); + if (swap == 0) val = bitswap<8>(val,4,2,6,5,3,7,1,0); + if (swap == 1) val = bitswap<8>(val,6,0,5,4,3,2,1,7); + if (swap == 2) val = bitswap<8>(val,2,3,6,1,4,0,7,5); + if (swap == 3) val = bitswap<8>(val,6,5,1,3,2,7,0,4); - if (BIT(param,2)) val = BITSWAP8(val,7,6,1,5,3,2,4,0); + if (BIT(param,2)) val = bitswap<8>(val,7,6,1,5,3,2,4,0); if (BIT(val,1)) val ^= BITS(0); if (BIT(val,6)) val ^= BITS(3); @@ -155,17 +155,17 @@ u8 mc8123_device::decrypt_type1a(u8 val, u8 param, unsigned swap) if (BIT(param,3)) val ^= BITS(7,2); if (BIT(param,1)) val ^= BITS(6,3); - if (BIT(param,0)) val = BITSWAP8(val,7,6,1,4,3,2,5,0); + if (BIT(param,0)) val = bitswap<8>(val,7,6,1,4,3,2,5,0); return val; } u8 mc8123_device::decrypt_type1b(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,1,0,3,2,5,6,4,7); - if (swap == 1) val = BITSWAP8(val,2,0,5,1,7,4,6,3); - if (swap == 2) val = BITSWAP8(val,6,4,7,2,0,5,1,3); - if (swap == 3) val = BITSWAP8(val,7,1,3,6,0,2,5,4); + if (swap == 0) val = bitswap<8>(val,1,0,3,2,5,6,4,7); + if (swap == 1) val = bitswap<8>(val,2,0,5,1,7,4,6,3); + if (swap == 2) val = bitswap<8>(val,6,4,7,2,0,5,1,3); + if (swap == 3) val = bitswap<8>(val,7,1,3,6,0,2,5,4); if (BIT(val,2) && BIT(val,0)) val ^= BITS(7,4); @@ -190,13 +190,13 @@ u8 mc8123_device::decrypt_type1b(u8 val, u8 param, unsigned swap) u8 mc8123_device::decrypt_type2a(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,0,1,4,3,5,6,2,7); - if (swap == 1) val = BITSWAP8(val,6,3,0,5,7,4,1,2); - if (swap == 2) val = BITSWAP8(val,1,6,4,5,0,3,7,2); - if (swap == 3) val = BITSWAP8(val,4,6,7,5,2,3,1,0); + if (swap == 0) val = bitswap<8>(val,0,1,4,3,5,6,2,7); + if (swap == 1) val = bitswap<8>(val,6,3,0,5,7,4,1,2); + if (swap == 2) val = bitswap<8>(val,1,6,4,5,0,3,7,2); + if (swap == 3) val = bitswap<8>(val,4,6,7,5,2,3,1,0); if (BIT(val,3) || (BIT(param,1) && BIT(val,2))) - val = BITSWAP8(val,6,0,7,4,3,2,1,5); + val = bitswap<8>(val,6,0,7,4,3,2,1,5); if (BIT(val,5)) val ^= BITS(7); if (BIT(val,6)) val ^= BITS(5); @@ -211,13 +211,13 @@ u8 mc8123_device::decrypt_type2a(u8 val, u8 param, unsigned swap) if (BIT(param,3)) { if (BIT(param,0)) - val = BITSWAP8(val,7,6,5,3,4,1,2,0); + val = bitswap<8>(val,7,6,5,3,4,1,2,0); else - val = BITSWAP8(val,7,6,5,1,2,4,3,0); + val = bitswap<8>(val,7,6,5,1,2,4,3,0); } else if (BIT(param,0)) { - val = BITSWAP8(val,7,6,5,2,1,3,4,0); + val = bitswap<8>(val,7,6,5,2,1,3,4,0); } return val; @@ -228,10 +228,10 @@ u8 mc8123_device::decrypt_type2b(u8 val, u8 param, unsigned swap) // only 0x20 possible encryptions for this method - all others have 0x40 // this happens because BIT(param,2) cancels the other three - if (swap == 0) val = BITSWAP8(val,1,3,4,6,5,7,0,2); - if (swap == 1) val = BITSWAP8(val,0,1,5,4,7,3,2,6); - if (swap == 2) val = BITSWAP8(val,3,5,4,1,6,2,0,7); - if (swap == 3) val = BITSWAP8(val,5,2,3,0,4,7,6,1); + if (swap == 0) val = bitswap<8>(val,1,3,4,6,5,7,0,2); + if (swap == 1) val = bitswap<8>(val,0,1,5,4,7,3,2,6); + if (swap == 2) val = bitswap<8>(val,3,5,4,1,6,2,0,7); + if (swap == 3) val = bitswap<8>(val,5,2,3,0,4,7,6,1); if (BIT(val,7) && BIT(val,3)) val ^= BITS(6,4,0); @@ -263,22 +263,22 @@ u8 mc8123_device::decrypt_type2b(u8 val, u8 param, unsigned swap) u8 mc8123_device::decrypt_type3a(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,5,3,1,7,0,2,6,4); - if (swap == 1) val = BITSWAP8(val,3,1,2,5,4,7,0,6); - if (swap == 2) val = BITSWAP8(val,5,6,1,2,7,0,4,3); - if (swap == 3) val = BITSWAP8(val,5,6,7,0,4,2,1,3); + if (swap == 0) val = bitswap<8>(val,5,3,1,7,0,2,6,4); + if (swap == 1) val = bitswap<8>(val,3,1,2,5,4,7,0,6); + if (swap == 2) val = bitswap<8>(val,5,6,1,2,7,0,4,3); + if (swap == 3) val = bitswap<8>(val,5,6,7,0,4,2,1,3); if (BIT(val,2)) val ^= BITS(7,5,4); if (BIT(val,3)) val ^= BITS(0); - if (BIT(param,0)) val = BITSWAP8(val,7,2,5,4,3,1,0,6); + if (BIT(param,0)) val = bitswap<8>(val,7,2,5,4,3,1,0,6); if (BIT(val,1)) val ^= BITS(6,0); if (BIT(val,3)) val ^= BITS(4,2,1); if (BIT(param,3)) val ^= BITS(4,3); - if (BIT(val,3)) val = BITSWAP8(val,5,6,7,4,3,2,1,0); + if (BIT(val,3)) val = bitswap<8>(val,5,6,7,4,3,2,1,0); if (BIT(val,5)) val ^= BITS(2,1); @@ -293,14 +293,14 @@ u8 mc8123_device::decrypt_type3a(u8 val, u8 param, unsigned swap) u8 mc8123_device::decrypt_type3b(u8 val, u8 param, unsigned swap) { - if (swap == 0) val = BITSWAP8(val,3,7,5,4,0,6,2,1); - if (swap == 1) val = BITSWAP8(val,7,5,4,6,1,2,0,3); - if (swap == 2) val = BITSWAP8(val,7,4,3,0,5,1,6,2); - if (swap == 3) val = BITSWAP8(val,2,6,4,1,3,7,0,5); + if (swap == 0) val = bitswap<8>(val,3,7,5,4,0,6,2,1); + if (swap == 1) val = bitswap<8>(val,7,5,4,6,1,2,0,3); + if (swap == 2) val = bitswap<8>(val,7,4,3,0,5,1,6,2); + if (swap == 3) val = bitswap<8>(val,2,6,4,1,3,7,0,5); if (BIT(val,2)) val ^= BITS(7); - if (BIT(val,7)) val = BITSWAP8(val,7,6,3,4,5,2,1,0); + if (BIT(val,7)) val = bitswap<8>(val,7,6,3,4,5,2,1,0); if (BIT(param,3)) val ^= BITS(7); @@ -315,7 +315,7 @@ u8 mc8123_device::decrypt_type3b(u8 val, u8 param, unsigned swap) if (BIT(param,3)) val ^= BITS(7); if (BIT(param,2)) val ^= BITS(0); - if (BIT(param,3)) val = BITSWAP8(val,4,6,3,2,5,0,1,7); + if (BIT(param,3)) val = bitswap<8>(val,4,6,3,2,5,0,1,7); if (BIT(val,4)) val ^= BITS(1); if (BIT(val,5)) val ^= BITS(4); diff --git a/src/mame/machine/megacd.cpp b/src/mame/machine/megacd.cpp index 10a0ebd6860..ce33cc71a3d 100644 --- a/src/mame/machine/megacd.cpp +++ b/src/mame/machine/megacd.cpp @@ -842,13 +842,13 @@ READ16_MEMBER( sega_segacd_device::segacd_main_dataram_part1_r ) // used by Heart of the Alien if(offset<0x30000/2) /* 0x20000 - 0x2ffff */ // 512x256 bitmap. tiles - offset = BITSWAP24(offset,23,22,21,20,19,18,17,16,15,8,7,6,5,4,3,2,1,14,13,12,11,10,9,0); + offset = bitswap<24>(offset,23,22,21,20,19,18,17,16,15,8,7,6,5,4,3,2,1,14,13,12,11,10,9,0); else if(offset<0x38000/2) /* 0x30000 - 0x37fff */ // 512x128 bitmap. tiles - offset = BITSWAP24(offset,23,22,21,20,19,18,17,16,15,14,7,6,5,4,3,2,1,13,12,11,10,9,8,0); + offset = bitswap<24>(offset,23,22,21,20,19,18,17,16,15,14,7,6,5,4,3,2,1,13,12,11,10,9,8,0); else if(offset<0x3c000/2) /* 0x38000 - 0x3bfff */ // 512x64 bitmap. tiles - offset = BITSWAP24(offset,23,22,21,20,19,18,17,16,15,14,13,6,5,4,3,2,1,12,11,10,9,8,7,0); + offset = bitswap<24>(offset,23,22,21,20,19,18,17,16,15,14,13,6,5,4,3,2,1,12,11,10,9,8,7,0); else /* 0x3c000 - 0x3dfff and 0x3e000 - 0x3ffff */ // 512x32 bitmap (x2) -> tiles - offset = BITSWAP24(offset,23,22,21,20,19,18,17,16,15,14,13,12,5,4,3,2,1,11,10,9,8,7,6,0); + offset = bitswap<24>(offset,23,22,21,20,19,18,17,16,15,14,13,12,5,4,3,2,1,11,10,9,8,7,6,0); offset &=0xffff; // HOTA cares about this diff --git a/src/mame/machine/mexico86.cpp b/src/mame/machine/mexico86.cpp index e473811aae6..cdbccf080a8 100644 --- a/src/mame/machine/mexico86.cpp +++ b/src/mame/machine/mexico86.cpp @@ -106,8 +106,8 @@ void mexico86_state::mcu_simulate( ) m_protection_ram[0x04] = 0x3c | (coin_in_read ^ 3); // coin inputs - m_protection_ram[0x02] = BITSWAP8(ioport("IN1")->read(), 7,6,5,4,2,3,1,0); // player 1 - m_protection_ram[0x03] = BITSWAP8(ioport("IN2")->read(), 7,6,5,4,2,3,1,0); // player 2 + m_protection_ram[0x02] = bitswap<8>(ioport("IN1")->read(), 7,6,5,4,2,3,1,0); // player 1 + m_protection_ram[0x03] = bitswap<8>(ioport("IN2")->read(), 7,6,5,4,2,3,1,0); // player 2 if (m_protection_ram[0x19] == 0xaa) // player 2 active m_protection_ram[0x1b] = m_protection_ram[0x03]; diff --git a/src/mame/machine/mpu4.cpp b/src/mame/machine/mpu4.cpp index 838feffd8fe..e972a5b2649 100644 --- a/src/mame/machine/mpu4.cpp +++ b/src/mame/machine/mpu4.cpp @@ -2567,13 +2567,13 @@ static void descramble_crystal( uint8_t* region, int start, int end, uint8_t ext switch (i & 0x58) { case 0x00: // same as 0x08 - case 0x08: x = BITSWAP8( x^0xca , 3,2,1,0,7,4,6,5 ); break; - case 0x10: x = BITSWAP8( x^0x30 , 3,0,4,6,1,5,7,2 ); break; - case 0x18: x = BITSWAP8( x^0x89 , 4,1,2,5,7,0,6,3 ); break; - case 0x40: x = BITSWAP8( x^0x14 , 6,1,4,3,2,5,0,7 ); break; - case 0x48: x = BITSWAP8( x^0x40 , 1,0,3,2,5,4,7,6 ); break; - case 0x50: x = BITSWAP8( x^0xcb , 3,2,1,0,7,6,5,4 ); break; - case 0x58: x = BITSWAP8( x^0xc0 , 2,3,6,0,5,1,7,4 ); break; + case 0x08: x = bitswap<8>( x^0xca , 3,2,1,0,7,4,6,5 ); break; + case 0x10: x = bitswap<8>( x^0x30 , 3,0,4,6,1,5,7,2 ); break; + case 0x18: x = bitswap<8>( x^0x89 , 4,1,2,5,7,0,6,3 ); break; + case 0x40: x = bitswap<8>( x^0x14 , 6,1,4,3,2,5,0,7 ); break; + case 0x48: x = bitswap<8>( x^0x40 , 1,0,3,2,5,4,7,6 ); break; + case 0x50: x = bitswap<8>( x^0xcb , 3,2,1,0,7,6,5,4 ); break; + case 0x58: x = bitswap<8>( x^0xc0 , 2,3,6,0,5,1,7,4 ); break; } region[i] = x ^ extra_xor; } diff --git a/src/mame/machine/pacplus.cpp b/src/mame/machine/pacplus.cpp index 981ab9af96c..67e09c92552 100644 --- a/src/mame/machine/pacplus.cpp +++ b/src/mame/machine/pacplus.cpp @@ -37,7 +37,7 @@ uint8_t pacman_state::pacplus_decrypt(int addr, uint8_t e) method ^= 1; tbl = swap_xor_table[method]; - return BITSWAP8(e,tbl[0],tbl[1],tbl[2],tbl[3],tbl[4],tbl[5],tbl[6],tbl[7]) ^ tbl[8]; + return bitswap<8>(e,tbl[0],tbl[1],tbl[2],tbl[3],tbl[4],tbl[5],tbl[6],tbl[7]) ^ tbl[8]; } diff --git a/src/mame/machine/pgmprot_igs027a_type1.cpp b/src/mame/machine/pgmprot_igs027a_type1.cpp index adfa59a023f..943b3108474 100644 --- a/src/mame/machine/pgmprot_igs027a_type1.cpp +++ b/src/mame/machine/pgmprot_igs027a_type1.cpp @@ -375,9 +375,9 @@ void pgm_arm_type1_state::pgm_decode_kovlsqh2_tiles() for (i = 0; i < 0x800000 / 2; i++) { - j = BITSWAP24(i, 23, 22, 9, 8, 21, 18, 0, 1, 2, 3, 16, 15, 14, 13, 12, 11, 10, 19, 20, 17, 7, 6, 5, 4); + j = bitswap<24>(i, 23, 22, 9, 8, 21, 18, 0, 1, 2, 3, 16, 15, 14, 13, 12, 11, 10, 19, 20, 17, 7, 6, 5, 4); - dst[j] = BITSWAP16(src[i], 1, 14, 8, 7, 0, 15, 6, 9, 13, 2, 5, 10, 12, 3, 4, 11); + dst[j] = bitswap<16>(src[i], 1, 14, 8, 7, 0, 15, 6, 9, 13, 2, 5, 10, 12, 3, 4, 11); } memcpy( src, &dst[0], 0x800000 ); @@ -390,7 +390,7 @@ void pgm_arm_type1_state::pgm_decode_kovlsqh2_sprites( uint8_t *src ) for (i = 0; i < 0x800000; i++) { - j = BITSWAP24(i, 23, 10, 9, 22, 19, 18, 20, 21, 17, 16, 15, 14, 13, 12, 11, 8, 7, 6, 5, 4, 3, 2, 1, 0); + j = bitswap<24>(i, 23, 10, 9, 22, 19, 18, 20, 21, 17, 16, 15, 14, 13, 12, 11, 8, 7, 6, 5, 4, 3, 2, 1, 0); dst[j] = src[i]; } @@ -418,9 +418,9 @@ void pgm_arm_type1_state::pgm_decode_kovqhsgs_program() for (i = 0; i < 0x400000 / 2; i++) { - int j = BITSWAP24(i, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 6, 7, 5, 4, 3, 2, 1, 0); + int j = bitswap<24>(i, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 6, 7, 5, 4, 3, 2, 1, 0); - dst[j] = BITSWAP16(src[i], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); + dst[j] = bitswap<16>(src[i], 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 4, 5, 3, 2, 1, 0); } memcpy( src, &dst[0], 0x400000 ); @@ -434,7 +434,7 @@ void pgm_arm_type1_state::pgm_decode_kovqhsgs2_program() for (i = 0; i < 0x400000 / 2; i++) { - int j = BITSWAP24(i, 23, 22, 21, 20, 19, 16, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 18, 17, 7); + int j = bitswap<24>(i, 23, 22, 21, 20, 19, 16, 15, 14, 13, 12, 11, 10, 9, 8, 0, 1, 2, 3, 4, 5, 6, 18, 17, 7); dst[j] = src[i]; } diff --git a/src/mame/machine/pgmprot_igs027a_type3.cpp b/src/mame/machine/pgmprot_igs027a_type3.cpp index 5dd50881dfb..2a7860b8c8b 100644 --- a/src/mame/machine/pgmprot_igs027a_type3.cpp +++ b/src/mame/machine/pgmprot_igs027a_type3.cpp @@ -727,7 +727,7 @@ DRIVER_INIT_MEMBER(pgm_arm_type3_state,dmnfrnt) } // -// int j = BITSWAP24(i, 23, 20, 17, 16, 19, 18, 15, 14, 13, 12, 11, 10, 9, 22, 21, 6, 7, 6, 5, 4, 3, 2, 1, 0); +// int j = bitswap<24>(i, 23, 20, 17, 16, 19, 18, 15, 14, 13, 12, 11, 10, 9, 22, 21, 6, 7, 6, 5, 4, 3, 2, 1, 0); // buffer[i] = src[j] // todo, collapse these to an address swap diff --git a/src/mame/machine/pgmprot_orlegend.cpp b/src/mame/machine/pgmprot_orlegend.cpp index 9f6d6aa5aff..6961d24a093 100644 --- a/src/mame/machine/pgmprot_orlegend.cpp +++ b/src/mame/machine/pgmprot_orlegend.cpp @@ -61,7 +61,7 @@ READ16_MEMBER(pgm_asic3_state::pgm_asic3_r) return (m_asic3_latch[2] & 0x7f) | ((ioport("Region")->read() << 6) & 0x80); case 0x03: - return BITSWAP8(m_asic3_hold, 5,2,9,7,10,13,12,15); + return bitswap<8>(m_asic3_hold, 5,2,9,7,10,13,12,15); // case $157674, expected return $157686 case 0x20: return 0x49; // "IGS" diff --git a/src/mame/machine/r2crypt.cpp b/src/mame/machine/r2crypt.cpp index 3101c690f8c..ad297181bc8 100644 --- a/src/mame/machine/r2crypt.cpp +++ b/src/mame/machine/r2crypt.cpp @@ -212,10 +212,10 @@ static uint16_t gm(int i4) static uint32_t core_decrypt(uint32_t ciphertext, int i1, int i2, int i3, int i4, const uint8_t *rotate, const uint8_t *x5, const uint16_t *x11, uint32_t preXor, uint32_t carryMask, uint32_t postXor) { - uint32_t v1 = BITSWAP32(yrot(ciphertext, rotate[i1]), 25,28,15,19, 6,0,3,24, 11,1,2,30, 16,7,22,17, 31,14,23,9, 27,18,4,10, 13,20,5,12, 8,29,26,21); + uint32_t v1 = bitswap<32>(yrot(ciphertext, rotate[i1]), 25,28,15,19, 6,0,3,24, 11,1,2,30, 16,7,22,17, 31,14,23,9, 27,18,4,10, 13,20,5,12, 8,29,26,21); uint16_t x1Low = (x5[i2]<<11) ^ x11[i3] ^ gm(i4); - uint32_t x1 = x1Low | (BITSWAP16(x1Low, 0,8,1,9, 2,10,3,11, 4,12,5,13, 6,14,7,15)<<16); + uint32_t x1 = x1Low | (bitswap<16>(x1Low, 0,8,1,9, 2,10,3,11, 4,12,5,13, 6,14,7,15)<<16); return partial_carry_sum32(v1, x1^preXor, carryMask) ^ postXor; } diff --git a/src/mame/machine/scramble.cpp b/src/mame/machine/scramble.cpp index 2a6f978276b..0684f07a64d 100644 --- a/src/mame/machine/scramble.cpp +++ b/src/mame/machine/scramble.cpp @@ -183,12 +183,12 @@ DRIVER_INIT_MEMBER(scramble_state,frogger) /* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */ ROM = memregion("audiocpu")->base(); for (A = 0;A < 0x0800;A++) - ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1); + ROM[A] = bitswap<8>(ROM[A],7,6,5,4,3,2,0,1); /* likewise, the 2nd gfx ROM has data lines D0 and D1 swapped. Decode it. */ ROM = memregion("gfx1")->base(); for (A = 0x0800;A < 0x1000;A++) - ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1); + ROM[A] = bitswap<8>(ROM[A],7,6,5,4,3,2,0,1); } DRIVER_INIT_MEMBER(scramble_state,froggers) @@ -199,7 +199,7 @@ DRIVER_INIT_MEMBER(scramble_state,froggers) /* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */ ROM = memregion("audiocpu")->base(); for (A = 0;A < 0x0800;A++) - ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1); + ROM[A] = bitswap<8>(ROM[A],7,6,5,4,3,2,0,1); } #endif @@ -223,7 +223,7 @@ DRIVER_INIT_MEMBER(scramble_state,devilfsh) for (j = 0; j < 16; j++) { - offs_t newval = BITSWAP8(j,7,6,5,4,2,0,3,1); + offs_t newval = bitswap<8>(j,7,6,5,4,2,0,3,1); swapbuffer[j] = RAM[i + newval]; } @@ -502,7 +502,7 @@ DRIVER_INIT_MEMBER(scramble_state,hustler) for (A = 0;A < 0x0800;A++) - rom[A] = BITSWAP8(rom[A],7,6,5,4,3,2,0,1); + rom[A] = bitswap<8>(rom[A],7,6,5,4,3,2,0,1); } } @@ -514,7 +514,7 @@ DRIVER_INIT_MEMBER(scramble_state,hustlerd) for (A = 0;A < 0x0800;A++) - rom[A] = BITSWAP8(rom[A],7,6,5,4,3,2,0,1); + rom[A] = bitswap<8>(rom[A],7,6,5,4,3,2,0,1); } DRIVER_INIT_MEMBER(scramble_state,billiard) @@ -545,7 +545,7 @@ DRIVER_INIT_MEMBER(scramble_state,billiard) rom[A] ^= xormask; - rom[A] = BITSWAP8(rom[A],6,1,2,5,4,3,0,7); + rom[A] = bitswap<8>(rom[A],6,1,2,5,4,3,0,7); } /* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */ @@ -554,7 +554,7 @@ DRIVER_INIT_MEMBER(scramble_state,billiard) for (A = 0;A < 0x0800;A++) - rom[A] = BITSWAP8(rom[A],7,6,5,4,3,2,0,1); + rom[A] = bitswap<8>(rom[A],7,6,5,4,3,2,0,1); } } @@ -580,7 +580,7 @@ DRIVER_INIT_MEMBER(scramble_state,ad2083) for (i=0; i(c, 6,2,5,1,7,3,4,0); /* also swapped inside of the bigger module */ ROM[i] = c; } } @@ -650,24 +650,24 @@ DRIVER_INIT_MEMBER(scramble_state,harem) for (int i = 0; i < size; i++) { uint8_t x = ROM[i]; - opcodes[size * 0 + i] = BITSWAP8(x, 7,0,5,2,3,4,1,6); - data [size * 0 + i] = BITSWAP8(x, 7,6,5,0,3,4,1,2); + opcodes[size * 0 + i] = bitswap<8>(x, 7,0,5,2,3,4,1,6); + data [size * 0 + i] = bitswap<8>(x, 7,6,5,0,3,4,1,2); } // decryption 09 for (int i = 0; i < size; i++) { uint8_t x = ROM[i]; - opcodes[size * 1 + i] = BITSWAP8(x, 7,0,5,6,3,2,1,4); - data [size * 1 + i] = BITSWAP8(x, 7,4,5,0,3,6,1,2); + opcodes[size * 1 + i] = bitswap<8>(x, 7,0,5,6,3,2,1,4); + data [size * 1 + i] = bitswap<8>(x, 7,4,5,0,3,6,1,2); } // decryption 0a for (int i = 0; i < size; i++) { uint8_t x = ROM[i]; - opcodes[size * 2 + i] = BITSWAP8(x, 7,2,5,6,3,0,1,4); - data [size * 2 + i] = BITSWAP8(x, 7,2,5,4,3,0,1,6); + opcodes[size * 2 + i] = bitswap<8>(x, 7,2,5,6,3,0,1,4); + data [size * 2 + i] = bitswap<8>(x, 7,2,5,4,3,0,1,6); } membank("rombank")->set_base (m_harem_decrypted_data.get()); diff --git a/src/mame/machine/segacrp2_device.cpp b/src/mame/machine/segacrp2_device.cpp index 2ac88287eeb..38cebe5815c 100644 --- a/src/mame/machine/segacrp2_device.cpp +++ b/src/mame/machine/segacrp2_device.cpp @@ -76,11 +76,11 @@ static void decode(uint8_t *rom, uint8_t *decrypted, /* decode the opcodes */ tbl = swaptable[swap_table[2*row]]; - decrypted[A] = BITSWAP8(src,7,tbl[0],5,tbl[1],3,tbl[2],1,tbl[3]) ^ xor_table[2*row]; + decrypted[A] = bitswap<8>(src,7,tbl[0],5,tbl[1],3,tbl[2],1,tbl[3]) ^ xor_table[2*row]; /* decode the data */ tbl = swaptable[swap_table[2*row+1]]; - rom[A] = BITSWAP8(src,7,tbl[0],5,tbl[1],3,tbl[2],1,tbl[3]) ^ xor_table[2*row+1]; + rom[A] = bitswap<8>(src,7,tbl[0],5,tbl[1],3,tbl[2],1,tbl[3]) ^ xor_table[2*row+1]; } } diff --git a/src/mame/machine/segas32.cpp b/src/mame/machine/segas32.cpp index debf07501dd..2424a498d00 100644 --- a/src/mame/machine/segas32.cpp +++ b/src/mame/machine/segas32.cpp @@ -46,7 +46,7 @@ void segas32_v25_state::decrypt_protrom() // unscramble the address lines for(i = 0; i < 0x10000; i++) - rom[i] = temp[BITSWAP16(i, 14, 11, 15, 12, 13, 4, 3, 7, 5, 10, 2, 8, 9, 6, 1, 0)]; + rom[i] = temp[bitswap<16>(i, 14, 11, 15, 12, 13, 4, 3, 7, 5, 10, 2, 8, 9, 6, 1, 0)]; } diff --git a/src/mame/machine/seibuspi.cpp b/src/mame/machine/seibuspi.cpp index 316e73384ae..d27ff9a39c1 100644 --- a/src/mame/machine/seibuspi.cpp +++ b/src/mame/machine/seibuspi.cpp @@ -171,7 +171,7 @@ void seibuspi_sprite_decrypt(uint8_t *src, int rom_size) /* first of all, permutate 16 of the 48 bits */ bs = spi_bitswap[key_table[addr & 0xff]&0xf]; - y3 = BITSWAP16(y3, bs[0],bs[1],bs[2],bs[3],bs[4],bs[5],bs[6],bs[7], + y3 = bitswap<16>(y3, bs[0],bs[1],bs[2],bs[3],bs[4],bs[5],bs[6],bs[7], bs[8],bs[9],bs[10],bs[11],bs[12],bs[13],bs[14],bs[15]); @@ -350,7 +350,7 @@ void seibuspi_rise10_sprite_decrypt(uint8_t *rom, int size) uint32_t plane54,plane3210; plane54 = rom[0*size+2*i] + (rom[0*size+2*i+1] << 8); - plane3210 = BITSWAP32( + plane3210 = bitswap<32>( rom[2*size+2*i] + (rom[2*size+2*i+1] << 8) + (rom[1*size+2*i] << 16) + (rom[1*size+2*i+1] << 24), 23,13,24,4,16,12,25,30, 3,5,29,17,14,22,2,11, diff --git a/src/mame/machine/subsino.cpp b/src/mame/machine/subsino.cpp index 06cf7901e95..507616ca7c1 100644 --- a/src/mame/machine/subsino.cpp +++ b/src/mame/machine/subsino.cpp @@ -20,50 +20,50 @@ extern const uint8_t victor21_xors[8] = { 0x44, 0xbb, 0x66, 0x44, 0xaa, 0x55, 0x void crsbingo_bitswaps(uint8_t *decrypt, int i) { - if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,0,3,6,5,4 ); - if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i], 3,2,5,0,7,6,1,4 ); - if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,0,3,6,1,4 ); - if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i], 7,6,5,0,3,2,1,4 ); - if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,4,3,6,5,0 ); - if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,0,3,6,5,4 ); - if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i], 3,2,1,0,7,6,5,4 ); + if ((i&7) == 0) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 1) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,0,3,6,5,4 ); + if ((i&7) == 2) decrypt[i] = bitswap<8>(decrypt[i], 3,2,5,0,7,6,1,4 ); + if ((i&7) == 3) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,0,3,6,1,4 ); + if ((i&7) == 4) decrypt[i] = bitswap<8>(decrypt[i], 7,6,5,0,3,2,1,4 ); + if ((i&7) == 5) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,4,3,6,5,0 ); + if ((i&7) == 6) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,0,3,6,5,4 ); + if ((i&7) == 7) decrypt[i] = bitswap<8>(decrypt[i], 3,2,1,0,7,6,5,4 ); } void sharkpy_bitswaps(uint8_t *decrypt, int i) { - if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i], 3,2,1,0,7,6,5,4 ); - if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,4,3,6,5,0 ); - if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i], 3,6,1,0,7,2,5,4 ); - if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i], 3,2,5,4,7,6,1,0 ); - if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i], 7,6,1,4,3,2,5,0 ); - if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i], 3,6,1,4,7,2,5,0 ); + if ((i&7) == 0) decrypt[i] = bitswap<8>(decrypt[i], 3,2,1,0,7,6,5,4 ); + if ((i&7) == 1) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 2) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,4,3,6,5,0 ); + if ((i&7) == 3) decrypt[i] = bitswap<8>(decrypt[i], 3,6,1,0,7,2,5,4 ); + if ((i&7) == 4) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 5) decrypt[i] = bitswap<8>(decrypt[i], 3,2,5,4,7,6,1,0 ); + if ((i&7) == 6) decrypt[i] = bitswap<8>(decrypt[i], 7,6,1,4,3,2,5,0 ); + if ((i&7) == 7) decrypt[i] = bitswap<8>(decrypt[i], 3,6,1,4,7,2,5,0 ); } void victor5_bitswaps(uint8_t *decrypt, int i) { - if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i], 7,6,5,0,3,2,1,4 ); - if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,0,3,6,5,4 ); - if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,0,3,6,5,4 ); - if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i], 3,2,1,0,7,6,5,4 ); - if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i], 7,6,5,0,3,2,1,4 ); - if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i], 3,6,1,0,7,2,5,4 ); - if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,4,3,6,5,0 ); + if ((i&7) == 0) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 1) decrypt[i] = bitswap<8>(decrypt[i], 7,6,5,0,3,2,1,4 ); + if ((i&7) == 2) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,0,3,6,5,4 ); + if ((i&7) == 3) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,0,3,6,5,4 ); + if ((i&7) == 4) decrypt[i] = bitswap<8>(decrypt[i], 3,2,1,0,7,6,5,4 ); + if ((i&7) == 5) decrypt[i] = bitswap<8>(decrypt[i], 7,6,5,0,3,2,1,4 ); + if ((i&7) == 6) decrypt[i] = bitswap<8>(decrypt[i], 3,6,1,0,7,2,5,4 ); + if ((i&7) == 7) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,4,3,6,5,0 ); } void victor21_bitswaps(uint8_t *decrypt, int i) { - if ((i&7) == 0) decrypt[i] = BITSWAP8(decrypt[i], 7,2,1,0,3,6,5,4 ); - if ((i&7) == 1) decrypt[i] = BITSWAP8(decrypt[i], 3,6,1,4,7,2,5,0 ); - if ((i&7) == 2) decrypt[i] = BITSWAP8(decrypt[i], 3,2,1,4,7,6,5,0 ); - if ((i&7) == 3) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 4) decrypt[i] = BITSWAP8(decrypt[i], 7,2,5,4,3,6,1,0 ); - if ((i&7) == 5) decrypt[i] = BITSWAP8(decrypt[i], 3,6,5,0,7,2,1,4 ); - if ((i&7) == 6) decrypt[i] = BITSWAP8(decrypt[i], 7,6,5,4,3,2,1,0 ); - if ((i&7) == 7) decrypt[i] = BITSWAP8(decrypt[i], 3,2,1,4,7,6,5,0 ); + if ((i&7) == 0) decrypt[i] = bitswap<8>(decrypt[i], 7,2,1,0,3,6,5,4 ); + if ((i&7) == 1) decrypt[i] = bitswap<8>(decrypt[i], 3,6,1,4,7,2,5,0 ); + if ((i&7) == 2) decrypt[i] = bitswap<8>(decrypt[i], 3,2,1,4,7,6,5,0 ); + if ((i&7) == 3) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 4) decrypt[i] = bitswap<8>(decrypt[i], 7,2,5,4,3,6,1,0 ); + if ((i&7) == 5) decrypt[i] = bitswap<8>(decrypt[i], 3,6,5,0,7,2,1,4 ); + if ((i&7) == 6) decrypt[i] = bitswap<8>(decrypt[i], 7,6,5,4,3,2,1,0 ); + if ((i&7) == 7) decrypt[i] = bitswap<8>(decrypt[i], 3,2,1,4,7,6,5,0 ); } // Decrypt: diff --git a/src/mame/machine/trs80m2kb.cpp b/src/mame/machine/trs80m2kb.cpp index 97c5dbeceec..1cefe9d5b3c 100644 --- a/src/mame/machine/trs80m2kb.cpp +++ b/src/mame/machine/trs80m2kb.cpp @@ -347,5 +347,5 @@ WRITE8_MEMBER( trs80m2_keyboard_device::kb_p2_w ) */ - m_keylatch = BITSWAP8(data, 7, 6, 5, 4, 0, 1, 2, 3) & 0x0f; + m_keylatch = bitswap<8>(data, 7, 6, 5, 4, 0, 1, 2, 3) & 0x0f; } diff --git a/src/mame/machine/xevious.cpp b/src/mame/machine/xevious.cpp index e4818ba080b..f09677d6daf 100644 --- a/src/mame/machine/xevious.cpp +++ b/src/mame/machine/xevious.cpp @@ -167,7 +167,7 @@ READ8_MEMBER( xevious_state::battles_input_port_r ) switch ( offset ) { default: - case 0: return ~BITSWAP8(ioport("IN0H")->read(),7,6,5,4,2,3,1,0); + case 0: return ~bitswap<8>(ioport("IN0H")->read(),7,6,5,4,2,3,1,0); case 1: return ~ioport("IN1L")->read(); case 2: return ~ioport("IN1H")->read(); case 3: return ~ioport("IN0L")->read(); diff --git a/src/mame/video/agat7.cpp b/src/mame/video/agat7.cpp index 14af493dce7..05480951821 100644 --- a/src/mame/video/agat7.cpp +++ b/src/mame/video/agat7.cpp @@ -172,11 +172,11 @@ void agat7video_device::text_update_lores(screen_device &screen, bitmap_ind16 &b ch = m_ram_dev->read(address); attr = m_ram_dev->read(address + 1); if (BIT(attr, 5)) { - fg = BITSWAP8(attr,7,6,5,3,4,2,1,0) & 15; + fg = bitswap<8>(attr,7,6,5,3,4,2,1,0) & 15; bg = 0; } else { fg = 0; - bg = BITSWAP8(attr,7,6,5,3,4,2,1,0) & 15; + bg = bitswap<8>(attr,7,6,5,3,4,2,1,0) & 15; } plot_text_character(bitmap, col * 16, row, 2, ch, m_char_ptr, m_char_size, fg, bg); } diff --git a/src/mame/video/alesis.cpp b/src/mame/video/alesis.cpp index 20bdc480b4a..5dead01cbd1 100644 --- a/src/mame/video/alesis.cpp +++ b/src/mame/video/alesis.cpp @@ -41,7 +41,7 @@ void alesis_state::update_lcd_symbols(bitmap_ind16 &bitmap, uint8_t pos, uint8_t else m_lcd_digits[0] &= ~(1<<(y-1)); - output().set_value("digit0", BITSWAP8(m_lcd_digits[0],7,3,1,4,6,5,2,0)); + output().set_value("digit0", bitswap<8>(m_lcd_digits[0],7,3,1,4,6,5,2,0)); } break; case 2: @@ -56,7 +56,7 @@ void alesis_state::update_lcd_symbols(bitmap_ind16 &bitmap, uint8_t pos, uint8_t else m_lcd_digits[1] &= ~(1<<(y-1)); - output().set_value("digit1", BITSWAP8(m_lcd_digits[1],7,3,1,4,6,5,2,0)); + output().set_value("digit1", bitswap<8>(m_lcd_digits[1],7,3,1,4,6,5,2,0)); } break; case 3: @@ -84,7 +84,7 @@ void alesis_state::update_lcd_symbols(bitmap_ind16 &bitmap, uint8_t pos, uint8_t else m_lcd_digits[4] &= ~(1<(m_lcd_digits[4],7,3,5,2,0,1,4,6)); } break; } @@ -105,7 +105,7 @@ void alesis_state::update_lcd_symbols(bitmap_ind16 &bitmap, uint8_t pos, uint8_t else m_lcd_digits[3] &= ~(1<(m_lcd_digits[3],7,3,5,2,0,1,4,6)); } break; case 1: @@ -120,7 +120,7 @@ void alesis_state::update_lcd_symbols(bitmap_ind16 &bitmap, uint8_t pos, uint8_t else m_lcd_digits[2] &= ~(1<(m_lcd_digits[2],7,3,5,2,0,1,4,6)); } break; case 2: diff --git a/src/mame/video/apple2.cpp b/src/mame/video/apple2.cpp index a88bdabd748..180ee08aaa0 100644 --- a/src/mame/video/apple2.cpp +++ b/src/mame/video/apple2.cpp @@ -529,7 +529,7 @@ void apple2_state::apple2_video_start(const uint8_t *vram, const uint8_t *aux_vr int len = memregion("gfx1")->bytes(); for (i = 0; i < len; i++) { - apple2_font[i] = BITSWAP8(apple2_font[i], 7, 7, 6, 5, 4, 3, 2, 1); + apple2_font[i] = bitswap<8>(apple2_font[i], 7, 7, 6, 5, 4, 3, 2, 1); } } @@ -544,7 +544,7 @@ void apple2_state::apple2_video_start(const uint8_t *vram, const uint8_t *aux_vr int len = memregion("gfx1")->bytes(); for (i = 0; i < len; i++) { - apple2_font[i] = BITSWAP8(apple2_font[i], 7, 0, 1, 2, 3, 4, 5, 6); + apple2_font[i] = bitswap<8>(apple2_font[i], 7, 0, 1, 2, 3, 4, 5, 6); } } diff --git a/src/mame/video/aussiebyte.cpp b/src/mame/video/aussiebyte.cpp index 495cfd41735..23de8c9b940 100644 --- a/src/mame/video/aussiebyte.cpp +++ b/src/mame/video/aussiebyte.cpp @@ -140,7 +140,7 @@ uint8_t aussiebyte_state::crt8002(uint8_t ac_ra, uint8_t ac_chr, uint8_t ac_attr } break; case 1: // external mode - gfx = BITSWAP8(ac_chr, 0,1,2,3,4,5,6,7); + gfx = bitswap<8>(ac_chr, 0,1,2,3,4,5,6,7); break; case 2: // thin gfx break; diff --git a/src/mame/video/champbas.cpp b/src/mame/video/champbas.cpp index 9faf3776944..6ce7f968f01 100644 --- a/src/mame/video/champbas.cpp +++ b/src/mame/video/champbas.cpp @@ -114,7 +114,7 @@ PALETTE_INIT_MEMBER(champbas_state,exctsccr) /* characters / sprites (3bpp) */ for (int i = 0; i < 0x100; i++) { - int swapped_i = BITSWAP8(i, 2, 7, 6, 5, 4, 3, 1, 0); + int swapped_i = bitswap<8>(i, 2, 7, 6, 5, 4, 3, 1, 0); uint8_t ctabentry = (color_prom[swapped_i] & 0x0f) | ((i & 0x80) >> 3); palette.set_pen_indirect(i, ctabentry); } diff --git a/src/mame/video/cvs.cpp b/src/mame/video/cvs.cpp index afcae1aecf9..f791ac70b54 100644 --- a/src/mame/video/cvs.cpp +++ b/src/mame/video/cvs.cpp @@ -39,7 +39,7 @@ PALETTE_INIT_MEMBER(cvs_state,cvs) uint8_t ctabentry = color_prom[(i << 8) | attr] & 0x07; /* bits 0 and 2 are swapped */ - ctabentry = BITSWAP8(ctabentry,7,6,5,4,3,0,1,2); + ctabentry = bitswap<8>(ctabentry,7,6,5,4,3,0,1,2); palette.set_pen_indirect((attr << 3) | i, ctabentry); } diff --git a/src/mame/video/decocass.cpp b/src/mame/video/decocass.cpp index 7c4708ad6bd..993be2369d4 100644 --- a/src/mame/video/decocass.cpp +++ b/src/mame/video/decocass.cpp @@ -241,7 +241,7 @@ void decocass_state::draw_special_priority(bitmap_ind16 &bitmap, bitmap_ind8 &pr if ((crossing == 0 || BIT(m_mode_set, 6)) && !BIT(m_mode_set, 5)) return; - int color = (BITSWAP8(m_color_center_bot, 0, 1, 7, 2, 3, 4, 5, 6) & 0x27) | 0x08; + int color = (bitswap<8>(m_color_center_bot, 0, 1, 7, 2, 3, 4, 5, 6) & 0x27) | 0x08; int sy = 64 - m_part_v_shift + 1; if (sy < 0) diff --git a/src/mame/video/dynax.cpp b/src/mame/video/dynax.cpp index d8eb4a731d5..6177c371c92 100644 --- a/src/mame/video/dynax.cpp +++ b/src/mame/video/dynax.cpp @@ -38,9 +38,9 @@ PALETTE_INIT_MEMBER(dynax_state,sprtmtch) { int x = (color_prom[i] << 8) + color_prom[0x200 + i]; /* The bits are in reverse order! */ - int r = BITSWAP8((x >> 0) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); - int g = BITSWAP8((x >> 5) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); - int b = BITSWAP8((x >> 10) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int r = bitswap<8>((x >> 0) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int g = bitswap<8>((x >> 5) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); + int b = bitswap<8>((x >> 10) & 0x1f, 7, 6, 5, 0, 1, 2, 3, 4); palette.set_pen_color(i, pal5bit(r), pal5bit(g), pal5bit(b)); } } @@ -56,9 +56,9 @@ PALETTE_INIT_MEMBER(dynax_state,janyuki) { int x = (color_prom[i] << 8) + color_prom[0x200 + i]; /* The bits are in reverse order! */ - int r = BITSWAP8((x >> 0) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); - int g = BITSWAP8((x >> 5) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); - int b = BITSWAP8((x >> 10) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); + int r = bitswap<8>((x >> 0) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); + int g = bitswap<8>((x >> 5) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); + int b = bitswap<8>((x >> 10) & 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); palette.set_pen_color(i, pal4bit(r), pal4bit(g), pal4bit(b)); } } @@ -107,7 +107,7 @@ WRITE8_MEMBER(dynax_state::dynax_blit_dest_w) { m_blit_dest = data; if (m_layer_layout == LAYOUT_HNORIDUR) - m_blit_dest = BITSWAP8(m_blit_dest ^ 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); + m_blit_dest = bitswap<8>(m_blit_dest ^ 0x0f, 7, 6, 5, 4, 0, 1, 2, 3); LOG(("D=%02X ", data)); } @@ -120,7 +120,7 @@ WRITE8_MEMBER(dynax_state::dynax_blit2_dest_w) WRITE8_MEMBER(dynax_state::tenkai_blit_dest_w) { - dynax_blit_dest_w(space, 0, BITSWAP8(data, 7, 6, 5, 4, 0, 1, 2, 3)); + dynax_blit_dest_w(space, 0, bitswap<8>(data, 7, 6, 5, 4, 0, 1, 2, 3)); } /* @@ -129,7 +129,7 @@ mjembase: b d e -> - 2 4 8 */ WRITE8_MEMBER(dynax_state::mjembase_blit_dest_w) { - dynax_blit_dest_w(space, 0, BITSWAP8(data, 7, 6, 5, 4, 2, 3, 1, 0)); + dynax_blit_dest_w(space, 0, bitswap<8>(data, 7, 6, 5, 4, 2, 3, 1, 0)); } @@ -187,7 +187,7 @@ WRITE8_MEMBER(dynax_state::tenkai_blit_palette23_w) WRITE8_MEMBER(dynax_state::mjembase_blit_palette23_w) { - dynax_blit_palette23_w(space, offset, BITSWAP8(data, 3, 2, 1, 0, 7, 6, 5, 4), mem_mask); + dynax_blit_palette23_w(space, offset, bitswap<8>(data, 3, 2, 1, 0, 7, 6, 5, 4), mem_mask); } @@ -1248,7 +1248,7 @@ WRITE8_MEMBER(dynax_state::hanamai_priority_w) WRITE8_MEMBER(dynax_state::tenkai_priority_w) { - m_hanamai_priority = BITSWAP8(data, 3, 2, 1, 0, 4, 7, 5, 6); + m_hanamai_priority = bitswap<8>(data, 3, 2, 1, 0, 4, 7, 5, 6); } /* @@ -1258,7 +1258,7 @@ mjelctrn: priority: 00 20 10 40 30 50; enable: 1,2,8 */ WRITE8_MEMBER(dynax_state::mjembase_priority_w) { - m_hanamai_priority = BITSWAP8(data, 6, 5, 4, 3, 2, 7, 1, 0); + m_hanamai_priority = bitswap<8>(data, 6, 5, 4, 3, 2, 7, 1, 0); } @@ -1377,7 +1377,7 @@ uint32_t dynax_state::screen_update_hanamai(screen_device &screen, bitmap_ind16 uint32_t dynax_state::screen_update_hnoridur(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - int layers_ctrl = ~BITSWAP8(m_hanamai_priority, 7, 6, 5, 4, 0, 1, 2, 3); + int layers_ctrl = ~bitswap<8>(m_hanamai_priority, 7, 6, 5, 4, 0, 1, 2, 3); int lay[4]; int pri; diff --git a/src/mame/video/gsword.cpp b/src/mame/video/gsword.cpp index 46e851c5f4b..a9b7fe22ef5 100644 --- a/src/mame/video/gsword.cpp +++ b/src/mame/video/gsword.cpp @@ -168,7 +168,7 @@ PALETTE_INIT_MEMBER(gsword_state, gsword) /* sprites */ for (unsigned i = 0x100; i < 0x200; i++) { - uint8_t ctabentry = (BITSWAP8(color_prom[i - 0x100],7,6,5,4,0,1,2,3) & 0x0f) | 0x80; + uint8_t ctabentry = (bitswap<8>(color_prom[i - 0x100],7,6,5,4,0,1,2,3) & 0x0f) | 0x80; palette.set_pen_indirect(i, ctabentry); } } diff --git a/src/mame/video/hanaawas.cpp b/src/mame/video/hanaawas.cpp index 5a16724003a..85badce3e8b 100644 --- a/src/mame/video/hanaawas.cpp +++ b/src/mame/video/hanaawas.cpp @@ -56,7 +56,7 @@ PALETTE_INIT_MEMBER(hanaawas_state, hanaawas) 3bpp ones 0x10-0x1f */ for (i = 0; i < 0x100; i++) { - int swapped_i = BITSWAP8(i,2,7,6,5,4,3,1,0); + int swapped_i = bitswap<8>(i,2,7,6,5,4,3,1,0); uint8_t ctabentry = color_prom[swapped_i] & 0x0f; palette.set_pen_indirect(i, ctabentry); } diff --git a/src/mame/video/igs017_igs031.cpp b/src/mame/video/igs017_igs031.cpp index 5a0681f8f21..6b34006f6d5 100644 --- a/src/mame/video/igs017_igs031.cpp +++ b/src/mame/video/igs017_igs031.cpp @@ -145,8 +145,8 @@ void igs017_igs031_device::video_start() for (i = 0; i < size ; i++) { - rom[i] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); -// rom[i^1] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); + rom[i] = bitswap<8>(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); +// rom[i^1] = bitswap<8>(rom[i], 0, 1, 2, 3, 4, 5, 6, 7); } } } diff --git a/src/mame/video/irobot.cpp b/src/mame/video/irobot.cpp index 0d97e8b0e95..8201279ed83 100644 --- a/src/mame/video/irobot.cpp +++ b/src/mame/video/irobot.cpp @@ -53,7 +53,7 @@ PALETTE_INIT_MEMBER(irobot_state, irobot) int g = 28 * ((color_prom[i] >> 4) & 0x03) * intensity; int b = 28 * ((color_prom[i] >> 2) & 0x03) * intensity; - int swapped_i = BITSWAP8(i,7,6,5,4,3,0,1,2); + int swapped_i = bitswap<8>(i,7,6,5,4,3,0,1,2); palette.set_pen_color(swapped_i + 64, rgb_t(r, g, b)); } diff --git a/src/mame/video/kan_pand.cpp b/src/mame/video/kan_pand.cpp index 8f4d4edf3e3..91ca22fb3b1 100644 --- a/src/mame/video/kan_pand.cpp +++ b/src/mame/video/kan_pand.cpp @@ -235,7 +235,7 @@ WRITE8_MEMBER ( kaneko_pandora_device::spriteram_w ) { // it's either hooked up oddly on this, or on the 16-bit games // either way, we swap the address lines so that the spriteram is in the same format - offset = BITSWAP16(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); + offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); if (!m_spriteram) { @@ -256,7 +256,7 @@ READ8_MEMBER( kaneko_pandora_device::spriteram_r ) { // it's either hooked up oddly on this, or on the 16-bit games // either way, we swap the address lines so that the spriteram is in the same format - offset = BITSWAP16(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); + offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); if (!m_spriteram) { diff --git a/src/mame/video/kingobox.cpp b/src/mame/video/kingobox.cpp index 8335f5155d7..9a81d46f9d1 100644 --- a/src/mame/video/kingobox.cpp +++ b/src/mame/video/kingobox.cpp @@ -211,7 +211,7 @@ void kingofb_state::kingofb_draw_sprites(bitmap_ind16 &bitmap, const rectangle & int roffs, bank, code, color, flipx, flipy, sx, sy; /* the offset into spriteram seems scrambled */ - roffs = BITSWAP16(offs,15,14,13,12,11,10,4,7,6,5,9,8,3,2,1,0) ^ 0x3c; + roffs = bitswap<16>(offs,15,14,13,12,11,10,4,7,6,5,9,8,3,2,1,0) ^ 0x3c; if (roffs & 0x200) roffs ^= 0x1c0; diff --git a/src/mame/video/ladybug.cpp b/src/mame/video/ladybug.cpp index 3f2baa4148e..0c7268f6460 100644 --- a/src/mame/video/ladybug.cpp +++ b/src/mame/video/ladybug.cpp @@ -83,10 +83,10 @@ void ladybug_state::palette_init_common( palette_device &palette, const uint8_t { uint8_t ctabentry = color_prom[(i - 0x20) >> 1]; - ctabentry = BITSWAP8((color_prom[i - 0x20] >> 0) & 0x0f, 7,6,5,4,0,1,2,3); + ctabentry = bitswap<8>((color_prom[i - 0x20] >> 0) & 0x0f, 7,6,5,4,0,1,2,3); palette.set_pen_indirect(i + 0x00, ctabentry); - ctabentry = BITSWAP8((color_prom[i - 0x20] >> 4) & 0x0f, 7,6,5,4,0,1,2,3); + ctabentry = bitswap<8>((color_prom[i - 0x20] >> 4) & 0x0f, 7,6,5,4,0,1,2,3); palette.set_pen_indirect(i + 0x20, ctabentry); } } diff --git a/src/mame/video/mbee.cpp b/src/mame/video/mbee.cpp index 37c12ec5135..deba6df738e 100644 --- a/src/mame/video/mbee.cpp +++ b/src/mame/video/mbee.cpp @@ -434,7 +434,7 @@ PALETTE_INIT_MEMBER( mbee_state, standard ) for (r1 = 0; r1 < 4; r1++) { r = bglevel[r1]; - k = BITSWAP8(i, 7, 6, 5, 3, 1, 4, 2, 0); + k = bitswap<8>(i, 7, 6, 5, 3, 1, 4, 2, 0); palette.set_pen_color(k, rgb_t(r, g, b)); i++; } diff --git a/src/mame/video/mz700.cpp b/src/mame/video/mz700.cpp index 0bb0bdd4c07..9a919f920a2 100644 --- a/src/mame/video/mz700.cpp +++ b/src/mame/video/mz700.cpp @@ -32,7 +32,7 @@ uint32_t mz_state::screen_update_mz700(screen_device &screen, bitmap_ind16 &bitm if (col != oldcol) { oldcol = col; - col = BITSWAP8(col, 7, 3, 4, 6, 5, 0, 2, 1); // turn BRG into RGB + col = bitswap<8>(col, 7, 3, 4, 6, 5, 0, 2, 1); // turn BRG into RGB bg = col & 7; fg = (col >> 3) & 7; } diff --git a/src/mame/video/naughtyb.cpp b/src/mame/video/naughtyb.cpp index d566a8ea75d..5b395f64a65 100644 --- a/src/mame/video/naughtyb.cpp +++ b/src/mame/video/naughtyb.cpp @@ -91,7 +91,7 @@ PALETTE_INIT_MEMBER(naughtyb_state, naughtyb) bit1 = (color_prom[i+0x100] >> 1) & 0x01; b = combine_2_weights(weights, bit0, bit1); - palette.set_pen_color(BITSWAP8(i,5,7,6,2,1,0,4,3), rgb_t(r, g, b)); + palette.set_pen_color(bitswap<8>(i,5,7,6,2,1,0,4,3), rgb_t(r, g, b)); } } diff --git a/src/mame/video/nmk16.cpp b/src/mame/video/nmk16.cpp index d73670721f0..b48d678b225 100644 --- a/src/mame/video/nmk16.cpp +++ b/src/mame/video/nmk16.cpp @@ -486,7 +486,7 @@ void nmk16_state::nmk16_draw_sprites_swap(bitmap_ind16 &bitmap, const rectangle for (i = 0; i < 0x100; i++) { - int spr = BITSWAP8(i, bittbl[0], bittbl[1], bittbl[2], bittbl[3], bittbl[4], bittbl[5], bittbl[6], bittbl[7]); + int spr = bitswap<8>(i, bittbl[0], bittbl[1], bittbl[2], bittbl[3], bittbl[4], bittbl[5], bittbl[6], bittbl[7]); nmk16_draw_sprite(bitmap, cliprect, m_spriteram_old2.get() + (spr * 16/2)); } } @@ -497,7 +497,7 @@ void nmk16_state::nmk16_draw_sprites_swap_flipsupported(bitmap_ind16 &bitmap, co for ( i = 0; i < 0x100; i++ ) { - int spr = BITSWAP8(i, bittbl[0], bittbl[1], bittbl[2], bittbl[3], bittbl[4], bittbl[5], bittbl[6], bittbl[7]); + int spr = bitswap<8>(i, bittbl[0], bittbl[1], bittbl[2], bittbl[3], bittbl[4], bittbl[5], bittbl[6], bittbl[7]); nmk16_draw_sprite_flipsupported(bitmap, cliprect, m_spriteram_old2.get() + (spr * 16/2)); } } diff --git a/src/mame/video/pc9801.cpp b/src/mame/video/pc9801.cpp index e9c49d27169..c8305605156 100644 --- a/src/mame/video/pc9801.cpp +++ b/src/mame/video/pc9801.cpp @@ -470,14 +470,14 @@ WRITE16_MEMBER(pc9801_state::tvram_w) /* +0x8000 is trusted (bank 0 is actually used by 16 colors mode) */ READ8_MEMBER(pc9801_state::gvram_r) { - return BITSWAP8(m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] >> ((offset & 1) << 3),0,1,2,3,4,5,6,7); + return bitswap<8>(m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] >> ((offset & 1) << 3),0,1,2,3,4,5,6,7); } WRITE8_MEMBER(pc9801_state::gvram_w) { uint16_t ram = m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000]; int mask = (offset & 1) << 3; - data = BITSWAP8(data,0,1,2,3,4,5,6,7); + data = bitswap<8>(data,0,1,2,3,4,5,6,7); m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask); } diff --git a/src/mame/video/pingpong.cpp b/src/mame/video/pingpong.cpp index aee2b1a53b0..cced6922ada 100644 --- a/src/mame/video/pingpong.cpp +++ b/src/mame/video/pingpong.cpp @@ -77,7 +77,7 @@ PALETTE_INIT_MEMBER(pingpong_state, pingpong) /* sprites */ for (i = 0x100; i < 0x200; i++) { - uint8_t ctabentry = BITSWAP8(color_prom[i],7,6,5,4,0,1,2,3); + uint8_t ctabentry = bitswap<8>(color_prom[i],7,6,5,4,0,1,2,3); palette.set_pen_indirect(i, ctabentry); } } diff --git a/src/mame/video/redclash.cpp b/src/mame/video/redclash.cpp index 49df7515913..44e98d6a8e8 100644 --- a/src/mame/video/redclash.cpp +++ b/src/mame/video/redclash.cpp @@ -88,10 +88,10 @@ PALETTE_INIT_MEMBER(redclash_state,redclash) { uint8_t ctabentry = color_prom[(i - 0x20) >> 1]; - ctabentry = BITSWAP8((color_prom[i - 0x20] >> 0) & 0x0f, 7,6,5,4,0,1,2,3); + ctabentry = bitswap<8>((color_prom[i - 0x20] >> 0) & 0x0f, 7,6,5,4,0,1,2,3); palette.set_pen_indirect(i + 0x00, ctabentry); - ctabentry = BITSWAP8((color_prom[i - 0x20] >> 4) & 0x0f, 7,6,5,4,0,1,2,3); + ctabentry = bitswap<8>((color_prom[i - 0x20] >> 4) & 0x0f, 7,6,5,4,0,1,2,3); palette.set_pen_indirect(i + 0x20, ctabentry); } diff --git a/src/mame/video/retofinv.cpp b/src/mame/video/retofinv.cpp index 34997a7409c..9495db81777 100644 --- a/src/mame/video/retofinv.cpp +++ b/src/mame/video/retofinv.cpp @@ -45,7 +45,7 @@ PALETTE_INIT_MEMBER(retofinv_state, retofinv) for (i = 0; i < 0x800; i++) { // descramble the address - int j = BITSWAP16(i,15,14,13,12,11,10,9,8,7,6,5,4,3,0,1,2); + int j = bitswap<16>(i,15,14,13,12,11,10,9,8,7,6,5,4,3,0,1,2); palette.set_pen_indirect(i + 0x200, clut_prom[j]); } } @@ -83,7 +83,7 @@ PALETTE_INIT_MEMBER(retofinv_state, retofinv_bl) for (i = 0; i < 0x800; i++) { // descramble the data - palette.set_pen_indirect(i + 0x200, BITSWAP8(clut_prom[i], 4,5,6,7,3,2,1,0)); + palette.set_pen_indirect(i + 0x200, bitswap<8>(clut_prom[i], 4,5,6,7,3,2,1,0)); } } diff --git a/src/mame/video/segaic16.cpp b/src/mame/video/segaic16.cpp index 061ce37988a..37df010a341 100644 --- a/src/mame/video/segaic16.cpp +++ b/src/mame/video/segaic16.cpp @@ -457,7 +457,7 @@ void draw_virtual_tilemap(screen_device &screen, segaic16_video_device::tilemap_ if (info->flip) { - pages = BITSWAP16(pages, + pages = bitswap<16>(pages, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, diff --git a/src/mame/video/seibu_crtc.cpp b/src/mame/video/seibu_crtc.cpp index 24a9dcc7f41..32c25de13c7 100644 --- a/src/mame/video/seibu_crtc.cpp +++ b/src/mame/video/seibu_crtc.cpp @@ -370,10 +370,10 @@ WRITE16_MEMBER( seibu_crtc_device::write ) /* Sky Smasher / Raiden DX swaps registers [0x10] with [0x20] */ READ16_MEMBER( seibu_crtc_device::read_alt ) { - return read_word(BITSWAP16(offset,15,14,13,12,11,10,9,8,7,6,5,3,4,2,1,0)); + return read_word(bitswap<16>(offset,15,14,13,12,11,10,9,8,7,6,5,3,4,2,1,0)); } WRITE16_MEMBER( seibu_crtc_device::write_alt ) { - write_word(BITSWAP16(offset,15,14,13,12,11,10,9,8,7,6,5,3,4,2,1,0),data); + write_word(bitswap<16>(offset,15,14,13,12,11,10,9,8,7,6,5,3,4,2,1,0),data); } diff --git a/src/mame/video/seibuspi.cpp b/src/mame/video/seibuspi.cpp index 1cadd8798f5..78dfa18d159 100644 --- a/src/mame/video/seibuspi.cpp +++ b/src/mame/video/seibuspi.cpp @@ -40,7 +40,7 @@ custom CRTC on startup!! (writes to 000414) static uint32_t decrypt_tile(uint32_t val, int tileno, uint32_t key1, uint32_t key2, uint32_t key3) { - val = BITSWAP24(val, 18,19,9,5, 10,17,16,20, 21,22,6,11, 15,14,4,23, 0,1,7,8, 13,12,3,2); + val = bitswap<24>(val, 18,19,9,5, 10,17,16,20, 21,22,6,11, 15,14,4,23, 0,1,7,8, 13,12,3,2); return partial_carry_sum24( val, tileno + key1, key2 ) ^ key3; } diff --git a/src/mame/video/snookr10.cpp b/src/mame/video/snookr10.cpp index 7392af1afe6..fb854d72d07 100644 --- a/src/mame/video/snookr10.cpp +++ b/src/mame/video/snookr10.cpp @@ -150,7 +150,7 @@ PALETTE_INIT_MEMBER(snookr10_state, apple10) g = combine_2_weights(weights_g, bit0, bit1); /* encrypted color matrix */ - cn = BITSWAP8(i,4,5,6,7,2,3,0,1); + cn = bitswap<8>(i,4,5,6,7,2,3,0,1); palette.set_pen_color(cn, rgb_t(r,g,b)); } @@ -165,7 +165,7 @@ TILE_GET_INFO_MEMBER(snookr10_state::apple10_get_bg_tile_info) */ int offs = tile_index; int attr = m_videoram[offs] + (m_colorram[offs] << 8); - int code = BITSWAP16((attr & 0xfff),15,14,13,12,8,9,10,11,0,1,2,3,4,5,6,7); /* encrypted tile matrix */ + int code = bitswap<16>((attr & 0xfff),15,14,13,12,8,9,10,11,0,1,2,3,4,5,6,7); /* encrypted tile matrix */ int color = m_colorram[offs] >> 4; SET_TILE_INFO_MEMBER(0, code, color, 0); @@ -219,7 +219,7 @@ PALETTE_INIT_MEMBER(snookr10_state, crystalc) g = combine_2_weights(weights_g, bit0, bit1); /* encrypted color matrix */ - cn = BITSWAP8(i,7,5,6,4,3,2,1,0); + cn = bitswap<8>(i,7,5,6,4,3,2,1,0); palette.set_pen_color(cn, rgb_t(r,g,b)); } @@ -234,7 +234,7 @@ TILE_GET_INFO_MEMBER(snookr10_state::crystalc_get_bg_tile_info) */ int offs = tile_index; int attr = m_videoram[offs] + (m_colorram[offs] << 8); - int code = BITSWAP16((attr & 0xfff),15,14,13,12,0,10,5,1,7,6,9,4,3,2,8,11); /* encrypted tile matrix */ + int code = bitswap<16>((attr & 0xfff),15,14,13,12,0,10,5,1,7,6,9,4,3,2,8,11); /* encrypted tile matrix */ int color = m_colorram[offs] >> 4; SET_TILE_INFO_MEMBER(0, code, color, 0); diff --git a/src/mame/video/splash.cpp b/src/mame/video/splash.cpp index 0ccceadb7b1..766f6b62c68 100644 --- a/src/mame/video/splash.cpp +++ b/src/mame/video/splash.cpp @@ -78,9 +78,8 @@ WRITE16_MEMBER(splash_state::vram_w) void splash_state::draw_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect) { - int sx,sy,color,count,colxor,bitswap; - colxor = 0; /* splash and some bitmap modes in roldfrog */ - bitswap = 0; + int colxor = 0; /* splash and some bitmap modes in roldfrog */ + int swaps = 0; if (m_bitmap_type == 1) /* roldfrog */ { @@ -90,7 +89,7 @@ void splash_state::draw_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect) } else if (m_bitmap_mode[0] == 0x0100) { - bitswap = 1; + swaps = 1; } else if (m_bitmap_mode[0] == 0x0200) { @@ -98,56 +97,56 @@ void splash_state::draw_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect) } else if (m_bitmap_mode[0] == 0x0300) { - bitswap = 2; + swaps = 2; colxor = 0x7f; } else if (m_bitmap_mode[0] == 0x0400) { - bitswap = 3; + swaps = 3; } else if (m_bitmap_mode[0] == 0x0500) { - bitswap = 4; + swaps = 4; } else if (m_bitmap_mode[0] == 0x0600) { - bitswap = 5; + swaps = 5; colxor = 0x7f; } else if (m_bitmap_mode[0] == 0x0700) { - bitswap = 6; + swaps = 6; colxor = 0x55; } } - count = 0; - for (sy=0;sy<256;sy++) + int count = 0; + for (int sy=0;sy<256;sy++) { - for (sx=0;sx<512;sx++) + for (int sx=0;sx<512;sx++) { - color = m_pixelram[count]&0xff; + int color = m_pixelram[count]&0xff; count++; - switch( bitswap ) + switch (swaps) { case 1: - color = BITSWAP8(color,7,0,1,2,3,4,5,6); + color = bitswap<8>(color,7,0,1,2,3,4,5,6); break; case 2: - color = BITSWAP8(color,7,4,6,5,1,0,3,2); + color = bitswap<8>(color,7,4,6,5,1,0,3,2); break; case 3: - color = BITSWAP8(color,7,3,2,1,0,6,5,4); + color = bitswap<8>(color,7,3,2,1,0,6,5,4); break; case 4: - color = BITSWAP8(color,7,6,4,2,0,5,3,1); + color = bitswap<8>(color,7,6,4,2,0,5,3,1); break; case 5: - color = BITSWAP8(color,7,0,6,5,4,3,2,1); + color = bitswap<8>(color,7,0,6,5,4,3,2,1); break; case 6: - color = BITSWAP8(color,7,4,3,2,1,0,6,5); + color = bitswap<8>(color,7,4,3,2,1,0,6,5); break; } diff --git a/src/mame/video/thepit.cpp b/src/mame/video/thepit.cpp index cafd9733df8..51086bc601e 100644 --- a/src/mame/video/thepit.cpp +++ b/src/mame/video/thepit.cpp @@ -79,8 +79,8 @@ PALETTE_INIT_MEMBER(thepit_state,suprmous) for (i = 0; i < 32; i++) { - uint8_t b = BITSWAP8(color_prom[i + 0x00], 0, 1, 2, 3, 4, 5, 6, 7); - uint8_t g = BITSWAP8(color_prom[i + 0x20], 0, 1, 2, 3, 4, 5, 6, 7); + uint8_t b = bitswap<8>(color_prom[i + 0x00], 0, 1, 2, 3, 4, 5, 6, 7); + uint8_t g = bitswap<8>(color_prom[i + 0x20], 0, 1, 2, 3, 4, 5, 6, 7); uint8_t r = (b>>5&7)<<2 | (g>>6&3); palette.set_pen_color(i, pal5bit(r), pal5bit(g), pal4bit(b)); diff --git a/src/mame/video/tia.cpp b/src/mame/video/tia.cpp index f4571c1763c..ccb84349389 100644 --- a/src/mame/video/tia.cpp +++ b/src/mame/video/tia.cpp @@ -447,7 +447,7 @@ void tia_video_device::draw_sprite_helper(uint8_t* p, uint8_t *col, struct playe if (REFP & 8) { - GRP = BITSWAP8(GRP, 0, 1, 2, 3, 4, 5, 6, 7); + GRP = bitswap<8>(GRP, 0, 1, 2, 3, 4, 5, 6, 7); } for (i = 0; i < PLAYER_GFX_SLOTS; i++) @@ -539,9 +539,9 @@ void tia_video_device::draw_playfield_helper(uint8_t* p, uint8_t* col, int horz, uint8_t COLU, uint8_t REFPF) { uint32_t PF = - (BITSWAP8(PF0, 0, 1, 2, 3, 4, 5, 6, 7) << 0x10) | - (BITSWAP8(PF1, 7, 6, 5, 4, 3, 2, 1, 0) << 0x08) | - (BITSWAP8(PF2, 0, 1, 2, 3, 4, 5, 6, 7) << 0x00); + (bitswap<8>(PF0, 0, 1, 2, 3, 4, 5, 6, 7) << 0x10) | + (bitswap<8>(PF1, 7, 6, 5, 4, 3, 2, 1, 0) << 0x08) | + (bitswap<8>(PF2, 0, 1, 2, 3, 4, 5, 6, 7) << 0x00); int i; int j; diff --git a/src/mame/video/tx1.cpp b/src/mame/video/tx1.cpp index 019b007d18f..dabfc0a9ae3 100644 --- a/src/mame/video/tx1.cpp +++ b/src/mame/video/tx1.cpp @@ -1499,7 +1499,7 @@ void tx1_state::buggyboy_get_roadpix(int screen, int ls161, uint8_t rva0_6, uint *rc3 = d0 & d1; if (rom_flip) - *rc3 = BITSWAP8(*rc3, 0, 1, 2, 3, 4, 5, 6, 7); + *rc3 = bitswap<8>(*rc3, 0, 1, 2, 3, 4, 5, 6, 7); } else *rc3 = 0; diff --git a/src/mame/video/xevious.cpp b/src/mame/video/xevious.cpp index 2429afd8900..9d336b437f2 100644 --- a/src/mame/video/xevious.cpp +++ b/src/mame/video/xevious.cpp @@ -259,7 +259,7 @@ READ8_MEMBER( xevious_state::xevious_bb_r ) /* return BB0 */ dat2 = rom2c[adr_2c]; /* swap bit 6 & 7 */ - dat2 = BITSWAP8(dat2, 6,7,5,4,3,2,1,0); + dat2 = bitswap<8>(dat2, 6,7,5,4,3,2,1,0); /* flip x & y */ if (dat1 & 0x400) dat2 ^= 0x40; if (dat1 & 0x200) dat2 ^= 0x80; -- cgit v1.2.3-70-g09d2 From b6ca334e31c8406624fecb936cb044eed5ac1e90 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 13 Dec 2017 19:54:26 +1100 Subject: pgm2: use optional_device_array (nw) --- src/mame/drivers/pgm2.cpp | 51 +++++++++++++++++++++-------------------------- src/mame/includes/pgm2.h | 12 ++--------- 2 files changed, 25 insertions(+), 38 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index cc53cce7b50..a439f84ee01 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -205,20 +205,20 @@ void pgm2_state::mcu_command(address_space &space, bool is_command) break; // C0-C9 commands is IC Card RW comms case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card - if (m_memcard_device[arg1 & 3]->present() == -1) + if (m_memcard[arg1 & 3]->present() == -1) status = 0xf4; m_mcu_result0 = cmd; break; case 0xc1: // check ready/busy ? - if (m_memcard_device[arg1 & 3]->present() == -1) + if (m_memcard[arg1 & 3]->present() == -1) status = 0xf4; m_mcu_result0 = cmd; break; case 0xc2: // read data to shared ram for (int i = 0; i < arg3; i++) { - if (m_memcard_device[arg1 & 3]->present() != -1) - m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard_device[arg1 & 3]->read(space, arg2 + i); + if (m_memcard[arg1 & 3]->present() != -1) + m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard[arg1 & 3]->read(space, arg2 + i); else status = 0xf4; } @@ -227,60 +227,60 @@ void pgm2_state::mcu_command(address_space &space, bool is_command) case 0xc3: // save data from shared ram for (int i = 0; i < arg3; i++) { - if (m_memcard_device[arg1 & 3]->present() != -1) - m_memcard_device[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]); + if (m_memcard[arg1 & 3]->present() != -1) + m_memcard[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]); else status = 0xf4; } m_mcu_result0 = cmd; break; case 0xc4: // presumable read security mem (password only?) - if (m_memcard_device[arg1 & 3]->present() != -1) + if (m_memcard[arg1 & 3]->present() != -1) { - m_mcu_result1 = m_memcard_device[arg1 & 3]->read_sec(space, 1) | - (m_memcard_device[arg1 & 3]->read_sec(space, 2) << 8) | - (m_memcard_device[arg1 & 3]->read_sec(space, 3) << 16); + m_mcu_result1 = m_memcard[arg1 & 3]->read_sec(space, 1) | + (m_memcard[arg1 & 3]->read_sec(space, 2) << 8) | + (m_memcard[arg1 & 3]->read_sec(space, 3) << 16); } else status = 0xf4; m_mcu_result0 = cmd; break; case 0xc5: // write security mem - if (m_memcard_device[arg1 & 3]->present() != -1) - m_memcard_device[arg1 & 3]->write_sec(space, arg2 & 3, arg3); + if (m_memcard[arg1 & 3]->present() != -1) + m_memcard[arg1 & 3]->write_sec(space, arg2 & 3, arg3); else status = 0xf4; m_mcu_result0 = cmd; break; case 0xc6: // presumable write protection mem - if (m_memcard_device[arg1 & 3]->present() != -1) - m_memcard_device[arg1 & 3]->write_prot(space, arg2 & 3, arg3); + if (m_memcard[arg1 & 3]->present() != -1) + m_memcard[arg1 & 3]->write_prot(space, arg2 & 3, arg3); else status = 0xf4; m_mcu_result0 = cmd; break; case 0xc7: // read protection mem - if (m_memcard_device[arg1 & 3]->present() != -1) + if (m_memcard[arg1 & 3]->present() != -1) { - m_mcu_result1 = m_memcard_device[arg1 & 3]->read_prot(space, 0) | - (m_memcard_device[arg1 & 3]->read_prot(space, 1) << 8) | - (m_memcard_device[arg1 & 3]->read_prot(space, 2) << 16) | - (m_memcard_device[arg1 & 3]->read_prot(space, 3) << 24); + m_mcu_result1 = m_memcard[arg1 & 3]->read_prot(space, 0) | + (m_memcard[arg1 & 3]->read_prot(space, 1) << 8) | + (m_memcard[arg1 & 3]->read_prot(space, 2) << 16) | + (m_memcard[arg1 & 3]->read_prot(space, 3) << 24); } else status = 0xf4; m_mcu_result0 = cmd; break; case 0xc8: // write data mem - if (m_memcard_device[arg1 & 3]->present() != -1) - m_memcard_device[arg1 & 3]->write(space, arg2, arg3); + if (m_memcard[arg1 & 3]->present() != -1) + m_memcard[arg1 & 3]->write(space, arg2, arg3); else status = 0xf4; m_mcu_result0 = cmd; break; case 0xc9: // card authentication - if (m_memcard_device[arg1 & 3]->present() != -1) - m_memcard_device[arg1 & 3]->auth(arg2, arg3, m_mcu_regs[1] & 0xff); + if (m_memcard[arg1 & 3]->present() != -1) + m_memcard[arg1 & 3]->auth(arg2, arg3, m_mcu_regs[1] & 0xff); else status = 0xf4; m_mcu_result0 = cmd; @@ -481,11 +481,6 @@ void pgm2_state::machine_start() save_item(NAME(m_mcu_last_cmd)); save_item(NAME(m_shareram)); save_item(NAME(m_share_bank)); - - m_memcard_device[0] = m_memcard0; - m_memcard_device[1] = m_memcard1; - m_memcard_device[2] = m_memcard2; - m_memcard_device[3] = m_memcard3; } void pgm2_state::machine_reset() diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index c31ee657c4a..1447a5d6fc6 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -41,10 +41,7 @@ public: m_bg_palette(*this, "bg_palette"), m_tx_palette(*this, "tx_palette"), m_mcu_timer(*this, "mcu_timer"), - m_memcard0(*this, "memcard_p1"), - m_memcard1(*this, "memcard_p2"), - m_memcard2(*this, "memcard_p3"), - m_memcard3(*this, "memcard_p4") + m_memcard(*this, "memcard_p%u", 1U) { } DECLARE_READ32_MEMBER(unk_startup_r); @@ -143,12 +140,7 @@ private: required_device m_tx_palette; required_device m_mcu_timer; - optional_device m_memcard0; - optional_device m_memcard1; - optional_device m_memcard2; - optional_device m_memcard3; - pgm2_memcard_device *m_memcard_device[4]; - + optional_device_array m_memcard; }; #endif -- cgit v1.2.3-70-g09d2 From 3334442d5b2cbd862b503e16854a4c8a8dfb5cdb Mon Sep 17 00:00:00 2001 From: r09 Date: Wed, 13 Dec 2017 11:07:49 +0100 Subject: fmtowns: implement half-size mode for sprites (#2921) --- src/mame/includes/fmtowns.h | 4 +- src/mame/video/fmtowns.cpp | 115 ++++++++++++++++++++++++++++++++------------ 2 files changed, 87 insertions(+), 32 deletions(-) diff --git a/src/mame/includes/fmtowns.h b/src/mame/includes/fmtowns.h index ea04463de5f..210e0cd8ebe 100644 --- a/src/mame/includes/fmtowns.h +++ b/src/mame/includes/fmtowns.h @@ -372,8 +372,8 @@ public: void towns_crtc_refresh_mode(); void towns_update_kanji_offset(); void towns_update_palette(); - void render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x, uint16_t y, uint16_t xflip, uint16_t yflip, const rectangle* rect); - void render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, uint16_t xflip, uint16_t yflip, const rectangle* rect); + void render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x, uint16_t y, bool xflip, bool yflip, bool xhalfsize, bool yhalfsize, const rectangle* rect); + void render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, bool xflip, bool yflip, bool xhalfsize, bool yhalfsize, const rectangle* rect); void draw_sprites(const rectangle* rect); void towns_crtc_draw_scan_layer_hicolour(bitmap_rgb32 &bitmap,const rectangle* rect,int layer,int line,int scanline); void towns_crtc_draw_scan_layer_256(bitmap_rgb32 &bitmap,const rectangle* rect,int layer,int line,int scanline); diff --git a/src/mame/video/fmtowns.cpp b/src/mame/video/fmtowns.cpp index d9badf4c7d5..828614a34e7 100644 --- a/src/mame/video/fmtowns.cpp +++ b/src/mame/video/fmtowns.cpp @@ -709,13 +709,13 @@ WRITE8_MEMBER( towns_state::towns_spriteram_w ) * +2: Y position (10-bit) * +4: Sprite Attribute * bit 15: enforce offsets (regs 2-5) - * bit 12,13: flip sprite - * bits 10-0: Sprite RAM offset containing sprite pattern - * TODO: other attributes (zoom?) + * bit 12,13,14: flip / rotate sprite + * bits 10,11: half-size + * bits 9-0: Sprite RAM offset containing sprite pattern * +6: Sprite Colour * bit 15: use colour data in located in sprite RAM offset in bits 11-0 (x32) */ -void towns_state::render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x, uint16_t y, uint16_t xflip, uint16_t yflip, const rectangle* rect) +void towns_state::render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x, uint16_t y, bool xflip, bool yflip, bool xhalfsize, bool yhalfsize, const rectangle* rect) { uint16_t xpos,ypos; uint16_t col,pixel; @@ -728,25 +728,47 @@ void towns_state::render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x if(xflip) { xstart = x+14; - xend = x-2; - xdir = -2; + if (xhalfsize) + { + xend = x+6; + xdir = -1; + } + else + { + xend = x-2; + xdir = -2; + } } else { xstart = x+1; - xend = x+17; - xdir = 2; + if (xhalfsize) + { + xend = x+9; + xdir = 1; + } + else + { + xend = x+17; + xdir = 2; + } } if(yflip) { ystart = y+15; - yend = y-1; + if (yhalfsize) + yend = y+7; + else + yend = y-1; ydir = -1; } else { ystart = y; - yend = y+16; + if (yhalfsize) + yend = y+8; + else + yend = y+16; ydir = 1; } xstart &= 0x1ff; @@ -754,7 +776,7 @@ void towns_state::render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x ystart &= 0x1ff; yend &= 0x1ff; poffset &= 0x1ffff; - + for(ypos=ystart;ypos!=yend;ypos+=ydir,ypos&=0x1ff) { for(xpos=xstart;xpos!=xend;xpos+=xdir,xpos&=0x1ff) @@ -776,28 +798,37 @@ void towns_state::render_sprite_4(uint32_t poffset, uint32_t coffset, uint16_t x m_towns_gfxvram[0x40000+voffset] = col & 0x00ff; } } - if(xflip) - voffset+=2; - else - voffset-=2; - pixel = m_towns_txtvram[poffset] & 0x0f; - col = m_towns_txtvram[coffset+(pixel*2)] | (m_towns_txtvram[coffset+(pixel*2)+1] << 8); - if((m_video.towns_sprite_page != 0 && voffset > 0x1ffff && voffset < 0x40000) - || (m_video.towns_sprite_page == 0 && voffset < 0x20000)) + + if (!xhalfsize) { - if(xpos < width && ypos < height && pixel != 0) + if(xflip) + voffset+=2; + else + voffset-=2; + pixel = m_towns_txtvram[poffset] & 0x0f; + col = m_towns_txtvram[coffset+(pixel*2)] | (m_towns_txtvram[coffset+(pixel*2)+1] << 8); + if((m_video.towns_sprite_page != 0 && voffset > 0x1ffff && voffset < 0x40000) + || (m_video.towns_sprite_page == 0 && voffset < 0x20000)) { - m_towns_gfxvram[0x40000+voffset+1] = (col & 0xff00) >> 8; - m_towns_gfxvram[0x40000+voffset] = col & 0x00ff; + if(xpos < width && ypos < height && pixel != 0) + { + m_towns_gfxvram[0x40000+voffset+1] = (col & 0xff00) >> 8; + m_towns_gfxvram[0x40000+voffset] = col & 0x00ff; + } } } + poffset++; poffset &= 0x1ffff; } + if (yhalfsize) + { + poffset+=8; + } } } -void towns_state::render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, uint16_t xflip, uint16_t yflip, const rectangle* rect) +void towns_state::render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, bool xflip, bool yflip, bool xhalfsize, bool yhalfsize, const rectangle* rect) { uint16_t xpos,ypos; uint16_t col; @@ -810,25 +841,37 @@ void towns_state::render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, uin if(xflip) { xstart = x+16; - xend = x; + if (xhalfsize) + xend = x+8; + else + xend = x; xdir = -1; } else { xstart = x+1; - xend = x+17; + if (xhalfsize) + xend = x+9; + else + xend = x+17; xdir = 1; } if(yflip) { ystart = y+15; - yend = y-1; + if (yhalfsize) + yend = y+7; + else + yend = y-1; ydir = -1; } else { ystart = y; - yend = y+16; + if (yhalfsize) + yend = y+16; + else + yend = y+8; ydir = 1; } xstart &= 0x1ff; @@ -857,9 +900,15 @@ void towns_state::render_sprite_16(uint32_t poffset, uint16_t x, uint16_t y, uin m_towns_gfxvram[0x40000+voffset] = col & 0x00ff; } } - poffset+=2; + if (xhalfsize) + poffset+=4; + else + poffset+=2; poffset &= 0x1ffff; } + + if (yhalfsize) + poffset+=16; } } @@ -871,6 +920,7 @@ void towns_state::draw_sprites(const rectangle* rect) uint16_t xoff = (m_video.towns_sprite_reg[2] | (m_video.towns_sprite_reg[3] << 8)) & 0x1ff; uint16_t yoff = (m_video.towns_sprite_reg[4] | (m_video.towns_sprite_reg[5] << 8)) & 0x1ff; uint32_t poffset,coffset; + bool xflip, yflip, xhalfsize, yhalfsize; if(!(m_video.towns_sprite_reg[1] & 0x80)) return; @@ -887,6 +937,11 @@ void towns_state::draw_sprites(const rectangle* rect) y = m_towns_txtvram[8*n+2] | (m_towns_txtvram[8*n+3] << 8); attr = m_towns_txtvram[8*n+4] | (m_towns_txtvram[8*n+5] << 8); colour = m_towns_txtvram[8*n+6] | (m_towns_txtvram[8*n+7] << 8); + xflip = (attr & 0x2000) >> 13; + yflip = (attr & 0x1000) >> 12; + xhalfsize = (attr & 0x400) >> 10; + yhalfsize = (attr & 0x800) >> 11; + if(attr & 0x8000) { x += xoff; @@ -904,7 +959,7 @@ void towns_state::draw_sprites(const rectangle* rect) n,x,y,attr,colour,poffset,coffset); #endif if(!(colour & 0x2000)) - render_sprite_4((poffset)&0x1ffff,coffset,x,y,attr&0x2000,attr&0x1000,rect); + render_sprite_4((poffset)&0x1ffff,coffset,x,y,xflip,yflip,xhalfsize,yhalfsize,rect); } else { @@ -914,7 +969,7 @@ void towns_state::draw_sprites(const rectangle* rect) n,x,y,attr,colour,poffset); #endif if(!(colour & 0x2000)) - render_sprite_16((poffset)&0x1ffff,x,y,attr&0x2000,attr&0x1000,rect); + render_sprite_16((poffset)&0x1ffff,x,y,xflip,yflip,xhalfsize,yhalfsize,rect); } } -- cgit v1.2.3-70-g09d2 From 4e3de8d3ac270cd9e400fd1b78cb73501bc5262e Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 13 Dec 2017 11:47:55 +0100 Subject: new software list additions --------------------------- ibm5170_cdrom: Noi Siamo Angeli Viper -V16- RISE (International) [The Onion Knight] Viper -V16- Imagine (International) [The Onion Knight] --- hash/ibm5170_cdrom.xml | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index c565d2cae75..9f66610bc0f 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -63,6 +63,43 @@ + + + + Noi Siamo Angeli (Italian) + 1997 + Smile Interactive + + + + + + + + + + + Viper -V16- Imagine (International) + 2001 + Sogna / Hobibox Europe + + + + + + + + + Viper -V16- RISE (International) + 2001 + Sogna / Hobibox Europe + + + + + + + The UltraSound CD -- cgit v1.2.3-70-g09d2 From a63f658108f0c9828c917352cbda0d944da9d0ef Mon Sep 17 00:00:00 2001 From: smf- Date: Wed, 13 Dec 2017 11:26:25 +0000 Subject: Refactor 680x0 so that member variables aren't public. [smf] --- src/devices/cpu/m68000/m68000.h | 307 +- src/devices/cpu/m68000/m68k_in.cpp | 7567 +++++++++++++++++------------------ src/devices/cpu/m68000/m68kcpu.cpp | 1408 ++++--- src/devices/cpu/m68000/m68kcpu.h | 1582 ++++---- src/devices/cpu/m68000/m68kfpu.hxx | 1073 +++-- src/devices/cpu/m68000/m68kmake.cpp | 25 +- src/devices/cpu/m68000/m68kmmu.h | 534 +-- src/devices/machine/68307.cpp | 180 +- src/devices/machine/68307.h | 40 +- src/devices/machine/68307bus.cpp | 8 +- src/devices/machine/68307sim.cpp | 8 +- src/devices/machine/68307tmu.cpp | 12 +- src/devices/machine/68340.cpp | 76 +- src/devices/machine/68340.h | 6 +- src/devices/machine/68340ser.cpp | 2 +- src/devices/machine/68340sim.cpp | 40 +- src/devices/machine/68340tmu.cpp | 4 +- src/mame/drivers/apollo.cpp | 9 +- src/mame/drivers/cubo.cpp | 14 +- src/mame/drivers/r9751.cpp | 8 +- src/mame/drivers/sun2.cpp | 16 +- src/mame/drivers/sun3.cpp | 42 +- src/mame/drivers/x68k.cpp | 1 - src/mame/includes/apollo.h | 2 + src/mame/machine/apollo_dbg.cpp | 5 +- 25 files changed, 6366 insertions(+), 6603 deletions(-) diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h index a6a885d6f54..bc14bea27dc 100644 --- a/src/devices/cpu/m68000/m68000.h +++ b/src/devices/cpu/m68000/m68000.h @@ -10,43 +10,30 @@ #define softfloat_h 1 #include "softfloat/milieu.h" #include "softfloat/softfloat.h" +extern flag floatx80_is_nan(floatx80 a); #endif /* MMU constants */ -#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22 +constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22 /* instruction cache constants */ -#define M68K_IC_SIZE 128 - - - - -#define m68ki_check_address_error(m68k, ADDR, WRITE_MODE, FC) \ - if((ADDR)&1) \ - { \ - m68k->aerr_address = ADDR; \ - m68k->aerr_write_mode = WRITE_MODE; \ - m68k->aerr_fc = FC; \ - throw 10; \ - } - - +constexpr int M68K_IC_SIZE = 128; /* There are 7 levels of interrupt to the 68K. * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). */ -#define M68K_IRQ_NONE 0 -#define M68K_IRQ_1 1 -#define M68K_IRQ_2 2 -#define M68K_IRQ_3 3 -#define M68K_IRQ_4 4 -#define M68K_IRQ_5 5 -#define M68K_IRQ_6 6 -#define M68K_IRQ_7 7 +constexpr int M68K_IRQ_NONE = 0; +constexpr int M68K_IRQ_1 = 1; +constexpr int M68K_IRQ_2 = 2; +constexpr int M68K_IRQ_3 = 3; +constexpr int M68K_IRQ_4 = 4; +constexpr int M68K_IRQ_5 = 5; +constexpr int M68K_IRQ_6 = 6; +constexpr int M68K_IRQ_7 = 7; // special input lines -#define M68K_LINE_BUSERROR 16 +constexpr int M68K_LINE_BUSERROR = 16; /* CPU types for use in m68k_set_cpu_type() */ enum @@ -78,9 +65,9 @@ enum }; /* HMMU enable types for use with m68k_set_hmmu_enable() */ -#define M68K_HMMU_DISABLE 0 /* no translation */ -#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */ -#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */ +constexpr int M68K_HMMU_DISABLE = 0; /* no translation */ +constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */ +constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */ /* Special interrupt acknowledge values. * Use these as special returns from the interrupt acknowledge callback @@ -91,30 +78,25 @@ enum * This happens in a real 68K if VPA or AVEC is asserted during an interrupt * acknowledge cycle instead of DTACK. */ -#define M68K_INT_ACK_AUTOVECTOR 0xffffffff +constexpr uint32_t M68K_INT_ACK_AUTOVECTOR = 0xffffffff; /* Causes the spurious interrupt vector (0x18) to be taken * This happens in a real 68K if BERR is asserted during the interrupt * acknowledge cycle (i.e. no devices responded to the acknowledge). */ -#define M68K_INT_ACK_SPURIOUS 0xfffffffe +constexpr uint32_t M68K_INT_ACK_SPURIOUS = 0xfffffffe; enum { /* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */ M68K_PC = STATE_GENPC, M68K_SP = 1, M68K_ISP, M68K_USP, M68K_MSP, M68K_SR, M68K_VBR, - M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA, + M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_IR, M68K_PREF_ADDR, M68K_PREF_DATA, M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7, M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7, M68K_FP0, M68K_FP1, M68K_FP2, M68K_FP3, M68K_FP4, M68K_FP5, M68K_FP6, M68K_FP7, M68K_FPSR, M68K_FPCR }; -class m68000_base_device; - - -extern const device_type M68K; - class m68000_base_device : public cpu_device { public: @@ -122,6 +104,7 @@ public: // construction/destruction m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +protected: void presave(); void postload(); @@ -150,6 +133,7 @@ public: void define_state(void); +public: void set_reset_callback(write_line_delegate callback); void set_cmpild_callback(write32_delegate callback); void set_rte_callback(write_line_delegate callback); @@ -157,8 +141,6 @@ public: uint16_t get_fc(); void set_hmmu_enable(int enable); void set_fpu_enable(int enable); - int get_fpu_enable(); - void set_instruction_hook(read32_delegate ihook); void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc); protected: @@ -168,91 +150,89 @@ protected: m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map); -private: - int has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */ -public: - - - uint32_t cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */ -// uint32_t dasm_type; /* disassembly type */ - uint32_t dar[16]; /* Data and Address Registers */ - uint32_t ppc; /* Previous program counter */ - uint32_t pc; /* Program Counter */ - uint32_t sp[7]; /* User, Interrupt, and Master Stack Pointers */ - uint32_t vbr; /* Vector Base Register (m68010+) */ - uint32_t sfc; /* Source Function Code Register (m68010+) */ - uint32_t dfc; /* Destination Function Code Register (m68010+) */ - uint32_t cacr; /* Cache Control Register (m68020, unemulated) */ - uint32_t caar; /* Cache Address Register (m68020, unemulated) */ - uint32_t ir; /* Instruction Register */ - floatx80 fpr[8]; /* FPU Data Register (m68030/040) */ - uint32_t fpiar; /* FPU Instruction Address Register (m68040) */ - uint32_t fpsr; /* FPU Status Register (m68040) */ - uint32_t fpcr; /* FPU Control Register (m68040) */ - uint32_t t1_flag; /* Trace 1 */ - uint32_t t0_flag; /* Trace 0 */ - uint32_t s_flag; /* Supervisor */ - uint32_t m_flag; /* Master/Interrupt state */ - uint32_t x_flag; /* Extend */ - uint32_t n_flag; /* Negative */ - uint32_t not_z_flag; /* Zero, inverted for speedups */ - uint32_t v_flag; /* Overflow */ - uint32_t c_flag; /* Carry */ - uint32_t int_mask; /* I0-I2 */ - uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ - uint32_t stopped; /* Stopped state */ - uint32_t pref_addr; /* Last prefetch address */ - uint32_t pref_data; /* Data in the prefetch queue */ - uint32_t sr_mask; /* Implemented status register bits */ - uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ - uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ - int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */ - int has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */ - int pmmu_enabled; /* Indicates if the PMMU is enabled */ - int hmmu_enabled; /* Indicates if the HMMU is enabled */ - int fpu_just_reset; /* Indicates the FPU was just reset */ + int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */ + + + uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */ +// + uint32_t m_dar[16]; /* Data and Address Registers */ + uint32_t m_ppc; /* Previous program counter */ + uint32_t m_pc; /* Program Counter */ + uint32_t m_sp[7]; /* User, Interrupt, and Master Stack Pointers */ + uint32_t m_vbr; /* Vector Base Register (m68010+) */ + uint32_t m_sfc; /* Source Function Code Register (m68010+) */ + uint32_t m_dfc; /* Destination Function Code Register (m68010+) */ + uint32_t m_cacr; /* Cache Control Register (m68020, unemulated) */ + uint32_t m_caar; /* Cache Address Register (m68020, unemulated) */ + uint32_t m_ir; /* Instruction Register */ + floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */ + uint32_t m_fpiar; /* FPU Instruction Address Register (m68040) */ + uint32_t m_fpsr; /* FPU Status Register (m68040) */ + uint32_t m_fpcr; /* FPU Control Register (m68040) */ + uint32_t m_t1_flag; /* Trace 1 */ + uint32_t m_t0_flag; /* Trace 0 */ + uint32_t m_s_flag; /* Supervisor */ + uint32_t m_m_flag; /* Master/Interrupt state */ + uint32_t m_x_flag; /* Extend */ + uint32_t m_n_flag; /* Negative */ + uint32_t m_not_z_flag; /* Zero, inverted for speedups */ + uint32_t m_v_flag; /* Overflow */ + uint32_t m_c_flag; /* Carry */ + uint32_t m_int_mask; /* I0-I2 */ + uint32_t m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ + uint32_t m_stopped; /* Stopped state */ + uint32_t m_pref_addr; /* Last prefetch address */ + uint32_t m_pref_data; /* Data in the prefetch queue */ + uint32_t m_sr_mask; /* Implemented status register bits */ + uint32_t m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ + uint32_t m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ + int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */ + int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */ + int m_pmmu_enabled; /* Indicates if the PMMU is enabled */ + int m_hmmu_enabled; /* Indicates if the HMMU is enabled */ + int m_fpu_just_reset; /* Indicates the FPU was just reset */ /* Clocks required for instructions / exceptions */ - uint32_t cyc_bcc_notake_b; - uint32_t cyc_bcc_notake_w; - uint32_t cyc_dbcc_f_noexp; - uint32_t cyc_dbcc_f_exp; - uint32_t cyc_scc_r_true; - uint32_t cyc_movem_w; - uint32_t cyc_movem_l; - uint32_t cyc_shift; - uint32_t cyc_reset; - - int initial_cycles; - int remaining_cycles; /* Number of clocks remaining */ - int reset_cycles; - uint32_t tracing; + uint32_t m_cyc_bcc_notake_b; + uint32_t m_cyc_bcc_notake_w; + uint32_t m_cyc_dbcc_f_noexp; + uint32_t m_cyc_dbcc_f_exp; + uint32_t m_cyc_scc_r_true; + uint32_t m_cyc_movem_w; + uint32_t m_cyc_movem_l; + uint32_t m_cyc_shift; + uint32_t m_cyc_reset; + + int m_initial_cycles; + int m_remaining_cycles; /* Number of clocks remaining */ + int m_reset_cycles; + uint32_t m_tracing; int m_address_error; - uint32_t aerr_address; - uint32_t aerr_write_mode; - uint32_t aerr_fc; + uint32_t m_aerr_address; + uint32_t m_aerr_write_mode; + uint32_t m_aerr_fc; /* Virtual IRQ lines state */ - uint32_t virq_state; - uint32_t nmi_pending; + uint32_t m_virq_state; + uint32_t m_nmi_pending; - void (**jump_table)(m68000_base_device *m68k); - const uint8_t* cyc_instruction; - const uint8_t* cyc_exception; + void (m68000_base_device::**m_jump_table)(); + const uint8_t* m_cyc_instruction; + const uint8_t* m_cyc_exception; /* Callbacks to host */ - device_irq_acknowledge_delegate int_ack_callback; /* Interrupt Acknowledge */ - write32_delegate bkpt_ack_callback; /* Breakpoint Acknowledge */ - write_line_delegate reset_instr_callback; /* Called when a RESET instruction is encountered */ - write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ - write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */ - write8_delegate tas_write_callback; /* Called instead of normal write8 by the TAS instruction, + device_irq_acknowledge_delegate m_int_ack_callback; /* Interrupt Acknowledge */ + write32_delegate m_bkpt_ack_callback; /* Breakpoint Acknowledge */ + write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */ + write32_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ + write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */ + write8_delegate m_tas_write_callback; /* Called instead of normal write8 by the TAS instruction, allowing writeback to be disabled globally or selectively or other side effects to be implemented */ - address_space *program, *oprogram; + address_space *m_program, *m_oprogram; /* Redirect memory calls */ @@ -264,25 +244,21 @@ public: typedef delegate m68k_write16_delegate; typedef delegate m68k_write32_delegate; -// class m68k_memory_interface -// { - public: void init8(address_space &space, address_space &ospace); void init16(address_space &space, address_space &ospace); void init32(address_space &space, address_space &ospace); void init32mmu(address_space &space, address_space &ospace); void init32hmmu(address_space &space, address_space &ospace); - offs_t opcode_xor; // Address Calculation - m68k_readimm16_delegate readimm16; // Immediate read 16 bit - m68k_read8_delegate read8; - m68k_read16_delegate read16; - m68k_read32_delegate read32; - m68k_write8_delegate write8; - m68k_write16_delegate write16; - m68k_write32_delegate write32; + offs_t m_opcode_xor; // Address Calculation + m68k_readimm16_delegate m_readimm16; // Immediate read 16 bit + m68k_read8_delegate m_read8; + m68k_read16_delegate m_read16; + m68k_read32_delegate m_read32; + m68k_write8_delegate m_write8; + m68k_write16_delegate m_write16; + m68k_write32_delegate m_write32; - private: uint16_t m68008_read_immediate_16(offs_t address); uint16_t read_immediate_16(offs_t address); uint16_t simple_read_immediate_16(offs_t address); @@ -305,57 +281,47 @@ public: uint32_t readlong_d32_hmmu(offs_t address); void writelong_d32_hmmu(offs_t address, uint32_t data); -// m68000_base_device *m_cpustate; -// }; - - public: -// m68k_memory_interface memory; address_space *m_space, *m_ospace; direct_read_data<0> *m_direct, *m_odirect; - uint32_t iotemp; + uint32_t m_iotemp; /* save state data */ - uint16_t save_sr; - uint8_t save_stopped; - uint8_t save_halted; + uint16_t m_save_sr; + uint8_t m_save_stopped; + uint8_t m_save_halted; /* PMMU registers */ - uint32_t mmu_crp_aptr, mmu_crp_limit; - uint32_t mmu_srp_aptr, mmu_srp_limit; - uint32_t mmu_urp_aptr; /* 040 only */ - uint32_t mmu_tc; - uint16_t mmu_sr; - uint32_t mmu_sr_040; - uint32_t mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES]; - uint32_t mmu_atc_rr; - uint32_t mmu_tt0, mmu_tt1; - uint32_t mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1; - uint32_t mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3; - uint32_t mmu_last_page_entry, mmu_last_page_entry_addr; - - uint16_t mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ - uint16_t mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ - uint16_t mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ - uint32_t mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ - uint16_t mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ - uint16_t mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ - uint16_t mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ - - uint32_t ic_address[M68K_IC_SIZE]; /* instruction cache address data */ - uint32_t ic_data[M68K_IC_SIZE]; /* instruction cache content data */ - bool ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */ + uint32_t m_mmu_crp_aptr, m_mmu_crp_limit; + uint32_t m_mmu_srp_aptr, m_mmu_srp_limit; + uint32_t m_mmu_urp_aptr; /* 040 only */ + uint32_t m_mmu_tc; + uint16_t m_mmu_sr; + uint32_t m_mmu_sr_040; + uint32_t m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES]; + uint32_t m_mmu_atc_rr; + uint32_t m_mmu_tt0, m_mmu_tt1; + uint32_t m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1; + uint32_t m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3; + uint32_t m_mmu_last_page_entry, m_mmu_last_page_entry_addr; + + uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ + uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ + uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ + uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ + uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ + uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ + uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ + + uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */ + uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */ + bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */ /* 68307 / 68340 internal address map */ - address_space *internal; - - - - /* external instruction hook (does not depend on debug mode) */ - read32_delegate instruction_hook; + address_space *m_internal; @@ -378,10 +344,18 @@ public: void init_cpu_coldfire(void); - void m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level); + void m68ki_exception_interrupt(uint32_t int_level); - void reset_cpu(void); - inline void cpu_execute(void); + inline void m68ki_check_address_error(uint32_t ADDR, uint32_t WRITE_MODE, uint32_t FC) + { + if((ADDR)&1) + { + m_aerr_address = ADDR; + m_aerr_write_mode = WRITE_MODE; + m_aerr_fc = FC; + throw 10; + } + } // device_state_interface overrides virtual void state_import(const device_state_entry &entry) override; @@ -390,6 +364,11 @@ public: // device_memory_interface overrides virtual bool memory_translate(int space, int intention, offs_t &address) override; + +#include "m68kcpu.h" +#include "m68kops.h" +#include "m68kfpu.hxx" +#include "m68kmmu.h" }; diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp index 3b557865db9..08538d33443 100644 --- a/src/devices/cpu/m68000/m68k_in.cpp +++ b/src/devices/cpu/m68000/m68k_in.cpp @@ -83,6 +83,26 @@ M68KMAKE_PROTOTYPE_HEADER // license:BSD-3-Clause // copyright-holders:Karl Stenerud + +static constexpr int NUM_CPU_TYPES = 7; + +typedef void (m68000_base_device::*opcode_handler_ptr)(); +static opcode_handler_ptr m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */ +static unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ + +/* This is used to generate the opcode handler jump table */ +struct opcode_handler_struct +{ + opcode_handler_ptr opcode_handler; /* handler function */ + unsigned int mask; /* mask on opcode */ + unsigned int match; /* what to match after masking */ + unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ +}; + +/* Build the opcode handler table */ +static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s); +static void m68ki_build_opcode_table(void); + /* ======================================================================== */ /* ============================ OPCODE HANDLERS =========================== */ /* ======================================================================== */ @@ -92,13 +112,6 @@ M68KMAKE_PROTOTYPE_HEADER XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX M68KMAKE_PROTOTYPE_FOOTER -/* Build the opcode handler table */ -void m68ki_build_opcode_table(void); - -extern void (*m68ki_instruction_jump_table[][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */ -extern unsigned char m68ki_cycles[][0x10000]; - - /* ======================================================================== */ /* ============================== END OF FILE ============================= */ /* ======================================================================== */ @@ -113,23 +126,22 @@ M68KMAKE_TABLE_HEADER /* ========================= OPCODE TABLE BUILDER ========================= */ /* ======================================================================== */ -#include "m68kops.h" +m68000_base_device::opcode_handler_ptr m68000_base_device::m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */ +unsigned char m68000_base_device::m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ -#define NUM_CPU_TYPES 7 - -void (*m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */ -unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ +/* Build the opcode handler jump table */ -/* This is used to generate the opcode handler jump table */ -struct opcode_handler_struct +void m68000_base_device::m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s) { - void (*opcode_handler)(m68000_base_device *m68k); /* handler function */ - unsigned int mask; /* mask on opcode */ - unsigned int match; /* what to match after masking */ - unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ -}; - + for(int i=0; icycles[i] != 0xff) { + m68ki_cycles[i][opcode] = s->cycles[i]; + m68ki_instruction_jump_table[i][opcode] = s->opcode_handler; + } +} +void m68000_base_device::m68ki_build_opcode_table(void) +{ /* Opcode handler table */ static const opcode_handler_struct m68k_opcode_handler_table[] = { @@ -144,19 +156,6 @@ M68KMAKE_TABLE_FOOTER }; -/* Build the opcode handler jump table */ - -static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s) -{ - for(int i=0; icycles[i] != 0xff) { - m68ki_cycles[i][opcode] = s->cycles[i]; - m68ki_instruction_jump_table[i][opcode] = s->opcode_handler; - } -} - -void m68ki_build_opcode_table(void) -{ const opcode_handler_struct *ostruct; int i; int j; @@ -167,7 +166,7 @@ void m68ki_build_opcode_table(void) /* default to illegal */ for(k=0;kget_fpu_enable()) + if(m_has_fpu) { - m68040_fpu_op0(mc68kcpu); + m68040_fpu_op0(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(040fpu1, 32, ., .) { - if((mc68kcpu)->get_fpu_enable()) + if(m_has_fpu) { - m68040_fpu_op1(mc68kcpu); + m68040_fpu_op1(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(abcd, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -952,307 +947,307 @@ M68KMAKE_OP(abcd, 8, rr, .) M68KMAKE_OP(abcd, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(abcd, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(); uint32_t corf = 0; if(res > 9) corf = 6; res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); - (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */ + m_v_flag = ~res; /* Undefined V behavior */ res += corf; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8; - if((mc68kcpu)->c_flag) + m_x_flag = m_c_flag = (res > 0x9f) << 8; + if(m_c_flag) res -= 0xa0; - (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_v_flag &= res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(add, 8, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 8, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_8; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(AY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 16, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(add, 32, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 32, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = AY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = AY(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 32, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(add, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu)); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_8(DX()); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(add, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu)); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_16(DX()); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(add, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = DX(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t src = DX(); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(adda, 16, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY())); } M68KMAKE_OP(adda, 16, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY())); } M68KMAKE_OP(adda, 16, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); @@ -1261,23 +1256,23 @@ M68KMAKE_OP(adda, 16, ., .) M68KMAKE_OP(adda, 32, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY()); } M68KMAKE_OP(adda, 32, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY()); } M68KMAKE_OP(adda, 32, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); @@ -1286,226 +1281,226 @@ M68KMAKE_OP(adda, 32, ., .) M68KMAKE_OP(addi, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_8(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(addi, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_16(); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(addi, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_32(); uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(addi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(addq, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addq, 8, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(addq, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(addq, 16, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1); } M68KMAKE_OP(addq, 16, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(addq, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = *r_dst; uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(addq, 32, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1); + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1); } M68KMAKE_OP(addq, 32, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = src + dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(addx, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -1513,17 +1508,17 @@ M68KMAKE_OP(addx, 8, rr, .) M68KMAKE_OP(addx, 16, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -1531,17 +1526,17 @@ M68KMAKE_OP(addx, 16, rr, .) M68KMAKE_OP(addx, 32, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -1549,384 +1544,384 @@ M68KMAKE_OP(addx, 32, rr, .) M68KMAKE_OP(addx, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_v_flag = VFLAG_ADD_8(src, dst, res); + m_x_flag = m_c_flag = CFLAG_8(res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(addx, 16, mm, .) { - uint32_t src = OPER_AY_PD_16(mc68kcpu); - uint32_t ea = EA_AX_PD_16(mc68kcpu); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_16(); + uint32_t ea = EA_AX_PD_16(); + uint32_t dst = m68ki_read_16(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_v_flag = VFLAG_ADD_16(src, dst, res); + m_x_flag = m_c_flag = CFLAG_16(res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(addx, 32, mm, .) { - uint32_t src = OPER_AY_PD_32(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); - uint32_t res = src + dst + XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_32(); + uint32_t ea = EA_AX_PD_32(); + uint32_t dst = m68ki_read_32(ea); + uint32_t res = src + dst + XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_ADD_32(src, dst, res); + m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(and, 8, er, d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (DY() | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 8, er, .) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 16, er, d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (DY() | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 16, er, .) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 32, er, d) { - (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= DY(mc68kcpu); + m_not_z_flag = DX() &= DY(); - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 32, er, .) { - (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= M68KMAKE_GET_OPER_AY_32; + m_not_z_flag = DX() &= M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(and, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = DX(mc68kcpu) & m68ki_read_8((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_8(ea); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(and, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = DX(mc68kcpu) & m68ki_read_16((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_16(ea); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(and, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) & m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() & m68ki_read_32(ea); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(andi, 8, ., d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DY(mc68kcpu) &= (OPER_I_8(mc68kcpu) | 0xffffff00)); + m_not_z_flag = MASK_OUT_ABOVE_8(DY() &= (OPER_I_8() | 0xffffff00)); - (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = src & m68ki_read_8((mc68kcpu), ea); + uint32_t res = src & m68ki_read_8(ea); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(andi, 16, ., d) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DY(mc68kcpu) &= (OPER_I_16(mc68kcpu) | 0xffff0000)); + m_not_z_flag = MASK_OUT_ABOVE_16(DY() &= (OPER_I_16() | 0xffff0000)); - (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = src & m68ki_read_16((mc68kcpu), ea); + uint32_t res = src & m68ki_read_16(ea); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(andi, 32, ., d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) &= (OPER_I_32(mc68kcpu)); + m_not_z_flag = DY() &= (OPER_I_32()); - (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(m_not_z_flag); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(andi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src & m68ki_read_32((mc68kcpu), ea); + uint32_t res = src & m68ki_read_32(ea); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(andi, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) & OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); } M68KMAKE_OP(andi, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) & src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() & src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(asr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); } M68KMAKE_OP(asr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_8(src)) { *r_dst |= 0xff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_16(src)) { *r_dst |= 0xffff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } if(GET_MSB_32(src)) { *r_dst = 0xffffffff; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; - (mc68kcpu)->n_flag = NFLAG_SET; - (mc68kcpu)->not_z_flag = ZFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; + m_n_flag = NFLAG_SET; + m_not_z_flag = ZFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = src >> 1; if(GET_MSB_16(src)) res |= 0x8000; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = src << 8; } M68KMAKE_OP(asl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; src &= m68ki_shift_8_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; + m_v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; } M68KMAKE_OP(asl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift); + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (8-shift); src &= m68ki_shift_16_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; } M68KMAKE_OP(asl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift); + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (24-shift); src &= m68ki_shift_32_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; } M68KMAKE_OP(asl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; src &= m68ki_shift_8_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 8 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 8 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; src &= m68ki_shift_16_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 16 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 16 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; + m_x_flag = m_c_flag = (src >> (32 - shift)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; src &= m68ki_shift_32_table[shift + 1]; - (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = (!(src == 0))<<7; + m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = (!(src == 0))<<7; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(asl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(src << 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> 7; src &= 0xc000; - (mc68kcpu)->v_flag = (!(src == 0 || src == 0xc000))<<7; + m_v_flag = (!(src == 0 || src == 0xc000))<<7; } @@ -2282,11 +2277,11 @@ M68KMAKE_OP(bcc, 8, ., .) { if(M68KMAKE_CC) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); return; } - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b; + m_remaining_cycles -= m_cyc_bcc_notake_b; } @@ -2294,51 +2289,51 @@ M68KMAKE_OP(bcc, 16, ., .) { if(M68KMAKE_CC) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_w; + m_pc += 2; + m_remaining_cycles -= m_cyc_bcc_notake_w; } M68KMAKE_OP(bcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - uint32_t offset = OPER_I_32(mc68kcpu); - REG_PC(mc68kcpu) -= 4; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32((mc68kcpu), offset); + uint32_t offset = OPER_I_32(); + m_pc -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); return; } - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } else { if(M68KMAKE_CC) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); return; } - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b; + m_remaining_cycles -= m_cyc_bcc_notake_b; } } M68KMAKE_OP(bchg, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst ^= mask; } @@ -2346,41 +2341,41 @@ M68KMAKE_OP(bchg, 32, r, d) M68KMAKE_OP(bchg, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src ^ mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src ^ mask); } M68KMAKE_OP(bchg, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst ^= mask; } M68KMAKE_OP(bchg, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src ^ mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src ^ mask); } M68KMAKE_OP(bclr, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst &= ~mask; } @@ -2388,50 +2383,50 @@ M68KMAKE_OP(bclr, 32, r, d) M68KMAKE_OP(bclr, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src & ~mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src & ~mask); } M68KMAKE_OP(bclr, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst &= ~mask; } M68KMAKE_OP(bclr, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src & ~mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src & ~mask); } M68KMAKE_OP(bfchg, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; @@ -2439,24 +2434,24 @@ M68KMAKE_OP(bfchg, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -2468,9 +2463,9 @@ M68KMAKE_OP(bfchg, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2485,42 +2480,42 @@ M68KMAKE_OP(bfchg, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long ^ mask_long); + m68ki_write_32(ea, data_long ^ mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte ^ mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte ^ mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfclr, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -2530,24 +2525,24 @@ M68KMAKE_OP(bfclr, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -2559,9 +2554,9 @@ M68KMAKE_OP(bfclr, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2576,66 +2571,66 @@ M68KMAKE_OP(bfclr, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long & ~mask_long); + m68ki_write_32(ea, data_long & ~mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte & ~mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte & ~mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfexts, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data = MAKE_INT_32(data) >> (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2>>12)&7] = data; + REG_D()[(word2>>12)&7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfexts, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t data; @@ -2643,9 +2638,9 @@ M68KMAKE_OP(bfexts, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2660,68 +2655,68 @@ M68KMAKE_OP(bfexts, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data< 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8; + data |= (m68ki_read_8(ea+4) << offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data = MAKE_INT_32(data) >> (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = data; + REG_D()[(word2 >> 12) & 7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfextu, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= 32 - width; - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2>>12)&7] = data; + REG_D()[(word2>>12)&7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfextu, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t data; @@ -2729,9 +2724,9 @@ M68KMAKE_OP(bfextu, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2746,71 +2741,71 @@ M68KMAKE_OP(bfextu, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data< 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8; + data |= (m68ki_read_8(ea+4) << offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = data; + REG_D()[(word2 >> 12) & 7] = data; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfffo, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint64_t data = DY(mc68kcpu); + uint64_t data = DY(); uint32_t bit; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; width = ((width-1) & 31) + 1; data = ROL_32(data, offset); - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= 32 - width; - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) offset++; - REG_D(mc68kcpu)[(word2>>12)&7] = offset; + REG_D()[(word2>>12)&7] = offset; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfffo, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; int32_t local_offset; uint32_t width = word2; @@ -2820,9 +2815,9 @@ M68KMAKE_OP(bfffo, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -2834,46 +2829,46 @@ M68KMAKE_OP(bfffo, 32, ., .) } width = ((width-1) & 31) + 1; - data = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); + data = (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); data = MASK_OUT_ABOVE_32(data< 32) - data |= (m68ki_read_8((mc68kcpu), ea+4) << local_offset) >> 8; + data |= (m68ki_read_8(ea+4) << local_offset) >> 8; - (mc68kcpu)->n_flag = NFLAG_32(data); + m_n_flag = NFLAG_32(data); data >>= (32 - width); - (mc68kcpu)->not_z_flag = data; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = data; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1) offset++; - REG_D(mc68kcpu)[(word2>>12)&7] = offset; + REG_D()[(word2>>12)&7] = offset; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfins, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; - uint64_t insert = REG_D(mc68kcpu)[(word2>>12)&7]; + uint64_t insert = REG_D()[(word2>>12)&7]; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -2884,30 +2879,30 @@ M68KMAKE_OP(bfins, 32, ., d) mask = ROR_32(mask, offset); insert = MASK_OUT_ABOVE_32(insert << (32 - width)); - (mc68kcpu)->n_flag = NFLAG_32(insert); - (mc68kcpu)->not_z_flag = insert; + m_n_flag = NFLAG_32(insert); + m_not_z_flag = insert; insert = ROR_32(insert, offset); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *data &= ~mask; *data |= insert; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfins, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t insert_base = REG_D(mc68kcpu)[(word2>>12)&7]; + uint32_t insert_base = REG_D()[(word2>>12)&7]; uint32_t insert_long; uint32_t insert_byte; uint32_t mask_base; @@ -2919,9 +2914,9 @@ M68KMAKE_OP(bfins, 32, ., .) if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; if(BIT_B(word2)) { @@ -2940,57 +2935,57 @@ M68KMAKE_OP(bfins, 32, ., .) mask_long = mask_base >> offset; insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width)); - (mc68kcpu)->n_flag = NFLAG_32(insert_base); - (mc68kcpu)->not_z_flag = insert_base; + m_n_flag = NFLAG_32(insert_base); + m_not_z_flag = insert_base; insert_long = insert_base >> offset; - data_long = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : - (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) : + (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if((width + offset) < 8) { - m68ki_write_8((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 24); + m68ki_write_8(ea, ((data_long & ~mask_long) | insert_long) >> 24); } else if((width + offset) < 16) { - m68ki_write_16((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 16); + m68ki_write_16(ea, ((data_long & ~mask_long) | insert_long) >> 16); } else { - m68ki_write_32((mc68kcpu), ea, (data_long & ~mask_long) | insert_long); + m68ki_write_32(ea, (data_long & ~mask_long) | insert_long); } if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); insert_byte = MASK_OUT_ABOVE_8(insert_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (insert_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, (data_byte & ~mask_byte) | insert_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (insert_byte & mask_byte); + m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bfset, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -3000,24 +2995,24 @@ M68KMAKE_OP(bfset, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -3028,9 +3023,9 @@ M68KMAKE_OP(bfset, 32, ., .) uint32_t ea = M68KMAKE_GET_EA_AY_8; if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -3045,42 +3040,42 @@ M68KMAKE_OP(bfset, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = NFLAG_32(data_long << offset); - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = NFLAG_32(data_long << offset); + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; - m68ki_write_32((mc68kcpu), ea, data_long | mask_long); + m68ki_write_32(ea, data_long | mask_long); if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); - m68ki_write_8((mc68kcpu), ea+4, data_byte | mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); + m68ki_write_8(ea+4, data_byte | mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bftst, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t offset = (word2>>6)&31; uint32_t width = word2; - uint32_t* data = &DY(mc68kcpu); + uint32_t* data = &DY(); uint64_t mask; if(BIT_B(word2)) - offset = REG_D(mc68kcpu)[offset&7]; + offset = REG_D()[offset&7]; if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; offset &= 31; @@ -3090,22 +3085,22 @@ M68KMAKE_OP(bftst, 32, ., d) mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask = ROR_32(mask, offset); - (mc68kcpu)->n_flag = NFLAG_32(*data<not_z_flag = *data & mask; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*data<cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); int32_t offset = (word2>>6)&31; uint32_t width = word2; uint32_t mask_base; @@ -3116,9 +3111,9 @@ M68KMAKE_OP(bftst, 32, ., .) uint32_t ea = M68KMAKE_GET_EA_AY_8; if(BIT_B(word2)) - offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]); + offset = MAKE_INT_32(REG_D()[offset&7]); if(BIT_5(word2)) - width = REG_D(mc68kcpu)[width&7]; + width = REG_D()[width&7]; /* Offset is signed so we have to use ugly math =( */ ea += offset / 8; @@ -3134,83 +3129,83 @@ M68KMAKE_OP(bftst, 32, ., .) mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width)); mask_long = mask_base >> offset; - data_long = m68ki_read_32((mc68kcpu), ea); - (mc68kcpu)->n_flag = ((data_long & (0x80000000 >> offset))<>24; - (mc68kcpu)->not_z_flag = data_long & mask_long; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + data_long = m68ki_read_32(ea); + m_n_flag = ((data_long & (0x80000000 >> offset))<>24; + m_not_z_flag = data_long & mask_long; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if((width + offset) > 32) { mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset); - data_byte = m68ki_read_8((mc68kcpu), ea+4); - (mc68kcpu)->not_z_flag |= (data_byte & mask_byte); + data_byte = m68ki_read_8(ea+4); + m_not_z_flag |= (data_byte & mask_byte); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bkpt, 0, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if (!(mc68kcpu)->bkpt_ack_callback.isnull()) - ((mc68kcpu)->bkpt_ack_callback)((*mc68kcpu->program), 0, CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) ? (mc68kcpu)->ir & 7 : 0, 0xffffffff); + if (!m_bkpt_ack_callback.isnull()) + (m_bkpt_ack_callback)(*m_program, 0, CPU_TYPE_IS_EC020_PLUS() ? m_ir & 7 : 0, 0xffffffff); } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(bra, 8, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(bra, 16, ., .) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(bra, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t offset = OPER_I_32(mc68kcpu); - REG_PC(mc68kcpu) -= 4; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32((mc68kcpu), offset); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + uint32_t offset = OPER_I_32(); + m_pc -= 4; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; return; } else { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } } M68KMAKE_OP(bset, 32, r, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (DX() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst |= mask; } @@ -3218,238 +3213,238 @@ M68KMAKE_OP(bset, 32, r, d) M68KMAKE_OP(bset, 8, r, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t mask = 1 << (DX(mc68kcpu) & 7); + uint32_t src = m68ki_read_8(ea); + uint32_t mask = 1 << (DX() & 7); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src | mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src | mask); } M68KMAKE_OP(bset, 32, s, d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f); + uint32_t* r_dst = &DY(); + uint32_t mask = 1 << (OPER_I_8() & 0x1f); - (mc68kcpu)->not_z_flag = *r_dst & mask; + m_not_z_flag = *r_dst & mask; *r_dst |= mask; } M68KMAKE_OP(bset, 8, s, .) { - uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7); + uint32_t mask = 1 << (OPER_I_8() & 7); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = src & mask; - m68ki_write_8((mc68kcpu), ea, src | mask); + m_not_z_flag = src & mask; + m68ki_write_8(ea, src | mask); } M68KMAKE_OP(bsr, 8, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); } M68KMAKE_OP(bsr, 16, ., .) { - uint32_t offset = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - REG_PC(mc68kcpu) -= 2; - m68ki_branch_16((mc68kcpu), offset); + uint32_t offset = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m_pc -= 2; + m68ki_branch_16(offset); } M68KMAKE_OP(bsr, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t offset = OPER_I_32(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - REG_PC(mc68kcpu) -= 4; - m68ki_branch_32((mc68kcpu), offset); + uint32_t offset = OPER_I_32(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m_pc -= 4; + m68ki_branch_32(offset); return; } else { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir)); } } M68KMAKE_OP(btst, 32, r, d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (DX(mc68kcpu) & 0x1f)); + m_not_z_flag = DY() & (1 << (DX() & 0x1f)); } M68KMAKE_OP(btst, 8, r, .) { - (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX(mc68kcpu) & 7)); + m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX() & 7)); } M68KMAKE_OP(btst, 32, s, d) { - (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (OPER_I_8(mc68kcpu) & 0x1f)); + m_not_z_flag = DY() & (1 << (OPER_I_8() & 0x1f)); } M68KMAKE_OP(btst, 8, s, .) { - uint32_t bit = OPER_I_8(mc68kcpu) & 7; + uint32_t bit = OPER_I_8() & 7; - (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit); + m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit); } M68KMAKE_OP(callm, 32, ., .) { /* note: watch out for pcrelative modes */ - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_020_VARIANT()) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_PC(mc68kcpu) += 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_pc += 2; (void)ea; /* just to avoid an 'unused variable' warning */ - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (callm)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 8, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dest = m68ki_read_8((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_8(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - MASK_OUT_ABOVE_8(*compare); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(*compare, dest, res); + m_c_flag = CFLAG_8(res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = MASK_OUT_BELOW_8(*compare) | dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(REG_D(mc68kcpu)[(word2 >> 6) & 7])); + m_remaining_cycles -= 3; + m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D()[(word2 >> 6) & 7])); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dest = m68ki_read_16((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_16(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - MASK_OUT_ABOVE_16(*compare); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(*compare, dest, res); + m_c_flag = CFLAG_16(res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = MASK_OUT_BELOW_16(*compare) | dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_D(mc68kcpu)[(word2 >> 6) & 7])); + m_remaining_cycles -= 3; + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D()[(word2 >> 6) & 7])); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dest = m68ki_read_32((mc68kcpu), ea); - uint32_t* compare = ®_D(mc68kcpu)[word2 & 7]; + uint32_t dest = m68ki_read_32(ea); + uint32_t* compare = ®_D()[word2 & 7]; uint32_t res = dest - *compare; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare, dest, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare, dest, res); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(*compare, dest, res); + m_c_flag = CFLAG_SUB_32(*compare, dest, res); - if(COND_NE(mc68kcpu)) + if(COND_NE()) *compare = dest; else { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_32((mc68kcpu), ea, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_32(ea, REG_D()[(word2 >> 6) & 7]); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas2, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_32(mc68kcpu); - uint32_t* compare1 = ®_D(mc68kcpu)[(word2 >> 16) & 7]; - uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15]; - uint32_t dest1 = m68ki_read_16((mc68kcpu), ea1); + uint32_t word2 = OPER_I_32(); + uint32_t* compare1 = ®_D()[(word2 >> 16) & 7]; + uint32_t ea1 = REG_DA()[(word2 >> 28) & 15]; + uint32_t dest1 = m68ki_read_16(ea1); uint32_t res1 = dest1 - MASK_OUT_ABOVE_16(*compare1); - uint32_t* compare2 = ®_D(mc68kcpu)[word2 & 7]; - uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t dest2 = m68ki_read_16((mc68kcpu), ea2); + uint32_t* compare2 = ®_D()[word2 & 7]; + uint32_t ea2 = REG_DA()[(word2 >> 12) & 15]; + uint32_t dest2 = m68ki_read_16(ea2); uint32_t res2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_16(res1); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res1); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare1, dest1, res1); - (mc68kcpu)->c_flag = CFLAG_16(res1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_16(res1); + m_not_z_flag = MASK_OUT_ABOVE_16(res1); + m_v_flag = VFLAG_SUB_16(*compare1, dest1, res1); + m_c_flag = CFLAG_16(res1); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { res2 = dest2 - MASK_OUT_ABOVE_16(*compare2); - (mc68kcpu)->n_flag = NFLAG_16(res2); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res2); - (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare2, dest2, res2); - (mc68kcpu)->c_flag = CFLAG_16(res2); + m_n_flag = NFLAG_16(res2); + m_not_z_flag = MASK_OUT_ABOVE_16(res2); + m_v_flag = VFLAG_SUB_16(*compare2, dest2, res2); + m_c_flag = CFLAG_16(res2); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_16((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]); - m68ki_write_16((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_16(ea1, REG_D()[(word2 >> 22) & 7]); + m68ki_write_16(ea2, REG_D()[(word2 >> 6) & 7]); return; } } @@ -3457,44 +3452,44 @@ M68KMAKE_OP(cas2, 16, ., .) *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cas2, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_32(mc68kcpu); - uint32_t* compare1 = ®_D(mc68kcpu)[(word2 >> 16) & 7]; - uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15]; - uint32_t dest1 = m68ki_read_32((mc68kcpu), ea1); + uint32_t word2 = OPER_I_32(); + uint32_t* compare1 = ®_D()[(word2 >> 16) & 7]; + uint32_t ea1 = REG_DA()[(word2 >> 28) & 15]; + uint32_t dest1 = m68ki_read_32(ea1); uint32_t res1 = dest1 - *compare1; - uint32_t* compare2 = ®_D(mc68kcpu)[word2 & 7]; - uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t dest2 = m68ki_read_32((mc68kcpu), ea2); + uint32_t* compare2 = ®_D()[word2 & 7]; + uint32_t ea2 = REG_DA()[(word2 >> 12) & 15]; + uint32_t dest2 = m68ki_read_32(ea2); uint32_t res2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->n_flag = NFLAG_32(res1); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res1); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare1, dest1, res1); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare1, dest1, res1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_n_flag = NFLAG_32(res1); + m_not_z_flag = MASK_OUT_ABOVE_32(res1); + m_v_flag = VFLAG_SUB_32(*compare1, dest1, res1); + m_c_flag = CFLAG_SUB_32(*compare1, dest1, res1); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { res2 = dest2 - *compare2; - (mc68kcpu)->n_flag = NFLAG_32(res2); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res2); - (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare2, dest2, res2); - (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare2, dest2, res2); + m_n_flag = NFLAG_32(res2); + m_not_z_flag = MASK_OUT_ABOVE_32(res2); + m_v_flag = VFLAG_SUB_32(*compare2, dest2, res2); + m_c_flag = CFLAG_SUB_32(*compare2, dest2, res2); - if(COND_EQ(mc68kcpu)) + if(COND_EQ()) { - (mc68kcpu)->remaining_cycles -= 3; - m68ki_write_32((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]); - m68ki_write_32((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]); + m_remaining_cycles -= 3; + m68ki_write_32(ea1, REG_D()[(word2 >> 22) & 7]); + m68ki_write_32(ea2, REG_D()[(word2 >> 6) & 7]); return; } } @@ -3502,392 +3497,392 @@ M68KMAKE_OP(cas2, 32, ., .) *compare2 = dest2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk, 16, ., d) { - int32_t src = MAKE_INT_16(DX(mc68kcpu)); - int32_t bound = MAKE_INT_16(DY(mc68kcpu)); + int32_t src = MAKE_INT_16(DX()); + int32_t bound = MAKE_INT_16(DY()); - (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_16(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); } M68KMAKE_OP(chk, 16, ., .) { - int32_t src = MAKE_INT_16(DX(mc68kcpu)); + int32_t src = MAKE_INT_16(DX()); int32_t bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); - (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_16(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); } M68KMAKE_OP(chk, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - int32_t src = MAKE_INT_32(DX(mc68kcpu)); - int32_t bound = MAKE_INT_32(DY(mc68kcpu)); + int32_t src = MAKE_INT_32(DX()); + int32_t bound = MAKE_INT_32(DY()); - (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_32(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - int32_t src = MAKE_INT_32(DX(mc68kcpu)); + int32_t src = MAKE_INT_32(DX()); int32_t bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32); - (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */ - (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */ - (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */ + m_not_z_flag = ZFLAG_32(src); /* Undocumented */ + m_v_flag = VFLAG_CLEAR; /* Undocumented */ + m_c_flag = CFLAG_CLEAR; /* Undocumented */ if(src >= 0 && src <= bound) { return; } - (mc68kcpu)->n_flag = (src < 0)<<7; - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_n_flag = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; - uint32_t ea = EA_PCDI_8(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; + uint32_t ea = EA_PCDI_8(); + uint32_t lower_bound = m68ki_read_pcrel_8(ea); + uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; - uint32_t ea = EA_PCIX_8(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; + uint32_t ea = EA_PCIX_8(); + uint32_t lower_bound = m68ki_read_pcrel_8(ea); + uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 8, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t lower_bound = m68ki_read_8((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_8((mc68kcpu), ea + 1); + uint32_t lower_bound = m68ki_read_8(ea); + uint32_t upper_bound = m68ki_read_8(ea + 1); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); + m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; - uint32_t ea = EA_PCDI_16(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; + uint32_t ea = EA_PCDI_16(); + uint32_t lower_bound = m68ki_read_pcrel_16(ea); + uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; - uint32_t ea = EA_PCIX_16(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; + uint32_t ea = EA_PCIX_16(); + uint32_t lower_bound = m68ki_read_pcrel_16(ea); + uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t lower_bound = m68ki_read_16((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_16((mc68kcpu), ea + 2); + uint32_t lower_bound = m68ki_read_16(ea); + uint32_t upper_bound = m68ki_read_16(ea + 2); if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); + m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound); else - (mc68kcpu)->c_flag = compare - lower_bound; + m_c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } if(!BIT_F(word2)) - (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); + m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare); else - (mc68kcpu)->c_flag = upper_bound - compare; + m_c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = CFLAG_16(m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t ea = EA_PCDI_32(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; + uint32_t ea = EA_PCDI_32(); + uint32_t lower_bound = m68ki_read_pcrel_32(ea); + uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; - uint32_t ea = EA_PCIX_32(mc68kcpu); - uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4); + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; + uint32_t ea = EA_PCIX_32(); + uint32_t lower_bound = m68ki_read_pcrel_32(ea); + uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(chk2cmp2, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + uint32_t word2 = OPER_I_16(); + uint32_t compare = REG_DA()[(word2 >> 12) & 15]; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t lower_bound = m68ki_read_32((mc68kcpu), ea); - uint32_t upper_bound = m68ki_read_32((mc68kcpu), ea + 4); + uint32_t lower_bound = m68ki_read_32(ea); + uint32_t upper_bound = m68ki_read_32(ea + 4); - (mc68kcpu)->c_flag = compare - lower_bound; - (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); - (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu)) + m_c_flag = compare - lower_bound; + m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare)); + m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag); + if(COND_CS()) { if(BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m68ki_exception_trap(EXCEPTION_CHK); return; } - (mc68kcpu)->c_flag = upper_bound - compare; - (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag); - if(COND_CS(mc68kcpu) && BIT_B(word2)) - m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK); + m_c_flag = upper_bound - compare; + m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag); + if(COND_CS() && BIT_B(word2)) + m68ki_exception_trap(EXCEPTION_CHK); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(clr, 8, ., d) { - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3895,28 +3890,28 @@ M68KMAKE_OP(clr, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_8((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_8(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_8((mc68kcpu), ea, 0); + m68ki_write_8(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(clr, 16, ., d) { - DY(mc68kcpu) &= 0xffff0000; + DY() &= 0xffff0000; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3924,28 +3919,28 @@ M68KMAKE_OP(clr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_16((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_16(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_16((mc68kcpu), ea, 0); + m68ki_write_16(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(clr, 32, ., d) { - DY(mc68kcpu) = 0; + DY() = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } @@ -3953,561 +3948,561 @@ M68KMAKE_OP(clr, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68ki_read_32((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */ + m68ki_read_32(ea); /* the 68000 does a dummy read, the value is discarded */ } - m68ki_write_32((mc68kcpu), ea, 0); + m68ki_write_32(ea, 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; } M68KMAKE_OP(cmp, 8, ., d) { - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_8(DY()); + uint32_t dst = MASK_OUT_ABOVE_8(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmp, 8, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_8; - uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu)); + uint32_t dst = MASK_OUT_ABOVE_8(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmp, 16, ., d) { - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_16(DY()); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 16, ., a) { - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t src = MASK_OUT_ABOVE_16(AY()); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 16, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_16; - uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu)); + uint32_t dst = MASK_OUT_ABOVE_16(DX()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmp, 32, ., d) { - uint32_t src = DY(mc68kcpu); - uint32_t dst = DX(mc68kcpu); + uint32_t src = DY(); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmp, 32, ., a) { - uint32_t src = AY(mc68kcpu); - uint32_t dst = DX(mc68kcpu); + uint32_t src = AY(); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmp, 32, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_32; - uint32_t dst = DX(mc68kcpu); + uint32_t dst = DX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., d) { - uint32_t src = MAKE_INT_16(DY(mc68kcpu)); - uint32_t dst = AX(mc68kcpu); + uint32_t src = MAKE_INT_16(DY()); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., a) { - uint32_t src = MAKE_INT_16(AY(mc68kcpu)); - uint32_t dst = AX(mc68kcpu); + uint32_t src = MAKE_INT_16(AY()); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 16, ., .) { uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); - uint32_t dst = AX(mc68kcpu); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., d) { - uint32_t src = DY(mc68kcpu); - uint32_t dst = AX(mc68kcpu); + uint32_t src = DY(); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., a) { - uint32_t src = AY(mc68kcpu); - uint32_t dst = AX(mc68kcpu); + uint32_t src = AY(); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpa, 32, ., .) { uint32_t src = M68KMAKE_GET_OPER_AY_32; - uint32_t dst = AX(mc68kcpu); + uint32_t dst = AX(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 8, ., d) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t src = OPER_I_8(); + uint32_t dst = MASK_OUT_ABOVE_8(DY()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t dst = M68KMAKE_GET_OPER_AY_8; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpi, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = OPER_PCDI_8(mc68kcpu); + uint32_t src = OPER_I_8(); + uint32_t dst = OPER_PCDI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_8(mc68kcpu); - uint32_t dst = OPER_PCIX_8(mc68kcpu); + uint32_t src = OPER_I_8(); + uint32_t dst = OPER_PCIX_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 16, ., d) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t src = OPER_I_16(); + uint32_t dst = MASK_OUT_ABOVE_16(DY()); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t dst = M68KMAKE_GET_OPER_AY_16; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpi, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = OPER_PCDI_16(mc68kcpu); + uint32_t src = OPER_I_16(); + uint32_t dst = OPER_PCDI_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_16(mc68kcpu); - uint32_t dst = OPER_PCIX_16(mc68kcpu); + uint32_t src = OPER_I_16(); + uint32_t dst = OPER_PCIX_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 32, ., d) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = DY(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = DY(); uint32_t res = dst - src; - if (!(mc68kcpu)->cmpild_instr_callback.isnull()) - ((mc68kcpu)->cmpild_instr_callback)(*(mc68kcpu)->program, (mc68kcpu)->ir & 7, src, 0xffffffff); + if (!m_cmpild_instr_callback.isnull()) + (m_cmpild_instr_callback)(*m_program, m_ir & 7, src, 0xffffffff); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t dst = M68KMAKE_GET_OPER_AY_32; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cmpi, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = OPER_PCDI_32(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = OPER_PCDI_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpi, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_I_32(mc68kcpu); - uint32_t dst = OPER_PCIX_32(mc68kcpu); + uint32_t src = OPER_I_32(); + uint32_t dst = OPER_PCIX_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cmpm, 8, ., ax7) { - uint32_t src = OPER_AY_PI_8(mc68kcpu); - uint32_t dst = OPER_A7_PI_8(mc68kcpu); + uint32_t src = OPER_AY_PI_8(); + uint32_t dst = OPER_A7_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., ay7) { - uint32_t src = OPER_A7_PI_8(mc68kcpu); - uint32_t dst = OPER_AX_PI_8(mc68kcpu); + uint32_t src = OPER_A7_PI_8(); + uint32_t dst = OPER_AX_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., axy7) { - uint32_t src = OPER_A7_PI_8(mc68kcpu); - uint32_t dst = OPER_A7_PI_8(mc68kcpu); + uint32_t src = OPER_A7_PI_8(); + uint32_t dst = OPER_A7_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 8, ., .) { - uint32_t src = OPER_AY_PI_8(mc68kcpu); - uint32_t dst = OPER_AX_PI_8(mc68kcpu); + uint32_t src = OPER_AY_PI_8(); + uint32_t dst = OPER_AX_PI_8(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_8(res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_c_flag = CFLAG_8(res); } M68KMAKE_OP(cmpm, 16, ., .) { - uint32_t src = OPER_AY_PI_16(mc68kcpu); - uint32_t dst = OPER_AX_PI_16(mc68kcpu); + uint32_t src = OPER_AY_PI_16(); + uint32_t dst = OPER_AX_PI_16(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_16(res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_c_flag = CFLAG_16(res); } M68KMAKE_OP(cmpm, 32, ., .) { - uint32_t src = OPER_AY_PI_32(mc68kcpu); - uint32_t dst = OPER_AX_PI_32(mc68kcpu); + uint32_t src = OPER_AY_PI_32(); + uint32_t dst = OPER_AX_PI_32(); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_c_flag = CFLAG_SUB_32(src, dst, res); } M68KMAKE_OP(cpbcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpdbcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpgen, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) && (mc68kcpu->get_fpu_enable() || mc68kcpu->has_pmmu)) + if(CPU_TYPE_IS_EC020_PLUS() && (m_has_fpu || m_has_pmmu)) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpscc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cptrapcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(ftrapcc, 32, ., .) { - if((mc68kcpu)->get_fpu_enable()) + if(m_has_fpu) { - m68881_ftrap(mc68kcpu); + m68881_ftrap(); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(dbt, 16, ., .) { - REG_PC(mc68kcpu) += 2; + m_pc += 2; } M68KMAKE_OP(dbf, 16, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + m_remaining_cycles -= m_cyc_dbcc_f_noexp; return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp; + m_pc += 2; + m_remaining_cycles -= m_cyc_dbcc_f_exp; } @@ -4515,31 +4510,31 @@ M68KMAKE_OP(dbcc, 16, ., .) { if(M68KMAKE_NOT_CC) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint32_t offset = OPER_I_16(mc68kcpu); - REG_PC(mc68kcpu) -= 2; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16((mc68kcpu), offset); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp; + uint32_t offset = OPER_I_16(); + m_pc -= 2; + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset); + m_remaining_cycles -= m_cyc_dbcc_f_noexp; return; } - REG_PC(mc68kcpu) += 2; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp; + m_pc += 2; + m_remaining_cycles -= m_cyc_dbcc_f_exp; return; } - REG_PC(mc68kcpu) += 2; + m_pc += 2; } M68KMAKE_OP(divs, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - int32_t src = MAKE_INT_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + int32_t src = MAKE_INT_16(DY()); int32_t quotient; int32_t remainder; @@ -4547,10 +4542,10 @@ M68KMAKE_OP(divs, 16, ., d) { if((uint32_t)*r_dst == 0x80000000 && src == -1) { - (mc68kcpu)->not_z_flag = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = 0; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = 0; return; } @@ -4560,23 +4555,23 @@ M68KMAKE_OP(divs, 16, ., d) if(quotient == MAKE_INT_16(quotient)) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divs, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); int32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); int32_t quotient; int32_t remainder; @@ -4585,10 +4580,10 @@ M68KMAKE_OP(divs, 16, ., .) { if((uint32_t)*r_dst == 0x80000000 && src == -1) { - (mc68kcpu)->not_z_flag = 0; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = 0; + m_n_flag = NFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = 0; return; } @@ -4598,24 +4593,24 @@ M68KMAKE_OP(divs, 16, ., .) if(quotient == MAKE_INT_16(quotient)) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divu, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); if(src != 0) { @@ -4624,23 +4619,23 @@ M68KMAKE_OP(divu, 16, ., d) if(quotient < 0x10000) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divu, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; if(src != 0) @@ -4650,26 +4645,26 @@ M68KMAKE_OP(divu, 16, ., .) if(quotient < 0x10000) { - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->n_flag = NFLAG_16(quotient); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = quotient; + m_n_flag = NFLAG_16(quotient); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); return; } - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); } M68KMAKE_OP(divl, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint64_t divisor = DY(mc68kcpu); + uint32_t word2 = OPER_I_16(); + uint64_t divisor = DY(); uint64_t dividend = 0; uint64_t quotient = 0; uint64_t remainder = 0; @@ -4678,9 +4673,9 @@ M68KMAKE_OP(divl, 32, ., d) { if(BIT_A(word2)) /* 64 bit */ { - dividend = REG_D(mc68kcpu)[word2 & 7]; + dividend = REG_D()[word2 & 7]; dividend <<= 32; - dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend |= REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { @@ -4688,7 +4683,7 @@ M68KMAKE_OP(divl, 32, ., d) remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor)); if((int64_t)quotient != (int64_t)((int32_t)quotient)) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } } @@ -4697,7 +4692,7 @@ M68KMAKE_OP(divl, 32, ., d) quotient = dividend / divisor; if(quotient > 0xffffffff) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } remainder = dividend % divisor; @@ -4705,7 +4700,7 @@ M68KMAKE_OP(divl, 32, ., d) } else /* 32 bit */ { - dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend = REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor)); @@ -4718,27 +4713,27 @@ M68KMAKE_OP(divl, 32, ., d) } } - REG_D(mc68kcpu)[word2 & 7] = remainder; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient; + REG_D()[word2 & 7] = remainder; + REG_D()[(word2 >> 12) & 7] = quotient; - (mc68kcpu)->n_flag = NFLAG_32(quotient); - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(quotient); + m_not_z_flag = quotient; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(divl, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint64_t divisor = M68KMAKE_GET_OPER_AY_32; uint64_t dividend = 0; uint64_t quotient = 0; @@ -4748,9 +4743,9 @@ M68KMAKE_OP(divl, 32, ., .) { if(BIT_A(word2)) /* 64 bit */ { - dividend = REG_D(mc68kcpu)[word2 & 7]; + dividend = REG_D()[word2 & 7]; dividend <<= 32; - dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend |= REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { @@ -4758,7 +4753,7 @@ M68KMAKE_OP(divl, 32, ., .) remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor)); if((int64_t)quotient != (int64_t)((int32_t)quotient)) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } } @@ -4767,7 +4762,7 @@ M68KMAKE_OP(divl, 32, ., .) quotient = dividend / divisor; if(quotient > 0xffffffff) { - (mc68kcpu)->v_flag = VFLAG_SET; + m_v_flag = VFLAG_SET; return; } remainder = dividend % divisor; @@ -4775,7 +4770,7 @@ M68KMAKE_OP(divl, 32, ., .) } else /* 32 bit */ { - dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + dividend = REG_D()[(word2 >> 12) & 7]; if(BIT_B(word2)) /* signed */ { quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor)); @@ -4788,198 +4783,198 @@ M68KMAKE_OP(divl, 32, ., .) } } - REG_D(mc68kcpu)[word2 & 7] = remainder; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient; + REG_D()[word2 & 7] = remainder; + REG_D()[(word2 >> 12) & 7] = quotient; - (mc68kcpu)->n_flag = NFLAG_32(quotient); - (mc68kcpu)->not_z_flag = quotient; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(quotient); + m_not_z_flag = quotient; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE); + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(eor, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= MASK_OUT_ABOVE_8(DX(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_8(DY() ^= MASK_OUT_ABOVE_8(DX())); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) ^ m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(DX() ^ m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= MASK_OUT_ABOVE_16(DX(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_16(DY() ^= MASK_OUT_ABOVE_16(DX())); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) ^ m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(DX() ^ m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 32, ., d) { - uint32_t res = DY(mc68kcpu) ^= DX(mc68kcpu); + uint32_t res = DY() ^= DX(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eor, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) ^ m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() ^ m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= OPER_I_8(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_8(DY() ^= OPER_I_8()); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = src ^ m68ki_read_8((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_8(ea); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= OPER_I_16(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY() ^= OPER_I_16()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = src ^ m68ki_read_16((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_16(ea); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 32, ., d) { - uint32_t res = DY(mc68kcpu) ^= OPER_I_32(mc68kcpu); + uint32_t res = DY() ^= OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src ^ m68ki_read_32((mc68kcpu), ea); + uint32_t res = src ^ m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(eori, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) ^ OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); } M68KMAKE_OP(eori, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) ^ src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() ^ src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(exg, 32, dd, .) { - uint32_t* reg_a = &DX(mc68kcpu); - uint32_t* reg_b = &DY(mc68kcpu); + uint32_t* reg_a = &DX(); + uint32_t* reg_b = &DY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -4988,8 +4983,8 @@ M68KMAKE_OP(exg, 32, dd, .) M68KMAKE_OP(exg, 32, aa, .) { - uint32_t* reg_a = &AX(mc68kcpu); - uint32_t* reg_b = &AY(mc68kcpu); + uint32_t* reg_a = &AX(); + uint32_t* reg_b = &AY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -4998,8 +4993,8 @@ M68KMAKE_OP(exg, 32, aa, .) M68KMAKE_OP(exg, 32, da, .) { - uint32_t* reg_a = &DX(mc68kcpu); - uint32_t* reg_b = &AY(mc68kcpu); + uint32_t* reg_a = &DX(); + uint32_t* reg_b = &AY(); uint32_t tmp = *reg_a; *reg_a = *reg_b; *reg_b = tmp; @@ -5008,2769 +5003,2769 @@ M68KMAKE_OP(exg, 32, da, .) M68KMAKE_OP(ext, 16, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0); - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(ext, 32, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0); - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(extb, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0); - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(illegal, 0, ., .) { - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(jmp, 32, ., .) { - m68ki_jump((mc68kcpu), M68KMAKE_GET_EA_AY_32); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0) - (mc68kcpu)->remaining_cycles = 0; + m68ki_jump(M68KMAKE_GET_EA_AY_32); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + if(m_pc == m_ppc && m_remaining_cycles > 0) + m_remaining_cycles = 0; } M68KMAKE_OP(jsr, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu)); - m68ki_jump((mc68kcpu), ea); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_push_32(m_pc); + m68ki_jump(ea); } M68KMAKE_OP(lea, 32, ., .) { - AX(mc68kcpu) = M68KMAKE_GET_EA_AY_32; + AX() = M68KMAKE_GET_EA_AY_32; } M68KMAKE_OP(link, 16, ., a7) { - REG_A(mc68kcpu)[7] -= 4; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]); - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); + REG_A()[7] -= 4; + m68ki_write_32(REG_A()[7], REG_A()[7]); + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); } M68KMAKE_OP(link, 16, ., .) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - m68ki_push_32((mc68kcpu), *r_dst); - *r_dst = REG_A(mc68kcpu)[7]; - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); + m68ki_push_32(*r_dst); + *r_dst = REG_A()[7]; + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); } M68KMAKE_OP(link, 32, ., a7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_A(mc68kcpu)[7] -= 4; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]); - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu)); + REG_A()[7] -= 4; + m68ki_write_32(REG_A()[7], REG_A()[7]); + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(link, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - m68ki_push_32((mc68kcpu), *r_dst); - *r_dst = REG_A(mc68kcpu)[7]; - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu)); + m68ki_push_32(*r_dst); + *r_dst = REG_A()[7]; + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(lsr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_x_flag = m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << (9-shift); + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = src >> shift; if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag = (src >> (shift - 1))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0); + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = src >> 1; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = res; + m_c_flag = m_x_flag = src << 8; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src << shift; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (8-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> (24-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = MASK_OUT_ABOVE_8(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffffff00; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst &= 0xffff0000; - (mc68kcpu)->x_flag = XFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t shift = DX() & 0x3f; uint32_t src = *r_dst; uint32_t res = MASK_OUT_ABOVE_32(src << shift); if(shift != 0) { - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = (src >> (32 - shift)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } *r_dst = 0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8; - (mc68kcpu)->n_flag = NFLAG_CLEAR; - (mc68kcpu)->not_z_flag = ZFLAG_SET; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8; + m_n_flag = NFLAG_CLEAR; + m_not_z_flag = ZFLAG_SET; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(lsl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(src << 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_x_flag = m_c_flag = src >> 7; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(move, 8, d, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ai, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_AI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_AI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_AI_8(mc68kcpu); + uint32_t ea = EA_AX_AI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi7, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_A7_PI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_A7_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_PI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi7, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_A7_PI_8(mc68kcpu); + uint32_t ea = EA_A7_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_PI_8(mc68kcpu); + uint32_t ea = EA_AX_PI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd7, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_A7_PD_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_A7_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_PD_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd7, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_A7_PD_8(mc68kcpu); + uint32_t ea = EA_A7_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_PD_8(mc68kcpu); + uint32_t ea = EA_AX_PD_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, di, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_DI_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_DI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_DI_8(mc68kcpu); + uint32_t ea = EA_AX_DI_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ix, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AX_IX_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AX_IX_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AX_IX_8(mc68kcpu); + uint32_t ea = EA_AX_IX_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, aw, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AW_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AW_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AW_8(mc68kcpu); + uint32_t ea = EA_AW_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, al, d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); - uint32_t ea = EA_AL_8(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_8(DY()); + uint32_t ea = EA_AL_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 8, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - uint32_t ea = EA_AL_8(mc68kcpu); + uint32_t ea = EA_AL_8(); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_AI_16(mc68kcpu); + uint32_t ea = EA_AX_AI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_PI_16(mc68kcpu); + uint32_t ea = EA_AX_PI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_PD_16(mc68kcpu); + uint32_t ea = EA_AX_PD_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_DI_16(mc68kcpu); + uint32_t ea = EA_AX_DI_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AX_IX_16(mc68kcpu); + uint32_t ea = EA_AX_IX_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AW_16(mc68kcpu); + uint32_t ea = EA_AW_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(DY()); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, a) { - uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu)); - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t res = MASK_OUT_ABOVE_16(AY()); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 16, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - uint32_t ea = EA_AL_16(mc68kcpu); + uint32_t ea = EA_AL_16(); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, d) { - uint32_t res = DY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = DY(); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, a) { - uint32_t res = AY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t res = AY(); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, d, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ai, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_AI_32(mc68kcpu); + uint32_t ea = EA_AX_AI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pi, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_PI_32(mc68kcpu); + uint32_t ea = EA_AX_PI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, pd, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_PD_32(mc68kcpu); + uint32_t ea = EA_AX_PD_32(); - m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF ); - m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF ); + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, di, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_DI_32(mc68kcpu); + uint32_t ea = EA_AX_DI_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, ix, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AX_IX_32(mc68kcpu); + uint32_t ea = EA_AX_IX_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, aw, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AW_32(mc68kcpu); + uint32_t ea = EA_AW_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, d) { - uint32_t res = DY(mc68kcpu); - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t res = DY(); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, a) { - uint32_t res = AY(mc68kcpu); - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t res = AY(); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move, 32, al, .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - uint32_t ea = EA_AL_32(mc68kcpu); + uint32_t ea = EA_AL_32(); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(movea, 16, ., d) { - AX(mc68kcpu) = MAKE_INT_16(DY(mc68kcpu)); + AX() = MAKE_INT_16(DY()); } M68KMAKE_OP(movea, 16, ., a) { - AX(mc68kcpu) = MAKE_INT_16(AY(mc68kcpu)); + AX() = MAKE_INT_16(AY()); } M68KMAKE_OP(movea, 16, ., .) { - AX(mc68kcpu) = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); + AX() = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); } M68KMAKE_OP(movea, 32, ., d) { - AX(mc68kcpu) = DY(mc68kcpu); + AX() = DY(); } M68KMAKE_OP(movea, 32, ., a) { - AX(mc68kcpu) = AY(mc68kcpu); + AX() = AY(); } M68KMAKE_OP(movea, 32, ., .) { - AX(mc68kcpu) = M68KMAKE_GET_OPER_AY_32; + AX() = M68KMAKE_GET_OPER_AY_32; } M68KMAKE_OP(move, 16, frc, d) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - DY(mc68kcpu) = MASK_OUT_BELOW_16(DY(mc68kcpu)) | m68ki_get_ccr(mc68kcpu); + DY() = MASK_OUT_BELOW_16(DY()) | m68ki_get_ccr(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(move, 16, frc, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - m68ki_write_16((mc68kcpu), M68KMAKE_GET_EA_AY_16, m68ki_get_ccr(mc68kcpu)); + m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr()); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(move, 16, toc, d) { - m68ki_set_ccr((mc68kcpu), DY(mc68kcpu)); + m68ki_set_ccr(DY()); } M68KMAKE_OP(move, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), M68KMAKE_GET_OPER_AY_16); + m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16); } M68KMAKE_OP(move, 16, frs, d) { - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */ + if(CPU_TYPE_IS_000() || m_s_flag) /* NS990408 */ { - DY(mc68kcpu) = MASK_OUT_BELOW_16(DY(mc68kcpu)) | m68ki_get_sr(mc68kcpu); + DY() = MASK_OUT_BELOW_16(DY()) | m68ki_get_sr(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, frs, .) { - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */ + if(CPU_TYPE_IS_000() || m_s_flag) /* NS990408 */ { uint32_t ea = M68KMAKE_GET_EA_AY_16; - m68ki_write_16((mc68kcpu), ea, m68ki_get_sr(mc68kcpu)); + m68ki_write_16(ea, m68ki_get_sr()); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, tos, d) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - m68ki_set_sr((mc68kcpu), DY(mc68kcpu)); + m68ki_set_sr(DY()); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { uint32_t new_sr = M68KMAKE_GET_OPER_AY_16; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), new_sr); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(new_sr); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 32, fru, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - AY(mc68kcpu) = REG_USP(mc68kcpu); + AY() = REG_USP(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(move, 32, tou, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_USP(mc68kcpu) = AY(mc68kcpu); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_USP() = AY(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(movec, 32, cr, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) { case 0x000: /* SFC */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->sfc; + REG_DA()[(word2 >> 12) & 15] = m_sfc; return; case 0x001: /* DFC */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->dfc; + REG_DA()[(word2 >> 12) & 15] = m_dfc; return; case 0x002: /* CACR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->cacr; + REG_DA()[(word2 >> 12) & 15] = m_cacr; return; } return; case 0x800: /* USP */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = REG_USP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = REG_USP(); return; case 0x801: /* VBR */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->vbr; + REG_DA()[(word2 >> 12) & 15] = m_vbr; return; case 0x802: /* CAAR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->caar; + REG_DA()[(word2 >> 12) & 15] = m_caar; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); break; case 0x803: /* MSP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_SP(mc68kcpu) : REG_MSP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = m_m_flag ? REG_SP() : REG_MSP(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x804: /* ISP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_ISP(mc68kcpu) : REG_SP(mc68kcpu); + REG_DA()[(word2 >> 12) & 15] = m_m_flag ? REG_ISP() : REG_SP(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x003: /* TC */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_tc; + REG_DA()[(word2 >> 12) & 15] = m_mmu_tc; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x004: /* ITT0 (040+, ACR0 on ColdFire) */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_itt0; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr0; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x005: /* ITT1 (040+, ACR1 on ColdFire) */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_itt1; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr1; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x006: /* DTT0 */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt0; + REG_DA()[(word2 >> 12) & 15] = m_mmu_dtt0; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr2; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x007: /* DTT1 */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt1; + REG_DA()[(word2 >> 12) & 15] = m_mmu_dtt1; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_acr3; + REG_DA()[(word2 >> 12) & 15] = m_mmu_acr3; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x805: /* MMUSR */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_sr_040; + REG_DA()[(word2 >> 12) & 15] = m_mmu_sr_040; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x806: /* URP */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_urp_aptr; + REG_DA()[(word2 >> 12) & 15] = m_mmu_urp_aptr; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x807: /* SRP */ - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_srp_aptr; + REG_DA()[(word2 >> 12) & 15] = m_mmu_srp_aptr; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc00: // ROMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc01: // ROMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc04: // RAMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc05: // RAMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0c: // MPCR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0d: // EDRAMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0e: // SECMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0f: // MBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; default: - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; } } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(movec, 32, rc, .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) { case 0x000: /* SFC */ - (mc68kcpu)->sfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7; + m_sfc = REG_DA()[(word2 >> 12) & 15] & 7; return; case 0x001: /* DFC */ - (mc68kcpu)->dfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7; + m_dfc = REG_DA()[(word2 >> 12) & 15] & 7; return; case 0x002: /* CACR */ /* Only EC020 and later have CACR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* 68030 can write all bits except 5-7, 040 can write all */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_cacr = REG_DA()[(word2 >> 12) & 15]; } - else if (CPU_TYPE_IS_030_PLUS((mc68kcpu)->cpu_type)) + else if (CPU_TYPE_IS_030_PLUS()) { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 0xff1f; + m_cacr = REG_DA()[(word2 >> 12) & 15] & 0xff1f; } else { - (mc68kcpu)->cacr = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 0x0f; + m_cacr = REG_DA()[(word2 >> 12) & 15] & 0x0f; } -// mc68kcpu->logerror("movec to cacr=%04x\n", (mc68kcpu)->cacr); - if ((mc68kcpu)->cacr & (M68K_CACR_CI | M68K_CACR_CEI)) +// logerror("movec to cacr=%04x\n", m_cacr); + if (m_cacr & (M68K_CACR_CI | M68K_CACR_CEI)) { - m68ki_ic_clear(mc68kcpu); + m68ki_ic_clear(); } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x800: /* USP */ - REG_USP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_USP() = REG_DA()[(word2 >> 12) & 15]; return; case 0x801: /* VBR */ - (mc68kcpu)->vbr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_vbr = REG_DA()[(word2 >> 12) & 15]; return; case 0x802: /* CAAR */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - (mc68kcpu)->caar = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_caar = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x803: /* MSP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* we are in supervisor mode so just check for M flag */ - if(!(mc68kcpu)->m_flag) + if(!m_m_flag) { - REG_MSP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_MSP() = REG_DA()[(word2 >> 12) & 15]; return; } - REG_SP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_SP() = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x804: /* ISP */ - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - if(!(mc68kcpu)->m_flag) + if(!m_m_flag) { - REG_SP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_SP() = REG_DA()[(word2 >> 12) & 15]; return; } - REG_ISP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + REG_ISP() = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x003: /* TC */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_tc = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_tc = REG_DA()[(word2 >> 12) & 15]; - if (mc68kcpu->mmu_tc & 0x8000) + if (m_mmu_tc & 0x8000) { - mc68kcpu->pmmu_enabled = 1; + m_pmmu_enabled = 1; } else { - mc68kcpu->pmmu_enabled = 0; + m_pmmu_enabled = 0; } return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x004: /* ITT0 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_itt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_itt0 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr0 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x005: /* ITT1 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_itt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_itt1 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr1 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x006: /* DTT0 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_dtt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_dtt0 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr2 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x007: /* DTT1 */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_dtt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_dtt1 = REG_DA()[(word2 >> 12) & 15]; return; } - else if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + else if(CPU_TYPE_IS_COLDFIRE()) { - mc68kcpu->mmu_acr3 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_acr3 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x805: /* MMUSR */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_sr_040 = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_sr_040 = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x806: /* URP */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_urp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_urp_aptr = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0x807: /* SRP */ - if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->mmu_srp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15]; + m_mmu_srp_aptr = REG_DA()[(word2 >> 12) & 15]; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc00: // ROMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc01: // ROMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc04: // RAMBAR0 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc05: // RAMBAR1 - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0c: // MPCR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0d: // EDRAMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0e: // SECMBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; case 0xc0f: // MBAR - if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_COLDFIRE()) { /* TODO */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; default: - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); return; } } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(movem, 16, re, pd) { uint32_t i = 0; - uint32_t register_list = OPER_I_16(mc68kcpu); - uint32_t ea = AY(mc68kcpu); + uint32_t register_list = OPER_I_16(); + uint32_t ea = AY(); uint32_t count = 0; for(; i < 16; i++) if(register_list & (1 << i)) { ea -= 2; - m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[15-i])); + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA()[15-i])); count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<> 16) & 0xFFFF ); + m68ki_write_16(ea+2, REG_DA()[15-i] & 0xFFFF ); + m68ki_write_16(ea, (REG_DA()[15-i] >> 16) & 0xFFFF ); count++; } - AY(mc68kcpu) = ea; + AY() = ea; - (mc68kcpu)->remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_w; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<remaining_cycles -= count<<(mc68kcpu)->cyc_movem_l; + m_remaining_cycles -= count<> 8)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); } M68KMAKE_OP(movep, 32, re, .) { - uint32_t ea = EA_AY_DI_32(mc68kcpu); - uint32_t src = DX(mc68kcpu); + uint32_t ea = EA_AY_DI_32(); + uint32_t src = DX(); - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(src >> 24)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src >> 16)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src >> 8)); - m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); } M68KMAKE_OP(movep, 16, er, .) { - uint32_t ea = EA_AY_DI_16(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t ea = EA_AY_DI_16(); + uint32_t* r_dst = &DX(); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8((mc68kcpu), ea) << 8) + m68ki_read_8((mc68kcpu), ea + 2)); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2)); } M68KMAKE_OP(movep, 32, er, .) { - uint32_t ea = EA_AY_DI_32(mc68kcpu); + uint32_t ea = EA_AY_DI_32(); - DX(mc68kcpu) = (m68ki_read_8((mc68kcpu), ea) << 24) + (m68ki_read_8((mc68kcpu), ea + 2) << 16) - + (m68ki_read_8((mc68kcpu), ea + 4) << 8) + m68ki_read_8((mc68kcpu), ea + 6); + DX() = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16) + + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6); } M68KMAKE_OP(moves, 8, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_8_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_8(REG_DA(mc68kcpu)[(word2 >> 12) & 15])); + m68ki_write_8_fc(ea, m_dfc, MASK_OUT_ABOVE_8(REG_DA()[(word2 >> 12) & 15])); return; } if(BIT_F(word2)) /* Memory to address register */ { - REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc((mc68kcpu), ea, (mc68kcpu)->sfc)); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_A()[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, m_sfc)); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to data register */ - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D(mc68kcpu)[(word2 >> 12) & 7]) | m68ki_read_8_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_D()[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D()[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moves, 16, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_16_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[(word2 >> 12) & 15])); + m68ki_write_16_fc(ea, m_dfc, MASK_OUT_ABOVE_16(REG_DA()[(word2 >> 12) & 15])); return; } if(BIT_F(word2)) /* Memory to address register */ { - REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc((mc68kcpu), ea, (mc68kcpu)->sfc)); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_A()[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, m_sfc)); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to data register */ - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D(mc68kcpu)[(word2 >> 12) & 7]) | m68ki_read_16_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_D()[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D()[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moves, 32, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ if(BIT_B(word2)) /* Register to memory */ { - m68ki_write_32_fc((mc68kcpu), ea, (mc68kcpu)->dfc, REG_DA(mc68kcpu)[(word2 >> 12) & 15]); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + m68ki_write_32_fc(ea, m_dfc, REG_DA()[(word2 >> 12) & 15]); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } /* Memory to register */ - REG_DA(mc68kcpu)[(word2 >> 12) & 15] = m68ki_read_32_fc((mc68kcpu), ea, (mc68kcpu)->sfc); - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) - (mc68kcpu)->remaining_cycles -= 2; + REG_DA()[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, m_sfc); + if(CPU_TYPE_IS_020_VARIANT()) + m_remaining_cycles -= 2; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(moveq, 32, ., .) { - uint32_t res = DX(mc68kcpu) = MAKE_INT_8(MASK_OUT_ABOVE_8((mc68kcpu)->ir)); + uint32_t res = DX() = MAKE_INT_8(MASK_OUT_ABOVE_8(m_ir)); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(move16, 32, ., .) { - uint16_t w2 = OPER_I_16(mc68kcpu); - int ax = (mc68kcpu)->ir & 7; + uint16_t w2 = OPER_I_16(); + int ax = m_ir & 7; int ay = (w2 >> 12) & 7; - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay], m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax])); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+4, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+4)); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+8, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+8)); - m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay]+12, m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]+12)); + m68ki_write_32(REG_A()[ay], m68ki_read_32(REG_A()[ax])); + m68ki_write_32(REG_A()[ay]+4, m68ki_read_32(REG_A()[ax]+4)); + m68ki_write_32(REG_A()[ay]+8, m68ki_read_32(REG_A()[ax]+8)); + m68ki_write_32(REG_A()[ay]+12, m68ki_read_32(REG_A()[ax]+12)); - REG_A(mc68kcpu)[ax] += 16; - REG_A(mc68kcpu)[ay] += 16; + REG_A()[ax] += 16; + REG_A()[ay] += 16; } M68KMAKE_OP(muls, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY(mc68kcpu)) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + uint32_t* r_dst = &DX(); + uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(muls, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mulu, 16, ., d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)) * MASK_OUT_ABOVE_16(*r_dst); + uint32_t* r_dst = &DX(); + uint32_t res = MASK_OUT_ABOVE_16(DY()) * MASK_OUT_ABOVE_16(*r_dst); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mulu, 16, ., .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst); *r_dst = res; - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = res; + m_n_flag = NFLAG_32(res); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(mull, 32, ., d) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); - uint64_t src = DY(mc68kcpu); - uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + uint32_t word2 = OPER_I_16(); + uint64_t src = DY(); + uint64_t dst = REG_D()[(word2 >> 12) & 7]; uint64_t res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if(BIT_B(word2)) /* signed */ { res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst); if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = ((int64_t)res != (int32_t)res)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } res = src * dst; if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = (res > 0xffffffff)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = (res > 0xffffffff)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(mull, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t word2 = OPER_I_16(mc68kcpu); + uint32_t word2 = OPER_I_16(); uint64_t src = M68KMAKE_GET_OPER_AY_32; - uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7]; + uint64_t dst = REG_D()[(word2 >> 12) & 7]; uint64_t res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; if(BIT_B(word2)) /* signed */ { res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst); if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = ((int64_t)res != (int32_t)res)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } res = src * dst; if(!BIT_A(word2)) { - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->v_flag = (res > 0xffffffff)<<7; - REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_v_flag = (res > 0xffffffff)<<7; + REG_D()[(word2 >> 12) & 7] = m_not_z_flag; return; } - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); - (mc68kcpu)->n_flag = NFLAG_64(res); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - REG_D(mc68kcpu)[word2 & 7] = (res >> 32); - REG_D(mc68kcpu)[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res) | (res>>32); + m_n_flag = NFLAG_64(res); + m_v_flag = VFLAG_CLEAR; + REG_D()[word2 & 7] = (res >> 32); + REG_D()[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(nbcd, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = -dst - XFLAG_1(mc68kcpu); + uint32_t res = -dst - XFLAG_1(); if(res != 0) { - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(((res|dst) & 0x0f) == 0) res = (res & 0xf0) | 6; res = MASK_OUT_ABOVE_8(res + 0x9a); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ + m_v_flag &= ~res; /* Undefined V behavior part II */ *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->not_z_flag |= res; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; + m_not_z_flag |= res; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; } else { - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; } - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ } M68KMAKE_OP(nbcd, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = -dst - XFLAG_1(mc68kcpu); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = -dst - XFLAG_1(); if(res != 0) { - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(((res|dst) & 0x0f) == 0) res = (res & 0xf0) | 6; res = MASK_OUT_ABOVE_8(res + 0x9a); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ + m_v_flag &= ~res; /* Undefined V behavior part II */ - m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(res)); + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); - (mc68kcpu)->not_z_flag |= res; - (mc68kcpu)->c_flag = CFLAG_SET; - (mc68kcpu)->x_flag = XFLAG_SET; + m_not_z_flag |= res; + m_c_flag = CFLAG_SET; + m_x_flag = XFLAG_SET; } else { - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->x_flag = XFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_x_flag = XFLAG_CLEAR; } - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ } M68KMAKE_OP(neg, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = *r_dst & res; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = m_x_flag = CFLAG_8(res); + m_v_flag = *r_dst & res; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(neg, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); + uint32_t src = m68ki_read_8(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = src & res; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_c_flag = m_x_flag = CFLAG_8(res); + m_v_flag = src & res; + m_not_z_flag = MASK_OUT_ABOVE_8(res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(neg, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (*r_dst & res)>>8; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = m_x_flag = CFLAG_16(res); + m_v_flag = (*r_dst & res)>>8; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(neg, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (src & res)>>8; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_c_flag = m_x_flag = CFLAG_16(res); + m_v_flag = (src & res)>>8; + m_not_z_flag = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(neg, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = 0 - *r_dst; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(*r_dst, 0, res); - (mc68kcpu)->v_flag = (*r_dst & res)>>24; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_c_flag = m_x_flag = CFLAG_SUB_32(*r_dst, 0, res); + m_v_flag = (*r_dst & res)>>24; + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(neg, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = m68ki_read_32((mc68kcpu), ea); + uint32_t src = m68ki_read_32(ea); uint32_t res = 0 - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(src, 0, res); - (mc68kcpu)->v_flag = (src & res)>>24; - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_c_flag = m_x_flag = CFLAG_SUB_32(src, 0, res); + m_v_flag = (src & res)>>24; + m_not_z_flag = MASK_OUT_ABOVE_32(res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(negx, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = *r_dst & res; + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = *r_dst & res; res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -7779,31 +7774,31 @@ M68KMAKE_OP(negx, 8, ., d) M68KMAKE_OP(negx, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = m68ki_read_8((mc68kcpu), ea); - uint32_t res = 0 - src - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_8(ea); + uint32_t res = 0 - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = src & res; + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = src & res; res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(negx, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (*r_dst & res)>>8; + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = (*r_dst & res)>>8; res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -7812,31 +7807,31 @@ M68KMAKE_OP(negx, 16, ., d) M68KMAKE_OP(negx, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_16(ea); + uint32_t res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = (src & res)>>8; + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = (src & res)>>8; res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(negx, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_1(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(*r_dst, 0, res); - (mc68kcpu)->v_flag = (*r_dst & res)>>24; + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(*r_dst, 0, res); + m_v_flag = (*r_dst & res)>>24; res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -7845,392 +7840,392 @@ M68KMAKE_OP(negx, 32, ., d) M68KMAKE_OP(negx, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = m68ki_read_32((mc68kcpu), ea); - uint32_t res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_1(mc68kcpu); + uint32_t src = m68ki_read_32(ea); + uint32_t res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, 0, res); - (mc68kcpu)->v_flag = (src & res)>>24; + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, 0, res); + m_v_flag = (src & res)>>24; res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(nop, 0, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ } M68KMAKE_OP(not, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_8(~*r_dst); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(~m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = MASK_OUT_ABOVE_16(~*r_dst); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(~m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); uint32_t res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(not, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = MASK_OUT_ABOVE_32(~m68ki_read_32((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, er, d) { - uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= MASK_OUT_ABOVE_8(DY(mc68kcpu)))); + uint32_t res = MASK_OUT_ABOVE_8((DX() |= MASK_OUT_ABOVE_8(DY()))); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, er, .) { - uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_8)); + uint32_t res = MASK_OUT_ABOVE_8((DX() |= M68KMAKE_GET_OPER_AY_8)); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, er, d) { - uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= MASK_OUT_ABOVE_16(DY(mc68kcpu)))); + uint32_t res = MASK_OUT_ABOVE_16((DX() |= MASK_OUT_ABOVE_16(DY()))); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, er, .) { - uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_16)); + uint32_t res = MASK_OUT_ABOVE_16((DX() |= M68KMAKE_GET_OPER_AY_16)); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, er, d) { - uint32_t res = DX(mc68kcpu) |= DY(mc68kcpu); + uint32_t res = DX() |= DY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, er, .) { - uint32_t res = DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_32; + uint32_t res = DX() |= M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) | m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(DX() | m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) | m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(DX() | m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(or, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = DX(mc68kcpu) | m68ki_read_32((mc68kcpu), ea); + uint32_t res = DX() | m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8((DY(mc68kcpu) |= OPER_I_8(mc68kcpu))); + uint32_t res = MASK_OUT_ABOVE_8((DY() |= OPER_I_8())); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t res = MASK_OUT_ABOVE_8(src | m68ki_read_8((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) |= OPER_I_16(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY() |= OPER_I_16()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t res = MASK_OUT_ABOVE_16(src | m68ki_read_16((mc68kcpu), ea)); + uint32_t res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 32, ., d) { - uint32_t res = DY(mc68kcpu) |= OPER_I_32(mc68kcpu); + uint32_t res = DY() |= OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t res = src | m68ki_read_32((mc68kcpu), ea); + uint32_t res = src | m68ki_read_32(ea); - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ori, 16, toc, .) { - m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) | OPER_I_16(mc68kcpu)); + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); } M68KMAKE_OP(ori, 16, tos, .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t src = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) | src); + uint32_t src = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_sr(m68ki_get_sr() | src); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(pack, 16, rr, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - /* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */ - uint32_t src = DY(mc68kcpu) + OPER_I_16(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + /* Note: DX() and DY() are reversed in Motorola's docs */ + uint32_t src = DY() + OPER_I_16(); + uint32_t* r_dst = &DX(); *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, ax7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_AY_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_AY_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_AY_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_A7_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, ay7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_A7_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_A7_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_A7_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_AX_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_AX_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, axy7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t ea_src = EA_A7_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_A7_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_A7_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_A7_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_A7_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(pack, 16, mm, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t ea_src = EA_AY_PD_8(mc68kcpu); - uint32_t src = m68ki_read_8((mc68kcpu), ea_src); - ea_src = EA_AY_PD_8(mc68kcpu); - src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu); + uint32_t ea_src = EA_AY_PD_8(); + uint32_t src = m68ki_read_8(ea_src); + ea_src = EA_AY_PD_8(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); - m68ki_write_8((mc68kcpu), EA_AX_PD_8(mc68kcpu), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); + m68ki_write_8(EA_AX_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -8238,975 +8233,975 @@ M68KMAKE_OP(pea, 32, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - m68ki_push_32((mc68kcpu), ea); + m68ki_push_32(ea); } M68KMAKE_OP(pflusha, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PFLUSHA (ir=%04x)\n", mc68kcpu->ir); + logerror("68040: unhandled PFLUSHA (ir=%04x)\n", m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(pflushan, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", mc68kcpu->ir); + logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(pmmu, 32, ., .) { - if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_EC020_PLUS()) && (m_has_pmmu)) { - m68881_mmu_ops(mc68kcpu); + m68881_mmu_ops(); } else { - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } } M68KMAKE_OP(ptest, 32, ., .) { - if ((CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu)) + if ((CPU_TYPE_IS_040_PLUS()) && (m_has_pmmu)) { - mc68kcpu->logerror("68040: unhandled PTEST\n"); + logerror("68040: unhandled PTEST\n"); return; } else { - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } } M68KMAKE_OP(reset, 0, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - if (!(mc68kcpu)->reset_instr_callback.isnull()) - ((mc68kcpu)->reset_instr_callback)(1); - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_reset; + if (!m_reset_instr_callback.isnull()) + (m_reset_instr_callback)(1); + m_remaining_cycles -= m_cyc_reset; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(ror, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROR_8(src, shift); if(orig_shift != 0) - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-orig_shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = src << (9-orig_shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROR_16(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; uint32_t res = ROR_32(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << (9-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = src << (9-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROR_8(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = src << (8-((shift-1)&7)); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = src << (8-((shift-1)&7)); + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 15; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROR_16(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (src >> ((shift - 1) & 15)) << 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((shift - 1) & 15)) << 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 31; uint64_t src = *r_dst; uint32_t res = ROR_32(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (src >> ((shift - 1) & 31)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((shift - 1) & 31)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(ror, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = ROR_16(src, 1); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << 8; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src << 8; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROL_8(src, shift); if(orig_shift != 0) - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src << orig_shift; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_c_flag = src << orig_shift; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = ROL_16(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> (8-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src >> (8-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; uint32_t res = ROL_32(src, shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> (24-shift); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_c_flag = src >> (24-shift); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 7; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = ROL_8(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = src << shift; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = src << shift; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (src & 1)<<8; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src & 1)<<8; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_8(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 15; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, shift)); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (src << shift) >> 8; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src << shift) >> 8; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (src & 1)<<8; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src & 1)<<8; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_16(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; uint32_t shift = orig_shift & 31; uint64_t src = *r_dst; uint32_t res = ROL_32(src, shift); if(orig_shift != 0) { - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (src >> ((32 - shift) & 0x1f)) << 8; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = (src >> ((32 - shift) & 0x1f)) << 8; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->n_flag = NFLAG_32(src); - (mc68kcpu)->not_z_flag = src; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(src); + m_not_z_flag = src; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rol, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); + uint32_t src = m68ki_read_16(ea); uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->c_flag = src >> 7; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_c_flag = src >> 7; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROR_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROR_9(src | (XFLAG_1() << 8), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 9; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROR_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROR_9(src | (XFLAG_1() << 8), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_8(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 17; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 33; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); res = ROR_33_64(res, shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxr, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = ROR_17(src | (XFLAG_1(mc68kcpu) << 16), 1); + uint32_t src = m68ki_read_16(ea); + uint32_t res = ROR_17(src | (XFLAG_1() << 16), 1); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 8, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROL_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROL_9(src | (XFLAG_1() << 8), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), shift); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 32, s, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); if(shift != 0) - (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= shift<c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 8, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 9; uint32_t src = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = ROL_9(src | (XFLAG_1(mc68kcpu) << 8), shift); + uint32_t res = ROL_9(src | (XFLAG_1() << 8), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res; + m_c_flag = m_x_flag = res; res = MASK_OUT_ABOVE_8(res); *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_8(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 17; uint32_t src = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), shift); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_16(*r_dst); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_16(*r_dst); + m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst); + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 32, r, .) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t orig_shift = DX(mc68kcpu) & 0x3f; + uint32_t* r_dst = &DY(); + uint32_t orig_shift = DX() & 0x3f; if(orig_shift != 0) { uint32_t shift = orig_shift % 33; uint64_t src = *r_dst; - uint64_t res = src | (((uint64_t)XFLAG_1(mc68kcpu)) << 32); + uint64_t res = src | (((uint64_t)XFLAG_1()) << 32); res = ROL_33_64(res, shift); - (mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift; + m_remaining_cycles -= orig_shift<c_flag = (mc68kcpu)->x_flag = res >> 24; + m_c_flag = m_x_flag = res >> 24; res = MASK_OUT_ABOVE_32(res); *r_dst = res; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; return; } - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_c_flag = m_x_flag; + m_n_flag = NFLAG_32(*r_dst); + m_not_z_flag = *r_dst; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(roxl, 16, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = m68ki_read_16((mc68kcpu), ea); - uint32_t res = ROL_17(src | (XFLAG_1(mc68kcpu) << 16), 1); + uint32_t src = m68ki_read_16(ea); + uint32_t res = ROL_17(src | (XFLAG_1() << 16), 1); - (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8; + m_c_flag = m_x_flag = res >> 8; res = MASK_OUT_ABOVE_16(res); - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(rtd, 32, ., .) { - if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_PLUS()) { - uint32_t new_pc = m68ki_pull_32(mc68kcpu); + uint32_t new_pc = m68ki_pull_32(); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu))); - m68ki_jump((mc68kcpu), new_pc); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16())); + m68ki_jump(new_pc); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(rte, 32, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { uint32_t new_sr; uint32_t new_pc; uint32_t format_word; - if (!(mc68kcpu)->rte_instr_callback.isnull()) - ((mc68kcpu)->rte_instr_callback)(1); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ + if (!m_rte_instr_callback.isnull()) + (m_rte_instr_callback)(1); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_000()) { - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } - if(CPU_TYPE_IS_010((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010()) { - format_word = m68ki_read_16((mc68kcpu), REG_A(mc68kcpu)[7]+6) >> 12; + format_word = m68ki_read_16(REG_A()[7]+6) >> 12; if(format_word == 0) { - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; /* Not handling bus fault (9) */ - m68ki_exception_format_error(mc68kcpu); + m68ki_exception_format_error(); return; } /* Otherwise it's 020 */ rte_loop: - format_word = m68ki_read_16((mc68kcpu), REG_A(mc68kcpu)[7]+6) >> 12; + format_word = m68ki_read_16(REG_A()[7]+6) >> 12; switch(format_word) { case 0: /* Normal */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 1: /* Throwaway */ - new_sr = m68ki_pull_16(mc68kcpu); - m68ki_fake_pull_32(mc68kcpu); /* program counter */ - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_set_sr_noint((mc68kcpu), new_sr); + new_sr = m68ki_pull_16(); + m68ki_fake_pull_32(); /* program counter */ + m68ki_fake_pull_16(); /* format word */ + m68ki_set_sr_noint(new_sr); goto rte_loop; case 2: /* Trap */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* format word */ - m68ki_fake_pull_32(mc68kcpu); /* address */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* format word */ + m68ki_fake_pull_32(); /* address */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 7: /* 68040 access error */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_32(mc68kcpu); /* $08: effective address */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: wb3s */ - m68ki_fake_pull_16(mc68kcpu); /* $10: wb2s */ - m68ki_fake_pull_16(mc68kcpu); /* $12: wb1s */ - m68ki_fake_pull_32(mc68kcpu); /* $14: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $18: wb3a */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: wb3d */ - m68ki_fake_pull_32(mc68kcpu); /* $20: wb2a */ - m68ki_fake_pull_32(mc68kcpu); /* $24: wb2d */ - m68ki_fake_pull_32(mc68kcpu); /* $28: wb1a */ - m68ki_fake_pull_32(mc68kcpu); /* $2c: wb1d/pd0 */ - m68ki_fake_pull_32(mc68kcpu); /* $30: pd1 */ - m68ki_fake_pull_32(mc68kcpu); /* $34: pd2 */ - m68ki_fake_pull_32(mc68kcpu); /* $38: pd3 */ - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_32(); /* $08: effective address */ + m68ki_fake_pull_16(); /* $0c: special status word */ + m68ki_fake_pull_16(); /* $0e: wb3s */ + m68ki_fake_pull_16(); /* $10: wb2s */ + m68ki_fake_pull_16(); /* $12: wb1s */ + m68ki_fake_pull_32(); /* $14: data fault address */ + m68ki_fake_pull_32(); /* $18: wb3a */ + m68ki_fake_pull_32(); /* $1c: wb3d */ + m68ki_fake_pull_32(); /* $20: wb2a */ + m68ki_fake_pull_32(); /* $24: wb2d */ + m68ki_fake_pull_32(); /* $28: wb1a */ + m68ki_fake_pull_32(); /* $2c: wb1d/pd0 */ + m68ki_fake_pull_32(); /* $30: pd1 */ + m68ki_fake_pull_32(); /* $34: pd2 */ + m68ki_fake_pull_32(); /* $38: pd3 */ + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 0x0a: /* Bus Error at instruction boundary */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */ - m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */ - m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */ - - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_16(); /* $08: internal register */ + m68ki_fake_pull_16(); /* $0a: special status word */ + m68ki_fake_pull_16(); /* $0c: instruction pipe stage c */ + m68ki_fake_pull_16(); /* $0e: instruction pipe stage b */ + m68ki_fake_pull_32(); /* $10: data fault address */ + m68ki_fake_pull_32(); /* $14: internal registers */ + m68ki_fake_pull_32(); /* $18: data output buffer */ + m68ki_fake_pull_32(); /* $1c: internal registers */ + + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; case 0x0b: /* Bus Error - Instruction Execution in Progress */ - new_sr = m68ki_pull_16(mc68kcpu); - new_pc = m68ki_pull_32(mc68kcpu); - m68ki_fake_pull_16(mc68kcpu); /* $06: format word */ - m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */ - m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */ - m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */ - m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */ - m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */ - m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */ - m68ki_fake_pull_32(mc68kcpu); /* $20: */ - m68ki_fake_pull_32(mc68kcpu); /* $24: stage B address */ - m68ki_fake_pull_32(mc68kcpu); /* $28: */ - m68ki_fake_pull_32(mc68kcpu); /* $2c: data input buffer */ - m68ki_fake_pull_32(mc68kcpu); /* $30: */ - m68ki_fake_pull_16(mc68kcpu); /* $34: */ - m68ki_fake_pull_16(mc68kcpu); /* $36: version #, internal information */ - m68ki_fake_pull_32(mc68kcpu); /* $38: */ - m68ki_fake_pull_32(mc68kcpu); /* $3c: */ - m68ki_fake_pull_32(mc68kcpu); /* $40: */ - m68ki_fake_pull_32(mc68kcpu); /* $44: */ - m68ki_fake_pull_32(mc68kcpu); /* $48: */ - m68ki_fake_pull_32(mc68kcpu); /* $4c: */ - m68ki_fake_pull_32(mc68kcpu); /* $50: */ - m68ki_fake_pull_32(mc68kcpu); /* $54: */ - m68ki_fake_pull_32(mc68kcpu); /* $58: */ - - m68ki_jump((mc68kcpu), new_pc); - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_fake_pull_16(); /* $06: format word */ + m68ki_fake_pull_16(); /* $08: internal register */ + m68ki_fake_pull_16(); /* $0a: special status word */ + m68ki_fake_pull_16(); /* $0c: instruction pipe stage c */ + m68ki_fake_pull_16(); /* $0e: instruction pipe stage b */ + m68ki_fake_pull_32(); /* $10: data fault address */ + m68ki_fake_pull_32(); /* $14: internal registers */ + m68ki_fake_pull_32(); /* $18: data output buffer */ + m68ki_fake_pull_32(); /* $1c: internal registers */ + m68ki_fake_pull_32(); /* $20: */ + m68ki_fake_pull_32(); /* $24: stage B address */ + m68ki_fake_pull_32(); /* $28: */ + m68ki_fake_pull_32(); /* $2c: data input buffer */ + m68ki_fake_pull_32(); /* $30: */ + m68ki_fake_pull_16(); /* $34: */ + m68ki_fake_pull_16(); /* $36: version #, internal information */ + m68ki_fake_pull_32(); /* $38: */ + m68ki_fake_pull_32(); /* $3c: */ + m68ki_fake_pull_32(); /* $40: */ + m68ki_fake_pull_32(); /* $44: */ + m68ki_fake_pull_32(); /* $48: */ + m68ki_fake_pull_32(); /* $4c: */ + m68ki_fake_pull_32(); /* $50: */ + m68ki_fake_pull_32(); /* $54: */ + m68ki_fake_pull_32(); /* $58: */ + + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; return; } /* Not handling long or short bus fault */ - (mc68kcpu)->instr_mode = INSTRUCTION_YES; - (mc68kcpu)->run_mode = RUN_MODE_NORMAL; - m68ki_exception_format_error(mc68kcpu); + m_instr_mode = INSTRUCTION_YES; + m_run_mode = RUN_MODE_NORMAL; + m68ki_exception_format_error(); return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(rtm, 32, ., .) { - if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_020_VARIANT()) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(rtr, 32, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_set_ccr((mc68kcpu), m68ki_pull_16(mc68kcpu)); - m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_set_ccr(m68ki_pull_16()); + m68ki_jump(m68ki_pull_32()); } M68KMAKE_OP(rts, 32, ., .) { - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu)); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_jump(m68ki_pull_32()); } M68KMAKE_OP(sbcd, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -9214,153 +9209,153 @@ M68KMAKE_OP(sbcd, 8, rr, .) M68KMAKE_OP(sbcd, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(sbcd, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_1(); uint32_t corf = 0; if(res > 0xf) corf = 6; res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); - (mc68kcpu)->v_flag = res; /* Undefined V behavior */ + m_v_flag = res; /* Undefined V behavior */ if(res > 0xff) { res += 0xa0; - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; } else if(res < corf) - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET; + m_x_flag = m_c_flag = CFLAG_SET; else - (mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0; + m_n_flag = m_x_flag = m_c_flag = 0; res = MASK_OUT_ABOVE_8(res - corf); - (mc68kcpu)->v_flag &= ~res; /* Undefined V behavior part II */ - (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */ - (mc68kcpu)->not_z_flag |= res; + m_v_flag &= ~res; /* Undefined V behavior part II */ + m_n_flag = NFLAG_8(res); /* Undefined N behavior */ + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(st, 8, ., d) { - DY(mc68kcpu) |= 0xff; + DY() |= 0xff; } M68KMAKE_OP(st, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, 0xff); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff); } M68KMAKE_OP(sf, 8, ., d) { - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; } M68KMAKE_OP(sf, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, 0); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0); } @@ -9368,230 +9363,230 @@ M68KMAKE_OP(scc, 8, ., d) { if(M68KMAKE_CC) { - DY(mc68kcpu) |= 0xff; - (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_scc_r_true; + DY() |= 0xff; + m_remaining_cycles -= m_cyc_scc_r_true; return; } - DY(mc68kcpu) &= 0xffffff00; + DY() &= 0xffffff00; } M68KMAKE_OP(scc, 8, ., .) { - m68ki_write_8((mc68kcpu), M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0); + m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0); } M68KMAKE_OP(stop, 0, ., .) { - if((mc68kcpu)->s_flag) + if(m_s_flag) { - uint32_t new_sr = OPER_I_16(mc68kcpu); - m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */ - (mc68kcpu)->stopped |= STOP_LEVEL_STOP; - m68ki_set_sr((mc68kcpu), new_sr); - (mc68kcpu)->remaining_cycles = 0; + uint32_t new_sr = OPER_I_16(); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m_stopped |= STOP_LEVEL_STOP; + m68ki_set_sr(new_sr); + m_remaining_cycles = 0; return; } - m68ki_exception_privilege_violation(mc68kcpu); + m68ki_exception_privilege_violation(); } M68KMAKE_OP(sub, 8, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 8, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_8; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(AY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 16, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_16; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(sub, 32, er, d) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 32, er, a) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = AY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = AY(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 32, er, .) { - uint32_t* r_dst = &DX(mc68kcpu); + uint32_t* r_dst = &DX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(sub, 8, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu)); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_8(DX()); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(sub, 16, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu)); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t src = MASK_OUT_ABOVE_16(DX()); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(sub, 32, re, .) { uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t src = DX(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t src = DX(); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(suba, 16, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY())); } M68KMAKE_OP(suba, 16, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY(mc68kcpu))); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY())); } M68KMAKE_OP(suba, 16, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16); *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); @@ -9600,23 +9595,23 @@ M68KMAKE_OP(suba, 16, ., .) M68KMAKE_OP(suba, 32, ., d) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY()); } M68KMAKE_OP(suba, 32, ., a) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY(mc68kcpu)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY()); } M68KMAKE_OP(suba, 32, ., .) { - uint32_t* r_dst = &AX(mc68kcpu); + uint32_t* r_dst = &AX(); uint32_t src = M68KMAKE_GET_OPER_AY_32; *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); @@ -9625,225 +9620,225 @@ M68KMAKE_OP(suba, 32, ., .) M68KMAKE_OP(subi, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_8(); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subi, 8, ., .) { - uint32_t src = OPER_I_8(mc68kcpu); + uint32_t src = OPER_I_8(); uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(subi, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_16(); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subi, 16, ., .) { - uint32_t src = OPER_I_16(mc68kcpu); + uint32_t src = OPER_I_16(); uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(subi, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t* r_dst = &DY(); + uint32_t src = OPER_I_32(); uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(subi, 32, ., .) { - uint32_t src = OPER_I_32(mc68kcpu); + uint32_t src = OPER_I_32(); uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(subq, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subq, 8, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_not_z_flag = MASK_OUT_ABOVE_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); - m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_8(ea, m_not_z_flag); } M68KMAKE_OP(subq, 16, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag; + *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag; } M68KMAKE_OP(subq, 16, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((m_ir >> 9) - 1) & 7) + 1)); } M68KMAKE_OP(subq, 16, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_16; - uint32_t dst = m68ki_read_16((mc68kcpu), ea); + uint32_t dst = m68ki_read_16(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_not_z_flag = MASK_OUT_ABOVE_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); - m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_16(ea, m_not_z_flag); } M68KMAKE_OP(subq, 32, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t* r_dst = &DY(); + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t dst = *r_dst; uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - *r_dst = (mc68kcpu)->not_z_flag; + *r_dst = m_not_z_flag; } M68KMAKE_OP(subq, 32, ., a) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - *r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1)); + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((m_ir >> 9) - 1) & 7) + 1)); } M68KMAKE_OP(subq, 32, ., .) { - uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1; + uint32_t src = (((m_ir >> 9) - 1) & 7) + 1; uint32_t ea = M68KMAKE_GET_EA_AY_32; - uint32_t dst = m68ki_read_32((mc68kcpu), ea); + uint32_t dst = m68ki_read_32(ea); uint32_t res = dst - src; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_not_z_flag = MASK_OUT_ABOVE_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); - m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag); + m68ki_write_32(ea, m_not_z_flag); } M68KMAKE_OP(subx, 8, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_8(DY()); uint32_t dst = MASK_OUT_ABOVE_8(*r_dst); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; } @@ -9851,17 +9846,17 @@ M68KMAKE_OP(subx, 8, rr, .) M68KMAKE_OP(subx, 16, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t* r_dst = &DX(); + uint32_t src = MASK_OUT_ABOVE_16(DY()); uint32_t dst = MASK_OUT_ABOVE_16(*r_dst); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; } @@ -9869,17 +9864,17 @@ M68KMAKE_OP(subx, 16, rr, .) M68KMAKE_OP(subx, 32, rr, .) { - uint32_t* r_dst = &DX(mc68kcpu); - uint32_t src = DY(mc68kcpu); + uint32_t* r_dst = &DX(); + uint32_t src = DY(); uint32_t dst = *r_dst; - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; *r_dst = res; } @@ -9887,134 +9882,134 @@ M68KMAKE_OP(subx, 32, rr, .) M68KMAKE_OP(subx, 8, mm, ax7) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, ay7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, axy7) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); - uint32_t ea = EA_A7_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); + uint32_t ea = EA_A7_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 8, mm, .) { - uint32_t src = OPER_AY_PD_8(mc68kcpu); - uint32_t ea = EA_AX_PD_8(mc68kcpu); - uint32_t dst = m68ki_read_8((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); + uint32_t ea = EA_AX_PD_8(); + uint32_t dst = m68ki_read_8(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res); - (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res); + m_n_flag = NFLAG_8(res); + m_x_flag = m_c_flag = CFLAG_8(res); + m_v_flag = VFLAG_SUB_8(src, dst, res); res = MASK_OUT_ABOVE_8(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_8((mc68kcpu), ea, res); + m68ki_write_8(ea, res); } M68KMAKE_OP(subx, 16, mm, .) { - uint32_t src = OPER_AY_PD_16(mc68kcpu); - uint32_t ea = EA_AX_PD_16(mc68kcpu); - uint32_t dst = m68ki_read_16((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_16(); + uint32_t ea = EA_AX_PD_16(); + uint32_t dst = m68ki_read_16(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res); - (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res); + m_n_flag = NFLAG_16(res); + m_x_flag = m_c_flag = CFLAG_16(res); + m_v_flag = VFLAG_SUB_16(src, dst, res); res = MASK_OUT_ABOVE_16(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_16((mc68kcpu), ea, res); + m68ki_write_16(ea, res); } M68KMAKE_OP(subx, 32, mm, .) { - uint32_t src = OPER_AY_PD_32(mc68kcpu); - uint32_t ea = EA_AX_PD_32(mc68kcpu); - uint32_t dst = m68ki_read_32((mc68kcpu), ea); - uint32_t res = dst - src - XFLAG_1(mc68kcpu); + uint32_t src = OPER_AY_PD_32(); + uint32_t ea = EA_AX_PD_32(); + uint32_t dst = m68ki_read_32(ea); + uint32_t res = dst - src - XFLAG_1(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res); - (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res); + m_n_flag = NFLAG_32(res); + m_x_flag = m_c_flag = CFLAG_SUB_32(src, dst, res); + m_v_flag = VFLAG_SUB_32(src, dst, res); res = MASK_OUT_ABOVE_32(res); - (mc68kcpu)->not_z_flag |= res; + m_not_z_flag |= res; - m68ki_write_32((mc68kcpu), ea, res); + m68ki_write_32(ea, res); } M68KMAKE_OP(swap, 32, ., .) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(*r_dst<<16); - *r_dst = (*r_dst>>16) | (mc68kcpu)->not_z_flag; + m_not_z_flag = MASK_OUT_ABOVE_32(*r_dst<<16); + *r_dst = (*r_dst>>16) | m_not_z_flag; - (mc68kcpu)->not_z_flag = *r_dst; - (mc68kcpu)->n_flag = NFLAG_32(*r_dst); - (mc68kcpu)->c_flag = CFLAG_CLEAR; - (mc68kcpu)->v_flag = VFLAG_CLEAR; + m_not_z_flag = *r_dst; + m_n_flag = NFLAG_32(*r_dst); + m_c_flag = CFLAG_CLEAR; + m_v_flag = VFLAG_CLEAR; } M68KMAKE_OP(tas, 8, ., d) { - uint32_t* r_dst = &DY(mc68kcpu); + uint32_t* r_dst = &DY(); - (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst); - (mc68kcpu)->n_flag = NFLAG_8(*r_dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = MASK_OUT_ABOVE_8(*r_dst); + m_n_flag = NFLAG_8(*r_dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; *r_dst |= 0x80; } @@ -10022,159 +10017,159 @@ M68KMAKE_OP(tas, 8, ., d) M68KMAKE_OP(tas, 8, ., .) { uint32_t ea = M68KMAKE_GET_EA_AY_8; - uint32_t dst = m68ki_read_8((mc68kcpu), ea); + uint32_t dst = m68ki_read_8(ea); - (mc68kcpu)->not_z_flag = dst; - (mc68kcpu)->n_flag = NFLAG_8(dst); - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_not_z_flag = dst; + m_n_flag = NFLAG_8(dst); + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; /* On the 68000 and 68010, the TAS instruction uses a unique bus cycle that may have side effects (e.g. delaying DMA) or may fail to write back at all depending on the bus implementation. In particular, the Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS to fail to write back in order to function properly. */ - if (CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type) && !(mc68kcpu)->tas_write_callback.isnull()) - ((mc68kcpu)->tas_write_callback)(*(mc68kcpu)->program, ea, dst | 0x80, 0xff); + if (CPU_TYPE_IS_010_LESS() && !m_tas_write_callback.isnull()) + (m_tas_write_callback)(*m_program, ea, dst | 0x80, 0xff); else - m68ki_write_8((mc68kcpu), ea, dst | 0x80); + m68ki_write_8(ea, dst | 0x80); } M68KMAKE_OP(trap, 0, ., .) { /* Trap#n stacks exception frame type 0 */ - m68ki_exception_trapN((mc68kcpu), EXCEPTION_TRAP_BASE + ((mc68kcpu)->ir & 0xf)); /* HJB 990403 */ + m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (m_ir & 0xf)); /* HJB 990403 */ } M68KMAKE_OP(trapt, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapt, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapt, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_PC(mc68kcpu) += 2; + m_pc += 2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapf, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 0, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 16, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - REG_PC(mc68kcpu) += 2; + m_pc += 2; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapcc, 32, ., .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { if(M68KMAKE_CC) { - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ return; } - REG_PC(mc68kcpu) += 4; + m_pc += 4; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(trapv, 0, ., .) { - if(COND_VC(mc68kcpu)) + if(COND_VC()) { return; } - m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */ + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ } M68KMAKE_OP(tst, 8, ., d) { - uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_8(DY()); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } @@ -10182,85 +10177,85 @@ M68KMAKE_OP(tst, 8, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_8; - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 8, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_8(mc68kcpu); + uint32_t res = OPER_PCDI_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 8, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_8(mc68kcpu); + uint32_t res = OPER_PCIX_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 8, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_8(mc68kcpu); + uint32_t res = OPER_I_8(); - (mc68kcpu)->n_flag = NFLAG_8(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_8(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., d) { - uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)); + uint32_t res = MASK_OUT_ABOVE_16(DY()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 16, ., a) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = MAKE_INT_16(AY(mc68kcpu)); + uint32_t res = MAKE_INT_16(AY()); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -10268,85 +10263,85 @@ M68KMAKE_OP(tst, 16, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_16; - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 16, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_16(mc68kcpu); + uint32_t res = OPER_PCDI_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_16(mc68kcpu); + uint32_t res = OPER_PCIX_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 16, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_16(mc68kcpu); + uint32_t res = OPER_I_16(); - (mc68kcpu)->n_flag = NFLAG_16(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_16(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., d) { - uint32_t res = DY(mc68kcpu); + uint32_t res = DY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 32, ., a) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = AY(mc68kcpu); + uint32_t res = AY(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } @@ -10354,195 +10349,195 @@ M68KMAKE_OP(tst, 32, ., .) { uint32_t res = M68KMAKE_GET_OPER_AY_32; - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; } M68KMAKE_OP(tst, 32, ., pcdi) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCDI_32(mc68kcpu); + uint32_t res = OPER_PCDI_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., pcix) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_PCIX_32(mc68kcpu); + uint32_t res = OPER_PCIX_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(tst, 32, ., i) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t res = OPER_I_32(mc68kcpu); + uint32_t res = OPER_I_32(); - (mc68kcpu)->n_flag = NFLAG_32(res); - (mc68kcpu)->not_z_flag = res; - (mc68kcpu)->v_flag = VFLAG_CLEAR; - (mc68kcpu)->c_flag = CFLAG_CLEAR; + m_n_flag = NFLAG_32(res); + m_not_z_flag = res; + m_v_flag = VFLAG_CLEAR; + m_c_flag = CFLAG_CLEAR; return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unlk, 32, ., a7) { - REG_A(mc68kcpu)[7] = m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[7]); + REG_A()[7] = m68ki_read_32(REG_A()[7]); } M68KMAKE_OP(unlk, 32, ., .) { - uint32_t* r_dst = &AY(mc68kcpu); + uint32_t* r_dst = &AY(); - REG_A(mc68kcpu)[7] = *r_dst; - *r_dst = m68ki_pull_32(mc68kcpu); + REG_A()[7] = *r_dst; + *r_dst = m68ki_pull_32(); } M68KMAKE_OP(unpk, 16, rr, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - /* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */ - uint32_t src = DY(mc68kcpu); - uint32_t* r_dst = &DX(mc68kcpu); + /* Note: DX() and DY() are reversed in Motorola's docs */ + uint32_t src = DY(); + uint32_t* r_dst = &DX(); - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu)) & 0xffff); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, ax7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_AY_PD_8(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, ay7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_A7_PD_8(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, axy7) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { - uint32_t src = OPER_A7_PD_8(mc68kcpu); + uint32_t src = OPER_A7_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_A7_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_A7_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(unpk, 16, mm, .) { - if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { /* Note: AX and AY are reversed in Motorola's docs */ - uint32_t src = OPER_AY_PD_8(mc68kcpu); + uint32_t src = OPER_AY_PD_8(); uint32_t ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, src & 0xff); - ea_dst = EA_AX_PD_8(mc68kcpu); - m68ki_write_8((mc68kcpu), ea_dst, (src >> 8) & 0xff); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, src & 0xff); + ea_dst = EA_AX_PD_8(); + m68ki_write_8(ea_dst, (src >> 8) & 0xff); return; } - m68ki_exception_illegal(mc68kcpu); + m68ki_exception_illegal(); } M68KMAKE_OP(cinv, 32, ., .) { - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - uint16_t ir = mc68kcpu->ir; + uint16_t ir = m_ir; uint8_t cache = (ir >> 6) & 3; // uint8_t scope = (ir >> 3) & 3; -// mc68kcpu->logerror("68040 %s: pc=%08x ir=%04x cache=%d scope=%d register=%d\n", ir & 0x0020 ? "cpush" : "cinv", REG_PPC(mc68kcpu), ir, cache, scope, ir & 7); +// logerror("68040 %s: pc=%08x ir=%04x cache=%d scope=%d register=%d\n", ir & 0x0020 ? "cpush" : "cinv", m_ppc, ir, cache, scope, ir & 7); switch (cache) { case 2: case 3: // we invalidate/push the whole instruction cache - m68ki_ic_clear(mc68kcpu); + m68ki_ic_clear(); } return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } M68KMAKE_OP(cpush, 32, ., .) { - if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_040_PLUS()) { - mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n", - (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir); + logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n", + tag(), m_ppc, m_ir); return; } - m68ki_exception_1111(mc68kcpu); + m68ki_exception_1111(); } XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp index e387f946784..8a0008bdfb5 100644 --- a/src/devices/cpu/m68000/m68kcpu.cpp +++ b/src/devices/cpu/m68000/m68kcpu.cpp @@ -26,23 +26,15 @@ static const char copyright_notice[] = #include "emu.h" #include "debugger.h" -#include "m68kcpu.h" -#include "m68kops.h" - -#include "m68kfpu.hxx" -#include "m68kmmu.h" +#include "m68000.h" #include "m68kdasm.h" -extern void m68040_fpu_op0(m68000_base_device *m68k); -extern void m68040_fpu_op1(m68000_base_device *m68k); -extern void m68881_mmu_ops(m68000_base_device *m68k); - /* ======================================================================== */ /* ================================= DATA ================================= */ /* ======================================================================== */ /* Used by shift & rotate instructions */ -const uint8_t m68ki_shift_8_table[65] = +const uint8_t m68000_base_device::m68ki_shift_8_table[65] = { 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -51,7 +43,7 @@ const uint8_t m68ki_shift_8_table[65] = 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; -const uint16_t m68ki_shift_16_table[65] = +const uint16_t m68000_base_device::m68ki_shift_16_table[65] = { 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00, 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, @@ -62,7 +54,7 @@ const uint16_t m68ki_shift_16_table[65] = 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff }; -const uint32_t m68ki_shift_32_table[65] = +const uint32_t m68000_base_device::m68ki_shift_32_table[65] = { 0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000, 0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000, @@ -81,7 +73,7 @@ const uint32_t m68ki_shift_32_table[65] = /* Number of clock cycles to use for exception processing. * I used 4 for any vectors that are undocumented for processing times. */ -const uint8_t m68ki_exception_cycle_table[7][256] = +const uint8_t m68000_base_device::m68ki_exception_cycle_table[7][256] = { { /* 000 */ 40, /* 0: Reset - Initial Stack Pointer */ @@ -596,7 +588,7 @@ const uint8_t m68ki_exception_cycle_table[7][256] = }, }; -const uint8_t m68ki_ea_idx_cycle_table[64] = +const uint8_t m68000_base_device::m68ki_ea_idx_cycle_table[64] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* ..01.000 no memory indirect, base nullptr */ @@ -636,73 +628,73 @@ const uint8_t m68ki_ea_idx_cycle_table[64] = /* ================================= API ================================== */ /* ======================================================================== */ -static void set_irq_line(m68000_base_device *m68k, int irqline, int state) +void m68000_base_device::set_irq_line(int irqline, int state) { - uint32_t old_level = m68k->int_level; - uint32_t vstate = m68k->virq_state; + uint32_t old_level = m_int_level; + uint32_t vstate = m_virq_state; uint32_t blevel; if(state == ASSERT_LINE) vstate |= 1 << irqline; else vstate &= ~(1 << irqline); - m68k->virq_state = vstate; + m_virq_state = vstate; for(blevel = 7; blevel > 0; blevel--) if(vstate & (1 << blevel)) break; - m68k->int_level = blevel << 8; + m_int_level = blevel << 8; /* A transition from < 7 to 7 always interrupts (NMI) */ /* Note: Level 7 can also level trigger like a normal IRQ */ - if(old_level != 0x0700 && m68k->int_level == 0x0700) - m68k->nmi_pending = true; + if(old_level != 0x0700 && m_int_level == 0x0700) + m_nmi_pending = true; } void m68000_base_device::presave() { - save_sr = m68ki_get_sr(this); - save_stopped = (stopped & STOP_LEVEL_STOP) != 0; - save_halted = (stopped & STOP_LEVEL_HALT) != 0; + m_save_sr = m68ki_get_sr(); + m_save_stopped = (m_stopped & STOP_LEVEL_STOP) != 0; + m_save_halted = (m_stopped & STOP_LEVEL_HALT) != 0; } void m68000_base_device::postload() { - m68ki_set_sr_noint_nosp(this, save_sr); + m68ki_set_sr_noint_nosp(m_save_sr); //fprintf(stderr, "Reloaded, pc=%x\n", REG_PC(m68k)); - stopped = (save_stopped ? STOP_LEVEL_STOP : 0) | (save_halted ? STOP_LEVEL_HALT : 0); - m68ki_jump(this, REG_PC(this)); + m_stopped = (m_save_stopped ? STOP_LEVEL_STOP : 0) | (m_save_halted ? STOP_LEVEL_HALT : 0); + m68ki_jump(m_pc); } -static void m68k_cause_bus_error(m68000_base_device *m68k) +void m68000_base_device::m68k_cause_bus_error() { uint32_t sr; - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); - m68k->run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_010_PLUS(m68k->cpu_type)) + if (!CPU_TYPE_IS_010_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(m68k, sr); + m68ki_stack_frame_buserr(sr); } - else if (CPU_TYPE_IS_010(m68k->cpu_type)) + else if (CPU_TYPE_IS_010()) { /* only the 68010 throws this unique type-1000 frame */ - m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR); + m68ki_stack_frame_1000(m_ppc, sr, EXCEPTION_BUS_ERROR); } - else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k)) + else if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } - m68ki_jump_vector(m68k, EXCEPTION_BUS_ERROR); + m68ki_jump_vector(EXCEPTION_BUS_ERROR); } bool m68000_base_device::memory_translate(int space, int intention, offs_t &address) @@ -710,28 +702,28 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr /* only applies to the program address space and only does something if the MMU's enabled */ { /* 68040 needs to call the MMU even when disabled so transparent translation works */ - if ((space == AS_PROGRAM) && ((pmmu_enabled) || (CPU_TYPE_IS_040_PLUS(cpu_type)))) + if ((space == AS_PROGRAM) && ((m_pmmu_enabled) || (CPU_TYPE_IS_040_PLUS()))) { - // FIXME: mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc - uint16_t temp_mmu_tmp_sr = mmu_tmp_sr; - int mode = s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM; + // FIXME: m_mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc + uint16_t temp_mmu_tmp_sr = m_mmu_tmp_sr; + int mode = m_s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM; // uint32_t va=address; - if (CPU_TYPE_IS_040_PLUS(cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - address = pmmu_translate_addr_with_fc_040(this, address, mode, 1); + address = pmmu_translate_addr_with_fc_040(address, mode, 1); } else { - address = pmmu_translate_addr_with_fc(this, address, mode, 1); + address = pmmu_translate_addr_with_fc(address, mode, 1); } - if ((mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) { -// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",mmu_tmp_sr,va ,address); + if ((m_mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) { +// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",m_mmu_tmp_sr,va ,address); address = 0; } - mmu_tmp_sr = temp_mmu_tmp_sr; + m_mmu_tmp_sr = temp_mmu_tmp_sr; } } return true; @@ -745,24 +737,24 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr -inline void m68000_base_device::cpu_execute(void) +void m68000_base_device::execute_run() { - initial_cycles = remaining_cycles; + m_initial_cycles = m_remaining_cycles; /* eat up any reset cycles */ - if (reset_cycles) { - int rc = reset_cycles; - reset_cycles = 0; - remaining_cycles -= rc; + if (m_reset_cycles) { + int rc = m_reset_cycles; + m_reset_cycles = 0; + m_remaining_cycles -= rc; - if (remaining_cycles <= 0) return; + if (m_remaining_cycles <= 0) return; } /* See if interrupts came in */ - m68ki_check_interrupts(this); + m68ki_check_interrupts(); /* Make sure we're not stopped */ - if(!stopped) + if(!m_stopped) { /* Return point if we had an address error */ check_address_error: @@ -770,123 +762,119 @@ inline void m68000_base_device::cpu_execute(void) { m_address_error = 0; try { - m68ki_exception_address_error(this); + m68ki_exception_address_error(); } catch(int error) { if (error==10) { m_address_error = 1; - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; goto check_address_error; } else throw; } - if(stopped) + if(m_stopped) { - if (remaining_cycles > 0) - remaining_cycles = 0; + if (m_remaining_cycles > 0) + m_remaining_cycles = 0; return; } } /* Main loop. Keep going until we run out of clock cycles */ - while (remaining_cycles > 0) + while (m_remaining_cycles > 0) { /* Set tracing accodring to T1. (T0 is done inside instruction) */ - m68ki_trace_t1(this); /* auto-disable (see m68kcpu.h) */ + m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */ /* Record previous program counter */ - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; /* Call external hook to peek at CPU */ - debugger_instruction_hook(this, REG_PC(this)); - - /* call external instruction hook (independent of debug mode) */ - if (!instruction_hook.isnull()) - instruction_hook(*program, REG_PC(this), 0xffffffff); + debugger_instruction_hook(this, m_pc); try { - if (!pmmu_enabled) + if (!m_pmmu_enabled) { - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; /* Read an instruction and call its handler */ - ir = m68ki_read_imm_16(this); - jump_table[ir](this); - remaining_cycles -= cyc_instruction[ir]; + m_ir = m68ki_read_imm_16(); + (this->*m_jump_table[m_ir])(); + m_remaining_cycles -= m_cyc_instruction[m_ir]; } else { - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; // save CPU address registers values at start of instruction int i; uint32_t tmp_dar[16]; for (i = 15; i >= 0; i--) { - tmp_dar[i] = REG_DA(this)[i]; + tmp_dar[i] = REG_DA()[i]; } - mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; /* Read an instruction and call its handler */ - ir = m68ki_read_imm_16(this); + m_ir = m68ki_read_imm_16(); - if (!mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { - jump_table[ir](this); - remaining_cycles -= cyc_instruction[ir]; + (this->*m_jump_table[m_ir])(); + m_remaining_cycles -= m_cyc_instruction[m_ir]; } - if (mmu_tmp_buserror_occurred) + if (m_mmu_tmp_buserror_occurred) { uint32_t sr; - mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; // restore cpu address registers to value at start of instruction for (i = 15; i >= 0; i--) { - if (REG_DA(this)[i] != tmp_dar[i]) + if (REG_DA()[i] != tmp_dar[i]) { // logerror("PMMU: pc=%08x sp=%08x bus error: fixed %s[%d]: %08x -> %08x\n", -// REG_PPC(this), REG_A(this)[7], i < 8 ? "D" : "A", i & 7, REG_DA(this)[i], tmp_dar[i]); - REG_DA(this)[i] = tmp_dar[i]; +// m_ppc, REG_A()[7], i < 8 ? "D" : "A", i & 7, REG_DA()[i], tmp_dar[i]); + REG_DA()[i] = tmp_dar[i]; } } - sr = m68ki_init_exception(this); + sr = m68ki_init_exception(); - run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_020_PLUS(cpu_type)) + if (!CPU_TYPE_IS_020_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(this, sr); + m68ki_stack_frame_buserr(sr); } - else if(!CPU_TYPE_IS_040_PLUS(cpu_type)) { - if (mmu_tmp_buserror_address == REG_PPC(this)) + else if(!CPU_TYPE_IS_040_PLUS()) { + if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } } else { - m68ki_stack_frame_0111(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address, true); + m68ki_stack_frame_0111(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address, true); } - m68ki_jump_vector(this, EXCEPTION_BUS_ERROR); + m68ki_jump_vector(EXCEPTION_BUS_ERROR); // TODO: /* Use up some clock cycles and undo the instruction's cycles */ - // remaining_cycles -= cyc_exception[EXCEPTION_BUS_ERROR] - cyc_instruction[ir]; + // m_remaining_cycles -= m_cyc_exception[EXCEPTION_BUS_ERROR] - m_cyc_instruction[m_ir]; } } } @@ -903,14 +891,14 @@ inline void m68000_base_device::cpu_execute(void) /* Trace m68k_exception, if necessary */ - m68ki_exception_if_trace(this); /* auto-disable (see m68kcpu.h) */ + m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */ } /* set previous PC to current PC for the next entry into the loop */ - REG_PPC(this) = REG_PC(this); + m_ppc = m_pc; } - else if (remaining_cycles > 0) - remaining_cycles = 0; + else if (m_remaining_cycles > 0) + m_remaining_cycles = 0; } @@ -920,15 +908,15 @@ void m68000_base_device::init_cpu_common(void) static uint32_t emulation_initialized = 0; //this = device;//deviceparam; - program = &space(AS_PROGRAM); - oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : program; - int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this); + m_program = &space(AS_PROGRAM); + m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program; + m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this); /* disable all MMUs */ - has_pmmu = 0; - has_hmmu = 0; - pmmu_enabled = 0; - hmmu_enabled = 0; + m_has_pmmu = 0; + m_has_hmmu = 0; + m_pmmu_enabled = 0; + m_hmmu_enabled = 0; /* The first call to this function initializes the opcode handler jump table */ if(!emulation_initialized) @@ -938,116 +926,116 @@ void m68000_base_device::init_cpu_common(void) } /* Note, D covers A because the dar array is common, REG_A(m68k)=REG_D(m68k)+8 */ - save_item(NAME(REG_D(this))); - save_item(NAME(REG_PPC(this))); - save_item(NAME(REG_PC(this))); - save_item(NAME(REG_USP(this))); - save_item(NAME(REG_ISP(this))); - save_item(NAME(REG_MSP(this))); - save_item(NAME(vbr)); - save_item(NAME(sfc)); - save_item(NAME(dfc)); - save_item(NAME(cacr)); - save_item(NAME(caar)); - save_item(NAME(save_sr)); - save_item(NAME(int_level)); - save_item(NAME(save_stopped)); - save_item(NAME(save_halted)); - save_item(NAME(pref_addr)); - save_item(NAME(pref_data)); - save_item(NAME(reset_cycles)); - save_item(NAME(virq_state)); - save_item(NAME(nmi_pending)); - save_item(NAME(has_pmmu)); - save_item(NAME(has_hmmu)); - save_item(NAME(pmmu_enabled)); - save_item(NAME(hmmu_enabled)); - - save_item(NAME(mmu_crp_aptr)); - save_item(NAME(mmu_crp_limit)); - save_item(NAME(mmu_srp_aptr)); - save_item(NAME(mmu_srp_limit)); - save_item(NAME(mmu_urp_aptr)); - save_item(NAME(mmu_tc)); - save_item(NAME(mmu_sr)); - save_item(NAME(mmu_sr_040)); - save_item(NAME(mmu_atc_rr)); - save_item(NAME(mmu_tt0)); - save_item(NAME(mmu_tt1)); - save_item(NAME(mmu_itt0)); - save_item(NAME(mmu_itt1)); - save_item(NAME(mmu_dtt0)); - save_item(NAME(mmu_dtt1)); - save_item(NAME(mmu_acr0)); - save_item(NAME(mmu_acr1)); - save_item(NAME(mmu_acr2)); - save_item(NAME(mmu_acr3)); - save_item(NAME(mmu_last_page_entry)); - save_item(NAME(mmu_last_page_entry_addr)); + save_item(NAME(REG_D())); + save_item(NAME(m_ppc)); + save_item(NAME(m_pc)); + save_item(NAME(REG_USP())); + save_item(NAME(REG_ISP())); + save_item(NAME(REG_MSP())); + save_item(NAME(m_vbr)); + save_item(NAME(m_sfc)); + save_item(NAME(m_dfc)); + save_item(NAME(m_cacr)); + save_item(NAME(m_caar)); + save_item(NAME(m_save_sr)); + save_item(NAME(m_int_level)); + save_item(NAME(m_save_stopped)); + save_item(NAME(m_save_halted)); + save_item(NAME(m_pref_addr)); + save_item(NAME(m_pref_data)); + save_item(NAME(m_reset_cycles)); + save_item(NAME(m_virq_state)); + save_item(NAME(m_nmi_pending)); + save_item(NAME(m_has_pmmu)); + save_item(NAME(m_has_hmmu)); + save_item(NAME(m_pmmu_enabled)); + save_item(NAME(m_hmmu_enabled)); + + save_item(NAME(m_mmu_crp_aptr)); + save_item(NAME(m_mmu_crp_limit)); + save_item(NAME(m_mmu_srp_aptr)); + save_item(NAME(m_mmu_srp_limit)); + save_item(NAME(m_mmu_urp_aptr)); + save_item(NAME(m_mmu_tc)); + save_item(NAME(m_mmu_sr)); + save_item(NAME(m_mmu_sr_040)); + save_item(NAME(m_mmu_atc_rr)); + save_item(NAME(m_mmu_tt0)); + save_item(NAME(m_mmu_tt1)); + save_item(NAME(m_mmu_itt0)); + save_item(NAME(m_mmu_itt1)); + save_item(NAME(m_mmu_dtt0)); + save_item(NAME(m_mmu_dtt1)); + save_item(NAME(m_mmu_acr0)); + save_item(NAME(m_mmu_acr1)); + save_item(NAME(m_mmu_acr2)); + save_item(NAME(m_mmu_acr3)); + save_item(NAME(m_mmu_last_page_entry)); + save_item(NAME(m_mmu_last_page_entry_addr)); for (int i=0; i 0) - remaining_cycles = 0; + m_stopped = 0; + if (m_remaining_cycles > 0) + m_remaining_cycles = 0; - run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; /* Turn off tracing */ - t1_flag = t0_flag = 0; - m68ki_clear_trace(this); + m_t1_flag = m_t0_flag = 0; + m68ki_clear_trace(); /* Interrupt mask to level 7 */ - int_mask = 0x0700; - int_level = 0; - virq_state = 0; + m_int_mask = 0x0700; + m_int_level = 0; + m_virq_state = 0; /* Reset VBR */ - vbr = 0; + m_vbr = 0; /* Go to supervisor mode */ - m68ki_set_sm_flag(this, SFLAG_SET | MFLAG_CLEAR); + m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR); /* Invalidate the prefetch queue */ /* Set to arbitrary number since our first fetch is from 0 */ - pref_addr = 0x1000; + m_pref_addr = 0x1000; /* Read the initial stack pointer and program counter */ - m68ki_jump(this, 0); - REG_SP(this) = m68ki_read_imm_32(this); - REG_PC(this) = m68ki_read_imm_32(this); - m68ki_jump(this, REG_PC(this)); + m68ki_jump(0); + REG_SP() = m68ki_read_imm_32(); + m_pc = m68ki_read_imm_32(); + m68ki_jump(m_pc); - run_mode = RUN_MODE_NORMAL; + m_run_mode = RUN_MODE_NORMAL; - reset_cycles = cyc_exception[EXCEPTION_RESET]; + m_reset_cycles = m_cyc_exception[EXCEPTION_RESET]; /* flush the MMU's cache */ - pmmu_atc_flush(this); + pmmu_atc_flush(); - if(CPU_TYPE_IS_EC020_PLUS(cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) { // clear instruction cache - m68ki_ic_clear(this); + m68ki_ic_clear(); } } @@ -1062,37 +1050,37 @@ void m68000_base_device::state_import(const device_state_entry &entry) switch (entry.index()) { case STATE_GENPC: - ppc = pc; + m_ppc = m_pc; break; case STATE_GENPCBASE: - pc = ppc; + m_pc = m_ppc; break; case M68K_SR: case STATE_GENFLAGS: - m68ki_set_sr(this, iotemp); + m68ki_set_sr(m_iotemp); break; case M68K_ISP: - if (s_flag && !m_flag) - REG_SP(this) = iotemp; + if (m_s_flag && !m_m_flag) + REG_SP() = m_iotemp; else - REG_ISP(this) = iotemp; + REG_ISP() = m_iotemp; break; case M68K_USP: - if (!s_flag) - REG_SP(this) = iotemp; + if (!m_s_flag) + REG_SP() = m_iotemp; else - REG_USP(this) = iotemp; + REG_USP() = m_iotemp; break; case M68K_MSP: - if (s_flag && m_flag) - REG_SP(this) = iotemp; + if (m_s_flag && m_m_flag) + REG_SP() = m_iotemp; else - REG_MSP(this) = iotemp; + REG_MSP() = m_iotemp; break; default: @@ -1109,19 +1097,19 @@ void m68000_base_device::state_export(const device_state_entry &entry) { case M68K_SR: case STATE_GENFLAGS: - iotemp = m68ki_get_sr(this); + m_iotemp = m68ki_get_sr(); break; case M68K_ISP: - iotemp = (s_flag && !m_flag) ? REG_SP(this) : REG_ISP(this); + m_iotemp = (m_s_flag && !m_m_flag) ? REG_SP() : REG_ISP(); break; case M68K_USP: - iotemp = (!s_flag) ? REG_SP(this) : REG_USP(this); + m_iotemp = (!m_s_flag) ? REG_SP() : REG_USP(); break; case M68K_MSP: - iotemp = (s_flag && m_flag) ? REG_SP(this) : REG_MSP(this); + m_iotemp = (m_s_flag && m_m_flag) ? REG_SP() : REG_MSP(); break; case M68K_FP0: @@ -1146,39 +1134,39 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st switch (entry.index()) { case M68K_FP0: - str = string_format("%f", fx80_to_double(REG_FP(this)[0])); + str = string_format("%f", fx80_to_double(m_fpr[0])); break; case M68K_FP1: - str = string_format("%f", fx80_to_double(REG_FP(this)[1])); + str = string_format("%f", fx80_to_double(m_fpr[1])); break; case M68K_FP2: - str = string_format("%f", fx80_to_double(REG_FP(this)[2])); + str = string_format("%f", fx80_to_double(m_fpr[2])); break; case M68K_FP3: - str = string_format("%f", fx80_to_double(REG_FP(this)[3])); + str = string_format("%f", fx80_to_double(m_fpr[3])); break; case M68K_FP4: - str = string_format("%f", fx80_to_double(REG_FP(this)[4])); + str = string_format("%f", fx80_to_double(m_fpr[4])); break; case M68K_FP5: - str = string_format("%f", fx80_to_double(REG_FP(this)[5])); + str = string_format("%f", fx80_to_double(m_fpr[5])); break; case M68K_FP6: - str = string_format("%f", fx80_to_double(REG_FP(this)[6])); + str = string_format("%f", fx80_to_double(m_fpr[6])); break; case M68K_FP7: - str = string_format("%f", fx80_to_double(REG_FP(this)[7])); + str = string_format("%f", fx80_to_double(m_fpr[7])); break; case STATE_GENFLAGS: - sr = m68ki_get_sr(this); + sr = m68ki_get_sr(); str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c", sr & 0x8000 ? 'T':'.', sr & 0x4000 ? 't':'.', @@ -1206,22 +1194,12 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st void m68000_base_device::set_hmmu_enable(int enable) { - hmmu_enabled = enable; + m_hmmu_enabled = enable; } void m68000_base_device::set_fpu_enable(int enable) { - has_fpu = enable; -} - -int m68000_base_device::get_fpu_enable() -{ - return has_fpu; -} - -void m68000_base_device::set_instruction_hook(read32_delegate ihook) -{ - instruction_hook = ihook; + m_has_fpu = enable; } /**************************************************************************** @@ -1239,16 +1217,15 @@ void m68000_base_device::init8(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); -// m_cpustate = this; - opcode_xor = 0; + m_opcode_xor = 0; - readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word, &space); - read32 = m68k_read32_delegate(&address_space::read_dword, &space); - write8 = m68k_write8_delegate(&address_space::write_byte, &space); - write16 = m68k_write16_delegate(&address_space::write_word, &space); - write32 = m68k_write32_delegate(&address_space::write_dword, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword, &space); + m_write8 = m68k_write8_delegate(&address_space::write_byte, &space); + m_write16 = m68k_write16_delegate(&address_space::write_word, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword, &space); } /**************************************************************************** @@ -1257,7 +1234,7 @@ void m68000_base_device::init8(address_space &space, address_space &ospace) uint16_t m68000_base_device::read_immediate_16(offs_t address) { - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } uint16_t m68000_base_device::simple_read_immediate_16(offs_t address) @@ -1279,15 +1256,15 @@ void m68000_base_device::init16(address_space &space, address_space &ospace) m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = 0; + m_opcode_xor = 0; - readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word, &space); - read32 = m68k_read32_delegate(&address_space::read_dword, &space); - write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this); - write16 = m68k_write16_delegate(&address_space::write_word, &space); - write32 = m68k_write32_delegate(&address_space::write_dword, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword, &space); + m_write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this); + m_write16 = m68k_write16_delegate(&address_space::write_word, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword, &space); } @@ -1305,24 +1282,24 @@ void m68000_base_device::init32(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this); - read8 = m68k_read8_delegate(&address_space::read_byte, &space); - read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space); - read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space); - write8 = m68k_write8_delegate(&address_space::write_byte, &space); - write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space); - write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this); + m_read8 = m68k_read8_delegate(&address_space::read_byte, &space); + m_read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space); + m_read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space); + m_write8 = m68k_write8_delegate(&address_space::write_byte, &space); + m_write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space); + m_write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space); } /* interface for 32-bit data bus with PMMU (68EC020, 68020) */ uint8_t m68000_base_device::read_byte_32_mmu(offs_t address) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } } @@ -1332,10 +1309,10 @@ uint8_t m68000_base_device::read_byte_32_mmu(offs_t address) void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } } @@ -1345,15 +1322,15 @@ void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data) uint16_t m68000_base_device::read_immediate_16_mmu(offs_t address) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - address = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + address = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } } - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } /* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */ @@ -1361,16 +1338,16 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address) { uint16_t result; - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if (WORD_ALIGNED(address)) { return m_space->read_word(address0); } else { - uint32_t address1 = pmmu_translate_addr(this, address + 1); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address + 1); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else { result = m_space->read_byte(address0) << 8; @@ -1388,17 +1365,17 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address) /* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writeword_d32_mmu(offs_t address, uint16_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } else if (WORD_ALIGNED(address)) { m_space->write_word(address0, data); return; } else { - uint32_t address1 = pmmu_translate_addr(this, address + 1); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address + 1); + if (m_mmu_tmp_buserror_occurred) { return; } else { m_space->write_byte(address0, data >> 8); @@ -1422,10 +1399,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) { uint32_t result; - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if ((address +3) & 0xfc) { // not at page boundary; use default code @@ -1433,16 +1410,16 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) } else if (DWORD_ALIGNED(address)) { // 0 return m_space->read_dword(address0); } else { - uint32_t address2 = pmmu_translate_addr(this, address+2); - if (mmu_tmp_buserror_occurred) { + uint32_t address2 = pmmu_translate_addr(address+2); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else if (WORD_ALIGNED(address)) { // 2 result = m_space->read_word(address0) << 16; return result | m_space->read_word(address2); } else { - uint32_t address1 = pmmu_translate_addr(this, address+1); - uint32_t address3 = pmmu_translate_addr(this, address+3); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address+1); + uint32_t address3 = pmmu_translate_addr(address+3); + if (m_mmu_tmp_buserror_occurred) { return ~0; } else { result = m_space->read_byte(address0) << 24; @@ -1468,10 +1445,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address) /* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data) { - if (pmmu_enabled) + if (m_pmmu_enabled) { - uint32_t address0 = pmmu_translate_addr(this, address); - if (mmu_tmp_buserror_occurred) { + uint32_t address0 = pmmu_translate_addr(address); + if (m_mmu_tmp_buserror_occurred) { return; } else if ((address +3) & 0xfc) { // not at page boundary; use default code @@ -1480,17 +1457,17 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data) m_space->write_dword(address0, data); return; } else { - uint32_t address2 = pmmu_translate_addr(this, address+2); - if (mmu_tmp_buserror_occurred) { + uint32_t address2 = pmmu_translate_addr(address+2); + if (m_mmu_tmp_buserror_occurred) { return; } else if (WORD_ALIGNED(address)) { // 2 m_space->write_word(address0, data >> 16); m_space->write_word(address2, data); return; } else { - uint32_t address1 = pmmu_translate_addr(this, address+1); - uint32_t address3 = pmmu_translate_addr(this, address+3); - if (mmu_tmp_buserror_occurred) { + uint32_t address1 = pmmu_translate_addr(address+1); + uint32_t address3 = pmmu_translate_addr(address+3); + if (m_mmu_tmp_buserror_occurred) { return; } else { m_space->write_byte(address0, data >> 24); @@ -1524,24 +1501,24 @@ void m68000_base_device::init32mmu(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this); - read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this); - read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this); - read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this); - write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this); - write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this); - write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this); + m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this); + m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this); + m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this); + m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this); + m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this); + m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this); } /* interface for 32-bit data bus with PMMU (68EC020, 68020) */ uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } return m_space->read_byte(address); @@ -1549,9 +1526,9 @@ uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address) void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } m_space->write_byte(address, data); @@ -1559,12 +1536,12 @@ void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data) uint16_t m68000_base_device::read_immediate_16_hmmu(offs_t address) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } - return m_odirect->read_word((address), opcode_xor); + return m_odirect->read_word((address), m_opcode_xor); } /* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */ @@ -1572,9 +1549,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address) { uint16_t result; - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (WORD_ALIGNED(address)) @@ -1586,9 +1563,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address) /* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writeword_d32_hmmu(offs_t address, uint16_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (WORD_ALIGNED(address)) @@ -1605,9 +1582,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address) { uint32_t result; - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (DWORD_ALIGNED(address)) @@ -1625,9 +1602,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address) /* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */ void m68000_base_device::writelong_d32_hmmu(offs_t address, uint32_t data) { - if (hmmu_enabled) + if (m_hmmu_enabled) { - address = hmmu_translate_addr(this, address); + address = hmmu_translate_addr(address); } if (DWORD_ALIGNED(address)) @@ -1652,20 +1629,20 @@ void m68000_base_device::init32hmmu(address_space &space, address_space &ospace) m_direct = space.direct<0>(); m_ospace = &ospace; m_odirect = ospace.direct<0>(); - opcode_xor = WORD_XOR_BE(0); + m_opcode_xor = WORD_XOR_BE(0); - readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this); - read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this); - read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this); - read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this); - write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this); - write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this); - write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this); + m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this); + m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this); + m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this); + m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this); + m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this); + m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this); + m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this); } void m68000_base_device::set_reset_callback(write_line_delegate callback) { - reset_instr_callback = callback; + m_reset_instr_callback = callback; } // fault_addr = address to indicate fault at @@ -1673,29 +1650,30 @@ void m68000_base_device::set_reset_callback(write_line_delegate callback) // fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here) void m68000_base_device::set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc) { - aerr_address = fault_addr; - aerr_write_mode = rw; - aerr_fc = fc; + m_aerr_address = fault_addr; + m_aerr_write_mode = rw; + m_aerr_fc = fc; + m_mmu_tmp_buserror_address = fault_addr; // Hack for x68030 } void m68000_base_device::set_cmpild_callback(write32_delegate callback) { - cmpild_instr_callback = callback; + m_cmpild_instr_callback = callback; } void m68000_base_device::set_rte_callback(write_line_delegate callback) { - rte_instr_callback = callback; + m_rte_instr_callback = callback; } void m68000_base_device::set_tas_write_callback(write8_delegate callback) { - tas_write_callback = callback; + m_tas_write_callback = callback; } uint16_t m68000_base_device::get_fc() { - return mmu_tmp_fc; + return m_mmu_tmp_fc; } /**************************************************************************** @@ -1704,49 +1682,50 @@ uint16_t m68000_base_device::get_fc() void m68000_base_device::define_state(void) { - uint32_t addrmask = (cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff; + uint32_t addrmask = (m_cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff; - state_add(STATE_GENPC, "PC", pc).mask(addrmask).callimport(); - state_add(STATE_GENPCBASE, "CURPC", ppc).mask(addrmask).callimport().noshow(); - state_add(M68K_SP, "SP", dar[15]); - state_add(STATE_GENSP, "GENSP", dar[15]).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", iotemp).noshow().callimport().callexport().formatstr("%16s"); - state_add(M68K_ISP, "ISP", iotemp).callimport().callexport(); - state_add(M68K_USP, "USP", iotemp).callimport().callexport(); - if (cpu_type & MASK_020_OR_LATER) - state_add(M68K_MSP, "MSP", iotemp).callimport().callexport(); - state_add(M68K_SR, "SR", iotemp).noshow().callimport().callexport(); + state_add(STATE_GENPC, "PC", m_pc).mask(addrmask).callimport(); + state_add(STATE_GENPCBASE, "CURPC", m_ppc).mask(addrmask).callimport().noshow(); + state_add(M68K_SP, "SP", m_dar[15]); + state_add(STATE_GENSP, "GENSP", m_dar[15]).noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_iotemp).noshow().callimport().callexport().formatstr("%16s"); + state_add(M68K_ISP, "ISP", m_iotemp).callimport().callexport(); + state_add(M68K_USP, "USP", m_iotemp).callimport().callexport(); + if (m_cpu_type & MASK_020_OR_LATER) + state_add(M68K_MSP, "MSP", m_iotemp).callimport().callexport(); + state_add(M68K_SR, "SR", m_iotemp).noshow().callimport().callexport(); for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), dar[regnum]); + state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), m_dar[regnum]); } for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), dar[8 + regnum]); + state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), m_dar[8 + regnum]); } - state_add(M68K_PREF_ADDR, "PREF_ADDR", pref_addr).mask(addrmask); - state_add(M68K_PREF_DATA, "PREF_DATA", pref_data); + state_add(M68K_IR, "IR", m_ir); + state_add(M68K_PREF_ADDR, "PREF_ADDR", m_pref_addr).mask(addrmask); + state_add(M68K_PREF_DATA, "PREF_DATA", m_pref_data); - if (cpu_type & MASK_010_OR_LATER) + if (m_cpu_type & MASK_010_OR_LATER) { - state_add(M68K_SFC, "SFC", sfc).mask(0x7); - state_add(M68K_DFC, "DFC", dfc).mask(0x7); - state_add(M68K_VBR, "VBR", vbr); + state_add(M68K_SFC, "SFC", m_sfc).mask(0x7); + state_add(M68K_DFC, "DFC", m_dfc).mask(0x7); + state_add(M68K_VBR, "VBR", m_vbr); } - if (cpu_type & MASK_020_OR_LATER) + if (m_cpu_type & MASK_020_OR_LATER) { - state_add(M68K_CACR, "CACR", cacr); - state_add(M68K_CAAR, "CAAR", caar); + state_add(M68K_CACR, "CACR", m_cacr); + state_add(M68K_CAAR, "CAAR", m_caar); } - if (cpu_type & MASK_030_OR_LATER) + if (m_cpu_type & MASK_030_OR_LATER) { for (int regnum = 0; regnum < 8; regnum++) { - state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), iotemp).callimport().callexport().formatstr("%10s"); + state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), m_iotemp).callimport().callexport().formatstr("%10s"); } - state_add(M68K_FPSR, "FPSR", fpsr); - state_add(M68K_FPCR, "FPCR", fpcr); + state_add(M68K_FPSR, "FPSR", m_fpsr); + state_add(M68K_FPCR, "FPCR", m_fpcr); } } @@ -1761,26 +1740,25 @@ void m68000_base_device::init_cpu_m68000(void) { init_cpu_common(); - cpu_type = CPU_TYPE_000; -// dasm_type = M68K_CPU_TYPE_68000; - - init16(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[0]; - cyc_instruction = m68ki_cycles[0]; - cyc_exception = m68ki_exception_cycle_table[0]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 2; - cyc_dbcc_f_noexp = -2; - cyc_dbcc_f_exp = 2; - cyc_scc_r_true = 2; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 132; - has_pmmu = 0; - has_hmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_000; + + init16(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[0]; + m_cyc_instruction = m68ki_cycles[0]; + m_cyc_exception = m68ki_exception_cycle_table[0]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 2; + m_cyc_dbcc_f_noexp = -2; + m_cyc_dbcc_f_exp = 2; + m_cyc_scc_r_true = 2; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 132; + m_has_pmmu = 0; + m_has_hmmu = 0; + m_has_fpu = 0; define_state(); @@ -1791,25 +1769,24 @@ void m68000_base_device::init_cpu_m68008(void) { init_cpu_common(); - cpu_type = CPU_TYPE_008; -// dasm_type = M68K_CPU_TYPE_68008; - - init8(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[0]; - cyc_instruction = m68ki_cycles[0]; - cyc_exception = m68ki_exception_cycle_table[0]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 2; - cyc_dbcc_f_noexp = -2; - cyc_dbcc_f_exp = 2; - cyc_scc_r_true = 2; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 132; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_008; + + init8(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[0]; + m_cyc_instruction = m68ki_cycles[0]; + m_cyc_exception = m68ki_exception_cycle_table[0]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 2; + m_cyc_dbcc_f_noexp = -2; + m_cyc_dbcc_f_exp = 2; + m_cyc_scc_r_true = 2; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 132; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); @@ -1819,25 +1796,24 @@ void m68000_base_device::init_cpu_m68008(void) void m68000_base_device::init_cpu_m68010(void) { init_cpu_common(); - cpu_type = CPU_TYPE_010; -// dasm_type = M68K_CPU_TYPE_68010; - - init16(*program, *oprogram); - sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[1]; - cyc_instruction = m68ki_cycles[1]; - cyc_exception = m68ki_exception_cycle_table[1]; - cyc_bcc_notake_b = -4; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 6; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 3; - cyc_shift = 1; - cyc_reset = 130; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_010; + + init16(*m_program, *m_oprogram); + m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[1]; + m_cyc_instruction = m68ki_cycles[1]; + m_cyc_exception = m68ki_exception_cycle_table[1]; + m_cyc_bcc_notake_b = -4; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 6; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 3; + m_cyc_shift = 1; + m_cyc_reset = 130; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -1846,23 +1822,22 @@ void m68000_base_device::init_cpu_m68010(void) void m68000_base_device::init_cpu_m68020(void) { init_cpu_common(); - cpu_type = CPU_TYPE_020; -// dasm_type = M68K_CPU_TYPE_68020; - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[2]; - cyc_instruction = m68ki_cycles[2]; - cyc_exception = m68ki_exception_cycle_table[2]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_020; + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[2]; + m_cyc_instruction = m68ki_cycles[2]; + m_cyc_exception = m68ki_exception_cycle_table[2]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -1871,18 +1846,18 @@ void m68000_base_device::init_cpu_m68020fpu(void) { init_cpu_m68020(); - has_fpu = 1; + m_has_fpu = 1; } void m68000_base_device::init_cpu_m68020pmmu(void) { init_cpu_m68020(); - has_pmmu = 1; - has_fpu = 1; + m_has_pmmu = 1; + m_has_fpu = 1; - init32mmu(*program, *oprogram); + init32mmu(*m_program, *m_oprogram); } @@ -1891,37 +1866,36 @@ void m68000_base_device::init_cpu_m68020hmmu(void) { init_cpu_m68020(); - has_hmmu = 1; - has_fpu = 1; + m_has_hmmu = 1; + m_has_fpu = 1; - init32hmmu(*program, *oprogram); + init32hmmu(*m_program, *m_oprogram); } void m68000_base_device::init_cpu_m68ec020(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC020; -// dasm_type = M68K_CPU_TYPE_68EC020; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[2]; - cyc_instruction = m68ki_cycles[2]; - cyc_exception = m68ki_exception_cycle_table[2]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_EC020; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[2]; + m_cyc_instruction = m68ki_cycles[2]; + m_cyc_exception = m68ki_exception_cycle_table[2]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -1931,26 +1905,25 @@ void m68000_base_device::init_cpu_m68030(void) { init_cpu_common(); - cpu_type = CPU_TYPE_030; -// dasm_type = M68K_CPU_TYPE_68030; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[3]; - cyc_instruction = m68ki_cycles[3]; - cyc_exception = m68ki_exception_cycle_table[3]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 1; + m_cpu_type = CPU_TYPE_030; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[3]; + m_cyc_instruction = m68ki_cycles[3]; + m_cyc_exception = m68ki_exception_cycle_table[3]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 1; define_state(); } @@ -1961,26 +1934,25 @@ void m68000_base_device::init_cpu_m68ec030(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC030; -// dasm_type = M68K_CPU_TYPE_68EC030; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[3]; - cyc_instruction = m68ki_cycles[3]; - cyc_exception = m68ki_exception_cycle_table[3]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */ - has_fpu = 1; + m_cpu_type = CPU_TYPE_EC030; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[3]; + m_cyc_instruction = m68ki_cycles[3]; + m_cyc_exception = m68ki_exception_cycle_table[3]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */ + m_has_fpu = 1; define_state(); } @@ -1991,26 +1963,25 @@ void m68000_base_device::init_cpu_m68040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_040; -// dasm_type = M68K_CPU_TYPE_68040; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 1; + m_cpu_type = CPU_TYPE_040; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 1; define_state(); } @@ -2020,26 +1991,25 @@ void m68000_base_device::init_cpu_m68ec040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_EC040; -// dasm_type = M68K_CPU_TYPE_68EC040; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 0; - has_fpu = 0; + m_cpu_type = CPU_TYPE_EC040; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 0; + m_has_fpu = 0; define_state(); } @@ -2049,26 +2019,25 @@ void m68000_base_device::init_cpu_m68lc040(void) { init_cpu_common(); - cpu_type = CPU_TYPE_LC040; -// dasm_type = M68K_CPU_TYPE_68LC040; - - - init32mmu(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[4]; - cyc_instruction = m68ki_cycles[4]; - cyc_exception = m68ki_exception_cycle_table[4]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; - has_pmmu = 1; - has_fpu = 0; + m_cpu_type = CPU_TYPE_LC040; + + + init32mmu(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[4]; + m_cyc_instruction = m68ki_cycles[4]; + m_cyc_exception = m68ki_exception_cycle_table[4]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; + m_has_pmmu = 1; + m_has_fpu = 0; define_state(); } @@ -2077,7 +2046,7 @@ void m68000_base_device::init_cpu_m68lc040(void) void m68000_base_device::init_cpu_scc68070(void) { init_cpu_m68010(); - cpu_type = CPU_TYPE_SCC070; + m_cpu_type = CPU_TYPE_SCC070; } @@ -2085,24 +2054,23 @@ void m68000_base_device::init_cpu_fscpu32(void) { init_cpu_common(); - cpu_type = CPU_TYPE_FSCPU32; -// dasm_type = M68K_CPU_TYPE_FSCPU32; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[5]; - cyc_instruction = m68ki_cycles[5]; - cyc_exception = m68ki_exception_cycle_table[5]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_FSCPU32; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[5]; + m_cyc_instruction = m68ki_cycles[5]; + m_cyc_exception = m68ki_exception_cycle_table[5]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -2113,24 +2081,23 @@ void m68000_base_device::init_cpu_coldfire(void) { init_cpu_common(); - cpu_type = CPU_TYPE_COLDFIRE; -// dasm_type = M68K_CPU_TYPE_COLDFIRE; - - - init32(*program, *oprogram); - sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ - jump_table = m68ki_instruction_jump_table[6]; - cyc_instruction = m68ki_cycles[6]; - cyc_exception = m68ki_exception_cycle_table[6]; - cyc_bcc_notake_b = -2; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 4; - cyc_scc_r_true = 0; - cyc_movem_w = 2; - cyc_movem_l = 2; - cyc_shift = 0; - cyc_reset = 518; + m_cpu_type = CPU_TYPE_COLDFIRE; + + + init32(*m_program, *m_oprogram); + m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */ + m_jump_table = m68ki_instruction_jump_table[6]; + m_cyc_instruction = m68ki_cycles[6]; + m_cyc_exception = m68ki_exception_cycle_table[6]; + m_cyc_bcc_notake_b = -2; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 4; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 2; + m_cyc_movem_l = 2; + m_cyc_shift = 0; + m_cyc_reset = 518; define_state(); } @@ -2232,26 +2199,26 @@ util::disasm_interface *mcf5206e_device::create_disassembler() /* Service an interrupt request and start exception processing */ -void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level) +void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level) { uint32_t vector; uint32_t sr; uint32_t new_pc; - if(CPU_TYPE_IS_000(cpu_type)) + if(CPU_TYPE_IS_000()) { - instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - /* Turn off the stopped state */ - stopped &= ~STOP_LEVEL_STOP; + /* Turn off the m_stopped state */ + m_stopped &= ~STOP_LEVEL_STOP; /* If we are halted, don't do anything */ - if(stopped) + if(m_stopped) return; /* Acknowledge the interrupt */ - vector = int_ack_callback(*this, int_level); + vector = m_int_ack_callback(*this, int_level); /* Get the interrupt vector */ if(vector == M68K_INT_ACK_AUTOVECTOR) @@ -2264,52 +2231,39 @@ void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uin return; /* Start exception processing */ - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); /* Set the interrupt mask to the level of the one being serviced */ - int_mask = int_level<<8; + m_int_mask = int_level<<8; /* Get the new PC */ - new_pc = m68ki_read_data_32(this, (vector<<2) + vbr); + new_pc = m68ki_read_data_32((vector<<2) + m_vbr); /* If vector is uninitialized, call the uninitialized interrupt vector */ if(new_pc == 0) - new_pc = m68ki_read_data_32(this, (EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + vbr); + new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + m_vbr); /* Generate a stack frame */ - m68ki_stack_frame_0000(this, REG_PC(m68k), sr, vector); - if(m_flag && CPU_TYPE_IS_EC020_PLUS(cpu_type)) + m68ki_stack_frame_0000(m_pc, sr, vector); + if(m_m_flag && CPU_TYPE_IS_EC020_PLUS()) { /* Create throwaway frame */ - m68ki_set_sm_flag(this, s_flag); /* clear M */ + m68ki_set_sm_flag(m_s_flag); /* clear M */ sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */ - m68ki_stack_frame_0001(this, REG_PC(m68k), sr, vector); + m68ki_stack_frame_0001(m_pc, sr, vector); } - m68ki_jump(this, new_pc); + m68ki_jump(new_pc); /* Defer cycle counting until later */ - remaining_cycles -= cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } -DEFINE_DEVICE_TYPE(M68K, m68000_base_device, "m68k", "M68K") - //------------------------------------------------- -// h6280_device - constructor +// m68000_base_device - constructor //------------------------------------------------- -m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : cpu_device(mconfig, M68K, tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, 16, 24), - m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24) -{ - clear_all(); -} - - - - m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map) : cpu_device(mconfig, type, tag, owner, clock), @@ -2331,146 +2285,136 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char void m68000_base_device::clear_all() { - cpu_type= 0; -// dasm_type= 0; - for (auto & elem : dar) + m_cpu_type= 0; +// + for (auto & elem : m_dar) elem= 0; - ppc= 0; - pc= 0; - for (auto & elem : sp) + m_ppc= 0; + m_pc= 0; + for (auto & elem : m_sp) elem= 0; - vbr= 0; - sfc= 0; - dfc= 0; - cacr= 0; - caar= 0; - ir= 0; + m_vbr= 0; + m_sfc= 0; + m_dfc= 0; + m_cacr= 0; + m_caar= 0; + m_ir= 0; // for (int i=0;i<8;i++) -// fpr[i]= 0; - fpiar= 0; - fpsr= 0; - fpcr= 0; - t1_flag= 0; - t0_flag= 0; - s_flag= 0; - m_flag= 0; - x_flag= 0; - n_flag= 0; - not_z_flag= 0; - v_flag= 0; - c_flag= 0; - int_mask= 0; - int_level= 0; - stopped= 0; - pref_addr= 0; - pref_data= 0; - sr_mask= 0; - instr_mode= 0; - run_mode= 0; - has_pmmu= 0; - has_hmmu= 0; - pmmu_enabled= 0; - hmmu_enabled= 0; - has_fpu= 0; - fpu_just_reset= 0; - - cyc_bcc_notake_b = 0; - cyc_bcc_notake_w = 0; - cyc_dbcc_f_noexp = 0; - cyc_dbcc_f_exp = 0; - cyc_scc_r_true = 0; - cyc_movem_w = 0; - cyc_movem_l = 0; - cyc_shift = 0; - cyc_reset = 0; - - initial_cycles = 0; - remaining_cycles = 0; - reset_cycles = 0; - tracing = 0; +// m_fpr[i]= 0; + m_fpiar= 0; + m_fpsr= 0; + m_fpcr= 0; + m_t1_flag= 0; + m_t0_flag= 0; + m_s_flag= 0; + m_m_flag= 0; + m_x_flag= 0; + m_n_flag= 0; + m_not_z_flag= 0; + m_v_flag= 0; + m_c_flag= 0; + m_int_mask= 0; + m_int_level= 0; + m_stopped= 0; + m_pref_addr= 0; + m_pref_data= 0; + m_sr_mask= 0; + m_instr_mode= 0; + m_run_mode= 0; + m_has_pmmu= 0; + m_has_hmmu= 0; + m_pmmu_enabled= 0; + m_hmmu_enabled= 0; + m_has_fpu= 0; + m_fpu_just_reset= 0; + + m_cyc_bcc_notake_b = 0; + m_cyc_bcc_notake_w = 0; + m_cyc_dbcc_f_noexp = 0; + m_cyc_dbcc_f_exp = 0; + m_cyc_scc_r_true = 0; + m_cyc_movem_w = 0; + m_cyc_movem_l = 0; + m_cyc_shift = 0; + m_cyc_reset = 0; + + m_initial_cycles = 0; + m_remaining_cycles = 0; + m_reset_cycles = 0; + m_tracing = 0; m_address_error = 0; - aerr_address = 0; - aerr_write_mode = 0; - aerr_fc = 0; + m_aerr_address = 0; + m_aerr_write_mode = 0; + m_aerr_fc = 0; - virq_state = 0; - nmi_pending = 0; + m_virq_state = 0; + m_nmi_pending = 0; - cyc_instruction = nullptr; - cyc_exception = nullptr; + m_cyc_instruction = nullptr; + m_cyc_exception = nullptr; - int_ack_callback = device_irq_acknowledge_delegate(); - program = nullptr; + m_int_ack_callback = device_irq_acknowledge_delegate(); + m_program = nullptr; - opcode_xor = 0; -// readimm16 = 0; -// read8 = 0; -// read16 = 0; -// read32 = 0; -// write8 = 0; -// write16 = 0; -// write32 = 0; + m_opcode_xor = 0; +// m_readimm16 = 0; +// m_read8 = 0; +// m_read16 = 0; +// m_read32 = 0; +// m_write8 = 0; +// m_write16 = 0; +// m_write32 = 0; m_space = nullptr; m_direct = nullptr; - iotemp = 0; + m_iotemp = 0; - save_sr = 0; - save_stopped = 0; - save_halted = 0; + m_save_sr = 0; + m_save_stopped = 0; + m_save_halted = 0; - mmu_crp_aptr = mmu_crp_limit = 0; - mmu_srp_aptr = mmu_srp_limit = 0; - mmu_urp_aptr = 0; - mmu_tc = 0; - mmu_sr = 0; - mmu_sr_040 = 0; + m_mmu_crp_aptr = m_mmu_crp_limit = 0; + m_mmu_srp_aptr = m_mmu_srp_limit = 0; + m_mmu_urp_aptr = 0; + m_mmu_tc = 0; + m_mmu_sr = 0; + m_mmu_sr_040 = 0; for (int i=0; i #if defined(__sun__) && defined(__svr4__) #undef REG_SP #undef REG_PC -#undef REG_FP #endif /* ======================================================================== */ @@ -36,9 +29,9 @@ class m68000_base_device; /* ======================================================================== */ /* Check for > 32bit sizes */ -#define MAKE_INT_8(A) (int8_t)(A) -#define MAKE_INT_16(A) (int16_t)(A) -#define MAKE_INT_32(A) (int32_t)(A) +constexpr int8_t MAKE_INT_8(uint32_t A) const { return (int8_t)(A); } +constexpr int16_t MAKE_INT_16(uint32_t A) const { return (int16_t)(A); } +constexpr int32_t MAKE_INT_32(uint32_t A) const { return (int32_t)(A); } /* ======================================================================== */ @@ -46,65 +39,65 @@ class m68000_base_device; /* ======================================================================== */ /* Exception Vectors handled by emulation */ -#define EXCEPTION_RESET 0 -#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */ -#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */ -#define EXCEPTION_ILLEGAL_INSTRUCTION 4 -#define EXCEPTION_ZERO_DIVIDE 5 -#define EXCEPTION_CHK 6 -#define EXCEPTION_TRAPV 7 -#define EXCEPTION_PRIVILEGE_VIOLATION 8 -#define EXCEPTION_TRACE 9 -#define EXCEPTION_1010 10 -#define EXCEPTION_1111 11 -#define EXCEPTION_FORMAT_ERROR 14 -#define EXCEPTION_UNINITIALIZED_INTERRUPT 15 -#define EXCEPTION_SPURIOUS_INTERRUPT 24 -#define EXCEPTION_INTERRUPT_AUTOVECTOR 24 -#define EXCEPTION_TRAP_BASE 32 +static constexpr int EXCEPTION_RESET = 0; +static constexpr int EXCEPTION_BUS_ERROR = 2; /* This one is not emulated! */ +static constexpr int EXCEPTION_ADDRESS_ERROR = 3; /* This one is partially emulated (doesn't stack a proper frame yet) */ +static constexpr int EXCEPTION_ILLEGAL_INSTRUCTION = 4; +static constexpr int EXCEPTION_ZERO_DIVIDE = 5; +static constexpr int EXCEPTION_CHK = 6; +static constexpr int EXCEPTION_TRAPV = 7; +static constexpr int EXCEPTION_PRIVILEGE_VIOLATION = 8; +static constexpr int EXCEPTION_TRACE = 9; +static constexpr int EXCEPTION_1010 = 10; +static constexpr int EXCEPTION_1111 = 11; +static constexpr int EXCEPTION_FORMAT_ERROR = 14; +static constexpr int EXCEPTION_UNINITIALIZED_INTERRUPT = 15; +static constexpr int EXCEPTION_SPURIOUS_INTERRUPT = 24; +static constexpr int EXCEPTION_INTERRUPT_AUTOVECTOR = 24; +static constexpr int EXCEPTION_TRAP_BASE = 32; /* Function codes set by CPU during data/address bus activity */ -#define FUNCTION_CODE_USER_DATA 1 -#define FUNCTION_CODE_USER_PROGRAM 2 -#define FUNCTION_CODE_SUPERVISOR_DATA 5 -#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6 -#define FUNCTION_CODE_CPU_SPACE 7 +static constexpr int FUNCTION_CODE_USER_DATA = 1; +static constexpr int FUNCTION_CODE_USER_PROGRAM = 2; +static constexpr int FUNCTION_CODE_SUPERVISOR_DATA = 5; +static constexpr int FUNCTION_CODE_SUPERVISOR_PROGRAM = 6; +static constexpr int FUNCTION_CODE_CPU_SPACE = 7; /* CPU types for deciding what to emulate */ -#define CPU_TYPE_000 (0x00000001) -#define CPU_TYPE_008 (0x00000002) -#define CPU_TYPE_010 (0x00000004) -#define CPU_TYPE_EC020 (0x00000008) -#define CPU_TYPE_020 (0x00000010) -#define CPU_TYPE_EC030 (0x00000020) -#define CPU_TYPE_030 (0x00000040) -#define CPU_TYPE_EC040 (0x00000080) -#define CPU_TYPE_LC040 (0x00000100) -#define CPU_TYPE_040 (0x00000200) -#define CPU_TYPE_SCC070 (0x00000400) -#define CPU_TYPE_FSCPU32 (0x00000800) -#define CPU_TYPE_COLDFIRE (0x00001000) +static constexpr int CPU_TYPE_000 = (0x00000001); +static constexpr int CPU_TYPE_008 = (0x00000002); +static constexpr int CPU_TYPE_010 = (0x00000004); +static constexpr int CPU_TYPE_EC020 = (0x00000008); +static constexpr int CPU_TYPE_020 = (0x00000010); +static constexpr int CPU_TYPE_EC030 = (0x00000020); +static constexpr int CPU_TYPE_030 = (0x00000040); +static constexpr int CPU_TYPE_EC040 = (0x00000080); +static constexpr int CPU_TYPE_LC040 = (0x00000100); +static constexpr int CPU_TYPE_040 = (0x00000200); +static constexpr int CPU_TYPE_SCC070 = (0x00000400); +static constexpr int CPU_TYPE_FSCPU32 = (0x00000800); +static constexpr int CPU_TYPE_COLDFIRE = (0x00001000); /* Different ways to stop the CPU */ -#define STOP_LEVEL_STOP 1 -#define STOP_LEVEL_HALT 2 +static constexpr int STOP_LEVEL_STOP = 1; +static constexpr int STOP_LEVEL_HALT = 2; /* Used for 68000 address error processing */ -#define INSTRUCTION_YES 0 -#define INSTRUCTION_NO 0x08 -#define MODE_READ 0x10 -#define MODE_WRITE 0 +static constexpr int INSTRUCTION_YES = 0; +static constexpr int INSTRUCTION_NO = 0x08; +static constexpr int MODE_READ = 0x10; +static constexpr int MODE_WRITE = 0; -#define RUN_MODE_NORMAL 0 -#define RUN_MODE_BERR_AERR_RESET 1 +static constexpr int RUN_MODE_NORMAL = 0; +static constexpr int RUN_MODE_BERR_AERR_RESET = 1; -#define M68K_CACR_IBE 0x10 // Instruction Burst Enable -#define M68K_CACR_CI 0x08 // Clear Instruction Cache -#define M68K_CACR_CEI 0x04 // Clear Entry in Instruction Cache -#define M68K_CACR_FI 0x02 // Freeze Instruction Cache -#define M68K_CACR_EI 0x01 // Enable Instruction Cache +static constexpr int M68K_CACR_IBE = 0x10; // Instruction Burst Enable +static constexpr int M68K_CACR_CI = 0x08; // Clear Instruction Cache +static constexpr int M68K_CACR_CEI = 0x04; // Clear Entry in Instruction Cache +static constexpr int M68K_CACR_FI = 0x02; // Freeze Instruction Cache +static constexpr int M68K_CACR_EI = 0x01; // Enable Instruction Cache /* ======================================================================== */ /* ================================ MACROS ================================ */ @@ -114,112 +107,103 @@ class m68000_base_device; /* ---------------------------- General Macros ---------------------------- */ /* Bit Isolation Macros */ -#define BIT_0(A) ((A) & 0x00000001) -#define BIT_1(A) ((A) & 0x00000002) -#define BIT_2(A) ((A) & 0x00000004) -#define BIT_3(A) ((A) & 0x00000008) -#define BIT_4(A) ((A) & 0x00000010) -#define BIT_5(A) ((A) & 0x00000020) -#define BIT_6(A) ((A) & 0x00000040) -#define BIT_7(A) ((A) & 0x00000080) -#define BIT_8(A) ((A) & 0x00000100) -#define BIT_9(A) ((A) & 0x00000200) -#define BIT_A(A) ((A) & 0x00000400) -#define BIT_B(A) ((A) & 0x00000800) -#define BIT_C(A) ((A) & 0x00001000) -#define BIT_D(A) ((A) & 0x00002000) -#define BIT_E(A) ((A) & 0x00004000) -#define BIT_F(A) ((A) & 0x00008000) -#define BIT_10(A) ((A) & 0x00010000) -#define BIT_11(A) ((A) & 0x00020000) -#define BIT_12(A) ((A) & 0x00040000) -#define BIT_13(A) ((A) & 0x00080000) -#define BIT_14(A) ((A) & 0x00100000) -#define BIT_15(A) ((A) & 0x00200000) -#define BIT_16(A) ((A) & 0x00400000) -#define BIT_17(A) ((A) & 0x00800000) -#define BIT_18(A) ((A) & 0x01000000) -#define BIT_19(A) ((A) & 0x02000000) -#define BIT_1A(A) ((A) & 0x04000000) -#define BIT_1B(A) ((A) & 0x08000000) -#define BIT_1C(A) ((A) & 0x10000000) -#define BIT_1D(A) ((A) & 0x20000000) -#define BIT_1E(A) ((A) & 0x40000000) -#define BIT_1F(A) ((A) & 0x80000000) +constexpr uint32_t BIT_0(uint32_t A) const { return ((A) & 0x00000001); } +constexpr uint32_t BIT_1(uint32_t A) const { return ((A) & 0x00000002); } +constexpr uint32_t BIT_2(uint32_t A) const { return ((A) & 0x00000004); } +constexpr uint32_t BIT_3(uint32_t A) const { return ((A) & 0x00000008); } +constexpr uint32_t BIT_4(uint32_t A) const { return ((A) & 0x00000010); } +constexpr uint32_t BIT_5(uint32_t A) const { return ((A) & 0x00000020); } +constexpr uint32_t BIT_6(uint32_t A) const { return ((A) & 0x00000040); } +constexpr uint32_t BIT_7(uint32_t A) const { return ((A) & 0x00000080); } +constexpr uint32_t BIT_8(uint32_t A) const { return ((A) & 0x00000100); } +constexpr uint32_t BIT_9(uint32_t A) const { return ((A) & 0x00000200); } +constexpr uint32_t BIT_A(uint32_t A) const { return ((A) & 0x00000400); } +constexpr uint32_t BIT_B(uint32_t A) const { return ((A) & 0x00000800); } +constexpr uint32_t BIT_C(uint32_t A) const { return ((A) & 0x00001000); } +constexpr uint32_t BIT_D(uint32_t A) const { return ((A) & 0x00002000); } +constexpr uint32_t BIT_E(uint32_t A) const { return ((A) & 0x00004000); } +constexpr uint32_t BIT_F(uint32_t A) const { return ((A) & 0x00008000); } +constexpr uint32_t BIT_10(uint32_t A) const { return ((A) & 0x00010000); } +constexpr uint32_t BIT_11(uint32_t A) const { return ((A) & 0x00020000); } +constexpr uint32_t BIT_12(uint32_t A) const { return ((A) & 0x00040000); } +constexpr uint32_t BIT_13(uint32_t A) const { return ((A) & 0x00080000); } +constexpr uint32_t BIT_14(uint32_t A) const { return ((A) & 0x00100000); } +constexpr uint32_t BIT_15(uint32_t A) const { return ((A) & 0x00200000); } +constexpr uint32_t BIT_16(uint32_t A) const { return ((A) & 0x00400000); } +constexpr uint32_t BIT_17(uint32_t A) const { return ((A) & 0x00800000); } +constexpr uint32_t BIT_18(uint32_t A) const { return ((A) & 0x01000000); } +constexpr uint32_t BIT_19(uint32_t A) const { return ((A) & 0x02000000); } +constexpr uint32_t BIT_1A(uint32_t A) const { return ((A) & 0x04000000); } +constexpr uint32_t BIT_1B(uint32_t A) const { return ((A) & 0x08000000); } +constexpr uint32_t BIT_1C(uint32_t A) const { return ((A) & 0x10000000); } +constexpr uint32_t BIT_1D(uint32_t A) const { return ((A) & 0x20000000); } +constexpr uint32_t BIT_1E(uint32_t A) const { return ((A) & 0x40000000); } +constexpr uint32_t BIT_1F(uint32_t A) const { return ((A) & 0x80000000); } /* Get the most significant bit for specific sizes */ -#define GET_MSB_8(A) ((A) & 0x80) -#define GET_MSB_9(A) ((A) & 0x100) -#define GET_MSB_16(A) ((A) & 0x8000) -#define GET_MSB_17(A) ((A) & 0x10000) -#define GET_MSB_32(A) ((A) & 0x80000000) -#define GET_MSB_33(A) ((A) & 0x100000000U) +constexpr uint32_t GET_MSB_8(uint32_t A) const { return ((A) & 0x80); } +constexpr uint32_t GET_MSB_9(uint32_t A) const { return ((A) & 0x100); } +constexpr uint32_t GET_MSB_16(uint32_t A) const { return ((A) & 0x8000); } +constexpr uint32_t GET_MSB_17(uint32_t A) const { return ((A) & 0x10000); } +constexpr uint32_t GET_MSB_32(uint32_t A) const { return ((A) & 0x80000000); } +constexpr uint64_t GET_MSB_33(uint64_t A) const { return ((A) & 0x100000000U); } /* Isolate nibbles */ -#define LOW_NIBBLE(A) ((A) & 0x0f) -#define HIGH_NIBBLE(A) ((A) & 0xf0) +constexpr uint32_t LOW_NIBBLE(uint32_t A) const { return ((A) & 0x0f); } +constexpr uint32_t HIGH_NIBBLE(uint32_t A) const { return ((A) & 0xf0); } /* These are used to isolate 8, 16, and 32 bit sizes */ -#define MASK_OUT_ABOVE_2(A) ((A) & 3) -#define MASK_OUT_ABOVE_8(A) ((A) & 0xff) -#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff) -#define MASK_OUT_BELOW_2(A) ((A) & ~3) -#define MASK_OUT_BELOW_8(A) ((A) & ~0xff) -#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff) +constexpr uint32_t MASK_OUT_ABOVE_2(uint32_t A) const { return ((A) & 3); } +constexpr uint32_t MASK_OUT_ABOVE_8(uint32_t A) const { return ((A) & 0xff); } +constexpr uint32_t MASK_OUT_ABOVE_16(uint32_t A) const { return ((A) & 0xffff); } +constexpr uint32_t MASK_OUT_BELOW_2(uint32_t A) const { return ((A) & ~3); } +constexpr uint32_t MASK_OUT_BELOW_8(uint32_t A) const { return ((A) & ~0xff); } +constexpr uint32_t MASK_OUT_BELOW_16(uint32_t A) const { return ((A) & ~0xffff); } /* No need to mask if we are 32 bit */ -#define MASK_OUT_ABOVE_32(A) ((A) & u64(0xffffffffU)) -#define MASK_OUT_BELOW_32(A) ((A) & ~u64(0xffffffffU)) +constexpr uint32_t MASK_OUT_ABOVE_32(uint32_t A) const { return ((A) & u64(0xffffffffU)); } +constexpr uint64_t MASK_OUT_BELOW_32(uint64_t A) const { return ((A) & ~u64(0xffffffffU)); } /* Shift & Rotate Macros. */ -#define LSL(A, C) ((A) << (C)) -#define LSR(A, C) ((A) >> (C)) +constexpr uint32_t LSL(uint32 A, uint32_t C) const { return ((A) << (C)); } +constexpr uint32_t LSR(uint32 A, uint32_t C) const { return ((A) >> (C)); } /* We have to do this because the morons at ANSI decided that shifts * by >= data size are undefined. */ -#define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0) -#define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0) +constexpr uint32_t LSR_32(uint32 A, uint32_t C) const { return ((C) < 32 ? (A) >> (C) : 0); } +constexpr uint32_t LSL_32(uint32 A, uint32_t C) const { return ((C) < 32 ? (A) << (C) : 0); } -#define LSL_32_64(A, C) ((A) << (C)) -#define LSR_32_64(A, C) ((A) >> (C)) -#define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C))) -#define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C))) +constexpr uint64_t LSL_32_64(uint64_t A, uint32_t C) const { return ((A) << (C)); } +constexpr uint64_t LSR_32_64(uint64_t A, uint32_t C) const { return ((A) >> (C)); } +constexpr uint64_t ROL_33_64(uint64_t A, uint32_t C) const { return (LSL_32_64(A, C) | LSR_32_64(A, 33 - (C))); } +constexpr uint64_t ROR_33_64(uint64_t A, uint32_t C) const { return (LSR_32_64(A, C) | LSL_32_64(A, 33 - (C))); } -#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))) -#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C))) -#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))) -#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C))) -#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))) -#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C))) +constexpr uint32_t ROL_8(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))); } +constexpr uint32_t ROL_9(uint32_t A, uint32_t C) const { return (LSL(A, C) | LSR(A, 9-(C))); } +constexpr uint32_t ROL_16(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))); } +constexpr uint32_t ROL_17(uint32_t A, uint32_t C) const { return (LSL(A, C) | LSR(A, 17-(C))); } +constexpr uint32_t ROL_32(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))); } -#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))) -#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C))) -#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))) -#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C))) -#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))) -#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C))) +constexpr uint32_t ROR_8(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))); } +constexpr uint32_t ROR_9(uint32_t A, uint32_t C) const { return (LSR(A, C) | LSL(A, 9-(C))); } +constexpr uint32_t ROR_16(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))); } +constexpr uint32_t ROR_17(uint32_t A, uint32_t C) const { return (LSR(A, C) | LSL(A, 17-(C))); } +constexpr uint32_t ROR_32(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))); } /* ------------------------------ CPU Access ------------------------------ */ /* Access the CPU registers */ -#define REG_DA(M) (M)->dar /* easy access to data and address regs */ -#define REG_D(M) (M)->dar -#define REG_A(M) ((M)->dar+8) -#define REG_PPC(M) (M)->ppc -#define REG_PC(M) (M)->pc -#define REG_SP_BASE(M) (M)->sp -#define REG_USP(M) (M)->sp[0] -#define REG_ISP(M) (M)->sp[4] -#define REG_MSP(M) (M)->sp[6] -#define REG_SP(M) (M)->dar[15] - -#define REG_FP(M) (M)->fpr -#define REG_FPCR(M) (M)->fpcr -#define REG_FPSR(M) (M)->fpsr -#define REG_FPIAR(M) (M)->fpiar +inline uint32_t (®_DA())[16] { return m_dar; } /* easy access to data and address regs */ +inline uint32_t (®_D())[16] { return m_dar; } +inline uint32_t (*REG_A()) { return (m_dar+8); } +inline uint32_t (®_SP_BASE())[7]{ return m_sp; } +inline uint32_t ®_USP() { return m_sp[0]; } +inline uint32_t ®_ISP() { return m_sp[4]; } +inline uint32_t ®_MSP() { return m_sp[6]; } +inline uint32_t ®_SP() { return m_dar[15]; } /* ----------------------------- Configuration ---------------------------- */ @@ -227,37 +211,34 @@ class m68000_base_device; /* These defines are dependant on the configuration defines in m68kconf.h */ /* Disable certain comparisons if we're not using all CPU types */ -#define CPU_TYPE_IS_COLDFIRE(A) ((A) & (CPU_TYPE_COLDFIRE)) +constexpr uint32_t CPU_TYPE_IS_COLDFIRE() const { return ((m_cpu_type) & (CPU_TYPE_COLDFIRE)); } -#define CPU_TYPE_IS_040_PLUS(A) ((A) & (CPU_TYPE_040 | CPU_TYPE_EC040)) -#define CPU_TYPE_IS_040_LESS(A) 1 +constexpr uint32_t CPU_TYPE_IS_040_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_040 | CPU_TYPE_EC040)); } -#define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)) -#define CPU_TYPE_IS_030_LESS(A) 1 +constexpr uint32_t CPU_TYPE_IS_030_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)); } -#define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_020_LESS(A) 1 +constexpr uint32_t CPU_TYPE_IS_020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } -#define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)) +constexpr uint32_t CPU_TYPE_IS_020_VARIANT() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)); } -#define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)) +constexpr uint32_t CPU_TYPE_IS_EC020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +constexpr uint32_t CPU_TYPE_IS_EC020_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)); } -#define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010) -#define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)) -#define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)) +constexpr uint32_t CPU_TYPE_IS_010() const { return ((m_cpu_type) == CPU_TYPE_010); } +constexpr uint32_t CPU_TYPE_IS_010_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +constexpr uint32_t CPU_TYPE_IS_010_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)); } -#define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008) +constexpr uint32_t CPU_TYPE_IS_000() const { return ((m_cpu_type) == CPU_TYPE_000 || (m_cpu_type) == CPU_TYPE_008); } /* Initiates trace checking before each instruction (t1) */ -#define m68ki_trace_t1(m68k) m68k->tracing = m68k->t1_flag +inline void m68ki_trace_t1() { m_tracing = m_t1_flag; } /* adds t0 to trace checking if we encounter change of flow */ -#define m68ki_trace_t0(m68k) m68k->tracing |= m68k->t0_flag +inline void m68ki_trace_t0() { m_tracing |= m_t0_flag; } /* Clear all tracing */ -#define m68ki_clear_trace(m68k) m68k->tracing = 0 +inline void m68ki_clear_trace() { m_tracing = 0; } /* Cause a trace exception if we are tracing */ -#define m68ki_exception_if_trace(m68k) if(m68k->tracing) m68ki_exception_trace(m68k) +inline void m68ki_exception_if_trace() { if(m_tracing) m68ki_exception_trace(); } /* -------------------------- EA / Operand Access ------------------------- */ @@ -267,205 +248,205 @@ class m68000_base_device; * where XXX is register X and YYY is register Y */ /* Data Register Isolation */ -#define DX(M) (REG_D(M)[((M)->ir >> 9) & 7]) -#define DY(M) (REG_D(M)[(M)->ir & 7]) +inline uint32_t &DX() { return (REG_D()[(m_ir >> 9) & 7]); } +inline uint32_t &DY() { return (REG_D()[m_ir & 7]); } /* Address Register Isolation */ -#define AX(M) (REG_A(M)[((M)->ir >> 9) & 7]) -#define AY(M) (REG_A(M)[(M)->ir & 7]) +inline uint32_t &AX() { return (REG_A()[(m_ir >> 9) & 7]); } +inline uint32_t &AY() { return (REG_A()[m_ir & 7]); } /* Effective Address Calculations */ -#define EA_AY_AI_8(M) AY(M) /* address register indirect */ -#define EA_AY_AI_16(M) EA_AY_AI_8(M) -#define EA_AY_AI_32(M) EA_AY_AI_8(M) -#define EA_AY_PI_8(M) (AY(M)++) /* postincrement (size = byte) */ -#define EA_AY_PI_16(M) ((AY(M)+=2)-2) /* postincrement (size = word) */ -#define EA_AY_PI_32(M) ((AY(M)+=4)-4) /* postincrement (size = long) */ -#define EA_AY_PD_8(M) (--AY(M)) /* predecrement (size = byte) */ -#define EA_AY_PD_16(M) (AY(M)-=2) /* predecrement (size = word) */ -#define EA_AY_PD_32(M) (AY(M)-=4) /* predecrement (size = long) */ -#define EA_AY_DI_8(M) (AY(M)+MAKE_INT_16(m68ki_read_imm_16(M))) /* displacement */ -#define EA_AY_DI_16(M) EA_AY_DI_8(M) -#define EA_AY_DI_32(M) EA_AY_DI_8(M) -#define EA_AY_IX_8(M) m68ki_get_ea_ix(M, AY(M)) /* indirect + index */ -#define EA_AY_IX_16(M) EA_AY_IX_8(M) -#define EA_AY_IX_32(M) EA_AY_IX_8(M) - -#define EA_AX_AI_8(M) AX(M) -#define EA_AX_AI_16(M) EA_AX_AI_8(M) -#define EA_AX_AI_32(M) EA_AX_AI_8(M) -#define EA_AX_PI_8(M) (AX(M)++) -#define EA_AX_PI_16(M) ((AX(M)+=2)-2) -#define EA_AX_PI_32(M) ((AX(M)+=4)-4) -#define EA_AX_PD_8(M) (--AX(M)) -#define EA_AX_PD_16(M) (AX(M)-=2) -#define EA_AX_PD_32(M) (AX(M)-=4) -#define EA_AX_DI_8(M) (AX(M)+MAKE_INT_16(m68ki_read_imm_16(M))) -#define EA_AX_DI_16(M) EA_AX_DI_8(M) -#define EA_AX_DI_32(M) EA_AX_DI_8(M) -#define EA_AX_IX_8(M) m68ki_get_ea_ix(M, AX(M)) -#define EA_AX_IX_16(M) EA_AX_IX_8(M) -#define EA_AX_IX_32(M) EA_AX_IX_8(M) - -#define EA_A7_PI_8(m68k) ((REG_A(m68k)[7]+=2)-2) -#define EA_A7_PD_8(m68k) (REG_A(m68k)[7]-=2) - -#define EA_AW_8(m68k) MAKE_INT_16(m68ki_read_imm_16(m68k)) /* absolute word */ -#define EA_AW_16(m68k) EA_AW_8(m68k) -#define EA_AW_32(m68k) EA_AW_8(m68k) -#define EA_AL_8(m68k) m68ki_read_imm_32(m68k) /* absolute long */ -#define EA_AL_16(m68k) EA_AL_8(m68k) -#define EA_AL_32(m68k) EA_AL_8(m68k) -#define EA_PCDI_8(m68k) m68ki_get_ea_pcdi(m68k) /* pc indirect + displacement */ -#define EA_PCDI_16(m68k) EA_PCDI_8(m68k) -#define EA_PCDI_32(m68k) EA_PCDI_8(m68k) -#define EA_PCIX_8(m68k) m68ki_get_ea_pcix(m68k) /* pc indirect + index */ -#define EA_PCIX_16(m68k) EA_PCIX_8(m68k) -#define EA_PCIX_32(m68k) EA_PCIX_8(m68k) - - -#define OPER_I_8(m68k) m68ki_read_imm_8(m68k) -#define OPER_I_16(m68k) m68ki_read_imm_16(m68k) -#define OPER_I_32(m68k) m68ki_read_imm_32(m68k) +inline uint32_t EA_AY_AI_8() { return AY(); } /* address register indirect */ +inline uint32_t EA_AY_AI_16() { return EA_AY_AI_8(); } +inline uint32_t EA_AY_AI_32() { return EA_AY_AI_8(); } +inline uint32_t EA_AY_PI_8() { return (AY()++); } /* postincrement (size = byte) */ +inline uint32_t EA_AY_PI_16() { return ((AY()+=2)-2); } /* postincrement (size = word) */ +inline uint32_t EA_AY_PI_32() { return ((AY()+=4)-4); } /* postincrement (size = long) */ +inline uint32_t EA_AY_PD_8() { return (--AY()); } /* predecrement (size = byte) */ +inline uint32_t EA_AY_PD_16() { return (AY()-=2); } /* predecrement (size = word) */ +inline uint32_t EA_AY_PD_32() { return (AY()-=4); } /* predecrement (size = long) */ +inline uint32_t EA_AY_DI_8() { return (AY()+MAKE_INT_16(m68ki_read_imm_16())); } /* displacement */ +inline uint32_t EA_AY_DI_16() { return EA_AY_DI_8(); } +inline uint32_t EA_AY_DI_32() { return EA_AY_DI_8(); } +inline uint32_t EA_AY_IX_8() { return m68ki_get_ea_ix(AY()); } /* indirect + index */ +inline uint32_t EA_AY_IX_16() { return EA_AY_IX_8(); } +inline uint32_t EA_AY_IX_32() { return EA_AY_IX_8(); } + +inline uint32_t EA_AX_AI_8() { return AX(); } +inline uint32_t EA_AX_AI_16() { return EA_AX_AI_8(); } +inline uint32_t EA_AX_AI_32() { return EA_AX_AI_8(); } +inline uint32_t EA_AX_PI_8() { return (AX()++); } +inline uint32_t EA_AX_PI_16() { return ((AX()+=2)-2); } +inline uint32_t EA_AX_PI_32() { return ((AX()+=4)-4); } +inline uint32_t EA_AX_PD_8() { return (--AX()); } +inline uint32_t EA_AX_PD_16() { return (AX()-=2); } +inline uint32_t EA_AX_PD_32() { return (AX()-=4); } +inline uint32_t EA_AX_DI_8() { return (AX()+MAKE_INT_16(m68ki_read_imm_16())); } +inline uint32_t EA_AX_DI_16() { return EA_AX_DI_8(); } +inline uint32_t EA_AX_DI_32() { return EA_AX_DI_8(); } +inline uint32_t EA_AX_IX_8() { return m68ki_get_ea_ix(AX()); } +inline uint32_t EA_AX_IX_16() { return EA_AX_IX_8(); } +inline uint32_t EA_AX_IX_32() { return EA_AX_IX_8(); } + +inline uint32_t EA_A7_PI_8() { return ((REG_A()[7]+=2)-2); } +inline uint32_t EA_A7_PD_8() { return (REG_A()[7]-=2); } + +inline uint32_t EA_AW_8() { return MAKE_INT_16(m68ki_read_imm_16()); } /* absolute word */ +inline uint32_t EA_AW_16() { return EA_AW_8(); } +inline uint32_t EA_AW_32() { return EA_AW_8(); } +inline uint32_t EA_AL_8() { return m68ki_read_imm_32(); } /* absolute long */ +inline uint32_t EA_AL_16() { return EA_AL_8(); } +inline uint32_t EA_AL_32() { return EA_AL_8(); } +inline uint32_t EA_PCDI_8() { return m68ki_get_ea_pcdi(); } /* pc indirect + displacement */ +inline uint32_t EA_PCDI_16() { return EA_PCDI_8(); } +inline uint32_t EA_PCDI_32() { return EA_PCDI_8(); } +inline uint32_t EA_PCIX_8() { return m68ki_get_ea_pcix(); } /* pc indirect + index */ +inline uint32_t EA_PCIX_16() { return EA_PCIX_8(); } +inline uint32_t EA_PCIX_32() { return EA_PCIX_8(); } + + +inline uint32_t OPER_I_8() { return m68ki_read_imm_8(); } +inline uint32_t OPER_I_16() { return m68ki_read_imm_16(); } +inline uint32_t OPER_I_32() { return m68ki_read_imm_32(); } /* --------------------------- Status Register ---------------------------- */ /* Flag Calculation Macros */ -#define CFLAG_8(A) (A) -#define CFLAG_16(A) ((A)>>8) +constexpr uint32_t CFLAG_8(uint32_t A) const { return (A); } +constexpr uint32_t CFLAG_16(uint32_t A) const { return ((A)>>8); } -#define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23) -#define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23) +constexpr uint32_t CFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S & D) | (~R & (S | D)))>>23); } +constexpr uint32_t CFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S & R) | (~D & (S | R)))>>23); } -#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R)) -#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8) -#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24) +constexpr uint32_t VFLAG_ADD_8(uint32_t S, uint32_t D, uint32_t R) const { return ((S^R) & (D^R)); } +constexpr uint32_t VFLAG_ADD_16(uint32_t S, uint32_t D, uint32_t R) const { return (((S^R) & (D^R))>>8); } +constexpr uint32_t VFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S^R) & (D^R))>>24); } -#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D)) -#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8) -#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24) +constexpr uint32_t VFLAG_SUB_8(uint32_t S, uint32_t D, uint32_t R) const { return ((S^D) & (R^D)); } +constexpr uint32_t VFLAG_SUB_16(uint32_t S, uint32_t D, uint32_t R) const { return (((S^D) & (R^D))>>8); } +constexpr uint32_t VFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S^D) & (R^D))>>24); } -#define NFLAG_8(A) (A) -#define NFLAG_16(A) ((A)>>8) -#define NFLAG_32(A) ((A)>>24) -#define NFLAG_64(A) ((A)>>56) +constexpr uint32_t NFLAG_8(uint32_t A) const { return (A); } +constexpr uint32_t NFLAG_16(uint32_t A) const { return ((A)>>8); } +constexpr uint32_t NFLAG_32(uint32_t A) const { return ((A)>>24); } +constexpr uint32_t NFLAG_64(uint64_t A) const { return ((A)>>56); } -#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A) -#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A) -#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A) +constexpr uint32_t ZFLAG_8(uint32_t A) const { return MASK_OUT_ABOVE_8(A); } +constexpr uint32_t ZFLAG_16(uint32_t A) const { return MASK_OUT_ABOVE_16(A); } +constexpr uint32_t ZFLAG_32(uint32_t A) const { return MASK_OUT_ABOVE_32(A); } /* Flag values */ -#define NFLAG_SET 0x80 -#define NFLAG_CLEAR 0 -#define CFLAG_SET 0x100 -#define CFLAG_CLEAR 0 -#define XFLAG_SET 0x100 -#define XFLAG_CLEAR 0 -#define VFLAG_SET 0x80 -#define VFLAG_CLEAR 0 -#define ZFLAG_SET 0 -#define ZFLAG_CLEAR 0xffffffff - -#define SFLAG_SET 4 -#define SFLAG_CLEAR 0 -#define MFLAG_SET 2 -#define MFLAG_CLEAR 0 +static constexpr int NFLAG_SET = 0x80; +static constexpr int NFLAG_CLEAR = 0; +static constexpr int CFLAG_SET = 0x100; +static constexpr int CFLAG_CLEAR = 0; +static constexpr int XFLAG_SET = 0x100; +static constexpr int XFLAG_CLEAR = 0; +static constexpr int VFLAG_SET = 0x80; +static constexpr int VFLAG_CLEAR = 0; +static constexpr int ZFLAG_SET = 0; +static constexpr int ZFLAG_CLEAR = 0xffffffff; + +static constexpr int SFLAG_SET = 4; +static constexpr int SFLAG_CLEAR = 0; +static constexpr int MFLAG_SET = 2; +static constexpr int MFLAG_CLEAR = 0; /* Turn flag values into 1 or 0 */ -#define XFLAG_1(M) (((M)->x_flag>>8)&1) -#define NFLAG_1(M) (((M)->n_flag>>7)&1) -#define VFLAG_1(M) (((M)->v_flag>>7)&1) -#define ZFLAG_1(M) (!(M)->not_z_flag) -#define CFLAG_1(M) (((M)->c_flag>>8)&1) +inline uint32_t XFLAG_1() const { return ((m_x_flag>>8)&1); } +inline uint32_t NFLAG_1() const { return ((m_n_flag>>7)&1); } +inline uint32_t VFLAG_1() const { return ((m_v_flag>>7)&1); } +inline uint32_t ZFLAG_1() const { return (!m_not_z_flag); } +inline uint32_t CFLAG_1() const { return ((m_c_flag>>8)&1); } /* Conditions */ -#define COND_CS(M) ((M)->c_flag&0x100) -#define COND_CC(M) (!COND_CS(M)) -#define COND_VS(M) ((M)->v_flag&0x80) -#define COND_VC(M) (!COND_VS(M)) -#define COND_NE(M) (M)->not_z_flag -#define COND_EQ(M) (!COND_NE(M)) -#define COND_MI(M) ((M)->n_flag&0x80) -#define COND_PL(M) (!COND_MI(M)) -#define COND_LT(M) (((M)->n_flag^(M)->v_flag)&0x80) -#define COND_GE(M) (!COND_LT(M)) -#define COND_HI(M) (COND_CC(M) && COND_NE(M)) -#define COND_LS(M) (COND_CS(M) || COND_EQ(M)) -#define COND_GT(M) (COND_GE(M) && COND_NE(M)) -#define COND_LE(M) (COND_LT(M) || COND_EQ(M)) +inline uint32_t COND_CS() const { return (m_c_flag&0x100); } +inline uint32_t COND_CC() const { return (!COND_CS()); } +inline uint32_t COND_VS() const { return (m_v_flag&0x80); } +inline uint32_t COND_VC() const { return (!COND_VS()); } +inline uint32_t COND_NE() const { return m_not_z_flag; } +inline uint32_t COND_EQ() const { return (!COND_NE()); } +inline uint32_t COND_MI() const { return (m_n_flag&0x80); } +inline uint32_t COND_PL() const { return (!COND_MI()); } +inline uint32_t COND_LT() const { return ((m_n_flag^m_v_flag)&0x80); } +inline uint32_t COND_GE() const { return (!COND_LT()); } +inline uint32_t COND_HI() const { return (COND_CC() && COND_NE()); } +inline uint32_t COND_LS() const { return (COND_CS() || COND_EQ()); } +inline uint32_t COND_GT() const { return (COND_GE() && COND_NE()); } +inline uint32_t COND_LE() const { return (COND_LT() || COND_EQ()); } /* Reversed conditions */ -#define COND_NOT_CS(M) COND_CC(M) -#define COND_NOT_CC(M) COND_CS(M) -#define COND_NOT_VS(M) COND_VC(M) -#define COND_NOT_VC(M) COND_VS(M) -#define COND_NOT_NE(M) COND_EQ(M) -#define COND_NOT_EQ(M) COND_NE(M) -#define COND_NOT_MI(M) COND_PL(M) -#define COND_NOT_PL(M) COND_MI(M) -#define COND_NOT_LT(M) COND_GE(M) -#define COND_NOT_GE(M) COND_LT(M) -#define COND_NOT_HI(M) COND_LS(M) -#define COND_NOT_LS(M) COND_HI(M) -#define COND_NOT_GT(M) COND_LE(M) -#define COND_NOT_LE(M) COND_GT(M) +inline uint32_t COND_NOT_CS() const { return COND_CC(); } +inline uint32_t COND_NOT_CC() const { return COND_CS(); } +inline uint32_t COND_NOT_VS() const { return COND_VC(); } +inline uint32_t COND_NOT_VC() const { return COND_VS(); } +inline uint32_t COND_NOT_NE() const { return COND_EQ(); } +inline uint32_t COND_NOT_EQ() const { return COND_NE(); } +inline uint32_t COND_NOT_MI() const { return COND_PL(); } +inline uint32_t COND_NOT_PL() const { return COND_MI(); } +inline uint32_t COND_NOT_LT() const { return COND_GE(); } +inline uint32_t COND_NOT_GE() const { return COND_LT(); } +inline uint32_t COND_NOT_HI() const { return COND_LS(); } +inline uint32_t COND_NOT_LS() const { return COND_HI(); } +inline uint32_t COND_NOT_GT() const { return COND_LE(); } +inline uint32_t COND_NOT_LE() const { return COND_GT(); } /* Not real conditions, but here for convenience */ -#define COND_XS(M) ((M)->x_flag&0x100) -#define COND_XC(M) (!COND_XS) +inline uint32_t COND_XS() const { return (m_x_flag&0x100); } +inline uint32_t COND_XC() const { return (!COND_XS()); } /* Get the condition code register */ -#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \ - (COND_MI(M) >> 4) | \ - (COND_EQ(M) << 2) | \ - (COND_VS(M) >> 6) | \ - (COND_CS(M) >> 8)) +inline uint32_t m68ki_get_ccr() const { return((COND_XS() >> 4) | + (COND_MI() >> 4) | + (COND_EQ() << 2) | + (COND_VS() >> 6) | + (COND_CS() >> 8)); } /* Get the status register */ -#define m68ki_get_sr(M) ((M)->t1_flag | \ - (M)->t0_flag | \ - ((M)->s_flag << 11) | \ - ((M)->m_flag << 11) | \ - (M)->int_mask | \ - m68ki_get_ccr(M)) +inline uint32_t m68ki_get_sr() const { return (m_t1_flag | + m_t0_flag | + (m_s_flag << 11) | + (m_m_flag << 11) | + m_int_mask | + m68ki_get_ccr()); } /* ----------------------------- Read / Write ----------------------------- */ /* Read from the current address space */ -#define m68ki_read_8(M, A) m68ki_read_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) +inline uint32_t m68ki_read_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } /* Write to the current data space */ -#define m68ki_write_8(M, A, V) m68ki_write_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_16(M, A, V) m68ki_write_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_32(M, A, V) m68ki_write_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) -#define m68ki_write_32_pd(M, A, V) m68ki_write_32_pd_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V) +inline void m68ki_write_8(uint32_t address, uint32_t value) { m68ki_write_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_16(uint32_t address, uint32_t value) { m68ki_write_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_32(uint32_t address, uint32_t value) { m68ki_write_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } +inline void m68ki_write_32_pd(uint32_t address, uint32_t value) { m68ki_write_32_pd_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA, value); } /* map read immediate 8 to read immediate 16 */ -#define m68ki_read_imm_8(M) MASK_OUT_ABOVE_8(m68ki_read_imm_16(M)) +inline uint32_t m68ki_read_imm_8() { return MASK_OUT_ABOVE_8(m68ki_read_imm_16()); } /* Map PC-relative reads */ -#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A) -#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A) -#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A) +inline uint32_t m68ki_read_pcrel_8(uint32_t address) { return m68k_read_pcrelative_8(address); } +inline uint32_t m68ki_read_pcrel_16(uint32_t address) { return m68k_read_pcrelative_16(address); } +inline uint32_t m68ki_read_pcrel_32(uint32_t address) { return m68k_read_pcrelative_32(address); } /* Read from the program space */ -#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) -#define m68ki_read_program_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) -#define m68ki_read_program_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM) +inline uint32_t m68ki_read_program_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } +inline uint32_t m68ki_read_program_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } +inline uint32_t m68ki_read_program_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_PROGRAM); } /* Read from the data space */ -#define m68ki_read_data_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA) +inline uint32_t m68ki_read_data_8(uint32_t address) { return m68ki_read_8_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_data_16(uint32_t address) { return m68ki_read_16_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } +inline uint32_t m68ki_read_data_32(uint32_t address) { return m68ki_read_32_fc(address, m_s_flag | FUNCTION_CODE_USER_DATA); } @@ -473,181 +454,52 @@ class m68000_base_device; /* =============================== PROTOTYPES ============================= */ /* ======================================================================== */ -union fp_reg -{ - uint64_t i; - double f; -}; +void set_irq_line(int irqline, int state); + +void m68k_cause_bus_error(); + -class m68000_base_device_ops -{ -public: - #define OPCODE_PROTOTYPES - #include "m68kops.h" - #undef OPCODE_PROTOTYPES -}; - - - -extern const uint8_t m68ki_shift_8_table[]; -extern const uint16_t m68ki_shift_16_table[]; -extern const uint32_t m68ki_shift_32_table[]; -extern const uint8_t m68ki_exception_cycle_table[][256]; -extern const uint8_t m68ki_ea_idx_cycle_table[]; - -/* Read data immediately after the program counter */ -static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k); -static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k); - -/* Read data with specific function code */ -static inline uint32_t m68ki_read_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); -static inline uint32_t m68ki_read_16_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); -static inline uint32_t m68ki_read_32_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc); - -/* Write data with specific function code */ -static inline void m68ki_write_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); -static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value); - -/* Indexed and PC-relative ea fetching */ -static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k); -static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k); -static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An); - -/* Operand fetching */ -static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k); -static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k); - -static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k); -static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k); - -static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k); -static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k); - -static inline uint32_t OPER_AW_8(m68000_base_device *m68k); -static inline uint32_t OPER_AW_16(m68000_base_device *m68k); -static inline uint32_t OPER_AW_32(m68000_base_device *m68k); -static inline uint32_t OPER_AL_8(m68000_base_device *m68k); -static inline uint32_t OPER_AL_16(m68000_base_device *m68k); -static inline uint32_t OPER_AL_32(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k); -static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k); -static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k); - -/* Stack operations */ -static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value); -static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value); -static inline uint32_t m68ki_pull_16(m68000_base_device *m68k); -static inline uint32_t m68ki_pull_32(m68000_base_device *m68k); - -/* Program flow operations */ -static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc); -static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset); -static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset); -static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset); - -/* Status register operations. */ -static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value); /* Only bit 2 of value should be set (i.e. 4 or 0) */ -static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value); /* only bits 1 and 2 of value should be set */ -static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value); /* set the condition code register */ -static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value); /* set the status register */ -static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value); /* set the status register */ - -/* Exception processing */ -static inline uint32_t m68ki_init_exception(m68000_base_device *m68k); /* Initial exception processing */ - -static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr); /* Stack various frame types */ -static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr); - -static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector); -static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address); -static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address); -static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu); - -static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector); -static inline void m68ki_exception_trace(m68000_base_device *m68k); -static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k); -static inline void m68ki_exception_1010(m68000_base_device *m68k); -static inline void m68ki_exception_1111(m68000_base_device *m68k); -static inline void m68ki_exception_illegal(m68000_base_device *m68k); -static inline void m68ki_exception_format_error(m68000_base_device *m68k); -static inline void m68ki_exception_address_error(m68000_base_device *m68k); - -static inline void m68ki_check_interrupts(m68000_base_device *m68k); /* ASG: check for interrupts */ - -/* quick disassembly (used for logging) */ -char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type); +static const uint8_t m68ki_shift_8_table[65]; +static const uint16_t m68ki_shift_16_table[65]; +static const uint32_t m68ki_shift_32_table[65]; +static const uint8_t m68ki_exception_cycle_table[7][256]; +static const uint8_t m68ki_ea_idx_cycle_table[64]; /* ======================================================================== */ /* =========================== UTILITY FUNCTIONS ========================== */ /* ======================================================================== */ -static inline unsigned int m68k_read_pcrelative_8(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_8(unsigned int address) { - return ((m68k->readimm16(address&~1)>>(8*(1-(address & 1))))&0xff); + return ((m_readimm16(address&~1)>>(8*(1-(address & 1))))&0xff); } -static inline unsigned int m68k_read_pcrelative_16(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_16(unsigned int address) { if (!WORD_ALIGNED(address)) return - (m68k->readimm16(address-1) << 8) | - (m68k->readimm16(address+1) >> 8); + (m_readimm16(address-1) << 8) | + (m_readimm16(address+1) >> 8); else return - (m68k->readimm16(address ) ); + (m_readimm16(address ) ); } -static inline unsigned int m68k_read_pcrelative_32(m68000_base_device *m68k, unsigned int address) +inline unsigned int m68k_read_pcrelative_32(unsigned int address) { if (!WORD_ALIGNED(address)) return - (m68k->readimm16(address-1) << 24) | - (m68k->readimm16(address+1) << 8) | - (m68k->readimm16(address+3) >> 8); + (m_readimm16(address-1) << 24) | + (m_readimm16(address+1) << 8) | + (m_readimm16(address+3) >> 8); else return - (m68k->readimm16(address ) << 16) | - (m68k->readimm16(address+2) ); + (m_readimm16(address ) << 16) | + (m_readimm16(address+2) ); } @@ -656,59 +508,59 @@ static inline unsigned int m68k_read_pcrelative_32(m68000_base_device *m68k, uns * A real 68k first writes the high word to [address+2], and then writes the * low word to [address]. */ -static inline void m68kx_write_memory_32_pd(m68000_base_device *m68k, unsigned int address, unsigned int value) +inline void m68kx_write_memory_32_pd(unsigned int address, unsigned int value) { - m68k->/*memory.*/write16(address+2, value>>16); - m68k->/*memory.*/write16(address, value&0xffff); + m_write16(address+2, value>>16); + m_write16(address, value&0xffff); } /* ---------------------------- Read Immediate ---------------------------- */ // clear the instruction cache -static inline void m68ki_ic_clear(m68000_base_device *m68k) +inline void m68ki_ic_clear() { int i; for (i=0; i< M68K_IC_SIZE; i++) { - m68k->ic_address[i] = ~0; + m_ic_address[i] = ~0; } } // read immediate word using the instruction cache -static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t address) +inline uint32_t m68ki_ic_readimm16(uint32_t address) { - if (m68k->cacr & M68K_CACR_EI) + if (m_cacr & M68K_CACR_EI) { // 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory) - if (m68k->cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020)) + if (m_cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020)) { - uint32_t tag = (address >> 8) | (m68k->s_flag ? 0x1000000 : 0); + uint32_t tag = (address >> 8) | (m_s_flag ? 0x1000000 : 0); int idx = (address >> 2) & 0x3f; // 1-of-64 select // do a cache fill if the line is invalid or the tags don't match - if ((!m68k->ic_valid[idx]) || (m68k->ic_address[idx] != tag)) + if ((!m_ic_valid[idx]) || (m_ic_address[idx] != tag)) { // if the cache is frozen, don't update it - if (m68k->cacr & M68K_CACR_FI) + if (m_cacr & M68K_CACR_FI) { - return m68k->readimm16(address); + return m_readimm16(address); } - uint32_t data = m68k->read32(address & ~3); + uint32_t data = m_read32(address & ~3); //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx); // if no buserror occurred, validate the tag - if (!m68k->mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { - m68k->ic_address[idx] = tag; - m68k->ic_data[idx] = data; - m68k->ic_valid[idx] = true; + m_ic_address[idx] = tag; + m_ic_data[idx] = data; + m_ic_valid[idx] = true; } else { - return m68k->readimm16(address); + return m_readimm16(address); } } @@ -716,71 +568,71 @@ static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t add // a hit or because we just filled it. if (address & 2) { - return m68k->ic_data[idx] & 0xffff; + return m_ic_data[idx] & 0xffff; } else { - return m68k->ic_data[idx] >> 16; + return m_ic_data[idx] >> 16; } } } - return m68k->readimm16(address); + return m_readimm16(address); } /* Handles all immediate reads, does address error check, function code setting, * and prefetching if they are enabled in m68kconf.h */ -static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k) +inline uint32_t m68ki_read_imm_16() { uint32_t result; - m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM; - m68k->mmu_tmp_rw = 1; + m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; + m_mmu_tmp_rw = 1; - m68ki_check_address_error(m68k, REG_PC(m68k), MODE_READ, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(m68k) != m68k->pref_addr) + if (m_pc != m_pref_addr) { - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; } - result = MASK_OUT_ABOVE_16(m68k->pref_data); - REG_PC(m68k) += 2; - if (!m68k->mmu_tmp_buserror_occurred) { + result = MASK_OUT_ABOVE_16(m_pref_data); + m_pc += 2; + if (!m_mmu_tmp_buserror_occurred) { // prefetch only if no bus error occurred in opcode fetch - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; // ignore bus error on prefetch - m68k->mmu_tmp_buserror_occurred = 0; + m_mmu_tmp_buserror_occurred = 0; } return result; } -static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k) +inline uint32_t m68ki_read_imm_32() { uint32_t temp_val; - m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM; - m68k->mmu_tmp_rw = 1; + m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; + m_mmu_tmp_rw = 1; - m68ki_check_address_error(m68k, REG_PC(m68k), MODE_READ, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ - if(REG_PC(m68k) != m68k->pref_addr) + if(m_pc != m_pref_addr) { - m68k->pref_addr = REG_PC(m68k); - m68k->pref_data = m68ki_ic_readimm16(m68k, m68k->pref_addr); + m_pref_addr = m_pc; + m_pref_data = m68ki_ic_readimm16(m_pref_addr); } - temp_val = MASK_OUT_ABOVE_16(m68k->pref_data); - REG_PC(m68k) += 2; - m68k->pref_addr = REG_PC(m68k); - m68k->pref_data = m68ki_ic_readimm16(m68k, m68k->pref_addr); + temp_val = MASK_OUT_ABOVE_16(m_pref_data); + m_pc += 2; + m_pref_addr = m_pc; + m_pref_data = m68ki_ic_readimm16(m_pref_addr); - temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(m68k->pref_data)); - REG_PC(m68k) += 2; - m68k->pref_data = m68ki_ic_readimm16(m68k, REG_PC(m68k)); - m68k->pref_addr = m68k->mmu_tmp_buserror_occurred ? ~0 : REG_PC(m68k); + temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(m_pref_data)); + m_pc += 2; + m_pref_data = m68ki_ic_readimm16(m_pc); + m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; return temp_val; } @@ -795,58 +647,58 @@ static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k) * These functions will also check for address error and set the function * code if they are enabled in m68kconf.h. */ -static inline uint32_t m68ki_read_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_8_fc(uint32_t address, uint32_t fc) { - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read8(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read8(address); } -static inline uint32_t m68ki_read_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_READ, fc); + m68ki_check_address_error(address, MODE_READ, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read16(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read16(address); } -static inline uint32_t m68ki_read_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc) +inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_READ, fc); + m68ki_check_address_error(address, MODE_READ, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 1; - return m68k->/*memory.*/read32(address); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 1; + return m_read32(address); } -static inline void m68ki_write_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_8_fc(uint32_t address, uint32_t fc, uint32_t value) { - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write8(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write8(address, value); } -static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write16(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write16(address, value); } -static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write32(address, value); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write32(address, value); } /* Special call to simulate undocumented 68k behavior when move.l with a @@ -854,16 +706,16 @@ static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, * A real 68k first writes the high word to [address+2], and then writes the * low word to [address]. */ -static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value) +inline void m68ki_write_32_pd_fc(uint32_t address, uint32_t fc, uint32_t value) { - if (CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if (CPU_TYPE_IS_010_LESS()) { - m68ki_check_address_error(m68k, address, MODE_WRITE, fc); + m68ki_check_address_error(address, MODE_WRITE, fc); } - m68k->mmu_tmp_fc = fc; - m68k->mmu_tmp_rw = 0; - m68k->/*memory.*/write16(address+2, value>>16); - m68k->/*memory.*/write16(address, value&0xffff); + m_mmu_tmp_fc = fc; + m_mmu_tmp_rw = 0; + m_write16(address+2, value>>16); + m_write16(address, value&0xffff); } @@ -872,16 +724,16 @@ static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t addre /* The program counter relative addressing modes cause operands to be * retrieved from program space, not data space. */ -static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k) +inline uint32_t m68ki_get_ea_pcdi() { - uint32_t old_pc = REG_PC(m68k); - return old_pc + MAKE_INT_16(m68ki_read_imm_16(m68k)); + uint32_t old_pc = m_pc; + return old_pc + MAKE_INT_16(m68ki_read_imm_16()); } -static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k) +inline uint32_t m68ki_get_ea_pcix() { - return m68ki_get_ea_ix(m68k, REG_PC(m68k)); + return m68ki_get_ea_ix(m_pc); } /* Indexed addressing modes are encoded as follows: @@ -926,18 +778,18 @@ static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k) * 1 011 mem indir with long outer * 1 100-111 reserved */ -static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) +inline uint32_t m68ki_get_ea_ix(uint32_t An) { /* An = base register */ - uint32_t extension = m68ki_read_imm_16(m68k); + uint32_t extension = m68ki_read_imm_16(); uint32_t Xn = 0; /* Index register */ uint32_t bd = 0; /* Base Displacement */ uint32_t od = 0; /* Outer Displacement */ - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if(CPU_TYPE_IS_010_LESS()) { /* Calculate index */ - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); @@ -949,11 +801,11 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) if(!BIT_8(extension)) { /* Calculate index */ - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); /* Add scale if proper CPU type */ - if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) + if(CPU_TYPE_IS_EC020_PLUS()) Xn <<= (extension>>9) & 3; /* SCALE */ /* Add base register and displacement and return */ @@ -962,7 +814,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Full extension format */ - m68k->remaining_cycles -= m68ki_ea_idx_cycle_table[extension&0x3f]; + m_remaining_cycles -= m68ki_ea_idx_cycle_table[extension&0x3f]; /* Check if base register is present */ if(BIT_7(extension)) /* BS */ @@ -971,7 +823,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if index is present */ if(!BIT_6(extension)) /* IS */ { - Xn = REG_DA(m68k)[extension>>12]; /* Xn */ + Xn = REG_DA()[extension>>12]; /* Xn */ if(!BIT_B(extension)) /* W/L */ Xn = MAKE_INT_16(Xn); Xn <<= (extension>>9) & 3; /* SCALE */ @@ -979,7 +831,7 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if base displacement is present */ if(BIT_5(extension)) /* BD SIZE */ - bd = BIT_4(extension) ? m68ki_read_imm_32(m68k) : MAKE_INT_16(m68ki_read_imm_16(m68k)); + bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); /* If no indirect action, we are done */ if(!(extension&7)) /* No Memory Indirect */ @@ -987,117 +839,117 @@ static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An) /* Check if outer displacement is present */ if(BIT_1(extension)) /* I/IS: od */ - od = BIT_0(extension) ? m68ki_read_imm_32(m68k) : MAKE_INT_16(m68ki_read_imm_16(m68k)); + od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16()); /* Postindex */ if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */ - return m68ki_read_32(m68k, An + bd) + Xn + od; + return m68ki_read_32(An + bd) + Xn + od; /* Preindex */ - return m68ki_read_32(m68k, An + bd + Xn) + od; + return m68ki_read_32(An + bd + Xn) + od; } /* Fetch operands */ -static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_32(m68k); return m68ki_read_32(m68k, ea);} - -static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_32(m68k); return m68ki_read_32(m68k, ea);} - -static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PI_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PD_8(m68k); return m68ki_read_8(m68k, ea); } - -static inline uint32_t OPER_AW_8(m68000_base_device *m68k) {uint32_t ea = EA_AW_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AW_16(m68000_base_device *m68k) {uint32_t ea = EA_AW_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AW_32(m68000_base_device *m68k) {uint32_t ea = EA_AW_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_AL_8(m68000_base_device *m68k) {uint32_t ea = EA_AL_8(m68k); return m68ki_read_8(m68k, ea); } -static inline uint32_t OPER_AL_16(m68000_base_device *m68k) {uint32_t ea = EA_AL_16(m68k); return m68ki_read_16(m68k, ea);} -static inline uint32_t OPER_AL_32(m68000_base_device *m68k) {uint32_t ea = EA_AL_32(m68k); return m68ki_read_32(m68k, ea);} -static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_8(m68k); return m68ki_read_pcrel_8(m68k, ea); } -static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_16(m68k); return m68ki_read_pcrel_16(m68k, ea);} -static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_32(m68k); return m68ki_read_pcrel_32(m68k, ea);} -static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_8(m68k); return m68ki_read_pcrel_8(m68k, ea); } -static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_16(m68k); return m68ki_read_pcrel_16(m68k, ea);} -static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_32(m68k); return m68ki_read_pcrel_32(m68k, ea);} +inline uint32_t OPER_AY_AI_8() {uint32_t ea = EA_AY_AI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_AI_16() {uint32_t ea = EA_AY_AI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_AI_32() {uint32_t ea = EA_AY_AI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_PI_8() {uint32_t ea = EA_AY_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_PI_16() {uint32_t ea = EA_AY_PI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_PI_32() {uint32_t ea = EA_AY_PI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_PD_8() {uint32_t ea = EA_AY_PD_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_PD_16() {uint32_t ea = EA_AY_PD_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_PD_32() {uint32_t ea = EA_AY_PD_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_DI_8() {uint32_t ea = EA_AY_DI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_DI_16() {uint32_t ea = EA_AY_DI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_DI_32() {uint32_t ea = EA_AY_DI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AY_IX_8() {uint32_t ea = EA_AY_IX_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AY_IX_16() {uint32_t ea = EA_AY_IX_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AY_IX_32() {uint32_t ea = EA_AY_IX_32(); return m68ki_read_32(ea);} + +inline uint32_t OPER_AX_AI_8() {uint32_t ea = EA_AX_AI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_AI_16() {uint32_t ea = EA_AX_AI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_AI_32() {uint32_t ea = EA_AX_AI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_PI_8() {uint32_t ea = EA_AX_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_PI_16() {uint32_t ea = EA_AX_PI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_PI_32() {uint32_t ea = EA_AX_PI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_PD_8() {uint32_t ea = EA_AX_PD_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_PD_16() {uint32_t ea = EA_AX_PD_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_PD_32() {uint32_t ea = EA_AX_PD_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_DI_8() {uint32_t ea = EA_AX_DI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_DI_16() {uint32_t ea = EA_AX_DI_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_DI_32() {uint32_t ea = EA_AX_DI_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AX_IX_8() {uint32_t ea = EA_AX_IX_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AX_IX_16() {uint32_t ea = EA_AX_IX_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AX_IX_32() {uint32_t ea = EA_AX_IX_32(); return m68ki_read_32(ea);} + +inline uint32_t OPER_A7_PI_8() {uint32_t ea = EA_A7_PI_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_A7_PD_8() {uint32_t ea = EA_A7_PD_8(); return m68ki_read_8(ea); } + +inline uint32_t OPER_AW_8() {uint32_t ea = EA_AW_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AW_16() {uint32_t ea = EA_AW_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AW_32() {uint32_t ea = EA_AW_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_AL_8() {uint32_t ea = EA_AL_8(); return m68ki_read_8(ea); } +inline uint32_t OPER_AL_16() {uint32_t ea = EA_AL_16(); return m68ki_read_16(ea);} +inline uint32_t OPER_AL_32() {uint32_t ea = EA_AL_32(); return m68ki_read_32(ea);} +inline uint32_t OPER_PCDI_8() {uint32_t ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); } +inline uint32_t OPER_PCDI_16() {uint32_t ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);} +inline uint32_t OPER_PCDI_32() {uint32_t ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);} +inline uint32_t OPER_PCIX_8() {uint32_t ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); } +inline uint32_t OPER_PCIX_16() {uint32_t ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);} +inline uint32_t OPER_PCIX_32() {uint32_t ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);} /* ---------------------------- Stack Functions --------------------------- */ /* Push/pull data from the stack */ -static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value) +inline void m68ki_push_16(uint32_t value) { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 2); - m68ki_write_16(m68k, REG_SP(m68k), value); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 2); + m68ki_write_16(REG_SP(), value); } -static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value) +inline void m68ki_push_32(uint32_t value) { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 4); - m68ki_write_32(m68k, REG_SP(m68k), value); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 4); + m68ki_write_32(REG_SP(), value); } -static inline uint32_t m68ki_pull_16(m68000_base_device *m68k) +inline uint32_t m68ki_pull_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 2); - return m68ki_read_16(m68k, REG_SP(m68k)-2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 2); + return m68ki_read_16(REG_SP()-2); } -static inline uint32_t m68ki_pull_32(m68000_base_device *m68k) +inline uint32_t m68ki_pull_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 4); - return m68ki_read_32(m68k, REG_SP(m68k)-4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 4); + return m68ki_read_32(REG_SP()-4); } /* Increment/decrement the stack as if doing a push/pull but * don't do any memory access. */ -static inline void m68ki_fake_push_16(m68000_base_device *m68k) +inline void m68ki_fake_push_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 2); } -static inline void m68ki_fake_push_32(m68000_base_device *m68k) +inline void m68ki_fake_push_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() - 4); } -static inline void m68ki_fake_pull_16(m68000_base_device *m68k) +inline void m68ki_fake_pull_16() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 2); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 2); } -static inline void m68ki_fake_pull_32(m68000_base_device *m68k) +inline void m68ki_fake_pull_32() { - REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 4); + REG_SP() = MASK_OUT_ABOVE_32(REG_SP() + 4); } @@ -1107,15 +959,15 @@ static inline void m68ki_fake_pull_32(m68000_base_device *m68k) * These functions will also call the pc_changed callback if it was enabled * in m68kconf.h. */ -static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc) +inline void m68ki_jump(uint32_t new_pc) { - REG_PC(m68k) = new_pc; + m_pc = new_pc; } -static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_jump_vector(uint32_t vector) { - REG_PC(m68k) = (vector<<2) + m68k->vbr; - REG_PC(m68k) = m68ki_read_data_32(m68k, REG_PC(m68k)); + m_pc = (vector<<2) + m_vbr; + m_pc = m68ki_read_data_32(m_pc); } @@ -1124,19 +976,19 @@ static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector) * So far I've found no problems with not calling pc_changed for 8 or 16 * bit branches. */ -static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_8(uint32_t offset) { - REG_PC(m68k) += MAKE_INT_8(offset); + m_pc += MAKE_INT_8(offset); } -static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_16(uint32_t offset) { - REG_PC(m68k) += MAKE_INT_16(offset); + m_pc += MAKE_INT_16(offset); } -static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset) +inline void m68ki_branch_32(uint32_t offset) { - REG_PC(m68k) += offset; + m_pc += offset; } @@ -1146,215 +998,215 @@ static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset) /* Set the S flag and change the active stack pointer. * Note that value MUST be 4 or 0. */ -static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_s_flag(uint32_t value) { /* Backup the old stack pointer */ - REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k); + REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)] = REG_SP(); /* Set the S flag */ - m68k->s_flag = value; + m_s_flag = value; /* Set the new stack pointer */ - REG_SP(m68k) = REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)]; + REG_SP() = REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)]; } /* Set the S and M flags and change the active stack pointer. * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M). */ -static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sm_flag(uint32_t value) { /* Backup the old stack pointer */ - REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k); + REG_SP_BASE()[m_s_flag | ((m_s_flag >> 1) & m_m_flag)] = REG_SP(); /* Set the S and M flags */ - m68k->s_flag = value & SFLAG_SET; - m68k->m_flag = value & MFLAG_SET; + m_s_flag = value & SFLAG_SET; + m_m_flag = value & MFLAG_SET; /* Set the new stack pointer */ - REG_SP(m68k) = REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)]; + REG_SP() = REG_SP_BASE()[m_s_flag | ((m_s_flag>>1) & m_m_flag)]; } /* Set the S and M flags. Don't touch the stack pointer. */ -static inline void m68ki_set_sm_flag_nosp(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sm_flag_nosp(uint32_t value) { /* Set the S and M flags */ - m68k->s_flag = value & SFLAG_SET; - m68k->m_flag = value & MFLAG_SET; + m_s_flag = value & SFLAG_SET; + m_m_flag = value & MFLAG_SET; } /* Set the condition code register */ -static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_ccr(uint32_t value) { - m68k->x_flag = BIT_4(value) << 4; - m68k->n_flag = BIT_3(value) << 4; - m68k->not_z_flag = !BIT_2(value); - m68k->v_flag = BIT_1(value) << 6; - m68k->c_flag = BIT_0(value) << 8; + m_x_flag = BIT_4(value)<< 4; + m_n_flag = BIT_3(value)<< 4; + m_not_z_flag = !BIT_2(value); + m_v_flag = BIT_1(value)<< 6; + m_c_flag = BIT_0(value)<< 8; } /* Set the status register but don't check for interrupts */ -static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr_noint(uint32_t value) { /* Mask out the "unimplemented" bits */ - value &= m68k->sr_mask; + value &= m_sr_mask; /* Now set the status register */ - m68k->t1_flag = BIT_F(value); - m68k->t0_flag = BIT_E(value); - m68k->int_mask = value & 0x0700; - m68ki_set_ccr(m68k, value); - m68ki_set_sm_flag(m68k, (value >> 11) & 6); + m_t1_flag = BIT_F(value); + m_t0_flag = BIT_E(value); + m_int_mask = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_sm_flag((value >> 11) & 6); } /* Set the status register but don't check for interrupts nor * change the stack pointer */ -static inline void m68ki_set_sr_noint_nosp(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr_noint_nosp(uint32_t value) { /* Mask out the "unimplemented" bits */ - value &= m68k->sr_mask; + value &= m_sr_mask; /* Now set the status register */ - m68k->t1_flag = BIT_F(value); - m68k->t0_flag = BIT_E(value); - m68k->int_mask = value & 0x0700; - m68ki_set_ccr(m68k, value); - m68ki_set_sm_flag_nosp(m68k, (value >> 11) & 6); + m_t1_flag = BIT_F(value); + m_t0_flag = BIT_E(value); + m_int_mask = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_sm_flag_nosp((value >> 11) & 6); } /* Set the status register and check for interrupts */ -static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value) +inline void m68ki_set_sr(uint32_t value) { - m68ki_set_sr_noint(m68k, value); - m68ki_check_interrupts(m68k); + m68ki_set_sr_noint(value); + m68ki_check_interrupts(); } /* ------------------------- Exception Processing ------------------------- */ /* Initiate exception processing */ -static inline uint32_t m68ki_init_exception(m68000_base_device *m68k) +inline uint32_t m68ki_init_exception() { /* Save the old status register */ - uint32_t sr = m68ki_get_sr(m68k); + uint32_t sr = m68ki_get_sr(); /* Turn off trace flag, clear pending traces */ - m68k->t1_flag = m68k->t0_flag = 0; - m68ki_clear_trace(m68k); + m_t1_flag = m_t0_flag = 0; + m68ki_clear_trace(); /* Enter supervisor mode */ - m68ki_set_s_flag(m68k, SFLAG_SET); + m68ki_set_s_flag(SFLAG_SET); return sr; } /* 3 word stack frame (68000 only) */ -static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr) +inline void m68ki_stack_frame_3word(uint32_t pc, uint32_t sr) { - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 0 stack frame. * This is the standard stack frame for 68010+. */ -static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0000(uint32_t pc, uint32_t sr, uint32_t vector) { /* Stack a 3-word frame if we are 68000 */ - if(m68k->cpu_type == CPU_TYPE_000 || m68k->cpu_type == CPU_TYPE_008) + if(m_cpu_type == CPU_TYPE_000 || m_cpu_type == CPU_TYPE_008) { - m68ki_stack_frame_3word(m68k, pc, sr); + m68ki_stack_frame_3word(pc, sr); return; } - m68ki_push_16(m68k, vector<<2); - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_16(vector<<2); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 1 stack frame (68020). * For 68020, this is the 4 word throwaway frame. */ -static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0001(uint32_t pc, uint32_t sr, uint32_t vector) { - m68ki_push_16(m68k, 0x1000 | (vector<<2)); - m68ki_push_32(m68k, pc); - m68ki_push_16(m68k, sr); + m68ki_push_16(0x1000 | (vector<<2)); + m68ki_push_32(pc); + m68ki_push_16(sr); } /* Format 2 stack frame. * This is used only by 68020 for trap exceptions. */ -static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_0010(uint32_t sr, uint32_t vector) { - m68ki_push_32(m68k, REG_PPC(m68k)); - m68ki_push_16(m68k, 0x2000 | (vector<<2)); - m68ki_push_32(m68k, REG_PC(m68k)); - m68ki_push_16(m68k, sr); + m68ki_push_32(m_ppc); + m68ki_push_16(0x2000 | (vector<<2)); + m68ki_push_32(m_pc); + m68ki_push_16(sr); } /* Bus error stack frame (68000 only). */ -static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr) +inline void m68ki_stack_frame_buserr(uint32_t sr) { - m68ki_push_32(m68k, REG_PC(m68k)); - m68ki_push_16(m68k, sr); - m68ki_push_16(m68k, m68k->ir); - m68ki_push_32(m68k, m68k->aerr_address); /* access address */ + m68ki_push_32(m_pc); + m68ki_push_16(sr); + m68ki_push_16(m_ir); + m68ki_push_32(m_aerr_address); /* access address */ /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC * R/W 0 = write, 1 = read * I/N 0 = instruction, 1 = not * FC 3-bit function code */ - m68ki_push_16(m68k, m68k->aerr_write_mode | m68k->instr_mode | m68k->aerr_fc); + m68ki_push_16(m_aerr_write_mode | m_instr_mode | m_aerr_fc); } /* Format 8 stack frame (68010). * 68010 only. This is the 29 word bus/address error frame. */ -static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector) +inline void m68ki_stack_frame_1000(uint32_t pc, uint32_t sr, uint32_t vector) { /* VERSION * NUMBER * INTERNAL INFORMATION, 16 WORDS */ - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); - m68ki_fake_push_32(m68k); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); + m68ki_fake_push_32(); /* INSTRUCTION INPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* DATA INPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* DATA OUTPUT BUFFER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* UNUSED, RESERVED (not written) */ - m68ki_fake_push_16(m68k); + m68ki_fake_push_16(); /* FAULT ADDRESS */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* SPECIAL STATUS WORD */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1000, VECTOR OFFSET */ - m68ki_push_16(m68k, 0x8000 | (vector<<2)); + m68ki_push_16(0x8000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Format A stack frame (short bus fault). @@ -1362,51 +1214,51 @@ static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, * if the error happens at an instruction boundary. * PC stacked is address of next instruction. */ -static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) +inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA OUTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA CYCLE FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INSTRUCTION PIPE STAGE B */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INSTRUCTION PIPE STAGE C */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ // set bit for: Rerun Faulted bus Cycle, or run pending prefetch // set FC - m68ki_push_16(m68k, 0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1010, VECTOR OFFSET */ - m68ki_push_16(m68k, 0xa000 | (vector<<2)); + m68ki_push_16(0xa000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Format B stack frame (long bus fault). @@ -1414,301 +1266,301 @@ static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, * if the error happens during instruction execution. * PC stacked is address of instruction in progress. */ -static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) +inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTERS (18 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); /* VERSION# (4 bits), INTERNAL INFORMATION */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTERS (3 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_16(m68k, 0); + m68ki_push_32(0); + m68ki_push_16(0); /* DATA INTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTERS (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* STAGE B ADDRESS (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER (4 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); /* DATA OUTPUT BUFFER (2 words) */ - m68ki_push_32(m68k, 0); + m68ki_push_32(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* DATA CYCLE FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INSTRUCTION PIPE STAGE B */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* INSTRUCTION PIPE STAGE C */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ - m68ki_push_16(m68k, 0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); /* INTERNAL REGISTER */ - m68ki_push_16(m68k, 0); + m68ki_push_16(0); /* 1011, VECTOR OFFSET */ - m68ki_push_16(m68k, 0xb000 | (vector<<2)); + m68ki_push_16(0xb000 | (vector<<2)); /* PROGRAM COUNTER */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Type 7 stack frame (access fault). * This is used by the 68040 for bus fault and mmu trap * 30 words */ -static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu) +inline void m68ki_stack_frame_0111(uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu) { - int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now - int orig_fc = m68k->mmu_tmp_buserror_fc; + int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now + int orig_fc = m_mmu_tmp_buserror_fc; /* INTERNAL REGISTERS (18 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); - m68ki_push_32(m68k, 0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); + m68ki_push_32(0); /* FAULT ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* INTERNAL REGISTERS (3 words) */ - m68ki_push_32(m68k, 0); - m68ki_push_16(m68k, 0); + m68ki_push_32(0); + m68ki_push_16(0); /* SPECIAL STATUS REGISTER (1 word) */ - m68ki_push_16(m68k, (in_mmu ? 0x400 : 0) | orig_fc | (orig_rw<<8)); + m68ki_push_16((in_mmu ? 0x400 : 0) | orig_fc | (orig_rw<<8)); /* EFFECTIVE ADDRESS (2 words) */ - m68ki_push_32(m68k, fault_address); + m68ki_push_32(fault_address); /* 0111, VECTOR OFFSET (1 word) */ - m68ki_push_16(m68k, 0x7000 | (vector<<2)); + m68ki_push_16(0x7000 | (vector<<2)); /* PROGRAM COUNTER (2 words) */ - m68ki_push_32(m68k, pc); + m68ki_push_32(pc); /* STATUS REGISTER (1 word) */ - m68ki_push_16(m68k, sr); + m68ki_push_16(sr); } /* Used for Group 2 exceptions. * These stack a type 2 frame on the 020. */ -static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_exception_trap(uint32_t vector) { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector); + if(CPU_TYPE_IS_010_LESS()) + m68ki_stack_frame_0000(m_pc, sr, vector); else - m68ki_stack_frame_0010(m68k, sr, vector); + m68ki_stack_frame_0010(sr, vector); - m68ki_jump_vector(m68k, vector); + m68ki_jump_vector(vector); /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } /* Trap#n stacks a 0 frame but behaves like group2 otherwise */ -static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector) +inline void m68ki_exception_trapN(uint32_t vector) { - uint32_t sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector); - m68ki_jump_vector(m68k, vector); + uint32_t sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_pc, sr, vector); + m68ki_jump_vector(vector); /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[vector]; + m_remaining_cycles -= m_cyc_exception[vector]; } /* Exception for trace mode */ -static inline void m68ki_exception_trace(m68000_base_device *m68k) +inline void m68ki_exception_trace() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_010_LESS(m68k->cpu_type)) + if(CPU_TYPE_IS_010_LESS()) { - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, EXCEPTION_TRACE); + m68ki_stack_frame_0000(m_pc, sr, EXCEPTION_TRACE); } else - m68ki_stack_frame_0010(m68k, sr, EXCEPTION_TRACE); + m68ki_stack_frame_0010(sr, EXCEPTION_TRACE); - m68ki_jump_vector(m68k, EXCEPTION_TRACE); + m68ki_jump_vector(EXCEPTION_TRACE); /* Trace nullifies a STOP instruction */ - m68k->stopped &= ~STOP_LEVEL_STOP; + m_stopped &= ~STOP_LEVEL_STOP; /* Use up some clock cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_TRACE]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_TRACE]; } /* Exception for privilege violation */ -static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k) +inline void m68ki_exception_privilege_violation() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_PRIVILEGE_VIOLATION); - m68ki_jump_vector(m68k, EXCEPTION_PRIVILEGE_VIOLATION); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_PRIVILEGE_VIOLATION); + m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_PRIVILEGE_VIOLATION] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_PRIVILEGE_VIOLATION] - m_cyc_instruction[m_ir]; } /* Exception for A-Line instructions */ -static inline void m68ki_exception_1010(m68000_base_device *m68k) +inline void m68ki_exception_1010() { uint32_t sr; - sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1010); - m68ki_jump_vector(m68k, EXCEPTION_1010); + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_1010); + m68ki_jump_vector(EXCEPTION_1010); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_1010] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_1010] - m_cyc_instruction[m_ir]; } /* Exception for F-Line instructions */ -static inline void m68ki_exception_1111(m68000_base_device *m68k) +inline void m68ki_exception_1111() { uint32_t sr; - sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1111); - m68ki_jump_vector(m68k, EXCEPTION_1111); + sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_1111); + m68ki_jump_vector(EXCEPTION_1111); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_1111] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_1111] - m_cyc_instruction[m_ir]; } /* Exception for illegal instructions */ -static inline void m68ki_exception_illegal(m68000_base_device *m68k) +inline void m68ki_exception_illegal() { uint32_t sr; - sr = m68ki_init_exception(m68k); + sr = m68ki_init_exception(); - if(CPU_TYPE_IS_000(m68k->cpu_type)) + if(CPU_TYPE_IS_000()) { - m68k->instr_mode = INSTRUCTION_NO; + m_instr_mode = INSTRUCTION_NO; } - m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_ILLEGAL_INSTRUCTION); - m68ki_jump_vector(m68k, EXCEPTION_ILLEGAL_INSTRUCTION); + m68ki_stack_frame_0000(m_ppc, sr, EXCEPTION_ILLEGAL_INSTRUCTION); + m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_ILLEGAL_INSTRUCTION] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_ILLEGAL_INSTRUCTION] - m_cyc_instruction[m_ir]; } /* Exception for format errror in RTE */ -static inline void m68ki_exception_format_error(m68000_base_device *m68k) +inline void m68ki_exception_format_error() { - uint32_t sr = m68ki_init_exception(m68k); - m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, EXCEPTION_FORMAT_ERROR); - m68ki_jump_vector(m68k, EXCEPTION_FORMAT_ERROR); + uint32_t sr = m68ki_init_exception(); + m68ki_stack_frame_0000(m_pc, sr, EXCEPTION_FORMAT_ERROR); + m68ki_jump_vector(EXCEPTION_FORMAT_ERROR); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_FORMAT_ERROR] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_FORMAT_ERROR] - m_cyc_instruction[m_ir]; } /* Exception for address error */ -static inline void m68ki_exception_address_error(m68000_base_device *m68k) +inline void m68ki_exception_address_error() { - uint32_t sr = m68ki_init_exception(m68k); + uint32_t sr = m68ki_init_exception(); /* If we were processing a bus error, address error, or reset, * this is a catastrophic failure. * Halt the CPU */ - if(m68k->run_mode == RUN_MODE_BERR_AERR_RESET) + if(m_run_mode == RUN_MODE_BERR_AERR_RESET) { - m68k->/*memory.*/read8(0x00ffff01); - m68k->stopped = STOP_LEVEL_HALT; + m_read8(0x00ffff01); + m_stopped = STOP_LEVEL_HALT; return; } - m68k->run_mode = RUN_MODE_BERR_AERR_RESET; + m_run_mode = RUN_MODE_BERR_AERR_RESET; - if (!CPU_TYPE_IS_010_PLUS(m68k->cpu_type)) + if (!CPU_TYPE_IS_010_PLUS()) { /* Note: This is implemented for 68000 only! */ - m68ki_stack_frame_buserr(m68k, sr); + m68ki_stack_frame_buserr(sr); } - else if (CPU_TYPE_IS_010(m68k->cpu_type)) + else if (CPU_TYPE_IS_010()) { /* only the 68010 throws this unique type-1000 frame */ - m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR); + m68ki_stack_frame_1000(m_ppc, sr, EXCEPTION_BUS_ERROR); } - else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k)) + else if (m_mmu_tmp_buserror_address == m_ppc) { - m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } else { - m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address); + m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address); } - m68ki_jump_vector(m68k, EXCEPTION_ADDRESS_ERROR); + m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR); /* Use up some clock cycles and undo the instruction's cycles */ - m68k->remaining_cycles -= m68k->cyc_exception[EXCEPTION_ADDRESS_ERROR] - m68k->cyc_instruction[m68k->ir]; + m_remaining_cycles -= m_cyc_exception[EXCEPTION_ADDRESS_ERROR] - m_cyc_instruction[m_ir]; } /* ASG: Check for interrupts */ -static inline void m68ki_check_interrupts(m68000_base_device *m68k) +inline void m68ki_check_interrupts() { - if(m68k->nmi_pending) + if(m_nmi_pending) { - m68k->nmi_pending = false; - m68k->m68ki_exception_interrupt(m68k, 7); + m_nmi_pending = false; + m68ki_exception_interrupt(7); } - else if(m68k->int_level > m68k->int_mask) - m68k->m68ki_exception_interrupt(m68k, m68k->int_level>>8); + else if(m_int_level > m_int_mask) + m68ki_exception_interrupt(m_int_level>>8); } diff --git a/src/devices/cpu/m68000/m68kfpu.hxx b/src/devices/cpu/m68000/m68kfpu.hxx index e53f4ad899d..5e2c74770f3 100644 --- a/src/devices/cpu/m68000/m68kfpu.hxx +++ b/src/devices/cpu/m68000/m68kfpu.hxx @@ -1,23 +1,20 @@ // license:BSD-3-Clause // copyright-holders:Karl Stenerud -#include -#define FPCC_N 0x08000000 -#define FPCC_Z 0x04000000 -#define FPCC_I 0x02000000 -#define FPCC_NAN 0x01000000 +static constexpr int FPCC_N = 0x08000000; +static constexpr int FPCC_Z = 0x04000000; +static constexpr int FPCC_I = 0x02000000; +static constexpr int FPCC_NAN = 0x01000000; -#define FPES_OE 0x00002000 -#define FPAE_IOP 0x00000080 +static constexpr int FPES_OE = 0x00002000; +static constexpr int FPAE_IOP = 0x00000080; -#define DOUBLE_INFINITY 0x7ff0000000000000U -#define DOUBLE_EXPONENT 0x7ff0000000000000U -#define DOUBLE_MANTISSA 0x000fffffffffffffU - -extern flag floatx80_is_nan( floatx80 a ); +static constexpr uint64_t DOUBLE_INFINITY = 0x7ff0000000000000U; +static constexpr uint64_t DOUBLE_EXPONENT = 0x7ff0000000000000U; +static constexpr uint64_t DOUBLE_MANTISSA = 0x000fffffffffffffU; // masks for packed dwords, positive k-factor -static const uint32_t pkmask2[18] = +const uint32_t pkmask2[18] = { 0xffffffff, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000, 0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff, @@ -25,7 +22,7 @@ static const uint32_t pkmask2[18] = 0xffffffff, 0xffffffff, 0xffffffff }; -static const uint32_t pkmask3[18] = +const uint32_t pkmask3[18] = { 0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000, @@ -53,15 +50,15 @@ static inline floatx80 double_to_fx80(double in) return float64_to_floatx80(*d); } -static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t ea) +inline floatx80 load_extended_float80(uint32_t ea) { uint32_t d1,d2; uint16_t d3; floatx80 fp; - d3 = m68ki_read_16(m68k, ea); - d1 = m68ki_read_32(m68k, ea+4); - d2 = m68ki_read_32(m68k, ea+8); + d3 = m68ki_read_16(ea); + d1 = m68ki_read_32(ea+4); + d2 = m68ki_read_32(ea+8); fp.high = d3; fp.low = ((uint64_t)d1<<32) | (d2 & 0xffffffff); @@ -69,24 +66,24 @@ static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t return fp; } -static inline void store_extended_float80(m68000_base_device *m68k, uint32_t ea, floatx80 fpr) +inline void store_extended_float80(uint32_t ea, floatx80 fpr) { - m68ki_write_16(m68k, ea+0, fpr.high); - m68ki_write_16(m68k, ea+2, 0); - m68ki_write_32(m68k, ea+4, (fpr.low>>32)&0xffffffff); - m68ki_write_32(m68k, ea+8, fpr.low&0xffffffff); + m68ki_write_16(ea+0, fpr.high); + m68ki_write_16(ea+2, 0); + m68ki_write_32(ea+4, (fpr.low>>32)&0xffffffff); + m68ki_write_32(ea+8, fpr.low&0xffffffff); } -static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea) +inline floatx80 load_pack_float80(uint32_t ea) { uint32_t dw1, dw2, dw3; floatx80 result; double tmp; char str[128], *ch; - dw1 = m68ki_read_32(m68k, ea); - dw2 = m68ki_read_32(m68k, ea+4); - dw3 = m68ki_read_32(m68k, ea+8); + dw1 = m68ki_read_32(ea); + dw2 = m68ki_read_32(ea+4); + dw3 = m68ki_read_32(ea+8); ch = &str[0]; if (dw1 & 0x80000000) // mantissa sign @@ -128,7 +125,7 @@ static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea) return result; } -static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int k, floatx80 fpr) +inline void store_pack_float80(uint32_t ea, int k, floatx80 fpr) { uint32_t dw1, dw2, dw3; char str[128], *ch; @@ -224,7 +221,7 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int { dw2 &= pkmask2[17]; dw3 &= pkmask3[17]; -// m68k->fpcr |= (need to set OPERR bit) +// m_fpcr |= (need to set OPERR bit) } } @@ -255,49 +252,49 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int dw1 |= (j << 16); } - m68ki_write_32(m68k, ea, dw1); - m68ki_write_32(m68k, ea+4, dw2); - m68ki_write_32(m68k, ea+8, dw3); + m68ki_write_32(ea, dw1); + m68ki_write_32(ea+4, dw2); + m68ki_write_32(ea+8, dw3); } -static inline void SET_CONDITION_CODES(m68000_base_device *m68k, floatx80 reg) +inline void SET_CONDITION_CODES(floatx80 reg) { // uint64_t *regi; // regi = (uint64_t *)® - REG_FPSR(m68k) &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN); + m_fpsr &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN); // sign flag if (reg.high & 0x8000) { - REG_FPSR(m68k) |= FPCC_N; + m_fpsr |= FPCC_N; } // zero flag if (((reg.high & 0x7fff) == 0) && ((reg.low<<1) == 0)) { - REG_FPSR(m68k) |= FPCC_Z; + m_fpsr |= FPCC_Z; } // infinity flag if (((reg.high & 0x7fff) == 0x7fff) && ((reg.low<<1) == 0)) { - REG_FPSR(m68k) |= FPCC_I; + m_fpsr |= FPCC_I; } // NaN flag if (floatx80_is_nan(reg)) { - REG_FPSR(m68k) |= FPCC_NAN; + m_fpsr |= FPCC_NAN; } } -static inline int TEST_CONDITION(m68000_base_device *m68k, int condition) +inline int TEST_CONDITION(int condition) { - int n = (REG_FPSR(m68k) & FPCC_N) != 0; - int z = (REG_FPSR(m68k) & FPCC_Z) != 0; - int nan = (REG_FPSR(m68k) & FPCC_NAN) != 0; + int n = (m_fpsr & FPCC_N) != 0; + int z = (m_fpsr & FPCC_Z) != 0; + int nan = (m_fpsr & FPCC_NAN) != 0; int r = 0; switch (condition) { @@ -355,7 +352,7 @@ static inline int TEST_CONDITION(m68000_base_device *m68k, int condition) return r; } -static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) +uint8_t READ_EA_8(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -364,32 +361,32 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) { case 0: // Dn { - return REG_D(m68k)[reg]; + return REG_D()[reg]; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_8(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_8(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_PI_8(); + return m68ki_read_8(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_PD_8(); + return m68ki_read_8(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_DI_8(); + return m68ki_read_8(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_AY_IX_8(); + return m68ki_read_8(ea); } case 7: { @@ -397,41 +394,41 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_8(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_8(m68k, ea); + return m68ki_read_8(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_PCDI_8(); + return m68ki_read_8(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_8(m68k); - return m68ki_read_8(m68k, ea); + uint32_t ea = EA_PCIX_8(); + return m68ki_read_8(ea); } case 4: // # { - return OPER_I_8(m68k); + return OPER_I_8(); } - default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) +uint16_t READ_EA_16(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -440,32 +437,32 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) { case 0: // Dn { - return (uint16_t)(REG_D(m68k)[reg]); + return (uint16_t)(REG_D()[reg]); } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_16(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_16(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_PI_16(); + return m68ki_read_16(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_PD_16(); + return m68ki_read_16(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_DI_16(); + return m68ki_read_16(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_AY_IX_16(); + return m68ki_read_16(ea); } case 7: { @@ -473,42 +470,42 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_16(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_16(m68k, ea); + return m68ki_read_16(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_PCDI_16(); + return m68ki_read_16(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_16(m68k); - return m68ki_read_16(m68k, ea); + uint32_t ea = EA_PCIX_16(); + return m68ki_read_16(ea); } case 4: // # { - return OPER_I_16(m68k); + return OPER_I_16(); } - default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) +uint32_t READ_EA_32(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -517,32 +514,32 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) { case 0: // Dn { - return REG_D(m68k)[reg]; + return REG_D()[reg]; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - return m68ki_read_32(m68k, ea); + uint32_t ea = REG_A()[reg]; + return m68ki_read_32(ea); } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_PI_32(); + return m68ki_read_32(ea); } case 4: // -(An) { - uint32_t ea = EA_AY_PD_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_PD_32(); + return m68ki_read_32(ea); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_DI_32(); + return m68ki_read_32(ea); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_AY_IX_32(); + return m68ki_read_32(ea); } case 7: { @@ -550,40 +547,40 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = OPER_I_16(); + return m68ki_read_32(ea); } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return m68ki_read_32(m68k, ea); + return m68ki_read_32(ea); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_PCDI_32(); + return m68ki_read_32(ea); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_32(m68k); - return m68ki_read_32(m68k, ea); + uint32_t ea = EA_PCIX_32(); + return m68ki_read_32(ea); } case 4: // # { - return OPER_I_32(m68k); + return OPER_I_32(); } - default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) +uint64_t READ_EA_64(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -593,39 +590,39 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 8; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 8; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 4: // -(An) { - uint32_t ea = REG_A(m68k)[reg]-8; - REG_A(m68k)[reg] -= 8; - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = REG_A()[reg]-8; + REG_A()[reg] -= 8; + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_AY_DI_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_AY_IX_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 7: @@ -634,43 +631,43 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea) { case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - return (uint64_t)(m68ki_read_32(m68k, ea)) << 32 | (uint64_t)(m68ki_read_32(m68k, ea+4)); + return (uint64_t)(m68ki_read_32(ea)) << 32 | (uint64_t)(m68ki_read_32(ea+4)); } case 3: // (PC) + (Xn) + d8 { - uint32_t ea = EA_PCIX_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_PCIX_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 4: // # { - h1 = OPER_I_32(m68k); - h2 = OPER_I_32(m68k); + h1 = OPER_I_32(); + h2 = OPER_I_32(); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - h1 = m68ki_read_32(m68k, ea+0); - h2 = m68ki_read_32(m68k, ea+4); + uint32_t ea = EA_PCDI_32(); + h1 = m68ki_read_32(ea+0); + h2 = m68ki_read_32(ea+4); return (uint64_t)(h1) << 32 | (uint64_t)(h2); } - default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } -static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) +floatx80 READ_EA_FPE(int ea) { floatx80 fpr; int mode = (ea >> 3) & 0x7; @@ -680,37 +677,37 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + fpr = load_extended_float80(ea); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 12; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 12; + fpr = load_extended_float80(ea); break; } case 4: // -(An) { - uint32_t ea = REG_A(m68k)[reg]-12; - REG_A(m68k)[reg] -= 12; - fpr = load_extended_float80(m68k, ea); + uint32_t ea = REG_A()[reg]-12; + REG_A()[reg] -= 12; + fpr = load_extended_float80(ea); break; } case 5: // (d16, An) { // FIXME: will fail for fmovem - uint32_t ea = EA_AY_DI_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_AY_DI_32(); + fpr = load_extended_float80(ea); break; } case 6: // (An) + (Xn) + d8 { // FIXME: will fail for fmovem - uint32_t ea = EA_AY_IX_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_AY_IX_32(); + fpr = load_extended_float80(ea); break; } @@ -720,41 +717,41 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea) { case 1: // (xxx) { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - fpr = load_extended_float80(m68k, ea); + fpr = load_extended_float80(ea); } break; case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_PCDI_32(); + fpr = load_extended_float80(ea); } break; case 3: // (d16,PC,Dx.w) { - uint32_t ea = EA_PCIX_32(m68k); - fpr = load_extended_float80(m68k, ea); + uint32_t ea = EA_PCIX_32(); + fpr = load_extended_float80(ea); } break; default: - fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } } break; - default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break; + default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } return fpr; } -static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) +floatx80 READ_EA_PACK(int ea) { floatx80 fpr; int mode = (ea >> 3) & 0x7; @@ -764,16 +761,16 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - fpr = load_pack_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + fpr = load_pack_float80(ea); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 12; - fpr = load_pack_float80(m68k, ea); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 12; + fpr = load_pack_float80(ea); break; } @@ -783,25 +780,25 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea) { case 3: // (d16,PC,Dx.w) { - uint32_t ea = EA_PCIX_32(m68k); - fpr = load_pack_float80(m68k, ea); + uint32_t ea = EA_PCIX_32(); + fpr = load_pack_float80(ea); } break; default: - fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } } break; - default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break; + default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break; } return fpr; } -static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) +void WRITE_EA_8(int ea, uint8_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -810,37 +807,37 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_8(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_8(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_PI_8(); + m68ki_write_8(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_PD_8(); + m68ki_write_8(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_DI_8(); + m68ki_write_8(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_8(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_AY_IX_8(); + m68ki_write_8(ea, data); break; } case 7: @@ -849,27 +846,27 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data) { case 1: // (xxx).B { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_8(m68k, ea, data); + m68ki_write_8(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - m68ki_write_8(m68k, ea, data); + uint32_t ea = EA_PCDI_16(); + m68ki_write_8(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) +void WRITE_EA_16(int ea, uint16_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -878,37 +875,37 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_16(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_16(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_PI_16(); + m68ki_write_16(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_PD_16(); + m68ki_write_16(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_DI_16(); + m68ki_write_16(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_AY_IX_16(); + m68ki_write_16(ea, data); break; } case 7: @@ -917,27 +914,27 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data) { case 1: // (xxx).W { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_16(m68k, ea, data); + m68ki_write_16(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_16(m68k); - m68ki_write_16(m68k, ea, data); + uint32_t ea = EA_PCDI_16(); + m68ki_write_16(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) +void WRITE_EA_32(int ea, uint32_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -946,42 +943,42 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) { case 0: // Dn { - REG_D(m68k)[reg] = data; + REG_D()[reg] = data; break; } case 1: // An { - REG_A(m68k)[reg] = data; + REG_A()[reg] = data; break; } case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea, data); + uint32_t ea = REG_A()[reg]; + m68ki_write_32(ea, data); break; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_PI_32(); + m68ki_write_32(ea, data); break; } case 4: // -(An) { - uint32_t ea = EA_AY_PD_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_PD_32(); + m68ki_write_32(ea, data); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_DI_32(); + m68ki_write_32(ea, data); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_AY_IX_32(); + m68ki_write_32(ea, data); break; } case 7: @@ -990,33 +987,33 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data) { case 0: // (xxx).W { - uint32_t ea = OPER_I_16(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = OPER_I_16(); + m68ki_write_32(ea, data); break; } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_32(m68k, ea, data); + m68ki_write_32(ea, data); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - m68ki_write_32(m68k, ea, data); + uint32_t ea = EA_PCDI_32(); + m68ki_write_32(ea, data); break; } - default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc); } } -static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) +void WRITE_EA_64(int ea, uint64_t data) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1025,40 +1022,40 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) { case 2: // (An) { - uint32_t ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = REG_A()[reg]; + m68ki_write_32(ea, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 3: // (An)+ { - uint32_t ea = REG_A(m68k)[reg]; - REG_A(m68k)[reg] += 8; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = REG_A()[reg]; + REG_A()[reg] += 8; + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 8; - ea = REG_A(m68k)[reg]; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + REG_A()[reg] -= 8; + ea = REG_A()[reg]; + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_AY_DI_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_AY_IX_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 7: @@ -1067,29 +1064,29 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data) { case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); - m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32)); - m68ki_write_32(m68k, ea+4, (uint32_t)(data)); + uint32_t ea = EA_PCDI_32(); + m68ki_write_32(ea+0, (uint32_t)(data >> 32)); + m68ki_write_32(ea+4, (uint32_t)(data)); break; } - default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), m_pc); } } -static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) +void WRITE_EA_FPE(int ea, floatx80 fpr) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1099,26 +1096,26 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) case 2: // (An) { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); break; } case 3: // (An)+ { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); - REG_A(m68k)[reg] += 12; + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); + REG_A()[reg] += 12; break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 12; - ea = REG_A(m68k)[reg]; - store_extended_float80(m68k, ea, fpr); + REG_A()[reg] -= 12; + ea = REG_A()[reg]; + store_extended_float80(ea, fpr); break; } @@ -1126,14 +1123,14 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr) { switch (reg) { - default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } - default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } -static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) +void WRITE_EA_PACK(int ea, int k, floatx80 fpr) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -1143,26 +1140,26 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) case 2: // (An) { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); break; } case 3: // (An)+ { uint32_t ea; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); - REG_A(m68k)[reg] += 12; + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); + REG_A()[reg] += 12; break; } case 4: // -(An) { uint32_t ea; - REG_A(m68k)[reg] -= 12; - ea = REG_A(m68k)[reg]; - store_pack_float80(m68k, ea, k, fpr); + REG_A()[reg] -= 12; + ea = REG_A()[reg]; + store_pack_float80(ea, k, fpr); break; } @@ -1170,16 +1167,16 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr) { switch (reg) { - default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } - default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); } } -static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) +void fpgen_rm_reg(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int rm = (w2 >> 14) & 0x1; int src = (w2 >> 10) & 0x7; int dst = (w2 >> 7) & 0x7; @@ -1194,42 +1191,42 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) { case 0: // Long-Word Integer { - int32_t d = READ_EA_32(m68k, ea); + int32_t d = READ_EA_32(ea); source = int32_to_floatx80(d); break; } case 1: // Single-precision Real { - uint32_t d = READ_EA_32(m68k, ea); + uint32_t d = READ_EA_32(ea); source = float32_to_floatx80(d); break; } case 2: // Extended-precision Real { - source = READ_EA_FPE(m68k, ea); + source = READ_EA_FPE(ea); break; } case 3: // Packed-decimal Real { - source = READ_EA_PACK(m68k, ea); + source = READ_EA_PACK(ea); break; } case 4: // Word Integer { - int16_t d = READ_EA_16(m68k, ea); + int16_t d = READ_EA_16(ea); source = int32_to_floatx80((int32_t)d); break; } case 5: // Double-precision Real { - uint64_t d = READ_EA_64(m68k, ea); + uint64_t d = READ_EA_64(ea); source = float64_to_floatx80(d); break; } case 6: // Byte Integer { - int8_t d = READ_EA_8(m68k, ea); + int8_t d = READ_EA_8(ea); source = int32_to_floatx80((int32_t)d); break; } @@ -1342,21 +1339,21 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) break; default: - fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, REG_PC(m68k)-4); + fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, m_pc-4); break; } // handle it right here, the usual opmode bits aren't valid in the FMOVECR case - REG_FP(m68k)[dst] = source; - m68k->remaining_cycles -= 4; + m_fpr[dst] = source; + m_remaining_cycles -= 4; return; } - default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, REG_PC(m68k)-4); + default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, m_pc-4); } } else { - source = REG_FP(m68k)[src]; + source = m_fpr[src]; } @@ -1365,98 +1362,98 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) { case 0x00: // FMOVE { - REG_FP(m68k)[dst] = source; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 4; + m_fpr[dst] = source; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 4; break; } case 0x01: // FINT { int32_t temp; temp = floatx80_to_int32(source); - REG_FP(m68k)[dst] = int32_to_floatx80(temp); + m_fpr[dst] = int32_to_floatx80(temp); break; } case 0x03: // FINTRZ { int32_t temp; temp = floatx80_to_int32_round_to_zero(source); - REG_FP(m68k)[dst] = int32_to_floatx80(temp); + m_fpr[dst] = int32_to_floatx80(temp); break; } case 0x04: // FSQRT { - REG_FP(m68k)[dst] = floatx80_sqrt(source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 109; + m_fpr[dst] = floatx80_sqrt(source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 109; break; } case 0x06: // FLOGNP1 { - REG_FP(m68k)[dst] = floatx80_flognp1 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 594; // for MC68881 + m_fpr[dst] = floatx80_flognp1 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 594; // for MC68881 break; } case 0x0e: // FSIN { - REG_FP(m68k)[dst] = source; - floatx80_fsin(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_fsin(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x0f: // FTAN { - REG_FP(m68k)[dst] = source; - floatx80_ftan(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_ftan(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x14: // FLOGN { - REG_FP(m68k)[dst] = floatx80_flogn (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 548; // for MC68881 + m_fpr[dst] = floatx80_flogn (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 548; // for MC68881 break; } case 0x15: // FLOG10 { - REG_FP(m68k)[dst] = floatx80_flog10 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 604; // for MC68881 + m_fpr[dst] = floatx80_flog10 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 604; // for MC68881 break; } case 0x16: // FLOG2 { - REG_FP(m68k)[dst] = floatx80_flog2 (source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 604; // for MC68881 + m_fpr[dst] = floatx80_flog2 (source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 604; // for MC68881 break; } case 0x18: // FABS { - REG_FP(m68k)[dst] = source; - REG_FP(m68k)[dst].high &= 0x7fff; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 3; + m_fpr[dst] = source; + m_fpr[dst].high &= 0x7fff; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 3; break; } case 0x1a: // FNEG { - REG_FP(m68k)[dst] = source; - REG_FP(m68k)[dst].high ^= 0x8000; - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 3; + m_fpr[dst] = source; + m_fpr[dst].high ^= 0x8000; + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 3; break; } case 0x1d: // FCOS { - REG_FP(m68k)[dst] = source; - floatx80_fcos(REG_FP(m68k)[dst]); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 75; + m_fpr[dst] = source; + floatx80_fcos(m_fpr[dst]); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 75; break; } case 0x1e: // FGETEXP @@ -1465,93 +1462,93 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2) temp2 = source.high; // get the exponent temp2 -= 0x3fff; // take off the bias - REG_FP(m68k)[dst] = double_to_fx80((double)temp2); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 6; + m_fpr[dst] = double_to_fx80((double)temp2); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 6; break; } case 0x20: // FDIV { - REG_FP(m68k)[dst] = floatx80_div(REG_FP(m68k)[dst], source); - m68k->remaining_cycles -= 43; + m_fpr[dst] = floatx80_div(m_fpr[dst], source); + m_remaining_cycles -= 43; break; } case 0x22: // FADD { - REG_FP(m68k)[dst] = floatx80_add(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 9; + m_fpr[dst] = floatx80_add(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 9; break; } case 0x23: // FMUL { - REG_FP(m68k)[dst] = floatx80_mul(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 11; + m_fpr[dst] = floatx80_mul(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 11; break; } case 0x24: // FSGLDIV { - float32 a = floatx80_to_float32( REG_FP(m68k)[dst] ); + float32 a = floatx80_to_float32( m_fpr[dst] ); float32 b = floatx80_to_float32( source ); - REG_FP(m68k)[dst] = float32_to_floatx80( float32_div(a, b) ); - m68k->remaining_cycles -= 43; // // ? (value is from FDIV) + m_fpr[dst] = float32_to_floatx80( float32_div(a, b) ); + m_remaining_cycles -= 43; // // ? (value is from FDIV) break; } case 0x25: // FREM { - REG_FP(m68k)[dst] = floatx80_rem(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 43; // guess + m_fpr[dst] = floatx80_rem(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 43; // guess break; } case 0x26: // FSCALE { - REG_FP(m68k)[dst] = floatx80_scale(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 46; // (better?) guess + m_fpr[dst] = floatx80_scale(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 46; // (better?) guess break; } case 0x27: // FSGLMUL { - float32 a = floatx80_to_float32( REG_FP(m68k)[dst] ); + float32 a = floatx80_to_float32( m_fpr[dst] ); float32 b = floatx80_to_float32( source ); - REG_FP(m68k)[dst] = float32_to_floatx80( float32_mul(a, b) ); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 11; // ? (value is from FMUL) + m_fpr[dst] = float32_to_floatx80( float32_mul(a, b) ); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 11; // ? (value is from FMUL) break; } case 0x28: // FSUB { - REG_FP(m68k)[dst] = floatx80_sub(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); - m68k->remaining_cycles -= 9; + m_fpr[dst] = floatx80_sub(m_fpr[dst], source); + SET_CONDITION_CODES(m_fpr[dst]); + m_remaining_cycles -= 9; break; } case 0x38: // FCMP { floatx80 res; - res = floatx80_sub(REG_FP(m68k)[dst], source); - SET_CONDITION_CODES(m68k, res); - m68k->remaining_cycles -= 7; + res = floatx80_sub(m_fpr[dst], source); + SET_CONDITION_CODES(res); + m_remaining_cycles -= 7; break; } case 0x3a: // FTST { floatx80 res; res = source; - SET_CONDITION_CODES(m68k, res); - m68k->remaining_cycles -= 7; + SET_CONDITION_CODES(res); + m_remaining_cycles -= 7; break; } - default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, REG_PPC(m68k)); + default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, m_ppc); } } -static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2) +void fmove_reg_mem(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int src = (w2 >> 7) & 0x7; int dst = (w2 >> 10) & 0x7; int k = (w2 & 0x7f); @@ -1560,70 +1557,70 @@ static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2) { case 0: // Long-Word Integer { - int32_t d = (int32_t)floatx80_to_int32(REG_FP(m68k)[src]); - WRITE_EA_32(m68k, ea, d); + int32_t d = (int32_t)floatx80_to_int32(m_fpr[src]); + WRITE_EA_32(ea, d); break; } case 1: // Single-precision Real { - uint32_t d = floatx80_to_float32(REG_FP(m68k)[src]); - WRITE_EA_32(m68k, ea, d); + uint32_t d = floatx80_to_float32(m_fpr[src]); + WRITE_EA_32(ea, d); break; } case 2: // Extended-precision Real { - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[src]); + WRITE_EA_FPE(ea, m_fpr[src]); break; } case 3: // Packed-decimal Real with Static K-factor { // sign-extend k k = (k & 0x40) ? (k | 0xffffff80) : (k & 0x7f); - WRITE_EA_PACK(m68k, ea, k, REG_FP(m68k)[src]); + WRITE_EA_PACK(ea, k, m_fpr[src]); break; } case 4: // Word Integer { - int32 value = floatx80_to_int32(REG_FP(m68k)[src]); + int32 value = floatx80_to_int32(m_fpr[src]); if (value > 0x7fff || value < -0x8000 ) { - REG_FPSR(m68k) |= FPES_OE | FPAE_IOP; + m_fpsr |= FPES_OE | FPAE_IOP; } - WRITE_EA_16(m68k, ea, (int16_t)value); + WRITE_EA_16(ea, (int16_t)value); break; } case 5: // Double-precision Real { uint64_t d; - d = floatx80_to_float64(REG_FP(m68k)[src]); + d = floatx80_to_float64(m_fpr[src]); - WRITE_EA_64(m68k, ea, d); + WRITE_EA_64(ea, d); break; } case 6: // Byte Integer { - int32 value = floatx80_to_int32(REG_FP(m68k)[src]); + int32 value = floatx80_to_int32(m_fpr[src]); if (value > 127 || value < -128) { - REG_FPSR(m68k) |= FPES_OE | FPAE_IOP; + m_fpsr |= FPES_OE | FPAE_IOP; } - WRITE_EA_8(m68k, ea, (int8_t) value); + WRITE_EA_8(ea, (int8_t) value); break; } case 7: // Packed-decimal Real with Dynamic K-factor { - WRITE_EA_PACK(m68k, ea, REG_D(m68k)[k>>4], REG_FP(m68k)[src]); + WRITE_EA_PACK(ea, REG_D()[k>>4], m_fpr[src]); break; } } - m68k->remaining_cycles -= 12; + m_remaining_cycles -= 12; } -static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) +void fmove_fpcr(uint16_t w2) { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int dir = (w2 >> 13) & 0x1; int regsel = (w2 >> 10) & 0x7; int mode = (ea >> 3) & 0x7; @@ -1634,39 +1631,39 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) if (mode == 5) { - address = EA_AY_DI_32(m68k); + address = EA_AY_DI_32(); } else if (mode == 6) { - address = EA_AY_IX_32(m68k); + address = EA_AY_IX_32(); } if (dir) // From system control reg to { - if (regsel & 4) { m68ki_write_32(m68k, address, REG_FPCR(m68k)); address += 4; } - if (regsel & 2) { m68ki_write_32(m68k, address, REG_FPSR(m68k)); address += 4; } - if (regsel & 1) { m68ki_write_32(m68k, address, REG_FPIAR(m68k)); address += 4; } + if (regsel & 4) { m68ki_write_32(address, m_fpcr); address += 4; } + if (regsel & 2) { m68ki_write_32(address, m_fpsr); address += 4; } + if (regsel & 1) { m68ki_write_32(address, m_fpiar); address += 4; } } else // From to system control reg { - if (regsel & 4) { REG_FPCR(m68k) = m68ki_read_32(m68k, address); address += 4; } - if (regsel & 2) { REG_FPSR(m68k) = m68ki_read_32(m68k, address); address += 4; } - if (regsel & 1) { REG_FPIAR(m68k) = m68ki_read_32(m68k, address); address += 4; } + if (regsel & 4) { m_fpcr = m68ki_read_32(address); address += 4; } + if (regsel & 2) { m_fpsr = m68ki_read_32(address); address += 4; } + if (regsel & 1) { m_fpiar = m68ki_read_32(address); address += 4; } } } else { if (dir) // From system control reg to { - if (regsel & 4) WRITE_EA_32(m68k, ea, REG_FPCR(m68k)); - if (regsel & 2) WRITE_EA_32(m68k, ea, REG_FPSR(m68k)); - if (regsel & 1) WRITE_EA_32(m68k, ea, REG_FPIAR(m68k)); + if (regsel & 4) WRITE_EA_32(ea, m_fpcr); + if (regsel & 2) WRITE_EA_32(ea, m_fpsr); + if (regsel & 1) WRITE_EA_32(ea, m_fpiar); } else // From to system control reg { - if (regsel & 4) REG_FPCR(m68k) = READ_EA_32(m68k, ea); - if (regsel & 2) REG_FPSR(m68k) = READ_EA_32(m68k, ea); - if (regsel & 1) REG_FPIAR(m68k) = READ_EA_32(m68k, ea); + if (regsel & 4) m_fpcr = READ_EA_32(ea); + if (regsel & 2) m_fpsr = READ_EA_32(ea); + if (regsel & 1) m_fpiar = READ_EA_32(ea); } } @@ -1678,10 +1675,10 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) if ((regsel & 4) && dir == 0) { - int rnd = (REG_FPCR(m68k) >> 4) & 3; - int prec = (REG_FPCR(m68k) >> 6) & 3; + int rnd = (m_fpcr >> 4) & 3; + int prec = (m_fpcr >> 6) & 3; -// m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd); +// logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", m_fpcr, prec, rnd); #ifdef FLOATX80 switch (prec) @@ -1718,13 +1715,13 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2) } } - m68k->remaining_cycles -= 10; + m_remaining_cycles -= 10; } -static void fmovem(m68000_base_device *m68k, uint16_t w2) +void fmovem(uint16_t w2) { int i; - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int dir = (w2 >> 13) & 0x1; int mode = (w2 >> 11) & 0x3; int reglist = w2 & 0xff; @@ -1733,10 +1730,10 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) switch (ea >> 3) { case 5: // (d16, An) - mem_addr= EA_AY_DI_32(m68k); + mem_addr= EA_AY_DI_32(); break; case 6: // (An) + (Xn) + d8 - mem_addr= EA_AY_IX_32(m68k); + mem_addr= EA_AY_IX_32(); break; } @@ -1746,7 +1743,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 1: // Dynamic register list, postincrement or control addressing mode. // FIXME: not really tested, but seems to work - reglist = REG_D(m68k)[(reglist >> 4) & 7]; + reglist = REG_D()[(reglist >> 4) & 7]; case 0: // Static register list, predecrement or control addressing mode { @@ -1758,15 +1755,15 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - store_extended_float80(m68k, mem_addr, REG_FP(m68k)[i]); + store_extended_float80(mem_addr, m_fpr[i]); mem_addr += 12; break; default: - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[i]); + WRITE_EA_FPE(ea, m_fpr[i]); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; @@ -1782,21 +1779,21 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - store_extended_float80(m68k, mem_addr, REG_FP(m68k)[7-i]); + store_extended_float80(mem_addr, m_fpr[7-i]); mem_addr += 12; break; default: - WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[7-i]); + WRITE_EA_FPE(ea, m_fpr[7-i]); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; } - default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4); + default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4); } } else // From mem to FP regs @@ -1805,7 +1802,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 3: // Dynamic register list, predecrement addressing mode. // FIXME: not really tested, but seems to work - reglist = REG_D(m68k)[(reglist >> 4) & 7]; + reglist = REG_D()[(reglist >> 4) & 7]; case 2: // Static register list, postincrement or control addressing mode { @@ -1817,151 +1814,151 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2) { case 5: // (d16, An) case 6: // (An) + (Xn) + d8 - REG_FP(m68k)[7-i] = load_extended_float80(m68k, mem_addr); + m_fpr[7-i] = load_extended_float80(mem_addr); mem_addr += 12; break; default: - REG_FP(m68k)[7-i] = READ_EA_FPE(m68k, ea); + m_fpr[7-i] = READ_EA_FPE(ea); break; } - m68k->remaining_cycles -= 2; + m_remaining_cycles -= 2; } } break; } - default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4); + default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4); } } } -static void fscc(m68000_base_device *m68k) +void fscc() { - int ea = m68k->ir & 0x3f; - int condition = (int16_t)(OPER_I_16(m68k)); + int ea = m_ir & 0x3f; + int condition = (int16_t)(OPER_I_16()); - WRITE_EA_8(m68k, ea, TEST_CONDITION(m68k, condition) ? 0xff : 0); - m68k->remaining_cycles -= 7; // ??? + WRITE_EA_8(ea, TEST_CONDITION(condition) ? 0xff : 0); + m_remaining_cycles -= 7; // ??? } -static void fbcc16(m68000_base_device *m68k) +void fbcc16() { int32_t offset; - int condition = m68k->ir & 0x3f; + int condition = m_ir & 0x3f; - offset = (int16_t)(OPER_I_16(m68k)); + offset = (int16_t)(OPER_I_16()); // TODO: condition and jump!!! - if (TEST_CONDITION(m68k, condition)) + if (TEST_CONDITION(condition)) { - m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_16(m68k, offset-2); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_16(offset-2); } - m68k->remaining_cycles -= 7; + m_remaining_cycles -= 7; } -static void fbcc32(m68000_base_device *m68k) +void fbcc32() { int32_t offset; - int condition = m68k->ir & 0x3f; + int condition = m_ir & 0x3f; - offset = OPER_I_32(m68k); + offset = OPER_I_32(); // TODO: condition and jump!!! - if (TEST_CONDITION(m68k, condition)) + if (TEST_CONDITION(condition)) { - m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */ - m68ki_branch_32(m68k, offset-4); + m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ + m68ki_branch_32(offset-4); } - m68k->remaining_cycles -= 7; + m_remaining_cycles -= 7; } -void m68040_fpu_op0(m68000_base_device *m68k) +void m68040_fpu_op0() { - m68k->fpu_just_reset = 0; + m_fpu_just_reset = 0; - switch ((m68k->ir >> 6) & 0x3) + switch ((m_ir >> 6) & 0x3) { case 0: { - uint16_t w2 = OPER_I_16(m68k); + uint16_t w2 = OPER_I_16(); switch ((w2 >> 13) & 0x7) { case 0x0: // FPU ALU FP, FP case 0x2: // FPU ALU ea, FP { - fpgen_rm_reg(m68k, w2); + fpgen_rm_reg(w2); break; } case 0x3: // FMOVE FP, ea { - fmove_reg_mem(m68k, w2); + fmove_reg_mem(w2); break; } case 0x4: // FMOVEM ea, FPCR case 0x5: // FMOVEM FPCR, ea { - fmove_fpcr(m68k, w2); + fmove_fpcr(w2); break; } case 0x6: // FMOVEM ea, list case 0x7: // FMOVEM list, ea { - fmovem(m68k, w2); + fmovem(w2); break; } - default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, REG_PC(m68k)-4); + default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, m_pc-4); } break; } case 1: // FBcc disp16 { - switch ((m68k->ir >> 3) & 0x7) { + switch ((m_ir >> 3) & 0x7) { case 1: // FDBcc // TODO: break; default: // FScc (?) - fscc(m68k); + fscc(); return; } - fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m68k->ir >> 6) & 0x3, (m68k->ir >> 3) & 0x7, REG_PPC(m68k)); + fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m_ir >> 6) & 0x3, (m_ir >> 3) & 0x7, m_ppc); } case 2: // FBcc disp16 { - fbcc16(m68k); + fbcc16(); break; } case 3: // FBcc disp32 { - fbcc32(m68k); + fbcc32(); break; } - default: fatalerror("M68kFPU: unimplemented main op %d\n", (m68k->ir >> 6) & 0x3); + default: fatalerror("M68kFPU: unimplemented main op %d\n", (m_ir >> 6) & 0x3); } } -static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc) +int perform_fsave(uint32_t addr, int inc) { - if(m68k->cpu_type & CPU_TYPE_040) + if(m_cpu_type & CPU_TYPE_040) { if(inc) { - m68ki_write_32(m68k, addr, 0x41000000); + m68ki_write_32(addr, 0x41000000); return 4; } else { - m68ki_write_32(m68k, addr-4, 0x41000000); + m68ki_write_32(addr-4, 0x41000000); return -4; } } @@ -1969,131 +1966,131 @@ static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc) if (inc) { // 68881 IDLE, version 0x1f - m68ki_write_32(m68k, addr, 0x1f180000); - m68ki_write_32(m68k, addr+4, 0); - m68ki_write_32(m68k, addr+8, 0); - m68ki_write_32(m68k, addr+12, 0); - m68ki_write_32(m68k, addr+16, 0); - m68ki_write_32(m68k, addr+20, 0); - m68ki_write_32(m68k, addr+24, 0x70000000); + m68ki_write_32(addr, 0x1f180000); + m68ki_write_32(addr+4, 0); + m68ki_write_32(addr+8, 0); + m68ki_write_32(addr+12, 0); + m68ki_write_32(addr+16, 0); + m68ki_write_32(addr+20, 0); + m68ki_write_32(addr+24, 0x70000000); return 7*4; } else { - m68ki_write_32(m68k, addr-4, 0x70000000); - m68ki_write_32(m68k, addr-8, 0); - m68ki_write_32(m68k, addr-12, 0); - m68ki_write_32(m68k, addr-16, 0); - m68ki_write_32(m68k, addr-20, 0); - m68ki_write_32(m68k, addr-24, 0); - m68ki_write_32(m68k, addr-28, 0x1f180000); + m68ki_write_32(addr-4, 0x70000000); + m68ki_write_32(addr-8, 0); + m68ki_write_32(addr-12, 0); + m68ki_write_32(addr-16, 0); + m68ki_write_32(addr-20, 0); + m68ki_write_32(addr-24, 0); + m68ki_write_32(addr-28, 0x1f180000); return -7*4; } } // FRESTORE on a nullptr frame reboots the FPU - all registers to NaN, the 3 status regs to 0 -static void do_frestore_null(m68000_base_device *m68k) +void do_frestore_null() { int i; - REG_FPCR(m68k) = 0; - REG_FPSR(m68k) = 0; - REG_FPIAR(m68k) = 0; + m_fpcr = 0; + m_fpsr = 0; + m_fpiar = 0; for (i = 0; i < 8; i++) { - REG_FP(m68k)[i].high = 0x7fff; - REG_FP(m68k)[i].low = 0xffffffffffffffffU; + m_fpr[i].high = 0x7fff; + m_fpr[i].low = 0xffffffffffffffffU; } // Mac IIci at 408458e6 wants an FSAVE of a just-restored nullptr frame to also be nullptr // The PRM says it's possible to generate a nullptr frame, but not how/when/why. (need the 68881/68882 manual!) - m68k->fpu_just_reset = 1; + m_fpu_just_reset = 1; } -static void m68040_do_fsave(m68000_base_device *m68k, uint32_t addr, int reg, int inc) +void m68040_do_fsave(uint32_t addr, int reg, int inc) { - if (m68k->fpu_just_reset) + if (m_fpu_just_reset) { - m68ki_write_32(m68k, addr, 0); + m68ki_write_32(addr, 0); } else { // we normally generate an IDLE frame - int delta = perform_fsave(m68k, addr, inc); + int delta = perform_fsave(addr, inc); if(reg != -1) - REG_A(m68k)[reg] += delta; + REG_A()[reg] += delta; } } -static void m68040_do_frestore(m68000_base_device *m68k, uint32_t addr, int reg) +void m68040_do_frestore(uint32_t addr, int reg) { - bool m40 = m68k->cpu_type & CPU_TYPE_040; - uint32_t temp = m68ki_read_32(m68k, addr); + bool m40 = m_cpu_type & CPU_TYPE_040; + uint32_t temp = m68ki_read_32(addr); // check for nullptr frame if (temp & 0xff000000) { // we don't handle non-nullptr frames - m68k->fpu_just_reset = 0; + m_fpu_just_reset = 0; if (reg != -1) { // how about an IDLE frame? if (!m40 && ((temp & 0x00ff0000) == 0x00180000)) { - REG_A(m68k)[reg] += 7*4; + REG_A()[reg] += 7*4; } else if (m40 && ((temp & 0xffff0000) == 0x41000000)) { - REG_A(m68k)[reg] += 4; + REG_A()[reg] += 4; } // check UNIMP else if ((temp & 0x00ff0000) == 0x00380000) { - REG_A(m68k)[reg] += 14*4; + REG_A()[reg] += 14*4; } // check BUSY else if ((temp & 0x00ff0000) == 0x00b40000) { - REG_A(m68k)[reg] += 45*4; + REG_A()[reg] += 45*4; } } } else { - do_frestore_null(m68k); + do_frestore_null(); } } -void m68040_fpu_op1(m68000_base_device *m68k) +void m68040_fpu_op1() { - int ea = m68k->ir & 0x3f; + int ea = m_ir & 0x3f; int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); uint32_t addr; - switch ((m68k->ir >> 6) & 0x3) + switch ((m_ir >> 6) & 0x3) { case 0: // FSAVE { switch (mode) { case 2: // (An) - addr = REG_A(m68k)[reg]; - m68040_do_fsave(m68k, addr, -1, 1); + addr = REG_A()[reg]; + m68040_do_fsave(addr, -1, 1); break; case 3: // (An)+ - addr = EA_AY_PI_32(m68k); - m68040_do_fsave(m68k, addr, reg, 1); + addr = EA_AY_PI_32(); + m68040_do_fsave(addr, reg, 1); break; case 4: // -(An) - addr = EA_AY_PD_32(m68k); - m68040_do_fsave(m68k, addr, reg, 0); + addr = EA_AY_PD_32(); + m68040_do_fsave(addr, reg, 0); break; case 5: // (D16, An) - addr = EA_AY_DI_16(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_AY_DI_16(); + m68040_do_fsave(addr, -1, 1); break; case 7: // @@ -2101,24 +2098,24 @@ void m68040_fpu_op1(m68000_base_device *m68k) { case 1: // (abs32) { - addr = EA_AL_32(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_AL_32(); + m68040_do_fsave(addr, -1, 1); break; } case 2: // (d16, PC) { - addr = EA_PCDI_16(m68k); - m68040_do_fsave(m68k, addr, -1, 1); + addr = EA_PCDI_16(); + m68040_do_fsave(addr, -1, 1); break; } default: - fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; default: - fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; } @@ -2129,18 +2126,18 @@ void m68040_fpu_op1(m68000_base_device *m68k) switch (mode) { case 2: // (An) - addr = REG_A(m68k)[reg]; - m68040_do_frestore(m68k, addr, -1); + addr = REG_A()[reg]; + m68040_do_frestore(addr, -1); break; case 3: // (An)+ - addr = EA_AY_PI_32(m68k); - m68040_do_frestore(m68k, addr, reg); + addr = EA_AY_PI_32(); + m68040_do_frestore(addr, reg); break; case 5: // (D16, An) - addr = EA_AY_DI_16(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_AY_DI_16(); + m68040_do_frestore(addr, -1); break; case 7: // @@ -2148,53 +2145,53 @@ void m68040_fpu_op1(m68000_base_device *m68k) { case 1: // (abs32) { - addr = EA_AL_32(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_AL_32(); + m68040_do_frestore(addr, -1); break; } case 2: // (d16, PC) { - addr = EA_PCDI_16(m68k); - m68040_do_frestore(m68k, addr, -1); + addr = EA_PCDI_16(); + m68040_do_frestore(addr, -1); break; } default: - fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; default: - fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); + fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc); } break; } break; - default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m68k->ir >> 6) & 0x3, REG_PC(m68k)-2); + default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m_ir >> 6) & 0x3, m_pc-2); } } -void m68881_ftrap(m68000_base_device *m68k) +void m68881_ftrap() { - uint16_t w2 = OPER_I_16(m68k); + uint16_t w2 = OPER_I_16(); // now check the condition - if (TEST_CONDITION(m68k, w2 & 0x3f)) + if (TEST_CONDITION(w2 & 0x3f)) { // trap here - m68ki_exception_trap(m68k, EXCEPTION_TRAPV); + m68ki_exception_trap(EXCEPTION_TRAPV); } else // fall through, requires eating the operand { - switch (m68k->ir & 0x7) + switch (m_ir & 0x7) { case 2: // word operand - OPER_I_16(m68k); + OPER_I_16(); break; case 3: // long word operand - OPER_I_32(m68k); + OPER_I_32(); break; case 4: // no operand diff --git a/src/devices/cpu/m68000/m68kmake.cpp b/src/devices/cpu/m68000/m68kmake.cpp index 06e5cdecb1d..9be6ca437af 100644 --- a/src/devices/cpu/m68000/m68kmake.cpp +++ b/src/devices/cpu/m68000/m68kmake.cpp @@ -789,8 +789,8 @@ static void get_base_name(char* base_name, opcode_struct* op) /* Write the name of an opcode handler function */ static void write_function_name(FILE* filep, char* base_name) { - fprintf(filep, "void m68000_base_device_ops::%s(m68000_base_device* mc68kcpu)\n", base_name); - fprintf(g_prototype_file, "static void %s(m68000_base_device* mc68kcpu);\n", base_name); + fprintf(filep, "void m68000_base_device::%s()\n", base_name); + fprintf(g_prototype_file, "void %s();\n", base_name); } static void add_opcode_output_table_entry(opcode_struct* op, char* name) @@ -803,7 +803,7 @@ static void add_opcode_output_table_entry(opcode_struct* op, char* name) *ptr = *op; - sprintf( ptr->name, "m68000_base_device_ops::%s", name); + sprintf( ptr->name, "&m68000_base_device::%s", name); ptr->bits = num_bits(ptr->op_mask); } @@ -880,17 +880,17 @@ static void generate_opcode_handler(FILE* filep, body_struct* body, replace_stru /* Add any replace strings needed */ if(ea_mode != EA_MODE_NONE) { - sprintf(str, "EA_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_8()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_8, str); - sprintf(str, "EA_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_16()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_16, str); - sprintf(str, "EA_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "EA_%s_32()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_EA_AY_32, str); - sprintf(str, "OPER_%s_8(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_8()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_8, str); - sprintf(str, "OPER_%s_16(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_16()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_16, str); - sprintf(str, "OPER_%s_32(mc68kcpu)", g_ea_info_table[ea_mode].ea_add); + sprintf(str, "OPER_%s_32()", g_ea_info_table[ea_mode].ea_add); add_replace_string(replace, ID_OPHANDLER_OPER_AY_32, str); } @@ -972,8 +972,8 @@ static void generate_opcode_cc_variants(FILE* filep, body_struct* body, replace_ for(i=2;i<16;i++) { /* Add replace strings for this condition code */ - sprintf(repl, "COND_%s(mc68kcpu)", g_cc_table[i][1]); - sprintf(replnot, "COND_NOT_%s(mc68kcpu)", g_cc_table[i][1]); + sprintf(repl, "COND_%s()", g_cc_table[i][1]); + sprintf(replnot, "COND_NOT_%s()", g_cc_table[i][1]); add_replace_string(replace, ID_OPHANDLER_CC, repl); add_replace_string(replace, ID_OPHANDLER_NOT_CC, replnot); @@ -1358,9 +1358,7 @@ int main(int argc, char *argv[]) error_exit("Duplicate opcode handler section"); fprintf(g_table_file, "%s\n\n", ophandler_header_insert); - fprintf(g_prototype_file, "#ifdef OPCODE_PROTOTYPES\n\n"); process_opcode_handlers(g_table_file); - fprintf(g_prototype_file, "#else\n"); fprintf(g_table_file, "%s\n\n", ophandler_footer_insert); ophandler_body_read = 1; @@ -1390,7 +1388,6 @@ int main(int argc, char *argv[]) fprintf(g_table_file, "%s\n\n", table_footer_insert); fprintf(g_prototype_file, "%s\n\n", prototype_footer_insert); - fprintf(g_prototype_file, "#endif\n"); break; } diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index d477b31f187..24601755e6d 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -9,44 +9,44 @@ // MMU status register bit definitions -#define M68K_MMU_SR_BUS_ERROR 0x8000 -#define M68K_MMU_SR_SUPERVISOR_ONLY 0x2000 -#define M68K_MMU_SR_WRITE_PROTECT 0x0800 -#define M68K_MMU_SR_INVALID 0x0400 -#define M68K_MMU_SR_MODIFIED 0x0200 -#define M68K_MMU_SR_LEVEL_0 0x0000 -#define M68K_MMU_SR_LEVEL_1 0x0001 -#define M68K_MMU_SR_LEVEL_2 0x0002 -#define M68K_MMU_SR_LEVEL_3 0x0003 +static constexpr int M68K_MMU_SR_BUS_ERROR = 0x8000; +static constexpr int M68K_MMU_SR_SUPERVISOR_ONLY = 0x2000; +static constexpr int M68K_MMU_SR_WRITE_PROTECT = 0x0800; +static constexpr int M68K_MMU_SR_INVALID = 0x0400; +static constexpr int M68K_MMU_SR_MODIFIED = 0x0200; +static constexpr int M68K_MMU_SR_LEVEL_0 = 0x0000; +static constexpr int M68K_MMU_SR_LEVEL_1 = 0x0001; +static constexpr int M68K_MMU_SR_LEVEL_2 = 0x0002; +static constexpr int M68K_MMU_SR_LEVEL_3 = 0x0003; // MMU translation table descriptor field definitions -#define M68K_MMU_DF_DT 0x0003 -#define M68K_MMU_DF_DT0 0x0000 -#define M68K_MMU_DF_DT1 0x0001 -#define M68K_MMU_DF_DT2 0x0002 -#define M68K_MMU_DF_DT3 0x0003 -#define M68K_MMU_DF_WP 0x0004 -#define M68K_MMU_DF_USED 0x0008 -#define M68K_MMU_DF_MODIFIED 0x0010 -#define M68K_MMU_DF_CI 0x0040 -#define M68K_MMU_DF_SUPERVISOR 0x0100 +static constexpr int M68K_MMU_DF_DT = 0x0003; +static constexpr int M68K_MMU_DF_DT0 = 0x0000; +static constexpr int M68K_MMU_DF_DT1 = 0x0001; +static constexpr int M68K_MMU_DF_DT2 = 0x0002; +static constexpr int M68K_MMU_DF_DT3 = 0x0003; +static constexpr int M68K_MMU_DF_WP = 0x0004; +static constexpr int M68K_MMU_DF_USED = 0x0008; +static constexpr int M68K_MMU_DF_MODIFIED = 0x0010; +static constexpr int M68K_MMU_DF_CI = 0x0040; +static constexpr int M68K_MMU_DF_SUPERVISOR = 0x0100; // MMU ATC Fields -#define M68K_MMU_ATC_BUSERROR 0x08000000 -#define M68K_MMU_ATC_CACHE_IN 0x04000000 -#define M68K_MMU_ATC_WRITE_PR 0x02000000 -#define M68K_MMU_ATC_MODIFIED 0x01000000 -#define M68K_MMU_ATC_MASK 0x00ffffff -#define M68K_MMU_ATC_SHIFT 8 -#define M68K_MMU_ATC_VALID 0x08000000 +static constexpr int M68K_MMU_ATC_BUSERROR = 0x08000000; +static constexpr int M68K_MMU_ATC_CACHE_IN = 0x04000000; +static constexpr int M68K_MMU_ATC_WRITE_PR = 0x02000000; +static constexpr int M68K_MMU_ATC_MODIFIED = 0x01000000; +static constexpr int M68K_MMU_ATC_MASK = 0x00ffffff; +static constexpr int M68K_MMU_ATC_SHIFT = 8; +static constexpr int M68K_MMU_ATC_VALID = 0x08000000; // MMU Translation Control register -#define M68K_MMU_TC_SRE 0x02000000 +static constexpr int M68K_MMU_TC_SRE = 0x02000000; /* decodes the effective address */ -static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) +uint32_t DECODE_EA_32(int ea) { int mode = (ea >> 3) & 0x7; int reg = (ea & 0x7); @@ -55,21 +55,21 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) { case 2: // (An) { - return REG_A(m68k)[reg]; + return REG_A()[reg]; } case 3: // (An)+ { - uint32_t ea = EA_AY_PI_32(m68k); + uint32_t ea = EA_AY_PI_32(); return ea; } case 5: // (d16, An) { - uint32_t ea = EA_AY_DI_32(m68k); + uint32_t ea = EA_AY_DI_32(); return ea; } case 6: // (An) + (Xn) + d8 { - uint32_t ea = EA_AY_IX_32(m68k); + uint32_t ea = EA_AY_IX_32(); return ea; } case 7: @@ -78,26 +78,26 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) { case 0: // (xxx).W { - uint32_t ea = (uint32_t)OPER_I_16(m68k); + uint32_t ea = OPER_I_16(); return ea; } case 1: // (xxx).L { - uint32_t d1 = OPER_I_16(m68k); - uint32_t d2 = OPER_I_16(m68k); + uint32_t d1 = OPER_I_16(); + uint32_t d2 = OPER_I_16(); uint32_t ea = (d1 << 16) | d2; return ea; } case 2: // (d16, PC) { - uint32_t ea = EA_PCDI_32(m68k); + uint32_t ea = EA_PCDI_32(); return ea; } - default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } break; } - default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k)); + default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc); } return 0; } @@ -105,12 +105,12 @@ static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea) /* pmmu_atc_add: adds this address to the ATC */ -void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, int fc) +void pmmu_atc_add(uint32_t logical, uint32_t physical, int fc) { int i, found; // get page size (i.e. # of bits to ignore); is 10 for Apollo - int ps = (m68k->mmu_tc >> 20) & 0xf; + int ps = (m_mmu_tc >> 20) & 0xf; // Note: exact emulation would use (logical >> ps) << (ps-8) uint32_t atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps; @@ -118,7 +118,7 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, for (i = 0; i < MMU_ATC_ENTRIES; i++) { // if tag bits and function code match, don't add - if (m68k->mmu_atc_tag[i] == atc_tag) + if (m_mmu_atc_tag[i] == atc_tag) { return; } @@ -128,7 +128,7 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, found = -1; for (i = 0; i < MMU_ATC_ENTRIES; i++) { - if (!(m68k->mmu_atc_tag[i] & M68K_MMU_ATC_VALID)) + if (!(m_mmu_atc_tag[i] & M68K_MMU_ATC_VALID)) { found = i; break; @@ -138,22 +138,22 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, // did we find an entry? steal one by round-robin then if (found == -1) { - found = m68k->mmu_atc_rr++; + found = m_mmu_atc_rr++; - if (m68k->mmu_atc_rr >= MMU_ATC_ENTRIES) + if (m_mmu_atc_rr >= MMU_ATC_ENTRIES) { - m68k->mmu_atc_rr = 0; + m_mmu_atc_rr = 0; } } // add the entry // printf("ATC[%2d] add: log %08x -> phys %08x (fc=%d)\n", found, (logical>>ps) << ps, (physical >> ps) << ps, fc); - m68k->mmu_atc_tag[found] = atc_tag; - m68k->mmu_atc_data[found] = (physical >> ps) << (ps-8); + m_mmu_atc_tag[found] = atc_tag; + m_mmu_atc_data[found] = (physical >> ps) << (ps-8); - if (m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) + if (m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) { - m68k->mmu_atc_data[found] |= M68K_MMU_ATC_WRITE_PR; + m_mmu_atc_data[found] |= M68K_MMU_ATC_WRITE_PR; } } @@ -162,61 +162,61 @@ void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, 7fff0003 001ffd10 80f05750 is what should load */ -void pmmu_atc_flush(m68000_base_device *m68k) +void pmmu_atc_flush() { int i; - // printf("ATC flush: pc=%08x\n", REG_PPC(m68k)); + // printf("ATC flush: pc=%08x\n", m_ppc); for (i = 0; i < MMU_ATC_ENTRIES; i++) { - m68k->mmu_atc_tag[i] = 0; + m_mmu_atc_tag[i] = 0; } - m68k->mmu_atc_rr = 0; + m_mmu_atc_rr = 0; } -static inline uint32_t get_dt2_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t ptest) +inline uint32_t get_dt2_table_entry(uint32_t tptr, uint8_t ptest) { - uint32_t tbl_entry = m68k->program->read_dword(tptr); + uint32_t tbl_entry = m_program->read_dword(tptr); uint32_t dt = tbl_entry & M68K_MMU_DF_DT; - m68k->mmu_tmp_sr |= tbl_entry & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; + m_mmu_tmp_sr |= tbl_entry & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; if (!ptest && dt != M68K_MMU_DF_DT0) { - if (dt == M68K_MMU_DF_DT1 && !m68k->mmu_tmp_rw && !(m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) + if (dt == M68K_MMU_DF_DT1 && !m_mmu_tmp_rw && !(m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) { // set used and modified - m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); + m_program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); } else if (!(tbl_entry & M68K_MMU_DF_USED)) { - m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED); + m_program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED); } } return tbl_entry; } -static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t fc, uint8_t ptest) +inline uint32_t get_dt3_table_entry(uint32_t tptr, uint8_t fc, uint8_t ptest) { - uint32_t tbl_entry2 = m68k->program->read_dword(tptr); - uint32_t tbl_entry = m68k->program->read_dword(tptr + 4); + uint32_t tbl_entry2 = m_program->read_dword(tptr); + uint32_t tbl_entry = m_program->read_dword(tptr + 4); uint32_t dt = tbl_entry2 & M68K_MMU_DF_DT; - m68k->mmu_tmp_sr |= ((tbl_entry2 & 0x0100) && !(fc & 4)) ? M68K_MMU_SR_SUPERVISOR_ONLY : 0; - m68k->mmu_tmp_sr |= tbl_entry2 & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; + m_mmu_tmp_sr |= ((tbl_entry2 & 0x0100) && !(fc & 4)) ? M68K_MMU_SR_SUPERVISOR_ONLY : 0; + m_mmu_tmp_sr |= tbl_entry2 & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0; if (!ptest && dt != M68K_MMU_DF_DT0) { - if (dt == M68K_MMU_DF_DT1 && !m68k->mmu_tmp_rw && !(m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) + if (dt == M68K_MMU_DF_DT1 && !m_mmu_tmp_rw && !(m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT)) { // set modified - m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); + m_program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); } else if (!(tbl_entry2 & M68K_MMU_DF_USED)) { - m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED); + m_program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED); } } @@ -226,7 +226,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp /* pmmu_translate_addr_with_fc: perform 68851/68030-style PMMU address translation */ -/*static inline*/ static uint32_t pmmu_translate_addr_with_fc(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest) +uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest) { uint32_t addr_out, tbl_entry = 0, tamode = 0, tbmode = 0, tcmode = 0; uint32_t root_aptr, root_limit, tofs, ps, is, abits, bbits, cbits; @@ -240,33 +240,33 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp resolved = 0; addr_out = addr_in; - m68k->mmu_tmp_sr = 0; + m_mmu_tmp_sr = 0; if (fc == 7) { return addr_in; } - if (m68k->mmu_tt0 & 0x8000) + if (m_mmu_tt0 & 0x8000) { // transparent translation register 0 enabled - uint32_t address_base = m68k->mmu_tt0 & 0xff000000; - uint32_t address_mask = ((m68k->mmu_tt0 << 8) & 0xff000000) ^ 0xff000000; - if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt0) == ((m68k->mmu_tt0 >> 4) & 7)) + uint32_t address_base = m_mmu_tt0 & 0xff000000; + uint32_t address_mask = ((m_mmu_tt0 << 8) & 0xff000000) ^ 0xff000000; + if ((addr_in & address_mask) == address_base && (fc & ~m_mmu_tt0) == ((m_mmu_tt0 >> 4) & 7)) { -// printf("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); +// printf("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m_ppc, fc, addr_in, address_mask, address_base); return addr_in; } } - if (m68k->mmu_tt1 & 0x8000) + if (m_mmu_tt1 & 0x8000) { // transparent translation register 1 enabled - uint32_t address_base = m68k->mmu_tt1 & 0xff000000; - uint32_t address_mask = ((m68k->mmu_tt1 << 8) & 0xff000000) ^ 0xff000000; - if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt1) == ((m68k->mmu_tt1 >> 4) & 7)) + uint32_t address_base = m_mmu_tt1 & 0xff000000; + uint32_t address_mask = ((m_mmu_tt1 << 8) & 0xff000000) ^ 0xff000000; + if ((addr_in & address_mask) == address_base && (fc & ~m_mmu_tt1) == ((m_mmu_tt1 >> 4) & 7)) { -// printf("PMMU: pc=%x TT1 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); +// printf("PMMU: pc=%x TT1 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m_ppc, fc, addr_in, address_mask, address_base); return addr_in; } } @@ -277,64 +277,64 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // } // get page size (i.e. # of bits to ignore); ps is 10 or 12 for Apollo, 8 otherwise - ps = (m68k->mmu_tc >> 20) & 0xf; + ps = (m_mmu_tc >> 20) & 0xf; atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24) | addr_in >> ps; // first see if this is already in the ATC for (i = 0; i < MMU_ATC_ENTRIES; i++) { - if (m68k->mmu_atc_tag[i] != atc_tag) + if (m_mmu_atc_tag[i] != atc_tag) { // tag bits and function code don't match } - else if (!m68k->mmu_tmp_rw && (m68k->mmu_atc_data[i] & M68K_MMU_ATC_WRITE_PR)) + else if (!m_mmu_tmp_rw && (m_mmu_atc_data[i] & M68K_MMU_ATC_WRITE_PR)) { // write mode, but write protected } - else if (!m68k->mmu_tmp_rw && !(m68k->mmu_atc_data[i] & M68K_MMU_ATC_MODIFIED)) + else if (!m_mmu_tmp_rw && !(m_mmu_atc_data[i] & M68K_MMU_ATC_MODIFIED)) { // first write; must set modified in PMMU tables as well } else { // read access or write access and not write protected - if (!m68k->mmu_tmp_rw && !ptest) + if (!m_mmu_tmp_rw && !ptest) { // FIXME: must set modified in PMMU tables as well - m68k->mmu_atc_data[i] |= M68K_MMU_ATC_MODIFIED; + m_mmu_atc_data[i] |= M68K_MMU_ATC_MODIFIED; } else { // FIXME: supervisor mode? - m68k->mmu_tmp_sr = M68K_MMU_SR_MODIFIED; + m_mmu_tmp_sr = M68K_MMU_SR_MODIFIED; } - addr_out = (m68k->mmu_atc_data[i] << 8) | (addr_in & ~(~0 << ps)); -// printf("ATC[%2d] hit: log %08x -> phys %08x pc=%08x fc=%d\n", i, addr_in, addr_out, REG_PPC(m68k), fc); + addr_out = (m_mmu_atc_data[i] << 8) | (addr_in & ~(~0 << ps)); +// printf("ATC[%2d] hit: log %08x -> phys %08x pc=%08x fc=%d\n", i, addr_in, addr_out, m_ppc, fc); // pmmu_atc_count++; return addr_out; } } // if SRP is enabled and we're in supervisor mode, use it - if ((m68k->mmu_tc & M68K_MMU_TC_SRE) && (fc & 4)) + if ((m_mmu_tc & M68K_MMU_TC_SRE) && (fc & 4)) { - root_aptr = m68k->mmu_srp_aptr; - root_limit = m68k->mmu_srp_limit; + root_aptr = m_mmu_srp_aptr; + root_limit = m_mmu_srp_limit; } else // else use the CRP { - root_aptr = m68k->mmu_crp_aptr; - root_limit = m68k->mmu_crp_limit; + root_aptr = m_mmu_crp_aptr; + root_limit = m_mmu_crp_limit; } // get initial shift (# of top bits to ignore) - is = (m68k->mmu_tc >> 16) & 0xf; - ps = (m68k->mmu_tc >> 20) & 0xf; - abits = (m68k->mmu_tc >> 12) & 0xf; - bbits = (m68k->mmu_tc >> 8) & 0xf; - cbits = (m68k->mmu_tc >> 4) & 0xf; + is = (m_mmu_tc >> 16) & 0xf; + ps = (m_mmu_tc >> 20) & 0xf; + abits = (m_mmu_tc >> 12) & 0xf; + bbits = (m_mmu_tc >> 8) & 0xf; + cbits = (m_mmu_tc >> 4) & 0xf; - // printf("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); + // printf("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m_mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); // get table A offset tofs = (addr_in<>(32-abits); @@ -344,18 +344,18 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (root_limit & M68K_MMU_DF_DT) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception - m68k->mmu_tmp_sr |= M68K_MMU_SR_INVALID; + m_mmu_tmp_sr |= M68K_MMU_SR_INVALID; return root_aptr; case M68K_MMU_DF_DT1: // page descriptor, will cause direct mapping addr_out = tptr + addr_in; -// printf("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m68k->ppc, M68K_MMU_DF_DT1, addr_in, addr_out); +// printf("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m_ppc, M68K_MMU_DF_DT1, addr_in, addr_out); return addr_out; case M68K_MMU_DF_DT2: // valid 4 byte descriptors tofs *= 4; // if (verbose) printf("PMMU: reading table A entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tamode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs); break; @@ -363,7 +363,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // valid 8 byte descriptors tofs *= 8; // if (verbose) printf("PMMU: reading table A entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tofs + tptr, fc, ptest); + tbl_entry = get_dt3_table_entry(tofs + tptr, fc, ptest); tamode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs); break; @@ -379,7 +379,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tamode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_1); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_1); // last valid pointer (for ptest) addr_out = last_entry_ptr; resolved = 1; @@ -388,7 +388,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT2: // 4-byte table B descriptor tofs *= 4; // if (verbose) printf("PMMU: reading table B entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tbmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); break; @@ -396,7 +396,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // 8-byte table B descriptor tofs *= 8; // if (verbose) printf("PMMU: reading table B entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tptr + tofs, fc, ptest); + tbl_entry = get_dt3_table_entry(tptr + tofs, fc, ptest); tbmode = tbl_entry & M68K_MMU_DF_DT; tbl_entry &= ~M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs); @@ -423,7 +423,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tbmode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_2); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_2); // last valid pointer (for ptest) addr_out = last_entry_ptr; resolved = 1; @@ -432,7 +432,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT2: // 4-byte table C descriptor tofs *= 4; // if (verbose) printf("PMMU: reading table C entry at %08x\n", tofs + tptr); - tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest); + tbl_entry = get_dt2_table_entry(tptr + tofs, ptest); tcmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); break; @@ -440,7 +440,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case M68K_MMU_DF_DT3: // 8-byte table C descriptor tofs *= 8; // if (verbose) printf("PMMU: reading table C entries at %08x\n", tofs + tptr); - tbl_entry = get_dt3_table_entry(m68k, tptr+ tofs, fc, ptest); + tbl_entry = get_dt3_table_entry(tptr+ tofs, fc, ptest); tcmode = tbl_entry & M68K_MMU_DF_DT; // if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tcmode, tofs); break; @@ -460,14 +460,14 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (tcmode) { case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (unless ptest) - m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_3); + m_mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_3); addr_out = tptr + tofs; resolved = 1; break; case M68K_MMU_DF_DT2: // 4-byte (short-form) indirect descriptor case M68K_MMU_DF_DT3: // 8-byte (long-form) indirect descriptor - fatalerror("PMMU: pc=%08x Unhandled Table C mode %d (addr_in %08x)\n", m68k->ppc, tcmode, addr_in); + fatalerror("PMMU: pc=%08x Unhandled Table C mode %d (addr_in %08x)\n", m_ppc, tcmode, addr_in); break; case M68K_MMU_DF_DT1: // termination descriptor @@ -482,38 +482,38 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if (!ptest) { - if (m68k->mmu_tmp_sr & M68K_MMU_SR_INVALID) + if (m_mmu_tmp_sr & M68K_MMU_SR_INVALID) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - else if (m68k->mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) + else if (m_mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - else if ((m68k->mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m68k->mmu_tmp_rw) + else if ((m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m_mmu_tmp_rw) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } - if (!m68k->mmu_tmp_buserror_occurred) + if (!m_mmu_tmp_buserror_occurred) { // we add only valid entries - pmmu_atc_add(m68k, addr_in, addr_out, fc); + pmmu_atc_add(addr_in, addr_out, fc); } } @@ -525,25 +525,25 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // FC bits: 2 = supervisor, 1 = program, 0 = data // the 68040 is a subset of the 68851 and 68030 PMMUs - the page table sizes are fixed, there is no early termination, etc, etc. -/*static inline*/ static uint32_t pmmu_translate_addr_with_fc_040(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest) +uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t ptest) { uint32_t addr_out, tt0, tt1; addr_out = addr_in; - m68k->mmu_tmp_sr = 0; + m_mmu_tmp_sr = 0; // transparent translation registers are always in force even if the PMMU itself is disabled // they don't do much in emulation because we never write out of order, but the write-protect and cache control features // are emulatable, and apparently transparent translation regions skip the page table lookup. if (fc & 1) // data, use DTT0/DTT1 { - tt0 = m68k->mmu_dtt0; - tt1 = m68k->mmu_dtt1; + tt0 = m_mmu_dtt0; + tt1 = m_mmu_dtt1; } else if (fc & 2) // program, use ITT0/ITT1 { - tt0 = m68k->mmu_itt0; - tt1 = m68k->mmu_itt1; + tt0 = m_mmu_itt0; + tt1 = m_mmu_itt1; } else { @@ -561,13 +561,13 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((addr_in & mask) == (tt0 & mask) && (fc & fcmask[(tt0 >> 13) & 3]) == fcmatch[(tt0 >> 13) & 3]) { // fprintf(stderr, "TT0 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt0, mask); - if ((tt0 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect? + if ((tt0 & 4) && !m_mmu_tmp_rw && !ptest) // write protect? { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -586,13 +586,13 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((addr_in & mask) == (tt1 & mask) && (fc & fcmask[(tt1 >> 13) & 3]) == fcmatch[(tt1 >> 13) & 3]) { // fprintf(stderr, "TT1 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt1, mask); - if ((tt1 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect? + if ((tt1 & 4) && !m_mmu_tmp_rw && !ptest) // write protect? { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -600,7 +600,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } } - if (m68k->pmmu_enabled) + if (m_pmmu_enabled) { uint32_t root_idx = (addr_in>>25) & 0x7f; uint32_t ptr_idx = (addr_in>>18) & 0x7f; @@ -611,15 +611,15 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // select supervisor or user root pointer if (fc & 4) { - root_ptr = m68k->mmu_srp_aptr + (root_idx<<2); + root_ptr = m_mmu_srp_aptr + (root_idx<<2); } else { - root_ptr = m68k->mmu_urp_aptr + (root_idx<<2); + root_ptr = m_mmu_urp_aptr + (root_idx<<2); } // get the root entry - root_entry = m68k->program->read_dword(root_ptr); + root_entry = m_program->read_dword(root_ptr); // is UDT marked valid? if (root_entry & 2) @@ -628,41 +628,41 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp if ((!(root_entry & 0x8)) && (!ptest)) { root_entry |= 0x8; - m68k->program->write_dword(root_ptr, root_entry); + m_program->write_dword(root_ptr, root_entry); } // PTEST: any write protect bits set in the search tree will set W in SR if ((ptest) && (root_entry & 4)) { - m68k->mmu_tmp_sr |= 4; + m_mmu_tmp_sr |= 4; } pointer_ptr = (root_entry & ~0x1ff) + (ptr_idx<<2); - pointer_entry = m68k->program->read_dword(pointer_ptr); + pointer_entry = m_program->read_dword(pointer_ptr); // PTEST: any write protect bits set in the search tree will set W in SR if ((ptest) && (pointer_entry & 4)) { - m68k->mmu_tmp_sr |= 4; + m_mmu_tmp_sr |= 4; } // update U bit on this pointer entry too if ((!(pointer_entry & 0x8)) && (!ptest)) { pointer_entry |= 0x8; - m68k->program->write_dword(pointer_ptr, pointer_entry); + m_program->write_dword(pointer_ptr, pointer_entry); } // logerror("pointer entry = %08x\n", pointer_entry); // write protected by the root or pointer entries? - if ((((root_entry & 4) && !m68k->mmu_tmp_rw) || ((pointer_entry & 4) && !m68k->mmu_tmp_rw)) && !ptest) + if ((((root_entry & 4) && !m_mmu_tmp_rw) || ((pointer_entry & 4) && !m_mmu_tmp_rw)) && !ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -671,12 +671,12 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp // is UDT valid on the pointer entry? if (!(pointer_entry & 2) && !ptest) { -// fprintf(stderr, "Invalid pointer entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); - if (++m68k->mmu_tmp_buserror_occurred == 1) +// fprintf(stderr, "Invalid pointer entry! PC=%x, addr=%x\n", m_ppc, addr_in); + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -686,15 +686,15 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } else // throw an error { -// fprintf(stderr, "Invalid root entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); +// fprintf(stderr, "Invalid root entry! PC=%x, addr=%x\n", m_ppc, addr_in); if (!ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -702,7 +702,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } // now do the page lookup - if (m68k->mmu_tc & 0x4000) // 8k pages? + if (m_mmu_tc & 0x4000) // 8k pages? { page_idx = (addr_in >> 13) & 0x1f; page = addr_in & 0x1fff; @@ -718,27 +718,27 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp } page_ptr = pointer_entry + (page_idx<<2); - page_entry = m68k->program->read_dword(page_ptr); - m68k->mmu_last_page_entry_addr = page_ptr; + page_entry = m_program->read_dword(page_ptr); + m_mmu_last_page_entry_addr = page_ptr; // logerror("page_entry = %08x\n", page_entry); // resolve indirect page pointers while ((page_entry & 3) == 2) { - page_entry = m68k->program->read_dword(page_entry & ~0x3); - m68k->mmu_last_page_entry_addr = (page_entry & ~0x3); + page_entry = m_program->read_dword(page_entry & ~0x3); + m_mmu_last_page_entry_addr = (page_entry & ~0x3); } - m68k->mmu_last_page_entry = page_entry; + m_mmu_last_page_entry = page_entry; // is the page write protected or supervisor protected? - if ((((page_entry & 4) && !m68k->mmu_tmp_rw) || ((page_entry & 0x80) && !(fc&4))) && !ptest) + if ((((page_entry & 4) && !m_mmu_tmp_rw) || ((page_entry & 0x80) && !(fc&4))) && !ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } return addr_in; @@ -747,14 +747,14 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp switch (page_entry & 3) { case 0: // invalid -// fprintf(stderr, "Invalid page entry! PC=%x, addr=%x\n", m68k->ppc, addr_in); +// fprintf(stderr, "Invalid page entry! PC=%x, addr=%x\n", m_ppc, addr_in); if (!ptest) { - if (++m68k->mmu_tmp_buserror_occurred == 1) + if (++m_mmu_tmp_buserror_occurred == 1) { - m68k->mmu_tmp_buserror_address = addr_in; - m68k->mmu_tmp_buserror_rw = m68k->mmu_tmp_rw; - m68k->mmu_tmp_buserror_fc = m68k->mmu_tmp_fc; + m_mmu_tmp_buserror_address = addr_in; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; } } @@ -762,7 +762,7 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp case 1: case 3: // normal - if (m68k->mmu_tc & 0x4000) // 8k pages? + if (m_mmu_tc & 0x4000) // 8k pages? { addr_out = (page_entry & ~0x1fff) | page; } @@ -776,23 +776,23 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp page_entry |= 0x8; // always set the U bit // if we're writing, the M bit comes into play - if (!m68k->mmu_tmp_rw) + if (!m_mmu_tmp_rw) { page_entry |= 0x10; // set Modified } // if these updates resulted in a change, write the entry back where we found it - if (page_entry != m68k->mmu_last_page_entry) + if (page_entry != m_mmu_last_page_entry) { - m68k->mmu_last_page_entry = page_entry; - m68k->program->write_dword(m68k->mmu_last_page_entry_addr, m68k->mmu_last_page_entry); + m_mmu_last_page_entry = page_entry; + m_program->write_dword(m_mmu_last_page_entry_addr, m_mmu_last_page_entry); } } else { // page entry: UR G U1 U0 S CM CM M U W PDT // SR: B G U1 U0 S CM CM M 0 W T R - m68k->mmu_tmp_sr |= ((addr_out & ~0xfff) || (page_entry & 0x7f4)); + m_mmu_tmp_sr |= ((addr_out & ~0xfff) || (page_entry & 0x7f4)); } break; @@ -809,23 +809,23 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp /* pmmu_translate_addr: perform 68851/68030-style PMMU address translation */ -/*static inline*/ static uint32_t pmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in) +uint32_t pmmu_translate_addr(uint32_t addr_in) { uint32_t addr_out; - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - addr_out = pmmu_translate_addr_with_fc_040(m68k, addr_in, m68k->mmu_tmp_fc, 0); + addr_out = pmmu_translate_addr_with_fc_040(addr_in, m_mmu_tmp_fc, 0); } else { - addr_out = pmmu_translate_addr_with_fc(m68k, addr_in, m68k->mmu_tmp_fc, 0); + addr_out = pmmu_translate_addr_with_fc(addr_in, m_mmu_tmp_fc, 0); } -// if (m68k->mmu_tmp_buserror_occurred > 0) { +// if (m_mmu_tmp_buserror_occurred > 0) { // printf("PMMU: pc=%08x sp=%08x va=%08x pa=%08x - invalid Table mode for level=%d (buserror %d)\n", -// REG_PPC(m68k), REG_A(m68k)[7], addr_in, addr_out, m68k->mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, -// m68k->mmu_tmp_buserror_occurred); +// m_ppc, REG_A()[7], addr_in, addr_out, m_mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, +// m_mmu_tmp_buserror_occurred); // } return addr_out; @@ -835,67 +835,67 @@ static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tp m68851_mmu_ops: COP 0 MMU opcode handling */ -void m68881_mmu_ops(m68000_base_device *m68k) +void m68881_mmu_ops() { uint16_t modes; - uint32_t ea = m68k->ir & 0x3f; + uint32_t ea = m_ir & 0x3f; uint64_t temp64; // catch the 2 "weird" encodings up front (PBcc) - if ((m68k->ir & 0xffc0) == 0xf0c0) + if ((m_ir & 0xffc0) == 0xf0c0) { printf("680x0: unhandled PBcc\n"); return; } - else if ((m68k->ir & 0xffc0) == 0xf080) + else if ((m_ir & 0xffc0) == 0xf080) { printf("680x0: unhandled PBcc\n"); return; } - else if ((m68k->ir & 0xffe0) == 0xf500) + else if ((m_ir & 0xffe0) == 0xf500) { -// logerror("68040 pflush: pc=%08x ir=%04x opmode=%d register=%d\n", REG_PPC(m68k), m68k->ir, (m68k->ir >> 3) & 3, m68k->ir & 7); - pmmu_atc_flush(m68k); +// logerror("68040 pflush: pc=%08x ir=%04x opmode=%d register=%d\n", m_ppc, m_ir, (m_ir >> 3) & 3, m_ir & 7); + pmmu_atc_flush(); } else // the rest are 1111000xxxXXXXXX where xxx is the instruction family { - switch ((m68k->ir>>9) & 0x7) + switch ((m_ir>>9) & 0x7) { case 0: - modes = OPER_I_16(m68k); + modes = OPER_I_16(); if ((modes & 0xfde0) == 0x2000) // PLOAD { - uint32_t ltmp = DECODE_EA_32(m68k, ea); + uint32_t ltmp = DECODE_EA_32(ea); uint32_t ptmp; ptmp = ltmp; - if (m68k->pmmu_enabled) + if (m_pmmu_enabled) { - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - ptmp = pmmu_translate_addr_with_fc_040(m68k, ltmp, modes & 0x07, 0); + ptmp = pmmu_translate_addr_with_fc_040(ltmp, modes & 0x07, 0); } else { - ptmp = pmmu_translate_addr_with_fc(m68k, ltmp, modes & 0x07, 0); + ptmp = pmmu_translate_addr_with_fc(ltmp, modes & 0x07, 0); } } // printf("680x0: PLOADing ATC with logical %08x => phys %08x\n", ltmp, ptmp); // FIXME: rw bit? - pmmu_atc_add(m68k, ltmp, ptmp, modes & 0x07); + pmmu_atc_add(ltmp, ptmp, modes & 0x07); return; } else if ((modes & 0xe200) == 0x2000) // PFLUSH { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); return; } else if (modes == 0xa000) // PFLUSHR { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); return; } else if (modes == 0x2800) // PVALID (FORMAT 1) @@ -910,38 +910,38 @@ void m68881_mmu_ops(m68000_base_device *m68k) } else if ((modes & 0xe000) == 0x8000) // PTEST { - uint32_t v_addr = DECODE_EA_32(m68k, ea); + uint32_t v_addr = DECODE_EA_32(ea); uint32_t p_addr; uint32_t fc = modes & 0x1f; switch (fc >> 3) { case 0: - fc = fc == 0 ? m68k->sfc : m68k->dfc; + fc = fc == 0 ? m_sfc : m_dfc; break; case 1: - fc = REG_D(m68k)[fc &7] &7; + fc = REG_D()[fc &7] &7; break; case 2: fc &=7; break; } - if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type)) + if (CPU_TYPE_IS_040_PLUS()) { - p_addr = pmmu_translate_addr_with_fc_040(m68k, v_addr, fc, 1); + p_addr = pmmu_translate_addr_with_fc_040(v_addr, fc, 1); } else { - p_addr = pmmu_translate_addr_with_fc(m68k, v_addr, fc, 1); + p_addr = pmmu_translate_addr_with_fc(v_addr, fc, 1); } - m68k->mmu_sr = m68k->mmu_tmp_sr; + m_mmu_sr = m_mmu_tmp_sr; // printf("PMMU: pc=%08x sp=%08x va=%08x pa=%08x PTEST fc=%x level=%x mmu_sr=%04x\n", -// m68k->ppc, REG_A(m68k)[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m68k->mmu_sr); +// m_ppc, REG_A()[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m_mmu_sr); if (modes & 0x100) { int areg = (modes >> 5) & 7; - WRITE_EA_32(m68k, 0x08 | areg, p_addr); + WRITE_EA_32(0x08 | areg, p_addr); } return; } @@ -956,30 +956,30 @@ void m68881_mmu_ops(m68000_base_device *m68k) switch ((modes>>10) & 0x3f) { case 0x02: // transparent translation register 0 - WRITE_EA_32(m68k, ea, m68k->mmu_tt0); -// printf("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m68k->ppc, m68k->mmu_tt0); + WRITE_EA_32(ea, m_mmu_tt0); +// printf("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m_ppc, m_mmu_tt0); break; case 0x03: // transparent translation register 1 - WRITE_EA_32(m68k, ea, m68k->mmu_tt1); -// printf("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m68k->ppc, m68k->mmu_tt1); + WRITE_EA_32(ea, m_mmu_tt1); +// printf("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m_ppc, m_mmu_tt1); break; case 0x10: // translation control register - WRITE_EA_32(m68k, ea, m68k->mmu_tc); -// printf("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m68k->ppc, m68k->mmu_tc); + WRITE_EA_32(ea, m_mmu_tc); +// printf("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m_ppc, m_mmu_tc); break; case 0x12: // supervisor root pointer - WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_srp_limit<<32 | (uint64_t)m68k->mmu_srp_aptr); -// printf("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_srp_limit, m68k->mmu_srp_aptr); + WRITE_EA_64(ea, (uint64_t)m_mmu_srp_limit<<32 | (uint64_t)m_mmu_srp_aptr); +// printf("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_srp_limit, m_mmu_srp_aptr); break; case 0x13: // CPU root pointer - WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_crp_limit<<32 | (uint64_t)m68k->mmu_crp_aptr); -// printf("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_crp_limit, m68k->mmu_crp_aptr); + WRITE_EA_64(ea, (uint64_t)m_mmu_crp_limit<<32 | (uint64_t)m_mmu_crp_aptr); +// printf("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_crp_limit, m_mmu_crp_aptr); break; default: - printf("680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, m68k->pc); + printf("680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, m_pc); break; } @@ -990,93 +990,93 @@ void m68881_mmu_ops(m68000_base_device *m68k) { case 0: { - uint32_t temp = READ_EA_32(m68k, ea); + uint32_t temp = READ_EA_32(ea); if (((modes>>10) & 7) == 2) { - m68k->mmu_tt0 = temp; + m_mmu_tt0 = temp; } else if (((modes>>10) & 7) == 3) { - m68k->mmu_tt1 = temp; + m_mmu_tt1 = temp; } } break; case 1: - printf("680x0: unknown PMOVE case 1, PC %x\n", m68k->pc); + printf("680x0: unknown PMOVE case 1, PC %x\n", m_pc); break; case 2: switch ((modes>>10) & 7) { case 0: // translation control register - m68k->mmu_tc = READ_EA_32(m68k, ea); -// printf("PMMU: TC = %08x\n", m68k->mmu_tc); + m_mmu_tc = READ_EA_32(ea); +// printf("PMMU: TC = %08x\n", m_mmu_tc); - if (m68k->mmu_tc & 0x80000000) + if (m_mmu_tc & 0x80000000) { - m68k->pmmu_enabled = 1; + m_pmmu_enabled = 1; // printf("PMMU enabled\n"); } else { - m68k->pmmu_enabled = 0; + m_pmmu_enabled = 0; // printf("PMMU disabled\n"); } if (!(modes & 0x100)) // flush ATC on moves to TC, SRP, CRP with FD bit clear { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 2: // supervisor root pointer - temp64 = READ_EA_64(m68k, ea); - m68k->mmu_srp_limit = (temp64>>32) & 0xffffffff; - m68k->mmu_srp_aptr = temp64 & 0xffffffff; -// printf("PMMU: SRP limit = %08x aptr = %08x\n", m68k->mmu_srp_limit, m68k->mmu_srp_aptr); + temp64 = READ_EA_64(ea); + m_mmu_srp_limit = (temp64>>32) & 0xffffffff; + m_mmu_srp_aptr = temp64 & 0xffffffff; +// printf("PMMU: SRP limit = %08x aptr = %08x\n", m_mmu_srp_limit, m_mmu_srp_aptr); if (!(modes & 0x100)) { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 3: // CPU root pointer - temp64 = READ_EA_64(m68k, ea); - m68k->mmu_crp_limit = (temp64>>32) & 0xffffffff; - m68k->mmu_crp_aptr = temp64 & 0xffffffff; -// printf("PMMU: CRP limit = %08x aptr = %08x\n", m68k->mmu_crp_limit, m68k->mmu_crp_aptr); + temp64 = READ_EA_64(ea); + m_mmu_crp_limit = (temp64>>32) & 0xffffffff; + m_mmu_crp_aptr = temp64 & 0xffffffff; +// printf("PMMU: CRP limit = %08x aptr = %08x\n", m_mmu_crp_limit, m_mmu_crp_aptr); if (!(modes & 0x100)) { - pmmu_atc_flush(m68k); + pmmu_atc_flush(); } break; case 7: // MC68851 Access Control Register - if (m68k->cpu_type == CPU_TYPE_020) + if (m_cpu_type == CPU_TYPE_020) { // DomainOS on Apollo DN3000 will only reset this to 0 - uint16_t mmu_ac = READ_EA_16(m68k, ea); + uint16_t mmu_ac = READ_EA_16(ea); if (mmu_ac != 0) { printf("680x0 PMMU: pc=%x PMOVE to mmu_ac=%08x\n", - m68k->ppc, mmu_ac); + m_ppc, mmu_ac); } break; } // fall through; unknown PMOVE mode unless MC68020 with MC68851 default: - printf("680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, m68k->pc); + printf("680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, m_pc); break; } break; case 3: // MMU status { - uint32_t temp = READ_EA_32(m68k, ea); - printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m68k->pc); + uint32_t temp = READ_EA_32(ea); + printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m_pc); } break; } @@ -1086,16 +1086,16 @@ void m68881_mmu_ops(m68000_base_device *m68k) case 3: // MC68030 to/from status reg if (modes & 0x200) { - WRITE_EA_16(m68k, ea, m68k->mmu_sr); + WRITE_EA_16(ea, m_mmu_sr); } else { - m68k->mmu_sr = READ_EA_16(m68k, ea); + m_mmu_sr = READ_EA_16(ea); } break; default: - printf("680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, m68k->pc); + printf("680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, m_pc); break; } @@ -1103,7 +1103,7 @@ void m68881_mmu_ops(m68000_base_device *m68k) break; default: - printf("680x0: unknown PMMU instruction group %d\n", (m68k->ir>>9) & 0x7); + printf("680x0: unknown PMMU instruction group %d\n", (m_ir>>9) & 0x7); break; } } @@ -1111,18 +1111,18 @@ void m68881_mmu_ops(m68000_base_device *m68k) /* Apple HMMU translation is much simpler */ -static inline uint32_t hmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in) +inline uint32_t hmmu_translate_addr(uint32_t addr_in) { uint32_t addr_out; addr_out = addr_in; // check if LC 24-bit mode is enabled - this simply blanks out A31, the V8 ignores A30-24 always - if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_LC) + if (m_hmmu_enabled == M68K_HMMU_ENABLE_LC) { addr_out = addr_in & 0xffffff; } - else if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation + else if (m_hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation { addr_out = addr_in & 0xffffff; diff --git a/src/devices/machine/68307.cpp b/src/devices/machine/68307.cpp index adc65ce199b..e3ce8bc549d 100644 --- a/src/devices/machine/68307.cpp +++ b/src/devices/machine/68307.cpp @@ -23,17 +23,13 @@ DEFINE_DEVICE_TYPE(M68307, m68307_cpu_device, "mc68307", "MC68307") */ READ8_MEMBER( m68307_cpu_device::m68307_internal_serial_r ) { - m68307_cpu_device *m68k = this; - - if (offset&1) return m_duart->read(*m68k->program, offset>>1); + if (offset&1) return m_duart->read(*m_program, offset>>1); return 0x0000; } WRITE8_MEMBER(m68307_cpu_device::m68307_internal_serial_w) { - m68307_cpu_device *m68k = this; - - if (offset & 1) m_duart->write(*m68k->program, offset >> 1, data); + if (offset & 1) m_duart->write(*m_program, offset >> 1, data); } @@ -55,20 +51,20 @@ MACHINE_CONFIG_END m68307_cpu_device::m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m68000_device(mconfig, tag, owner, clock, M68307, 16, 24, ADDRESS_MAP_NAME(m68307_internal_map)), - write_irq(*this), - write_a_tx(*this), - write_b_tx(*this), - read_inport(*this), - write_outport(*this), + m_write_irq(*this), + m_write_a_tx(*this), + m_write_b_tx(*this), + m_read_inport(*this), + m_write_outport(*this), m_duart(*this, "internal68681") { - m68307SIM = nullptr; - m68307MBUS = nullptr; - m68307TIMER = nullptr; - m68307_base = 0; - m68307_scrhigh = 0; - m68307_scrlow = 0; - m68307_currentcs = 0; + m_m68307SIM = nullptr; + m_m68307MBUS = nullptr; + m_m68307TIMER = nullptr; + m_m68307_base = 0; + m_m68307_scrhigh = 0; + m_m68307_scrlow = 0; + m_m68307_currentcs = 0; } @@ -80,13 +76,13 @@ void m68307_cpu_device::device_reset() { m68000_device::device_reset(); - if (m68307SIM) m68307SIM->reset(); - if (m68307MBUS) m68307MBUS->reset(); - if (m68307TIMER) m68307TIMER->reset(); + if (m_m68307SIM) m_m68307SIM->reset(); + if (m_m68307MBUS) m_m68307MBUS->reset(); + if (m_m68307TIMER) m_m68307TIMER->reset(); - m68307_base = 0xbfff; - m68307_scrhigh = 0x0007; - m68307_scrlow = 0xf010; + m_m68307_base = 0xbfff; + m_m68307_scrhigh = 0x0007; + m_m68307_scrlow = 0xf010; } @@ -97,7 +93,7 @@ void m68307_cpu_device::device_reset() inline int m68307_cpu_device::calc_cs(offs_t address) const { - m68307_sim const &sim = *m68307SIM; + m68307_sim const &sim = *m_m68307SIM; for (int i=0; i < 4; i++) { int const br = sim.m_br[i] & 1; @@ -112,43 +108,43 @@ inline int m68307_cpu_device::calc_cs(offs_t address) const uint16_t m68307_cpu_device::simple_read_immediate_16_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_direct->read_word(address); } uint8_t m68307_cpu_device::read_byte_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_byte(address); } uint16_t m68307_cpu_device::read_word_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_word(address); } uint32_t m68307_cpu_device::read_dword_m68307(offs_t address) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); return m_space->read_dword(address); } void m68307_cpu_device::write_byte_m68307(offs_t address, uint8_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_byte(address, data); } void m68307_cpu_device::write_word_m68307(offs_t address, uint16_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_word(address, data); } void m68307_cpu_device::write_dword_m68307(offs_t address, uint32_t data) { -// m68307_currentcs = calc_cs(address); +// m_m68307_currentcs = calc_cs(address); m_space->write_dword(address, data); } @@ -159,15 +155,15 @@ void m68307_cpu_device::init16_m68307(address_space &space) { m_space = &space; m_direct = space.direct<0>(); - opcode_xor = 0; - - readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); - read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); - read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); - read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); - write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); - write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); - write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); + m_opcode_xor = 0; + + m_readimm16 = m68k_readimm16_delegate(&m68307_cpu_device::simple_read_immediate_16_m68307, this); + m_read8 = m68k_read8_delegate(&m68307_cpu_device::read_byte_m68307, this); + m_read16 = m68k_read16_delegate(&m68307_cpu_device::read_word_m68307, this); + m_read32 = m68k_read32_delegate(&m68307_cpu_device::read_dword_m68307, this); + m_write8 = m68k_write8_delegate(&m68307_cpu_device::write_byte_m68307, this); + m_write16 = m68k_write16_delegate(&m68307_cpu_device::write_word_m68307, this); + m_write32 = m68k_write32_delegate(&m68307_cpu_device::write_dword_m68307, this); } @@ -190,9 +186,9 @@ void m68307_cpu_device::set_port_callbacks( uint16_t m68307_cpu_device::get_cs(offs_t address) { - m68307_currentcs = calc_cs(address); + m_m68307_currentcs = calc_cs(address); - return m68307_currentcs; + return m_m68307_currentcs; } @@ -205,22 +201,22 @@ void m68307_cpu_device::set_interrupt(int level, int vector) void m68307_cpu_device::timer0_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x7000)>>12; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xa; + int prioritylevel = (m_m68307SIM->m_picr & 0x7000)>>12; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xa; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::timer1_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x0700)>>8; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xb; + int prioritylevel = (m_m68307SIM->m_picr & 0x0700)>>8; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xb; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::serial_interrupt(int vector) { - int prioritylevel = (m68307SIM->m_picr & 0x0070)>>4; + int prioritylevel = (m_m68307SIM->m_picr & 0x0070)>>4; set_interrupt(prioritylevel, vector); } @@ -234,16 +230,16 @@ WRITE_LINE_MEMBER(m68307_cpu_device::m68307_duart_irq_handler) void m68307_cpu_device::mbus_interrupt() { - int prioritylevel = (m68307SIM->m_picr & 0x0007)>>0; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0xd; + int prioritylevel = (m_m68307SIM->m_picr & 0x0007)>>0; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0xd; set_interrupt(prioritylevel, vector); } void m68307_cpu_device::licr2_interrupt() { - int prioritylevel = (m68307SIM->m_licr2 & 0x0007)>>0; - int vector = (m68307SIM->m_pivr & 0x00f0) | 0x9; - m68307SIM->m_licr2 |= 0x8; + int prioritylevel = (m_m68307SIM->m_licr2 & 0x0007)>>0; + int vector = (m_m68307SIM->m_pivr & 0x00f0) | 0x9; + m_m68307SIM->m_licr2 |= 0x8; set_interrupt(prioritylevel, vector); @@ -257,28 +253,28 @@ void m68307_cpu_device::device_start() set via remappable register */ - init16_m68307(*program); + init16_m68307(*m_program); - m68307SIM = new m68307_sim(); - m68307MBUS = new m68307_mbus(); - m68307TIMER = new m68307_timer(); + m_m68307SIM = new m68307_sim(); + m_m68307MBUS = new m68307_mbus(); + m_m68307TIMER = new m68307_timer(); - m68307TIMER->init(this); + m_m68307TIMER->init(this); - m68307SIM->reset(); - m68307MBUS->reset(); - m68307TIMER->reset(); + m_m68307SIM->reset(); + m_m68307MBUS->reset(); + m_m68307TIMER->reset(); - internal = &this->space(AS_PROGRAM); - m68307_base = 0xbfff; - m68307_scrhigh = 0x0007; - m68307_scrlow = 0xf010; + m_internal = &space(AS_PROGRAM); + m_m68307_base = 0xbfff; + m_m68307_scrhigh = 0x0007; + m_m68307_scrlow = 0xf010; - write_irq.resolve_safe(); - write_a_tx.resolve_safe(); - write_b_tx.resolve_safe(); - read_inport.resolve(); - write_outport.resolve_safe(); + m_write_irq.resolve_safe(); + m_write_a_tx.resolve_safe(); + m_write_b_tx.resolve_safe(); + m_read_inport.resolve(); + m_write_outport.resolve_safe(); set_port_callbacks(porta_read_delegate(), porta_write_delegate(), portb_read_delegate(), portb_write_delegate()); } @@ -287,16 +283,14 @@ void m68307_cpu_device::device_start() READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) { - m68307_cpu_device *m68k = this; - int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask); switch (offset<<1) { - case 0x2: return m68k->m68307_base; - case 0x4: return m68k->m68307_scrhigh; - case 0x6: return m68k->m68307_scrlow; + case 0x2: return m_m68307_base; + case 0x4: return m_m68307_scrhigh; + case 0x6: return m_m68307_scrlow; } logerror("(read was illegal?)\n"); @@ -306,8 +300,6 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_base_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { - m68307_cpu_device *m68k = this; - int pc = space.device().safe_pc(); logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask); int base; @@ -317,35 +309,35 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_base_w ) { case 0x2: /* remove old internal handler */ - base = (m68k->m68307_base & 0x0fff) << 12; - //mask = (m68k->m68307_base & 0xe000) >> 13; - //if ( m68k->m68307_base & 0x1000 ) mask |= 7; - m68k->internal->unmap_readwrite(base+0x000, base+0x04f); - m68k->internal->unmap_readwrite(base+0x100, base+0x11f); - m68k->internal->unmap_readwrite(base+0x120, base+0x13f); - m68k->internal->unmap_readwrite(base+0x140, base+0x149); + base = (m_m68307_base & 0x0fff) << 12; + //mask = (m_m68307_base & 0xe000) >> 13; + //if ( m_m68307_base & 0x1000 ) mask |= 7; + m_internal->unmap_readwrite(base+0x000, base+0x04f); + m_internal->unmap_readwrite(base+0x100, base+0x11f); + m_internal->unmap_readwrite(base+0x120, base+0x13f); + m_internal->unmap_readwrite(base+0x140, base+0x149); /* store new base address */ - COMBINE_DATA(&m68k->m68307_base); + COMBINE_DATA(&m_m68307_base); /* install new internal handler */ - base = (m68k->m68307_base & 0x0fff) << 12; - //mask = (m68k->m68307_base & 0xe000) >> 13; - //if ( m68k->m68307_base & 0x1000 ) mask |= 7; - m68k->internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); - m68k->internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); - m68k->internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); - m68k->internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); + base = (m_m68307_base & 0x0fff) << 12; + //mask = (m_m68307_base & 0xe000) >> 13; + //if ( m_m68307_base & 0x1000 ) mask |= 7; + m_internal->install_readwrite_handler(base + 0x000, base + 0x04f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_sim_w),this)); + m_internal->install_readwrite_handler(base + 0x100, base + 0x11f, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_serial_w),this), 0xffff); + m_internal->install_readwrite_handler(base + 0x120, base + 0x13f, read16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_r),this), write16_delegate(FUNC(m68307_cpu_device::m68307_internal_timer_w),this)); + m_internal->install_readwrite_handler(base + 0x140, base + 0x149, read8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_r),this), write8_delegate(FUNC(m68307_cpu_device::m68307_internal_mbus_w),this), 0xffff); break; case 0x4: - COMBINE_DATA(&m68k->m68307_scrhigh); + COMBINE_DATA(&m_m68307_scrhigh); break; case 0x6: - COMBINE_DATA(&m68k->m68307_scrlow); + COMBINE_DATA(&m_m68307_scrlow); break; default: diff --git a/src/devices/machine/68307.h b/src/devices/machine/68307.h index a64c9985ce9..4c4d9b90cb3 100644 --- a/src/devices/machine/68307.h +++ b/src/devices/machine/68307.h @@ -36,11 +36,11 @@ public: m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); /* trampolines so we can specify the 68681 serial configuration when adding the CPU */ - template static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast(device).write_irq.set_callback(std::forward(cb)); } - template static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast(device).write_a_tx.set_callback(std::forward(cb)); } - template static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast(device).write_b_tx.set_callback(std::forward(cb)); } - template static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast(device).read_inport.set_callback(std::forward(cb)); } - template static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast(device).write_outport.set_callback(std::forward(cb)); } + template static devcb_base &set_irq_cb(device_t &device, Object &&cb) { return downcast(device).m_write_irq.set_callback(std::forward(cb)); } + template static devcb_base &set_a_tx_cb(device_t &device, Object &&cb) { return downcast(device).m_write_a_tx.set_callback(std::forward(cb)); } + template static devcb_base &set_b_tx_cb(device_t &device, Object &&cb) { return downcast(device).m_write_b_tx.set_callback(std::forward(cb)); } + template static devcb_base &set_inport_cb(device_t &device, Object &&cb) { return downcast(device).m_read_inport.set_callback(std::forward(cb)); } + template static devcb_base &set_outport_cb(device_t &device, Object &&cb) { return downcast(device).m_write_outport.set_callback(std::forward(cb)); } uint16_t simple_read_immediate_16_m68307(offs_t address); @@ -87,30 +87,30 @@ protected: void mbus_interrupt(); DECLARE_WRITE_LINE_MEMBER(m68307_duart_irq_handler); - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { write_a_tx(state); } - DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { write_b_tx(state); } - DECLARE_READ8_MEMBER(m68307_duart_input_r) { return read_inport(); } - DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { write_outport(data); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa) { m_write_a_tx(state); } + DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb) { m_write_b_tx(state); } + DECLARE_READ8_MEMBER(m68307_duart_input_r) { return m_read_inport(); } + DECLARE_WRITE8_MEMBER(m68307_duart_output_w) { m_write_outport(data); } void init16_m68307(address_space &space); int calc_cs(offs_t address) const; - devcb_write_line write_irq, write_a_tx, write_b_tx; - devcb_read8 read_inport; - devcb_write8 write_outport; + devcb_write_line m_write_irq, m_write_a_tx, m_write_b_tx; + devcb_read8 m_read_inport; + devcb_write8 m_write_outport; /* 68307 peripheral modules */ - m68307_sim* m68307SIM; - m68307_mbus* m68307MBUS; -// m68307_serial* m68307SERIAL; - m68307_timer* m68307TIMER; + m68307_sim* m_m68307SIM; + m68307_mbus* m_m68307MBUS; +// m68307_serial* m_m68307SERIAL; + m68307_timer* m_m68307TIMER; - uint16_t m68307_base; - uint16_t m68307_scrhigh; - uint16_t m68307_scrlow; + uint16_t m_m68307_base; + uint16_t m_m68307_scrhigh; + uint16_t m_m68307_scrlow; - int m68307_currentcs; + int m_m68307_currentcs; porta_read_delegate m_porta_r; porta_write_delegate m_porta_w; diff --git a/src/devices/machine/68307bus.cpp b/src/devices/machine/68307bus.cpp index 3eea5a0811d..84e165ef919 100644 --- a/src/devices/machine/68307bus.cpp +++ b/src/devices/machine/68307bus.cpp @@ -15,8 +15,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) { - assert(m68307MBUS); - m68307_mbus &mbus = *m68307MBUS; + assert(m_m68307MBUS); + m68307_mbus &mbus = *m_m68307MBUS; uint8_t retval; int pc = space.device().safe_pc(); @@ -59,8 +59,8 @@ READ8_MEMBER( m68307_cpu_device::m68307_internal_mbus_r ) WRITE8_MEMBER( m68307_cpu_device::m68307_internal_mbus_w ) { - assert(m68307MBUS); - m68307_mbus &mbus = *m68307MBUS; + assert(m_m68307MBUS); + m68307_mbus &mbus = *m_m68307MBUS; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307sim.cpp b/src/devices/machine/68307sim.cpp index 2913d64e0a5..d38b20ba391 100644 --- a/src/devices/machine/68307sim.cpp +++ b/src/devices/machine/68307sim.cpp @@ -32,8 +32,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) { - assert(m68307SIM); - m68307_sim &sim = *m68307SIM; + assert(m_m68307SIM); + m68307_sim &sim = *m_m68307SIM; int pc = space.device().safe_pc(); @@ -64,8 +64,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_sim_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_sim_w ) { - assert(m68307SIM); - m68307_sim &sim = *m68307SIM; + assert(m_m68307SIM); + m68307_sim &sim = *m_m68307SIM; int pc = space.device().safe_pc(); diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp index c83a0855f29..a4a4baf31f8 100644 --- a/src/devices/machine/68307tmu.cpp +++ b/src/devices/machine/68307tmu.cpp @@ -17,8 +17,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) { - assert(m68307TIMER); - m68307_timer &timer = *m68307TIMER; + assert(m_m68307TIMER); + m68307_timer &timer = *m_m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -39,8 +39,8 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r ) WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) { - assert(m68307TIMER); - m68307_timer &timer = *m68307TIMER; + assert(m_m68307TIMER); + m68307_timer &timer = *m_m68307TIMER; int pc = space.device().safe_pc(); int which = offset & 0x8; @@ -102,7 +102,7 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m68307TIMER->singletimer[0]; + single_timer* tptr = &m68k->m_m68307TIMER->singletimer[0]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer0_interrupt(); @@ -113,7 +113,7 @@ TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback ) TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer1_callback ) { m68307_cpu_device* m68k = (m68307_cpu_device *)ptr; - single_timer* tptr = &m68k->m68307TIMER->singletimer[1]; + single_timer* tptr = &m68k->m_m68307TIMER->singletimer[1]; tptr->regs[m68307TIMER_TMR] |= 0x2; m68k->timer1_interrupt(); diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 3427fb6c7e3..0ecae23b1ba 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -11,17 +11,17 @@ DEFINE_DEVICE_TYPE(M68340, m68340_cpu_device, "mc68340", "MC68340") int m68340_cpu_device::calc_cs(offs_t address) const { - if ( !(m68340SIM->m_ba[0] & 1) ) return 1; + if ( !(m_m68340SIM->m_ba[0] & 1) ) return 1; for (int i=0;i<4;i++) { - if (m68340SIM->m_ba[i] & 1) + if (m_m68340SIM->m_ba[i] & 1) { - int mask = ((m68340SIM->m_am[i]&0xffffff00) | 0xff); - int base = m68340SIM->m_ba[i] & 0xffffff00; - int fcmask = (m68340SIM->m_am[i] & 0xf0); - int fcbase = (m68340SIM->m_ba[i] & 0xf0) & ~(m68340SIM->m_am[i] & 0xf0); - int fc = mmu_tmp_fc; + int mask = ((m_m68340SIM->m_am[i]&0xffffff00) | 0xff); + int base = m_m68340SIM->m_ba[i] & 0xffffff00; + int fcmask = (m_m68340SIM->m_am[i] & 0xf0); + int fcbase = (m_m68340SIM->m_ba[i] & 0xf0) & ~(m_m68340SIM->m_am[i] & 0xf0); + int fc = m_mmu_tmp_fc; if ((address & ~mask) == base && ((fc << 4) & ~fcmask ) == fcbase ) return i+1; } @@ -45,58 +45,56 @@ uint16_t m68340_cpu_device::get_cs(offs_t address) READ32_MEMBER( m68340_cpu_device::m68340_internal_base_r ) { - int pc = space.device().safe_pc(); - logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask); - return m68340_base; + logerror("%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*4,mem_mask); + return m_m68340_base; } WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) { - int pc = space.device().safe_pc(); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", m_ppc, offset*4,data,mem_mask); // other conditions? - if (dfc==0x7) + if (m_dfc==0x7) { // unmap old modules - if (m68340_base&1) + if (m_m68340_base&1) { - int base = m68340_base & 0xfffff000; + int base = m_m68340_base & 0xfffff000; - internal->unmap_readwrite(base + 0x000, base + 0x05f); - internal->unmap_readwrite(base + 0x600, base + 0x67f); - internal->unmap_readwrite(base + 0x700, base + 0x723); - internal->unmap_readwrite(base + 0x780, base + 0x7bf); + m_internal->unmap_readwrite(base + 0x000, base + 0x05f); + m_internal->unmap_readwrite(base + 0x600, base + 0x67f); + m_internal->unmap_readwrite(base + 0x700, base + 0x723); + m_internal->unmap_readwrite(base + 0x780, base + 0x7bf); } - COMBINE_DATA(&m68340_base); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m68340_base write)\n", pc, offset*4,data,mem_mask); + COMBINE_DATA(&m_m68340_base); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc, offset*4,data,mem_mask); // map new modules - if (m68340_base&1) + if (m_m68340_base&1) { - int base = m68340_base & 0xfffff000; + int base = m_m68340_base & 0xfffff000; - internal->install_readwrite_handler(base + 0x000, base + 0x03f, + m_internal->install_readwrite_handler(base + 0x000, base + 0x03f, read16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_r),this), write16_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_w),this),0xffffffff); - internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping + m_internal->install_readwrite_handler(base + 0x010, base + 0x01f, // Intentionally punches a hole in previous address mapping read8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_r),this), write8_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_ports_w),this),0xffffffff); - internal->install_readwrite_handler(base + 0x040, base + 0x05f, + m_internal->install_readwrite_handler(base + 0x040, base + 0x05f, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_sim_cs_w),this)); - internal->install_readwrite_handler(base + 0x600, base + 0x63f, + m_internal->install_readwrite_handler(base + 0x600, base + 0x63f, READ16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer1, mc68340_timer_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x640, base + 0x67f, + m_internal->install_readwrite_handler(base + 0x640, base + 0x67f, READ16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, read), WRITE16_DEVICE_DELEGATE(m_timer2, mc68340_timer_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x700, base + 0x723, + m_internal->install_readwrite_handler(base + 0x700, base + 0x723, READ8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, read), WRITE8_DEVICE_DELEGATE(m_serial, mc68340_serial_module_device, write),0xffffffff); - internal->install_readwrite_handler(base + 0x780, base + 0x7bf, + m_internal->install_readwrite_handler(base + 0x780, base + 0x7bf, read32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_r),this), write32_delegate(FUNC(m68340_cpu_device::m68340_internal_dma_w),this)); @@ -145,9 +143,9 @@ m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char * , m_pb_out_cb(*this) , m_pb_in_cb(*this) { - m68340SIM = nullptr; - m68340DMA = nullptr; - m68340_base = 0; + m_m68340SIM = nullptr; + m_m68340DMA = nullptr; + m_m68340_base = 0; } void m68340_cpu_device::device_reset() @@ -168,15 +166,15 @@ void m68340_cpu_device::device_start() { fscpu32_device::device_start(); - m68340SIM = new m68340_sim(); - m68340DMA = new m68340_dma(); + m_m68340SIM = new m68340_sim(); + m_m68340DMA = new m68340_dma(); - m68340SIM->reset(); - m68340DMA->reset(); + m_m68340SIM->reset(); + m_m68340DMA->reset(); start_68340_sim(); - m68340_base = 0x00000000; + m_m68340_base = 0x00000000; - internal = &this->space(AS_PROGRAM); + m_internal = &space(AS_PROGRAM); } diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h index f183627dcec..76255b412a7 100644 --- a/src/devices/machine/68340.h +++ b/src/devices/machine/68340.h @@ -125,10 +125,10 @@ protected: uint32_t m_extal; /* 68340 peripheral modules */ - m68340_sim* m68340SIM; - m68340_dma* m68340DMA; + m68340_sim* m_m68340SIM; + m68340_dma* m_m68340DMA; - uint32_t m68340_base; + uint32_t m_m68340_base; emu_timer *m_irq_timer; diff --git a/src/devices/machine/68340ser.cpp b/src/devices/machine/68340ser.cpp index 3b86595e07e..714d72476db 100644 --- a/src/devices/machine/68340ser.cpp +++ b/src/devices/machine/68340ser.cpp @@ -150,7 +150,7 @@ WRITE_LINE_MEMBER( mc68340_serial_module_device::irq_w ) LOGINT("IRQ!\n%s\n", FUNCNAME); if (m_ilr > 0) { - if (((m_cpu->m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? + if (((m_cpu->m_m68340SIM->m_avr_rsr >> (8 + m_ilr)) & 1) != 0) // use autovector ? { LOGINT("- Autovector level %d\n", m_ilr); m_cpu->set_input_line(m_ilr, HOLD_LINE); diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index ddc7516b237..62497ad61b7 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -45,8 +45,8 @@ READ16_MEMBER( m68340_cpu_device::m68340_internal_sim_r ) { LOGR("%s\n", FUNCNAME); - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int val = 0; int pc = space.device().safe_pc(); @@ -106,8 +106,8 @@ WRITE16_MEMBER( m68340_cpu_device::m68340_internal_sim_w ) ((offset * 2) >= 0x10 && (offset * 2) < 0x20) || (offset * 2) >= 0x60 ? "Error - should not happen" : std::array {{"MCR", "reserved", "SYNCR", "AVR/RSR", "SWIV/SYPCR", "PICR", "PITR", "SWSR"}}[(offset * 2) <= m68340_sim::REG_AVR_RSR ? offset : offset - 0x10 + 0x04]); - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -200,8 +200,8 @@ READ8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_r ) { LOGR("%s\n", FUNCNAME); offset += 0x10; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); int val = space.machine().rand(); @@ -287,8 +287,8 @@ WRITE8_MEMBER( m68340_cpu_device::m68340_internal_sim_ports_w ) { LOG("%s", FUNCNAME); offset += 0x10; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -352,8 +352,8 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_r ) LOGR("%s\n", FUNCNAME); offset += m68340_sim::REG_AM_CS0>>2; - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -382,17 +382,17 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) if (offset & 1) { - LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Base address CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Base: %08x BFC:%02x WP:%d FTE:%d NCS:%d Valid: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, data & 0x08 ? 1 : 0, data & 0x04 ? 1 : 0, data & 0x02 ? 1 : 0, data & 0x01 ? "Yes" : "No"); } else { - LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", pc, (offset - 0x10) / 2, offset * 4, data, mem_mask); + LOGCS("%08x Address mask CS%d %08x, %08x (%08x) ", m_ppc, (offset - 0x10) / 2, offset * 4, data, mem_mask); LOGCS("- Mask: %08x FCM:%02x DD:%d PS: %s\n", data & 0xffffff00, (data & 0xf0) >> 4, (data >> 2) & 0x03, std::array{{"Reserved", "16-Bit", "8-bit", "External DSACK response"}}[data & 0x03]); } - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; int pc = space.device().safe_pc(); @@ -438,8 +438,8 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_sim_cs_w ) void m68340_cpu_device::do_pit_irq() { - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; //logerror("do_pit_irq\n"); int timer_irq_level = (sim.m_picr & 0x0700) >> 8; @@ -485,8 +485,8 @@ void m68340_cpu_device::start_68340_sim() m_pb_in_cb.resolve(); // Setup correct VCO/clock speed based on reset values and crystal - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; switch (m_clock_mode) { case m68340_sim::CLOCK_MODE_EXT: @@ -534,8 +534,8 @@ void m68340_sim::reset() /* do_tick_pit works on whole clock cycles, no flank support */ void m68340_cpu_device::do_tick_pit() { - assert(m68340SIM); - m68340_sim &sim = *m68340SIM; + assert(m_m68340SIM); + m68340_sim &sim = *m_m68340SIM; sim.m_pit_counter--; if ( ( (sim.m_mcr & m68340_sim::REG_MCR_FRZ1) == 0) && diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp index 4c04f49669d..b6a5d7f7749 100644 --- a/src/devices/machine/68340tmu.cpp +++ b/src/devices/machine/68340tmu.cpp @@ -310,8 +310,8 @@ void mc68340_timer_module_device::device_start() void mc68340_timer_module_device::do_timer_irq() { - assert(m_cpu->m68340SIM); - m68340_sim &sim = *m_cpu->m68340SIM; + assert(m_cpu->m_m68340SIM); + m68340_sim &sim = *m_cpu->m_m68340SIM; int timer_irq_level = (m_ir & 0x0700) >> 8; int timer_irq_vector = (m_ir & 0x00ff) >> 0; diff --git a/src/mame/drivers/apollo.cpp b/src/mame/drivers/apollo.cpp index ce9ec5b76ad..f175fff6fd1 100644 --- a/src/mame/drivers/apollo.cpp +++ b/src/mame/drivers/apollo.cpp @@ -29,7 +29,7 @@ #include "includes/apollo.h" -#include "cpu/m68000/m68kcpu.h" +#include "cpu/m68000/m68000.h" #include "sound/beep.h" // we use set_verbose @@ -212,6 +212,7 @@ uint8_t apollo_get_ram_config_byte(void) { return ram_config_byte; } +#if 0 /*************************************************************************** apollo_instruction_hook must be called by the CPU core before executing each instruction @@ -264,6 +265,8 @@ READ32_MEMBER(apollo_state::apollo_instruction_hook) return apollo_debug_instruction_hook(m_maincpu, offset); } +#endif + /*************************************************************************** apollo bus error ***************************************************************************/ @@ -495,7 +498,7 @@ READ32_MEMBER(apollo_state::apollo_unmapped_r) } else if (address == 0x0000ac00 && VERBOSE < 2) { // omit logging for Bus error test address in DN3000 boot prom } else { - SLOG1(("unmapped memory dword read from %08x with mask %08x (ir=%04x)", address , mem_mask, m68k->ir)); + SLOG1(("unmapped memory dword read from %08x with mask %08x (ir=%04x)", address , mem_mask, m68k->state_int(M68K_IR))); } /* unmapped; access causes a bus error */ @@ -920,7 +923,9 @@ void apollo_state::machine_reset() m_node_id->set_node_id_from_disk(); } +#if 0 m_maincpu->set_instruction_hook(read32_delegate(FUNC(apollo_state::apollo_instruction_hook),this)); +#endif } WRITE_LINE_MEMBER(apollo_state::apollo_reset_instr_callback) diff --git a/src/mame/drivers/cubo.cpp b/src/mame/drivers/cubo.cpp index 16dc1625f2c..bc80310d5ff 100644 --- a/src/mame/drivers/cubo.cpp +++ b/src/mame/drivers/cubo.cpp @@ -1193,7 +1193,7 @@ void cubo_state::chip_ram_w8_hack(offs_t byteoffs, uint8_t data) void cubo_state::cndypuzl_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); chip_ram_w(r_A5 - 0x7ebe, 0x0000); @@ -1208,7 +1208,7 @@ DRIVER_INIT_MEMBER( cubo_state, cndypuzl ) void cubo_state::haremchl_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); uint32_t r_A2 = (chip_ram_r(r_A5 - 0x7f00 + 0) << 16) | (chip_ram_r(r_A5 - 0x7f00 + 2)); @@ -1224,7 +1224,7 @@ DRIVER_INIT_MEMBER( cubo_state, haremchl ) void cubo_state::lsrquiz_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); uint32_t r_A2 = (chip_ram_r(r_A5 - 0x7fe0 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fe0 + 2)); @@ -1241,7 +1241,7 @@ DRIVER_INIT_MEMBER( cubo_state, lsrquiz ) /* The hack isn't working if you exit the test mode with P1 button 2 ! */ void cubo_state::lsrquiz2_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); uint32_t r_A2 = (chip_ram_r(r_A5 - 0x7fdc + 0) << 16) | (chip_ram_r(r_A5 - 0x7fdc + 2)); @@ -1257,7 +1257,7 @@ DRIVER_INIT_MEMBER( cubo_state, lsrquiz2 ) void cubo_state::lasstixx_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); uint32_t r_A2 = (chip_ram_r(r_A5 - 0x7fa2 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fa2 + 2)); @@ -1273,7 +1273,7 @@ DRIVER_INIT_MEMBER(cubo_state, lasstixx) void cubo_state::mgnumber_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); chip_ram_w(r_A5 - 0x7ed8, 0x0000); @@ -1288,7 +1288,7 @@ DRIVER_INIT_MEMBER( cubo_state, mgnumber ) void cubo_state::mgprem11_input_hack() { - if (m_maincpu->pc < m_chip_ram.bytes()) + if (m_maincpu->pc() < m_chip_ram.bytes()) { uint32_t r_A5 = m_maincpu->state_int(M68K_A5); chip_ram_w8_hack(r_A5 - 0x7eca, 0x00); diff --git a/src/mame/drivers/r9751.cpp b/src/mame/drivers/r9751.cpp index 69940540938..5edb895b736 100644 --- a/src/mame/drivers/r9751.cpp +++ b/src/mame/drivers/r9751.cpp @@ -152,17 +152,17 @@ uint32_t r9751_state::swap_uint32( uint32_t val ) uint32_t r9751_state::debug_a6() { - return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->dar[14] + 4); + return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->state_int(M68K_A6) + 4); } uint32_t r9751_state::debug_a5() { - return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->dar[13]); + return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->state_int(M68K_A5)); } uint32_t r9751_state::debug_a5_20() { - return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->dar[13] + 0x20); + return m_maincpu->space(AS_PROGRAM).read_dword(ptr_m68000->state_int(M68K_A5) + 0x20); } READ8_MEMBER(r9751_state::pdc_dma_r) @@ -396,7 +396,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w ) m_pdc->reg_p5 = 0; /* Send FDD SCSI command location address to PDC 0x2, 0x3 */ - if(TRACE_FDC) logerror("--- FDD command address: %08X PC: %08X Register: %08X (A6+4): %08X A4: %08X (A5): %08X (A5+20): %08X\n", (fdd_dma_bank & 0x7FFFF800) + ((data << 1)&0x3FFFF), space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000, debug_a6(), ptr_m68000->dar[12], debug_a5(), debug_a5_20()); + if(TRACE_FDC) logerror("--- FDD command address: %08X PC: %08X Register: %08X (A6+4): %08X A4: %08X (A5): %08X (A5+20): %08X\n", (fdd_dma_bank & 0x7FFFF800) + ((data << 1)&0x3FFFF), space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000, debug_a6(), ptr_m68000->state_int(M68K_A4), debug_a5(), debug_a5_20()); data_b0 = data & 0xFF; data_b1 = (data & 0xFF00) >> 8; m_pdc->reg_p2 = data_b0; diff --git a/src/mame/drivers/sun2.cpp b/src/mame/drivers/sun2.cpp index 740804d1665..5ad02d4b2d8 100644 --- a/src/mame/drivers/sun2.cpp +++ b/src/mame/drivers/sun2.cpp @@ -207,7 +207,7 @@ READ16_MEMBER( sun2_state::tl_mmu_r ) switch (offset & 7) { case 4: - //printf("sun2: Read IDPROM @ %x (PC=%x)\n", offset<<1, m_maincpu->pc); + //printf("sun2: Read IDPROM @ %x (PC=%x)\n", offset<<1, m_maincpu->pc()); return m_idprom_ptr[(offset>>10) & 0x1f]<<8; case 5: @@ -215,7 +215,7 @@ READ16_MEMBER( sun2_state::tl_mmu_r ) return m_diagreg; case 6: - //printf("sun2: Read bus error @ PC %x\n", m_maincpu->pc); + //printf("sun2: Read bus error @ PC %x\n", m_maincpu->pc()); return m_buserror; case 7: @@ -325,7 +325,7 @@ READ16_MEMBER( sun2_state::tl_mmu_r ) if (!machine().side_effect_disabled()) printf("sun2: pagemap entry not valid!\n"); } - if (!machine().side_effect_disabled()) printf("sun2: Unmapped read @ %08x (FC %d, mask %04x, PC=%x, seg %x)\n", offset<<1, fc, mem_mask, m_maincpu->pc, offset>>15); + if (!machine().side_effect_disabled()) printf("sun2: Unmapped read @ %08x (FC %d, mask %04x, PC=%x, seg %x)\n", offset<<1, fc, mem_mask, m_maincpu->pc(), offset>>15); return 0xffff; } @@ -334,7 +334,7 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w ) { uint8_t fc = m_maincpu->get_fc(); - //printf("sun2: Write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc, offset<<1); + //printf("sun2: Write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); if (fc == 3) { @@ -348,7 +348,7 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w ) case 5: // XOR to match Table 2-1 in the 2/50 Field Service Manual - printf("sun2: CPU LEDs to %02x (PC=%x) => ", (data & 0xff) ^ 0xff, m_maincpu->pc); + printf("sun2: CPU LEDs to %02x (PC=%x) => ", (data & 0xff) ^ 0xff, m_maincpu->pc()); m_diagreg = data & 0xff; for (int i = 0; i < 8; i++) { @@ -396,11 +396,11 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w ) m_pagemap[page] &= 0x0000ffff; m_pagemap[page] |= (data<<16); } - //printf("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc); + //printf("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc()); return; case 2: // segment map - //printf("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc); + //printf("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc()); m_segmap[m_context & 7][offset >> 14] = data & 0xff; return; @@ -452,7 +452,7 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w ) if (!machine().side_effect_disabled()) printf("sun2: pagemap entry not valid!\n"); } - printf("sun2: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc, offset<<1); + printf("sun2: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); } // BW2 video control diff --git a/src/mame/drivers/sun3.cpp b/src/mame/drivers/sun3.cpp index ec0835abfa9..868bf01ff74 100644 --- a/src/mame/drivers/sun3.cpp +++ b/src/mame/drivers/sun3.cpp @@ -308,7 +308,7 @@ READ32_MEMBER( sun3_state::ram_r ) if (!m_bInBusErr) { - //printf("ram_r: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc); + //printf("ram_r: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); //fflush(stdout); m_buserr = BE_TIMEOUT; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); @@ -381,7 +381,7 @@ WRITE32_MEMBER( sun3_state::ram_w ) if (!m_bInBusErr) { - //printf("ram_w: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc); + //printf("ram_w: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); fflush(stdout); m_buserr = BE_TIMEOUT; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); @@ -432,22 +432,22 @@ READ32_MEMBER( sun3_state::tl_mmu_r ) return 0; case 8: // cache tags - //printf("sun3: read cache tags @ %x, PC = %x\n", offset, m_maincpu->pc); + //printf("sun3: read cache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); return m_cache_tags[(offset & 0x3fff) >> 2]; case 9: // cache data - //printf("sun3: read cache data @ %x, PC = %x\n", offset, m_maincpu->pc); + //printf("sun3: read cache data @ %x, PC = %x\n", offset, m_maincpu->pc()); return m_cache_data[(offset & 0x3fff)]; case 10: // flush cache return 0xffffffff; case 11: // block copy - printf("sun3: read block copy @ %x, PC = %x\n", offset, m_maincpu->pc); + printf("sun3: read block copy @ %x, PC = %x\n", offset, m_maincpu->pc()); return 0xffffffff; case 15: // UART bypass - //printf("sun3: read UART bypass @ %x, PC = %x, mask = %08x\n", offset, m_maincpu->pc, mem_mask); + //printf("sun3: read UART bypass @ %x, PC = %x, mask = %08x\n", offset, m_maincpu->pc(), mem_mask); return 0xffffffff; } } @@ -513,7 +513,7 @@ READ32_MEMBER( sun3_state::tl_mmu_r ) } else { -// if (!machine().side_effect_disabled()) printf("sun3: pagemap entry not valid! (PC=%x)\n", m_maincpu->pc); +// if (!machine().side_effect_disabled()) printf("sun3: pagemap entry not valid! (PC=%x)\n", m_maincpu->pc()); m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_buserr = BE_INVALID; @@ -521,7 +521,7 @@ READ32_MEMBER( sun3_state::tl_mmu_r ) return 0xffffffff; } - if (!machine().side_effect_disabled()) logerror("sun3: Unmapped read @ %08x (FC %d, mask %08x, PC=%x, seg %x)\n", offset<<2, fc, mem_mask, m_maincpu->pc, offset>>15); + if (!machine().side_effect_disabled()) logerror("sun3: Unmapped read @ %08x (FC %d, mask %08x, PC=%x, seg %x)\n", offset<<2, fc, mem_mask, m_maincpu->pc(), offset>>15); return 0xffffffff; } @@ -530,7 +530,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) { uint8_t fc = m_maincpu->get_fc(); - //printf("sun3: Write %08x (FC %d, mask %08x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc, offset<<1); + //printf("sun3: Write %08x (FC %d, mask %08x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); if (fc == 3) // control space { @@ -549,11 +549,11 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) //printf("sun3: Write %04x to page map at %x (entry %d), ", data, offset<<2, page); COMBINE_DATA(&m_pagemap[page]); - //printf("entry now %08x (adr %08x PC=%x mask %x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 13, m_maincpu->pc, mem_mask); + //printf("entry now %08x (adr %08x PC=%x mask %x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 13, m_maincpu->pc(), mem_mask); return; case 2: // segment map - //printf("sun3: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x mask %x)\n", (data>>24) & 0xff, offset<<2, (offset & ~0x3c000000)>>15, m_context & 7, m_maincpu->pc, mem_mask); + //printf("sun3: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x mask %x)\n", (data>>24) & 0xff, offset<<2, (offset & ~0x3c000000)>>15, m_context & 7, m_maincpu->pc(), mem_mask); m_segmap[m_context & 7][(offset >> 15) & 0x7ff] = (data>>24) & 0xff; //printf("segment map[%d][%d] now %x\n", m_context & 7, (offset & ~0x3c000000) >> 15, m_segmap[m_context & 7][(offset & ~0x3c000000) >> 15] = (data>>24) & 0xff); return; @@ -564,7 +564,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) return; case 4: // enable reg - //printf("sun3: Write %x to enable, PC=%x\n", data, m_maincpu->pc); + //printf("sun3: Write %x to enable, PC=%x\n", data, m_maincpu->pc()); COMBINE_DATA(&m_enable); return; @@ -578,7 +578,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) case 7: // diagnostic reg m_diag = data >> 24; #if 0 - printf("sun3: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc); + printf("sun3: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc()); for (int i = 0; i < 8; i++) { if (m_diag & (1<pc, mem_mask); + //printf("sun3: %08x to cache tags @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc(), mem_mask); m_cache_tags[(offset & 0x3fff) >> 2] = data; return; case 9: // cache data - //printf("sun3: %08x to cache data @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc, mem_mask); + //printf("sun3: %08x to cache data @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc(), mem_mask); m_cache_data[(offset & 0x3fff)] = data; return; @@ -608,11 +608,11 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) return; case 11: // block copy - printf("sun3: %08x to block copy @ %x, PC = %x\n", data, offset, m_maincpu->pc); + printf("sun3: %08x to block copy @ %x, PC = %x\n", data, offset, m_maincpu->pc()); return; case 15: // UART bypass - //printf("sun3: %08x to UART bypass @ %x, PC = %x\n", data, offset, m_maincpu->pc); + //printf("sun3: %08x to UART bypass @ %x, PC = %x\n", data, offset, m_maincpu->pc()); return; } } @@ -626,7 +626,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) if ((!(m_pagemap[entry] & PM_WRITEMASK)) || ((m_pagemap[entry] & PM_SYSMASK) && (fc < M68K_FC_SUPERVISOR_DATA))) { - //printf("sun3: write protect MMU error (PC=%x)\n", m_maincpu->pc); + //printf("sun3: write protect MMU error (PC=%x)\n", m_maincpu->pc()); m_buserr = BE_PROTERR; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); @@ -671,7 +671,7 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w ) return; } - logerror("sun3: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc, offset<<2); + logerror("sun3: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<2); } READ32_MEMBER(sun3_state::parity_r) @@ -783,7 +783,7 @@ WRITE32_MEMBER(sun3_state::irqctrl_w) READ8_MEMBER(sun3_state::rtc7170_r) { - //printf("read 7170 @ %x, PC=%x\n", offset, m_maincpu->pc); + //printf("read 7170 @ %x, PC=%x\n", offset, m_maincpu->pc()); return 0xff; } @@ -803,7 +803,7 @@ WRITE8_MEMBER(sun3_state::rtc7170_w) READ32_MEMBER(sun3_state::ecc_r) { - //printf("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc); + //printf("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc()); // fefc34a int mbram = (m_ram_size / (1024*1024)); int beoff = (mbram / 32) * 0x10; diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp index 19da99f1a6e..65645edb7b8 100644 --- a/src/mame/drivers/x68k.cpp +++ b/src/mame/drivers/x68k.cpp @@ -968,7 +968,6 @@ void x68k_state::set_bus_error(uint32_t address, bool write, uint16_t mem_mask) address++; m_bus_error = true; m_maincpu->set_buserror_details(address, write, m_maincpu->get_fc()); - m_maincpu->mmu_tmp_buserror_address = address; // Hack for x68030 m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_bus_error_timer->adjust(m_maincpu->cycles_to_attotime(16)); // let rmw cycles complete diff --git a/src/mame/includes/apollo.h b/src/mame/includes/apollo.h index d00be887813..ea06e5f7f9f 100644 --- a/src/mame/includes/apollo.h +++ b/src/mame/includes/apollo.h @@ -87,8 +87,10 @@ uint8_t apollo_get_ram_config_byte(void); //apollo_get_node_id - get the node id uint32_t apollo_get_node_id(void); +#if 0 // should be called by the CPU core before executing each instruction int apollo_instruction_hook(m68000_base_device *device, offs_t curpc); +#endif void apollo_set_cache_status_register(device_t *device,uint8_t mask, uint8_t data); diff --git a/src/mame/machine/apollo_dbg.cpp b/src/mame/machine/apollo_dbg.cpp index 208a563b7c3..345788256f2 100644 --- a/src/mame/machine/apollo_dbg.cpp +++ b/src/mame/machine/apollo_dbg.cpp @@ -13,7 +13,9 @@ #include "emu.h" #include "debug/debugbuf.h" #include "includes/apollo.h" -#include "cpu/m68000/m68kcpu.h" +#include "cpu/m68000/m68000.h" + +#if 0 //------------------------------------------------------ // TRAP 0 @@ -1168,3 +1170,4 @@ int apollo_debug_instruction_hook(m68000_base_device *device, offs_t curpc) } return 0; } +#endif -- cgit v1.2.3-70-g09d2 From b0c350c6ae6e4fa5b79ca2f26cc642d5e8f4a0ec Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Wed, 13 Dec 2017 14:09:32 +0200 Subject: pgm2: foreground scroll (nw) --- src/mame/drivers/pgm2.cpp | 5 +++-- src/mame/includes/pgm2.h | 2 ++ src/mame/video/pgm2.cpp | 2 ++ 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index a439f84ee01..3a61710eae0 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -73,8 +73,8 @@ 02 - bg scroll y 04 - zoom something, 0F-7F, default 1F 06 - zoom something, 0F-7F, default 1F - 08 - fg? scroll x - 0a - fg? scroll y + 08 - fg scroll x + 0a - fg scroll y 0e - ? 1 at init (sprite related?) 10 - ? orleg2 - 0x13, kov2nl - 0x14 at init (sprite related?) 14 - sprite enable ? set to 0 before spriteram update, to 1 after @@ -355,6 +355,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x30100000, 0x301000ff) AM_READWRITE8(shareram_r, shareram_w, 0x00ff00ff) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll + AM_RANGE(0x30120008, 0x3012000b) AM_RAM AM_SHARE("fgscroll") AM_RANGE(0x30120030, 0x30120033) AM_WRITE16(share_bank_w, 0xffff0000) AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 1447a5d6fc6..de986d1b5a3 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -32,6 +32,7 @@ public: m_bg_videoram(*this, "bg_videoram"), m_sp_videoram(*this, "sp_videoram"), m_bgscroll(*this, "bgscroll"), + m_fgscroll(*this, "fgscroll"), m_gfxdecode2(*this, "gfxdecode2"), m_gfxdecode3(*this, "gfxdecode3"), m_arm_aic(*this, "arm_aic"), @@ -130,6 +131,7 @@ private: required_shared_ptr m_bg_videoram; required_shared_ptr m_sp_videoram; required_shared_ptr m_bgscroll; + required_shared_ptr m_fgscroll; required_device m_gfxdecode2; required_device m_gfxdecode3; required_device m_arm_aic; diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index 64ce9901cf7..dcd56aff64f 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -258,6 +258,8 @@ void pgm2_state::copy_sprites_from_bitmap(screen_device &screen, bitmap_rgb32 &b uint32_t pgm2_state::screen_update_pgm2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + m_fg_tilemap->set_scrollx(0, m_fgscroll[0] & 0xffff); + m_fg_tilemap->set_scrolly(0, m_fgscroll[0] >> 16); m_bg_tilemap->set_scrolly(0, (m_bgscroll[0x0/4] & 0xffff0000)>>16 ); for (int y = 0; y < 224; y++) -- cgit v1.2.3-70-g09d2 From 64385b268b96aca5133ce8c45ec5a521961e92a3 Mon Sep 17 00:00:00 2001 From: smf- Date: Wed, 13 Dec 2017 12:37:44 +0000 Subject: more static, less const & some irrelevant inline (nw) --- src/devices/cpu/m68000/m68kcpu.h | 194 +++++++++++++++++++-------------------- 1 file changed, 97 insertions(+), 97 deletions(-) diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index 6677cc34ac3..4c6db9f4490 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -29,9 +29,9 @@ /* ======================================================================== */ /* Check for > 32bit sizes */ -constexpr int8_t MAKE_INT_8(uint32_t A) const { return (int8_t)(A); } -constexpr int16_t MAKE_INT_16(uint32_t A) const { return (int16_t)(A); } -constexpr int32_t MAKE_INT_32(uint32_t A) const { return (int32_t)(A); } +static constexpr int8_t MAKE_INT_8(uint32_t A) { return (int8_t)(A); } +static constexpr int16_t MAKE_INT_16(uint32_t A) { return (int16_t)(A); } +static constexpr int32_t MAKE_INT_32(uint32_t A) { return (int32_t)(A); } /* ======================================================================== */ @@ -107,89 +107,89 @@ static constexpr int M68K_CACR_EI = 0x01; // Enable Instruction Cache /* ---------------------------- General Macros ---------------------------- */ /* Bit Isolation Macros */ -constexpr uint32_t BIT_0(uint32_t A) const { return ((A) & 0x00000001); } -constexpr uint32_t BIT_1(uint32_t A) const { return ((A) & 0x00000002); } -constexpr uint32_t BIT_2(uint32_t A) const { return ((A) & 0x00000004); } -constexpr uint32_t BIT_3(uint32_t A) const { return ((A) & 0x00000008); } -constexpr uint32_t BIT_4(uint32_t A) const { return ((A) & 0x00000010); } -constexpr uint32_t BIT_5(uint32_t A) const { return ((A) & 0x00000020); } -constexpr uint32_t BIT_6(uint32_t A) const { return ((A) & 0x00000040); } -constexpr uint32_t BIT_7(uint32_t A) const { return ((A) & 0x00000080); } -constexpr uint32_t BIT_8(uint32_t A) const { return ((A) & 0x00000100); } -constexpr uint32_t BIT_9(uint32_t A) const { return ((A) & 0x00000200); } -constexpr uint32_t BIT_A(uint32_t A) const { return ((A) & 0x00000400); } -constexpr uint32_t BIT_B(uint32_t A) const { return ((A) & 0x00000800); } -constexpr uint32_t BIT_C(uint32_t A) const { return ((A) & 0x00001000); } -constexpr uint32_t BIT_D(uint32_t A) const { return ((A) & 0x00002000); } -constexpr uint32_t BIT_E(uint32_t A) const { return ((A) & 0x00004000); } -constexpr uint32_t BIT_F(uint32_t A) const { return ((A) & 0x00008000); } -constexpr uint32_t BIT_10(uint32_t A) const { return ((A) & 0x00010000); } -constexpr uint32_t BIT_11(uint32_t A) const { return ((A) & 0x00020000); } -constexpr uint32_t BIT_12(uint32_t A) const { return ((A) & 0x00040000); } -constexpr uint32_t BIT_13(uint32_t A) const { return ((A) & 0x00080000); } -constexpr uint32_t BIT_14(uint32_t A) const { return ((A) & 0x00100000); } -constexpr uint32_t BIT_15(uint32_t A) const { return ((A) & 0x00200000); } -constexpr uint32_t BIT_16(uint32_t A) const { return ((A) & 0x00400000); } -constexpr uint32_t BIT_17(uint32_t A) const { return ((A) & 0x00800000); } -constexpr uint32_t BIT_18(uint32_t A) const { return ((A) & 0x01000000); } -constexpr uint32_t BIT_19(uint32_t A) const { return ((A) & 0x02000000); } -constexpr uint32_t BIT_1A(uint32_t A) const { return ((A) & 0x04000000); } -constexpr uint32_t BIT_1B(uint32_t A) const { return ((A) & 0x08000000); } -constexpr uint32_t BIT_1C(uint32_t A) const { return ((A) & 0x10000000); } -constexpr uint32_t BIT_1D(uint32_t A) const { return ((A) & 0x20000000); } -constexpr uint32_t BIT_1E(uint32_t A) const { return ((A) & 0x40000000); } -constexpr uint32_t BIT_1F(uint32_t A) const { return ((A) & 0x80000000); } +static constexpr uint32_t BIT_0(uint32_t A) { return ((A) & 0x00000001); } +static constexpr uint32_t BIT_1(uint32_t A) { return ((A) & 0x00000002); } +static constexpr uint32_t BIT_2(uint32_t A) { return ((A) & 0x00000004); } +static constexpr uint32_t BIT_3(uint32_t A) { return ((A) & 0x00000008); } +static constexpr uint32_t BIT_4(uint32_t A) { return ((A) & 0x00000010); } +static constexpr uint32_t BIT_5(uint32_t A) { return ((A) & 0x00000020); } +static constexpr uint32_t BIT_6(uint32_t A) { return ((A) & 0x00000040); } +static constexpr uint32_t BIT_7(uint32_t A) { return ((A) & 0x00000080); } +static constexpr uint32_t BIT_8(uint32_t A) { return ((A) & 0x00000100); } +static constexpr uint32_t BIT_9(uint32_t A) { return ((A) & 0x00000200); } +static constexpr uint32_t BIT_A(uint32_t A) { return ((A) & 0x00000400); } +static constexpr uint32_t BIT_B(uint32_t A) { return ((A) & 0x00000800); } +static constexpr uint32_t BIT_C(uint32_t A) { return ((A) & 0x00001000); } +static constexpr uint32_t BIT_D(uint32_t A) { return ((A) & 0x00002000); } +static constexpr uint32_t BIT_E(uint32_t A) { return ((A) & 0x00004000); } +static constexpr uint32_t BIT_F(uint32_t A) { return ((A) & 0x00008000); } +static constexpr uint32_t BIT_10(uint32_t A) { return ((A) & 0x00010000); } +static constexpr uint32_t BIT_11(uint32_t A) { return ((A) & 0x00020000); } +static constexpr uint32_t BIT_12(uint32_t A) { return ((A) & 0x00040000); } +static constexpr uint32_t BIT_13(uint32_t A) { return ((A) & 0x00080000); } +static constexpr uint32_t BIT_14(uint32_t A) { return ((A) & 0x00100000); } +static constexpr uint32_t BIT_15(uint32_t A) { return ((A) & 0x00200000); } +static constexpr uint32_t BIT_16(uint32_t A) { return ((A) & 0x00400000); } +static constexpr uint32_t BIT_17(uint32_t A) { return ((A) & 0x00800000); } +static constexpr uint32_t BIT_18(uint32_t A) { return ((A) & 0x01000000); } +static constexpr uint32_t BIT_19(uint32_t A) { return ((A) & 0x02000000); } +static constexpr uint32_t BIT_1A(uint32_t A) { return ((A) & 0x04000000); } +static constexpr uint32_t BIT_1B(uint32_t A) { return ((A) & 0x08000000); } +static constexpr uint32_t BIT_1C(uint32_t A) { return ((A) & 0x10000000); } +static constexpr uint32_t BIT_1D(uint32_t A) { return ((A) & 0x20000000); } +static constexpr uint32_t BIT_1E(uint32_t A) { return ((A) & 0x40000000); } +static constexpr uint32_t BIT_1F(uint32_t A) { return ((A) & 0x80000000); } /* Get the most significant bit for specific sizes */ -constexpr uint32_t GET_MSB_8(uint32_t A) const { return ((A) & 0x80); } -constexpr uint32_t GET_MSB_9(uint32_t A) const { return ((A) & 0x100); } -constexpr uint32_t GET_MSB_16(uint32_t A) const { return ((A) & 0x8000); } -constexpr uint32_t GET_MSB_17(uint32_t A) const { return ((A) & 0x10000); } -constexpr uint32_t GET_MSB_32(uint32_t A) const { return ((A) & 0x80000000); } -constexpr uint64_t GET_MSB_33(uint64_t A) const { return ((A) & 0x100000000U); } +static constexpr uint32_t GET_MSB_8(uint32_t A) { return ((A) & 0x80); } +static constexpr uint32_t GET_MSB_9(uint32_t A) { return ((A) & 0x100); } +static constexpr uint32_t GET_MSB_16(uint32_t A) { return ((A) & 0x8000); } +static constexpr uint32_t GET_MSB_17(uint32_t A) { return ((A) & 0x10000); } +static constexpr uint32_t GET_MSB_32(uint32_t A) { return ((A) & 0x80000000); } +static constexpr uint64_t GET_MSB_33(uint64_t A) { return ((A) & 0x100000000U); } /* Isolate nibbles */ -constexpr uint32_t LOW_NIBBLE(uint32_t A) const { return ((A) & 0x0f); } -constexpr uint32_t HIGH_NIBBLE(uint32_t A) const { return ((A) & 0xf0); } +static constexpr uint32_t LOW_NIBBLE(uint32_t A) { return ((A) & 0x0f); } +static constexpr uint32_t HIGH_NIBBLE(uint32_t A) { return ((A) & 0xf0); } /* These are used to isolate 8, 16, and 32 bit sizes */ -constexpr uint32_t MASK_OUT_ABOVE_2(uint32_t A) const { return ((A) & 3); } -constexpr uint32_t MASK_OUT_ABOVE_8(uint32_t A) const { return ((A) & 0xff); } -constexpr uint32_t MASK_OUT_ABOVE_16(uint32_t A) const { return ((A) & 0xffff); } -constexpr uint32_t MASK_OUT_BELOW_2(uint32_t A) const { return ((A) & ~3); } -constexpr uint32_t MASK_OUT_BELOW_8(uint32_t A) const { return ((A) & ~0xff); } -constexpr uint32_t MASK_OUT_BELOW_16(uint32_t A) const { return ((A) & ~0xffff); } +static constexpr uint32_t MASK_OUT_ABOVE_2(uint32_t A) { return ((A) & 3); } +static constexpr uint32_t MASK_OUT_ABOVE_8(uint32_t A) { return ((A) & 0xff); } +static constexpr uint32_t MASK_OUT_ABOVE_16(uint32_t A) { return ((A) & 0xffff); } +static constexpr uint32_t MASK_OUT_BELOW_2(uint32_t A) { return ((A) & ~3); } +static constexpr uint32_t MASK_OUT_BELOW_8(uint32_t A) { return ((A) & ~0xff); } +static constexpr uint32_t MASK_OUT_BELOW_16(uint32_t A) { return ((A) & ~0xffff); } /* No need to mask if we are 32 bit */ -constexpr uint32_t MASK_OUT_ABOVE_32(uint32_t A) const { return ((A) & u64(0xffffffffU)); } -constexpr uint64_t MASK_OUT_BELOW_32(uint64_t A) const { return ((A) & ~u64(0xffffffffU)); } +static constexpr uint32_t MASK_OUT_ABOVE_32(uint32_t A) { return ((A) & u64(0xffffffffU)); } +static constexpr uint64_t MASK_OUT_BELOW_32(uint64_t A) { return ((A) & ~u64(0xffffffffU)); } /* Shift & Rotate Macros. */ -constexpr uint32_t LSL(uint32 A, uint32_t C) const { return ((A) << (C)); } -constexpr uint32_t LSR(uint32 A, uint32_t C) const { return ((A) >> (C)); } +static constexpr uint32_t LSL(uint32 A, uint32_t C) { return ((A) << (C)); } +static constexpr uint32_t LSR(uint32 A, uint32_t C) { return ((A) >> (C)); } /* We have to do this because the morons at ANSI decided that shifts * by >= data size are undefined. */ -constexpr uint32_t LSR_32(uint32 A, uint32_t C) const { return ((C) < 32 ? (A) >> (C) : 0); } -constexpr uint32_t LSL_32(uint32 A, uint32_t C) const { return ((C) < 32 ? (A) << (C) : 0); } +static constexpr uint32_t LSR_32(uint32 A, uint32_t C) { return ((C) < 32 ? (A) >> (C) : 0); } +static constexpr uint32_t LSL_32(uint32 A, uint32_t C) { return ((C) < 32 ? (A) << (C) : 0); } -constexpr uint64_t LSL_32_64(uint64_t A, uint32_t C) const { return ((A) << (C)); } -constexpr uint64_t LSR_32_64(uint64_t A, uint32_t C) const { return ((A) >> (C)); } -constexpr uint64_t ROL_33_64(uint64_t A, uint32_t C) const { return (LSL_32_64(A, C) | LSR_32_64(A, 33 - (C))); } -constexpr uint64_t ROR_33_64(uint64_t A, uint32_t C) const { return (LSR_32_64(A, C) | LSL_32_64(A, 33 - (C))); } +static constexpr uint64_t LSL_32_64(uint64_t A, uint32_t C) { return ((A) << (C)); } +static constexpr uint64_t LSR_32_64(uint64_t A, uint32_t C) { return ((A) >> (C)); } +static constexpr uint64_t ROL_33_64(uint64_t A, uint32_t C) { return (LSL_32_64(A, C) | LSR_32_64(A, 33 - (C))); } +static constexpr uint64_t ROR_33_64(uint64_t A, uint32_t C) { return (LSR_32_64(A, C) | LSL_32_64(A, 33 - (C))); } -constexpr uint32_t ROL_8(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))); } -constexpr uint32_t ROL_9(uint32_t A, uint32_t C) const { return (LSL(A, C) | LSR(A, 9-(C))); } -constexpr uint32_t ROL_16(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))); } -constexpr uint32_t ROL_17(uint32_t A, uint32_t C) const { return (LSL(A, C) | LSR(A, 17-(C))); } -constexpr uint32_t ROL_32(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))); } +static constexpr uint32_t ROL_8(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))); } +static constexpr uint32_t ROL_9(uint32_t A, uint32_t C) { return (LSL(A, C) | LSR(A, 9-(C))); } +static constexpr uint32_t ROL_16(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))); } +static constexpr uint32_t ROL_17(uint32_t A, uint32_t C) { return (LSL(A, C) | LSR(A, 17-(C))); } +static constexpr uint32_t ROL_32(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))); } -constexpr uint32_t ROR_8(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))); } -constexpr uint32_t ROR_9(uint32_t A, uint32_t C) const { return (LSR(A, C) | LSL(A, 9-(C))); } -constexpr uint32_t ROR_16(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))); } -constexpr uint32_t ROR_17(uint32_t A, uint32_t C) const { return (LSR(A, C) | LSL(A, 17-(C))); } -constexpr uint32_t ROR_32(uint32_t A, uint32_t C) const { return MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))); } +static constexpr uint32_t ROR_8(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))); } +static constexpr uint32_t ROR_9(uint32_t A, uint32_t C) { return (LSR(A, C) | LSL(A, 9-(C))); } +static constexpr uint32_t ROR_16(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))); } +static constexpr uint32_t ROR_17(uint32_t A, uint32_t C) { return (LSR(A, C) | LSL(A, 17-(C))); } +static constexpr uint32_t ROR_32(uint32_t A, uint32_t C) { return MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))); } @@ -211,24 +211,24 @@ inline uint32_t ®_SP() { return m_dar[15]; } /* These defines are dependant on the configuration defines in m68kconf.h */ /* Disable certain comparisons if we're not using all CPU types */ -constexpr uint32_t CPU_TYPE_IS_COLDFIRE() const { return ((m_cpu_type) & (CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_COLDFIRE() const { return ((m_cpu_type) & (CPU_TYPE_COLDFIRE)); } -constexpr uint32_t CPU_TYPE_IS_040_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_040 | CPU_TYPE_EC040)); } +inline uint32_t CPU_TYPE_IS_040_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_040 | CPU_TYPE_EC040)); } -constexpr uint32_t CPU_TYPE_IS_030_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)); } +inline uint32_t CPU_TYPE_IS_030_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)); } -constexpr uint32_t CPU_TYPE_IS_020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } -constexpr uint32_t CPU_TYPE_IS_020_VARIANT() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)); } +inline uint32_t CPU_TYPE_IS_020_VARIANT() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_FSCPU32)); } -constexpr uint32_t CPU_TYPE_IS_EC020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } -constexpr uint32_t CPU_TYPE_IS_EC020_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)); } +inline uint32_t CPU_TYPE_IS_EC020_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_EC020_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)); } -constexpr uint32_t CPU_TYPE_IS_010() const { return ((m_cpu_type) == CPU_TYPE_010); } -constexpr uint32_t CPU_TYPE_IS_010_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } -constexpr uint32_t CPU_TYPE_IS_010_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)); } +inline uint32_t CPU_TYPE_IS_010() const { return ((m_cpu_type) == CPU_TYPE_010); } +inline uint32_t CPU_TYPE_IS_010_PLUS() const { return ((m_cpu_type) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_FSCPU32 | CPU_TYPE_COLDFIRE)); } +inline uint32_t CPU_TYPE_IS_010_LESS() const { return ((m_cpu_type) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010)); } -constexpr uint32_t CPU_TYPE_IS_000() const { return ((m_cpu_type) == CPU_TYPE_000 || (m_cpu_type) == CPU_TYPE_008); } +inline uint32_t CPU_TYPE_IS_000() const { return ((m_cpu_type) == CPU_TYPE_000 || (m_cpu_type) == CPU_TYPE_008); } /* Initiates trace checking before each instruction (t1) */ @@ -314,28 +314,28 @@ inline uint32_t OPER_I_32() { return m68ki_read_imm_32(); } /* --------------------------- Status Register ---------------------------- */ /* Flag Calculation Macros */ -constexpr uint32_t CFLAG_8(uint32_t A) const { return (A); } -constexpr uint32_t CFLAG_16(uint32_t A) const { return ((A)>>8); } +static constexpr uint32_t CFLAG_8(uint32_t A) { return (A); } +static constexpr uint32_t CFLAG_16(uint32_t A) { return ((A)>>8); } -constexpr uint32_t CFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S & D) | (~R & (S | D)))>>23); } -constexpr uint32_t CFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S & R) | (~D & (S | R)))>>23); } +static constexpr uint32_t CFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) { return (((S & D) | (~R & (S | D)))>>23); } +static constexpr uint32_t CFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) { return (((S & R) | (~D & (S | R)))>>23); } -constexpr uint32_t VFLAG_ADD_8(uint32_t S, uint32_t D, uint32_t R) const { return ((S^R) & (D^R)); } -constexpr uint32_t VFLAG_ADD_16(uint32_t S, uint32_t D, uint32_t R) const { return (((S^R) & (D^R))>>8); } -constexpr uint32_t VFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S^R) & (D^R))>>24); } +static constexpr uint32_t VFLAG_ADD_8(uint32_t S, uint32_t D, uint32_t R) { return ((S^R) & (D^R)); } +static constexpr uint32_t VFLAG_ADD_16(uint32_t S, uint32_t D, uint32_t R) { return (((S^R) & (D^R))>>8); } +static constexpr uint32_t VFLAG_ADD_32(uint32_t S, uint32_t D, uint32_t R) { return (((S^R) & (D^R))>>24); } -constexpr uint32_t VFLAG_SUB_8(uint32_t S, uint32_t D, uint32_t R) const { return ((S^D) & (R^D)); } -constexpr uint32_t VFLAG_SUB_16(uint32_t S, uint32_t D, uint32_t R) const { return (((S^D) & (R^D))>>8); } -constexpr uint32_t VFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) const { return (((S^D) & (R^D))>>24); } +static constexpr uint32_t VFLAG_SUB_8(uint32_t S, uint32_t D, uint32_t R) { return ((S^D) & (R^D)); } +static constexpr uint32_t VFLAG_SUB_16(uint32_t S, uint32_t D, uint32_t R) { return (((S^D) & (R^D))>>8); } +static constexpr uint32_t VFLAG_SUB_32(uint32_t S, uint32_t D, uint32_t R) { return (((S^D) & (R^D))>>24); } -constexpr uint32_t NFLAG_8(uint32_t A) const { return (A); } -constexpr uint32_t NFLAG_16(uint32_t A) const { return ((A)>>8); } -constexpr uint32_t NFLAG_32(uint32_t A) const { return ((A)>>24); } -constexpr uint32_t NFLAG_64(uint64_t A) const { return ((A)>>56); } +static constexpr uint32_t NFLAG_8(uint32_t A) { return (A); } +static constexpr uint32_t NFLAG_16(uint32_t A) { return ((A)>>8); } +static constexpr uint32_t NFLAG_32(uint32_t A) { return ((A)>>24); } +static constexpr uint32_t NFLAG_64(uint64_t A) { return ((A)>>56); } -constexpr uint32_t ZFLAG_8(uint32_t A) const { return MASK_OUT_ABOVE_8(A); } -constexpr uint32_t ZFLAG_16(uint32_t A) const { return MASK_OUT_ABOVE_16(A); } -constexpr uint32_t ZFLAG_32(uint32_t A) const { return MASK_OUT_ABOVE_32(A); } +static constexpr uint32_t ZFLAG_8(uint32_t A) { return MASK_OUT_ABOVE_8(A); } +static constexpr uint32_t ZFLAG_16(uint32_t A) { return MASK_OUT_ABOVE_16(A); } +static constexpr uint32_t ZFLAG_32(uint32_t A) { return MASK_OUT_ABOVE_32(A); } /* Flag values */ -- cgit v1.2.3-70-g09d2 From eb746cb7d85d3f673f5b66ee65340129c6aa62d6 Mon Sep 17 00:00:00 2001 From: smf- Date: Wed, 13 Dec 2017 15:09:28 +0000 Subject: replace some space.device() calls (nw) --- src/mame/drivers/namcos11.cpp | 4 ++-- src/mame/drivers/namcos22.cpp | 12 ++++++------ src/mame/drivers/namcos23.cpp | 38 +++++++++++++++++++------------------- src/mame/drivers/naomi.cpp | 4 ++-- src/mame/drivers/rmhaihai.cpp | 6 +++--- src/mame/drivers/witch.cpp | 2 +- src/mame/drivers/x1.cpp | 8 ++++---- src/mame/drivers/x68k.cpp | 2 +- src/mame/drivers/xexex.cpp | 2 +- src/mame/drivers/xmen.cpp | 2 +- src/mame/drivers/xyonix.cpp | 4 ++-- src/mame/drivers/yunsung8.cpp | 2 +- src/mame/drivers/zn.cpp | 6 +++--- 13 files changed, 46 insertions(+), 46 deletions(-) diff --git a/src/mame/drivers/namcos11.cpp b/src/mame/drivers/namcos11.cpp index 86784874484..ee1c195bd5f 100644 --- a/src/mame/drivers/namcos11.cpp +++ b/src/mame/drivers/namcos11.cpp @@ -516,9 +516,9 @@ ADDRESS_MAP_END READ16_MEMBER(namcos11_state::c76_speedup_r) { - if ((space.device().safe_pc() == 0xc153) && (!(m_su_83 & 0xff00))) + if ((m_mcu->pc() == 0xc153) && (!(m_su_83 & 0xff00))) { - space.device().execute().spin_until_interrupt(); + m_mcu->spin_until_interrupt(); } return m_su_83; diff --git a/src/mame/drivers/namcos22.cpp b/src/mame/drivers/namcos22.cpp index 5929f68d546..50ac0075e7c 100644 --- a/src/mame/drivers/namcos22.cpp +++ b/src/mame/drivers/namcos22.cpp @@ -5444,9 +5444,9 @@ ROM_END // for MCU BIOS v1.41 READ16_MEMBER(namcos22_state::mcu141_speedup_r) { - if ((space.device().safe_pc() == 0xc12d) && (!(m_su_82 & 0xff00))) + if ((m_mcu->pc() == 0xc12d) && (!(m_su_82 & 0xff00))) { - space.device().execute().spin_until_interrupt(); + m_mcu->spin_until_interrupt(); } return m_su_82; @@ -5460,9 +5460,9 @@ WRITE16_MEMBER(namcos22_state::mcu_speedup_w) // for MCU BIOS v1.20/v1.30 READ16_MEMBER(namcos22_state::mcu130_speedup_r) { - if ((space.device().safe_pc() == 0xc12a) && (!(m_su_82 & 0xff00))) + if ((m_mcu->pc() == 0xc12a) && (!(m_su_82 & 0xff00))) { - space.device().execute().spin_until_interrupt(); + m_mcu->spin_until_interrupt(); } return m_su_82; @@ -5471,9 +5471,9 @@ READ16_MEMBER(namcos22_state::mcu130_speedup_r) // for NSTX7702 v1.00 (C74) READ16_MEMBER(namcos22_state::mcuc74_speedup_r) { - if (((space.device().safe_pc() == 0xc0df) || (space.device().safe_pc() == 0xc101)) && (!(m_su_82 & 0xff00))) + if (((m_mcu->pc() == 0xc0df) || (m_mcu->pc() == 0xc101)) && (!(m_su_82 & 0xff00))) { - space.device().execute().spin_until_interrupt(); + m_mcu->spin_until_interrupt(); } return m_su_82; diff --git a/src/mame/drivers/namcos23.cpp b/src/mame/drivers/namcos23.cpp index 138cb3c90d1..66ebe564f04 100644 --- a/src/mame/drivers/namcos23.cpp +++ b/src/mame/drivers/namcos23.cpp @@ -1997,7 +1997,7 @@ READ32_MEMBER(namcos23_state::c435_r) return 1; // Busy flag } - logerror("c435_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c435_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0; } @@ -2015,7 +2015,7 @@ WRITE32_MEMBER(namcos23_state::c435_w) c435_dma(space, m_c435_address, m_c435_size); break; default: - logerror("c435_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c435_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2492,7 +2492,7 @@ READ16_MEMBER(namcos23_state::c417_r) case 1: return m_c417.adr; case 4: - //logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + //logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return m_c417.ram[m_c417.adr]; case 5: if(m_c417.pointrom_adr >= m_ptrom_limit) @@ -2504,7 +2504,7 @@ READ16_MEMBER(namcos23_state::c417_r) return m_ptrom[m_c417.pointrom_adr]; } - logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0; } @@ -2524,7 +2524,7 @@ WRITE16_MEMBER(namcos23_state::c417_w) m_c417.pointrom_adr = 0; break; case 4: - //logerror("c417_w %04x = %04x (%08x, %08x)\n", m_c417.adr, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + //logerror("c417_w %04x = %04x (%08x, %08x)\n", m_c417.adr, data, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); COMBINE_DATA(m_c417.ram + m_c417.adr); break; case 7: @@ -2532,7 +2532,7 @@ WRITE16_MEMBER(namcos23_state::c417_w) update_main_interrupts(m_main_irqcause & ~MAIN_C435_IRQ); break; default: - logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2543,7 +2543,7 @@ WRITE16_MEMBER(namcos23_state::c417_w) READ16_MEMBER(namcos23_state::c412_ram_r) { - // logerror("c412_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + // logerror("c412_ram_r %06x (%08x, %08x)\n", offset, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); if(offset < 0x100000) return m_c412.sdram_a[offset & 0xfffff]; else if(offset < 0x200000) @@ -2558,7 +2558,7 @@ READ16_MEMBER(namcos23_state::c412_ram_r) WRITE16_MEMBER(namcos23_state::c412_ram_w) { - // logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + // logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); if(offset < 0x100000) COMBINE_DATA(m_c412.sdram_a + (offset & 0xfffff)); else if(offset < 0x200000) @@ -2587,7 +2587,7 @@ READ16_MEMBER(namcos23_state::c412_r) return m_c412.status_c; } - logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0; } @@ -2609,7 +2609,7 @@ WRITE16_MEMBER(namcos23_state::c412_w) m_c412.adr += 2; break; default: - logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2620,7 +2620,7 @@ WRITE16_MEMBER(namcos23_state::c412_w) READ16_MEMBER(namcos23_state::c421_ram_r) { - // logerror("c421_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + // logerror("c421_ram_r %06x (%08x, %08x)\n", offset, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); if(offset < 0x40000) return m_c421.dram_a[offset & 0x3ffff]; else if(offset < 0x80000) @@ -2633,7 +2633,7 @@ READ16_MEMBER(namcos23_state::c421_ram_r) WRITE16_MEMBER(namcos23_state::c421_ram_w) { - // logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + // logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); if(offset < 0x40000) COMBINE_DATA(m_c421.dram_a + (offset & 0x3ffff)); else if(offset < 0x80000) @@ -2654,7 +2654,7 @@ READ16_MEMBER(namcos23_state::c421_r) return m_c421.adr; } - logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0; } @@ -2672,7 +2672,7 @@ WRITE16_MEMBER(namcos23_state::c421_w) m_c421.adr = (data & mem_mask) | (m_c421.adr & (0xffffffff ^ mem_mask)); break; default: - logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2743,7 +2743,7 @@ WRITE16_MEMBER(namcos23_state::c361_w) break; default: - logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2761,7 +2761,7 @@ READ16_MEMBER(namcos23_state::c361_r) return m_screen->vblank() ? 1 : 0; } - logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0xffff; } @@ -2793,11 +2793,11 @@ WRITE16_MEMBER(namcos23_state::ctl_w) case 6: // gmen wars spams this heavily with 0 prior to starting the GMEN board test if(data != 0) - logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; default: - logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); break; } } @@ -2815,7 +2815,7 @@ READ16_MEMBER(namcos23_state::ctl_r) } } - logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); + logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, m_maincpu->pc(), (unsigned int)m_maincpu->state_int(MIPS3_R31)); return 0xffff; } diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp index ed210008ce4..327f8292da0 100644 --- a/src/mame/drivers/naomi.cpp +++ b/src/mame/drivers/naomi.cpp @@ -9518,14 +9518,14 @@ DRIVER_INIT_MEMBER(atomiswave_state,atomiswave) READ64_MEMBER(atomiswave_state::xtrmhnt2_hack_r) { // disable ALL.Net board check - if (space.device().safe_pc() == 0xc03cb30) + if (m_maincpu->pc() == 0xc03cb30) { dc_ram[0x357fe/8] |= (uint64_t)0x200 << 48; dc_ram[0x358e2/8] |= (uint64_t)0x200 << 16; dc_ram[0x38bb2/8] |= (uint64_t)0x200 << 16; dc_ram[0x38bee/8] |= (uint64_t)0x200 << 48; } - if (space.device().safe_pc() == 0xc108240) + if (m_maincpu->pc() == 0xc108240) dc_ram[0x9acc8/8] = (dc_ram[0x9acc8/8] & 0xffffffffffff0000U) | (uint64_t)0x0009; return 0; } diff --git a/src/mame/drivers/rmhaihai.cpp b/src/mame/drivers/rmhaihai.cpp index 082123d23df..58cb32a4c0e 100644 --- a/src/mame/drivers/rmhaihai.cpp +++ b/src/mame/drivers/rmhaihai.cpp @@ -123,8 +123,8 @@ READ8_MEMBER(rmhaihai_state::keyboard_r) { static const char *const keynames[] = { "KEY0", "KEY1" }; - logerror("%04x: keyboard_r\n",space.device().safe_pc()); - switch(space.device().safe_pc()) + logerror("%04x: keyboard_r\n",m_maincpu->pc()); + switch(m_maincpu->pc()) { /* read keyboard */ case 0x0280: @@ -173,7 +173,7 @@ READ8_MEMBER(rmhaihai_state::keyboard_r) WRITE8_MEMBER(rmhaihai_state::keyboard_w) { -logerror("%04x: keyboard_w %02x\n",space.device().safe_pc(),data); +logerror("%04x: keyboard_w %02x\n",m_maincpu->pc(),data); m_keyboard_cmd = data; } diff --git a/src/mame/drivers/witch.cpp b/src/mame/drivers/witch.cpp index c220eed5371..0c7f4a46939 100644 --- a/src/mame/drivers/witch.cpp +++ b/src/mame/drivers/witch.cpp @@ -450,7 +450,7 @@ READ8_MEMBER(witch_state::prot_read_700x) Otherwise later in game some I/O (controls) reads are skipped. */ - switch(space.device().safe_pc()) + switch(m_subcpu->pc()) { case 0x23f: case 0x246: diff --git a/src/mame/drivers/x1.cpp b/src/mame/drivers/x1.cpp index afc1194e709..bbbb229a2fa 100644 --- a/src/mame/drivers/x1.cpp +++ b/src/mame/drivers/x1.cpp @@ -1697,7 +1697,7 @@ READ8_MEMBER( x1_state::x1_io_r ) else if(offset >= 0x4000 && offset <= 0xffff) { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; } else { - //logerror("(PC=%06x) Read i/o address %04x\n",space.device().safe_pc(),offset); + //logerror("(PC=%06x) Read i/o address %04x\n",m_maincpu->pc(),offset); } return 0xff; } @@ -1740,7 +1740,7 @@ WRITE8_MEMBER( x1_state::x1_io_w ) else if(offset >= 0x4000 && offset <= 0xffff) { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; } else { - //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space.device().safe_pc(),data,offset); + //logerror("(PC=%06x) Write %02x at i/o address %04x\n",m_maincpu->pc(),data,offset); } } @@ -1787,7 +1787,7 @@ READ8_MEMBER( x1_state::x1turbo_io_r ) else if(offset >= 0x4000 && offset <= 0xffff) { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; } else { - //logerror("(PC=%06x) Read i/o address %04x\n",space.device().safe_pc(),offset); + //logerror("(PC=%06x) Read i/o address %04x\n",m_maincpu->pc(),offset); } return 0xff; } @@ -1843,7 +1843,7 @@ WRITE8_MEMBER( x1_state::x1turbo_io_w ) else if(offset >= 0x4000 && offset <= 0xffff) { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; } else { - //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space.device().safe_pc(),data,offset); + //logerror("(PC=%06x) Write %02x at i/o address %04x\n",m_maincpu->pc(),data,offset); } } diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp index 65645edb7b8..010709f2301 100644 --- a/src/mame/drivers/x68k.cpp +++ b/src/mame/drivers/x68k.cpp @@ -829,7 +829,7 @@ WRITE16_MEMBER(x68k_state::x68k_sysport_w) COMBINE_DATA(&m_sysport.sram_writeprotect); break; default: -// logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",space.device().safe_pc(),data,offset); +// logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",m_maincpu->pc(),data,offset); break; } } diff --git a/src/mame/drivers/xexex.cpp b/src/mame/drivers/xexex.cpp index 4757bfbaf6b..815578c6ef3 100644 --- a/src/mame/drivers/xexex.cpp +++ b/src/mame/drivers/xexex.cpp @@ -224,7 +224,7 @@ WRITE16_MEMBER(xexex_state::spriteram_mirror_w) READ16_MEMBER(xexex_state::xexex_waitskip_r) { - if (space.device().safe_pc() == 0x1158) + if (m_maincpu->pc() == 0x1158) { space.device().execute().spin_until_trigger(m_resume_trigger); m_suspension_active = 1; diff --git a/src/mame/drivers/xmen.cpp b/src/mame/drivers/xmen.cpp index 212c25e53cb..aca0f39192b 100644 --- a/src/mame/drivers/xmen.cpp +++ b/src/mame/drivers/xmen.cpp @@ -36,7 +36,7 @@ likewise a 2 screen game WRITE16_MEMBER(xmen_state::eeprom_w) { - logerror("%06x: write %04x to 108000\n",space.device().safe_pc(),data); + logerror("%06x: write %04x to 108000\n", m_maincpu->pc(),data); if (ACCESSING_BITS_0_7) { /* bit 0 = coin counter */ diff --git a/src/mame/drivers/xyonix.cpp b/src/mame/drivers/xyonix.cpp index 6b674a975af..24aca691bb6 100644 --- a/src/mame/drivers/xyonix.cpp +++ b/src/mame/drivers/xyonix.cpp @@ -86,7 +86,7 @@ void xyonix_state::handle_coins(int coin) READ8_MEMBER(xyonix_state::io_r) { - int regPC = space.device().safe_pc(); + int regPC = m_maincpu->pc(); if (regPC == 0x27ba) return 0x88; @@ -137,7 +137,7 @@ READ8_MEMBER(xyonix_state::io_r) WRITE8_MEMBER(xyonix_state::io_w) { - //logerror ("xyonix_port_e0_w %02x - PC = %04x\n", data, space.device().safe_pc()); + //logerror ("xyonix_port_e0_w %02x - PC = %04x\n", data, m_maincpu->pc()); m_e0_data = data; } diff --git a/src/mame/drivers/yunsung8.cpp b/src/mame/drivers/yunsung8.cpp index 30837a49e7e..53a77152b65 100644 --- a/src/mame/drivers/yunsung8.cpp +++ b/src/mame/drivers/yunsung8.cpp @@ -53,7 +53,7 @@ WRITE8_MEMBER(yunsung8_state::bankswitch_w) membank("mainbank")->set_entry(data & 0x07); if (data & ~0x37) - logerror("CPU #0 - PC %04X: Bank %02X\n", space.device().safe_pc(), data); + logerror("CPU #0 - PC %04X: Bank %02X\n", m_maincpu->pc(), data); } READ8_MEMBER(yunsung8_state::sound_command_r) diff --git a/src/mame/drivers/zn.cpp b/src/mame/drivers/zn.cpp index 82057625afe..e6874bfed50 100644 --- a/src/mame/drivers/zn.cpp +++ b/src/mame/drivers/zn.cpp @@ -1647,7 +1647,7 @@ WRITE16_MEMBER(zn_state::bam2_mcu_w) case 1: m_bam2_mcu_command = data; - logerror("MCU command: %04x (PC %08x)\n", m_bam2_mcu_command, space.device().safe_pc()); + logerror("MCU command: %04x (PC %08x)\n", m_bam2_mcu_command, m_maincpu->pc()); break; } } @@ -1657,11 +1657,11 @@ READ16_MEMBER(zn_state::bam2_mcu_r) switch (offset) { case 0: - logerror("MCU port 0 read @ PC %08x mask %08x\n", space.device().safe_pc(), mem_mask); + logerror("MCU port 0 read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); break; case 2: - logerror("MCU status read @ PC %08x mask %08x\n", space.device().safe_pc(), mem_mask); + logerror("MCU status read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); switch (m_bam2_mcu_command) { -- cgit v1.2.3-70-g09d2 From cebe4c3cc9d188fb59de937a2584375026e39485 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 13 Dec 2017 16:02:04 +0000 Subject: new clones Blue's Journey / Raguy (ALH-001) [Razoola] --- hash/neogeo.xml | 33 ++++++++++++++++++++++++++++++++- src/mame/drivers/neogeo.cpp | 20 ++++++++++++++++++++ src/mame/mame.lst | 1 + 3 files changed, 53 insertions(+), 1 deletion(-) diff --git a/hash/neogeo.xml b/hash/neogeo.xml index b9a167a14e6..7e79bf3d730 100644 --- a/hash/neogeo.xml +++ b/hash/neogeo.xml @@ -1262,7 +1262,38 @@ - + + Blue's Journey / Raguy (ALH-001) + 1990 + Alpha Denshi Co. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Dragon Saber - After Story of Dragon Spirit (Tourvision PCE bootleg) 1991 diff --git a/src/mame/drivers/tourvis.cpp b/src/mame/drivers/tourvis.cpp index 05837d2d190..781a7e81f1e 100644 --- a/src/mame/drivers/tourvis.cpp +++ b/src/mame/drivers/tourvis.cpp @@ -14,129 +14,7 @@ By now, six known BIOS versions, U4-52 (dumped from a board with-subboard PCB), U4-55 (dumped from an integrated PCB) and U4-60 (dumped from a board with-subboard PCB). - Known games (followed by game ID, some are duplicate): - - 1943 Kai (65) - Adventure Island (64) - Aero Blaster (32) - After Burner II (46) - Alice in Wonderland (61) - Ankoku Densetsu (Legendary Axe II) (33) - Armed-F (?) - Ballistix (186) - Barunba (39) - Batman (30) - Be Ball (93) - * Blodia - Bomberman (71) - Bomberman 93 (204) - Bull Fight (185) - Burning Angels (49) - Cadash (203) - Chozetsurinjin Beraboh Man (Super Foolish Man) (27) - Chuka Taisen (37) - Columns (90) - Coryoon (43) - * Cross Wiber - Cyber Core (13) - Daisempuu (3) - Dead Moon (?) - Devil Crash (47) - Die Hard (73) - Dodge Ball (194) - Doraemon Meikyuu Daisakusen (20) - Doreamon - Nobita's Dorabian Night (Doraemon II, 43) - Down Load (43) - Dragon Egg! (98) - Dragon Saber (65) - Dragon Spirit (?) - Drop Rock Hora Hora (12) - Dungeon Explorer (209) - * F1 Triple Battle - Fighting Run (195) - Final Blaster (29) - Final Lap Twin (79) - Final Match Tennis (62) - Final Soldier (45) - Formation Soccer (1) - Gomola Speed (27) - Gradius (187) - Gunhed (148) - Hana Taka Daka (Super Long Nose Goblin) (6) - * Hatris - Hit The Ice (97) - Image Fight (99) - Jackie Chan (54) - Jinmu Densho (19) - Kato & Ken (42) - Kiki Kaikai (120) - Knight Rider Special (193) - Legend Of Hero Tomna (56) - Makyo Densetsu - The Legendary Axe (40) - Mashin Eiyuden Wataru (27) - Mesopotamia (197) - Mizubaku Daibouken Liquid Kids (10) (marketed as "Parasol Stars II") - Mr. Heli (23) - Ninja Ryukenden (10) - Operation Wolf (26) - Ordyne (94) - Out Run (38) - Override (53) - Pac-Land (16) - * Paranoia (18) - PC Genjin (8) - PC Genjin 2 (84) - PC Denjin Punkic Cyborg (201) - Power Drift (200) - Power Eleven (83) - * Power Golf - Power League IV (?) - Power Sports (199) - Power Tennis (183) - Pro Yakyuu World Stadium '91 (192) - Psycho Chaser (14) - Puzzle Boy (57) - Puzznic (69) - R-Type II (61) - * Rabio Lepus Special - Raiden (111) - Rastan Saga II (33, possibly incorrect riser) - Saigo no Nindou (44) - Saint Dragon (36) - Salamander (184) - Shinobi (5) - Side Arms (2) - Skweek (89) - Sokoban World (66) - Soldier Blade (23) - Son Son II (80) - Special Criminal Investigation (58) - Spin Pair (50) - Splatterhouse (148) - Super Star Soldier (42) - Super Volley ball (9) - Tatsujin (31) - Terra Cresta II (27) - The NewZealand Story (11) - Thunder Blade (34) - Tiger Road (10) - * Titan - Toilet Kids (196) - Toy Shop Boys (51) - Tricky (42) - * TV Sports - USA Pro Basketball (206) - marketed as NBA - Veigues (40) - Vigilante (8) - Violent Soldier (no ID, V1 cart) - Volfied (68) - W-Ring (21) - Winning Shot (28) - World Jockey (202) - Xevious (?) - - Rumored games: - * Parasol Stars - often been mentioned, but still not confirmed, for Tourvision. For now it's been added from its NEC PC-Engine dump, which it would be likely identical. + Known games list can be found in hash/pce_tourvision.xml. * Denotes Not Dumped @@ -327,11 +205,13 @@ public: DECLARE_WRITE8_MEMBER(tourvision_i8155_b_w); DECLARE_WRITE8_MEMBER(tourvision_i8155_c_w); DECLARE_WRITE_LINE_MEMBER(tourvision_timer_out); + + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(tourvision_cart); + +private: required_device m_subcpu; required_device m_cart; uint32_t m_rom_size; - - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(tourvision_cart); }; DEVICE_IMAGE_LOAD_MEMBER( tourvision_state, tourvision_cart ) @@ -577,4 +457,4 @@ ROM_START(tourvis) ROM_END -GAME( 19??, tourvis, 0, tourvision, tourvision, tourvision_state, pce_common, ROT0, "bootleg (Tourvision)", "Tourvision PCE bootleg", MACHINE_IS_BIOS_ROOT | MACHINE_NOT_WORKING ) +GAME( 19??, tourvis, 0, tourvision, tourvision, tourvision_state, pce_common, ROT0, "bootleg (Tourvision)", "Tourvision PCE bootleg", MACHINE_IS_BIOS_ROOT | MACHINE_NOT_WORKING ) -- cgit v1.2.3-70-g09d2 From d20e1498600c4b5e68a08cfa1b203e3aca970a46 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Wed, 13 Dec 2017 10:52:26 -0700 Subject: smc91c9x: Add packet padding and add variable transmit timing. (nw) --- src/devices/machine/smc91c9x.cpp | 64 ++++++++++++++++++++++++++-------------- src/devices/machine/smc91c9x.h | 7 +++-- 2 files changed, 47 insertions(+), 24 deletions(-) diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index 1ff8872b8d0..2e9cb12932d 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -197,7 +197,9 @@ void smc91c9x_device::device_reset() m_tx_timer->reset(); // Setup real network if enabled + m_network_available = false; if (netdev_count()) { + m_network_available = true; osd_list_network_adapters(); unsigned char const *const mac = (const unsigned char *)get_mac(); if (VERBOSE & LOG_GENERAL) @@ -283,7 +285,7 @@ void smc91c9x_device::clear_rx_fifo() { } -int smc91c9x_device::is_broadcast(uint8_t mac_address[]) +int smc91c9x_device::is_broadcast(const uint8_t *mac_address) { int i; @@ -301,7 +303,7 @@ int smc91c9x_device::is_broadcast(uint8_t mac_address[]) } -int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) +int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t *mac_address) { // tcpdump -i eth0 -q ether host 08:00:1e:01:ae:a5 or ether broadcast or ether dst 09:00:1e:00:00:00 or ether dst 09:00:1e:00:00:01 // wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01 @@ -325,7 +327,7 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[]) } // skip Ethernet broadcast packets if RECV_BROAD is not set - if (is_broadcast((uint8_t *)mac_address)) + if (is_broadcast(mac_address)) { LOG(" -- Broadcast rx\n"); return 2; @@ -379,7 +381,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length) // Try to request a packet number int packet_num; if (!alloc_req(0, packet_num)) { - logerror("recv_cb: Couldn't allocate a recieve packet\n"); + logerror("recv_cb: Couldn't allocate a receive packet\n"); return; } @@ -457,6 +459,12 @@ void smc91c9x_device::update_ethernet_irq() else { m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY; } + //if (m_comp_tx.empty()) { + // m_reg[EREG_INTERRUPT] &= ~EINT_TX; + //} + //else { + // m_reg[EREG_INTERRUPT] |= EINT_TX; + //} // Check rx completion fifo empty if (m_comp_rx.empty()) m_reg[EREG_INTERRUPT] &= ~EINT_RCV; @@ -504,24 +512,36 @@ TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) if (is_broadcast(&tx_buffer[4])) m_reg[EREG_EPH_STATUS] |= 0x0040; - // signal a transmit interrupt + // Set Tx Empty interrupt + // TODO: If more than 1 packet is enqueued should wait for all to finish + //m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY; m_reg[EREG_INTERRUPT] |= EINT_TX; + //m_comp_tx.erase(m_comp_tx.begin()); m_sent++; update_stats(); int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; - + // Remove status, length, [pad], control + if (tx_buffer[buffer_len - 1] & 0x20) + buffer_len -= 5; + else + buffer_len -= 6; + // Add padding + if (buffer_len < 64 && (m_reg[EREG_TCR] & 0x0080)) { + while (buffer_len < 64) + tx_buffer[4 + buffer_len++] = 0x00; + } if (VERBOSE & LOG_GENERAL) { logerror("TX: "); - for (int i = 4; i < (4 + ETHERNET_ADDR_SIZE); i++) - logerror("%.2X", tx_buffer[i]); + for (int i = 0; i < ETHERNET_ADDR_SIZE; i++) + logerror("%.2X", tx_buffer[4 + i]); logerror(" "); - for (int i = 0; i < (buffer_len - (ETHERNET_ADDR_SIZE + 4)); i++) - logerror("%.2X", tx_buffer[4 + ETHERNET_ADDR_SIZE + i]); + for (int i = ETHERNET_ADDR_SIZE; i < buffer_len; i++) + logerror("%.2X", tx_buffer[4 + i]); logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len); } @@ -557,14 +577,8 @@ TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) } else { - // odd or even sized frame ? - if (tx_buffer[buffer_len - 1] & 0x20) - buffer_len--; - else - buffer_len -= 2; - // Send the frame - if (!send(&tx_buffer[4], buffer_len - 4)) + if (!send(&tx_buffer[4], buffer_len)) { // FIXME: failed to send the Ethernet packet //logerror("failed to send Ethernet packet\n"); @@ -574,8 +588,8 @@ TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame) // Loopback if loopback is set or fduplx is set // TODO: Figure out correct size // TODO: Check for addtional filter options for FDUPLX mode - if ((m_reg[EREG_TCR] & 0x2002) || (m_reg[EREG_TCR] & 0x0800)) - recv_cb(&tx_buffer[4], buffer_len - 2); + if ((m_reg[EREG_TCR] & 0x2002) || (m_network_available && (m_reg[EREG_TCR] & 0x0800))) + recv_cb(&tx_buffer[4], buffer_len); } } // Update status in the transmit word @@ -664,7 +678,13 @@ void smc91c9x_device::process_command(uint16_t data) const int packet_number = m_reg[EREG_PNR_ARR] & 0xff; // Push packet number tx completion fifo m_comp_tx.push_back(packet_number); - m_tx_timer->adjust(attotime::from_usec(10)); + // Calculate transmit time + uint8_t *const tx_buffer = &m_buffer[packet_number * ETHER_BUFFER_SIZE]; + int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff; + buffer_len -= 6; + // ~16 Mbps + int usec = ((buffer_len * 8) >> 4) + 1; + m_tx_timer->adjust(attotime::from_usec(usec)); } break; @@ -711,7 +731,7 @@ READ16_MEMBER( smc91c9x_device::read ) case EREG_PNR_ARR: if ( ACCESSING_BITS_8_15 ) { - m_reg[EREG_INTERRUPT] &= ~0x0008; + m_reg[EREG_INTERRUPT] &= ~EINT_ALLOC; update_ethernet_irq(); } break; @@ -768,7 +788,7 @@ WRITE16_MEMBER( smc91c9x_device::write ) /* update the data generically */ - if (offset != 7 && offset < sizeof(m_reg)) + if (offset != EREG_BANK && offset < sizeof(m_reg)) LOG("%s:smc91c9x_w(%s) = [%04X]<-%04X & (%04X & %04X)\n", machine().describe_context(), ethernet_regname[offset], offset, data, mem_mask , m_regmask[offset]); mem_mask &= m_regmask[offset]; diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h index 9f9cf1558e0..cd4018c4f65 100644 --- a/src/devices/machine/smc91c9x.h +++ b/src/devices/machine/smc91c9x.h @@ -40,6 +40,9 @@ private: static constexpr unsigned ETHER_BUFFERS = 16; static constexpr unsigned ETHERNET_ADDR_SIZE = 6; + // external network is present + bool m_network_available; + // mmu // The bits in these vectors indicate a packet has been allocated u32 m_alloc_rx, m_alloc_tx; @@ -74,8 +77,8 @@ private: emu_timer* m_tx_timer; - int ethernet_packet_is_for_me(const uint8_t mac_address[]); - int is_broadcast(uint8_t mac_address[]); + int ethernet_packet_is_for_me(const uint8_t *mac_address); + int is_broadcast(const uint8_t *mac_address); void update_ethernet_irq(); void update_stats(); -- cgit v1.2.3-70-g09d2 From f331940f870d0996a8cbb0fa1982c9b69c154a3d Mon Sep 17 00:00:00 2001 From: Ted Green Date: Wed, 13 Dec 2017 10:53:25 -0700 Subject: vegas: Disconnect ethernet for warfa. Fixes game hang at start. (nw) --- src/mame/drivers/vegas.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index acf6e55bf9f..6386a709f5d 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -2306,6 +2306,8 @@ DRIVER_INIT_MEMBER(vegas_state,warfa) { /* speedups */ m_maincpu->mips3drc_add_hotspot(0x8009436C, 0x0C031663, 250); /* confirmed */ + // TODO: For some reason game hangs if ethernet is on + m_ethernet->set_link_connected(false); } -- cgit v1.2.3-70-g09d2 From f8a56513de2c5bc32c12f66d072f5754652302d1 Mon Sep 17 00:00:00 2001 From: Ted Green Date: Wed, 13 Dec 2017 10:54:19 -0700 Subject: seattle: Add gearshift to sfrush and sfrushrk. --- src/mame/drivers/seattle.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp index 9f1dc9df308..48ad4959f39 100644 --- a/src/mame/drivers/seattle.cpp +++ b/src/mame/drivers/seattle.cpp @@ -496,6 +496,7 @@ WRITE32_MEMBER(seattle_state::interrupt_config_w) { int irq; COMBINE_DATA(&m_interrupt_config); + //logerror("interrupt_config_w: m_interrupt_config=%08x\n", m_interrupt_config); /* VBLANK: clear anything pending on the old IRQ */ if (m_vblank_irq_num != 0) @@ -1295,15 +1296,18 @@ static INPUT_PORTS_START( sfrush ) PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON14 ) PORT_NAME("Track 2") PORT_PLAYER(1) /* track 2 */ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON15 ) PORT_NAME("Track 3") PORT_PLAYER(1) /* track 3 */ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON16 ) PORT_NAME("Track 4") PORT_PLAYER(1) /* track 4 */ - PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("1st Gear") PORT_PLAYER(1) /* 1st gear */ - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("2nd Gear") PORT_PLAYER(1) /* 2nd gear */ - PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("3rd Gear") PORT_PLAYER(1) /* 3rd gear */ - PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("4th Gear") PORT_PLAYER(1) /* 4th gear */ + PORT_BIT( 0x0f00, IP_ACTIVE_LOW, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, seattle_state, gearshift_r, "GEAR" ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_VOLUME_UP ) PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("GEAR") + PORT_BIT( 0x1, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("1st Gear") PORT_PLAYER(1) /* 1st gear */ + PORT_BIT( 0x2, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("2nd Gear") PORT_PLAYER(1) /* 2nd gear */ + PORT_BIT( 0x4, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("3rd Gear") PORT_PLAYER(1) /* 3rd gear */ + PORT_BIT( 0x8, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("4th Gear") PORT_PLAYER(1) /* 4th gear */ + PORT_MODIFY("IN2") PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED ) -- cgit v1.2.3-70-g09d2 From ba2694fb099641c29c56e6c1141c81eda6abc2f7 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 13 Dec 2017 19:06:35 +0100 Subject: New machines marked as NOT_WORKING ---------------------------------- Ninja Gaiden (Tiger handheld) [hap, Sean Riddle] --- src/mame/drivers/hh_sm510.cpp | 112 ++++++++++++++++++++++++++++++++++++++++++ src/mame/drivers/tispeak.cpp | 5 +- src/mame/drivers/tispellb.cpp | 2 +- src/mame/mame.lst | 1 + 4 files changed, 116 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index 9fc771ed7e3..18a663de354 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -13,6 +13,7 @@ TODO: - improve/redo SVGs of: gnw_mc25, gnw_eg26, exospace - confirm gnw_mc25/gnw_eg26 rom (dumped from Soviet clone, but pretty confident that it's same) + - identify lcd segments for tgaiden ***************************************************************************/ @@ -1894,6 +1895,107 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Ninja Gaiden (model 7-787) + * Sharp SM510 under epoxy (die label M82) + * lcd screen with custom segments, 1 led, 1-bit sound + +***************************************************************************/ + +class tgaiden_state : public hh_sm510_state +{ +public: + tgaiden_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 5; + m_inp_fixed = 5; + } + + DECLARE_WRITE8_MEMBER(write_r); +}; + +// handlers + +WRITE8_MEMBER(tgaiden_state::write_r) +{ + // R1: speaker out + piezo_r1_w(space, 0, data & 1); + + // R2: led + //.. +} + +// config + +static INPUT_PORTS_START( tgaiden ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Jump") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Attack/Pick") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tgaiden ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(tgaiden_state, write_r)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1920, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1920-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Batman (model 7-799) @@ -3099,6 +3201,15 @@ ROM_START( tkarnov ) ROM_END +ROM_START( tgaiden ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "m82", 0x0000, 0x1000, CRC(278eafb0) SHA1(14396a0010bade0fde705969151200ed432321e7) ) + + ROM_REGION( 100000, "svg", 0) + ROM_LOAD( "tgaiden.svg", 0, 100000, NO_DUMP ) +ROM_END + + ROM_START( tbatman ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "597", 0x0000, 0x1000, CRC(8b7acc97) SHA1(fe811675dc5c5ef9f6f969685c933926c8b9e868) ) @@ -3224,6 +3335,7 @@ CONS( 1989, tgaunt, 0, 0, tgaunt, tgaunt, tgaunt_state, 0, "T CONS( 1991, trobhood, tgaunt, 0, trobhood, trobhood, tgaunt_state, 0, "Tiger Electronics", "Robin Hood (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1989, tddragon, 0, 0, tddragon, tddragon, tddragon_state, 0, "Tiger Electronics (licensed from Technos/Tradewest)", "Double Dragon (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1989, tkarnov, 0, 0, tkarnov, tkarnov, tkarnov_state, 0, "Tiger Electronics (licensed from Data East)", "Karnov (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, tgaiden, 0, 0, tgaiden, tgaiden, tgaiden_state, 0, "Tiger Electronics (licensed from Tecmo)", "Ninja Gaiden (handheld)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) CONS( 1989, tbatman, 0, 0, tbatman, tbatman, tbatman_state, 0, "Tiger Electronics", "Batman (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, tsharr2, 0, 0, tsharr2, tsharr2, tsharr2_state, 0, "Tiger Electronics (licensed from Sega)", "Space Harrier II (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/tispeak.cpp b/src/mame/drivers/tispeak.cpp index f71601cbfdb..ad22a585acc 100644 --- a/src/mame/drivers/tispeak.cpp +++ b/src/mame/drivers/tispeak.cpp @@ -636,8 +636,7 @@ WRITE16_MEMBER(tispeak_state::snspellc_write_r) WRITE16_MEMBER(tispeak_state::snspellc_write_o) { // O3210: TMS5100 CTL8124 - m_o = bitswap<8>(data,7,6,5,4,3,0,1,2); - m_tms5100->ctl_w(space, 0, m_o & 0xf); + m_tms5100->ctl_w(space, 0, bitswap<4>(data,3,0,1,2)); } READ8_MEMBER(tispeak_state::snspellc_read_k) @@ -689,7 +688,7 @@ void tispeak_state::k28_prepare_display(u8 old, u8 data) WRITE16_MEMBER(tispeak_state::k28_write_r) { // R1234: TMS5100 CTL8421 - m_tms5100->ctl_w(space, 0, bitswap<8>(data,0,0,0,0,1,2,3,4) & 0xf); + m_tms5100->ctl_w(space, 0, bitswap<4>(data,1,2,3,4)); // R0: TMS5100 PDC pin m_tms5100->pdc_w(data & 1); diff --git a/src/mame/drivers/tispellb.cpp b/src/mame/drivers/tispellb.cpp index b2eca5f3cd4..1c73e9d6692 100644 --- a/src/mame/drivers/tispellb.cpp +++ b/src/mame/drivers/tispellb.cpp @@ -199,7 +199,7 @@ WRITE16_MEMBER(tispellb_state::sub_write_o) READ8_MEMBER(tispellb_state::rev1_ctl_r) { // main CTL3210 <- sub O6043 - return bitswap<8>(m_sub_o,7,5,2,1,6,0,4,3) & 0xf; + return bitswap<4>(m_sub_o,6,0,4,3); } WRITE16_MEMBER(tispellb_state::sub_write_r) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 52b206bc560..65296a4c735 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14722,6 +14722,7 @@ tbatfor // Tiger tbatman // Tiger tbtoads // Tiger tddragon // Tiger +tgaiden // Tiger tgaunt // Tiger tjdredd // Tiger tkarnov // Tiger -- cgit v1.2.3-70-g09d2 From edb29f8eae9800647bf73a3ce4dd596d25aeb4a1 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 13 Dec 2017 19:34:02 +0100 Subject: new clones promoted to working --------------------------------------------- Tazz-Mania (Arfyc / Rodmar bootleg) [Ivan Vangelista] --- src/mame/drivers/scobra.cpp | 85 +++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 79 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/scobra.cpp b/src/mame/drivers/scobra.cpp index 4b872b0432a..0c6ad0a433b 100644 --- a/src/mame/drivers/scobra.cpp +++ b/src/mame/drivers/scobra.cpp @@ -4,7 +4,7 @@ Super Cobra hardware -NOTE: Eventually to be merged into GALAXIAN.C +NOTE: Eventually to be merged into galaxian.cpp TODO: ---- @@ -30,7 +30,7 @@ Notes/Tidbits: differences are the title, copyright removed, different encryptions or no encryption, plus hustlerb has a different memory map. -- In Tazmania, when set to Upright mode, player 2 left skips the current +- In Tazmania and clones, when set to Upright mode, player 2 left skips the current level ***************************************************************************/ @@ -52,7 +52,6 @@ public: : scramble_state(mconfig, type, tag), m_soundram(*this, "soundram") { } - optional_shared_ptr m_soundram; DECLARE_READ8_MEMBER(scobra_soundram_r); DECLARE_WRITE8_MEMBER(scobra_soundram_w); DECLARE_READ8_MEMBER(scobra_type2_ppi8255_0_r); @@ -64,6 +63,9 @@ public: DECLARE_WRITE8_MEMBER(hustler_ppi8255_0_w); DECLARE_WRITE8_MEMBER(hustler_ppi8255_1_w); DECLARE_CUSTOM_INPUT_MEMBER(stratgyx_coinage_r); + +private: + optional_shared_ptr m_soundram; }; @@ -148,6 +150,26 @@ static ADDRESS_MAP_START( type2_map, AS_PROGRAM, 8, scobra_state ) AM_RANGE(0xb00e, 0xb00e) AM_WRITE(galaxold_flip_screen_x_w) ADDRESS_MAP_END +static ADDRESS_MAP_START( tazmani3_map, AS_PROGRAM, 8, scobra_state ) + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x8000, 0x87ff) AM_RAM + AM_RANGE(0x8800, 0x883f) AM_RAM_WRITE(galaxold_attributesram_w) AM_SHARE("attributesram") + AM_RANGE(0x8840, 0x885f) AM_RAM AM_SHARE("spriteram") + AM_RANGE(0x8860, 0x887f) AM_RAM AM_SHARE("bulletsram") + AM_RANGE(0x8880, 0x88ff) AM_RAM + AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(galaxold_videoram_w) AM_SHARE("videoram") + AM_RANGE(0x9400, 0x97ff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) /* mirror */ + AM_RANGE(0x9800, 0x9800) AM_DEVREAD("watchdog", watchdog_timer_device, reset_r) + AM_RANGE(0xa000, 0xa003) AM_DEVREADWRITE("ppi8255_0", i8255_device, read, write) + AM_RANGE(0xa800, 0xa803) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write) + AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_stars_enable_w) + AM_RANGE(0xb001, 0xb001) AM_WRITE(galaxold_nmi_enable_w) + AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_coin_counter_0_w) + AM_RANGE(0xb008, 0xb008) AM_WRITE(galaxold_coin_counter_1_w) + AM_RANGE(0xb00c, 0xb00c) AM_WRITE(galaxold_flip_screen_y_w) + AM_RANGE(0xb00e, 0xb00e) AM_WRITE(galaxold_flip_screen_x_w) +ADDRESS_MAP_END + static ADDRESS_MAP_START( hustler_map, AS_PROGRAM, 8, scobra_state ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x8000, 0x87ff) AM_RAM @@ -449,7 +471,7 @@ static INPUT_PORTS_START( darkplnt ) PORT_BIT( 0xfc, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) /* scrambled dial */ INPUT_PORTS_END -static INPUT_PORTS_START( tazmania ) +static INPUT_PORTS_START( tazmani2 ) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) @@ -497,6 +519,49 @@ static INPUT_PORTS_START( tazmania ) INPUT_PORTS_END +static INPUT_PORTS_START( tazmani3 ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) + + PORT_START("IN1") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) + PORT_DIPSETTING( 0x01, "3" ) + PORT_DIPSETTING( 0x00, "5" ) + PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) + + PORT_START("IN2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL + PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00, "Coin A 1/2 Coin B 2/1" ) + PORT_DIPSETTING( 0x04, "Coin A 1/3 Coin B 3/1" ) + PORT_DIPSETTING( 0x06, "Coin A 1/4 Coin B 4/1" ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Upright ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY + PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) +INPUT_PORTS_END + /* cocktail mode is N/A */ static INPUT_PORTS_START( rescue ) PORT_START("IN0") @@ -891,6 +956,13 @@ static MACHINE_CONFIG_DERIVED( type2, type1 ) MCFG_CPU_PROGRAM_MAP(type2_map) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( tazmani3, type2 ) + + /* basic machine hardware */ + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_PROGRAM_MAP(tazmani3_map) +MACHINE_CONFIG_END + static MACHINE_CONFIG_DERIVED( stratgyx, type2 ) @@ -1123,6 +1195,7 @@ ROM_START( tazmani2 ) ROM_LOAD( "colr6f.cpu", 0x0000, 0x0020, CRC(fce333c7) SHA1(f63a214dc47c5e7c80db000b0b6a261ca8da6629) ) ROM_END +// PCBs: RODMAR 6920-00-01 P1 and 6920-01-01 P1 but Arfyc copyright ROM_START( tazmani3 ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "2ck.cpu", 0x0000, 0x1000, CRC(e8b6f9c3) SHA1(121f83274b3fdb4b2cb4bd0160d61886825c8793) ) // sldh @@ -1624,8 +1697,8 @@ GAME( 1982, strongx, stratgyx, stratgyx, stratgyx, scobra_state, stratgyx, GAME( 1982, darkplnt, 0, darkplnt, darkplnt, scobra_state, darkplnt, ROT180, "Stern Electronics", "Dark Planet", MACHINE_SUPPORTS_SAVE ) -GAME( 1982, tazmani2, tazmania, type2, tazmania, scobra_state, tazmani2, ROT90, "Stern Electronics", "Tazz-Mania (set 2, alt hardware)", MACHINE_SUPPORTS_SAVE ) -GAME( 1982, tazmani3, tazmania, type2, tazmania, scobra_state, tazmani2, ROT90, "bootleg (Rodmar)", "Tazz-Mania (Rodmar bootleg)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // different i8255 hook up +GAME( 1982, tazmani2, tazmania, type2, tazmani2, scobra_state, tazmani2, ROT90, "Stern Electronics", "Tazz-Mania (set 2, alt hardware)", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, tazmani3, tazmania, tazmani3, tazmani3, scobra_state, 0, ROT90, "bootleg (Arfyc / Rodmar)", "Tazz-Mania (Arfyc / Rodmar bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, rescue, 0, rescue, rescue, scobra_state, rescue, ROT90, "Stern Electronics", "Rescue", MACHINE_SUPPORTS_SAVE ) GAME( 1982, rescueb, rescue, rescueb, rescue, scobra_state, rescue, ROT90, "bootleg (Videl Games)", "Tuono Blu (bootleg of Rescue)", MACHINE_SUPPORTS_SAVE ) -- cgit v1.2.3-70-g09d2 From dce8c25a39e677898b5d77bf5f48d155fe31f9c3 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 13 Dec 2017 19:43:39 +0100 Subject: new machines marked as not_working: Golden Hexa [Yohji, Smitdogg, The Dumping Union] Hexa President [Yasu] --- scripts/target/mame/arcade.lua | 1 + src/mame/arcade.flt | 1 + src/mame/drivers/yuvomz80.cpp | 117 +++++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 ++ 4 files changed, 122 insertions(+) create mode 100644 src/mame/drivers/yuvomz80.cpp diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 9a5fed7b765..de933af5893 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -4771,5 +4771,6 @@ files { MAME_DIR .. "src/mame/drivers/xyonix.cpp", MAME_DIR .. "src/mame/includes/xyonix.h", MAME_DIR .. "src/mame/video/xyonix.cpp", + MAME_DIR .. "src/mame/drivers/yuvomz80.cpp", } end diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index c0a2ca37c62..ff27d6f9671 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -1355,6 +1355,7 @@ xyonix.cpp yiear.cpp yunsun16.cpp yunsung8.cpp +yuvomz80.cpp zac_1.cpp zac_2.cpp zac_proto.cpp diff --git a/src/mame/drivers/yuvomz80.cpp b/src/mame/drivers/yuvomz80.cpp new file mode 100644 index 00000000000..cae1633cfb8 --- /dev/null +++ b/src/mame/drivers/yuvomz80.cpp @@ -0,0 +1,117 @@ +// license:BSD-3-Clause +// copyright-holders: + +// Skeleton driver for Yuvo / Yubis Z80 based medal games. + +#include "emu.h" +#include "cpu/z80/z80.h" +#include "machine/i8255.h" +#include "sound/ymz280b.h" +#include "speaker.h" + +/* +This tries to document the available info, but even game titles should be taken with a grain of salt. +YouTube video references: +Hexa President: http://www.youtube.com/watch?v=5Ea5HxH2zwM&t=8s +Golden Hexa: http://www.youtube.com/watch?v=3u1ccTo3SGI +*/ + +/* +Golden Hexa by Yubis + +PCBs: + +Yuvo PCC116B - maincpu board +- TMPZ84C00AP-8 +- 8 MHz XTAL +- maincpu ROM +- 2 x TMP82C55AN-2 +- 2 x 8 dips bank + +Yuvo PCO124B - sound board +- TMPZ84C00AP-8 +- 8 MHz XTAL +- audiocpu ROM +- YMZ280B-F +- sample ROMs + +Yuvo PCI117B - I/O board +- connectors and ttl chips +*/ + +class yuvomz80_state : public driver_device +{ +public: + yuvomz80_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") + { } + +private: + required_device m_maincpu; +}; + +static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, yuvomz80_state ) + AM_RANGE(0x0000, 0x1fff) AM_ROM AM_REGION("maincpu", 0) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( io_map, AS_PROGRAM, 8, yuvomz80_state ) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( audio_mem_map, AS_PROGRAM, 8, yuvomz80_state ) + AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("audiocpu", 0) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( audio_io_map, AS_PROGRAM, 8, yuvomz80_state ) + ADDRESS_MAP_GLOBAL_MASK(0xff) +ADDRESS_MAP_END + +static INPUT_PORTS_START( goldhexa ) +INPUT_PORTS_END + +static MACHINE_CONFIG_START( yuvomz80 ) + MCFG_CPU_ADD("maincpu", Z80, XTAL_8MHz) + MCFG_CPU_PROGRAM_MAP(mem_map) + MCFG_CPU_IO_MAP(io_map) + + MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz) + MCFG_CPU_PROGRAM_MAP(audio_mem_map) + MCFG_CPU_IO_MAP(audio_io_map) + + MCFG_DEVICE_ADD("ppi8255_0", I8255A, 0) + + MCFG_DEVICE_ADD("ppi8255_1", I8255A, 0) + + MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") + MCFG_SOUND_ADD("ymz", YMZ280B, XTAL_8MHz) + MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) + MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) +MACHINE_CONFIG_END + + +ROM_START( goldhexa ) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD( "ghp_program_ver.1.02.ic8", 0x0000, 0x10000, CRC(a21a8cfd) SHA1(324f54ca6e17373138df2854f8c5e77cf78e9434) ) // 1111xxxxxxxxxxxx = 0xFF + + ROM_REGION(0x10000, "audiocpu", 0) + ROM_LOAD( "hp-sp_ver.1.01.ic7", 0x0000, 0x2000, CRC(05133b91) SHA1(2fe931e55c503f15aedfb1c1ea14c257f57c564b) ) // 1xxxxxxxxxxxx = 0xFF + + ROM_REGION(0x100000, "ymz", 0) + ROM_LOAD( "ghp_pcm-a_ver.1.01.ic12", 0x00000, 0x80000, CRC(08de888b) SHA1(a6b68accb136481f45b65eab33e0bab5212a1daf) ) + ROM_LOAD( "ghp_pcm-b_ver.1.01.ic13", 0x80000, 0x80000, CRC(161838c9) SHA1(52b9c324b01702c1164a462af371d82e8c2eea43) ) +ROM_END + +ROM_START( hexapres ) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD( "hexapres.bin", 0x0000, 0x10000, NO_DUMP ) + + ROM_REGION(0x10000, "audiocpu", 0) + ROM_LOAD( "ghp_snd.bin", 0x0000, 0x10000, CRC(8933b6ea) SHA1(a66157f2b7407ab374db07bcda34f066740f14dc) ) + + ROM_REGION(0x100000, "ymz", 0) + ROM_LOAD( "ghp_voia.bin", 0x00000, 0x80000, CRC(cf3e4c43) SHA1(6d348054704d1d0082d6166701ab84cb162b3a26) ) + ROM_LOAD( "ghp_voib.bin", 0x80000, 0x80000, CRC(8be745fe) SHA1(840bbb212c8c519f2e4633f8db731fcf3f55635a) ) +ROM_END + +GAME( 200?, goldhexa, 0, yuvomz80, goldhexa, yuvomz80_state, 0, ROT0, "Yubis", "Golden Hexa", MACHINE_IS_SKELETON_MECHANICAL ) +GAME( 200?, hexapres, 0, yuvomz80, goldhexa, yuvomz80_state, 0, ROT0, "Yubis", "Hexa President", MACHINE_IS_SKELETON_MECHANICAL ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 65296a4c735..7b856833f72 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -38795,6 +38795,9 @@ magix // (c) 1995 Yun Sung magixb // bootleg rocktris // (c) 1994? Yun Sung +@source:yuvomz80.cpp +goldhexa // Yuvo / Yubis +hexapres // @source:z100.cpp z100 // -- cgit v1.2.3-70-g09d2 From 758d836008dd02bb1a050cd5f506338a3d3dc2c6 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 13 Dec 2017 19:47:12 +0100 Subject: mame.lst: preserve spacing (nw) --- src/mame/mame.lst | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 7b856833f72..94c4eafc2e9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -38798,6 +38798,7 @@ rocktris // (c) 1994? Yun Sung @source:yuvomz80.cpp goldhexa // Yuvo / Yubis hexapres // + @source:z100.cpp z100 // -- cgit v1.2.3-70-g09d2 From aab04d7c4fb1ec13acb238ef87ff884a6f0100ba Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 13 Dec 2017 21:03:06 +0200 Subject: pet: Fixed video RAM mirroring. [Curt Coder] --- src/mame/drivers/pet.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pet.cpp b/src/mame/drivers/pet.cpp index 3f6a2835f42..8e2bed8698c 100644 --- a/src/mame/drivers/pet.cpp +++ b/src/mame/drivers/pet.cpp @@ -482,7 +482,10 @@ READ8_MEMBER( pet_state::read ) break; case SEL8: - data = m_video_ram[offset & (m_video_ram_size - 1)]; + if (!(offset & 0x800)) + { + data = m_video_ram[offset & (m_video_ram_size - 1)]; + } break; case SEL9: @@ -575,7 +578,10 @@ WRITE8_MEMBER( pet_state::write ) break; case SEL8: - m_video_ram[offset & (m_video_ram_size - 1)] = data; + if (!(offset & 0x800)) + { + m_video_ram[offset & (m_video_ram_size - 1)] = data; + } break; case SELE: -- cgit v1.2.3-70-g09d2 From 472fbb5184ef4f36463b278fe881af89d100b222 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 13 Dec 2017 21:25:28 +0200 Subject: Compile fix. (nw) --- src/devices/machine/68340.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 0ecae23b1ba..2701909f18b 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -69,7 +69,7 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) } COMBINE_DATA(&m_m68340_base); - logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %08x (%08x) (m_m68340_base write)\n", pc(), offset*4,data,mem_mask); // map new modules if (m_m68340_base&1) @@ -103,7 +103,7 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_base_w ) } else { - logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc, offset*4,data,mem_mask); + logerror("%08x m68340_internal_base_w %08x, %04x (%04x) (should fall through?)\n", pc(), offset*4,data,mem_mask); } -- cgit v1.2.3-70-g09d2 From 34ab1202e79a90f9d409e1aa9ec9f273056399f6 Mon Sep 17 00:00:00 2001 From: Stiletto Date: Wed, 13 Dec 2017 14:26:34 -0500 Subject: Update whatis.rst (nw) self-service --- docs/source/whatis.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/source/whatis.rst b/docs/source/whatis.rst index a057398c2ad..5c612960901 100644 --- a/docs/source/whatis.rst +++ b/docs/source/whatis.rst @@ -8,7 +8,7 @@ MAME's purpose is to preserve decades of software history. As electronic technol | | **MAME(R)** | **Copyright (c) 1997-2017 by Nicola Salmoria and the MAME team** -| **MAME is a trademark owned by Nicola Salmoria** +| **MAME is a trademark owned by Gregory Ember** | -- cgit v1.2.3-70-g09d2 From edb558b9161c020102c9e1da9fbf49eb2c5fcb8f Mon Sep 17 00:00:00 2001 From: Stiletto Date: Wed, 13 Dec 2017 15:11:37 -0500 Subject: (nw) more self-service --- docs/source/license.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/source/license.rst b/docs/source/license.rst index 1ce48503983..5b7e0a137a7 100644 --- a/docs/source/license.rst +++ b/docs/source/license.rst @@ -4,7 +4,7 @@ The MAME License The MAME project as a whole is distributed under the terms of the `GNU General Public License, version 2 or later `_ (GPL-2.0+), since it contains code made available under multiple GPL-compatible licenses. A great majority of files (over 90% including core files) are under the `BSD-3-Clause License `_ and we would encourage new contributors to distribute files under this license. -Please note that MAME is a registered trademark of Nicola Salmoria, and permission is required to use the "MAME" name, logo, or wordmark. +Please note that MAME is a registered trademark of Gregory Ember, and permission is required to use the "MAME" name, logo, or wordmark. Copyright (C) 1997-2017 MAMEDev and contributors -- cgit v1.2.3-70-g09d2 From adaf7c63cb90216f30b3d86728aa31ff784bf4f6 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 13 Dec 2017 14:32:40 +0100 Subject: new software list additions --------------------------- ibm5170_cdrom: Arabian Kid [Rod_Wod] We Are Angels: Ein Engel Schlagt Zu! [archive.org] --- hash/ibm5170_cdrom.xml | 50 +++++++++++++++++++++++++++++++++++++------------- 1 file changed, 37 insertions(+), 13 deletions(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 9f66610bc0f..47b7e5d4dd2 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -23,6 +23,19 @@ + + + Arabian Kid + 1996 + ASCII / Yellow Horn + + + + + + + + Prototype 1995 @@ -36,6 +49,30 @@ + + + Noi Siamo Angeli (Italian) + 1997 + Smile Interactive + + + + + + + + + + We Are Angels - Ein Engel Schlõgt Zu (German) + 1997 + Smile Interactive + + + + + + + @@ -62,19 +99,6 @@ - - - - - Noi Siamo Angeli (Italian) - 1997 - Smile Interactive - - - - - - -- cgit v1.2.3-70-g09d2 From 6fb12683729870abe360c0a2120adc33d6a6f316 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 13 Dec 2017 21:46:57 +0100 Subject: new software list additions --------------------------- ibm5170_cdrom: Boorp's Balls [Rod_Wod] Doka Chan No Building Panic [Rod_Wod] Doom II for Windows 95 [Rod_Wod] Golly! Ghosts! Goal! [Rod_Wod] Orgaslave [Rod_Wod] Space Invaders for Windows [Rod_Wod] --- hash/ibm5170_cdrom.xml | 276 +++++++++++++++++++++++++++++++++---------------- 1 file changed, 187 insertions(+), 89 deletions(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 47b7e5d4dd2..732b4d087b4 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -1,27 +1,38 @@ + + + + - - - Acer CPR - 1995 - Acer America Corporation - + + + Alien Incident (Eng, Fre, Ger, Fin) (v1.30) + 1996 + Gametek - - - - - - - - + + @@ -36,19 +47,104 @@ - - Prototype - 1995 - Neo - + + + + Boorp's Balls + 2001 + Xpiral / TSY + - - + + + + + + + + + + Doka Chan No Building Panic (Japan) + 2001 + MSD-JAPAN / Salva Corporation / D-YAMA + + + + + + + + + + + + + Doom II for Windows 95 (Japan) + 1996 + Id Software / Imagineer + + + + + + + + + + + Betrayal at Krondor (1994 release, CDDA) + 1994 + Dynamix + + + + + + + + + + Betrayal at Krondor (1998 release, no CDDA) + 1998 + Dynamix + + + + + + + + Golly! Ghosts! Goal! (Japan) + 1996 + Namco + + + + + + + + + + + King's Quest VI (Windows 3.1 enhanced) + 1993 + Sierra + + + + + + + + Noi Siamo Angeli (Italian) @@ -73,6 +169,24 @@ + + + Orgaslave + 1996 + Kuki + + + + + + + + + + + + + @@ -87,6 +201,19 @@ + + Prototype + 1995 + Neo + + + + + + + + + Sideline 1996 @@ -100,6 +227,20 @@ + + + + Space Invaders for Windows + 1997 + Wiz / Taito + + + + + + + + @@ -123,6 +264,31 @@ + + + + + + + + Acer CPR + 1995 + Acer America Corporation + + + + + + + + + + + + + + + @@ -225,46 +391,6 @@ - - - King's Quest VI (Windows 3.1 enhanced) - 1993 - Sierra - - - - - - - - - - - Betrayal at Krondor (1994 release, CDDA) - 1994 - Dynamix - - - - - - - - - - Betrayal at Krondor (1998 release, no CDDA) - 1998 - Dynamix - - - - - - - - @@ -363,32 +489,4 @@ - - - - Alien Incident (Eng, Fre, Ger, Fin) (v1.30) - 1996 - Gametek - - - - - - - - -- cgit v1.2.3-70-g09d2 From 8b341d879563a9d9c2f1f7a2d40256b4911e7273 Mon Sep 17 00:00:00 2001 From: Sylvain Glaize Date: Wed, 13 Dec 2017 22:24:44 +0100 Subject: Trigger a fatal error when console was asked but the console plugin not found. (#2914) * Add a message when the console plugin is not found, rather than crash. In absence of the console plugin, the option entry was not found in m_plugins, making the set_value() crash when deferencing the result of get_entry(). Instead, an error message is logged telling the plugin is not found. * Trigger a fatal error when console was asked but the console plugin not found. --- src/frontend/mame/mame.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/frontend/mame/mame.cpp b/src/frontend/mame/mame.cpp index 8e6a0614260..63c765abc24 100644 --- a/src/frontend/mame/mame.cpp +++ b/src/frontend/mame/mame.cpp @@ -155,7 +155,14 @@ void mame_machine_manager::start_luaengine() } if (options().console()) { - m_plugins->set_value("console", "1", OPTION_PRIORITY_CMDLINE); + if (m_plugins->exists(OPTION_CONSOLE)) + { + m_plugins->set_value(OPTION_CONSOLE, "1", OPTION_PRIORITY_CMDLINE); + } + else + { + fatalerror("Console plugin not found.\n"); + } } m_lua->initialize(); -- cgit v1.2.3-70-g09d2 From 23eb4caaf80c54426a3050446995bbe963267bd0 Mon Sep 17 00:00:00 2001 From: Justin Kerk Date: Wed, 13 Dec 2017 13:36:07 -0800 Subject: fix title (nw) --- hash/ibm5170_cdrom.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 732b4d087b4..4cc61a630b1 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -159,7 +159,7 @@ - We Are Angels - Ein Engel Schlõgt Zu (German) + We Are Angels - Ein Engel schlägt zu! (German) 1997 Smile Interactive -- cgit v1.2.3-70-g09d2 From e2e6328720dbef23008a44ae3aa5d3f766c27b20 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 13 Dec 2017 21:49:17 +0000 Subject: dumped internal rom for kof98umh igs036 [Morten Shearman Kirkegaard, Peter Wilhelmsen] (game boots, but not yet working properly, MAME hangs during attract, also needs screen mode registers finding) --- src/mame/drivers/pgm2.cpp | 37 +++++++++++++++++++++++++------------ src/mame/includes/pgm2.h | 1 + src/mame/machine/igs036crypt.cpp | 25 +++---------------------- src/mame/machine/igs036crypt.h | 1 - 4 files changed, 29 insertions(+), 35 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 3a61710eae0..f7b2cdd139d 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -845,7 +845,7 @@ all others: SPANSION S99-50070 ROM_REGION( 0x200000, "tiles", ROMREGION_ERASEFF ) \ ROM_LOAD( "ig-d3_text.u1", 0x00000000, 0x0200000, CRC(9a0ea82e) SHA1(7844fd7e46c3fbb2164060f160da528254fd177e) ) \ \ - ROM_REGION( 0x2000000, "bgtile", ROMREGION_ERASEFF ) \ + ROM_REGION( 0x2000000, "bgtile", ROMREGION_ERASE00 ) \ /* bgl/bgh unpopulated (no background tilemap) */ \ \ ROM_REGION( 0x08000000, "sprites_mask", 0 ) /* 1bpp sprite mask data */ \ @@ -866,7 +866,7 @@ all others: SPANSION S99-50070 ROM_START( kof98umh ) ROM_REGION( 0x04000, "maincpu", 0 ) - ROM_LOAD( "kof98uhm_igs036.rom", 0x00000000, 0x0004000, NO_DUMP ) // CRC(3ed2e50f) SHA1(35310045d375d9dda36c325e35257123a7b5b8c7) + ROM_LOAD( "kof98umh_internal_rom.bin", 0x00000000, 0x0004000, CRC(3ed2e50f) SHA1(35310045d375d9dda36c325e35257123a7b5b8c7) ) ROM_REGION( 0x1000000, "user1", 0 ) ROM_LOAD( "kof98umh_v100cn.u4", 0x00000000, 0x1000000, CRC(2ea91e3b) SHA1(5a586bb99cc4f1b02e0db462d5aff721512e0640) ) @@ -974,6 +974,25 @@ READ32_MEMBER(pgm2_state::kov2nl_speedup_r) return m_mainram[0x20470 / 4]; } +READ32_MEMBER(pgm2_state::kof98umh_speedup_r) +{ + int pc = space.device().safe_pc(); + + if (pc == 0x100028f6) + { + if ((m_mainram[0x00060 / 4] == 0x00) && (m_mainram[0x00064 / 4] == 0x00)) + space.device().execute().spin_until_interrupt(); + } + /* + else + { + printf("pc is %08x\n", pc); + } + */ + + return m_mainram[0x00060 / 4]; +} + // for games with the internal ROMs fully dumped that provide the sprite key and program rom key at runtime void pgm2_state::common_encryption_init() @@ -1067,19 +1086,13 @@ DRIVER_INIT_MEMBER(pgm2_state, kov3_100) DRIVER_INIT_MEMBER(pgm2_state,kof98umh) { - uint16_t *src = (uint16_t *)memregion("sprites_mask")->base(); + common_encryption_init(); + machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x20000060, 0x20000063, read32_delegate(FUNC(pgm2_state::kof98umh_speedup_r),this)); +} + - iga_u12_decode(src, 0x08000000, 0x21df); - iga_u16_decode(src, 0x08000000, 0x8692); - m_sprite_predecrypted = 1; - src = (uint16_t *)memregion("sprites_colour")->base(); - sprite_colour_decode(src, 0x20000000); - igs036_decryptor decrypter(kof98umh_key); - decrypter.decrypter_rom(memregion("user1")); - m_has_decrypted = 1; -} /* PGM2 */ diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index de986d1b5a3..6964760ee8c 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -57,6 +57,7 @@ public: DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); + DECLARE_READ32_MEMBER(kof98umh_speedup_r); DECLARE_READ8_MEMBER(encryption_r); DECLARE_WRITE8_MEMBER(encryption_w); diff --git a/src/mame/machine/igs036crypt.cpp b/src/mame/machine/igs036crypt.cpp index ee427748084..3d1255396b4 100644 --- a/src/mame/machine/igs036crypt.cpp +++ b/src/mame/machine/igs036crypt.cpp @@ -310,9 +310,9 @@ const uint8_t kov3_key[0x100] = { 0x10, 0x09, 0xe0, 0x39, 0x02, 0xfe, 0x47, 0x44, 0x2a, 0x51, 0x21, 0x49, 0x04, 0x1d, 0x2d, 0xed, }; -// DDPDOJ & KOF98UMH caused lots of problems to the automatic recovery -// process, so they have needed a good amount of manual examination. -// It is much more probable for these keys to still contain errors +// DDPDOJ caused lots of problems to the automatic recovery +// process, so needed a good amount of manual examination. +// It is much more probable for this key to still contain errors // than for the other ones. const uint8_t ddpdoj_key[0x100] = { @@ -333,22 +333,3 @@ const uint8_t ddpdoj_key[0x100] = { 0x83, 0x0b, 0xe2, 0x5b, 0xe4, 0x2c, 0x42, 0xa2, 0x42, 0x6a, 0x3b, 0x22, 0x25, 0x89, 0x47, 0x0b, 0xe3, 0xa9, 0xd3, 0xf3, 0x26, 0x02, 0x62, 0x53, 0x00, 0xd3, 0x23, 0x2b, 0x74, 0xa2, 0x1e, 0x1a, }; - -const uint8_t kof98umh_key[0x100] = { - 0x80, 0x95, 0x10, 0x25, 0x26, 0x83, 0x22, 0x07, 0x95, 0xb4, 0x94, 0xb0, 0x8c, 0x2c, 0x87, 0x82, - 0x80, 0x82, 0x96, 0x1d, 0x12, 0x10, 0x05, 0x1f, 0x14, 0x09, 0x9c, 0x0f, 0x00, 0x1b, 0x82, 0x8b, - 0x96, 0x8a, 0xa3, 0xa7, 0x85, 0x86, 0xa6, 0xab, 0x80, 0x03, 0x0c, 0x8a, 0x03, 0x26, 0x27, 0xa4, - 0x30, 0xa1, 0x85, 0x01, 0xb6, 0xb6, 0xa1, 0xab, 0x9b, 0x83, 0x82, 0x8a, 0x15, 0x26, 0x9c, 0x87, - 0xf1, 0xb3, 0x13, 0x61, 0xa2, 0x83, 0xa4, 0x4b, 0x01, 0x68, 0x99, 0xc5, 0x07, 0x4f, 0x46, 0xc6, - 0x14, 0x0e, 0x55, 0x03, 0x06, 0x01, 0xc6, 0x80, 0x55, 0xda, 0x51, 0x48, 0xca, 0x0e, 0xde, 0xcd, - 0x60, 0xf6, 0x82, 0xd5, 0x83, 0xea, 0x26, 0x03, 0x56, 0x2a, 0x72, 0x80, 0xc5, 0x08, 0xec, 0x26, - 0x15, 0x21, 0x90, 0xa2, 0xf2, 0x41, 0x54, 0x42, 0xea, 0x35, 0x0f, 0x01, 0xd4, 0x3b, 0xb3, 0x4d, - 0x30, 0x9b, 0x17, 0xaa, 0x20, 0x29, 0x26, 0x88, 0x91, 0xa0, 0x9f, 0xaa, 0x2e, 0x8b, 0x2e, 0xad, - 0x96, 0x93, 0x85, 0x8b, 0x92, 0x1e, 0x13, 0x98, 0x86, 0x04, 0x94, 0x16, 0x15, 0x0d, 0x17, 0x88, - 0xa1, 0x2a, 0x12, 0x0c, 0x26, 0x09, 0x82, 0x29, 0x93, 0x82, 0x10, 0x0b, 0x21, 0xaf, 0x87, 0x8a, - 0x04, 0x9e, 0x04, 0xa1, 0x27, 0xbf, 0x03, 0x2a, 0x90, 0x2f, 0x8a, 0x86, 0x1c, 0x34, 0x13, 0x8e, - 0x07, 0x8b, 0xb3, 0xe0, 0x67, 0x02, 0x64, 0x4f, 0x07, 0x68, 0xac, 0x84, 0xae, 0xec, 0x63, 0x4e, - 0x87, 0x0f, 0x56, 0x14, 0x54, 0x06, 0xc5, 0x81, 0x51, 0x96, 0xcf, 0x16, 0x49, 0x99, 0x49, 0xdd, - 0x25, 0xc6, 0xc3, 0xe9, 0xa2, 0xe5, 0x63, 0x05, 0x13, 0x8a, 0xa4, 0x25, 0x26, 0x29, 0x6a, 0xe0, - 0xc3, 0x6e, 0xc1, 0x99, 0xc1, 0xe2, 0x47, 0xa1, 0x4c, 0xa1, 0x14, 0x11, 0x4d, 0x32, 0x3f, 0x80, -}; diff --git a/src/mame/machine/igs036crypt.h b/src/mame/machine/igs036crypt.h index 8ccb0c6af78..69386dd2c22 100644 --- a/src/mame/machine/igs036crypt.h +++ b/src/mame/machine/igs036crypt.h @@ -30,6 +30,5 @@ extern const uint8_t cjddzsp_key[0x100]; extern const uint8_t cjdh2_key[0x100]; extern const uint8_t kov3_key[0x100]; extern const uint8_t ddpdoj_key[0x100]; -extern const uint8_t kof98umh_key[0x100]; #endif -- cgit v1.2.3-70-g09d2 From 05e00b0baf1c590119bac5599a20c9e0b9888e43 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 13 Dec 2017 22:41:06 +0000 Subject: pgm2: fix end of sprite list handling (nw) --- src/mame/video/pgm2.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index dcd56aff64f..88fa0c838fc 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -138,9 +138,9 @@ void pgm2_state::draw_sprites(screen_device &screen, const rectangle &cliprect, //printf("frame\n"); - for (int i = 0;i < 0x2000 / 4;i++) + for (int i = 0;i < 0x2000 / 4;i+=4) { - if (spriteram[i] == 0x80000000) + if (spriteram[i+2] & 0x80000000) { endoflist = i; break; -- cgit v1.2.3-70-g09d2 From 8bfcc5c50ed11edb03481cee105696ff874f63d2 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 13 Dec 2017 22:45:33 +0000 Subject: pgm2: fix end of sprite list handling (nw) (#2931) pgm2: fix end of sprite list handling (nw) --- src/mame/video/pgm2.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index dcd56aff64f..88fa0c838fc 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -138,9 +138,9 @@ void pgm2_state::draw_sprites(screen_device &screen, const rectangle &cliprect, //printf("frame\n"); - for (int i = 0;i < 0x2000 / 4;i++) + for (int i = 0;i < 0x2000 / 4;i+=4) { - if (spriteram[i] == 0x80000000) + if (spriteram[i+2] & 0x80000000) { endoflist = i; break; -- cgit v1.2.3-70-g09d2 From 8467dd0764f6ac293e545b806446c24c99f4e6bc Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 13 Dec 2017 23:02:25 +0000 Subject: pgm2: dynamic resolution change (nw) --- src/mame/drivers/pgm2.cpp | 11 +++++++++-- src/mame/includes/pgm2.h | 2 ++ src/mame/video/pgm2.cpp | 9 +++++++++ 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index f7b2cdd139d..311f3dc9897 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -356,6 +356,7 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll AM_RANGE(0x30120008, 0x3012000b) AM_RAM AM_SHARE("fgscroll") + AM_RANGE(0x3012000c, 0x3012000f) AM_RAM AM_SHARE("vidmode") AM_RANGE(0x30120030, 0x30120033) AM_WRITE16(share_bank_w, 0xffff0000) AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs @@ -570,10 +571,16 @@ static MACHINE_CONFIG_START( pgm2 ) MCFG_PGM2_MEMCARD_ADD("memcard_p2") MCFG_PGM2_MEMCARD_ADD("memcard_p3") MCFG_PGM2_MEMCARD_ADD("memcard_p4") +MACHINE_CONFIG_END - +// not strictly needed as the video code supports changing on the fly, but makes recording easier etc. +static MACHINE_CONFIG_DERIVED( pgm2_lores, pgm2 ) + MCFG_SCREEN_MODIFY("screen") + // note, +8 to y position too, could be a sprite reg to move sprites intead + MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0+8, 224+8-1) MACHINE_CONFIG_END + /* using macros for the video / sound roms because the locations never change between sets, and we're going to have a LOT of clones to cover all the internal rom regions and external rom revision combinations, so it keeps things readable */ @@ -1119,7 +1126,7 @@ GAME( 2011, kov3_102, kov3, pgm2, pgm2, pgm2_state, kov3_102, ROT0, GAME( 2011, kov3_100, kov3, pgm2, pgm2, pgm2_state, kov3_100, ROT0, "IGS", "Knights of Valour 3 (V100, China)", MACHINE_NOT_WORKING ) // King of Fighters '98: Ultimate Match Hero -GAME( 2009, kof98umh, 0, pgm2, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / NewChannel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", MACHINE_NOT_WORKING ) +GAME( 2009, kof98umh, 0, pgm2_lores, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / NewChannel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", MACHINE_NOT_WORKING ) // Jigsaw World Arena diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index 6964760ee8c..d3052a22b3f 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -33,6 +33,7 @@ public: m_sp_videoram(*this, "sp_videoram"), m_bgscroll(*this, "bgscroll"), m_fgscroll(*this, "fgscroll"), + m_vidmode(*this, "vidmode"), m_gfxdecode2(*this, "gfxdecode2"), m_gfxdecode3(*this, "gfxdecode3"), m_arm_aic(*this, "arm_aic"), @@ -133,6 +134,7 @@ private: required_shared_ptr m_sp_videoram; required_shared_ptr m_bgscroll; required_shared_ptr m_fgscroll; + required_shared_ptr m_vidmode; required_device m_gfxdecode2; required_device m_gfxdecode3; required_device m_arm_aic; diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index 88fa0c838fc..1e52296232b 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -258,6 +258,15 @@ void pgm2_state::copy_sprites_from_bitmap(screen_device &screen, bitmap_rgb32 &b uint32_t pgm2_state::screen_update_pgm2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + + int mode = m_vidmode[0] & 0x00010000; // other bits not used? + + if (mode) + m_screen->set_visible_area(0, 448 - 1, 0, 224 - 1); + else // note, +8 to y position too, could be a sprite reg to move sprites intead + m_screen->set_visible_area(0, 320 - 1, 8, 224 + 8 - 1); + + m_fg_tilemap->set_scrollx(0, m_fgscroll[0] & 0xffff); m_fg_tilemap->set_scrolly(0, m_fgscroll[0] >> 16); m_bg_tilemap->set_scrolly(0, (m_bgscroll[0x0/4] & 0xffff0000)>>16 ); -- cgit v1.2.3-70-g09d2 From 3af3f197475ee8b77e35be93e8b79aeb22514bfb Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Wed, 13 Dec 2017 23:28:42 +0000 Subject: pgm2: fix bug in yzoom code causing hang (nw) --- src/mame/video/pgm2.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index 1e52296232b..8f416b469c8 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -216,12 +216,15 @@ void pgm2_state::draw_sprites(screen_device &screen, const rectangle &cliprect, draw_sprite_line(cliprect, mask_offset, palette_offset, x, realy, flipx, reverse, sizex, pal, 1, zoomx_bits, growx); realy++; - if (zoomy_bit) + if (zoomy_bit) // draw it again { palette_offset = pre_palette_offset; mask_offset = pre_mask_offset; + draw_sprite_line(cliprect, mask_offset, palette_offset, x, realy, flipx, reverse, sizex, pal, 1, zoomx_bits, growx); + realy++; } - else ydraw++; + + ydraw++; } } } -- cgit v1.2.3-70-g09d2 From f9ab8085e54231d47b4bc2ee929f2a91a80b9c36 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 14 Dec 2017 00:45:37 +0100 Subject: New working machines ----------- Apollo 13 (Tiger handheld) [hap, Sean Riddle] Robocop 2 (Tiger handheld) [hap, Sean Riddle] --- src/mame/drivers/hh_sm510.cpp | 209 +++++++++++++++++++++++++++++++++++++++++- src/mame/drivers/hh_tms1k.cpp | 3 +- src/mame/mame.lst | 2 + 3 files changed, 211 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index 18a663de354..97cf885532a 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -2175,6 +2175,98 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Robocop 2 (model 7-830) + * Sharp SM510 under epoxy (die label M96) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class trobocop2_state : public hh_sm510_state +{ +public: + trobocop2_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 6; + m_inp_fixed = 6; + } +}; + +// config + +static INPUT_PORTS_START( trobocop2 ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Rescue + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // /Pick + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shoot Right") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shoot Up") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Shoot Left") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( trobocop2 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1487, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1487-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Altered Beast (model 7-831) @@ -2503,7 +2595,7 @@ WRITE8_MEMBER(tsonic_state::write_s) static INPUT_PORTS_START( tsonic ) PORT_START("IN.0") // S2 - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Jump + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Jump Up PORT_BIT( 0x0b, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.1") // S3 @@ -2512,7 +2604,7 @@ static INPUT_PORTS_START( tsonic ) PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.2") // S4 - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Down PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.3") // S5 @@ -2847,6 +2939,99 @@ MACHINE_CONFIG_END +/*************************************************************************** + + Tiger Apollo 13 (model 78-591) + * Sharp SM510 under epoxy (die label 10 07) + * lcd screen with custom segments, 1-bit sound + +***************************************************************************/ + +class tapollo13_state : public hh_sm510_state +{ +public: + tapollo13_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 6; + m_inp_fixed = 6; + } +}; + +// config + +static INPUT_PORTS_START( tapollo13 ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Thruster Left") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0a, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // S2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x09, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.3") // S4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Parachute") + PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.4") // S5 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Thruster Right") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Capture") + PORT_BIT( 0x0c, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.5") // S6 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Pause") + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.6") // GND! + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Power On/Start") + + PORT_START("BA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN ) PORT_NAME("Sound") + + PORT_START("B") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POWER_OFF ) + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") +INPUT_PORTS_END + +static MACHINE_CONFIG_START( tapollo13 ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", SM510, XTAL_32_768kHz) + MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_BA_CB(IOPORT("BA")) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen", "svg") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1467, 1080) + MCFG_SCREEN_VISIBLE_AREA(0, 1467-1, 0, 1080-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + MCFG_DEFAULT_LAYOUT(layout_svg) + + /* sound hardware */ + MCFG_SPEAKER_STANDARD_MONO("mono") + MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + /*************************************************************************** Tiger Space Jam (model 78-621) @@ -3228,6 +3413,15 @@ ROM_START( tsharr2 ) ROM_END +ROM_START( trobocop2 ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "m96", 0x0000, 0x1000, CRC(3704b60c) SHA1(04275833e1a79fd33226faf060890b66ae54e1d3) ) + + ROM_REGION( 463532, "svg", 0) + ROM_LOAD( "trobocop2.svg", 0, 463532, CRC(c2b92868) SHA1(87912f02bea967c10ba1d8f7c810e3c44b0e3cff) ) +ROM_END + + ROM_START( taltbeast ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "m88", 0x0000, 0x1000, CRC(1b3d15e7) SHA1(78371230dff872d6c07eefdbc4856c2a3336eb61) ) @@ -3294,6 +3488,15 @@ ROM_START( tjdredd ) ROM_END +ROM_START( tapollo13 ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "10_07", 0x0000, 0x1000, CRC(63d0deaa) SHA1(d5de99d5e0ee08ec2ebeef7189ebac1c008d2e7d) ) + + ROM_REGION( 643176, "svg", 0) + ROM_LOAD( "tapollo13.svg", 0, 643176, CRC(e2dac162) SHA1(4089fa485579d2b87ac49b1cf33d6c2c085ea4c5) ) +ROM_END + + ROM_START( tsjam ) ROM_REGION( 0x1000, "maincpu", 0 ) ROM_LOAD( "10_23", 0x0000, 0x1000, CRC(6eaabfbd) SHA1(f0ecbd6f65fe72ce2d8a452685be2e77a63fc9f0) ) @@ -3338,6 +3541,7 @@ CONS( 1989, tkarnov, 0, 0, tkarnov, tkarnov, tkarnov_state, 0, "T CONS( 1989, tgaiden, 0, 0, tgaiden, tgaiden, tgaiden_state, 0, "Tiger Electronics (licensed from Tecmo)", "Ninja Gaiden (handheld)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) CONS( 1989, tbatman, 0, 0, tbatman, tbatman, tbatman_state, 0, "Tiger Electronics", "Batman (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, tsharr2, 0, 0, tsharr2, tsharr2, tsharr2_state, 0, "Tiger Electronics (licensed from Sega)", "Space Harrier II (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1990, trobocop2, 0, 0, trobocop2, trobocop2, trobocop2_state, 0, "Tiger Electronics", "Robocop 2 (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, taltbeast, 0, 0, taltbeast, taltbeast, taltbeast_state, 0, "Tiger Electronics (licensed from Sega)", "Altered Beast (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tswampt, 0, 0, tswampt, tswampt, tswampt_state, 0, "Tiger Electronics", "Swamp Thing (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, tbtoads, 0, 0, tbtoads, tbtoads, tbtoads_state, 0, "Tiger Electronics (licensed from Rare/Tradewest)", "Battletoads (handheld)", MACHINE_SUPPORTS_SAVE ) @@ -3345,4 +3549,5 @@ CONS( 1992, tsonic, 0, 0, tsonic, tsonic, tsonic_state, 0, "T CONS( 1994, tshadow, 0, 0, tshadow, tshadow, tshadow_state, 0, "Tiger Electronics", "The Shadow (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1995, tbatfor, 0, 0, tbatfor, tbatfor, tbatfor_state, 0, "Tiger Electronics", "Batman Forever - Double Dose of Doom", MACHINE_SUPPORTS_SAVE ) CONS( 1995, tjdredd, 0, 0, tjdredd, tjdredd, tjdredd_state, 0, "Tiger Electronics", "Judge Dredd (handheld)", MACHINE_SUPPORTS_SAVE ) +CONS( 1995, tapollo13, 0, 0, tapollo13, tapollo13, tapollo13_state, 0, "Tiger Electronics", "Apollo 13 (handheld)", MACHINE_SUPPORTS_SAVE ) CONS( 1996, tsjam, 0, 0, tsjam, tsjam, tsjam_state, 0, "Tiger Electronics", "Space Jam (handheld)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/hh_tms1k.cpp b/src/mame/drivers/hh_tms1k.cpp index 3511785a6cc..d0dde07b070 100644 --- a/src/mame/drivers/hh_tms1k.cpp +++ b/src/mame/drivers/hh_tms1k.cpp @@ -5,9 +5,10 @@ This driver is a collection of simple dedicated handheld and tabletop toys based around the TMS1000 MCU series. Anything more complex or clearly part of a series is (or will be) in its own driver, see: - - hh_tms1k: here - eva: Chrysler EVA-11 (and EVA-24) - microvsn: Milton Bradley MicroVision + + (contd.) hh_tms1k child drivers: - ticalc1x: TI TMS1K-based calculators - tispellb: TI Spelling B series gen. 1 - tispeak: TI Speak & Spell series gen. 1 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 94c4eafc2e9..7cfa3598c83 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -14718,6 +14718,7 @@ ktmnt // Konami ktopgun // Konami nupogodi // Elektronika taltbeast // Tiger +tapollo13 // Tiger tbatfor // Tiger tbatman // Tiger tbtoads // Tiger @@ -14727,6 +14728,7 @@ tgaunt // Tiger tjdredd // Tiger tkarnov // Tiger trobhood // Tiger +trobocop2 // Tiger tshadow // Tiger tsharr2 // Tiger tsjam // Tiger -- cgit v1.2.3-70-g09d2 From 33ba33021e314c13579a483f9d6eadf57109b9eb Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Thu, 14 Dec 2017 00:13:18 +0000 Subject: pgm2: kof98umh resolution is 320x240 instead, extra lines are needed at both top and bottom (nw) also it seems to be playable, so just mark it as IMPERFECT SOUND for now --- src/mame/drivers/pgm2.cpp | 34 +++++++++++++++++++++++++++++++--- src/mame/includes/pgm2.h | 4 +++- src/mame/video/pgm2.cpp | 4 ++-- 3 files changed, 36 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 311f3dc9897..e24b04b97ca 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -320,6 +320,33 @@ WRITE32_MEMBER(pgm2_state::mcu_w) mcu_command(space, false); } +WRITE16_MEMBER(pgm2_state::unk30120014_w) +{ + if (offset == 0) + { + // 0/1 toggles (maybe sprite dma triggers?) + } + else + { + // interesting data + //printf("unk30120014_w %d %04x\n", offset, data); + } +} + +WRITE16_MEMBER(pgm2_state::unk30120018_w) +{ + if (offset == 0) + { + // writes 1 (maybe sprite enable) + } + else + { + // writes 0 (rarely) + //printf("unk30120018_w %d %04x\n", offset, data); + } +} + + static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x00000000, 0x00003fff) AM_ROM //AM_REGION("user1", 0x00000) // internal ROM @@ -357,6 +384,8 @@ static ADDRESS_MAP_START( pgm2_map, AS_PROGRAM, 32, pgm2_state ) AM_RANGE(0x30120000, 0x30120003) AM_RAM AM_SHARE("bgscroll") // scroll AM_RANGE(0x30120008, 0x3012000b) AM_RAM AM_SHARE("fgscroll") AM_RANGE(0x3012000c, 0x3012000f) AM_RAM AM_SHARE("vidmode") + AM_RANGE(0x30120014, 0x30120017) AM_WRITE16(unk30120014_w, 0xffffffff) + AM_RANGE(0x30120018, 0x3012001b) AM_WRITE16(unk30120018_w, 0xffffffff) AM_RANGE(0x30120030, 0x30120033) AM_WRITE16(share_bank_w, 0xffff0000) AM_RANGE(0x30120038, 0x3012003b) AM_WRITE(sprite_encryption_w) // there are other 0x301200xx regs @@ -576,8 +605,7 @@ MACHINE_CONFIG_END // not strictly needed as the video code supports changing on the fly, but makes recording easier etc. static MACHINE_CONFIG_DERIVED( pgm2_lores, pgm2 ) MCFG_SCREEN_MODIFY("screen") - // note, +8 to y position too, could be a sprite reg to move sprites intead - MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0+8, 224+8-1) + MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1) MACHINE_CONFIG_END @@ -1126,7 +1154,7 @@ GAME( 2011, kov3_102, kov3, pgm2, pgm2, pgm2_state, kov3_102, ROT0, GAME( 2011, kov3_100, kov3, pgm2, pgm2, pgm2_state, kov3_100, ROT0, "IGS", "Knights of Valour 3 (V100, China)", MACHINE_NOT_WORKING ) // King of Fighters '98: Ultimate Match Hero -GAME( 2009, kof98umh, 0, pgm2_lores, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / NewChannel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", MACHINE_NOT_WORKING ) +GAME( 2009, kof98umh, 0, pgm2_lores, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / New Channel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", MACHINE_IMPERFECT_SOUND ) // Jigsaw World Arena diff --git a/src/mame/includes/pgm2.h b/src/mame/includes/pgm2.h index d3052a22b3f..a93fa8ccab7 100644 --- a/src/mame/includes/pgm2.h +++ b/src/mame/includes/pgm2.h @@ -55,7 +55,9 @@ public: DECLARE_WRITE16_MEMBER(share_bank_w); DECLARE_READ8_MEMBER(shareram_r); DECLARE_WRITE8_MEMBER(shareram_w); - + DECLARE_WRITE16_MEMBER(unk30120014_w); + DECLARE_WRITE16_MEMBER(unk30120018_w); + DECLARE_READ32_MEMBER(orleg2_speedup_r); DECLARE_READ32_MEMBER(kov2nl_speedup_r); DECLARE_READ32_MEMBER(kof98umh_speedup_r); diff --git a/src/mame/video/pgm2.cpp b/src/mame/video/pgm2.cpp index 8f416b469c8..a1e3ec0a8cc 100644 --- a/src/mame/video/pgm2.cpp +++ b/src/mame/video/pgm2.cpp @@ -266,8 +266,8 @@ uint32_t pgm2_state::screen_update_pgm2(screen_device &screen, bitmap_rgb32 &bit if (mode) m_screen->set_visible_area(0, 448 - 1, 0, 224 - 1); - else // note, +8 to y position too, could be a sprite reg to move sprites intead - m_screen->set_visible_area(0, 320 - 1, 8, 224 + 8 - 1); + else + m_screen->set_visible_area(0, 320 - 1, 0, 240 - 1); m_fg_tilemap->set_scrollx(0, m_fgscroll[0] & 0xffff); -- cgit v1.2.3-70-g09d2 From 735d3e63985b9bea83d93d0f3ad3a384b2eb54e5 Mon Sep 17 00:00:00 2001 From: David Haywood <28625134+DavidHaywood@users.noreply.github.com> Date: Thu, 14 Dec 2017 00:22:36 +0000 Subject: default sram for easier regtesting etc. (nw) --- src/mame/drivers/pgm2.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index e24b04b97ca..c34c364dfaf 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -897,7 +897,11 @@ all others: SPANSION S99-50070 \ ROM_REGION( 0x08000000, "ymz774", ROMREGION_ERASEFF ) /* ymz770 */ \ ROM_LOAD16_WORD_SWAP( "ig-d3_wave0.u12", 0x00000000, 0x4000000, CRC(edf2332d) SHA1(7e01c7e03e515814d7de117c265c3668d32842fa) ) \ - ROM_LOAD16_WORD_SWAP( "ig-d3_wave1.u11", 0x04000000, 0x4000000, CRC(62321b20) SHA1(a388c8a2489430fbe92fb26b3ef81c66ce97f318) ) + ROM_LOAD16_WORD_SWAP( "ig-d3_wave1.u11", 0x04000000, 0x4000000, CRC(62321b20) SHA1(a388c8a2489430fbe92fb26b3ef81c66ce97f318) ) \ + \ + ROM_REGION( 0x10000, "sram", 0 ) \ + ROM_LOAD( "kof98umh_sram", 0x00000000, 0x10000, CRC(60460ed9) SHA1(55cd8de37cee04ff7ad940fb52f8fb8db042c26e) ) + ROM_START( kof98umh ) ROM_REGION( 0x04000, "maincpu", 0 ) -- cgit v1.2.3-70-g09d2 From 82364190df48ba9e3f5959c067dd10e9397079dd Mon Sep 17 00:00:00 2001 From: Phil Bennett Date: Wed, 13 Dec 2017 17:21:13 -0800 Subject: -gngprot: Added correct character ROM [chris @ windy gaming, Joe Magiera, nightmaretony] --- src/mame/drivers/gng.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/gng.cpp b/src/mame/drivers/gng.cpp index 95c8874a3a7..a899095f732 100644 --- a/src/mame/drivers/gng.cpp +++ b/src/mame/drivers/gng.cpp @@ -503,8 +503,8 @@ ROM_START( gngbl ) ROM_REGION( 0x18000, "gfx2", 0 ) ROM_LOAD( "13.84490.3e", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) /* tiles 0-1 Plane 1*/ ROM_LOAD( "12.84490.1e", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) /* tiles 2-3 Plane 1*/ - ROM_LOAD( "11.84490.3c", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) /* tiles 0-1 Plane 2*/ - ROM_LOAD( "10.84490.1c", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) /* tiles 2-3 Plane 2*/ + ROM_LOAD( "11.84490.3c", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) /* tiles 0-1 Plane 2*/ + ROM_LOAD( "10.84490.1c", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) /* tiles 2-3 Plane 2*/ ROM_LOAD( "9.84490.3b", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) /* tiles 0-1 Plane 3*/ ROM_LOAD( "8.84490.1b", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) /* tiles 2-3 Plane 3*/ @@ -529,7 +529,7 @@ ROM_START( gngprot ) ROM_LOAD( "gg14h.bin", 0x0000, 0x8000, CRC(55cfb196) SHA1(df9cdbb24c26bca226d7274225725d62ea854c7a) ) ROM_REGION( 0x04000, "gfx1", 0 ) - ROM_LOAD( "1.84490.11e", 0x00000, 0x4000, BAD_DUMP CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) /* characters */ // MISSING FROM THIS SET! (was on PCB, why wasn't it dumped?) + ROM_LOAD( "gg11e.bin", 0x00000, 0x4000, CRC(ccea9365) SHA1(bb567529fa376afc0a5afd331dcecef4f61cc8a3) ) /* characters */ ROM_REGION( 0x18000, "gfx2", 0 ) ROM_LOAD( "gg3e.bin", 0x00000, 0x4000, CRC(68db22c8) SHA1(ada859bfa60d9563a8a86b1b6526f626b932981c) ) /* tiles 0-1 Plane 1*/ -- cgit v1.2.3-70-g09d2 From 71fd8f8cfb33db8d813d7505d362dc93372608fe Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Thu, 14 Dec 2017 04:02:40 +0200 Subject: ymz774: implement SQC thing on top of sequencers, fix sequencers timers setup --- src/devices/sound/ymz770.cpp | 66 ++++++++++++++++++++++++++++++++++++++++++-- src/devices/sound/ymz770.h | 10 +++++++ src/mame/drivers/pgm2.cpp | 6 ++-- 3 files changed, 76 insertions(+), 6 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index ae7a995ce21..366e028370a 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -110,6 +110,13 @@ void ymz770_device::device_start() save_item(NAME(m_sequences[ch].bank), ch); save_item(NAME(m_sequences[ch].is_playing), ch); } + for (int ch = 0; ch < 8; ch++) + { + save_item(NAME(m_sqcs[ch].sqc), ch); + save_item(NAME(m_sqcs[ch].loop), ch); + save_item(NAME(m_sqcs[ch].is_playing), ch); + save_item(NAME(m_sqcs[ch].is_waiting), ch); + } } @@ -144,6 +151,11 @@ void ymz770_device::device_reset() sequence.bank = 0; sequence.is_playing = false; } + for (auto & sqc : m_sqcs) + { + sqc.is_playing = false; + sqc.loop = 0; + } } @@ -522,7 +534,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) if (reg & 1) m_sequences[sq].sequence = (m_sequences[sq].sequence & 0xff00) | data; else - m_sequences[sq].sequence = (m_sequences[sq].sequence & 0x00ff) | ((data & 0x0f) << 8); // TODO check if total number really upto 0x1000 + m_sequences[sq].sequence = (m_sequences[sq].sequence & 0x00ff) | ((data & 0x0f) << 8); break; case 0x70: // Start / Stop if (data) @@ -545,7 +557,7 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) break; case 0x88: // timer H and L case 0x90: - sq = (reg >> 1) & 7; + sq = (reg - 0x88) >> 1; if (reg & 1) m_sequences[sq].timer = (m_sequences[sq].timer & 0xff00) | data; else @@ -566,7 +578,26 @@ void ymz774_device::internal_reg_write(uint8_t reg, uint8_t data) } else { - if (data) logerror("SQC unimplemented %02X %02X\n", reg, data); + int sq = reg & 7; + switch (reg & 0xf8) + { + case 0xb0: + m_sqcs[sq].sqc = data; + break; + case 0xb8: + if (data) + { + m_sqcs[sq].data = &m_rom[get_sqc_offs(m_sqcs[sq].sqc)]; + m_sqcs[sq].is_playing = true; + m_sqcs[sq].is_waiting = false; + } + else + m_sqcs[sq].is_playing = false; + break; + case 0xc0: + m_sqcs[sq].loop = data; + break; + } } } // else bank1 - Equalizer control @@ -596,7 +627,35 @@ void ymz774_device::sequencer() { for (int i = 0; i < 8; i++) { + auto & sqc = m_sqcs[i]; auto & sequence = m_sequences[i]; + + if (sqc.is_playing && !sqc.is_waiting) + { + sequence.sequence = ((sqc.data[0] << 8) | sqc.data[1]) & 0xfff; + sequence.loop = sqc.data[2]; + sequence.data = &m_rom[get_seq_offs(sequence.sequence)]; + sequence.delay = 0; + sequence.is_playing = true; + //printf("sqc pl %d lp %d last %d\n", sequence.sequence, sequence.loop, sqc.data[3]); + if (sqc.data[3] == 0xff) + { + if (sqc.loop) + { + if (sqc.loop != 255) + --sqc.loop; + sqc.data = &m_rom[get_sqc_offs(sqc.sqc)]; + } + else + sqc.is_playing = false; + } + else + { + sqc.is_waiting = true; + sqc.data += 4; + } + } + if (sequence.is_playing) { if (sequence.delay > 0) @@ -623,6 +682,7 @@ void ymz774_device::sequencer() else { sequence.is_playing = false; + sqc.is_waiting = false; } break; case 0xfe: // timer delay diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index b640d780ef5..6723ac2bf1c 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -104,9 +104,18 @@ protected: uint8_t bank; bool is_playing; }; + struct ymz_sqc + { + uint8_t sqc; + uint8_t loop; + uint8_t *data; + bool is_playing; + bool is_waiting; + }; ymz_channel m_channels[16]; ymz_sequence m_sequences[8]; + ymz_sqc m_sqcs[8]; }; // ======================> ymz774_device @@ -122,6 +131,7 @@ protected: virtual void internal_reg_write(uint8_t reg, uint8_t data) override; virtual uint32_t get_phrase_offs(int phrase) override { int ph = phrase * 4; return ((m_rom[ph] & 0x0f) << 24 | m_rom[ph + 1] << 16 | m_rom[ph + 2] << 8 | m_rom[ph + 3]) * 2; }; virtual uint32_t get_seq_offs(int sqn) override { int sq = sqn * 4 + 0x2000; return ((m_rom[sq] & 0x0f) << 24 | m_rom[sq + 1] << 16 | m_rom[sq + 2] << 8 | m_rom[sq + 3]) * 2; }; + uint32_t get_sqc_offs(int sqc) { int sq = sqc * 4 + 0x6000; return ((m_rom[sq] & 0x0f) << 24 | m_rom[sq + 1] << 16 | m_rom[sq + 2] << 8 | m_rom[sq + 3]) * 2; }; virtual void sequencer() override; private: int m_bank; diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index c34c364dfaf..5e8554ad292 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -75,13 +75,13 @@ 06 - zoom something, 0F-7F, default 1F 08 - fg scroll x 0a - fg scroll y - 0e - ? 1 at init (sprite related?) - 10 - ? orleg2 - 0x13, kov2nl - 0x14 at init (sprite related?) + 0e - resolution, 0 - low (kof98), 1 - high (rest of games) + 10 - ? orleg2 - 0x13, kov2nl, kof - 0x14 at init (sprite related?) 14 - sprite enable ? set to 0 before spriteram update, to 1 after 16 - enable access to vrams/palettes/etc ? (bitmask) 18 - vblank ack 1a - ? 0 at init - 1c - ? orleg2 - 5, kov2nl - 7 at init (sprite related?) + 1c - ? orleg2 - 5, kov2nl, kof - 7 at init (sprite related?) 1e - ? 2 at init (sprite related?) 32 - shared RAM bank 34, 36 - ? 0 at init, some unused xor feature ? -- cgit v1.2.3-70-g09d2 From c6d4070416e7d9adad21d931603bb3e0da339c64 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Thu, 14 Dec 2017 04:39:20 +0200 Subject: ymz774 slight cleanup, remove kof98umh IMPERFECT_SOUND flag (nw) --- src/devices/sound/ymz770.cpp | 5 +---- src/mame/drivers/pgm2.cpp | 2 +- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index 366e028370a..968a1514072 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -637,7 +637,7 @@ void ymz774_device::sequencer() sequence.data = &m_rom[get_seq_offs(sequence.sequence)]; sequence.delay = 0; sequence.is_playing = true; - //printf("sqc pl %d lp %d last %d\n", sequence.sequence, sequence.loop, sqc.data[3]); + sqc.is_waiting = true; if (sqc.data[3] == 0xff) { if (sqc.loop) @@ -650,10 +650,7 @@ void ymz774_device::sequencer() sqc.is_playing = false; } else - { - sqc.is_waiting = true; sqc.data += 4; - } } if (sequence.is_playing) diff --git a/src/mame/drivers/pgm2.cpp b/src/mame/drivers/pgm2.cpp index 5e8554ad292..39c334423b5 100644 --- a/src/mame/drivers/pgm2.cpp +++ b/src/mame/drivers/pgm2.cpp @@ -1158,7 +1158,7 @@ GAME( 2011, kov3_102, kov3, pgm2, pgm2, pgm2_state, kov3_102, ROT0, GAME( 2011, kov3_100, kov3, pgm2, pgm2, pgm2_state, kov3_100, ROT0, "IGS", "Knights of Valour 3 (V100, China)", MACHINE_NOT_WORKING ) // King of Fighters '98: Ultimate Match Hero -GAME( 2009, kof98umh, 0, pgm2_lores, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / New Channel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", MACHINE_IMPERFECT_SOUND ) +GAME( 2009, kof98umh, 0, pgm2_lores, pgm2, pgm2_state, kof98umh, ROT0, "IGS / SNK Playmore / New Channel", "The King of Fighters '98: Ultimate Match HERO (China, V100, 09-08-23)", 0 ) // Jigsaw World Arena -- cgit v1.2.3-70-g09d2 From 041d4bba1bafa4683120c9d1387e42e9c0a85238 Mon Sep 17 00:00:00 2001 From: Phil Bennett Date: Wed, 13 Dec 2017 18:57:05 -0800 Subject: New working machines: 4-in-1 [Joe Magiera] Joker Poker With Hi-Lo Double-Up [Joe Magiera] Note: Not sure if these are the actual names for these games. --- src/mame/drivers/smsmcorp.cpp | 39 +++++++++++++++++++++++++++++++++++---- src/mame/mame.lst | 2 ++ 2 files changed, 37 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/smsmcorp.cpp b/src/mame/drivers/smsmcorp.cpp index 7eb2ced7cb8..e081df52254 100644 --- a/src/mame/drivers/smsmcorp.cpp +++ b/src/mame/drivers/smsmcorp.cpp @@ -846,6 +846,35 @@ ROM_START( trvhanga ) ROM_LOAD( "dmpal14h4nc.145.bin", 0x000000, 0x00003c, CRC(ab2af8de) SHA1(775495d47435c23eecf3defba15f5ca890836354) ) ROM_END + +ROM_START( sms4in1 ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD( "set4_u19_2764.bin", 0xf8000, 0x02000, CRC(6f6116b9) SHA1(f91412ca9b911e2a822dab91c96e5f655e7ebb1b) ) + ROM_LOAD( "set4_u18_2764.bin", 0xfa000, 0x02000, CRC(cc13a404) SHA1(1c00d173706c5e88cee69f9c52efa64dbdf4c15b) ) + ROM_LOAD( "set4_u17_2764.bin", 0xfc000, 0x02000, CRC(fee0f422) SHA1(56ffafce78cf96c0b91b44a8408909b06499c960) ) + ROM_LOAD( "set4_u16_2764.bin", 0xfe000, 0x02000, CRC(87ed2873) SHA1(daa13f20cac4a41335d972be6772dff5d7555c10) ) + ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 ) + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "set4_u26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) ) + ROM_RELOAD( 0x1000, 0x1000 ) +ROM_END + + +ROM_START( smsjoker ) + ROM_REGION( 0x100000, "maincpu", 0 ) + // U19 was not populated + ROM_LOAD( "set3_u18_hl_dlxe_080585.bin", 0xfa000, 0x02000, CRC(70614c00) SHA1(90c53e892ece4ceca0476be3653f160a49fd4bc9) ) + ROM_LOAD( "set3_u17_hl_dlxe_080585.bin", 0xfc000, 0x02000, CRC(872fb1c4) SHA1(a23d093b26c42aa66279d6dfa6d59789f5862d96) ) + ROM_LOAD( "set3_u16_hl_dlxe_080585.bin", 0xfe000, 0x02000, CRC(786c0792) SHA1(a7eea01c79b0d8baecdbda06ddbca40b39d8513a) ) + ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 ) + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "set3_u26_26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) ) + ROM_RELOAD( 0x1000, 0x1000 ) +ROM_END + + ROM_START( sureshot ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD( "u-19 hldly s.shot 020687.u19.a12.bin", 0xf8000, 0x02000, CRC(028bdb61) SHA1(e39c27cc6dec12de5a5e60d544f35448e49baee1) ) @@ -909,7 +938,9 @@ ROM_START( secondch ) ROM_RELOAD( 0x1000, 0x1000 ) ROM_END -GAME( 1984, trvhang, 0, sms, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Trivia Hangup (question set 1)", MACHINE_SUPPORTS_SAVE ) /* Version Trivia-1-050185 */ -GAME( 1984, trvhanga, 0, sms, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Trivia Hangup (question set 2)", MACHINE_NOT_WORKING ) /* Version Trivia-2-011586 */ -GAME( 1985, sureshot, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Sure Shot", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, secondch, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Second Chance", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, trvhang, 0, sms, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Trivia Hangup (question set 1)", MACHINE_SUPPORTS_SAVE ) /* Version Trivia-1-050185 */ +GAME( 1984, trvhanga, 0, sms, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Trivia Hangup (question set 2)", MACHINE_NOT_WORKING ) /* Version Trivia-2-011586 */ +GAME( 1984, sms4in1, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "4-in-1", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, smsjoker, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Joker Poker With Hi-Lo Double-Up", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, sureshot, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Sure Shot", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, secondch, 0, sureshot, sms, smsmfg_state, 0, ROT0, "SMS Manufacturing Corp.", "Second Chance", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 7cfa3598c83..c122a62259b 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34634,6 +34634,8 @@ smssdisp // Sega Master System Store Display Unit @source:smsmcorp.cpp secondch // (c) 1985 SMS MFG CORP sureshot // (c) 1985 SMS MFG CORP +smsjoker // (c) 1985 SMS MFG CORP +sms4in1 // (c) 1984 SMS MFG CORP trvhang // (c) 1984 SMS MFG CORP trvhanga // (c) 1984 SMS MFG CORP -- cgit v1.2.3-70-g09d2 From 61d941630e75c96ceccb0e268cbfd76cceb69bef Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 13 Dec 2017 22:28:21 -0500 Subject: Fix debug build (nw) --- src/devices/machine/68340dma.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp index e37e573e5e6..cd69e4c9a1b 100644 --- a/src/devices/machine/68340dma.cpp +++ b/src/devices/machine/68340dma.cpp @@ -8,9 +8,6 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) { - assert(m68340DMA); - //m68340_dma &dma = *m68340DMA; - int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask); @@ -19,9 +16,6 @@ READ32_MEMBER( m68340_cpu_device::m68340_internal_dma_r ) WRITE32_MEMBER( m68340_cpu_device::m68340_internal_dma_w ) { - assert(m68340DMA); - //m68340_dma &dma = *m68340DMA; - int pc = space.device().safe_pc(); logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask); } -- cgit v1.2.3-70-g09d2 From 5b5d527822a6d9f90ff16db5028b303f757f102e Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 13 Dec 2017 22:37:16 -0500 Subject: device_interface: Eliminate device pointer conversion (nw) --- src/devices/bus/ti99x/990_hd.cpp | 2 +- src/emu/device.h | 1 - src/mame/drivers/n64.cpp | 2 +- src/mame/machine/atarifdc.cpp | 2 +- 4 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/devices/bus/ti99x/990_hd.cpp b/src/devices/bus/ti99x/990_hd.cpp index 0bb3b475086..9c2ce32ae51 100644 --- a/src/devices/bus/ti99x/990_hd.cpp +++ b/src/devices/bus/ti99x/990_hd.cpp @@ -241,7 +241,7 @@ DEVICE_IMAGE_LOAD_MEMBER( ti990_hdc_device, ti990_hd ) */ DEVICE_IMAGE_UNLOAD_MEMBER( ti990_hdc_device, ti990_hd ) { - int id = get_id_from_device( image ); + int id = get_id_from_device(&image.device()); hd_unit_t *d; d = &m_d[id]; diff --git a/src/emu/device.h b/src/emu/device.h index 211da59cb38..38b20ba3111 100644 --- a/src/emu/device.h +++ b/src/emu/device.h @@ -635,7 +635,6 @@ public: device_t &device() { return m_device; } const device_t &device() const { return m_device; } operator device_t &() { return m_device; } - operator device_t *() { return &m_device; } // iteration helpers device_interface *interface_next() const { return m_interface_next; } diff --git a/src/mame/drivers/n64.cpp b/src/mame/drivers/n64.cpp index 3aac0f61e71..d2786cbb92e 100644 --- a/src/mame/drivers/n64.cpp +++ b/src/mame/drivers/n64.cpp @@ -341,7 +341,7 @@ DEVICE_IMAGE_LOAD_MEMBER(n64_mess_state,n64_cart) } } - periphs->m_nvram_image = image; + periphs->m_nvram_image = &image.device(); logerror("cart length = %d\n", length); diff --git a/src/mame/machine/atarifdc.cpp b/src/mame/machine/atarifdc.cpp index 0603ebda199..207d9ad5ab1 100644 --- a/src/mame/machine/atarifdc.cpp +++ b/src/mame/machine/atarifdc.cpp @@ -111,7 +111,7 @@ static void _atari_load_proc(device_image_interface &image, bool is_created) void atari_fdc_device::atari_load_proc(device_image_interface &image, bool is_created) { - int id = floppy_get_drive(image); + int id = floppy_get_drive(&image.device()); int size, i; m_drv[id].image = std::make_unique(MAXSIZE); -- cgit v1.2.3-70-g09d2 From d31e5bc06187dda273cf71fcf821f6277f0a9d26 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 13 Dec 2017 22:38:15 -0500 Subject: tek4404: XTAL definition for video clock (nw) --- src/emu/drivers/xtal.h | 1 + src/mame/drivers/tek440x.cpp | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h index fabe5b44f21..b2cbaeb5fb9 100644 --- a/src/emu/drivers/xtal.h +++ b/src/emu/drivers/xtal.h @@ -220,6 +220,7 @@ enum XTAL_24_8832MHz = 24883200, /* DEC VT100 */ XTAL_25MHz = 25000000, /* Namco System 22, Taito GNET, Dogyuun h/w */ XTAL_25_1748MHz = 25174800, /* Sega System 16A/16B (1600x NTSC line rate) */ + XTAL_25_2MHz = 25200000, /* Tektronix 4404 video clock */ XTAL_25_39836MHz = 25398360, /* Tandberg TDV 2324 */ XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */ XTAL_25_590906MHz = 25590906, /* Atari Jaguar NTSC */ diff --git a/src/mame/drivers/tek440x.cpp b/src/mame/drivers/tek440x.cpp index 6ce52ea8655..babe0752852 100644 --- a/src/mame/drivers/tek440x.cpp +++ b/src/mame/drivers/tek440x.cpp @@ -53,7 +53,7 @@ #include "speaker.h" -#define VIDEO_CLOCK 25200000 +#define VIDEO_CLOCK XTAL_25_2MHz class tek440x_state : public driver_device { -- cgit v1.2.3-70-g09d2 From 6379bf581489df72694b1c42cc7436ca0f1d89b2 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 13 Dec 2017 22:39:31 -0500 Subject: softlist_dev: Change misleading parameter name (nw) --- src/emu/softlist_dev.cpp | 10 +++++----- src/emu/softlist_dev.h | 8 ++++---- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/emu/softlist_dev.cpp b/src/emu/softlist_dev.cpp index 8e02afd48ed..d9dc013a26f 100644 --- a/src/emu/softlist_dev.cpp +++ b/src/emu/softlist_dev.cpp @@ -44,7 +44,7 @@ image_software_list_loader image_software_list_loader::s_instance; // false_software_list_loader::load_software //------------------------------------------------- -bool false_software_list_loader::load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const +bool false_software_list_loader::load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const { return false; } @@ -54,9 +54,9 @@ bool false_software_list_loader::load_software(device_image_interface &device, s // rom_software_list_loader::load_software //------------------------------------------------- -bool rom_software_list_loader::load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const +bool rom_software_list_loader::load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const { - swlist.machine().rom_load().load_software_part_region(device, swlist, swname, start_entry); + swlist.machine().rom_load().load_software_part_region(image.device(), swlist, swname, start_entry); return true; } @@ -65,9 +65,9 @@ bool rom_software_list_loader::load_software(device_image_interface &device, sof // image_software_list_loader::load_software //------------------------------------------------- -bool image_software_list_loader::load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const +bool image_software_list_loader::load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const { - return device.load_software(swlist, swname, start_entry); + return image.load_software(swlist, swname, start_entry); } diff --git a/src/emu/softlist_dev.h b/src/emu/softlist_dev.h index 855fee42062..e5c893cd60a 100644 --- a/src/emu/softlist_dev.h +++ b/src/emu/softlist_dev.h @@ -80,7 +80,7 @@ enum software_compatibility class software_list_loader { public: - virtual bool load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const = 0; + virtual bool load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const = 0; }; @@ -89,7 +89,7 @@ public: class false_software_list_loader : public software_list_loader { public: - virtual bool load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; + virtual bool load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; static const software_list_loader &instance() { return s_instance; } private: @@ -102,7 +102,7 @@ private: class rom_software_list_loader : public software_list_loader { public: - virtual bool load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; + virtual bool load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; static const software_list_loader &instance() { return s_instance; } private: @@ -115,7 +115,7 @@ private: class image_software_list_loader : public software_list_loader { public: - virtual bool load_software(device_image_interface &device, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; + virtual bool load_software(device_image_interface &image, software_list_device &swlist, const char *swname, const rom_entry *start_entry) const override; static const software_list_loader &instance() { return s_instance; } private: -- cgit v1.2.3-70-g09d2