From ea737f755dfe21dabc20bd22de0c7a5c2a8ed2b4 Mon Sep 17 00:00:00 2001 From: arbee Date: Thu, 18 May 2023 21:49:46 -0400 Subject: apple/heathrow.cpp: Reworked class inheritance ordering and added NVRAM support. [R. Belmont] --- src/mame/apple/heathrow.cpp | 292 +++++++++++++++++++++++++++++++------------- src/mame/apple/heathrow.h | 64 +++++++--- 2 files changed, 249 insertions(+), 107 deletions(-) diff --git a/src/mame/apple/heathrow.cpp b/src/mame/apple/heathrow.cpp index d69a096dc79..54cf3e82065 100644 --- a/src/mame/apple/heathrow.cpp +++ b/src/mame/apple/heathrow.cpp @@ -14,6 +14,9 @@ - Ethernet (10 Mbps for Heathrow, 10/100 for Paddington) - Audio - Descriptor-based DMA engine, as described in "Macintosh Technology in the Common Hardware Reference Platform" + - PRAM for Open Firmware's use, separate from the classic 256 bytes in Cuda or PG&E (O'Hare and later) + + Genealogy order is Grand Central (60x) -> O'Hare (60x) -> Heathrow (G3) -> Paddington (G3) -> KeyLargo (G3/G4) -> K2 (G4/G5) -> Shasta (G5). */ #include "emu.h" @@ -35,10 +38,10 @@ static constexpr u32 C15M = (C7M * 2); // DEVICE DEFINITIONS //************************************************************************** +DEFINE_DEVICE_TYPE(GRAND_CENTRAL, grandcentral_device, "grndctrl", "Apple Grand Central PCI I/O ASIC") +DEFINE_DEVICE_TYPE(OHARE, ohare_device, "ohare", "Apple O'Hare PCI I/O ASIC") DEFINE_DEVICE_TYPE(HEATHROW, heathrow_device, "heathrow", "Apple Heathrow PCI I/O ASIC") DEFINE_DEVICE_TYPE(PADDINGTON, paddington_device, "paddington", "Apple Paddington PCI I/O ASIC") -DEFINE_DEVICE_TYPE(OHARE, ohare_device, "ohare", "Apple O'Hare PCI I/O ASIC") -DEFINE_DEVICE_TYPE(GRAND_CENTRAL, grandcentral_device, "grndctrl", "Apple Grand Central PCI I/O ASIC") //------------------------------------------------- // ADDRESS_MAP @@ -65,53 +68,86 @@ DEFINE_DEVICE_TYPE(GRAND_CENTRAL, grandcentral_device, "grndctrl", "Apple Grand 0x60000 (128K BAR, no) PRAM PRAM 0x70000 (128K BAR, no) PRAM PRAM */ -void grandcentral_device::map(address_map &map) +void macio_device::base_map(address_map &map) { map(0x00000, 0x00fff).rw(FUNC(grandcentral_device::macio_r), FUNC(grandcentral_device::macio_w)); + map(0x08000, 0x0801f).m(m_dma_scsi, FUNC(dbdma_device::map)); + map(0x08100, 0x0811f).m(m_dma_floppy, FUNC(dbdma_device::map)); + map(0x08400, 0x0841f).m(m_dma_sccatx, FUNC(dbdma_device::map)); + map(0x08500, 0x0851f).m(m_dma_sccarx, FUNC(dbdma_device::map)); + map(0x08600, 0x0861f).m(m_dma_sccbtx, FUNC(dbdma_device::map)); + map(0x08700, 0x0871f).m(m_dma_sccbrx, FUNC(dbdma_device::map)); map(0x08800, 0x0881f).m(m_dma_audio_out, FUNC(dbdma_device::map)); map(0x08900, 0x0891f).m(m_dma_audio_in, FUNC(dbdma_device::map)); map(0x12000, 0x12fff).rw(FUNC(grandcentral_device::scc_r), FUNC(grandcentral_device::scc_w)); map(0x13000, 0x13fff).rw(FUNC(grandcentral_device::scc_macrisc_r), FUNC(grandcentral_device::scc_macrisc_w)); - map(0x14000, 0x140ff).rw(FUNC(heathrow_device::codec_r), FUNC(heathrow_device::codec_w)); + map(0x14000, 0x140ff).rw(FUNC(grandcentral_device::codec_r), FUNC(grandcentral_device::codec_w)); map(0x15000, 0x15fff).rw(FUNC(grandcentral_device::fdc_r), FUNC(grandcentral_device::fdc_w)); map(0x16000, 0x17fff).rw(FUNC(grandcentral_device::mac_via_r), FUNC(grandcentral_device::mac_via_w)); } +void grandcentral_device::map(address_map &map) +{ + base_map(map); + map(0x08a00, 0x08a1f).m(m_dma_scsi1, FUNC(dbdma_device::map)); +} + +void ohare_device::map(address_map &map) +{ + base_map(map); + map(0x08b00, 0x08b1f).m(m_dma_ata0, FUNC(dbdma_device::map)); + map(0x08c00, 0x08c1f).m(m_dma_ata1, FUNC(dbdma_device::map)); + + map(0x60000, 0x7ffff).rw(FUNC(ohare_device::nvram_r), FUNC(ohare_device::nvram_w)).umask32(0x000000ff); +} + void heathrow_device::map(address_map &map) { - map(0x00000, 0x00fff).rw(FUNC(heathrow_device::macio_r), FUNC(heathrow_device::macio_w)); - map(0x08800, 0x0881f).m(m_dma_audio_out, FUNC(dbdma_device::map)); - map(0x08900, 0x0891f).m(m_dma_audio_in, FUNC(dbdma_device::map)); - map(0x12000, 0x12fff).rw(FUNC(heathrow_device::scc_r), FUNC(heathrow_device::scc_w)); - map(0x13000, 0x13fff).rw(FUNC(heathrow_device::scc_macrisc_r), FUNC(heathrow_device::scc_macrisc_w)); - map(0x14000, 0x140ff).rw(FUNC(heathrow_device::codec_r), FUNC(heathrow_device::codec_w)); - map(0x15000, 0x15fff).rw(FUNC(heathrow_device::fdc_r), FUNC(heathrow_device::fdc_w)); - map(0x16000, 0x17fff).rw(FUNC(heathrow_device::mac_via_r), FUNC(heathrow_device::mac_via_w)); - map(0x60000, 0x7ffff).rw(FUNC(heathrow_device::nvram_r), FUNC(heathrow_device::nvram_w)).umask32(0x000000ff); + ohare_device::map(map); + map(0x10040, 0x10043).lr32([]() { return 0xffffffff; }, "hack"); + map(0x100e0, 0x100e3).lr32([]() { return 0xffffffff; }, "hack2"); } //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- -void heathrow_device::device_add_mconfig(machine_config &config) +void macio_device::device_add_mconfig(machine_config &config) { R65NC22(config, m_via1, C7M / 10); - m_via1->readpa_handler().set(FUNC(heathrow_device::via_in_a)); - m_via1->readpb_handler().set(FUNC(heathrow_device::via_in_b)); - m_via1->writepa_handler().set(FUNC(heathrow_device::via_out_a)); - m_via1->writepb_handler().set(FUNC(heathrow_device::via_out_b)); - m_via1->cb2_handler().set(FUNC(heathrow_device::via_out_cb2)); - m_via1->irq_handler().set(FUNC(heathrow_device::set_irq_line<18>)); + m_via1->readpa_handler().set(FUNC(macio_device::via_in_a)); + m_via1->readpb_handler().set(FUNC(macio_device::via_in_b)); + m_via1->writepa_handler().set(FUNC(macio_device::via_out_a)); + m_via1->writepb_handler().set(FUNC(macio_device::via_out_b)); + m_via1->cb2_handler().set(FUNC(macio_device::via_out_cb2)); + m_via1->irq_handler().set(FUNC(macio_device::set_irq_line<18>)); + + DBDMA_CHANNEL(config, m_dma_scsi, 0); + m_dma_scsi->irq_callback().set(FUNC(macio_device::set_irq_line<0>)); + + DBDMA_CHANNEL(config, m_dma_floppy, 0); + m_dma_floppy->irq_callback().set(FUNC(macio_device::set_irq_line<1>)); + + DBDMA_CHANNEL(config, m_dma_sccatx, 0); + m_dma_sccatx->irq_callback().set(FUNC(macio_device::set_irq_line<4>)); + + DBDMA_CHANNEL(config, m_dma_sccarx, 0); + m_dma_sccarx->irq_callback().set(FUNC(macio_device::set_irq_line<5>)); + + DBDMA_CHANNEL(config, m_dma_sccbtx, 0); + m_dma_sccbtx->irq_callback().set(FUNC(macio_device::set_irq_line<6>)); + + DBDMA_CHANNEL(config, m_dma_sccbrx, 0); + m_dma_sccbrx->irq_callback().set(FUNC(macio_device::set_irq_line<7>)); DBDMA_CHANNEL(config, m_dma_audio_out, 0); - m_dma_audio_out->irq_callback().set(FUNC(heathrow_device::set_irq_line<8>)); + m_dma_audio_out->irq_callback().set(FUNC(macio_device::set_irq_line<8>)); DBDMA_CHANNEL(config, m_dma_audio_in, 0); - m_dma_audio_in->irq_callback().set(FUNC(heathrow_device::set_irq_line<9>)); + m_dma_audio_in->irq_callback().set(FUNC(macio_device::set_irq_line<9>)); SWIM3(config, m_fdc, C15M); - m_fdc->devsel_cb().set(FUNC(heathrow_device::devsel_w)); - m_fdc->phases_cb().set(FUNC(heathrow_device::phases_w)); + m_fdc->devsel_cb().set(FUNC(macio_device::devsel_w)); + m_fdc->phases_cb().set(FUNC(macio_device::phases_w)); applefdintf_device::add_35_hd(config, m_floppy[0]); applefdintf_device::add_35_nc(config, m_floppy[1]); @@ -132,16 +168,35 @@ void heathrow_device::device_add_mconfig(machine_config &config) rs232b.cts_handler().set(m_scc, FUNC(z80scc_device::ctsb_w)); } -void heathrow_device::config_map(address_map &map) +void grandcentral_device::device_add_mconfig(machine_config &config) +{ + macio_device::device_add_mconfig(config); + + DBDMA_CHANNEL(config, m_dma_scsi1, 0, m_pci_memory); + m_dma_scsi1->irq_callback().set(FUNC(macio_device::set_irq_line<10>)); +} + +void ohare_device::device_add_mconfig(machine_config &config) +{ + macio_device::device_add_mconfig(config); + + DBDMA_CHANNEL(config, m_dma_ata0, 0); + m_dma_ata0->irq_callback().set(FUNC(macio_device::set_irq_line<2>)); + + DBDMA_CHANNEL(config, m_dma_ata1, 0); + m_dma_ata1->irq_callback().set(FUNC(macio_device::set_irq_line<3>)); +} + +void macio_device::config_map(address_map &map) { pci_device::config_map(map); } //------------------------------------------------- -// heathrow_device - constructor +// macio_device - constructor //------------------------------------------------- -heathrow_device::heathrow_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) +macio_device::macio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : pci_device(mconfig, type, tag, owner, clock), write_irq(*this), write_pb4(*this), @@ -155,6 +210,12 @@ heathrow_device::heathrow_device(const machine_config &mconfig, device_type type m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_scc(*this, "scc"), + m_dma_scsi(*this, "dma_scsi0"), + m_dma_floppy(*this, "dma_floppy"), + m_dma_sccatx(*this, "dma_scca_tx"), + m_dma_sccarx(*this, "dma_scca_rx"), + m_dma_sccbtx(*this, "dma_sccb_tx"), + m_dma_sccbrx(*this, "dma_sccb_rx"), m_dma_audio_in(*this, "dma_audin"), m_dma_audio_out(*this, "dma_audout"), m_pci_memory(*this, ":pci:00.0", AS_DATA), @@ -164,23 +225,37 @@ heathrow_device::heathrow_device(const machine_config &mconfig, device_type type m_toggle = 0; } -heathrow_device::heathrow_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : heathrow_device(mconfig, HEATHROW, tag, owner, clock) +grandcentral_device::grandcentral_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : macio_device(mconfig, GRAND_CENTRAL, tag, owner, clock), + m_dma_scsi1(*this, "dma_scsi1") { } -paddington_device::paddington_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : heathrow_device(mconfig, PADDINGTON, tag, owner, clock) +ohare_device::ohare_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) + : macio_device(mconfig, type, tag, owner, clock), + device_nvram_interface(mconfig, *this), + m_dma_ata0(*this, "dma_ata0"), + m_dma_ata1(*this, "dma_ata1") { } -grandcentral_device::grandcentral_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : heathrow_device(mconfig, GRAND_CENTRAL, tag, owner, clock) +ohare_device::ohare_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : ohare_device(mconfig, OHARE, tag, owner, clock) { } -ohare_device::ohare_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : heathrow_device(mconfig, OHARE, tag, owner, clock) +heathrow_device::heathrow_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) + : ohare_device(mconfig, type, tag, owner, clock) +{ +} + +heathrow_device::heathrow_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : ohare_device(mconfig, HEATHROW, tag, owner, clock) +{ +} + +paddington_device::paddington_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : heathrow_device(mconfig, PADDINGTON, tag, owner, clock) { } @@ -188,7 +263,7 @@ ohare_device::ohare_device(const machine_config &mconfig, const char *tag, devic // device_start - device-specific startup //------------------------------------------------- -void heathrow_device::common_init() +void macio_device::common_init() { write_irq.resolve_safe(); write_pb4.resolve_safe(); @@ -198,8 +273,16 @@ void heathrow_device::common_init() read_codec.resolve_safe(0); write_codec.resolve_safe(); + m_dma_scsi->set_address_space(m_pci_memory); + m_dma_floppy->set_address_space(m_pci_memory); + m_dma_sccatx->set_address_space(m_pci_memory); + m_dma_sccarx->set_address_space(m_pci_memory); + m_dma_sccbtx->set_address_space(m_pci_memory); + m_dma_sccbrx->set_address_space(m_pci_memory); + m_dma_audio_in->set_address_space(m_pci_memory); m_dma_audio_out->set_address_space(m_pci_memory); + pci_device::device_start(); command = 2; // enable our memory range revision = 1; @@ -214,62 +297,69 @@ void heathrow_device::common_init() save_item(NAME(m_InterruptEvents2)); save_item(NAME(m_InterruptMask2)); save_item(NAME(m_InterruptLevels2)); - save_item(NAME(m_nvram)); } -void heathrow_device::device_start() +void grandcentral_device::device_start() { common_init(); - add_map(0x80000, M_MEM, FUNC(heathrow_device::map)); - set_ids(0x106b0010, 0x01, 0xff000001, 0x000000); + add_map(0x20000, M_MEM, FUNC(grandcentral_device::map)); // Grand Central only has 128K of BAR space, the others have 512K + set_ids(0x106b0002, 0x01, 0xff000001, 0x000000); + + m_dma_scsi1->set_address_space(m_pci_memory); } -void paddington_device::device_start() +void ohare_device::device_start() { common_init(); - add_map(0x80000, M_MEM, FUNC(heathrow_device::map)); - set_ids(0x106b0017, 0x01, 0xff000001, 0x000000); + add_map(0x80000, M_MEM, FUNC(grandcentral_device::map)); + set_ids(0x106b0007, 0x01, 0xff0000, 0x000000); + save_item(NAME(m_nvram)); + + m_dma_ata0->set_address_space(m_pci_memory); + m_dma_ata1->set_address_space(m_pci_memory); } -void grandcentral_device::device_start() +void heathrow_device::device_start() { common_init(); - add_map(0x20000, M_MEM, FUNC(heathrow_device::map)); // Grand Central only has 128K of BAR space, the others have 512K - set_ids(0x106b0002, 0x01, 0xff000001, 0x000000); + add_map(0x80000, M_MEM, FUNC(heathrow_device::map)); + set_ids(0x106b0010, 0x01, 0xff0000, 0x000000); + save_item(NAME(m_nvram)); } -void ohare_device::device_start() +void paddington_device::device_start() { common_init(); add_map(0x80000, M_MEM, FUNC(heathrow_device::map)); - set_ids(0x106b0007, 0x01, 0xff000001, 0x000000); + set_ids(0x106b0017, 0x01, 0xff0000, 0x000000); + save_item(NAME(m_nvram)); } //------------------------------------------------- // device_reset - device-specific reset //------------------------------------------------- -void heathrow_device::device_reset() +void macio_device::device_reset() { m_hdsel = 0; } -u8 heathrow_device::via_in_a() +u8 macio_device::via_in_a() { return 0x80; } -u8 heathrow_device::via_in_b() +u8 macio_device::via_in_b() { return read_pb3() << 3; } -WRITE_LINE_MEMBER(heathrow_device::via_out_cb2) +WRITE_LINE_MEMBER(macio_device::via_out_cb2) { write_cb2(state & 1); } -void heathrow_device::via_out_a(u8 data) +void macio_device::via_out_a(u8 data) { int hdsel = BIT(data, 5); if (hdsel != m_hdsel) @@ -282,23 +372,23 @@ void heathrow_device::via_out_a(u8 data) m_hdsel = hdsel; } -void heathrow_device::via_out_b(u8 data) +void macio_device::via_out_b(u8 data) { write_pb4(BIT(data, 4)); write_pb5(BIT(data, 5)); } -WRITE_LINE_MEMBER(heathrow_device::cb1_w) +WRITE_LINE_MEMBER(macio_device::cb1_w) { m_via1->write_cb1(state); } -WRITE_LINE_MEMBER(heathrow_device::cb2_w) +WRITE_LINE_MEMBER(macio_device::cb2_w) { m_via1->write_cb2(state); } -u16 heathrow_device::mac_via_r(offs_t offset) +u16 macio_device::mac_via_r(offs_t offset) { u16 data; @@ -313,7 +403,7 @@ u16 heathrow_device::mac_via_r(offs_t offset) return (data & 0xff) | (data << 8); } -void heathrow_device::mac_via_w(offs_t offset, u16 data, u16 mem_mask) +void macio_device::mac_via_w(offs_t offset, u16 data, u16 mem_mask) { offset >>= 8; offset &= 0x0f; @@ -326,7 +416,7 @@ void heathrow_device::mac_via_w(offs_t offset, u16 data, u16 mem_mask) m_via1->write(offset, (data >> 8) & 0xff); } -void heathrow_device::via_sync() +void macio_device::via_sync() { // The via runs at 783.36KHz while the main cpu runs at 15MHz or // more, so we need to sync the access with the via clock. Plus @@ -349,7 +439,7 @@ void heathrow_device::via_sync() m_maincpu->adjust_icount(-int(main_cycle - cycle)); } -u16 heathrow_device::swim_r(offs_t offset, u16 mem_mask) +u16 macio_device::swim_r(offs_t offset, u16 mem_mask) { if (!machine().side_effects_disabled()) { @@ -359,7 +449,7 @@ u16 heathrow_device::swim_r(offs_t offset, u16 mem_mask) u16 result = m_fdc->read((offset >> 8) & 0xf); return result << 8; } -void heathrow_device::swim_w(offs_t offset, u16 data, u16 mem_mask) +void macio_device::swim_w(offs_t offset, u16 data, u16 mem_mask) { if (ACCESSING_BITS_0_7) m_fdc->write((offset >> 8) & 0xf, data & 0xff); @@ -367,13 +457,13 @@ void heathrow_device::swim_w(offs_t offset, u16 data, u16 mem_mask) m_fdc->write((offset >> 8) & 0xf, data >> 8); } -void heathrow_device::phases_w(u8 phases) +void macio_device::phases_w(u8 phases) { if (m_cur_floppy) m_cur_floppy->seek_phase_w(phases); } -void heathrow_device::devsel_w(u8 devsel) +void macio_device::devsel_w(u8 devsel) { if (devsel == 1) m_cur_floppy = m_floppy[0]->get_device(); @@ -387,7 +477,7 @@ void heathrow_device::devsel_w(u8 devsel) m_cur_floppy->ss_w(m_hdsel); } -u32 heathrow_device::macio_r(offs_t offset) +u32 macio_device::macio_r(offs_t offset) { // InterruptLevels = live status of all interrupt lines // InterruptMask = mask to determine which bits of InterruptLevels matter @@ -411,7 +501,7 @@ u32 heathrow_device::macio_r(offs_t offset) return 0; } -void heathrow_device::macio_w(offs_t offset, u32 data, u32 mem_mask) +void macio_device::macio_w(offs_t offset, u32 data, u32 mem_mask) { data = swapendian_int32(data); mem_mask = swapendian_int32(mem_mask); @@ -419,6 +509,7 @@ void heathrow_device::macio_w(offs_t offset, u32 data, u32 mem_mask) switch (offset << 2) { case 0x14: + LOGMASKED(LOG_IRQ, "%s: %08x to InterruptMask2\n", tag(), data); m_InterruptMask2 = data; recalc_irqs(); break; @@ -443,6 +534,7 @@ void heathrow_device::macio_w(offs_t offset, u32 data, u32 mem_mask) recalc_irqs(); break; case 0x24: + LOGMASKED(LOG_IRQ, "%s: %08x to InterruptMask\n", tag(), data); m_InterruptMask = data; recalc_irqs(); break; @@ -469,7 +561,7 @@ void heathrow_device::macio_w(offs_t offset, u32 data, u32 mem_mask) } } -void heathrow_device::recalc_irqs() +void macio_device::recalc_irqs() { LOGMASKED(LOG_IRQ, "%s recalc_irqs: events %08x levels %08x mask %08x\n", tag(), m_InterruptEvents, m_InterruptLevels, m_InterruptMask); m_InterruptEvents = m_InterruptLevels & m_InterruptMask; @@ -484,7 +576,7 @@ void heathrow_device::recalc_irqs() } } -template WRITE_LINE_MEMBER(heathrow_device::set_irq_line) +template WRITE_LINE_MEMBER(macio_device::set_irq_line) { if (bit < 32) { @@ -511,38 +603,28 @@ template WRITE_LINE_MEMBER(heathrow_device::set_irq_line) recalc_irqs(); } -u8 heathrow_device::fdc_r(offs_t offset) +u8 macio_device::fdc_r(offs_t offset) { return m_fdc->read(offset >> 9); } -void heathrow_device::fdc_w(offs_t offset, u8 data) +void macio_device::fdc_w(offs_t offset, u8 data) { m_fdc->write(offset >> 9, data); } -u8 heathrow_device::nvram_r(offs_t offset) -{ - return m_nvram[offset>>2]; -} - -void heathrow_device::nvram_w(offs_t offset, u8 data) -{ - m_nvram[offset>>2] = data; -} - -u16 heathrow_device::scc_r(offs_t offset) +u16 macio_device::scc_r(offs_t offset) { u16 result = m_scc->dc_ab_r(offset); return (result << 8) | result; } -void heathrow_device::scc_w(offs_t offset, u16 data) +void macio_device::scc_w(offs_t offset, u16 data) { m_scc->dc_ab_w(offset, data >> 8); } -u8 heathrow_device::scc_macrisc_r(offs_t offset) +u8 macio_device::scc_macrisc_r(offs_t offset) { switch ((offset >> 4) & 0xf) { @@ -561,7 +643,7 @@ u8 heathrow_device::scc_macrisc_r(offs_t offset) return 0; } -void heathrow_device::scc_macrisc_w(offs_t offset, u8 data) +void macio_device::scc_macrisc_w(offs_t offset, u8 data) { switch ((offset >> 4) & 0xf) { @@ -579,23 +661,59 @@ void heathrow_device::scc_macrisc_w(offs_t offset, u8 data) } } +// O'Hare and later OF NVRAM support +u8 ohare_device::nvram_r(offs_t offset) +{ + return m_nvram[offset>>2]; +} + +void ohare_device::nvram_w(offs_t offset, u8 data) +{ + m_nvram[offset>>2] = data; + if ((offset>>2) > 0x7fff) + { + fatalerror("%s: NVRAM write out of bounds @ %x", tag(), offset>>2); + } +} + +void ohare_device::nvram_default() +{ + std::fill(std::begin(m_nvram), std::end(m_nvram), 0); +} + +bool ohare_device::nvram_read(util::read_stream &file) +{ + size_t actual; + if (!file.read(m_nvram, 0x8000, actual) && actual == 0x8000) + { + return true; + } + return false; +} + +bool ohare_device::nvram_write(util::write_stream &file) +{ + size_t actual; + return !file.write(m_nvram, 0x8000, actual) && actual == 0x8000; +} + // Audio support -uint32_t heathrow_device::codec_r(offs_t offset) +uint32_t macio_device::codec_r(offs_t offset) { return read_codec(offset); } -void heathrow_device::codec_w(offs_t offset, uint32_t data) +void macio_device::codec_w(offs_t offset, uint32_t data) { write_codec(offset, data); } -u32 heathrow_device::codec_dma_read(u32 offset) +u32 macio_device::codec_dma_read(u32 offset) { return m_dma_audio_out->dma_read(offset); } -void heathrow_device::codec_dma_write(u32 offset, u32 data) +void macio_device::codec_dma_write(u32 offset, u32 data) { m_dma_audio_in->dma_write(offset, data); } diff --git a/src/mame/apple/heathrow.h b/src/mame/apple/heathrow.h index 548db815697..54886678475 100644 --- a/src/mame/apple/heathrow.h +++ b/src/mame/apple/heathrow.h @@ -15,14 +15,11 @@ #include "machine/z80scc.h" #include "speaker.h" -// ======================> heathrow_device - -class heathrow_device : public pci_device +class macio_device : public pci_device { public: // construction/destruction - heathrow_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - heathrow_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + macio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); // interface routines auto irq_callback() { return write_irq.bind(); } @@ -34,8 +31,6 @@ public: auto codec_r_callback() { return read_codec.bind(); } auto codec_w_callback() { return write_codec.bind(); } - virtual void map(address_map &map); - template void set_maincpu_tag(T &&... args) { m_maincpu.set_tag(std::forward(args)...); } template void set_pci_root_tag(T &&... args) { m_pci_memory.set_tag(std::forward(args)...); } @@ -53,10 +48,10 @@ public: protected: // device-level overrides - virtual void device_start() override; virtual void device_reset() override; virtual void device_add_mconfig(machine_config &config) override; + virtual void base_map(address_map &map); virtual void config_map(address_map &map) override; void common_init(); @@ -70,9 +65,6 @@ protected: u8 fdc_r(offs_t offset); void fdc_w(offs_t offset, u8 data); - u8 nvram_r(offs_t offset); - void nvram_w(offs_t offset, u8 data); - u16 scc_r(offs_t offset); void scc_w(offs_t offset, u16 data); u8 scc_macrisc_r(offs_t offset); @@ -92,15 +84,14 @@ protected: required_device m_fdc; required_device_array m_floppy; required_device m_scc; - required_device m_dma_audio_in, m_dma_audio_out; + required_device m_dma_scsi, m_dma_floppy, m_dma_sccatx, m_dma_sccarx; + required_device m_dma_sccbtx, m_dma_sccbrx, m_dma_audio_in, m_dma_audio_out; required_address_space m_pci_memory; private: floppy_image_device *m_cur_floppy = nullptr; int m_hdsel; - u8 m_nvram[0x20000]; - u8 via_in_a(); u8 via_in_b(); void via_out_a(u8 data); @@ -120,22 +111,55 @@ private: u32 m_InterruptEvents2, m_InterruptMask2, m_InterruptLevels2; }; -class paddington_device : public heathrow_device +class grandcentral_device : public macio_device { public: // construction/destruction - paddington_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + grandcentral_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + virtual void map(address_map &map); protected: // device-level overrides virtual void device_start() override; + virtual void device_add_mconfig(machine_config &config) override; + + required_device m_dma_scsi1; }; -class grandcentral_device : public heathrow_device +class ohare_device : public macio_device, public device_nvram_interface { public: // construction/destruction - grandcentral_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + ohare_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + ohare_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + virtual void map(address_map &map); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_add_mconfig(machine_config &config) override; + + // device_nvram_interface overrides + virtual void nvram_default() override; + virtual bool nvram_read(util::read_stream &file) override; + virtual bool nvram_write(util::write_stream &file) override; + + required_device m_dma_ata0, m_dma_ata1; + + u8 nvram_r(offs_t offset); + void nvram_w(offs_t offset, u8 data); + + u8 m_nvram[0x8000]; +}; + +class heathrow_device : public ohare_device +{ +public: + // construction/destruction + heathrow_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + heathrow_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); void map(address_map &map) override; @@ -144,11 +168,11 @@ protected: virtual void device_start() override; }; -class ohare_device : public heathrow_device +class paddington_device : public heathrow_device { public: // construction/destruction - ohare_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + paddington_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: // device-level overrides -- cgit v1.2.3