From dc77e03d7f5286b6a69237141fd3c3ba6ac1b8be Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 5 Apr 2024 19:58:21 +0200 Subject: New systems marked not working ------------------------------ Hammer Champ (Japan) [Hammy] --- src/emu/xtal.cpp | 1 + src/mame/mame.lst | 5 +- src/mame/pinball/mrgame.cpp | 16 +- src/mame/seta/namcoeva.cpp | 378 ++++++++++++++++++++++++++++++++++++++++++++ src/mame/seta/seta2.cpp | 1 + src/mame/seta/seta2.h | 2 - 6 files changed, 392 insertions(+), 11 deletions(-) create mode 100644 src/mame/seta/namcoeva.cpp diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index 2569c4a617d..592cb522756 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -380,6 +380,7 @@ const double XTAL::known_xtals[] = { 26'601'712, /* 26.601712_MHz_XTAL Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */ 26'666'000, /* 26.666_MHz_XTAL Imagetek I4220/I4300 */ 26'666'666, /* 26.666666_MHz_XTAL Irem M92 but most use 27MHz */ + 26'670'000, /* 26.670_MHz_XTAL Namco EVA */ 26'686'000, /* 26.686_MHz_XTAL Typically used on 90's Taito PCBs to drive the custom chips */ 26'824'000, /* 26.824_MHz_XTAL Astro Corp.'s Zoo */ 26'880'000, /* 26.88_MHz_XTAL Roland RF5C36/SA-16 clock (30000 * 896) */ diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e0a93087065..7e15116fc0d 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -41028,6 +41028,9 @@ macsbios // yujan // (C) 1999 Yubis yuka // (c) 1999 Yubis +@source:seta/namcoeva.cpp +hammerch // + @source:seta/seta.cpp atehate // (C) 1993 Athena blandia // (c) 1992 Allumer @@ -41119,11 +41122,11 @@ gundamex // (c) 1994 Banpresto mj4simai // (c) 1996 Maboroshi Ware myangel // (c) 1996 Namco myangel2 // (c) 1997 Namco -staraudi // (c) 1997 Namco namcostr // (c) 2000 Namco penbros // (c) 2000 Subsino pzlbowl // (c) 1999 Nihon System / Moss reelquak // (c) 1997 +staraudi // (c) 1997 Namco telpacfl // (c) 1996 Sunsoft trophyh // (c) 2002 Sammy USA Corporation trophyht // (c) 2002 Sammy USA Corporation diff --git a/src/mame/pinball/mrgame.cpp b/src/mame/pinball/mrgame.cpp index aff5a7c0200..8efd90dd314 100644 --- a/src/mame/pinball/mrgame.cpp +++ b/src/mame/pinball/mrgame.cpp @@ -856,7 +856,7 @@ ROM_START(motrshowb) ROM_LOAD("vid_ic14.rom", 0x0000, 0x8000, CRC(1d4568e2) SHA1(bfc2bb59708ce3a09f9a1b3460ed8d5269840c97)) ROM_REGION(0x10000, "chargen", 0) - ROM_LOAD("vid_ic55.rom", 0x0000, 0x8000, CRC(c27a4ded) SHA1(9c2c9b17f1e71afb74bdfbdcbabb99ef935d32db)) + ROM_LOAD("vid_ic55.rom", 0x0000, 0x8000, CRC(c27a4ded) SHA1(9c2c9b17f1e71afb74bdfbdcbabb99ef935d32db)) // a PCB has been found with this ROM edited to blank the Zaccaria copyright ROM_LOAD("vid_ic56.rom", 0x8000, 0x8000, CRC(1664ec8d) SHA1(e7b15acdac7dfc51b668e908ca95f02a2b569737)) ROM_REGION(0x0020, "proms", 0) @@ -974,10 +974,10 @@ ROM_END } // anonymous namespace -GAME(1988, dakar, 0, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Dakar", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1989, fasttrack, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Fast Track", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1989, motrshow, 0, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Motor Show (set 1)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1989, motrshowa, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Motor Show (set 2)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1989, motrshowb, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Motor Show (set 3)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1990, macattck, 0, macattck, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Mac Attack", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1990, wcup90, 0, wcup90, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "World Cup 90", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1988, dakar, 0, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Dakar", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1989, fasttrack, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Fast Track", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1989, motrshow, 0, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Zaccaria / Mr Game", "Motor Show (set 1)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1989, motrshowa, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Zaccaria / Mr Game", "Motor Show (set 2)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1989, motrshowb, motrshow, mrgame, mrgame, mrgame_state, empty_init, ROT0, "Zaccaria / Mr Game", "Motor Show (set 3)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1990, macattck, 0, macattck, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "Mac Attack", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1990, wcup90, 0, wcup90, mrgame, mrgame_state, empty_init, ROT0, "Mr Game", "World Cup 90", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/seta/namcoeva.cpp b/src/mame/seta/namcoeva.cpp new file mode 100644 index 00000000000..cf958992350 --- /dev/null +++ b/src/mame/seta/namcoeva.cpp @@ -0,0 +1,378 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Hammer Champ +Namco 1997 +https://www.youtube.com/watch?v=gs1pAe5S0gY + +main board: +NAMCO EVA PCB 8826960100 - P0-135B +with +- TMP68301AF-16 (main) +- 3x NEC DX-102 +- Hitachi H8/3002 (sound) +- Namco C352 +- Namco C416 +- MACH111 PLD (KC026) +- 2x banks of 8 DIP switches +- 50 MHz XTAL +- 26.670 MHz XTAL + +I/O board: +NAMCO M136 I/O PCB - hi-pric P41 B - 1423961101 (1423971101) +with +Motorola MC68HC11K1 +Fuji MB8422 DPRAM +8 MHz XTAL + +The game runs without IO board to test mode but will not go in game (error 07) + + +TODO: +- currently starts with 9 credits inserted. After entering and exiting test mode, the game shows 0 + coins and can be coined up normally; +- implement proper controls. The game has a peculiar input setup (see video link above); +- complete sound hook up (missing IRQ?). Puts same string as namco/namcod1.cpp in H8 RAM ("Quattro Ver.1.2.H8"); +- after coining up there's a GFX bug that maybe points to some unimplemented feature in seta2_v.cpp; +- once the video emulation in seta/seta2_v.cpp has been devicified, remove derivation from + seta/seta2.h and possibly move to namco/ folder. +*/ + + +#include "emu.h" + +#include "seta2.h" + +#include "cpu/mc68hc11/mc68hc11.h" +#include "cpu/h8/h83002.h" +#include "machine/mb8421.h" +#include "machine/watchdog.h" +#include "sound/c352.h" + +#include "speaker.h" + + +// configurable logging +#define LOG_MAINCPU (1U << 1) +#define LOG_IOCPU (1U << 2) +#define LOG_SUBCPU (1U << 3) + +#define VERBOSE (2) + +#include "logmacro.h" + +#define LOGMAINCPU(...) LOGMASKED(LOG_MAINCPU, __VA_ARGS__) +#define LOGIOCPU(...) LOGMASKED(LOG_IOCPU, __VA_ARGS__) +#define LOGSUBCPU(...) LOGMASKED(LOG_SUBCPU, __VA_ARGS__) + + +namespace { + +class namcoeva_state : public seta2_state +{ +public: + namcoeva_state(const machine_config &mconfig, device_type type, const char *tag) : + seta2_state(mconfig, type, tag), + m_subcpu(*this, "subcpu"), + m_iocpu(*this, "iocpu") + { } + + void hammerch(machine_config &config) ATTR_COLD; + +private: + required_device m_subcpu; + required_device m_iocpu; + + void maincpu_map(address_map &map) ATTR_COLD; + void subcpu_map(address_map &map) ATTR_COLD; + void iocpu_map(address_map &map) ATTR_COLD; +}; + + +void namcoeva_state::maincpu_map(address_map &map) +{ + map(0x000000, 0x07ffff).rom(); + map(0x200000, 0x20ffff).ram(); + map(0x210000, 0x21002f).ram(); // ?? + map(0x300000, 0x3001ff).ram(); // ?? + //map(0x400000, 0x40ffff).ram().share("sharedram"); // writes here, but if mapped code loops (probably some missing IRQ). Sound test shows these are audio-related comms. + map(0x600000, 0x600001).portr("IN0"); // TODO: inputs aren't tested yet + map(0x600002, 0x600003).portr("IN1"); + map(0x600004, 0x600005).portr("IN2"); + map(0x600006, 0x600007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); + map(0x600200, 0x600201).nopw(); // lamps? + map(0x600300, 0x600301).portr("DSW1"); + map(0x600302, 0x600303).portr("DSW2"); + map(0x800000, 0x800fff).rw("dpram", FUNC(mb8421_device::left_r), FUNC(mb8421_device::left_w)).umask16(0x00ff); // EXT IO CHECK: NG if unmapped + map(0xa00000, 0xa3ffff).ram().share("spriteram"); + map(0xa40000, 0xa4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0xa60000, 0xa6003f).ram().w(FUNC(namcoeva_state::vregs_w)).share("vregs"); + map(0xc3ff00, 0xc3ffff).ram(); // keycus? +} + +void namcoeva_state::subcpu_map(address_map &map) +{ + map(0x000000, 0x01ffff).rom(); + map(0x200000, 0x20ffff).ram().share("sharedram"); + map(0xa00000, 0xa07fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); +} + +void namcoeva_state::iocpu_map(address_map &map) +{ + map(0x1000, 0x17ff).rw("dpram", FUNC(mb8421_device::right_r), FUNC(mb8421_device::right_w)); + map(0x8000, 0xffff).rom(); +} + + +static INPUT_PORTS_START( hammerch ) + PORT_START("IN0") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) // Photo Sensor - High (Game) in test mode + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON3 ) // " + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) // " + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) // " + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON8 ) // Photo Sensor - Low (Game) in test mode (also used to move and select in test mode) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON7 ) // " + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON6 ) // " + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON5 ) // " + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN2") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // Coin Switch 1 in test mode + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // Coin Switch 2 in test mode, doesn't have any effect in game + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Service Switch in test mode + PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW ) // Test Switch in test mode + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW1") + PORT_SERVICE_DIPLOC( 0x0001, IP_ACTIVE_LOW, "SW1:1" ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3") + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, "Freeze Screen" ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW2") + PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1") + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2") + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3") + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4") + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IO_IN0") // TODO: Photo Sensor - Low (I/O) and High (I/O) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + + +static const gfx_layout tile_layout = +{ + 8,8, + RGN_FRAC(1,1), + 8, + { STEP8(7*8, -8) }, + { STEP8(0, 1) }, + { STEP8(0, 8*8) }, + 8*8*8 +}; + + +/* Tiles are 8bpp, but the hardware is additionally able to discard + some bitplanes and use the low 4 bits only, or the high 4 bits only */ +static GFXDECODE_START( gfx_dx_10x ) + GFXDECODE_ENTRY( "sprites", 0, tile_layout, 0, 0x8000/16 ) // 8bpp, but 4bpp color granularity +GFXDECODE_END + + +void namcoeva_state::hammerch(machine_config &config) +{ + tmp68301_device &maincpu(TMP68301(config, m_maincpu, 50_MHz_XTAL / 4)); // TODO: divider not verified + maincpu.set_addrmap(AS_PROGRAM, &namcoeva_state::maincpu_map); + maincpu.parallel_r_cb().set([this] () { LOGMAINCPU("%s: P4 read\n", machine().describe_context()); return uint16_t(0); }); + maincpu.parallel_w_cb().set([this] (uint8_t data) { LOGMAINCPU("%s: P4 write %04x\n", machine().describe_context(), data); }); + maincpu.tx0_handler().set([this] (int state) { LOGMAINCPU("%s: tx0 line write %d\n", machine().describe_context(), state); }); + maincpu.tx1_handler().set([this] (int state) { LOGMAINCPU("%s: tx1 line write %d\n", machine().describe_context(), state); }); + maincpu.tx2_handler().set([this] (int state) { LOGMAINCPU("%s: tx2 line write %d\n", machine().describe_context(), state); }); + + WATCHDOG_TIMER(config, "watchdog"); + + H83002(config, m_subcpu, 26.670_MHz_XTAL / 2); // TODO: divider not verified + m_subcpu->set_addrmap(AS_PROGRAM, &namcoeva_state::subcpu_map); + // seems to only use P4 read at start up + m_subcpu->read_port4().set([this] () { LOGSUBCPU("%s: P4 read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_port4().set([this] (u8 data) { LOGSUBCPU("%s: P4 write %02x\n", machine().describe_context(), data); }); + m_subcpu->read_port6().set([this] () { LOGSUBCPU("%s: P6 read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_port6().set([this] (u8 data) { LOGSUBCPU("%s: P6 write %02x\n", machine().describe_context(), data); }); + m_subcpu->read_port7().set([this] () { LOGSUBCPU("%s: P7 read\n", machine().describe_context()); return u8(0); }); + m_subcpu->read_port8().set([this] () { LOGSUBCPU("%s: P8 read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_port8().set([this] (u8 data) { LOGSUBCPU("%s: P8 write %02x\n", machine().describe_context(), data); }); + m_subcpu->read_port9().set([this] () { LOGSUBCPU("%s: P9 read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_port9().set([this] (u8 data) { LOGSUBCPU("%s: P9 write %02x\n", machine().describe_context(), data); }); + m_subcpu->read_porta().set([this] () { LOGSUBCPU("%s: PA read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_porta().set([this] (u8 data) { LOGSUBCPU("%s: PA write %02x\n", machine().describe_context(), data); }); + m_subcpu->read_portb().set([this] () { LOGSUBCPU("%s: PB read\n", machine().describe_context()); return u8(0); }); + m_subcpu->write_portb().set([this] (u8 data) { LOGSUBCPU("%s: PB write %02x\n", machine().describe_context(), data); }); + m_subcpu->tend0().set([this] (int state) { LOGSUBCPU("%s: tend0 line write %d\n", machine().describe_context(), state); }); + m_subcpu->tend1().set([this] (int state) { LOGSUBCPU("%s: tend1 line write %d\n", machine().describe_context(), state); }); + + MC68HC11K1(config, m_iocpu, 8_MHz_XTAL); + m_iocpu->set_addrmap(AS_PROGRAM, &namcoeva_state::iocpu_map); + m_iocpu->in_pa_callback().set([this] () { LOGIOCPU("%s: PA read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_pb_callback().set([this] () { LOGIOCPU("%s: PB read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_pc_callback().set([this] () { LOGIOCPU("%s: PC read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_pd_callback().set([this] () { LOGIOCPU("%s: PD read\n", machine().describe_context()); return u8(0); }); // read often + m_iocpu->in_pe_callback().set([this] () { LOGIOCPU("%s: PE read\n", machine().describe_context()); return u8(0); }); // read often, Photo Sensor - Low (I/O) and High (I/O) in test mode react from here, but not correctly right now + m_iocpu->in_pf_callback().set([this] () { LOGIOCPU("%s: PF read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_pg_callback().set([this] () { LOGIOCPU("%s: PG read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_ph_callback().set([this] () { LOGIOCPU("%s: PH read\n", machine().describe_context()); return u8(0); }); // read often + m_iocpu->out_pa_callback().set([this] (u8 data) { LOGIOCPU("%s: PA write %02x\n", machine().describe_context(), data); }); + m_iocpu->out_pb_callback().set([this] (u8 data) { LOGIOCPU("%s: PB write %02x\n", machine().describe_context(), data); }); + m_iocpu->out_pc_callback().set([this] (u8 data) { LOGIOCPU("%s: PC write %02x\n", machine().describe_context(), data); }); + m_iocpu->out_pd_callback().set([this] (u8 data) { LOGIOCPU("%s: PD write %02x\n", machine().describe_context(), data); }); // very rarely written (bit 2) + m_iocpu->out_pe_callback().set([this] (u8 data) { LOGIOCPU("%s: PE write %02x\n", machine().describe_context(), data); }); + m_iocpu->out_pf_callback().set([this] (u8 data) { LOGIOCPU("%s: PF write %02x\n", machine().describe_context(), data); }); + m_iocpu->out_pg_callback().set([this] (u8 data) { LOGIOCPU("%s: PG write %02x\n", machine().describe_context(), data); }); // bits 0, 4, 5 and 6 written often + m_iocpu->out_ph_callback().set([this] (u8 data) { LOGIOCPU("%s: PH write %02x\n", machine().describe_context(), data); }); // writes 0xa0 at start up + m_iocpu->in_an0_callback().set([this] () { LOGIOCPU("%s: AN0 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an1_callback().set([this] () { LOGIOCPU("%s: AN1 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an2_callback().set([this] () { LOGIOCPU("%s: AN2 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an3_callback().set([this] () { LOGIOCPU("%s: AN3 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an4_callback().set([this] () { LOGIOCPU("%s: AN4 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an5_callback().set([this] () { LOGIOCPU("%s: AN5 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an6_callback().set([this] () { LOGIOCPU("%s: AN6 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_an7_callback().set([this] () { LOGIOCPU("%s: AN7 read\n", machine().describe_context()); return u8(0); }); + m_iocpu->in_spi2_data_callback().set([this] () { LOGIOCPU("%s: SPI2 data read\n", machine().describe_context()); return u8(0); }); + m_iocpu->out_spi2_data_callback().set([this] (u8 data) { LOGIOCPU("%s: SPI2 data write %02x\n", machine().describe_context(), data); }); + + MB8421(config, "dpram"); // actually MB8422 + + // video hardware + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); + m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); + m_screen->set_size(0x200, 0x100); + m_screen->set_visarea(0x00, 0x140-1, 0x00, 0xe0-1); + m_screen->set_screen_update(FUNC(namcoeva_state::screen_update)); + m_screen->screen_vblank().set(FUNC(namcoeva_state::screen_vblank)); + m_screen->screen_vblank().append_inputline(m_maincpu, 0); + m_screen->set_palette(m_palette); + //m_screen->set_video_attributes(VIDEO_UPDATE_SCANLINE); + + GFXDECODE(config, m_gfxdecode, m_palette, gfx_dx_10x); + PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity + + // sound hardware + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + c352_device &c352(C352(config, "c352", 50_MHz_XTAL / 3, 288)); // TODO: divider not verified + c352.add_route(0, "lspeaker", 1.00); + c352.add_route(1, "rspeaker", 1.00); + c352.add_route(2, "lspeaker", 1.00); + c352.add_route(3, "rspeaker", 1.00); +} + + +ROM_START( hammerch ) + ROM_REGION( 0x200000, "maincpu", 0 ) // TMP68301 + ROM_LOAD16_WORD( "hc1_main0.u02", 0x00000, 0x80000, CRC(150164bb) SHA1(c99f03718fd1002386bfbf8695b7010ec5dad168) ) + + ROM_REGION( 0x80000, "subcpu", 0 ) // H8/3007 + ROM_LOAD( "hc1_sub0.u47", 0x00000, 0x80000, CRC(4762451a) SHA1(b46bf1eaeac317264eb80c2e3f50d2821791569f) ) // 11xxxxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x10000, "iocpu", 0 ) // MC68HC11K1 + ROM_LOAD( "hc1prg0_ioboard.ic2", 0x00000, 0x10000, CRC(606fad7e) SHA1(cf975e09038f84eb75d30130bfaf31f4c74986b2) ) + + ROM_REGION( 0x1000000, "sprites", 0 ) + ROM_LOAD64_WORD( "hc1_cg3.u29", 0x000000, 0x400000, CRC(d9cc519b) SHA1(43670b357fadc5faf5ee229176ae97e8c29b6874) ) + ROM_LOAD64_WORD( "hc1_cg1.u28", 0x000002, 0x400000, CRC(386c129e) SHA1(21325b44d96b184df09118cd0c68733afde6db03) ) + ROM_LOAD64_WORD( "hc1_cg2.u31", 0x000004, 0x400000, CRC(3aea6bf0) SHA1(a8e7a7fae0ab83b08b80ff28461c9e97afe85cf7) ) + ROM_LOAD64_WORD( "hc1_cg0.u30", 0x000006, 0x400000, CRC(f1685224) SHA1(94f491d92e91cc0040b67a82849f2832629459b0) ) + + ROM_REGION( 0x1000000, "c352", ROMREGION_ERASE00 ) + ROM_LOAD( "hc1_wave0.u51", 0x000000, 0x400000, BAD_DUMP CRC(8d532360) SHA1(d303767706b3437953e0cfacf28cd12c0e3b948e) ) // FIXED BITS (xxxxxxxx11111111) +ROM_END + +} // anonymous namespace + + +GAME( 1997, hammerch, 0, hammerch, hammerch, namcoeva_state, empty_init, ROT0, "Namco", "Hammer Champ (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/seta/seta2.cpp b/src/mame/seta/seta2.cpp index 6141d08778f..72b6c200123 100644 --- a/src/mame/seta/seta2.cpp +++ b/src/mame/seta/seta2.cpp @@ -55,6 +55,7 @@ TODO: - I added a kludge involving a -0x10 yoffset, this fixes the lifeline in myangel. I didn't find a better way to do it without breaking pzlbowl's title screen. - Background color is not verified +- Device-fy video chip and split according to hardware (i.e. NamcoEVA2 and 3). gundamex: - slowdowns, music tempo is incorrect diff --git a/src/mame/seta/seta2.h b/src/mame/seta/seta2.h index 60ede6f027a..de2671787d6 100644 --- a/src/mame/seta/seta2.h +++ b/src/mame/seta/seta2.h @@ -36,7 +36,6 @@ public: m_x1_bank(*this, "x1_bank_%u", 1U), m_spriteram(*this, "spriteram", 0x40000, ENDIANNESS_BIG), - m_tileram(*this, "tileram"), m_vregs(*this, "vregs", 0x40, ENDIANNESS_BIG), m_leds(*this, "led%u", 0U), m_lamps(*this, "lamp%u", 0U) @@ -127,7 +126,6 @@ protected: optional_memory_bank_array<8> m_x1_bank; memory_share_creator m_spriteram; - optional_shared_ptr m_tileram; memory_share_creator m_vregs; output_finder<7> m_leds; output_finder<11> m_lamps; -- cgit v1.2.3-70-g09d2