From dc748ccfc9c302ff256c74c03259b9402a1b0721 Mon Sep 17 00:00:00 2001 From: Angelo Salese Date: Tue, 13 Jun 2023 00:49:37 +0200 Subject: taito/taitowlf.cpp: convert to new PCI model (#11334) taito/taitowlf.cpp: convert to new PCI model taito/taitowlf.cpp: add proper pf2012 main BIOS [Guru] video/atirage.cpp: hookup ATI Rage II+ DVD variant to p5txla taito/taitowlf.cpp: virtualize CMOS and RTC as MB resources, initial implementation of Taito Wolf ROM DISK ISA * pf2012 now manages to start loading the DOS process, failing with EMM386 --- src/devices/video/atirage.cpp | 41 ++++ src/devices/video/atirage.h | 15 ++ src/mame/mame.lst | 1 + src/mame/taito/taitowlf.cpp | 476 +++++++++++++++++++++--------------------- 4 files changed, 290 insertions(+), 243 deletions(-) diff --git a/src/devices/video/atirage.cpp b/src/devices/video/atirage.cpp index 76c6cc47c3c..cdacbddb0c8 100644 --- a/src/devices/video/atirage.cpp +++ b/src/devices/video/atirage.cpp @@ -38,6 +38,7 @@ DEFINE_DEVICE_TYPE(ATI_RAGEII, atirageii_device, "rageii", "ATI Rage II PCI") DEFINE_DEVICE_TYPE(ATI_RAGEIIC, atirageiic_device, "rageiic", "ATI Rage IIC PCI") +DEFINE_DEVICE_TYPE(ATI_RAGEIIDVD, atirageiidvd_device, "rageiidvd", "ATI Rage II+ DVD PCI") DEFINE_DEVICE_TYPE(ATI_RAGEPRO, atiragepro_device, "ragepro", "ATI Rage Pro PCI") // register offsets @@ -104,6 +105,12 @@ atirageiic_device::atirageiic_device(const machine_config &mconfig, const char * { } +atirageiidvd_device::atirageiidvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : atirage_device(mconfig, ATI_RAGEIIDVD, tag, owner, clock) + , m_vga_rom(*this, "vga_rom") +{ +} + atiragepro_device::atiragepro_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : atirage_device(mconfig, ATI_RAGEPRO, tag, owner, clock) { @@ -207,6 +214,40 @@ void atirageiic_device::device_start() m_regs0[CONFIG_CHIP_ID+3] = 0x3a; } +void atirageiidvd_device::device_start() +{ + // Mach64 GT-B [3D Rage II+ DVD] + // TODO: verify subvendor ID & revision + set_ids(0x10024755, 0x00, 0x030000, 0x10026987); + atirage_device::device_start(); + revision = 0x3a; + m_regs0[CONFIG_CHIP_ID] = 0x55; + m_regs0[CONFIG_CHIP_ID+1] = 0x47; + m_regs0[CONFIG_CHIP_ID+3] = 0x3a; + + // TODO: opt-in Mach64 legacy x86 memory & i/o VGA bridge control + command = 0; + + add_rom((u8 *)m_vga_rom->base(), 0x8000); + expansion_rom_base = 0xc0000; +} + +ROM_START( atirageiidvd ) + ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + // Header, P/N then date + ROM_SYSTEM_BIOS( 0, "2mbsgr", "ATI Mach64 2mb 113-40109-100 1997/10/03" ) + ROMX_LOAD( "2mbsgr.vbi", 0x0000, 0x8000, CRC(d800adfd) SHA1(17492b51b5ec158db618f2851ce8beca91d12aa8), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS( 1, "4mbsgr", "ATI Mach64 4mb 113-37914-103 1997/04/15" ) + ROMX_LOAD( "4mbsgr.vbi", 0x0000, 0xc000, CRC(e974821f) SHA1(185557cec469f54e15cbe30241bd1af56ed303d2), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS( 2, "4mbedo", "ATI Mach64 GTB 4mb EDO 113-38801-101 1997/02/12" ) + ROMX_LOAD( "4mbedo.vbi", 0x0000, 0x8800, CRC(0c344b72) SHA1(a068ef73d56b5fc200076283d32676b818404f1b), ROM_BIOS(2) ) +ROM_END + +const tiny_rom_entry *atirageiidvd_device::device_rom_region() const +{ + return ROM_NAME(atirageiidvd); +} + void atiragepro_device::device_start() { // Rage Pro PCI diff --git a/src/devices/video/atirage.h b/src/devices/video/atirage.h index 403f9f70697..13586947280 100644 --- a/src/devices/video/atirage.h +++ b/src/devices/video/atirage.h @@ -79,6 +79,20 @@ protected: virtual void device_start() override; }; +class atirageiidvd_device : public atirage_device +{ +public: + atirageiidvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override; + + virtual const tiny_rom_entry *device_rom_region() const override; + +private: + required_memory_region m_vga_rom; +}; + class atiragepro_device : public atirage_device { public: @@ -90,6 +104,7 @@ protected: DECLARE_DEVICE_TYPE(ATI_RAGEII, atirageii_device) DECLARE_DEVICE_TYPE(ATI_RAGEIIC, atirageiic_device) +DECLARE_DEVICE_TYPE(ATI_RAGEIIDVD, atirageiidvd_device) DECLARE_DEVICE_TYPE(ATI_RAGEPRO, atiragepro_device) #endif diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 73287c95c15..1729d0e930a 100755 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -43029,6 +43029,7 @@ styphp // E98 (c) 2000 Taito taitotz // @source:taito/taitowlf.cpp +p5txla pf2012 // E59 (c) 1997 Taito @source:taito/tnzs.cpp diff --git a/src/mame/taito/taitowlf.cpp b/src/mame/taito/taitowlf.cpp index 79a040452ed..f0a78f13466 100644 --- a/src/mame/taito/taitowlf.cpp +++ b/src/mame/taito/taitowlf.cpp @@ -1,25 +1,21 @@ // license:BSD-3-Clause -// copyright-holders:Ville Linde -/* Taito Wolf System +// copyright-holders:Ville Linde, Angelo Salese +/* P5TX-LA / Taito Wolf System -Driver by Ville Linde +Original legacy PCI driver by Ville Linde, +rewritten by Angelo Salese to use the new PCI model Three board system consisting of a P5TX-LA PC motherboard, a Taito main board and a rom board. TODO: -- program ROM is read via parallel port (for offset write, encrypted) and game port. - It's the first thing that the BIOS does at boot (cfr. accesses at $20x), - if these ports are fed with proper values then it sets up PnP then tries a DMA ch. 3 transfer, - otherwise it just boots the normal P5TX-LA bootstrap sequence. - cfr. PC=e850b, PC=e4fc8, PC=fd84a (reading I/O $0006). -- Above needs to be converted to a proper EISA device, program ROM board is connected on MB thru the only - available slot option; -- Convert North/South bridge to newest PCI model; -- Hookup Voodoo to PCI root; -- Convert P5TX-LA to a proper stand-alone driver; +- The Retro Web MB pic has a Winbond w83877tf Super I/O but neither BIOSes accesses it, is it specific to the (unavailable) ECS P5TX-LA BIOS? +- pf2012: crashes with "EMM386 not installed - insufficient memory" during boot up; +- pf2012: Hookup Voodoo to PCI root; - According to manual hold A+B+service button for 10 seconds for entering test mode during initial bootup - sequence. Board and input test menu doesn't seem to have a dedicated test mode switch. This statement needs - verification once we get there; + sequence. Board and input test menu doesn't seem to have a dedicated test mode switch. + This statement needs verification once we get there; + +=================================================================================================== Hardware configuration: @@ -60,331 +56,323 @@ Taito W Rom Board: #include "emu.h" -#include "pcshare.h" - +#include "bus/isa/isa_cards.h" +#include "bus/rs232/hlemouse.h" +#include "bus/rs232/null_modem.h" +#include "bus/rs232/rs232.h" +#include "bus/rs232/sun_kbd.h" +#include "bus/rs232/terminal.h" #include "cpu/i386/i386.h" -#include "machine/lpci.h" -#include "machine/pckeybrd.h" -#include "emupal.h" -#include "screen.h" - - -namespace { - -class taitowlf_state : public pcat_base_state +#include "machine/w83977tf.h" +#include "machine/i82371sb.h" +#include "machine/i82439hx.h" +#include "machine/i82439tx.h" +#include "machine/pci-ide.h" +#include "machine/pci.h" +#include "video/virge_pci.h" +#include "video/atirage.h" + +class isa16_taito_rom_disk : public device_t, public device_isa16_card_interface { public: - taitowlf_state(const machine_config &mconfig, device_type type, const char *tag) : - pcat_base_state(mconfig, type, tag), - m_bootscreen_rom(*this, "bootscreen"), - m_bank1(*this, "bank1"), - m_palette(*this, "palette") - { } - - void taitowlf(machine_config &config); + // construction/destruction + isa16_taito_rom_disk(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void init_taitowlf(); + template void set_program_rom_tag(T &&tag) { m_program_rom.set_tag(std::forward(tag)); } + template void set_data_rom_tag(T &&tag) { m_data_rom.set_tag(std::forward(tag)); } protected: - virtual void machine_start() override; - virtual void machine_reset() override; + virtual void device_start() override; + virtual void device_reset() override; private: - required_region_ptr m_bootscreen_rom; - required_memory_bank m_bank1; - optional_device m_palette; - void pnp_config_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - void pnp_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - void bios_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - - void taitowlf_palette(palette_device &palette) const; - uint32_t screen_update_taitowlf(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - void intel82439tx_init(); - void taitowlf_io(address_map &map); - void taitowlf_map(address_map &map); - - uint8_t mtxc_config_r(int function, int reg); - void mtxc_config_w(int function, int reg, uint8_t data); - uint32_t intel82439tx_pci_r(int function, int reg, uint32_t mem_mask); - void intel82439tx_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask); - uint8_t piix4_config_r(int function, int reg); - void piix4_config_w(int function, int reg, uint8_t data); - uint32_t intel82371ab_pci_r(int function, int reg, uint32_t mem_mask); - void intel82371ab_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask); - - std::unique_ptr m_bios_ram; - uint8_t m_mtxc_config_reg[256]; - uint8_t m_piix4_config_reg[4][256]; + required_memory_region m_program_rom; + required_memory_region m_data_rom; + + u8 m_program_bank = 0; + u8 read_program(offs_t offset); + void write_program(offs_t offset, u8 data); + u8 read_data(offs_t offset); + void write_data(offs_t offset, u8 data); + u8 read_bank(offs_t offset); + void write_bank(offs_t offset, u8 data); + + void remap(int space_id, offs_t start, offs_t end) override; }; -uint32_t taitowlf_state::screen_update_taitowlf(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +DEFINE_DEVICE_TYPE(ISA16_TAITO_ROM_DISK, isa16_taito_rom_disk, "isa16_taito_rom_disk", "ISA16 Taito Wolf System ROM DISK") + +isa16_taito_rom_disk::isa16_taito_rom_disk(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ISA16_TAITO_ROM_DISK, tag, owner, clock) + , device_isa16_card_interface(mconfig, *this) + , m_program_rom(*this, finder_base::DUMMY_TAG) + , m_data_rom(*this, finder_base::DUMMY_TAG) +{ +} + +void isa16_taito_rom_disk::device_start() { - bitmap.fill(m_palette->black_pen(), cliprect); + set_isa_device(); +} - int count = 0; +void isa16_taito_rom_disk::device_reset() +{ +} - for(int y=0;y<256;y++) +void isa16_taito_rom_disk::remap(int space_id, offs_t start, offs_t end) +{ + if (space_id == AS_PROGRAM) { - for(int x=0;x<512;x++) - { - uint32_t color = m_bootscreen_rom[count] & 0xff; + // emm386 /X=CB00-D400 + m_isa->install_memory(0xcb080, 0xcb081, read8sm_delegate(*this, FUNC(isa16_taito_rom_disk::read_bank)), write8sm_delegate(*this, FUNC(isa16_taito_rom_disk::write_bank))); - if(cliprect.contains(x+0, y)) - bitmap.pix(y, x+0) = m_palette->pen(color); + m_isa->install_memory(0xd0000, 0xd3fff, read8sm_delegate(*this, FUNC(isa16_taito_rom_disk::read_program)), write8sm_delegate(*this, FUNC(isa16_taito_rom_disk::write_program))); - count++; - } + // TODO: unknown location + //m_isa->install_memory(0xd8000, 0xdffff, read8sm_delegate(*this, FUNC(isa16_taito_rom_disk::read_data)), write8sm_delegate(*this, FUNC(isa16_taito_rom_disk::write_data))); } - - return 0; } -// Intel 82439TX System Controller (MTXC) - -uint8_t taitowlf_state::mtxc_config_r(int function, int reg) +u8 isa16_taito_rom_disk::read_program(offs_t offset) { -// osd_printf_debug("MTXC: read %d, %02X\n", function, reg); - - return m_mtxc_config_reg[reg]; + return m_program_rom->base()[offset | (m_program_bank * 0x4000)]; } -void taitowlf_state::mtxc_config_w(int function, int reg, uint8_t data) +void isa16_taito_rom_disk::write_program(offs_t offset, u8 data) { -// osd_printf_debug("%s:MTXC: write %d, %02X, %02X\n", machine().describe_context(), function, reg, data); - switch(reg) - { - case 0x59: // PAM0 - { - if (data & 0x10) // enable RAM access to region 0xf0000 - 0xfffff - { - m_bank1->set_entry(1); - } - else // disable RAM access (reads go to BIOS ROM) - { - m_bank1->set_entry(0); - } - break; - } - } - - m_mtxc_config_reg[reg] = data; } -void taitowlf_state::intel82439tx_init() +u8 isa16_taito_rom_disk::read_data(offs_t offset) { - m_mtxc_config_reg[0x60] = 0x02; - m_mtxc_config_reg[0x61] = 0x02; - m_mtxc_config_reg[0x62] = 0x02; - m_mtxc_config_reg[0x63] = 0x02; - m_mtxc_config_reg[0x64] = 0x02; - m_mtxc_config_reg[0x65] = 0x02; + return m_data_rom->base()[offset]; } -uint32_t taitowlf_state::intel82439tx_pci_r(int function, int reg, uint32_t mem_mask) +void isa16_taito_rom_disk::write_data(offs_t offset, u8 data) { - uint32_t r = 0; - if (ACCESSING_BITS_24_31) - r |= mtxc_config_r(function, reg + 3) << 24; - if (ACCESSING_BITS_16_23) - r |= mtxc_config_r(function, reg + 2) << 16; +} - if (ACCESSING_BITS_8_15) - r |= mtxc_config_r(function, reg + 1) << 8; +u8 isa16_taito_rom_disk::read_bank(offs_t offset) +{ + logerror("isa16_taito_rom_disk: unconfirmed read bank\n"); + return m_program_bank; +} - if (ACCESSING_BITS_0_7) - r |= mtxc_config_r(function, reg + 0) << 0; +void isa16_taito_rom_disk::write_bank(offs_t offset, u8 data) +{ + //printf("%02x %02x\n", offset, data); - return r; + if (!offset) + m_program_bank = data; } -void taitowlf_state::intel82439tx_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask) +class isa16_p5txla_mb : public device_t, public device_isa16_card_interface { - if (ACCESSING_BITS_24_31) - mtxc_config_w(function, reg + 3, (data >> 24) & 0xff); +public: + // construction/destruction + isa16_p5txla_mb(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - if (ACCESSING_BITS_16_23) - mtxc_config_w(function, reg + 2, (data >> 16) & 0xff); + required_device m_rtc; + required_device m_kbdc; - if (ACCESSING_BITS_8_15) - mtxc_config_w(function, reg + 1, (data >> 8) & 0xff); +protected: + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_add_mconfig(machine_config &config) override; - if (ACCESSING_BITS_0_7) - mtxc_config_w(function, reg + 0, (data >> 0) & 0xff); -} +private: + void remap(int space_id, offs_t start, offs_t end) override; +}; -// Intel 82371AB PCI-to-ISA / IDE bridge (PIIX4) +DEFINE_DEVICE_TYPE(ISA16_P5TXLA_MB, isa16_p5txla_mb, "isa16_p5txla_mb", "ISA16 P5TX-LA Virtual MB resources") -uint8_t taitowlf_state::piix4_config_r(int function, int reg) +isa16_p5txla_mb::isa16_p5txla_mb(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ISA16_P5TXLA_MB, tag, owner, clock) + , device_isa16_card_interface(mconfig, *this) + , m_rtc(*this, "rtc") + , m_kbdc(*this, "kbdc") { -// osd_printf_debug("PIIX4: read %d, %02X\n", function, reg); - return m_piix4_config_reg[function][reg]; } -void taitowlf_state::piix4_config_w(int function, int reg, uint8_t data) +void isa16_p5txla_mb::device_add_mconfig(machine_config &config) { -// osd_printf_debug("%s:PIIX4: write %d, %02X, %02X\n", machine().describe_context(), function, reg, data); - m_piix4_config_reg[function][reg] = data; + MC146818(config, m_rtc, 32.768_kHz_XTAL); + //m_rtc->irq().set(m_pic8259_2, FUNC(pic8259_device::ir0_w)); + m_rtc->set_century_index(0x32); + + KBDC8042(config, m_kbdc, 0); + m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_STANDARD); + m_kbdc->system_reset_callback().set_inputline(":maincpu", INPUT_LINE_RESET); + m_kbdc->gate_a20_callback().set_inputline(":maincpu", INPUT_LINE_A20); + m_kbdc->input_buffer_full_callback().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq1_w)); } -uint32_t taitowlf_state::intel82371ab_pci_r(int function, int reg, uint32_t mem_mask) -{ - uint32_t r = 0; - if (ACCESSING_BITS_24_31) - r |= piix4_config_r(function, reg + 3) << 24; - - if (ACCESSING_BITS_16_23) - r |= piix4_config_r(function, reg + 2) << 16; - - if (ACCESSING_BITS_8_15) - r |= piix4_config_r(function, reg + 1) << 8; - if (ACCESSING_BITS_0_7) - r |= piix4_config_r(function, reg + 0) << 0; - - return r; +void isa16_p5txla_mb::device_start() +{ + set_isa_device(); } -void taitowlf_state::intel82371ab_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask) +void isa16_p5txla_mb::device_reset() { - if (ACCESSING_BITS_24_31) - piix4_config_w(function, reg + 3, (data >> 24) & 0xff); - - if (ACCESSING_BITS_16_23) - piix4_config_w(function, reg + 2, (data >> 16) & 0xff); - - if (ACCESSING_BITS_8_15) - piix4_config_w(function, reg + 1, (data >> 8) & 0xff); - if (ACCESSING_BITS_0_7) - piix4_config_w(function, reg + 0, (data >> 0) & 0xff); } -// ISA Plug-n-Play -void taitowlf_state::pnp_config_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void isa16_p5txla_mb::remap(int space_id, offs_t start, offs_t end) { - if (ACCESSING_BITS_8_15) + if (space_id == AS_IO) { -// osd_printf_debug("PNP Config: %02X\n", (data >> 8) & 0xff); + m_isa->install_device(0x60, 0x6f, read8sm_delegate(m_kbdc, FUNC(kbdc8042_device::data_r)), write8sm_delegate(m_kbdc, FUNC(kbdc8042_device::data_w))); + m_isa->install_device(0x70, 0x7f, read8sm_delegate(m_rtc, FUNC(mc146818_device::read)), write8sm_delegate(m_rtc, FUNC(mc146818_device::write))); } } -void taitowlf_state::pnp_data_w(offs_t offset, uint32_t data, uint32_t mem_mask) +namespace { + +class p5txla_state : public driver_device { - if (ACCESSING_BITS_8_15) - { -// osd_printf_debug("PNP Data: %02X\n", (data >> 8) & 0xff); - } -} +public: + p5txla_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + { } + void p5txla(machine_config &config); + void taitowlf(machine_config &config); +private: -void taitowlf_state::bios_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask) -{ - if (m_mtxc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled - { - COMBINE_DATA(m_bios_ram.get() + offset); - } -} + void p5txla_io(address_map &map); + void p5txla_map(address_map &map); + static void romdisk_config(device_t *device); + +// static void winbond_superio_config(device_t *device); +}; -void taitowlf_state::taitowlf_map(address_map &map) +void p5txla_state::p5txla_map(address_map &map) { - map(0x00000000, 0x0009ffff).ram(); - map(0x000a0000, 0x000bffff).ram(); - map(0x000c0000, 0x000c7fff).noprw(); - map(0x000e0000, 0x000effff).ram(); - map(0x000f0000, 0x000fffff).bankr("bank1"); - map(0x000f0000, 0x000fffff).w(FUNC(taitowlf_state::bios_ram_w)); - map(0x00100000, 0x01ffffff).ram(); -// map(0xf8000000, 0xf83fffff).rom().region("user3", 0); - map(0xfffc0000, 0xffffffff).rom().region("bios", 0); /* System BIOS */ + map.unmap_value_high(); } -void taitowlf_state::taitowlf_io(address_map &map) +void p5txla_state::p5txla_io(address_map &map) { - pcat32_io_common(map); - - map(0x00e8, 0x00eb).noprw(); - map(0x0300, 0x03af).noprw(); - map(0x0278, 0x027b).w(FUNC(taitowlf_state::pnp_config_w)); - map(0x03b0, 0x03df).noprw(); - map(0x0a78, 0x0a7b).w(FUNC(taitowlf_state::pnp_data_w)); - map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write)); + map.unmap_value_high(); } /*****************************************************************************/ -void taitowlf_state::machine_start() +static void isa_internal_devices(device_slot_interface &device) { - for (int i = 0; i < 4; i++) - std::fill(std::begin(m_piix4_config_reg[i]), std::end(m_piix4_config_reg[i]), 0); + // TODO: w83877tf + // It actually don't seem to access any kind of Super I/O, wtf +// device.option_add("w83977tf", W83977TF); + device.option_add_internal("taito_romdisk", ISA16_TAITO_ROM_DISK); + device.option_add_internal("p5txla_mb", ISA16_P5TXLA_MB); } -void taitowlf_state::machine_reset() +#if 0 +void p5txla_state::winbond_superio_config(device_t *device) { - // disable RAM access (reads go to BIOS ROM) - m_bank1->set_entry(0); + w83977tf_device &fdc = *downcast(device); +// fdc.set_sysopt_pin(1); + fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET); + fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20); + fdc.irq1().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq1_w)); + fdc.irq8().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq8n_w)); +// fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); +// fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); +// fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); +// fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } +#endif - -/* debug purpose*/ -void taitowlf_state::taitowlf_palette(palette_device &palette) const +// TODO: PCI address mapping is unconfirmed +void p5txla_state::p5txla(machine_config &config) { - palette.set_pen_color(0x70, rgb_t(0xff, 0xff, 0xff)); - palette.set_pen_color(0x71, rgb_t(0xff, 0xff, 0xff)); - palette.set_pen_color(0x01, rgb_t(0x55, 0x00, 0x00)); - palette.set_pen_color(0x10, rgb_t(0xaa, 0x00, 0x00)); - palette.set_pen_color(0x00, rgb_t(0x00, 0x00, 0x00)); + pentium_device &maincpu(PENTIUM(config, "maincpu", 90000000)); + maincpu.set_addrmap(AS_PROGRAM, &p5txla_state::p5txla_map); + maincpu.set_addrmap(AS_IO, &p5txla_state::p5txla_io); + maincpu.set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb)); +// maincpu.smiact().set("pci:00.0", FUNC(i82439tx_host_device::smi_act_w)); + + PCI_ROOT(config, "pci", 0); + // 64MB for Taito Wolf HW, to be checked for base p5txla + I82439TX(config, "pci:00.0", 0, "maincpu", 64*1024*1024); + + i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0, "maincpu")); + isa.boot_state_hook().set([](u8 data) { /* printf("%02x\n", data); */ }); + isa.smi().set_inputline("maincpu", INPUT_LINE_SMI); + + i82371sb_ide_device &ide(I82371SB_IDE(config, "pci:07.1", 0, "maincpu")); + ide.irq_pri().set("pci:07.0", FUNC(i82371sb_isa_device::pc_irq14_w)); + ide.irq_sec().set("pci:07.0", FUNC(i82371sb_isa_device::pc_mirq0_w)); + +// ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "w83977tf", true).set_option_machine_config("w83977tf", winbond_superio_config); + ISA16_SLOT(config, "board2", 0, "pci:07.0:isabus", isa_internal_devices, "p5txla_mb", true); + ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa2", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa3", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa4", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa5", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + +#if 0 + rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr)); // "microsoft_mouse")); + serport0.rxd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::rxd1_w)); + serport0.dcd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndcd1_w)); + serport0.dsr_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndsr1_w)); + serport0.ri_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::nri1_w)); + serport0.cts_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ncts1_w)); + + rs232_port_device &serport1(RS232_PORT(config, "serport1", isa_com, nullptr)); + serport1.rxd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::rxd2_w)); + serport1.dcd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndcd2_w)); + serport1.dsr_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndsr2_w)); + serport1.ri_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::nri2_w)); + serport1.cts_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ncts2_w)); +#endif + + // on-board + ATI_RAGEIIDVD(config, "pci:12.0", 0); } -void taitowlf_state::taitowlf(machine_config &config) +void p5txla_state::romdisk_config(device_t *device) { - /* basic machine hardware */ - PENTIUM(config, m_maincpu, 200000000); - m_maincpu->set_addrmap(AS_PROGRAM, &taitowlf_state::taitowlf_map); - m_maincpu->set_addrmap(AS_IO, &taitowlf_state::taitowlf_io); - m_maincpu->set_irq_acknowledge_callback("pic8259_1", FUNC(pic8259_device::inta_cb)); - - - pci_bus_legacy_device &pcibus(PCI_BUS_LEGACY(config, "pcibus", 0, 0)); - pcibus.set_device(0, FUNC(taitowlf_state::intel82439tx_pci_r), FUNC(taitowlf_state::intel82439tx_pci_w)); - pcibus.set_device(7, FUNC(taitowlf_state::intel82371ab_pci_r), FUNC(taitowlf_state::intel82371ab_pci_w)); - - pcat_common(config); - - /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(512, 256); - screen.set_visarea(0, 512-1, 0, 256-1); - screen.set_screen_update(FUNC(taitowlf_state::screen_update_taitowlf)); - PALETTE(config, m_palette, FUNC(taitowlf_state::taitowlf_palette), 256); + isa16_taito_rom_disk &romdisk = *downcast(device); + romdisk.set_program_rom_tag("program_rom"); + romdisk.set_data_rom_tag("data_rom"); } -void taitowlf_state::init_taitowlf() +void p5txla_state::taitowlf(machine_config &config) { - m_bios_ram = std::make_unique(0x10000/4); + p5txla_state::p5txla(config); + + ISA16_SLOT(config, "board1", 0, "pci:07.0:isabus", isa_internal_devices, "taito_romdisk", true).set_option_machine_config("taito_romdisk", romdisk_config); - m_bank1->configure_entry(1, m_bios_ram.get()); - m_bank1->configure_entry(0, memregion("bios")->base() + 0x30000); - intel82439tx_init(); + // TODO: replace ATI Rage above with Voodoo setup + VIRGE_PCI(config.replace(), "pci:12.0", 0); } /*****************************************************************************/ -ROM_START(pf2012) - ROM_REGION32_LE(0x40000, "bios", 0) +ROM_START(p5txla) + ROM_REGION32_LE(0x40000, "pci:07.0", 0) ROM_LOAD("p5tx-la.bin", 0x00000, 0x40000, CRC(072e6d51) SHA1(70414349b37e478fc28ecbaba47ad1033ae583b7)) +ROM_END - ROM_REGION(0x400000, "user3", 0) // Program ROM (FAT12) +ROM_START(pf2012) + ROM_REGION32_LE(0x40000, "pci:07.0", ROMREGION_ERASEFF) + // TAITO Ver1.0 1998/5/7 + ROM_LOAD("p5tx-la_861.u16", 0x20000, 0x20000, CRC(a4d4a0fc) SHA1(af3a49a1bee416b58a61af28473f3dac0a4160c8)) + + ROM_REGION(0x400000, "board1:program_rom", 0) // Program ROM (FAT12) ROM_LOAD("u1.bin", 0x000000, 0x200000, CRC(8f4c09cb) SHA1(0969a92fec819868881683c580f9e01cbedf4ad2)) ROM_LOAD("u2.bin", 0x200000, 0x200000, CRC(59881781) SHA1(85ff074ab2a922eac37cf96f0bf153a2dac55aa4)) - ROM_REGION(0x4000000, "user4", 0) // Data ROM (FAT12) + ROM_REGION(0x4000000, "board1:data_rom", 0) // Data ROM (FAT12) ROM_LOAD("e59-01.u20", 0x0000000, 0x800000, CRC(701d3a9a) SHA1(34c9f34f4da34bb8eed85a4efd1d9eea47a21d77) ) ROM_LOAD("e59-02.u23", 0x0800000, 0x800000, CRC(626df682) SHA1(35bb4f91201734ce7ccdc640a75030aaca3d1151) ) ROM_LOAD("e59-03.u26", 0x1000000, 0x800000, CRC(74e4efde) SHA1(630235c2e4a11f615b5f3b8c93e1e645da09eefe) ) @@ -414,4 +402,6 @@ ROM_END /*****************************************************************************/ -GAME(1997, pf2012, 0, taitowlf, 0, taitowlf_state, init_taitowlf, ROT0, "Taito", "Psychic Force 2012", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) +COMP(1997, p5txla, 0, 0, p5txla, 0, p5txla_state, empty_init, "ECS", "P5TX-LA (i430TX)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) + +GAME(1998, pf2012, 0, taitowlf, 0, p5txla_state, empty_init, ROT0, "Taito", "Psychic Force 2012", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) -- cgit v1.2.3