From d7e9314388de36716e19cc11493a070d4131c503 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Fri, 26 Jan 2024 11:11:34 +0100 Subject: mu5/15: split the lcd sh7042: Start fleshing it up swx00: Same mu15: Added swp30: readd the scount increment --- scripts/src/cpu.lua | 4 + src/devices/cpu/h8/swx00.cpp | 438 ++++++++++++++++++++++++++++++++++++++++++ src/devices/cpu/h8/swx00.h | 140 ++++++++++++++ src/devices/cpu/sh/sh7042.cpp | 21 +- src/devices/cpu/sh/sh7042.h | 12 ++ src/devices/cpu/sh/sh_adc.cpp | 59 ++++++ src/devices/cpu/sh/sh_adc.h | 67 +++++++ src/devices/cpu/sh/sh_dmac.h | 50 +++++ src/devices/sound/swp30.cpp | 1 + src/mame/mame.lst | 3 + src/mame/yamaha/mu5lcd.cpp | 61 ++++++ src/mame/yamaha/mu5lcd.h | 38 ++++ src/mame/yamaha/ymmu15.cpp | 233 ++++++++++++++++++++++ src/mame/yamaha/ymmu5.cpp | 30 +-- src/mame/yamaha/ympsr340.cpp | 32 +-- src/mame/yamaha/ympsr540.cpp | 40 +++- 16 files changed, 1184 insertions(+), 45 deletions(-) create mode 100644 src/devices/cpu/h8/swx00.cpp create mode 100644 src/devices/cpu/h8/swx00.h create mode 100644 src/devices/cpu/sh/sh_adc.cpp create mode 100644 src/devices/cpu/sh/sh_adc.h create mode 100644 src/devices/cpu/sh/sh_dmac.h create mode 100644 src/mame/yamaha/mu5lcd.cpp create mode 100644 src/mame/yamaha/mu5lcd.h create mode 100644 src/mame/yamaha/ymmu15.cpp diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 61f91225e57..eb2b3a6caca 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -745,6 +745,8 @@ if CPUS["H8"] then MAME_DIR .. "src/devices/cpu/h8/h8_watchdog.h", MAME_DIR .. "src/devices/cpu/h8/gt913.cpp", MAME_DIR .. "src/devices/cpu/h8/gt913.h", + MAME_DIR .. "src/devices/cpu/h8/swx00.cpp", + MAME_DIR .. "src/devices/cpu/h8/swx00.h", } dependency { @@ -895,6 +897,8 @@ if CPUS["SH"] then MAME_DIR .. "src/devices/cpu/sh/sh7032.h", MAME_DIR .. "src/devices/cpu/sh/sh7042.cpp", MAME_DIR .. "src/devices/cpu/sh/sh7042.h", + MAME_DIR .. "src/devices/cpu/sh/sh_adc.h", + MAME_DIR .. "src/devices/cpu/sh/sh_adc.cpp", MAME_DIR .. "src/devices/cpu/sh/sh7604_bus.cpp", MAME_DIR .. "src/devices/cpu/sh/sh7604_bus.h", MAME_DIR .. "src/devices/cpu/sh/sh7604_sci.cpp", diff --git a/src/devices/cpu/h8/swx00.cpp b/src/devices/cpu/h8/swx00.cpp new file mode 100644 index 00000000000..c81b9b3de29 --- /dev/null +++ b/src/devices/cpu/h8/swx00.cpp @@ -0,0 +1,438 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +#include "emu.h" +#include "swx00.h" + +DEFINE_DEVICE_TYPE(SWX00, swx00_device, "swx00", "Yamaha SWX00") + +swx00_device::swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t mode) : + h8s2000_device(mconfig, SWX00, tag, owner, clock, address_map_constructor(FUNC(swx00_device::map), this)), + m_intc(*this, "intc"), +#if 0 + m_adc(*this, "adc"), + m_dma(*this, "dma"), + m_dma0(*this, "dma:0"), + m_dma1(*this, "dma:1"), + m_port1(*this, "port1"), + m_port2(*this, "port2"), + m_port3(*this, "port3"), + m_port4(*this, "port4"), + m_port5(*this, "port5"), + m_port6(*this, "port6"), + m_porta(*this, "porta"), + m_portb(*this, "portb"), + m_portc(*this, "portc"), + m_portd(*this, "portd"), + m_porte(*this, "porte"), + m_portf(*this, "portf"), + m_portg(*this, "portg"), + m_timer8_0(*this, "timer8_0"), + m_timer8_1(*this, "timer8_1"), + m_timer16(*this, "timer16"), + m_timer16_0(*this, "timer16:0"), + m_timer16_1(*this, "timer16:1"), + m_timer16_2(*this, "timer16:2"), + m_timer16_3(*this, "timer16:3"), + m_timer16_4(*this, "timer16:4"), + m_timer16_5(*this, "timer16:5"), + m_watchdog(*this, "watchdog"), +#endif + m_data_config(mode & MODE_DUAL ? "s" : "c", ENDIANNESS_BIG, 16, mode & MODE_DUAL ? 24 : 22), + m_mode(mode), + m_syscr(0) +{ + m_has_trace = true; +} + +void swx00_device::map(address_map &map) +{ + map(0xffec00, 0xfffbff).ram(); +#if 0 + map(0xfffe80, 0xfffe80).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xfffe81, 0xfffe81).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xfffe82, 0xfffe83).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xfffe84, 0xfffe84).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xfffe85, 0xfffe85).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xfffe86, 0xfffe87).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xfffe88, 0xfffe8f).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(0xfffe90, 0xfffe90).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xfffe91, 0xfffe91).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xfffe92, 0xfffe92).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xfffe94, 0xfffe94).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xfffe95, 0xfffe95).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xfffe96, 0xfffe97).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xfffe98, 0xfffe9b).rw(m_timer16_4, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(0xfffea0, 0xfffea0).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xfffea1, 0xfffea1).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xfffea2, 0xfffea2).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xfffea4, 0xfffea4).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xfffea5, 0xfffea5).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xfffea6, 0xfffea7).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xfffea8, 0xfffeab).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(0xfffeb0, 0xfffeb0).w(m_port1, FUNC(h8_port_device::ddr_w)); + map(0xfffeb1, 0xfffeb1).w(m_port2, FUNC(h8_port_device::ddr_w)); + map(0xfffeb2, 0xfffeb2).w(m_port3, FUNC(h8_port_device::ddr_w)); + map(0xfffeb4, 0xfffeb4).w(m_port5, FUNC(h8_port_device::ddr_w)); + map(0xfffeb5, 0xfffeb5).w(m_port6, FUNC(h8_port_device::ddr_w)); + map(0xfffeb9, 0xfffeb9).w(m_porta, FUNC(h8_port_device::ddr_w)); + map(0xfffeba, 0xfffeba).w(m_portb, FUNC(h8_port_device::ddr_w)); + map(0xfffebb, 0xfffebb).w(m_portc, FUNC(h8_port_device::ddr_w)); + map(0xfffebc, 0xfffebc).w(m_portd, FUNC(h8_port_device::ddr_w)); + map(0xfffebd, 0xfffebd).w(m_porte, FUNC(h8_port_device::ddr_w)); + map(0xfffebe, 0xfffebe).w(m_portf, FUNC(h8_port_device::ddr_w)); + map(0xfffebf, 0xfffebf).w(m_portg, FUNC(h8_port_device::ddr_w)); + map(0xfffec0, 0xfffec1).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w)); + map(0xfffec2, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w)); + map(0xfffec4, 0xfffecd).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w)); + map(0xfffece, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w)); + + map(0xfffee0, 0xfffee1).rw(m_dma0, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w)); + map(0xfffee2, 0xfffee3).rw(m_dma0, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w)); + map(0xfffee4, 0xfffee5).rw(m_dma0, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w)); + map(0xfffee6, 0xfffee7).rw(m_dma0, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w)); + map(0xfffee8, 0xfffee9).rw(m_dma0, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w)); + map(0xfffeea, 0xfffeeb).rw(m_dma0, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w)); + map(0xfffeec, 0xfffeed).rw(m_dma0, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w)); + map(0xfffeee, 0xfffeef).rw(m_dma0, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w)); + map(0xfffef0, 0xfffef1).rw(m_dma1, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w)); + map(0xfffef2, 0xfffef3).rw(m_dma1, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w)); + map(0xfffef4, 0xfffef5).rw(m_dma1, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w)); + map(0xfffef6, 0xfffef7).rw(m_dma1, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w)); + map(0xfffef8, 0xfffef9).rw(m_dma1, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w)); + map(0xfffefa, 0xfffefb).rw(m_dma1, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w)); + map(0xfffefc, 0xfffefd).rw(m_dma1, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w)); + map(0xfffefe, 0xfffeff).rw(m_dma1, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w)); + map(0xffff00, 0xffff00).rw(m_dma, FUNC(h8s_dma_device::dmawer_r), FUNC(h8s_dma_device::dmawer_w)); + map(0xffff01, 0xffff01).rw(m_dma, FUNC(h8s_dma_device::dmatcr_r), FUNC(h8s_dma_device::dmatcr_w)); + map(0xffff02, 0xffff03).rw(m_dma0, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w)); + map(0xffff04, 0xffff05).rw(m_dma1, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w)); + map(0xffff06, 0xffff07).rw(m_dma, FUNC(h8s_dma_device::dmabcr_r), FUNC(h8s_dma_device::dmabcr_w)); + map(0xffff2c, 0xffff2c).rw(m_intc, FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w)); + map(0xffff2d, 0xffff2d).rw(m_intc, FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w)); + map(0xffff2e, 0xffff2e).rw(m_intc, FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w)); + map(0xffff2f, 0xffff2f).rw(m_intc, FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w)); + map(0xffff39, 0xffff39).rw(FUNC(swx00_device::syscr_r), FUNC(swx00_device::syscr_w)); + map(0xffff50, 0xffff50).r(m_port1, FUNC(h8_port_device::port_r)); + map(0xffff51, 0xffff51).r(m_port2, FUNC(h8_port_device::port_r)); + map(0xffff52, 0xffff52).r(m_port3, FUNC(h8_port_device::port_r)); + map(0xffff53, 0xffff53).r(m_port4, FUNC(h8_port_device::port_r)); + map(0xffff54, 0xffff54).r(m_port5, FUNC(h8_port_device::port_r)); + map(0xffff55, 0xffff55).r(m_port6, FUNC(h8_port_device::port_r)); + map(0xffff59, 0xffff59).r(m_porta, FUNC(h8_port_device::port_r)); + map(0xffff5a, 0xffff5a).r(m_portb, FUNC(h8_port_device::port_r)); + map(0xffff5b, 0xffff5b).r(m_portc, FUNC(h8_port_device::port_r)); + map(0xffff5c, 0xffff5c).r(m_portd, FUNC(h8_port_device::port_r)); + map(0xffff5d, 0xffff5d).r(m_porte, FUNC(h8_port_device::port_r)); + map(0xffff5e, 0xffff5e).r(m_portf, FUNC(h8_port_device::port_r)); + map(0xffff5f, 0xffff5f).r(m_portg, FUNC(h8_port_device::port_r)); + map(0xffff60, 0xffff60).rw(m_port1, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff61, 0xffff61).rw(m_port2, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff62, 0xffff62).rw(m_port3, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff64, 0xffff64).rw(m_port5, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff65, 0xffff65).rw(m_port6, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff69, 0xffff69).rw(m_porta, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6a, 0xffff6a).rw(m_portb, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6b, 0xffff6b).rw(m_portc, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6c, 0xffff6c).rw(m_portd, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6d, 0xffff6d).rw(m_porte, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6e, 0xffff6e).rw(m_portf, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff6f, 0xffff6f).rw(m_portg, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w)); + map(0xffff70, 0xffff70).rw(m_porta, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(0xffff71, 0xffff71).rw(m_portb, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(0xffff72, 0xffff72).rw(m_portc, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(0xffff73, 0xffff73).rw(m_portd, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(0xffff74, 0xffff74).rw(m_porte, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(0xffff76, 0xffff76).rw(m_port3, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w)); + map(0xffff77, 0xffff77).rw(m_porta, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w)); + map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w)); + map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w)); + map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w)); + map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w)); + map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w)); + map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r)); + map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w)); + map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w)); + map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w)); + map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w)); + map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w)); + map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w)); + map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r)); + map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w)); + map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w)); + map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w)); + map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w)); + map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w)); + map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w)); + map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r)); + map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w)); + map(0xffff90, 0xffff9f).r(m_adc, FUNC(h8_adc_device::addr16_r)); + map(0xffffa0, 0xffffa0).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w)); + map(0xffffa1, 0xffffa1).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w)); + map(0xffffb0, 0xffffb0).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w)); + map(0xffffb1, 0xffffb1).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w)); + map(0xffffb2, 0xffffb2).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w)); + map(0xffffb3, 0xffffb3).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w)); + map(0xffffb4, 0xffffb7).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00); + map(0xffffb4, 0xffffb7).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff); + map(0xffffb8, 0xffffb8).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w)); + map(0xffffb9, 0xffffb9).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w)); + map(0xffffbc, 0xffffbd).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w)); + map(0xffffbe, 0xffffbf).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w)); + map(0xffffc0, 0xffffc0).rw(m_timer16, FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w)); + map(0xffffc1, 0xffffc1).rw(m_timer16, FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w)); + map(0xffffd0, 0xffffd0).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xffffd1, 0xffffd1).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xffffd2, 0xffffd3).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xffffd4, 0xffffd4).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xffffd5, 0xffffd5).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xffffd6, 0xffffd7).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xffffd8, 0xffffdf).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(0xffffe0, 0xffffe0).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xffffe1, 0xffffe1).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xffffe2, 0xffffe2).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xffffe4, 0xffffe4).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xffffe5, 0xffffe5).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xffffe6, 0xffffe7).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xffffe8, 0xffffeb).rw(m_timer16_1, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(0xfffff0, 0xfffff0).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(0xfffff1, 0xfffff1).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w)); + map(0xfffff2, 0xfffff2).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(0xfffff4, 0xfffff4).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(0xfffff5, 0xfffff5).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(0xfffff6, 0xfffff7).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(0xfffff8, 0xfffffb).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); +#endif +} + +void swx00_device::device_add_mconfig(machine_config &config) +{ + H8S_INTC(config, m_intc, *this); +#if 0 + H8_ADC_2655(config, m_adc, *this, m_intc, 28); + H8S_DMA(config, m_dma, *this); + H8S_DMA_CHANNEL(config, m_dma0, *this, m_dma, m_intc); + H8S_DMA_CHANNEL(config, m_dma1, *this, m_dma, m_intc); + H8_PORT(config, m_port1, *this, h8_device::PORT_1, 0x00, 0x00); + H8_PORT(config, m_port2, *this, h8_device::PORT_2, 0x00, 0x00); + H8_PORT(config, m_port3, *this, h8_device::PORT_3, 0xc0, 0xc0); + H8_PORT(config, m_port4, *this, h8_device::PORT_4, 0x00, 0x00); + H8_PORT(config, m_port5, *this, h8_device::PORT_5, 0xf0, 0xf0); + H8_PORT(config, m_port6, *this, h8_device::PORT_6, 0x00, 0x00); + H8_PORT(config, m_porta, *this, h8_device::PORT_A, 0x00, 0x00); + H8_PORT(config, m_portb, *this, h8_device::PORT_B, 0x00, 0x00); + H8_PORT(config, m_portc, *this, h8_device::PORT_C, 0x00, 0x00); + H8_PORT(config, m_portd, *this, h8_device::PORT_D, 0x00, 0x00); + H8_PORT(config, m_porte, *this, h8_device::PORT_E, 0x00, 0x00); + H8_PORT(config, m_portf, *this, h8_device::PORT_F, 0x00, 0x00); + H8_PORT(config, m_portg, *this, h8_device::PORT_G, 0xe0, 0xe0); + H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false); + H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false); + H8_TIMER16(config, m_timer16, *this, 6, 0x00); + H8S_TIMER16_CHANNEL(config, m_timer16_0, *this, 4, 0x60, m_intc, 32, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::INPUT_D); + H8S_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 0x4c, m_intc, 40, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2); + H8S_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 0x4c, m_intc, 44, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024); + H8S_TIMER16_CHANNEL(config, m_timer16_3, *this, 4, 0x60, m_intc, 48, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::DIV_4096); + H8S_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 0x4c, m_intc, 56, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::CHAIN).set_chain(m_timer16_5); + H8S_TIMER16_CHANNEL(config, m_timer16_5, *this, 2, 0x4c, m_intc, 60, + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::INPUT_D); + H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91); + H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S); +#endif + H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83); + H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87); +} + +device_memory_interface::space_config_vector swx00_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_DATA, &m_data_config) + }; +} + + +void swx00_device::execute_set_input(int inputnum, int state) +{ + m_intc->set_input(inputnum, state); +} + +bool swx00_device::exr_in_stack() const +{ + return m_syscr & 0x20; +} + +int swx00_device::trace_setup() +{ + if(m_syscr & 0x10) + m_CCR |= F_I|F_UI; + else + m_CCR |= F_I; + m_EXR &= ~EXR_T; + return 5; +} + +int swx00_device::trapa_setup() +{ + if(m_syscr & 0x10) + m_CCR |= F_I|F_UI; + else + m_CCR |= F_I; + if(m_syscr & 0x20) + m_EXR &= ~EXR_T; + return 8; +} + +void swx00_device::irq_setup() +{ + switch(m_syscr & 0x30) { + case 0x00: + m_CCR |= F_I; + break; + case 0x10: + m_CCR |= F_I|F_UI; + break; + case 0x20: + m_EXR = m_EXR & (EXR_NC); + if(m_taken_irq_level == 8) + m_EXR |= 7; + else + m_EXR |= m_taken_irq_level; + break; + case 0x30: + m_CCR |= F_I|F_UI; + m_EXR = m_EXR & (EXR_NC); + if(m_taken_irq_level == 8) + m_EXR |= 7; + else + m_EXR |= m_taken_irq_level; + break; + } +} + +void swx00_device::update_irq_filter() +{ + switch(m_syscr & 0x30) { + case 0x00: + if(m_CCR & F_I) + m_intc->set_filter(2, -1); + else + m_intc->set_filter(0, -1); + break; + case 0x10: + if((m_CCR & (F_I|F_UI)) == (F_I|F_UI)) + m_intc->set_filter(2, -1); + else if(m_CCR & F_I) + m_intc->set_filter(1, -1); + else + m_intc->set_filter(0, -1); + break; + case 0x20: + m_intc->set_filter(0, m_EXR & 7); + break; + case 0x30: + if((m_CCR & (F_I|F_UI)) == (F_I|F_UI)) + m_intc->set_filter(2, m_EXR & 7); + else if(m_CCR & F_I) + m_intc->set_filter(1, m_EXR & 7); + else + m_intc->set_filter(0, m_EXR & 7); + break; + } +} + +void swx00_device::interrupt_taken() +{ + standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); +} + +void swx00_device::internal_update(uint64_t current_time) +{ + uint64_t event_time = 0; +#if 0 + add_event(event_time, m_adc->internal_update(current_time)); + add_event(event_time, m_sci[0]->internal_update(current_time)); + add_event(event_time, m_sci[1]->internal_update(current_time)); + add_event(event_time, m_sci[2]->internal_update(current_time)); + add_event(event_time, m_timer8_0->internal_update(current_time)); + add_event(event_time, m_timer8_1->internal_update(current_time)); + add_event(event_time, m_timer16_0->internal_update(current_time)); + add_event(event_time, m_timer16_1->internal_update(current_time)); + add_event(event_time, m_timer16_2->internal_update(current_time)); + add_event(event_time, m_timer16_3->internal_update(current_time)); + add_event(event_time, m_timer16_4->internal_update(current_time)); + add_event(event_time, m_timer16_5->internal_update(current_time)); + add_event(event_time, m_watchdog->internal_update(current_time)); +#endif + + recompute_bcount(event_time); +} + +void swx00_device::device_start() +{ + h8s2000_device::device_start(); +} + +void swx00_device::device_reset() +{ + h8s2000_device::device_reset(); + m_syscr = 0x01; +} + +uint8_t swx00_device::syscr_r() +{ + return m_syscr; +} + +void swx00_device::syscr_w(uint8_t data) +{ + m_syscr = data; + update_irq_filter(); + logerror("syscr = %02x\n", data); +} diff --git a/src/devices/cpu/h8/swx00.h b/src/devices/cpu/h8/swx00.h new file mode 100644 index 00000000000..e61d47c7982 --- /dev/null +++ b/src/devices/cpu/h8/swx00.h @@ -0,0 +1,140 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + sxw00.h + + Yamaha sound generator including a h8s2000 core, an AWM2 sound generator, + a dsp and a bunch of more standard h8 peripherals. + + It has two buses, "s" and "c". What is on which depends on the mode bits. + Bit 0 is called "Dual" and bit1 "separate". It's not sure yet but it may + be that the h8 core can be disabled, or an internal "pass the data to the + peripherals" internal program can be activated. + + Mode H8 S C Example + 0 on program+wave roms effects ram MU15 + 0 on program+wave roms effects ram QY100 sub + 1 on wave rom, effects ram program rom+ram PSR340 + 1 on effects ram program rom+ram QY100 main + 3 off? wave rom effects ram PSR540 + + + +***************************************************************************/ + +#ifndef MAME_CPU_H8_SWX00_H +#define MAME_CPU_H8_SWX00_H + +#pragma once + +#include "h8s2000.h" +#include "h8_intc.h" +#include "h8_adc.h" +#include "h8_dma.h" +#include "h8_port.h" +#include "h8_timer8.h" +#include "h8_timer16.h" +#include "h8_sci.h" +#include "h8_watchdog.h" + +class swx00_device : public h8s2000_device { +public: + enum { + MODE_DUAL = 1, + MODE_SEPARATE = 2 + }; + + swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t mode = 0); + + int s_bus_id() const { return m_mode & MODE_DUAL ? AS_DATA : AS_PROGRAM; } + int c_bus_id() const { return m_mode & MODE_DUAL ? AS_PROGRAM : AS_DATA; } + +#if 0 + auto read_port1() { return m_read_port [PORT_1].bind(); } + auto write_port1() { return m_write_port[PORT_1].bind(); } + auto read_port2() { return m_read_port [PORT_2].bind(); } + auto write_port2() { return m_write_port[PORT_2].bind(); } + auto read_port3() { return m_read_port [PORT_3].bind(); } + auto write_port3() { return m_write_port[PORT_3].bind(); } + auto read_port4() { return m_read_port [PORT_4].bind(); } + auto read_port5() { return m_read_port [PORT_5].bind(); } + auto write_port5() { return m_write_port[PORT_5].bind(); } + auto read_port6() { return m_read_port [PORT_6].bind(); } + auto write_port6() { return m_write_port[PORT_6].bind(); } + auto read_porta() { return m_read_port [PORT_A].bind(); } + auto write_porta() { return m_write_port[PORT_A].bind(); } + auto read_portb() { return m_read_port [PORT_B].bind(); } + auto write_portb() { return m_write_port[PORT_B].bind(); } + auto read_portc() { return m_read_port [PORT_C].bind(); } + auto write_portc() { return m_write_port[PORT_C].bind(); } + auto read_portd() { return m_read_port [PORT_D].bind(); } + auto write_portd() { return m_write_port[PORT_D].bind(); } + auto read_porte() { return m_read_port [PORT_E].bind(); } + auto write_porte() { return m_write_port[PORT_E].bind(); } + auto read_portf() { return m_read_port [PORT_F].bind(); } + auto write_portf() { return m_write_port[PORT_F].bind(); } + auto read_portg() { return m_read_port [PORT_G].bind(); } + auto write_portg() { return m_write_port[PORT_G].bind(); } +#endif + + uint8_t syscr_r(); + void syscr_w(uint8_t data); + +protected: + required_device m_intc; +#if 0 + required_device m_adc; + required_device m_dma; + required_device m_dma0; + required_device m_dma1; + required_device m_port1; + required_device m_port2; + required_device m_port3; + required_device m_port4; + required_device m_port5; + required_device m_port6; + required_device m_porta; + required_device m_portb; + required_device m_portc; + required_device m_portd; + required_device m_porte; + required_device m_portf; + required_device m_portg; + required_device m_timer8_0; + required_device m_timer8_1; + required_device m_timer16; + required_device m_timer16_0; + required_device m_timer16_1; + required_device m_timer16_2; + required_device m_timer16_3; + required_device m_timer16_4; + required_device m_timer16_5; + required_device m_watchdog; +#endif + + address_space_config m_data_config; + + uint8_t m_mode; + uint8_t m_syscr; + + virtual bool exr_in_stack() const override; + virtual void update_irq_filter() override; + virtual void interrupt_taken() override; + virtual int trace_setup() override; + virtual int trapa_setup() override; + virtual void irq_setup() override; + virtual void internal_update(uint64_t current_time) override; + virtual void device_add_mconfig(machine_config &config) override; + virtual space_config_vector memory_space_config() const override; + + void map(address_map &map); + + virtual void device_start() override; + virtual void device_reset() override; + virtual void execute_set_input(int inputnum, int state) override; +}; + +DECLARE_DEVICE_TYPE(SWX00, swx00_device) + +#endif // MAME_CPU_H8_SWX00_H diff --git a/src/devices/cpu/sh/sh7042.cpp b/src/devices/cpu/sh/sh7042.cpp index 7c3f7d2fba1..4c195e787a2 100644 --- a/src/devices/cpu/sh/sh7042.cpp +++ b/src/devices/cpu/sh/sh7042.cpp @@ -9,8 +9,18 @@ DEFINE_DEVICE_TYPE(SH7042, sh7042_device, "sh7042", "Hitachi SH-2 (SH7042)") sh7042_device::sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - sh2_device(mconfig, SH7042, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff) + sh2_device(mconfig, SH7042, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff), + m_adc(*this, "adc"), + m_read_adc(*this, 0) { + for(unsigned int i=0; i != m_read_adc.size(); i++) + m_read_adc[i].bind().set([this, i]() { return adc_default(i); }); +} + +u16 sh7042_device::adc_default(int adc) +{ + logerror("read of un-hooked adc %d\n", adc); + return 0; } void sh7042_device::device_start() @@ -25,5 +35,14 @@ void sh7042_device::device_reset() void sh7042_device::map(address_map &map) { + map(0xffff83e0, 0xffff83e0).rw(m_adc, FUNC(sh_adc_device::adcsr_r), FUNC(sh_adc_device::adcsr_w)); + map(0xffff83e1, 0xffff83e1).rw(m_adc, FUNC(sh_adc_device::adcr_r), FUNC(sh_adc_device::adcr_w)); + map(0xffff83f0, 0xffff83ff).r(m_adc, FUNC(sh_adc_device::addr_r)); + map(0xfffff000, 0xffffffff).ram(); } + +void sh7042_device::device_add_mconfig(machine_config &config) +{ + SH_ADC(config, m_adc, *this); +} diff --git a/src/devices/cpu/sh/sh7042.h b/src/devices/cpu/sh/sh7042.h index b47242013b4..7cf319f3ce4 100644 --- a/src/devices/cpu/sh/sh7042.h +++ b/src/devices/cpu/sh/sh7042.h @@ -9,17 +9,29 @@ #pragma once #include "sh2.h" +#include "sh_adc.h" class sh7042_device : public sh2_device { public: sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + template auto read_adc() { return m_read_adc[Port].bind(); } + + u16 do_read_adc(int port) { return m_read_adc[port](); } + protected: virtual void device_start() override; virtual void device_reset() override; + virtual void device_add_mconfig(machine_config &config) override; private: + required_device m_adc; + + devcb_read16::array<8> m_read_adc; + + u16 adc_default(int adc); + void map(address_map &map); }; diff --git a/src/devices/cpu/sh/sh_adc.cpp b/src/devices/cpu/sh/sh_adc.cpp new file mode 100644 index 00000000000..40f9546dc15 --- /dev/null +++ b/src/devices/cpu/sh/sh_adc.cpp @@ -0,0 +1,59 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + +#include "emu.h" +#include "sh_adc.h" +#include "sh7042.h" + +DEFINE_DEVICE_TYPE(SH_ADC, sh_adc_device, "sh_adc", "SH7042 ADC") + +sh_adc_device::sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, SH_ADC, tag, owner, clock), + m_cpu(*this, finder_base::DUMMY_TAG), + m_adcsr(0), m_adcr(0) +{ +} + +u16 sh_adc_device::addr_r(offs_t offset) +{ + logerror("addr16_r %d %03x\n", offset, m_addr[offset]); + return m_addr[offset]; +} + +u8 sh_adc_device::adcsr_r() +{ + logerror("adcsr_r %02x\n", m_adcsr); + return m_adcsr; +} + +u8 sh_adc_device::adcr_r() +{ + logerror("adcr_r %02x\n", m_adcr); + return m_adcr; +} + +void sh_adc_device::adcsr_w(u8 data) +{ + logerror("adcsr_w %02x\n", data); + // u8 prev = m_adcsr; + m_adcsr = (data & 0x7f) | (m_adcsr & data & CSR_ADF); +} + +void sh_adc_device::adcr_w(u8 data) +{ + logerror("adcr_w %02x\n", data); + m_adcr = data; +} + +void sh_adc_device::device_start() +{ + save_item(NAME(m_addr)); + save_item(NAME(m_adcsr)); + save_item(NAME(m_adcr)); +} + +void sh_adc_device::device_reset() +{ + memset(m_addr, 0, sizeof(m_addr)); + m_adcsr = m_adcr = 0; +} diff --git a/src/devices/cpu/sh/sh_adc.h b/src/devices/cpu/sh/sh_adc.h new file mode 100644 index 00000000000..4b8c371c31d --- /dev/null +++ b/src/devices/cpu/sh/sh_adc.h @@ -0,0 +1,67 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + sh_adc.h + + SH Analog to Digital Converter subsystem + +***************************************************************************/ + +#ifndef MAME_CPU_SH_SH_ADC_H +#define MAME_CPU_SH_SH_ADC_H + +#pragma once + +// To generalize eventually +class sh7042_device; + +class sh_adc_device : public device_t { +public: + sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + + template sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) + : sh_adc_device(mconfig, tag, owner) + { + set_info(cpu); + } + + template void set_info(T &&cpu) { m_cpu.set_tag(std::forward(cpu)); } + + u16 addr_r(offs_t offset); + u8 adcsr_r(); + u8 adcr_r(); + void adcsr_w(u8 data); + void adcr_w(u8 data); + +protected: + enum { + CSR_ADF = 0x80, + CSR_ADIE = 0x40, + CSR_ADST = 0x20, + CSR_CKS = 0x10, + CSR_GRP = 0x08, + CSR_CHAN = 0x07 + }; + + enum { + CR_PWR = 0x40, + CR_TRGS = 0x30, + CR_SCAN = 0x08, + CR_SIM = 0x04, + CR_BUF = 0x03 + }; + + required_device m_cpu; + + uint16_t m_addr[8]; + uint8_t m_adcsr, m_adcr; + + + virtual void device_start() override; + virtual void device_reset() override; +}; + +DECLARE_DEVICE_TYPE(SH_ADC, sh_adc_device) + +#endif diff --git a/src/devices/cpu/sh/sh_dmac.h b/src/devices/cpu/sh/sh_dmac.h new file mode 100644 index 00000000000..25071765428 --- /dev/null +++ b/src/devices/cpu/sh/sh_dmac.h @@ -0,0 +1,50 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + sh_dma.h + + SH DMA controller + +***************************************************************************/ + +#ifndef MAME_CPU_SH_SH_DMA_H +#define MAME_CPU_SH_SH_DMA_H + +#pragma once + +// To generalize eventually +class sh7042_device; + +class sh_dma_device : public device_t { +public: + sh_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + + template sh_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) + : sh_dma_device(mconfig, tag, owner) + { + set_info(cpu); + } + + template void set_info(T &&cpu) { m_cpu.set_tag(std::forward(cpu)); } + + u16 addr_r(offs_t offset); + u8 dmasr_r(); + u8 dmar_r(); + void dmasr_w(u8 data); + void dmar_w(u8 data); + +protected: + required_device m_cpu; + + uint16_t m_addr[8]; + uint8_t m_dmasr, m_dmar; + + + virtual void device_start() override; + virtual void device_reset() override; +}; + +DECLARE_DEVICE_TYPE(SH_DMA, sh_dma_device) + +#endif diff --git a/src/devices/sound/swp30.cpp b/src/devices/sound/swp30.cpp index db37c8bff68..9427e571ca7 100644 --- a/src/devices/sound/swp30.cpp +++ b/src/devices/sound/swp30.cpp @@ -1317,6 +1317,7 @@ void swp30_device::execute_run() { while(m_icount >= 0) { if(m_meg_pc == 0) { + scount++; if(0) { static std::array mixer; if(memcmp(mixer.data(), m_mixer.data(), sizeof(mixer))) { diff --git a/src/mame/mame.lst b/src/mame/mame.lst index bbd9a75fd0b..87686e47ed4 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -46011,6 +46011,9 @@ dx100 // @source:yamaha/ymmu5.cpp mu5 // 1994 MU-5 +@source:yamaha/ymmu15.cpp +mu15 + @source:yamaha/ymmu50.cpp mu50 // 1995 MU-50 diff --git a/src/mame/yamaha/mu5lcd.cpp b/src/mame/yamaha/mu5lcd.cpp new file mode 100644 index 00000000000..c6170d3bbaf --- /dev/null +++ b/src/mame/yamaha/mu5lcd.cpp @@ -0,0 +1,61 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont, Olivier Galibert + +// LC7985/LCD image combo used in the yamaha mu5 and mu15 + +#include "emu.h" +#include "mu5lcd.h" + +DEFINE_DEVICE_TYPE(MU5LCD, mu5lcd_device, "mu5lcd", "Yamaha MU5/MU15 common LCD") + +ROM_START( mu5lcd ) + ROM_REGION(261774, "screen", 0) + ROM_LOAD("mu5lcd.svg", 0, 261774, CRC(3cccbb88) SHA1(3db0b16f27b501ff8d8ac3fb631dd315571230d3)) +ROM_END + +const tiny_rom_entry *mu5lcd_device::device_rom_region() const +{ + return ROM_NAME(mu5lcd); +} + +mu5lcd_device::mu5lcd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, MU5LCD, tag, owner, clock), + m_lcd(*this, "lcd"), + m_outputs(*this, "%x.%x.%x.%x", 0U, 0U, 0U, 0U) +{ +} + +void mu5lcd_device::device_start() +{ + m_outputs.resolve(); +} + +void mu5lcd_device::device_reset() +{ +} + +void mu5lcd_device::render_w(int state) +{ + if(!state) + return; + + const u8 *render = m_lcd->render(); + for(int y=0; y != 2; y++) + for(int x=0; x != 8; x++) + for(int yy=0; yy != 8; yy++) { + u8 v = render[8 * y + 16 * x + yy]; + for(int xx=0; xx != 5; xx++) + m_outputs[y][x][yy][xx] = (v >> xx) & 1; + } +} + +void mu5lcd_device::device_add_mconfig(machine_config &config) +{ + LC7985(config, m_lcd); + + auto &screen = SCREEN(config, "screen", SCREEN_TYPE_SVG); + screen.set_refresh_hz(60); + screen.set_size(800, 435); + screen.set_visarea_full(); + screen.screen_vblank().set(FUNC(mu5lcd_device::render_w)); +} diff --git a/src/mame/yamaha/mu5lcd.h b/src/mame/yamaha/mu5lcd.h new file mode 100644 index 00000000000..edf7bb69090 --- /dev/null +++ b/src/mame/yamaha/mu5lcd.h @@ -0,0 +1,38 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont, Olivier Galibert + +// LC7985/LCD image combo used in the yamaha mu5 and mu15 + +#ifndef MAME_YAMAHA_MU5LCD_H +#define MAME_YAMAHA_MU5LCD_H + +#pragma once + +#include "video/lc7985.h" +#include "screen.h" + +DECLARE_DEVICE_TYPE(MU5LCD, mu5lcd_device) + +class mu5lcd_device : public device_t +{ +public: + mu5lcd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + + u8 dr_r() { return m_lcd->dr_r(); } + u8 status_r() { return m_lcd->status_r(); } + void dr_w(u8 data) { m_lcd->dr_w(data); } + void ir_w(u8 data) { m_lcd->ir_w(data); } + +protected: + virtual void device_start() override; + virtual void device_reset() override; + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + +private: + required_device m_lcd; + output_finder<2, 8, 8, 5> m_outputs; + void render_w(int state); +}; + +#endif // MAME_YAMAHA_MU5LCD_H diff --git a/src/mame/yamaha/ymmu15.cpp b/src/mame/yamaha/ymmu15.cpp new file mode 100644 index 00000000000..9d28114b4dc --- /dev/null +++ b/src/mame/yamaha/ymmu15.cpp @@ -0,0 +1,233 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/************************************************************************************* + + Yamaha MU-15 : 16-part, 32-note polyphonic/multitimbral General MIDI/XG + tone module + Driver by O. Galibert + + Uses a SWX00 that includes both the synth and an h8 core. Program and samples + share the rom. + +**************************************************************************************/ + +#include "emu.h" + +#include "bus/midi/midiinport.h" +#include "bus/midi/midioutport.h" +#include "cpu/h8/swx00.h" +#include "mu5lcd.h" +#include "machine/nvram.h" + +#include "debugger.h" +#include "speaker.h" + + +namespace { + +static INPUT_PORTS_START( mu15 ) +INPUT_PORTS_END + +class mu15_state : public driver_device +{ +public: + mu15_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + // , m_nvram(*this, "ram") + , m_lcd(*this, "lcd") + , m_ram(*this, "ram") + { } + + void mu15(machine_config &config); + +private: + required_device m_maincpu; + // required_device m_nvram; + // required_device m_swp00; + required_device m_lcd; + required_shared_ptr m_ram; + + void c_map(address_map &map); + void s_map(address_map &map); + + virtual void machine_start() override; + virtual void machine_reset() override; +}; + +void mu15_state::machine_start() +{ +} + +void mu15_state::machine_reset() +{ +} + +void mu15_state::s_map(address_map &map) +{ + map(0x000000, 0x3fffff).rom().region("swx00", 0); + map(0x400000, 0x40ffff).ram().share(m_ram); + // map(0x400000, 0x4007ff).m(m_swp00, FUNC(swp00_device::map)); +} + +void mu15_state::c_map(address_map &map) +{ +} + +#if 0 +// Analog input right (not sent to the swp, mixing is analog) +u16 mu15_state::adc_ar_r() +{ + return 0x3ff; +} + +// Analog input left (not sent to the swp, mixing is analog) +u16 mu15_state::adc_al_r() +{ + return 0x3ff; +} + +// Put the host switch to pure midi +u16 mu15_state::adc_midisw_r() +{ + // 000-0bf: midi + // 0c0-1ff: pc2 + // 200-37f: pc1 + // 380-3ff: mac + return 0x000; +} + +// Battery level +u16 mu15_state::adc_battery_r() +{ + return 0x200; +} + +void mu15_state::p6_w(u16 data) +{ + data ^= P6_LCD_ENABLE; + if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) { + if(!(cur_p6 & P6_LCD_RW)) { + if(cur_p6 & P6_LCD_RS) + m_lcd->data_write(cur_pa); + else + m_lcd->control_write(cur_pa); + } + } + + cur_p6 = data; +} + +u16 mu15_state::p6_r() +{ + return cur_p6; +} + +u16 mu15_state::pb_r() +{ + return cur_pb; +} + +void mu15_state::pb_w(u16 data) +{ + cur_pb = data; +} + +void mu15_state::pa_w(u16 data) +{ + cur_pa = data; +} + +void mu15_state::pc_w(u16 data) +{ + cur_pc = data; +} + +u16 mu15_state::pa_r() +{ + if((cur_p6 & P6_LCD_ENABLE)) { + if(cur_p6 & P6_LCD_RW) + { + if(cur_p6 & P6_LCD_RS) + return m_lcd->data_read(); + else + return m_lcd->control_read(); + } else + return 0x00; + } + return cur_pa; +} + +u16 mu15_state::pc_r() +{ + u16 res = cur_pc | 0x7c; + if(!(cur_pc & 0x01)) + res &= m_ioport_o0->read(); + if(!(cur_pc & 0x02)) + res &= m_ioport_o1->read(); + if(!(cur_pc & 0x80)) + res &= m_ioport_o2->read(); + return res; +} +#endif + +void mu15_state::mu15(machine_config &config) +{ + SWX00(config, m_maincpu, 8.4672_MHz_XTAL, 0); + m_maincpu->set_addrmap(m_maincpu->c_bus_id(), &mu15_state::c_map); + m_maincpu->set_addrmap(m_maincpu->s_bus_id(), &mu15_state::s_map); + + // m_maincpu->read_porta().set(FUNC(mu15_state::pa_r)); + // m_maincpu->read_portb().set(FUNC(mu15_state::pa_r)); + // m_maincpu->write_portb().set(FUNC(mu15_state::pa_w)); + +#if 0 + m_maincpu->read_adc<0>().set(FUNC(mu15_state::adc_ar_r)); + m_maincpu->read_adc<1>().set_constant(0); + m_maincpu->read_adc<2>().set(FUNC(mu15_state::adc_al_r)); + m_maincpu->read_adc<3>().set_constant(0); + m_maincpu->read_adc<4>().set(FUNC(mu15_state::adc_midisw_r)); + m_maincpu->read_adc<5>().set_constant(0); + m_maincpu->read_adc<6>().set(FUNC(mu15_state::adc_battery_r)); + m_maincpu->read_adc<7>().set_constant(0); + m_maincpu->read_port6().set(FUNC(mu15_state::p6_r)); + m_maincpu->write_port6().set(FUNC(mu15_state::p6_w)); + m_maincpu->read_porta().set(FUNC(mu15_state::pa_r)); + m_maincpu->write_porta().set(FUNC(mu15_state::pa_w)); + m_maincpu->read_portb().set(FUNC(mu15_state::pb_r)); + m_maincpu->write_portb().set(FUNC(mu15_state::pb_w)); + m_maincpu->read_portc().set(FUNC(mu15_state::pc_r)); + m_maincpu->write_portc().set(FUNC(mu15_state::pc_w)); + + m_maincpu->read_port7().set_constant(0); + m_maincpu->read_port9().set_constant(0); +#endif + + // NVRAM(config, m_nvram, nvram_device::DEFAULT_NONE); + + MU5LCD(config, m_lcd); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + // sci0 goes to the host connector + + auto &mdin(MIDI_PORT(config, "mdin")); + midiin_slot(mdin); + mdin.rxd_handler().set(m_maincpu, FUNC(swx00_device::sci_rx_w<1>)); + + auto &mdout(MIDI_PORT(config, "mdout")); + midiout_slot(mdout); + m_maincpu->write_sci_tx<1>().set(mdout, FUNC(midi_port_device::write_txd)); +} + +ROM_START( mu15 ) + ROM_REGION16_BE( 0x400000, "swx00", 0 ) + // v1.01, Nov. 28, 1998 + ROM_LOAD16_WORD_SWAP( "xv684c0.bin", 0x000000, 0x400000, CRC(e4046aef) SHA1(e286f83ed1fb90e0f98fe565b58112da18f88b5a) ) +ROM_END + +} // anonymous namespace + + +CONS( 1998, mu15, 0, 0, mu15, mu15, mu15_state, empty_init, "Yamaha", "MU15", 0 ) diff --git a/src/mame/yamaha/ymmu5.cpp b/src/mame/yamaha/ymmu5.cpp index 7a2569e45c7..1d844791c92 100644 --- a/src/mame/yamaha/ymmu5.cpp +++ b/src/mame/yamaha/ymmu5.cpp @@ -12,9 +12,10 @@ #include "cpu/h8/h83002.h" #include "sound/multipcm.h" -#include "video/lc7985.h" #include "bus/midi/midi.h" +#include "mu5lcd.h" + #include "screen.h" #include "speaker.h" @@ -30,7 +31,6 @@ public: m_ymw258(*this, "ymw258"), m_lcd(*this, "lcd"), m_key(*this, "S%c", 'A'), - m_outputs(*this, "%x.%x.%x.%x", 0U, 0U, 0U, 0U), m_matrixsel(0) { } @@ -43,9 +43,8 @@ protected: private: required_device m_maincpu; required_device m_ymw258; - required_device m_lcd; + required_device m_lcd; required_ioport_array<6> m_key; - output_finder<2, 8, 8, 5> m_outputs; void mu5_map(address_map &map); void ymw258_map(address_map &map); @@ -78,8 +77,6 @@ void mu5_state::ymw258_map(address_map &map) void mu5_state::machine_start() { - m_outputs.resolve(); - save_item(NAME(m_lcd_ctrl)); save_item(NAME(m_lcd_data)); save_item(NAME(m_matrixsel)); @@ -148,15 +145,6 @@ void mu5_state::render_w(int state) { if(!state) return; - - const u8 *render = m_lcd->render(); - for(int y=0; y != 2; y++) - for(int x=0; x != 8; x++) - for(int yy=0; yy != 8; yy++) { - u8 v = render[8 * y + 16 * x + yy]; - for(int xx=0; xx != 5; xx++) - m_outputs[y][x][yy][xx] = (v >> xx) & 1; - } } static INPUT_PORTS_START(mu5) @@ -222,6 +210,8 @@ void mu5_state::mu5(machine_config &config) m_maincpu->read_portb().set(FUNC(mu5_state::lcd_data_r)); m_maincpu->write_portb().set(FUNC(mu5_state::lcd_data_w)); + MU5LCD(config, m_lcd); + SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -230,18 +220,10 @@ void mu5_state::mu5(machine_config &config) m_ymw258->add_route(0, "lspeaker", 1.0); m_ymw258->add_route(1, "rspeaker", 1.0); - LC7985(config, m_lcd); - MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set(m_maincpu, FUNC(h83002_device::sci_rx_w<1>)); auto &mdout(MIDI_PORT(config, "mdout", midiout_slot, "midiout")); m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd)); - - auto &screen = SCREEN(config, "screen", SCREEN_TYPE_SVG); - screen.set_refresh_hz(60); - screen.set_size(800, 435); - screen.set_visarea_full(); - screen.screen_vblank().set(FUNC(mu5_state::render_w)); } ROM_START( mu5 ) @@ -251,8 +233,6 @@ ROM_START( mu5 ) ROM_REGION(0x200000, "ymw258", 0) ROM_LOAD("yamaha_mu5_waverom_xp50280-801.bin", 0x000000, 0x200000, CRC(e0913030) SHA1(369f8df4942b6717c142ca8c4913e556dafae187)) - ROM_REGION(261774, "screen", 0) - ROM_LOAD("mu5lcd.svg", 0, 261774, CRC(3cccbb88) SHA1(3db0b16f27b501ff8d8ac3fb631dd315571230d3)) ROM_END } // anonymous namespace diff --git a/src/mame/yamaha/ympsr340.cpp b/src/mame/yamaha/ympsr340.cpp index a683edcdb28..838a64f61fe 100644 --- a/src/mame/yamaha/ympsr340.cpp +++ b/src/mame/yamaha/ympsr340.cpp @@ -18,8 +18,7 @@ #include "emu.h" -#include "cpu/h8/h8s2655.h" -#include "sound/swp00.h" +#include "cpu/h8/swx00.h" #include "video/hd44780.h" #include "bus/midi/midi.h" @@ -36,7 +35,6 @@ public: psr340_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), - m_swp00(*this, "swp00"), m_lcdc(*this, "ks0066"), m_outputs(*this, "%02d.%x.%x", 0U, 0U, 0U), m_key(*this, "S%c", 'A') @@ -49,13 +47,13 @@ protected: virtual void machine_reset() override; private: - required_device m_maincpu; - required_device m_swp00; + required_device m_maincpu; required_device m_lcdc; output_finder<80, 8, 5> m_outputs; required_ioport_array<8> m_key; - void psr340_map(address_map &map); + void c_map(address_map &map); + void s_map(address_map &map); void lcd_ctrl_w(u8 data); void lcd_data_w(u8 data); @@ -95,7 +93,7 @@ void psr340_state::lcd_data_w(u8 data) m_matrixsel = data; } -void psr340_state::psr340_map(address_map &map) +void psr340_state::c_map(address_map &map) { map(0x000000, 0x1fffff).rom().region("maincpu", 0); map(0x400000, 0x43ffff).ram(); // Work RAM? Or SWP / MEG? @@ -112,6 +110,11 @@ void psr340_state::psr340_map(address_map &map) map(0xffe02f, 0xffe02f).lr8(NAME([]() -> uint8_t { return 0xff; })); } +void psr340_state::s_map(address_map &map) +{ + map(0x000000, 0x1fffff).rom().region("wave", 0); +} + void psr340_state::machine_start() { m_outputs.resolve(); @@ -269,10 +272,11 @@ INPUT_PORTS_END void psr340_state::psr340(machine_config &config) { /* basic machine hardware */ - H8S2655(config, m_maincpu, 16_MHz_XTAL); // gives correct MIDI serial rate and matches MU100, but doesn't line up exactly with schematic value - m_maincpu->set_addrmap(AS_PROGRAM, &psr340_state::psr340_map); + SWX00(config, m_maincpu, 8.4672_MHz_XTAL*2, 1); + m_maincpu->set_addrmap(m_maincpu->c_bus_id(), &psr340_state::c_map); + m_maincpu->set_addrmap(m_maincpu->s_bus_id(), &psr340_state::s_map); - // SCI0 is externally clocked at the 31250 Hz MIDI rate + // SCI0 is externally clocked at the 31250 Hz MIDI rate by the mks3 m_maincpu->sci_set_external_clock_period(0, attotime::from_hz(31250 * 16)); KS0066(config, m_lcdc, 270'000); // TODO: clock not measured, datasheet typical clock used @@ -286,17 +290,13 @@ void psr340_state::psr340(machine_config &config) screen.set_visarea_full(); screen.screen_vblank().set(FUNC(psr340_state::render_w)); - MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set(m_maincpu, FUNC(h8s2655_device::sci_rx_w<0>)); + MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set(m_maincpu, FUNC(swx00_device::sci_rx_w<0>)); auto &mdout(MIDI_PORT(config, "mdout", midiout_slot, "midiout")); m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd)); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - - SWP00(config, m_swp00); - m_swp00->add_route(0, "lspeaker", 1.0); - m_swp00->add_route(1, "rspeaker", 1.0); } ROM_START( psr340 ) @@ -307,7 +307,7 @@ ROM_START( psr340 ) ROM_FILL(0x20e6, 1, 0x54) ROM_FILL(0x20e7, 1, 0x70) - ROM_REGION(0x200000, "swp00", 0) + ROM_REGION(0x200000, "wave", 0) ROM_LOAD("xv89810.bin", 0x000000, 0x200000, CRC(10e68363) SHA1(5edee814bf07c49088da44474fdd5c817e7c5af0)) ROM_REGION(0x5704b, "screen", 0) diff --git a/src/mame/yamaha/ympsr540.cpp b/src/mame/yamaha/ympsr540.cpp index 89050ff257f..1f9124cbec7 100644 --- a/src/mame/yamaha/ympsr540.cpp +++ b/src/mame/yamaha/ympsr540.cpp @@ -14,27 +14,55 @@ class psr540_state : public driver_device { public: psr540_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") + m_maincpu(*this, "maincpu"), + m_sustain(*this, "SUSTAIN"), + m_pitch_bend(*this, "PITCH_BEND") { } void psr540(machine_config &config); private: - required_device m_maincpu; + required_device m_maincpu; + required_ioport m_sustain; + required_ioport m_pitch_bend; void map(address_map &map); void machine_start() override; + + u16 adc_sustain_r(); + u16 adc_midisw_r(); + u16 adc_battery_r(); }; void psr540_state::machine_start() { } +u16 psr540_state::adc_sustain_r() +{ + return m_sustain->read() ? 0x3ff : 0; +} + +u16 psr540_state::adc_midisw_r() +{ + return 0; +} + +u16 psr540_state::adc_battery_r() +{ + return 0x3ff; +} + void psr540_state::psr540(machine_config &config) { SH7042(config, m_maincpu, 7_MHz_XTAL*4); // internal mask rom active, pll x4 m_maincpu->set_addrmap(AS_PROGRAM, &psr540_state::map); + m_maincpu->read_adc<0>().set(FUNC(psr540_state::adc_midisw_r)); + m_maincpu->read_adc<1>().set(FUNC(psr540_state::adc_sustain_r)); + m_maincpu->read_adc<2>().set(FUNC(psr540_state::adc_battery_r)); + m_maincpu->read_adc<3>().set_constant(0); + m_maincpu->read_adc<4>().set_ioport(m_pitch_bend); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -54,13 +82,19 @@ void psr540_state::map(address_map &map) map(0x0400000, 0x07fffff).rom().region("program_rom", 0); // c00000-ffffff: cs3 space - // c00000: sxw00 + // c00000: swx00 // Dedicated dram space map(0x1000000, 0x13fffff).ram(); // dram } static INPUT_PORTS_START( psr540 ) + PORT_START("SUSTAIN") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Sustain Pedal") + + PORT_START("PITCH_BEND") + PORT_BIT(0x3ff, 0x200, IPT_PADDLE) PORT_NAME("Pitch Bend") PORT_SENSITIVITY(30) + INPUT_PORTS_END ROM_START( psr540 ) -- cgit v1.2.3