From d683427b257e32426ad1d13b92b4ba5f25701d8f Mon Sep 17 00:00:00 2001
From: hap <happppp@users.noreply.github.com>
Date: Mon, 16 Sep 2024 15:03:11 +0200
Subject: hmcs400: add opcode placeholders

---
 src/devices/cpu/amis2000/amis2000.cpp |   2 +-
 src/devices/cpu/hmcs40/hmcs40.cpp     | 329 ++++++++-----------------
 src/devices/cpu/hmcs40/hmcs40op.cpp   |  36 +--
 src/devices/cpu/hmcs400/hmcs400.cpp   | 129 +++++++++-
 src/devices/cpu/hmcs400/hmcs400.h     |  92 +++++++
 src/devices/cpu/hmcs400/hmcs400op.cpp | 440 ++++++++++++++++++++++++++++++++++
 src/devices/cpu/melps4/m58846.cpp     |   2 +-
 src/devices/cpu/mn1400/mn1400.cpp     |   3 +-
 src/devices/cpu/pps41/mm76.cpp        |   3 +-
 src/devices/cpu/pps41/mm78.cpp        |   3 +-
 src/devices/cpu/rw5000/b5000.cpp      |   3 +-
 src/devices/cpu/sm510/sm500.cpp       |   2 +-
 src/devices/cpu/sm510/sm510.cpp       |   2 +-
 src/devices/cpu/sm510/sm511.cpp       |   2 +-
 src/devices/cpu/sm510/sm530.cpp       |   2 +-
 src/devices/cpu/sm510/sm590.cpp       |   2 +-
 src/devices/cpu/sm510/sm5a.cpp        |   2 +-
 src/devices/cpu/ucom4/ucom4.cpp       |   2 +-
 18 files changed, 795 insertions(+), 261 deletions(-)

diff --git a/src/devices/cpu/amis2000/amis2000.cpp b/src/devices/cpu/amis2000/amis2000.cpp
index f8daa91eca6..5911cb2543b 100644
--- a/src/devices/cpu/amis2000/amis2000.cpp
+++ b/src/devices/cpu/amis2000/amis2000.cpp
@@ -337,6 +337,6 @@ void amis2000_base_device::execute_run()
 				}
 				break; // 0xff
 
-		} // big switch
+		} // 0xf0
 	}
 }
diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp
index 9f82d3bc783..3ef73181693 100644
--- a/src/devices/cpu/hmcs40/hmcs40.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40.cpp
@@ -575,234 +575,113 @@ void hmcs40_cpu_device::execute_run()
 		cycle();
 
 		// handle opcode
-		switch (m_op)
+		switch (m_op & 0x3f0)
 		{
-			// 0x000
-
-			case 0x000: case 0x001: case 0x002: case 0x003:
-				op_xsp(); break;
-			case 0x004: case 0x005: case 0x006: case 0x007:
-				op_sem(); break;
-			case 0x008: case 0x009: case 0x00a: case 0x00b:
-				op_lam(); break;
-			case 0x010: case 0x011: case 0x012: case 0x013: case 0x014: case 0x015: case 0x016: case 0x017:
-			case 0x018: case 0x019: case 0x01a: case 0x01b: case 0x01c: case 0x01d: case 0x01e: case 0x01f:
-				op_lmiiy(); break;
-			case 0x020: case 0x021: case 0x022: case 0x023:
-				op_lbm(); break;
-			case 0x024:
-				op_blem(); break;
-			case 0x030:
-				op_amc(); break;
-			case 0x034:
-				op_am(); break;
-			case 0x03c:
-				op_lta(); break;
-
-			case 0x040:
-				op_lxa(); break;
-			case 0x045:
-				op_das(); break;
-			case 0x046:
-				op_daa(); break;
-			case 0x04c:
-				op_rec(); break;
-			case 0x04f:
-				op_sec(); break;
-			case 0x050:
-				op_lya(); break;
-			case 0x054:
-				op_iy(); break;
-			case 0x058:
-				op_ayy(); break;
-			case 0x060:
-				op_lba(); break;
-			case 0x064:
-				op_ib(); break;
-			case 0x070: case 0x071: case 0x072: case 0x073: case 0x074: case 0x075: case 0x076: case 0x077:
-			case 0x078: case 0x079: case 0x07a: case 0x07b: case 0x07c: case 0x07d: case 0x07e: case 0x07f:
-				op_lai(); break;
-
-			case 0x080: case 0x081: case 0x082: case 0x083: case 0x084: case 0x085: case 0x086: case 0x087:
-			case 0x088: case 0x089: case 0x08a: case 0x08b: case 0x08c: case 0x08d: case 0x08e: case 0x08f:
-				op_ai(); break;
-			case 0x090:
-				op_sed(); break;
-			case 0x094:
-				op_td(); break;
-			case 0x0a0:
-				op_seif1(); break;
-			case 0x0a1:
-				op_secf(); break;
-			case 0x0a2:
-				op_seif0(); break;
-			case 0x0a4:
-				op_seie(); break;
-			case 0x0a5:
-				op_setf(); break;
-
-			case 0x0c0: case 0x0c1: case 0x0c2: case 0x0c3: case 0x0c4: case 0x0c5: case 0x0c6: case 0x0c7:
-				op_lar(); break;
-			case 0x0d0: case 0x0d1: case 0x0d2: case 0x0d3:
-				op_sedd(); break;
-			case 0x0e0: case 0x0e1: case 0x0e2: case 0x0e3: case 0x0e4: case 0x0e5: case 0x0e6: case 0x0e7:
-				op_lbr(); break;
-			case 0x0f0: case 0x0f1: case 0x0f2: case 0x0f3: case 0x0f4: case 0x0f5: case 0x0f6: case 0x0f7:
-			case 0x0f8: case 0x0f9: case 0x0fa: case 0x0fb: case 0x0fc: case 0x0fd: case 0x0fe: case 0x0ff:
-				op_xamr(); break;
-
-
-			// 0x100
-
-			case 0x110: case 0x111:
-				op_lmaiy(); break;
-			case 0x114: case 0x115:
-				op_lmady(); break;
-			case 0x118:
-				op_lay(); break;
-			case 0x120:
-				op_or(); break;
-			case 0x124:
-				op_anem(); break;
-
-			case 0x140: case 0x141: case 0x142: case 0x143: case 0x144: case 0x145: case 0x146: case 0x147:
-			case 0x148: case 0x149: case 0x14a: case 0x14b: case 0x14c: case 0x14d: case 0x14e: case 0x14f:
-				op_lxi(); break;
-			case 0x150: case 0x151: case 0x152: case 0x153: case 0x154: case 0x155: case 0x156: case 0x157:
-			case 0x158: case 0x159: case 0x15a: case 0x15b: case 0x15c: case 0x15d: case 0x15e: case 0x15f:
-				op_lyi(); break;
-			case 0x160: case 0x161: case 0x162: case 0x163: case 0x164: case 0x165: case 0x166: case 0x167:
-			case 0x168: case 0x169: case 0x16a: case 0x16b: case 0x16c: case 0x16d: case 0x16e: case 0x16f:
-				op_lbi(); break;
-			case 0x170: case 0x171: case 0x172: case 0x173: case 0x174: case 0x175: case 0x176: case 0x177:
-			case 0x178: case 0x179: case 0x17a: case 0x17b: case 0x17c: case 0x17d: case 0x17e: case 0x17f:
-				op_lti(); break;
-
-			case 0x1a0:
-				op_tif1(); break;
-			case 0x1a1:
-				op_ti1(); break;
-			case 0x1a2:
-				op_tif0(); break;
-			case 0x1a3:
-				op_ti0(); break;
-			case 0x1a5:
-				op_ttf(); break;
-
-			case 0x1c0: case 0x1c1: case 0x1c2: case 0x1c3: case 0x1c4: case 0x1c5: case 0x1c6: case 0x1c7:
-			case 0x1c8: case 0x1c9: case 0x1ca: case 0x1cb: case 0x1cc: case 0x1cd: case 0x1ce: case 0x1cf:
-			case 0x1d0: case 0x1d1: case 0x1d2: case 0x1d3: case 0x1d4: case 0x1d5: case 0x1d6: case 0x1d7:
-			case 0x1d8: case 0x1d9: case 0x1da: case 0x1db: case 0x1dc: case 0x1dd: case 0x1de: case 0x1df:
-			case 0x1e0: case 0x1e1: case 0x1e2: case 0x1e3: case 0x1e4: case 0x1e5: case 0x1e6: case 0x1e7:
-			case 0x1e8: case 0x1e9: case 0x1ea: case 0x1eb: case 0x1ec: case 0x1ed: case 0x1ee: case 0x1ef:
-			case 0x1f0: case 0x1f1: case 0x1f2: case 0x1f3: case 0x1f4: case 0x1f5: case 0x1f6: case 0x1f7:
-			case 0x1f8: case 0x1f9: case 0x1fa: case 0x1fb: case 0x1fc: case 0x1fd: case 0x1fe: case 0x1ff:
-				op_br(); break;
-
-
-			// 0x200
-
-			case 0x200: case 0x201: case 0x202: case 0x203:
-				op_tm(); break;
-			case 0x204: case 0x205: case 0x206: case 0x207:
-				op_rem(); break;
-			case 0x208: case 0x209: case 0x20a: case 0x20b:
-				op_xma(); break;
-			case 0x210: case 0x211: case 0x212: case 0x213: case 0x214: case 0x215: case 0x216: case 0x217:
-			case 0x218: case 0x219: case 0x21a: case 0x21b: case 0x21c: case 0x21d: case 0x21e: case 0x21f:
-				op_mnei(); break;
-			case 0x220: case 0x221: case 0x222: case 0x223:
-				op_xmb(); break;
-			case 0x224:
-				op_rotr(); break;
-			case 0x225:
-				op_rotl(); break;
-			case 0x230:
-				op_smc(); break;
-			case 0x234:
-				op_alem(); break;
-			case 0x23c:
-				op_lat(); break;
-
-			case 0x240:
-				op_laspx(); break;
-			case 0x244:
-				op_nega(); break;
-			case 0x24f:
-				op_tc(); break;
-			case 0x250:
-				op_laspy(); break;
-			case 0x254:
-				op_dy(); break;
-			case 0x258:
-				op_syy(); break;
-			case 0x260:
-				op_lab(); break;
-			case 0x267:
-				op_db(); break;
-			case 0x270: case 0x271: case 0x272: case 0x273: case 0x274: case 0x275: case 0x276: case 0x277:
-			case 0x278: case 0x279: case 0x27a: case 0x27b: case 0x27c: case 0x27d: case 0x27e: case 0x27f:
-				op_alei(); break;
-
-			case 0x280: case 0x281: case 0x282: case 0x283: case 0x284: case 0x285: case 0x286: case 0x287:
-			case 0x288: case 0x289: case 0x28a: case 0x28b: case 0x28c: case 0x28d: case 0x28e: case 0x28f:
-				op_ynei(); break;
-			case 0x290:
-				op_red(); break;
-			case 0x2a0:
-				op_reif1(); break;
-			case 0x2a1:
-				op_recf(); break;
-			case 0x2a2:
-				op_reif0(); break;
-			case 0x2a4:
-				op_reie(); break;
-			case 0x2a5:
-				op_retf(); break;
-
-			case 0x2c0: case 0x2c1: case 0x2c2: case 0x2c3: case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7:
-				op_lra(); break;
-			case 0x2d0: case 0x2d1: case 0x2d2: case 0x2d3:
-				op_redd(); break;
-			case 0x2e0: case 0x2e1: case 0x2e2: case 0x2e3: case 0x2e4: case 0x2e5: case 0x2e6: case 0x2e7:
-				op_lrb(); break;
-
-
-			// 0x300
-
-			case 0x320:
-				op_comb(); break;
-			case 0x324:
-				op_bnem(); break;
-
-			case 0x340: case 0x341: case 0x342: case 0x343: case 0x344: case 0x345: case 0x346: case 0x347:
-			case 0x348: case 0x349: case 0x34a: case 0x34b: case 0x34c: case 0x34d: case 0x34e: case 0x34f:
-			case 0x350: case 0x351: case 0x352: case 0x353: case 0x354: case 0x355: case 0x356: case 0x357:
-			case 0x358: case 0x359: case 0x35a: case 0x35b: case 0x35c: case 0x35d: case 0x35e: case 0x35f:
-				op_lpu(); break;
-			case 0x360: case 0x361: case 0x362: case 0x363: case 0x364: case 0x365: case 0x366: case 0x367:
-				op_tbr(); break;
-			case 0x368: case 0x369: case 0x36a: case 0x36b: case 0x36c: case 0x36d: case 0x36e: case 0x36f:
-				op_p(); break;
-
-			case 0x3a4:
-				op_rtni(); break;
-			case 0x3a7:
-				op_rtn(); break;
-
-			case 0x3c0: case 0x3c1: case 0x3c2: case 0x3c3: case 0x3c4: case 0x3c5: case 0x3c6: case 0x3c7:
-			case 0x3c8: case 0x3c9: case 0x3ca: case 0x3cb: case 0x3cc: case 0x3cd: case 0x3ce: case 0x3cf:
-			case 0x3d0: case 0x3d1: case 0x3d2: case 0x3d3: case 0x3d4: case 0x3d5: case 0x3d6: case 0x3d7:
-			case 0x3d8: case 0x3d9: case 0x3da: case 0x3db: case 0x3dc: case 0x3dd: case 0x3de: case 0x3df:
-			case 0x3e0: case 0x3e1: case 0x3e2: case 0x3e3: case 0x3e4: case 0x3e5: case 0x3e6: case 0x3e7:
-			case 0x3e8: case 0x3e9: case 0x3ea: case 0x3eb: case 0x3ec: case 0x3ed: case 0x3ee: case 0x3ef:
-			case 0x3f0: case 0x3f1: case 0x3f2: case 0x3f3: case 0x3f4: case 0x3f5: case 0x3f6: case 0x3f7:
-			case 0x3f8: case 0x3f9: case 0x3fa: case 0x3fb: case 0x3fc: case 0x3fd: case 0x3fe: case 0x3ff:
-				op_cal(); break;
+			case 0x1c0: case 0x1d0: case 0x1e0: case 0x1f0: op_br(); break;
+			case 0x3c0: case 0x3d0: case 0x3e0: case 0x3f0: op_cal(); break;
+			case 0x340: case 0x350: op_lpu(); break;
+
+			case 0x010: op_lmiiy(); break;
+			case 0x070: op_lai(); break;
+			case 0x080: op_ai(); break;
+			case 0x0f0: op_xamr(); break;
+			case 0x140: op_lxi(); break;
+			case 0x150: op_lyi(); break;
+			case 0x160: op_lbi(); break;
+			case 0x170: op_lti(); break;
+			case 0x210: op_mnei(); break;
+			case 0x270: op_alei(); break;
+			case 0x280: op_ynei(); break;
 
+			default:
+				switch (m_op & 0x3fc)
+				{
+			case 0x0c0: case 0x0c4: op_lar(); break;
+			case 0x0e0: case 0x0e4: op_lbr(); break;
+			case 0x2c0: case 0x2c4: op_lra(); break;
+			case 0x2e0: case 0x2e4: op_lrb(); break;
+			case 0x360: case 0x364: op_tbr(); break;
+			case 0x368: case 0x36c: op_p(); break;
+
+			case 0x000: op_xsp(); break;
+			case 0x004: op_sem(); break;
+			case 0x008: op_lam(); break;
+			case 0x020: op_lbm(); break;
+			case 0x0d0: op_sedd(); break;
+			case 0x200: op_tm(); break;
+			case 0x204: op_rem(); break;
+			case 0x208: op_xma(); break;
+			case 0x220: op_xmb(); break;
+			case 0x2d0: op_redd(); break;
 
 			default:
-				op_illegal(); break;
-		} // big switch
+				switch (m_op)
+				{
+			case 0x024: op_blem(); break;
+			case 0x030: op_amc(); break;
+			case 0x034: op_am(); break;
+			case 0x03c: op_lta(); break;
+			case 0x040: op_lxa(); break;
+			case 0x045: op_das(); break;
+			case 0x046: op_daa(); break;
+			case 0x04c: op_rec(); break;
+			case 0x04f: op_sec(); break;
+			case 0x050: op_lya(); break;
+			case 0x054: op_iy(); break;
+			case 0x058: op_ayy(); break;
+			case 0x060: op_lba(); break;
+			case 0x064: op_ib(); break;
+			case 0x090: op_sed(); break;
+			case 0x094: op_td(); break;
+			case 0x0a0: op_seif1(); break;
+			case 0x0a1: op_secf(); break;
+			case 0x0a2: op_seif0(); break;
+			case 0x0a4: op_seie(); break;
+			case 0x0a5: op_setf(); break;
+
+			case 0x110: case 0x111: op_lmaiy(); break;
+			case 0x114: case 0x115: op_lmady(); break;
+			case 0x118: op_lay(); break;
+			case 0x120: op_or(); break;
+			case 0x124: op_anem(); break;
+			case 0x1a0: op_tif1(); break;
+			case 0x1a1: op_ti1(); break;
+			case 0x1a2: op_tif0(); break;
+			case 0x1a3: op_ti0(); break;
+			case 0x1a5: op_ttf(); break;
+
+			case 0x224: op_rotr(); break;
+			case 0x225: op_rotl(); break;
+			case 0x230: op_smc(); break;
+			case 0x234: op_alem(); break;
+			case 0x23c: op_lat(); break;
+			case 0x240: op_laspx(); break;
+			case 0x244: op_nega(); break;
+			case 0x24f: op_tc(); break;
+			case 0x250: op_laspy(); break;
+			case 0x254: op_dy(); break;
+			case 0x258: op_syy(); break;
+			case 0x260: op_lab(); break;
+			case 0x267: op_db(); break;
+			case 0x290: op_red(); break;
+			case 0x2a0: op_reif1(); break;
+			case 0x2a1: op_recf(); break;
+			case 0x2a2: op_reif0(); break;
+			case 0x2a4: op_reie(); break;
+			case 0x2a5: op_retf(); break;
+
+			case 0x320: op_comb(); break;
+			case 0x324: op_bnem(); break;
+			case 0x3a4: op_rtni(); break;
+			case 0x3a7: op_rtn(); break;
+
+			default: op_illegal(); break;
+				}
+				break; // 0x3ff
+
+				}
+				break; // 0x3fc
+
+		} // 0x3f0
 	}
 }
diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp
index e9f60c5ba3a..c8b6032ffd1 100644
--- a/src/devices/cpu/hmcs40/hmcs40op.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40op.cpp
@@ -45,7 +45,7 @@ void hmcs40_cpu_device::op_illegal()
 }
 
 
-// Register-to-Register Instruction
+// register-to-register instructions
 
 void hmcs40_cpu_device::op_lab()
 {
@@ -100,7 +100,7 @@ void hmcs40_cpu_device::op_xamr()
 }
 
 
-// RAM Address Instruction
+// RAM address instructions
 
 void hmcs40_cpu_device::op_lxa()
 {
@@ -158,7 +158,7 @@ void hmcs40_cpu_device::op_syy()
 
 void hmcs40_cpu_device::op_xsp()
 {
-	// XSP (XY): Exchange X and SPX, Y and SPY, or NOP if 0
+	// XSP(XY): Exchange X and SPX, Y and SPY, or NOP if 0
 	if (m_op & 1)
 	{
 		u8 old_x = m_x;
@@ -174,25 +174,25 @@ void hmcs40_cpu_device::op_xsp()
 }
 
 
-// RAM Register Instruction
+// RAM register instructions
 
 void hmcs40_cpu_device::op_lam()
 {
-	// LAM (XY): Load A from Memory
+	// LAM(XY): Load A from Memory
 	m_a = ram_r();
 	op_xsp();
 }
 
 void hmcs40_cpu_device::op_lbm()
 {
-	// LBM (XY): Load B from Memory
+	// LBM(XY): Load B from Memory
 	m_b = ram_r();
 	op_xsp();
 }
 
 void hmcs40_cpu_device::op_xma()
 {
-	// XMA (XY): Exchange Memory and A
+	// XMA(XY): Exchange Memory and A
 	u8 old_a = m_a;
 	m_a = ram_r();
 	ram_w(old_a);
@@ -201,7 +201,7 @@ void hmcs40_cpu_device::op_xma()
 
 void hmcs40_cpu_device::op_xmb()
 {
-	// XMB (XY): Exchange Memory and B
+	// XMB(XY): Exchange Memory and B
 	u8 old_b = m_b;
 	m_b = ram_r();
 	ram_w(old_b);
@@ -210,7 +210,7 @@ void hmcs40_cpu_device::op_xmb()
 
 void hmcs40_cpu_device::op_lmaiy()
 {
-	// LMAIY (X): Load Memory from A, Increment Y
+	// LMAIY(X): Load Memory from A, Increment Y
 	ram_w(m_a);
 	op_iy();
 	op_xsp();
@@ -218,14 +218,14 @@ void hmcs40_cpu_device::op_lmaiy()
 
 void hmcs40_cpu_device::op_lmady()
 {
-	// LMADY (X): Load Memory from A, Decrement Y
+	// LMADY(X): Load Memory from A, Decrement Y
 	ram_w(m_a);
 	op_dy();
 	op_xsp();
 }
 
 
-// Immediate Instruction
+// immediate instructions
 
 void hmcs40_cpu_device::op_lmiiy()
 {
@@ -247,7 +247,7 @@ void hmcs40_cpu_device::op_lbi()
 }
 
 
-// Arithmetic Instruction
+// arithmetic instructions
 
 void hmcs40_cpu_device::op_ai()
 {
@@ -365,12 +365,12 @@ void hmcs40_cpu_device::op_rotr()
 
 void hmcs40_cpu_device::op_or()
 {
-	// OR: OR A with B
+	// OR: Or A with B
 	m_a |= m_b;
 }
 
 
-// Compare Instruction
+// compare instructions
 
 void hmcs40_cpu_device::op_mnei()
 {
@@ -415,7 +415,7 @@ void hmcs40_cpu_device::op_blem()
 }
 
 
-// RAM Bit Manipulation Instruction
+// RAM bit manipulation instructions
 
 void hmcs40_cpu_device::op_sem()
 {
@@ -436,7 +436,7 @@ void hmcs40_cpu_device::op_tm()
 }
 
 
-// ROM Address Instruction
+// ROM address instructions
 
 void hmcs40_cpu_device::op_br()
 {
@@ -486,7 +486,7 @@ void hmcs40_cpu_device::op_rtn()
 }
 
 
-// Interrupt Instruction
+// interrupt instructions
 
 void hmcs40_cpu_device::op_seie()
 {
@@ -606,7 +606,7 @@ void hmcs40_cpu_device::op_rtni()
 }
 
 
-// Input/Output Instruction
+// input/output instructions
 
 void hmcs40_cpu_device::op_sed()
 {
diff --git a/src/devices/cpu/hmcs400/hmcs400.cpp b/src/devices/cpu/hmcs400/hmcs400.cpp
index 4070a0b3830..4d8212e29fc 100644
--- a/src/devices/cpu/hmcs400/hmcs400.cpp
+++ b/src/devices/cpu/hmcs400/hmcs400.cpp
@@ -4,6 +4,9 @@
 
 Hitachi HMCS400 MCU family cores
 
+It's the successor to HMCS40, around 5 times faster, and more versatile peripherals,
+like a serial interface. It was mainly used in consumer electronics, not much in games.
+
 TODO:
 - do the LAW/LWA opcodes not work on early revisions of HMCS400? the 1988 user
   manual warns that the W register is write-only, and that there is no efficient
@@ -218,11 +221,11 @@ device_memory_interface::space_config_vector hmcs400_cpu_device::memory_space_co
 
 u16 hmcs400_cpu_device::fetch()
 {
-	u16 data = m_program->read_word(m_pc) & 0x3ff;
+	u16 data = m_program->read_word(m_pc);
 	m_pc = (m_pc + 1) & 0x3fff;
 	m_icount--;
 
-	return data;
+	return data & 0x3ff;
 }
 
 void hmcs400_cpu_device::execute_run()
@@ -234,10 +237,126 @@ void hmcs400_cpu_device::execute_run()
 		debugger_instruction_hook(m_pc);
 		m_op = fetch();
 
-		// 2-byte opcodes
+		// 2-byte opcodes / RAM address
 		if ((m_op >= 0x100 && m_op < 0x140) || (m_op >= 0x150 && m_op < 0x1b0))
 			m_param = fetch();
-
-		op_illegal();
+		else
+			m_param = 0;
+
+		// handle opcode
+		switch (m_op & 0x3f0)
+		{
+			case 0x1c0: case 0x1d0: case 0x1e0: case 0x1f0: op_cal(); break;
+
+			case 0x020: case 0x120: op_inem(); break;
+			case 0x030: case 0x130: op_ilem(); break;
+			case 0x070: op_ynei(); break;
+			case 0x0b0: op_tbr(); break;
+			case 0x150: op_jmpl(); break;
+			case 0x160: op_call(); break;
+			case 0x170: op_brl(); break;
+			case 0x1a0: op_lmid(); break;
+			case 0x1b0: op_p(); break;
+
+			case 0x200: op_lbi(); break;
+			case 0x210: op_lyi(); break;
+			case 0x220: op_lxi(); break;
+			case 0x230: op_lai(); break;
+			case 0x240: op_lbr(); break;
+			case 0x250: op_lar(); break;
+			case 0x260: op_redd(); break;
+			case 0x270: op_lamr(); break;
+			case 0x280: op_ai(); break;
+			case 0x290: op_lmiiy(); break;
+			case 0x2a0: op_tdd(); break;
+			case 0x2b0: op_alei(); break;
+			case 0x2c0: op_lrb(); break;
+			case 0x2d0: op_lra(); break;
+			case 0x2e0: op_sedd(); break;
+			case 0x2f0: op_xmra(); break;
+
+			default:
+				if ((m_op & 0x300) == 0x300)
+				{
+					op_br(); break;
+				}
+
+				switch (m_op & 0x3fc)
+				{
+			case 0x084: case 0x184: op_sem(); break;
+			case 0x088: case 0x188: op_rem(); break;
+			case 0x08c: case 0x18c: op_tm(); break;
+
+			case 0x000: op_xsp(); break;
+			case 0x040: op_lbm(); break;
+			case 0x080: op_xma(); break;
+			case 0x090: op_lam(); break;
+			case 0x094: op_lma(); break;
+			case 0x0c0: op_xmb(); break;
+			case 0x0f0: op_lwi(); break;
+
+			default:
+				switch (m_op)
+				{
+			case 0x004: case 0x104: op_anem(); break;
+			case 0x008: case 0x108: op_am(); break;
+			case 0x00c: case 0x10c: op_orm(); break;
+			case 0x014: case 0x114: op_alem(); break;
+			case 0x018: case 0x118: op_amc(); break;
+			case 0x01c: case 0x11c: op_eorm(); break;
+			case 0x098: case 0x198: op_smc(); break;
+			case 0x09c: case 0x19c: op_anm(); break;
+
+			case 0x010: op_rtn(); break;
+			case 0x011: op_rtni(); break;
+			case 0x044: op_bnem(); break;
+			case 0x048: op_lab(); break;
+			case 0x04c: op_ib(); break;
+			case 0x050: case 0x051: op_lmaiy(); break;
+			case 0x054: op_ayy(); break;
+			case 0x058: op_laspy(); break;
+			case 0x05c: op_iy(); break;
+			case 0x060: op_nega(); break;
+			case 0x064: op_red(); break;
+			case 0x068: op_laspx(); break;
+			case 0x06f: op_tc(); break;
+
+			case 0x0a0: op_rotr(); break;
+			case 0x0a1: op_rotl(); break;
+			case 0x0a6: op_daa(); break;
+			case 0x0aa: op_das(); break;
+			case 0x0af: op_lay(); break;
+			case 0x0c4: op_blem(); break;
+			case 0x0c8: op_lba(); break;
+			case 0x0cf: op_db(); break;
+			case 0x0d0: case 0x0d1: op_lmady(); break;
+			case 0x0d4: op_syy(); break;
+			case 0x0d8: op_lya(); break;
+			case 0x0df: op_dy(); break;
+			case 0x0e0: op_td(); break;
+			case 0x0e4: op_sed(); break;
+			case 0x0e8: op_lxa(); break;
+			case 0x0ec: op_rec(); break;
+			case 0x0ef: op_sec(); break;
+
+			case 0x100: op_law(); break;
+			case 0x110: op_lwa(); break;
+			case 0x140: op_comb(); break;
+			case 0x144: op_or(); break;
+			case 0x148: op_sts(); break;
+			case 0x14c: op_sby(); break;
+			case 0x14d: op_stop(); break;
+			case 0x180: op_xma(); break;
+			case 0x190: op_lam(); break;
+			case 0x194: op_lma(); break;
+
+			default: op_illegal(); break;
+				}
+				break; // 0x3ff
+
+				}
+				break; // 0x3fc
+
+		} // 0x3f0
 	}
 }
diff --git a/src/devices/cpu/hmcs400/hmcs400.h b/src/devices/cpu/hmcs400/hmcs400.h
index a5fdd662241..174668a3189 100644
--- a/src/devices/cpu/hmcs400/hmcs400.h
+++ b/src/devices/cpu/hmcs400/hmcs400.h
@@ -71,6 +71,98 @@ protected:
 
 	// opcode handlers
 	void op_illegal();
+
+	void op_lai();
+	void op_lbi();
+	void op_lmid();
+	void op_lmiiy();
+
+	void op_lab();
+	void op_lba();
+	void op_law();
+	void op_lay();
+	void op_laspx();
+	void op_laspy();
+	void op_lamr();
+	void op_xmra();
+
+	void op_lwi();
+	void op_lxi();
+	void op_lyi();
+	void op_lwa();
+	void op_lxa();
+	void op_lya();
+	void op_iy();
+	void op_dy();
+	void op_ayy();
+	void op_syy();
+	void op_xsp();
+
+	void op_lam();
+	void op_lbm();
+	void op_lma();
+	void op_lmaiy();
+	void op_lmady();
+	void op_xma();
+	void op_xmb();
+
+	void op_ai();
+	void op_ib();
+	void op_db();
+	void op_daa();
+	void op_das();
+	void op_nega();
+	void op_comb();
+	void op_rotr();
+	void op_rotl();
+	void op_sec();
+	void op_rec();
+	void op_tc();
+	void op_am();
+	void op_amc();
+	void op_smc();
+	void op_or();
+	void op_anm();
+	void op_orm();
+	void op_eorm();
+
+	void op_inem();
+	void op_anem();
+	void op_bnem();
+	void op_ynei();
+	void op_ilem();
+	void op_alem();
+	void op_blem();
+	void op_alei();
+
+	void op_sem();
+	void op_rem();
+	void op_tm();
+
+	void op_br();
+	void op_brl();
+	void op_jmpl();
+	void op_cal();
+	void op_call();
+	void op_tbr();
+	void op_rtn();
+	void op_rtni();
+
+	void op_sed();
+	void op_sedd();
+	void op_red();
+	void op_redd();
+	void op_td();
+	void op_tdd();
+	void op_lar();
+	void op_lbr();
+	void op_lra();
+	void op_lrb();
+	void op_p();
+
+	void op_sts();
+	void op_sby();
+	void op_stop();
 };
 
 
diff --git a/src/devices/cpu/hmcs400/hmcs400op.cpp b/src/devices/cpu/hmcs400/hmcs400op.cpp
index c7db4d9e407..aa212e77c87 100644
--- a/src/devices/cpu/hmcs400/hmcs400op.cpp
+++ b/src/devices/cpu/hmcs400/hmcs400op.cpp
@@ -17,3 +17,443 @@ void hmcs400_cpu_device::op_illegal()
 {
 	logerror("unknown opcode $%03X at $%04X\n", m_op, m_prev_pc);
 }
+
+
+// immediate instructions
+
+void hmcs400_cpu_device::op_lai()
+{
+	// LAI i: Load A from Immediate
+}
+
+void hmcs400_cpu_device::op_lbi()
+{
+	// LBI i: Load B from Immediate
+}
+
+void hmcs400_cpu_device::op_lmid()
+{
+	// LMID i,d: Load Memory from Immediate
+}
+
+void hmcs400_cpu_device::op_lmiiy()
+{
+	// LMIIY i: Load Memory from Immediate, Increment Y
+}
+
+
+// register-to-register instructions
+
+void hmcs400_cpu_device::op_lab()
+{
+	// LAB: Load A from B
+}
+
+void hmcs400_cpu_device::op_lba()
+{
+	// LBA: Load B from A
+}
+
+void hmcs400_cpu_device::op_law()
+{
+	// LAW: Load A from W
+}
+
+void hmcs400_cpu_device::op_lay()
+{
+	// LAY: Load A from Y
+}
+
+void hmcs400_cpu_device::op_laspx()
+{
+	// LASPX: Load A from SPX
+}
+
+void hmcs400_cpu_device::op_laspy()
+{
+	// LASPY: Load A from SPY
+}
+
+void hmcs400_cpu_device::op_lamr()
+{
+	// LAMR m: Load A from MR
+}
+
+void hmcs400_cpu_device::op_xmra()
+{
+	// XMRA m: Exchange MR and A
+}
+
+
+// RAM address instructions
+
+void hmcs400_cpu_device::op_lwi()
+{
+	// LWI i: Load W from Immediate
+}
+
+void hmcs400_cpu_device::op_lxi()
+{
+	// LXI i: Load X from Immediate
+}
+
+void hmcs400_cpu_device::op_lyi()
+{
+	// LYI i: Load Y from Immediate
+}
+
+void hmcs400_cpu_device::op_lwa()
+{
+	// LWA: Load W from A
+}
+
+void hmcs400_cpu_device::op_lxa()
+{
+	// LXA: Load X from A
+}
+
+void hmcs400_cpu_device::op_lya()
+{
+	// LYA: Load Y from A
+}
+
+void hmcs400_cpu_device::op_iy()
+{
+	// IY: Increment Y
+}
+
+void hmcs400_cpu_device::op_dy()
+{
+	// DY: Decrement Y
+}
+
+void hmcs400_cpu_device::op_ayy()
+{
+	// AYY: Add A to Y
+}
+
+void hmcs400_cpu_device::op_syy()
+{
+	// SYY: Subtract A from Y
+}
+
+void hmcs400_cpu_device::op_xsp()
+{
+	// XSP(XY): Exchange X and SPX, Y and SPY, or NOP if 0
+}
+
+
+// RAM register instructions
+
+void hmcs400_cpu_device::op_lam()
+{
+	// LAM(XY) / LAMD d: Load A from Memory
+}
+
+void hmcs400_cpu_device::op_lbm()
+{
+	// LBM(XY): Load B from Memory
+}
+
+void hmcs400_cpu_device::op_lma()
+{
+	// LMA(XY) / LMAD d: Load Memory from A
+}
+
+void hmcs400_cpu_device::op_lmaiy()
+{
+	// LMAIY(X): Load Memory from A, Increment Y
+}
+
+void hmcs400_cpu_device::op_lmady()
+{
+	// LMADY(X): Load Memory from A, Decrement Y
+}
+
+void hmcs400_cpu_device::op_xma()
+{
+	// XMA(XY) / XMAD d: Exchange Memory and A
+}
+
+void hmcs400_cpu_device::op_xmb()
+{
+	// XMB(XY): Exchange Memory and B
+}
+
+
+// arithmetic instructions
+
+void hmcs400_cpu_device::op_ai()
+{
+	// AI i: Add Immediate to A
+}
+
+void hmcs400_cpu_device::op_ib()
+{
+	// IB: Increment B
+}
+
+void hmcs400_cpu_device::op_db()
+{
+	// DB: Decrement B
+}
+
+void hmcs400_cpu_device::op_daa()
+{
+	// DAA: Decimal Adjust for Addition
+}
+
+void hmcs400_cpu_device::op_das()
+{
+	// DAS: Decimal Adjust for Subtraction
+}
+
+void hmcs400_cpu_device::op_nega()
+{
+	// NEGA: Negate A
+}
+
+void hmcs400_cpu_device::op_comb()
+{
+	// COMB: Complement B
+}
+
+void hmcs400_cpu_device::op_rotr()
+{
+	// ROTR: Rotate Right with Carry
+}
+
+void hmcs400_cpu_device::op_rotl()
+{
+	// ROTL: Rotate Left with Carry
+}
+
+void hmcs400_cpu_device::op_sec()
+{
+	// SEC: Set Carry
+}
+
+void hmcs400_cpu_device::op_rec()
+{
+	// REC: Reset Carry
+}
+
+void hmcs400_cpu_device::op_tc()
+{
+	// TC: Test Carry
+}
+
+void hmcs400_cpu_device::op_am()
+{
+	// AM / AMD d: Add A to Memory
+}
+
+void hmcs400_cpu_device::op_amc()
+{
+	// AMC / AMCD d: Add A to Memory with Carry
+}
+
+void hmcs400_cpu_device::op_smc()
+{
+	// SMC / SMCD d: Subtract A from Memory with Carry
+}
+
+void hmcs400_cpu_device::op_or()
+{
+	// OR: Or A with B
+}
+
+void hmcs400_cpu_device::op_anm()
+{
+	// ANM / ANMD d: And Memory with A
+}
+
+void hmcs400_cpu_device::op_orm()
+{
+	// ORM / ORMD d: Or Memory with A
+}
+
+void hmcs400_cpu_device::op_eorm()
+{
+	// EORM / EORMD d: Exclusive Or Memory with A
+}
+
+
+// RAM bit manipulation instructions
+
+void hmcs400_cpu_device::op_inem()
+{
+	// INEM i / INEMD i,d: Immediate Not Equal to Memory
+}
+
+void hmcs400_cpu_device::op_anem()
+{
+	// ANEM / ANEMD d: A Not Equal to Memory
+}
+
+void hmcs400_cpu_device::op_bnem()
+{
+	// BNEM: B Not Equal to Memory
+}
+
+void hmcs400_cpu_device::op_ynei()
+{
+	// YNEI i: Y Not Equal to Immediate
+}
+
+void hmcs400_cpu_device::op_ilem()
+{
+	// ILEM i / ILEMD i,d: Immediate Less or Equal to Memory
+}
+
+void hmcs400_cpu_device::op_alem()
+{
+	// ALEM / ALEMD d: A Less or Equal to Memory
+}
+
+void hmcs400_cpu_device::op_blem()
+{
+	// BLEM: B Less or Equal to Memory
+}
+
+void hmcs400_cpu_device::op_alei()
+{
+	// ALEI i: A Less or Equal to Immediate
+}
+
+
+// compare instructions
+
+void hmcs400_cpu_device::op_sem()
+{
+	// SEM n / SEMD n,d: Set Memory Bit
+}
+
+void hmcs400_cpu_device::op_rem()
+{
+	// REM n / REMD n,d: Reset Memory Bit
+}
+
+void hmcs400_cpu_device::op_tm()
+{
+	// TM n / TMD n,d: Test Memory Bit
+}
+
+
+// ROM address instructions
+
+void hmcs400_cpu_device::op_br()
+{
+	// BR b: Branch on Status 1
+}
+
+void hmcs400_cpu_device::op_brl()
+{
+	// BRL u: Long Branch on Status 1
+}
+
+void hmcs400_cpu_device::op_jmpl()
+{
+	// JMPL u: Long Jump Unconditionally
+}
+
+void hmcs400_cpu_device::op_cal()
+{
+	// CAL a: Subroutine Jump on Status 1
+}
+
+void hmcs400_cpu_device::op_call()
+{
+	// CALL u: Long Subroutine Jump on Status 1
+}
+
+void hmcs400_cpu_device::op_tbr()
+{
+	// TBR p: Table Branch
+}
+
+void hmcs400_cpu_device::op_rtn()
+{
+	// RTN: Return from Subroutine
+}
+
+void hmcs400_cpu_device::op_rtni()
+{
+	// RTNI: Return from Interrupt
+}
+
+
+// input/output instructions
+
+void hmcs400_cpu_device::op_sed()
+{
+	// SED: Set Discrete I/O Latch
+}
+
+void hmcs400_cpu_device::op_sedd()
+{
+	// SEDD m: Set Discrete I/O Latch Direct
+}
+
+void hmcs400_cpu_device::op_red()
+{
+	// RED: Reset Discrete I/O Latch
+}
+
+void hmcs400_cpu_device::op_redd()
+{
+	// REDD m: Reset Discrete I/O Latch Direct
+}
+
+void hmcs400_cpu_device::op_td()
+{
+	// TD: Test Discrete I/O Latch
+}
+
+void hmcs400_cpu_device::op_tdd()
+{
+	// TDD m: Test Discrete I/O Latch Direct
+}
+
+void hmcs400_cpu_device::op_lar()
+{
+	// LAR m: Load A from R Port Register
+}
+
+void hmcs400_cpu_device::op_lbr()
+{
+	// LBR m: Load B from R Port Register
+}
+
+void hmcs400_cpu_device::op_lra()
+{
+	// LRA m: Load R Port Register from A
+}
+
+void hmcs400_cpu_device::op_lrb()
+{
+	// LRB m: Load R Port Register from B
+}
+
+void hmcs400_cpu_device::op_p()
+{
+	// P p: Pattern Generation
+}
+
+
+// control instructions
+
+void hmcs400_cpu_device::op_sts()
+{
+	// STS: Start Serial
+}
+
+void hmcs400_cpu_device::op_sby()
+{
+	// SBY: Standby Mode
+}
+
+void hmcs400_cpu_device::op_stop()
+{
+	// STOP: Stop Mode
+}
diff --git a/src/devices/cpu/melps4/m58846.cpp b/src/devices/cpu/melps4/m58846.cpp
index 611f2d3af32..86b5a0c5c51 100644
--- a/src/devices/cpu/melps4/m58846.cpp
+++ b/src/devices/cpu/melps4/m58846.cpp
@@ -200,5 +200,5 @@ void m58846_device::execute_one()
 			}
 			break; // 0x1fc
 
-	} // big switch
+	} // 0x1f0
 }
diff --git a/src/devices/cpu/mn1400/mn1400.cpp b/src/devices/cpu/mn1400/mn1400.cpp
index 75737359030..b1a8d8449fb 100644
--- a/src/devices/cpu/mn1400/mn1400.cpp
+++ b/src/devices/cpu/mn1400/mn1400.cpp
@@ -136,5 +136,6 @@ void mn1400_cpu_device::execute_one()
 
 			}
 			break; // 0xfc
-	}
+
+	} // 0xf0
 }
diff --git a/src/devices/cpu/pps41/mm76.cpp b/src/devices/cpu/pps41/mm76.cpp
index bb7d9cd7a53..d1eb8bac0ca 100644
--- a/src/devices/cpu/pps41/mm76.cpp
+++ b/src/devices/cpu/pps41/mm76.cpp
@@ -176,6 +176,7 @@ void mm76_device::execute_one()
 
 				}
 				break; // 0xfc
-		}
+
+		} // 0xf0
 	}
 }
diff --git a/src/devices/cpu/pps41/mm78.cpp b/src/devices/cpu/pps41/mm78.cpp
index 8512c8f3f07..dd875551fc8 100644
--- a/src/devices/cpu/pps41/mm78.cpp
+++ b/src/devices/cpu/pps41/mm78.cpp
@@ -207,7 +207,8 @@ void mm78_device::execute_one()
 
 				}
 				break; // 0xfc
-		}
+
+		} // 0xf0
 	}
 
 	// TAB is delayed by 1 opcode (including a single TR)
diff --git a/src/devices/cpu/rw5000/b5000.cpp b/src/devices/cpu/rw5000/b5000.cpp
index 685fb1b5190..f173ebea6b5 100644
--- a/src/devices/cpu/rw5000/b5000.cpp
+++ b/src/devices/cpu/rw5000/b5000.cpp
@@ -145,7 +145,8 @@ void b5000_cpu_device::execute_one()
 
 			}
 			break; // 0xfc
-	}
+
+	} // 0xf0
 }
 
 bool b5000_cpu_device::op_is_tl(u8 op)
diff --git a/src/devices/cpu/sm510/sm500.cpp b/src/devices/cpu/sm510/sm500.cpp
index bb440388974..7050d99c30d 100644
--- a/src/devices/cpu/sm510/sm500.cpp
+++ b/src/devices/cpu/sm510/sm500.cpp
@@ -232,7 +232,7 @@ void sm500_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 }
 
 bool sm500_device::op_argument()
diff --git a/src/devices/cpu/sm510/sm510.cpp b/src/devices/cpu/sm510/sm510.cpp
index 624057181cb..f1f2490009f 100644
--- a/src/devices/cpu/sm510/sm510.cpp
+++ b/src/devices/cpu/sm510/sm510.cpp
@@ -152,7 +152,7 @@ void sm510_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 
 	// BM high bit is only valid for 1 step
 	m_bmask = (m_op == 0x02) ? 0x40 : 0;
diff --git a/src/devices/cpu/sm510/sm511.cpp b/src/devices/cpu/sm510/sm511.cpp
index dc3a3763d6c..a9a1ad61d97 100644
--- a/src/devices/cpu/sm510/sm511.cpp
+++ b/src/devices/cpu/sm510/sm511.cpp
@@ -247,7 +247,7 @@ void sm511_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 
 	// BM high bit is only valid for 1 step
 	m_bmask = (m_op == 0x02) ? 0x40 : 0;
diff --git a/src/devices/cpu/sm510/sm530.cpp b/src/devices/cpu/sm510/sm530.cpp
index 1110a22db33..e276f53d571 100644
--- a/src/devices/cpu/sm510/sm530.cpp
+++ b/src/devices/cpu/sm510/sm530.cpp
@@ -234,7 +234,7 @@ void sm530_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 
 	// SABM/SABL is only valid for 1 step
 	m_bmask = (m_op == 0x72) ? 0x40 : ((m_op == 0x73) ? 0x08 : 0);
diff --git a/src/devices/cpu/sm510/sm590.cpp b/src/devices/cpu/sm510/sm590.cpp
index f833b7e2683..b4cecee68cc 100644
--- a/src/devices/cpu/sm510/sm590.cpp
+++ b/src/devices/cpu/sm510/sm590.cpp
@@ -172,7 +172,7 @@ void sm590_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 }
 
 bool sm590_device::op_argument()
diff --git a/src/devices/cpu/sm510/sm5a.cpp b/src/devices/cpu/sm510/sm5a.cpp
index c2512aeaf71..7510cd17655 100644
--- a/src/devices/cpu/sm510/sm5a.cpp
+++ b/src/devices/cpu/sm510/sm5a.cpp
@@ -152,5 +152,5 @@ void sm5a_device::execute_one()
 			}
 			break; // 0xfc
 
-	} // big switch
+	} // 0xf0
 }
diff --git a/src/devices/cpu/ucom4/ucom4.cpp b/src/devices/cpu/ucom4/ucom4.cpp
index 0a0ea9b604a..af0f37f4c99 100644
--- a/src/devices/cpu/ucom4/ucom4.cpp
+++ b/src/devices/cpu/ucom4/ucom4.cpp
@@ -495,6 +495,6 @@ void ucom4_cpu_device::execute_run()
 				}
 				break; // 0xff
 
-		} // big switch
+		} // 0xf0
 	}
 }
-- 
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