From cc64f0ccc8f4f28ecbd353e2e92a7cdda57f4d1b Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 8 May 2023 18:12:39 +0200 Subject: - atari/mhavoc.cpp: consolidated driver in single file - galaxian/galaxian.cpp: fixed MT08630 [johnmcallister] - taito/taitosj.cpp: fixed MT08631 [johnmcallister] --- src/mame/atari/mhavoc.cpp | 821 ++++++++++++++++++++++++++++++++--------- src/mame/atari/mhavoc.h | 104 ------ src/mame/atari/mhavoc_m.cpp | 325 ---------------- src/mame/galaxian/galaxian.cpp | 6 +- src/mame/taito/taitosj.cpp | 6 +- 5 files changed, 656 insertions(+), 606 deletions(-) delete mode 100644 src/mame/atari/mhavoc.h delete mode 100644 src/mame/atari/mhavoc_m.cpp diff --git a/src/mame/atari/mhavoc.cpp b/src/mame/atari/mhavoc.cpp index b526fe63672..68c59ceeb40 100644 --- a/src/mame/atari/mhavoc.cpp +++ b/src/mame/atari/mhavoc.cpp @@ -1,5 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Mike Appolo + /*************************************************************************** Atari Major Havoc hardware @@ -50,7 +51,7 @@ 0200-07FF | D D D D D D D D | R/W | Paged Program RAM (3K) 0800-09FF | D D D D D D D D | R/W | Program RAM (1/2K) | | | - 1000 | D D D D D D D D | R | Gamma Commuication Read Port + 1000 | D D D D D D D D | R | Gamma Communication Read Port | | | 1200 | D | R | Right Coin (Player 1=0) 1200 | D | R | Left Coin (Player 1=0) @@ -60,7 +61,7 @@ 1200 | D | R | Cabinet Switch (Player 1=1) 1200 | D | R | Aux. Coin Switch (Player 1=1) 1200 | D | R | Diagnostic Step - 1200 | D | R | Gammma Rcvd Flag + 1200 | D | R | Gamma Rcvd Flag 1200 | D | R | Gamma Xmtd Flag 1200 | D | R | 2.4 KHz 1200 | D | R | Vector Generator Halt Flag @@ -190,18 +191,479 @@ ***************************************************************************/ #include "emu.h" -#include "mhavoc.h" #include "cpu/m6502/m6502.h" -#include "video/avgdvg.h" -#include "video/vector.h" #include "machine/eeprompar.h" #include "machine/rescap.h" +#include "machine/timer.h" #include "machine/watchdog.h" +#include "sound/pokey.h" +#include "sound/tms5220.h" +#include "video/avgdvg.h" +#include "video/vector.h" + #include "screen.h" #include "speaker.h" +// configurable logging +#define LOG_COMMS (1U << 1) +#define LOG_A1OUT (1U << 2) + +//#define VERBOSE (LOG_GENERAL | LOG_COMMS | LOG_A1OUT) + +#include "logmacro.h" + +#define LOGCOMMS(...) LOGMASKED(LOG_COMMS, __VA_ARGS__) +#define LOGA1OUT(...) LOGMASKED(LOG_A1OUT, __VA_ARGS__) + + +namespace { + +class alphaone_state : public driver_device +{ +public: + alphaone_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_zram(*this, "zram%u", 0U), + m_rambank(*this, "rambank"), + m_rombank(*this, "rombank"), + m_alpha(*this, "alpha"), + m_pokey(*this, "pokey%u", 1U), + m_lamps(*this, "lamp%u", 0U) + { } + + void alphaone(machine_config &config); + + DECLARE_READ_LINE_MEMBER(clock_r); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + + required_shared_ptr_array m_zram; + required_memory_bank m_rambank; + required_memory_bank m_rombank; + required_device m_alpha; + optional_device_array m_pokey; + output_finder<2> m_lamps; + + void alpha_irq_ack_w(uint8_t data); + void ram_banksel_w(uint8_t data); + void rom_banksel_w(uint8_t data); + + TIMER_DEVICE_CALLBACK_MEMBER(cpu_irq_clock); + +private: + uint8_t m_alpha_irq_clock = 0; + uint8_t m_alpha_irq_clock_enable = 0; + + uint8_t dual_pokey_r(offs_t offset); + void dual_pokey_w(offs_t offset, uint8_t data); + void out_0_w(uint8_t data); + + void alpha_map(address_map &map); +}; + +class mhavoc_state : public alphaone_state +{ +public: + mhavoc_state(const machine_config &mconfig, device_type type, const char *tag) : + alphaone_state(mconfig, type, tag), + m_gamma(*this, "gamma"), + m_coin(*this, "COIN"), + m_service(*this, "SERVICE") + { } + + void mhavoc(machine_config &config); + + DECLARE_CUSTOM_INPUT_MEMBER(coin_service_r); + DECLARE_READ_LINE_MEMBER(gamma_rcvd_r); + DECLARE_READ_LINE_MEMBER(gamma_xmtd_r); + DECLARE_READ_LINE_MEMBER(alpha_rcvd_r); + DECLARE_READ_LINE_MEMBER(alpha_xmtd_r); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + + required_device m_gamma; + + void gamma_map(address_map &map); + +private: + required_ioport m_coin; + required_ioport m_service; + + uint8_t m_alpha_data = 0; + uint8_t m_alpha_rcvd = 0; + uint8_t m_alpha_xmtd = 0; + uint8_t m_gamma_data = 0; + uint8_t m_gamma_rcvd = 0; + uint8_t m_gamma_xmtd = 0; + uint8_t m_player_1 = 0; + uint8_t m_gamma_irq_clock = 0; + emu_timer *m_gamma_sync_timer = nullptr; + + void gamma_irq_ack_w(uint8_t data); + void gamma_w(uint8_t data); + uint8_t alpha_r(); + void alpha_w(uint8_t data); + uint8_t gamma_r(); + void out_0_w(uint8_t data); + void out_1_w(uint8_t data); + uint8_t quad_pokeyn_r(offs_t offset); + void quad_pokeyn_w(offs_t offset, uint8_t data); + + TIMER_CALLBACK_MEMBER(delayed_gamma_w); + TIMER_DEVICE_CALLBACK_MEMBER(cpu_irq_clock); + void alpha_map(address_map &map); +}; + +class mhavocrv_state : public mhavoc_state +{ +public: + mhavocrv_state(const machine_config &mconfig, device_type type, const char *tag) : + mhavoc_state(mconfig, type, tag), + m_tms(*this, "tms") + { } + + void mhavocrv(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + required_device m_tms; + + uint8_t m_speech_write_buffer = 0; + + void speech_data_w(uint8_t data); + void speech_strobe_w(uint8_t data); + + void gamma_map(address_map &map); +}; + + +/************************************* + * + * Interrupt handling + * + *************************************/ + +TIMER_DEVICE_CALLBACK_MEMBER(alphaone_state::cpu_irq_clock) +{ + // clock the LS161 driving the alpha CPU IRQ + if (m_alpha_irq_clock_enable) + { + m_alpha_irq_clock++; + if ((m_alpha_irq_clock & 0x0c) == 0x0c) + { + m_alpha->set_input_line(0, ASSERT_LINE); + m_alpha_irq_clock_enable = 0; + } + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(mhavoc_state::cpu_irq_clock) +{ + alphaone_state::cpu_irq_clock(timer, param); + + // clock the LS161 driving the gamma CPU IRQ + m_gamma_irq_clock++; + m_gamma->set_input_line(0, (m_gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE); +} + + +void alphaone_state::alpha_irq_ack_w(uint8_t data) +{ + // clear the line and reset the clock + m_alpha->set_input_line(0, CLEAR_LINE); + m_alpha_irq_clock = 0; + m_alpha_irq_clock_enable = 1; +} + + +void mhavoc_state::gamma_irq_ack_w(uint8_t data) +{ + // clear the line and reset the clock + m_gamma->set_input_line(0, CLEAR_LINE); + m_gamma_irq_clock = 0; +} + + + +/************************************* + * + * Machine init + * + *************************************/ + +void alphaone_state::machine_start() +{ + m_lamps.resolve(); + + save_item(NAME(m_alpha_irq_clock)); + save_item(NAME(m_alpha_irq_clock_enable)); +} + +void mhavoc_state::machine_start() +{ + alphaone_state::machine_start(); + + save_item(NAME(m_alpha_data)); + save_item(NAME(m_alpha_rcvd)); + save_item(NAME(m_alpha_xmtd)); + save_item(NAME(m_gamma_data)); + save_item(NAME(m_gamma_rcvd)); + save_item(NAME(m_gamma_xmtd)); + save_item(NAME(m_player_1)); + save_item(NAME(m_gamma_irq_clock)); + + m_gamma_sync_timer = machine().scheduler().timer_alloc(timer_expired_delegate()); +} + +void mhavocrv_state::machine_start() +{ + mhavoc_state::machine_start(); + + save_item(NAME(m_speech_write_buffer)); +} + + +void alphaone_state::machine_reset() +{ + m_rambank->configure_entry(0, m_zram[0]); + m_rambank->configure_entry(1, m_zram[1]); + m_rombank->configure_entries(0, 4, memregion("alpha")->base() + 0x10000, 0x2000); + + // reset RAM/ROM banks to 0 + ram_banksel_w(0); + rom_banksel_w(0); + + // reset IRQ clock states + m_alpha_irq_clock = 0; + m_alpha_irq_clock_enable = 1; +} + + +void mhavoc_state::machine_reset() +{ + alphaone_state::machine_reset(); + + // reset alpha comm status + m_alpha_data = 0; + m_alpha_rcvd = 0; + m_alpha_xmtd = 0; + + // reset gamma comm status + m_gamma_data = 0; + m_gamma_rcvd = 0; + m_gamma_xmtd = 0; + + // reset player 1 flag + m_player_1 = 0; + + // reset IRQ clock states + m_gamma_irq_clock = 0; +} + + +/************************************* + * + * Alpha -> gamma communications + * + *************************************/ + +TIMER_CALLBACK_MEMBER(mhavoc_state::delayed_gamma_w) +{ + // mark the data received + m_gamma_rcvd = 0; + m_alpha_xmtd = 1; + m_alpha_data = param; + + // signal with an NMI pulse + m_gamma->pulse_input_line(INPUT_LINE_NMI, attotime::zero); + + // the sound CPU needs to reply in 250 microseconds (according to Neil Bradley) + machine().scheduler().timer_set(attotime::from_usec(250), timer_expired_delegate()); +} + + +void mhavoc_state::gamma_w(uint8_t data) +{ + LOGCOMMS(" writing to gamma processor: %02x (%d %d)\n", data, m_gamma_rcvd, m_alpha_xmtd); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(mhavoc_state::delayed_gamma_w), this), data); +} + + +uint8_t mhavoc_state::alpha_r() +{ + LOGCOMMS("\t\t\t\t\treading from alpha processor: %02x (%d %d)\n", m_alpha_data, m_gamma_rcvd, m_alpha_xmtd); + m_gamma_rcvd = 1; + m_alpha_xmtd = 0; + return m_alpha_data; +} + + + +/************************************* + * + * Gamma -> alpha communications + * + *************************************/ + +void mhavoc_state::alpha_w(uint8_t data) +{ + LOGCOMMS("\t\t\t\t\twriting to alpha processor: %02x %d %d\n", data, m_alpha_rcvd, m_gamma_xmtd); + m_alpha_rcvd = 0; + m_gamma_xmtd = 1; + m_gamma_data = data; +} + + +uint8_t mhavoc_state::gamma_r() +{ + LOGCOMMS(" reading from gamma processor: %02x (%d %d)\n", m_gamma_data, m_alpha_rcvd, m_gamma_xmtd); + m_alpha_rcvd = 1; + m_gamma_xmtd = 0; + return m_gamma_data; +} + + + +/************************************* + * + * RAM/ROM banking + * + *************************************/ + +void alphaone_state::ram_banksel_w(uint8_t data) +{ + m_rambank->set_entry(data & 1); +} + + +void alphaone_state::rom_banksel_w(uint8_t data) +{ + m_rombank->set_entry(data & 3); +} + + + +/************************************* + * + * Input ports + * + *************************************/ + +CUSTOM_INPUT_MEMBER(mhavoc_state::coin_service_r) +{ + return (m_player_1 ? m_service : m_coin)->read() & 0x03; +} + +READ_LINE_MEMBER(mhavoc_state::gamma_rcvd_r) +{ + // Gamma rcvd flag + return m_gamma_rcvd; +} + +READ_LINE_MEMBER(mhavoc_state::gamma_xmtd_r) +{ + // Gamma xmtd flag + return m_gamma_xmtd; +} + +READ_LINE_MEMBER(mhavoc_state::alpha_rcvd_r) +{ + // Alpha rcvd flag + return m_alpha_rcvd; +} + +READ_LINE_MEMBER(mhavoc_state::alpha_xmtd_r) +{ + // Alpha xmtd flag + return m_alpha_xmtd; +} + +/************************************* + * + * Output ports + * + *************************************/ + +void mhavoc_state::out_0_w(uint8_t data) +{ + // Bit 7 = Invert Y -- unemulated + // Bit 6 = Invert X -- unemulated + + // Bit 5 = Player 1 + m_player_1 = (data >> 5) & 1; + + // Bit 3 = Gamma reset + m_gamma->set_input_line(INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE); + if (!(data & 0x08)) + { + LOGCOMMS("\t\t\t\t*** resetting gamma processor. ***\n"); + m_alpha_rcvd = 0; + m_alpha_xmtd = 0; + m_gamma_rcvd = 0; + m_gamma_xmtd = 0; + } + + // Bit 2 = Beta reset + // this is the unpopulated processor in the corner of the PCB farthest from the quad pokey, not used on shipping boards + + // Bit 0 = Roller light (Blinks on fatal errors) + m_lamps[0] = BIT(data, 0); +} + + +void alphaone_state::out_0_w(uint8_t data) +{ + // Bit 5 = P2 lamp + m_lamps[0] = BIT(~data, 5); + + // Bit 4 = P1 lamp + m_lamps[1] = BIT(~data, 4); + + // Bit 1 = right coin counter + machine().bookkeeping().coin_counter_w(1, data & 0x02); + + // Bit 0 = left coin counter + machine().bookkeeping().coin_counter_w(0, data & 0x01); + + LOGA1OUT("alphaone_out_0_w(%02X)\n", data); +} + + +void mhavoc_state::out_1_w(uint8_t data) +{ + // Bit 1 = left coin counter + machine().bookkeeping().coin_counter_w(0, data & 0x02); + + // Bit 0 = right coin counter + machine().bookkeeping().coin_counter_w(1, data & 0x01); +} + +/************************************* + * + * Speech access + * + *************************************/ + +void mhavocrv_state::speech_data_w(uint8_t data) +{ + m_speech_write_buffer = data; +} + + +void mhavocrv_state::speech_strobe_w(uint8_t data) +{ + m_tms->data_w(m_speech_write_buffer); +} + + /* Quad pokey hookup (based on schematics): Address: 543210 |||||\- pokey A0 @@ -213,18 +675,18 @@ Address: 543210 */ uint8_t mhavoc_state::quad_pokeyn_r(offs_t offset) { - int pokey_num = (offset >> 3) & ~0x04; - int control = (offset & 0x20) >> 2; - int pokey_reg = (offset & 0x7) | control; + int const pokey_num = (offset >> 3) & ~0x04; + int const control = (offset & 0x20) >> 2; + int const pokey_reg = (offset & 0x7) | control; return m_pokey[pokey_num]->read(pokey_reg); } void mhavoc_state::quad_pokeyn_w(offs_t offset, uint8_t data) { - int pokey_num = (offset >> 3) & ~0x04; - int control = (offset & 0x20) >> 2; - int pokey_reg = (offset & 0x7) | control; + int const pokey_num = (offset >> 3) & ~0x04; + int const control = (offset & 0x20) >> 2; + int const pokey_reg = (offset & 0x7) | control; m_pokey[pokey_num]->write(pokey_reg, data); } @@ -243,21 +705,21 @@ Address: 43210 |\---- pokey chip number \----- pokey A3 */ -uint8_t mhavoc_state::dual_pokey_r(offs_t offset) +uint8_t alphaone_state::dual_pokey_r(offs_t offset) { - int pokey_num = (offset >> 3) & 0x01; - int control = (offset & 0x10) >> 1; - int pokey_reg = (offset & 0x7) | control; + int const pokey_num = (offset >> 3) & 0x01; + int const control = (offset & 0x10) >> 1; + int const pokey_reg = (offset & 0x7) | control; return m_pokey[pokey_num]->read(pokey_reg); } -void mhavoc_state::dual_pokey_w(offs_t offset, uint8_t data) +void alphaone_state::dual_pokey_w(offs_t offset, uint8_t data) { - int pokey_num = (offset >> 3) & 0x01; - int control = (offset & 0x10) >> 1; - int pokey_reg = (offset & 0x7) | control; + int const pokey_num = (offset >> 3) & 0x01; + int const control = (offset & 0x10) >> 1; + int const pokey_reg = (offset & 0x7) | control; m_pokey[pokey_num]->write(pokey_reg, data); } @@ -272,22 +734,22 @@ void mhavoc_state::dual_pokey_w(offs_t offset, uint8_t data) void mhavoc_state::alpha_map(address_map &map) { map(0x0000, 0x01ff).ram(); - map(0x0200, 0x07ff).bankrw("bank1").share("zram0"); + map(0x0200, 0x07ff).bankrw(m_rambank).share(m_zram[0]); map(0x0800, 0x09ff).ram(); - map(0x0a00, 0x0fff).bankrw("bank1").share("zram1"); - map(0x1000, 0x1000).r(FUNC(mhavoc_state::mhavoc_gamma_r)); // Gamma Read Port + map(0x0a00, 0x0fff).bankrw(m_rambank).share(m_zram[1]); + map(0x1000, 0x1000).r(FUNC(mhavoc_state::gamma_r)); // Gamma Read Port map(0x1200, 0x1200).portr("IN0").nopw(); // Alpha Input Port 0 map(0x1400, 0x141f).ram().share("avg:colorram"); // ColorRAM - map(0x1600, 0x1600).w(FUNC(mhavoc_state::mhavoc_out_0_w)); // Control Signals + map(0x1600, 0x1600).w(FUNC(mhavoc_state::out_0_w)); // Control Signals map(0x1640, 0x1640).w("avg", FUNC(avg_device::go_w)); // Vector Generator GO map(0x1680, 0x1680).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // Watchdog Clear map(0x16c0, 0x16c0).w("avg", FUNC(avg_device::reset_w)); // Vector Generator Reset - map(0x1700, 0x1700).w(FUNC(mhavoc_state::mhavoc_alpha_irq_ack_w)); // IRQ ack - map(0x1740, 0x1740).w(FUNC(mhavoc_state::mhavoc_rom_banksel_w)); // Program ROM Page Select - map(0x1780, 0x1780).w(FUNC(mhavoc_state::mhavoc_ram_banksel_w)); // Program RAM Page Select - map(0x17c0, 0x17c0).w(FUNC(mhavoc_state::mhavoc_gamma_w)); // Gamma Communication Write Port + map(0x1700, 0x1700).w(FUNC(mhavoc_state::alpha_irq_ack_w)); // IRQ ack + map(0x1740, 0x1740).w(FUNC(mhavoc_state::rom_banksel_w)); // Program ROM Page Select + map(0x1780, 0x1780).w(FUNC(mhavoc_state::ram_banksel_w)); // Program RAM Page Select + map(0x17c0, 0x17c0).w(FUNC(mhavoc_state::gamma_w)); // Gamma Communication Write Port map(0x1800, 0x1fff).ram(); // Shared Beta RAM - map(0x2000, 0x3fff).bankr("bank2"); // Paged Program ROM (32K) + map(0x2000, 0x3fff).bankr(m_rombank); // Paged Program ROM (32K) map(0x4000, 0x4fff).ram(); // Vector Generator RAM map(0x5000, 0x5fff).rom().region("vectorrom", 0x0000); // Vector ROM map(0x6000, 0x6fff).rom().region("vectorrom", 0x1000).mirror(0x1000); @@ -314,7 +776,7 @@ a15 a14 a13 a12 a11 a10 a09 a08 a07 a06 a05 a04 a03 a02 a01 a00 0 1 0 0 1 x x x x x x x x x x x W OUTPUTS: STROBES 0 1 0 1 0 x x x x x x x x x x x W OUTPUTS: PORTWR_gamma 0 1 0 1 1 ? ? ? ? ? ? ? ? ? ? ? W OUTPUTS: TISND, unused tms5220 write - ( supposedly, but the /WS hookup is not traced on pcb yet: + ( supposedly, but the /WS hookup is not traced on PCB yet: 0 1 0 1 1 x? x? 0 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: Gamma CPU write to octal latch?? 0 1 0 1 1 x? x? 1 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: octal latch output enable to tms5220 and pulse /WS on 5220?? Is there a way to activate /RS on the TMS5220 to read the status register? is the TMS5220 /INT line connected to the 6502 somehow? @@ -328,18 +790,22 @@ void mhavoc_state::gamma_map(address_map &map) map(0x0000, 0x07ff).ram().mirror(0x1800); // Program RAM (2K) map(0x2000, 0x203f).rw(FUNC(mhavoc_state::quad_pokeyn_r), FUNC(mhavoc_state::quad_pokeyn_w)).mirror(0x07c0); // Quad Pokey read/write map(0x2800, 0x2800).portr("IN1").mirror(0x07ff); // Gamma Input Port - map(0x3000, 0x3000).r(FUNC(mhavoc_state::mhavoc_alpha_r)).mirror(0x07ff); // Alpha Comm. Read Port + map(0x3000, 0x3000).r(FUNC(mhavoc_state::alpha_r)).mirror(0x07ff); // Alpha Comm. Read Port map(0x3800, 0x3803).portr("DIAL").mirror(0x07fc); // Roller Controller Input - map(0x4000, 0x4000).portr("DSW2").w(FUNC(mhavoc_state::mhavoc_gamma_irq_ack_w)).mirror(0x07ff); // DSW at 8S, IRQ Acknowledge - map(0x4800, 0x4800).w(FUNC(mhavoc_state::mhavoc_out_1_w)).mirror(0x07ff); // Coin Counters - map(0x5000, 0x5000).w(FUNC(mhavoc_state::mhavoc_alpha_w)).mirror(0x07ff); // Alpha Comm. Write Port - //map(0x5800, 0x5800).w(FUNC(mhavoc_state::mhavocrv_speech_data_w)).mirror(0x06ff); // TMS5220 data write - //map(0x5900, 0x5900).w(FUNC(mhavoc_state::mhavocrv_speech_strobe_w)).mirror(0x06ff); // TMS5220 /WS strobe write + map(0x4000, 0x4000).portr("DSW2").w(FUNC(mhavoc_state::gamma_irq_ack_w)).mirror(0x07ff); // DSW at 8S, IRQ Acknowledge + map(0x4800, 0x4800).w(FUNC(mhavoc_state::out_1_w)).mirror(0x07ff); // Coin Counters + map(0x5000, 0x5000).w(FUNC(mhavoc_state::alpha_w)).mirror(0x07ff); // Alpha Comm. Write Port map(0x6000, 0x61ff).rw("eeprom", FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)).mirror(0x1e00); // EEROM map(0x8000, 0xbfff).rom().region("gamma", 0).mirror(0x4000); // Program ROM (16K) } +void mhavocrv_state::gamma_map(address_map &map) // For Return to Vax, add support for the normally-unused speech module. +{ + mhavoc_state::gamma_map(map); + map(0x5800, 0x5800).w(FUNC(mhavocrv_state::speech_data_w)).mirror(0x06ff); // TMS5220 data write + map(0x5900, 0x5900).w(FUNC(mhavocrv_state::speech_strobe_w)).mirror(0x06ff); // TMS5220 /WS strobe write +} /************************************* @@ -348,26 +814,26 @@ void mhavoc_state::gamma_map(address_map &map) * *************************************/ -void mhavoc_state::alphaone_map(address_map &map) +void alphaone_state::alpha_map(address_map &map) { map(0x0000, 0x01ff).ram(); - map(0x0200, 0x07ff).bankrw("bank1").share("zram0"); + map(0x0200, 0x07ff).bankrw(m_rambank).share(m_zram[0]); map(0x0800, 0x09ff).ram(); - map(0x0a00, 0x0fff).bankrw("bank1").share("zram1"); - map(0x1020, 0x103f).rw(FUNC(mhavoc_state::dual_pokey_r), FUNC(mhavoc_state::dual_pokey_w)); + map(0x0a00, 0x0fff).bankrw(m_rambank).share(m_zram[1]); + map(0x1020, 0x103f).rw(FUNC(alphaone_state::dual_pokey_r), FUNC(alphaone_state::dual_pokey_w)); map(0x1040, 0x1040).portr("IN0").nopw(); // Alpha Input Port 0 map(0x1060, 0x1060).portr("IN1"); // Gamma Input Port map(0x1080, 0x1080).portr("DIAL"); // Roller Controller Input - map(0x10a0, 0x10a0).w(FUNC(mhavoc_state::alphaone_out_0_w)); // Control Signals + map(0x10a0, 0x10a0).w(FUNC(alphaone_state::out_0_w)); // Control Signals map(0x10a4, 0x10a4).w("avg", FUNC(avg_device::go_w)); // Vector Generator GO map(0x10a8, 0x10a8).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // Watchdog Clear map(0x10ac, 0x10ac).w("avg", FUNC(avg_device::reset_w)); // Vector Generator Reset - map(0x10b0, 0x10b0).w(FUNC(mhavoc_state::mhavoc_alpha_irq_ack_w)); // IRQ ack - map(0x10b4, 0x10b4).w(FUNC(mhavoc_state::mhavoc_rom_banksel_w)); - map(0x10b8, 0x10b8).w(FUNC(mhavoc_state::mhavoc_ram_banksel_w)); + map(0x10b0, 0x10b0).w(FUNC(alphaone_state::alpha_irq_ack_w)); // IRQ ack + map(0x10b4, 0x10b4).w(FUNC(alphaone_state::rom_banksel_w)); + map(0x10b8, 0x10b8).w(FUNC(alphaone_state::ram_banksel_w)); map(0x10e0, 0x10ff).nopr().writeonly().share("avg:colorram"); // ColorRAM map(0x1800, 0x18ff).rw("eeprom", FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)); // EEROM - map(0x2000, 0x3fff).bankr("bank2"); // Paged Program ROM (32K) + map(0x2000, 0x3fff).bankr(m_rombank); // Paged Program ROM (32K) map(0x4000, 0x4fff).ram(); // Vector Generator RAM map(0x5000, 0x5fff).rom().region("vectorrom", 0); // Vector ROM map(0x6000, 0x6fff).rom().region("vectorrom", 0).mirror(0x1000); @@ -382,9 +848,9 @@ void mhavoc_state::alphaone_map(address_map &map) * *************************************/ -READ_LINE_MEMBER(mhavoc_state::clock_r) +READ_LINE_MEMBER(alphaone_state::clock_r) { - /* 2.4kHz (divide 2.5MHz by 1024) */ + // 2.4kHz (divide 2.5MHz by 1024) return (m_alpha->total_cycles() & 0x400) ? 0 : 1; } @@ -394,13 +860,13 @@ READ_LINE_MEMBER(mhavoc_state::clock_r) According to the memory map at top it should be Diagnostic Step, but it's actually IN0 Bit 5 to have this function. I marked it as UNKNOWN for the moment */ static INPUT_PORTS_START( mhavoc ) - PORT_START("IN0") /* alpha */ - /* Bits 7-6 = selected based on player_1 */ - /* Bits 5-4 = common */ - /* Bit 3 = Gamma rcvd flag */ - /* Bit 2 = Gamma xmtd flag */ - /* Bit 1 = 2.4kHz (divide 2.5MHz by 1024) */ - /* Bit 0 = Vector generator halt flag */ + PORT_START("IN0") // alpha + // Bits 7-6 = selected based on player_1 + // Bits 5-4 = common + // Bit 3 = Gamma rcvd flag + // Bit 2 = Gamma xmtd flag + // Bit 1 = 2.4kHz (divide 2.5MHz by 1024) + // Bit 0 = Vector generator halt flag PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("avg", avg_device, done_r) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, clock_r) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, gamma_xmtd_r) @@ -409,10 +875,10 @@ static INPUT_PORTS_START( mhavoc ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Diag Step/Coin C") PORT_CODE(KEYCODE_F1) PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(mhavoc_state, coin_service_r) - PORT_START("IN1") /* gamma */ - /* Bits 7-2 = input switches */ - /* Bit 1 = Alpha rcvd flag */ - /* Bit 0 = Alpha xmtd flag */ + PORT_START("IN1") // gamma + // Bits 7-2 = input switches + // Bit 1 = Alpha rcvd flag + // Bit 0 = Alpha xmtd flag PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, alpha_xmtd_r) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, alpha_rcvd_r) PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -421,10 +887,10 @@ static INPUT_PORTS_START( mhavoc ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) - PORT_START("DIAL") /* gamma */ + PORT_START("DIAL") // gamma PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(40) PORT_REVERSE - PORT_START("DSW1") /* DIP Switch at position 13/14S */ + PORT_START("DSW1") // DIP Switch at position 13/14S PORT_DIPNAME( 0x01, 0x00, "Adaptive Difficulty" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x01, DEF_STR( Off )) PORT_DIPSETTING( 0x00, DEF_STR( On )) @@ -447,7 +913,7 @@ static INPUT_PORTS_START( mhavoc ) PORT_DIPSETTING( 0x80, "5 (4 in Free Play)") PORT_DIPSETTING( 0x40, "6 (5 in Free Play)") - PORT_START("DSW2") /* DIP Switch at position 8S */ + PORT_START("DSW2") // DIP Switch at position 8S PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:7,8") PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) @@ -468,11 +934,11 @@ static INPUT_PORTS_START( mhavoc ) PORT_DIPSETTING( 0x60, "1 each 5" ) PORT_DIPSETTING( 0xe0, DEF_STR( None ) ) - PORT_START("COIN") /* dummy for player_1 = 0 on alpha */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) /* Left Coin Switch */ - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) /* Right Coin */ + PORT_START("COIN") // dummy for player_1 = 0 on alpha + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // Left Coin Switch + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) // Right Coin - PORT_START("SERVICE") /* dummy for player_1 = 1 on alpha */ + PORT_START("SERVICE") // dummy for player_1 = 1 on alpha PORT_DIPNAME( 0x01, 0x01, "Credit to start" ) PORT_DIPSETTING( 0x01, "1" ) PORT_DIPSETTING( 0x00, "2" ) @@ -499,20 +965,20 @@ static INPUT_PORTS_START( mhavocp ) INPUT_PORTS_END static INPUT_PORTS_START( alphaone ) - PORT_START("IN0") /* alpha (player_1 = 0) */ + PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("avg", avg_device, done_r) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, clock_r) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(alphaone_state, clock_r) PORT_BIT( 0x7c, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) - PORT_START("IN1") /* gamma */ + PORT_START("IN1") PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_START("DIAL") /* gamma */ + PORT_START("DIAL") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(40) PORT_REVERSE INPUT_PORTS_END @@ -523,47 +989,79 @@ INPUT_PORTS_END * *************************************/ -void mhavoc_state::mhavoc(machine_config &config) -{ - /* basic machine hardware */ - M6502(config, m_alpha, MHAVOC_CLOCK_2_5M); /* 2.5 MHz */ - m_alpha->set_addrmap(AS_PROGRAM, &mhavoc_state::alpha_map); +static constexpr int MHAVOC_CLOCK = 10'000'000; +static constexpr int MHAVOC_CLOCK_5M = MHAVOC_CLOCK / 2; +static constexpr int MHAVOC_CLOCK_2_5M = MHAVOC_CLOCK / 4; +static constexpr int MHAVOC_CLOCK_1_25M = MHAVOC_CLOCK / 8; +static constexpr int MHAVOC_CLOCK_625K = MHAVOC_CLOCK / 16; - M6502(config, m_gamma, MHAVOC_CLOCK_1_25M); /* 1.25 MHz */ - m_gamma->set_addrmap(AS_PROGRAM, &mhavoc_state::gamma_map); +static constexpr int MHAVOC_CLOCK_156K = MHAVOC_CLOCK_625K / 4; +static constexpr int MHAVOC_CLOCK_5K = MHAVOC_CLOCK_625K / 16 / 8; +static constexpr int MHAVOC_CLOCK_2_4K = MHAVOC_CLOCK_625K / 16 / 16; + +void alphaone_state::alphaone(machine_config &config) +{ + // basic machine hardware + M6502(config, m_alpha, MHAVOC_CLOCK_2_5M); // 2.5 MHz + m_alpha->set_addrmap(AS_PROGRAM, &alphaone_state::alpha_map); EEPROM_2804(config, "eeprom"); - TIMER(config, "5k_timer").configure_periodic(FUNC(mhavoc_state::mhavoc_cpu_irq_clock), attotime::from_hz(MHAVOC_CLOCK_5K)); + TIMER(config, "5k_timer").configure_periodic(FUNC(alphaone_state::cpu_irq_clock), attotime::from_hz(MHAVOC_CLOCK_5K)); WATCHDOG_TIMER(config, "watchdog"); - /* video hardware */ + // video hardware VECTOR(config, "vector"); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_VECTOR)); screen.set_refresh_hz(50); screen.set_size(400, 300); - screen.set_visarea(0, 300, 0, 260); + screen.set_visarea(0, 580, 0, 500); screen.set_screen_update("vector", FUNC(vector_device::screen_update)); avg_device &avg(AVG_MHAVOC(config, "avg", 0)); avg.set_vector("vector"); avg.set_memory(m_alpha, AS_PROGRAM, 0x4000); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); + // sound hardware + POKEY(config, m_pokey[0], MHAVOC_CLOCK_1_25M); + m_pokey[0]->add_route(ALL_OUTPUTS, "mono", 0.50); + + POKEY(config, m_pokey[1], MHAVOC_CLOCK_1_25M); + m_pokey[1]->add_route(ALL_OUTPUTS, "mono", 0.50); +} + +void mhavoc_state::mhavoc(machine_config &config) +{ + alphaone_state::alphaone(config); + + m_alpha->set_addrmap(AS_PROGRAM, &mhavoc_state::alpha_map); + + M6502(config, m_gamma, MHAVOC_CLOCK_1_25M); // 1.25 MHz + m_gamma->set_addrmap(AS_PROGRAM, &mhavoc_state::gamma_map); + + subdevice("5k_timer")->set_callback(FUNC(mhavoc_state::cpu_irq_clock)); + + subdevice("screen")->set_visarea(0, 300, 0, 260); + /* FIXME: Outputs 1,2,3 are tied together * This signal and Output 4 are processed separately. * Later they are mixed together again. * ==> DISCRETE emulation, below is just an approximation. */ + // TODO: using config.replace() here causes very minor different timings in regression tests, as if not everything were wiped out and replace + config.device_remove("pokey1"); POKEY(config, m_pokey[0], MHAVOC_CLOCK_1_25M); m_pokey[0]->allpot_r().set_ioport("DSW1"); m_pokey[0]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0); m_pokey[0]->add_route(ALL_OUTPUTS, "mono", 0.25); + // TODO: same as pokey1 + config.device_remove("pokey2"); POKEY(config, m_pokey[1], MHAVOC_CLOCK_1_25M); m_pokey[1]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0); m_pokey[1]->add_route(ALL_OUTPUTS, "mono", 0.25); @@ -577,37 +1075,17 @@ void mhavoc_state::mhavoc(machine_config &config) m_pokey[3]->add_route(ALL_OUTPUTS, "mono", 0.25); } -void mhavoc_state::mhavocrv(machine_config &config) +void mhavocrv_state::mhavocrv(machine_config &config) { - mhavoc(config); + mhavoc_state::mhavoc(config); - TMS5220(config, m_tms, MHAVOC_CLOCK/2/9); - m_tms->add_route(ALL_OUTPUTS, "mono", 1.0); -} - -void mhavoc_state::alphaone(machine_config &config) -{ - mhavoc(config); - - /* basic machine hardware */ - m_alpha->set_addrmap(AS_PROGRAM, &mhavoc_state::alphaone_map); - config.device_remove("gamma"); - - subdevice("screen")->set_visarea(0, 580, 0, 500); - - /* sound hardware */ - POKEY(config.replace(), m_pokey[0], MHAVOC_CLOCK_1_25M); - m_pokey[0]->add_route(ALL_OUTPUTS, "mono", 0.50); + m_gamma->set_addrmap(AS_PROGRAM, &mhavocrv_state::gamma_map); - POKEY(config.replace(), m_pokey[1], MHAVOC_CLOCK_1_25M); - m_pokey[1]->add_route(ALL_OUTPUTS, "mono", 0.50); - - config.device_remove("pokey3"); - config.device_remove("pokey4"); + TMS5220(config, m_tms, MHAVOC_CLOCK / 2 / 9); + m_tms->add_route(ALL_OUTPUTS, "mono", 1.0); } - /************************************* * * ROM definitions @@ -625,137 +1103,137 @@ void mhavoc_state::alphaone(machine_config &config) */ ROM_START( mhavoc ) - /* Alpha Processor ROMs */ - /* Vector Generator ROM */ + // Alpha Processor ROMs + // Vector Generator ROM ROM_REGION( 0x2000, "vectorrom", 0 ) ROM_LOAD( "136025.210", 0x0000, 0x2000, CRC(c67284ca) SHA1(d9adad80c266d36429444f483cac4ebcf1fec7b8) ) - /* Program ROM */ - ROM_REGION( 0x18000, "alpha", 0 ) /* 152KB for ROMs */ + // Program ROM + ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "136025.216", 0x08000, 0x4000, CRC(522a9cc0) SHA1(bbd75e01c45220e1c87bd1e013cf2c2fb9f376b2) ) ROM_LOAD( "136025.217", 0x0c000, 0x4000, CRC(ea3d6877) SHA1(27823c1b546c073b37ff11a8cb25312ea71673c2) ) - /* Paged Program ROM */ - ROM_LOAD( "136025.215", 0x10000, 0x4000, CRC(a4d380ca) SHA1(c3cdc76054be2f904b1fb6f28c3c027eba5c3a70) ) /* page 0+1 */ - ROM_LOAD( "136025.318", 0x14000, 0x4000, CRC(ba935067) SHA1(05ad81e7a1982b9d8fddb48502546f48b5dc21b7) ) /* page 2+3 */ + // Paged Program ROM + ROM_LOAD( "136025.215", 0x10000, 0x4000, CRC(a4d380ca) SHA1(c3cdc76054be2f904b1fb6f28c3c027eba5c3a70) ) // page 0+1 + ROM_LOAD( "136025.318", 0x14000, 0x4000, CRC(ba935067) SHA1(05ad81e7a1982b9d8fddb48502546f48b5dc21b7) ) // page 2+3 - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) - ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */ - ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) /* page 2+3 */ + ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) // page 0+1 + ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) // page 2+3 - /* Gamma Processor ROM */ + // Gamma Processor ROM ROM_REGION( 0x4000, "gamma", 0 ) - ROM_LOAD( "136025.108", 0x0000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */ + ROM_LOAD( "136025.108", 0x0000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) // mirrored to c000-ffff for reset+interrupt vectors - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c",0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END ROM_START( mhavoc2 ) - /* Alpha Processor ROMs */ - /* Vector Generator ROM */ + // Alpha Processor ROMs + // Vector Generator ROM ROM_REGION( 0x2000, "vectorrom", 0 ) ROM_LOAD( "136025.110", 0x0000, 0x2000, CRC(16eef583) SHA1(277252bd716dd96d5b98ec5e33a3a6a3bc1a9abf) ) - /* Program ROM */ + // Program ROM ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "136025.103", 0x08000, 0x4000, CRC(bf192284) SHA1(4c2dc3ba75122e521ebf2c42f89b31737613c2df) ) ROM_LOAD( "136025.104", 0x0c000, 0x4000, CRC(833c5d4e) SHA1(932861b2a329172247c1a5d0a6498a00a1fce814) ) - /* Paged Program ROM - switched to 2000-3fff */ - ROM_LOAD( "136025.101", 0x10000, 0x4000, CRC(2b3b591f) SHA1(39fd6fdd14367906bc0102bde15d509d3289206b) ) /* page 0+1 */ - ROM_LOAD( "136025.109", 0x14000, 0x4000, CRC(4d766827) SHA1(7697bf6f92bff0e62850ed75ff66008a08583ef7) ) /* page 2+3 */ + // Paged Program ROM - switched to 2000-3fff + ROM_LOAD( "136025.101", 0x10000, 0x4000, CRC(2b3b591f) SHA1(39fd6fdd14367906bc0102bde15d509d3289206b) ) // page 0+1 + ROM_LOAD( "136025.109", 0x14000, 0x4000, CRC(4d766827) SHA1(7697bf6f92bff0e62850ed75ff66008a08583ef7) ) // page 2+3 - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) - ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */ - ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) /* page 2+3 */ + ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) // page 0+1 + ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) // page 2+3 - /* the last 0x1000 is used for the 2 RAM pages */ + // the last 0x1000 is used for the 2 RAM pages - /* Gamma Processor ROM */ + // Gamma Processor ROM ROM_REGION( 0x4000, "gamma", 0 ) - ROM_LOAD( "136025.108", 0x0000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */ + ROM_LOAD( "136025.108", 0x0000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) // mirrored to c000-ffff for reset+interrupt vectors - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c",0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END ROM_START( mhavocrv ) - /* Alpha Processor ROMs */ - /* Vector Generator ROM */ + // Alpha Processor ROMs + // Vector Generator ROM ROM_REGION( 0x2000, "vectorrom", 0 ) ROM_LOAD( "136025.210", 0x0000, 0x2000, CRC(c67284ca) SHA1(d9adad80c266d36429444f483cac4ebcf1fec7b8) ) - /* Program ROM */ - ROM_REGION( 0x18000, "alpha", 0 ) /* 152KB for ROMs */ + // Program ROM + ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "136025.916", 0x08000, 0x4000, CRC(1255bd7f) SHA1(e277fe7b23ce8cf1294b6bfa5548b24a6c8952ce) ) ROM_LOAD( "136025.917", 0x0c000, 0x4000, CRC(21889079) SHA1(d1ad6d9fa1432912e376bca50ceeefac2bfd6ac3) ) - /* Paged Program ROM */ - ROM_LOAD( "136025.915", 0x10000, 0x4000, CRC(4c7235dc) SHA1(67cafc2ce438ec389550efb46c554a7fe7b45efc) ) /* page 0+1 */ - ROM_LOAD( "136025.918", 0x14000, 0x4000, CRC(84735445) SHA1(21aacd862ce8911d257c6f48ead119ee5bb0b60d) ) /* page 2+3 */ + // Paged Program ROM + ROM_LOAD( "136025.915", 0x10000, 0x4000, CRC(4c7235dc) SHA1(67cafc2ce438ec389550efb46c554a7fe7b45efc) ) // page 0+1 + ROM_LOAD( "136025.918", 0x14000, 0x4000, CRC(84735445) SHA1(21aacd862ce8911d257c6f48ead119ee5bb0b60d) ) // page 2+3 - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) - ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */ - ROM_LOAD( "136025.907", 0x4000, 0x4000, CRC(4deea2c9) SHA1(c4107581748a3f2d2084de2a4f120abd67a52189) ) /* page 2+3 */ + ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) // page 0+1 + ROM_LOAD( "136025.907", 0x4000, 0x4000, CRC(4deea2c9) SHA1(c4107581748a3f2d2084de2a4f120abd67a52189) ) // page 2+3 - /* the last 0x1000 is used for the 2 RAM pages */ + // the last 0x1000 is used for the 2 RAM pages - /* Gamma Processor ROM */ + // Gamma Processor ROM ROM_REGION( 0x4000, "gamma", 0 ) - ROM_LOAD( "136025.908", 0x0000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) /* mirrored to c000-ffff for reset+interrupt vectors */ + ROM_LOAD( "136025.908", 0x0000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) // mirrored to c000-ffff for reset+interrupt vectors - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c",0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END ROM_START( mhavocp ) - /* Alpha Processor ROMs */ - /* Vector Generator ROM */ + // Alpha Processor ROMs + // Vector Generator ROM ROM_REGION( 0x2000, "vectorrom", 0 ) ROM_LOAD( "136025.010", 0x0000, 0x2000, CRC(3050c0e6) SHA1(f19a9538996d949cdca7e6abd4f04e8ff6e0e2c1) ) - /* Program ROM */ + // Program ROM ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "136025.016", 0x08000, 0x4000, CRC(94caf6c0) SHA1(8734411280bd0484c99a59231b97ad64d6e787e8) ) ROM_LOAD( "136025.017", 0x0c000, 0x4000, CRC(05cba70a) SHA1(c069e6dec3e5bc278103156d0908ab93f3784be1) ) - /* Paged Program ROM - switched to 2000-3fff */ + // Paged Program ROM - switched to 2000-3fff ROM_LOAD( "136025.015", 0x10000, 0x4000, CRC(c567c11b) SHA1(23b89389f59bb6a040342adfe583818a91ce5bff) ) ROM_LOAD( "136025.018", 0x14000, 0x4000, CRC(a8c35ccd) SHA1(c243a5407557390a64c6560d857f5031f839973f) ) - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) ROM_LOAD( "136025.006", 0x0000, 0x4000, CRC(e272ed41) SHA1(0de395d1c4300a64da7f45746d7b550779e36a21) ) ROM_LOAD( "136025.007", 0x4000, 0x4000, CRC(e152c9d8) SHA1(79d0938fa9ad262c7f28c5a8ad21004a4dec9ed8) ) - /* the last 0x1000 is used for the 2 RAM pages */ + // the last 0x1000 is used for the 2 RAM pages - /* Gamma Processor ROM */ + // Gamma Processor ROM ROM_REGION( 0x4000, "gamma", 0 ) - ROM_LOAD( "136025.008", 0x0000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) /* mirrored to c000-ffff for reset+interrupt vectors */ + ROM_LOAD( "136025.008", 0x0000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) // mirrored to c000-ffff for reset+interrupt vectors - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END ROM_START( alphaone ) - /* Vector Generator ROM */ + // Vector Generator ROM ROM_REGION( 0x1000, "vectorrom", 0 ) ROM_LOAD( "vec5000.tw", 0x0000, 0x1000, CRC(2a4c149f) SHA1(b60a0b29958bee9b5f7c1d88163680b626bb76dd) ) - /* Program ROM */ + // Program ROM ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "8000.tw", 0x08000, 0x2000, CRC(962d4da2) SHA1(2299f850aed7470a80a21526143f7b412a879cb1) ) ROM_LOAD( "a000.tw", 0x0a000, 0x2000, CRC(f739a791) SHA1(1e70e446fc7dd27683ad71e768ebb2bc1d4fedd3) ) @@ -763,28 +1241,28 @@ ROM_START( alphaone ) ROM_LOAD( "e000.tw", 0x0e000, 0x1000, CRC(6b1d7d2b) SHA1(36ac8b53e2fe01ed281c94afec02484ef676ddad) ) ROM_RELOAD( 0x0f000, 0x1000 ) - /* Paged Program ROM - switched to 2000-3fff */ + // Paged Program ROM - switched to 2000-3fff ROM_LOAD( "page01.tw", 0x10000, 0x4000, CRC(cbf3b05a) SHA1(1dfaf9300a252c9c921f06167160a59cdf329726) ) - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) ROM_LOAD( "vec_pg01.tw", 0x0000, 0x4000, CRC(e392a94d) SHA1(b5843da97d7aa5767c87c29660115efc5ad9ad54) ) ROM_LOAD( "vec_pg23.tw", 0x4000, 0x4000, CRC(1ff74292) SHA1(90e61c48544c62d905e207bba5c67ae7694e86a5) ) - /* the last 0x1000 is used for the 2 RAM pages */ + // the last 0x1000 is used for the 2 RAM pages - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END ROM_START( alphaonea ) - /* Vector Generator ROM */ + // Vector Generator ROM ROM_REGION( 0x1000, "vectorrom", 0 ) ROM_LOAD( "vec5000.tw", 0x0000, 0x1000, CRC(2a4c149f) SHA1(b60a0b29958bee9b5f7c1d88163680b626bb76dd) ) - /* Program ROM */ + // Program ROM ROM_REGION( 0x18000, "alpha", 0 ) ROM_LOAD( "8000.tw", 0x08000, 0x2000, CRC(962d4da2) SHA1(2299f850aed7470a80a21526143f7b412a879cb1) ) ROM_LOAD( "a000.tw", 0x0a000, 0x2000, CRC(f739a791) SHA1(1e70e446fc7dd27683ad71e768ebb2bc1d4fedd3) ) @@ -792,21 +1270,22 @@ ROM_START( alphaonea ) ROM_LOAD( "e000.tw", 0x0e000, 0x1000, CRC(6b1d7d2b) SHA1(36ac8b53e2fe01ed281c94afec02484ef676ddad) ) ROM_RELOAD( 0x0f000, 0x1000 ) - /* Paged Program ROM - switched to 2000-3fff */ + // Paged Program ROM - switched to 2000-3fff ROM_LOAD( "page01.tw", 0x10000, 0x4000, CRC(cbf3b05a) SHA1(1dfaf9300a252c9c921f06167160a59cdf329726) ) - /* Paged Vector Generator ROM */ + // Paged Vector Generator ROM ROM_REGION( 0x8000, "avg", 0 ) ROM_LOAD( "vec_pg01.tw", 0x0000, 0x4000, CRC(e392a94d) SHA1(b5843da97d7aa5767c87c29660115efc5ad9ad54) ) ROM_LOAD( "vec_pg23.tw", 0x4000, 0x4000, CRC(1ff74292) SHA1(90e61c48544c62d905e207bba5c67ae7694e86a5) ) - /* the last 0x1000 is used for the 2 RAM pages */ + // the last 0x1000 is used for the 2 RAM pages - /* AVG PROM */ + // AVG PROM ROM_REGION( 0x100, "avg:prom", 0 ) ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) ) ROM_END +} // anonymous namespace /************************************* @@ -815,9 +1294,9 @@ ROM_END * *************************************/ -GAME( 1983, mhavoc, 0, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 3)", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, mhavoc2, mhavoc, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 2006, mhavocrv, mhavoc, mhavocrv, mhavocrv, mhavoc_state, init_mhavocrv, ROT0, "hack (JMA)", "Major Havoc - Return to Vax", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, mhavocp, mhavoc, mhavoc, mhavocp, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (prototype)", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, alphaone, mhavoc, alphaone, alphaone, mhavoc_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 3 lives)", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, alphaonea,mhavoc, alphaone, alphaone, mhavoc_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 5 lives)", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, mhavoc, 0, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, mhavoc2, mhavoc, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 2006, mhavocrv, mhavoc, mhavocrv, mhavocrv, mhavocrv_state, empty_init, ROT0, "hack (JMA)", "Major Havoc - Return to Vax", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, mhavocp, mhavoc, mhavoc, mhavocp, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (prototype)", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, alphaone, mhavoc, alphaone, alphaone, alphaone_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 3 lives)", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, alphaonea,mhavoc, alphaone, alphaone, alphaone_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 5 lives)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/atari/mhavoc.h b/src/mame/atari/mhavoc.h deleted file mode 100644 index 2b32b03dded..00000000000 --- a/src/mame/atari/mhavoc.h +++ /dev/null @@ -1,104 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Mike Appolo -/************************************************************************* - - Atari Major Havoc hardware - -*************************************************************************/ - -#include "machine/timer.h" -#include "sound/pokey.h" -#include "sound/tms5220.h" - -#define MHAVOC_CLOCK 10000000 -#define MHAVOC_CLOCK_5M (MHAVOC_CLOCK/2) -#define MHAVOC_CLOCK_2_5M (MHAVOC_CLOCK/4) -#define MHAVOC_CLOCK_1_25M (MHAVOC_CLOCK/8) -#define MHAVOC_CLOCK_625K (MHAVOC_CLOCK/16) - -#define MHAVOC_CLOCK_156K (MHAVOC_CLOCK_625K/4) -#define MHAVOC_CLOCK_5K (MHAVOC_CLOCK_625K/16/8) -#define MHAVOC_CLOCK_2_4K (MHAVOC_CLOCK_625K/16/16) - - -class mhavoc_state : public driver_device -{ -public: - mhavoc_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_zram0(*this, "zram0"), - m_zram1(*this, "zram1"), - m_alpha(*this, "alpha"), - m_gamma(*this, "gamma"), - m_pokey(*this, "pokey%u", 1U), - m_tms(*this, "tms"), - m_lamps(*this, "lamp%u", 0U), - m_coin(*this, "COIN"), - m_service(*this, "SERVICE") - { } - - void alphaone(machine_config &config); - void mhavoc(machine_config &config); - void mhavocrv(machine_config &config); - - void init_mhavocrv(); - - DECLARE_CUSTOM_INPUT_MEMBER(coin_service_r); - DECLARE_READ_LINE_MEMBER(gamma_rcvd_r); - DECLARE_READ_LINE_MEMBER(gamma_xmtd_r); - DECLARE_READ_LINE_MEMBER(alpha_rcvd_r); - DECLARE_READ_LINE_MEMBER(alpha_xmtd_r); - DECLARE_READ_LINE_MEMBER(clock_r); - -private: - uint8_t dual_pokey_r(offs_t offset); - void dual_pokey_w(offs_t offset, uint8_t data); - void mhavoc_alpha_irq_ack_w(uint8_t data); - void mhavoc_gamma_irq_ack_w(uint8_t data); - void mhavoc_gamma_w(uint8_t data); - uint8_t mhavoc_alpha_r(); - void mhavoc_alpha_w(uint8_t data); - uint8_t mhavoc_gamma_r(); - void mhavoc_ram_banksel_w(uint8_t data); - void mhavoc_rom_banksel_w(uint8_t data); - void mhavoc_out_0_w(uint8_t data); - void alphaone_out_0_w(uint8_t data); - void mhavoc_out_1_w(uint8_t data); - void mhavocrv_speech_data_w(uint8_t data); - void mhavocrv_speech_strobe_w(uint8_t data); - uint8_t quad_pokeyn_r(offs_t offset); - void quad_pokeyn_w(offs_t offset, uint8_t data); - - TIMER_CALLBACK_MEMBER(delayed_gamma_w); - TIMER_DEVICE_CALLBACK_MEMBER(mhavoc_cpu_irq_clock); - void alpha_map(address_map &map); - void alphaone_map(address_map &map); - void gamma_map(address_map &map); - - virtual void machine_start() override; - virtual void machine_reset() override; - - required_shared_ptr m_zram0; - required_shared_ptr m_zram1; - required_device m_alpha; - optional_device m_gamma; - optional_device_array m_pokey; - optional_device m_tms; - output_finder<2> m_lamps; - optional_ioport m_coin; - optional_ioport m_service; - - uint8_t m_alpha_data = 0; - uint8_t m_alpha_rcvd = 0; - uint8_t m_alpha_xmtd = 0; - uint8_t m_gamma_data = 0; - uint8_t m_gamma_rcvd = 0; - uint8_t m_gamma_xmtd = 0; - uint8_t m_player_1 = 0; - uint8_t m_alpha_irq_clock = 0; - uint8_t m_alpha_irq_clock_enable = 0; - uint8_t m_gamma_irq_clock = 0; - uint8_t m_has_gamma_cpu = 0; - uint8_t m_speech_write_buffer = 0; - emu_timer *m_gamma_sync_timer = nullptr; -}; diff --git a/src/mame/atari/mhavoc_m.cpp b/src/mame/atari/mhavoc_m.cpp deleted file mode 100644 index ec2e11414db..00000000000 --- a/src/mame/atari/mhavoc_m.cpp +++ /dev/null @@ -1,325 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Mike Appolo -/*************************************************************************** - - Atari Major Havoc hardware - -***************************************************************************/ - -#include "emu.h" -#include "cpu/m6502/m6502.h" -#include "mhavoc.h" - - -/************************************* - * - * Interrupt handling - * - *************************************/ - -TIMER_DEVICE_CALLBACK_MEMBER(mhavoc_state::mhavoc_cpu_irq_clock) -{ - /* clock the LS161 driving the alpha CPU IRQ */ - if (m_alpha_irq_clock_enable) - { - m_alpha_irq_clock++; - if ((m_alpha_irq_clock & 0x0c) == 0x0c) - { - m_alpha->set_input_line(0, ASSERT_LINE); - m_alpha_irq_clock_enable = 0; - } - } - - /* clock the LS161 driving the gamma CPU IRQ */ - if (m_has_gamma_cpu) - { - m_gamma_irq_clock++; - m_gamma->set_input_line(0, (m_gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE); - } -} - - -void mhavoc_state::mhavoc_alpha_irq_ack_w(uint8_t data) -{ - /* clear the line and reset the clock */ - m_alpha->set_input_line(0, CLEAR_LINE); - m_alpha_irq_clock = 0; - m_alpha_irq_clock_enable = 1; -} - - -void mhavoc_state::mhavoc_gamma_irq_ack_w(uint8_t data) -{ - /* clear the line and reset the clock */ - m_gamma->set_input_line(0, CLEAR_LINE); - m_gamma_irq_clock = 0; -} - - - -/************************************* - * - * Machine init - * - *************************************/ - -void mhavoc_state::machine_start() -{ - m_lamps.resolve(); - - save_item(NAME(m_alpha_data)); - save_item(NAME(m_alpha_rcvd)); - save_item(NAME(m_alpha_xmtd)); - save_item(NAME(m_gamma_data)); - save_item(NAME(m_gamma_rcvd)); - save_item(NAME(m_gamma_xmtd)); - save_item(NAME(m_player_1)); - save_item(NAME(m_alpha_irq_clock)); - save_item(NAME(m_alpha_irq_clock_enable)); - save_item(NAME(m_gamma_irq_clock)); - - save_item(NAME(m_speech_write_buffer)); - - m_gamma_sync_timer = machine().scheduler().timer_alloc(timer_expired_delegate()); -} - - -void mhavoc_state::machine_reset() -{ - m_has_gamma_cpu = (m_gamma != nullptr); - - membank("bank1")->configure_entry(0, m_zram0); - membank("bank1")->configure_entry(1, m_zram1); - membank("bank2")->configure_entries(0, 4, memregion("alpha")->base() + 0x10000, 0x2000); - - /* reset RAM/ROM banks to 0 */ - mhavoc_ram_banksel_w(0); - mhavoc_rom_banksel_w(0); - - /* reset alpha comm status */ - m_alpha_data = 0; - m_alpha_rcvd = 0; - m_alpha_xmtd = 0; - - /* reset gamma comm status */ - m_gamma_data = 0; - m_gamma_rcvd = 0; - m_gamma_xmtd = 0; - - /* reset player 1 flag */ - m_player_1 = 0; - - /* reset IRQ clock states */ - m_alpha_irq_clock = 0; - m_alpha_irq_clock_enable = 1; - m_gamma_irq_clock = 0; -} - - - -/************************************* - * - * Alpha -> gamma communications - * - *************************************/ - -TIMER_CALLBACK_MEMBER(mhavoc_state::delayed_gamma_w) -{ - /* mark the data received */ - m_gamma_rcvd = 0; - m_alpha_xmtd = 1; - m_alpha_data = param; - - /* signal with an NMI pulse */ - m_gamma->pulse_input_line(INPUT_LINE_NMI, attotime::zero); - - /* the sound CPU needs to reply in 250microseconds (according to Neil Bradley) */ - machine().scheduler().timer_set(attotime::from_usec(250), timer_expired_delegate()); -} - - -void mhavoc_state::mhavoc_gamma_w(uint8_t data) -{ - //logerror(" writing to gamma processor: %02x (%d %d)\n", data, m_gamma_rcvd, m_alpha_xmtd); - machine().scheduler().synchronize(timer_expired_delegate(FUNC(mhavoc_state::delayed_gamma_w),this), data); -} - - -uint8_t mhavoc_state::mhavoc_alpha_r() -{ - //logerror("\t\t\t\t\treading from alpha processor: %02x (%d %d)\n", m_alpha_data, m_gamma_rcvd, m_alpha_xmtd); - m_gamma_rcvd = 1; - m_alpha_xmtd = 0; - return m_alpha_data; -} - - - -/************************************* - * - * Gamma -> alpha communications - * - *************************************/ - -void mhavoc_state::mhavoc_alpha_w(uint8_t data) -{ - //logerror("\t\t\t\t\twriting to alpha processor: %02x %d %d\n", data, m_alpha_rcvd, m_gamma_xmtd); - m_alpha_rcvd = 0; - m_gamma_xmtd = 1; - m_gamma_data = data; -} - - -uint8_t mhavoc_state::mhavoc_gamma_r() -{ - //logerror(" reading from gamma processor: %02x (%d %d)\n", m_gamma_data, m_alpha_rcvd, m_gamma_xmtd); - m_alpha_rcvd = 1; - m_gamma_xmtd = 0; - return m_gamma_data; -} - - - -/************************************* - * - * RAM/ROM banking - * - *************************************/ - -void mhavoc_state::mhavoc_ram_banksel_w(uint8_t data) -{ - membank("bank1")->set_entry(data & 1); -} - - -void mhavoc_state::mhavoc_rom_banksel_w(uint8_t data) -{ - membank("bank2")->set_entry(data & 3); -} - - - -/************************************* - * - * Input ports - * - *************************************/ - -CUSTOM_INPUT_MEMBER(mhavoc_state::coin_service_r) -{ - return (m_player_1 ? m_service : m_coin)->read() & 0x03; -} - -READ_LINE_MEMBER(mhavoc_state::gamma_rcvd_r) -{ - /* Gamma rcvd flag */ - return m_gamma_rcvd; -} - -READ_LINE_MEMBER(mhavoc_state::gamma_xmtd_r) -{ - /* Gamma xmtd flag */ - return m_gamma_xmtd; -} - -READ_LINE_MEMBER(mhavoc_state::alpha_rcvd_r) -{ - /* Alpha rcvd flag */ - return (m_has_gamma_cpu && m_alpha_rcvd); -} - -READ_LINE_MEMBER(mhavoc_state::alpha_xmtd_r) -{ - /* Alpha xmtd flag */ - return (m_has_gamma_cpu && m_alpha_xmtd); -} - -/************************************* - * - * Output ports - * - *************************************/ - -void mhavoc_state::mhavoc_out_0_w(uint8_t data) -{ - /* Bit 7 = Invert Y -- unemulated */ - /* Bit 6 = Invert X -- unemulated */ - - /* Bit 5 = Player 1 */ - m_player_1 = (data >> 5) & 1; - - /* Bit 3 = Gamma reset */ - m_gamma->set_input_line(INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE); - if (!(data & 0x08)) - { - //logerror("\t\t\t\t*** resetting gamma processor. ***\n"); - m_alpha_rcvd = 0; - m_alpha_xmtd = 0; - m_gamma_rcvd = 0; - m_gamma_xmtd = 0; - } - - /* Bit 2 = Beta reset */ - /* this is the unpopulated processor in the corner of the pcb farthest from the quad pokey, not used on shipping boards */ - - /* Bit 0 = Roller light (Blinks on fatal errors) */ - m_lamps[0] = BIT(data, 0); -} - - -void mhavoc_state::alphaone_out_0_w(uint8_t data) -{ - /* Bit 5 = P2 lamp */ - m_lamps[0] = BIT(~data, 5); - - /* Bit 4 = P1 lamp */ - m_lamps[1] = BIT(~data, 4); - - /* Bit 1 = right coin counter */ - machine().bookkeeping().coin_counter_w(1, data & 0x02); - - /* Bit 0 = left coin counter */ - machine().bookkeeping().coin_counter_w(0, data & 0x01); - - //logerror("alphaone_out_0_w(%02X)\n", data); -} - - -void mhavoc_state::mhavoc_out_1_w(uint8_t data) -{ - /* Bit 1 = left coin counter */ - machine().bookkeeping().coin_counter_w(0, data & 0x02); - - /* Bit 0 = right coin counter */ - machine().bookkeeping().coin_counter_w(1, data & 0x01); -} - -/************************************* - * - * Speech access - * - *************************************/ - -void mhavoc_state::mhavocrv_speech_data_w(uint8_t data) -{ - m_speech_write_buffer = data; -} - - -void mhavoc_state::mhavocrv_speech_strobe_w(uint8_t data) -{ - m_tms->data_w(m_speech_write_buffer); -} - -/************************************* - * - * Driver-specific init - * - *************************************/ - -void mhavoc_state::init_mhavocrv() -{ - // For Return to Vax, add support for the normally-unused speech module. - m_gamma->space(AS_PROGRAM).install_write_handler(0x5800, 0x5800, write8smo_delegate(*this, FUNC(mhavoc_state::mhavocrv_speech_data_w))); - m_gamma->space(AS_PROGRAM).install_write_handler(0x5900, 0x5900, write8smo_delegate(*this, FUNC(mhavoc_state::mhavocrv_speech_strobe_w))); -} diff --git a/src/mame/galaxian/galaxian.cpp b/src/mame/galaxian/galaxian.cpp index 7abcfa755ce..a6cf4b01602 100644 --- a/src/mame/galaxian/galaxian.cpp +++ b/src/mame/galaxian/galaxian.cpp @@ -4870,9 +4870,9 @@ static INPUT_PORTS_START( jumpbug ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 ) - PORT_DIPNAME( 0x40, 0x00, "Difficulty ?" ) - PORT_DIPSETTING( 0x00, DEF_STR( Hard ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Easy ) ) + PORT_DIPNAME( 0x40, 0x00, "Difficulty" ) + PORT_DIPSETTING( 0x00, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Hard ) ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL PORT_START("IN2") diff --git a/src/mame/taito/taitosj.cpp b/src/mame/taito/taitosj.cpp index 1e508c7be70..14abd56d26e 100644 --- a/src/mame/taito/taitosj.cpp +++ b/src/mame/taito/taitosj.cpp @@ -806,9 +806,9 @@ static INPUT_PORTS_START( alpine ) PORT_DIPSETTING( 0x08, "1:30" ) PORT_DIPSETTING( 0x10, "2:00" ) PORT_DIPSETTING( 0x18, "2:30" ) - PORT_DIPNAME( 0x20, 0x00, "End of Race Time Bonus" ) PORT_DIPLOCATION("SWA:6") - PORT_DIPSETTING( 0x20, "0:10" ) - PORT_DIPSETTING( 0x00, "0:20" ) + PORT_DIPNAME( 0x20, 0x20, "End of Race Time Bonus" ) PORT_DIPLOCATION("SWA:6") + PORT_DIPSETTING( 0x00, "0:10" ) + PORT_DIPSETTING( 0x20, "0:20" ) PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) -- cgit v1.2.3