From c869b5d64275d9fd43c3d261f1c5d0b20bb15544 Mon Sep 17 00:00:00 2001 From: cam900 Date: Sat, 29 Jun 2024 23:04:11 +0900 Subject: shared/rax.cpp: Use device_mixer_interface for sound route, Cleanups (#12444) - Use C++ style comments for single line comments - Suppress side effect for debugger reads - Make variables constant - Fix spacing - Reduce literal tag usages - Add variables into save state sony/zn.cpp: Cleanups - Suppress side effects for debugger reads - Make variables constant sega/stv.cpp: Add notes --- src/mame/sega/stv.cpp | 5 +- src/mame/shared/rax.cpp | 210 ++++++++++++++++++++++++++---------------------- src/mame/shared/rax.h | 48 +++++------ src/mame/sony/zn.cpp | 33 +++++--- 4 files changed, 164 insertions(+), 132 deletions(-) diff --git a/src/mame/sega/stv.cpp b/src/mame/sega/stv.cpp index 88e012be653..969b95d4c58 100644 --- a/src/mame/sega/stv.cpp +++ b/src/mame/sega/stv.cpp @@ -1250,7 +1250,10 @@ void stv_state::batmanfr_sound_comms_w(offs_t offset, uint32_t data, uint32_t me void stv_state::batmanfr(machine_config &config) { stv(config); - ACCLAIM_RAX(config, "rax", 0); + ACCLAIM_RAX(config, m_rax, 0); + // TODO: RAX output connected to SCSP? + m_rax->add_route(0, "lspeaker", 1.0); + m_rax->add_route(1, "rspeaker", 1.0); } void stv_state::shienryu(machine_config &config) diff --git a/src/mame/shared/rax.cpp b/src/mame/shared/rax.cpp index 93e64464e57..5dbf32aef55 100644 --- a/src/mame/shared/rax.cpp +++ b/src/mame/shared/rax.cpp @@ -17,34 +17,34 @@ * *************************************/ -/* These are some of the control registers. We don't use them all */ +// These are some of the control registers. We don't use them all enum { - IDMA_CONTROL_REG = 0, /* 3fe0 */ - BDMA_INT_ADDR_REG, /* 3fe1 */ - BDMA_EXT_ADDR_REG, /* 3fe2 */ - BDMA_CONTROL_REG, /* 3fe3 */ - BDMA_WORD_COUNT_REG, /* 3fe4 */ - PROG_FLAG_DATA_REG, /* 3fe5 */ - PROG_FLAG_CONTROL_REG, /* 3fe6 */ - - S1_AUTOBUF_REG = 15, /* 3fef */ - S1_RFSDIV_REG, /* 3ff0 */ - S1_SCLKDIV_REG, /* 3ff1 */ - S1_CONTROL_REG, /* 3ff2 */ - S0_AUTOBUF_REG, /* 3ff3 */ - S0_RFSDIV_REG, /* 3ff4 */ - S0_SCLKDIV_REG, /* 3ff5 */ - S0_CONTROL_REG, /* 3ff6 */ - S0_MCTXLO_REG, /* 3ff7 */ - S0_MCTXHI_REG, /* 3ff8 */ - S0_MCRXLO_REG, /* 3ff9 */ - S0_MCRXHI_REG, /* 3ffa */ - TIMER_SCALE_REG, /* 3ffb */ - TIMER_COUNT_REG, /* 3ffc */ - TIMER_PERIOD_REG, /* 3ffd */ - WAITSTATES_REG, /* 3ffe */ - SYSCONTROL_REG /* 3fff */ + IDMA_CONTROL_REG = 0, // 3fe0 + BDMA_INT_ADDR_REG, // 3fe1 + BDMA_EXT_ADDR_REG, // 3fe2 + BDMA_CONTROL_REG, // 3fe3 + BDMA_WORD_COUNT_REG, // 3fe4 + PROG_FLAG_DATA_REG, // 3fe5 + PROG_FLAG_CONTROL_REG, // 3fe6 + + S1_AUTOBUF_REG = 15, // 3fef + S1_RFSDIV_REG, // 3ff0 + S1_SCLKDIV_REG, // 3ff1 + S1_CONTROL_REG, // 3ff2 + S0_AUTOBUF_REG, // 3ff3 + S0_RFSDIV_REG, // 3ff4 + S0_SCLKDIV_REG, // 3ff5 + S0_CONTROL_REG, // 3ff6 + S0_MCTXLO_REG, // 3ff7 + S0_MCTXHI_REG, // 3ff8 + S0_MCRXLO_REG, // 3ff9 + S0_MCRXHI_REG, // 3ffa + TIMER_SCALE_REG, // 3ffb + TIMER_COUNT_REG, // 3ffc + TIMER_PERIOD_REG, // 3ffd + WAITSTATES_REG, // 3ffe + SYSCONTROL_REG // 3fff }; @@ -64,7 +64,8 @@ void acclaim_rax_device::data_w(uint16_t data) uint16_t acclaim_rax_device::data_r() { - m_adsp_snd_pf0 = 1; + if (!machine().side_effects_disabled()) + m_adsp_snd_pf0 = 1; return m_data_out->read(); } @@ -111,24 +112,24 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) { m_control_regs[BDMA_WORD_COUNT_REG] = data & 0x3fff; - const uint8_t *adsp_rom = &m_rom[m_rom_bank * 0x400000]; + uint8_t const *const adsp_rom = &m_rom[m_rom_bank * 0x400000]; - uint32_t page = (m_control_regs[BDMA_CONTROL_REG] >> 8) & 0xff; - uint32_t dir = (m_control_regs[BDMA_CONTROL_REG] >> 2) & 1; - uint32_t type = m_control_regs[BDMA_CONTROL_REG] & 3; + uint32_t const page = (m_control_regs[BDMA_CONTROL_REG] >> 8) & 0xff; + uint32_t const dir = BIT(m_control_regs[BDMA_CONTROL_REG], 2); + uint32_t const type = m_control_regs[BDMA_CONTROL_REG] & 3; uint32_t src_addr = (page << 14) | m_control_regs[BDMA_EXT_ADDR_REG]; uint32_t count = m_control_regs[BDMA_WORD_COUNT_REG]; address_space* addr_space = (type == 0 ? m_program : m_data); - if (dir == 0) + if (!dir) { if (type == 0) { while (count) { - uint32_t src_dword = (adsp_rom[src_addr + 0] << 16) | (adsp_rom[src_addr + 1] << 8) | adsp_rom[src_addr + 2]; + uint32_t const src_dword = (adsp_rom[src_addr + 0] << 16) | (adsp_rom[src_addr + 1] << 8) | adsp_rom[src_addr + 2]; addr_space->write_dword(m_control_regs[BDMA_INT_ADDR_REG], src_dword); @@ -141,7 +142,7 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) { while (count) { - uint16_t src_word = (adsp_rom[src_addr + 0] << 8) | adsp_rom[src_addr + 1]; + uint16_t const src_word = (adsp_rom[src_addr + 0] << 8) | adsp_rom[src_addr + 1]; addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG], src_word); @@ -152,11 +153,11 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) } else { - int shift = type == 2 ? 8 : 0; + int const shift = type == 2 ? 8 : 0; while (count) { - uint16_t src_word = adsp_rom[src_addr] << shift; + uint16_t const src_word = adsp_rom[src_addr] << shift; addr_space->write_word(m_control_regs[BDMA_INT_ADDR_REG], src_word); @@ -173,24 +174,24 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) fatalerror("%s DMA to byte memory!",this->tag()); } - attotime word_period = attotime::from_hz(m_cpu->unscaled_clock()); - attotime period = word_period * (data & 0x3fff) * 1; + attotime const word_period = attotime::from_hz(m_cpu->unscaled_clock()); + attotime const period = word_period * (data & 0x3fff) * 1; m_dma_timer->adjust(period, src_addr, period); break; } case S1_AUTOBUF_REG: - /* autobuffer off: nuke the timer, and disable the DAC */ - if ((data & 0x0002) == 0) + // autobuffer off: nuke the timer, and disable the DAC + if (BIT(~data, 1)) { m_dmadac[1]->enable(0); } break; case S0_AUTOBUF_REG: - /* autobuffer off: nuke the timer, and disable the DAC */ - if ((data & 0x0002) == 0) + // autobuffer off: nuke the timer, and disable the DAC + if (BIT(~data, 1)) { m_dmadac[0]->enable(0); m_reg_timer->reset(); @@ -199,9 +200,9 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) case S1_CONTROL_REG: if (((data >> 4) & 3) == 2) - fatalerror("DCS: Oh no!, the data is compressed with u-law encoding\n"); + fatalerror("RAX: Oh no!, the data is compressed with u-law encoding\n"); if (((data >> 4) & 3) == 3) - fatalerror("DCS: Oh no!, the data is compressed with A-law encoding\n"); + fatalerror("RAX: Oh no!, the data is compressed with A-law encoding\n"); break; case PROG_FLAG_DATA_REG: @@ -216,15 +217,15 @@ void acclaim_rax_device::adsp_control_w(offs_t offset, uint16_t data) } -TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::dma_timer_callback ) +TIMER_DEVICE_CALLBACK_MEMBER(acclaim_rax_device::dma_timer_callback) { - /* Update external address count and page */ + // Update external address count and page m_control_regs[BDMA_WORD_COUNT_REG] = 0; m_control_regs[BDMA_EXT_ADDR_REG] = param & 0x3fff; m_control_regs[BDMA_CONTROL_REG] &= ~0xff00; m_control_regs[BDMA_CONTROL_REG] |= ((param >> 14) & 0xff) << 8; - if (m_control_regs[BDMA_CONTROL_REG] & 8) + if (BIT(m_control_regs[BDMA_CONTROL_REG], 3)) m_cpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); else m_cpu->pulse_input_line(ADSP2181_BDMA, m_cpu->minimum_quantum_time()); @@ -255,7 +256,8 @@ void acclaim_rax_device::rom_bank_w(uint16_t data) uint16_t acclaim_rax_device::host_r() { - m_cpu->set_input_line(ADSP2181_IRQL0, CLEAR_LINE); + if (!machine().side_effects_disabled()) + m_cpu->set_input_line(ADSP2181_IRQL0, CLEAR_LINE); return m_data_in->read(); } @@ -275,7 +277,7 @@ void acclaim_rax_device::host_w(uint16_t data) void acclaim_rax_device::adsp_program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x3fff).ram().share("adsp_pram"); + map(0x0000, 0x3fff).ram().share(m_adsp_pram); } void acclaim_rax_device::adsp_data_map(address_map &map) @@ -302,17 +304,29 @@ void acclaim_rax_device::device_start() // 1 bank for internal m_banked_ram = make_unique_clear(0x2000 * 5); - m_adsp_data_bank->configure_entries(0, 5, &m_banked_ram[0], 0x2000*sizeof(uint16_t)); + m_adsp_data_bank->configure_entries(0, 5, &m_banked_ram[0], 0x2000 * sizeof(uint16_t)); + + save_item(NAME(m_adsp_snd_pf0)); + save_item(NAME(m_adsp_regs.bdma_internal_addr)); + save_item(NAME(m_adsp_regs.bdma_external_addr)); + save_item(NAME(m_adsp_regs.bdma_control)); + save_item(NAME(m_adsp_regs.bdma_word_count)); + save_item(NAME(m_control_regs)); + save_item(NAME(m_size)); + save_item(NAME(m_incs)); + save_item(NAME(m_ireg)); + save_item(NAME(m_ireg_base)); + save_item(NAME(m_data_bank)); + save_item(NAME(m_rom_bank)); + save_item(NAME(m_dmovlay_val)); } void acclaim_rax_device::device_reset() { - /* Load 32 program words (96 bytes) via BDMA */ + // Load 32 program words (96 bytes) via BDMA for (int i = 0; i < 32; i ++) { - uint32_t word; - - word = m_rom[i*3 + 0] << 16; + uint32_t word = m_rom[i*3 + 0] << 16; word |= m_rom[i*3 + 1] << 8; word |= m_rom[i*3 + 2]; @@ -322,12 +336,12 @@ void acclaim_rax_device::device_reset() m_adsp_snd_pf0 = 1; m_rom_bank = 0; - /* initialize our state structure and install the transmit callback */ + // initialize our state structure and install the transmit callback m_size[0] = 0; m_incs[0] = 0; m_ireg[0] = 0; - /* initialize the ADSP control regs */ + // initialize the ADSP control regs memset(m_control_regs, 0, sizeof(m_control_regs)); m_dmovlay_val = 0; @@ -335,19 +349,24 @@ void acclaim_rax_device::device_reset() update_data_ram_bank(); } +void acclaim_rax_device::device_post_load() +{ + update_data_ram_bank(); +} + void acclaim_rax_device::adsp_irq(int which) { if (which != 0) return; - /* get the index register */ + // get the index register int reg = m_cpu->state_int(ADSP2100_I0 + m_ireg[which]); - /* copy the current data into the buffer */ - int count = m_size[which] / (4 * (m_incs[which] ? m_incs[which] : 1)); + // copy the current data into the buffer + int const count = m_size[which] / (4 * (m_incs[which] ? m_incs[which] : 1)); - int16_t buffer[0x100]; + int16_t buffer[0x100]{}; for (uint32_t i = 0; i < count; i++) { @@ -361,17 +380,17 @@ void acclaim_rax_device::adsp_irq(int which) m_dmadac[i]->transfer(i, 1, 2, count/2, buffer); } - /* check for wrapping */ + // check for wrapping if (reg >= m_ireg_base[which] + m_size[which]) { - /* reset the base pointer */ + // reset the base pointer reg = m_ireg_base[which]; } m_cpu->set_state_int(ADSP2100_I0 + m_ireg[which], reg); } -TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::adsp_irq0 ) +TIMER_DEVICE_CALLBACK_MEMBER(acclaim_rax_device::adsp_irq0) { adsp_irq(0); } @@ -380,12 +399,12 @@ TIMER_DEVICE_CALLBACK_MEMBER( acclaim_rax_device::adsp_irq0 ) void acclaim_rax_device::recompute_sample_rate(int which) { - /* calculate how long until we generate an interrupt */ + // calculate how long until we generate an interrupt - /* frequency the time per each bit sent */ + // frequency the time per each bit sent attotime sample_period = attotime::from_hz(m_cpu->unscaled_clock()) * (1 * (m_control_regs[which ? S1_SCLKDIV_REG : S0_SCLKDIV_REG] + 1)); - /* now put it down to samples, so we know what the channel frequency has to be */ + // now put it down to samples, so we know what the channel frequency has to be sample_period = sample_period * (16 * 1); for (auto &dmadac : m_dmadac) { @@ -393,54 +412,51 @@ void acclaim_rax_device::recompute_sample_rate(int which) dmadac->enable(1); } - /* fire off a timer which will hit every half-buffer */ + // fire off a timer which will hit every half-buffer if (m_incs[which]) { - attotime period = (sample_period * m_size[which]) / (4 * 2 * m_incs[which]); + attotime const period = (sample_period * m_size[which]) / (4 * 2 * m_incs[which]); m_reg_timer->adjust(period, 0, period); } } void acclaim_rax_device::adsp_sound_tx_callback(offs_t offset, uint32_t data) { - int which = offset; + int const which = offset; if (which != 0) return; - int autobuf_reg = which ? S1_AUTOBUF_REG : S0_AUTOBUF_REG; // "which" must equal 0 here, invalid test: Coverity 315932 + int const autobuf_reg = which ? S1_AUTOBUF_REG : S0_AUTOBUF_REG; // "which" must equal 0 here, invalid test: Coverity 315932 - /* check if SPORT1 is enabled */ - if (m_control_regs[SYSCONTROL_REG] & (which ? 0x0800 : 0x1000)) /* bit 11 */ // invalid test here too + // check if SPORT1 is enabled + if (m_control_regs[SYSCONTROL_REG] & (which ? 0x0800 : 0x1000)) // bit 11 // invalid test here too { - /* we only support autobuffer here (which is what this thing uses), bail if not enabled */ - if (m_control_regs[autobuf_reg] & 0x0002) /* bit 1 */ + // we only support autobuffer here (which is what this thing uses), bail if not enabled + if (m_control_regs[autobuf_reg] & 0x0002) // bit 1 { - /* get the autobuffer registers */ - int mreg, lreg; - uint16_t source; - + // get the autobuffer registers m_ireg[which] = (m_control_regs[autobuf_reg] >> 9) & 7; - mreg = (m_control_regs[autobuf_reg] >> 7) & 3; - mreg |= m_ireg[which] & 0x04; /* msb comes from ireg */ - lreg = m_ireg[which]; + int mreg = (m_control_regs[autobuf_reg] >> 7) & 3; + mreg |= m_ireg[which] & 0x04; // msb comes from ireg + int const lreg = m_ireg[which]; - /* now get the register contents in a more legible format */ - /* we depend on register indexes to be continuous (which is the case in our core) */ - source = m_cpu->state_int(ADSP2100_I0 + m_ireg[which]); + // now get the register contents in a more legible format + // we depend on register indexes to be continuous (which is the case in our core) + uint16_t source = m_cpu->state_int(ADSP2100_I0 + m_ireg[which]); m_incs[which] = m_cpu->state_int(ADSP2100_M0 + mreg); m_size[which] = m_cpu->state_int(ADSP2100_L0 + lreg); - /* get the base value, since we need to keep it around for wrapping */ + // get the base value, since we need to keep it around for wrapping source -= m_incs[which]; - /* make it go back one so we dont lose the first sample */ + // make it go back one so we dont lose the first sample m_cpu->set_state_int(ADSP2100_I0 + m_ireg[which], source); - /* save it as it is now */ + // save it as it is now m_ireg_base[which] = source; - /* recompute the sample rate and timer */ + // recompute the sample rate and timer recompute_sample_rate(which); return; } @@ -448,11 +464,11 @@ void acclaim_rax_device::adsp_sound_tx_callback(offs_t offset, uint32_t data) logerror( "ADSP SPORT1: trying to transmit and autobuffer not enabled!\n" ); } - /* if we get there, something went wrong. Disable playing */ + // if we get there, something went wrong. Disable playing for (auto &dmadac : m_dmadac) dmadac->enable(0); - /* remove timer */ + // remove timer m_reg_timer->reset(); } @@ -478,6 +494,7 @@ DEFINE_DEVICE_TYPE(ACCLAIM_RAX, acclaim_rax_device, "rax_audio", "Acclaim RAX") acclaim_rax_device::acclaim_rax_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, ACCLAIM_RAX, tag, owner, clock) + , device_mixer_interface(mconfig, *this, 2) , m_cpu(*this, "adsp") , m_dmadac(*this, { "dacl", "dacr" }) , m_reg_timer(*this, "adsp_reg_timer") @@ -498,14 +515,14 @@ acclaim_rax_device::acclaim_rax_device(const machine_config &mconfig, const char void acclaim_rax_device::device_add_mconfig(machine_config &config) { ADSP2181(config, m_cpu, XTAL(16'670'000)); - m_cpu->sport_tx().set(FUNC(acclaim_rax_device::adsp_sound_tx_callback)); /* callback for serial transmit */ - m_cpu->dmovlay().set(FUNC(acclaim_rax_device::dmovlay_callback)); /* callback for adsp 2181 dmovlay instruction */ + m_cpu->sport_tx().set(FUNC(acclaim_rax_device::adsp_sound_tx_callback)); // callback for serial transmit + m_cpu->dmovlay().set(FUNC(acclaim_rax_device::dmovlay_callback)); // callback for adsp 2181 dmovlay instruction m_cpu->set_addrmap(AS_PROGRAM, &acclaim_rax_device::adsp_program_map); m_cpu->set_addrmap(AS_DATA, &acclaim_rax_device::adsp_data_map); m_cpu->set_addrmap(AS_IO, &acclaim_rax_device::adsp_io_map); - TIMER(config, "adsp_reg_timer").configure_generic(FUNC(acclaim_rax_device::adsp_irq0)); - TIMER(config, "adsp_dma_timer").configure_generic(FUNC(acclaim_rax_device::dma_timer_callback)); + TIMER(config, m_reg_timer).configure_generic(FUNC(acclaim_rax_device::adsp_irq0)); + TIMER(config, m_dma_timer).configure_generic(FUNC(acclaim_rax_device::dma_timer_callback)); GENERIC_LATCH_16(config, m_data_in); GENERIC_LATCH_16(config, m_data_out); @@ -513,7 +530,6 @@ void acclaim_rax_device::device_add_mconfig(machine_config &config) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - DMADAC(config, "dacl").add_route(ALL_OUTPUTS, "lspeaker", 1.0); - DMADAC(config, "dacr").add_route(ALL_OUTPUTS, "rspeaker", 1.0); + DMADAC(config, m_dmadac[0]).add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); + DMADAC(config, m_dmadac[1]).add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 1); } - diff --git a/src/mame/shared/rax.h b/src/mame/shared/rax.h index 34bc61920df..14c2a7479eb 100644 --- a/src/mame/shared/rax.h +++ b/src/mame/shared/rax.h @@ -16,7 +16,7 @@ #include "sound/dmadac.h" -class acclaim_rax_device : public device_t +class acclaim_rax_device : public device_t, public device_mixer_interface { public: // construction/destruction @@ -29,18 +29,34 @@ public: void adsp_irq(int which); void recompute_sample_rate(int which); - TIMER_DEVICE_CALLBACK_MEMBER( dma_timer_callback ); + TIMER_DEVICE_CALLBACK_MEMBER(dma_timer_callback); - void adsp_data_map(address_map &map); - void adsp_io_map(address_map &map); - void adsp_program_map(address_map &map); protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; virtual void device_add_mconfig(machine_config &config) override; private: + void adsp_sound_tx_callback(offs_t offset, uint32_t data); + + TIMER_DEVICE_CALLBACK_MEMBER(adsp_irq0); + TIMER_DEVICE_CALLBACK_MEMBER(sport0_irq); + void dmovlay_callback(uint32_t data); + + uint16_t adsp_control_r(offs_t offset); + void adsp_control_w(offs_t offset, uint16_t data); + void ram_bank_w(uint16_t data); + void rom_bank_w(uint16_t data); + + uint16_t host_r(); + void host_w(uint16_t data); + + void adsp_data_map(address_map &map); + void adsp_io_map(address_map &map); + void adsp_program_map(address_map &map); + required_device m_cpu; required_device_array m_dmadac; required_device m_reg_timer; @@ -49,6 +65,9 @@ private: required_memory_bank m_adsp_data_bank; required_region_ptr m_rom; + required_device m_data_in; + required_device m_data_out; + uint32_t m_adsp_snd_pf0; struct @@ -65,7 +84,7 @@ private: uint16_t m_control_regs[32]; - /* sound output */ + // sound output uint16_t m_size[2]; uint16_t m_incs[2]; uint32_t m_ireg[2]; @@ -76,23 +95,6 @@ private: uint32_t m_dmovlay_val; std::unique_ptr m_banked_ram; - - required_device m_data_in; - required_device m_data_out; - - void adsp_sound_tx_callback(offs_t offset, uint32_t data); - - TIMER_DEVICE_CALLBACK_MEMBER(adsp_irq0); - TIMER_DEVICE_CALLBACK_MEMBER(sport0_irq); - void dmovlay_callback(uint32_t data); - - uint16_t adsp_control_r(offs_t offset); - void adsp_control_w(offs_t offset, uint16_t data); - void ram_bank_w(uint16_t data); - void rom_bank_w(uint16_t data); - - uint16_t host_r(); - void host_w(uint16_t data); }; // device type definition diff --git a/src/mame/sony/zn.cpp b/src/mame/sony/zn.cpp index fc98dc2fd3c..ef8fb8f1cfc 100644 --- a/src/mame/sony/zn.cpp +++ b/src/mame/sony/zn.cpp @@ -36,7 +36,8 @@ inline void zn_state::psxwriteword( uint32_t *p_n_psxram, uint32_t n_address, ui uint8_t zn_state::znsecsel_r(offs_t offset, uint8_t mem_mask) { - LOG("%s: znsecsel_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); + if (!machine().side_effects_disabled()) + LOG("%s: znsecsel_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); return m_n_znsecsel; } @@ -100,7 +101,8 @@ uint8_t zn_state::boardconfig_r() uint16_t zn_state::unknown_r(offs_t offset, uint16_t mem_mask) { - logerror("%s: unknown_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); + if (!machine().side_effects_disabled()) + logerror("%s: unknown_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); return 0xffff; } @@ -352,7 +354,8 @@ Notes: uint16_t capcom_zn_state::kickharness_r(offs_t offset, uint16_t mem_mask) { /* required for buttons 4,5&6 */ - LOG("%s: capcom_kickharness_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); + if (!machine().side_effects_disabled()) + LOG("%s: capcom_kickharness_r( %08x, %08x )\n", machine().describe_context(), offset, mem_mask); return 0xffff; } @@ -1131,7 +1134,8 @@ uint16_t primrag2_state::vt83c461_16_r(offs_t offset, uint16_t mem_mask) } else { - logerror( "unhandled 16 bit read %04x %04x\n", offset, mem_mask); + if (!machine().side_effects_disabled()) + logerror( "unhandled 16 bit read %04x %04x\n", offset, mem_mask); return 0xffff; } } @@ -1172,7 +1176,8 @@ uint16_t primrag2_state::vt83c461_32_r(offs_t offset, uint16_t mem_mask) } else { - logerror("%s: unhandled 32 bit read %04x %04x\n", machine().describe_context(), offset, mem_mask); + if (!machine().side_effects_disabled()) + logerror("%s: unhandled 32 bit read %04x %04x\n", machine().describe_context(), offset, mem_mask); return 0xffff; } } @@ -1536,11 +1541,13 @@ uint16_t bam2_state::mcu_r(offs_t offset, uint16_t mem_mask) switch (offset) { case 0: - logerror("BAM2 MCU port 0 read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); + if (!machine().side_effects_disabled()) + logerror("BAM2 MCU port 0 read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); break; case 2: - logerror("BAM2 MCU status read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); + if (!machine().side_effects_disabled()) + logerror("BAM2 MCU status read @ PC %08x mask %08x\n", m_maincpu->pc(), mem_mask); switch (m_mcu_command) { @@ -1810,8 +1817,8 @@ void nbajamex_state::bank_w(offs_t offset, uint16_t data, uint16_t mem_mask) m_curr_rombank[offset] = data; - uint32_t bankbase0 = ((m_curr_rombank[0] & 0x10) ? 1 : 0) | ((m_curr_rombank[0] & 7) << 1); - uint32_t bankbase1 = ((m_curr_rombank[1] & 0x10) ? 0 : 1) | ((m_curr_rombank[1] & 7) << 1); + uint32_t const bankbase0 = (BIT(m_curr_rombank[0], 4)) | ((m_curr_rombank[0] & 7) << 1); + uint32_t const bankbase1 = (BIT(~m_curr_rombank[1], 4)) | ((m_curr_rombank[1] & 7) << 1); if (offset == 0) { @@ -1850,13 +1857,15 @@ void nbajamex_state::sound_80_w(uint16_t data) uint16_t nbajamex_state::sound_08_r(offs_t offset, uint16_t mem_mask) { // Sound related - logerror("%s: nbajamex_08_r( %08x, %08x, %08x )\n", machine().describe_context(), offset, 0, mem_mask); + if (!machine().side_effects_disabled()) + logerror("%s: sound_08_r( %08x, %08x, %08x )\n", machine().describe_context(), offset, 0, mem_mask); return 0x400; } uint16_t nbajamex_state::sound_80_r(offs_t offset, uint16_t mem_mask) { - logerror("%s: nbajamex_80_r( %08x, %08x, %08x )\n", machine().describe_context(), offset, 0, mem_mask); + if (!machine().side_effects_disabled()) + logerror("%s: sound_80_r( %08x, %08x, %08x )\n", machine().describe_context(), offset, 0, mem_mask); return 0xffff; } @@ -1952,6 +1961,8 @@ void nbajamex_state::nbajamex(machine_config &config) ADDRESS_MAP_BANK(config, "nbajamex_bankmap").set_map(&nbajamex_state::bank_map).set_options(ENDIANNESS_LITTLE, 32, 24, 0x800000); ACCLAIM_RAX(config, m_rax, 0); + m_rax->add_route(0, "lspeaker", 1.0); + m_rax->add_route(1, "rspeaker", 1.0); } void jdredd_state::jdredd(machine_config &config) -- cgit v1.2.3