From c1ceb6e016763537c5109cc76fe5d1b4ae72fdb3 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 16 Jun 2023 16:35:08 +0200 Subject: m6801: remove i/o ports tri-state callback --- src/devices/cpu/m6800/m6801.cpp | 30 +++++++++++++----------------- src/devices/cpu/m6800/m6801.h | 16 ++-------------- src/mame/namco/namcos1.cpp | 5 ++--- src/mame/namco/namcos1.h | 2 +- 4 files changed, 18 insertions(+), 35 deletions(-) diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp index 9fd76e77645..0388134d0f6 100644 --- a/src/devices/cpu/m6800/m6801.cpp +++ b/src/devices/cpu/m6800/m6801.cpp @@ -317,7 +317,6 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type ty : m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal) , m_in_port_func(*this) , m_out_port_func(*this) - , m_tri_port_func(*this) , m_out_sc2_func(*this) , m_out_sertx_func(*this) , m_sclk_divider(8) @@ -358,7 +357,6 @@ hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_typ : hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701) , m_in_portx_func(*this) , m_out_portx_func(*this) - , m_tri_portx_func(*this) { m_sclk_divider = 16; } @@ -1023,7 +1021,6 @@ void m6801_cpu_device::device_resolve_objects() m_in_port_func.resolve_all_safe(0xff); m_out_port_func.resolve_all_safe(); - m_tri_port_func.resolve_all_safe(0xff); m_out_sc2_func.resolve_safe(); m_out_sertx_func.resolve_safe(); } @@ -1034,7 +1031,6 @@ void hd6301x_cpu_device::device_resolve_objects() m_in_portx_func.resolve_all_safe(0xff); m_out_portx_func.resolve_all_safe(); - m_tri_portx_func.resolve_all_safe(0xff); } @@ -1230,7 +1226,7 @@ void m6801_cpu_device::write_port2() if ((ddr != 0x1f) && ddr) { - data = (m_port_data[1] & ddr) | (~ddr & m_tri_port_func[1]()); + data = (m_port_data[1] & ddr) | (ddr ^ 0xff); } if (m_trcsr & M6801_TRCSR_TE) @@ -1254,7 +1250,7 @@ void hd6301x_cpu_device::write_port2() if (m_tcsr2 & TCSR2_OE2) ddr |= 0x20; - uint8_t data = (m_port_data[1] & ddr) | (~ddr & m_tri_port_func[1]()); + uint8_t data = (m_port_data[1] & ddr) | (ddr ^ 0xff); if (m_trcsr & M6801_TRCSR_TE) { @@ -1293,7 +1289,7 @@ void m6801_cpu_device::p1_ddr_w(uint8_t data) if (m_port_ddr[0] != data) { m_port_ddr[0] = data; - m_out_port_func[0](0, (m_port_data[0] & m_port_ddr[0]) | (~m_port_ddr[0] & m_tri_port_func[0]()), m_port_ddr[0]); + m_out_port_func[0](0, (m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff), m_port_ddr[0]); } } @@ -1310,7 +1306,7 @@ void m6801_cpu_device::p1_data_w(uint8_t data) LOGPORT("Port 1 Data Register: %02x\n", data); m_port_data[0] = data; - m_out_port_func[0](0, (m_port_data[0] & m_port_ddr[0]) | (~m_port_ddr[0] & m_tri_port_func[0]()), m_port_ddr[0]); + m_out_port_func[0](0, (m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff), m_port_ddr[0]); } void m6801_cpu_device::p2_ddr_w(uint8_t data) @@ -1361,7 +1357,7 @@ void m6801_cpu_device::p3_ddr_w(uint8_t data) if (m_port_ddr[2] != data) { m_port_ddr[2] = data; - m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (~m_port_ddr[2] & m_tri_port_func[2]()), m_port_ddr[2]); + m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff), m_port_ddr[2]); } } @@ -1418,7 +1414,7 @@ void m6801_cpu_device::p3_data_w(uint8_t data) } m_port_data[2] = data; - m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (~m_port_ddr[2] & m_tri_port_func[2]()), m_port_ddr[2]); + m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff), m_port_ddr[2]); if (m_p3csr & M6801_P3CSR_OSS) { @@ -1441,7 +1437,7 @@ void hd6301x_cpu_device::p3_data_w(uint8_t data) LOGPORT("Port 3 Data Register: %02x\n", data); m_port_data[2] = data; - m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (~m_port_ddr[2] & m_tri_port_func[2]()), m_port_ddr[2]); + m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff), m_port_ddr[2]); } uint8_t m6801_cpu_device::p3_csr_r() @@ -1468,7 +1464,7 @@ void m6801_cpu_device::p4_ddr_w(uint8_t data) if (m_port_ddr[3] != data) { m_port_ddr[3] = data; - m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (~m_port_ddr[3] & m_tri_port_func[3]()), m_port_ddr[3]); + m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff), m_port_ddr[3]); } } @@ -1485,7 +1481,7 @@ void m6801_cpu_device::p4_data_w(uint8_t data) LOGPORT("Port 4 Data Register: %02x\n", data); m_port_data[3] = data; - m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (~m_port_ddr[3] & m_tri_port_func[3]()), m_port_ddr[3]); + m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff), m_port_ddr[3]); } void hd6301y_cpu_device::p5_ddr_w(uint8_t data) @@ -1495,7 +1491,7 @@ void hd6301y_cpu_device::p5_ddr_w(uint8_t data) if (m_portx_ddr[0] != data) { m_portx_ddr[0] = data; - m_out_portx_func[0](0, (m_portx_data[0] & m_portx_ddr[0]) | (~m_portx_ddr[0] & m_tri_portx_func[0]()), m_portx_ddr[0]); + m_out_portx_func[0](0, (m_portx_data[0] & m_portx_ddr[0]) | (m_portx_ddr[0] ^ 0xff), m_portx_ddr[0]); } } @@ -1518,7 +1514,7 @@ void hd6301y_cpu_device::p5_data_w(uint8_t data) LOGPORT("Port 5 Data Register: %02x\n", data); m_portx_data[0] = data; - m_out_portx_func[0](0, (m_portx_data[0] & m_portx_ddr[0]) | (~m_portx_ddr[0] & m_tri_portx_func[0]()), m_portx_ddr[0]); + m_out_portx_func[0](0, (m_portx_data[0] & m_portx_ddr[0]) | (m_portx_ddr[0] ^ 0xff), m_portx_ddr[0]); } void hd6301x_cpu_device::p6_ddr_w(uint8_t data) @@ -1528,7 +1524,7 @@ void hd6301x_cpu_device::p6_ddr_w(uint8_t data) if (m_portx_ddr[1] != data) { m_portx_ddr[1] = data; - m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (~m_portx_ddr[1] & m_tri_portx_func[1]()), m_portx_ddr[1]); + m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (m_portx_ddr[1] ^ 0xff), m_portx_ddr[1]); } } @@ -1545,7 +1541,7 @@ void hd6301x_cpu_device::p6_data_w(uint8_t data) LOGPORT("Port 6 Data Register: %02x\n", data); m_portx_data[1] = data; - m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (~m_portx_ddr[1] & m_tri_portx_func[1]()), m_portx_ddr[1]); + m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (m_portx_ddr[1] ^ 0xff), m_portx_ddr[1]); } uint8_t hd6301y_cpu_device::p6_data_r() diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h index b680afe4dd0..3161936132e 100644 --- a/src/devices/cpu/m6800/m6801.h +++ b/src/devices/cpu/m6800/m6801.h @@ -45,7 +45,7 @@ class m6801_cpu_device : public m6800_cpu_device public: m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // port 1-4 I/O + // port 1-4 I/O, DDR is passed through mem_mask auto in_p1_cb() { return m_in_port_func[0].bind(); } auto out_p1_cb() { return m_out_port_func[0].bind(); } auto in_p2_cb() { return m_in_port_func[1].bind(); } @@ -55,12 +55,6 @@ public: auto in_p4_cb() { return m_in_port_func[3].bind(); } auto out_p4_cb() { return m_out_port_func[3].bind(); } - // port outputs when in tri-state (high-impedance), default 0xff - auto tri_p1_cb() { return m_tri_port_func[0].bind(); } - auto tri_p2_cb() { return m_tri_port_func[1].bind(); } - auto tri_p3_cb() { return m_tri_port_func[2].bind(); } - auto tri_p4_cb() { return m_tri_port_func[3].bind(); } - auto out_sc2_cb() { return m_out_sc2_func.bind(); } auto out_ser_tx_cb() { return m_out_sertx_func.bind(); } @@ -129,7 +123,6 @@ protected: devcb_read8::array<4> m_in_port_func; devcb_write8::array<4> m_out_port_func; - devcb_read8::array<4> m_tri_port_func; devcb_write_line m_out_sc2_func; devcb_write_line m_out_sertx_func; @@ -259,17 +252,13 @@ public: class hd6301x_cpu_device : public hd6301_cpu_device { public: - // port 5-7 I/O + // port 5-7 I/O, DDR is passed through mem_mask auto in_p5_cb() { return m_in_portx_func[0].bind(); } auto out_p5_cb() { return m_out_portx_func[0].bind(); } auto in_p6_cb() { return m_in_portx_func[1].bind(); } auto out_p6_cb() { return m_out_portx_func[1].bind(); } auto out_p7_cb() { return m_out_portx_func[2].bind(); } - // port outputs when in tri-state (high-impedance), default 0xff - auto tri_p5_cb() { return m_tri_portx_func[0].bind(); } - auto tri_p6_cb() { return m_tri_portx_func[1].bind(); } - // TODO: privatize eventually void hd6301x_io(address_map &map); @@ -318,7 +307,6 @@ protected: devcb_read8::array<2> m_in_portx_func; devcb_write8::array<3> m_out_portx_func; - devcb_read8::array<2> m_tri_portx_func; uint8_t m_portx_ddr[2]; uint8_t m_portx_data[3]; diff --git a/src/mame/namco/namcos1.cpp b/src/mame/namco/namcos1.cpp index bf576b881ea..3693c1f1ee5 100644 --- a/src/mame/namco/namcos1.cpp +++ b/src/mame/namco/namcos1.cpp @@ -169,7 +169,6 @@ Address Dir Data Name Description - Preliminary driver by: Ernesto Corvi ernesto@imagina.com @@ -372,8 +371,9 @@ u8 namcos1_state::dsw_r(offs_t offset) return 0xf0 | bitswap<4>(m_dsw_sel->output_r(), 0, 1, 2, 3); } -void namcos1_state::coin_w(u8 data) +void namcos1_state::coin_w(offs_t offset, u8 data, u8 mem_mask) { + data &= mem_mask; machine().bookkeeping().coin_lockout_global_w(BIT(~data, 0)); machine().bookkeeping().coin_counter_w(0, BIT(data, 1)); machine().bookkeeping().coin_counter_w(1, BIT(data, 2)); @@ -1019,7 +1019,6 @@ void namcos1_state::ns1(machine_config &config) m_mcu->set_addrmap(AS_PROGRAM, &namcos1_state::mcu_map); m_mcu->in_p1_cb().set_ioport("COIN"); m_mcu->out_p1_cb().set(FUNC(namcos1_state::coin_w)); - m_mcu->tri_p1_cb().set_constant(0); m_mcu->out_p2_cb().set(FUNC(namcos1_state::dac_gain_w)); NAMCO_C117(config, m_c117, 0); diff --git a/src/mame/namco/namcos1.h b/src/mame/namco/namcos1.h index c68fed0e308..aefcc5fa53b 100644 --- a/src/mame/namco/namcos1.h +++ b/src/mame/namco/namcos1.h @@ -120,7 +120,7 @@ private: void audiocpu_irq_ack_w(u8 data); void mcu_irq_ack_w(u8 data); u8 dsw_r(offs_t offset); - void coin_w(u8 data); + void coin_w(offs_t offset, u8 data, u8 mem_mask); void dac_gain_w(u8 data); void sound_bankswitch_w(u8 data); void mcu_bankswitch_w(u8 data); -- cgit v1.2.3