From a005ad31c75c6cfafcfc7063cb1d6c14931716a2 Mon Sep 17 00:00:00 2001 From: smf- Date: Fri, 25 Oct 2024 12:22:03 +0100 Subject: Added ATMEL_29C020, added support for SDP & added missing state save registrations. --- src/devices/machine/intelfsh.cpp | 60 +++++++++++++++++++++++++++++----------- src/devices/machine/intelfsh.h | 12 ++++++-- 2 files changed, 54 insertions(+), 18 deletions(-) diff --git a/src/devices/machine/intelfsh.cpp b/src/devices/machine/intelfsh.cpp index 897b1ee55be..a8bb66b4046 100644 --- a/src/devices/machine/intelfsh.cpp +++ b/src/devices/machine/intelfsh.cpp @@ -88,6 +88,7 @@ DEFINE_DEVICE_TYPE(INTEL_28F016S5, intel_28f016s5_device, "i DEFINE_DEVICE_TYPE(SHARP_LH28F016S, sharp_lh28f016s_device, "sharp_lh28f016s", "Sharp LH28F016S Flash") DEFINE_DEVICE_TYPE(SHARP_LH28F016S_16BIT, sharp_lh28f016s_16bit_device, "sharp_lh28f016s_16bit", "Sharp LH28F016S Flash (16-bit)") DEFINE_DEVICE_TYPE(ATMEL_29C010, atmel_29c010_device, "atmel_29c010", "Atmel 29C010 Flash") +DEFINE_DEVICE_TYPE(ATMEL_29C020, atmel_29c020_device, "atmel_29c020", "Atmel 29C020 Flash") DEFINE_DEVICE_TYPE(AMD_29F010, amd_29f010_device, "amd_29f010", "AMD 29F010 Flash") DEFINE_DEVICE_TYPE(AMD_29F040, amd_29f040_device, "amd_29f040", "AMD 29F040 Flash") DEFINE_DEVICE_TYPE(AMD_29F080, amd_29f080_device, "amd_29f080", "AMD 29F080 Flash") @@ -210,6 +211,9 @@ sharp_lh28f016s_16bit_device::sharp_lh28f016s_16bit_device(const machine_config atmel_29c010_device::atmel_29c010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : intelfsh8_device(mconfig, ATMEL_29C010, tag, owner, clock, 0x20000, MFG_ATMEL, 0xd5) { m_page_size = 0x80; } +atmel_29c020_device::atmel_29c020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : intelfsh8_device(mconfig, ATMEL_29C020, tag, owner, clock, 0x40000, MFG_ATMEL, 0xda) { m_page_size = 0x100; } + atmel_49f4096_device::atmel_49f4096_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : intelfsh16_device(mconfig, ATMEL_49F4096, tag, owner, clock, 0x80000, MFG_ATMEL, 0x92) { m_sector_is_16k = true; } @@ -334,8 +338,15 @@ void intelfsh_device::device_start() m_timer = timer_alloc(FUNC(intelfsh_device::delay_tick), this); save_item( NAME(m_status) ); + save_item( NAME(m_erase_sector) ); save_item( NAME(m_flash_mode) ); save_item( NAME(m_flash_master_lock) ); + save_item( NAME(m_bank) ); + save_item( NAME(m_byte_count) ); + save_item( NAME(m_sdp) ); + save_item( NAME(m_write_buffer) ); + save_item( NAME(m_write_buffer_start_address) ); + save_item( NAME(m_write_buffer_count) ); save_item( NAME(m_fast_mode) ); save_pointer( &m_data[0], "m_data", m_size); } @@ -699,8 +710,9 @@ void intelfsh_device::write_full(uint32_t address, uint32_t data) } else if( ( address & 0xffff ) == 0x5555 && ( data & 0xff ) == 0xa0 ) { - if (m_maker_id == MFG_ATMEL && m_device_id == 0xd5) + if (m_maker_id == MFG_ATMEL && (m_device_id == 0xd5 || m_device_id == 0xda)) { + m_sdp = true; m_flash_mode = FM_WRITEPAGEATMEL; m_byte_count = 0; } @@ -913,6 +925,12 @@ void intelfsh_device::write_full(uint32_t address, uint32_t data) m_status = 1 << 3; m_flash_mode = FM_ERASEAMD4; } + else if ((data & 0xff) == 0x20 && m_maker_id == MFG_ATMEL && (m_device_id == 0xd5 || m_device_id == 0xda)) + { + m_sdp = false; + m_flash_mode = FM_WRITEPAGEATMEL; + m_byte_count = 0; + } else { logerror( "unexpected %08x=%02x in FM_ERASEAMD3\n", address, data & 0xff ); @@ -995,25 +1013,35 @@ void intelfsh_device::write_full(uint32_t address, uint32_t data) m_flash_mode = FM_READSTATUS; break; case FM_WRITEPAGEATMEL: - switch( m_bits ) + if (m_byte_count == 0 && !m_sdp && (address & 0xfff) == 0x555 && (data & 0xff) == 0xaa) { - case 8: - m_data[address] = data; - break; - case 16: - m_data[address*2] = data >> 8; - m_data[address*2+1] = data; - break; - default: - logerror( "FM_WRITEPAGEATMEL not supported when m_bits == %d\n", m_bits ); - break; + m_flash_mode = FM_READAMDID1; } + else + { + switch( m_bits ) + { + case 8: + m_data[address] = data; + break; + case 16: + m_data[address*2] = data >> 8; + m_data[address*2+1] = data; + break; + default: + logerror( "FM_WRITEPAGEATMEL not supported when m_bits == %d\n", m_bits ); + break; + } - m_byte_count++; + m_byte_count++; - if (m_byte_count == m_page_size) - { - m_flash_mode = FM_NORMAL; + if (m_byte_count == m_page_size) + { + if (m_sdp) + m_flash_mode = FM_NORMAL; + + m_byte_count = 0; + } } break; case FM_CLEARPART1: diff --git a/src/devices/machine/intelfsh.h b/src/devices/machine/intelfsh.h index f525c6327b8..208c292e640 100644 --- a/src/devices/machine/intelfsh.h +++ b/src/devices/machine/intelfsh.h @@ -49,7 +49,7 @@ protected: bool m_sector_is_16k; bool m_top_boot_sector; bool m_bot_boot_sector; - uint8_t m_page_size; + uint16_t m_page_size; // internal state std::unique_ptr m_data; @@ -59,7 +59,8 @@ protected: bool m_flash_master_lock; emu_timer * m_timer; int32_t m_bank; - uint8_t m_byte_count; + uint16_t m_byte_count; + bool m_sdp; uint8_t m_write_buffer[32]; uint32_t m_write_buffer_start_address; @@ -180,6 +181,12 @@ public: amd_29lv200t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); }; +class atmel_29c020_device : public intelfsh8_device +{ +public: + atmel_29c020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); +}; + class sharp_lh28f016s_device : public intelfsh8_device { public: @@ -385,6 +392,7 @@ DECLARE_DEVICE_TYPE(INTEL_28F016S5, intel_28f016s5_device) DECLARE_DEVICE_TYPE(SHARP_LH28F016S, sharp_lh28f016s_device) DECLARE_DEVICE_TYPE(SHARP_LH28F016S_16BIT, sharp_lh28f016s_16bit_device) DECLARE_DEVICE_TYPE(ATMEL_29C010, atmel_29c010_device) +DECLARE_DEVICE_TYPE(ATMEL_29C020, atmel_29c020_device) DECLARE_DEVICE_TYPE(AMD_29F010, amd_29f010_device) DECLARE_DEVICE_TYPE(AMD_29F040, amd_29f040_device) DECLARE_DEVICE_TYPE(AMD_29F080, amd_29f080_device) -- cgit v1.2.3