From 863e5496e2a69e2e4d745baa178673a47a298791 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 14 Feb 2024 21:31:37 +0100 Subject: m6800,h8: shorthand variable types --- src/devices/cpu/h8/gt913.cpp | 32 ++-- src/devices/cpu/h8/gt913.h | 30 ++-- src/devices/cpu/h8/gt913.lst | 8 +- src/devices/cpu/h8/h8.cpp | 346 ++++++++++++++++++------------------- src/devices/cpu/h8/h8.h | 202 +++++++++++----------- src/devices/cpu/h8/h8.lst | 126 +++++++------- src/devices/cpu/h8/h83002.cpp | 14 +- src/devices/cpu/h8/h83002.h | 16 +- src/devices/cpu/h8/h83003.cpp | 14 +- src/devices/cpu/h8/h83003.h | 16 +- src/devices/cpu/h8/h83006.cpp | 14 +- src/devices/cpu/h8/h83006.h | 16 +- src/devices/cpu/h8/h83008.cpp | 10 +- src/devices/cpu/h8/h83008.h | 10 +- src/devices/cpu/h8/h83032.cpp | 16 +- src/devices/cpu/h8/h83032.h | 18 +- src/devices/cpu/h8/h83042.cpp | 16 +- src/devices/cpu/h8/h83042.h | 16 +- src/devices/cpu/h8/h83048.cpp | 18 +- src/devices/cpu/h8/h83048.h | 20 +-- src/devices/cpu/h8/h8325.cpp | 24 +-- src/devices/cpu/h8/h8325.h | 28 +-- src/devices/cpu/h8/h83337.cpp | 28 +-- src/devices/cpu/h8/h83337.h | 30 ++-- src/devices/cpu/h8/h8_adc.cpp | 34 ++-- src/devices/cpu/h8/h8_adc.h | 38 ++-- src/devices/cpu/h8/h8_dtc.cpp | 20 +-- src/devices/cpu/h8/h8_dtc.h | 20 +-- src/devices/cpu/h8/h8_intc.cpp | 54 +++--- src/devices/cpu/h8/h8_intc.h | 68 ++++---- src/devices/cpu/h8/h8_port.cpp | 35 ++-- src/devices/cpu/h8/h8_port.h | 30 ++-- src/devices/cpu/h8/h8_sci.cpp | 58 +++---- src/devices/cpu/h8/h8_sci.h | 34 ++-- src/devices/cpu/h8/h8_timer16.cpp | 118 ++++++------- src/devices/cpu/h8/h8_timer16.h | 136 +++++++-------- src/devices/cpu/h8/h8_timer8.cpp | 40 ++--- src/devices/cpu/h8/h8_timer8.h | 34 ++-- src/devices/cpu/h8/h8_watchdog.cpp | 20 +-- src/devices/cpu/h8/h8_watchdog.h | 18 +- src/devices/cpu/h8/h8h.cpp | 2 +- src/devices/cpu/h8/h8h.h | 10 +- src/devices/cpu/h8/h8s2000.cpp | 12 +- src/devices/cpu/h8/h8s2000.h | 16 +- src/devices/cpu/h8/h8s2245.cpp | 24 +-- src/devices/cpu/h8/h8s2245.h | 26 +-- src/devices/cpu/h8/h8s2320.cpp | 28 +-- src/devices/cpu/h8/h8s2320.h | 30 ++-- src/devices/cpu/h8/h8s2357.cpp | 22 +-- src/devices/cpu/h8/h8s2357.h | 22 +-- src/devices/cpu/h8/h8s2600.cpp | 2 +- src/devices/cpu/h8/h8s2600.h | 2 +- src/devices/cpu/h8/h8s2655.cpp | 14 +- src/devices/cpu/h8/h8s2655.h | 14 +- src/devices/cpu/h8/swx00.cpp | 10 +- src/devices/cpu/h8/swx00.h | 12 +- src/devices/cpu/m6800/6800dasm.cpp | 6 +- src/devices/cpu/m6800/6800dasm.h | 2 +- src/devices/cpu/m6800/6800ops.hxx | 306 ++++++++++++++++---------------- src/devices/cpu/m6800/m6800.cpp | 46 ++--- src/devices/cpu/m6800/m6800.h | 70 ++++---- src/devices/cpu/m6800/m6801.cpp | 238 ++++++++++++------------- src/devices/cpu/m6800/m6801.h | 298 ++++++++++++++++---------------- 63 files changed, 1519 insertions(+), 1518 deletions(-) diff --git a/src/devices/cpu/h8/gt913.cpp b/src/devices/cpu/h8/gt913.cpp index 862564f72c7..8b2de950f5e 100644 --- a/src/devices/cpu/h8/gt913.cpp +++ b/src/devices/cpu/h8/gt913.cpp @@ -26,7 +26,7 @@ DEFINE_DEVICE_TYPE(GT913, gt913_device, "gt913", "Casio GT913F") -gt913_device::gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +gt913_device::gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_device(mconfig, GT913, tag, owner, clock, address_map_constructor(FUNC(gt913_device::map), this)), device_mixer_interface(mconfig, *this, 2), m_rom(*this, DEVICE_SELF), @@ -54,7 +54,7 @@ void gt913_device::map(address_map &map) /* ctk530 writes here to latch LED matrix data, which generates an active high strobe on pin 99 (PLE/P16) there's otherwise no external address decoding (or the usual read/write strobes) used for the LED latches. just treat as a 16-bit write-only port for now */ - map(0xe000, 0xe001).lw16(NAME([this](uint16_t data) { do_write_port(h8_device::PORT_4, data, ~0); })); + map(0xe000, 0xe001).lw16(NAME([this](u16 data) { do_write_port(h8_device::PORT_4, data, ~0); })); map(0xfac0, 0xffbf).ram(); @@ -88,7 +88,7 @@ void gt913_device::map(address_map &map) map(0xfff0, 0xfff0).rw(m_port[0], FUNC(h8_port_device::ddr_r), FUNC(h8_port_device::ddr_w)); // port 2 DDR - ctk601 and gz70sp both seem to use only bit 0 to indicate either all inputs or all outputs // map(0xfff1, 0xfff1).rw(m_port[1], FUNC(h8_port_device::ddr_r), FUNC(h8_port_device::ddr_w)); - map(0xfff1, 0xfff1).lw8(NAME([this](uint8_t data) { m_port[1]->ddr_w(BIT(data, 0) ? 0xff : 0x00); })); + map(0xfff1, 0xfff1).lw8(NAME([this](u8 data) { m_port[1]->ddr_w(BIT(data, 0) ? 0xff : 0x00); })); map(0xfff2, 0xfff2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); map(0xfff3, 0xfff3).rw(m_port[1], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); map(0xfff4, 0xfff4).rw(m_port[2], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); @@ -121,7 +121,7 @@ void gt913_device::device_add_mconfig(machine_config &config) } -void gt913_device::uart_rate_w(uint8_t data) +void gt913_device::uart_rate_w(u8 data) { // TODO: how is SCI1 baud rate actually selected? // gz70sp writes 0x7e to ffe4 to select 31250 baud for MIDI, which doesn't seem right @@ -129,7 +129,7 @@ void gt913_device::uart_rate_w(uint8_t data) m_sci[1]->brr_w(data >> 2); } -void gt913_device::uart_control_w(offs_t offset, uint8_t data) +void gt913_device::uart_control_w(offs_t offset, u8 data) { const unsigned num = BIT(offset, 2); /* @@ -140,13 +140,13 @@ void gt913_device::uart_control_w(offs_t offset, uint8_t data) m_sci[num]->scr_w((data & 0x0f) << 4); } -uint8_t gt913_device::uart_control_r(offs_t offset) +u8 gt913_device::uart_control_r(offs_t offset) { const unsigned num = BIT(offset, 2); return (m_sci[num]->ssr_r() & 0xf0) | (m_sci[num]->scr_r() >> 4); } -void gt913_device::syscr_w(uint8_t data) +void gt913_device::syscr_w(u8 data) { // NMI active edge m_intc->set_nmi_edge(BIT(data, 2)); @@ -154,22 +154,22 @@ void gt913_device::syscr_w(uint8_t data) m_syscr = data; } -uint8_t gt913_device::syscr_r() +u8 gt913_device::syscr_r() { return m_syscr; } -void gt913_device::data_w(offs_t offset, uint8_t data) +void gt913_device::data_w(offs_t offset, u8 data) { m_data.write_byte(offset | (m_banknum & 0xff) << 14, data); } -uint8_t gt913_device::data_r(offs_t offset) +u8 gt913_device::data_r(offs_t offset) { return m_data.read_byte(offset | (m_banknum & 0xff) << 14); } -uint8_t gt913_device::read8ib(uint32_t adr) +u8 gt913_device::read8ib(u32 adr) { if(BIT(m_syscr, 0)) // indirect bank disabled @@ -182,7 +182,7 @@ uint8_t gt913_device::read8ib(uint32_t adr) return m_data.read_byte(adr | ((m_banknum & 0x3f) << 16)); } -void gt913_device::write8ib(uint32_t adr, uint8_t data) +void gt913_device::write8ib(u32 adr, u8 data) { if(BIT(m_syscr, 0)) // indirect bank disabled @@ -195,7 +195,7 @@ void gt913_device::write8ib(uint32_t adr, uint8_t data) m_data.write_byte(adr | ((m_banknum & 0x3f) << 16), data); } -uint16_t gt913_device::read16ib(uint32_t adr) +u16 gt913_device::read16ib(u32 adr) { adr &= ~1; @@ -210,7 +210,7 @@ uint16_t gt913_device::read16ib(uint32_t adr) return m_data.read_word(adr | ((m_banknum & 0x3f) << 16)); } -void gt913_device::write16ib(uint32_t adr, uint16_t data) +void gt913_device::write16ib(u32 adr, u16 data) { adr &= ~1; @@ -243,9 +243,9 @@ void gt913_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void gt913_device::internal_update(uint64_t current_time) +void gt913_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_sci[0]->internal_update(current_time)); add_event(event_time, m_sci[1]->internal_update(current_time)); diff --git a/src/devices/cpu/h8/gt913.h b/src/devices/cpu/h8/gt913.h index 30151a785c4..5686915bafc 100644 --- a/src/devices/cpu/h8/gt913.h +++ b/src/devices/cpu/h8/gt913.h @@ -23,7 +23,7 @@ class gt913_device : public h8_device, public device_mixer_interface { public: - gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); virtual std::unique_ptr create_disassembler() override; @@ -36,26 +36,26 @@ public: auto read_port4() { return m_read_port [PORT_4].bind(); } auto write_port4() { return m_write_port[PORT_4].bind(); } - void uart_rate_w(uint8_t data); - void uart_control_w(offs_t offset, uint8_t data); - uint8_t uart_control_r(offs_t offset); + void uart_rate_w(u8 data); + void uart_control_w(offs_t offset, u8 data); + u8 uart_control_r(offs_t offset); - void data_w(offs_t offset, uint8_t data); - uint8_t data_r(offs_t offset); + void data_w(offs_t offset, u8 data); + u8 data_r(offs_t offset); - void syscr_w(uint8_t data); - uint8_t syscr_r(); + void syscr_w(u8 data); + u8 syscr_r(); protected: /* indirect reads/writes with banking support */ - uint8_t read8ib(uint32_t adr); - void write8ib(uint32_t adr, uint8_t data); - uint16_t read16ib(uint32_t adr); - void write16ib(uint32_t adr, uint16_t data); + u8 read8ib(u32 adr); + void write8ib(u32 adr, u8 data); + u16 read16ib(u32 adr); + void write16ib(u32 adr, u16 data); virtual void update_irq_filter() override; virtual void interrupt_taken() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void irq_setup() override; virtual void execute_set_input(int inputnum, int state) override; @@ -90,8 +90,8 @@ protected: address_space_config m_data_config; memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_data; - uint16_t m_banknum; - uint8_t m_syscr; + u16 m_banknum; + u8 m_syscr; required_device m_intc; diff --git a/src/devices/cpu/h8/gt913.lst b/src/devices/cpu/h8/gt913.lst index 6587d86babc..12d26888462 100644 --- a/src/devices/cpu/h8/gt913.lst +++ b/src/devices/cpu/h8/gt913.lst @@ -186,7 +186,7 @@ macro prefetch_noirq 6e00 ff80 0 mov.b r16d16h r8l g prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]); internal(1); m_TMP2 = read8ib(m_TMP1); set_nzv8(m_TMP2); @@ -195,7 +195,7 @@ macro prefetch_noirq 6f00 ff80 0 mov.w r16d16h r16l g prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]); internal(1); m_TMP2 = read16ib(m_TMP1); set_nzv16(m_TMP2); @@ -256,7 +256,7 @@ macro prefetch_noirq 7e00 ff80 0 mov.b r8l r16d16h g prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]); m_TMP2 = r8_r(m_IR[0]); set_nzv8(m_TMP2); internal(1); @@ -265,7 +265,7 @@ macro prefetch_noirq 7f00 ff80 0 mov.w r16l r16d16h g prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]); m_TMP2 = r16_r(m_IR[0]); set_nzv16(m_TMP2); internal(1); diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp index c007fa4575f..8e68c2a7b71 100644 --- a/src/devices/cpu/h8/h8.cpp +++ b/src/devices/cpu/h8/h8.cpp @@ -24,7 +24,7 @@ #include "h8_port.h" #include "h8d.h" -h8_device::h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) : +h8_device::h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) : cpu_device(mconfig, type, tag, owner, clock), device_nvram_interface(mconfig, *this), m_program_config("program", ENDIANNESS_BIG, 16, 16, 0, map_delegate), @@ -82,7 +82,7 @@ void h8_device::port_default_w(int port, u8 data) void h8_device::device_config_complete() { - uint8_t addrbits = m_mode_advanced ? (m_mode_a20 ? 20 : 24) : 16; + u8 addrbits = m_mode_advanced ? (m_mode_a20 ? 20 : 24) : 16; m_program_config.m_addr_width = m_program_config.m_logaddr_width = addrbits; } @@ -91,14 +91,14 @@ void h8_device::device_start() space(AS_PROGRAM).cache(m_cache); space(AS_PROGRAM).specific(m_program); - uint32_t pcmask = m_mode_advanced ? 0xffffff : 0xffff; - state_add(H8_PC, "PC", + u32 pcmask = m_mode_advanced ? 0xffffff : 0xffff; + state_add(H8_PC, "PC", [this]() { return m_NPC; }, - [this](uint32_t pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); } + [this](u32 pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); } ).mask(pcmask); - state_add(STATE_GENPC, "GENPC", + state_add(STATE_GENPC, "GENPC", [this]() { return m_NPC; }, - [this](uint32_t pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); } + [this](u32 pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); } ).mask(pcmask).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_PPC).mask(pcmask).noshow(); state_add(H8_CCR, "CCR", m_CCR); @@ -225,7 +225,7 @@ bool h8_device::nvram_write(util::write_stream &file) // I/O ports for(h8_port_device &port : h8_port_device_enumerator(*this)) { - if (!port.nvram_write(file)) + if(!port.nvram_write(file)) return false; } @@ -244,7 +244,7 @@ bool h8_device::nvram_read(util::read_stream &file) // I/O ports for(h8_port_device &port : h8_port_device_enumerator(*this)) { - if (!port.nvram_read(file)) + if(!port.nvram_read(file)) return false; } @@ -317,7 +317,7 @@ void h8_device::request_state(int state) m_requested_state = state; } -void h8_device::recompute_bcount(uint64_t event_time) +void h8_device::recompute_bcount(u64 event_time) { if(!event_time || event_time >= total_cycles() + m_icount) { m_bcount = 0; @@ -364,7 +364,7 @@ void h8_device::execute_run() } } -void h8_device::add_event(uint64_t &event_time, uint64_t new_event) +void h8_device::add_event(u64 &event_time, u64 new_event) { if(!new_event) return; @@ -474,31 +474,31 @@ void h8_device::state_string_export(const device_state_entry &entry, std::string } } -uint16_t h8_device::read16i(uint32_t adr) +u16 h8_device::read16i(u32 adr) { m_icount -= 2; return m_cache.read_word(adr & ~1); } -uint8_t h8_device::read8(uint32_t adr) +u8 h8_device::read8(u32 adr) { m_icount -= 2; return m_program.read_byte(adr); } -void h8_device::write8(uint32_t adr, uint8_t data) +void h8_device::write8(u32 adr, u8 data) { m_icount -= 2; m_program.write_byte(adr, data); } -uint16_t h8_device::read16(uint32_t adr) +u16 h8_device::read16(u32 adr) { m_icount -= 2; return m_program.read_word(adr & ~1); } -void h8_device::write16(uint32_t adr, uint16_t data) +void h8_device::write16(u32 adr, u16 data) { m_icount -= 2; m_program.write_word(adr & ~1, data); @@ -539,7 +539,7 @@ void h8_device::prefetch_done_noirq() void h8_device::prefetch_done_notrace() { prefetch_done(); - if (m_inst_state == STATE_TRACE) + if(m_inst_state == STATE_TRACE) m_inst_state = m_IR[0] = m_PIR; } @@ -584,9 +584,9 @@ int h8_device::trapa_setup() throw emu_fatalerror("%s: Trapa setup called but unimplemented.\n", tag()); } -uint8_t h8_device::do_addx8(uint8_t v1, uint8_t v2) +u8 h8_device::do_addx8(u8 v1, u8 v2) { - uint16_t res = v1 + v2 + (m_CCR & F_C ? 1 : 0); + u16 res = v1 + v2 + (m_CCR & F_C ? 1 : 0); m_CCR &= ~(F_N|F_V|F_C); if(m_has_hc) { @@ -594,9 +594,9 @@ uint8_t h8_device::do_addx8(uint8_t v1, uint8_t v2) if(((v1 & 0xf) + (v2 & 0xf) + (m_CCR & F_C ? 1 : 0)) & 0x10) m_CCR |= F_H; } - if(uint8_t(res)) + if(u8(res)) m_CCR &= ~F_Z; - if(int8_t(res) < 0) + if(s8(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; @@ -605,9 +605,9 @@ uint8_t h8_device::do_addx8(uint8_t v1, uint8_t v2) return res; } -uint8_t h8_device::do_subx8(uint8_t v1, uint8_t v2) +u8 h8_device::do_subx8(u8 v1, u8 v2) { - uint16_t res = v1 - v2 - (m_CCR & F_C ? 1 : 0); + u16 res = v1 - v2 - (m_CCR & F_C ? 1 : 0); m_CCR &= ~(F_N|F_V|F_C); if(m_has_hc) { @@ -615,9 +615,9 @@ uint8_t h8_device::do_subx8(uint8_t v1, uint8_t v2) if(((v1 & 0xf) - (v2 & 0xf) - (m_CCR & F_C ? 1 : 0)) & 0x10) m_CCR |= F_H; } - if(uint8_t(res)) + if(u8(res)) m_CCR &= ~F_Z; - if(int8_t(res) < 0) + if(s8(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; @@ -626,48 +626,48 @@ uint8_t h8_device::do_subx8(uint8_t v1, uint8_t v2) return res; } -uint8_t h8_device::do_inc8(uint8_t v1, uint8_t v2) +u8 h8_device::do_inc8(u8 v1, u8 v2) { - uint8_t res = v1 + v2; + u8 res = v1 + v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int8_t(res) < 0) + else if(s8(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; return res; } -uint16_t h8_device::do_inc16(uint16_t v1, uint16_t v2) +u16 h8_device::do_inc16(u16 v1, u16 v2) { - uint16_t res = v1 + v2; + u16 res = v1 + v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int16_t(res) < 0) + else if(s16(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x8000) m_CCR |= F_V; return res; } -uint32_t h8_device::do_inc32(uint32_t v1, uint32_t v2) +u32 h8_device::do_inc32(u32 v1, u32 v2) { - uint32_t res = v1 + v2; + u32 res = v1 + v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int32_t(res) < 0) + else if(s32(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x80000000) m_CCR |= F_V; return res; } -uint8_t h8_device::do_add8(uint8_t v1, uint8_t v2) +u8 h8_device::do_add8(u8 v1, u8 v2) { - uint16_t res = v1 + v2; + u16 res = v1 + v2; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -675,9 +675,9 @@ uint8_t h8_device::do_add8(uint8_t v1, uint8_t v2) if(((v1 & 0xf) + (v2 & 0xf)) & 0x10) m_CCR |= F_H; } - if(!uint8_t(res)) + if(!u8(res)) m_CCR |= F_Z; - else if(int8_t(res) < 0) + else if(s8(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; @@ -686,9 +686,9 @@ uint8_t h8_device::do_add8(uint8_t v1, uint8_t v2) return res; } -uint16_t h8_device::do_add16(uint16_t v1, uint16_t v2) +u16 h8_device::do_add16(u16 v1, u16 v2) { - uint32_t res = v1 + v2; + u32 res = v1 + v2; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -696,9 +696,9 @@ uint16_t h8_device::do_add16(uint16_t v1, uint16_t v2) if(((v1 & 0xfff) + (v2 & 0xfff)) & 0x1000) m_CCR |= F_H; } - if(!uint16_t(res)) + if(!u16(res)) m_CCR |= F_Z; - else if(int16_t(res) < 0) + else if(s16(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x8000) m_CCR |= F_V; @@ -707,9 +707,9 @@ uint16_t h8_device::do_add16(uint16_t v1, uint16_t v2) return res; } -uint32_t h8_device::do_add32(uint32_t v1, uint32_t v2) +u32 h8_device::do_add32(u32 v1, u32 v2) { - uint64_t res = uint64_t(v1) + uint64_t(v2); + u64 res = u64(v1) + u64(v2); m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -717,9 +717,9 @@ uint32_t h8_device::do_add32(uint32_t v1, uint32_t v2) if(((v1 & 0xfffffff) + (v2 & 0xfffffff)) & 0x10000000) m_CCR |= F_H; } - if(!uint32_t(res)) + if(!u32(res)) m_CCR |= F_Z; - else if(int32_t(res) < 0) + else if(s32(res) < 0) m_CCR |= F_N; if(~(v1^v2) & (v1^res) & 0x80000000) m_CCR |= F_V; @@ -728,48 +728,48 @@ uint32_t h8_device::do_add32(uint32_t v1, uint32_t v2) return res; } -uint8_t h8_device::do_dec8(uint8_t v1, uint8_t v2) +u8 h8_device::do_dec8(u8 v1, u8 v2) { - uint8_t res = v1 - v2; + u8 res = v1 - v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int8_t(res) < 0) + else if(s8(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; return res; } -uint16_t h8_device::do_dec16(uint16_t v1, uint16_t v2) +u16 h8_device::do_dec16(u16 v1, u16 v2) { - uint16_t res = v1 - v2; + u16 res = v1 - v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int16_t(res) < 0) + else if(s16(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x8000) m_CCR |= F_V; return res; } -uint32_t h8_device::do_dec32(uint32_t v1, uint32_t v2) +u32 h8_device::do_dec32(u32 v1, u32 v2) { - uint32_t res = v1 - v2; + u32 res = v1 - v2; m_CCR &= ~(F_N|F_V|F_Z); if(!res) m_CCR |= F_Z; - else if(int32_t(res) < 0) + else if(s32(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x80000000) m_CCR |= F_V; return res; } -uint8_t h8_device::do_sub8(uint8_t v1, uint8_t v2) +u8 h8_device::do_sub8(u8 v1, u8 v2) { - uint16_t res = v1 - v2; + u16 res = v1 - v2; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -777,9 +777,9 @@ uint8_t h8_device::do_sub8(uint8_t v1, uint8_t v2) if(((v1 & 0xf) - (v2 & 0xf)) & 0x10) m_CCR |= F_H; } - if(!uint8_t(res)) + if(!u8(res)) m_CCR |= F_Z; - else if(int8_t(res) < 0) + else if(s8(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x80) m_CCR |= F_V; @@ -788,9 +788,9 @@ uint8_t h8_device::do_sub8(uint8_t v1, uint8_t v2) return res; } -uint16_t h8_device::do_sub16(uint16_t v1, uint16_t v2) +u16 h8_device::do_sub16(u16 v1, u16 v2) { - uint32_t res = v1 - v2; + u32 res = v1 - v2; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -798,9 +798,9 @@ uint16_t h8_device::do_sub16(uint16_t v1, uint16_t v2) if(((v1 & 0xfff) - (v2 & 0xfff)) & 0x1000) m_CCR |= F_H; } - if(!uint16_t(res)) + if(!u16(res)) m_CCR |= F_Z; - else if(int16_t(res) < 0) + else if(s16(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x8000) m_CCR |= F_V; @@ -809,9 +809,9 @@ uint16_t h8_device::do_sub16(uint16_t v1, uint16_t v2) return res; } -uint32_t h8_device::do_sub32(uint32_t v1, uint32_t v2) +u32 h8_device::do_sub32(u32 v1, u32 v2) { - uint64_t res = uint64_t(v1) - uint64_t(v2); + u64 res = u64(v1) - u64(v2); m_CCR &= ~(F_N|F_V|F_Z|F_C); if(m_has_hc) { @@ -819,9 +819,9 @@ uint32_t h8_device::do_sub32(uint32_t v1, uint32_t v2) if(((v1 & 0xfffffff) - (v2 & 0xfffffff)) & 0x10000000) m_CCR |= F_H; } - if(!uint32_t(res)) + if(!u32(res)) m_CCR |= F_Z; - else if(int32_t(res) < 0) + else if(s32(res) < 0) m_CCR |= F_N; if((v1^v2) & (v1^res) & 0x80000000) m_CCR |= F_V; @@ -830,7 +830,7 @@ uint32_t h8_device::do_sub32(uint32_t v1, uint32_t v2) return res; } -uint8_t h8_device::do_shal8(uint8_t v) +u8 h8_device::do_shal8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80) @@ -840,12 +840,12 @@ uint8_t h8_device::do_shal8(uint8_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_shal16(uint16_t v) +u16 h8_device::do_shal16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x8000) @@ -855,12 +855,12 @@ uint16_t h8_device::do_shal16(uint16_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_shal32(uint32_t v) +u32 h8_device::do_shal32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80000000) @@ -870,12 +870,12 @@ uint32_t h8_device::do_shal32(uint32_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_shar8(uint8_t v) +u8 h8_device::do_shar8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -890,7 +890,7 @@ uint8_t h8_device::do_shar8(uint8_t v) return v; } -uint16_t h8_device::do_shar16(uint16_t v) +u16 h8_device::do_shar16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -905,7 +905,7 @@ uint16_t h8_device::do_shar16(uint16_t v) return v; } -uint32_t h8_device::do_shar32(uint32_t v) +u32 h8_device::do_shar32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -920,7 +920,7 @@ uint32_t h8_device::do_shar32(uint32_t v) return v; } -uint8_t h8_device::do_shll8(uint8_t v) +u8 h8_device::do_shll8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80) @@ -928,12 +928,12 @@ uint8_t h8_device::do_shll8(uint8_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_shll16(uint16_t v) +u16 h8_device::do_shll16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x8000) @@ -941,12 +941,12 @@ uint16_t h8_device::do_shll16(uint16_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_shll32(uint32_t v) +u32 h8_device::do_shll32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80000000) @@ -954,12 +954,12 @@ uint32_t h8_device::do_shll32(uint32_t v) v <<= 1; if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_shlr8(uint8_t v) +u8 h8_device::do_shlr8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -970,7 +970,7 @@ uint8_t h8_device::do_shlr8(uint8_t v) return v; } -uint16_t h8_device::do_shlr16(uint16_t v) +u16 h8_device::do_shlr16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -981,7 +981,7 @@ uint16_t h8_device::do_shlr16(uint16_t v) return v; } -uint32_t h8_device::do_shlr32(uint32_t v) +u32 h8_device::do_shlr32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 1) @@ -992,7 +992,7 @@ uint32_t h8_device::do_shlr32(uint32_t v) return v; } -uint8_t h8_device::do_shal2_8(uint8_t v) +u8 h8_device::do_shal2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40) @@ -1003,12 +1003,12 @@ uint8_t h8_device::do_shal2_8(uint8_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_shal2_16(uint16_t v) +u16 h8_device::do_shal2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x4000) @@ -1019,12 +1019,12 @@ uint16_t h8_device::do_shal2_16(uint16_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_shal2_32(uint32_t v) +u32 h8_device::do_shal2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40000000) @@ -1035,12 +1035,12 @@ uint32_t h8_device::do_shal2_32(uint32_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_shar2_8(uint8_t v) +u8 h8_device::do_shar2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1055,7 +1055,7 @@ uint8_t h8_device::do_shar2_8(uint8_t v) return v; } -uint16_t h8_device::do_shar2_16(uint16_t v) +u16 h8_device::do_shar2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1070,7 +1070,7 @@ uint16_t h8_device::do_shar2_16(uint16_t v) return v; } -uint32_t h8_device::do_shar2_32(uint32_t v) +u32 h8_device::do_shar2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1085,7 +1085,7 @@ uint32_t h8_device::do_shar2_32(uint32_t v) return v; } -uint8_t h8_device::do_shll2_8(uint8_t v) +u8 h8_device::do_shll2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40) @@ -1093,12 +1093,12 @@ uint8_t h8_device::do_shll2_8(uint8_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_shll2_16(uint16_t v) +u16 h8_device::do_shll2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x4000) @@ -1106,12 +1106,12 @@ uint16_t h8_device::do_shll2_16(uint16_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_shll2_32(uint32_t v) +u32 h8_device::do_shll2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40000000) @@ -1119,12 +1119,12 @@ uint32_t h8_device::do_shll2_32(uint32_t v) v <<= 2; if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_shlr2_8(uint8_t v) +u8 h8_device::do_shlr2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1135,7 +1135,7 @@ uint8_t h8_device::do_shlr2_8(uint8_t v) return v; } -uint16_t h8_device::do_shlr2_16(uint16_t v) +u16 h8_device::do_shlr2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1146,7 +1146,7 @@ uint16_t h8_device::do_shlr2_16(uint16_t v) return v; } -uint32_t h8_device::do_shlr2_32(uint32_t v) +u32 h8_device::do_shlr2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 2) @@ -1157,7 +1157,7 @@ uint32_t h8_device::do_shlr2_32(uint32_t v) return v; } -uint8_t h8_device::do_rotl8(uint8_t v) +u8 h8_device::do_rotl8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80) @@ -1165,12 +1165,12 @@ uint8_t h8_device::do_rotl8(uint8_t v) v = (v << 1) | (v >> 7); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotl16(uint16_t v) +u16 h8_device::do_rotl16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x8000) @@ -1178,12 +1178,12 @@ uint16_t h8_device::do_rotl16(uint16_t v) v = (v << 1) | (v >> 15); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotl32(uint32_t v) +u32 h8_device::do_rotl32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80000000) @@ -1191,12 +1191,12 @@ uint32_t h8_device::do_rotl32(uint32_t v) v = (v << 1) | (v >> 31); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotr8(uint8_t v) +u8 h8_device::do_rotr8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x01) @@ -1204,12 +1204,12 @@ uint8_t h8_device::do_rotr8(uint8_t v) v = (v << 7) | (v >> 1); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotr16(uint16_t v) +u16 h8_device::do_rotr16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x0001) @@ -1217,12 +1217,12 @@ uint16_t h8_device::do_rotr16(uint16_t v) v = (v << 15) | (v >> 1); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotr32(uint32_t v) +u32 h8_device::do_rotr32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x00000001) @@ -1230,96 +1230,96 @@ uint32_t h8_device::do_rotr32(uint32_t v) v = (v << 31) | (v >> 1); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotxl8(uint8_t v) +u8 h8_device::do_rotxl8(u8 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80) m_CCR |= F_C; v = (v << 1) | c; if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotxl16(uint16_t v) +u16 h8_device::do_rotxl16(u16 v) { - uint16_t c = m_CCR & F_C ? 1 : 0; + u16 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x8000) m_CCR |= F_C; v = (v << 1) | c; if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotxl32(uint32_t v) +u32 h8_device::do_rotxl32(u32 v) { - uint32_t c = m_CCR & F_C ? 1 : 0; + u32 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x80000000) m_CCR |= F_C; v = (v << 1) | c; if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotxr8(uint8_t v) +u8 h8_device::do_rotxr8(u8 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x01) m_CCR |= F_C; v = (v >> 1) | (c << 7); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotxr16(uint16_t v) +u16 h8_device::do_rotxr16(u16 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x0001) m_CCR |= F_C; v = (v >> 1) | (c << 15); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotxr32(uint32_t v) +u32 h8_device::do_rotxr32(u32 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x00000001) m_CCR |= F_C; v = (v >> 1) | (c << 31); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotl2_8(uint8_t v) +u8 h8_device::do_rotl2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40) @@ -1327,12 +1327,12 @@ uint8_t h8_device::do_rotl2_8(uint8_t v) v = (v << 2) | (v >> 6); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotl2_16(uint16_t v) +u16 h8_device::do_rotl2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x4000) @@ -1340,12 +1340,12 @@ uint16_t h8_device::do_rotl2_16(uint16_t v) v = (v << 2) | (v >> 14); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotl2_32(uint32_t v) +u32 h8_device::do_rotl2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40000000) @@ -1353,12 +1353,12 @@ uint32_t h8_device::do_rotl2_32(uint32_t v) v = (v << 2) | (v >> 30); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotr2_8(uint8_t v) +u8 h8_device::do_rotr2_8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x02) @@ -1366,12 +1366,12 @@ uint8_t h8_device::do_rotr2_8(uint8_t v) v = (v << 6) | (v >> 2); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotr2_16(uint16_t v) +u16 h8_device::do_rotr2_16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x0002) @@ -1379,12 +1379,12 @@ uint16_t h8_device::do_rotr2_16(uint16_t v) v = (v << 14) | (v >> 2); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotr2_32(uint32_t v) +u32 h8_device::do_rotr2_32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x00000002) @@ -1392,137 +1392,137 @@ uint32_t h8_device::do_rotr2_32(uint32_t v) v = (v << 30) | (v >> 2); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotxl2_8(uint8_t v) +u8 h8_device::do_rotxl2_8(u8 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40) m_CCR |= F_C; v = (v << 2) | (c << 1) | (v >> 7); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotxl2_16(uint16_t v) +u16 h8_device::do_rotxl2_16(u16 v) { - uint16_t c = m_CCR & F_C ? 1 : 0; + u16 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x4000) m_CCR |= F_C; v = (v << 2) | (c << 1) | (v >> 15); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotxl2_32(uint32_t v) +u32 h8_device::do_rotxl2_32(u32 v) { - uint32_t c = m_CCR & F_C ? 1 : 0; + u32 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x40000000) m_CCR |= F_C; v = (v << 2) | (c << 1) | (v >> 31); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -uint8_t h8_device::do_rotxr2_8(uint8_t v) +u8 h8_device::do_rotxr2_8(u8 v) { - uint8_t c = m_CCR & F_C ? 1 : 0; + u8 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x02) m_CCR |= F_C; v = (v >> 2) | (c << 6) | (v << 7); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; return v; } -uint16_t h8_device::do_rotxr2_16(uint16_t v) +u16 h8_device::do_rotxr2_16(u16 v) { - uint16_t c = m_CCR & F_C ? 1 : 0; + u16 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x0002) m_CCR |= F_C; v = (v >> 2) | (c << 14) | (v << 15); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; return v; } -uint32_t h8_device::do_rotxr2_32(uint32_t v) +u32 h8_device::do_rotxr2_32(u32 v) { - uint32_t c = m_CCR & F_C ? 1 : 0; + u32 c = m_CCR & F_C ? 1 : 0; m_CCR &= ~(F_N|F_V|F_Z|F_C); if(v & 0x00000002) m_CCR |= F_C; v = (v >> 2) | (c << 30) | (v << 31); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; return v; } -void h8_device::set_nzv8(uint8_t v) +void h8_device::set_nzv8(u8 v) { m_CCR &= ~(F_N|F_V|F_Z); if(!v) m_CCR |= F_Z; - else if(int8_t(v) < 0) + else if(s8(v) < 0) m_CCR |= F_N; } -void h8_device::set_nzv16(uint16_t v) +void h8_device::set_nzv16(u16 v) { m_CCR &= ~(F_N|F_V|F_Z); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; } -void h8_device::set_nzv32(uint32_t v) +void h8_device::set_nzv32(u32 v) { m_CCR &= ~(F_N|F_V|F_Z); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; } -void h8_device::set_nz16(uint16_t v) +void h8_device::set_nz16(u16 v) { m_CCR &= ~(F_N|F_Z); if(!v) m_CCR |= F_Z; - else if(int16_t(v) < 0) + else if(s16(v) < 0) m_CCR |= F_N; } -void h8_device::set_nz32(uint32_t v) +void h8_device::set_nz32(u32 v) { m_CCR &= ~(F_N|F_Z); if(!v) m_CCR |= F_Z; - else if(int32_t(v) < 0) + else if(s32(v) < 0) m_CCR |= F_N; } diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h index aab2c76d3e3..ab59c2c2e7c 100644 --- a/src/devices/cpu/h8/h8.h +++ b/src/devices/cpu/h8/h8.h @@ -46,7 +46,7 @@ public: template void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); } void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true) - void nvram_set_default_value(uint8_t val) { m_nvram_defval = val; } // default is 0 + void nvram_set_default_value(u16 val) { m_nvram_defval = val; } // default is 0 auto standby_cb() { return m_standby_cb.bind(); } // notifier (not an output pin) int standby() { return suspended(SUSPEND_REASON_CLOCK) ? 1 : 0; } @@ -61,7 +61,7 @@ public: u16 do_read_adc(int port) { return m_read_adc[port](); } u8 do_read_port(int port) { return m_read_port[port](); } - void do_write_port(int port, uint8_t data, uint8_t ddr) { m_write_port[port](0, data, ddr); } + void do_write_port(int port, u8 data, u8 ddr) { m_write_port[port](0, data, ddr); } void do_sci_tx(int sci, int state) { m_sci_tx[sci](state); } void do_sci_clk(int sci, int state) { m_sci_clk[sci](state); } @@ -106,7 +106,7 @@ protected: EXR_I = 0x07 }; - h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate); + h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate); // device_t implementation virtual void device_config_complete() override; @@ -115,9 +115,9 @@ protected: // device_execute_interface implementation virtual bool cpu_is_interruptible() const override { return true; } - virtual uint32_t execute_min_cycles() const noexcept override { return 2; } - virtual uint32_t execute_max_cycles() const noexcept override { return 12; } - virtual uint32_t execute_input_lines() const noexcept override { return 0; } + virtual u32 execute_min_cycles() const noexcept override { return 2; } + virtual u32 execute_max_cycles() const noexcept override { return 12; } + virtual u32 execute_input_lines() const noexcept override { return 0; } virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; } virtual void execute_run() override; @@ -140,7 +140,7 @@ protected: address_space_config m_program_config; memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache; memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_program; - optional_shared_ptr m_internal_ram; // for nvram + optional_shared_ptr m_internal_ram; // for nvram devcb_read16::array<8> m_read_adc; devcb_read8::array m_read_port; devcb_write8::array m_write_port; @@ -154,18 +154,18 @@ protected: int m_current_dma; h8_dtc_state *m_current_dtc; - uint32_t m_PPC; // previous program counter - uint32_t m_NPC; // next start-of-instruction program counter - uint32_t m_PC; // program counter - uint16_t m_PIR; // Prefetched word - uint16_t m_IR[5]; // Fetched instruction - uint16_t m_R[16]; // Rn (0-7), En (8-15, h8-300h+) - uint8_t m_EXR; // Interrupt/trace register (h8s/2000+) - uint8_t m_CCR; // Condition-code register - int64_t m_MAC; // Multiply accumulator (h8s/2600+) - uint8_t m_MACF; // MAC flags (h8s/2600+) - uint32_t m_TMP1, m_TMP2; - uint32_t m_TMPR; // For debugger ER register import + u32 m_PPC; // previous program counter + u32 m_NPC; // next start-of-instruction program counter + u32 m_PC; // program counter + u16 m_PIR; // Prefetched word + u16 m_IR[5]; // Fetched instruction + u16 m_R[16]; // Rn (0-7), En (8-15, h8-300h+) + u8 m_EXR; // Interrupt/trace register (h8s/2000+) + u8 m_CCR; // Condition-code register + s64 m_MAC; // Multiply accumulator (h8s/2600+) + u8 m_MACF; // MAC flags (h8s/2600+) + u32 m_TMP1, m_TMP2; + u32 m_TMPR; // For debugger ER register import bool m_has_exr, m_has_mac, m_has_trace, m_supports_advanced, m_mode_advanced, m_mode_a20, m_mac_saturating; bool m_has_hc; // GT913's CCR bit 5 is I, not H @@ -176,28 +176,28 @@ protected: int m_irq_level, m_taken_irq_level; bool m_irq_required, m_irq_nmi; bool m_standby_pending; - uint16_t m_nvram_defval; + u16 m_nvram_defval; bool m_nvram_battery; virtual void do_exec_full(); virtual void do_exec_partial(); - static void add_event(uint64_t &event_time, uint64_t new_event); + static void add_event(u64 &event_time, u64 new_event); virtual bool exr_in_stack() const; virtual void update_irq_filter() = 0; virtual void interrupt_taken() = 0; - virtual void internal_update(uint64_t current_time) = 0; - void recompute_bcount(uint64_t event_time); + virtual void internal_update(u64 current_time) = 0; + void recompute_bcount(u64 event_time); virtual int trace_setup(); virtual int trapa_setup(); virtual void irq_setup() = 0; - virtual uint16_t read16i(uint32_t adr); - virtual uint8_t read8(uint32_t adr); - virtual void write8(uint32_t adr, uint8_t data); - virtual uint16_t read16(uint32_t adr); - virtual void write16(uint32_t adr, uint16_t data); + virtual u16 read16i(u32 adr); + virtual u8 read8(u32 adr); + virtual void write8(u32 adr, u8 data); + virtual u16 read16(u32 adr); + virtual void write16(u32 adr, u16 data); virtual void internal(int cycles); - void prefetch_switch(uint32_t pc, uint16_t ir) { m_NPC = pc & 0xffffff; m_PC = pc+2; m_PIR = ir; } + void prefetch_switch(u32 pc, u16 ir) { m_NPC = pc & 0xffffff; m_PC = pc+2; m_PIR = ir; } void prefetch_done(); void prefetch_done_noirq(); void prefetch_done_notrace(); @@ -207,104 +207,104 @@ protected: u8 port_default_r(int port); void port_default_w(int port, u8 data); - uint8_t do_addx8(uint8_t a, uint8_t b); - uint8_t do_subx8(uint8_t a, uint8_t b); + u8 do_addx8(u8 a, u8 b); + u8 do_subx8(u8 a, u8 b); - uint8_t do_inc8(uint8_t a, uint8_t b); - uint16_t do_inc16(uint16_t a, uint16_t b); - uint32_t do_inc32(uint32_t a, uint32_t b); + u8 do_inc8(u8 a, u8 b); + u16 do_inc16(u16 a, u16 b); + u32 do_inc32(u32 a, u32 b); - uint8_t do_add8(uint8_t a, uint8_t b); - uint16_t do_add16(uint16_t a, uint16_t b); - uint32_t do_add32(uint32_t a, uint32_t b); + u8 do_add8(u8 a, u8 b); + u16 do_add16(u16 a, u16 b); + u32 do_add32(u32 a, u32 b); - uint8_t do_dec8(uint8_t a, uint8_t b); - uint16_t do_dec16(uint16_t a, uint16_t b); - uint32_t do_dec32(uint32_t a, uint32_t b); + u8 do_dec8(u8 a, u8 b); + u16 do_dec16(u16 a, u16 b); + u32 do_dec32(u32 a, u32 b); - uint8_t do_sub8(uint8_t a, uint8_t b); - uint16_t do_sub16(uint16_t a, uint16_t b); - uint32_t do_sub32(uint32_t a, uint32_t b); + u8 do_sub8(u8 a, u8 b); + u16 do_sub16(u16 a, u16 b); + u32 do_sub32(u32 a, u32 b); - uint8_t do_shal8(uint8_t v); - uint16_t do_shal16(uint16_t v); - uint32_t do_shal32(uint32_t v); + u8 do_shal8(u8 v); + u16 do_shal16(u16 v); + u32 do_shal32(u32 v); - uint8_t do_shar8(uint8_t v); - uint16_t do_shar16(uint16_t v); - uint32_t do_shar32(uint32_t v); + u8 do_shar8(u8 v); + u16 do_shar16(u16 v); + u32 do_shar32(u32 v); - uint8_t do_shll8(uint8_t v); - uint16_t do_shll16(uint16_t v); - uint32_t do_shll32(uint32_t v); + u8 do_shll8(u8 v); + u16 do_shll16(u16 v); + u32 do_shll32(u32 v); - uint8_t do_shlr8(uint8_t v); - uint16_t do_shlr16(uint16_t v); - uint32_t do_shlr32(uint32_t v); + u8 do_shlr8(u8 v); + u16 do_shlr16(u16 v); + u32 do_shlr32(u32 v); - uint8_t do_rotl8(uint8_t v); - uint16_t do_rotl16(uint16_t v); - uint32_t do_rotl32(uint32_t v); + u8 do_rotl8(u8 v); + u16 do_rotl16(u16 v); + u32 do_rotl32(u32 v); - uint8_t do_rotr8(uint8_t v); - uint16_t do_rotr16(uint16_t v); - uint32_t do_rotr32(uint32_t v); + u8 do_rotr8(u8 v); + u16 do_rotr16(u16 v); + u32 do_rotr32(u32 v); - uint8_t do_rotxl8(uint8_t v); - uint16_t do_rotxl16(uint16_t v); - uint32_t do_rotxl32(uint32_t v); + u8 do_rotxl8(u8 v); + u16 do_rotxl16(u16 v); + u32 do_rotxl32(u32 v); - uint8_t do_rotxr8(uint8_t v); - uint16_t do_rotxr16(uint16_t v); - uint32_t do_rotxr32(uint32_t v); + u8 do_rotxr8(u8 v); + u16 do_rotxr16(u16 v); + u32 do_rotxr32(u32 v); - uint8_t do_shal2_8(uint8_t v); - uint16_t do_shal2_16(uint16_t v); - uint32_t do_shal2_32(uint32_t v); + u8 do_shal2_8(u8 v); + u16 do_shal2_16(u16 v); + u32 do_shal2_32(u32 v); - uint8_t do_shar2_8(uint8_t v); - uint16_t do_shar2_16(uint16_t v); - uint32_t do_shar2_32(uint32_t v); + u8 do_shar2_8(u8 v); + u16 do_shar2_16(u16 v); + u32 do_shar2_32(u32 v); - uint8_t do_shll2_8(uint8_t v); - uint16_t do_shll2_16(uint16_t v); - uint32_t do_shll2_32(uint32_t v); + u8 do_shll2_8(u8 v); + u16 do_shll2_16(u16 v); + u32 do_shll2_32(u32 v); - uint8_t do_shlr2_8(uint8_t v); - uint16_t do_shlr2_16(uint16_t v); - uint32_t do_shlr2_32(uint32_t v); + u8 do_shlr2_8(u8 v); + u16 do_shlr2_16(u16 v); + u32 do_shlr2_32(u32 v); - uint8_t do_rotl2_8(uint8_t v); - uint16_t do_rotl2_16(uint16_t v); - uint32_t do_rotl2_32(uint32_t v); + u8 do_rotl2_8(u8 v); + u16 do_rotl2_16(u16 v); + u32 do_rotl2_32(u32 v); - uint8_t do_rotr2_8(uint8_t v); - uint16_t do_rotr2_16(uint16_t v); - uint32_t do_rotr2_32(uint32_t v); + u8 do_rotr2_8(u8 v); + u16 do_rotr2_16(u16 v); + u32 do_rotr2_32(u32 v); - uint8_t do_rotxl2_8(uint8_t v); - uint16_t do_rotxl2_16(uint16_t v); - uint32_t do_rotxl2_32(uint32_t v); + u8 do_rotxl2_8(u8 v); + u16 do_rotxl2_16(u16 v); + u32 do_rotxl2_32(u32 v); - uint8_t do_rotxr2_8(uint8_t v); - uint16_t do_rotxr2_16(uint16_t v); - uint32_t do_rotxr2_32(uint32_t v); + u8 do_rotxr2_8(u8 v); + u16 do_rotxr2_16(u16 v); + u32 do_rotxr2_32(u32 v); - void set_nzv8(uint8_t v); - void set_nzv16(uint16_t v); - void set_nzv32(uint32_t v); + void set_nzv8(u8 v); + void set_nzv16(u16 v); + void set_nzv32(u32 v); - void set_nz16(uint16_t v); - void set_nz32(uint32_t v); + void set_nz16(u16 v); + void set_nz32(u32 v); - inline void r8_w(int reg, uint8_t val) { + inline void r8_w(int reg, u8 val) { if(reg & 8) m_R[reg & 7] = (m_R[reg & 7] & 0xff00) | val; else m_R[reg & 7] = (m_R[reg & 7] & 0xff) | (val << 8); } - inline uint8_t r8_r(int reg) { + inline u8 r8_r(int reg) { if(reg & 8) return m_R[reg & 7]; else @@ -319,8 +319,8 @@ protected: // and the h8-300h is r32 of course, we have to be careful to mask // in h8.lst there if the top bit is 1. - inline void r16_w(int reg, uint16_t val) { m_R[reg & 0xf] = val; } - inline uint16_t r16_r(int reg) { return m_R[reg & 0xf]; } + inline void r16_w(int reg, u16 val) { m_R[reg & 0xf] = val; } + inline u16 r16_r(int reg) { return m_R[reg & 0xf]; } #define O(o) void o ## _full(); void o ## _partial() O(add_b_imm8_r8u); O(add_b_r8h_r8l); O(add_w_r16h_r16l); @@ -432,7 +432,7 @@ protected: }; enum { - H8_PC = 1, + H8_PC = 1, H8_R0, H8_R1, H8_R2, diff --git a/src/devices/cpu/h8/h8.lst b/src/devices/cpu/h8/h8.lst index 80efb77e767..c9625b369cb 100644 --- a/src/devices/cpu/h8/h8.lst +++ b/src/devices/cpu/h8/h8.lst @@ -32,11 +32,11 @@ macro bxx_any %cond prefetch_done(); macro bxx_8 %cond - m_TMP1 = m_PC + int8_t(m_IR[0]); + m_TMP1 = m_PC + s8(m_IR[0]); bxx_any %cond macro bxx_16 %cond - m_TMP1 = m_PC + int16_t(m_IR[1]); + m_TMP1 = m_PC + s16(m_IR[1]); bxx_any %cond macro bset %bit @@ -238,7 +238,7 @@ macro jsr32 %opc %spreg m_current_dtc->m_dar = (m_current_dtc->m_dar & 0xff000000) | ((m_current_dtc->m_dar + m_current_dtc->m_incd) & 0x00ffffff); m_current_dtc->m_count--; if(!m_current_dtc->m_count) { - uint8_t id = m_current_dtc->m_id; + u8 id = m_current_dtc->m_id; m_current_dtc = nullptr; m_dtc_device->count_done(id); } @@ -300,7 +300,7 @@ macro jsr32 %opc %spreg 01006b00 fffffff8 0 mov.l abs16 r32l h prefetch_start - m_TMP2 = int16_t(m_IR[2]); + m_TMP2 = s16(m_IR[2]); m_TMP1 = read16(m_TMP2) << 16; m_TMP1 |= read16(m_TMP2+2); set_nzv32(m_TMP1); @@ -319,7 +319,7 @@ macro jsr32 %opc %spreg 01006b80 fffffff8 0 mov.l r32l abs16 h prefetch_start m_TMP1 = r32_r(m_IR[1]); - m_TMP2 = int16_t(m_IR[2]); + m_TMP2 = s16(m_IR[2]); set_nzv32(m_TMP1); write16(m_TMP2, m_TMP1 >> 16); write16(m_TMP2+2, m_TMP1); @@ -360,7 +360,7 @@ macro jsr32 %opc %spreg 01006f00 ffffff88 0 mov.l r32d16h r32l h prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); m_TMP2 = read16(m_TMP1) << 16; m_TMP2 |= read16(m_TMP1+2); set_nzv32(m_TMP2); @@ -369,7 +369,7 @@ macro jsr32 %opc %spreg 01006f80 ffffff88 0 mov.l r32l r32d16h h prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); m_TMP2 = r32_r(m_IR[1]); set_nzv32(m_TMP2); write16(m_TMP1, m_TMP2 >> 16); @@ -539,7 +539,7 @@ macro jsr32 %opc %spreg 01406b00 ffffffff 0 ldc.w abs16 ccr h prefetch_start - m_TMP1 = int16_t(m_IR[2]); + m_TMP1 = s16(m_IR[2]); m_CCR = read16(m_TMP1) >> 8; update_irq_filter(); prefetch_done_noirq(); @@ -553,7 +553,7 @@ macro jsr32 %opc %spreg 01406b80 ffffffff 0 stc.w ccr abs16 h prefetch_start - m_TMP1 = int16_t(m_IR[2]); + m_TMP1 = s16(m_IR[2]); write16(m_TMP1, (m_CCR << 8) | m_CCR); prefetch_done(); @@ -582,14 +582,14 @@ macro jsr32 %opc %spreg 01406f00 ffffff8f 0 ldc.w r32d16h ccr h prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); m_CCR = read16(m_TMP1) >> 8; update_irq_filter(); prefetch_done_noirq(); 01406f80 ffffff8f 0 stc.w ccr r32d16h h prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); write16(m_TMP1, (m_CCR << 8) | m_CCR); prefetch_done(); @@ -641,7 +641,7 @@ macro jsr32 %opc %spreg 01416b00 ffffffff 0 ldc.w abs16 exr s20 prefetch_start - m_TMP1 = int16_t(m_IR[2]); + m_TMP1 = s16(m_IR[2]); m_EXR = (read16(m_TMP1) >> 8) | EXR_NC; update_irq_filter(); prefetch_done_noirq(); @@ -655,7 +655,7 @@ macro jsr32 %opc %spreg 01416b80 ffffffff 0 stc.w exr abs16 s20 prefetch_start - m_TMP1 = int16_t(m_IR[2]); + m_TMP1 = s16(m_IR[2]); write16(m_TMP1, (m_EXR << 8) | m_EXR); prefetch_done(); @@ -684,14 +684,14 @@ macro jsr32 %opc %spreg 01416f00 ffffff8f 0 ldc.w r32d16h exr s20 prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); m_EXR = (read16(m_TMP1) >> 8) | EXR_NC; update_irq_filter(); prefetch_done_noirq(); 01416f80 ffffff8f 0 stc.w exr r32d16h s20 prefetch_start - m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]); + m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]); write16(m_TMP1, (m_EXR << 8) | m_EXR); prefetch_done(); @@ -714,7 +714,7 @@ macro jsr32 %opc %spreg r32_w(m_IR[1], r32_r(m_IR[1]) + 2); m_TMP2 = read16(r32_r(m_IR[1] >> 4)); r32_w(m_IR[1] >> 4, r32_r(m_IR[1] >> 4) + 2); - m_MAC += int16_t(m_TMP1)*int16_t(m_TMP2); + m_MAC += s16(m_TMP1)*s16(m_TMP2); m_MACF &= ~(F_Z|F_N); if(m_MAC) m_MACF |= F_Z; @@ -759,7 +759,7 @@ macro jsr32 %opc %spreg 01c05000 ffffff00 0 mulxs.b r8h r16l h prefetch_start - m_TMP1 = int8_t(r16_r(m_IR[1])) * int8_t(r8_r(m_IR[1] >> 4)); + m_TMP1 = s8(r16_r(m_IR[1])) * s8(r8_r(m_IR[1] >> 4)); set_nz16(m_TMP1); r16_w(m_IR[1], m_TMP1); internal(m_has_mac ? 2 : 11); @@ -767,7 +767,7 @@ macro jsr32 %opc %spreg 01c05200 ffffff08 0 mulxs.w r16h r32l h prefetch_start - m_TMP1 = int16_t(r32_r(m_IR[1])) * int16_t(r16_r(m_IR[1] >> 4)); + m_TMP1 = s16(r32_r(m_IR[1])) * s16(r16_r(m_IR[1] >> 4)); set_nz32(m_TMP1); r32_w(m_IR[1], m_TMP1); internal(m_has_mac ? 3 : 19); @@ -776,8 +776,8 @@ macro jsr32 %opc %spreg 01d05100 ffffff00 0 divxs.b r8h r16l h prefetch_start internal(11); - m_TMP1 = int16_t(r16_r(m_IR[1])); - m_TMP2 = int8_t(r8_r(m_IR[1] >> 4)); + m_TMP1 = s16(r16_r(m_IR[1])); + m_TMP2 = s8(r8_r(m_IR[1] >> 4)); m_CCR &= ~(F_Z|F_N); if(!m_TMP2) { m_CCR |= F_Z; @@ -826,7 +826,7 @@ macro jsr32 %opc %spreg prefetch_start internal(19); m_TMP1 = r32_r(m_IR[1]); - m_TMP2 = int16_t(r16_r(m_IR[1] >> 4)); + m_TMP2 = s16(r16_r(m_IR[1] >> 4)); m_CCR &= ~(F_Z|F_N); if(!m_TMP2) { m_CCR |= F_Z; @@ -933,7 +933,7 @@ macro jsr32 %opc %spreg m_TMP1 |= 0xfffffc00; else m_TMP1 &= ~0xfffffc00; - m_MAC = (m_MAC & 0x00000000ffffffffULL) | (uint64_t(m_TMP1) << 32); + m_MAC = (m_MAC & 0x00000000ffffffffULL) | (u64(m_TMP1) << 32); m_MACF &= ~F_V; prefetch_done(); @@ -1293,7 +1293,7 @@ macro jsr32 %opc %spreg 1750 fff0 0 extu.w r16l - h m_CCR &= ~(F_N|F_Z|F_V); - m_TMP1 = uint8_t(r16_r(m_IR[0])); + m_TMP1 = u8(r16_r(m_IR[0])); if(!m_TMP1) m_CCR |= F_Z; r16_w(m_IR[0], m_TMP1); @@ -1301,7 +1301,7 @@ macro jsr32 %opc %spreg 1770 fff8 0 extu.l r32l - h m_CCR &= ~(F_N|F_Z|F_V); - m_TMP1 = uint16_t(r32_r(m_IR[0])); + m_TMP1 = u16(r32_r(m_IR[0])); if(!m_TMP1) m_CCR |= F_Z; r32_w(m_IR[0], m_TMP1); @@ -1321,7 +1321,7 @@ macro jsr32 %opc %spreg 17d0 fff0 0 exts.w r16l - h m_CCR &= ~(F_N|F_Z|F_V); - m_TMP1 = int8_t(r16_r(m_IR[0])); + m_TMP1 = s8(r16_r(m_IR[0])); if(!m_TMP1) m_CCR |= F_Z; r16_w(m_IR[0], m_TMP1); @@ -1329,7 +1329,7 @@ macro jsr32 %opc %spreg 17f0 fff8 0 exts.l r32l - h m_CCR &= ~(F_N|F_Z|F_V); - m_TMP1 = int16_t(r32_r(m_IR[0])); + m_TMP1 = s16(r32_r(m_IR[0])); if(!m_TMP1) m_CCR |= F_Z; r32_w(m_IR[0], m_TMP1); @@ -1487,7 +1487,7 @@ macro jsr32 %opc %spreg 5000 ff00 0 mulxu.b r8h r16l prefetch_start - r16_w(m_IR[0], uint8_t(r16_r(m_IR[0])) * r8_r(m_IR[0] >> 4)); + r16_w(m_IR[0], u8(r16_r(m_IR[0])) * r8_r(m_IR[0] >> 4)); internal(m_has_mac ? 2 : 11); prefetch_done(); @@ -1510,7 +1510,7 @@ macro jsr32 %opc %spreg 5200 ff08 0 mulxu.w r16h r32l h prefetch_start - r32_w(m_IR[0], uint16_t(r32_r(m_IR[0])) * r16_r(m_IR[0] >> 4)); + r32_w(m_IR[0], u16(r32_r(m_IR[0])) * r16_r(m_IR[0] >> 4)); internal(m_has_mac ? 3 : 19); prefetch_done(); @@ -1558,13 +1558,13 @@ macro jsr32 %opc %spreg 5500 ff00 0 bsr rel8 - o fetch_noinc m_TMP2 = m_PC; - m_PC += int8_t(m_IR[0]); + m_PC += s8(m_IR[0]); jsr16 m_TMP2 m_TMP1 5500 ff00 0 bsr rel8 - h fetch_noinc m_TMP2 = m_PC; - m_PC += int8_t(m_IR[0]); + m_PC += s8(m_IR[0]); jsr32 m_TMP2 m_TMP1 5670 ffff 0 rte - - o @@ -1715,7 +1715,7 @@ macro jsr32 %opc %spreg 5c00 ffff 0 bsr rel16 - h internal(1); m_TMP2 = m_PC; - m_PC += int16_t(m_IR[1]); + m_PC += s16(m_IR[1]); jsr32 m_TMP2 m_TMP1 5d00 ff8f 0 jsr r16h - o @@ -1871,73 +1871,73 @@ macro jsr32 %opc %spreg 6a00 fff0 0 mov.b abs16 r8l prefetch_start - m_TMP1 = read8(int16_t(m_IR[1])); + m_TMP1 = read8(s16(m_IR[1])); set_nzv8(m_TMP1); r8_w(m_IR[0], m_TMP1); prefetch_done(); 6a106300 ffffff0f 1 btst r8h abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); btst r8_r(m_IR[2] >> 4) prefetch 6a107300 ffffff8f 1 btst imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); btst m_IR[2] >> 4 prefetch 6a107400 ffffff8f 1 bor imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bor m_IR[2] >> 4 prefetch 6a107480 ffffff8f 1 bior imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bior m_IR[2] >> 4 prefetch 6a107500 ffffff8f 1 bxor imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bxor m_IR[2] >> 4 prefetch 6a107580 ffffff8f 1 bixor imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bixor m_IR[2] >> 4 prefetch 6a107600 ffffff8f 1 band imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); band m_IR[2] >> 4 prefetch 6a107680 ffffff8f 1 biand imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); biand m_IR[2] >> 4 prefetch 6a107700 ffffff8f 1 bld imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bld m_IR[2] >> 4 prefetch 6a107780 ffffff8f 1 bild imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); bild m_IR[2] >> 4 prefetch 6a186000 ffffff0f 1 bset r8h abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bset r8_r(m_IR[2] >> 4) @@ -1945,7 +1945,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a186100 ffffff0f 1 bnot r8h abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bnot r8_r(m_IR[2] >> 4) @@ -1953,7 +1953,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a186200 ffffff0f 1 bclr r8h abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bclr r8_r(m_IR[2] >> 4) @@ -1961,7 +1961,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a186700 ffffff8f 1 bst imm3 abs16 h - m_TMP2 = int16_t(m_IR[2]); + m_TMP2 = s16(m_IR[2]); m_TMP1 = read8(m_TMP2); prefetch_start bst m_IR[2] >> 4 @@ -1969,7 +1969,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a186780 ffffff8f 1 bist imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bist m_IR[2] >> 4 @@ -1977,7 +1977,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a187000 ffffff8f 1 bset imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bset m_IR[2] >> 4 @@ -1985,7 +1985,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a187100 ffffff8f 1 bnot imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bnot m_IR[2] >> 4 @@ -1993,7 +1993,7 @@ macro jsr32 %opc %spreg prefetch_done(); 6a187200 ffffff8f 1 bclr imm3 abs16 h - m_TMP2 = int16_t(m_IR[1]); + m_TMP2 = s16(m_IR[1]); m_TMP1 = read8(m_TMP2); prefetch_start bclr m_IR[2] >> 4 @@ -2134,7 +2134,7 @@ macro jsr32 %opc %spreg 6a40 fff0 0 movfpe abs16 r8l // TODO: timing prefetch_start - m_TMP1 = read8(int16_t(m_IR[1])); + m_TMP1 = read8(s16(m_IR[1])); set_nzv8(m_TMP1); r8_w(m_IR[0], m_TMP1); prefetch_done(); @@ -2143,7 +2143,7 @@ macro jsr32 %opc %spreg prefetch_start m_TMP1 = r8_r(m_IR[0]); set_nzv8(m_TMP1); - write8(int16_t(m_IR[1]), m_TMP1); + write8(s16(m_IR[1]), m_TMP1); prefetch_done(); 6aa0 fff0 0 mov.b r8l abs32 h @@ -2158,12 +2158,12 @@ macro jsr32 %opc %spreg prefetch_start m_TMP1 = r8_r(m_IR[0]); set_nzv8(m_TMP1); - write8(int16_t(m_IR[1]), m_TMP1); + write8(s16(m_IR[1]), m_TMP1); prefetch_done(); 6b00 fff0 0 mov.w abs16 r16l prefetch_start - m_TMP1 = read16(int16_t(m_IR[1])); + m_TMP1 = read16(s16(m_IR[1])); set_nzv16(m_TMP1); r16_w(m_IR[0], m_TMP1); prefetch_done(); @@ -2179,7 +2179,7 @@ macro jsr32 %opc %spreg prefetch_start m_TMP1 = r16_r(m_IR[0]); set_nzv16(m_TMP1); - write16(int16_t(m_IR[1]), m_TMP1); + write16(s16(m_IR[1]), m_TMP1); prefetch_done(); 6ba0 fff0 0 mov.w r16l abs32 h @@ -2279,7 +2279,7 @@ macro jsr32 %opc %spreg 6e00 ff80 0 mov.b r16d16h r8l o prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + int16_t(m_IR[1])); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + s16(m_IR[1])); m_TMP2 = read8(m_TMP1); set_nzv8(m_TMP2); r8_w(m_IR[0], m_TMP2); @@ -2287,7 +2287,7 @@ macro jsr32 %opc %spreg 6e00 ff80 0 mov.b r32d16h r8l h prefetch_start - m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]); + m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]); m_TMP2 = read8(m_TMP1); set_nzv8(m_TMP2); r8_w(m_IR[0], m_TMP2); @@ -2295,7 +2295,7 @@ macro jsr32 %opc %spreg 6e80 ff80 0 mov.b r8l r16d16h o prefetch_start - m_TMP1 = uint16_t(r16_r((m_IR[0] >> 4) & 7) + int16_t(m_IR[1])); + m_TMP1 = u16(r16_r((m_IR[0] >> 4) & 7) + s16(m_IR[1])); m_TMP2 = r8_r(m_IR[0]); set_nzv8(m_TMP2); write8(m_TMP1, m_TMP2); @@ -2303,7 +2303,7 @@ macro jsr32 %opc %spreg 6e80 ff80 0 mov.b r8l r32d16h h prefetch_start - m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]); + m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]); m_TMP2 = r8_r(m_IR[0]); set_nzv8(m_TMP2); write8(m_TMP1, m_TMP2); @@ -2311,7 +2311,7 @@ macro jsr32 %opc %spreg 6f00 ff80 0 mov.w r16d16h r16l o prefetch_start - m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + int16_t(m_IR[1])); + m_TMP1 = u16(r16_r(m_IR[0] >> 4) + s16(m_IR[1])); m_TMP2 = read16(m_TMP1); set_nzv16(m_TMP2); r16_w(m_IR[0], m_TMP2); @@ -2319,7 +2319,7 @@ macro jsr32 %opc %spreg 6f00 ff80 0 mov.w r32d16h r16l h prefetch_start - m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]); + m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]); m_TMP2 = read16(m_TMP1); set_nzv16(m_TMP2); r16_w(m_IR[0], m_TMP2); @@ -2327,7 +2327,7 @@ macro jsr32 %opc %spreg 6f80 ff80 0 mov.w r16l r16d16h o prefetch_start - m_TMP1 = uint16_t(r16_r((m_IR[0] >> 4) & 7) + int16_t(m_IR[1])); + m_TMP1 = u16(r16_r((m_IR[0] >> 4) & 7) + s16(m_IR[1])); m_TMP2 = r16_r(m_IR[0]); set_nzv16(m_TMP2); write16(m_TMP1, m_TMP2); @@ -2335,7 +2335,7 @@ macro jsr32 %opc %spreg 6f80 ff80 0 mov.w r16l r32d16h h prefetch_start - m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]); + m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]); m_TMP2 = r16_r(m_IR[0]); set_nzv16(m_TMP2); write16(m_TMP1, m_TMP2); diff --git a/src/devices/cpu/h8/h83002.cpp b/src/devices/cpu/h8/h83002.cpp index 3501a466bd3..60e60fc2fed 100644 --- a/src/devices/cpu/h8/h83002.cpp +++ b/src/devices/cpu/h8/h83002.cpp @@ -5,7 +5,7 @@ DEFINE_DEVICE_TYPE(H83002, h83002_device, "h83002", "Hitachi H8/3002") -h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8h_device(mconfig, H83002, tag, owner, clock, address_map_constructor(FUNC(h83002_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -216,9 +216,9 @@ void h83002_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83002_device::internal_update(uint64_t current_time) +void h83002_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -245,25 +245,25 @@ void h83002_device::device_reset() m_syscr = 0x09; } -uint8_t h83002_device::syscr_r() +u8 h83002_device::syscr_r() { return m_syscr; } -void h83002_device::syscr_w(uint8_t data) +void h83002_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); logerror("syscr = %02x\n", data); } -uint8_t h83002_device::rtmcsr_r() +u8 h83002_device::rtmcsr_r() { // set bit 7 -- Compare Match Flag (CMF): This status flag indicates that the RTCNT and RTCOR values have matched. return m_rtmcsr | 0x80; } -void h83002_device::rtmcsr_w(uint8_t data) +void h83002_device::rtmcsr_w(u8 data) { m_rtmcsr = data; logerror("rtmcsr = %02x\n", data); diff --git a/src/devices/cpu/h8/h83002.h b/src/devices/cpu/h8/h83002.h index ff42585b7ae..eb03a757ce9 100644 --- a/src/devices/cpu/h8/h83002.h +++ b/src/devices/cpu/h8/h83002.h @@ -27,7 +27,7 @@ class h83002_device : public h8h_device { public: - h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto tend0() { return m_tend_cb[0].bind(); } auto tend1() { return m_tend_cb[1].bind(); } @@ -49,11 +49,11 @@ public: void set_mode_a20() { m_mode_a20 = true; } void set_mode_a24() { m_mode_a20 = false; } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); - uint8_t rtmcsr_r(); - void rtmcsr_w(uint8_t data); + u8 rtmcsr_r(); + void rtmcsr_w(u8 data); protected: required_device m_intc; @@ -76,8 +76,8 @@ protected: required_device m_timer16_4; required_device m_watchdog; - uint8_t m_syscr; - uint8_t m_rtmcsr; + u8 m_syscr; + u8 m_rtmcsr; devcb_write_line::array<2> m_tend_cb; @@ -85,7 +85,7 @@ protected: virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); diff --git a/src/devices/cpu/h8/h83003.cpp b/src/devices/cpu/h8/h83003.cpp index 9a90b646b8f..f68692a4f53 100644 --- a/src/devices/cpu/h8/h83003.cpp +++ b/src/devices/cpu/h8/h83003.cpp @@ -5,7 +5,7 @@ DEFINE_DEVICE_TYPE(H83003, h83003_device, "h83003", "Hitachi H8/3003") -h83003_device::h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83003_device::h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8h_device(mconfig, H83003, tag, owner, clock, address_map_constructor(FUNC(h83003_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -243,9 +243,9 @@ void h83003_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83003_device::internal_update(uint64_t current_time) +void h83003_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -272,25 +272,25 @@ void h83003_device::device_reset() m_syscr = 0x09; } -uint8_t h83003_device::syscr_r() +u8 h83003_device::syscr_r() { return m_syscr; } -void h83003_device::syscr_w(uint8_t data) +void h83003_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); logerror("syscr = %02x\n", data); } -uint8_t h83003_device::rtmcsr_r() +u8 h83003_device::rtmcsr_r() { // set bit 7 -- Compare Match Flag (CMF): This status flag indicates that the RTCNT and RTCOR values have matched. return m_rtmcsr | 0x80; } -void h83003_device::rtmcsr_w(uint8_t data) +void h83003_device::rtmcsr_w(u8 data) { m_rtmcsr = data; logerror("rtmcsr = %02x\n", data); diff --git a/src/devices/cpu/h8/h83003.h b/src/devices/cpu/h8/h83003.h index e66f21ba2d8..7bd52c3ceb5 100644 --- a/src/devices/cpu/h8/h83003.h +++ b/src/devices/cpu/h8/h83003.h @@ -27,7 +27,7 @@ class h83003_device : public h8h_device { public: - h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto tend0() { return m_tend_cb[0].bind(); } auto tend1() { return m_tend_cb[1].bind(); } @@ -55,11 +55,11 @@ public: void set_mode_a20() { m_mode_a20 = true; } void set_mode_a24() { m_mode_a20 = false; } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); - uint8_t rtmcsr_r(); - void rtmcsr_w(uint8_t data); + u8 rtmcsr_r(); + void rtmcsr_w(u8 data); protected: required_device m_intc; @@ -86,8 +86,8 @@ protected: required_device m_timer16_4; required_device m_watchdog; - uint8_t m_syscr; - uint8_t m_rtmcsr; + u8 m_syscr; + u8 m_rtmcsr; devcb_write_line::array<4> m_tend_cb; @@ -95,7 +95,7 @@ protected: virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); diff --git a/src/devices/cpu/h8/h83006.cpp b/src/devices/cpu/h8/h83006.cpp index 8c38995a44f..a03b4ac763f 100644 --- a/src/devices/cpu/h8/h83006.cpp +++ b/src/devices/cpu/h8/h83006.cpp @@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83006, h83006_device, "h83006", "Hitachi H8/3006") DEFINE_DEVICE_TYPE(H83007, h83007_device, "h83007", "Hitachi H8/3007") -h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83006_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -32,13 +32,13 @@ h83006_device::h83006_device(const machine_config &mconfig, device_type type, co { } -h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83006_device(mconfig, H83006, tag, owner, clock, 0xff720) { } -h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83006_device(mconfig, H83007, tag, owner, clock, 0xfef20) { } @@ -207,9 +207,9 @@ void h83006_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83006_device::internal_update(uint64_t current_time) +void h83006_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -239,12 +239,12 @@ void h83006_device::device_reset() } -uint8_t h83006_device::syscr_r() +u8 h83006_device::syscr_r() { return m_syscr; } -void h83006_device::syscr_w(uint8_t data) +void h83006_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h83006.h b/src/devices/cpu/h8/h83006.h index 157cb0f37d9..5271d357446 100644 --- a/src/devices/cpu/h8/h83006.h +++ b/src/devices/cpu/h8/h83006.h @@ -27,7 +27,7 @@ class h83006_device : public h8h_device { public: - h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port4() { return m_read_port [PORT_4].bind(); } auto write_port4() { return m_write_port[PORT_4].bind(); } @@ -46,11 +46,11 @@ public: void set_mode_a20() { m_mode_a20 = true; } void set_mode_a24() { m_mode_a20 = false; } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: - h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); required_device m_intc; required_device m_adc; @@ -71,14 +71,14 @@ protected: required_device m_timer16_2; required_device m_watchdog; - uint8_t m_syscr; - uint32_t m_ram_start; + u8 m_syscr; + u32 m_ram_start; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -90,7 +90,7 @@ protected: class h83007_device : public h83006_device { public: - h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83006, h83006_device) diff --git a/src/devices/cpu/h8/h83008.cpp b/src/devices/cpu/h8/h83008.cpp index f4161cc2b8f..5535a31ac2a 100644 --- a/src/devices/cpu/h8/h83008.cpp +++ b/src/devices/cpu/h8/h83008.cpp @@ -5,7 +5,7 @@ DEFINE_DEVICE_TYPE(H83008, h83008_device, "h83008", "Hitachi H8/3008") -h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8h_device(mconfig, H83008, tag, owner, clock, address_map_constructor(FUNC(h83008_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -185,9 +185,9 @@ void h83008_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83008_device::internal_update(uint64_t current_time) +void h83008_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -216,12 +216,12 @@ void h83008_device::device_reset() } -uint8_t h83008_device::syscr_r() +u8 h83008_device::syscr_r() { return m_syscr; } -void h83008_device::syscr_w(uint8_t data) +void h83008_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h83008.h b/src/devices/cpu/h8/h83008.h index 751e5f833d2..bd23cca64b9 100644 --- a/src/devices/cpu/h8/h83008.h +++ b/src/devices/cpu/h8/h83008.h @@ -27,7 +27,7 @@ class h83008_device : public h8h_device { public: - h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port4() { return m_read_port [PORT_4].bind(); } auto write_port4() { return m_write_port[PORT_4].bind(); } @@ -46,8 +46,8 @@ public: void set_mode_a20() { m_mode_a20 = true; } void set_mode_a24() { m_mode_a20 = false; } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: required_device m_intc; @@ -69,13 +69,13 @@ protected: required_device m_timer16_2; required_device m_watchdog; - uint8_t m_syscr; + u8 m_syscr; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); diff --git a/src/devices/cpu/h8/h83032.cpp b/src/devices/cpu/h8/h83032.cpp index 8a560c1882f..16c6ab94480 100644 --- a/src/devices/cpu/h8/h83032.cpp +++ b/src/devices/cpu/h8/h83032.cpp @@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83032, h83032_device, "h83032", "Hitachi H8/3032") DEFINE_DEVICE_TYPE(H83031, h83031_device, "h83031", "Hitachi H8/3031") DEFINE_DEVICE_TYPE(H83030, h83030_device, "h83030", "Hitachi H8/3030") -h83032_device::h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h83032_device::h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83032_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -35,17 +35,17 @@ h83032_device::h83032_device(const machine_config &mconfig, device_type type, co m_mode_a20 = true; } -h83032_device::h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83032_device::h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83032_device(mconfig, H83032, tag, owner, clock, 0xf710) { } -h83031_device::h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83031_device::h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83032_device(mconfig, H83031, tag, owner, clock, 0xfb10) { } -h83030_device::h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83030_device::h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83032_device(mconfig, H83030, tag, owner, clock, 0xfd10) { } @@ -212,9 +212,9 @@ void h83032_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83032_device::internal_update(uint64_t current_time) +void h83032_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -239,12 +239,12 @@ void h83032_device::device_reset() m_syscr = 0x0b; } -uint8_t h83032_device::syscr_r() +u8 h83032_device::syscr_r() { return m_syscr; } -void h83032_device::syscr_w(uint8_t data) +void h83032_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h83032.h b/src/devices/cpu/h8/h83032.h index e979c42510a..fcd03d02728 100644 --- a/src/devices/cpu/h8/h83032.h +++ b/src/devices/cpu/h8/h83032.h @@ -29,7 +29,7 @@ class h83032_device : public h8h_device { public: - h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -51,11 +51,11 @@ public: auto read_portb() { return m_read_port [PORT_B].bind(); } auto write_portb() { return m_write_port[PORT_B].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: - h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); required_device m_intc; required_device m_adc; @@ -78,14 +78,14 @@ protected: required_device m_timer16_4; required_device m_watchdog; - uint32_t m_ram_start; - uint8_t m_syscr; + u32 m_ram_start; + u8 m_syscr; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -96,12 +96,12 @@ protected: class h83031_device : public h83032_device { public: - h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83030_device : public h83032_device { public: - h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83032, h83032_device) diff --git a/src/devices/cpu/h8/h83042.cpp b/src/devices/cpu/h8/h83042.cpp index 10073903ad1..82465893ae3 100644 --- a/src/devices/cpu/h8/h83042.cpp +++ b/src/devices/cpu/h8/h83042.cpp @@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83040, h83040_device, "h83040", "Hitachi H8/3040") DEFINE_DEVICE_TYPE(H83041, h83041_device, "h83041", "Hitachi H8/3041") DEFINE_DEVICE_TYPE(H83042, h83042_device, "h83042", "Hitachi H8/3042") -h83042_device::h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h83042_device::h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83042_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -37,17 +37,17 @@ h83042_device::h83042_device(const machine_config &mconfig, device_type type, co m_mode_a20 = true; } -h83040_device::h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83040_device::h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83042_device(mconfig, H83040, tag, owner, clock) { } -h83041_device::h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83041_device::h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83042_device(mconfig, H83041, tag, owner, clock) { } -h83042_device::h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83042_device::h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83042_device(mconfig, H83042, tag, owner, clock) { } @@ -246,9 +246,9 @@ void h83042_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83042_device::internal_update(uint64_t current_time) +void h83042_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -274,12 +274,12 @@ void h83042_device::device_reset() m_syscr = 0x0b; } -uint8_t h83042_device::syscr_r() +u8 h83042_device::syscr_r() { return m_syscr; } -void h83042_device::syscr_w(uint8_t data) +void h83042_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h83042.h b/src/devices/cpu/h8/h83042.h index 1b0f8b1c3ff..7bec2bceccf 100644 --- a/src/devices/cpu/h8/h83042.h +++ b/src/devices/cpu/h8/h83042.h @@ -33,7 +33,7 @@ class h83042_device : public h8h_device { public: - h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -57,11 +57,11 @@ public: auto read_portb() { return m_read_port [PORT_B].bind(); } auto write_portb() { return m_write_port[PORT_B].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: - h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); required_device m_intc; required_device m_adc; @@ -87,13 +87,13 @@ protected: required_device m_timer16_4; required_device m_watchdog; - uint8_t m_syscr; + u8 m_syscr; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -104,12 +104,12 @@ protected: class h83040_device : public h83042_device { public: - h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83041_device : public h83042_device { public: - h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83040, h83040_device) diff --git a/src/devices/cpu/h8/h83048.cpp b/src/devices/cpu/h8/h83048.cpp index 7ecd36a4d5d..e32874ddee3 100644 --- a/src/devices/cpu/h8/h83048.cpp +++ b/src/devices/cpu/h8/h83048.cpp @@ -8,7 +8,7 @@ DEFINE_DEVICE_TYPE(H83045, h83045_device, "h83045", "Hitachi H8/3045") DEFINE_DEVICE_TYPE(H83047, h83047_device, "h83047", "Hitachi H8/3047") DEFINE_DEVICE_TYPE(H83048, h83048_device, "h83048", "Hitachi H8/3048") -h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83048_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -38,22 +38,22 @@ h83048_device::h83048_device(const machine_config &mconfig, device_type type, co { } -h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83048_device(mconfig, H83048, tag, owner, clock, 0xef10) { } -h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83048_device(mconfig, H83044, tag, owner, clock, 0xf710) { } -h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83048_device(mconfig, H83045, tag, owner, clock, 0xf710) { } -h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83048_device(mconfig, H83047, tag, owner, clock, 0xef10) { } @@ -251,9 +251,9 @@ void h83048_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83048_device::internal_update(uint64_t current_time) +void h83048_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -279,12 +279,12 @@ void h83048_device::device_reset() m_syscr = 0x0b; } -uint8_t h83048_device::syscr_r() +u8 h83048_device::syscr_r() { return m_syscr; } -void h83048_device::syscr_w(uint8_t data) +void h83048_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h83048.h b/src/devices/cpu/h8/h83048.h index 1611876c3e0..bb14b78e108 100644 --- a/src/devices/cpu/h8/h83048.h +++ b/src/devices/cpu/h8/h83048.h @@ -33,7 +33,7 @@ class h83048_device : public h8h_device { public: - h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -60,11 +60,11 @@ public: void set_mode_a20() { m_mode_a20 = true; } void set_mode_a24() { m_mode_a20 = false; } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: - h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); required_device m_intc; required_device m_adc; @@ -90,14 +90,14 @@ protected: required_device m_timer16_4; required_device m_watchdog; - uint32_t m_ram_start; - uint8_t m_syscr; + u32 m_ram_start; + u8 m_syscr; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -108,17 +108,17 @@ protected: class h83044_device : public h83048_device { public: - h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83045_device : public h83048_device { public: - h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83047_device : public h83048_device { public: - h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83044, h83044_device) diff --git a/src/devices/cpu/h8/h8325.cpp b/src/devices/cpu/h8/h8325.cpp index a229788f3ee..3ab8d349a9e 100644 --- a/src/devices/cpu/h8/h8325.cpp +++ b/src/devices/cpu/h8/h8325.cpp @@ -25,7 +25,7 @@ DEFINE_DEVICE_TYPE(H8323, h8323_device, "h8323", "Hitachi H8/323") DEFINE_DEVICE_TYPE(H8322, h8322_device, "h8322", "Hitachi H8/322") -h8325_device::h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h8325_device::h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8325_device::map), this)), m_intc(*this, "intc"), m_port1(*this, "port1"), @@ -47,32 +47,32 @@ h8325_device::h8325_device(const machine_config &mconfig, device_type type, cons { } -h83257_device::h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83257_device::h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H83257, tag, owner, clock, 0xf780) { } -h83256_device::h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83256_device::h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H83256, tag, owner, clock, 0xf780) { } -h8325_device::h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8325_device::h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H8325, tag, owner, clock, 0xfb80) { } -h8324_device::h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8324_device::h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H8324, tag, owner, clock, 0xfb80) { } -h8323_device::h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8323_device::h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H8323, tag, owner, clock, 0xfd80) { } -h8322_device::h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8322_device::h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8325_device(mconfig, H8322, tag, owner, clock, 0xfe80) { } @@ -173,9 +173,9 @@ void h8325_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h8325_device::internal_update(uint64_t current_time) +void h8325_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_sci[0]->internal_update(current_time)); add_event(event_time, m_sci[1]->internal_update(current_time)); @@ -205,12 +205,12 @@ void h8325_device::device_reset() m_mds = m_read_md() & 3; } -uint8_t h8325_device::syscr_r() +u8 h8325_device::syscr_r() { return m_syscr | 0x0a; } -void h8325_device::syscr_w(uint8_t data) +void h8325_device::syscr_w(u8 data) { logerror("syscr = %02x\n", data); @@ -229,7 +229,7 @@ void h8325_device::syscr_w(uint8_t data) m_syscr = data; } -uint8_t h8325_device::mdcr_r() +u8 h8325_device::mdcr_r() { if(!machine().side_effects_disabled()) logerror("mdcr_r\n"); diff --git a/src/devices/cpu/h8/h8325.h b/src/devices/cpu/h8/h8325.h index fba31ce4ce7..e51b6fcfc88 100644 --- a/src/devices/cpu/h8/h8325.h +++ b/src/devices/cpu/h8/h8325.h @@ -32,7 +32,7 @@ class h8325_device : public h8_device { public: - h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); // I/O ports auto read_port1() { return m_read_port [PORT_1].bind(); } @@ -53,12 +53,12 @@ public: // MD pins, default mode 3 (single chip) auto read_md() { return m_read_md.bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); - uint8_t mdcr_r(); + u8 syscr_r(); + void syscr_w(u8 data); + u8 mdcr_r(); protected: - h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); required_device m_intc; required_device m_port1; @@ -76,14 +76,14 @@ protected: devcb_read8 m_read_md; memory_view m_ram_view; - uint8_t m_syscr; - uint8_t m_mds; - uint32_t m_ram_start; + u8 m_syscr; + u8 m_mds; + u32 m_ram_start; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -94,27 +94,27 @@ protected: class h83256_device : public h8325_device { public: - h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83257_device : public h8325_device { public: - h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8324_device : public h8325_device { public: - h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8323_device : public h8325_device { public: - h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8322_device : public h8325_device { public: - h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83257, h83257_device) diff --git a/src/devices/cpu/h8/h83337.cpp b/src/devices/cpu/h8/h83337.cpp index a2e8fc8cfa7..5fd3101dd13 100644 --- a/src/devices/cpu/h8/h83337.cpp +++ b/src/devices/cpu/h8/h83337.cpp @@ -19,7 +19,7 @@ DEFINE_DEVICE_TYPE(H83336, h83336_device, "h83336", "Hitachi H8/3336") DEFINE_DEVICE_TYPE(H83337, h83337_device, "h83337", "Hitachi H8/3337") -h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83337_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -42,17 +42,17 @@ h83337_device::h83337_device(const machine_config &mconfig, device_type type, co { } -h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83337_device(mconfig, H83337, tag, owner, clock, 0xf780) { } -h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83337_device(mconfig, H83334, tag, owner, clock, 0xfb80) { } -h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h83337_device(mconfig, H83336, tag, owner, clock, 0xf780) { } @@ -174,9 +174,9 @@ void h83337_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h83337_device::internal_update(uint64_t current_time) +void h83337_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -201,45 +201,45 @@ void h83337_device::device_reset() m_syscr = 0x09; } -uint8_t h83337_device::syscr_r() +u8 h83337_device::syscr_r() { return m_syscr; } -void h83337_device::syscr_w(uint8_t data) +void h83337_device::syscr_w(u8 data) { m_syscr = data; logerror("syscr = %02x\n", data); } -uint8_t h83337_device::wscr_r() +u8 h83337_device::wscr_r() { return 0x00; } -void h83337_device::wscr_w(uint8_t data) +void h83337_device::wscr_w(u8 data) { logerror("wscr = %02x\n", data); } -uint8_t h83337_device::stcr_r() +u8 h83337_device::stcr_r() { return 0x00; } -void h83337_device::stcr_w(uint8_t data) +void h83337_device::stcr_w(u8 data) { logerror("stcr = %02x\n", data); m_timer8_0->set_extra_clock_bit(data & 0x01); m_timer8_1->set_extra_clock_bit(data & 0x02); } -uint8_t h83337_device::mdcr_r() +u8 h83337_device::mdcr_r() { return 0x00; } -void h83337_device::mdcr_w(uint8_t data) +void h83337_device::mdcr_w(u8 data) { logerror("mdcr = %02x\n", data); } diff --git a/src/devices/cpu/h8/h83337.h b/src/devices/cpu/h8/h83337.h index 7fc09fbbb9a..ee4b349ae7b 100644 --- a/src/devices/cpu/h8/h83337.h +++ b/src/devices/cpu/h8/h83337.h @@ -33,7 +33,7 @@ class h83337_device : public h8_device { public: - h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -53,17 +53,17 @@ public: auto read_port9() { return m_read_port [PORT_9].bind(); } auto write_port9() { return m_write_port[PORT_9].bind(); } - uint8_t wscr_r(); - void wscr_w(uint8_t data); - uint8_t stcr_r(); - void stcr_w(uint8_t data); - uint8_t syscr_r(); - void syscr_w(uint8_t data); - uint8_t mdcr_r(); - void mdcr_w(uint8_t data); + u8 wscr_r(); + void wscr_w(u8 data); + u8 stcr_r(); + void stcr_w(u8 data); + u8 syscr_r(); + void syscr_w(u8 data); + u8 mdcr_r(); + void mdcr_w(u8 data); protected: - h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); required_device m_intc; required_device m_adc; @@ -82,13 +82,13 @@ protected: required_device m_timer16_0; required_device m_watchdog; - uint8_t m_syscr; - uint32_t m_ram_start; + u8 m_syscr; + u32 m_ram_start; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -99,12 +99,12 @@ protected: class h83334_device : public h83337_device { public: - h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h83336_device : public h83337_device { public: - h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H83334, h83334_device) diff --git a/src/devices/cpu/h8/h8_adc.cpp b/src/devices/cpu/h8/h8_adc.cpp index ffd89220158..bab8bc6aa37 100644 --- a/src/devices/cpu/h8/h8_adc.cpp +++ b/src/devices/cpu/h8/h8_adc.cpp @@ -15,7 +15,7 @@ DEFINE_DEVICE_TYPE(H8_ADC_2320, h8_adc_2320_device, "h8_adc_2320", "H8/2320 ADC" DEFINE_DEVICE_TYPE(H8_ADC_2357, h8_adc_2357_device, "h8_adc_2357", "H8/2357 ADC") DEFINE_DEVICE_TYPE(H8_ADC_2655, h8_adc_2655_device, "h8_adc_2655", "H8/2655 ADC") -h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG), @@ -26,34 +26,34 @@ h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, co m_analog_power_control = false; } -uint8_t h8_adc_device::addr8_r(offs_t offset) +u8 h8_adc_device::addr8_r(offs_t offset) { if(V>=1) logerror("addr8_r %d %03x\n", offset, m_addr[offset >> 1]); return offset & 1 ? m_addr[offset >> 1] << 6 : m_addr[offset >> 1] >> 2; } -uint16_t h8_adc_device::addr16_r(offs_t offset) +u16 h8_adc_device::addr16_r(offs_t offset) { if(V>=1) logerror("addr16_r %d %03x\n", offset, m_addr[offset]); return m_addr[offset]; } -uint8_t h8_adc_device::adcsr_r() +u8 h8_adc_device::adcsr_r() { if(V>=1) logerror("adcsr_r %02x\n", m_adcsr); return m_adcsr; } -uint8_t h8_adc_device::adcr_r() +u8 h8_adc_device::adcr_r() { if(V>=1) logerror("adcr_r %02x\n", m_adcr); return m_adcr; } -void h8_adc_device::adcsr_w(uint8_t data) +void h8_adc_device::adcsr_w(u8 data) { if(V>=1) logerror("adcsr_w %02x\n", data); - uint8_t prev = m_adcsr; + u8 prev = m_adcsr; m_adcsr = (data & 0x7f) | (m_adcsr & data & F_ADF); mode_update(); if((prev & F_ADF) && !(m_adcsr & F_ADF)) { @@ -71,7 +71,7 @@ void h8_adc_device::adcsr_w(uint8_t data) start_conversion(); } -void h8_adc_device::adcr_w(uint8_t data) +void h8_adc_device::adcr_w(u8 data) { if(V>=1) logerror("adcr_w %02x\n", data); m_adcr = data; @@ -140,7 +140,7 @@ void h8_adc_device::done() m_analog_powered = false; } -uint64_t h8_adc_device::internal_update(uint64_t current_time) +u64 h8_adc_device::internal_update(u64 current_time) { if(m_next_event && m_next_event <= current_time) { m_next_event = 0; @@ -149,7 +149,7 @@ uint64_t h8_adc_device::internal_update(uint64_t current_time) return m_next_event; } -void h8_adc_device::conversion_wait(bool first, bool poweron, uint64_t current_time) +void h8_adc_device::conversion_wait(bool first, bool poweron, u64 current_time) { if(current_time) m_next_event = current_time + conversion_time(first, poweron); @@ -193,7 +193,7 @@ void h8_adc_device::start_conversion() m_analog_powered = true; } -void h8_adc_device::timeout(uint64_t current_time) +void h8_adc_device::timeout(u64 current_time) { if(m_mode & BUFFER) { do_buffering((m_mode & DUAL) && (m_channel & 1)); @@ -265,7 +265,7 @@ int h8_adc_device::get_channel_index(int count) } -h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_3337, tag, owner, clock) { m_register_mask = 3; @@ -296,7 +296,7 @@ void h8_adc_3337_device::mode_update() } -h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_3006, tag, owner, clock) { m_register_mask = 3; @@ -327,7 +327,7 @@ void h8_adc_3006_device::mode_update() } -h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_2245, tag, owner, clock) { m_register_mask = 3; @@ -358,7 +358,7 @@ void h8_adc_2245_device::mode_update() } -h8_adc_2320_device::h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_2320_device::h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_2320, tag, owner, clock) { m_register_mask = 3; @@ -395,7 +395,7 @@ void h8_adc_2320_device::mode_update() } -h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_2357, tag, owner, clock) { m_register_mask = 3; @@ -426,7 +426,7 @@ void h8_adc_2357_device::mode_update() } -h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_adc_device(mconfig, H8_ADC_2655, tag, owner, clock) { m_suspend_on_interrupt = true; diff --git a/src/devices/cpu/h8/h8_adc.h b/src/devices/cpu/h8/h8_adc.h index 3c4cd7d3406..bb180703c64 100644 --- a/src/devices/cpu/h8/h8_adc.h +++ b/src/devices/cpu/h8/h8_adc.h @@ -21,19 +21,19 @@ class h8_adc_device : public device_t { public: template void set_info(T &&cpu, U &&intc, int vect) { m_cpu.set_tag(std::forward(cpu)), m_intc.set_tag(std::forward(intc)); m_intc_vector = vect; } - uint8_t addr8_r(offs_t offset); - uint16_t addr16_r(offs_t offset); - uint8_t adcsr_r(); - uint8_t adcr_r(); - void adcsr_w(uint8_t data); - void adcr_w(uint8_t data); + u8 addr8_r(offs_t offset); + u16 addr16_r(offs_t offset); + u8 adcsr_r(); + u8 adcr_r(); + void adcsr_w(u8 data); + void adcr_w(u8 data); void adtrg_w(int state); void set_suspend(bool suspend); - uint64_t internal_update(uint64_t current_time); + u64 internal_update(u64 current_time); protected: - h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); required_device m_cpu; required_device m_intc; @@ -63,24 +63,24 @@ protected: COUNTED = 64 }; - uint16_t m_addr[8], m_buf[2]; - uint8_t m_adcsr, m_adcr; + u16 m_addr[8], m_buf[2]; + u8 m_adcsr, m_adcr; int m_register_mask; int m_trigger, m_start_mode, m_start_channel, m_end_channel, m_start_count; bool m_suspend_on_interrupt, m_analog_power_control; int m_mode, m_channel, m_count; bool m_analog_powered, m_adtrg; - uint64_t m_next_event; + u64 m_next_event; virtual void device_start() override; virtual void device_reset() override; void sampling(); void start_conversion(); - void conversion_wait(bool first, bool poweron, uint64_t current_time = 0); + void conversion_wait(bool first, bool poweron, u64 current_time = 0); void buffer_value(int port, int buffer = 0); void commit_value(int reg, int buffer = 0); - void timeout(uint64_t current_time); + void timeout(u64 current_time); void done(); virtual int conversion_time(bool first, bool poweron) = 0; @@ -91,7 +91,7 @@ protected: class h8_adc_3337_device : public h8_adc_device { public: - h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_3337_device(mconfig, tag, owner, 0) { @@ -105,7 +105,7 @@ protected: class h8_adc_3006_device : public h8_adc_device { public: - h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_3006_device(mconfig, tag, owner, 0) { @@ -119,7 +119,7 @@ protected: class h8_adc_2245_device : public h8_adc_device { public: - h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_2245_device(mconfig, tag, owner, 0) { @@ -133,7 +133,7 @@ protected: class h8_adc_2320_device : public h8_adc_device { public: - h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_2320_device(mconfig, tag, owner, 0) { @@ -147,7 +147,7 @@ protected: class h8_adc_2357_device : public h8_adc_device { public: - h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_2357_device(mconfig, tag, owner, 0) { @@ -161,7 +161,7 @@ protected: class h8_adc_2655_device : public h8_adc_device { public: - h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect) : h8_adc_2655_device(mconfig, tag, owner, 0) { diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp index a9e53734ce8..008f5eabeef 100644 --- a/src/devices/cpu/h8/h8_dtc.cpp +++ b/src/devices/cpu/h8/h8_dtc.cpp @@ -29,7 +29,7 @@ const int h8_dtc_device::vector_to_enable[92] = { -1, 40, 41, -1 // ERI2, RXI2, TXI2, TEI2 }; -h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, H8_DTC, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG) @@ -45,31 +45,31 @@ void h8_dtc_device::device_reset() { memset(m_dtcer, 0x00, sizeof(m_dtcer)); memset(m_states, 0, sizeof(m_states)); - for(uint8_t i=0; i=2) logerror("dtcer_r %x, %02x\n", offset, m_dtcer[offset]); return m_dtcer[offset]; } -void h8_dtc_device::dtcer_w(offs_t offset, uint8_t data) +void h8_dtc_device::dtcer_w(offs_t offset, u8 data) { m_dtcer[offset] = data; if(V>=2) logerror("dtcer_w %x, %02x\n", offset, data); } -uint8_t h8_dtc_device::dtvecr_r() +u8 h8_dtc_device::dtvecr_r() { if(V>=2) logerror("dtvecr_r %02x\n", m_dtvecr); return m_dtvecr; } -void h8_dtc_device::dtvecr_w(uint8_t data) +void h8_dtc_device::dtvecr_w(u8 data) { m_dtvecr = data; if(V>=2) logerror("dtvecr_w %02x\n", data); @@ -125,11 +125,11 @@ void h8_dtc_device::vector_done(int vector) m_waiting_vector.erase(wi); h8_dtc_state *state = m_states + vector; - uint32_t sra = state->m_sra; - uint32_t dar = state->m_dar; - uint32_t cr = state->m_cr; + u32 sra = state->m_sra; + u32 dar = state->m_dar; + u32 cr = state->m_cr; - uint32_t mode = sra & 0x0c000000; + u32 mode = sra & 0x0c000000; if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->m_base, sra, dar, cr, mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block"); state->m_incs = sra & 0x80000000 ? diff --git a/src/devices/cpu/h8/h8_dtc.h b/src/devices/cpu/h8/h8_dtc.h index 7f272c810c1..8709fe72ede 100644 --- a/src/devices/cpu/h8/h8_dtc.h +++ b/src/devices/cpu/h8/h8_dtc.h @@ -18,9 +18,9 @@ #include struct h8_dtc_state { - uint32_t m_base, m_sra, m_dar, m_cr; - int32_t m_incs, m_incd; - uint32_t m_count; + u32 m_base, m_sra, m_dar, m_cr; + s32 m_incs, m_incd; + u32 m_count; int m_id; int m_next; }; @@ -29,7 +29,7 @@ class h8_dtc_device : public device_t { public: enum { DTC_CHAINED = 1000 }; - h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq) : h8_dtc_device(mconfig, tag, owner) { @@ -38,16 +38,16 @@ public: m_irq = irq; } - uint8_t dtcer_r(offs_t offset); - void dtcer_w(offs_t offset, uint8_t data); - uint8_t dtvecr_r(); - void dtvecr_w(uint8_t data); + u8 dtcer_r(offs_t offset); + void dtcer_w(offs_t offset, u8 data); + u8 dtvecr_r(); + void dtvecr_w(u8 data); bool trigger_dtc(int vector); void count_done(int id); inline h8_dtc_state *get_object(int vector) { return m_states + vector; } - inline uint32_t get_vector_address(int vector) { return 0x400 | ((vector ? vector : m_dtvecr & 0x7f) << 1); } + inline u32 get_vector_address(int vector) { return 0x400 | ((vector ? vector : m_dtvecr & 0x7f) << 1); } int get_waiting_vector(); int get_waiting_writeback(); void vector_done(int vector); @@ -64,7 +64,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; - uint8_t m_dtcer[6], m_dtvecr; + u8 m_dtcer[6], m_dtvecr; int m_cur_active_vector; std::vector m_waiting_vector, m_waiting_writeback; diff --git a/src/devices/cpu/h8/h8_intc.cpp b/src/devices/cpu/h8/h8_intc.cpp index 98a8747c683..8a85f5802ec 100644 --- a/src/devices/cpu/h8/h8_intc.cpp +++ b/src/devices/cpu/h8/h8_intc.cpp @@ -20,7 +20,7 @@ DEFINE_DEVICE_TYPE(H8H_INTC, h8h_intc_device, "h8h_intc", "H8H interrupt c DEFINE_DEVICE_TYPE(H8S_INTC, h8s_intc_device, "h8s_intc", "H8S interrupt controller") DEFINE_DEVICE_TYPE(GT913_INTC, gt913_intc_device, "gt913_intc", "Casio GT913F interrupt controller") -h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_intc_device(mconfig, H8_INTC, tag, owner, clock) { m_irq_vector_base = 4; @@ -28,7 +28,7 @@ h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, d m_irq_vector_nmi = 3; } -h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock), m_irq_vector_base(0), m_irq_vector_count(0), m_irq_vector_nmi(0), m_has_isr(false), m_cpu(*this, finder_base::DUMMY_TAG), m_nmi_type(EDGE_FALL), m_nmi_input(false), m_irq_input(0), m_ier(0), m_isr(0), m_iscr(0), m_icr_filter(0), m_ipr_filter(0) { @@ -66,7 +66,7 @@ int h8_intc_device::interrupt_taken(int vector) m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31)); if(vector >= m_irq_vector_base && vector < m_irq_vector_base + m_irq_vector_count) { int irq = vector - m_irq_vector_base; - uint8_t mask = 1 << irq; + u8 mask = 1 << irq; if(m_irq_type[irq] != LEVEL_LOW || !(m_irq_input & mask)) m_isr &= ~mask; update_irq_state(); @@ -133,12 +133,12 @@ void h8_intc_device::set_filter(int icr_filter, int ipr_filter) update_irq_state(); } -uint8_t h8_intc_device::ier_r() +u8 h8_intc_device::ier_r() { return m_ier; } -void h8_intc_device::ier_w(uint8_t data) +void h8_intc_device::ier_w(u8 data) { m_ier = data; // logerror("ier = %02x\n", data); @@ -149,7 +149,7 @@ void h8_intc_device::check_level_irqs(bool update) { bool set = false; for(int i=0; i> (8*offset); } -void h8h_intc_device::icr_w(offs_t offset, uint8_t data) +void h8h_intc_device::icr_w(offs_t offset, u8 data) { m_icr = (m_icr & (0xff << (8*offset))) | (data << (8*offset)); logerror("icr %d = %02x\n", offset, data); } -uint8_t h8h_intc_device::icrc_r() +u8 h8h_intc_device::icrc_r() { return icr_r(2); } -void h8h_intc_device::icrc_w(uint8_t data) +void h8h_intc_device::icrc_w(u8 data) { icr_w(2, data); } @@ -346,7 +346,7 @@ void h8h_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const // H8S -h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8h_intc_device(mconfig, H8S_INTC, tag, owner, clock) { m_irq_vector_base = 16; @@ -360,45 +360,45 @@ void h8s_intc_device::device_reset() memset(m_ipr, 0x77, sizeof(m_ipr)); } -uint8_t h8s_intc_device::ipr_r(offs_t offset) +u8 h8s_intc_device::ipr_r(offs_t offset) { return m_ipr[offset]; } -void h8s_intc_device::ipr_w(offs_t offset, uint8_t data) +void h8s_intc_device::ipr_w(offs_t offset, u8 data) { m_ipr[offset] = data; logerror("ipr %d = %02x\n", offset, data); } -uint8_t h8s_intc_device::iprk_r() +u8 h8s_intc_device::iprk_r() { return ipr_r(10); } -void h8s_intc_device::iprk_w(uint8_t data) +void h8s_intc_device::iprk_w(u8 data) { ipr_w(10, data); } -uint8_t h8s_intc_device::iscrh_r() +u8 h8s_intc_device::iscrh_r() { return m_iscr >> 8; } -void h8s_intc_device::iscrh_w(uint8_t data) +void h8s_intc_device::iscrh_w(u8 data) { m_iscr = (m_iscr & 0x00ff) | (data << 8); logerror("iscr = %04x\n", m_iscr); update_irq_types(); } -uint8_t h8s_intc_device::iscrl_r() +u8 h8s_intc_device::iscrl_r() { return m_iscr; } -void h8s_intc_device::iscrl_w(uint8_t data) +void h8s_intc_device::iscrl_w(u8 data) { m_iscr = (m_iscr & 0xff00) | data; logerror("iscr = %04x\n", m_iscr); @@ -461,7 +461,7 @@ void h8s_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const // GT913 -gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_intc_device(mconfig, GT913_INTC, tag, owner, clock) { m_irq_vector_base = 4; diff --git a/src/devices/cpu/h8/h8_intc.h b/src/devices/cpu/h8/h8_intc.h index 486e90bd857..424137d7614 100644 --- a/src/devices/cpu/h8/h8_intc.h +++ b/src/devices/cpu/h8/h8_intc.h @@ -17,7 +17,7 @@ class h8_device; class h8_intc_device : public device_t { public: - h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : h8_intc_device(mconfig, tag, owner) { @@ -30,10 +30,10 @@ public: void set_filter(int icr_filter, int ipr_filter); void set_nmi_edge(int state) { m_nmi_type = state ? EDGE_RISE : EDGE_FALL; } - uint8_t ier_r(); - void ier_w(uint8_t data); - uint8_t iscr_r(); - void iscr_w(uint8_t data); + u8 ier_r(); + void ier_w(u8 data); + u8 iscr_r(); + void iscr_w(u8 data); protected: enum { @@ -51,17 +51,17 @@ protected: required_device m_cpu; - uint32_t m_pending_irqs[MAX_VECTORS/32]; - uint8_t m_irq_type[8]; - uint8_t m_nmi_type; + u32 m_pending_irqs[MAX_VECTORS/32]; + u8 m_irq_type[8]; + u8 m_nmi_type; bool m_nmi_input; - uint8_t m_irq_input; - uint8_t m_ier; - uint8_t m_isr; - uint16_t m_iscr; + u8 m_irq_input; + u8 m_ier; + u8 m_isr; + u16 m_iscr; int m_icr_filter, m_ipr_filter; - h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); virtual void device_start() override; virtual void device_reset() override; @@ -74,7 +74,7 @@ protected: class h8325_intc_device : public h8_intc_device { public: - h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : h8325_intc_device(mconfig, tag, owner) { @@ -87,26 +87,26 @@ protected: class h8h_intc_device : public h8_intc_device { public: - h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : h8h_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); } - uint8_t isr_r(); - void isr_w(uint8_t data); - uint8_t icr_r(offs_t offset); - void icr_w(offs_t offset, uint8_t data); - uint8_t icrc_r(); - void icrc_w(uint8_t data); + u8 isr_r(); + void isr_w(u8 data); + u8 icr_r(offs_t offset); + void icr_w(offs_t offset, u8 data); + u8 icrc_r(); + void icrc_w(u8 data); protected: static const int vector_to_slot[]; - uint32_t m_icr; + u32 m_icr; - h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); virtual void device_start() override; virtual void device_reset() override; @@ -116,25 +116,25 @@ protected: class h8s_intc_device : public h8h_intc_device { public: - h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : h8s_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); } - uint8_t ipr_r(offs_t offset); - void ipr_w(offs_t offset, uint8_t data); - uint8_t iprk_r(); - void iprk_w(uint8_t data); - uint8_t iscrh_r(); - void iscrh_w(uint8_t data); - uint8_t iscrl_r(); - void iscrl_w(uint8_t data); + u8 ipr_r(offs_t offset); + void ipr_w(offs_t offset, u8 data); + u8 iprk_r(); + void iprk_w(u8 data); + u8 iscrh_r(); + void iscrh_w(u8 data); + u8 iscrl_r(); + void iscrl_w(u8 data); private: static const int vector_to_slot[]; - uint8_t m_ipr[11]; + u8 m_ipr[11]; virtual void get_priority(int vect, int &icr_pri, int &ipr_pri) const override; virtual void update_irq_types() override; @@ -143,7 +143,7 @@ private: class gt913_intc_device : public h8_intc_device { public: - gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); template gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : gt913_intc_device(mconfig, tag, owner) { diff --git a/src/devices/cpu/h8/h8_port.cpp b/src/devices/cpu/h8/h8_port.cpp index 2580947fabc..a4ea9839c26 100644 --- a/src/devices/cpu/h8/h8_port.cpp +++ b/src/devices/cpu/h8/h8_port.cpp @@ -18,66 +18,66 @@ DEFINE_DEVICE_TYPE(H8_PORT, h8_port_device, "h8_digital_port", "H8 digital port") -h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, H8_PORT, tag, owner, clock), m_cpu(*this, DEVICE_SELF_OWNER), m_address(0), m_default_ddr(0), m_ddr(0), m_pcr(0), m_odr(0), m_mask(0), m_dr(0), m_last_output(0) { } -void h8_port_device::ddr_w(uint8_t data) +void h8_port_device::ddr_w(u8 data) { // logerror("ddr_w %02x\n", data); m_ddr = data; update_output(); } -uint8_t h8_port_device::ddr_r() +u8 h8_port_device::ddr_r() { return m_ddr; } -void h8_port_device::dr_w(uint8_t data) +void h8_port_device::dr_w(u8 data) { // logerror("dr_w %02x\n", data); m_dr = data; update_output(); } -uint8_t h8_port_device::dr_r() +u8 h8_port_device::dr_r() { // logerror("dr_r %02x\n", (dr | mask) & 0xff); return m_dr | m_mask; } -uint8_t h8_port_device::port_r() +u8 h8_port_device::port_r() { - uint8_t res = m_mask | (m_dr & m_ddr); - if((m_ddr & ~m_mask) != uint8_t(~m_mask)) + u8 res = m_mask | (m_dr & m_ddr); + if((m_ddr & ~m_mask) != u8(~m_mask)) res |= m_cpu->do_read_port(m_address) & ~m_ddr; - // logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, uint8_t(~mask)); + // logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, u8(~mask)); return res; } -void h8_port_device::pcr_w(uint8_t data) +void h8_port_device::pcr_w(u8 data) { logerror("pcr_w %02x\n", data); m_pcr = data; } -uint8_t h8_port_device::pcr_r() +u8 h8_port_device::pcr_r() { logerror("pcr_r %02x\n", (m_pcr | m_mask) & 0xff); return m_pcr | m_mask; } -void h8_port_device::odr_w(uint8_t data) +void h8_port_device::odr_w(u8 data) { logerror("odr_w %02x\n", data); m_odr = data; } -uint8_t h8_port_device::odr_r() +u8 h8_port_device::odr_r() { logerror("odr_r %02x\n", (m_odr | ~m_mask) & 0xff); return m_odr | ~m_mask; @@ -85,11 +85,12 @@ uint8_t h8_port_device::odr_r() void h8_port_device::update_output() { - uint8_t data = m_dr & m_ddr & ~m_mask; - uint8_t ddr = m_ddr & ~m_mask; // 0-bits = hi-z + u8 data = m_dr & m_ddr & ~m_mask; + u8 ddr = m_ddr & ~m_mask; // 0-bits = hi-z + u16 res = ddr << 8 | data; - if(m_last_output != (ddr << 8 | data)) { - m_last_output = ddr << 8 | data; + if(res != m_last_output) { + m_last_output = res; m_cpu->do_write_port(m_address, data, ddr); } } diff --git a/src/devices/cpu/h8/h8_port.h b/src/devices/cpu/h8/h8_port.h index 25381f9193d..1f97f243394 100644 --- a/src/devices/cpu/h8/h8_port.h +++ b/src/devices/cpu/h8/h8_port.h @@ -17,8 +17,8 @@ class h8_port_device : public device_t { public: - h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - template h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int address, uint8_t default_ddr, uint8_t mask) + h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + template h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int address, u8 default_ddr, u8 mask) : h8_port_device(mconfig, tag, owner, 0) { m_cpu.set_tag(std::forward(cpu)); @@ -27,15 +27,15 @@ public: m_mask = mask; } - void ddr_w(uint8_t data); - uint8_t ddr_r(); - void dr_w(uint8_t data); - uint8_t dr_r(); - uint8_t port_r(); - void pcr_w(uint8_t data); - uint8_t pcr_r(); - void odr_w(uint8_t data); - uint8_t odr_r(); + void ddr_w(u8 data); + u8 ddr_r(); + void dr_w(u8 data); + u8 dr_r(); + u8 port_r(); + void pcr_w(u8 data); + u8 pcr_r(); + void odr_w(u8 data); + u8 odr_r(); bool nvram_read(util::read_stream &file); bool nvram_write(util::write_stream &file); @@ -44,10 +44,10 @@ protected: required_device m_cpu; int m_address; - uint8_t m_default_ddr, m_ddr, m_pcr, m_odr; - uint8_t m_mask; - uint8_t m_dr; - int32_t m_last_output; + u8 m_default_ddr, m_ddr, m_pcr, m_odr; + u8 m_mask; + u8 m_dr; + s32 m_last_output; virtual void device_start() override; virtual void device_reset() override; diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp index 1bfe3f82261..bc08b6b3a46 100644 --- a/src/devices/cpu/h8/h8_sci.cpp +++ b/src/devices/cpu/h8/h8_sci.cpp @@ -19,7 +19,7 @@ DEFINE_DEVICE_TYPE(H8_SCI, h8_sci_device, "h8_sci", "H8 Serial Communications In const char *const h8_sci_device::state_names[] = { "idle", "start", "bit", "parity", "stop", "last-tick" }; -h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, H8_SCI, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG), @@ -35,7 +35,7 @@ void h8_sci_device::do_set_external_clock_period(const attotime &period) m_external_clock_period = period; } -void h8_sci_device::smr_w(uint8_t data) +void h8_sci_device::smr_w(u8 data) { m_smr = data; if(V>=2) logerror("smr_w %02x %s %c%c%c%s /%d (%06x)\n", data, @@ -49,20 +49,20 @@ void h8_sci_device::smr_w(uint8_t data) clock_update(); } -uint8_t h8_sci_device::smr_r() +u8 h8_sci_device::smr_r() { if(V>=2) logerror("smr_r %02x (%06x)\n", m_smr, m_cpu->pc()); return m_smr; } -void h8_sci_device::brr_w(uint8_t data) +void h8_sci_device::brr_w(u8 data) { m_brr = data; if(V>=2) logerror("brr_w %02x (%06x)\n", data, m_cpu->pc()); clock_update(); } -uint8_t h8_sci_device::brr_r() +u8 h8_sci_device::brr_r() { if(V>=2) logerror("brr_r %02x (%06x)\n", m_brr, m_cpu->pc()); return m_brr; @@ -78,7 +78,7 @@ bool h8_sci_device::has_recv_error() const return m_ssr & (SSR_ORER|SSR_PER|SSR_FER); } -void h8_sci_device::scr_w(uint8_t data) +void h8_sci_device::scr_w(u8 data) { if(V>=2) logerror("scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data, data & SCR_TIE ? " txi" : "", @@ -90,7 +90,7 @@ void h8_sci_device::scr_w(uint8_t data) data & SCR_CKE, m_cpu->pc()); - uint8_t delta = m_scr ^ data; + u8 delta = m_scr ^ data; m_scr = data; clock_update(); @@ -111,13 +111,13 @@ void h8_sci_device::scr_w(uint8_t data) m_intc->internal_interrupt(m_eri_int); } -uint8_t h8_sci_device::scr_r() +u8 h8_sci_device::scr_r() { if(V>=2) logerror("scr_r %02x (%06x)\n", m_scr, m_cpu->pc()); return m_scr; } -void h8_sci_device::tdr_w(uint8_t data) +void h8_sci_device::tdr_w(u8 data) { if(V>=2) logerror("tdr_w %02x (%06x)\n", data, m_cpu->pc()); m_tdr = data; @@ -128,13 +128,13 @@ void h8_sci_device::tdr_w(uint8_t data) } } -uint8_t h8_sci_device::tdr_r() +u8 h8_sci_device::tdr_r() { if(V>=2) logerror("tdr_r %02x (%06x)\n", m_tdr, m_cpu->pc()); return m_tdr; } -void h8_sci_device::ssr_w(uint8_t data) +void h8_sci_device::ssr_w(u8 data) { if(!(m_scr & SCR_TE)) { data |= SSR_TDRE; @@ -152,13 +152,13 @@ void h8_sci_device::ssr_w(uint8_t data) rx_start(); } -uint8_t h8_sci_device::ssr_r() +u8 h8_sci_device::ssr_r() { if(V>=3) logerror("ssr_r %02x (%06x)\n", m_ssr, m_cpu->pc()); return m_ssr; } -uint8_t h8_sci_device::rdr_r() +u8 h8_sci_device::rdr_r() { if(V>=2) logerror("rdr_r %02x (%06x)\n", m_rdr, m_cpu->pc()); if(m_cpu->access_is_dma()) @@ -166,12 +166,12 @@ uint8_t h8_sci_device::rdr_r() return m_rdr; } -void h8_sci_device::scmr_w(uint8_t data) +void h8_sci_device::scmr_w(u8 data) { if(V>=2) logerror("scmr_w %02x (%06x)\n", data, m_cpu->pc()); } -uint8_t h8_sci_device::scmr_r() +u8 h8_sci_device::scmr_r() { if(V>=2) logerror("scmr_r (%06x)\n", m_cpu->pc()); return 0x00; @@ -349,15 +349,15 @@ void h8_sci_device::do_clk_w(int state) } } -uint64_t h8_sci_device::internal_update(uint64_t current_time) +u64 h8_sci_device::internal_update(u64 current_time) { - uint64_t event = 0; + u64 event = 0; switch(m_clock_mode) { case clock_mode_t::INTERNAL_SYNC_OUT: if(m_clock_state || !m_clock_value) { - uint64_t fp = m_divider*2; + u64 fp = m_divider*2; if(current_time >= m_clock_base) { - uint64_t delta = current_time - m_clock_base; + u64 delta = current_time - m_clock_base; if(delta >= fp) { delta -= fp; m_clock_base += fp; @@ -385,9 +385,9 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time) case clock_mode_t::INTERNAL_ASYNC: case clock_mode_t::INTERNAL_ASYNC_OUT: if(m_clock_state || !m_clock_value) { - uint64_t fp = m_divider*16; + u64 fp = m_divider*16; if(current_time >= m_clock_base) { - uint64_t delta = current_time - m_clock_base; + u64 delta = current_time - m_clock_base; if(delta >= fp) { delta -= fp; m_clock_base += fp; @@ -414,9 +414,9 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time) case clock_mode_t::EXTERNAL_RATE_SYNC: if(m_clock_state || !m_clock_value) { - uint64_t ctime = uint64_t(current_time*m_internal_to_external_ratio*2); + u64 ctime = u64(current_time*m_internal_to_external_ratio*2); if(ctime >= m_clock_base) { - uint64_t delta = ctime - m_clock_base; + u64 delta = ctime - m_clock_base; m_clock_base += delta & ~1; delta &= 1; bool new_clock = delta >= 1; @@ -432,15 +432,15 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time) } } - event = uint64_t((m_clock_base + (m_clock_value ? 2 : 1))*m_external_to_internal_ratio)+1; + event = u64((m_clock_base + (m_clock_value ? 2 : 1))*m_external_to_internal_ratio)+1; } break; case clock_mode_t::EXTERNAL_RATE_ASYNC: if(m_clock_state || !m_clock_value) { - uint64_t ctime = uint64_t(current_time*m_internal_to_external_ratio); + u64 ctime = u64(current_time*m_internal_to_external_ratio); if(ctime >= m_clock_base) { - uint64_t delta = ctime - m_clock_base; + u64 delta = ctime - m_clock_base; m_clock_base += delta & ~15; delta &= 15; bool new_clock = delta >= 8; @@ -456,7 +456,7 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time) } } - event = uint64_t((m_clock_base + (m_clock_value ? 16 : 8))*m_external_to_internal_ratio)+1; + event = u64((m_clock_base + (m_clock_value ? 16 : 8))*m_external_to_internal_ratio)+1; } break; @@ -496,13 +496,13 @@ void h8_sci_device::clock_start(int mode) case clock_mode_t::EXTERNAL_RATE_ASYNC: if(V>=2) logerror("Simulating external clock async\n"); - m_clock_base = uint64_t(m_cpu->total_cycles()*m_internal_to_external_ratio); + m_clock_base = u64(m_cpu->total_cycles()*m_internal_to_external_ratio); m_cpu->internal_update(); break; case clock_mode_t::EXTERNAL_RATE_SYNC: if(V>=2) logerror("Simulating external clock sync\n"); - m_clock_base = uint64_t(m_cpu->total_cycles()*2*m_internal_to_external_ratio); + m_clock_base = u64(m_cpu->total_cycles()*2*m_internal_to_external_ratio); m_cpu->internal_update(); break; diff --git a/src/devices/cpu/h8/h8_sci.h b/src/devices/cpu/h8/h8_sci.h index e858a45d124..759de13deb3 100644 --- a/src/devices/cpu/h8/h8_sci.h +++ b/src/devices/cpu/h8/h8_sci.h @@ -19,7 +19,7 @@ class h8_intc_device; class h8_sci_device : public device_t { public: - h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, int id, T &&cpu, U &&intc, int eri, int rxi, int txi, int tei) : h8_sci_device(mconfig, tag, owner, 0) { @@ -34,24 +34,24 @@ public: void do_set_external_clock_period(const attotime &_period); - void smr_w(uint8_t data); - uint8_t smr_r(); - void brr_w(uint8_t data); - uint8_t brr_r(); - void scr_w(uint8_t data); - uint8_t scr_r(); - void tdr_w(uint8_t data); - uint8_t tdr_r(); - void ssr_w(uint8_t data); - uint8_t ssr_r(); - uint8_t rdr_r(); - void scmr_w(uint8_t data); - uint8_t scmr_r(); + void smr_w(u8 data); + u8 smr_r(); + void brr_w(u8 data); + u8 brr_r(); + void scr_w(u8 data); + u8 scr_r(); + void tdr_w(u8 data); + u8 tdr_r(); + void ssr_w(u8 data); + u8 ssr_r(); + u8 rdr_r(); + void scmr_w(u8 data); + u8 scmr_r(); void do_rx_w(int state); void do_clk_w(int state); - uint64_t internal_update(uint64_t current_time); + u64 internal_update(u64 current_time); protected: enum { @@ -116,8 +116,8 @@ protected: clock_mode_t m_clock_mode; bool m_clock_value, m_ext_clock_value, m_rx_value; - uint8_t m_rdr, m_tdr, m_smr, m_scr, m_ssr, m_brr, m_rsr, m_tsr; - uint64_t m_clock_base, m_divider; + u8 m_rdr, m_tdr, m_smr, m_scr, m_ssr, m_brr, m_rsr, m_tsr; + u64 m_clock_base, m_divider; std::string m_last_clock_message; diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp index 2d6ee431145..20ef62a7fbd 100644 --- a/src/devices/cpu/h8/h8_timer16.cpp +++ b/src/devices/cpu/h8/h8_timer16.cpp @@ -35,12 +35,12 @@ DEFINE_DEVICE_TYPE(H8325_TIMER16_CHANNEL, h8325_timer16_channel_device, "h8325_t DEFINE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device, "h8h_timer16_channel", "H8H 16-bit timer channel") DEFINE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device, "h8s_timer16_channel", "H8S 16-bit timer channel") -h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer16_channel_device(mconfig, H8_TIMER16_CHANNEL, tag, owner, clock) { } -h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG), @@ -50,12 +50,12 @@ h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconf { } -uint8_t h8_timer16_channel_device::tcr_r() +u8 h8_timer16_channel_device::tcr_r() { return m_tcr; } -void h8_timer16_channel_device::tcr_w(uint8_t data) +void h8_timer16_channel_device::tcr_w(u8 data) { update_counter(); m_tcr = data; @@ -64,27 +64,27 @@ void h8_timer16_channel_device::tcr_w(uint8_t data) recalc_event(); } -uint8_t h8_timer16_channel_device::tmdr_r() +u8 h8_timer16_channel_device::tmdr_r() { return 0x00; } -void h8_timer16_channel_device::tmdr_w(uint8_t data) +void h8_timer16_channel_device::tmdr_w(u8 data) { if(V>=1) logerror("tmdr_w %02x\n", data); } -uint8_t h8_timer16_channel_device::tior_r() +u8 h8_timer16_channel_device::tior_r() { return 0x00; } -void h8_timer16_channel_device::tior_w(offs_t offset, uint8_t data) +void h8_timer16_channel_device::tior_w(offs_t offset, u8 data) { if(V>=1) logerror("tior_w %d, %02x\n", offset, data); } -void h8_timer16_channel_device::set_ier(uint8_t value) +void h8_timer16_channel_device::set_ier(u8 value) { update_counter(); m_ier = value; @@ -98,12 +98,12 @@ void h8_timer16_channel_device::set_enable(bool enable) recalc_event(); } -uint8_t h8_timer16_channel_device::tier_r() +u8 h8_timer16_channel_device::tier_r() { return m_tier; } -void h8_timer16_channel_device::tier_w(uint8_t data) +void h8_timer16_channel_device::tier_w(u8 data) { update_counter(); if(V>=1) logerror("tier_w %02x\n", data); @@ -120,13 +120,13 @@ void h8_timer16_channel_device::tier_w(uint8_t data) recalc_event(); } -uint8_t h8_timer16_channel_device::tsr_r() +u8 h8_timer16_channel_device::tsr_r() { update_counter(); return isr_to_sr(); } -void h8_timer16_channel_device::tsr_w(uint8_t data) +void h8_timer16_channel_device::tsr_w(u8 data) { update_counter(); if(V>=1) logerror("tsr_w %02x\n", data); @@ -134,13 +134,13 @@ void h8_timer16_channel_device::tsr_w(uint8_t data) recalc_event(); } -uint16_t h8_timer16_channel_device::tcnt_r() +u16 h8_timer16_channel_device::tcnt_r() { update_counter(); return m_tcnt; } -void h8_timer16_channel_device::tcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void h8_timer16_channel_device::tcnt_w(offs_t offset, u16 data, u16 mem_mask) { update_counter(); COMBINE_DATA(&m_tcnt); @@ -148,12 +148,12 @@ void h8_timer16_channel_device::tcnt_w(offs_t offset, uint16_t data, uint16_t me recalc_event(); } -uint16_t h8_timer16_channel_device::tgr_r(offs_t offset) +u16 h8_timer16_channel_device::tgr_r(offs_t offset) { return m_tgr[offset]; } -void h8_timer16_channel_device::tgr_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void h8_timer16_channel_device::tgr_w(offs_t offset, u16 data, u16 mem_mask) { update_counter(); COMBINE_DATA(m_tgr + offset); @@ -161,12 +161,12 @@ void h8_timer16_channel_device::tgr_w(offs_t offset, uint16_t data, uint16_t mem recalc_event(); } -uint16_t h8_timer16_channel_device::tbr_r(offs_t offset) +u16 h8_timer16_channel_device::tbr_r(offs_t offset) { return m_tgr[offset+m_tgr_count]; } -void h8_timer16_channel_device::tbr_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void h8_timer16_channel_device::tbr_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(m_tgr + offset + m_tgr_count); if(V>=1) logerror("tbr%c_w %04x\n", 'a'+offset, m_tgr[offset + m_tgr_count]); @@ -213,7 +213,7 @@ void h8_timer16_channel_device::device_reset() m_counter_incrementing = true; } -uint64_t h8_timer16_channel_device::internal_update(uint64_t current_time) +u64 h8_timer16_channel_device::internal_update(u64 current_time) { if(m_event_time && current_time >= m_event_time) { update_counter(current_time); @@ -223,7 +223,7 @@ uint64_t h8_timer16_channel_device::internal_update(uint64_t current_time) return m_event_time; } -void h8_timer16_channel_device::update_counter(uint64_t cur_time) +void h8_timer16_channel_device::update_counter(u64 cur_time) { if(m_clock_type != DIV_1) return; @@ -236,8 +236,8 @@ void h8_timer16_channel_device::update_counter(uint64_t cur_time) return; } - uint64_t base_time = m_last_clock_update; - uint64_t new_time = cur_time; + u64 base_time = m_last_clock_update; + u64 new_time = cur_time; if(m_clock_divider) { base_time = (base_time + m_phase) >> m_clock_divider; new_time = (new_time + m_phase) >> m_clock_divider; @@ -262,7 +262,7 @@ void h8_timer16_channel_device::update_counter(uint64_t cur_time) m_last_clock_update = cur_time; } -void h8_timer16_channel_device::recalc_event(uint64_t cur_time) +void h8_timer16_channel_device::recalc_event(u64 cur_time) { if(!m_channel_active) { m_event_time = 0; @@ -270,7 +270,7 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time) } bool update_cpu = cur_time == 0; - uint64_t old_event_time = m_event_time; + u64 old_event_time = m_event_time; if(m_clock_type != DIV_1) { m_event_time = 0; @@ -284,7 +284,7 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time) cur_time = m_cpu->total_cycles(); if(m_counter_incrementing) { - uint32_t event_delay = 0xffffffff; + u32 event_delay = 0xffffffff; if(m_tgr_clearing >= 0 && m_tgr[m_tgr_clearing]) m_counter_cycle = m_tgr[m_tgr_clearing]; else { @@ -297,7 +297,7 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time) } for(int i=0; i m_tcnt) { if(m_tcnt >= m_counter_cycle || m_tgr[i] <= m_counter_cycle) new_delay = m_tgr[i] - m_tcnt; @@ -327,7 +327,7 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time) } -h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, H8_TIMER16, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_timer_channel(*this, "%u", 0) @@ -347,12 +347,12 @@ void h8_timer16_device::device_reset() } -uint8_t h8_timer16_device::tstr_r() +u8 h8_timer16_device::tstr_r() { return m_tstr; } -void h8_timer16_device::tstr_w(uint8_t data) +void h8_timer16_device::tstr_w(u8 data) { if(V>=1) logerror("tstr_w %02x\n", data); m_tstr = data; @@ -360,59 +360,59 @@ void h8_timer16_device::tstr_w(uint8_t data) m_timer_channel[i]->set_enable((m_tstr >> i) & 1); } -uint8_t h8_timer16_device::tsyr_r() +u8 h8_timer16_device::tsyr_r() { return 0x00; } -void h8_timer16_device::tsyr_w(uint8_t data) +void h8_timer16_device::tsyr_w(u8 data) { if(V>=1) logerror("tsyr_w %02x\n", data); } -uint8_t h8_timer16_device::tmdr_r() +u8 h8_timer16_device::tmdr_r() { return 0x00; } -void h8_timer16_device::tmdr_w(uint8_t data) +void h8_timer16_device::tmdr_w(u8 data) { if(V>=1) logerror("tmdr_w %02x\n", data); } -uint8_t h8_timer16_device::tfcr_r() +u8 h8_timer16_device::tfcr_r() { return 0x00; } -void h8_timer16_device::tfcr_w(uint8_t data) +void h8_timer16_device::tfcr_w(u8 data) { if(V>=1) logerror("tfcr_w %02x\n", data); } -uint8_t h8_timer16_device::toer_r() +u8 h8_timer16_device::toer_r() { return 0x00; } -void h8_timer16_device::toer_w(uint8_t data) +void h8_timer16_device::toer_w(u8 data) { if(V>=1) logerror("toer_w %02x\n", data); } -uint8_t h8_timer16_device::tocr_r() +u8 h8_timer16_device::tocr_r() { return 0x00; } -void h8_timer16_device::tocr_w(uint8_t data) +void h8_timer16_device::tocr_w(u8 data) { if(V>=1) logerror("tocr_w %02x\n", data); } -uint8_t h8_timer16_device::tisr_r(offs_t offset) +u8 h8_timer16_device::tisr_r(offs_t offset) { - uint8_t r = 0; + u8 r = 0; for(int i=0; itisr_r(offset) << i; for(int i=m_timer_count; i<4; i++) @@ -423,24 +423,24 @@ uint8_t h8_timer16_device::tisr_r(offs_t offset) return r; } -void h8_timer16_device::tisr_w(offs_t offset, uint8_t data) +void h8_timer16_device::tisr_w(offs_t offset, u8 data) { if(V>=1) logerror("tisr%c_w %02x\n", 'a'+offset, data); for(int i=0; itisr_w(offset, data >> i); } -uint8_t h8_timer16_device::tisrc_r() +u8 h8_timer16_device::tisrc_r() { return tisr_r(2); } -void h8_timer16_device::tisrc_w(uint8_t data) +void h8_timer16_device::tisrc_w(u8 data) { tisr_w(2, data); } -void h8_timer16_device::tolr_w(uint8_t data) +void h8_timer16_device::tolr_w(u8 data) { if(V>=1) logerror("tocr_w %02x\n", data); } @@ -450,11 +450,11 @@ void h8_timer16_channel_device::tier_update() { } -void h8_timer16_channel_device::isr_update(uint8_t val) +void h8_timer16_channel_device::isr_update(u8 val) { } -uint8_t h8_timer16_channel_device::isr_to_sr() const +u8 h8_timer16_channel_device::isr_to_sr() const { return 0x00; } @@ -463,7 +463,7 @@ void h8_timer16_channel_device::tcr_update() { } -void h8_timer16_channel_device::tisr_w(int offset, uint8_t value) +void h8_timer16_channel_device::tisr_w(int offset, u8 value) { update_counter(); if(!(value & 0x01)) { @@ -507,7 +507,7 @@ void h8_timer16_channel_device::tisr_w(int offset, uint8_t value) recalc_event(); } -uint8_t h8_timer16_channel_device::tisr_r(int offset) const +u8 h8_timer16_channel_device::tisr_r(int offset) const { switch(offset) { case 0: @@ -523,7 +523,7 @@ uint8_t h8_timer16_channel_device::tisr_r(int offset) const // H8/325 -h8325_timer16_channel_device::h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8325_timer16_channel_device::h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer16_channel_device(mconfig, H8325_TIMER16_CHANNEL, tag, owner, clock), m_tcsr(0) { @@ -575,7 +575,7 @@ void h8325_timer16_channel_device::tcr_update() } } -void h8325_timer16_channel_device::isr_update(uint8_t val) +void h8325_timer16_channel_device::isr_update(u8 val) { m_tcsr = val; @@ -594,7 +594,7 @@ void h8325_timer16_channel_device::isr_update(uint8_t val) m_isr &= ~IRQ_C; } -uint8_t h8325_timer16_channel_device::isr_to_sr() const +u8 h8325_timer16_channel_device::isr_to_sr() const { return (m_tcsr & 0x0f) | (m_isr & IRQ_V ? 0x10 : 0) | @@ -606,7 +606,7 @@ uint8_t h8325_timer16_channel_device::isr_to_sr() const // H8H -h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer16_channel_device(mconfig, H8H_TIMER16_CHANNEL, tag, owner, clock) { } @@ -624,7 +624,7 @@ void h8h_timer16_channel_device::tier_update() (m_tier & 0x04 ? IRQ_V : 0); } -void h8h_timer16_channel_device::isr_update(uint8_t val) +void h8h_timer16_channel_device::isr_update(u8 val) { if(!(val & 1)) m_isr &= ~IRQ_A; @@ -634,7 +634,7 @@ void h8h_timer16_channel_device::isr_update(uint8_t val) m_isr &= ~IRQ_V; } -uint8_t h8h_timer16_channel_device::isr_to_sr() const +u8 h8h_timer16_channel_device::isr_to_sr() const { return 0xf8 | (m_isr & IRQ_V ? 4 : 0) | (m_isr & IRQ_B ? 2 : 0) | (m_isr & IRQ_A ? 1 : 0); } @@ -693,7 +693,7 @@ void h8h_timer16_channel_device::tcr_update() // H8S -h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer16_channel_device(mconfig, H8S_TIMER16_CHANNEL, tag, owner, clock) { } @@ -715,12 +715,12 @@ void h8s_timer16_channel_device::tier_update() (m_tier & 0x80 ? IRQ_TRIG : 0); } -void h8s_timer16_channel_device::isr_update(uint8_t val) +void h8s_timer16_channel_device::isr_update(u8 val) { m_isr &= (val | m_tier_mask | 0xc0); } -uint8_t h8s_timer16_channel_device::isr_to_sr() const +u8 h8s_timer16_channel_device::isr_to_sr() const { return 0xc0 | m_isr; } diff --git a/src/devices/cpu/h8/h8_timer16.h b/src/devices/cpu/h8/h8_timer16.h index 4e0b0279fe5..fb53e0bfc21 100644 --- a/src/devices/cpu/h8/h8_timer16.h +++ b/src/devices/cpu/h8/h8_timer16.h @@ -55,7 +55,7 @@ public: }; - h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tbr_count, U &&intc, int irq_base) : h8_timer16_channel_device(mconfig, tag, owner, 0) { @@ -73,62 +73,62 @@ public: m_interrupt[5] = irq_base; } - uint8_t tcr_r(); - void tcr_w(uint8_t data); - uint8_t tmdr_r(); - void tmdr_w(uint8_t data); - uint8_t tior_r(); - void tior_w(offs_t offset, uint8_t data); - uint8_t tier_r(); - void tier_w(uint8_t data); - uint8_t tsr_r(); - void tsr_w(uint8_t data); - uint16_t tcnt_r(); - void tcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t tgr_r(offs_t offset); - void tgr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t tbr_r(offs_t offset); - void tbr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - uint64_t internal_update(uint64_t current_time); - void set_ier(uint8_t value); + u8 tcr_r(); + void tcr_w(u8 data); + u8 tmdr_r(); + void tmdr_w(u8 data); + u8 tior_r(); + void tior_w(offs_t offset, u8 data); + u8 tier_r(); + void tier_w(u8 data); + u8 tsr_r(); + void tsr_w(u8 data); + u16 tcnt_r(); + void tcnt_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 tgr_r(offs_t offset); + void tgr_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 tbr_r(offs_t offset); + void tbr_w(offs_t offset, u16 data, u16 mem_mask = ~0); + + u64 internal_update(u64 current_time); + void set_ier(u8 value); void set_enable(bool enable); - void tisr_w(int offset, uint8_t data); - uint8_t tisr_r(int offset) const; + void tisr_w(int offset, u8 data); + u8 tisr_r(int offset) const; protected: required_device m_cpu; required_device m_intc; optional_device m_chained_timer; int m_interrupt[6]; - uint8_t m_tier_mask; + u8 m_tier_mask; int m_tgr_count, m_tbr_count; int m_tgr_clearing; - uint8_t m_tcr, m_tier, m_ier, m_isr; + u8 m_tcr, m_tier, m_ier, m_isr; int m_clock_type, m_clock_divider; - uint16_t m_tcnt, m_tgr[6]; - uint64_t m_last_clock_update, m_event_time; - uint32_t m_phase, m_counter_cycle; + u16 m_tcnt, m_tgr[6]; + u64 m_last_clock_update, m_event_time; + u32 m_phase, m_counter_cycle; bool m_counter_incrementing; bool m_channel_active; - h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); virtual void device_start() override; virtual void device_reset() override; - void update_counter(uint64_t cur_time = 0); - void recalc_event(uint64_t cur_time = 0); + void update_counter(u64 cur_time = 0); + void recalc_event(u64 cur_time = 0); virtual void tcr_update(); virtual void tier_update(); - virtual void isr_update(uint8_t value); - virtual uint8_t isr_to_sr() const; + virtual void isr_update(u8 value); + virtual u8 isr_to_sr() const; }; class h8325_timer16_channel_device : public h8_timer16_channel_device { public: - h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_base) : h8325_timer16_channel_device(mconfig, tag, owner, 0) { @@ -146,27 +146,27 @@ public: virtual ~h8325_timer16_channel_device(); - uint16_t ocra_r() { return tgr_r(0); } - void ocra_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { tgr_w(0, data, mem_mask); } - uint16_t ocrb_r() { return tgr_r(1); } - void ocrb_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { tgr_w(1, data, mem_mask); } - uint16_t icr_r() { return tgr_r(2); } + u16 ocra_r() { return tgr_r(0); } + void ocra_w(offs_t offset, u16 data, u16 mem_mask = ~0) { tgr_w(0, data, mem_mask); } + u16 ocrb_r() { return tgr_r(1); } + void ocrb_w(offs_t offset, u16 data, u16 mem_mask = ~0) { tgr_w(1, data, mem_mask); } + u16 icr_r() { return tgr_r(2); } protected: virtual void tcr_update() override; - virtual void isr_update(uint8_t value) override; - virtual uint8_t isr_to_sr() const override; + virtual void isr_update(u8 value) override; + virtual u8 isr_to_sr() const override; virtual void device_start() override; virtual void device_reset() override; private: - uint8_t m_tcsr; + u8 m_tcsr; }; class h8h_timer16_channel_device : public h8_timer16_channel_device { public: - h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tbr_count, U &&intc, int irq_base) : h8h_timer16_channel_device(mconfig, tag, owner, 0) { @@ -188,13 +188,13 @@ public: protected: virtual void tcr_update() override; virtual void tier_update() override; - virtual void isr_update(uint8_t value) override; - virtual uint8_t isr_to_sr() const override; + virtual void isr_update(u8 value) override; + virtual u8 isr_to_sr() const override; }; class h8s_timer16_channel_device : public h8_timer16_channel_device { public: - h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tier_mask, U &&intc, int irq_base, int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7) : h8s_timer16_channel_device(mconfig, tag, owner, 0) @@ -230,14 +230,14 @@ protected: virtual void tcr_update() override; virtual void tier_update() override; - virtual void isr_update(uint8_t value) override; - virtual uint8_t isr_to_sr() const override; + virtual void isr_update(u8 value) override; + virtual u8 isr_to_sr() const override; }; class h8_timer16_device : public device_t { public: - h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - template h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int timer_count, uint8_t default_tstr) + h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + template h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int timer_count, u8 default_tstr) : h8_timer16_device(mconfig, tag, owner, 0) { m_cpu.set_tag(std::forward(cpu)); @@ -245,30 +245,30 @@ public: m_default_tstr = default_tstr; } - uint8_t tstr_r(); - void tstr_w(uint8_t data); - uint8_t tsyr_r(); - void tsyr_w(uint8_t data); - uint8_t tmdr_r(); - void tmdr_w(uint8_t data); - uint8_t tfcr_r(); - void tfcr_w(uint8_t data); - uint8_t toer_r(); - void toer_w(uint8_t data); - uint8_t tocr_r(); - void tocr_w(uint8_t data); - uint8_t tisr_r(offs_t offset); - void tisr_w(offs_t offset, uint8_t data); - uint8_t tisrc_r(); - void tisrc_w(uint8_t data); - void tolr_w(uint8_t data); + u8 tstr_r(); + void tstr_w(u8 data); + u8 tsyr_r(); + void tsyr_w(u8 data); + u8 tmdr_r(); + void tmdr_w(u8 data); + u8 tfcr_r(); + void tfcr_w(u8 data); + u8 toer_r(); + void toer_w(u8 data); + u8 tocr_r(); + void tocr_w(u8 data); + u8 tisr_r(offs_t offset); + void tisr_w(offs_t offset, u8 data); + u8 tisrc_r(); + void tisrc_w(u8 data); + void tolr_w(u8 data); protected: required_device m_cpu; optional_device_array m_timer_channel; int m_timer_count; - uint8_t m_default_tstr; - uint8_t m_tstr; + u8 m_default_tstr; + u8 m_tstr; virtual void device_start() override; virtual void device_reset() override; diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp index 59678a7755a..1af76263a71 100644 --- a/src/devices/cpu/h8/h8_timer8.cpp +++ b/src/devices/cpu/h8/h8_timer8.cpp @@ -26,12 +26,12 @@ static constexpr int V = 1; DEFINE_DEVICE_TYPE(H8_TIMER8_CHANNEL, h8_timer8_channel_device, "h8_timer8_channel", "H8 8-bit timer channel") DEFINE_DEVICE_TYPE(H8H_TIMER8_CHANNEL, h8h_timer8_channel_device, "h8h_timer8_channel", "H8H 8-bit timer channel") -h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer8_channel_device(mconfig, H8_TIMER8_CHANNEL, tag, owner, clock) { } -h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG), @@ -44,12 +44,12 @@ h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig m_has_ice = false; } -uint8_t h8_timer8_channel_device::tcr_r() +u8 h8_timer8_channel_device::tcr_r() { return m_tcr; } -void h8_timer8_channel_device::tcr_w(uint8_t data) +void h8_timer8_channel_device::tcr_w(u8 data) { update_counter(); m_tcr = data; @@ -136,16 +136,16 @@ void h8_timer8_channel_device::update_tcr() logerror(std::move(message).str()); } -uint8_t h8_timer8_channel_device::tcsr_r() +u8 h8_timer8_channel_device::tcsr_r() { return m_tcsr; } -void h8_timer8_channel_device::tcsr_w(uint8_t data) +void h8_timer8_channel_device::tcsr_w(u8 data) { update_counter(); - uint8_t mask = m_has_adte || m_has_ice ? 0x1f : 0x0f; + u8 mask = m_has_adte || m_has_ice ? 0x1f : 0x0f; m_tcsr = (m_tcsr & ~mask) | (data & mask); m_tcsr &= data | 0x1f; @@ -154,12 +154,12 @@ void h8_timer8_channel_device::tcsr_w(uint8_t data) recalc_event(); } -uint8_t h8_timer8_channel_device::tcor_r(offs_t offset) +u8 h8_timer8_channel_device::tcor_r(offs_t offset) { return m_tcor[offset]; } -void h8_timer8_channel_device::tcor_w(offs_t offset, uint8_t data) +void h8_timer8_channel_device::tcor_w(offs_t offset, u8 data) { update_counter(); m_tcor[offset] = data; @@ -167,14 +167,14 @@ void h8_timer8_channel_device::tcor_w(offs_t offset, uint8_t data) recalc_event(); } -uint8_t h8_timer8_channel_device::tcnt_r() +u8 h8_timer8_channel_device::tcnt_r() { update_counter(); recalc_event(); return m_tcnt; } -void h8_timer8_channel_device::tcnt_w(uint8_t data) +void h8_timer8_channel_device::tcnt_w(u8 data) { update_counter(); m_tcnt = data; @@ -202,7 +202,7 @@ void h8_timer8_channel_device::device_reset() m_extra_clock_bit = false; } -uint64_t h8_timer8_channel_device::internal_update(uint64_t current_time) +u64 h8_timer8_channel_device::internal_update(u64 current_time) { if(m_event_time && current_time >= m_event_time) { update_counter(current_time); @@ -212,7 +212,7 @@ uint64_t h8_timer8_channel_device::internal_update(uint64_t current_time) return m_event_time; } -void h8_timer8_channel_device::update_counter(uint64_t cur_time) +void h8_timer8_channel_device::update_counter(u64 cur_time) { if(m_clock_type != DIV) return; @@ -220,8 +220,8 @@ void h8_timer8_channel_device::update_counter(uint64_t cur_time) if(!cur_time) cur_time = m_cpu->total_cycles(); - uint64_t base_time = (m_last_clock_update + m_clock_divider/2) / m_clock_divider; - uint64_t new_time = (cur_time + m_clock_divider/2) / m_clock_divider; + u64 base_time = (m_last_clock_update + m_clock_divider/2) / m_clock_divider; + u64 new_time = (cur_time + m_clock_divider/2) / m_clock_divider; int tt = m_tcnt + new_time - base_time; m_tcnt = tt % m_counter_cycle; @@ -255,10 +255,10 @@ void h8_timer8_channel_device::update_counter(uint64_t cur_time) m_last_clock_update = cur_time; } -void h8_timer8_channel_device::recalc_event(uint64_t cur_time) +void h8_timer8_channel_device::recalc_event(u64 cur_time) { bool update_cpu = cur_time == 0; - uint64_t old_event_time = m_event_time; + u64 old_event_time = m_event_time; if(m_clock_type != DIV) { m_event_time = 0; @@ -270,7 +270,7 @@ void h8_timer8_channel_device::recalc_event(uint64_t cur_time) if(!cur_time) cur_time = m_cpu->total_cycles(); - uint32_t event_delay = 0xffffffff; + u32 event_delay = 0xffffffff; if((m_clear_type == CLEAR_A || m_clear_type == CLEAR_B) && m_tcor[m_clear_type - CLEAR_A]) m_counter_cycle = m_tcor[m_clear_type - CLEAR_A]; else { @@ -281,7 +281,7 @@ void h8_timer8_channel_device::recalc_event(uint64_t cur_time) } for(auto &elem : m_tcor) { - uint32_t new_delay = 0xffffffff; + u32 new_delay = 0xffffffff; if(elem > m_tcnt) { if(m_tcnt >= m_counter_cycle || elem <= m_counter_cycle) new_delay = elem - m_tcnt; @@ -348,7 +348,7 @@ void h8_timer8_channel_device::timer_tick() } } -h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8_timer8_channel_device(mconfig, H8H_TIMER8_CHANNEL, tag, owner, clock) { // The extra clock bit is not used for h8h+ diff --git a/src/devices/cpu/h8/h8_timer8.h b/src/devices/cpu/h8/h8_timer8.h index 75a1366d464..c5f6dd98f39 100644 --- a/src/devices/cpu/h8/h8_timer8.h +++ b/src/devices/cpu/h8/h8_timer8.h @@ -28,7 +28,7 @@ public: DIV }; - h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_ca, int irq_cb, int irq_v, int div1, int div2, int div3, int div4, int div5, int div6) : h8_timer8_channel_device(mconfig, tag, owner, 0) @@ -46,16 +46,16 @@ public: m_div_tab[5] = div6; } - uint8_t tcr_r(); - void tcr_w(uint8_t data); - uint8_t tcsr_r(); - void tcsr_w(uint8_t data); - uint8_t tcor_r(offs_t offset); - void tcor_w(offs_t offset, uint8_t data); - uint8_t tcnt_r(); - void tcnt_w(uint8_t data); + u8 tcr_r(); + void tcr_w(u8 data); + u8 tcsr_r(); + void tcsr_w(u8 data); + u8 tcor_r(offs_t offset); + void tcor_w(offs_t offset, u8 data); + u8 tcnt_r(); + void tcnt_w(u8 data); - uint64_t internal_update(uint64_t current_time); + u64 internal_update(u64 current_time); void set_extra_clock_bit(bool bit); void chained_timer_overflow(); @@ -89,19 +89,19 @@ protected: int m_irq_ca, m_irq_cb, m_irq_v, m_chain_type; int m_div_tab[6]; - uint8_t m_tcor[2]; - uint8_t m_tcr, m_tcsr, m_tcnt; + u8 m_tcor[2]; + u8 m_tcr, m_tcsr, m_tcnt; bool m_extra_clock_bit, m_has_adte, m_has_ice; int m_clock_type, m_clock_divider, m_clear_type, m_counter_cycle; - uint64_t m_last_clock_update, m_event_time; + u64 m_last_clock_update, m_event_time; - h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); virtual void device_start() override; virtual void device_reset() override; - void update_counter(uint64_t cur_time = 0); - void recalc_event(uint64_t cur_time = 0); + void update_counter(u64 cur_time = 0); + void recalc_event(u64 cur_time = 0); void timer_tick(); void update_tcr(); @@ -109,7 +109,7 @@ protected: class h8h_timer8_channel_device : public h8_timer8_channel_device { public: - h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_ca, int irq_cb, int irq_v, V &&chain, int chain_type, bool has_adte, bool has_ice) : h8h_timer8_channel_device(mconfig, tag, owner, 0) diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp index 634909ca483..cecc47bb579 100644 --- a/src/devices/cpu/h8/h8_watchdog.cpp +++ b/src/devices/cpu/h8/h8_watchdog.cpp @@ -9,7 +9,7 @@ DEFINE_DEVICE_TYPE(H8_WATCHDOG, h8_watchdog_device, "h8_watchdog", "H8 watchdog" const int h8_watchdog_device::div_bh[8] = { 1, 6, 7, 9, 11, 13, 15, 17 }; const int h8_watchdog_device::div_s [8] = { 1, 5, 6, 7, 8, 9, 11, 12 }; -h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, H8_WATCHDOG, tag, owner, clock), m_cpu(*this, finder_base::DUMMY_TAG), m_intc(*this, finder_base::DUMMY_TAG) @@ -17,26 +17,26 @@ h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char } -uint64_t h8_watchdog_device::internal_update(uint64_t current_time) +u64 h8_watchdog_device::internal_update(u64 current_time) { tcnt_update(current_time); if(m_tcsr & TCSR_TME) { int shift = (m_type == S ? div_s : div_bh)[m_tcsr & TCSR_CKS]; - uint64_t spos = m_tcnt_cycle_base >> shift; + u64 spos = m_tcnt_cycle_base >> shift; return (spos + 0x100 - m_tcnt) << shift; } else return 0; } -void h8_watchdog_device::tcnt_update(uint64_t cur_time) +void h8_watchdog_device::tcnt_update(u64 cur_time) { if(m_tcsr & TCSR_TME) { int shift = (m_type == S ? div_s : div_bh)[m_tcsr & TCSR_CKS]; if(!cur_time) cur_time = m_cpu->total_cycles(); - uint64_t spos = m_tcnt_cycle_base >> shift; - uint64_t epos = cur_time >> shift; + u64 spos = m_tcnt_cycle_base >> shift; + u64 epos = cur_time >> shift; int next_tcnt = m_tcnt + int(epos - spos); m_tcnt = next_tcnt; @@ -62,14 +62,14 @@ void h8_watchdog_device::tcnt_update(uint64_t cur_time) } -uint16_t h8_watchdog_device::wd_r() +u16 h8_watchdog_device::wd_r() { if(!machine().side_effects_disabled()) tcnt_update(); return (m_tcsr << 8) | m_tcnt; } -void h8_watchdog_device::wd_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void h8_watchdog_device::wd_w(offs_t offset, u16 data, u16 mem_mask) { if(mem_mask != 0xffff) return; @@ -93,14 +93,14 @@ void h8_watchdog_device::wd_w(offs_t offset, uint16_t data, uint16_t mem_mask) } } -uint16_t h8_watchdog_device::rst_r() +u16 h8_watchdog_device::rst_r() { if(!machine().side_effects_disabled()) logerror("rst_r\n"); return 0; } -void h8_watchdog_device::rst_w(uint16_t data) +void h8_watchdog_device::rst_w(u16 data) { if((data & 0xff00) == 0xa500) logerror("wowf_w %02x\n", data & 0xff); diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h index c9d1ba39d6f..c6882fb1d5b 100644 --- a/src/devices/cpu/h8/h8_watchdog.h +++ b/src/devices/cpu/h8/h8_watchdog.h @@ -20,7 +20,7 @@ class h8_watchdog_device : public device_t { public: enum { B, H, S }; - h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); template h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq, int type) : h8_watchdog_device(mconfig, tag, owner, 0) { @@ -30,12 +30,12 @@ public: m_type = type; } - uint64_t internal_update(uint64_t current_time); + u64 internal_update(u64 current_time); - uint16_t wd_r(); - void wd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t rst_r(); - void rst_w(uint16_t data); + u16 wd_r(); + void wd_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 rst_r(); + void rst_w(u16 data); protected: virtual void device_start() override; @@ -62,10 +62,10 @@ private: required_device m_intc; int m_irq; int m_type; - uint8_t m_tcnt, m_tcsr, m_rst; - uint64_t m_tcnt_cycle_base; + u8 m_tcnt, m_tcsr, m_rst; + u64 m_tcnt_cycle_base; - void tcnt_update(uint64_t current_time = 0); + void tcnt_update(u64 current_time = 0); }; DECLARE_DEVICE_TYPE(H8_WATCHDOG, h8_watchdog_device) diff --git a/src/devices/cpu/h8/h8h.cpp b/src/devices/cpu/h8/h8h.cpp index 80ddd60c824..83801facdf8 100644 --- a/src/devices/cpu/h8/h8h.cpp +++ b/src/devices/cpu/h8/h8h.cpp @@ -4,7 +4,7 @@ #include "h8h.h" #include "h8hd.h" -h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) : +h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) : h8_device(mconfig, type, tag, owner, clock, map_delegate) { m_supports_advanced = true; diff --git a/src/devices/cpu/h8/h8h.h b/src/devices/cpu/h8/h8h.h index 65327190f7c..11e67d263b9 100644 --- a/src/devices/cpu/h8/h8h.h +++ b/src/devices/cpu/h8/h8h.h @@ -20,18 +20,18 @@ class h8h_device : public h8_device { protected: - h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate); + h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate); - virtual uint32_t execute_min_cycles() const noexcept override { return 2; } - virtual uint32_t execute_max_cycles() const noexcept override { return 20; } + virtual u32 execute_min_cycles() const noexcept override { return 2; } + virtual u32 execute_max_cycles() const noexcept override { return 20; } virtual std::unique_ptr create_disassembler() override; virtual void do_exec_full() override; virtual void do_exec_partial() override; - inline void r32_w(int reg, uint32_t val) { m_R[reg & 7] = val; m_R[(reg & 7) | 8] = val >> 16; } - inline uint32_t r32_r(int reg) const { return m_R[reg & 7] | (m_R[(reg & 7) | 8] << 16); } + inline void r32_w(int reg, u32 val) { m_R[reg & 7] = val; m_R[(reg & 7) | 8] = val >> 16; } + inline u32 r32_r(int reg) const { return m_R[reg & 7] | (m_R[(reg & 7) | 8] << 16); } #define O(o) void o ## _full(); void o ## _partial() diff --git a/src/devices/cpu/h8/h8s2000.cpp b/src/devices/cpu/h8/h8s2000.cpp index c77e2dc510c..7d056a63835 100644 --- a/src/devices/cpu/h8/h8s2000.cpp +++ b/src/devices/cpu/h8/h8s2000.cpp @@ -4,7 +4,7 @@ #include "h8s2000.h" #include "h8s2000d.h" -h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) : +h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) : h8h_device(mconfig, type, tag, owner, clock, map_delegate) { m_has_exr = true; @@ -18,31 +18,31 @@ std::unique_ptr h8s2000_device::create_disassembler() // FIXME: one-state bus cycles are only provided for on-chip ROM & RAM in H8S/2000 and H8S/2600. // All other accesses take *at least* two states each, and additional wait states are often programmed for external memory! -uint16_t h8s2000_device::read16i(uint32_t adr) +u16 h8s2000_device::read16i(u32 adr) { m_icount--; return m_cache.read_word(adr & ~1); } -uint8_t h8s2000_device::read8(uint32_t adr) +u8 h8s2000_device::read8(u32 adr) { m_icount--; return m_program.read_byte(adr); } -void h8s2000_device::write8(uint32_t adr, uint8_t data) +void h8s2000_device::write8(u32 adr, u8 data) { m_icount--; m_program.write_byte(adr, data); } -uint16_t h8s2000_device::read16(uint32_t adr) +u16 h8s2000_device::read16(u32 adr) { m_icount--; return m_program.read_word(adr & ~1); } -void h8s2000_device::write16(uint32_t adr, uint16_t data) +void h8s2000_device::write16(u32 adr, u16 data) { m_icount--; m_program.write_word(adr & ~1, data); diff --git a/src/devices/cpu/h8/h8s2000.h b/src/devices/cpu/h8/h8s2000.h index 5cb495bff78..3d1274fb726 100644 --- a/src/devices/cpu/h8/h8s2000.h +++ b/src/devices/cpu/h8/h8s2000.h @@ -22,18 +22,18 @@ class h8s2000_device : public h8h_device { protected: - h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate); + h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate); - virtual uint32_t execute_min_cycles() const noexcept override { return 1; } - virtual uint32_t execute_max_cycles() const noexcept override { return 19; } + virtual u32 execute_min_cycles() const noexcept override { return 1; } + virtual u32 execute_max_cycles() const noexcept override { return 19; } virtual std::unique_ptr create_disassembler() override; - virtual uint16_t read16i(uint32_t adr) override; - virtual uint8_t read8(uint32_t adr) override; - virtual void write8(uint32_t adr, uint8_t data) override; - virtual uint16_t read16(uint32_t adr) override; - virtual void write16(uint32_t adr, uint16_t data) override; + virtual u16 read16i(u32 adr) override; + virtual u8 read8(u32 adr) override; + virtual void write8(u32 adr, u8 data) override; + virtual u16 read16(u32 adr) override; + virtual void write16(u32 adr, u16 data) override; virtual void internal(int cycles) override; virtual void do_exec_full() override; diff --git a/src/devices/cpu/h8/h8s2245.cpp b/src/devices/cpu/h8/h8s2245.cpp index df6f84e56e2..90059698b7b 100644 --- a/src/devices/cpu/h8/h8s2245.cpp +++ b/src/devices/cpu/h8/h8s2245.cpp @@ -9,7 +9,7 @@ DEFINE_DEVICE_TYPE(H8S2245, h8s2245_device, "h8s2245", "Hitachi H8S/2245") DEFINE_DEVICE_TYPE(H8S2246, h8s2246_device, "h8s2246", "Hitachi H8S/2246") -h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2245_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -38,22 +38,22 @@ h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, { } -h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2245_device(mconfig, H8S2245, tag, owner, clock, 0xffec00) { } -h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2245_device(mconfig, H8S2241, tag, owner, clock, 0xffec00) { } -h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2245_device(mconfig, H8S2242, tag, owner, clock, 0xffdc00) { } -h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2245_device(mconfig, H8S2246, tag, owner, clock, 0xffdc00) { } @@ -282,9 +282,9 @@ void h8s2245_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h8s2245_device::internal_update(uint64_t current_time) +void h8s2245_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -313,26 +313,26 @@ void h8s2245_device::device_reset() m_mstpcr = 0x3fff; } -uint8_t h8s2245_device::syscr_r() +u8 h8s2245_device::syscr_r() { return m_syscr; } -void h8s2245_device::syscr_w(uint8_t data) +void h8s2245_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); logerror("syscr = %02x\n", data); } -uint16_t h8s2245_device::mstpcr_r() +u16 h8s2245_device::mstpcr_r() { return m_mstpcr; } -void h8s2245_device::mstpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void h8s2245_device::mstpcr_w(offs_t offset, u16 data, u16 mem_mask) { - uint16_t omstpcr = m_mstpcr; + u16 omstpcr = m_mstpcr; COMBINE_DATA(&m_mstpcr); if((omstpcr ^ m_mstpcr) & 0x72e0) { std::ostringstream message; diff --git a/src/devices/cpu/h8/h8s2245.h b/src/devices/cpu/h8/h8s2245.h index 1214d022034..14744418a4e 100644 --- a/src/devices/cpu/h8/h8s2245.h +++ b/src/devices/cpu/h8/h8s2245.h @@ -35,7 +35,7 @@ class h8s2245_device : public h8s2000_device { public: - h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -61,10 +61,10 @@ public: auto read_portg() { return m_read_port [PORT_G].bind(); } auto write_portg() { return m_write_port[PORT_G].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); - uint16_t mstpcr_r(); - void mstpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + u8 syscr_r(); + void syscr_w(u8 data); + u16 mstpcr_r(); + void mstpcr_w(offs_t offset, u16 data, u16 mem_mask = ~0); protected: required_device m_intc; @@ -90,18 +90,18 @@ protected: required_device m_timer16_2; required_device m_watchdog; - uint32_t m_ram_start; - uint16_t m_mstpcr; - uint8_t m_syscr; + u32 m_ram_start; + u16 m_mstpcr; + u8 m_syscr; - h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); virtual bool exr_in_stack() const override; virtual void update_irq_filter() override; virtual void interrupt_taken() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -112,17 +112,17 @@ protected: class h8s2241_device : public h8s2245_device { public: - h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2242_device : public h8s2245_device { public: - h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2246_device : public h8s2245_device { public: - h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H8S2241, h8s2241_device) diff --git a/src/devices/cpu/h8/h8s2320.cpp b/src/devices/cpu/h8/h8s2320.cpp index 83db3490ed3..c329c0950cb 100644 --- a/src/devices/cpu/h8/h8s2320.cpp +++ b/src/devices/cpu/h8/h8s2320.cpp @@ -14,7 +14,7 @@ DEFINE_DEVICE_TYPE(H8S2328, h8s2328_device, "h8s2328", "Hitachi H8S/2328") DEFINE_DEVICE_TYPE(H8S2329, h8s2329_device, "h8s2329", "Hitachi H8S/2329") -h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2320_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -51,47 +51,47 @@ h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, { } -h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2320, tag, owner, clock, 0xffec00) { } -h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2321, tag, owner, clock, 0xffec00) { } -h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2322, tag, owner, clock, 0xffdc00) { } -h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2323, tag, owner, clock, 0xffdc00) { } -h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2324, tag, owner, clock, 0xff7c00) { } -h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2326, tag, owner, clock, 0xffdc00) { } -h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2327, tag, owner, clock, 0xffdc00) { } -h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2328, tag, owner, clock, 0xffdc00) { } -h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2320_device(mconfig, H8S2329, tag, owner, clock, 0xff7c00) { } @@ -414,9 +414,9 @@ void h8s2320_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h8s2320_device::internal_update(uint64_t current_time) +void h8s2320_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -448,12 +448,12 @@ void h8s2320_device::device_reset() m_syscr = 0x01; } -uint8_t h8s2320_device::syscr_r() +u8 h8s2320_device::syscr_r() { return m_syscr; } -void h8s2320_device::syscr_w(uint8_t data) +void h8s2320_device::syscr_w(u8 data) { m_syscr = data; m_mac_saturating = m_syscr & 0x80; diff --git a/src/devices/cpu/h8/h8s2320.h b/src/devices/cpu/h8/h8s2320.h index 6bff8cfa28a..7caea73ae4f 100644 --- a/src/devices/cpu/h8/h8s2320.h +++ b/src/devices/cpu/h8/h8s2320.h @@ -41,7 +41,7 @@ class h8s2320_device : public h8s2000_device { public: - h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -72,8 +72,8 @@ public: auto tend0_cb() { return m_tend_cb[0].bind(); } auto tend1_cb() { return m_tend_cb[1].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: required_device m_intc; @@ -108,10 +108,10 @@ protected: devcb_write_line::array<2> m_tend_cb; - uint32_t m_ram_start; - uint8_t m_syscr; + u32 m_ram_start; + u8 m_syscr; - h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); virtual bool exr_in_stack() const override; virtual void update_irq_filter() override; @@ -119,7 +119,7 @@ protected: virtual int trace_setup() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -130,42 +130,42 @@ protected: class h8s2321_device : public h8s2320_device { public: - h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2322_device : public h8s2320_device { public: - h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2323_device : public h8s2320_device { public: - h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2324_device : public h8s2320_device { public: - h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2326_device : public h8s2320_device { public: - h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2327_device : public h8s2320_device { public: - h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2328_device : public h8s2320_device { public: - h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2329_device : public h8s2320_device { public: - h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H8S2320, h8s2320_device) diff --git a/src/devices/cpu/h8/h8s2357.cpp b/src/devices/cpu/h8/h8s2357.cpp index 787b34d094f..8e8943dd8c0 100644 --- a/src/devices/cpu/h8/h8s2357.cpp +++ b/src/devices/cpu/h8/h8s2357.cpp @@ -10,7 +10,7 @@ DEFINE_DEVICE_TYPE(H8S2394, h8s2394_device, "h8s2394", "Hitachi H8S/2394") DEFINE_DEVICE_TYPE(H8S2392, h8s2392_device, "h8s2392", "Hitachi H8S/2392") DEFINE_DEVICE_TYPE(H8S2390, h8s2390_device, "h8s2390", "Hitachi H8S/2390") -h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) : +h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) : h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2357_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -45,32 +45,32 @@ h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, { } -h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2357, tag, owner, clock, 0xffdc00) { } -h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2352, tag, owner, clock, 0xffdc00) { } -h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2398, tag, owner, clock, 0xffdc00) { } -h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2394, tag, owner, clock, 0xff7c00) { } -h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2392, tag, owner, clock, 0xffdc00) { } -h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2357_device(mconfig, H8S2390, tag, owner, clock, 0xffec00) { } @@ -374,9 +374,9 @@ void h8s2357_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h8s2357_device::internal_update(uint64_t current_time) +void h8s2357_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -406,12 +406,12 @@ void h8s2357_device::device_reset() m_syscr = 0x01; } -uint8_t h8s2357_device::syscr_r() +u8 h8s2357_device::syscr_r() { return m_syscr; } -void h8s2357_device::syscr_w(uint8_t data) +void h8s2357_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h8s2357.h b/src/devices/cpu/h8/h8s2357.h index cc664c22e0b..a328e948868 100644 --- a/src/devices/cpu/h8/h8s2357.h +++ b/src/devices/cpu/h8/h8s2357.h @@ -37,7 +37,7 @@ class h8s2357_device : public h8s2000_device { public: - h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -65,8 +65,8 @@ public: auto read_portg() { return m_read_port [PORT_G].bind(); } auto write_portg() { return m_write_port[PORT_G].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: required_device m_intc; @@ -98,10 +98,10 @@ protected: required_device m_timer16_5; required_device m_watchdog; - uint32_t m_ram_start; + u32 m_ram_start; unsigned char m_syscr; - h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); + h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start); virtual bool exr_in_stack() const override; virtual void update_irq_filter() override; @@ -109,7 +109,7 @@ protected: virtual int trace_setup() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -120,27 +120,27 @@ protected: class h8s2352_device : public h8s2357_device { public: - h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2398_device : public h8s2357_device { public: - h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2394_device : public h8s2357_device { public: - h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2392_device : public h8s2357_device { public: - h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class h8s2390_device : public h8s2357_device { public: - h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H8S2357, h8s2357_device) diff --git a/src/devices/cpu/h8/h8s2600.cpp b/src/devices/cpu/h8/h8s2600.cpp index 86dd00f0606..62a041a5ca1 100644 --- a/src/devices/cpu/h8/h8s2600.cpp +++ b/src/devices/cpu/h8/h8s2600.cpp @@ -4,7 +4,7 @@ #include "h8s2600.h" #include "h8s2600d.h" -h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) : +h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) : h8s2000_device(mconfig, type, tag, owner, clock, map_delegate) { m_has_mac = true; diff --git a/src/devices/cpu/h8/h8s2600.h b/src/devices/cpu/h8/h8s2600.h index 84c611dd8f7..0673af58957 100644 --- a/src/devices/cpu/h8/h8s2600.h +++ b/src/devices/cpu/h8/h8s2600.h @@ -20,7 +20,7 @@ class h8s2600_device : public h8s2000_device { protected: - h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate); + h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate); virtual std::unique_ptr create_disassembler() override; diff --git a/src/devices/cpu/h8/h8s2655.cpp b/src/devices/cpu/h8/h8s2655.cpp index f8527635118..b04ab8f74b8 100644 --- a/src/devices/cpu/h8/h8s2655.cpp +++ b/src/devices/cpu/h8/h8s2655.cpp @@ -6,7 +6,7 @@ DEFINE_DEVICE_TYPE(H8S2655, h8s2655_device, "h8s2655", "Hitachi H8S/2655") DEFINE_DEVICE_TYPE(H8S2653, h8s2653_device, "h8s2653", "Hitachi H8S/2653") -h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : +h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : h8s2600_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2655_device::map), this)), m_intc(*this, "intc"), m_adc(*this, "adc"), @@ -41,13 +41,13 @@ h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, m_has_trace = true; } -h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2655_device(mconfig, H8S2655, tag, owner, clock) { } -h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : +h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : h8s2655_device(mconfig, H8S2653, tag, owner, clock) { } @@ -387,9 +387,9 @@ void h8s2655_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void h8s2655_device::internal_update(uint64_t current_time) +void h8s2655_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -419,12 +419,12 @@ void h8s2655_device::device_reset() m_syscr = 0x01; } -uint8_t h8s2655_device::syscr_r() +u8 h8s2655_device::syscr_r() { return m_syscr; } -void h8s2655_device::syscr_w(uint8_t data) +void h8s2655_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/h8s2655.h b/src/devices/cpu/h8/h8s2655.h index 9b11e5ef4ac..cd393b38dee 100644 --- a/src/devices/cpu/h8/h8s2655.h +++ b/src/devices/cpu/h8/h8s2655.h @@ -29,7 +29,7 @@ class h8s2655_device : public h8s2600_device { public: - h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); auto read_port1() { return m_read_port [PORT_1].bind(); } auto write_port1() { return m_write_port[PORT_1].bind(); } @@ -57,8 +57,8 @@ public: auto read_portg() { return m_read_port [PORT_G].bind(); } auto write_portg() { return m_write_port[PORT_G].bind(); } - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: required_device m_intc; @@ -90,9 +90,9 @@ protected: required_device m_timer16_5; required_device m_watchdog; - uint8_t m_syscr; + u8 m_syscr; - h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); virtual bool exr_in_stack() const override; virtual void update_irq_filter() override; @@ -100,7 +100,7 @@ protected: virtual int trace_setup() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; void map(address_map &map); @@ -111,7 +111,7 @@ protected: class h8s2653_device : public h8s2655_device { public: - h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; DECLARE_DEVICE_TYPE(H8S2655, h8s2655_device) diff --git a/src/devices/cpu/h8/swx00.cpp b/src/devices/cpu/h8/swx00.cpp index c81b9b3de29..634fc7bab86 100644 --- a/src/devices/cpu/h8/swx00.cpp +++ b/src/devices/cpu/h8/swx00.cpp @@ -5,7 +5,7 @@ DEFINE_DEVICE_TYPE(SWX00, swx00_device, "swx00", "Yamaha SWX00") -swx00_device::swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t mode) : +swx00_device::swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u8 mode) : h8s2000_device(mconfig, SWX00, tag, owner, clock, address_map_constructor(FUNC(swx00_device::map), this)), m_intc(*this, "intc"), #if 0 @@ -392,9 +392,9 @@ void swx00_device::interrupt_taken() standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC); } -void swx00_device::internal_update(uint64_t current_time) +void swx00_device::internal_update(u64 current_time) { - uint64_t event_time = 0; + u64 event_time = 0; #if 0 add_event(event_time, m_adc->internal_update(current_time)); add_event(event_time, m_sci[0]->internal_update(current_time)); @@ -425,12 +425,12 @@ void swx00_device::device_reset() m_syscr = 0x01; } -uint8_t swx00_device::syscr_r() +u8 swx00_device::syscr_r() { return m_syscr; } -void swx00_device::syscr_w(uint8_t data) +void swx00_device::syscr_w(u8 data) { m_syscr = data; update_irq_filter(); diff --git a/src/devices/cpu/h8/swx00.h b/src/devices/cpu/h8/swx00.h index e61d47c7982..aad63bcfced 100644 --- a/src/devices/cpu/h8/swx00.h +++ b/src/devices/cpu/h8/swx00.h @@ -45,7 +45,7 @@ public: MODE_SEPARATE = 2 }; - swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t mode = 0); + swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u8 mode = 0); int s_bus_id() const { return m_mode & MODE_DUAL ? AS_DATA : AS_PROGRAM; } int c_bus_id() const { return m_mode & MODE_DUAL ? AS_PROGRAM : AS_DATA; } @@ -78,8 +78,8 @@ public: auto write_portg() { return m_write_port[PORT_G].bind(); } #endif - uint8_t syscr_r(); - void syscr_w(uint8_t data); + u8 syscr_r(); + void syscr_w(u8 data); protected: required_device m_intc; @@ -115,8 +115,8 @@ protected: address_space_config m_data_config; - uint8_t m_mode; - uint8_t m_syscr; + u8 m_mode; + u8 m_syscr; virtual bool exr_in_stack() const override; virtual void update_irq_filter() override; @@ -124,7 +124,7 @@ protected: virtual int trace_setup() override; virtual int trapa_setup() override; virtual void irq_setup() override; - virtual void internal_update(uint64_t current_time) override; + virtual void internal_update(u64 current_time) override; virtual void device_add_mconfig(machine_config &config) override; virtual space_config_vector memory_space_config() const override; diff --git a/src/devices/cpu/m6800/6800dasm.cpp b/src/devices/cpu/m6800/6800dasm.cpp index 37b1ff4793c..f8e59b3f4c2 100644 --- a/src/devices/cpu/m6800/6800dasm.cpp +++ b/src/devices/cpu/m6800/6800dasm.cpp @@ -40,7 +40,7 @@ const char *const m680x_disassembler::op_name_str[] = { * 2 invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701 */ -const uint8_t m680x_disassembler::table[0x104][3] = { +const u8 m680x_disassembler::table[0x104][3] = { {ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */ {lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0}, {inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0}, @@ -130,7 +130,7 @@ offs_t m680x_disassembler::disassemble(std::ostream &stream, offs_t pc, const da offs_t flags = 0; int invalid_mask; int code = opcodes.r8(pc); - uint8_t opcode, args, invalid; + u8 opcode, args, invalid; switch( m_subtype ) { @@ -179,7 +179,7 @@ offs_t m680x_disassembler::disassemble(std::ostream &stream, offs_t pc, const da switch( args ) { case rel: /* relative */ - util::stream_format(stream, "$%04X", pc + (int8_t)params.r8(pc+1) + 2); + util::stream_format(stream, "$%04X", pc + (s8)params.r8(pc+1) + 2); return 2 | flags | SUPPORTED; case imb: /* immediate (byte) */ util::stream_format(stream, "#$%02X", params.r8(pc+1)); diff --git a/src/devices/cpu/m6800/6800dasm.h b/src/devices/cpu/m6800/6800dasm.h index 9caf9b1b7ff..0b9daa8476b 100644 --- a/src/devices/cpu/m6800/6800dasm.h +++ b/src/devices/cpu/m6800/6800dasm.h @@ -58,7 +58,7 @@ private: }; static const char *const op_name_str[]; - static const uint8_t table[0x104][3]; + static const u8 table[0x104][3]; int m_subtype; }; diff --git a/src/devices/cpu/m6800/6800ops.hxx b/src/devices/cpu/m6800/6800ops.hxx index c7afbae4c4d..eab1825c0e3 100644 --- a/src/devices/cpu/m6800/6800ops.hxx +++ b/src/devices/cpu/m6800/6800ops.hxx @@ -59,7 +59,7 @@ OP_HANDLER( nop ) /* $04 LSRD inherent -0*-* */ OP_HANDLER( lsrd ) { - uint16_t t; + u16 t; CLR_NZVC; t = D; CC|=(t&0x0001); t>>=1; SET_Z16(t); if (NXORC) SEV; @@ -70,7 +70,7 @@ OP_HANDLER( lsrd ) OP_HANDLER( asld ) { int r; - uint16_t t; + u16 t; t = D; r=t<<1; CLR_NZVC; SET_FLAGS16(t,t,r); D=r; @@ -134,7 +134,7 @@ OP_HANDLER( sec ) /* $0e CLI */ OP_HANDLER( cli ) { - uint8_t i = CC & 0x10; + u8 i = CC & 0x10; CLI; // pending IRQ won't be triggered until next machine cycle @@ -151,7 +151,7 @@ OP_HANDLER( sei ) /* $10 SBA inherent -**** */ OP_HANDLER( sba ) { - uint16_t t; + u16 t; t=A-B; CLR_NZVC; SET_FLAGS8(A,B,t); A=t; @@ -160,7 +160,7 @@ OP_HANDLER( sba ) /* $11 CBA inherent -**** */ OP_HANDLER( cba ) { - uint16_t t; + u16 t; t=A-B; CLR_NZVC; SET_FLAGS8(A,B,t); } @@ -199,7 +199,7 @@ OP_HANDLER( tba ) /* $18 XGDX inherent ----- */ /* HD63701Y0 only */ OP_HANDLER( xgdx ) { - uint16_t t = X; + u16 t = X; X = D; D=t; } @@ -207,15 +207,15 @@ OP_HANDLER( xgdx ) /* $19 DAA inherent (A) -**0* */ OP_HANDLER( daa ) { - uint8_t msn, lsn; - uint16_t t, cf = 0; + u8 msn, lsn; + u16 t, cf = 0; msn=A & 0xf0; lsn=A & 0x0f; if (lsn>0x09 || CC&0x20) cf |= 0x06; if (msn>0x80 && lsn>0x09) cf |= 0x60; if (msn>0x90 || CC&0x01) cf |= 0x60; t = cf + A; CLR_NZV; // keep carry from previous operation - SET_NZ8((uint8_t)t); SET_C8(t); + SET_NZ8((u8)t); SET_C8(t); A = t; } @@ -235,7 +235,7 @@ OP_HANDLER( slp ) /* $1b ABA inherent ***** */ OP_HANDLER( aba ) { - uint16_t t; + u16 t; t=A+B; CLR_HNZVC; SET_FLAGS8(A,B,t); SET_H(A,B,t); A=t; @@ -252,112 +252,112 @@ OP_HANDLER( aba ) /* $20 BRA relative ----- */ OP_HANDLER( bra ) { - uint8_t t; + u8 t; BRANCH(1); } /* $21 BRN relative ----- */ OP_HANDLER( brn ) { - uint8_t t; + u8 t; BRANCH(0); } /* $22 BHI relative ----- */ OP_HANDLER( bhi ) { - uint8_t t; + u8 t; BRANCH(!(CC&0x05)); } /* $23 BLS relative ----- */ OP_HANDLER( bls ) { - uint8_t t; + u8 t; BRANCH(CC&0x05); } /* $24 BCC relative ----- */ OP_HANDLER( bcc ) { - uint8_t t; + u8 t; BRANCH(!(CC&0x01)); } /* $25 BCS relative ----- */ OP_HANDLER( bcs ) { - uint8_t t; + u8 t; BRANCH(CC&0x01); } /* $26 BNE relative ----- */ OP_HANDLER( bne ) { - uint8_t t; + u8 t; BRANCH(!(CC&0x04)); } /* $27 BEQ relative ----- */ OP_HANDLER( beq ) { - uint8_t t; + u8 t; BRANCH(CC&0x04); } /* $28 BVC relative ----- */ OP_HANDLER( bvc ) { - uint8_t t; + u8 t; BRANCH(!(CC&0x02)); } /* $29 BVS relative ----- */ OP_HANDLER( bvs ) { - uint8_t t; + u8 t; BRANCH(CC&0x02); } /* $2a BPL relative ----- */ OP_HANDLER( bpl ) { - uint8_t t; + u8 t; BRANCH(!(CC&0x08)); } /* $2b BMI relative ----- */ OP_HANDLER( bmi ) { - uint8_t t; + u8 t; BRANCH(CC&0x08); } /* $2c BGE relative ----- */ OP_HANDLER( bge ) { - uint8_t t; + u8 t; BRANCH(!NXORV); } /* $2d BLT relative ----- */ OP_HANDLER( blt ) { - uint8_t t; + u8 t; BRANCH(NXORV); } /* $2e BGT relative ----- */ OP_HANDLER( bgt ) { - uint8_t t; + u8 t; BRANCH(!(NXORV||CC&0x04)); } /* $2f BLE relative ----- */ OP_HANDLER( ble ) { - uint8_t t; + u8 t; BRANCH(NXORV||CC&0x04); } @@ -448,7 +448,7 @@ OP_HANDLER( pshx ) /* $3d MUL inherent --*-@ */ OP_HANDLER( mul ) { - uint16_t t; + u16 t; t=A*B; CLR_C; if (t & 0x80) SEC; @@ -489,7 +489,7 @@ OP_HANDLER( swi ) /* $40 NEGA inherent ?**** */ OP_HANDLER( nega ) { - uint16_t r; + u16 r; r=-A; CLR_NZVC; SET_FLAGS8(0,A,r); A=r; @@ -519,7 +519,7 @@ OP_HANDLER( lsra ) /* $46 RORA inherent -**-* */ OP_HANDLER( rora ) { - uint8_t r; + u8 r; r=(CC&0x01)<<7; CLR_NZVC; CC|=(A&0x01); r |= A>>1; SET_NZ8(r); @@ -539,7 +539,7 @@ OP_HANDLER( asra ) /* $48 ASLA inherent ?**** */ OP_HANDLER( asla ) { - uint16_t r; + u16 r; r=A<<1; CLR_NZVC; SET_FLAGS8(A,A,r); A=r; @@ -548,7 +548,7 @@ OP_HANDLER( asla ) /* $49 ROLA inherent -**** */ OP_HANDLER( rola ) { - uint16_t t,r; + u16 t,r; t = A; r = CC&0x01; r |= t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); A=r; @@ -588,7 +588,7 @@ OP_HANDLER( clra ) /* $50 NEGB inherent ?**** */ OP_HANDLER( negb ) { - uint16_t r; + u16 r; r=-B; CLR_NZVC; SET_FLAGS8(0,B,r); B=r; @@ -618,7 +618,7 @@ OP_HANDLER( lsrb ) /* $56 RORB inherent -**-* */ OP_HANDLER( rorb ) { - uint8_t r; + u8 r; r=(CC&0x01)<<7; CLR_NZVC; CC|=(B&0x01); r |= B>>1; SET_NZ8(r); @@ -638,7 +638,7 @@ OP_HANDLER( asrb ) /* $58 ASLB inherent ?**** */ OP_HANDLER( aslb ) { - uint16_t r; + u16 r; r=B<<1; CLR_NZVC; SET_FLAGS8(B,B,r); B=r; @@ -647,7 +647,7 @@ OP_HANDLER( aslb ) /* $59 ROLB inherent -**** */ OP_HANDLER( rolb ) { - uint16_t t,r; + u16 t,r; t = B; r = CC&0x01; r |= t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); B=r; @@ -687,7 +687,7 @@ OP_HANDLER( clrb ) /* $60 NEG indexed ?**** */ OP_HANDLER( neg_ix ) { - uint16_t r,t; + u16 r,t; IDXBYTE(t); r=-t; CLR_NZVC; SET_FLAGS8(0,t,r); WM(EAD,r); @@ -696,7 +696,7 @@ OP_HANDLER( neg_ix ) /* $61 AIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( aim_ix ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); IDXBYTE(r); r &= t; @@ -707,7 +707,7 @@ OP_HANDLER( aim_ix ) /* $62 OIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( oim_ix ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); IDXBYTE(r); r |= t; @@ -718,7 +718,7 @@ OP_HANDLER( oim_ix ) /* $63 COM indexed -**01 */ OP_HANDLER( com_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); t = ~t; CLR_NZV; SET_NZ8(t); SEC; WM(EAD,t); @@ -727,7 +727,7 @@ OP_HANDLER( com_ix ) /* $64 LSR indexed -0*-* */ OP_HANDLER( lsr_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); CLR_NZVC; CC|=(t&0x01); t>>=1; SET_Z8(t); if (NXORC) SEV; @@ -737,7 +737,7 @@ OP_HANDLER( lsr_ix ) /* $65 EIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( eim_ix ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); IDXBYTE(r); r ^= t; @@ -748,7 +748,7 @@ OP_HANDLER( eim_ix ) /* $66 ROR indexed -**-* */ OP_HANDLER( ror_ix ) { - uint8_t t,r; + u8 t,r; IDXBYTE(t); r=(CC&0x01)<<7; CLR_NZVC; CC|=(t&0x01); r |= t>>1; SET_NZ8(r); @@ -759,7 +759,7 @@ OP_HANDLER( ror_ix ) /* $67 ASR indexed ?**-* */ OP_HANDLER( asr_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); CLR_NZVC; CC|=(t&0x01); t>>=1; t|=((t&0x40)<<1); SET_NZ8(t); @@ -770,7 +770,7 @@ OP_HANDLER( asr_ix ) /* $68 ASL indexed ?**** */ OP_HANDLER( asl_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r=t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); WM(EAD,r); @@ -779,7 +779,7 @@ OP_HANDLER( asl_ix ) /* $69 ROL indexed -**** */ OP_HANDLER( rol_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = CC&0x01; r |= t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); WM(EAD,r); @@ -788,7 +788,7 @@ OP_HANDLER( rol_ix ) /* $6a DEC indexed -***- */ OP_HANDLER( dec_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); --t; CLR_NZV; SET_FLAGS8D(t); WM(EAD,t); @@ -797,7 +797,7 @@ OP_HANDLER( dec_ix ) /* $6b TIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( tim_ix ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); IDXBYTE(r); r &= t; @@ -807,7 +807,7 @@ OP_HANDLER( tim_ix ) /* $6c INC indexed -***- */ OP_HANDLER( inc_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); ++t; CLR_NZV; SET_FLAGS8I(t); WM(EAD,t); @@ -816,7 +816,7 @@ OP_HANDLER( inc_ix ) /* $6d TST indexed -**0- */ OP_HANDLER( tst_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); CLR_NZVC; SET_NZ8(t); } @@ -836,7 +836,7 @@ OP_HANDLER( clr_ix ) /* $70 NEG extended ?**** */ OP_HANDLER( neg_ex ) { - uint16_t r,t; + u16 r,t; EXTBYTE(t); r=-t; CLR_NZVC; SET_FLAGS8(0,t,r); WM(EAD,r); @@ -845,7 +845,7 @@ OP_HANDLER( neg_ex ) /* $71 AIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( aim_di ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); DIRBYTE(r); r &= t; @@ -856,7 +856,7 @@ OP_HANDLER( aim_di ) /* $72 OIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( oim_di ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); DIRBYTE(r); r |= t; @@ -867,7 +867,7 @@ OP_HANDLER( oim_di ) /* $73 COM extended -**01 */ OP_HANDLER( com_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); t = ~t; CLR_NZV; SET_NZ8(t); SEC; WM(EAD,t); @@ -876,7 +876,7 @@ OP_HANDLER( com_ex ) /* $74 LSR extended -0*-* */ OP_HANDLER( lsr_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); CLR_NZVC; CC|=(t&0x01); @@ -889,7 +889,7 @@ OP_HANDLER( lsr_ex ) /* $75 EIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( eim_di ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); DIRBYTE(r); r ^= t; @@ -900,7 +900,7 @@ OP_HANDLER( eim_di ) /* $76 ROR extended -**-* */ OP_HANDLER( ror_ex ) { - uint8_t t,r; + u8 t,r; EXTBYTE(t); r=(CC&0x01)<<7; CLR_NZVC; CC|=(t&0x01); r |= t>>1; SET_NZ8(r); @@ -911,7 +911,7 @@ OP_HANDLER( ror_ex ) /* $77 ASR extended ?**-* */ OP_HANDLER( asr_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); CLR_NZVC; CC|=(t&0x01); t>>=1; t|=((t&0x40)<<1); SET_NZ8(t); @@ -922,7 +922,7 @@ OP_HANDLER( asr_ex ) /* $78 ASL extended ?**** */ OP_HANDLER( asl_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r=t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); WM(EAD,r); @@ -931,7 +931,7 @@ OP_HANDLER( asl_ex ) /* $79 ROL extended -**** */ OP_HANDLER( rol_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = CC&0x01; r |= t<<1; CLR_NZVC; SET_FLAGS8(t,t,r); WM(EAD,r); @@ -940,7 +940,7 @@ OP_HANDLER( rol_ex ) /* $7a DEC extended -***- */ OP_HANDLER( dec_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); --t; CLR_NZV; SET_FLAGS8D(t); WM(EAD,t); @@ -949,7 +949,7 @@ OP_HANDLER( dec_ex ) /* $7b TIM --**0- */ /* HD63701Y0 only */ OP_HANDLER( tim_di ) { - uint8_t t, r; + u8 t, r; IMMBYTE(t); DIRBYTE(r); r &= t; @@ -959,7 +959,7 @@ OP_HANDLER( tim_di ) /* $7c INC extended -***- */ OP_HANDLER( inc_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); ++t; CLR_NZV; SET_FLAGS8I(t); WM(EAD,t); @@ -968,7 +968,7 @@ OP_HANDLER( inc_ex ) /* $7d TST extended -**0- */ OP_HANDLER( tst_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); CLR_NZVC; SET_NZ8(t); } @@ -988,7 +988,7 @@ OP_HANDLER( clr_ex ) /* $80 SUBA immediate ?**** */ OP_HANDLER( suba_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = A-t; CLR_NZVC; SET_FLAGS8(A,t,r); A = r; @@ -997,7 +997,7 @@ OP_HANDLER( suba_im ) /* $81 CMPA immediate ?**** */ OP_HANDLER( cmpa_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = A-t; CLR_NZVC; SET_FLAGS8(A,t,r); } @@ -1005,7 +1005,7 @@ OP_HANDLER( cmpa_im ) /* $82 SBCA immediate ?**** */ OP_HANDLER( sbca_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = A-t-(CC&0x01); CLR_NZVC; SET_FLAGS8(A,t,r); A = r; @@ -1014,7 +1014,7 @@ OP_HANDLER( sbca_im ) /* $83 SUBD immediate -**** */ OP_HANDLER( subd_im ) { - uint32_t r,d; + u32 r,d; PAIR b; IMMWORD(b); d = D; @@ -1027,7 +1027,7 @@ OP_HANDLER( subd_im ) /* $84 ANDA immediate -**0- */ OP_HANDLER( anda_im ) { - uint8_t t; + u8 t; IMMBYTE(t); A &= t; CLR_NZV; SET_NZ8(A); } @@ -1035,7 +1035,7 @@ OP_HANDLER( anda_im ) /* $85 BITA immediate -**0- */ OP_HANDLER( bita_im ) { - uint8_t t,r; + u8 t,r; IMMBYTE(t); r = A&t; CLR_NZV; SET_NZ8(r); } @@ -1058,7 +1058,7 @@ OP_HANDLER( sta_im ) /* $88 EORA immediate -**0- */ OP_HANDLER( eora_im ) { - uint8_t t; + u8 t; IMMBYTE(t); A ^= t; CLR_NZV; SET_NZ8(A); } @@ -1066,7 +1066,7 @@ OP_HANDLER( eora_im ) /* $89 ADCA immediate ***** */ OP_HANDLER( adca_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = A+t+(CC&0x01); CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r); A = r; @@ -1075,7 +1075,7 @@ OP_HANDLER( adca_im ) /* $8a ORA immediate -**0- */ OP_HANDLER( ora_im ) { - uint8_t t; + u8 t; IMMBYTE(t); A |= t; CLR_NZV; SET_NZ8(A); } @@ -1083,7 +1083,7 @@ OP_HANDLER( ora_im ) /* $8b ADDA immediate ***** */ OP_HANDLER( adda_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = A+t; CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r); A = r; @@ -1106,7 +1106,7 @@ OP_HANDLER( cmpx_im ) /* $8c CPX immediate -**** (6803) */ OP_HANDLER( cpx_im ) { - uint32_t r,d; + u32 r,d; PAIR b; IMMWORD(b); d = X; @@ -1118,7 +1118,7 @@ OP_HANDLER( cpx_im ) /* $8d BSR ----- */ OP_HANDLER( bsr ) { - uint8_t t; + u8 t; IMMBYTE(t); PUSHWORD(pPC); PC += SIGNED(t); @@ -1144,7 +1144,7 @@ OP_HANDLER( sts_im ) /* $90 SUBA direct ?**** */ OP_HANDLER( suba_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = A-t; CLR_NZVC; SET_FLAGS8(A,t,r); A = r; @@ -1153,7 +1153,7 @@ OP_HANDLER( suba_di ) /* $91 CMPA direct ?**** */ OP_HANDLER( cmpa_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = A-t; CLR_NZVC; SET_FLAGS8(A,t,r); } @@ -1161,7 +1161,7 @@ OP_HANDLER( cmpa_di ) /* $92 SBCA direct ?**** */ OP_HANDLER( sbca_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = A-t-(CC&0x01); CLR_NZVC; SET_FLAGS8(A,t,r); A = r; @@ -1170,7 +1170,7 @@ OP_HANDLER( sbca_di ) /* $93 SUBD direct -**** */ OP_HANDLER( subd_di ) { - uint32_t r,d; + u32 r,d; PAIR b; DIRWORD(b); d = D; @@ -1183,7 +1183,7 @@ OP_HANDLER( subd_di ) /* $94 ANDA direct -**0- */ OP_HANDLER( anda_di ) { - uint8_t t; + u8 t; DIRBYTE(t); A &= t; CLR_NZV; SET_NZ8(A); } @@ -1191,7 +1191,7 @@ OP_HANDLER( anda_di ) /* $95 BITA direct -**0- */ OP_HANDLER( bita_di ) { - uint8_t t,r; + u8 t,r; DIRBYTE(t); r = A&t; CLR_NZV; SET_NZ8(r); } @@ -1216,7 +1216,7 @@ OP_HANDLER( sta_di ) /* $98 EORA direct -**0- */ OP_HANDLER( eora_di ) { - uint8_t t; + u8 t; DIRBYTE(t); A ^= t; CLR_NZV; @@ -1226,7 +1226,7 @@ OP_HANDLER( eora_di ) /* $99 ADCA direct ***** */ OP_HANDLER( adca_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = A+t+(CC&0x01); CLR_HNZVC; @@ -1238,7 +1238,7 @@ OP_HANDLER( adca_di ) /* $9a ORA direct -**0- */ OP_HANDLER( ora_di ) { - uint8_t t; + u8 t; DIRBYTE(t); A |= t; CLR_NZV; @@ -1248,7 +1248,7 @@ OP_HANDLER( ora_di ) /* $9b ADDA direct ***** */ OP_HANDLER( adda_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = A + t; CLR_HNZVC; @@ -1274,7 +1274,7 @@ OP_HANDLER( cmpx_di ) /* $9c CPX direct -**** (6803) */ OP_HANDLER( cpx_di ) { - uint32_t r,d; + u32 r,d; PAIR b; DIRWORD(b); d = X; @@ -1311,7 +1311,7 @@ OP_HANDLER( sts_di ) /* $a0 SUBA indexed ?**** */ OP_HANDLER( suba_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = A - t; CLR_NZVC; @@ -1322,7 +1322,7 @@ OP_HANDLER( suba_ix ) /* $a1 CMPA indexed ?**** */ OP_HANDLER( cmpa_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = A - t; CLR_NZVC; @@ -1332,7 +1332,7 @@ OP_HANDLER( cmpa_ix ) /* $a2 SBCA indexed ?**** */ OP_HANDLER( sbca_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = A - t - (CC&0x01); CLR_NZVC; @@ -1343,7 +1343,7 @@ OP_HANDLER( sbca_ix ) /* $a3 SUBD indexed -**** */ OP_HANDLER( subd_ix ) { - uint32_t r,d; + u32 r,d; PAIR b; IDXWORD(b); d = D; @@ -1356,7 +1356,7 @@ OP_HANDLER( subd_ix ) /* $a4 ANDA indexed -**0- */ OP_HANDLER( anda_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); A &= t; CLR_NZV; SET_NZ8(A); @@ -1365,7 +1365,7 @@ OP_HANDLER( anda_ix ) /* $a5 BITA indexed -**0- */ OP_HANDLER( bita_ix ) { - uint8_t t,r; + u8 t,r; IDXBYTE(t); r = A&t; CLR_NZV; SET_NZ8(r); @@ -1391,7 +1391,7 @@ OP_HANDLER( sta_ix ) /* $a8 EORA indexed -**0- */ OP_HANDLER( eora_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); A ^= t; CLR_NZV; @@ -1401,7 +1401,7 @@ OP_HANDLER( eora_ix ) /* $a9 ADCA indexed ***** */ OP_HANDLER( adca_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = A + t + (CC&0x01); CLR_HNZVC; @@ -1413,7 +1413,7 @@ OP_HANDLER( adca_ix ) /* $aa ORA indexed -**0- */ OP_HANDLER( ora_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); A |= t; CLR_NZV; @@ -1423,7 +1423,7 @@ OP_HANDLER( ora_ix ) /* $ab ADDA indexed ***** */ OP_HANDLER( adda_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = A+t; CLR_HNZVC; @@ -1449,7 +1449,7 @@ OP_HANDLER( cmpx_ix ) /* $ac CPX indexed -**** (6803)*/ OP_HANDLER( cpx_ix ) { - uint32_t r,d; + u32 r,d; PAIR b; IDXWORD(b); d = X; @@ -1486,7 +1486,7 @@ OP_HANDLER( sts_ix ) /* $b0 SUBA extended ?**** */ OP_HANDLER( suba_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = A - t; CLR_NZVC; @@ -1497,7 +1497,7 @@ OP_HANDLER( suba_ex ) /* $b1 CMPA extended ?**** */ OP_HANDLER( cmpa_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = A-t; CLR_NZVC; @@ -1507,7 +1507,7 @@ OP_HANDLER( cmpa_ex ) /* $b2 SBCA extended ?**** */ OP_HANDLER( sbca_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = A-t-(CC&0x01); CLR_NZVC; @@ -1518,7 +1518,7 @@ OP_HANDLER( sbca_ex ) /* $b3 SUBD extended -**** */ OP_HANDLER( subd_ex ) { - uint32_t r,d; + u32 r,d; PAIR b; EXTWORD(b); d = D; @@ -1531,7 +1531,7 @@ OP_HANDLER( subd_ex ) /* $b4 ANDA extended -**0- */ OP_HANDLER( anda_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); A &= t; CLR_NZV; @@ -1541,7 +1541,7 @@ OP_HANDLER( anda_ex ) /* $b5 BITA extended -**0- */ OP_HANDLER( bita_ex ) { - uint8_t t,r; + u8 t,r; EXTBYTE(t); r = A&t; CLR_NZV; @@ -1568,7 +1568,7 @@ OP_HANDLER( sta_ex ) /* $b8 EORA extended -**0- */ OP_HANDLER( eora_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); A ^= t; CLR_NZV; @@ -1578,7 +1578,7 @@ OP_HANDLER( eora_ex ) /* $b9 ADCA extended ***** */ OP_HANDLER( adca_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = A+t+(CC&0x01); CLR_HNZVC; @@ -1590,7 +1590,7 @@ OP_HANDLER( adca_ex ) /* $ba ORA extended -**0- */ OP_HANDLER( ora_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); A |= t; CLR_NZV; @@ -1600,7 +1600,7 @@ OP_HANDLER( ora_ex ) /* $bb ADDA extended ***** */ OP_HANDLER( adda_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = A+t; CLR_HNZVC; @@ -1626,7 +1626,7 @@ OP_HANDLER( cmpx_ex ) /* $bc CPX extended -**** (6803) */ OP_HANDLER( cpx_ex ) { - uint32_t r,d; + u32 r,d; PAIR b; EXTWORD(b); d = X; @@ -1663,7 +1663,7 @@ OP_HANDLER( sts_ex ) /* $c0 SUBB immediate ?**** */ OP_HANDLER( subb_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = B-t; CLR_NZVC; @@ -1674,7 +1674,7 @@ OP_HANDLER( subb_im ) /* $c1 CMPB immediate ?**** */ OP_HANDLER( cmpb_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = B-t; CLR_NZVC; @@ -1684,7 +1684,7 @@ OP_HANDLER( cmpb_im ) /* $c2 SBCB immediate ?**** */ OP_HANDLER( sbcb_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = B-t-(CC&0x01); CLR_NZVC; @@ -1695,7 +1695,7 @@ OP_HANDLER( sbcb_im ) /* $c3 ADDD immediate -**** */ OP_HANDLER( addd_im ) { - uint32_t r,d; + u32 r,d; PAIR b; IMMWORD(b); d = D; @@ -1708,7 +1708,7 @@ OP_HANDLER( addd_im ) /* $c4 ANDB immediate -**0- */ OP_HANDLER( andb_im ) { - uint8_t t; + u8 t; IMMBYTE(t); B &= t; CLR_NZV; @@ -1718,7 +1718,7 @@ OP_HANDLER( andb_im ) /* $c5 BITB immediate -**0- */ OP_HANDLER( bitb_im ) { - uint8_t t,r; + u8 t,r; IMMBYTE(t); r = B&t; CLR_NZV; @@ -1746,7 +1746,7 @@ OP_HANDLER( stb_im ) /* $c8 EORB immediate -**0- */ OP_HANDLER( eorb_im ) { - uint8_t t; + u8 t; IMMBYTE(t); B ^= t; CLR_NZV; @@ -1756,7 +1756,7 @@ OP_HANDLER( eorb_im ) /* $c9 ADCB immediate ***** */ OP_HANDLER( adcb_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = B+t+(CC&0x01); CLR_HNZVC; @@ -1768,7 +1768,7 @@ OP_HANDLER( adcb_im ) /* $ca ORB immediate -**0- */ OP_HANDLER( orb_im ) { - uint8_t t; + u8 t; IMMBYTE(t); B |= t; CLR_NZV; @@ -1778,7 +1778,7 @@ OP_HANDLER( orb_im ) /* $cb ADDB immediate ***** */ OP_HANDLER( addb_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = B+t; CLR_HNZVC; @@ -1825,7 +1825,7 @@ OP_HANDLER( stx_im ) /* $d0 SUBB direct ?**** */ OP_HANDLER( subb_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = B-t; CLR_NZVC; @@ -1836,7 +1836,7 @@ OP_HANDLER( subb_di ) /* $d1 CMPB direct ?**** */ OP_HANDLER( cmpb_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = B-t; CLR_NZVC; @@ -1846,7 +1846,7 @@ OP_HANDLER( cmpb_di ) /* $d2 SBCB direct ?**** */ OP_HANDLER( sbcb_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = B-t-(CC&0x01); CLR_NZVC; @@ -1857,7 +1857,7 @@ OP_HANDLER( sbcb_di ) /* $d3 ADDD direct -**** */ OP_HANDLER( addd_di ) { - uint32_t r,d; + u32 r,d; PAIR b; DIRWORD(b); d = D; @@ -1870,7 +1870,7 @@ OP_HANDLER( addd_di ) /* $d4 ANDB direct -**0- */ OP_HANDLER( andb_di ) { - uint8_t t; + u8 t; DIRBYTE(t); B &= t; CLR_NZV; @@ -1880,7 +1880,7 @@ OP_HANDLER( andb_di ) /* $d5 BITB direct -**0- */ OP_HANDLER( bitb_di ) { - uint8_t t,r; + u8 t,r; DIRBYTE(t); r = B&t; CLR_NZV; @@ -1907,7 +1907,7 @@ OP_HANDLER( stb_di ) /* $d8 EORB direct -**0- */ OP_HANDLER( eorb_di ) { - uint8_t t; + u8 t; DIRBYTE(t); B ^= t; CLR_NZV; @@ -1917,7 +1917,7 @@ OP_HANDLER( eorb_di ) /* $d9 ADCB direct ***** */ OP_HANDLER( adcb_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = B+t+(CC&0x01); CLR_HNZVC; @@ -1929,7 +1929,7 @@ OP_HANDLER( adcb_di ) /* $da ORB direct -**0- */ OP_HANDLER( orb_di ) { - uint8_t t; + u8 t; DIRBYTE(t); B |= t; CLR_NZV; @@ -1939,7 +1939,7 @@ OP_HANDLER( orb_di ) /* $db ADDB direct ***** */ OP_HANDLER( addb_di ) { - uint16_t t,r; + u16 t,r; DIRBYTE(t); r = B+t; CLR_HNZVC; @@ -1985,7 +1985,7 @@ OP_HANDLER( stx_di ) /* $e0 SUBB indexed ?**** */ OP_HANDLER( subb_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = B-t; CLR_NZVC; @@ -1996,7 +1996,7 @@ OP_HANDLER( subb_ix ) /* $e1 CMPB indexed ?**** */ OP_HANDLER( cmpb_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = B-t; CLR_NZVC; @@ -2006,7 +2006,7 @@ OP_HANDLER( cmpb_ix ) /* $e2 SBCB indexed ?**** */ OP_HANDLER( sbcb_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = B-t-(CC&0x01); CLR_NZVC; @@ -2017,7 +2017,7 @@ OP_HANDLER( sbcb_ix ) /* $e3 ADDD indexed -**** */ OP_HANDLER( addd_ix ) { - uint32_t r,d; + u32 r,d; PAIR b; IDXWORD(b); d = D; @@ -2030,7 +2030,7 @@ OP_HANDLER( addd_ix ) /* $e4 ANDB indexed -**0- */ OP_HANDLER( andb_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); B &= t; CLR_NZV; @@ -2040,7 +2040,7 @@ OP_HANDLER( andb_ix ) /* $e5 BITB indexed -**0- */ OP_HANDLER( bitb_ix ) { - uint8_t t,r; + u8 t,r; IDXBYTE(t); r = B&t; CLR_NZV; @@ -2067,7 +2067,7 @@ OP_HANDLER( stb_ix ) /* $e8 EORB indexed -**0- */ OP_HANDLER( eorb_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); B ^= t; CLR_NZV; @@ -2077,7 +2077,7 @@ OP_HANDLER( eorb_ix ) /* $e9 ADCB indexed ***** */ OP_HANDLER( adcb_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = B+t+(CC&0x01); CLR_HNZVC; @@ -2089,7 +2089,7 @@ OP_HANDLER( adcb_ix ) /* $ea ORB indexed -**0- */ OP_HANDLER( orb_ix ) { - uint8_t t; + u8 t; IDXBYTE(t); B |= t; CLR_NZV; @@ -2099,7 +2099,7 @@ OP_HANDLER( orb_ix ) /* $eb ADDB indexed ***** */ OP_HANDLER( addb_ix ) { - uint16_t t,r; + u16 t,r; IDXBYTE(t); r = B+t; CLR_HNZVC; @@ -2120,7 +2120,7 @@ OP_HANDLER( ldd_ix ) // actually this is ADDX, causes garbage in nightgal.cpp otherwise OP_HANDLER( adcx_im ) { - uint16_t t,r; + u16 t,r; IMMBYTE(t); r = X+t; CLR_HNZVC; @@ -2158,7 +2158,7 @@ OP_HANDLER( stx_ix ) /* $f0 SUBB extended ?**** */ OP_HANDLER( subb_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = B-t; CLR_NZVC; @@ -2169,7 +2169,7 @@ OP_HANDLER( subb_ex ) /* $f1 CMPB extended ?**** */ OP_HANDLER( cmpb_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = B-t; CLR_NZVC; @@ -2179,7 +2179,7 @@ OP_HANDLER( cmpb_ex ) /* $f2 SBCB extended ?**** */ OP_HANDLER( sbcb_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = B-t-(CC&0x01); CLR_NZVC; @@ -2190,7 +2190,7 @@ OP_HANDLER( sbcb_ex ) /* $f3 ADDD extended -**** */ OP_HANDLER( addd_ex ) { - uint32_t r,d; + u32 r,d; PAIR b; EXTWORD(b); d = D; @@ -2203,7 +2203,7 @@ OP_HANDLER( addd_ex ) /* $f4 ANDB extended -**0- */ OP_HANDLER( andb_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); B &= t; CLR_NZV; @@ -2213,7 +2213,7 @@ OP_HANDLER( andb_ex ) /* $f5 BITB extended -**0- */ OP_HANDLER( bitb_ex ) { - uint8_t t,r; + u8 t,r; EXTBYTE(t); r = B & t; CLR_NZV; @@ -2240,7 +2240,7 @@ OP_HANDLER( stb_ex ) /* $f8 EORB extended -**0- */ OP_HANDLER( eorb_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); B ^= t; CLR_NZV; @@ -2250,7 +2250,7 @@ OP_HANDLER( eorb_ex ) /* $f9 ADCB extended ***** */ OP_HANDLER( adcb_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = B+t+(CC&0x01); CLR_HNZVC; @@ -2262,7 +2262,7 @@ OP_HANDLER( adcb_ex ) /* $fa ORB extended -**0- */ OP_HANDLER( orb_ex ) { - uint8_t t; + u8 t; EXTBYTE(t); B |= t; CLR_NZV; @@ -2272,7 +2272,7 @@ OP_HANDLER( orb_ex ) /* $fb ADDB extended ***** */ OP_HANDLER( addb_ex ) { - uint16_t t,r; + u16 t,r; EXTBYTE(t); r = B+t; CLR_HNZVC; @@ -2292,7 +2292,7 @@ OP_HANDLER( ldd_ex ) /* $fc ADDX extended -**** NSC8105 only. Flags are a guess */ OP_HANDLER( addx_ex ) { - uint32_t r,d; + u32 r,d; PAIR b; EXTWORD(b); d = X; @@ -2332,8 +2332,8 @@ OP_HANDLER( stx_ex ) // $bb - $mask & [X + $disp8] OP_HANDLER( btst_ix ) { - uint8_t val; - uint8_t mask = M_RDOP_ARG(PCD); + u8 val; + u8 mask = M_RDOP_ARG(PCD); {EA=X+(M_RDOP_ARG(PCD+1));PC+=2;} val = RM(EAD) & mask; CLR_NZVC; SET_NZ8(val); @@ -2343,7 +2343,7 @@ OP_HANDLER( btst_ix ) OP_HANDLER( stx_nsc ) { IMM8; - uint8_t val = RM(EAD); + u8 val = RM(EAD); IMM8; EA = X + RM(EAD); CLR_NZV; diff --git a/src/devices/cpu/m6800/m6800.cpp b/src/devices/cpu/m6800/m6800.cpp index 1ef2d539a75..a670dee6ff3 100644 --- a/src/devices/cpu/m6800/m6800.cpp +++ b/src/devices/cpu/m6800/m6800.cpp @@ -14,9 +14,9 @@ References: 6809 Microcomputer Programming & Interfacing with Experiments" by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc. -System dependencies: uint16_t must be 16 bit unsigned int - uint8_t must be 8 bit unsigned int - uint32_t must be more than 16 bits +System dependencies: u16 must be 16 bit unsigned int + u8 must be 8 bit unsigned int + u32 must be more than 16 bits arrays up to 65536 bytes must be supported machine must be twos complement @@ -141,8 +141,8 @@ TODO: /* macros for CC -- CC bits affected should be reset before calling */ #define SET_Z(a) if(!(a))SEZ -#define SET_Z8(a) SET_Z((uint8_t)(a)) -#define SET_Z16(a) SET_Z((uint16_t)(a)) +#define SET_Z8(a) SET_Z((u8)(a)) +#define SET_Z16(a) SET_Z((u16)(a)) #define SET_N8(a) CC|=(((a)&0x80)>>4) #define SET_N16(a) CC|=(((a)&0x8000)>>12) #define SET_H(a,b,r) CC|=((((a)^(b)^(r))&0x10)<<1) @@ -151,7 +151,7 @@ TODO: #define SET_V8(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x80)>>6) #define SET_V16(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x8000)>>14) -const uint8_t m6800_cpu_device::flags8i[256]= /* increment */ +const u8 m6800_cpu_device::flags8i[256]= /* increment */ { 0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, @@ -172,7 +172,7 @@ const uint8_t m6800_cpu_device::flags8i[256]= /* increment */ }; -const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */ +const u8 m6800_cpu_device::flags8d[256]= /* decrement */ { 0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, @@ -201,15 +201,15 @@ const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */ #define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);} #define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);} -/* for treating an uint8_t as a signed int16_t */ -#define SIGNED(b) ((int16_t)(b&0x80?b|0xff00:b)) +/* for treating an u8 as a signed s16 */ +#define SIGNED(b) ((s16)(b&0x80?b|0xff00:b)) /* Macros for addressing modes */ #define DIRECT IMMBYTE(EAD) #define IMM8 EA=PC++ #define IMM16 {EA=PC;PC+=2;} #define EXTENDED IMMWORD(m_ea) -#define INDEXED {EA=X+(uint8_t)M_RDOP_ARG(PCD);PC++;} +#define INDEXED {EA=X+(u8)M_RDOP_ARG(PCD);PC++;} /* macros to set status flags */ #if defined(SEC) @@ -248,7 +248,7 @@ const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */ /* Note: don't use 0 cycles here for invalid opcodes so that we don't */ /* hang in an infinite loop if we hit one */ #define XX 4 // invalid opcode unknown cc -const uint8_t m6800_cpu_device::cycles_6800[256] = +const u8 m6800_cpu_device::cycles_6800[256] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*0*/ XX, 2,XX,XX,XX,XX, 2, 2, 4, 4, 2, 2, 2, 2, 2, 2, @@ -269,7 +269,7 @@ const uint8_t m6800_cpu_device::cycles_6800[256] = /*F*/ 4, 4, 4,XX, 4, 4, 4, 5, 4, 4, 4, 4,XX,XX, 5, 6 }; -const uint8_t m6800_cpu_device::cycles_nsc8105[256] = +const u8 m6800_cpu_device::cycles_nsc8105[256] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*0*/ 5,XX, 2,XX,XX, 2,XX, 2, 4, 2, 4, 2, 2, 2, 2, 2, @@ -371,12 +371,12 @@ DEFINE_DEVICE_TYPE(M6808, m6808_cpu_device, "m6808", "Motorola MC6808") DEFINE_DEVICE_TYPE(NSC8105, nsc8105_cpu_device, "nsc8105", "NSC8105") -m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6800_cpu_device(mconfig, M6800, tag, owner, clock, m6800_insn, cycles_6800, address_map_constructor()) { } -m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal) +m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles, address_map_constructor internal) : cpu_device(mconfig, type, tag, owner, clock) , m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal) , m_decrypted_opcodes_config("program", ENDIANNESS_BIG, 8, 16, 0) @@ -385,12 +385,12 @@ m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type ty { } -m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6802_cpu_device(mconfig, M6802, tag, owner, clock, m6800_insn, cycles_6800) { } -m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles) +m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles) : m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, address_map_constructor(FUNC(m6802_cpu_device::ram_map), this)) , m_ram_enable(true) { @@ -402,7 +402,7 @@ void m6802_cpu_device::ram_map(address_map &map) map(0x0000, 0x007f).ram(); } -m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6802_cpu_device(mconfig, M6808, tag, owner, clock, m6800_insn, cycles_6800) { set_ram_enable(false); @@ -414,7 +414,7 @@ void m6808_cpu_device::device_validity_check(validity_checker &valid) const osd_printf_error("MC6808 should not have internal RAM enabled\n"); } -nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6802_cpu_device(mconfig, NSC8105, tag, owner, clock, nsc8105_insn, cycles_nsc8105) { } @@ -432,20 +432,20 @@ device_memory_interface::space_config_vector m6800_cpu_device::memory_space_conf }; } -uint32_t m6800_cpu_device::RM16(uint32_t Addr ) +u32 m6800_cpu_device::RM16(u32 Addr) { - uint32_t result = RM(Addr) << 8; + u32 result = RM(Addr) << 8; return result | RM((Addr+1) & 0xffff); } -void m6800_cpu_device::WM16(uint32_t Addr, PAIR *p ) +void m6800_cpu_device::WM16(u32 Addr, PAIR *p) { WM(Addr, p->b.h); WM((Addr+1) & 0xffff, p->b.l); } /* IRQ enter */ -void m6800_cpu_device::enter_interrupt(const char *message, uint16_t irq_vector) +void m6800_cpu_device::enter_interrupt(const char *message, u16 irq_vector) { int cycles_to_eat = 0; @@ -625,7 +625,7 @@ void m6800_cpu_device::execute_one() { pPPC = pPC; debugger_instruction_hook(PCD); - uint8_t ireg = M_RDOP(PCD); + u8 ireg = M_RDOP(PCD); PC++; (this->*m_insn[ireg])(); increment_counter(m_cycles[ireg]); diff --git a/src/devices/cpu/m6800/m6800.h b/src/devices/cpu/m6800/m6800.h index 9896400113c..4cddbaa9e34 100644 --- a/src/devices/cpu/m6800/m6800.h +++ b/src/devices/cpu/m6800/m6800.h @@ -15,7 +15,7 @@ enum enum { - M6800_IRQ_LINE = 0, /* IRQ line number */ + M6800_IRQ_LINE = 0, // IRQ line number M6800_LINE_MAX }; @@ -30,25 +30,25 @@ public: typedef void (m6800_cpu_device::*op_func)(); // construction/destruction - m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: enum { - M6800_WAI = 8, /* set when WAI is waiting for an interrupt */ - M6800_SLP = 0x10 /* HD63701 only */ + M6800_WAI = 8, // set when WAI is waiting for an interrupt + M6800_SLP = 0x10 // HD63701 only }; - m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal); + m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal); // device-level overrides virtual void device_start() override; virtual void device_reset() override; // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const noexcept override { return 1; } - virtual uint32_t execute_max_cycles() const noexcept override { return 12; } - virtual uint32_t execute_input_lines() const noexcept override { return 2; } + virtual u32 execute_min_cycles() const noexcept override { return 1; } + virtual u32 execute_max_cycles() const noexcept override { return 12; } + virtual u32 execute_input_lines() const noexcept override { return 2; } virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; } virtual void execute_run() override; virtual void execute_one(); @@ -67,37 +67,37 @@ protected: address_space_config m_decrypted_opcodes_config; address_space_config m_io_config; - PAIR m_ppc; /* Previous program counter */ - PAIR m_pc; /* Program counter */ - PAIR m_s; /* Stack pointer */ - PAIR m_x; /* Index register */ - PAIR m_d; /* Accumulators */ - PAIR m_ea; /* effective address (temporary variable) */ - uint8_t m_cc; /* Condition codes */ - uint8_t m_wai_state; /* WAI opcode state (or sleep opcode state) */ - uint8_t m_nmi_state; /* NMI line state */ - uint8_t m_nmi_pending; /* NMI pending */ - uint8_t m_irq_state[5]; /* IRQ line state [IRQ1,TIN,IS3,..] */ - - /* Memory spaces */ + PAIR m_ppc; // Previous program counter + PAIR m_pc; // Program counter + PAIR m_s; // Stack pointer + PAIR m_x; // Index register + PAIR m_d; // Accumulators + PAIR m_ea; // effective address (temporary variable) + u8 m_cc; // Condition codes + u8 m_wai_state; // WAI opcode state (or sleep opcode state) + u8 m_nmi_state; // NMI line state + u8 m_nmi_pending; // NMI pending + u8 m_irq_state[5]; // IRQ line state [IRQ1,TIN,IS3,..] + + // memory spaces memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cprogram, m_copcodes; memory_access<16, 0, 0, ENDIANNESS_BIG>::specific m_program; const op_func *m_insn; - const uint8_t *m_cycles; /* clock cycle of instruction table */ + const u8 *m_cycles; // clock cycle of instruction table int m_icount; - static const uint8_t flags8i[256]; - static const uint8_t flags8d[256]; - static const uint8_t cycles_6800[256]; - static const uint8_t cycles_nsc8105[256]; + static const u8 flags8i[256]; + static const u8 flags8d[256]; + static const u8 cycles_6800[256]; + static const u8 cycles_nsc8105[256]; static const op_func m6800_insn[256]; static const op_func nsc8105_insn[256]; - uint32_t RM16(uint32_t Addr ); - void WM16(uint32_t Addr, PAIR *p ); - void enter_interrupt(const char *message, uint16_t irq_vector); + u32 RM16(u32 Addr); + void WM16(u32 Addr, PAIR *p); + void enter_interrupt(const char *message, u16 irq_vector); virtual bool check_irq1_enabled(); virtual void check_irq2() { } virtual void check_irq_lines(); @@ -362,15 +362,15 @@ protected: class m6802_cpu_device : public m6800_cpu_device { public: - m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); void set_ram_enable(bool re) { assert(!configured()); m_ram_enable = re; } protected: - m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles); + m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles); - virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; } - virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); } + virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } + virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } virtual std::unique_ptr create_disassembler() override; bool m_ram_enable; @@ -383,7 +383,7 @@ private: class m6808_cpu_device : public m6802_cpu_device { public: - m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: virtual std::unique_ptr create_disassembler() override; @@ -394,7 +394,7 @@ protected: class nsc8105_cpu_device : public m6802_cpu_device { public: - nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: virtual std::unique_ptr create_disassembler() override; diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp index cff7f922245..621a09c495f 100644 --- a/src/devices/cpu/m6800/m6801.cpp +++ b/src/devices/cpu/m6800/m6801.cpp @@ -129,7 +129,7 @@ enum /* Note: don't use 0 cycles here for invalid opcodes so that we don't */ /* hang in an infinite loop if we hit one */ #define XX 4 // invalid opcode unknown cc -const uint8_t m6801_cpu_device::cycles_6803[256] = +const u8 m6801_cpu_device::cycles_6803[256] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*0*/ XX, 2,XX,XX, 3, 3, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, @@ -150,7 +150,7 @@ const uint8_t m6801_cpu_device::cycles_6803[256] = /*F*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5 }; -const uint8_t m6801_cpu_device::cycles_63701[256] = +const u8 m6801_cpu_device::cycles_63701[256] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*0*/ XX, 1,XX,XX, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -415,12 +415,12 @@ DEFINE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device, "hd6303r", "Hitachi HD6303R") DEFINE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device, "hd6303x", "Hitachi HD6303X") DEFINE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device, "hd6303y", "Hitachi HD6303Y") -m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6801_cpu_device(mconfig, M6801, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6801_mem), this), 64) { } -m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes) +m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes) : m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal) , device_nvram_interface(mconfig, *this) , m_in_port_func(*this, 0xff) @@ -438,62 +438,62 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type ty nvram_enable_backup(false); } -m6801u4_cpu_device::m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6801u4_cpu_device::m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6801_cpu_device(mconfig, M6801U4, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6801u4_cpu_device::m6801u4_mem), this), 32) { } -hd6801v0_cpu_device::hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6801v0_cpu_device::hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6801_cpu_device(mconfig, HD6801V0, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6801v0_cpu_device::hd6801_mem), this), 64) { } -m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6801_cpu_device(mconfig, M6803, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6803_mem), this), 64) { } -m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m6801_cpu_device(mconfig, M6803E, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803e_cpu_device::m6803_mem), this), 64) { } -mc68120_device::mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal) +mc68120_device::mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal) : m6801_cpu_device(mconfig, type, tag, owner, clock, m6803_insn, cycles_6803, internal, 0) { } -mc68120_device::mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +mc68120_device::mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : mc68120_device(mconfig, MC68120, tag, owner, clock, address_map_constructor(FUNC(mc68120_device::m6801_mem), this)) { } -mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : mc68120_device(mconfig, MC68121, tag, owner, clock, address_map_constructor(FUNC(mc68121_device::m6803_mem), this)) { } -hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes) +hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes) : m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes) { } -hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301_cpu_device(mconfig, HD6301V1, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd6301v1_cpu_device::hd6801_mem), this), 128) { } -hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301_cpu_device(mconfig, HD63701V0, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd63701v0_cpu_device::hd6801_mem), this), 128) { } -hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301_cpu_device(mconfig, HD6303R, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6303r_cpu_device::m6803_mem), this), 128) { } -hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes) +hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes) : hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes) , m_in_portx_func(*this, 0xff) , m_out_portx_func(*this) @@ -501,42 +501,42 @@ hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_typ m_sclk_divider = 16; } -hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes) +hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes) : hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, nvram_bytes) { } -hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301x0_cpu_device(mconfig, HD6301X0, tag, owner, clock, address_map_constructor(FUNC(hd6301x0_cpu_device::hd6301x_mem), this), 192) { } -hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301x0_cpu_device(mconfig, HD63701X0, tag, owner, clock, address_map_constructor(FUNC(hd63701x0_cpu_device::hd6301x_mem), this), 192) { } -hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301x_cpu_device(mconfig, HD6303X, tag, owner, clock, address_map_constructor(FUNC(hd6303x_cpu_device::hd6303x_mem), this), 192) { } -hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes) +hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes) : hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, nvram_bytes) { } -hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301y_cpu_device(mconfig, HD6301Y0, tag, owner, clock, address_map_constructor(FUNC(hd6301y0_cpu_device::hd6301y_mem), this), 256) { } -hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301y_cpu_device(mconfig, HD63701Y0, tag, owner, clock, address_map_constructor(FUNC(hd63701y0_cpu_device::hd6301y_mem), this), 256) { } -hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : hd6301y_cpu_device(mconfig, HD6303Y, tag, owner, clock, address_map_constructor(FUNC(hd6303y_cpu_device::hd6303y_mem), this), 256) { } @@ -564,7 +564,7 @@ bool m6801_cpu_device::check_irq2_sci() ((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE))); } -void m6801_cpu_device::take_irq2(const char *message, uint16_t irq_vector) +void m6801_cpu_device::take_irq2(const char *message, u16 irq_vector) { m_wai_state &= ~M6800_SLP; @@ -919,7 +919,7 @@ void hd6301x_cpu_device::cleanup_counters() m6801_cpu_device::cleanup_counters(); } -void m6801_cpu_device::set_rmcr(uint8_t data) +void m6801_cpu_device::set_rmcr(u8 data) { if (m_rmcr == data) return; @@ -952,7 +952,7 @@ void m6801_cpu_device::set_rmcr(uint8_t data) } } -void hd6301x_cpu_device::set_rmcr(uint8_t data) +void hd6301x_cpu_device::set_rmcr(u8 data) { if (m_rmcr == data) return; @@ -1240,7 +1240,7 @@ void m6801_cpu_device::execute_set_input(int irqline, int state) if (state != m_irq_state[M6801_TIN_LINE]) { m_irq_state[M6801_TIN_LINE] = state; - //edge = (state == CLEAR_LINE ) ? 2 : 0; + //edge = (state == CLEAR_LINE) ? 2 : 0; if (((m_tcsr & TCSR_IEDG) ^ (state == CLEAR_LINE ? TCSR_IEDG : 0)) == 0) return; /* active edge in */ @@ -1493,12 +1493,12 @@ void hd6301y_cpu_device::device_reset() m_p6csr = 7; } -uint8_t mc68120_device::dpram_r(offs_t offset) +u8 mc68120_device::dpram_r(offs_t offset) { return m_internal_ram[offset & 0x7f]; } -void mc68120_device::dpram_w(offs_t offset, uint8_t data) +void mc68120_device::dpram_w(offs_t offset, u8 data) { m_internal_ram[offset & 0x7f] = data; } @@ -1518,7 +1518,7 @@ bool m6801_cpu_device::nvram_write(util::write_stream &file) return false; // upper bits of RAM control register - uint8_t ram_ctrl = m_ram_ctrl & 0xc0; + u8 ram_ctrl = m_ram_ctrl & 0xc0; if (file.write(&ram_ctrl, 1, actual) || actual != 1) return false; @@ -1533,7 +1533,7 @@ bool m6801_cpu_device::nvram_read(util::read_stream &file) return false; // upper bits of RAM control register - uint8_t ram_ctrl = 0; + u8 ram_ctrl = 0; if (file.read(&ram_ctrl, 1, actual) || actual != 1) return false; m_ram_ctrl |= ram_ctrl & 0xc0; @@ -1575,7 +1575,7 @@ bool hd6301_cpu_device::nvram_write(util::write_stream &file) return false; size_t actual; - std::vector buf(7); + std::vector buf(7); // misc registers buf[0] = m_s.b.h; @@ -1605,7 +1605,7 @@ bool hd6301x_cpu_device::nvram_write(util::write_stream &file) return false; size_t actual; - std::vector buf; + std::vector buf; // port output latches buf.insert(buf.begin(), m_portx_data, m_portx_data + sizeof(m_portx_data)); @@ -1622,7 +1622,7 @@ bool hd6301_cpu_device::nvram_read(util::read_stream &file) return false; size_t actual; - uint8_t buf[7]; + u8 buf[7]; // misc registers if (file.read(&buf, sizeof(buf), actual) || (sizeof(buf) != actual)) @@ -1661,7 +1661,7 @@ bool hd6301x_cpu_device::nvram_read(util::read_stream &file) // internal registers -void m6801_cpu_device::p1_ddr_w(uint8_t data) +void m6801_cpu_device::p1_ddr_w(u8 data) { LOGPORT("Port 1 Data Direction Register: %02x\n", data); @@ -1672,13 +1672,13 @@ void m6801_cpu_device::p1_ddr_w(uint8_t data) } } -void hd6301y_cpu_device::p1_ddr_1bit_w(uint8_t data) +void hd6301y_cpu_device::p1_ddr_1bit_w(u8 data) { // HD6301Y DDR1 is 1-bit (HD6301X does not have DDR1) hd6301_cpu_device::p1_ddr_w(BIT(data, 0) ? 0xff : 0x00); } -uint8_t m6801_cpu_device::p1_data_r() +u8 m6801_cpu_device::p1_data_r() { if (m_port_ddr[0] == 0xff) return m_port_data[0]; @@ -1686,7 +1686,7 @@ uint8_t m6801_cpu_device::p1_data_r() return (m_in_port_func[0]() & (m_port_ddr[0] ^ 0xff)) | (m_port_data[0] & m_port_ddr[0]); } -void m6801_cpu_device::p1_data_w(uint8_t data) +void m6801_cpu_device::p1_data_w(u8 data) { LOGPORT("Port 1 Data Register: %02x\n", data); @@ -1699,8 +1699,8 @@ void m6801_cpu_device::write_port2() { if (!m_port2_written) return; - uint8_t data = m_port_data[1]; - uint8_t ddr = m_port_ddr[1] & 0x1f; + u8 data = m_port_data[1]; + u8 ddr = m_port_ddr[1] & 0x1f; if ((ddr != 0x1f) && ddr) { @@ -1722,13 +1722,13 @@ void hd6301x_cpu_device::write_port2() { if (!m_port2_written) return; - uint8_t ddr = m_port_ddr[1]; + u8 ddr = m_port_ddr[1]; if (m_tcsr2 & TCSR2_OE1) ddr |= 0x02; if (m_tcsr2 & TCSR2_OE2) ddr |= 0x20; - uint8_t data = (m_port_data[1] & ddr) | (ddr ^ 0xff); + u8 data = (m_port_data[1] & ddr) | (ddr ^ 0xff); if (m_trcsr & M6801_TRCSR_TE) { @@ -1744,7 +1744,7 @@ void hd6301x_cpu_device::write_port2() m_out_port_func[1](0, data, ddr); } -void m6801_cpu_device::p2_ddr_w(uint8_t data) +void m6801_cpu_device::p2_ddr_w(u8 data) { LOGPORT("Port 2 Data Direction Register: %02x\n", data); @@ -1755,13 +1755,13 @@ void m6801_cpu_device::p2_ddr_w(uint8_t data) } } -void hd6301x_cpu_device::p2_ddr_2bit_w(uint8_t data) +void hd6301x_cpu_device::p2_ddr_2bit_w(u8 data) { // HD6301X DDR2 is 2-bit (it is 8-bit again on HD6301Y) hd6301_cpu_device::p2_ddr_w((BIT(data, 1) ? 0xfe : 0x00) | (data & 0x01)); } -uint8_t m6801_cpu_device::p2_data_r() +u8 m6801_cpu_device::p2_data_r() { if (m_port_ddr[1] == 0xff) return m_port_data[1]; @@ -1769,7 +1769,7 @@ uint8_t m6801_cpu_device::p2_data_r() return (m_in_port_func[1]() & (m_port_ddr[1] ^ 0xff)) | (m_port_data[1] & m_port_ddr[1]); } -void m6801_cpu_device::p2_data_w(uint8_t data) +void m6801_cpu_device::p2_data_w(u8 data) { LOGPORT("Port 2 Data Register: %02x\n", data); @@ -1786,7 +1786,7 @@ void m6801_cpu_device::set_os3(int state) m_out_sc2_func(state); } -void m6801_cpu_device::p3_ddr_w(uint8_t data) +void m6801_cpu_device::p3_ddr_w(u8 data) { LOGPORT("Port 3 Data Direction Register: %02x\n", data); @@ -1797,15 +1797,15 @@ void m6801_cpu_device::p3_ddr_w(uint8_t data) } } -void hd6301x_cpu_device::p3_ddr_1bit_w(uint8_t data) +void hd6301x_cpu_device::p3_ddr_1bit_w(u8 data) { // HD6301X/Y DDR3 is 1-bit hd6301_cpu_device::p3_ddr_w(BIT(data, 0) ? 0xff : 0x00); } -uint8_t m6801_cpu_device::p3_data_r() +u8 m6801_cpu_device::p3_data_r() { - uint8_t data; + u8 data; if (!machine().side_effects_disabled()) { @@ -1839,7 +1839,7 @@ uint8_t m6801_cpu_device::p3_data_r() return data; } -void m6801_cpu_device::p3_data_w(uint8_t data) +void m6801_cpu_device::p3_data_w(u8 data) { LOGPORT("Port 3 Data Register: %02x\n", data); @@ -1864,7 +1864,7 @@ void m6801_cpu_device::p3_data_w(uint8_t data) } } -uint8_t hd6301x_cpu_device::p3_data_r() +u8 hd6301x_cpu_device::p3_data_r() { // no handshaking protocol if (m_port_ddr[2] == 0xff) @@ -1873,7 +1873,7 @@ uint8_t hd6301x_cpu_device::p3_data_r() return (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff)) | (m_port_data[2] & m_port_ddr[2]); } -void hd6301x_cpu_device::p3_data_w(uint8_t data) +void hd6301x_cpu_device::p3_data_w(u8 data) { // no handshaking protocol LOGPORT("Port 3 Data Register: %02x\n", data); @@ -1882,7 +1882,7 @@ void hd6301x_cpu_device::p3_data_w(uint8_t data) m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff), m_port_ddr[2]); } -uint8_t m6801_cpu_device::p3_csr_r() +u8 m6801_cpu_device::p3_csr_r() { if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effects_disabled()) { @@ -1892,7 +1892,7 @@ uint8_t m6801_cpu_device::p3_csr_r() return m_p3csr; } -void m6801_cpu_device::p3_csr_w(uint8_t data) +void m6801_cpu_device::p3_csr_w(u8 data) { LOGPORT("Port 3 Control and Status Register: %02x\n", data); @@ -1900,7 +1900,7 @@ void m6801_cpu_device::p3_csr_w(uint8_t data) } -void m6801_cpu_device::p4_ddr_w(uint8_t data) +void m6801_cpu_device::p4_ddr_w(u8 data) { LOGPORT("Port 4 Data Direction Register: %02x\n", data); @@ -1911,7 +1911,7 @@ void m6801_cpu_device::p4_ddr_w(uint8_t data) } } -uint8_t m6801_cpu_device::p4_data_r() +u8 m6801_cpu_device::p4_data_r() { if (m_port_ddr[3] == 0xff) return m_port_data[3]; @@ -1919,7 +1919,7 @@ uint8_t m6801_cpu_device::p4_data_r() return (m_in_port_func[3]() & (m_port_ddr[3] ^ 0xff)) | (m_port_data[3] & m_port_ddr[3]); } -void m6801_cpu_device::p4_data_w(uint8_t data) +void m6801_cpu_device::p4_data_w(u8 data) { LOGPORT("Port 4 Data Register: %02x\n", data); @@ -1927,7 +1927,7 @@ void m6801_cpu_device::p4_data_w(uint8_t data) m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff), m_port_ddr[3]); } -void hd6301y_cpu_device::p5_ddr_w(uint8_t data) +void hd6301y_cpu_device::p5_ddr_w(u8 data) { LOGPORT("Port 5 Data Direction Register: %02x\n", data); @@ -1939,9 +1939,9 @@ void hd6301y_cpu_device::p5_ddr_w(uint8_t data) } -uint8_t hd6301x_cpu_device::p5_data_r() +u8 hd6301x_cpu_device::p5_data_r() { - uint8_t data = m_in_portx_func[0](); + u8 data = m_in_portx_func[0](); if (m_irq_state[HD6301_IRQ1_LINE]) data &= 0xfe; @@ -1952,13 +1952,13 @@ uint8_t hd6301x_cpu_device::p5_data_r() return data; } -uint8_t hd6301y_cpu_device::p5_data_r() +u8 hd6301y_cpu_device::p5_data_r() { if (m_portx_ddr[0] == 0xff) return m_portx_data[0]; else { - uint8_t data = hd6301x_cpu_device::p5_data_r(); + u8 data = hd6301x_cpu_device::p5_data_r(); if (m_irq_state[M6801_IS3_LINE]) data |= 0x10; @@ -1967,7 +1967,7 @@ uint8_t hd6301y_cpu_device::p5_data_r() } } -void hd6301y_cpu_device::p5_data_w(uint8_t data) +void hd6301y_cpu_device::p5_data_w(u8 data) { LOGPORT("Port 5 Data Register: %02x\n", data); @@ -1976,7 +1976,7 @@ void hd6301y_cpu_device::p5_data_w(uint8_t data) } -void hd6301x_cpu_device::p6_ddr_w(uint8_t data) +void hd6301x_cpu_device::p6_ddr_w(u8 data) { LOGPORT("Port 6 Data Direction Register: %02x\n", data); @@ -1987,7 +1987,7 @@ void hd6301x_cpu_device::p6_ddr_w(uint8_t data) } } -uint8_t hd6301x_cpu_device::p6_data_r() +u8 hd6301x_cpu_device::p6_data_r() { if (m_portx_ddr[1] == 0xff) return m_portx_data[1]; @@ -1995,7 +1995,7 @@ uint8_t hd6301x_cpu_device::p6_data_r() return (m_in_portx_func[1]() & (m_portx_ddr[1] ^ 0xff)) | (m_portx_data[1] & m_portx_ddr[1]); } -void hd6301x_cpu_device::p6_data_w(uint8_t data) +void hd6301x_cpu_device::p6_data_w(u8 data) { LOGPORT("Port 6 Data Register: %02x\n", data); @@ -2003,7 +2003,7 @@ void hd6301x_cpu_device::p6_data_w(uint8_t data) m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (m_portx_ddr[1] ^ 0xff), m_portx_ddr[1]); } -uint8_t hd6301y_cpu_device::p6_data_r() +u8 hd6301y_cpu_device::p6_data_r() { if (!machine().side_effects_disabled()) clear_pending_isf(); @@ -2011,7 +2011,7 @@ uint8_t hd6301y_cpu_device::p6_data_r() return hd6301x_cpu_device::p6_data_r(); } -void hd6301y_cpu_device::p6_data_w(uint8_t data) +void hd6301y_cpu_device::p6_data_w(u8 data) { clear_pending_isf(); @@ -2028,7 +2028,7 @@ void hd6301y_cpu_device::clear_pending_isf() } } -uint8_t hd6301y_cpu_device::p6_csr_r() +u8 hd6301y_cpu_device::p6_csr_r() { if (!machine().side_effects_disabled()) m_pending_isf_clear = true; @@ -2036,7 +2036,7 @@ uint8_t hd6301y_cpu_device::p6_csr_r() return m_p6csr | 7; } -void hd6301y_cpu_device::p6_csr_w(uint8_t data) +void hd6301y_cpu_device::p6_csr_w(u8 data) { LOGPORT("Port 6 Control/Status Register: %02x\n", data); @@ -2045,12 +2045,12 @@ void hd6301y_cpu_device::p6_csr_w(uint8_t data) } -uint8_t hd6301x_cpu_device::p7_data_r() +u8 hd6301x_cpu_device::p7_data_r() { return 0xe0 | m_portx_data[2]; } -void hd6301x_cpu_device::p7_data_w(uint8_t data) +void hd6301x_cpu_device::p7_data_w(u8 data) { data &= 0x1f; @@ -2061,14 +2061,14 @@ void hd6301x_cpu_device::p7_data_w(uint8_t data) } -uint8_t m6801_cpu_device::tcsr_r() +u8 m6801_cpu_device::tcsr_r() { if (!machine().side_effects_disabled()) m_pending_tcsr = 0; return m_tcsr; } -void m6801_cpu_device::tcsr_w(uint8_t data) +void m6801_cpu_device::tcsr_w(u8 data) { data &= 0x1f; @@ -2079,7 +2079,7 @@ void m6801_cpu_device::tcsr_w(uint8_t data) check_irq2(); } -uint8_t m6801_cpu_device::ch_r() +u8 m6801_cpu_device::ch_r() { if (!(m_pending_tcsr & TCSR_TOF) && !machine().side_effects_disabled()) { @@ -2088,12 +2088,12 @@ uint8_t m6801_cpu_device::ch_r() return m_counter.b.h; } -uint8_t m6801_cpu_device::cl_r() +u8 m6801_cpu_device::cl_r() { return m_counter.b.l; } -void m6801_cpu_device::ch_w(uint8_t data) +void m6801_cpu_device::ch_w(u8 data) { LOGTIMER("Counter High Register: %02x\n", data); @@ -2103,7 +2103,7 @@ void m6801_cpu_device::ch_w(uint8_t data) modified_counters(); } -void m6801_cpu_device::cl_w(uint8_t data) +void m6801_cpu_device::cl_w(u8 data) { LOGTIMER("Counter Low Register: %02x\n", data); @@ -2112,17 +2112,17 @@ void m6801_cpu_device::cl_w(uint8_t data) modified_counters(); } -uint8_t m6801_cpu_device::ocrh_r() +u8 m6801_cpu_device::ocrh_r() { return m_output_compare[0].b.h; } -uint8_t m6801_cpu_device::ocrl_r() +u8 m6801_cpu_device::ocrl_r() { return m_output_compare[0].b.l; } -void m6801_cpu_device::ocrh_w(uint8_t data) +void m6801_cpu_device::ocrh_w(u8 data) { LOGTIMER("Output Compare High Register: %02x\n", data); @@ -2138,7 +2138,7 @@ void m6801_cpu_device::ocrh_w(uint8_t data) } } -void m6801_cpu_device::ocrl_w(uint8_t data) +void m6801_cpu_device::ocrl_w(u8 data) { LOGTIMER("Output Compare Low Register: %02x\n", data); @@ -2154,7 +2154,7 @@ void m6801_cpu_device::ocrl_w(uint8_t data) } } -uint8_t m6801_cpu_device::icrh_r() +u8 m6801_cpu_device::icrh_r() { if (!(m_pending_tcsr & TCSR_ICF) && !machine().side_effects_disabled()) { @@ -2163,18 +2163,18 @@ uint8_t m6801_cpu_device::icrh_r() return (m_input_capture >> 0) & 0xff; } -uint8_t m6801_cpu_device::icrl_r() +u8 m6801_cpu_device::icrl_r() { return (m_input_capture >> 8) & 0xff; } -uint8_t m6801u4_cpu_device::tcr2_r() +u8 m6801u4_cpu_device::tcr2_r() { return m_tcr[1] | 0x03; } -void m6801u4_cpu_device::tcr2_w(uint8_t data) +void m6801u4_cpu_device::tcr2_w(u8 data) { LOGTIMER("Timer Control Register 2: %02x\n", data); @@ -2182,7 +2182,7 @@ void m6801u4_cpu_device::tcr2_w(uint8_t data) check_irq2(); } -uint8_t m6801u4_cpu_device::tsr_r() +u8 m6801u4_cpu_device::tsr_r() { if (!machine().side_effects_disabled()) { @@ -2197,19 +2197,19 @@ uint8_t m6801u4_cpu_device::tsr_r() } template -uint8_t m6801u4_cpu_device::ocr2h_r() +u8 m6801u4_cpu_device::ocr2h_r() { return m_output_compare[N].b.h; } template -uint8_t m6801u4_cpu_device::ocr2l_r() +u8 m6801u4_cpu_device::ocr2l_r() { return m_output_compare[N].b.l; } template -void m6801u4_cpu_device::ocr2h_w(uint8_t data) +void m6801u4_cpu_device::ocr2h_w(u8 data) { LOGTIMER("Output Compare High Register %d: %02x\n", N + 1, data); @@ -2226,7 +2226,7 @@ void m6801u4_cpu_device::ocr2h_w(uint8_t data) } template -void m6801u4_cpu_device::ocr2l_w(uint8_t data) +void m6801u4_cpu_device::ocr2l_w(u8 data) { LOGTIMER("Output Compare Low Register %d: %02x\n", N + 1, data); @@ -2243,7 +2243,7 @@ void m6801u4_cpu_device::ocr2l_w(uint8_t data) } -uint8_t hd6301x_cpu_device::tcsr2_r() +u8 hd6301x_cpu_device::tcsr2_r() { if (!machine().side_effects_disabled()) { @@ -2253,7 +2253,7 @@ uint8_t hd6301x_cpu_device::tcsr2_r() return m_tcsr2 | (m_tcsr & (TCSR_ICF | TCSR_OCF)) | 0x10; } -void hd6301x_cpu_device::tcsr2_w(uint8_t data) +void hd6301x_cpu_device::tcsr2_w(u8 data) { LOGTIMER("Timer Control and Status Register 2: %02x\n", data); @@ -2263,17 +2263,17 @@ void hd6301x_cpu_device::tcsr2_w(uint8_t data) check_irq2(); } -uint8_t hd6301x_cpu_device::ocr2h_r() +u8 hd6301x_cpu_device::ocr2h_r() { return m_output_compare[1].b.h; } -uint8_t hd6301x_cpu_device::ocr2l_r() +u8 hd6301x_cpu_device::ocr2l_r() { return m_output_compare[1].b.l; } -void hd6301x_cpu_device::ocr2h_w(uint8_t data) +void hd6301x_cpu_device::ocr2h_w(u8 data) { LOGTIMER("Output Compare High Register 2: %02x\n", data); @@ -2289,7 +2289,7 @@ void hd6301x_cpu_device::ocr2h_w(uint8_t data) } } -void hd6301x_cpu_device::ocr2l_w(uint8_t data) +void hd6301x_cpu_device::ocr2l_w(u8 data) { LOGTIMER("Output Compare Low Register 2: %02x\n", data); @@ -2308,7 +2308,7 @@ void hd6301x_cpu_device::ocr2l_w(uint8_t data) void hd6301x_cpu_device::increment_t2cnt(int amount) { - if (amount > uint8_t(m_tconr - m_t2cnt)) + if (amount > u8(m_tconr - m_t2cnt)) { if (m_t2cnt > m_tconr) { @@ -2350,30 +2350,30 @@ void hd6301x_cpu_device::increment_t2cnt(int amount) m_t2cnt += amount; } -uint8_t hd6301x_cpu_device::t2cnt_r() +u8 hd6301x_cpu_device::t2cnt_r() { return m_t2cnt; } -void hd6301x_cpu_device::t2cnt_w(uint8_t data) +void hd6301x_cpu_device::t2cnt_w(u8 data) { m_t2cnt = data; m_t2cnt_written = true; } -void hd6301x_cpu_device::tconr_w(uint8_t data) +void hd6301x_cpu_device::tconr_w(u8 data) { m_tconr = data; } -uint8_t hd6301x_cpu_device::tcsr3_r() +u8 hd6301x_cpu_device::tcsr3_r() { return m_tcsr3; } -void hd6301x_cpu_device::tcsr3_w(uint8_t data) +void hd6301x_cpu_device::tcsr3_w(u8 data) { - uint8_t tout3_last_enable = (m_tcsr3 & 0x0c) != 0; + u8 tout3_last_enable = (m_tcsr3 & 0x0c) != 0; // Bit 5 does not exist and Bit 7 can only be written with 0 m_tcsr3 = data & (0x5f | (m_tcsr3 & 0x80)); @@ -2391,19 +2391,19 @@ void hd6301x_cpu_device::tcsr3_w(uint8_t data) } -uint8_t m6801_cpu_device::sci_rmcr_r() +u8 m6801_cpu_device::sci_rmcr_r() { return m_rmcr; } -void m6801_cpu_device::sci_rmcr_w(uint8_t data) +void m6801_cpu_device::sci_rmcr_w(u8 data) { LOGSER("SCI Rate and Mode Control Register: %02x\n", data); set_rmcr(data); } -uint8_t m6801_cpu_device::sci_trcsr_r() +u8 m6801_cpu_device::sci_trcsr_r() { if (!machine().side_effects_disabled()) { @@ -2426,7 +2426,7 @@ uint8_t m6801_cpu_device::sci_trcsr_r() return m_trcsr; } -void m6801_cpu_device::sci_trcsr_w(uint8_t data) +void m6801_cpu_device::sci_trcsr_w(u8 data) { LOGSER("SCI Transmit/Receive Control and Status Register: %02x\n", data); @@ -2445,7 +2445,7 @@ void m6801_cpu_device::sci_trcsr_w(uint8_t data) m_trcsr = (m_trcsr & 0xe0) | (data & 0x1f); } -uint8_t m6801_cpu_device::sci_rdr_r() +u8 m6801_cpu_device::sci_rdr_r() { if (!machine().side_effects_disabled()) { @@ -2467,7 +2467,7 @@ uint8_t m6801_cpu_device::sci_rdr_r() return m_rdr; } -void m6801_cpu_device::sci_tdr_w(uint8_t data) +void m6801_cpu_device::sci_tdr_w(u8 data) { LOGSER("SCI Transmit Data Register: $%02x/%d\n", data, data); @@ -2480,36 +2480,36 @@ void m6801_cpu_device::sci_tdr_w(uint8_t data) } -uint8_t m6801_cpu_device::rcr_r() +u8 m6801_cpu_device::rcr_r() { return m_ram_ctrl | 0x3f; } -uint8_t hd6301x_cpu_device::rcr_r() +u8 hd6301x_cpu_device::rcr_r() { return m_ram_ctrl | 0x30; } -uint8_t hd6301y_cpu_device::rcr_r() +u8 hd6301y_cpu_device::rcr_r() { // no unused bits return m_ram_ctrl; } -void m6801_cpu_device::rcr_w(uint8_t data) +void m6801_cpu_device::rcr_w(u8 data) { LOG("RAM Control Register: %02x\n", data); m_ram_ctrl = data; } -void hd6301x_cpu_device::rcr_w(uint8_t data) +void hd6301x_cpu_device::rcr_w(u8 data) { m6801_cpu_device::rcr_w(data); check_irq_lines(); } -void hd6301y_cpu_device::rcr_w(uint8_t data) +void hd6301y_cpu_device::rcr_w(u8 data) { hd6301x_cpu_device::rcr_w(data); @@ -2518,7 +2518,7 @@ void hd6301y_cpu_device::rcr_w(uint8_t data) execute_set_input(M6801_STBY_LINE, ASSERT_LINE); } -uint8_t m6801_cpu_device::ff_r() +u8 m6801_cpu_device::ff_r() { return 0xff; } diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h index b19aa90fc1b..2d4e499c96d 100644 --- a/src/devices/cpu/m6800/m6801.h +++ b/src/devices/cpu/m6800/m6801.h @@ -40,7 +40,7 @@ enum class m6801_cpu_device : public m6800_cpu_device, public device_nvram_interface { public: - m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); // port 1-4 I/O, DDR is passed through mem_mask auto in_p1_cb() { return m_in_port_func[0].bind(); } @@ -56,14 +56,14 @@ public: auto out_ser_tx_cb() { return m_out_sertx_func.bind(); } void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true) - void nvram_set_default_value(uint8_t val) { m_nvram_defval = val; } // default is 0 + void nvram_set_default_value(u8 val) { m_nvram_defval = val; } // default is 0 auto standby_cb() { return m_standby_func.bind(); } // notifier (not an output pin) int standby() { return suspended(SUSPEND_REASON_CLOCK) ? 1 : 0; } void m6801_clock_serial(); protected: - m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes); + m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes); // device_t implementation virtual void device_start() override; @@ -75,53 +75,53 @@ protected: virtual bool nvram_write(util::write_stream &file) override; // device_execute_interface implementation - virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; } - virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); } - virtual uint32_t execute_input_lines() const noexcept override { return 6; } + virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } + virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } + virtual u32 execute_input_lines() const noexcept override { return 6; } virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return m6800_cpu_device::execute_input_edge_triggered(inputnum) || inputnum == M6801_STBY_LINE; } virtual void execute_set_input(int inputnum, int state) override; // device_disasm_interface implementation virtual std::unique_ptr create_disassembler() override; - void p1_ddr_w(uint8_t data); - uint8_t p1_data_r(); - void p1_data_w(uint8_t data); - void p2_ddr_w(uint8_t data); - uint8_t p2_data_r(); - void p2_data_w(uint8_t data); - void p3_ddr_w(uint8_t data); - virtual uint8_t p3_data_r(); - virtual void p3_data_w(uint8_t data); - uint8_t p3_csr_r(); - void p3_csr_w(uint8_t data); - void p4_ddr_w(uint8_t data); - uint8_t p4_data_r(); - void p4_data_w(uint8_t data); - - uint8_t tcsr_r(); - void tcsr_w(uint8_t data); - uint8_t ch_r(); - uint8_t cl_r(); - void ch_w(uint8_t data); - void cl_w(uint8_t data); - uint8_t ocrh_r(); - uint8_t ocrl_r(); - void ocrh_w(uint8_t data); - void ocrl_w(uint8_t data); - uint8_t icrh_r(); - uint8_t icrl_r(); - - uint8_t sci_rmcr_r(); - void sci_rmcr_w(uint8_t data); - uint8_t sci_trcsr_r(); - void sci_trcsr_w(uint8_t data); - uint8_t sci_rdr_r(); - void sci_tdr_w(uint8_t data); - - virtual uint8_t rcr_r(); - virtual void rcr_w(uint8_t data); - uint8_t ff_r(); + void p1_ddr_w(u8 data); + u8 p1_data_r(); + void p1_data_w(u8 data); + void p2_ddr_w(u8 data); + u8 p2_data_r(); + void p2_data_w(u8 data); + void p3_ddr_w(u8 data); + virtual u8 p3_data_r(); + virtual void p3_data_w(u8 data); + u8 p3_csr_r(); + void p3_csr_w(u8 data); + void p4_ddr_w(u8 data); + u8 p4_data_r(); + void p4_data_w(u8 data); + + u8 tcsr_r(); + void tcsr_w(u8 data); + u8 ch_r(); + u8 cl_r(); + void ch_w(u8 data); + void cl_w(u8 data); + u8 ocrh_r(); + u8 ocrl_r(); + void ocrh_w(u8 data); + void ocrl_w(u8 data); + u8 icrh_r(); + u8 icrl_r(); + + u8 sci_rmcr_r(); + void sci_rmcr_w(u8 data); + u8 sci_trcsr_r(); + void sci_trcsr_w(u8 data); + u8 sci_rdr_r(); + void sci_tdr_w(u8 data); + + virtual u8 rcr_r(); + virtual void rcr_w(u8 data); + u8 ff_r(); void m6801_io(address_map &map); void m6801_mem(address_map &map); @@ -135,39 +135,39 @@ protected: devcb_write_line m_out_sertx_func; devcb_write_line m_standby_func; - required_shared_ptr m_internal_ram; + required_shared_ptr m_internal_ram; const int m_nvram_bytes; - uint8_t m_nvram_defval; + u8 m_nvram_defval; bool m_nvram_battery; int m_sclk_divider; // internal registers - uint8_t m_port_ddr[4]; - uint8_t m_port_data[4]; - uint8_t m_p3csr; // Port 3 Control/Status Register - uint8_t m_tcsr; // Timer Control and Status Register - uint8_t m_pending_tcsr; // pending IRQ flag for clear IRQflag process - uint8_t m_ram_ctrl; - PAIR m_counter; // free running counter - PAIR m_output_compare[3]; // output compare (MC6801U4 and HD6301X have more than one) - uint16_t m_input_capture; // input capture - bool m_pending_isf_clear; - int m_port3_latched; - bool m_port2_written; - - uint8_t m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tshr; - int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock; - bool m_use_ext_serclock; - - uint8_t m_latch09; - int m_is3_state; - - PAIR m_timer_over; + u8 m_port_ddr[4]; + u8 m_port_data[4]; + u8 m_p3csr; // Port 3 Control/Status Register + u8 m_tcsr; // Timer Control and Status Register + u8 m_pending_tcsr; // pending IRQ flag for clear IRQflag process + u8 m_ram_ctrl; + PAIR m_counter; // free running counter + PAIR m_output_compare[3]; // output compare (MC6801U4 and HD6301X have more than one) + u16 m_input_capture; // input capture + bool m_pending_isf_clear; + int m_port3_latched; + bool m_port2_written; + + u8 m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tshr; + int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock; + bool m_use_ext_serclock; + + u8 m_latch09; + int m_is3_state; + + PAIR m_timer_over; emu_timer *m_sci_timer; - uint32_t m_timer_next; // point of next timer event + u32 m_timer_next; // point of next timer event - static const uint8_t cycles_6803[256]; - static const uint8_t cycles_63701[256]; + static const u8 cycles_6803[256]; + static const u8 cycles_63701[256]; static const op_func m6803_insn[256]; static const op_func hd63701_insn[256]; @@ -176,7 +176,7 @@ protected: bool check_irq2_toi(); bool check_irq2_sci(); virtual void check_irq2() override; - void take_irq2(const char *message, uint16_t irq_vector); + void take_irq2(const char *message, u16 irq_vector); virtual void increment_counter(int amount) override; virtual void eat_cycles() override; @@ -185,7 +185,7 @@ protected: virtual void set_timer_event(); virtual void modified_counters(); virtual void check_timer_event(); - virtual void set_rmcr(uint8_t data); + virtual void set_rmcr(u8 data); virtual void write_port2(); int m6800_rx(); void serial_transmit(); @@ -198,7 +198,7 @@ protected: class m6801u4_cpu_device : public m6801_cpu_device { public: - m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: // device_t implementation @@ -215,32 +215,32 @@ private: virtual void check_timer_event() override; virtual void cleanup_counters() override; - uint8_t tcr2_r(); - void tcr2_w(uint8_t data); - uint8_t tsr_r(); + u8 tcr2_r(); + void tcr2_w(u8 data); + u8 tsr_r(); - template uint8_t ocr2h_r(); - template void ocr2h_w(uint8_t data); - template uint8_t ocr2l_r(); - template void ocr2l_w(uint8_t data); + template u8 ocr2h_r(); + template void ocr2h_w(u8 data); + template u8 ocr2l_r(); + template void ocr2l_w(u8 data); - uint8_t m_tcr[2]; - uint8_t m_tsr; - uint8_t m_pending_tsr; + u8 m_tcr[2]; + u8 m_tsr; + u8 m_pending_tsr; }; class hd6801v0_cpu_device : public m6801_cpu_device { public: - hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class m6803_cpu_device : public m6801_cpu_device { public: - m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: virtual std::unique_ptr create_disassembler() override; @@ -250,11 +250,11 @@ protected: class m6803e_cpu_device : public m6801_cpu_device { public: - m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: - virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return clocks; } - virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles; } + virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return clocks; } + virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles; } virtual std::unique_ptr create_disassembler() override; }; @@ -263,28 +263,28 @@ protected: class mc68120_device : public m6801_cpu_device { public: - mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); // dual-ported RAM access - uint8_t dpram_r(offs_t offset); - void dpram_w(offs_t offset, uint8_t data); + u8 dpram_r(offs_t offset); + void dpram_w(offs_t offset, u8 data); protected: - mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal); + mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal); }; class mc68121_device : public mc68120_device { public: - mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class hd6301_cpu_device : public m6801_cpu_device { protected: - hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes); + hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes); // device_nvram_interface implementation virtual bool nvram_read(util::read_stream &file) override; @@ -305,7 +305,7 @@ protected: class hd6301v1_cpu_device : public hd6301_cpu_device { public: - hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -314,7 +314,7 @@ public: class hd63701v0_cpu_device : public hd6301_cpu_device { public: - hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -325,7 +325,7 @@ public: class hd6303r_cpu_device : public hd6301_cpu_device { public: - hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -340,7 +340,7 @@ public: auto out_p7_cb() { return m_out_portx_func[2].bind(); } protected: - hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes); + hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes); // device_nvram_interface implementation virtual bool nvram_read(util::read_stream &file) override; @@ -357,32 +357,32 @@ protected: virtual void write_port2() override; - void p2_ddr_2bit_w(uint8_t data); - void p3_ddr_1bit_w(uint8_t data); - virtual uint8_t p3_data_r() override; - virtual void p3_data_w(uint8_t data) override; - virtual uint8_t p5_data_r(); - void p6_ddr_w(uint8_t data); - virtual uint8_t p6_data_r(); - virtual void p6_data_w(uint8_t data); - uint8_t p7_data_r(); - void p7_data_w(uint8_t data); - virtual uint8_t rcr_r() override; - virtual void rcr_w(uint8_t data) override; - - uint8_t tcsr2_r(); - void tcsr2_w(uint8_t data); - uint8_t ocr2h_r(); - void ocr2h_w(uint8_t data); - uint8_t ocr2l_r(); - void ocr2l_w(uint8_t data); + void p2_ddr_2bit_w(u8 data); + void p3_ddr_1bit_w(u8 data); + virtual u8 p3_data_r() override; + virtual void p3_data_w(u8 data) override; + virtual u8 p5_data_r(); + void p6_ddr_w(u8 data); + virtual u8 p6_data_r(); + virtual void p6_data_w(u8 data); + u8 p7_data_r(); + void p7_data_w(u8 data); + virtual u8 rcr_r() override; + virtual void rcr_w(u8 data) override; + + u8 tcsr2_r(); + void tcsr2_w(u8 data); + u8 ocr2h_r(); + void ocr2h_w(u8 data); + u8 ocr2l_r(); + void ocr2l_w(u8 data); void increment_t2cnt(int amount); - uint8_t t2cnt_r(); - void t2cnt_w(uint8_t data); - void tconr_w(uint8_t data); - uint8_t tcsr3_r(); - void tcsr3_w(uint8_t data); + u8 t2cnt_r(); + void t2cnt_w(u8 data); + void tconr_w(u8 data); + u8 tcsr3_r(); + void tcsr3_w(u8 data); virtual bool check_irq1_enabled() override; virtual void check_irq2() override; @@ -391,20 +391,20 @@ protected: virtual void increment_counter(int amount) override; virtual void check_timer_event() override; virtual void cleanup_counters() override; - virtual void set_rmcr(uint8_t data) override; + virtual void set_rmcr(u8 data) override; devcb_read8::array<2> m_in_portx_func; devcb_write8::array<3> m_out_portx_func; - uint8_t m_portx_ddr[2]; - uint8_t m_portx_data[3]; + u8 m_portx_ddr[2]; + u8 m_portx_data[3]; - uint8_t m_tcsr2; - uint8_t m_pending_tcsr2; + u8 m_tcsr2; + u8 m_pending_tcsr2; - uint8_t m_t2cnt; - uint8_t m_tconr; - uint8_t m_tcsr3; + u8 m_t2cnt; + u8 m_tconr; + u8 m_tcsr3; bool m_tout3; bool m_t2cnt_written; }; @@ -417,10 +417,10 @@ protected: class hd6301x0_cpu_device : public hd6301x_cpu_device { public: - hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); protected: - hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes); + hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes); virtual void device_reset() override; }; @@ -431,7 +431,7 @@ protected: class hd63701x0_cpu_device : public hd6301x0_cpu_device { public: - hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -442,14 +442,14 @@ public: class hd6303x_cpu_device : public hd6301x_cpu_device { public: - hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; class hd6301y_cpu_device : public hd6301x_cpu_device { protected: - hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes); + hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes); void hd6301y_io(address_map &map); void hd6303y_io(address_map &map); @@ -463,21 +463,21 @@ protected: // device_execute_interface overrides virtual void execute_set_input(int inputnum, int state) override; - void p1_ddr_1bit_w(uint8_t data); - void p5_ddr_w(uint8_t data); - virtual uint8_t p5_data_r() override; - void p5_data_w(uint8_t data); - virtual uint8_t p6_data_r() override; - virtual void p6_data_w(uint8_t data) override; - uint8_t p6_csr_r(); - void p6_csr_w(uint8_t data); - virtual uint8_t rcr_r() override; - virtual void rcr_w(uint8_t data) override; + void p1_ddr_1bit_w(u8 data); + void p5_ddr_w(u8 data); + virtual u8 p5_data_r() override; + void p5_data_w(u8 data); + virtual u8 p6_data_r() override; + virtual void p6_data_w(u8 data) override; + u8 p6_csr_r(); + void p6_csr_w(u8 data); + virtual u8 rcr_r() override; + virtual void rcr_w(u8 data) override; virtual void check_irq2() override; void clear_pending_isf(); - uint8_t m_p6csr; + u8 m_p6csr; }; @@ -489,7 +489,7 @@ protected: class hd6301y0_cpu_device : public hd6301y_cpu_device { public: - hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -498,7 +498,7 @@ public: class hd63701y0_cpu_device : public hd6301y_cpu_device { public: - hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; @@ -510,7 +510,7 @@ public: class hd6303y_cpu_device : public hd6301y_cpu_device { public: - hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); }; -- cgit v1.2.3