From 7c2b5676a73b4f2ce5581c40e4ccaad48f49537a Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 30 May 2020 20:05:28 +0200 Subject: driver starting with o: a very small bunch of macro removals (nw) --- src/mame/drivers/octopus.cpp | 66 +++++++++++++++++++++---------------------- src/mame/drivers/okean240.cpp | 12 ++++---- src/mame/drivers/olibochu.cpp | 16 +++++------ src/mame/drivers/olyboss.cpp | 62 ++++++++++++++++++++-------------------- src/mame/drivers/omegrace.cpp | 12 ++++---- src/mame/drivers/onetwo.cpp | 12 ++++---- src/mame/drivers/opwolf.cpp | 28 +++++++++--------- src/mame/drivers/osbexec.cpp | 20 ++++++------- src/mame/drivers/othello.cpp | 48 +++++++++++++++---------------- 9 files changed, 138 insertions(+), 138 deletions(-) diff --git a/src/mame/drivers/octopus.cpp b/src/mame/drivers/octopus.cpp index f1553ff6de0..05d2d414baf 100644 --- a/src/mame/drivers/octopus.cpp +++ b/src/mame/drivers/octopus.cpp @@ -177,34 +177,34 @@ private: virtual void machine_start() override; virtual void video_start() override; SCN2674_DRAW_CHARACTER_MEMBER(display_pixels); - DECLARE_READ8_MEMBER(vram_r); - DECLARE_WRITE8_MEMBER(vram_w); + uint8_t vram_r(offs_t offset); + void vram_w(offs_t offset, uint8_t data); uint8_t get_slave_ack(offs_t offset); DECLARE_WRITE_LINE_MEMBER(fdc_drq); - DECLARE_READ8_MEMBER(bank_sel_r); - DECLARE_WRITE8_MEMBER(bank_sel_w); + uint8_t bank_sel_r(offs_t offset); + void bank_sel_w(offs_t offset, uint8_t data); uint8_t dma_read(offs_t offset); void dma_write(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed); - DECLARE_READ8_MEMBER(system_r); - DECLARE_WRITE8_MEMBER(system_w); + uint8_t system_r(offs_t offset); + void system_w(offs_t offset, uint8_t data); uint8_t cntl_r(); void cntl_w(uint8_t data); uint8_t gpo_r(); void gpo_w(uint8_t data); - DECLARE_READ8_MEMBER(vidcontrol_r); - DECLARE_WRITE8_MEMBER(vidcontrol_w); - DECLARE_READ8_MEMBER(z80_io_r); - DECLARE_WRITE8_MEMBER(z80_io_w); + uint8_t vidcontrol_r(); + void vidcontrol_w(uint8_t data); + uint8_t z80_io_r(); + void z80_io_w(uint8_t data); IRQ_CALLBACK_MEMBER(x86_irq_cb); uint8_t rtc_r(); void rtc_w(uint8_t data); - DECLARE_READ8_MEMBER(z80_vector_r); - DECLARE_WRITE8_MEMBER(z80_vector_w); - DECLARE_READ8_MEMBER(parallel_r); - DECLARE_WRITE8_MEMBER(parallel_w); - DECLARE_READ8_MEMBER(video_latch_r); - DECLARE_WRITE8_MEMBER(video_latch_w); + uint8_t z80_vector_r(offs_t offset); + void z80_vector_w(offs_t offset, uint8_t data); + uint8_t parallel_r(offs_t offset); + void parallel_w(offs_t offset, uint8_t data); + uint8_t video_latch_r(offs_t offset); + void video_latch_w(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER(spk_w); DECLARE_WRITE_LINE_MEMBER(spk_freq_w); @@ -379,13 +379,13 @@ void octopus_state::device_timer(emu_timer &timer, device_timer_id id, int param } } -WRITE8_MEMBER(octopus_state::vram_w) +void octopus_state::vram_w(offs_t offset, uint8_t data) { m_vram[offset] = m_char_latch_w; m_vram[offset+0x1000] = m_attr_latch_w; } -READ8_MEMBER(octopus_state::vram_r) +uint8_t octopus_state::vram_r(offs_t offset) { m_char_latch_r = m_vram[offset]; m_attr_latch_r = m_vram[offset+0x1000]; @@ -397,7 +397,7 @@ WRITE_LINE_MEMBER(octopus_state::fdc_drq) // TODO } -READ8_MEMBER(octopus_state::bank_sel_r) +uint8_t octopus_state::bank_sel_r(offs_t offset) { switch(offset) { @@ -411,7 +411,7 @@ READ8_MEMBER(octopus_state::bank_sel_r) return 0xff; } -WRITE8_MEMBER(octopus_state::bank_sel_w) +void octopus_state::bank_sel_w(offs_t offset, uint8_t data) { switch(offset) { @@ -437,7 +437,7 @@ WRITE8_MEMBER(octopus_state::bank_sel_w) // write: parity fail reset // ports 0x20 and 0x21 read out the DIP switch configuration (the firmware function to get system config simply does IN AX,20h) // 0x28: write: Z80 enable -WRITE8_MEMBER(octopus_state::system_w) +void octopus_state::system_w(offs_t offset, uint8_t data) { logerror("SYS: System control offset %i data %02x\n",offset+1,data); switch(offset) @@ -450,7 +450,7 @@ WRITE8_MEMBER(octopus_state::system_w) } } -READ8_MEMBER(octopus_state::system_r) +uint8_t octopus_state::system_r(offs_t offset) { uint8_t val = 0x00; switch(offset) @@ -466,13 +466,13 @@ READ8_MEMBER(octopus_state::system_r) } // Any I/O cycle relinquishes control of the bus -READ8_MEMBER(octopus_state::z80_io_r) +uint8_t octopus_state::z80_io_r() { - z80_io_w(space,offset,0); + z80_io_w(0); return 0x00; } -WRITE8_MEMBER(octopus_state::z80_io_w) +void octopus_state::z80_io_w(uint8_t data) { m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); @@ -480,7 +480,7 @@ WRITE8_MEMBER(octopus_state::z80_io_w) } // Z80 vector for RS232 and RS422 -READ8_MEMBER(octopus_state::z80_vector_r) +uint8_t octopus_state::z80_vector_r(offs_t offset) { switch(offset) { @@ -494,7 +494,7 @@ READ8_MEMBER(octopus_state::z80_vector_r) return 0xff; } -WRITE8_MEMBER(octopus_state::z80_vector_w) +void octopus_state::z80_vector_w(offs_t offset, uint8_t data) { switch(offset) { @@ -612,12 +612,12 @@ void octopus_state::gpo_w(uint8_t data) // bit 6 - cursor mode (colour only) - 0=inverse cursor, 1=white cursor (normal) // bit 7 - 1=monochrome mode, 0=colour mode // Is bit 7 writable, or just mirrors DIP switch setting? Tech manual is unclear. -READ8_MEMBER(octopus_state::vidcontrol_r) +uint8_t octopus_state::vidcontrol_r() { return m_vidctrl; } -WRITE8_MEMBER(octopus_state::vidcontrol_w) +void octopus_state::vidcontrol_w(uint8_t data) { m_fdc->dden_w(BIT(data, 2)); m_fdc->set_unscaled_clock(16_MHz_XTAL / (BIT(data, 3) ? 16 : 8)); @@ -676,7 +676,7 @@ WRITE_LINE_MEMBER(octopus_state::serial_clock_w) // 0xf1 : control // bit 2 = INIT? On boot, bits 0 and 1 are set high, bit 2 is set low then high again, all other bits are set low // can generate interrupts - tech manual suggests that Strobe, Init, Ack, and Busy can trigger an interrupt (IRQ14) -READ8_MEMBER(octopus_state::parallel_r) +uint8_t octopus_state::parallel_r(offs_t offset) { switch(offset) { @@ -688,7 +688,7 @@ READ8_MEMBER(octopus_state::parallel_r) return 0xff; } -WRITE8_MEMBER(octopus_state::parallel_w) +void octopus_state::parallel_w(offs_t offset, uint8_t data) { switch(offset) { @@ -782,7 +782,7 @@ void octopus_state::video_start() m_vram.allocate(0x10000); } -READ8_MEMBER(octopus_state::video_latch_r) +uint8_t octopus_state::video_latch_r(offs_t offset) { if(offset & 0x01) return m_attr_latch_r; @@ -790,7 +790,7 @@ READ8_MEMBER(octopus_state::video_latch_r) return m_char_latch_r; } -WRITE8_MEMBER(octopus_state::video_latch_w) +void octopus_state::video_latch_w(offs_t offset, uint8_t data) { if(offset & 0x01) m_attr_latch_w = data; diff --git a/src/mame/drivers/okean240.cpp b/src/mame/drivers/okean240.cpp index 5a2f8c05b45..c71ef2696c7 100644 --- a/src/mame/drivers/okean240.cpp +++ b/src/mame/drivers/okean240.cpp @@ -88,9 +88,9 @@ private: TIMER_OKEAN_BOOT }; - DECLARE_READ8_MEMBER(okean240_kbd_status_r); - DECLARE_READ8_MEMBER(okean240a_kbd_status_r); - DECLARE_READ8_MEMBER(term_status_r); + uint8_t okean240_kbd_status_r(); + uint8_t okean240a_kbd_status_r(); + uint8_t term_status_r(); uint8_t term_r(); uint8_t okean240_port40_r(); uint8_t okean240_port41_r(); @@ -123,7 +123,7 @@ private: }; // okean240 requires bit 4 to change -READ8_MEMBER(okean240_state::okean240_kbd_status_r) +uint8_t okean240_state::okean240_kbd_status_r() { m_tog ^= 0x18; if (m_term_data) @@ -133,7 +133,7 @@ READ8_MEMBER(okean240_state::okean240_kbd_status_r) } // see if a key is pressed and indicate status -READ8_MEMBER(okean240_state::okean240a_kbd_status_r) +uint8_t okean240_state::okean240a_kbd_status_r() { uint8_t i,j; m_tog ^= 0x18; @@ -149,7 +149,7 @@ READ8_MEMBER(okean240_state::okean240a_kbd_status_r) } // for test rom -READ8_MEMBER(okean240_state::term_status_r) +uint8_t okean240_state::term_status_r() { return (m_term_data) ? 3 : 1; } diff --git a/src/mame/drivers/olibochu.cpp b/src/mame/drivers/olibochu.cpp index 306f93ad202..dbcb0ab94ba 100644 --- a/src/mame/drivers/olibochu.cpp +++ b/src/mame/drivers/olibochu.cpp @@ -103,10 +103,10 @@ private: /* misc */ uint16_t m_cmd; - DECLARE_WRITE8_MEMBER(olibochu_videoram_w); - DECLARE_WRITE8_MEMBER(olibochu_colorram_w); - DECLARE_WRITE8_MEMBER(olibochu_flipscreen_w); - DECLARE_WRITE8_MEMBER(sound_command_w); + void olibochu_videoram_w(offs_t offset, uint8_t data); + void olibochu_colorram_w(offs_t offset, uint8_t data); + void olibochu_flipscreen_w(uint8_t data); + void sound_command_w(offs_t offset, uint8_t data); TILE_GET_INFO_MEMBER(get_bg_tile_info); void olibochu_palette(palette_device &palette) const; uint32_t screen_update_olibochu(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -149,19 +149,19 @@ void olibochu_state::olibochu_palette(palette_device &palette) const } } -WRITE8_MEMBER(olibochu_state::olibochu_videoram_w) +void olibochu_state::olibochu_videoram_w(offs_t offset, uint8_t data) { m_videoram[offset] = data; m_bg_tilemap->mark_tile_dirty(offset); } -WRITE8_MEMBER(olibochu_state::olibochu_colorram_w) +void olibochu_state::olibochu_colorram_w(offs_t offset, uint8_t data) { m_colorram[offset] = data; m_bg_tilemap->mark_tile_dirty(offset); } -WRITE8_MEMBER(olibochu_state::olibochu_flipscreen_w) +void olibochu_state::olibochu_flipscreen_w(uint8_t data) { if (flip_screen() != (data & 0x80)) { @@ -250,7 +250,7 @@ uint32_t olibochu_state::screen_update_olibochu(screen_device &screen, bitmap_in } -WRITE8_MEMBER(olibochu_state::sound_command_w) +void olibochu_state::sound_command_w(offs_t offset, uint8_t data) { if (offset == 0) m_cmd = (m_cmd & 0x00ff) | (uint16_t(data) << 8); diff --git a/src/mame/drivers/olyboss.cpp b/src/mame/drivers/olyboss.cpp index 6bb254bad2b..82bc5696955 100644 --- a/src/mame/drivers/olyboss.cpp +++ b/src/mame/drivers/olyboss.cpp @@ -87,27 +87,27 @@ protected: virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; private: - uint8_t keyboard_read(); + u8 keyboard_read(); UPD3301_DRAW_CHARACTER_MEMBER( olyboss_display_pixels ); DECLARE_WRITE_LINE_MEMBER( hrq_w ); DECLARE_WRITE_LINE_MEMBER( tc_w ); DECLARE_WRITE_LINE_MEMBER( romdis_w ); - uint8_t dma_mem_r(offs_t offset); - void dma_mem_w(offs_t offset, uint8_t data); - DECLARE_READ8_MEMBER( fdcctrl_r ); - DECLARE_WRITE8_MEMBER( fdcctrl_w ); - DECLARE_WRITE8_MEMBER( fdcctrl85_w ); - uint8_t fdcdma_r(); - void fdcdma_w(uint8_t data); - void crtcdma_w(uint8_t data); - DECLARE_READ8_MEMBER( rom_r ); - DECLARE_WRITE8_MEMBER( rom_w ); - DECLARE_WRITE8_MEMBER( vchrmap_w ); - DECLARE_WRITE8_MEMBER( vchrram_w ); - DECLARE_WRITE8_MEMBER( vchrram85_w ); - void ppic_w(uint8_t data); + u8 dma_mem_r(offs_t offset); + void dma_mem_w(offs_t offset, u8 data); + u8 fdcctrl_r(); + void fdcctrl_w(u8 data); + void fdcctrl85_w(u8 data); + u8 fdcdma_r(); + void fdcdma_w(u8 data); + void crtcdma_w(u8 data); + u8 rom_r(offs_t offset); + void rom_w(offs_t offset, u8 data); + void vchrmap_w(offs_t offset, u8 data); + void vchrram_w(offs_t offset, u8 data); + void vchrram85_w(offs_t offset, u8 data); + void ppic_w(u8 data); void olyboss_io(address_map &map); void olyboss_mem(address_map &map); void olyboss85_io(address_map &map); @@ -202,17 +202,17 @@ static INPUT_PORTS_START( olyboss ) PORT_START("DSW") INPUT_PORTS_END -READ8_MEMBER( olyboss_state::rom_r ) +u8 olyboss_state::rom_r(offs_t offset) { return m_romen ? m_rom->as_u8(offset) : m_lowram[offset]; } -WRITE8_MEMBER( olyboss_state::rom_w ) +void olyboss_state::rom_w(offs_t offset, u8 data) { m_lowram[offset] = data; } -WRITE8_MEMBER( olyboss_state::vchrram85_w ) +void olyboss_state::vchrram85_w(offs_t offset, u8 data) { switch(offset) { @@ -228,7 +228,7 @@ WRITE8_MEMBER( olyboss_state::vchrram85_w ) } } -WRITE8_MEMBER( olyboss_state::vchrmap_w ) +void olyboss_state::vchrmap_w(offs_t offset, u8 data) { switch(offset) { @@ -241,7 +241,7 @@ WRITE8_MEMBER( olyboss_state::vchrmap_w ) } } -WRITE8_MEMBER( olyboss_state::vchrram_w ) +void olyboss_state::vchrram_w(offs_t offset, u8 data) { m_vchrram[(m_vchrpage << 4) + (offset ^ 0xf)] = data; } @@ -257,7 +257,7 @@ WRITE_LINE_MEMBER( olyboss_state::romdis_w ) UPD3301_DRAW_CHARACTER_MEMBER( olyboss_state::olyboss_display_pixels ) { - uint8_t data = cc & 0x7f; + u8 data = cc & 0x7f; if(cc & 0x80) data = m_vchrram[(data << 4) | lc]; else @@ -282,7 +282,7 @@ UPD3301_DRAW_CHARACTER_MEMBER( olyboss_state::olyboss_display_pixels ) // KEYBOARD //************************************************************************** -uint8_t olyboss_state::keyboard_read() +u8 olyboss_state::keyboard_read() { //logerror ("keyboard_read offs [%d]\n",offset); if (m_keybhit) @@ -295,7 +295,7 @@ uint8_t olyboss_state::keyboard_read() return 0x00; } -void olyboss_state::ppic_w(uint8_t data) +void olyboss_state::ppic_w(u8 data) { m_uic->ireq4_w(BIT(data, 5) ? CLEAR_LINE : ASSERT_LINE); m_fdcctrl = (m_fdcctrl & ~0x10) | (BIT(data, 5) ? 0x10 : 0); @@ -351,42 +351,42 @@ WRITE_LINE_MEMBER( olyboss_state::tc_w ) } } -uint8_t olyboss_state::dma_mem_r(offs_t offset) +u8 olyboss_state::dma_mem_r(offs_t offset) { address_space &program = m_maincpu->space(AS_PROGRAM); return program.read_byte(offset); } -void olyboss_state::dma_mem_w(offs_t offset, uint8_t data) +void olyboss_state::dma_mem_w(offs_t offset, u8 data) { address_space &program = m_maincpu->space(AS_PROGRAM); program.write_byte(offset, data); } -uint8_t olyboss_state::fdcdma_r() +u8 olyboss_state::fdcdma_r() { m_channel = 0; return m_fdc->dma_r(); } -void olyboss_state::fdcdma_w(uint8_t data) +void olyboss_state::fdcdma_w(u8 data) { m_channel = 0; m_fdc->dma_w(data); } -void olyboss_state::crtcdma_w(uint8_t data) +void olyboss_state::crtcdma_w(u8 data) { m_channel = 2; m_crtc->dack_w(data); } -READ8_MEMBER( olyboss_state::fdcctrl_r ) +u8 olyboss_state::fdcctrl_r() { return m_fdcctrl | m_fdctype; // 0xc0 seems to indicate an 8" drive, 0x80 a 5.25" dd drive, 0xa0 a 5.25" qd drive } -WRITE8_MEMBER( olyboss_state::fdcctrl_w ) +void olyboss_state::fdcctrl_w(u8 data) { m_fdcctrl = data; m_romen = (m_fdcctrl & 1) ? false : true; @@ -395,7 +395,7 @@ WRITE8_MEMBER( olyboss_state::fdcctrl_w ) m_fdd1->get_device()->mon_w(!(data & 4)); } -WRITE8_MEMBER( olyboss_state::fdcctrl85_w ) +void olyboss_state::fdcctrl85_w(u8 data) { m_fdcctrl = data; m_fdd0->get_device()->mon_w(!(data & 0x40)); diff --git a/src/mame/drivers/omegrace.cpp b/src/mame/drivers/omegrace.cpp index 2872bd50d16..f321f74781e 100644 --- a/src/mame/drivers/omegrace.cpp +++ b/src/mame/drivers/omegrace.cpp @@ -247,9 +247,9 @@ public: private: TIMER_CALLBACK_MEMBER(periodic_int); - DECLARE_READ8_MEMBER(omegrace_vg_go_r); - DECLARE_READ8_MEMBER(omegrace_spinner1_r); - DECLARE_WRITE8_MEMBER(omegrace_leds_w); + uint8_t omegrace_vg_go_r(); + uint8_t omegrace_spinner1_r(); + void omegrace_leds_w(uint8_t data); void main_map(address_map &map); void port_map(address_map &map); void sound_map(address_map &map); @@ -303,7 +303,7 @@ TIMER_CALLBACK_MEMBER(omegrace_state::periodic_int) * *************************************/ -READ8_MEMBER(omegrace_state::omegrace_vg_go_r) +uint8_t omegrace_state::omegrace_vg_go_r() { if (!machine().side_effects_disabled()) m_dvg->go_w(); @@ -342,7 +342,7 @@ static const uint8_t spinnerTable[64] = }; -READ8_MEMBER(omegrace_state::omegrace_spinner1_r) +uint8_t omegrace_state::omegrace_spinner1_r() { return (spinnerTable[ioport("SPIN0")->read() & 0x3f]); } @@ -355,7 +355,7 @@ READ8_MEMBER(omegrace_state::omegrace_spinner1_r) * *************************************/ -WRITE8_MEMBER(omegrace_state::omegrace_leds_w) +void omegrace_state::omegrace_leds_w(uint8_t data) { /* bits 0 and 1 are coin counters */ machine().bookkeeping().coin_counter_w(0,data & 0x01); diff --git a/src/mame/drivers/onetwo.cpp b/src/mame/drivers/onetwo.cpp index 40f4b87e5ac..777448e47a4 100644 --- a/src/mame/drivers/onetwo.cpp +++ b/src/mame/drivers/onetwo.cpp @@ -89,9 +89,9 @@ private: required_device m_palette; required_device m_soundlatch; - DECLARE_WRITE8_MEMBER(fgram_w); - DECLARE_WRITE8_MEMBER(cpubank_w); - DECLARE_WRITE8_MEMBER(coin_counters_w); + void fgram_w(offs_t offset, uint8_t data); + void cpubank_w(uint8_t data); + void coin_counters_w(uint8_t data); TILE_GET_INFO_MEMBER(get_fg_tile_info); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); static rgb_t BBBGGGGGxBBRRRRR(uint32_t raw); @@ -136,18 +136,18 @@ uint32_t onetwo_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap * *************************************/ -WRITE8_MEMBER(onetwo_state::fgram_w) +void onetwo_state::fgram_w(offs_t offset, uint8_t data) { m_fgram[offset] = data; m_fg_tilemap->mark_tile_dirty(offset / 2); } -WRITE8_MEMBER(onetwo_state::cpubank_w) +void onetwo_state::cpubank_w(uint8_t data) { m_mainbank->set_entry(data); } -WRITE8_MEMBER(onetwo_state::coin_counters_w) +void onetwo_state::coin_counters_w(uint8_t data) { m_watchdog->watchdog_reset(); machine().bookkeeping().coin_counter_w(0, BIT(data, 1)); diff --git a/src/mame/drivers/opwolf.cpp b/src/mame/drivers/opwolf.cpp index c43aecb904f..100e876394e 100644 --- a/src/mame/drivers/opwolf.cpp +++ b/src/mame/drivers/opwolf.cpp @@ -328,14 +328,14 @@ protected: virtual void machine_start() override; private: - DECLARE_READ16_MEMBER(cchip_r); - DECLARE_WRITE16_MEMBER(cchip_w); - DECLARE_WRITE8_MEMBER(opwolf_adpcm_d_w); - DECLARE_WRITE8_MEMBER(opwolf_adpcm_e_w); - DECLARE_WRITE16_MEMBER(opwolf_spritectrl_w); + uint16_t cchip_r(offs_t offset); + void cchip_w(offs_t offset, uint16_t data); + void opwolf_adpcm_d_w(uint8_t data); + void opwolf_adpcm_e_w(uint8_t data); + void opwolf_spritectrl_w(offs_t offset, uint16_t data); void sound_bankswitch_w(uint8_t data); - DECLARE_WRITE8_MEMBER(opwolf_adpcm_b_w); - DECLARE_WRITE8_MEMBER(opwolf_adpcm_c_w); + void opwolf_adpcm_b_w(offs_t offset, uint8_t data); + void opwolf_adpcm_c_w(offs_t offset, uint8_t data); void counters_w(uint8_t data); INTERRUPT_GEN_MEMBER(interrupt); @@ -637,7 +637,7 @@ CUSTOM_INPUT_MEMBER(opwolf_state::opwolf_gun_y_r ) // VIDEO //************************************************************************** -WRITE16_MEMBER(opwolf_state::opwolf_spritectrl_w) +void opwolf_state::opwolf_spritectrl_w(offs_t offset, uint16_t data) { // popmessage("opwolf_spritectrl_w ctrl = %4x", data); if (offset == 0) @@ -743,7 +743,7 @@ WRITE_LINE_MEMBER(opwolf_state::msm5205_vck_w) } } -WRITE8_MEMBER(opwolf_state::opwolf_adpcm_b_w) +void opwolf_state::opwolf_adpcm_b_w(offs_t offset, uint8_t data) { int start; int end; @@ -766,7 +766,7 @@ WRITE8_MEMBER(opwolf_state::opwolf_adpcm_b_w) // logerror("CPU #1 b00%i-data=%2x pc=%4x\n",offset,data,m_audiocpu->pc() ); } -WRITE8_MEMBER(opwolf_state::opwolf_adpcm_c_w) +void opwolf_state::opwolf_adpcm_c_w(offs_t offset, uint8_t data) { int start; int end; @@ -789,14 +789,14 @@ WRITE8_MEMBER(opwolf_state::opwolf_adpcm_c_w) // logerror("CPU #1 c00%i-data=%2x pc=%4x\n",offset,data,m_audiocpu->pc() ); } -WRITE8_MEMBER(opwolf_state::opwolf_adpcm_d_w) +void opwolf_state::opwolf_adpcm_d_w(uint8_t data) { // total volume (speaker 1) for (int i = 0; i <= 2; i++) m_lspeaker->set_input_gain(i, data / 255.0); } -WRITE8_MEMBER(opwolf_state::opwolf_adpcm_e_w) +void opwolf_state::opwolf_adpcm_e_w(uint8_t data) { // total volume (speaker 2) for (int i = 0; i <= 2; i++) @@ -862,12 +862,12 @@ MACHINE_RESET_MEMBER(opwolf_state,opwolf) m_msm[1]->reset_w(1); } -READ16_MEMBER(opwolf_state::cchip_r) +uint16_t opwolf_state::cchip_r(offs_t offset) { return m_cchip_ram[offset]; } -WRITE16_MEMBER(opwolf_state::cchip_w) +void opwolf_state::cchip_w(offs_t offset, uint16_t data) { m_cchip_ram[offset] = data &0xff; } diff --git a/src/mame/drivers/osbexec.cpp b/src/mame/drivers/osbexec.cpp index 1512e0e1fd2..754e838651e 100644 --- a/src/mame/drivers/osbexec.cpp +++ b/src/mame/drivers/osbexec.cpp @@ -112,11 +112,11 @@ private: m_ram_c000 = m_vram.get(); } - DECLARE_WRITE8_MEMBER(osbexec_0000_w); - DECLARE_READ8_MEMBER(osbexec_c000_r); - DECLARE_WRITE8_MEMBER(osbexec_c000_w); - DECLARE_READ8_MEMBER(osbexec_kbd_r); - DECLARE_READ8_MEMBER(osbexec_rtc_r); + void osbexec_0000_w(offs_t offset, uint8_t data); + uint8_t osbexec_c000_r(offs_t offset); + void osbexec_c000_w(offs_t offset, uint8_t data); + uint8_t osbexec_kbd_r(offs_t offset); + uint8_t osbexec_rtc_r(); virtual void machine_reset() override; TIMER_CALLBACK_MEMBER(osbexec_video_callback); uint8_t osbexec_pia0_a_r(); @@ -135,7 +135,7 @@ private: }; -WRITE8_MEMBER(osbexec_state::osbexec_0000_w) +void osbexec_state::osbexec_0000_w(offs_t offset, uint8_t data) { /* Font RAM writing is enabled when ROM bank is enabled */ if ( m_pia0_porta & 0x80 ) @@ -150,7 +150,7 @@ WRITE8_MEMBER(osbexec_state::osbexec_0000_w) } -READ8_MEMBER(osbexec_state::osbexec_c000_r) +uint8_t osbexec_state::osbexec_c000_r(offs_t offset) { uint8_t data = m_ram_c000[offset]; @@ -163,7 +163,7 @@ READ8_MEMBER(osbexec_state::osbexec_c000_r) } -WRITE8_MEMBER(osbexec_state::osbexec_c000_w) +void osbexec_state::osbexec_c000_w(offs_t offset, uint8_t data) { m_ram_c000[offset] = data; @@ -174,7 +174,7 @@ WRITE8_MEMBER(osbexec_state::osbexec_c000_w) } -READ8_MEMBER(osbexec_state::osbexec_kbd_r) +uint8_t osbexec_state::osbexec_kbd_r(offs_t offset) { uint8_t data = 0xFF; @@ -186,7 +186,7 @@ READ8_MEMBER(osbexec_state::osbexec_kbd_r) } -READ8_MEMBER(osbexec_state::osbexec_rtc_r) +uint8_t osbexec_state::osbexec_rtc_r() { // 74LS244 buffer @ UF13 return m_rtc->count(); diff --git a/src/mame/drivers/othello.cpp b/src/mame/drivers/othello.cpp index 50287387f8e..b43707ae0c3 100644 --- a/src/mame/drivers/othello.cpp +++ b/src/mame/drivers/othello.cpp @@ -102,18 +102,18 @@ private: required_region_ptr m_n7751_data; - DECLARE_READ8_MEMBER(unk_87_r); - DECLARE_WRITE8_MEMBER(unk_8a_w); - DECLARE_WRITE8_MEMBER(unk_8c_w); - DECLARE_READ8_MEMBER(unk_8c_r); - DECLARE_READ8_MEMBER(sound_ack_r); - DECLARE_WRITE8_MEMBER(unk_8f_w); - DECLARE_WRITE8_MEMBER(tilebank_w); - DECLARE_READ8_MEMBER(latch_r); - DECLARE_WRITE8_MEMBER(ay_select_w); - DECLARE_WRITE8_MEMBER(ack_w); - DECLARE_WRITE8_MEMBER(ay_address_w); - DECLARE_WRITE8_MEMBER(ay_data_w); + uint8_t unk_87_r(); + void unk_8a_w(uint8_t data); + void unk_8c_w(uint8_t data); + uint8_t unk_8c_r(); + uint8_t sound_ack_r(); + void unk_8f_w(uint8_t data); + void tilebank_w(uint8_t data); + uint8_t latch_r(); + void ay_select_w(uint8_t data); + void ack_w(uint8_t data); + void ay_address_w(uint8_t data); + void ay_data_w(uint8_t data); uint8_t n7751_rom_r(); uint8_t n7751_command_r(); void n7751_p2_w(uint8_t data); @@ -172,13 +172,13 @@ void othello_state::main_map(address_map &map) map(0xf000, 0xffff).ram(); } -READ8_MEMBER(othello_state::unk_87_r) +uint8_t othello_state::unk_87_r() { /* n7751_status_r ? bit 7 = ack/status from device connected to port 8a? */ return machine().rand(); } -WRITE8_MEMBER(othello_state::unk_8a_w) +void othello_state::unk_8a_w(uint8_t data) { /* m_n7751_command = (data & 0x07); @@ -190,27 +190,27 @@ WRITE8_MEMBER(othello_state::unk_8a_w) logerror("8a -> %x\n", data); } -WRITE8_MEMBER(othello_state::unk_8c_w) +void othello_state::unk_8c_w(uint8_t data) { logerror("8c -> %x\n", data); } -READ8_MEMBER(othello_state::unk_8c_r) +uint8_t othello_state::unk_8c_r() { return machine().rand(); } -READ8_MEMBER(othello_state::sound_ack_r) +uint8_t othello_state::sound_ack_r() { return m_ack_data; } -WRITE8_MEMBER(othello_state::unk_8f_w) +void othello_state::unk_8f_w(uint8_t data) { logerror("8f -> %x\n", data); } -WRITE8_MEMBER(othello_state::tilebank_w) +void othello_state::tilebank_w(uint8_t data) { m_tile_bank = (data == 0x0f) ? 0x100 : 0x00; logerror("tilebank -> %x\n", data); @@ -232,30 +232,30 @@ void othello_state::main_portmap(address_map &map) map(0x8f, 0x8f).w(FUNC(othello_state::unk_8f_w)); } -READ8_MEMBER(othello_state::latch_r) +uint8_t othello_state::latch_r() { int retval = m_soundlatch->read(); m_soundlatch->clear_w(); return retval; } -WRITE8_MEMBER(othello_state::ay_select_w) +void othello_state::ay_select_w(uint8_t data) { m_ay_select = data; } -WRITE8_MEMBER(othello_state::ack_w) +void othello_state::ack_w(uint8_t data) { m_ack_data = data; } -WRITE8_MEMBER(othello_state::ay_address_w) +void othello_state::ay_address_w(uint8_t data) { if (m_ay_select & 1) m_ay[0]->address_w(data); if (m_ay_select & 2) m_ay[1]->address_w(data); } -WRITE8_MEMBER(othello_state::ay_data_w) +void othello_state::ay_data_w(uint8_t data) { if (m_ay_select & 1) m_ay[0]->data_w(data); if (m_ay_select & 2) m_ay[1]->data_w(data); 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