From 759ea6d42ce4175c1a0eca98b74cf5590e11bca8 Mon Sep 17 00:00:00 2001 From: AJR Date: Mon, 21 Oct 2024 17:07:02 -0400 Subject: z180asci: Fix calculation of framing and parity errors --- src/devices/cpu/z180/z180asci.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/devices/cpu/z180/z180asci.cpp b/src/devices/cpu/z180/z180asci.cpp index d7ce1ce9ba1..298afe55932 100644 --- a/src/devices/cpu/z180/z180asci.cpp +++ b/src/devices/cpu/z180/z180asci.cpp @@ -463,31 +463,31 @@ void z180asci_channel_base::transmit_edge() void z180asci_channel_base::update_received() { uint8_t rx_error = 0; - int stop_bits = (m_asci_cntla & Z180_CNTLA_MODE_STOPB) ? 2 : 1; + int data_bits = (m_asci_cntla & Z180_CNTLA_MODE_DATA) ? 8 : 7; if (m_rsr == 0) // Break detect { m_asci_ext |= Z180_ASEXT_BRK_DET; } - uint8_t stop_val = (m_asci_cntla & Z180_CNTLA_MODE_STOPB) ? 3: 1; - if ((m_rsr & stop_val) != stop_val) + if (m_rxa == 0) rx_error |= Z180_STAT_FE; if (m_asci_cntlb & Z180_CNTLB_MP) { - m_asci_cntla |= ((m_rsr >> stop_bits) & 1) ? Z180_CNTLA_MPBR_EFR : 0; + m_asci_cntla |= ((m_rsr >> data_bits) & 1) ? Z180_CNTLA_MPBR_EFR : 0; } else if (m_asci_cntla & Z180_CNTLA_MODE_PARITY) { uint8_t parity = 0; - for (int i = 0; i < ((m_asci_cntla & Z180_CNTLA_MODE_DATA) ? 8 : 7); i++) + for (int i = 0; i < data_bits; i++) parity ^= BIT(m_rsr, i); if (m_asci_cntlb & Z180_CNTLB_PEO) parity ^= 1; // odd parity - if (((m_rsr >> stop_bits) & 1) != parity) + if (((m_rsr >> data_bits) & 1) != parity) rx_error |= Z180_STAT_PE; } // Skip only if MPE mode active and MPB is 0 if (!((m_asci_cntla & Z180_CNTLA_MPE) && ((m_asci_cntla & Z180_CNTLA_MPBR_EFR) == 0))) { + LOG("%s: %X received%s%s\n", machine().time().to_string(), m_rsr, (rx_error & Z180_STAT_FE) ? " (framing error)" : "", (rx_error & Z180_STAT_PE) ? " (bad parity)" : ""); set_fifo_data(m_rsr, rx_error); } } -- cgit v1.2.3