From 71cbf4a4c6f9f5e2e494a6a5e648f978af549fff Mon Sep 17 00:00:00 2001 From: wilbertpol Date: Sat, 21 Jan 2023 16:04:01 +0000 Subject: nakajima/nakajies.cpp: Modernised code and added a BIOS option for drwrt400. (#10845) Use memory views to select between ROM/RAM banks, use object finder arrays. Added v3.1 BIOS for drwrt400. [AbortRetryFail] --- src/mame/nakajima/nakajies.cpp | 544 ++++++++++++++++++++++------------------- 1 file changed, 286 insertions(+), 258 deletions(-) diff --git a/src/mame/nakajima/nakajies.cpp b/src/mame/nakajima/nakajies.cpp index 99303a46664..5cc2c6d3f11 100644 --- a/src/mame/nakajima/nakajies.cpp +++ b/src/mame/nakajima/nakajies.cpp @@ -71,7 +71,8 @@ Hardware: - LCD Screen displays 8 lines by 80 characters raised and tilted 30 degrees - Contrast Dial and feet adjust to user preference -- Parallel and Serial ports( IR Upgrade Optional) for connectivity to printers, Macintosh and Windows PC's +- Parallel and Serial ports (IR Upgrade Optional) for connectivity to printers, Macintosh and Windows PC's +- PCMCIA Slot - Full size 64 key keyboard with color coded keys and quick reference menu bar - NiCad rechargeable batteries for up to 8 hours of continuous use prior to recharging - AC adapter for recharging batteries is lightweight and compact design @@ -219,7 +220,7 @@ On boot: 50 = 98, 51 = 06, 52 = 7f b0 - 1 = clear interrupt source for irq vector 0xff 00A0 - unknown - Read during initial boot sequence, expects to have bit 3 set at least once durnig the boot sequence + Read during initial boot sequence, expects to have bit 3 set at least once during the boot sequence 00D0 - 00DC - Keyboard?? @@ -268,6 +269,10 @@ IRQ 0xFF: This does some simple processing and then enters an endless loop (with interrupts disabled). Perhaps power on/off related?? +TODO: +- On boot, systems do not display version and copyright messages. +- Add PCMCIA slot + ******************************************************************************/ #include "emu.h" @@ -285,6 +290,7 @@ disabled). Perhaps power on/off related?? namespace { #define LOG 0 +#define X301 19660000 class nakajies_state : public driver_device @@ -293,11 +299,26 @@ public: nakajies_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "v20hl") + , m_rtc(*this, "rtc") + , m_view0(*this, "view0") + , m_view1(*this, "view1") + , m_view2(*this, "view2") + , m_view3(*this, "view3") + , m_view4(*this, "view4") + , m_view5(*this, "view5") + , m_view6(*this, "view6") + , m_view7(*this, "view7") + , m_port_row(*this, "ROW%u", 0U) + , m_port_debug(*this, "debug") + , m_rombank(*this, "rombank%u", 0U) + , m_rambank(*this, "rambank%u", 0U) + , m_rom_region(*this, "bios") { } void nakajies210(machine_config &config); void nakajies220(machine_config &config); + void nakajies220_256(machine_config &config); void nakajies250(machine_config &config); void dator3k(machine_config &config); @@ -311,16 +332,14 @@ private: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void nakajies_update_irqs(); - uint8_t irq_clear_r(); - void irq_clear_w(uint8_t data); - uint8_t irq_enable_r(); - void irq_enable_w(uint8_t data); - uint8_t unk_a0_r(); - void lcd_memory_start_w(uint8_t data); - uint8_t keyboard_r(); - void banking_w(offs_t offset, uint8_t data); - void update_banks(); - template void bank_w(offs_t offset, uint8_t data); + u8 irq_clear_r(); + void irq_clear_w(u8 data); + u8 irq_enable_r(); + void irq_enable_w(u8 data); + u8 unk_a0_r(); + void lcd_memory_start_w(u8 data); + u8 keyboard_r(); + void banking_w(offs_t offset, u8 data); void nakajies_palette(palette_device &palette) const; TIMER_DEVICE_CALLBACK_MEMBER(kb_timer); @@ -328,134 +347,107 @@ private: void nakajies_map(address_map &map); required_device m_maincpu; - - /* IRQ handling */ - uint8_t m_irq_enabled = 0; - uint8_t m_irq_active = 0; - - uint8_t m_lcd_memory_start = 0; - - uint8_t m_matrix = 0; - - /* ROM */ - uint8_t *m_rom_base = nullptr; - uint32_t m_rom_size = 0; - - /* RAM */ - std::unique_ptr m_ram_base; - uint32_t m_ram_size = 0; - - /* Banking */ - uint8_t m_bank[8]{}; - uint8_t *m_bank_base[8]{}; + required_device m_rtc; + memory_view m_view0; + memory_view m_view1; + memory_view m_view2; + memory_view m_view3; + memory_view m_view4; + memory_view m_view5; + memory_view m_view6; + memory_view m_view7; + required_ioport_array<10> m_port_row; + required_ioport m_port_debug; + memory_bank_array_creator<8> m_rombank; + memory_bank_array_creator<8> m_rambank; + required_memory_region m_rom_region; + + u8 m_irq_enabled = 0; + u8 m_irq_active = 0; + u8 m_lcd_memory_start = 0; + u8 m_matrix = 0; + std::unique_ptr m_ram_base; + u32 m_ram_size = 0; }; -#define X301 19660000 - - -void nakajies_state::update_banks() -{ - for( int i = 0; i < 8; i++ ) - { - if ( m_bank[i] & 0x10 ) - { - /* RAM banking */ - /* Not entirely sure if bank 0x1f refers to first or second ram bank ... */ - m_bank_base[i] = &m_ram_base[(((m_bank[i] & 0x0f) ^ 0xf) << 17) % m_ram_size]; - } - else - { - /* ROM banking */ - /* 0 is last bank, 1 bank before last, etc */ - m_bank_base[i] = &m_rom_base[(((m_bank[i] & 0x0f) ^ 0xf) << 17) % m_rom_size]; - } - } - membank( "bank0" )->set_base(m_bank_base[0]); - membank( "bank1" )->set_base(m_bank_base[1]); - membank( "bank2" )->set_base(m_bank_base[2]); - membank( "bank3" )->set_base(m_bank_base[3]); - membank( "bank4" )->set_base(m_bank_base[4]); - membank( "bank5" )->set_base(m_bank_base[5]); - membank( "bank6" )->set_base(m_bank_base[6]); - membank( "bank7" )->set_base(m_bank_base[7]); -} - -template -void nakajies_state::bank_w(offs_t offset, uint8_t data) -{ - if (m_bank[N] & 0x10) - { - m_bank_base[N][offset] = data; - } -} - - void nakajies_state::nakajies_map(address_map &map) { - map(0x00000, 0x1ffff).bankr("bank0").w(FUNC(nakajies_state::bank_w<0>)); - map(0x20000, 0x3ffff).bankr("bank1").w(FUNC(nakajies_state::bank_w<1>)); - map(0x40000, 0x5ffff).bankr("bank2").w(FUNC(nakajies_state::bank_w<2>)); - map(0x60000, 0x7ffff).bankr("bank3").w(FUNC(nakajies_state::bank_w<3>)); - map(0x80000, 0x9ffff).bankr("bank4").w(FUNC(nakajies_state::bank_w<4>)); - map(0xa0000, 0xbffff).bankr("bank5").w(FUNC(nakajies_state::bank_w<5>)); - map(0xc0000, 0xdffff).bankr("bank6").w(FUNC(nakajies_state::bank_w<6>)); - map(0xe0000, 0xfffff).bankr("bank7").w(FUNC(nakajies_state::bank_w<7>)); + map(0x00000, 0x1ffff).view(m_view0); + m_view0[0](0x00000, 0x1ffff).bankr(m_rombank[0]); + m_view0[1](0x00000, 0x1ffff).bankrw(m_rambank[0]); + map(0x20000, 0x3ffff).view(m_view1); + m_view1[0](0x20000, 0x3ffff).bankr(m_rombank[1]); + m_view1[1](0x20000, 0x3ffff).bankrw(m_rambank[1]); + map(0x40000, 0x5ffff).view(m_view2); + m_view2[0](0x40000, 0x5ffff).bankr(m_rombank[2]); + m_view2[1](0x40000, 0x5ffff).bankrw(m_rambank[2]); + map(0x60000, 0x7ffff).view(m_view3); + m_view3[0](0x60000, 0x7ffff).bankr(m_rombank[3]); + m_view3[1](0x60000, 0x7ffff).bankrw(m_rambank[3]); + map(0x80000, 0x9ffff).view(m_view4); + m_view4[0](0x80000, 0x9ffff).bankr(m_rombank[4]); + m_view4[1](0x80000, 0x9ffff).bankrw(m_rambank[4]); + map(0xa0000, 0xbffff).view(m_view5); + m_view5[0](0xa0000, 0xbffff).bankr(m_rombank[5]); + m_view5[1](0xa0000, 0xbffff).bankrw(m_rambank[5]); + map(0xc0000, 0xdffff).view(m_view6); + m_view6[0](0xc0000, 0xdffff).bankr(m_rombank[6]); + m_view6[1](0xc0000, 0xdffff).bankrw(m_rambank[6]); + map(0xe0000, 0xfffff).view(m_view7); + m_view7[0](0xe0000, 0xfffff).bankr(m_rombank[7]); + m_view7[1](0xe0000, 0xfffff).bankrw(m_rambank[7]); } -/********************************************* - IRQ Handling -*********************************************/ - void nakajies_state::nakajies_update_irqs() { - // Hack: IRQ mask is temporarily disabled because doesn't allow the IRQ vector 0xFA - // and 0xFB that are used for scan the kb, this need further investigation. + // Hack: IRQ mask is temporarily disabled because it doesn't allow the IRQ vectors 0xFA + // and 0xFB that are used for scanning the kb, this need further investigation. uint8_t irq = m_irq_active; // & m_irq_enabled; uint8_t vector = 0xff; if (LOG) logerror("nakajies_update_irqs: irq_enabled = %02x, irq_active = %02x\n", m_irq_enabled, m_irq_active ); - /* Assuming irq 0xFF has the highest priority and 0xF8 the lowest */ - while( vector >= 0xf8 && ! ( irq & 0x01 ) ) + // Assuming irq 0xFF has the highest priority and 0xF8 the lowest + while (vector >= 0xf8 && !(irq & 0x01)) { irq >>= 1; vector -= 1; } - if ( vector >= 0xf8 ) + if (vector >= 0xf8) { - m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, vector ); // V20 + m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, vector); // V20 } else { - m_maincpu->set_input_line(0, CLEAR_LINE ); + m_maincpu->set_input_line(0, CLEAR_LINE); } } -uint8_t nakajies_state::irq_clear_r() +u8 nakajies_state::irq_clear_r() { return 0x00; } -void nakajies_state::irq_clear_w(uint8_t data) +void nakajies_state::irq_clear_w(u8 data) { m_irq_active &= ~data; nakajies_update_irqs(); } -uint8_t nakajies_state::irq_enable_r() +u8 nakajies_state::irq_enable_r() { return m_irq_enabled; } -void nakajies_state::irq_enable_w(uint8_t data) +void nakajies_state::irq_enable_w(u8 data) { m_irq_enabled = data; nakajies_update_irqs(); @@ -468,30 +460,39 @@ void nakajies_state::irq_enable_w(uint8_t data) bit 3 - battery low (when set) bit 2-0 - unknown */ -uint8_t nakajies_state::unk_a0_r() +u8 nakajies_state::unk_a0_r() { return 0xf7; } -void nakajies_state::lcd_memory_start_w(uint8_t data) +void nakajies_state::lcd_memory_start_w(u8 data) { m_lcd_memory_start = data; } -void nakajies_state::banking_w(offs_t offset, uint8_t data) +void nakajies_state::banking_w(offs_t offset, u8 data) { - m_bank[offset] = data; - update_banks(); + m_rombank[offset]->set_entry((data & 0x0f) ^ 0xf); + m_rambank[offset]->set_entry((data & 0x0f) ^ 0xf); + + switch (offset) + { + case 0: m_view0.select(BIT(data, 4)); break; + case 1: m_view1.select(BIT(data, 4)); break; + case 2: m_view2.select(BIT(data, 4)); break; + case 3: m_view3.select(BIT(data, 4)); break; + case 4: m_view4.select(BIT(data, 4)); break; + case 5: m_view5.select(BIT(data, 4)); break; + case 6: m_view6.select(BIT(data, 4)); break; + case 7: m_view7.select(BIT(data, 4)); break; + } } -uint8_t nakajies_state::keyboard_r() +u8 nakajies_state::keyboard_r() { - static const char *const bitnames[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", - "ROW5", "ROW6", "ROW7", "ROW8", "ROW9" }; - - return (m_matrix > 0x00) ? ioport(bitnames[m_matrix - 1])->read() : 0; + return (m_matrix > 0x00) ? m_port_row[m_matrix - 1]->read() : 0; } @@ -503,145 +504,151 @@ void nakajies_state::nakajies_io_map(address_map &map) map(0x0090, 0x0090).rw(FUNC(nakajies_state::irq_clear_r), FUNC(nakajies_state::irq_clear_w)); map(0x00a0, 0x00a0).r(FUNC(nakajies_state::unk_a0_r)); map(0x00b0, 0x00b0).r(FUNC(nakajies_state::keyboard_r)); - map(0x00d0, 0x00df).rw("rtc", FUNC(rp5c01_device::read), FUNC(rp5c01_device::write)); + map(0x00d0, 0x00df).rw(m_rtc, FUNC(rp5c01_device::read), FUNC(rp5c01_device::write)); } INPUT_CHANGED_MEMBER(nakajies_state::trigger_irq) { - uint8_t irqs = ioport( "debug" )->read(); - - m_irq_active |= irqs; + m_irq_active |= m_port_debug->read(); nakajies_update_irqs(); } -static INPUT_PORTS_START( nakajies ) - PORT_START( "debug" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F1 ) PORT_NAME( "irq 0xff" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F2 ) PORT_NAME( "irq 0xfe" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F3 ) PORT_NAME( "irq 0xfd" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F4 ) PORT_NAME( "irq 0xfc" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F5 ) PORT_NAME( "irq 0xfb" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F6 ) PORT_NAME( "irq 0xfa" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F7 ) PORT_NAME( "irq 0xf9" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE( KEYCODE_F8 ) PORT_NAME( "irq 0xf8" ) PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0 ) - - PORT_START( "ROW0" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE( KEYCODE_LSHIFT ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE( KEYCODE_RSHIFT ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LEFT") PORT_CODE( KEYCODE_LEFT ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ENTER") PORT_CODE( KEYCODE_ENTER ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START( "ROW1" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ALT") PORT_CODE( KEYCODE_LALT ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("`") PORT_CODE( KEYCODE_BACKSLASH2 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CAN") PORT_CODE( KEYCODE_ESC ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE( KEYCODE_SPACE ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("5") PORT_CODE( KEYCODE_5 ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START( "ROW2" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CONTROL") PORT_CODE( KEYCODE_LCONTROL ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CAPSLOCK") PORT_CODE( KEYCODE_CAPSLOCK ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("1") PORT_CODE( KEYCODE_1 ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("TAB") PORT_CODE( KEYCODE_TAB ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START( "ROW3" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("3") PORT_CODE( KEYCODE_3 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("2") PORT_CODE( KEYCODE_2 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE( KEYCODE_Q ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE( KEYCODE_W ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE( KEYCODE_E ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE( KEYCODE_S ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE( KEYCODE_D ) - - PORT_START( "ROW4" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("4") PORT_CODE( KEYCODE_4 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE( KEYCODE_Z ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE( KEYCODE_X ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE( KEYCODE_A ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE( KEYCODE_R ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE( KEYCODE_F ) - - PORT_START( "ROW5" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE( KEYCODE_B ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE( KEYCODE_V ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE( KEYCODE_T ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE( KEYCODE_Y ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE( KEYCODE_G ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE( KEYCODE_C ) - - PORT_START( "ROW6" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("6") PORT_CODE( KEYCODE_6 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("DOWN") PORT_CODE( KEYCODE_DOWN ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("INSERT") PORT_CODE( KEYCODE_INSERT ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RIGHT") PORT_CODE( KEYCODE_RIGHT ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\\") PORT_CODE( KEYCODE_BACKSLASH ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/") PORT_CODE( KEYCODE_SLASH ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE( KEYCODE_H ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE( KEYCODE_N ) - - PORT_START( "ROW7" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("=") PORT_CODE( KEYCODE_EQUALS ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("7") PORT_CODE( KEYCODE_7 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ORGN") PORT_CODE( KEYCODE_PGUP ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("UP") PORT_CODE( KEYCODE_UP ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("WP") PORT_CODE( KEYCODE_PGDN ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE( KEYCODE_U ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE( KEYCODE_M ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE( KEYCODE_K ) - - PORT_START( "ROW8" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("8") PORT_CODE( KEYCODE_8 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE( KEYCODE_MINUS ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("]") PORT_CODE( KEYCODE_CLOSEBRACE ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("[") PORT_CODE( KEYCODE_OPENBRACE ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\'") PORT_CODE( KEYCODE_QUOTE ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE( KEYCODE_I ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE( KEYCODE_J ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(",") PORT_CODE( KEYCODE_COMMA ) - - PORT_START( "ROW9" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("0") PORT_CODE( KEYCODE_0 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("9") PORT_CODE( KEYCODE_9 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("BACK") PORT_CODE( KEYCODE_BACKSPACE ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE( KEYCODE_P ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(";") PORT_CODE( KEYCODE_COLON ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE( KEYCODE_L ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE( KEYCODE_O ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(".") PORT_CODE( KEYCODE_STOP ) +static INPUT_PORTS_START(nakajies) + PORT_START("debug") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("irq 0xff") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("irq 0xfe") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("irq 0xfd") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("irq 0xfc") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("irq 0xfb") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("irq 0xfa") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("irq 0xf9") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_NAME("irq 0xf8") PORT_CHANGED_MEMBER(DEVICE_SELF, nakajies_state, trigger_irq, 0) + + PORT_START("ROW0") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("LEFT") PORT_CODE(KEYCODE_LEFT) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("ROW1") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ALT") PORT_CODE(KEYCODE_LALT) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("`") PORT_CODE(KEYCODE_BACKSLASH2) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAN") PORT_CODE(KEYCODE_ESC) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("ROW2") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CONTROL") PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAPSLOCK") PORT_CODE(KEYCODE_CAPSLOCK) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("ROW3") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) + + PORT_START("ROW4") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) + + PORT_START("ROW5") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) + + PORT_START("ROW6") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("INSERT") PORT_CODE(KEYCODE_INSERT) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\\") PORT_CODE(KEYCODE_BACKSLASH) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) + + PORT_START("ROW7") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("=") PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ORGN") PORT_CODE(KEYCODE_PGUP) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("WP") PORT_CODE(KEYCODE_PGDN) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) + + PORT_START("ROW8") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\'") PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) + + PORT_START("ROW9") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("BACK") PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) INPUT_PORTS_END void nakajies_state::machine_start() { - m_rom_base = memregion("bios")->base(); - m_rom_size = memregion("bios")->bytes(); + u32 rom_size = m_rom_region->bytes(); - const char *gamename = machine().system().name; + m_ram_base = make_unique_clear(m_ram_size); - m_ram_size = 128 * 1024; - if ( strcmp( gamename, "drwrt400" ) == 0 || strcmp( gamename, "drwrt200" ) == 0 ) + for (int i = 0; i < 8; i++) { - m_ram_size = 256 * 1024; + // TODO: rom banks outside max bank size; assuming the banks are simply mirrored + for (int j = 0; j < 16; j += rom_size / 0x20000) + m_rombank[i]->configure_entries(j, rom_size / 0x20000, m_rom_region->base(), 0x20000); + // TODO: ram banks outside max bank size; assuming the banks are simply mirrored + // how would that work for a system with 160KB RAM? + for (int j = 0; j < 16; j += m_ram_size / 0x20000) + m_rambank[i]->configure_entries(j, m_ram_size / 0x20000, &m_ram_base[0], 0x20000); } - m_ram_base = make_unique_clear(m_ram_size); + + save_item(NAME(m_irq_enabled)); + save_item(NAME(m_irq_active)); + save_item(NAME(m_lcd_memory_start)); + save_item(NAME(m_matrix)); } @@ -652,25 +659,32 @@ void nakajies_state::machine_reset() m_lcd_memory_start = 0; m_matrix = 0; - /* Initialize banks */ - for (auto & elem : m_bank) + m_view0.select(0); + m_view1.select(0); + m_view2.select(0); + m_view3.select(0); + m_view4.select(0); + m_view5.select(0); + m_view6.select(0); + m_view7.select(0); + for (int i = 0; i < 8; i++) { - elem = 0; + m_rombank[i]->set_entry(0x0f); + m_rambank[i]->set_entry(0x0f); } - update_banks(); } -uint32_t nakajies_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 nakajies_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { uint8_t* lcd_memory_start = &m_ram_base[m_lcd_memory_start << 9]; int height = screen.height(); - for (int y=0; yset_addrmap(AS_IO, &nakajies_state::nakajies_io_map); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(50); /* Wild guess */ + screen.set_refresh_hz(50); // Wild guess screen.set_screen_update(FUNC(nakajies_state::screen_update)); screen.set_size(80 * 6, 8 * 8); screen.set_visarea(0, 6 * 80 - 1, 0, 8 * 8 - 1); @@ -758,9 +772,11 @@ void nakajies_state::nakajies210(machine_config &config) SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 1.00); /* rtc */ - RP5C01(config, "rtc", XTAL(32'768)); + RP5C01(config, m_rtc, XTAL(32'768)); TIMER(config, "kb_timer").configure_periodic(FUNC(nakajies_state::kb_timer), attotime::from_hz(250)); + + m_ram_size = 128 * 1024; } void nakajies_state::dator3k(machine_config &config) @@ -775,58 +791,70 @@ void nakajies_state::nakajies220(machine_config &config) subdevice("gfxdecode")->set_info(gfx_drwrt400); } +void nakajies_state::nakajies220_256(machine_config &config) +{ + nakajies220(config); + m_ram_size = 256 * 1024; +} + void nakajies_state::nakajies250(machine_config &config) { nakajies210(config); subdevice("screen")->set_size(80 * 6, 16 * 8); subdevice("screen")->set_visarea(0, 6 * 80 - 1, 0, 16 * 8 - 1); subdevice("gfxdecode")->set_info(gfx_drwrt200); + m_ram_size = 256 * 1024; } ROM_START(wales210) - ROM_REGION( 0x80000, "bios", 0 ) + ROM_REGION(0x80000, "bios", 0) - ROM_SYSTEM_BIOS( 0, "wales210", "Walther ES-210" ) + ROM_SYSTEM_BIOS(0, "wales210", "Walther ES-210") ROMX_LOAD("wales210.ic303", 0x00000, 0x80000, CRC(a8e8d991) SHA1(9a133b37b2fbf689ae1c7ab5c7f4e97cd33fd596), ROM_BIOS(0)) /* 27c4001 */ - ROM_SYSTEM_BIOS( 1, "drwrtr325", "NTS DreamWriter 325" ) + ROM_SYSTEM_BIOS(1, "drwrtr325", "NTS DreamWriter 325") ROMX_LOAD("dr3_1_02uk.ic303", 0x00000, 0x80000, CRC(027db9fe) SHA1(eb52a30510f2e2924c6dae9bc4348cd3572f4997), ROM_BIOS(1)) ROM_END ROM_START(dator3k) - ROM_REGION( 0x80000, "bios", 0 ) + ROM_REGION(0x80000, "bios", 0) ROM_LOAD("dator3000.ic303", 0x00000, 0x80000, CRC(b67fffeb) SHA1(e48270d15bef9453bcb6ba8aa949fd2ab3feceed)) ROM_END ROM_START(drwrt100) - ROM_REGION( 0x80000, "bios", 0 ) + ROM_REGION(0x80000, "bios", 0) ROM_LOAD("t100_2.3.ic303", 0x00000, 0x80000, CRC(8a16f12f) SHA1(0a907186db3d1756566d767ee847a7ecf694e74b)) /* Checksum 01F5 on label */ ROM_END ROM_START(drwrt200) - ROM_REGION( 0x100000, "bios", 0 ) - ROM_LOAD("drwrt200.bin", 0x000000, 0x100000, CRC(3c39483c) SHA1(48293e6bdb7e7322d76da7174b716243c0ab7c2c) ) + ROM_REGION(0x100000, "bios", 0) + ROM_LOAD("drwrt200.bin", 0x000000, 0x100000, CRC(3c39483c) SHA1(48293e6bdb7e7322d76da7174b716243c0ab7c2c)) ROM_END ROM_START(drwrt400) - ROM_REGION( 0x80000, "bios", 0 ) - ROM_LOAD("t4_ir_2.1.ic303", 0x00000, 0x80000, CRC(f0f45fd2) SHA1(3b4d5722b3e32e202551a1be8ae36f34ad705ddd)) + ROM_REGION(0x100000, "bios", 0) + + ROM_SYSTEM_BIOS(0, "v3_1", "v3.1") + ROMX_LOAD("t4_ir_3.1_e588.ic303", 0x00000, 0x100000, CRC(1724ceb2) SHA1(101effc8cfa2f084c09b25c4074f684aeb97d044), ROM_BIOS(0)) + + ROM_SYSTEM_BIOS(1, "v2_1", "v2.1") + ROMX_LOAD("t4_ir_2.1.ic303", 0x80000, 0x80000, CRC(f0f45fd2) SHA1(3b4d5722b3e32e202551a1be8ae36f34ad705ddd), ROM_BIOS(1)) ROM_END ROM_START(drwrt450) - ROM_REGION( 0x100000, "bios", 0 ) + ROM_REGION(0x100000, "bios", 0) ROM_LOAD("t4_ir_35ba308.ic303", 0x00000, 0x100000, CRC(3b5a580d) SHA1(72df34ece1e6d70adf953025d1c458e22ce819e1)) ROM_END -ROM_START( es210_es ) - ROM_REGION( 0x80000, "bios", 0 ) +ROM_START(es210_es) + ROM_REGION(0x80000, "bios", 0) ROM_LOAD("nakajima_es.ic303", 0x00000, 0x80000, CRC(214d73ce) SHA1(ce9967c5b2d122ebebe9401278d8ea374e8fb289)) ROM_END @@ -838,6 +866,6 @@ COMP( 199?, wales210, 0, 0, nakajies210, nakajies, nakajies_state, e COMP( 199?, dator3k, wales210, 0, dator3k, nakajies, nakajies_state, empty_init, "Dator", "Dator 3000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM COMP( 199?, es210_es, wales210, 0, nakajies210, nakajies, nakajies_state, empty_init, "Nakajima", "ES-210 (Spain)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM COMP( 199?, drwrt100, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM -COMP( 1996, drwrt400, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T400", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB RAM +COMP( 1996, drwrt400, wales210, 0, nakajies220_256, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T400", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB RAM, also found a machine with 160KB RAM COMP( 199?, drwrt450, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter 450", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM COMP( 199?, drwrt200, wales210, 0, nakajies250, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T200", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB? RAM -- cgit v1.2.3