From 70b2769df57f1f1edc48588b81b6df3e29a79622 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 11 Nov 2023 17:11:12 -0500 Subject: m6801: Move RAM, ROM and I/O areas into internal maps for all variants (including a few that lacked their own device types until now). CPU device now saves NVRAM for applicable standby areas, which only include the first part of internal RAM on NMOS variants. * adam_prn: Enable MCU * taito/bublbobl.cpp, taito/kicknrun.cpp: Add pulse on SC1 to properly latch data from MCU port * tx81z: Un-NOP now-emulated internal register --- src/devices/bus/adamnet/ddp.cpp | 3 - src/devices/bus/adamnet/fdc.cpp | 4 +- src/devices/bus/adamnet/kb.cpp | 13 --- src/devices/bus/adamnet/kb.h | 2 - src/devices/bus/adamnet/printer.cpp | 14 --- src/devices/bus/adamnet/printer.h | 2 - src/devices/bus/adamnet/spi.cpp | 3 - src/devices/bus/cbmiec/c64_nl10.cpp | 2 - src/devices/bus/epson_sio/pf10.cpp | 4 +- src/devices/bus/epson_sio/pf10.h | 2 +- src/devices/cpu/m6800/m6801.cpp | 167 +++++++++++++++++++++++++++++------- src/devices/cpu/m6800/m6801.h | 74 +++++++++++++--- src/devices/machine/mpu401.cpp | 8 +- src/mame/act/apricotp.cpp | 13 --- src/mame/atari/stkbd.cpp | 8 -- src/mame/atari/stkbd.h | 2 - src/mame/canon/canon_s80.cpp | 3 - src/mame/coleco/adam.cpp | 13 --- src/mame/coleco/adam.h | 1 - src/mame/epson/hx20.cpp | 17 +--- src/mame/epson/hx20.h | 5 +- src/mame/ericsson/eispc_kb.cpp | 12 --- src/mame/korg/korgdss1.cpp | 2 - src/mame/korg/korgdw8k.cpp | 2 - src/mame/korg/korgz3.cpp | 2 - src/mame/mg1/mg1.cpp | 15 ++-- src/mame/misc/acesp.cpp | 3 +- src/mame/misc/unktop.cpp | 2 - src/mame/namco/baraduke.cpp | 37 ++++---- src/mame/namco/namcos1.cpp | 3 - src/mame/namco/namcos86.cpp | 103 +++++++++++++--------- src/mame/namco/pacland.cpp | 53 +++++++----- src/mame/namco/skykid.cpp | 45 ++++++---- src/mame/namco/tceptor.cpp | 21 ++--- src/mame/novag/snova.cpp | 2 - src/mame/psion/psion.cpp | 26 +----- src/mame/roland/roland_tr505.cpp | 11 --- src/mame/roland/roland_tr707.cpp | 2 - src/mame/saitek/ccompan2.cpp | 17 ---- src/mame/saitek/leonardo.cpp | 2 - src/mame/saitek/renaissance.cpp | 2 - src/mame/skeleton/rvoice.cpp | 4 +- src/mame/taito/bublbobl.cpp | 40 ++++----- src/mame/taito/bublbobl.h | 1 - src/mame/taito/bublbobl_m.cpp | 1 + src/mame/taito/kikikai.cpp | 22 ++--- src/mame/taito/kikikai.h | 1 - src/mame/taito/kikikai_m.cpp | 1 + src/mame/technos/ddragon.cpp | 3 - src/mame/technos/spdodgeb.cpp | 3 - src/mame/yamaha/ymdx100.cpp | 2 - src/mame/yamaha/ymdx11.cpp | 2 - src/mame/yamaha/ymrx15.cpp | 2 - src/mame/yamaha/ymtx81z.cpp | 3 - 54 files changed, 391 insertions(+), 416 deletions(-) diff --git a/src/devices/bus/adamnet/ddp.cpp b/src/devices/bus/adamnet/ddp.cpp index 21c51a9f0ce..f4d08232d4e 100644 --- a/src/devices/bus/adamnet/ddp.cpp +++ b/src/devices/bus/adamnet/ddp.cpp @@ -54,10 +54,7 @@ const tiny_rom_entry *adam_digital_data_pack_device::device_rom_region() const void adam_digital_data_pack_device::adam_ddp_mem(address_map &map) { - map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x0400, 0x07ff).ram(); - map(0xf800, 0xffff).rom().region(M6801_TAG, 0); } static const cassette_image::Options adam_cassette_options = diff --git a/src/devices/bus/adamnet/fdc.cpp b/src/devices/bus/adamnet/fdc.cpp index 587084dd172..af249acbad9 100644 --- a/src/devices/bus/adamnet/fdc.cpp +++ b/src/devices/bus/adamnet/fdc.cpp @@ -81,8 +81,6 @@ const tiny_rom_entry *adam_fdc_device::device_rom_region() const void adam_fdc_device::adam_fdc_mem(address_map &map) { - map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x0400, 0x07ff).ram().writeonly().share("ram"); map(0x0800, 0x0800).mirror(0x3ff).r(WD2793_TAG, FUNC(wd2793_device::status_r)); map(0x1400, 0x17ff).ram().readonly().share("ram"); @@ -120,7 +118,7 @@ static void adam_fdc_floppies(device_slot_interface &device) void adam_fdc_device::device_add_mconfig(machine_config &config) { - M6801(config, m_maincpu, 4_MHz_XTAL), + M6803(config, m_maincpu, 4_MHz_XTAL), m_maincpu->set_addrmap(AS_PROGRAM, &adam_fdc_device::adam_fdc_mem); m_maincpu->in_p1_cb().set(FUNC(adam_fdc_device::p1_r)); m_maincpu->out_p1_cb().set(FUNC(adam_fdc_device::p1_w)); diff --git a/src/devices/bus/adamnet/kb.cpp b/src/devices/bus/adamnet/kb.cpp index 840bb898e25..96518bc534b 100644 --- a/src/devices/bus/adamnet/kb.cpp +++ b/src/devices/bus/adamnet/kb.cpp @@ -48,18 +48,6 @@ const tiny_rom_entry *adam_keyboard_device::device_rom_region() const } -//------------------------------------------------- -// ADDRESS_MAP( adam_kb_mem ) -//------------------------------------------------- - -void adam_keyboard_device::adam_kb_mem(address_map &map) -{ - map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf800, 0xffff).rom().region(M6801_TAG, 0); -} - - //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- @@ -67,7 +55,6 @@ void adam_keyboard_device::adam_kb_mem(address_map &map) void adam_keyboard_device::device_add_mconfig(machine_config &config) { M6801(config, m_maincpu, XTAL(4'000'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &adam_keyboard_device::adam_kb_mem); m_maincpu->in_p1_cb().set(FUNC(adam_keyboard_device::p1_r)); m_maincpu->in_p2_cb().set(FUNC(adam_keyboard_device::p2_r)); m_maincpu->out_p2_cb().set(FUNC(adam_keyboard_device::p2_w)); diff --git a/src/devices/bus/adamnet/kb.h b/src/devices/bus/adamnet/kb.h index 167ff1fc46d..bd506cf4647 100644 --- a/src/devices/bus/adamnet/kb.h +++ b/src/devices/bus/adamnet/kb.h @@ -54,8 +54,6 @@ private: void p3_w(uint8_t data); uint8_t p4_r(); void p4_w(uint8_t data); - - void adam_kb_mem(address_map &map); }; diff --git a/src/devices/bus/adamnet/printer.cpp b/src/devices/bus/adamnet/printer.cpp index 841fa76b138..0e8c5fcd8b4 100644 --- a/src/devices/bus/adamnet/printer.cpp +++ b/src/devices/bus/adamnet/printer.cpp @@ -46,18 +46,6 @@ const tiny_rom_entry *adam_printer_device::device_rom_region() const } -//------------------------------------------------- -// ADDRESS_MAP( adam_prn_mem ) -//------------------------------------------------- - -void adam_printer_device::adam_prn_mem(address_map &map) -{ - map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf800, 0xffff).rom().region(M6801_TAG, 0); -} - - //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- @@ -65,14 +53,12 @@ void adam_printer_device::adam_prn_mem(address_map &map) void adam_printer_device::device_add_mconfig(machine_config &config) { M6801(config, m_maincpu, XTAL(4'000'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &adam_printer_device::adam_prn_mem); m_maincpu->out_p1_cb().set(FUNC(adam_printer_device::p1_w)); m_maincpu->in_p2_cb().set(FUNC(adam_printer_device::p2_r)); m_maincpu->out_p2_cb().set(FUNC(adam_printer_device::p2_w)); m_maincpu->in_p3_cb().set(FUNC(adam_printer_device::p3_r)); m_maincpu->in_p4_cb().set(FUNC(adam_printer_device::p4_r)); m_maincpu->out_p4_cb().set(FUNC(adam_printer_device::p4_w)); - m_maincpu->set_disable(); // TODO } diff --git a/src/devices/bus/adamnet/printer.h b/src/devices/bus/adamnet/printer.h index 376db4a9a99..80e3c62ad4c 100644 --- a/src/devices/bus/adamnet/printer.h +++ b/src/devices/bus/adamnet/printer.h @@ -49,8 +49,6 @@ private: uint8_t p3_r(); uint8_t p4_r(); void p4_w(uint8_t data); - - void adam_prn_mem(address_map &map); }; diff --git a/src/devices/bus/adamnet/spi.cpp b/src/devices/bus/adamnet/spi.cpp index e1f658fd62b..34cbcb7f5ab 100644 --- a/src/devices/bus/adamnet/spi.cpp +++ b/src/devices/bus/adamnet/spi.cpp @@ -44,11 +44,8 @@ const tiny_rom_entry *adam_spi_device::device_rom_region() const void adam_spi_device::adam_spi_mem(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x0100, 0x0103).rw("epci", FUNC(scn2661a_device::read), FUNC(scn2661a_device::write)); map(0x0104, 0x01ff).ram(); - map(0xf800, 0xffff).rom().region("m6801", 0); } diff --git a/src/devices/bus/cbmiec/c64_nl10.cpp b/src/devices/bus/cbmiec/c64_nl10.cpp index 774dce1a18b..6def72ed1ec 100644 --- a/src/devices/bus/cbmiec/c64_nl10.cpp +++ b/src/devices/bus/cbmiec/c64_nl10.cpp @@ -62,8 +62,6 @@ c64_nl10_interface_device::c64_nl10_interface_device(const machine_config &mconf void c64_nl10_interface_device::mem_map(address_map &map) { - map(0x0000, 0x0027).m("bufcpu", FUNC(hd6303y_cpu_device::hd6301y_io)); // TODO: internalize this - map(0x0040, 0x013f).ram(); // TODO: internalize this map(0x6000, 0x7fff).ram(); map(0x8000, 0xffff).rom().region("rom", 0); } diff --git a/src/devices/bus/epson_sio/pf10.cpp b/src/devices/bus/epson_sio/pf10.cpp index 03bf047ecbf..6225b06049b 100644 --- a/src/devices/bus/epson_sio/pf10.cpp +++ b/src/devices/bus/epson_sio/pf10.cpp @@ -27,8 +27,6 @@ DEFINE_DEVICE_TYPE(EPSON_PF10, epson_pf10_device, "epson_pf10", "EPSON PF-10 Por void epson_pf10_device::cpu_mem(address_map &map) { - map(0x0000, 0x001f).m("maincpu", FUNC(hd6303y_cpu_device::m6801_io)); - map(0x0040, 0x00ff).ram(); /* 192 bytes internal ram */ map(0x0800, 0x0fff).ram(); /* external 2k ram */ map(0x1000, 0x17ff).rw(FUNC(epson_pf10_device::fdc_r), FUNC(epson_pf10_device::fdc_w)); map(0x1800, 0x1fff).w(FUNC(epson_pf10_device::fdc_tc_w)); @@ -62,7 +60,7 @@ static void pf10_floppies(device_slot_interface &device) void epson_pf10_device::device_add_mconfig(machine_config &config) { - HD6303Y(config, m_cpu, XTAL(4'915'200)); // HD63A03XF + HD6303X(config, m_cpu, XTAL(4'915'200)); // HD63A03XF m_cpu->set_addrmap(AS_PROGRAM, &epson_pf10_device::cpu_mem); m_cpu->in_p1_cb().set(FUNC(epson_pf10_device::port1_r)); m_cpu->out_p1_cb().set(FUNC(epson_pf10_device::port1_w)); diff --git a/src/devices/bus/epson_sio/pf10.h b/src/devices/bus/epson_sio/pf10.h index 36d6daa58b8..d49200c0c90 100644 --- a/src/devices/bus/epson_sio/pf10.h +++ b/src/devices/bus/epson_sio/pf10.h @@ -66,7 +66,7 @@ private: void cpu_mem(address_map &map); - required_device m_cpu; + required_device m_cpu; required_device m_fdc; required_device m_sio_output; required_device m_floppy; diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp index 3cd97bf7d64..35a84ff4105 100644 --- a/src/devices/cpu/m6800/m6801.cpp +++ b/src/devices/cpu/m6800/m6801.cpp @@ -246,18 +246,32 @@ void m6801_cpu_device::m6801_io(address_map &map) void m6801_cpu_device::m6803_mem(address_map &map) { m6801_io(map); - map(0x0080, 0x00ff).ram(); /* 6803 internal RAM */ + map(0x0080, 0x00ff).ram().share("internal"); } -void hd6301x_cpu_device::hd6301x_io(address_map &map) +void m6801_cpu_device::m6801_mem(address_map &map) +{ + m6803_mem(map); + map(0xf800, 0xffff).rom().region(DEVICE_SELF, 0); +} + +void m6801_cpu_device::m6801u4_mem(address_map &map) +{ + m6801_io(map); + map(0x0040, 0x00ff).ram().share("internal"); + map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0); +} + +void m6801_cpu_device::hd6801_mem(address_map &map) +{ + m6803_mem(map); + map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0); +} + +void hd6301x_cpu_device::hd6303x_io(address_map &map) { map(0x0001, 0x0001).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p2_ddr_2bit_w)); - map(0x0002, 0x0002).rw(FUNC(hd6301x_cpu_device::p1_data_r), FUNC(hd6301x_cpu_device::p1_data_w)); // TODO: external except in single-chip mode map(0x0003, 0x0003).rw(FUNC(hd6301x_cpu_device::p2_data_r), FUNC(hd6301x_cpu_device::p2_data_w)); - map(0x0004, 0x0004).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p3_ddr_w)); // TODO: external except in single-chip mode - map(0x0005, 0x0005).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p4_ddr_w)); // TODO: external except in single-chip mode - map(0x0006, 0x0006).rw(FUNC(hd6301x_cpu_device::p3_data_r), FUNC(hd6301x_cpu_device::p3_data_w)); - map(0x0007, 0x0007).rw(FUNC(hd6301x_cpu_device::p4_data_r), FUNC(hd6301x_cpu_device::p4_data_w)); map(0x0008, 0x0008).rw(FUNC(hd6301x_cpu_device::tcsr_r), FUNC(hd6301x_cpu_device::tcsr_w)); map(0x0009, 0x0009).rw(FUNC(hd6301x_cpu_device::ch_r), FUNC(hd6301x_cpu_device::ch_w)); map(0x000a, 0x000a).rw(FUNC(hd6301x_cpu_device::cl_r), FUNC(hd6301x_cpu_device::cl_w)); @@ -274,7 +288,6 @@ void hd6301x_cpu_device::hd6301x_io(address_map &map) map(0x0015, 0x0015).r(FUNC(hd6301x_cpu_device::p5_data_r)); map(0x0016, 0x0016).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p6_ddr_w)); map(0x0017, 0x0017).rw(FUNC(hd6301x_cpu_device::p6_data_r), FUNC(hd6301x_cpu_device::p6_data_w)); - map(0x0018, 0x0018).rw(FUNC(hd6301x_cpu_device::p7_data_r), FUNC(hd6301x_cpu_device::p7_data_w)); // TODO: external except in single-chip mode map(0x0019, 0x0019).rw(FUNC(hd6301x_cpu_device::ocr2h_r), FUNC(hd6301x_cpu_device::ocr2h_w)); map(0x001a, 0x001a).rw(FUNC(hd6301x_cpu_device::ocr2l_r), FUNC(hd6301x_cpu_device::ocr2l_w)); map(0x001b, 0x001b).rw(FUNC(hd6301x_cpu_device::tcsr3_r), FUNC(hd6301x_cpu_device::tcsr3_w)); @@ -283,21 +296,74 @@ void hd6301x_cpu_device::hd6301x_io(address_map &map) //map(0x001f, 0x001f).rw(FUNC(hd6301x_cpu_device::tstreg_r), FUNC(hd6301x_cpu_device::tstreg_w)); } -void hd6301y_cpu_device::hd6301y_io(address_map &map) +void hd6301x_cpu_device::hd6301x_io(address_map &map) +{ + hd6303x_io(map); + map(0x0002, 0x0002).rw(FUNC(hd6301x_cpu_device::p1_data_r), FUNC(hd6301x_cpu_device::p1_data_w)); // external except in single-chip mode + map(0x0004, 0x0004).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p3_ddr_w)); // external except in single-chip mode + map(0x0005, 0x0005).rw(FUNC(hd6301x_cpu_device::ff_r), FUNC(hd6301x_cpu_device::p4_ddr_w)); // external except in single-chip mode + map(0x0006, 0x0006).rw(FUNC(hd6301x_cpu_device::p3_data_r), FUNC(hd6301x_cpu_device::p3_data_w)); // external except in single-chip mode + map(0x0007, 0x0007).rw(FUNC(hd6301x_cpu_device::p4_data_r), FUNC(hd6301x_cpu_device::p4_data_w)); // external except in single-chip mode + map(0x0018, 0x0018).rw(FUNC(hd6301x_cpu_device::p7_data_r), FUNC(hd6301x_cpu_device::p7_data_w)); // external except in single-chip mode +} + +void hd6301x_cpu_device::hd6303x_mem(address_map &map) +{ + hd6303x_io(map); + map(0x0040, 0x00ff).ram().share("internal"); +} + +void hd6301x_cpu_device::hd6301x_mem(address_map &map) { hd6301x_io(map); - map(0x0000, 0x0000).rw(FUNC(hd6301y_cpu_device::ff_r), FUNC(hd6301y_cpu_device::p1_ddr_w)); // TODO: external except in single-chip mode + map(0x0040, 0x00ff).ram().share("internal"); + map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0); +} + +void hd6301y_cpu_device::hd6303y_io(address_map &map) +{ + hd6303x_io(map); map(0x0001, 0x0001).w(FUNC(hd6301y_cpu_device::p2_ddr_w)); map(0x0015, 0x0015).w(FUNC(hd6301y_cpu_device::p5_data_w)); //map(0x001e, 0x001e).rw(FUNC(hd6301y_cpu_device::sci_trcsr2_r), FUNC(hd6301y_cpu_device::sci_trcsr2_w)); map(0x0020, 0x0020).rw(FUNC(hd6301y_cpu_device::ff_r), FUNC(hd6301y_cpu_device::p5_ddr_w)); map(0x0021, 0x0021).rw(FUNC(hd6301y_cpu_device::p6_csr_r), FUNC(hd6301y_cpu_device::p6_csr_w)); + //map(0x0022, 0x0027).noprw(); // reserved +} + +void hd6301y_cpu_device::hd6301y_io(address_map &map) +{ + hd6303y_io(map); + map(0x0000, 0x0000).rw(FUNC(hd6301y_cpu_device::ff_r), FUNC(hd6301y_cpu_device::p1_ddr_w)); // external except in single-chip mode + map(0x0002, 0x0002).rw(FUNC(hd6301y_cpu_device::p1_data_r), FUNC(hd6301y_cpu_device::p1_data_w)); // external except in single-chip mode + map(0x0004, 0x0004).rw(FUNC(hd6301y_cpu_device::ff_r), FUNC(hd6301y_cpu_device::p3_ddr_w)); // external except in single-chip mode + map(0x0005, 0x0005).rw(FUNC(hd6301y_cpu_device::ff_r), FUNC(hd6301y_cpu_device::p4_ddr_w)); // external except in single-chip mode + map(0x0006, 0x0006).rw(FUNC(hd6301y_cpu_device::p3_data_r), FUNC(hd6301y_cpu_device::p3_data_w)); // external except in single-chip mode + map(0x0007, 0x0007).rw(FUNC(hd6301y_cpu_device::p4_data_r), FUNC(hd6301y_cpu_device::p4_data_w)); // external except in single-chip mode + map(0x0018, 0x0018).rw(FUNC(hd6301y_cpu_device::p7_data_r), FUNC(hd6301y_cpu_device::p7_data_w)); // external except in single-chip mode +} + +void hd6301y_cpu_device::hd6303y_mem(address_map &map) +{ + hd6303y_io(map); + map(0x0040, 0x013f).ram().share("internal"); +} + +void hd6301y_cpu_device::hd6301y_mem(address_map &map) +{ + hd6301y_io(map); + map(0x0040, 0x013f).ram().share("internal"); + map(0xc000, 0xffff).rom().region(DEVICE_SELF, 0); } DEFINE_DEVICE_TYPE(M6801, m6801_cpu_device, "m6801", "Motorola MC6801") +DEFINE_DEVICE_TYPE(M6801U4, m6801u4_cpu_device, "m6801u4", "Motorola MC6801U4") +DEFINE_DEVICE_TYPE(HD6801V0, hd6801v0_cpu_device, "hd6801v0", "Hitachi HD6801V0") DEFINE_DEVICE_TYPE(M6803, m6803_cpu_device, "m6803", "Motorola MC6803") DEFINE_DEVICE_TYPE(M6803E, m6803e_cpu_device, "m6803e", "Motorola MC6803E") +DEFINE_DEVICE_TYPE(MC68120, mc68120_device, "mc68120", "Motorola MC68120 IPC") +DEFINE_DEVICE_TYPE(MC68121, mc68121_device, "mc68121", "Motorola MC68121 IPC") DEFINE_DEVICE_TYPE(HD6301V1, hd6301v1_cpu_device, "hd6301v1", "Hitachi HD6301V1") DEFINE_DEVICE_TYPE(HD6301X0, hd6301x0_cpu_device, "hd6301x0", "Hitachi HD6301X0") DEFINE_DEVICE_TYPE(HD6301Y0, hd6301y0_cpu_device, "hd6301y0", "Hitachi HD6301Y0") @@ -309,11 +375,11 @@ DEFINE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device, "hd6303x", "Hitachi HD6303X") DEFINE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device, "hd6303y", "Hitachi HD6303Y") m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : m6801_cpu_device(mconfig, M6801, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor()) + : m6801_cpu_device(mconfig, M6801, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6801_mem), this), 64) { } -m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal) +m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes) : m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal) , device_nvram_interface(mconfig, *this) , m_in_port_func(*this, 0xff) @@ -322,43 +388,70 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type ty , m_out_sertx_func(*this) , m_standby_func(*this) , m_sclk_divider(8) + , m_internal_ram(*this, "internal") + , m_standby_bytes(standby_bytes) { // disable nvram by default (set to true if MCU is battery-backed when in standby mode) nvram_enable_backup(false); } +m6801u4_cpu_device::m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6801_cpu_device(mconfig, M6801U4, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6801u4_cpu_device::m6801u4_mem), this), 32) +{ +} + +hd6801v0_cpu_device::hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : m6801_cpu_device(mconfig, HD6801V0, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6801v0_cpu_device::hd6801_mem), this), 64) +{ +} + m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : m6801_cpu_device(mconfig, M6803, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6803_mem), this)) + : m6801_cpu_device(mconfig, M6803, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6803_mem), this), 64) { } m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : m6801_cpu_device(mconfig, M6803E, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803e_cpu_device::m6803_mem), this)) + : m6801_cpu_device(mconfig, M6803E, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803e_cpu_device::m6803_mem), this), 64) +{ +} + +mc68120_device::mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal) + : m6801_cpu_device(mconfig, type, tag, owner, clock, m6803_insn, cycles_6803, internal, 0) +{ +} + +mc68120_device::mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mc68120_device(mconfig, MC68120, tag, owner, clock, address_map_constructor(FUNC(mc68120_device::m6801_mem), this)) +{ +} + +mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mc68120_device(mconfig, MC68121, tag, owner, clock, address_map_constructor(FUNC(mc68121_device::m6803_mem), this)) { } -hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal) - : m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal) +hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes) + : m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, standby_bytes) { } hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301_cpu_device(mconfig, HD6301V1, tag, owner, clock, hd63701_insn, cycles_63701) + : hd6301_cpu_device(mconfig, HD6301V1, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd6301v1_cpu_device::hd6801_mem), this), 128) { } hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301_cpu_device(mconfig, HD63701V0, tag, owner, clock, hd63701_insn, cycles_63701) + : hd6301_cpu_device(mconfig, HD63701V0, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd63701v0_cpu_device::hd6801_mem), this), 128) { } hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301_cpu_device(mconfig, HD6303R, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6303r_cpu_device::m6803_mem), this)) + : hd6301_cpu_device(mconfig, HD6303R, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6303r_cpu_device::m6803_mem), this), 128) { } -hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701) +hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes) + : hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, standby_bytes) , m_in_portx_func(*this, 0xff) , m_out_portx_func(*this) { @@ -366,37 +459,37 @@ hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_typ } hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301x_cpu_device(mconfig, HD6301X0, tag, owner, clock) + : hd6301x_cpu_device(mconfig, HD6301X0, tag, owner, clock, address_map_constructor(FUNC(hd6301x0_cpu_device::hd6301x_mem), this), 192) { } hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301x_cpu_device(mconfig, HD63701X0, tag, owner, clock) + : hd6301x_cpu_device(mconfig, HD63701X0, tag, owner, clock, address_map_constructor(FUNC(hd63701x0_cpu_device::hd6301x_mem), this), 192) { } hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301x_cpu_device(mconfig, HD6303X, tag, owner, clock) + : hd6301x_cpu_device(mconfig, HD6303X, tag, owner, clock, address_map_constructor(FUNC(hd6303x_cpu_device::hd6303x_mem), this), 192) { } -hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : hd6301x_cpu_device(mconfig, type, tag, owner, clock) +hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes) + : hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, standby_bytes) { } hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301y_cpu_device(mconfig, HD6301Y0, tag, owner, clock) + : hd6301y_cpu_device(mconfig, HD6301Y0, tag, owner, clock, address_map_constructor(FUNC(hd6301y0_cpu_device::hd6301y_mem), this), 256) { } hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301y_cpu_device(mconfig, HD63701Y0, tag, owner, clock) + : hd6301y_cpu_device(mconfig, HD63701Y0, tag, owner, clock, address_map_constructor(FUNC(hd63701y0_cpu_device::hd6301y_mem), this), 256) { } hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6301y_cpu_device(mconfig, HD6303Y, tag, owner, clock) + : hd6301y_cpu_device(mconfig, HD6303Y, tag, owner, clock, address_map_constructor(FUNC(hd6303y_cpu_device::hd6303y_mem), this), 256) { } @@ -1215,10 +1308,23 @@ void hd6301y_cpu_device::device_reset() m_p6csr = 7; } +uint8_t mc68120_device::dpram_r(offs_t offset) +{ + return m_internal_ram[offset & 0x7f]; +} + +void mc68120_device::dpram_w(offs_t offset, uint8_t data) +{ + m_internal_ram[offset & 0x7f] = data; +} + bool m6801_cpu_device::nvram_write(util::write_stream &file) { size_t actual; + if (file.write(&m_internal_ram[0], m_standby_bytes, actual) || m_standby_bytes != actual) + return false; + // upper bits of RAM control register u8 ram_ctrl = m_ram_ctrl & 0xc0; if (file.write(&ram_ctrl, sizeof(ram_ctrl), actual) || (sizeof(ram_ctrl) != actual)) @@ -1231,6 +1337,9 @@ bool m6801_cpu_device::nvram_read(util::read_stream &file) { size_t actual; + if (file.read(&m_internal_ram[0], m_standby_bytes, actual) || m_standby_bytes != actual) + return false; + // upper bits of RAM control register u8 ram_ctrl = 0; if (file.read(&ram_ctrl, sizeof(ram_ctrl), actual) || (sizeof(ram_ctrl) != actual)) diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h index ce7a57d64c6..c24d9b2af6c 100644 --- a/src/devices/cpu/m6800/m6801.h +++ b/src/devices/cpu/m6800/m6801.h @@ -61,12 +61,10 @@ public: auto standby_cb() { return m_standby_func.bind(); } // notifier (not an output pin) bool standby() { return suspended(SUSPEND_REASON_CLOCK); } - void m6801_io(address_map &map); // FIXME: privatize this - void m6801_clock_serial(); protected: - m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = address_map_constructor()); + m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes); // device_t implementation virtual void device_start() override; @@ -102,7 +100,6 @@ protected: uint8_t p4_data_r(); void p4_data_w(uint8_t data); -protected: uint8_t tcsr_r(); void tcsr_w(uint8_t data); uint8_t ch_r(); @@ -127,6 +124,10 @@ protected: virtual void rcr_w(uint8_t data); uint8_t ff_r(); + void m6801_io(address_map &map); + void m6801_mem(address_map &map); + void m6801u4_mem(address_map &map); + void hd6801_mem(address_map &map); void m6803_mem(address_map &map); devcb_read8::array<4> m_in_port_func; @@ -138,6 +139,9 @@ protected: int m_sclk_divider; + required_shared_ptr m_internal_ram; + const int m_standby_bytes; + /* internal registers */ uint8_t m_port_ddr[4]; uint8_t m_port_data[4]; @@ -188,6 +192,20 @@ protected: }; +class m6801u4_cpu_device : public m6801_cpu_device +{ +public: + m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + + +class hd6801v0_cpu_device : public m6801_cpu_device +{ +public: + hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + + class m6803_cpu_device : public m6801_cpu_device { public: @@ -211,10 +229,31 @@ protected: }; +class mc68120_device : public m6801_cpu_device +{ +public: + mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // dual-ported RAM access + uint8_t dpram_r(offs_t offset); + void dpram_w(offs_t offset, uint8_t data); + +protected: + mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal); +}; + + +class mc68121_device : public mc68120_device +{ +public: + mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + + class hd6301_cpu_device : public m6801_cpu_device { protected: - hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = address_map_constructor()); + hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes); virtual std::unique_ptr create_disassembler() override; @@ -265,11 +304,13 @@ public: auto out_p6_cb() { return m_out_portx_func[1].bind(); } auto out_p7_cb() { return m_out_portx_func[2].bind(); } - // TODO: privatize eventually - void hd6301x_io(address_map &map); - protected: - hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes); + + void hd6301x_io(address_map &map); + void hd6303x_io(address_map &map); + void hd6301x_mem(address_map &map); + void hd6303x_mem(address_map &map); // device_t implementation virtual void device_start() override; @@ -361,12 +402,13 @@ public: class hd6301y_cpu_device : public hd6301x_cpu_device { -public: - // TODO: privatize eventually - void hd6301y_io(address_map &map); - protected: - hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes); + + void hd6301y_io(address_map &map); + void hd6303y_io(address_map &map); + void hd6301y_mem(address_map &map); + void hd6303y_mem(address_map &map); // device-level overrides virtual void device_start() override; @@ -425,8 +467,12 @@ public: DECLARE_DEVICE_TYPE(M6801, m6801_cpu_device) +DECLARE_DEVICE_TYPE(M6801U4, m6801u4_cpu_device) +DECLARE_DEVICE_TYPE(HD6801V0, hd6801v0_cpu_device) DECLARE_DEVICE_TYPE(M6803, m6803_cpu_device) DECLARE_DEVICE_TYPE(M6803E, m6803e_cpu_device) +DECLARE_DEVICE_TYPE(MC68120, mc68120_device) +DECLARE_DEVICE_TYPE(MC68121, mc68121_device) DECLARE_DEVICE_TYPE(HD6301V1, hd6301v1_cpu_device) DECLARE_DEVICE_TYPE(HD6301X0, hd6301x0_cpu_device) DECLARE_DEVICE_TYPE(HD6301Y0, hd6301y0_cpu_device) diff --git a/src/devices/machine/mpu401.cpp b/src/devices/machine/mpu401.cpp index a1546a73a2c..012663f0188 100644 --- a/src/devices/machine/mpu401.cpp +++ b/src/devices/machine/mpu401.cpp @@ -43,7 +43,6 @@ #include "bus/midi/midi.h" #define M6801_TAG "mpu6801" -#define ROM_TAG "mpurom" #define MIDIIN_TAG "mdin" #define MIDIOUT_TAG "mdout" @@ -59,15 +58,12 @@ void mpu401_device::mpu401_map(address_map &map) { - map(0x0000, 0x001f).m(m_ourcpu, FUNC(m6801_cpu_device::m6801_io)); map(0x0020, 0x0021).rw(FUNC(mpu401_device::asic_r), FUNC(mpu401_device::asic_w)); - map(0x0080, 0x00ff).ram(); // on-chip RAM map(0x0800, 0x0fff).ram(); // external RAM - map(0xf000, 0xffff).rom().region(ROM_TAG, 0); } ROM_START( mpu401 ) - ROM_REGION(0x1000, ROM_TAG, 0) + ROM_REGION(0x1000, M6801_TAG, 0) ROM_LOAD( "roland__6801v0b55p__15179222.bin", 0x000000, 0x001000, CRC(65d3a151) SHA1(00efbfb96aeb997b69bb16981c6751d3c784bb87) ) /* Mask MCU; Label: "Roland // 6801V0B55P // 5A1 JAPAN // 15179222"; This is the final version (1.5A) of the mpu401 firmware; version is located at offsets 0x649 (0x15) and 0x64f (0x01) */ ROM_END @@ -83,7 +79,7 @@ DEFINE_DEVICE_TYPE(MPU401, mpu401_device, "mpu401", "Roland MPU-401 I/O box") void mpu401_device::device_add_mconfig(machine_config &config) { - M6801(config, m_ourcpu, 4000000); /* 4 MHz as per schematics */ + HD6801V0(config, m_ourcpu, 4000000); /* 4 MHz as per schematics */ m_ourcpu->set_addrmap(AS_PROGRAM, &mpu401_device::mpu401_map); m_ourcpu->in_p1_cb().set(FUNC(mpu401_device::port1_r)); m_ourcpu->out_p1_cb().set(FUNC(mpu401_device::port1_w)); diff --git a/src/mame/act/apricotp.cpp b/src/mame/act/apricotp.cpp index ebc590af71b..0d8f04095fc 100644 --- a/src/mame/act/apricotp.cpp +++ b/src/mame/act/apricotp.cpp @@ -158,8 +158,6 @@ private: void fp_io(address_map &map); void fp_mem(address_map &map); - void sound_io(address_map &map); - void sound_mem(address_map &map); }; @@ -456,16 +454,6 @@ void fp_state::fp_io(address_map &map) } -//------------------------------------------------- -// ADDRESS_MAP( sound_mem ) -//------------------------------------------------- - -void fp_state::sound_mem(address_map &map) -{ - map(0xf000, 0xffff).rom().region(HD63B01V1_TAG, 0); -} - - //************************************************************************** // INPUT PORTS @@ -576,7 +564,6 @@ void fp_state::fp(machine_config &config) m_maincpu->set_irq_acknowledge_callback(I8259A_TAG, FUNC(pic8259_device::inta_cb)); HD6301V1(config, m_soundcpu, 2000000); - m_soundcpu->set_addrmap(AS_PROGRAM, &fp_state::sound_mem); m_soundcpu->set_disable(); /* video hardware */ diff --git a/src/mame/atari/stkbd.cpp b/src/mame/atari/stkbd.cpp index 435fa363581..4cd98c49919 100644 --- a/src/mame/atari/stkbd.cpp +++ b/src/mame/atari/stkbd.cpp @@ -16,17 +16,9 @@ ROM_END const int st_kbd_device::mouse_xya[3][4] = { { 0, 0, 0, 0 }, { 1, 1, 0, 0 }, { 0, 1, 1, 0 } }; const int st_kbd_device::mouse_xyb[3][4] = { { 0, 0, 0, 0 }, { 0, 1, 1, 0 }, { 1, 1, 0, 0 } }; -void st_kbd_device::map(address_map &map) -{ - map(0x0000, 0x001f).m(m_cpu, FUNC(hd6301_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf000, 0xffff).rom().region("cpu", 0); -} - void st_kbd_device::device_add_mconfig(machine_config &config) { HD6301V1(config, m_cpu, 4_MHz_XTAL); - m_cpu->set_addrmap(AS_PROGRAM, &st_kbd_device::map); m_cpu->in_p1_cb().set(FUNC(st_kbd_device::port1_r)); m_cpu->in_p2_cb().set(FUNC(st_kbd_device::port2_r)); m_cpu->out_p2_cb().set(FUNC(st_kbd_device::port2_w)); diff --git a/src/mame/atari/stkbd.h b/src/mame/atari/stkbd.h index 6a3c59c4c07..3329ccc43d3 100644 --- a/src/mame/atari/stkbd.h +++ b/src/mame/atari/stkbd.h @@ -56,8 +56,6 @@ private: int m_joy_disabled; emu_timer *m_mouse_timer; - void map(address_map &map); - TIMER_CALLBACK_MEMBER(mouse_tick); uint8_t port1_r(); diff --git a/src/mame/canon/canon_s80.cpp b/src/mame/canon/canon_s80.cpp index 86c5f5006b2..f58794846ae 100644 --- a/src/mame/canon/canon_s80.cpp +++ b/src/mame/canon/canon_s80.cpp @@ -208,14 +208,11 @@ void canons80_state::keyscan_w(u8 data) void canons80_state::canons80_map(address_map &map) { - map(0x0000, 0x001f).m("maincpu", FUNC(hd6301x0_cpu_device::hd6301x_io)); - map(0x0040, 0x00ff).ram(); map(0x0100, 0x07ff).ram(); map(0x1000, 0x1000).w(FUNC(canons80_state::keyscan_w)); map(0x2000, 0x2001).rw("lcdc", FUNC(hd44780_device::read), FUNC(hd44780_device::write)); map(0x4000, 0x7fff).rom().region("external", 0x4000); map(0x8000, 0xbfff).rom().region("external", 0); - map(0xf000, 0xffff).rom().region("maincpu", 0); } static INPUT_PORTS_START(canons80) diff --git a/src/mame/coleco/adam.cpp b/src/mame/coleco/adam.cpp index 1acbb19bba1..650bf12948b 100644 --- a/src/mame/coleco/adam.cpp +++ b/src/mame/coleco/adam.cpp @@ -878,18 +878,6 @@ void adam_state::adam_io(address_map &map) } -//------------------------------------------------- -// ADDRESS_MAP( m6801_mem ) -//------------------------------------------------- - -void adam_state::m6801_mem(address_map &map) -{ - map(0x0000, 0x001f).m(m_netcpu, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf800, 0xffff).rom().region(M6801_TAG, 0); -} - - //************************************************************************** // INPUT PORTS @@ -1034,7 +1022,6 @@ void adam_state::adam(machine_config &config) m_maincpu->set_addrmap(AS_IO, &adam_state::adam_io); M6801(config, m_netcpu, XTAL(4'000'000)); - m_netcpu->set_addrmap(AS_PROGRAM, &adam_state::m6801_mem); m_netcpu->out_p1_cb().set(FUNC(adam_state::m6801_p1_w)); m_netcpu->in_p2_cb().set(FUNC(adam_state::m6801_p2_r)); m_netcpu->out_p2_cb().set(FUNC(adam_state::m6801_p2_w)); diff --git a/src/mame/coleco/adam.h b/src/mame/coleco/adam.h index f1c4391aa26..ba52f977422 100644 --- a/src/mame/coleco/adam.h +++ b/src/mame/coleco/adam.h @@ -113,7 +113,6 @@ private: int m_vdp_nmi = 0; void adam_io(address_map &map); void adam_mem(address_map &map); - void m6801_mem(address_map &map); }; #endif // MAME_COLECO_ADAM_H diff --git a/src/mame/epson/hx20.cpp b/src/mame/epson/hx20.cpp index 2a6cedadffe..bee12d95418 100644 --- a/src/mame/epson/hx20.cpp +++ b/src/mame/epson/hx20.cpp @@ -530,7 +530,6 @@ void hx20_state::slave_p4_w(uint8_t data) void hx20_state::hx20_mem(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301v1_cpu_device::m6801_io)); map(0x0020, 0x0020).w(FUNC(hx20_state::ksc_w)); map(0x0022, 0x0022).r(FUNC(hx20_state::krtn07_r)); map(0x0026, 0x0026).w(FUNC(hx20_state::lcd_cs_w)); @@ -539,25 +538,12 @@ void hx20_state::hx20_mem(address_map &map) map(0x002c, 0x002c); // mask interruption by using IC 8E in sleep mode map(0x0030, 0x0033); // switch memory banks (expansion unit) map(0x0040, 0x007f).rw(m_rtc, FUNC(mc146818_device::read_direct), FUNC(mc146818_device::write_direct)); - map(0x0080, 0x00ff).ram(); map(0x0100, 0x3fff).ram(); map(0x6000, 0x7fff).rom().r(FUNC(hx20_state::optrom_r)); map(0x8000, 0xffff).rom().region(HD6301V1_MAIN_TAG, 0); } -//------------------------------------------------- -// ADDRESS_MAP( hx20_sub_mem ) -//------------------------------------------------- - -void hx20_state::hx20_sub_mem(address_map &map) -{ - map(0x0000, 0x001f).m(m_subcpu, FUNC(hd6301v1_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf000, 0xffff).rom().region(HD6301V1_SLAVE_TAG, 0); -} - - //------------------------------------------------- // ADDRESS_MAP( cm6032_mem ) //------------------------------------------------- @@ -886,7 +872,7 @@ void hx20_state::machine_start() void hx20_state::hx20(machine_config &config) { // basic machine hardware - HD6301V1(config, m_maincpu, 2.4576_MHz_XTAL); + HD6303R(config, m_maincpu, 2.4576_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_mem); m_maincpu->in_p1_cb().set(FUNC(hx20_state::main_p1_r)); m_maincpu->out_p1_cb().set(FUNC(hx20_state::main_p1_w)); @@ -896,7 +882,6 @@ void hx20_state::hx20(machine_config &config) // Port 4 = A8-A15 HD6301V1(config, m_subcpu, 2.4576_MHz_XTAL); - m_subcpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_sub_mem); m_subcpu->in_p1_cb().set(FUNC(hx20_state::slave_p1_r)); m_subcpu->out_p1_cb().set(FUNC(hx20_state::slave_p1_w)); m_subcpu->in_p2_cb().set(FUNC(hx20_state::slave_p2_r)); diff --git a/src/mame/epson/hx20.h b/src/mame/epson/hx20.h index cb87f0e74a7..8e298bc324b 100644 --- a/src/mame/epson/hx20.h +++ b/src/mame/epson/hx20.h @@ -54,8 +54,8 @@ public: void cm6127(machine_config &config); private: - required_device m_maincpu; - required_device m_subcpu; + required_device m_maincpu; + required_device m_subcpu; required_device m_rtc; required_device_array m_lcdc; required_device m_speaker; @@ -119,7 +119,6 @@ private: int m_sio_pin = 0; void hx20_mem(address_map &map); - void hx20_sub_mem(address_map &map); void cm6032_mem(address_map &map); void cm6127_mem(address_map &map); }; diff --git a/src/mame/ericsson/eispc_kb.cpp b/src/mame/ericsson/eispc_kb.cpp index 5a19b163e57..8c543fc2a06 100644 --- a/src/mame/ericsson/eispc_kb.cpp +++ b/src/mame/ericsson/eispc_kb.cpp @@ -310,7 +310,6 @@ void eispc_keyboard_device::device_start() void eispc_keyboard_device::device_add_mconfig(machine_config &config) { M6801(config, m_mcu, XTAL(4'915'200)); // Crystal verified from schematics and visual inspection - m_mcu->set_addrmap(AS_PROGRAM, &eispc_keyboard_device::eispc_kb_mem); m_mcu->in_p1_cb().set([this] { @@ -395,17 +394,6 @@ ioport_constructor eispc_keyboard_device::device_input_ports() const return INPUT_PORTS_NAME( eispc_kb ); } -//------------------------------------------------- -// ADDRESS_MAP( eispc_kb_mem ) -//------------------------------------------------- - -void eispc_keyboard_device::eispc_kb_mem(address_map &map) -{ - map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); - map(0xf800, 0xffff).rom().region(M6801_TAG, 0); -} - //------------------------------------------------- // rom_region - device-specific ROM region //------------------------------------------------- diff --git a/src/mame/korg/korgdss1.cpp b/src/mame/korg/korgdss1.cpp index 4992cd7ceaa..354ca7ed250 100644 --- a/src/mame/korg/korgdss1.cpp +++ b/src/mame/korg/korgdss1.cpp @@ -401,8 +401,6 @@ void korg_dssmsrk_state::msrk_io_map(address_map &map) void korg_dss1_state::cpu2_map(address_map &map) { - map(0x0000, 0x001f).m(m_cpu2, FUNC(hd6303x_cpu_device::hd6301x_io)); // FIXME: internalize this - map(0x0040, 0x00ff).ram(); // FIXME: internalize this map(0x0100, 0x0100).mirror(0x3cff).w(FUNC(korg_dss1_state::da_lsb_w)); map(0x0200, 0x0200).mirror(0x3cff).w(FUNC(korg_dss1_state::da_msb_w)); map(0x0300, 0x0300).mirror(0x3cff).r(m_latch[0], FUNC(generic_latch_8_device::read)); diff --git a/src/mame/korg/korgdw8k.cpp b/src/mame/korg/korgdw8k.cpp index 69f19f2f02f..d23d19eeeca 100644 --- a/src/mame/korg/korgdw8k.cpp +++ b/src/mame/korg/korgdw8k.cpp @@ -87,8 +87,6 @@ void korgdw8k_state::bank_w(u8 data) void korgdw8k_state::mem_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6303x_cpu_device::hd6301x_io)); - map(0x0040, 0x00ff).ram(); // internal RAM map(0x3000, 0x37ff).ram().share("nvram"); map(0x3800, 0x3fff).ram(); map(0x4040, 0x4040).w(FUNC(korgdw8k_state::dac_w)); diff --git a/src/mame/korg/korgz3.cpp b/src/mame/korg/korgz3.cpp index f5a6cb349cc..ed1915864ee 100644 --- a/src/mame/korg/korgz3.cpp +++ b/src/mame/korg/korgz3.cpp @@ -96,8 +96,6 @@ void korgz3_state::io_map(address_map &map) void korgz3_state::synth_map(address_map &map) { - map(0x0000, 0x0027).m(m_synthcpu, FUNC(hd6301y_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); map(0x2000, 0x2000).nopr(); map(0x3800, 0x3801).rw("ymsnd", FUNC(ym2414_device::read), FUNC(ym2414_device::write)); map(0x4000, 0x7fff).ram().share("nvram"); diff --git a/src/mame/mg1/mg1.cpp b/src/mame/mg1/mg1.cpp index cf5b44892b1..dd893ba121c 100644 --- a/src/mame/mg1/mg1.cpp +++ b/src/mame/mg1/mg1.cpp @@ -63,7 +63,6 @@ public: , m_ram(*this, "ram") , m_sram(*this, "sram") , m_iop(*this, "iop") - , m_iop_ram(*this, "iop_ram") , m_iop_sram(*this, "iop_sram") , m_iop_ctc(*this, "iop_ctc") , m_dma(*this, "dma%u", 0U) @@ -110,8 +109,7 @@ private: required_device m_ram; required_device m_sram; - required_device m_iop; - required_shared_ptr m_iop_ram; + required_device m_iop; required_device m_iop_sram; required_device m_iop_ctc; @@ -188,14 +186,14 @@ template void mg1_state::cpu_map(address_map &map) map(0x308700, 0x3087ff).mirror(0xcf6000).umask16(0x00ff).lrw8( [this](offs_t offset) { - return m_iop_ram[offset]; + return m_iop->dpram_r(offset); }, "iop_ram_r", [this](offs_t offset, u8 data) { - if (offset == 18 + m_iop_ram[3]) + if (offset == 18 + m_iop->dpram_r(3)) logerror("iop command %d\n", data); - m_iop_ram[offset] = data; + m_iop->dpram_w(offset, data); }, "iop_ram_w"); //map(0x308800, 0x3089ff).mirror(0xcf6000); // ctc //map(0x308a00, 0x308bff).mirror(0xcf6000); // raster-op function ctl @@ -230,7 +228,6 @@ template void mg1_state::cpu_map(address_map &map) void mg1_state::iop_map(address_map &map) { - map(0x0000, 0x001f).m(m_iop, FUNC(m6801_cpu_device::m6801_io)); map(0x0017, 0x001c).lrw8( [this](offs_t offset) { @@ -245,8 +242,6 @@ void mg1_state::iop_map(address_map &map) m_sem[offset] &= ~0x80; }, "iop_sem_w"); - map(0x0080, 0x00ff).ram().share("iop_ram"); - // i/o area //map(0x2000, 0x201f).mirror(0x1e00).lw8([this](u8 data) { logerror("mouse x counter 0x%02x\n", data); }, "mouse_x"); // mouse x counter map(0x2020, 0x2020).mirror(0x1e00).lw8([this](offs_t offset, u8 data) { logerror("host reset %x,0x%02x\n", offset, data); }, "host_reset").select(0x0100); @@ -344,7 +339,7 @@ void mg1_state::mg1(machine_config &config) NVRAM(config, m_sram); // 2xTC5516AP 2048x8 SRAM - M6801(config, m_iop, 8_MHz_XTAL / 8); // TODO: MC68121 (mode 2) + MC68121(config, m_iop, 8_MHz_XTAL / 8); // MC68121 (mode 2) m_iop->set_addrmap(0, &mg1_state::iop_map); m_iop->in_p2_cb().set([this]() { return m_iop_p2; }); diff --git a/src/mame/misc/acesp.cpp b/src/mame/misc/acesp.cpp index b0ebe6a1677..5fb8ab5d1ef 100644 --- a/src/mame/misc/acesp.cpp +++ b/src/mame/misc/acesp.cpp @@ -111,7 +111,7 @@ void ace_sp_state::ace_sp_map(address_map &map) { /**** 6303Y internal area ****/ //----- 0x0000 - 0x0027 is internal registers ----- - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6303y_cpu_device::hd6301y_io)); + //----- 0x0028 - 0x003f is external access ----- // 0x30 - to/from reel MCU // 0x31 - lamp high @@ -128,7 +128,6 @@ void ace_sp_state::ace_sp_map(address_map &map) /* 0x3e */ /* 0x3f */ //----- 0x0040 - 0x013f is internal RAM (256 bytes) ----- - map(0x0040, 0x013f).ram(); /**** regular map ****/ map(0x0140, 0x1eff).ram(); diff --git a/src/mame/misc/unktop.cpp b/src/mame/misc/unktop.cpp index b3705dd24e3..15831eddc9a 100644 --- a/src/mame/misc/unktop.cpp +++ b/src/mame/misc/unktop.cpp @@ -46,8 +46,6 @@ private: void unktop_state::program_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6303x_cpu_device::hd6301x_io)); - map(0x0040, 0x00ff).ram(); // internal RAM //map(0x6000, 0x6000).w(); //map(0x6800, 0x6800).w(); //map(0x7800, 0x7800).r(); diff --git a/src/mame/namco/baraduke.cpp b/src/mame/namco/baraduke.cpp index f78af33a669..a55a907dd35 100644 --- a/src/mame/namco/baraduke.cpp +++ b/src/mame/namco/baraduke.cpp @@ -591,15 +591,12 @@ uint8_t baraduke_state::soundkludge_r() void baraduke_state::mcu_map(address_map &map) { - map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io)); // internal registers - map(0x0080, 0x00ff).ram(); // built in RAM map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); // PSG device, shared RAM map(0x1105, 0x1105).r(FUNC(baraduke_state::soundkludge_r)); // cures speech - map(0x8000, 0xbfff).rom(); // MCU external ROM + map(0x8000, 0xbfff).rom().region("mcusub", 0); // MCU external ROM map(0x8000, 0x8000).nopw(); // watchdog reset? map(0x8800, 0x8800).nopw(); // IRQ acknowledge? map(0xc000, 0xc7ff).ram(); - map(0xf000, 0xffff).rom(); // MCU internal ROM } @@ -803,9 +800,11 @@ ROM_START( aliensec ) ROM_LOAD( "bd2_1.9a", 0x8000, 0x04000, CRC(9a0a9a87) SHA1(6d88fb5b443c822ede4884d4452e333834b16aca) ) ROM_LOAD( "bd2_2.9b", 0xc000, 0x04000, CRC(383e5458) SHA1(091f25e287f0a81649c9a4fa196ebe4112a82295) ) - ROM_REGION( 0x10000 , "mcu", 0 ) - ROM_LOAD( "bd1_4.3b", 0x8000, 0x4000, CRC(abda0fe7) SHA1(f7edcb5f9fa47bb38a8207af5678cf4ccc243547) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "bd1_4.3b", 0x0000, 0x4000, CRC(abda0fe7) SHA1(f7edcb5f9fa47bb38a8207af5678cf4ccc243547) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) @@ -833,9 +832,11 @@ ROM_START( baraduke ) ROM_LOAD( "bd1_1.9a", 0x8000, 0x04000, CRC(4e9f2bdc) SHA1(bc6e71d4d3b2064e662a105c1a77d2731070d58e) ) ROM_LOAD( "bd1_2.9b", 0xc000, 0x04000, CRC(40617fcd) SHA1(51d17f3a2fc96e13c8ef5952efece526e0fb33f4) ) - ROM_REGION( 0x10000 , "mcu", 0 ) - ROM_LOAD( "bd1_4b.3b", 0x8000, 0x4000, CRC(a47ecd32) SHA1(a2a75e65deb28224a5729ed134ee4d5ea8c50706) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "bd1_4b.3b", 0x0000, 0x4000, CRC(a47ecd32) SHA1(a2a75e65deb28224a5729ed134ee4d5ea8c50706) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) @@ -863,9 +864,11 @@ ROM_START( metrocrs ) ROM_LOAD( "mc1-1.9a", 0x8000, 0x04000, CRC(10b0977e) SHA1(6266d173b55075da1f252092bf38185880bc4969) ) ROM_LOAD( "mc1-2.9b", 0xc000, 0x04000, CRC(5c846f35) SHA1(3c98a0f1131f2e2477fc75a588123c57ff5350ad) ) - ROM_REGION( 0x10000 , "mcu", 0 ) - ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "mc1-4.3b", 0x0000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) @@ -891,9 +894,11 @@ ROM_START( metrocrsa ) ROM_LOAD( "mc2-1.9a", 0x8000, 0x04000, CRC(05a239ea) SHA1(3e7c7d305d0f48e2431d60b176a0cb451ddc4637) ) ROM_LOAD( "mc2-2.9a", 0xc000, 0x04000, CRC(db9b0e6d) SHA1(2772b59fe7dc0e78ee29dd001a6bba75b94e0334) ) - ROM_REGION( 0x10000 , "mcu", 0 ) - ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "mc1-4.3b", 0x0000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) diff --git a/src/mame/namco/namcos1.cpp b/src/mame/namco/namcos1.cpp index 3693c1f1ee5..1b3bf21b4d4 100644 --- a/src/mame/namco/namcos1.cpp +++ b/src/mame/namco/namcos1.cpp @@ -433,8 +433,6 @@ void namcos1_state::sound_map(address_map &map) void namcos1_state::mcu_map(address_map &map) { - map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); /* built in RAM */ map(0x1000, 0x1003).r(FUNC(namcos1_state::dsw_r)); map(0x1400, 0x1400).portr("CONTROL0"); map(0x1401, 0x1401).portr("CONTROL1"); @@ -445,7 +443,6 @@ void namcos1_state::mcu_map(address_map &map) map(0xd400, 0xd400).w(m_dac[1], FUNC(dac_byte_interface::data_w)); map(0xd800, 0xd800).w(FUNC(namcos1_state::mcu_bankswitch_w)); /* ROM bank selector */ map(0xf000, 0xf000).w(FUNC(namcos1_state::mcu_irq_ack_w)); - map(0xf000, 0xffff).rom().region("mcu", 0); /* internal ROM */ } diff --git a/src/mame/namco/namcos86.cpp b/src/mame/namco/namcos86.cpp index 2f057f23422..6ef60290a6a 100644 --- a/src/mame/namco/namcos86.cpp +++ b/src/mame/namco/namcos86.cpp @@ -420,12 +420,8 @@ void namcos86_state::wndrmomo_cpu2_map(address_map &map) void namcos86_state::common_mcu_map(address_map &map) { - map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); map(0x1400, 0x1fff).ram(); - map(0x8000, 0xbfff).rom(); // external ROM - map(0xf000, 0xffff).rom(); // internal ROM } void namcos86_state::hopmappy_mcu_map(address_map &map) @@ -436,6 +432,7 @@ void namcos86_state::hopmappy_mcu_map(address_map &map) map(0x2021, 0x2021).portr("IN1"); map(0x2030, 0x2030).r(FUNC(namcos86_state::dsw0_r)); map(0x2031, 0x2031).r(FUNC(namcos86_state::dsw1_r)); + map(0x8000, 0xbfff).rom().region("mcusub", 0); // external ROM map(0x8000, 0x8000).nopw(); // ??? written (not always) at end of interrupt map(0x8800, 0x8800).nopw(); // ??? written (not always) at end of interrupt } @@ -443,12 +440,13 @@ void namcos86_state::hopmappy_mcu_map(address_map &map) void namcos86_state::roishtar_mcu_map(address_map &map) { common_mcu_map(map); - map(0x2000, 0x3fff).rom(); + map(0x2000, 0x3fff).rom().region("mcusub", 0x2000); map(0x6000, 0x6001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); map(0x6020, 0x6020).portr("IN0"); map(0x6021, 0x6021).portr("IN1"); map(0x6030, 0x6030).r(FUNC(namcos86_state::dsw0_r)); map(0x6031, 0x6031).r(FUNC(namcos86_state::dsw1_r)); + map(0x8000, 0xbfff).rom().region("mcusub", 0); // external ROM map(0x8000, 0x8000).nopw(); // ??? written (not always) at end of interrupt map(0x9800, 0x9800).nopw(); // ??? written (not always) at end of interrupt } @@ -462,7 +460,7 @@ void namcos86_state::genpeitd_mcu_map(address_map &map) map(0x2821, 0x2821).portr("IN1"); map(0x2830, 0x2830).r(FUNC(namcos86_state::dsw0_r)); map(0x2831, 0x2831).r(FUNC(namcos86_state::dsw1_r)); - map(0x4000, 0x7fff).rom(); + map(0x4000, 0xbfff).rom().region("mcusub", 0); map(0xa000, 0xa000).nopw(); // ??? written (not always) at end of interrupt map(0xa800, 0xa800).nopw(); // ??? written (not always) at end of interrupt } @@ -475,7 +473,7 @@ void namcos86_state::rthunder_mcu_map(address_map &map) map(0x2021, 0x2021).portr("IN1"); map(0x2030, 0x2030).r(FUNC(namcos86_state::dsw0_r)); map(0x2031, 0x2031).r(FUNC(namcos86_state::dsw1_r)); - map(0x4000, 0x7fff).rom(); + map(0x4000, 0xbfff).rom().region("mcusub", 0); map(0xb000, 0xb000).nopw(); // ??? written (not always) at end of interrupt map(0xb800, 0xb800).nopw(); // ??? written (not always) at end of interrupt } @@ -488,7 +486,7 @@ void namcos86_state::wndrmomo_mcu_map(address_map &map) map(0x3821, 0x3821).portr("IN1"); map(0x3830, 0x3830).r(FUNC(namcos86_state::dsw0_r)); map(0x3831, 0x3831).r(FUNC(namcos86_state::dsw1_r)); - map(0x4000, 0x7fff).rom(); + map(0x4000, 0xbfff).rom().region("mcusub", 0); map(0xc000, 0xc000).nopw(); // ??? written (not always) at end of interrupt map(0xc800, 0xc800).nopw(); // ??? written (not always) at end of interrupt } @@ -1161,9 +1159,11 @@ ROM_START( skykiddx ) ROM_LOAD( "sk3-4.5v", 0x0c00, 0x0800, CRC(1bf25acc) SHA1(a8db254ba4cbb85efc232a5bf9b268534455ad4a) ) /* sprites color table */ ROM_LOAD( "sk3-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk3_4.6b", 0x8000, 0x4000, CRC(e6cae2d6) SHA1(b6598aaee0136b0980e13326cb2835aadadd9543) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "sk3_4.6b", 0x0000, 0x4000, CRC(e6cae2d6) SHA1(b6598aaee0136b0980e13326cb2835aadadd9543) ) /* subprogram for the MCU */ /* the ROM/voice expansion board is not present in this game */ ROM_END @@ -1197,9 +1197,11 @@ ROM_START( skykiddxo ) ROM_LOAD( "sk3-4.5v", 0x0c00, 0x0800, CRC(1bf25acc) SHA1(a8db254ba4cbb85efc232a5bf9b268534455ad4a) ) /* sprites color table */ ROM_LOAD( "sk3-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk3_4.6b", 0x8000, 0x4000, CRC(e6cae2d6) SHA1(b6598aaee0136b0980e13326cb2835aadadd9543) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "sk3_4.6b", 0x0000, 0x4000, CRC(e6cae2d6) SHA1(b6598aaee0136b0980e13326cb2835aadadd9543) ) /* subprogram for the MCU */ /* the ROM/voice expansion board is not present in this game */ ROM_END @@ -1232,9 +1234,11 @@ ROM_START( hopmappy ) ROM_LOAD( "hm1-4.5v", 0x0c00, 0x0800, CRC(678252b4) SHA1(9e2f7328532be3ac4b48bd5d52cd993108558452) ) /* sprites color table */ ROM_LOAD( "hm1-5.6u", 0x1400, 0x0020, CRC(475bf500) SHA1(7e6a91e57d3709a5c70786c8e3ed545ee6026d03) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "hm1_3.6b", 0x8000, 0x2000, CRC(6496e1db) SHA1(f990fb3b2f93295282e8dee4488a4c3fc5ef83d1) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "hm1_3.6b", 0x0000, 0x2000, CRC(6496e1db) SHA1(f990fb3b2f93295282e8dee4488a4c3fc5ef83d1) ) /* subprogram for the MCU */ /* the ROM/voice expansion board is not present in this game */ ROM_END @@ -1273,10 +1277,11 @@ ROM_START( roishtar ) ROM_LOAD( "ri1-4.5v", 0x0c00, 0x0800, CRC(22921617) SHA1(7304cb5a86f524f912feb8b58801393cce5d3b09) ) /* sprites color table */ ROM_LOAD( "ri1-5.6u", 0x1400, 0x0020, CRC(e2188075) SHA1(be079ace2070433d4d90c757aef3e415b4e21455) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "ri1_4.6b", 0x0000, 0x4000, CRC(552172b8) SHA1(18b35cb116baba362831fc046241895198b07a53) ) /* subprogram for the MCU */ - ROM_CONTINUE( 0x8000, 0x4000 ) - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "ri1_4.6b", 0x0000, 0x4000, CRC(552172b8) SHA1(18b35cb116baba362831fc046241895198b07a53) ) /* subprogram for the MCU */ /* the ROM/voice expansion board is not present in this game */ ROM_END @@ -1315,9 +1320,11 @@ ROM_START( genpeitd ) ROM_LOAD( "gt1-4.5v", 0x0c00, 0x0800, CRC(9f48ef17) SHA1(78c813dd57326f3f5ab785005ef89ba96303adeb) ) /* sprites color table */ ROM_LOAD( "gt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "gt1_3.6b", 0x4000, 0x8000, CRC(315cd988) SHA1(87b1a90b2a53571f7d8f9a475125f3f31ed3cb5d) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "gt1_3.6b", 0x0000, 0x8000, CRC(315cd988) SHA1(87b1a90b2a53571f7d8f9a475125f3f31ed3cb5d) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "gt1_10b.f1", 0x00000, 0x10000, CRC(5721ad0d) SHA1(f16afb3f468957a9de270366605592e14837b8c2) ) @@ -1366,9 +1373,11 @@ ROM_START( rthunder ) // program and mcu updated to rt3 ROM_LOAD( "rt1-4.5v", 0x0c00, 0x0800, CRC(1391fec9) SHA1(8ca94e22110b20d2ecdf03610bcc89ff4245920f) ) /* sprites color table */ ROM_LOAD( "rt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "rt3_4.6b", 0x4000, 0x8000, CRC(00cf293f) SHA1(bc441d21bb4c54a01d2393fbe99201714cd4439d) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "rt3_4.6b", 0x0000, 0x8000, CRC(00cf293f) SHA1(bc441d21bb4c54a01d2393fbe99201714cd4439d) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "rt1_17.f1", 0x00000, 0x10000, CRC(766af455) SHA1(8c71772795e783d6c4b88af9a311d55e363c298a) ) @@ -1418,9 +1427,11 @@ ROM_START( rthundera ) ROM_LOAD( "rt1-4.5v", 0x0c00, 0x0800, CRC(1391fec9) SHA1(8ca94e22110b20d2ecdf03610bcc89ff4245920f) ) /* sprites color table */ ROM_LOAD( "rt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "rt3_4.6b", 0x4000, 0x8000, CRC(00cf293f) SHA1(bc441d21bb4c54a01d2393fbe99201714cd4439d) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "rt3_4.6b", 0x0000, 0x8000, CRC(00cf293f) SHA1(bc441d21bb4c54a01d2393fbe99201714cd4439d) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "rt1_17.f1", 0x00000, 0x10000, CRC(766af455) SHA1(8c71772795e783d6c4b88af9a311d55e363c298a) ) @@ -1469,9 +1480,11 @@ ROM_START( rthunder2 ) // program updated to rt2, 19/20 banked CPU code updated ROM_LOAD( "rt1-4.5v", 0x0c00, 0x0800, CRC(1391fec9) SHA1(8ca94e22110b20d2ecdf03610bcc89ff4245920f) ) /* sprites color table */ ROM_LOAD( "rt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "rt2_4.6b", 0x4000, 0x8000, CRC(0387464f) SHA1(ce7f521bc2ecc6525880da2551daf595a394a275) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "rt2_4.6b", 0x0000, 0x8000, CRC(0387464f) SHA1(ce7f521bc2ecc6525880da2551daf595a394a275) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "rt1_17.f1", 0x00000, 0x10000, CRC(766af455) SHA1(8c71772795e783d6c4b88af9a311d55e363c298a) ) @@ -1521,9 +1534,11 @@ ROM_START( rthunder1 ) // some roms (mcu + samples) and maybe r19 updated to rt2 ROM_LOAD( "rt1-4.5v", 0x0c00, 0x0800, CRC(1391fec9) SHA1(8ca94e22110b20d2ecdf03610bcc89ff4245920f) ) /* sprites color table */ ROM_LOAD( "rt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "rt2_4.6b", 0x4000, 0x8000, CRC(0387464f) SHA1(ce7f521bc2ecc6525880da2551daf595a394a275) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "rt2_4.6b", 0x0000, 0x8000, CRC(0387464f) SHA1(ce7f521bc2ecc6525880da2551daf595a394a275) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "rt1_17.f1", 0x00000, 0x10000, CRC(766af455) SHA1(8c71772795e783d6c4b88af9a311d55e363c298a) ) @@ -1573,9 +1588,11 @@ ROM_START( rthunder0 ) ROM_LOAD( "rt1-4.5v", 0x0c00, 0x0800, CRC(1391fec9) SHA1(8ca94e22110b20d2ecdf03610bcc89ff4245920f) ) /* sprites color table */ ROM_LOAD( "rt1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "rt1_4.6b", 0x4000, 0x8000, CRC(3f795094) SHA1(390eef98e3dec690bf942c35617e2fa004c96e5c) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "rt1_4.6b", 0x0000, 0x8000, CRC(3f795094) SHA1(390eef98e3dec690bf942c35617e2fa004c96e5c) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "rt1_17.f1", 0x00000, 0x10000, CRC(766af455) SHA1(8c71772795e783d6c4b88af9a311d55e363c298a) ) @@ -1626,9 +1643,11 @@ ROM_START( wndrmomo ) ROM_LOAD( "wm1-4.5v", 0x0c00, 0x0800, CRC(f4e83e0b) SHA1(b000d884c6e0373b0403bc9d63eb0452c1197491) ) /* sprites color table */ ROM_LOAD( "wm1-5.6u", 0x1400, 0x0020, CRC(e4130804) SHA1(e1a3e1383186d036fba6dc8a8681f48f24f59281) ) /* tile address decoder (used at runtime) */ - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "wm1_3.6b", 0x4000, 0x8000, CRC(55f01df7) SHA1(c11574a8b51bf965790b97895452e9fa9ab6b752) ) /* subprogram for the MCU */ - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */ + + ROM_REGION( 0x8000, "mcusub", 0 ) + ROM_LOAD( "wm1_3.6b", 0x0000, 0x8000, CRC(55f01df7) SHA1(c11574a8b51bf965790b97895452e9fa9ab6b752) ) /* subprogram for the MCU */ ROM_REGION( 0x40000, "user1", 0 ) /* bank switched data for CPU1 */ ROM_LOAD( "wm1_16.f1", 0x00000, 0x10000, CRC(e565f8f3) SHA1(e1f417003ef9f700f9d5ed091484463c704c8b9f) ) diff --git a/src/mame/namco/pacland.cpp b/src/mame/namco/pacland.cpp index 95d08594902..f8265f8515c 100644 --- a/src/mame/namco/pacland.cpp +++ b/src/mame/namco/pacland.cpp @@ -756,15 +756,12 @@ void pacland_state::main_map(address_map &map) void pacland_state::mcu_map(address_map &map) { - map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); // PSG device, shared RAM map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // watchdog? map(0x4000, 0x7fff).w(FUNC(pacland_state::mcu_irq_ctrl_w)); - map(0x8000, 0xbfff).rom(); + map(0x8000, 0x9fff).rom().region("mcusub", 0); map(0xc000, 0xc7ff).ram(); map(0xd000, 0xd003).r(FUNC(pacland_state::input_r)); - map(0xf000, 0xffff).rom(); } @@ -941,9 +938,11 @@ ROM_START( pacland ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl3_6.8j", 0x1c000, 0x4000, CRC(2ffe3319) SHA1(c2540321cd5a1fe29ecb077abdf8f997893192e9) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl2_12.6n", 0x00000, 0x2000, CRC(a63c8726) SHA1(b15903fa2267375280af03af0a7157e1b0bcb86d) ) @@ -975,9 +974,11 @@ ROM_START( paclandj ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl1_6.8j", 0x1c000, 0x4000, CRC(b01e59a9) SHA1(e5b093852d33a4d09969d111fa6e42e964aa4dac) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl6_12.6n", 0x00000, 0x2000, CRC(c8cb61ab) SHA1(ec33d64949a8c011430e889f55f54816b33c4218) ) @@ -1009,9 +1010,11 @@ ROM_START( paclandjo ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl1_6.8j", 0x1c000, 0x4000, CRC(b01e59a9) SHA1(e5b093852d33a4d09969d111fa6e42e964aa4dac) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl1_12.6n", 0x00000, 0x2000, CRC(c159fbce) SHA1(b0326c85b7df407f3e94c38a5971f911968d7b27) ) @@ -1043,9 +1046,11 @@ ROM_START( paclandjo2 ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl1_6.8j", 0x1c000, 0x4000, CRC(b01e59a9) SHA1(e5b093852d33a4d09969d111fa6e42e964aa4dac) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl1_12.6n", 0x00000, 0x2000, CRC(c159fbce) SHA1(b0326c85b7df407f3e94c38a5971f911968d7b27) ) @@ -1077,9 +1082,11 @@ ROM_START( paclandm ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl1_6.8j", 0x1c000, 0x4000, CRC(b01e59a9) SHA1(e5b093852d33a4d09969d111fa6e42e964aa4dac) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // internal code from the MCU + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) // sub program for the MCU ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl1_12.6n", 0x00000, 0x2000, CRC(c159fbce) SHA1(b0326c85b7df407f3e94c38a5971f911968d7b27) ) @@ -1110,9 +1117,11 @@ ROM_START( paclandm2 ) ROM_LOAD( "pl1_5.8h", 0x18000, 0x4000, CRC(7af66200) SHA1(f44161ded1633e9801b7a9cd84d481e53823f5d9) ) ROM_LOAD( "pl3_6.8j", 0x1c000, 0x4000, CRC(2ffe3319) SHA1(c2540321cd5a1fe29ecb077abdf8f997893192e9) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "pl1_7.3e", 0x8000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "pl1_7.3e", 0x0000, 0x2000, CRC(8c5becae) SHA1(14d67136395c4c64472980a69648ce2d479ae67f) ) ROM_REGION( 0x02000, "fg_chars", 0 ) ROM_LOAD( "pl2_12.6n", 0x00000, 0x2000, CRC(a63c8726) SHA1(b15903fa2267375280af03af0a7157e1b0bcb86d) ) diff --git a/src/mame/namco/skykid.cpp b/src/mame/namco/skykid.cpp index 018a8f76bb8..b625a99e4a9 100644 --- a/src/mame/namco/skykid.cpp +++ b/src/mame/namco/skykid.cpp @@ -462,14 +462,11 @@ void skykid_state::main_map(address_map &map) void skykid_state::mcu_map(address_map &map) { - map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); // PSG device, shared RAM/ map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // ? map(0x4000, 0x7fff).w(FUNC(skykid_state::irq_2_ctrl_w)); - map(0x8000, 0xbfff).rom(); + map(0x8000, 0x9fff).rom().region("mcusub", 0); map(0xc000, 0xc7ff).ram(); - map(0xf000, 0xffff).rom(); } @@ -745,9 +742,11 @@ ROM_START( skykid ) // a PCB was found with ROM 4 and 6 labeled sk1, but hashes ROM_LOAD( "sk1-1c.6b", 0x0c000, 0x4000, CRC(7abe6c6c) SHA1(7d2631cc6149fa3e02b1355cb899de5474ff5d0a) ) ROM_LOAD( "sk1_3.6d", 0x10000, 0x4000, CRC(314b8765) SHA1(d90a8a853ce672fe5ee190f07bcb33262c73df3b) ) // banked ROM - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk2_4.3c", 0x8000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU - ROM_LOAD( "cus63-63a1.mcu", 0xf000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus63-63a1.mcu", 0x0000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "sk2_4.3c", 0x0000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "sk1_6.6l", 0x0000, 0x2000, CRC(58b731b9) SHA1(40f7be85914833ce02a734c20d68c0db8b77911d) ) @@ -775,9 +774,11 @@ ROM_START( skykido ) ROM_LOAD( "sk1_1.6b", 0x0c000, 0x4000, CRC(070a49d4) SHA1(4b994bde3e34b574bd927843804d2fb1a08d1bdf) ) ROM_LOAD( "sk1_3.6d", 0x10000, 0x4000, CRC(314b8765) SHA1(d90a8a853ce672fe5ee190f07bcb33262c73df3b) ) // banked ROM - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk2_4.3c", 0x8000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU - ROM_LOAD( "cus63-63a1.mcu", 0xf000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus63-63a1.mcu", 0x0000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "sk2_4.3c", 0x0000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "sk1_6.6l", 0x0000, 0x2000, CRC(58b731b9) SHA1(40f7be85914833ce02a734c20d68c0db8b77911d) ) @@ -805,9 +806,11 @@ ROM_START( skykidd ) ROM_LOAD( "sk1_1.6b", 0x0c000, 0x4000, CRC(070a49d4) SHA1(4b994bde3e34b574bd927843804d2fb1a08d1bdf) ) ROM_LOAD( "sk1_3.6d", 0x10000, 0x4000, CRC(314b8765) SHA1(d90a8a853ce672fe5ee190f07bcb33262c73df3b) ) // banked ROM - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk1_4.3c", 0x8000, 0x2000, CRC(887137cc) SHA1(dd0f66afb78833c4da73539b692854346f448c0d) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "sk1_4.3c", 0x0000, 0x2000, CRC(887137cc) SHA1(dd0f66afb78833c4da73539b692854346f448c0d) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "sk1_6.6l", 0x0000, 0x2000, CRC(58b731b9) SHA1(40f7be85914833ce02a734c20d68c0db8b77911d) ) @@ -835,9 +838,11 @@ ROM_START( skykids ) ROM_LOAD( "sk1a.6b", 0x0c000, 0x4000, CRC(e16abe25) SHA1(78e0d30b15fb62c4399d847784ddc61f6819feba) ) ROM_LOAD( "sk1_3.6d", 0x10000, 0x4000, CRC(314b8765) SHA1(d90a8a853ce672fe5ee190f07bcb33262c73df3b) ) // banked ROM - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "sk2_4.3c", 0x8000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU - ROM_LOAD( "cus63-63a1.mcu", 0xf000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus63-63a1.mcu", 0x0000, 0x1000, CRC(6ef08fb3) SHA1(4842590d60035a0059b0899eb2d5f58ae72c2529) ) // MCU internal code + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "sk2_4.3c", 0x0000, 0x2000, CRC(a460d0e0) SHA1(7124ffeb3b84b282940dcbf9421ae4934bcce1c8) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "sk1_6.6l", 0x0000, 0x2000, CRC(58b731b9) SHA1(40f7be85914833ce02a734c20d68c0db8b77911d) ) @@ -865,9 +870,11 @@ ROM_START( drgnbstr ) ROM_LOAD( "db1_1.6b", 0x0c000, 0x04000, CRC(1c7c1821) SHA1(8b6111afc42e2996bdc2fc276be0c40556cd431e) ) ROM_LOAD( "db1_3.6d", 0x10000, 0x04000, CRC(6da169ae) SHA1(235211c26562fef0660e3fde1e87f2e52626d119) ) // banked ROM - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "db1_4.3c", 0x8000, 0x02000, CRC(8a0b1fc1) SHA1(c2861d0da63e2d17f2d1ad46dccf753ecd902ce3) ) // subprogram for the MCU - ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x01000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) // MCU internal code + + ROM_REGION( 0x2000, "mcusub", 0 ) + ROM_LOAD( "db1_4.3c", 0x0000, 0x2000, CRC(8a0b1fc1) SHA1(c2861d0da63e2d17f2d1ad46dccf753ecd902ce3) ) // subprogram for the MCU ROM_REGION( 0x02000, "chars", 0 ) ROM_LOAD( "db1_6.6l", 0x0000, 0x2000, CRC(c080b66c) SHA1(05dcd45274d0bd12ef8ae7fd10c8719e679b3e7b) ) diff --git a/src/mame/namco/tceptor.cpp b/src/mame/namco/tceptor.cpp index 2b92e6bfb71..226b9432f70 100644 --- a/src/mame/namco/tceptor.cpp +++ b/src/mame/namco/tceptor.cpp @@ -155,8 +155,6 @@ void tceptor_state::m68k_map(address_map &map) void tceptor_state::mcu_map(address_map &map) { - map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram(); map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); map(0x1400, 0x154d).ram(); map(0x17c0, 0x17ff).ram(); @@ -167,10 +165,9 @@ void tceptor_state::mcu_map(address_map &map) map(0x2201, 0x2201).r(FUNC(tceptor_state::input1_r)); map(0x8000, 0x8000).w(FUNC(tceptor_state::mcu_irq_disable_w)); map(0x8800, 0x8800).w(FUNC(tceptor_state::mcu_irq_enable_w)); - map(0x8000, 0xbfff).rom(); + map(0x8000, 0xbfff).rom().region("mcusub", 0); map(0xc000, 0xc7ff).ram(); map(0xc800, 0xdfff).ram().share("nvram"); // Battery Backup - map(0xf000, 0xffff).rom(); } @@ -376,9 +373,11 @@ ROM_START( tceptor ) ROM_LOAD16_BYTE( "tc1-3.10c", 0x000001, 0x08000, CRC(779a4b25) SHA1(8563213a1f1caee0eb88aa4bbd37c6004f16b309) ) // socket 8d and 10d are emtpy - ROM_REGION( 0x10000, "mcu", 0 ) // Custom 60A1 - ROM_LOAD( "tc1-2.3a", 0x08000, 0x4000, CRC(b6def610) SHA1(d0eada92a25d0243206fb8239374f5757caaea47) ) /* subprogram for the mcu */ - ROM_LOAD( "cus60-60a1.mcu", 0x0f000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* mcu internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) // Custom 60A1 + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* mcu internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "tc1-2.3a", 0x0000, 0x4000, CRC(b6def610) SHA1(d0eada92a25d0243206fb8239374f5757caaea47) ) /* subprogram for the mcu */ ROM_REGION( 0x02000, "gfx1", 0 ) // text tilemap ROM_LOAD( "tc1-18.6b", 0x00000, 0x02000, CRC(662b5650) SHA1(ba82fe5efd1011854a6d0d7d87075475b65c0601) ) @@ -433,9 +432,11 @@ ROM_START( tceptor2 ) ROM_LOAD16_BYTE( "tc2-6.8d", 0x100000, 0x08000, CRC(20711f14) SHA1(39623592bb4be3b3be2bff4b3219ac16ba612761) ) ROM_LOAD16_BYTE( "tc2-5.10d", 0x100001, 0x08000, CRC(925f2560) SHA1(81fcef6a9c7e9dfb6884043cf2266854bc87cd69) ) - ROM_REGION( 0x10000, "mcu", 0 ) // Custom 60A1 - ROM_LOAD( "tc1-2.3a", 0x08000, 0x4000, CRC(b6def610) SHA1(d0eada92a25d0243206fb8239374f5757caaea47) ) /* subprogram for the mcu */ - ROM_LOAD( "cus60-60a1.mcu", 0x0f000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* mcu internal code */ + ROM_REGION( 0x1000, "mcu", 0 ) // Custom 60A1 + ROM_LOAD( "cus60-60a1.mcu", 0x0000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* mcu internal code */ + + ROM_REGION( 0x4000, "mcusub", 0 ) + ROM_LOAD( "tc1-2.3a", 0x0000, 0x4000, CRC(b6def610) SHA1(d0eada92a25d0243206fb8239374f5757caaea47) ) /* subprogram for the mcu */ ROM_REGION( 0x02000, "gfx1", 0 ) // text tilemap ROM_LOAD( "tc1-18.6b", 0x00000, 0x02000, CRC(662b5650) SHA1(ba82fe5efd1011854a6d0d7d87075475b65c0601) ) diff --git a/src/mame/novag/snova.cpp b/src/mame/novag/snova.cpp index 9d76609cbf4..2d341c63ae5 100644 --- a/src/mame/novag/snova.cpp +++ b/src/mame/novag/snova.cpp @@ -241,8 +241,6 @@ void snova_state::p6_w(u8 data) void snova_state::supremo_map(address_map &map) { - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6303y_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); // internal map(0x4000, 0x47ff).ram(); map(0x8000, 0xffff).rom(); } diff --git a/src/mame/psion/psion.cpp b/src/mame/psion/psion.cpp index 5c1da0365fa..e15080ccf17 100644 --- a/src/mame/psion/psion.cpp +++ b/src/mame/psion/psion.cpp @@ -232,29 +232,18 @@ uint8_t psion1_state::switchoff_r() return 0; } -void psion_state::psion_int_reg(address_map &map) -{ - // FIXME: this should all be made internal to the CPU device - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301x_cpu_device::hd6301x_io)); -} - void psion1_state::psion1_mem(address_map &map) { - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x2000, 0x2001).mirror(0x07fe).rw(m_lcdc, FUNC(hd44780_device::read), FUNC(hd44780_device::write)); map(0x2800, 0x2800).r(FUNC(psion1_state::reset_kb_counter_r)); map(0x2e00, 0x2e00).r(FUNC(psion1_state::switchoff_r)); map(0x3000, 0x3000).r(FUNC(psion1_state::inc_kb_counter_r)); map(0x4000, 0x47ff).ram().share("ram"); - map(0xf000, 0xffff).rom(); } void psion_state::psioncm_mem(address_map &map) { map.unmap_value_low(); - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w)); map(0x2000, 0x3fff).ram().share("ram"); map(0x8000, 0xffff).rom(); @@ -263,8 +252,6 @@ void psion_state::psioncm_mem(address_map &map) void psion_state::psionla_mem(address_map &map) { map.unmap_value_low(); - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w)); map(0x0400, 0x5fff).ram().share("ram"); map(0x8000, 0xffff).rom(); @@ -273,8 +260,6 @@ void psion_state::psionla_mem(address_map &map) void psion_state::psionp350_mem(address_map &map) { map.unmap_value_low(); - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w)); map(0x0400, 0x3fff).ram().share("ram"); map(0x4000, 0x7fff).bankrw("rambank"); @@ -284,8 +269,6 @@ void psion_state::psionp350_mem(address_map &map) void psion_state::psionlam_mem(address_map &map) { map.unmap_value_low(); - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w)); map(0x0400, 0x7fff).ram().share("ram"); map(0x8000, 0xbfff).bankr("rombank"); @@ -295,8 +278,6 @@ void psion_state::psionlam_mem(address_map &map) void psion_state::psionlz_mem(address_map &map) { map.unmap_value_low(); - psion_int_reg(map); - map(0x0040, 0x00ff).ram().share("sys_register"); map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w)); map(0x0400, 0x3fff).ram().share("ram"); map(0x4000, 0x7fff).bankrw("rambank"); @@ -469,7 +450,6 @@ void psion_state::machine_start() membank("rambank")->set_entry(0); } - m_nvram1->set_base(m_sys_register, 0xc0); m_nvram2->set_base(m_ram, m_ram.bytes()); if (m_nvram3) m_nvram3->set_base(m_paged_ram.get(), m_ram_bank_count * 0x4000); @@ -575,7 +555,7 @@ void psion_state::psion_2lines(machine_config &config) SPEAKER(config, "mono").front_center(); BEEP(config, m_beep, 3250).add_route(ALL_OUTPUTS, "mono", 1.00); - NVRAM(config, "nvram1"); // sys_regs + //NVRAM(config, "nvram1"); // sys_regs NVRAM(config, "nvram2", nvram_device::DEFAULT_ALL_0); // RAM TIMER(config, "nmi_timer").configure_periodic(FUNC(psion_state::nmi_timer), attotime::from_seconds(1)); @@ -670,9 +650,9 @@ void psion_state::psionlz(machine_config &config) /* ROM definition */ ROM_START( psion1 ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS(0, "v1", "Organiser I") - ROMX_LOAD( "psion1.rom", 0xf000, 0x1000, CRC(7e2609c1) SHA1(a3320ea8ac3ab9e0039ee16f7c571731adde5869), ROM_BIOS(0)) + ROMX_LOAD( "psion1.rom", 0x0000, 0x1000, CRC(7e2609c1) SHA1(a3320ea8ac3ab9e0039ee16f7c571731adde5869), ROM_BIOS(0)) ROM_END ROM_START( psioncm ) diff --git a/src/mame/roland/roland_tr505.cpp b/src/mame/roland/roland_tr505.cpp index 1c8636745d9..88ed612381e 100644 --- a/src/mame/roland/roland_tr505.cpp +++ b/src/mame/roland/roland_tr505.cpp @@ -32,28 +32,17 @@ public: void tr505(machine_config &config); private: - void mem_map(address_map &map); - required_device m_maincpu; required_device m_mac; }; -void roland_tr505_state::mem_map(address_map &map) -{ - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6301y0_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); // internal RAM - map(0xc000, 0xffff).rom().region("maincpu", 0); // internal ROM -} - - static INPUT_PORTS_START(tr505) INPUT_PORTS_END void roland_tr505_state::tr505(machine_config &config) { HD6301Y0(config, m_maincpu, 4_MHz_XTAL); // HD6301Y0A in single chip mode (MP0 = MP1 = +5V) - m_maincpu->set_addrmap(AS_PROGRAM, &roland_tr505_state::mem_map); m_maincpu->set_disable(); //NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5517APL + battery diff --git a/src/mame/roland/roland_tr707.cpp b/src/mame/roland/roland_tr707.cpp index 236763a9dea..d66e1a1bf76 100644 --- a/src/mame/roland/roland_tr707.cpp +++ b/src/mame/roland/roland_tr707.cpp @@ -98,8 +98,6 @@ void roland_tr707_state::voice_select_w(u8 data) void roland_tr707_state::mem_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6303x_cpu_device::hd6301x_io)); - map(0x0040, 0x00ff).ram(); // internal RAM map(0x0800, 0x0800).mirror(0x7ff).r(FUNC(roland_tr707_state::key_scan_r)); //map(0x1000, 0x1000).mirror(0xfff).rw("lcdd", FUNC(hd61602_device::ready_r), FUNC(hd61602_device::write)); map(0x2000, 0x27ff).ram().share("nvram1"); diff --git a/src/mame/saitek/ccompan2.cpp b/src/mame/saitek/ccompan2.cpp index 52f1ba81a69..33f686f607e 100644 --- a/src/mame/saitek/ccompan2.cpp +++ b/src/mame/saitek/ccompan2.cpp @@ -98,9 +98,6 @@ private: required_device m_display; required_ioport_array<8+1> m_inputs; - // address maps - void main_map(address_map &map); - // I/O handlers u8 input1_r(); u8 input2_r(); @@ -230,19 +227,6 @@ void ccompan2_state::led_w(u8 data) -/******************************************************************************* - Address Maps -*******************************************************************************/ - -void ccompan2_state::main_map(address_map &map) -{ - map(0x0000, 0x0014).m(m_maincpu, FUNC(hd6301v1_cpu_device::m6801_io)); - map(0x0080, 0x00ff).ram().share("internal"); // internal - map(0xf000, 0xffff).rom(); // internal -} - - - /******************************************************************************* Input Ports *******************************************************************************/ @@ -341,7 +325,6 @@ void ccompan2_state::expchess(machine_config &config) { // basic machine hardware HD6301V1(config, m_maincpu, 3000000); // approximation, no XTAL - m_maincpu->set_addrmap(AS_PROGRAM, &ccompan2_state::main_map); m_maincpu->nvram_enable_backup(true); m_maincpu->standby_cb().set(FUNC(ccompan2_state::standby)); m_maincpu->in_p1_cb().set(FUNC(ccompan2_state::input1_r)); diff --git a/src/mame/saitek/leonardo.cpp b/src/mame/saitek/leonardo.cpp index 3b5acd59c71..5929a7466af 100644 --- a/src/mame/saitek/leonardo.cpp +++ b/src/mame/saitek/leonardo.cpp @@ -291,9 +291,7 @@ void leo_state::p6_w(u8 data) void leo_state::main_map(address_map &map) { - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6303y_cpu_device::hd6301y_io)); map(0x0002, 0x0002).rw(FUNC(leo_state::unk_r), FUNC(leo_state::unk_w)); // external - map(0x0040, 0x013f).ram().share("internal"); // internal map(0x4000, 0x5fff).ram().share("nvram"); map(0x6000, 0x6000).w(FUNC(leo_state::mux_w)); map(0x7000, 0x7000).w(FUNC(leo_state::leds_w)); diff --git a/src/mame/saitek/renaissance.cpp b/src/mame/saitek/renaissance.cpp index ede99f36b7c..52d89b92f7e 100644 --- a/src/mame/saitek/renaissance.cpp +++ b/src/mame/saitek/renaissance.cpp @@ -306,8 +306,6 @@ void ren_state::p6_w(u8 data) void ren_state::main_map(address_map &map) { - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6303y_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram().share("internal"); // internal map(0x2000, 0x2000).w(FUNC(ren_state::mux_w)); map(0x2400, 0x2400).w(FUNC(ren_state::leds_w)); map(0x2600, 0x2600).rw(FUNC(ren_state::control_r), FUNC(ren_state::control_w)); diff --git a/src/mame/skeleton/rvoice.cpp b/src/mame/skeleton/rvoice.cpp index 5964d2c5bbe..34fcf6509c8 100644 --- a/src/mame/skeleton/rvoice.cpp +++ b/src/mame/skeleton/rvoice.cpp @@ -53,10 +53,8 @@ void rvoice_state::init_rvoicepc() void rvoice_state::hd63701_main_mem(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6301y_cpu_device::hd6301y_io)); // INTERNAL REGS map(0x001e, 0x001e).nopr(); // FIXME: TRCSR2 needs implementation map(0x0034, 0x0037).rw("acia65c51", FUNC(mos6551_device::read), FUNC(mos6551_device::write)); // ACIA 65C51 - map(0x0040, 0x013f).ram(); // INTERNAL RAM map(0x2000, 0x7fff).ram(); // EXTERNAL SRAM map(0x8000, 0xffff).rom(); // 27512 EPROM } @@ -96,7 +94,7 @@ INPUT_PORTS_END void rvoice_state::rvoicepc(machine_config &config) { /* basic machine hardware */ - HD63701Y0(config, m_maincpu, XTAL(7'372'800)); + HD6303Y(config, m_maincpu, XTAL(7'372'800)); m_maincpu->set_addrmap(AS_PROGRAM, &rvoice_state::hd63701_main_mem); m_maincpu->in_p5_cb().set_ioport("PARITY"); m_maincpu->in_p6_cb().set_ioport("BAUD"); diff --git a/src/mame/taito/bublbobl.cpp b/src/mame/taito/bublbobl.cpp index 225b26b7e52..749fc41f2a0 100644 --- a/src/mame/taito/bublbobl.cpp +++ b/src/mame/taito/bublbobl.cpp @@ -355,13 +355,6 @@ void bublbobl_state::sound_map(address_map &map) map(0xe000, 0xffff).rom(); // space for diagnostic ROM? } -void bublbobl_state::mcu_map(address_map &map) -{ - map(0x0000, 0x0007).m(m_mcu, FUNC(m6801_cpu_device::m6801_io)); - map(0x0040, 0x00ff).ram(); // internal - map(0xf000, 0xffff).rom(); -} - void bublbobl_state::bootleg_map(address_map &map) { common_maincpu_map(map); @@ -989,8 +982,7 @@ void bublbobl_state::bublbobl(machine_config &config) bublbobl_nomcu(config); m_maincpu->set_irq_acknowledge_callback(FUNC(bublbobl_state::mcram_vect_r)); - auto &mcu(M6801(config, "mcu", XTAL(4'000'000))); // actually 6801U4 - xtal is 4MHz, divided by 4 internally - mcu.set_addrmap(AS_PROGRAM, &bublbobl_state::mcu_map); + auto &mcu(M6801U4(config, "mcu", XTAL(4'000'000))); // xtal is 4MHz, divided by 4 internally mcu.in_p1_cb().set_ioport("IN0"); mcu.out_p1_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port1_w)); mcu.out_p2_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port2_w)); @@ -1325,8 +1317,8 @@ ROM_START( bublbobl ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */ - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ @@ -1374,8 +1366,8 @@ ROM_START( bublbobl1 ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */ - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ @@ -1423,8 +1415,8 @@ ROM_START( bublboblr ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */ - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ @@ -1472,8 +1464,8 @@ ROM_START( bublboblr1 ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */ - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ @@ -1825,7 +1817,7 @@ ROM_START( bub68705 ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ ROM_LOAD( "1.bin", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x800, "mcu", 0 ) /* 64k for the MCU */ + ROM_REGION( 0x800, "mcu", 0 ) ROM_LOAD( "68705.bin", 0x000, 0x800, CRC(78caa635) SHA1(a756e45b25b007843ba4f2204cad6081cf7260e9) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) @@ -1931,8 +1923,8 @@ ROM_START( bublcave ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ @@ -2002,8 +1994,8 @@ ROM_START( bublcave11 ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ @@ -2034,8 +2026,8 @@ ROM_START( bublcave10 ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) - ROM_REGION( 0x10000, "mcu", 0 ) - ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) + ROM_REGION( 0x1000, "mcu", 0 ) + ROM_LOAD( "a78-01.17", 0x0000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ diff --git a/src/mame/taito/bublbobl.h b/src/mame/taito/bublbobl.h index 29c0b44317b..a0b8cecc1c3 100644 --- a/src/mame/taito/bublbobl.h +++ b/src/mame/taito/bublbobl.h @@ -120,7 +120,6 @@ public: void bootleg_map(address_map &map); void bublbobl_maincpu_map(address_map &map); void common_maincpu_map(address_map &map); - void mcu_map(address_map &map); void sound_map(address_map &map); void subcpu_map(address_map &map); void tokio_map(address_map &map); diff --git a/src/mame/taito/bublbobl_m.cpp b/src/mame/taito/bublbobl_m.cpp index 98930a97262..1eb98404189 100644 --- a/src/mame/taito/bublbobl_m.cpp +++ b/src/mame/taito/bublbobl_m.cpp @@ -201,6 +201,7 @@ void bublbobl_state::bublbobl_mcu_port2_w(uint8_t data) else if ((address & 0x0c00) == 0x0c00) m_port3_in = m_mcu_sharedram[address & 0x03ff]; // logerror("reading %02x from shared RAM %04x\n", m_port3_in, address); + m_mcu->pulse_input_line(M6801_IS3_LINE, attotime::from_usec(1)); } else { diff --git a/src/mame/taito/kikikai.cpp b/src/mame/taito/kikikai.cpp index ca83020ee9d..043daeb5180 100644 --- a/src/mame/taito/kikikai.cpp +++ b/src/mame/taito/kikikai.cpp @@ -224,13 +224,6 @@ void kikikai_state::kicknrun_sub_cpu_map(address_map &map) map(0xc004, 0xc004).w(FUNC(kikikai_state::kicknrun_sub_output_w)); } -void kikikai_state::mcu_map(address_map &map) -{ - map(0x0000, 0x0007).m(m_mcu, FUNC(m6801_cpu_device::m6801_io)); - map(0x0040, 0x00ff).ram(); // internal - map(0xf000, 0xffff).rom(); -} - /************************************* * * Input ports @@ -742,8 +735,7 @@ void kikikai_state::kicknrun(machine_config& config) m_maincpu->set_vblank_int("screen", FUNC(kikikai_state::kikikai_interrupt)); m_maincpu->set_irq_acknowledge_callback(FUNC(kikikai_state::mcram_vect_r)); - M6801(config, m_mcu, XTAL(4'000'000)); // actually 6801U4 - xtal is 4MHz, divided by 4 internally - m_mcu->set_addrmap(AS_PROGRAM, &kikikai_state::mcu_map); + M6801U4(config, m_mcu, XTAL(4'000'000)); // xtal is 4MHz, divided by 4 internally m_mcu->in_p1_cb().set_ioport("IN0"); m_mcu->out_p1_cb().set(FUNC(kikikai_state::kikikai_mcu_port1_w)); m_mcu->out_p2_cb().set(FUNC(kikikai_state::kikikai_mcu_port2_w)); @@ -817,9 +809,9 @@ ROM_START( kikikai ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a85-11.f6", 0x0000, 0x8000, CRC(cc3539db) SHA1(4239a40fdee65cba613e4b4ec54cf7899480e366) ) - ROM_REGION( 0x0800, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ + ROM_REGION( 0x1000, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ /* MCU labeled TAITO A85 01, JPH1020P, 185, PS4 */ - ROM_LOAD( "a85-01.g8", 0x0000, 0x0800, NO_DUMP ) + ROM_LOAD( "a85-01.g8", 0x0000, 0x1000, NO_DUMP ) ROM_REGION( 0x40000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "a85-15.a1", 0x00000, 0x10000, CRC(aebc8c32) SHA1(77347cf5780f084a77123eb636cd0bad672a39e8) ) @@ -888,8 +880,8 @@ ROM_START( kicknrun ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a87-06.f6", 0x0000, 0x8000, CRC(1625b587) SHA1(7336384e13c114915de5e439df5731ce3fc2054a) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ - ROM_LOAD( "a87-01_jph1021p.h8", 0xf000, 0x1000, CRC(9451e880) SHA1(e9a505296108645f99449d391d0ebe9ac1b9984e) ) /* MCU labeled TAITO A87-01, JPH1021P, 185, PS4 */ + ROM_REGION( 0x1000, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ + ROM_LOAD( "a87-01_jph1021p.h8", 0x0000, 0x1000, CRC(9451e880) SHA1(e9a505296108645f99449d391d0ebe9ac1b9984e) ) /* MCU labeled TAITO A87-01, JPH1021P, 185, PS4 */ ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the cpu on the sub board */ ROM_LOAD( "a87-09-1", 0x0000, 0x4000, CRC(6a2ad32f) SHA1(42d4b97b25d219902ad215793f1d2c006ffe94dc) ) @@ -919,8 +911,8 @@ ROM_START( kicknrunu ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a87-06.f6", 0x0000, 0x8000, CRC(1625b587) SHA1(7336384e13c114915de5e439df5731ce3fc2054a) ) - ROM_REGION( 0x10000, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ - ROM_LOAD( "a87-01_jph1021p.h8", 0xf000, 0x1000, CRC(9451e880) SHA1(e9a505296108645f99449d391d0ebe9ac1b9984e) ) /* MCU labeled TAITO A87-01, JPH1021P, 185, PS4 */ + ROM_REGION( 0x1000, "mcu", 0 ) /* 4k for the microcontroller (MC6801U4 type MCU) */ + ROM_LOAD( "a87-01_jph1021p.h8", 0x0000, 0x1000, CRC(9451e880) SHA1(e9a505296108645f99449d391d0ebe9ac1b9984e) ) /* MCU labeled TAITO A87-01, JPH1021P, 185, PS4 */ ROM_REGION( 0x10000, "sub", 0 ) /* 64k for the cpu on the sub board */ ROM_LOAD( "a87-09-1", 0x0000, 0x4000, CRC(6a2ad32f) SHA1(42d4b97b25d219902ad215793f1d2c006ffe94dc) ) diff --git a/src/mame/taito/kikikai.h b/src/mame/taito/kikikai.h index 96c88a48800..503a061b14f 100644 --- a/src/mame/taito/kikikai.h +++ b/src/mame/taito/kikikai.h @@ -73,7 +73,6 @@ private: void main_map(address_map &map); void sound_map(address_map &map); void kicknrun_sub_cpu_map(address_map &map); - void mcu_map(address_map& map); void knightba_main_map(address_map &map); /* Kiki KaiKai / Kick 'n Run MCU */ diff --git a/src/mame/taito/kikikai_m.cpp b/src/mame/taito/kikikai_m.cpp index c981460c085..aed7ef17ef5 100644 --- a/src/mame/taito/kikikai_m.cpp +++ b/src/mame/taito/kikikai_m.cpp @@ -391,6 +391,7 @@ void kikikai_state::kikikai_mcu_port2_w(uint8_t data) { m_port3_in = ioport(portnames[address & 1])->read(); } + m_mcu->pulse_input_line(M6801_IS3_LINE, attotime::from_usec(1)); } else { diff --git a/src/mame/technos/ddragon.cpp b/src/mame/technos/ddragon.cpp index 09a2d6eea5e..8e9ec67a1c9 100644 --- a/src/mame/technos/ddragon.cpp +++ b/src/mame/technos/ddragon.cpp @@ -544,10 +544,7 @@ void ddragon_state::dd2_map(address_map &map) void ddragon_state::sub_map(address_map &map) { - map(0x0000, 0x001f).m(m_subcpu, FUNC(hd63701y0_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); map(0x8000, 0x81ff).ram().share("comram"); - map(0xc000, 0xffff).rom().region("sub", 0); } void ddragon_state::sub_6309_map(address_map &map) diff --git a/src/mame/technos/spdodgeb.cpp b/src/mame/technos/spdodgeb.cpp index cb99f505034..5db6be355bc 100644 --- a/src/mame/technos/spdodgeb.cpp +++ b/src/mame/technos/spdodgeb.cpp @@ -430,11 +430,8 @@ void spdodgeb_state::sound_map(address_map &map) void spdodgeb_state::mcu_map(address_map &map) { - map(0x0000, 0x0027).m(m_mcu, FUNC(hd63701y0_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); map(0x8080, 0x8080).r("mculatch", FUNC(generic_latch_8_device::read)); map(0x8081, 0x8085).w(FUNC(spdodgeb_state::mcu_data_w)); - map(0xc000, 0xffff).rom().region("mcu", 0); } diff --git a/src/mame/yamaha/ymdx100.cpp b/src/mame/yamaha/ymdx100.cpp index a8081881704..fac54925dd0 100644 --- a/src/mame/yamaha/ymdx100.cpp +++ b/src/mame/yamaha/ymdx100.cpp @@ -339,8 +339,6 @@ void yamaha_dx100_state::p22_w(int state) void yamaha_dx100_state::mem_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6303x_cpu_device::hd6301x_io)); - map(0x0040, 0x00ff).ram(); // internal RAM map(0x0800, 0x0fff).ram().share("nvram"); map(0x1000, 0x17ff).ram(); map(0x2000, 0x2001).rw("lcdc", FUNC(hd44780_device::read), FUNC(hd44780_device::write)); diff --git a/src/mame/yamaha/ymdx11.cpp b/src/mame/yamaha/ymdx11.cpp index 7bcece89c83..4207d99e925 100644 --- a/src/mame/yamaha/ymdx11.cpp +++ b/src/mame/yamaha/ymdx11.cpp @@ -76,8 +76,6 @@ void yamaha_dx11_state::cartridge_bank_w(u8 data) void yamaha_dx11_state::main_map(address_map &map) { - map(0x0000, 0x0027).m(m_maincpu, FUNC(hd6301y_cpu_device::hd6301y_io)); - map(0x0040, 0x013f).ram(); map(0x1400, 0x1400).mirror(0x3ff).w(FUNC(yamaha_dx11_state::cartridge_bank_w)); map(0x1800, 0x1801).mirror(0x3fe).rw("opz", FUNC(ym2414_device::read), FUNC(ym2414_device::write)); map(0x1c00, 0x1c01).mirror(0x3fe).rw("lcdc", FUNC(hd44780_device::read), FUNC(hd44780_device::write)); diff --git a/src/mame/yamaha/ymrx15.cpp b/src/mame/yamaha/ymrx15.cpp index 3c0afffad00..2f03265892c 100644 --- a/src/mame/yamaha/ymrx15.cpp +++ b/src/mame/yamaha/ymrx15.cpp @@ -46,8 +46,6 @@ HD44780_PIXEL_UPDATE(rx15_state::pixel_update) void rx15_state::mem_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301x_cpu_device::hd6301x_io)); // TODO: internalize - map(0x0040, 0x00ff).ram(); // TODO: internalize map(0x1000, 0x1000).nopr(); map(0x2000, 0x207f).rw(m_ryp4, FUNC(ym2154_device::read), FUNC(ym2154_device::write)); map(0x3000, 0x3001).rw("lcdc", FUNC(hd44780_device::read), FUNC(hd44780_device::write)); diff --git a/src/mame/yamaha/ymtx81z.cpp b/src/mame/yamaha/ymtx81z.cpp index eb7ca909118..944f2b6e82e 100644 --- a/src/mame/yamaha/ymtx81z.cpp +++ b/src/mame/yamaha/ymtx81z.cpp @@ -78,9 +78,6 @@ void ymtx81z_state::machine_start() void ymtx81z_state::mem_map(address_map &map) { - map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6303x_cpu_device::hd6301x_io)); - map(0x001b, 0x001b).noprw(); - map(0x0040, 0x00ff).ram(); // internal RAM map(0x2000, 0x2001).mirror(0x1ffe).rw("ymsnd", FUNC(ym2414_device::read), FUNC(ym2414_device::write)); map(0x4000, 0x4001).mirror(0x1ffe).rw("lcdc", FUNC(hd44780_device::read), FUNC(hd44780_device::write)); map(0x6000, 0x7fff).ram().share("nvram"); -- cgit v1.2.3